最新美国发明专利第2016-01-26期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09246338B2	Arrangement and method for safely discharging an energy accumulator Energy storage arrangement for safely discharging an energy accumulator with electric poles via which the energy accumulator can be at least discharged, an electrically conductive conductor medium in the form of a fluid or fine-grained bulk material or a mixture of both, a reservoir container which is filled with the conductor medium, a collecting container which is provided for accommodating the conductor medium and which encloses the electric poles of the energy accumulator, and a triggerable discharging device, by means of which, in the case of triggering, conductor medium is discharged from the reservoir container into the collecting container such that the electric poles of the energy accumulator are connected to one another in an electrically conductive fashion via the conductor medium.
US09246333B2	Electric power supply system Disclosed is an electric power supply system which has: a common power source which stores and supplies a power via a local power grid; and a distributed power source which supplies a power to buildings and a surplus to the common power source. The electric power supply system further includes a first power meter measuring the amount of power supplied from a commercial power source, a second power meter measuring the amount of power received from and supplied to the common power source via the local power grid, and a distribution control device which distributes a power from the common power source to the area based on the amounts of power as measured by the first power meter and the second power meter.
US09246328B2	Integrated EMI filter circuit with ESD protection and incorporating capacitors An integrated electromagnetic interference (EMI) filter circuit with electrostatic discharge (ESD) protection and incorporating capacitors is provided. At least one passive element, i.e. resistor or inductor is connected between an input terminal and an output terminal. A first capacitor is connected between ground and the input terminal, and a second capacitor is connected between ground and the output terminal. A first diode and a second diode are connected in parallel to the first capacitor and the second capacitor. One or multiple parallel capacitors are connected in parallel to the passive element and between the input terminal and the output terminal for frequency compensation by employing the novel EMI LPF circuit, it is extraordinarily advantageous of enhancing its rejection band attenuation and meanwhile maintaining high cut-off frequency while implementation.
US09246321B2	Wiring apparatus Electrical wiring apparatus having a base with an outer opening. The base has cable entries at opposite ends thereof that have the stripped wire ends of cables mounted therein. A mounting post extends outwardly from the base which has spaced recesses therein adjacent to the mounting post. Links are slidably mounted on the mounting post in offset relation in the spaced recesses to engage and connect the wire ends of the cables at opposite ends of the base. A cover plate and/or associated electrical device can be removably mounted on the base over the outer opening thereof to engage the links and maintain them in engagement with the wire ends. The electrical device may have terminals engaging the links.
US09246317B2	Electrical receptacle with frames for mounting in a support An electrical receptacle assembly is reconfigurable to provide any number of different styles or configurations of high or low voltage electrical receptacles and/or data outlets. The receptacle assembly includes a main body with an outlet receptacle portion, a flange portion extending outwardly from the main body, an upper frame member positioned generally above the flange portion, and a lower frame member positioned generally below the flange portion. A plurality of electrical contacts are positioned in the main body, and are configured to make electrical contact when the outlet receptacle portion receives an electrical or data plug associated with an electrical device. The upper and lower frame members are configured to interchangeably receive different main bodies with different outlet portions, and enable the different outlet portions to be mounted at a power center along a work surface or the like.
US09246316B2	Wiring harness A wiring harness includes a first power transmission path; a second power transmission path; a connecting part; and a connector. The first power transmission path has stiffness ensuring autonomously retention of its shape, the shape coinciding with an arrangement path. The second power transmission paths have stiffness smaller than that of the first power transmission path and also have flexibility. The connecting part includes a connection structure configured to connect conductive ends of the first power transmission path and the second power transmission paths to each other with the conductive ends being electrically insulated from outside.
US09246304B2	Pulse shaping device and pulse shaping method There is provided a pulse shaping device including a pulse generator configured to generate pulsed light by using a semiconductor laser for emitting light of a predetermined wavelength, and an optical member provided in a subsequent stage of the pulse generator and configured to compress a pulse time width of the pulsed light. The pulsed light has a first frequency dispersion state. The optical member imparts a second frequency dispersion state to the pulsed light, the second frequency dispersion state being a frequency dispersion state opposite to the first frequency dispersion state.
US09246300B2	Mode tailored spherical laser A spherical laser includes a transparent or semi-transparent outer spherical vessel having an internal cavity, an amplifying medium in the cavity, and means to excite the amplifying medium. The sphere is provided with a partially reflective coating to act as a spherical optical resonator. The spherical resonator includes a plurality of optically different regions containing alternative optical media from the cavity medium differing in bulk optical parameters utilized for mode tailoring. The optically different regions work collectively to exclude the whispering gallery modes from those supported by the spherical cavity. Excitation of the amplifying medium produces an optical gain. When the gain exceeds cavity losses and threshold conditions are met, lasing is supported. This creates a three-dimensional, spherically radiating emission, emulating a point source. The sphere is enclosed within a mirrored ellipse to image the output to a point, or within a mirrored parabola to columinate the emission.
US09246297B2	Gas laser oscillator controlling adjusted level of laser power supply A gas laser oscillator including discharge tubes, main discharge electrodes, auxiliary electrodes, an output mirror which outputs a laser, and a mechanical shutter which cuts off the laser output from the output mirror. To maintain the auxiliary discharge in the state where the laser output is zero, the base discharge command is set to a first command value when the mechanical shutter is closed, and is set to a second command value smaller than the first command value when the mechanical shutter is opened.
US09246296B2	Laser or amplifier optical device seeded with nonlinearly generated light An optical apparatus comprising an optical source for providing output light for providing input signal light can comprise a pump source for pumping a four wave mixing (FWM) process with light pulses (“FWM pump light”); a FWM element in optical communication with said pump source, said FWM element configured for hosting the FWM process to generate, responsive to the FWM pump light, pulses of FWM signal light and FWM idler light having different wavelengths; and a laser or amplifier optical device comprising a gain material for providing optical gain at a gain wavelength via a process of stimulated emission responsive to optical pumping with pump light, said laser or amplifier optical device in optical communication with said optical source and receiving one of the FWM signal light and the FWM idler light as input signal light having the gain wavelength for optically seeding with input signal light the laser or amplifier optical device.
US09246290B1	Swivel cord-connector A swivel cord-connector having a swivel head and a swivel tail connected via a swivel core. In an embodiment, a head assembly of the swivel core is enclosed in the swivel head and a tail assembly of the swivel core is enclosed in the swivel tail. In an embodiment, the swivel core includes at least a central conductor rod and one or more concentric conductor tubes, which may rotate along the longitudinal axis. In an embodiment, the swivel head has an asymmetrical structure for providing counter torque forces. In an embodiment, the swivel is waterproof and/or can float on water surface.
US09246287B2	Connecting piece and method for affixing a connecting piece to one end of a cable A connecting piece for affixing to a cable. The connecting piece comprises a base and a screw connection arranged on the base. The screw connection includes a screw shaped portion, and includes a screw projecting from the base or a hollow with an interior thread.
US09246280B2	Cage, receptacle and system for use therewith A cage can include a thermal plate positioned so as to be aligned with a bottom of a channel. An adjustable biasing system is provided to urge a module toward the thermal plate. The adjustable biasing system may be a riding heat sink. The thermal plate may include a fin to help increase its surface area. A housing with a card slot aligned with the channel can be provided in the cage to provide a receptacle that has a card slot aligned with the channel. A receptacle so configured allows for greater thermal energy to be removed from a module.
US09246279B2	Electric connector Provided is an electric connector, including: a housing placed on a circuit board and including a receiving concave portion formed by a substantially square-cylindrical-shaped inner wall surface and receiving a mating connector, and a center convex portion disposed between a pair of opposed walls forming the receiving concave portion; a plurality of terminals accommodated in a plurality of terminal grooves formed in each of the pair of the opposed walls; and a ground metal fitting connecting with a plate-shaped ground plate included in the mating connector, wherein the housing includes a space accommodating the ground metal fitting, where the space is disposed in the central area between the pair of the opposed walls and extends in the arrangement direction of the terminals, the upper part of the space communicates with an opening formed in the center convex portion, and receives the mating ground plate.
US09246277B2	Electrical connector Electrical connector includes an insulative body, first and second terminals, shielding housing, and adhesive. The insulative body has a tongue piece and a base having first and second positioning grooves. Each of the first terminals has a first positioning part received in the insulative body, a first electrical contact part exposed from the tongue piece, and a first bonding part accommodated in a corresponding one of the first positioning grooves and protruding from the base. Each of the second terminals has a second positioning part received in the base, a second electrical contact part exposed from the tongue piece, and a second bonding part accommodated in a corresponding one of the second positioning grooves and protruding from the base. Adhesive is injected into the first and second positioning grooves to encapsulate the first bonding parts in the first positioning grooves and the second bonding parts in the second positioning grooves.
US09246273B2	Rapid fixing device for rapid disconnection two-part connector A removable fixing device includes a first elongated mating member, a second elongated mating member designed to be inserted in the first elongated mating member, and an elastic member adapted to lock the two elongated mating members axially relative to each other and retractable radially on insertion of the second elongated mating member into the first elongated mating member. One elongated mating member includes an actuator mobile axially relative to the elongated mating member between a first position in which the elastic member locks the two elongated mating members axially and a second position in which the actuator unlocks the elongated mating members by radial retraction of the elastic member.
US09246272B2	Latching connector system and associated method A latching connector receptacle includes a receptacle body configured to receive a plug, a biased release ring coupled to the receptacle body, and a latch dog assembly coupled to the receptacle body. The latch dog assembly includes a moveable latch dog configured to matingly engage the plug and matingly engage the release ring, and a moveable latch indicator configured to move in response to movement of the latch dog.
US09246269B2	Connector with a guiding portion The invention is directed towards a connector with a guiding portion having a housing, a connecting interface having a plurality of conductive terminals, and a first guiding post disposed along the housing, whereby the first guiding post has a sloping guiding portion.
US09246268B1	Device and method protecting a connector from debris while validating connector position assurance engagement The present arrangement provides for a protection device having a deflector element with a receiving slot on its underside and a CPA assist coupled to the deflector element. The CPA assist is configured to be moved from the first pre-staged position to the second active position by pressing the CPA assist to engage a CPA positioned within the CPA slot. The protection device is configured to be placed onto a connector with the receiving slot configured to be placed over a CPA slot on the connector.
US09246264B2	Lockout features for electrical receptacle assemblies An electrical receptacle assembly having an outer body and a faceplate. The outer body can include at least one driven feature disposed on an outer surface of the outer body. The faceplate can include a number of terminal receivers and at least one driving feature, where the terminal receivers traverse the faceplate and are configured to receive a number of terminals of an electrical plug, and where the at least one driving feature is disposed on a bottom side of the faceplate. The faceplate can rotate between a first position and a second position. The driving feature of the faceplate can couple to the driven feature of the outer body when the faceplate is out of the first position. The faceplate can rotate from the first position to the second position using the electrical plug when the terminals are disposed in the terminal receivers.
US09246262B2	Electrical connector including latch assembly with pull tab An electrical connector can includes a connector housing that includes a housing body and further includes at least one fulcrum supported by the housing body. The electrical connector further includes at least one electrical contact supported by the connector housing, the at least one electrical contact configured to mate with a complementary electrical contact of a complementary electrical connector. The electrical connector further includes a latch assembly. The latch assembly can include an actuator and a latch. The actuator can have an actuator portion, an attachment portion, and at least one arm that extends between the actuator portion and the attachment portion. The latch can have a latch body that defines an attachment portion that is configured to be attached to the attachment portion of the actuator, such that movement of the actuator in a predetermined direction causes the pivot member to ride along the fulcrum, thereby pivoting the latch from a latched position to an unlatched position.
US09246258B2	Multiplex receptacle adapter A modular electrical receptacle wherein more than one of the modular electrical receptacles can be connected to form a larger receptacle connected to a single source of power. The modular electrical receptacle includes a housing having a front surface with a first and a second electrical outlet. The housing further includes a first tab extending from a first end and a second end extending from a second end for securing the modular receptacle to an in-wall electrical box. The housing further includes a power link, such as a conductive extension, for connecting directly to another module and providing the other module with access to the single source of power. The power link can be three links for connecting a positive line, a neutral line and a ground line to another module. The housing also includes a coupler for connecting the housing to a power link of another module.
US09246255B1	Quick slide connector assembly A connector assembly can include a housing, a terminal retainer, and a terminal position assurance member. The terminal retainer can be removably coupled with the housing and define a primary retaining lock for an electrical contact assembly. The terminal retainer can cooperate with the housing to form a compartment that can receive the electrical contact assembly. The compartment can extend along a mating axis of the housing, with a first frontal opening and a rear opening spaced from one another along the mating axis. A portion of the first frontal opening can be elastically deformable such that a size of the first frontal opening is variable. The terminal position assurance member can be removably coupled with the housing to define a secondary retaining lock for the electrical contact assembly. The terminal position assurance member can be positioned to inhibit elastic deformation of the portion of the first frontal opening.
US09246251B2	High density connector A connector can be provided that allows for improved route-out including straight-back routing. Signal and ground terminal tails can be arranged in a single row to help facilitate such functionality. Consequentially, a connector with two vertically stacked card slots can be provided that allows for straight back routing of the signal traces in four layers while still providing a compact connector design.
US09246250B2	Electrical connector Provided is an electrical connector without making the manufacturing process complicated and without increasing the size and the manufacturing cost, wherein, an electrical connector includes a holddown attached to a body part of a second insulating housing and fixed to a circuit board P. The holddown is formed of a single metal sheet, and includes a held part held by body part, leg parts extending from the held part, protruding from opposed faces facing the circuit board of the body part placed on the circuit board, and being fixed to the circuit board, and an extension part extending from the held part in a direction parallel to a direction in which a counterpart connector is engaged.
US09246246B2	Tunable cast grounding block for dry sections A number of variations may include a casting having a raised integrated cast grounding block with tunable surfaces for routing an electrical grounding wire/strap via an eyelet and an anti-rotational tab attachment.
US09246244B2	RF connector with push-on connection A radio frequency (RF) connector on a circuit board is provided. The RF connector includes a socket member, which includes a conductive sleeve comprising a top portion, a bottom portion, a plurality of springs connecting the top portion to the bottom portion. The RF connector also includes a base inside the conductive sleeve comprising a matching hole configured to match to a conductive pin of a plug member. The RF connector further includes an end portion electrically coupled to the circuit board. The end portion is mounted on the circuit board. The RF connector also includes a middle portion connected between the socket member and the end portion.
US09246243B2	Contacting unit The present invention relates to a contacting unit (t) for electrical conductors or pin contacts (8). Contacting units (1) of this kind are used for reversibly contacting said conductors or pin contacts (8) in an electrical and mechanical manner. In the present invention, the spring force that acts on a conductor or pin contact (8) to be connected can be variably adjusted. To this end, the free, spring-loaded length of a spring contact member (11) is varied by means of a sliding element (20). As a result of the variation of the spring-loaded length of the spring contact member (11), the spring force is increased in the case of a shortening and is correspondingly reduced in the case of an extension.
US09246242B2	Push wire connector having a rotatable release member An electrical connector includes a housing and a conductive contact member disposed in the housing. A first contact portion of the conductive contact member receives a blade contact of an electrical device and a second contact portion electrically engages an inserted electrical wire. A spring member is disposed in the housing and is connected to the contact member. A rotatable member is movable between first and second positions. When the rotatable member is in the second position the spring member secures an inserted wire in electrical engagement with the conductive contact member and prevents removal of the inserted wire. When the rotatable member is in the first position the spring member allows for removal of an inserted wire and allows for insertion of a wire in the housing.
US09246235B2	Controllable directional antenna apparatus and method Controllable directional antenna apparatus and method preferably includes structure and/or steps whereby a Yagi antenna array has a first driven element, a first reflector, and plurality of first directors disposed on a common substrate. The first reflector is bent such that (i) an unbent length thereof is longer than a length of the first driven element, but (ii) a bent length thereof is shorter than the length of the first driven element. A second driven element is also disposed on the common substrate but is angled with respect to the first driven element. A second reflector and a plurality of second directors are also disposed on the common substrate. The second reflector is bent like the first reflector, to reduce the footprint of the array on the substrate. Preferably, the Yagi antenna elements are printed on a printed circuit board.
US09246234B2	Antenna for multiple frequency bands An exemplary embodiment of an antenna in accordance with the present invention utilizes a sub-reflector and a main reflector with each of them having its own focal-ring type geometry. The antenna cooperates with a signal transmission feed disposed at the center of the antenna axis between the first and main reflectors to emit radio signals towards the sub-reflector. The sub-reflector reflects radio waves towards a main reflector which in turn reflects the radio waves to form the beam pattern emitted by the antenna. The reflecting surface of the sub-reflector is formed by a portion of an axially-displaced ellipse rotated about the antenna axis. The reflecting surface of the main reflector is defined by a section of a parabola rotated about the antenna axis to form a reflecting surface that concavely slopes away from the antenna axis. An embodiment of the antenna provides a wide coverage conical beam with selectable beam peaks that operate over a 2.25:1 frequency band range and provides substantially iso-flux beam density.
US09246233B2	Compact low sidelobe antenna and feed network An antenna may include a primary reflector having a ring focus; a feed body along an axis of the primary reflector, the feed body including a circular waveguide coaxial with the axis of the primary reflector; a sub-reflector disposed facing an end of the circular waveguide; and a generally cylindrical stem extending from a center of the sub-reflector into the circular waveguide to form a section of annular waveguide. A sub-reflector support may mechanically connect a perimeter of the sub-reflector and an outside surface of the feed body. The sub-reflector, the stem, and the feed body may be collectively configured to couple microwave energy between the annular waveguide and the primary reflector.
US09246232B2	Multilayer pillbox type parallel-plate waveguide antenna and corresponding antenna system A multilayer antenna is provided, which includes a power supply portion generating a wave, a radiating portion, and a guide portion that makes it possible to guide the wave from the power supply portion to the radiating portion. The guide portion includes: at least two stacked guide layers having parallel planes and, for each pair of adjacent layers, a transition between the adjacent layers, including a reflector engaging with a slot-coupling. For at least one pair of adjacent layers, for which the guide portion includes a non-planar reflector, the slot-coupling includes a plurality of slots. Each slot includes a main body that is elongate along at least one axis. The slots are placed on at least one row and together form a pattern that extends along the reflector and has a shape that is dependent on the shape of the reflector.
US09246231B2	High-gain wideband antenna apparatus Disclosed is a high-gain wideband antenna apparatus. The high-gain wideband antenna apparatus, includes: a feeding antenna configured to radiate a signal; a cover configured to be disposed on a front surface of the feeding antenna based on a radiation direction of the signal and including a conductor pattern formed in a specific shape; and a ground surface configured to be disposed on the feeding antenna based on the radiation direction of the signal. By this configuration, the conductor patterns are approximately configured on both surfaces of a dielectric material to control a phase of a reflection coefficient in a specific frequency band, thereby increasing a gain and a bandwidth of an antenna and metal surfaces are additionally mounted on sides of a feeding antenna, thereby improving a front back ratio of the antenna.
US09246226B2	Antenna horn with unibody construction A low cost antenna horn for outdoor use having an extended housing with a unibody construction to enclose a waveguide and polarizing septum, the assembly of which rigidly retains and orients the waveguide and polarizing septum without using traditional hardware or sealants.
US09246225B2	Low-noise-figure aperture antenna Embodiments of the present invention concerns an aperture antenna that comprises: a receiving element, which includes an aperture and is configured to receive, through the aperture, radio signals having frequencies within a given band of radio frequencies; a waveguide configured to receive radio signals from the receiving element; and a frequency selective structure, which is arranged between the receiving element and the waveguide, and comprises metamaterial structures that extend partially inside the receiving element and/or partially inside the waveguide and that are configured to cause the propagation, from the receiving element to the waveguide, of only the received radio signals that have frequencies comprised within a predetermined sub-band of the given band of radio frequencies. Furthermore, the frequency selective structure is configured to reflect back into the receiving element the received radio signals that have frequencies not comprised in the predetermined sub-band.
US09246222B2	Compact wideband patch antenna A patch antenna includes a dielectric substrate having a body that extends a thickness from a first side to a second side that is opposite the first side. The body of the substrate includes thru openings that extend through the thickness of the body. A radiating patch is positioned on the first side of the body of the substrate. The radiating patch includes holes that are aligned with corresponding thru openings of the body of the substrate. A ground plane is positioned on the second side of the body of the substrate. At least three feed probes are electromagnetically coupled to the radiating patch such that the patch antenna is configured to generate a circularly polarized radiation pattern. Each feed probe includes a conductive path that extends within a corresponding thru opening of the body of the substrate from the second side of the body to the first side of the body. Each conductive path being exposed along the first side of the body via the holes of the radiating patch. The feed probes are positioned relative to the body of the substrate such that adjacent feed probes are spaced apart from each other along the body. The feed probes are configured to feed the radiating patch at at least three points with approximately equal power amplitude.
US09246219B2	Handheld device A handheld device is provided. The handheld device comprises a housing, a covering means, a circuit board, a battery and a near-field communication (NFC) antenna. The covering means is assembled with the housing to form a receiving space. The covering means comprises an outer surface and a through hole. The circuit board and the battery are disposed in the receiving space and electrically connected to each other. The NFC antenna comprises a metal layer and a transmission element. The metal layer is patterned on the outer surface of the covering means. The transmission element electrically couples the metal layer to the circuit board via the through hole. The NFC antenna is separated from the battery and the circuit board with a distance by the covering means.
US09246218B2	Method and apparatus for dynamically processing an electromagnetic beam A method and apparatus for processing a terahertz frequency electromagnetic beam are disclosed. For example, the method receives the terahertz frequency electromagnetic beam via a metamaterial having a plurality of addressable magnetic elements, where a resonant frequency of each of the plurality of addressable magnetic elements is capable of being programmably changed via an adjustment, and activates selectively a subset of the plurality of addressable magnetic elements to manipulate the terahertz frequency electromagnetic beam.
US09246213B2	Electronic device An electronic device includes: an antenna; and a touch panel having an electrode sheet formed with an operation detecting pattern, which has conductive, wherein an antenna pattern configuring the antenna is formed on the periphery of the touch panel.
US09246209B2	Antenna and front end module There are provided an antenna and a front end module having an air cavity formed therein and shortening a connection distance with a signal processing module to improve radiation characteristics and facilitate a manufacturing process thereof, the antenna including a substrate having a preset mounting surface, an antenna pattern part formed on the mounting surface of the substrate and transmitting and receiving a signal within a preset frequency band, and a solder ball group having a plurality of solder balls formed on the mounting surface of the substrate to fix the substrate to an external circuit board and disposed at preset intervals around the antenna pattern part to form an air cavity.
US09246206B2	Transmission-line transformer in which signal efficiency is maximised Provided is a transmission line transformer having increased signal efficiency. The transmission line transformer is formed on an integrated circuit (IC), wherein a first transmission line disposed in one direction. Second and third transmission lines have same length direction as the first transmission line and are spaced apart from each other in a lateral direction above or below the first transmission line. Accordingly, an area of the first transmission line and areas of the second and third transmission lines, which face each other, are increased, thereby improving a coupling factor. Also, since a secondary transmission line is divided into two regions and uses the second and third transmission lines that have narrower widths than the first transmission line, parasitic capacitance components generated between the first through third transmission lines and a semiconductor substrate may be decreased.
US09246203B2	Communication sheet, smart shelf A communication sheet (100) according to the present invention that transmits an electromagnetic wave for communication, includes a dielectric layer (120) including a dielectric substrate, a first conductor layer (110) including a mesh sheet-like mesh conductor disposed on one surface of the dielectric substrate; and a second conductor layer (130) including a sheet-like conductor disposed on another surface of the dielectric substrate opposite to the first conductor layer (110). The communication sheet (100) is provided which includes an opening whose width in a direction perpendicular to a traveling direction of the electromagnetic wave for communication traveling through the dielectric layer (120) is not less than 1/20 and not greater than ⅗ of a width in the direction perpendicular to the traveling direction of the dielectric substrate, the opening penetrating from the first conductor layer (110) to the second conductor layer.
US09246196B2	Battery unit A battery unit may include a main accommodation casing that includes a power output terminal, at least one sub-module that is accommodated in the main accommodation casing and a control unit that is accommodated in the main accommodation casing and controls at least one of charging and discharging of a unit battery, wherein in the sub-module, two or more battery blocks are accommodated inside a sub-accommodation casing so that the terminals of the battery blocks each including a plurality of unit batteries are not exposed and the battery blocks are connected to each other through an electric connection member.
US09246195B1	Rechargeable battery A rechargeable battery is disclosed. In one aspect, the battery includes first and second battery cells facing each other and a case comprising first and second insertion portions, into which the first and second battery cells are respectively inserted. The case also includes a circuit accommodator formed between the first and second insertion portions and accommodating a protection circuit configured to control charging and discharging operations of the first and second battery cells.
US09246188B2	Anti-perovskite solid electrolyte compositions Solid electrolyte antiperovskite compositions for batteries, capacitors, and other electrochemical devices have chemical formula Li3OA, Li(3-x)Mx/2OA, Li(3-x)Nx/3OA, or LiCOXzY(1-z), wherein M and N are divalent and trivalent metals respectively and wherein A is a halide or mixture of halides, and X and Y are halides.
US09246187B2	Non-aqueous electrolyte for lithium-ion battery A substantially non-aqueous electrolyte solution includes an alkali metal salt, a polar aprotic solvent, and an organophosphorus compound of Formula IA, IB, or IC: where R1, R2, R3 and R4 are each independently hydrogen, halogen, alkyl, alkenyl, alkynyl, cycloalkyl, aryl, heterocyclyl, heteroaryl, alkoxy, alkenoxy, alkynoxy, cycloalkoxy, aryloxy, heterocyclyloxy, heteroaryloxy, siloxyl, silyl, or organophosphatyl; R5 and R6 are each independently alkyl, alkenyl, alkynyl, cycloalkyl, aryl, heterocyclyl, or heteroaryl; R7 is and R8, R9 and R10 are each independently alkyl, cycloalkyl, aryl, heterocyclyl, or heteroaryl; provided that if the organophosphorus compound is of Formula IB, then at least one of R5, and R6 are other than hydrogen, alkyl, or alkenyl; and if the organophosphorus compound is of Formula IC, then the electrolyte solution does not include 4-methylene-1,3-dioxolan-2-one or 4,5-dimethylene-1,3-dioxolan-2-one.
US09246186B2	Electrode assembly, fabricating method of the electrode assembly and electrochemical cell containing the electrode assembly A fabricating method of a unit structure for accomplishing an electrode assembly formed by a stacking method, and an electrochemical cell including the same are disclosed. The fabricating method of the electrode assembly is characterized with fabricating the unit structure by conducting a first process of laminating and forming a bicell having a first electrode/separator/second electrode/separator/first electrode structure, and conducting a second process of laminating first separator/second electrode/second separator one by one on one of the first electrode among two of the first electrodes.
US09246180B2	Fuel cell module A fuel cell module includes a fuel cell stack, a reformer for reforming a mixed gas of a raw fuel and water vapor, an evaporator for supplying water vapor to the reformer, and a heat exchanger for raising the temperature of the oxygen-containing gas by heat exchange with a combustion gas, and an exhaust gas combustor and a start-up combustor for producing the combustion gas. The fuel cell module includes a first thermoelectric converter and a second thermoelectric converter for performing thermoelectric conversion based on a temperature difference between the combustion gas and the oxygen-containing gas.
US09246179B2	Fuel cell system and method of operating the same A fuel cell system and a method of operating the same. The fuel cell system in particular includes an air discharge part provided on the anode of a fuel cell, and a controller that is configured to measure a purging period of recirculated hydrogen and an operating temperature of the fuel cell, and operate the air discharge part based on the measured values to prevent the anode from becoming poisoned due to the emission of CO gases.
US09246178B2	Method to minimize the impact of shunt currents through aqueous based coolants on PEM fuel cell bipolar plates A fuel cell includes a first valve metal flow field plate. The first valve metal flow field plate has a first cooling channel adapted to receive an aqueous coolant and to contact the aqueous coolant at a position that inhibits the formation of shunt currents when the fuel cell is incorporated in a fuel cell stack. A field assembly includes a first metal flow field plate having a first cooling channel adapted to receive an aqueous coolant is also provided. A valve metal plate is disposed over the first metal flow field plate in the flow field assembly. Fuel cell stacks using the valve metal-containing flow field plates are also provided.
US09246176B2	Method to prepare full monolayer of platinum on palladium based core nanoparticles A method for forming catalytic nanoparticles includes forming core-shell catalytic nanoparticles and processing the core-shell catalytic nanoparticles. The core-shell catalytic nanoparticles have a palladium core enclosed by a platinum shell. The core-shell catalytic nanoparticles are processed to increase the percentage of the surface area of the core-shell catalytic nanoparticles covered by the platinum shell.
US09246171B2	Cathode active material, and cathode and lithium battery including the material A cathode active material including a lithium metal oxide represented by Formula 1: Li[LixMeyM′z]O(2+d) Formula 1 wherein x+y+z=1, 0
US09246170B2	MgMn2O4 with a crystal structure analogue to CaFe2O4, CaMn2O4, or CaTi2O4 as rechargeable magnesium battery cathode A cathode active material for a battery includes a material of the formula MgxMn2O4 wherein 0≦x≦1 and the material has a crystal structure having an open channel formed in a single dimension or along a single dimensional axis. The crystal structure may be an analogue to CaFe2O4, CaMn2O4 or CaTi2O4.
US09246169B2	Positive electrode active material for nonaqueous electrolyte secondary battery, method for making the same, positive electrode including the same, and battery including the positive electrode A positive electrode active material for a nonaqueous electrolyte secondary battery includes a positive electrode active material particle and a compound containing a rare earth element and a carbonate, the compound having a particle size of 1 to 100 nm and being adhered to a surface of the positive electrode active material particle. The ratio of the compound relative to the positive electrode active material particle is 0.005% to 0.4% by mass on a rare earth element basis. The positive electrode active material particle is composed of a lithium transition metal oxide having a layered structure.
US09246167B2	Method for forming zinc alloy powder for use in alkaline battery A method for forming a zinc alloy powder for use in an alkaline battery includes: obtaining a zinc molten metal in which zinc is melted; melting a zinc-aluminum master alloy in the zinc molten metal, thereby obtaining an aluminum-contained zinc alloy molten metal; and producing an aluminum-contained zinc alloy powder by powdering the aluminum-contained zinc alloy molten metal.
US09246165B2	Cathode composite material and lithium ion battery using the same A cathode composite material includes a cathode active material and a coating layer coated on a surface of the cathode active material. The cathode active material includes a spinel type lithium nickel manganese oxide. The coating layer includes a lithium metal oxide having a crystal structure belonging to C2/c space group of the monoclinic crystal system. The present disclosure also relates to a lithium ion battery including the cathode composite material.
US09246163B2	Metal oxygen battery and a method for manufacturing oxygen storage material used therein Provided is a metal oxygen battery 1 including a positive electrode 2 having oxygen as an active material, a negative electrode 3 having metallic lithium as an active material, and an electrolyte layer 4 interposed between the positive electrode 2 and negative electrode 3. The positive electrode 2 contains oxygen storage material including mixed crystal of hexagonal composite metal oxide expressed by the general formula AxByOz (in which, A is one type of metal selected from a group of Y, Sc, La, Sr, Ba, Zr, Au, Ag, Pt, Pd, B is one type of metal selected from a group of Mn, Ti, Ru, Zr, Ni, Cr, and x=1, 1≦y≦2, 1≦z≦7, provided that a case where both A and B are Zr is excluded) and one or more non-hexagonal composite metal oxide expressed by the general formula AxByOz.
US09246162B2	Cathode active material and lithium secondary battery containing the same Disclosed herein is a cathode active material for secondary batteries and a secondary battery including the same, the cathode active material including lithium manganese oxide (A) having a spinel crystal structure and at least two types of lithium nickel-manganese-cobalt composite oxides (B) containing Ni, Mn, and Co as transition metals, wherein the lithium nickel-manganese-cobalt composite oxides (B) are different from each other in terms of at least one selected from the group consisting of elemental composition, particle diameter, and density.
US09246161B2	All-solid battery An all-solid battery is formed so that an electrode active material layer of at least one of positive and negative electrodes has a composition distribution such that a local volume ratio, expressed by a ratio of a volume of an electrode active material contained in a part of the electrode active material layer with respect to a volume of a solid electrolyte material contained in the part of the electrode active material layer, increases as the part of the electrode active material layer approaches from an interface of the solid electrolyte layer toward an interface of a current collector in a thickness direction of the electrode active material layer, and a voidage of the electrode active material layer increases as the part of the electrode active material layer approaches from the interface of the solid electrolyte layer toward the interface of the current collector in the thickness direction.
US09246160B2	Anode and battery using the same An anode, an anode current collector, an anode active material and a battery using the anode are provided. The anode includes the anode current collector and the anode active material. The anode current collector has a projection. The anode active material layer is formed via at least one of a vapor deposition method, a liquid-phase deposition method, a sintering method and the like.
US09246158B2	Nanostructured materials for electrochemical conversion reactions The disclosure is related to battery systems. More specifically, embodiments of the disclosure provide a nanostructured conversion material for use as the active material in battery cathodes. In an implementation, a nanostructured conversion material is a glassy material and includes a metal material, one or more oxidizing species, and a reducing cation species mixed at a scale of less than 1 nm. The glassy conversion material is substantially homogeneous within a volume of 1000 nm3.
US09246154B2	Electrode assembly having tab-lead joint portion of minimized resistance difference between electrodes and electrochemical cell containing the same Disclosed herein is a stacking or stacking/folding type electrode assembly of a cathode/separator/anode structure, wherein the electrode assembly is constructed in a structure in which tabs (electrode tabs), having no active material applied thereto, protrude from electrode plates constituting the electrode assembly, the electrode tabs are electrically connected to an electrode lead, and the pluralities of electrode tabs are joined to the top and the bottom of the electrode lead at an electrode lead-electrode tabs joint portion such that the resistance difference between electrodes at the electrode lead-electrode tabs joint portion is minimized. Also disclosed is an electrochemical cell including the electrode assembly.
US09246152B2	Battery pack containing electrode terminal connecting device Disclosed herein is a middle or large-sized battery pack having a plurality of electrically connected battery modules, the middle or large-sized battery pack including an electrode terminal connecting device, wherein the electrode terminal connecting device includes a conductive connecting member coupled to electrode terminals of the battery modules to electrically connect the electrode terminals of the battery modules to each other and a shut-off cutter mounted to the conductive connecting member to shut off the circuit of the conductive connecting member when impact is applied to the battery pack in the longitudinal direction of the battery pack.
US09246149B2	Porous carbon interlayer for lithium-sulfur battery The present disclosure relates to an electrochemical cell including an anode, a sulfur-containing cathode, a lithium-ion-containing electrolyte, and a porous carbon interlayer disposed between the anode and the cathode. The interlayer may be permeable to the electrolyte. The interlayer may be formed from a multiwall carbon nanotube (MWCNT) or a microporous carbon paper (MCP).
US09246143B2	Rechargeable battery module A rechargeable battery module, including unit cells that are adjacent to each other, each of the unit cells being configured as a rechargeable battery and including a first electrode terminal, a second electrode terminal, and a case that is electrically connected to the second electrode terminal, an insulation film on at least one side among all sides of the unit cells, and a conductive member on a side of the insulation film, the conductive member being electrically connected to the first electrode terminal of at least one of the unit cells.
US09246139B2	Pouch case for secondary battery and secondary battery using the same A pouch case for a secondary battery in which the width of a metal layer in a plurality of layers to constitute the pouch case is formed narrower than those of other layers so that the metal layer is not exposed to an outer surface of the pouch case. A secondary battery includes an electrode assembly provided with one or more electrode tabs. A pouch case has the electrode assembly accommodated therein, and is formed of a plurality of layers. In the secondary battery, any one of the plurality of layers to constitute the pouch case is formed as a metal layer of which width is narrower than those of the other layers.
US09246134B2	Lamination transfer films for forming articles with engineered voids Transfer films, articles made therewith, and methods of making and using transfer films to form bridged nanostructures are disclosed.
US09246132B2	Flexible organic light-emitting display apparatus and method of manufacturing the same A flexible organic light-emitting display apparatus includes a flexible substrate, a barrier layer on the flexible substrate, a display portion on the barrier layer, an encapsulation layer covering the display portion, and a moisture absorption layer between the flexible substrate and the display portion.
US09246122B2	Organic light emitting diode, method for manufacturing same, image display device, and illuminating device An organic light emitting diode and a method for manufacturing the same. The organic light emitting diode includes an anodic conductive layer, an organic EL layer, and a cathodic conductive layer formed from Ag or an alloy of Ag, or the like, sequentially laminated on a substrate, such that a two-dimensional lattice structure is provided on a surface of the cathodic conductive layer on an organic EL layer side, an extraction wavelength and a distance between centers of concave portions or convex portions in the two-dimensional lattice structure are within a region surrounded by specific coordinates in a graph illustrating a relationship between the light extraction wavelength and the distance, and the depth of the concave portions or a height of the convex portions is 12 nm to 180 nm.
US09246119B2	Organic electroluminescent device and manufacturing method thereof An organic electroluminescent device includes a plurality of main pixels. Each of the main pixels includes red, green, and blue sub-pixels. Each of the sub-pixels includes a first electrode, a second electrode opposite to the first electrode, and an organic light emitting layer between the first and second electrode. The organic light emitting layer of each of the sub-pixels includes a blue light emitting layer and a green light emitting layer. Optical microresonator distances of the red, green, and blue sub-pixels are different from each other.
US09246118B2	Organic electroluminescent device The present invention relates to organic electroluminescent devices which, in addition to the emitting layer, have a further layer which comprises the same materials as the emitting layer.
US09246113B2	Junction field-effect quantum dot memory switch A dense binary memory switch device combines the function of a pass transistor and a memory cell and has low programming and operation voltages. The device includes a charge storage region coupled to a gate electrode through a gate dielectric layer and directly contacting a channel region. The charge storage region contains quantum structures, deep traps or combinations thereof and is charged by carriers injected from injection regions that are in direct contact with the charge storage region. Fabrication of the device at low temperatures compatible with back-end-of-line processing is further disclosed.
US09246112B2	Semiconductor device with ballistic gate length structure Embodiments of the invention include a method of fabrication and a semiconductor structure. The method of fabrication includes depositing a first dielectric material on a substrate, and forming a bottom gate including filling a first opening in the first dielectric layer with a first conductive material. Next, depositing a second dielectric material, and forming a trench in the second dielectric material down to the first conductive material. Next, depositing a second conductive material on the sidewall of the trench forming an electrical connection between the first conductive material and the second conductive material, depositing a third dielectric material in the trench, and removing excess material not in the trench. Next, depositing a gate dielectric layer, and forming a channel layer of carbon nanotubes on the gate dielectric layer. Lastly, depositing a third conductive material on the channel layer forming source and drain terminals.
US09246109B2	Compound and organic light emitting device including the same A compound represented by Formula 1, below, and an organic light-emitting device including the compound represented by Formula 1:
US09246108B2	Quinoline-benzoxazole derived compounds for electronic films and devices The invention provides a composition comprising at least one compound selected from the following Formulas A, B1, B2, B3, B4 or C: or a combination thereof (C). For each formula, the R groups are described herein.
US09246106B2	Electron deficient molecules and their use in organic electronic applications Improved electron acceptor materials for organic photovoltaic (OPV) cells are provided. More specifically, electron acceptor materials for OPVs can include vinylimide, vinylthioimide, alkynylimide and/or alkynylthioimide moieties. Experimental work with members of this class of material has demonstrated record solar cell power conversion efficiency (3.36%) for non-fullerene acceptors.
US09246104B2	Fullerene derivative, method of manufacturing fullerene derivative and solar cell A fullerene derivative represented by the following formula (1): wherein “FLN” represents a fullerene core, R1 represents an optionally substituted C1-C24 alkyl group or an optionally substituted C7-C24 aralkyl group, R2 and R3 independently represent a hydrogen atom or an optionally substituted C1-C24 hydrocarbon group but excluding a case where both of R2 and R3 are hydrogen atoms, and R2 and R3 may combine together to form a ring.
US09246102B2	Organic semiconductor polymer, composition for organic semiconductor material, and photovoltaic cell An organic semiconductor polymer comprising a structural unit represented by the following Formula (I), a composition for organic semiconductor material, a photovoltaic cell and a polymer. wherein Z1 and Z2 each independently represent S, O, Se or Te; R represents —SOpX, —CN, —NO2, —P(═O)(OR1,)(OR2) or —C(R1′)═C(CN)2; X represents a hydrogen atom, an alkyl group, a cycloalkyl group, an aryl group, an aromatic heterocyclic group or —NR3(R4); R1, R2, R1,, R3 and R4 each independently represent a hydrogen atom, an alkyl group, a cycloalkyl group, an aryl group or an aromatic heterocyclic group; R3 and R4 may bond with each other to form a ring; and p represents 1 or 2.
US09246101B2	Deposition mask, deposition apparatus, and deposition method A deposition mask is used to pattern a thin film 3 on a substrate 10 by depositing deposition particles through a plurality of openings K having a stripe pattern. The deposition mask includes a frame 65; a plurality of mask layers 70 provided in the frame so as to overlap each other; and a support layer 71 provided between the mask layers 70. Each of the mask layers 70 is formed by arranging a plurality of mask wires 72 in a stripe pattern in a tensioned state, and the support layer 71 is formed by arranging a plurality of support wires 74 in a tensioned state so as to cross the mask wires 72. A plurality of gaps 73 in each of the plurality of mask layers 70 overlap each other to form a plurality of through gaps 73a that linearly extend through all of the plurality of mask layers 70. The openings K are formed by the through gaps 73a.
US09246100B2	Memory cell array structures and methods of forming the same The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.
US09246099B1	Low-temperature deposition of nitrides by UV-assisted ALD or CVD Compound layers, such as metal silicon nitrides, are formed by ALD or CVD from precursors with incompatible reaction temperature ranges. The substrate is held at a temperature within the lower reaction temperature range (e.g., that of a metal precursor). The low-temperature precursor and its reactant react to form an ALD monolayer or thin CVD layer. The high-temperature precursor and its reactant are pulsed in the chamber, and the substrate is irradiated with ultraviolet light. The ultraviolet light adds energy to the system to overcome the reaction barrier despite the substrate temperature being below the minimum reaction temperature of the high-temperature precursor.
US09246094B2	Stacked bi-layer as the low power switchable RRAM Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The resistive switching nonvolatile memory cells may include a first layer disposed. The first layer may be operable as a bottom electrode. The resistive switching nonvolatile memory cells may also include a second layer disposed over the first layer. The second layer may be operable as a resistive switching layer that is configured to switch between a first resistive state and a second resistive state. The resistive switching nonvolatile memory cells may include a third layer disposed over the second layer. The third layer may be operable as a resistive layer that is configured to determine, at least in part, an electrical resistivity of the resistive switching nonvolatile memory element. The third layer may include a semi-metallic material. The resistive switching nonvolatile memory cells may include a fourth layer that may be operable as a top electrode.
US09246091B1	ReRAM cells with diffusion-resistant metal silicon oxide layers A metal silicon oxide barrier layer between a nitride electrode containing the same metal and an oxide variable-resistance layer in a ReRAM cell prevents the metal from diffusing into the variable-resistance layer and prevents oxygen from diffusing into and oxidizing the electrode. Compound oxides of the same metal and silicon with varying stoichiometries and metal/silicon ratios may optionally replace part or all of the variable-resistance layer, a defect-reservoir layer, or both. The metal nitride electrode may include a metal silicon nitride current-limiting portion. Optionally, all the layers sharing the common metal may be formed in-situ as part of a single unit process, such as atomic layer deposition.
US09246084B2	RRAM cell including V-shaped structure Embodiments of a resistive random access memory (RRAM) cell structure are provided. The RRAM cell structure includes a first electrode over a substrate. The RRAM cell structure also includes a resistance variable layer over the first electrode. The resistance variable layer has a first portion in a V-shape. The RRAM cell structure further includes a second electrode over the resistance variable layer.
US09246083B2	Memory devices and methods of fabricating the same Memory devices and methods of fabricating the same include a substrate including a cell region and a peripheral circuit region, data storages on the cell region, first bit lines on and coupled to the data storages, first contacts coupled to peripheral transistors on the peripheral circuit region, and second bit lines on and coupled to the first contacts. The second bit lines may each have a lowermost surface lower than a lowermost surface of the data storages.
US09246082B2	Method of forming magnetic memory devices Provided is a method of forming a magnetic memory device. A first magnetic layer, a tunnel barrier, and a second magnetic layer are deposited on a substrate. The second magnetic layer, the tunnel barrier, and the first magnetic layer are etched to form magnetic tunnel junction structures. An ion beam etching process is performed using an oxygen-containing source gas to remove etching by-products on sidewalls of the magnetic tunnel junction structure and to oxidize the sidewalls of the magnetic tunnel junction structures.
US09246079B2	Piezoelectric thin-film resonator and method for producing piezoelectric thin film A piezoelectric thin-film resonator includes a piezoelectric thin film which includes aluminum nitride containing Sc and which has a concentration distribution such that the concentration of Sc is non-uniform in a thickness direction of the piezoelectric thin film; a first electrode; a second electrode facing the first electrode across the piezoelectric thin film; and a substrate supporting a piezoelectric vibrating section defined by the piezoelectric thin film and the first and second electrodes.
US09246074B2	Light emitting device A light emitting device includes a plurality of light emitting elements, a plurality of lead frames, and a package. The light emitting elements are mounted on the lead frames. The package is made of resin. The package has an opening. A part of the lead frames is embedded in an inner portion of the package and another part of the lead frames is exposed on a bottom surface of the opening. A resin bottom surface on which the resin is exposed is provided on the bottom surface of the opening of the package. The package includes a wall portion projecting from the bottom surface of the opening between the light emitting elements in the opening. The light emitting elements are connected by wire that straddles the wall portion.
US09246073B2	Mounting structure, and method of manufacturing mounting structure A mounting structure is provided that can allow gaseous matter generated when performing a heat treatment to escape to outside efficiently. A mounting structure 10 includes a substrate 1 having electrodes 2a and 2b, an electronic component 3 having electrodes 21a and 21b, joints 15a and 15b that electrically connect the electrodes 2a and 2b of the substrate 1 and the electrodes 21a and 21b of the electronic component 3 and also fix the electronic component 3 to the surface of the substrate 1, and a convex portion 4 that abuts against the electrode 2a of the substrate 1 and the electrode 21a of the electronic component 3 and is used as a spacer.
US09246072B2	LED mixing chamber with reflective walls formed in slots A relatively large substrate has a reflective surface, such as a diffusive white surface. LED dies, either as bare LED dies or packaged LED dies, are mounted to the substrate to form separate arrays of LEDs. Each array is intended for a separate mixing chamber. A layer of an encapsulant, such as silicone, is deposited over the substrate to encapsulate the LED dies. A laser etches through the encapsulant to form slots, and a reflective material, such as a white paint, is deposited in the slots to form reflective walls of each mixing chamber. If desired, a phosphor layer is deposited over the encapsulant and reflective walls. The substrate is then singulated to separate out the mixing chambers. Since no discrete parts are assembled, and multiple mixing chambers are formed simultaneously, the resulting mixing chambers are inexpensive and very reliable.
US09246070B2	Engineered-phosphor LED packages and related methods In accordance with certain embodiments, a phosphor element at least partially surrounding a light-emitting die is shaped to influence color-temperature divergence.
US09246068B2	Method and apparatus for fabricating phosphor-coated LED dies The present disclosure involves a method. The method includes providing a substrate having a layer disposed thereon. A plurality of light-emitting devices is attached to the layer. A gel is applied over the substrate. The gel covers the plurality of light-emitting devices. The gel is shaped into a plurality of lenses. The lenses each cover a respective one of the light-emitting devices. The light-emitting devices are separated from one another. The substrate and the layer are removed.
US09246066B1	Fluorescent composite resin substrate white light light emitting diode A fluorescent composite resin substrate white light LED includes a fluorescent composite resin substrate, two conductive brackets, a light emitting unit, two conductive lines and a package material. The fluorescent composite resin substrate is formed from a mixture through a curing reaction. Each of the conductive brackets is partially connected to the substrate. The light emitting unit is disposed on the substrate. The conductive lines are connected to the light emitting unit and respectively connected to the conductive brackets. The package material is formed from a mixture through a curing reaction. By fixing the light emitting unit at the fluorescent composite resin substrate, when applied to white light LED operations, the present invention achieves effects of emitting light through six planes, having high light flux and good heat dissipation, and significantly increasing production yield rate and speed without incurring different color temperatures at front and reverse sides.
US09246065B2	Semiconductor light emitting device and method for manufacturing semiconductor light emitting device According to one embodiment, a semiconductor light emitting device includes a light emitting section, a light transmitting section, a wavelength conversion section, a first conductive section, a second conductive section and a sealing section. The light emitting section includes a first major surface, a second major surface opposite from the first major surface, and a first electrode section and a second electrode section formed on the second major surface. The light transmitting section is provided on a side of the first major surface. The wavelength conversion section is provided over the light transmitting section. The wavelength conversion section is formed from a resin mixed with a phosphor, and hardness of the cured resin is set to exceed 10 in Shore D hardness.
US09246064B2	Apparatus for mounting optical member and method of manufacturing light emitting device There is provided a method of manufacturing a light emitting device including preparing a light source including a wavelength conversion unit and an optical member applied to the light source. Light is irradiated to the wavelength conversion unit to excite the wavelength conversion unit and positional information regarding the light source is obtained from light emitted from the wavelength conversion unit. A mounting position of the optical member is determined based on the obtained positional information regarding the light source. The method of manufacturing a light emitting device having excellent light characteristics can be obtained.
US09246059B2	LED element, and production method therefor Provided is an LED element which achieves high light extraction efficiency even at low operating voltages and which can be produced using a simple process. The LED element has a first semiconductor layer made of a p-type nitride semiconductor, a light-emitting layer made of a nitride semiconductor formed on the upper layer of the first semiconductor layer, a second semiconductor layer made of an n-type nitride semiconductor formed on the upper layer of the light-emitting layer, and a transparent electrode formed on the whole surface of the second semiconductor layer. The second semiconductor layer in at least a region that is in contact with the transparent electrode is made of AlnGa1-nN (0
US09246058B2	Light emitting device Disclosed are a light emitting device, a method of fabricating the light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer, an AlxInyGa1-x-yN layer (0
US09246051B2	Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and a plurality of hemispherical grained silicon (“HSG”) structures on the substrate surface of the substrate material. The solid state lighting device also includes a semiconductor material on the substrate material, at least a portion of which is between the plurality of HSG structures.
US09246049B2	Nitride-based semiconductor substrate and semiconductor device A nitride-based semiconductor substrate has a diameter of 25 mm or more, a thickness of 250 micrometers or more, a n-type carrier concentration of 1.2×1018 cm−3 or more and 3×1019 cm−3 or less, and a thermal conductivity of 1.2 W/cmK or more and 3.5 W/cmK or less. Alternatively, the substrate has an electron mobility μ [cm2/Vs] of more than a value represented by logeμ=17.7−0.288 logen and less than a value represented by logeμ=18.5−0.288 logen, where the substrate has a n-type carrier concentration n [cm−3] that is 1.2×1018 cm−3 or more and 3×1019 cm−3 or less.
US09246044B2	Photovoltaic cells having metal wrap through and improved passivation A photovoltaic device is disclosed. In one aspect, the device is formed in a semiconductor substrate. It has a radiation receiving front surface and a rear surface. The device may have a first region of one conductivity type, a second region with the opposite conductivity type adjacent to the front surface, and an antireflection layer. The rear surface is covered by a dielectric layer covering also an inside surface of the via. The front surface has current collecting conductive contacts. The rear surface has conductive contacts extending through the dielectric. A conductive path is in the via for photogenerated current from the front surface. By having the dielectric all over, no aligning and masking is needed. The same dielectric serves to insulate, provide thermal protection, and helps in surface and bulk passivation. It also avoids the need for a junction region near the via, hence reducing unwanted recombination currents.
US09246040B2	Thin film solar cell module and method for manufacturing the same A thin film solar cell module according to an embodiment of the invention includes a substrate, a plurality of solar cells each including a first electrode on the substrate, a second electrode on the first electrode, and a photoelectric conversion unit between the first electrode and the second electrode, a ribbon positioned on each of first and second outermost solar cells among the solar cells, and a conductive adhesive part positioned between the first outermost solar cell and the ribbon and between the second outermost solar cell and the ribbon. The conductive adhesive part positioned between the second electrode of the first outermost solar cell and the ribbon includes a first connector, which is electrically connected to the first electrode, the photoelectric conversion unit, and the second electrode of the first outermost solar cell.
US09246039B2	Solar cell with reduced absorber thickness and reduced back surface recombination Manufacture for an improved stacked-layered thin film solar cell. Solar cell has reduced absorber thickness and an improved back contact for Copper Indium Gallium Selenide solar cells. The back contact provides improved reflectance particularly for infrared wavelengths while still maintaining ohmic contact to the semiconductor absorber. This reflectance is achieved by producing a back contact having a highly reflecting metal separated from an absorbing layer with a dielectric layer.
US09246036B2	Thin film deposition A method of preparing a surface for deposition of a thin film thereon, wherein the surface including a plurality of protrusions extending therefrom and having shadowed regions, includes locally treating at least one of the protrusions.
US09246032B2	III-V photovoltaic elements Solar cell structures that have improved carrier collection efficiencies at a heterointerface are provided by low temperature epitaxial growth of silicon on a III-V base. Additionally, a solar cell structure having improved open circuit voltage includes a shallow junction III-V emitter formed by epitaxy or diffusion followed by the epitaxy of SixGe1−x passivated by amorphous SiyGe1−y:H.
US09246025B2	Back contact for photovoltaic devices such as copper-indium-diselenide solar cells A photovoltaic device (e.g., solar cell) includes: a front substrate (e.g., glass substrate); a semiconductor absorber film; a back contact including a first conductive layer of or including copper (Cu) and a second conductive layer of or including molybdenum (Mo); and a rear substrate (e.g., glass substrate). The first conductive layer of or including copper is located between at least the rear substrate and the second conductive layer of or including molybdenum, and wherein the semiconductor absorber film is located between at least the back contact and the front substrate.
US09246023B2	Optical receiver with fast recovery time A photoelectric receiver circuit for converting an optical signal to an electrical signal is presented. The receiver includes a photodetector connected between a transimpedance amplifier input and a high voltage supply providing a bias voltage to the photodetector. A high voltage supply variation sensing element is connected between the high voltage supply and a current controlled current source, where the current controlled source output is connected to the input of the transimpedance amplifier. A current limiter is connected between the high voltage supply and a high voltage source. The photocurrent passing through the current limiter lowers the high voltage supply and is detected by the sensing element. Current from the sensing element is processed at the input of the transimpedance amplifier to minimize the current into the transimpedance amplifier, limiting the saturation of the amplifier, thus improving recovery time when a high optical power pulse impinges the photodetector.
US09246020B2	Recessed termination structures and methods of fabricating electronic devices including recessed termination structures An electronic device includes a drift region, a Schottky contact on a surface of the drift region, and an edge termination structure in the drift region adjacent the Schottky contact. The edge termination structure includes a recessed region that is recessed from the surface of the drift region by a distance d that may be about 0.5 microns.
US09246017B2	MEMS-based dual and single proof-mass accelerometer methods and apparatus An integrated MEMS inertial sensor device includes one or more three-axis MEMS inertial sensor devices, such as accelerometers, with dual or single proof mass configurations. These designs can be compact and can decouple the motion of each axis to minimize the measurement errors due to cross-axis sensitivity. Some embodiments include a frame to decouple the motion of two axes and to provide geometric symmetry. Some embodiments also include double-folded springs. In a specific embodiment, the three axes of an integrated MEMS accelerometer device are entirely decoupled. Thus, the actuation of each axis, through a force due to acceleration, has little or substantially no effect on the other axes.
US09246013B2	IGZO devices with composite channel layers and methods for forming the same Embodiments described herein provide indium-gallium-zinc oxide (IGZO) devices, such as IGZO thin-film transistors (TFTs), and methods for forming such devices. A substrate is provided. A gate electrode is formed above the substrate. An IGZO channel layer is formed above the gate electrode. The IGZO channel layer has a first sub-layer including c-IGZO and a second sub-layer including a-IGZO. A source electrode and a drain electrode are formed above the IGZO channel layer.
US09246011B2	Semiconductor device A semiconductor device including a transistor having a reduced number of oxygen vacancies in a channel formation region of an oxide semiconductor with stable electrical characteristics or high reliability is provided. A gate insulating film is formed over a gate electrode; an oxide semiconductor layer is formed over the gate insulating film; an oxide layer is formed over the oxide semiconductor layer by a sputtering method to form an stacked-layer oxide film including the oxide semiconductor layer and the oxide layer; the stacked-layer oxide film is processed into a predetermined shape; a conductive film containing Ti as a main component is formed over the stacked-layer oxide film; the conductive film is etched to form source and drain electrodes and a depression portion on a back channel side; and portions of the stacked-layer oxide film in contact with the source and drain electrodes are changed to an n-type by heat treatment.
US09246008B2	Thin-film device, method of manufacturing the same, and method of manufacturing image display apparatus There is provided a method of manufacturing a thin-film device, the method including forming a first substrate on a supporting base by a coating method, the first substrate being formed by using a resin material; forming a second substrate on the first substrate by using any one of a thermosetting resin and energy ray-curable resin; forming an active element on the second substrate; and removing the supporting base from the first substrate. The resin material used to form the first substrate has a glass transition temperature of at least 180° C.
US09246007B2	Oxide thin film transistor and method for manufacturing the same, array substrate, and display apparatus Disclosed are an oxide thin film transistor (oxide-TFT) which can prevent H+ ions from invading into an active layer to maintain a stable characteristics of the TFT, a method for fabricating the oxide-TFT, an array substrate, and a display apparatus. The oxide-TFT comprises a substrate (200), and a gate electrode (201) and a gate insulating layer (202) sequentially disposed on the substrate. An active layer (203) is disposed on the gate insulating layer and is coated with a blocking layer, which at least comprises a first blocking layer (204) and a second blocking layer (205).
US09246004B2	Strained structures of semiconductor devices A strained structure of a semiconductor device is disclosed. An exemplary structure for a semiconductor device comprises a substrate comprising a major surface; a gate stack on the major surface of the substrate; a shallow trench isolation (STI) disposed on one side of the gate stack, wherein the STI is within the substrate; and a cavity filled with a strained structure distributed between the gate stack and the STI, wherein the cavity comprises one sidewall formed by the STI, one sidewall formed by the substrate, and a bottom surface formed by the substrate, wherein the strained structure comprises a SiGe layer and a first strained film adjoining the sidewall of the STI.
US09246002B2	Structure and method for semiconductor device A semiconductor device and a method of forming the same are disclosed. The semiconductor device includes a substrate, and a source region and a drain region formed in the substrate. The semiconductor device further includes an impurity diffusion stop layer formed in a recess of the substrate between the source region and the drain region, wherein the impurity diffusion stop layer covers bottom and sidewalls of the recess. The semiconductor device further includes a channel layer formed over the impurity diffusion stop layer and in the recess, and a gate stack formed over the channel layer. The impurity diffusion stop layer substantially prevents impurities of the substrate and the source and drain regions from diffusing into the channel layer.
US09246000B2	Insulated gate type semiconductor device and method for fabricating the same In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pillar which is constituted by both the gate-purpose conductive layer and a cap insulating film for capping an upper surface of the gate-purpose conductive layer is projected from the major surface of the semiconductor substrate; a side wall spacer is provided on a side wall of the projected portion of the gate pillar; and the source-purpose conductive layer is connected to a contact region of the major surface of the semiconductor substrate, which is defined by the side wall spacer.
US09245999B2	Semiconductor device A semiconductor device includes: a semiconductor substrate having a drift layer of a first conductivity type, a body layer of a second conductivity type formed on a surface of the drift layer, and a source layer formed on a portion of a surface of the body layer; a gate insulation film formed on an inner wall of a trench that extends from the surface of the semiconductor substrate through the source layer and the body layer to the drift layer; and a gate electrode housed in the trench and covered with the gate insulation film, the gate electrode including, in a region located at a drift layer side of a boundary between the body and drift layers, at least one first semiconductor layer of the first conductivity type and at least one second semiconductor layer of the second conductivity type that are alternately disposed and joined to each other.
US09245998B2	High voltage multiple channel LDMOS An integrated circuit and method having an LDMOS transistor with multiple current channels. A first current channel is above a buried p-type diffusion and a second one current channel is below the buried p-type diffusion.
US09245996B2	Lateral double-diffused metal-oxide-semiconudctor transistor device and layout pattern for LDMOS transistor device A LDMOS transistor device includes a substrate including a first insulating structure formed therein, a gate formed on the substrate and covering a portion of the first insulating structure, a drain region and a source region formed in the substrate at two respective sides of the gate, a base region encompassing the source region, and a doped layer formed under the base region. The drain region and the source region include a first conductivity type, the base region and the doped layer include a second conductivity type, and the second conductivity type is complementary to the first conductivity type. A top of the doped layer contacts a bottom of the base region. A width of the doped layer is larger than a width of the base region.
US09245993B2	Carbon doping semiconductor devices A method of fabricating a semiconductor device can include forming a III-N semiconductor layer in a reactor and injecting a hydrocarbon precursor into the reactor, thereby carbon doping the III-N semiconductor layer and causing the III-N semiconductor layer to be insulating or semi-insulating. A semiconductor device can include a substrate and a carbon doped insulating or semi-insulating III-N semiconductor layer on the substrate. The carbon doping density in the III-N semiconductor layer is greater than 5×1018 cm−3 and the dislocation density in the III-N semiconductor layer is less than 2×109 cm−2.
US09245991B2	Semiconductor device, high electron mobility transistor (HEMT) and method of manufacturing A semiconductor device includes a substrate, a channel layer over the substrate, an active layer over the channel layer, and a barrier structure between the substrate and the channel layer. The active layer is configured to cause a two dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer. The barrier structure is configured to block diffusion of at least one of a material of the substrate or a dopant toward the channel layer.
US09245990B2	Silicon-compatible germanium-based transistor with high-hole-mobility The present invention provides a silicon-compatible germanium-based high-hole-mobility transistor with high-hole-mobility germanium channel comprising a semiconductor material having a valence band offset instead of the conventional gate insulating film, a germanium channel region, and a quantum well formed by heterojunctions of the upper and lower portions of the germanium channel on a silicon substrate. Thus, the present invention enables to gain maximum hole mobility of the germanium channel by using the two-dimensional hole gas gathered into the quantum well for high-speed and low-power operations and device reliability improvement.
US09245982B2	Tilt implantation for forming FinFETs One embodiment of the instant disclosure provides a method for fabrication of fin devices for an integrated circuit, which comprises: forming a plurality of semiconductor fin structures, the fin structures including sidewalls and tops exposed from conformal masking; performing channel implantation at a tilt angle to form a doped region along the sidewalls and the tops of the fin structures, the fin structures being maintained at an elevated temperature during the channel implantation to prevent amorphization thereof during channel implantation; and forming at least one field effect transistor from the fin structures, the field effect transistor having a threshold voltage that is based on the channel implantation.
US09245975B2	Recessed channel insulated-gate field effect transistor with self-aligned gate and increased channel length A metal-oxide-semiconductor transistor (MOS) and method of fabricating the same, in which the effective channel length is increased relative to the width of the gate electrode. A dummy gate electrode overlying dummy gate dielectric material is formed at the surface of the structure, with self-aligned source/drain regions, and dielectric spacers on the sidewalls of the dummy gate structure. The dummy gate dielectric underlies the sidewall spacers. Following removal of the dummy gate electrode and the underlying dummy gate dielectric material, including from under the spacers, a silicon etch is performed to form a recess in the underlying substrate. This etch is self-limiting on the undercut sides, due to the crystal orientation, relative to the etch of the bottom of the recess. The gate dielectric and gate electrode material are then deposited into the remaining void, for example to form a high-k metal gate MOS transistor.
US09245964B2	Integrated circuitry comprising nonvolatile memory cells and methods of forming a nonvolatile memory cell An integrated circuit has a nonvolatile memory cell that includes a first electrode, a second electrode, and an ion conductive material there-between. At least one of the first and second electrodes has an electrochemically active surface received directly against the ion conductive material. The second electrode is elevationally outward of the first electrode. The first electrode extends laterally in a first direction and the ion conductive material extends in a second direction different from and intersecting the first direction. The first electrode is received directly against the ion conductive material only where the first and second directions intersect. Other embodiments, including method embodiments, are disclosed.
US09245963B2	Insulated gate semiconductor device structure In one embodiment, a vertical insulated-gate field effect transistor includes a shield electrode formed in trench structure within a semiconductor material. A gate electrode is isolated from the semiconductor material using gate insulating layers. Before the shield electrode is formed, spacer layers can be used form shield insulating layers along portions of the trench structure. The shield insulating layers are thicker than the gate insulating layers. In another embodiment, the shield insulating layers have variable thickness.
US09245961B1	Reducing source contact to gate spacing to decrease transistor pitch Methods and structures for transistors having reduced source contact to gate spacings in semiconductor devices are disclosed. In one embodiment, a method of forming a transistor can include: forming a gate over an active area of the transistor; forming source and drain regions aligned to the gate in the active area; forming source and drain contacts over the source and drain regions, where a spacing from the gate to the source contact of the transistor is less than a spacing from the gate to the drain contact of the transistor; and using one or more modified masks for forming doping profiles for the source region and the drain region.
US09245955B2	Embedded shape SiGe for strained channel transistors An integrated circuit die includes a silicon substrate. PMOS and NMOS transistors are formed on the silicon substrate. The carrier mobilities of the PMOS and NMOS transistors are increased by introducing tensile stress to the channel region of the NMOS transistors and compressive stress to the channel regions of the PMOS transistors. Tensile stress is introduced by including a region of SiGe below the channel region of the NMOS transistors. Compressive stress is introduced by including regions of SiGe in the source and drain regions of the PMOS transistors.
US09245948B2	Optoelectric device with semiconductor microwires or nanowires and method for manufacturing the same An optoelectric device including microwires or nanowires on a support, each microwire or nanowire including at least one portion mainly containing a III-V compound in contact with the support, wherein the III-V compound is based on a first group-V element and on a second group-III element, wherein a surface of the support includes first areas of a first material promoting the growth of the III-V compound according to the polarity of the first element distributed in a second area of a second material promoting the growth of the compound according to the polarity of the second element, the microwires or nanowires being located on the first areas.
US09245947B2	High electron mobility transistors and methods of manufacturing the same High electron mobility transistors (HEMTs) including a cavity below a drain and methods of manufacturing HEMTS including removing a portion of a substrate below a drain.
US09245939B2	Organic electroluminescence display panel and organic electroluminescence display apparatus An organic electroluminescence (EL) display panel includes a cathode electrode formed above a bank and formed opposite to a plurality of anode electrodes, and a charge functional layer commonly formed for each of the organic light-emitting layers across a plurality of aperture areas formed in the bank. A distance from the center of the display region to the end of the cathode electrode is shorter than a distance from the center of the display region to the end of the charge functional layer.
US09245938B2	Organic EL display device and method of manufacturing the same The present invention is a method of manufacturing an organic EL display device including a display part arranged with a plurality of pixels including an organic EL light emitting layer, and a terminal part arranged with a plurality of terminals each connected to the organic EL light emitting layer respectively, the method comprising forming a TFT drive circuit layer controlling the organic EL light emitting layer and forming the plurality of terminals connected to the TFT drive circuit layer on a first substrate; forming the organic EL light emitting layer connected to the TFT drive circuit layer over the TFT drive circuit layer; forming a sealing film over the organic EL light emitting layer; adhering a second substrate covering the display part in a position corresponding to the first substrate; forming a touch panel sensor substrate and an electrode layer over the second substrate; and exposing the plurality of terminals by etching a part of the sealing film.
US09245937B2	Thin film transistor substrates, display devices and methods of manufacturing display devices A thin film transistor substrate may include a gate electrode on a base substrate, a gate insulation layer covering the gate electrode on the base substrate, an active pattern on the gate insulation layer, an etch-stop layer pattern partially exposing the active pattern, a source electrode and a drain electrode in contact with a portion of the exposed active pattern, and an inorganic barrier layer on the source electrode, the drain electrode, and the etch-stop layer pattern. The active pattern may be superimposed over the gate electrode. The source electrode and the drain electrode may be superimposed over both ends of the gate electrode. The inorganic barrier layer may be in contact with a remaining portion of the exposed active pattern.
US09245932B2	Organic light emitting display panel and organic light emitting display device including the same Discussed is an organic light emitting display panel and an organic light emitting display device including the same. In the organic light emitting display panel, each of a plurality of unit pixels includes first to third driving transistors respectively connected to the first to third organic light emitting diodes, a first contact hole connected to one electrode of the first organic light emitting diode, a second contact hole connected to one electrode of the second organic light emitting diode, and a third contact hole connected to one electrode of the third organic light emitting diode, and are arranged in a matrix.
US09245929B2	Light-emitting component arrangement A light-emitting component arrangement may include at least one flexible printed circuit board, at least one light-emitting component coupled to the flexible printed circuit board, at least one electromechanical connecting part, wherein the connecting part is mechanically fixed to the flexible printed circuit board and is electrically coupled to the light-emitting component, and wherein the connecting part has an electromechanical connection for mechanically and electrically connecting a connecting element which is external to the printed circuit board.
US09245927B2	Semiconductor constructions, memory cells and memory arrays Some embodiments include a construction having oxygen-sensitive structures directly over spaced-apart nodes. Each oxygen-sensitive structure includes an angled plate having a horizontal portion along a top surface of a node and a non-horizontal portion extending upwardly from the horizontal portion. Each angled plate has an interior sidewall where an inside corner is formed between the non-horizontal portion and the horizontal portion, an exterior sidewall in opposing relation to the interior sidewall, and lateral edges. Bitlines are over the oxygen-sensitive structures, and have sidewalls extending upwardly from the lateral edges of the oxygen-sensitive structures. A non-oxygen-containing structure is along the interior sidewalls, along the exterior sidewalls, along the lateral edges, over the bitlines, and along the sidewalls of the bitlines. Some embodiments include memory arrays, and methods of forming memory cells.
US09245925B1	RRAM process with metal protection layer Metal oxide based memory devices and methods for manufacturing are described herein. A method for manufacturing a memory cell includes forming an insulation layer on an access device followed by forming vias through the insulation layer to expose the first and second access device terminals. First and second interlayer conductors extending through the vias are formed next. Top surfaces of the interlayer conductors are oxidized to form oxide layers. The oxide layer on the first interlayer conductor forms a memory layer. On top of the insulation layer a layer of protection metal is formed covering the oxide layers. The layer of protection metal is patterned and etched to form a top electrode layer covering the memory layer. The oxide layer on the second interlayer conductor is removed. Parallel first and second access lines are then formed on the top electrode layer and the second interlayer conductor, respectively.
US09245921B2	Semiconductor device including image pick up device The performance of a semiconductor device is improved by preventing 1/f noise from being generated in a peripheral transistor, in the case where the occupation area of photodiodes, which are included in each of a plurality of pixels that form an image pickup device, is expanded. In the semiconductor device, the gate electrode of an amplification transistor is formed by both a gate electrode part over an active region and a large width part that covers the boundary between the active region and an element isolation region and the active region near the boundary and that has a gate length larger than that of the gate electrode part.
US09245918B2	Solid-state imaging device, manufacturing method thereof, and camera with alternately arranged pixel combinations and shared floating diffusion A solid-state imaging device includes a semiconductor substrate; and a pixel unit having a plurality of pixels on the semiconductor substrate, wherein the pixel unit includes first pixel groups having two or more pixels and second pixel groups being different from the first pixel groups, wherein a portion of the pixels in the first pixel groups and a portion of the pixels in the second pixel groups share a floating diffusion element.
US09245916B2	Optical positioning sensor A sensor is disclosed that can include a light component in support of a first light source operable to direct a first beam of light, and a second light source operable to direct a second beam of light. The sensor can also include an imaging device positioned proximate the light component and operable to directly receive the first beam of light and the second beam of light and convert these into electric signals. The imaging device and the light component can be movable relative to one another. The sensor can further include a light location module configured to receive the electric signals and determine locations of the first beam of light and the second beam of light on the imaging device. In addition, the sensor can include a position module configured to determine a relative position of the imaging device and the light component based on the locations of the first beam of light and the second beam of light on the imaging device.
US09245907B2	Display device and electronic device A novel display device capable of excellent reflective display is provided. The display device includes a transistor including a gate electrode layer, a gate insulating layer over the gate electrode layer, a semiconductor layer over the gate insulating layer, and a source electrode layer and a drain electrode layer over the gate insulating layer and the semiconductor layer; a reflective electrode layer on the same plane as the source electrode layer and the drain electrode layer; a coloring layer overlapping with the reflective electrode layer; a pixel electrode layer overlapping with the coloring layer; and an anti-oxidation conductive layer connected to one of the source electrode layer and the drain electrode layer. The pixel electrode layer is connected to the transistor through the anti-oxidation conductive layer.
US09245906B2	Thin film transistor array panel A thin film transistor array panel includes: a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, and a data wire layer disposed on the substrate and including a data line intersecting the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode. In addition, at least one of the data line, the source electrode or the drain electrode of the data wire layer includes a barrier layer and a main wiring layer disposed on the barrier layer. The main wiring layer includes copper or a copper alloy. Also, the barrier layer includes a metal oxide, and the metal oxide includes zinc.
US09245904B2	Active matrix substrate and display device including the same The thickness of a rear surface-side inorganic film (9) formed from the same material as that of each of front surface-side inorganic films (11, 13, and 16) and provided at a rear surface side of a resin substrate (10) having a heat resistance is set in a predetermined range with respect to the total thickness of the front surface-side inorganic films (11, 13, and 16) so that the curvature diameter calculated based on the linear elastic modulus, the coefficient of linear expansion, and the thickness of the resin substrate (10); the linear elastic moduli, the coefficients of linear expansion, and the total thickness of the front surface-side inorganic films (11, 13, and 16); and the linear elastic modulus, the coefficient of linear expansion, and the thickness of the rear surface-side inorganic film (9) is 20 mm or more or −20 mm or less.
US09245900B2	Semiconductor device and manufacturing method of semiconductor device A semiconductor device of the present invention has a first insulating film formed between a control gate electrode and a semiconductor substrate and a second insulating film formed between a memory gate electrode and the semiconductor substrate and between the control gate electrode and the memory gate electrode, the second insulating film having a charge accumulating part therein. The second insulating film has a first film, a second film serving as a charge accumulating part disposed on the first film, and a third film disposed on the second film. The third film has a sidewall film positioned between the control gate electrode and the memory gate electrode and a deposited film positioned between the memory gate electrode and the semiconductor substrate. In this structure, the distance at a corner part of the second insulating film can be increased, and electric-field concentration can be reduced.
US09245899B2	Semiconductor devices and methods of fabricating the same A semiconductor device includes a lower insulating pattern on a semiconductor substrate, a lower gate pattern on the lower insulating pattern and formed of a doped polysilicon layer, a residual insulating pattern with an opening exposing a portion of a top surface of the lower gate pattern, an upper gate pattern on the residual insulating pattern, the upper gate pattern filling the opening, and a diffusion barrier pattern in contact with the portion of the top surface of the lower gate pattern and extending between the residual insulating pattern and the upper gate pattern.
US09245896B2	Junction field-effect floating gate quantum dot memory switch A dense binary memory switch device combines the function of a pass transistor and a memory cell and has low programming and operation voltages. The device includes a charge storage region coupled to a gate electrode through a gate dielectric layer and to a channel region through another dielectric layer. The charge storage region is charged by carriers injected from injection regions that are in direct contact with the charge storage region. Fabrication of the device at low temperatures compatible with back-end-of-line processing is further disclosed.
US09245895B2	Oro and orpro with bit line trench to suppress transport program disturb Memory devices having improved TPD characteristics and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line openings containing a bit line dielectric between the memory cells. The memory cell contains a charge storage layer and a first poly gate. The bit line opening extends into the semiconductor substrate. By containing the bit line dielectric in the bit line openings that extend into the semiconductor substrate, the memory device can improve the electrical isolation between memory cells, thereby preventing and/or mitigating TPD.
US09245891B2	Display device including at least six transistors By applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an AC pulse. A shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. In other words, a structure for applying an AC pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (VDD) is applied, is included.
US09245889B2	Method for manufacturing semiconductor device and semiconductor device A semiconductor device includes a first and second fin-shaped semiconductor layers on a substrate, which correspond to the dimensions of a sidewall pattern around a dummy pattern. A first insulating film is around the first and second fin-shaped layers. A first and second pillar-shaped semiconductor layers reside on the first and second fin-shaped layers, respectively. N-type and P-type diffusion layers are in upper portions of the first and second fin-shaped layers, respectively, and in upper and lower portions of the first and second pillar-shaped layers, respectively. First and second gate insulating films and first and second metal gate electrodes reside around the first and second pillar-shaped layers, respectively. A metal gate line is connected to the first and second metal gate electrodes and extends in a direction perpendicular to the first and second fin-shaped layers.
US09245888B2	Reverse polarity protection for n-substrate high-side switches A semiconductor device is disclosed. In accordance with a first aspect of the present invention the device includes a semiconductor chip having a substrate, a first supply terminal electrically coupled to the substrate to provide a first supply potential (VS) and a load current to the substrate, and a second supply terminal operably provided with a second supply potential. A first vertical transistor is integrated in the semiconductor chip and electrically coupled between the supply terminal and an output terminal. The first vertical transistor is configured to provide a current path for the load current to the output terminal in accordance with a control signal, which is provided to a gate electrode of the first vertical transistor.
US09245886B2	Switch supporting voltages greater than supply Devices for isolating an input from an output are disclosed. For example, a device includes a first p-type metal oxide semiconductor transistor and a first circuit. A source of the first p-type metal oxide semiconductor transistor is connected to an input of the device. The first circuit is for delivering a signal on the input of the device to a gate of the first p-type metal oxide semiconductor transistor when an enable signal is deactivated and for delivering a ground voltage to the gate of the first p-type metal oxide semiconductor transistor when the enable signal is activated.
US09245884B1	Structure for metal oxide semiconductor capacitor A design structure for a semiconductor structure is disclosed. The semiconductor structure can include a substrate, a set of semiconductor fins positioned on the substrate and positioned approximately parallel lengthwise to one another, a first gate layer and a second gate layer deposited on the substrate and on the set of semiconductor fins approximately perpendicular lengthwise to the set of semiconductor fins. The semiconductor structure can include an interconnect layer deposited on the substrate and on the set of semiconductor fins approximately perpendicular lengthwise to the set of semiconductor fins. The interconnect layer can be positioned between the first gate layer and the second gate layer at a first interconnect distance from the first gate layer and a second interconnect distance from the second gate layer.
US09245882B2	FinFETs with gradient germanium-containing channels A method includes forming a semiconductor fin, forming a dummy gate on a top surface and sidewalls of the semiconductor fin, and removing the dummy gate to form a recess. The semiconductor fin is exposed to the recess. After the dummy gate is removed, an oxidation is performed on the semiconductor fin to form a condensed germanium-containing fin in the recess, and a silicon oxide layer on a top surface and sidewalls of the condensed germanium-containing fin. The method further includes forming a gate dielectric over the condensed germanium-containing fin, and forming a gate electrode over the gate dielectric.
US09245878B2	Bidirectional dual-SCR circuit for ESD protection An ESD protection circuit includes at least a first and a second silicon controlled rectifier (SCR) circuits. The first SCR circuit is coupled between the pad and the positive power supply terminal. The second SCR circuit is coupled between the pad and the ground terminal. At least one of the SCR circuits is configured to selectively provide a short or relatively conductive electrical path between the pad and one of the positive power supply terminal and the ground terminal.
US09245876B2	Light emitting diode assembly, backlight module, liquid crystal display and illumination device The present disclosure relates to the technical field of light emission of an LED and discloses a light emitting diode assembly, a backlight module, a liquid crystal display and an illumination device. The LED assembly comprises a lamp base and at least one pair of LED dies. The lamp base has a mounting groove. A pair of the LED dies are mounted at a bottom surface of the mounting groove, and two LED dies in the pair of LED dies are disposed symmetrically about an axis of the mounting groove. Among angles formed by intersection of planes where light exit surfaces of the two LED dies lie, an angle facing the bottom surface of the mounting groove is greater than 0 degree and less than 180 degrees. The light emitting diode assembly has a larger light exit angle and exhibits a simple structure.
US09245873B2	Light emitting device There is presented a light emitting device, having plural light emitting elements disposed on a substrate, in which a protection element, such as a zener diode, can be disposed at an appropriate position. The light emitting device includes: a substrate; a light emitting section having plural light emitting elements disposed in a mounting area on the substrate; a positive electrode and negative electrode each having a pad section and wiring section to apply voltage to the light emitting section through the wiring sections; a protection element disposed at one of the positive electrode and negative electrode and electrically connected with the other one electrode; and a light reflecting resin formed on the substrate such as to cover at least the wiring sections and the protection element, wherein the wiring sections are formed along the periphery of the mounting area such that one end portions thereof are adjacent to each other.
US09245872B2	Flip-chip package structure and method for an integrated switching power supply Disclosed are flip-chip package structures and methods for an integrated switching power supply. In one embodiment, a flip-chip package structure can include: (i) a die with an integrated switching power supply, where a first surface of the die includes first bumps with different polarities; (ii) a redistribution layer including redistribution layer units, each having a first surface to connect bumps with a same polarity from the first bumps, the redistribution layer having a second surface including second bumps to redistribute polarities; (iii) a lead frame having pins, where a first surface of the lead frame can connect bumps with a same polarity from the second bumps; and (iv) a flip-chip package configured to package the die, the redistribution layer, the first and second bumps, and the lead frame, where a second surface of the lead frame provides electrical connectivity between the integrated switching power supply and a PCB.
US09245865B1	Integrated circuit package with multi-trench structure on flipped substrate contacting underfill In an example, an integrated circuit (IC) package includes a package substrate, an IC die, solder bumps, a first plurality of trenches, and underfill material. The IC die includes a front surface and a back surface, the front surface facing the package substrate and including a conductive interface. The solder bumps couple the conductive interface to the package substrate. The first plurality of trenches includes at least one trench proximate each corner of the IC die formed in the front surface of the IC die in an area between the conductive interface and a perimeter of the IC die. The underfill material is disposed between the front surface of the IC die and the package substrate, the underfill material being in contact with the first plurality of trenches.
US09245863B2	Semiconductor packaging apparatus formed from semiconductor package including first and second solder balls having different heights According to example embodiments of inventive concepts, a semiconductor package apparatus includes a first semiconductor package including a first substrate, a first solder resist layer on the first substrate, and a first sealing member that covers and protects the first solder resist layer, and a plurality of solder balls on the first substrate. The plurality of solder balls includes a first solder ball having a first height and a second solder ball having a second height that is different from the first height. The first sealing member includes holes that expose the solder balls.
US09245862B1	Electronic component package fabrication method and structure An electronic component structure includes a primary redistribution structure having a primary redistribution structure terminal. A secondary redistribution structure is formed on the primary redistribution structure terminal. A buildup dielectric layer encloses the primary redistribution structure, where a cushion pad of the secondary redistribution structure is supported by the buildup dielectric layer. An interconnection ball is mounted to the secondary redistribution structure. Stress imparted upon the interconnection ball is transferred through the secondary redistribution structure and dissipated to the buildup dielectric layer through the cushion pad. The buildup dielectric layer is readily able to absorb this stress thus minimizing the probability of failure of the secondary redistribution structure including the interconnection ball formed thereon.
US09245853B2	Memory module According to one embodiment, a memory module includes a substrate, a semiconductor memory device, a plate-form conductive member, wire, and a mold member. The substrate includes a ground terminal to which a ground potential is applied. The semiconductor memory device is provided on the substrate. The plate-form conductive member is provided on the semiconductor memory device. The wire that electrically connects the ground terminal to the plate-form conductive member. The mold member seals the semiconductor memory device on the substrate, the plate-form conductive member and the wire.
US09245852B2	ESD protection for 2.5D/3D integrated circuit systems An integrated circuit structure includes first and second integrated circuit devices disposed on a interposer. Each integrated circuit device has electrostatic discharge (ESD) protection circuitry therein connected to an internal ESD bus. The first and second integrated circuit devices communicate with one another through the interposer. The interposer includes an ESD bus electrically connected to the ESD busses of the first and second integrated circuit devices for providing cross-device ESD protection for the integrated circuit devices.
US09245848B2	Methods for coating a substrate with an amphiphilic compound Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.
US09245846B2	Chip with programmable shelf life A method includes forming a first interconnect structure and a second interconnect structure each located within an interlevel dielectric (ILD). A first top metal layer and a second top metal layer are formed disposed on and in direct electrical connection with the first interconnect. Similarly, a third top metal layer and a fourth top metal layer are formed disposed on and in direct electrical connection with the second interconnect. A silicon layer is deposited above the first, second, third and fourth top metal layers in direct contact with the first and fourth top metal layers and separated from each of the second and third top metal layers by a barrier layer. The silicon layer is exposed to an oxygen-containing environment to form a silicon dioxide layer.
US09245843B2	Semiconductor device with internal substrate contact and method of production The semiconductor device comprises a substrate (1) of semiconductor material, a contact hole (2) reaching from a surface (10) into the substrate, and a contact metallization (12) arranged in the contact hole, so that the contact metallization forms an internal substrate contact (4) on the semiconductor material at least in a bottom area (40) of the contact hole.
US09245842B2	Semiconductor devices having guard ring structure and methods of manufacture thereof Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a first functional region of an integrated circuit over a workpiece, and forming a second functional region of the integrated circuit over the workpiece. The method includes forming a guard ring around the first functional region of the integrated circuit. The guard ring is formed in a material layer disposed over the first functional region and the second functional region.
US09245839B2	Nonvolatile memory device and method for fabricating the same A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
US09245838B2	Semiconductor element A multilayer device has a resin layer, a semiconductor device positioned in the resin layer and including an electronic component and a passivation layer having an opening exposing an electrode of the electronic component, an intermediate layer including metal layers and formed in the opening of the passivation layer such that the intermediate layer is connected to the electrode of the electronic component, and a buildup layer formed on the resin layer and including an insulating layer and a via conductor formed in the insulating layer such that the via conductor is connected to the intermediate layer. The resin layer includes one or more resin material selected from the group consisting of a thermosetting resin material and a thermoplastic resin material.
US09245837B1	Radio frequency power device An electronic RF power device includes a transistor chip, a device input terminal and a device output terminal. Further, the electronic RF power device includes an output impedance transformation circuit, an output contact clip bonded to the transistor chip and to the output device terminal and at least one bond wire bonded to the output impedance transformation circuit and to the transistor chip.
US09245835B1	Integrated circuit package with reduced pad capacitance An integrated circuit package having a package substrate, an integrated circuit, and at least one solder ball is provided. The package substrate has first and second surfaces. The integrated circuit may be mounted on the first surface of the package substrate. The solder ball may be coupled to the second surface of the package substrate. The package substrate may include a substrate layer. The substrate layer may include a ground plane with an opening. The opening may be formed just above the solder ball. In one instance, the diameter of the opening is greater than the diameter of the solder ball pad.
US09245833B2	Metal pads with openings in integrated circuits A device includes a metal pad, and a passivation layer including portions overlapping edge portions of the metal pad. A Post-Passivation-Interconnect (PPI) includes a trace portion overlying the passivation layer, and a pad portion connected to the trace portion. A polymer layer includes an upper portion over the PPI, and a plug portion extending into, and encircled by, the pad portion of the PPI.
US09245832B2	Semiconductor module A semiconductor module includes: a metal block; an insulation layer for heat radiation formed by directly depositing a ceramic material on at least a first surface of the metal block; an insulation layer for a relay electrode formed by directly depositing a ceramic material on a part of a second surface 1b of the metal block; a relay electrode formed by depositing a metal material on the upper surface of the insulation layer for the relay electrode; a circuit element bonded with the second surface of the metal block by solder; and an external lead terminal, wherein a bonding wire or a lead frame from the circuit element is bonded with the relay electrode, and the relay electrode and the external lead terminal are connected.
US09245826B2	Anchor vias for improved backside metal adhesion to semiconductor substrate Disclosed is a structure having anchor vias for improved backside metal adhesion and an associated method for the structure's fabrication. The structure includes at least one anchor via disposed in at least one corner of a semiconductor substrate. A metal filler may be formed within the at least one anchor via, the metal filler having a protruding portion extending from a backside of the semiconductor substrate. The structure may further include a backside metal layer on a bottom surface of the semiconductor substrate, the backside metal layer being bonded to the protruding portion of the metal filler in the at least one anchor via. The at least one anchor via may include a cluster of anchor vias, a plurality of anchor vias disposed in a straight line and/or in a staggered configuration along a periphery of the semiconductor substrate.
US09245825B2	I/O pin capacitance reduction using TSVS Methods for reducing pin capacitance and improving off-chip driver performance by using TSVs to enable usage of off-chip drivers located within selected and unselected die of a plurality of stacked die are described. A reduction in pin capacitance allows for faster switching times and/or lower power operation. In some embodiments, a TSV may connect an internal node (e.g., the output of a pre-driver) within a selected die of a plurality of stacked die with the input of an off-chip driver within an unselected die of the plurality of stacked die. In some cases, only a single die within a die stack may be selected (or enabled) at a given time. Using a TSV to connect internal nodes associated with off-chip drivers located within both selected and unselected die of the die stack allows for reduced off-chip driver sizing and thus reduced pin capacitance.
US09245824B2	Through-vias for wiring layers of semiconductor devices Through-via structures and methods of their formation are disclosed. In one such method, a first etch through at least a first dielectric material of a wiring layer is performed such that a first hole outlining a collar structure for the through-via is formed. In addition, a stress-abating dielectric material is deposited in the hole such that the stress-abating dielectric material is disposed at least laterally from the first dielectric material. Further, a second etching through at least a semiconductor material of a semiconductor layer that is disposed below the wiring layer is performed, where the second etching forms a via hole in the semiconductor material. Additionally, at least a portion of the via hole is filled with conductive material to form the through-via such that the stress-abating dielectric material, at least in the wiring layer, provides a buffer between the conductive material and the first dielectric material.
US09245823B2	Imaging device, imaging apparatus, production apparatus and method, and semiconductor device There is provided an imaging device including a semiconductor having a light-receiving portion that performs photoelectric conversion of incident light, electrically conductive wirings, and a contact group including contacts that have different sizes and connect the semiconductor and the electrically conductive wirings.
US09245820B2	Liquid DIMM cooling device A liquid cooling device comprises a heat spreader disposed along a plurality of memory modules on a dual in-line memory module (DIMM), a cold rail block extending along the heat spreader and a compressible thermal adapter interleaved between the cold rail block and the memory modules. The thermal adapter is compressible in a direction perpendicular to the plane of the DIMM board, thus allowing the components of the cooling device to be moved and adjusted relative to each other in a direction perpendicular to the plane of the DIMM. In a preferred embodiment, matching smooth surfaces of adjacent components within the cooling device are collated with a lubricant, thus permitting a low-friction gliding of these components relative to each other and allowing the DIMM to be easily removed from the cooling device and to be replaced without effort and without tooling.
US09245814B2	Substrate assembly, method of manufacturing substrate assembly and method of manufacturing chip package A substrate assembly including a photosensitive etching glass substrate; and a first substrate and a second substrate for interposing both main surfaces of the photosensitive etching glass substrate between them. One of the main surfaces of the photosensitive etching glass substrate is thermally bonded to the first substrate, and the other main surface of the photosensitive etching glass substrate is bonded to the second substrate. When a thermal expansion coefficient of the photosensitive etching glass substrate is defined as C0, and a thermal expansion coefficient of the first substrate is defined as C1, and a thermal expansion coefficient of the second substrate is defined as C2, C1/C2 satisfies a relation of 0.7 or more and 1.3 or less, and at least one of a relation of C0/C1 satisfying less than 0.7 or larger than 1.3, and a relation of C0/C2 satisfying less than 0.7 or larger than 1.3 is satisfied.
US09245808B2	Method and system for in-line real-time measurements of layers of multilayered front contacts of photovoltaic devices and calculation of opto-electronic properties and layer thicknesses thereof A method and system for real-time, in-line calculations of opto-electronic properties and thickness of the layers of multi-layered transparent conductive oxide stacks of photovoltaic devices is provided. The method and system include taking measurements of each layer of the stack during deposition thereof. The measurements are then used to calculate the opto-electronic properties and thicknesses of the layers in real-time.
US09245804B2	Using a double-cut for mechanical protection of a wafer-level chip scale package (WLCSP) Consistent with an example embodiment, there is a semiconductor device, with an active device having a front-side surface and a backside surface; the semiconductor device of an overall thickness, comprises an active device with circuitry defined on the front-side surface, the front-side surface having an area. The back-side of the active device has recesses f a partial depth of the active device thickness and a width of about the partial depth, the recesses surrounding the active device at vertical edges. There is a protective layer of a thickness on to the backside surface of the active device, the protective material having an area greater than the first area and having a stand-off distance. The vertical edges have the protective layer filling the recesses flush with the vertical edges. A stand-off distance of the protective material is a function of the semiconductor device thickness and the tangent of an angle (θ) of tooling impact upon a vertical face the semiconductor device.
US09245799B2	Semiconductor device and method of manufacturing thereof A semiconductor device includes a substrate having a top surface. A semiconductor circuit defines a circuit area on the top surface of the substrate. An interconnect is spaced apart from the circuit area and extends from the top surface into the substrate. The interconnect includes a sidewall formed of an electrically insulating material. An opening is provided in the sidewall.
US09245798B2	Semiconductor reflow processing for high aspect ratio fill A method for at least partially filling a feature on a workpiece includes obtaining a workpiece including a feature having a high aspect ratio in the range of about 10 to about 80, depositing a first conformal conductive layer in the feature, and thermally treating the workpiece to reflow the first conformal conductive layer in the feature.
US09245797B2	Opening fill process and structure formed thereby Methods of forming conductive structures and the conductive structures are disclosed. A method includes forming an opening in a dielectric layer over a substrate, performing a cleaning process on the dielectric layer with the opening, forming a nucleation layer in the opening, etching the nucleation layer in the opening, and forming a conductive material in the opening and on the nucleation layer after the etching. An upper portion of the opening is distal from the substrate, and a lower portion of the opening is proximate the substrate. After the etching, a thickness of an upper portion of the nucleation layer in the upper portion of the opening is less than a thickness of a lower portion of the nucleation layer in the lower portion of the opening.
US09245796B1	Methods of fabricating interconnection structures A method of fabricating an interconnection structure according to an embodiment of the present invention, includes patterning a dielectric layer to form a first recession region, including a first nest-shaped recession region having a first width and a first line-shaped recession region having a second width, which is less than the first width. A guide spacer layer is formed on sidewalls of the first recession region to provide a second recession region including a second nest-shaped recession region in the first nest-shaped recession region. A self-assembling block copolymer material is formed to fill the second nest-shaped recession region. The self-assembling block copolymer material is annealed to form a polymer block domain and a polymer block matrix, surrounding the polymer block domain. The polymer block domain is removed to expose a portion of the dielectric layer. The exposed portion of the dielectric layer is etched to form a via cavity.
US09245792B2	Method for forming interconnect structures Methods of fabricating interconnect structures in a semiconductor integrated circuit (IC) are presented. A preferred embodiment comprises forming interconnect lines and vias through a dual-damascenes process. It includes forming a via dielectric layer, an etch stop layer directly over the via dielectric layer, and a trench dielectric layer over the etch stop layer. The etch stop layer is patterned through a first photolithography and etch process to form openings in the etch stop layer, prior to the formation of the trench dielectric layer. A second photolithography and etch process is performed after formation of the trench dielectric layer to create trench openings in the trench dielectric layer and via openings in the via dielectric layer, where the patterned etch stop layer acts as a hard-mask in forming vias in the via dielectric layer.
US09245791B2	Method for fabricating a contact A contact structure includes a permanent antireflection coating formed on a substrate having contact pads. A patterned dielectric layer is formed on the antireflective coating. The patterned dielectric layer and the permanent antireflective coating form openings. The openings correspond with locations of the contact pads. Contact structures are formed in the openings to make electrical contact with the contacts pads such that the patterned dielectric layer and the permanent antireflective coating each have a conductively filled region forming the contact structures.
US09245789B2	Method for forming wiring The present invention addresses the problem of inhibiting the evolution of a poisoning gas to eliminate wiring-pattern resolution failures and thereby forming a desired wiring layer structure to provide functional elements having an improved property yield. This method for forming multi-layered copper interconnect on a semiconductor substrate comprises: forming a multilayer resist structure to form a given resist pattern on a substrate including an interlayer dielectric film that has via holes which have been formed in part thereof and filled with an SOC layer, the multilayer resist structure comprising an SOC layer, an SOG layer, an SiO2 layer, and a chemical amplification type resist superposed in this order from the substrate side; conducting etching using the resist pattern as a mask to form a pattern for a wiring layer and via plugs; and forming the wiring layer and the via plugs in the pattern.
US09245784B2	Substrate retaining device with push back portion A substrate retaining device comprising: a support mechanism configured to change a pitch at which a plurality of substrate retaining units are arranged, urging mechanisms provided for the respective substrate retaining units and configured to urge the movable units to cause movable retaining members to press-hold substrates, and a push back mechanism configured to release the press-holding of the substrates by the movable retaining members. A push back portion of the push back mechanism is positioned at a standby position, at which the push back portion makes no contact with the movable units.
US09245783B2	Vacuum robot with linear translation carriage A robot for use in vacuum chambers is disclosed. The robot may be mounted within an oblong transfer chamber and may be translated within the transfer chamber by an umbilical arm operating in conjunction with a linear motion guide and carriage. Motors or drive systems for the robot may be housed in atmospheric conditions, and the transfer chamber may be kept at a vacuum. The robot may include one or more arms configured for wafer handling. The robot may include one or more motors or drive systems and a multi-axial seal to realize independent extension/retraction of each arm and overall simultaneous rotation of the arm assembly.
US09245780B2	Vacuum processing apparatus and operating method of the same A vacuum processing apparatus includes a row of containers of vacuum transfer chambers connected to each other behind a lock chamber, a wafer being transferred through depressurized inside of the row of the containers of the vacuum transfer containers, an intermediate chamber disposed between the containers of the vacuum transfer chambers, a plurality of processing units including processing containers respectively connected to left or right side walls of the containers of the vacuum transfer chambers and the wafer is processed therein, and a bypass chamber which constitutes a bypass path connecting the processing units, where only either the wafer which is being transferred from the lock chamber toward one of the processing units or the wafer which was processed in one of the processing units and is being transferred toward the lock chamber is transferred through the containers of the vacuum transfer chambers.
US09245777B2	Apparatus for liquid treatment of wafer shaped articles and heating system for use in such apparatus An apparatus for treating a disc-shaped article comprises a spin chuck and at least three individually controllable infrared heating elements. The infrared heating elements are mounted in a stationary manner with respect to rotation of said spin chuck. At least the transparent plate positioned between the infrared heating elements and the underside of a wafer is mounted for rotation with the spin chuck. Alternatively, the transparent plate is part of a housing that encloses the infrared heating elements and that rotates with the spin chuck as the heating elements are stationary relative thereto.
US09245772B2	Stackable package by using internal stacking modules A semiconductor package comprises a substrate, a first semiconductor die mounted to the substrate, and a first double side mold (DSM) internal stackable module (ISM) bonded directly to the first semiconductor die through a first adhesive. The first DSM ISM includes a first molding compound, and a second semiconductor die disposed in the first molding compound. The semiconductor package further comprises a first electrical connection coupled between the first semiconductor die and the substrate, and a second electrical connection coupled between the first DSM ISM and the substrate.
US09245770B2	Semiconductor device and method of simultaneous molding and thermalcompression bonding A semiconductor device has a semiconductor die disposed over a substrate. The semiconductor die and substrate are placed in a chase mold. An encapsulant is deposited over and between the semiconductor die and substrate simultaneous with bonding the semiconductor die to the substrate in the chase mold. The semiconductor die is bonded to the substrate using thermocompression by application of force and elevated temperature. An electrical interconnect structure, such as a bump, pillar bump, or stud bump, is formed over the semiconductor die. A flux material is deposited over the interconnect structure. A solder paste or SOP is deposited over a conductive layer of the substrate. The flux material and SOP provide temporary bond between the semiconductor die and substrate. The interconnect structure is bonded to the SOP. Alternatively, the interconnect structure can be bonded directly to the conductive layer of the substrate, with or without the flux material.
US09245769B2	Directional SiO2 etch using plasma pre-treatment and high-temperature etchant deposition Methods for processing a substrate are described herein. Methods can include positioning a substrate with an exposed surface comprising a silicon oxide layer in a processing chamber, biasing the substrate, treating the substrate to roughen a portion of the silicon oxide layer, heating the substrate to a first temperature, exposing the exposed surface of the substrate to ammonium fluoride to form one or more volatile products while maintaining the first temperature, and heating the substrate to a second temperature, which is higher than the first temperature, to sublimate the volatile products.
US09245767B2	Anneal module for semiconductor wafers An anneal module for annealing semiconductor material wafers and similar substrates reduces particle contamination and oxygen ingress while providing uniform heating including for 500° C. processes. The anneal module may include a process chamber formed in a metal body having internal cooling lines. A hot plate has a pedestal supported on a thermal choke on the body. A gas distributor in the lid over the hot plate flows gas uniformly over the wafer. A transfer mechanism moves a hoop to shift the wafer between the hot plate and a cold plate.
US09245766B2	Memory circuit structure and semiconductor process for manufacturing the same A semiconductor process for manufacturing particular patterns includes the steps of forming a target layer and evenly-spaced core bodies on a substrate, conformally forming a hard mask layer, forming a first photoresist covering a predetermined region on the hard mask layer wherein the predetermined region encompasses at least two core bodies, performing a first etch process to remove a portion of the hard mask layer outside the predetermined region and expose a number of core bodies, removing the exposed core bodies, forming a second photoresist at least encompassing all the recesses in the predetermined region, and performing a second etch process to pattern the target layer.
US09245765B2	Apparatus and method of applying a film to a semiconductor wafer and method of processing a semiconductor wafer Implementations and techniques for applying a film to a semiconductor wafer and for processing a semiconductor wafer are generally disclosed.
US09245756B2	Semiconductor device and method for fabricating the same A method for fabricating a semiconductor device includes: implanting a first species into a substrate at a cold temperature to form a first region; and implanting a second species into the substrate at a hot temperature to form a second region that is adjacent to the first region.
US09245755B2	Deep collector vertical bipolar transistor with enhanced gain An integrated circuit and method having a deep collector vertical bipolar transistor with a first base tuning diffusion. A MOS transistor has a second base tuning diffusion. The first base tuning diffusion and the second base tuning diffusion are formed using the same implant.
US09245754B2	Simplified charge balance in a semiconductor device A method of forming a charge balance region in an active semiconductor device includes: forming an epitaxial region including material of a first conductivity type on an upper surface of a substrate of the semiconductor device; forming multiple recessed features at least partially through the epitaxial region; depositing a film comprising material of a second conductivity type on a bottom and/or sidewalls of the recessed features using atomic layer deposition; and performing thermal processing such that at least a portion of the film deposited on the bottom and/or sidewalls of each of the recessed features forms a region of the second conductivity type in the epitaxial layer which follows a contour of the recessed features, the region of the second conductivity type, in conjunction with the epitaxial layer proximate the region of the second conductivity type, forming the charge balance region.
US09245752B2	Method for etching atomic layer of graphene This present disclosure relates to an atomic layer etching method for graphene, including adsorbing reactive radicals onto a surface of the graphene and irradiating an energy source to the graphene on which the reactive radicals are adsorbed.
US09245750B2	Nanowire devices A method of forming nanowire devices. The method includes forming a stressor layer circumferentially surrounding a semiconductor nanowire. The method is performed such that, due to the stressor layer, the nanowire is subjected to at least one of radial and longitudinal strain to enhance carrier mobility in the nanowire. Radial and longitudinal strain components can be used separately or together and can each be made tensile or compressive, allowing formulation of desired strain characteristics for enhanced conductivity in the nanowire of a given device.
US09245747B2	Engineered base substrates for releasing III-V epitaxy through spalling A method for releasing a semiconductor layer with a reduced active area from a base substrate is provided. A patterned release layer is first formed between a semiconductor layer comprised of an III-V compound semiconductor material and formed by a lateral epitaxial overgrowth technique and a base substrate. The patterned release layer is in contact with a Group III nitride surface. The patterned release layer is composed of a material having a lower fracture toughness than that of the III-V compound semiconductor material and that of the base substrate so that a crack will initiate in the pattern release layer during the controlled spalling process. The semiconductor layer is released from the underlying base substrate along a spalling plane located at a portion of the semiconductor layer enclosing the patterned release layer and the base substrate.
US09245743B2	Methods for forming high-k dielectrics containing hafnium and zirconium using atomic layer deposition Embodiments provided herein describe high-k dielectric layers and methods for forming high-k dielectric layers. A substrate is provided. The substrate includes a semiconductor material. The substrate is exposed to a hafnium precursor. The substrate is exposed to a zirconium precursor. The substrate is exposed to an oxidant only after the exposing of the substrate to the hafnium precursor and the exposing of the substrate to the zirconium precursor. The exposing of the substrate to the hafnium precursor, the exposing of the substrate to the zirconium precursor, and the exposing of the substrate to the oxidant causes a layer to be formed over the substrate. The layer includes hafnium, zirconium, and oxygen.
US09245737B2	Liquid treatment apparatus and liquid treatment method The liquid treatment apparatus according to the present invention includes a substrate holder configured to horizontally hold a substrate, and a top plate configured to be rotatable and to cover the substrate held by the substrate holder from above so as to define a treatment space. In the treatment space, a chemical liquid is supplied by a chemical liquid nozzle onto the substrate, and an atmosphere replacement gas is supplied by a replacement nozzle into the treatment space. The replacement nozzle is supported by a replacement nozzle support arm configured to be horizontally moved between an advanced position at which the replacement nozzle support arm is advanced into the treatment space and a retracted position at which the replacement nozzle support arm is retracted outside from the treatment space. The replacement nozzle is configured to discharge, above the substrate, the atmosphere replacement gas upward.
US09245734B2	Fast start induction RF fluorescent lamp with burst-mode dimming A fast starting induction RF fluorescent lamp capable of changing illumination level through a burst-mode dimming facility, comprising a dimming facility enabling the induction RF fluorescent lamp to dim in response to a control signal, and with structures within the bulb envelope that facilitate rapid luminous development during a turn-on phase.
US09245732B2	Lighting apparatus A lighting apparatus is provided that includes a magnetron configured to generate microwaves having a predetermined frequency, a waveguide including a first wave guide space configured to introduce and guide the microwaves and a second wave guide space expanded from the first wave guide space, a resonator to which the microwaves are transmitted from the waveguide and a bulb located in the resonator, the bulb encapsulating a light emitting material and being configured to emit light in response to the transmitted microwaves. The second wave guide space is located in a transmission path of the microwaves transmitted from the magnetron to the resonator.
US09245731B2	Light irradiating apparatus A light irradiating apparatus includes: an excimer lamp including a high voltage side electrode and a low voltage side electrode; a cooling mechanism configured to cool the high voltage side electrode using a cooling medium; and a leak current discharge circuit. The cooling mechanism includes a passage and a conductor, in which the passage allows the cooling medium to flow through, and the conductor is in contact with the cooling medium, and the conductor is electrically connected to the leak current discharge circuit.
US09245720B2	Methods and apparatus for detecting azimuthal non-uniformity in a plasma processing system Apparatus and methods for assessing RF return current azimuthal uniformity are disclosed. A plurality of non-linear substantially-enclosed RF current sensors are disposed azimuthally around a central axis of a plasma processing chamber. When a plasma is ignited in the plasma processing chamber, the RF return currents are sensed in the plurality of non-linear substantially-enclosed RF current sensors and analyzed to ascertain whether RF return current azimuthal uniformity is acceptable.
US09245714B2	System and method for compressed data transmission in a maskless lithography system Compression, transmission and decompression of gray-tone imagery data includes receiving a gray-tone image suitable for printing at least a portion of a pattern onto a substrate by operation of an electron beam lithography system, aggregating sets of lines of the gray-tone image into trilines, sequentially encoding each of the trilines of the gray-tone image by operation of one or more encoders, the one or more encoders equipped with a codebook configured to store a plurality of triline fragments and a write location and transmitting the encoded trilines of the gray-tone image to a set of decoders of the digital pattern generator via a set of data pathways established between the one or more encoders and each of the decoders.
US09245713B2	Charged particle beam apparatus A charged particle beam apparatus for processing a tip end portion of a sample into a needle shape, includes an ion beam irradiation unit that irradiates the tip end portion with ion beams, an electron beam irradiation unit that irradiates the tip end portion with electron beams, a secondary electron detection unit that detects secondary electrons generated at the tip end portion by the irradiation with the electron beams, and an EBSD detection unit that detects diffracted electrons generated at the tip end portion by the irradiation with the electron beams.
US09245709B1	Charged particle beam specimen inspection system and method for operation thereof A charged particle beam specimen inspection system is described. The system includes an emitter for emitting at least one charged particle beam, a specimen support table configured for supporting the specimen, an objective lens for focusing the at least one charged particle beam, a charge control electrode provided between the objective lens and the specimen support table, wherein the charge control electrode has at least one aperture opening for the at least one charged particle beam, and a flood gun configured to emit further charged particles for charging of the specimen, wherein the charge control electrode has a flood gun aperture opening at which a conductive membrane is provided which is positioned between the flood gun and the specimen support table.
US09245708B2	Method and apparatus for electron beam lithography A system using an energy beam to expose patterns on a wafer includes first mirror elements, a multiplexer element, and second mirror elements. The first and second mirror elements are dynamically controlled to reflect the energy beam to the wafer. The first mirror elements are configured in a first chain having a first data input and a first data output. The multiplexer element includes a second data input, a third data input, a select input, and a second data output. The third data input is coupled to the first data output. The second mirror elements are configured in a second chain having a fourth data input.
US09245706B2	Method of writing and reproducing multimedia service by using tag and apparatus therefor Provided are method and apparatus for writing and reproducing a multimedia service using a tag in order to provide an intuitive interface for a user using a multimedia service. The method includes selecting a multimedia service to be written; generating tag information identifying the selected multimedia service; and writing the generated tag information to a tag. Accordingly, multimedia service information and content information can be stored in a tag by being written to tag information using a common format, and thus the user can later execute a service operation by easily writing information of a desired service operation to a tag and then simply connecting the tag to a tag reading device.
US09245703B2	Method and apparatus for using a portable terminal A method for using a portable terminal includes activating a timer function with respect to a certain button if a touch on the button is detected for at least a predetermined time, measuring a touch hold time with respect to the button from a time point at which the touch is input when the timer function is activated, setting a countdown time corresponding to the touch hold time with respect to the button, performing a countdown for the set countdown time when the touch on the button ends, and performing a function corresponding to the button when the countdown is completed.
US09245699B2	Circuit breaker module A circuit breaker module includes a breaker circuit connected to a first electrical lead and a second electrical lead, a housing surrounding the breaker circuit, wherein said first and second electrical leads extend through the housing, and wherein the housing is at least partially constructed of a thermally conductive polymer, and a heat dissipation feature contacting the housing, wherein the heat dissipation feature is operable to dissipate heat from the breaker circuit.
US09245698B2	Multi direction switch A multi direction switch (100) includes a first cover (2), a second cover (3), a printed circuit board (PCB) (4) positioned between the first cover and the second cover, a pair of stacked, orthogonal electrode plates (5) positioned between the second cover and the PCB, a spring member (7) positioned between the first cover and the PCB, and a button (6) for actuating the electrode plates to move on the PCB. The second cover forms a protrusion (21), the button has a radial portion (611) and a wall portion (612) extending downwardly from the radial portion, and the spring member is positioned between the protrusion and the wall portion.
US09245689B2	Multilayer ceramic electronic component and method of manufacturing the same There is provided a multilayer ceramic electronic component including a ceramic body including dielectric layers, internal electrodes formed in the ceramic body and including pores, and first and second external electrodes formed on both end portions of the ceramic body, wherein in a cross section of the ceramic body in length and thickness directions, when a thickness of the internal electrode is to and a thickness of the pore is tp, 0.41≦tp/te≦0.86 is satisfied.
US09245686B2	Capacitor fastening A capacitor fastening for fastening a capacitor to a panel, whereby the capacitor, when mounted in place, is positioned in the panel, fastened at its lower part. The capacitor fastening includes a retainer in the panel at the mounting point of the capacitor for preventing lateral movement of the capacitor in at least one selected direction; a tightening plate arranged above the panel and to be fastened to the panel, which tightening plate has a hole substantially corresponding to the diameter of the capacitor above the mounting point of the panel; and a wedge between the panel and the tightening plate for tightening the retainer of the panel and the edge of the hole in the tightening plate from opposite directions against the capacitor.
US09245684B2	Method for manufacturing a transformer device on a glass substrate A method for manufacturing a transformer device includes providing a glass substrate having a first side and a second side arranged opposite the first side, forming a first recess in the glass substrate at the first side of the glass substrate, forming a second recess in the glass substrate at the second side of the glass substrate opposite to the first recess, forming a first coil in the first recess, and forming a second coil in the second recess.
US09245681B2	Laminated common-mode choke coil In a common-mode choke coil, first annular conductors are helically defined from the lower layer to the upper layer, and first annular conductors are helically defined from the upper layer to the lower layer. Further, second annular conductors are helically defined from the lower layer to the upper layer, and second annular conductors are helically defined from the upper layer to the lower layer. The first annular conductors and the second annular conductors are disposed alternately in a lamination direction. The first annular conductors and the second annular conductors are disposed such that substantial portions of the annular conductors adjacent to each other in the layer direction do not overlap in a planar view. This structure achieves a compact common-mode choke coil with which the loss of normal-mode signals is small, and which is highly capable of removing common-mode noise.
US09245677B2	System for concentrating and controlling magnetic flux of a multi-pole magnetic structure An improved system for concentrating magnetic flux of a multi-pole magnetic structure at the surface of a ferromagnetic target uses first pole pieces having a magnet-to-pole piece interface with a first area and a pole piece-to-target interface with a second area substantially smaller than the first area for concentrating flux of the multi-pole magnetic structure at each pole piece-to-target interface, where the target can be a ferromagnetic material, complementary pole pieces, or a gap. The improved system may also include a magnetic circuit having second pole pieces located between the first pole pieces and the target that controls the flux directed from the first pole pieces to the target.
US09245675B2	Generating apparatus of a pulsed magnetic field An apparatus for generating a pulsed magnetic field includes an insulating body, an electrical conductor positioned on the insulating body, and a ferromagnetic body having a hollow portion, wherein the insulating body and the electrical conductor are positioned in the hollow portion. In some embodiments of the present disclosure, the electrical conductor has at least one gap separating the electrical conductor into at least two parts, thereby allowing a current to flow through the at least two parts in parallel to generate a magnetic field in the insulating body.
US09245671B2	Electrically isolated, high melting point, metal wire arrays and method of making same A method of making a wire array includes the step of providing a tube of a sealing material and having an interior surface, and positioning a wire in the tube, the wire having an exterior surface. The tube is heated to soften the tube, and the softened tube is drawn and collapsed by a mild vacuum to bring the interior surface of the tube into contact with the wire to create a coated wire. The coated wires are bundled. The bundled coated wires are heated under vacuum to fuse the tube material coating the wires and create a fused rod with a wire array embedded therein. The fused rod is cut to form a wire array. A wire array is also disclosed.
US09245670B2	Reliable wire method A wire structure, which may be configured for a semiconductor device, is disclosed. The wire may include an elongate flexible core formed of a conductor material and a cladding layer covering an outer surface of the core. The cladding layer may be a conductor. In various aspects the cladding layer and core have different grain sizes. An average grain size of the core material may be several orders of magnitude greater than an average grain size of the cladding layer material. The cladding layer may be an alloy having a varying concentration of a minor component across its thickness. Methods of forming a wire structure are also disclosed.
US09245668B1	Low noise cable providing communication between electronic sensor components and patient monitor A physiological measurement system can include a low noise patient cable that connects a monitor and a noninvasive optical sensor. The cable has a plurality of emitter wires configured to communicate a drive signal between the monitor and at least one emitter. The cable also has a plurality of detector wires configured to communicate a physiological signal between at least one detector responsive to the emitter and the monitor. The emitter and detector wires are orthogonally disposed so that crosstalk between the two functionally different wires is mitigated.
US09245663B2	Thick film silver paste and its use in the manufacture of semiconductor devices The present invention is directed to an electroconductive silver thick film paste composition comprising Ag particles and a Bi—Cu—B—Zn-based glass frit dispersed in an organic medium. The present invention is further directed to an electrode formed from the paste composition and a semiconductor device and, in particular, a solar cell comprising such an electrode. The paste is particularly useful for forming a tabbing electrode.
US09245659B2	X-ray imaging apparatus An X-ray imaging apparatus is provided with a multi X-ray source and a collimator in which a plurality of slits for X-rays to pass through are two-dimensionally formed, the size and position of the slits being adjustable. A control unit, as a first control mode, controls the size and position of the slits to move an examination region in parallel, when an X-ray source is changed to a different X-ray source, such that the examination directions are parallel before and after the change. Also, the control unit, as a second control mode, controls the size and position of the slits to rotate the examination direction, when an X-ray source is changed to a different X-ray source, such that the center of the examination regions is the same before and after the change.
US09245658B2	Imaging apparatus and method An imaging apparatus has an emission device to emit X-rays and a detection device to detect X-rays. A detector collimator is located between the patient space and the detection device. The emission device and detection device operate while translating along a displacement axis, to take a plurality of acquisitions. The imaging apparatus has a setting device to modify a dimension of a collimator slit.
US09245655B2	Method for vitrification of waste A method for vitrifying waste to prevent the formation of molybdate secondary phases includes forming a feed mixture that includes the waste, a source of vanadium, and at least one of glass frit or glass forming chemicals and vitrifying the feed mixture in a melter to produce a glass product that includes the waste.
US09245654B2	Rotating high-density fusion reactor for aneutronic and neutronic fusion A fusion device produces fusion of neutral atoms and ions in an “aneutronic fusion” manner without neutrons as products utilizes strong ion-neutral coupling at high neutral densities. Ions and neutrals rotate together in a cylindrical chamber due to frequent collisions. High magnetic forces make the attainment of high rotation energy possible; the magnetic field in a medium can be set at very high values because of the absence of magnetic charges. The repeated acceleration by strong magnetic forces in the azimuthal direction makes possible very high ion velocity. Fusion takes place mainly between neutral particles. This approach can be applied to fusion with neutrons as well. Conventional fusion schemes and neutron sources can be realized using the principles described above in the generation of neutrals of high energies and densities.
US09245652B2	Latency detection in a memory built-in self-test by using a ping signal In a complex semiconductor device including embedded memories, the round trip latency may be determined during a memory self-test by applying a ping signal having the same latency as control and failure signals used during the self-test. The ping signal may be used for controlling an operation counter in order to obtain a reliable correspondence between the counter value and a memory operation causing a specified memory failure.
US09245647B2	One-time programmable memory cell and circuit An OTP memory cell and an OTP memory circuit. The OTP memory cell having a memory module, a write module, a read module, and a load module. Data may be written into the memory module once the write module is active; and data may be read out of the memory module once the read module is active. The OTP memory cell may also have a first latch module and a second latch module.
US09245642B1	Temperature dependent voltage to unselected drain side select transistor during program of 3D NAND Techniques are provided for reducing program disturb in a 3D memory device. The techniques include compensating for a temperature dependence of program disturb. The techniques may include compensating for how program disturb depends on the location of the word line that is selected for programming. In one aspect, the voltage that is applied to the control gates drain side select transistors of unselected NAND strings is adjusted during programming based on temperature. Greater temperature compensation may be applied when the selected word line is closer to the drain side select transistors.
US09245639B1	NAND flash memory array architecture having low read latency and low program disturb A NAND flash memory achieves low read latency and avoidance of inadvertent programming and program disturb so that the random access and initial page read speeds of the NAND flash memory are generally comparable to that of a NOR flash memory, while preserving the higher memory density and lower power operation characteristics of traditional NAND flash memory relative to NOR flash memory. The reduction in latency is achieved by a NAND memory array architecture which employs a small NAND string, a dual plane interleaved memory architecture, a partitioned NAND array, selectively coupled local bit lines per each global bit line, and a counter-biasing mechanism to avoid inadvertent programming and program disturb.
US09245629B2	Method for non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines A three-dimensional array of memory elements is formed across multiple layers of planes positioned at different distances above a semiconductor substrate. The memory elements reversibly change a level of electrical conductance in response to a voltage difference being applied across them. The three-dimensional array includes a two-dimensional array of pillar lines from the substrate through the multiple layers of planes. A first set of pillar lines acts as local bit lines for accessing the memory elements together with an array of word lines on each plane. A second set of pillar lines is connected to the word lines. An array of metal lines on the substrate is switchable connected to the pillar lines to provide access to the first and second sets of pillar lines, thereby to provide access respectively to the bit lines and word lines of the three-dimensional array.
US09245621B2	Semiconductor memory device executing a write operation with first and second voltage applications A semiconductor memory device comprises a memory cell array including plural memory cells provided at the intersections of plural first lines and plural second lines; and a write circuit. The write circuit, on execution of a write operation, executes a first step of applying a voltage across the first and second lines connected to a data-write-targeted, selected memory cell, and a different voltage across the first and second lines connected to a data-write-untargeted, unselected memory cell of the plural memory cells and, after execution of the first step, executes a second step of applying a voltage, required for data write, across the first and second lines connected to the selected memory cell, and bringing at least one of the first and second lines connected to the unselected memory cell into the floating state.
US09245616B2	Dynamic cell state resolution A system and method for storing data uses multiple flash memory dies. Each flash memory die includes multiple flash memory cells. A charge pump is adapted to supply charge at a predetermined voltage to each flash memory die of the flash memory dies, and an interface is adapted to receive instructions for controlling the charge pump.
US09245615B2	Boost system for dual-port SRAM A boost system for dual-port SRAM includes a comparator and a boost circuit. The comparator is configured to compare a first row address of a first port and a second row address of a second port, and output a first enable signal. The boost circuit is configured to boost a voltage difference between a first voltage source and a second voltage source according to the first enable signal.
US09245614B2	Semiconductor device and method of manufacturing semiconductor device A semiconductor device having a high degree of freedom of layout has a first part AR1, in which a plurality of p-type wells PW and n-type wells NW are alternately arranged to be adjacent to each other along an X-axis direction. A common power feeding region (ARP2) for the plurality of wells PW is arranged on one side so as to interpose the AR1 in a Y-axis direction, and a common power feeding region (ARN2) for the plurality of wells NW is arranged on the other side. In the power feeding region (ARP2) for the PW wells, a p+-type power-feeding diffusion layer P+(DFW) having an elongate shape extending in the X-axis direction is formed. A plurality of gate layers GT extending in the X-axis direction to cross the boundary between the PW and NW wells are arranged in the AR1, and a plurality of MIS transistors are correspondingly formed.
US09245609B2	Semiconductor storage device A semiconductor storage device includes: a memory cell array in which a plurality of pairs of bit lines and source lines, a plurality of word lines, and a plurality of resistance change memory cells are arranged; a write driver, a sense amplifier, a global bit line and a global source line provided on a first end side; a plurality of bit line switches provided between the plurality of bit lines and the global bit line; a plurality of source line switches provided between the plurality of source lines and the global source line; a column decoder; a row decoder; a plurality of bit line ground switches provided between the plurality of bit lines and a ground line on a second end side; and a plurality of source line ground switches provided between the plurality of source lines and a ground line on the second end side.
US09245606B2	SRAM memory device and testing method thereof A static random access memory (SRAM) device includes a memory array of a plurality of memory cells, a controller that receives an external clock signal formed by a succession of external pulses and generates an internal clock signal formed by a succession of internal pulses, and a driving circuit that receives the internal clock signal. The controller is operable in a first mode, wherein the controller generates, for each external pulse, a corresponding internal pulse and the controller controls the driving circuit so that the driving circuitry carries out one access to the memory array for each internal pulse. The controller is further operable in a second mode, wherein the controller generates, for each external pulse, a pair of internal pulses, and the controller controls the driving circuitry so that, for each pair of internal pulses, the driving circuitry writes a first data item in a set of memory cells, and then reads the set of memory cells, so as to acquire a second data item.
US09245605B2	Clock synchronization circuit and semiconductor memory device including clock synchronization circuit A clock synchronization circuit includes a delay-locked loop (DLL) and a delay-locked control unit. The DLL is configured to generate an output clock signal by delaying an input clock signal by a delay time, and to execute a delay-locking operation in which the delay time is adjusted to a locked state according to a comparison between the output clock signal and the input clock signal. The delay-locked control unit configured to detect the locked state of the DLL, and to control the DLL based on the determined locked state.
US09245602B2	Techniques to boost word-line voltage using parasitic capacitances A memory device with word-line voltage boosting includes a set of first switches that are operable to couple a word-line of the memory device to a supply voltage to pull the word-line up to a rail voltage. A dummy line including a conductive route can be disposed in a vicinity of the word-line to form a parasitic coupling capacitance with the word-line. A second switch is operable to couple the dummy line to the supply voltage to pull the dummy line to the rail voltage. Pulling up the dummy line boosts the word-line voltage above the rail voltage by a boost voltage.
US09245601B2	High-density latch arrays A system and device are provided for implementing memory arrays using high-density latch cells. The device includes an array of cells arranged into columns and rows. Each cell comprises a latch cell that includes a transmission gate, a pair of inverters, and an output buffer. Each row of latch cells is connected to at least one common node for addressing the row of latch cells, and each column of latch cells is connected to a particular bit of an input signal and a particular bit of an output signal. A register file may be implemented using one or more arrays of the high-density latch cells to replace any or all of the banks of SRAM cells typically used to implement the register file.
US09245600B2	Semiconductor device and operating method thereof A semiconductor device comprises: a read queue configured to store one or more read requests to a semiconductor memory device; a write queue configured to store one or more write requests to the semiconductor memory device; and a dispatch block configured to determine a scheduling order of the one or more read requests and the one or more write requests and switch to the read queue or to the write queue if a request exists in a Row Hit state in the read queue or in the write queue.
US09245599B1	Timed multiplex sensing Methods for determining memory cell states during a read operation using a detection scheme that reduces the area of detection circuitry for detecting the states of the memory cells by time multiplexing the use of portions of the detection circuitry are described. The read operation may include a precharge phase, a sensing phase, and a detection phase. In some embodiments, a first bit line and a second bit line may be precharged to a read voltage in parallel, and then sensing and/or detection of selected memory cells corresponding with the first bit line and the second bit line may be performed serially using the same detection circuitry by time multiplexing the use of the detection circuitry. In some cases, the time multiplexed detection circuitry may be used for detecting two or more states corresponding with two or more memory cells being sensed during a read operation.
US09245596B1	Low power consumption charge pump system and associated control circuit and method for non-volatile memory cell array A charge pump system includes a logic circuit, a signal processing circuit, a charge pump circuit, a switching circuit, a first controllable discharge path, and a second controllable discharge path. The logic circuit receives a program enabling signal and generates a first control signal. The signal processing circuit receives a pump enabling signal, and generates a second control signal and a third control signal. The charge pump circuit receives the third control signal and generates an output signal. The switching circuit has a control terminal receiving the third control signal, a first terminal connected with the output terminal of the charge pump circuit, and a second terminal connected with a reservoir capacitor. The first controllable discharge path receives the first control signal, and the second controllable discharge path receives the second control signal.
US09245594B2	Switching circuit A first transistor is turned on based on a first control signal provided to a first terminal of the first transistor. A second control signal is generated by a logic device based on a first input signal and a second input signal. The first input signal is controlled by a logical value stored by a keeper circuit and based on the first control signal, and the second input signal is generated by inverting the first control signal. A second transistor is turned on based on the second control signal provided to a first terminal of the second transistor. A second terminal of the first transistor is coupled with a second terminal of the second transistor.
US09245593B2	Method for driving arithmetic processing unit In a memory cell including an inverter, a capacitor is provided. When the memory cell is not accessed, data stored in the memory cell is copied to the capacitor and then power supply to the inverter is stopped. When the memory cell needs to be accessed, the data is returned from the capacitor to the inverter. In this manner, power consumption when the memory cell is not accessed is reduced. Furthermore, in a memory device including a plurality of such memory cells, backup of the first memory cell and backup of the second memory cell are performed at different timings. Recovery of the first memory cell and recovery of the second memory cell are also performed at different timings. Consequently, power required for backup or recovery can be distributed. Other embodiments may be described and claimed.
US09245588B2	Stack type semiconductor memory device A stack type memory device includes a semiconductor substrate; a plurality of bit lines arranged and stacked on the semiconductor substrate; a plurality of word lines formed on the plurality of bit lines; a plurality of interconnection units, each extending from a respective word line toward a respective one of the plurality of bit lines; and a plurality of memory cells connected between the plurality of bit lines and the interconnection units extending from the plurality of word lines, respectively.
US09245586B2	Systems and methods for short media defect detection using multi-iteration soft data feedback Various systems and methods for media defect detection.
US09245581B2	Magnetic head providing write protrusion suppression and methods of formation thereof A system includes a magnetic head, a magnetic medium, a drive mechanism for passing the magnetic medium over the magnetic head, and a controller electrically coupled to the magnetic head for controlling operation of the magnetic head, wherein the magnetic head has a write element, a read element, a substrate that is an alloy material having greater than about 50 at. % TiC, and a heater element positioned between the read element and the write element, the write element being positioned nearer to the substrate than the read element such that heat generated by the write element during write operations is dissipated by the substrate, and the heater element being adapted for inducing protrusion of portions of an air bearing surface (ABS) of the magnetic head to adjust a clearance between the portions of the ABS and the magnetic medium.
US09245580B1	Systems and methods for three reader storage access Systems and method relating generally to data processing, and more particularly to systems and methods for utilizing multiple data streams for data recovery from a storage device.
US09245577B1	Data storage device comprising spindle motor current sensing with supply voltage noise attenuation A data storage device is disclosed comprising a head actuated over a disk and a spindle motor configured to rotate the disk, wherein the spindle motor comprises a plurality of windings. The spindle motor is powered with a power voltage generated in response to a supply voltage. A clamping circuit is enabled when sensing a current flowing from the power voltage through at least one of the windings, wherein the clamping circuit is configured to clamp the power voltage to less than a peak voltage of the supply voltage in order to attenuate noise in the power voltage. The clamping circuit is disabled when not sensing the current.
US09245576B2	Method for determining whether a same disc is loaded in an optical drive The invention relates to a method for determining whether a same disc is loaded in an optical drive. The method comprises the steps of measuring a time interval between a disc insertion event resulting from a disc insertion command and a disc ejection event resulting from a disc ejection command, comparing the time interval with a predefined value, and indicating that the same disc is loaded in the optical disc if the time interval is smaller than the predefined value.
US09245573B2	Methods of forming materials for at least a portion of a NFT and NFTs formed using the same A method including depositing a plasmonic material at a temperature of at least 150° C.; and forming at least a peg of a near field transducer (NFT) from the deposited plasmonic material.
US09245569B1	Servo processor receiving photodetector signals A digital servo method for an optical disk drive includes receiving low-pass filtered and gain-adjusted versions of photodetector output signals resulting from an illumination of an optical disk. Versions of the photodetector signals are digitized to produce digital signals. A focus control signal is determined through at least one servo algorithm in a digital signal processor based on a focus error determined from the digital signals. Alternatively, a tracking control signal is determined through at least one servo algorithm in the digital signal processor based on a tracking error determined from the digital signals. An optical disk drive includes an analog-to-digital converter configured to convert low-pass filtered and gain-adjusted versions of photodetector output signals into at least one digital signal and the digital signal processor.
US09245563B2	Magnetic medium with an orientation control layer Provided is a magnetic recording medium which maintains high vertical orientation of a vertical magnetic layer, and which is capable of realizing high recording densification. In the magnetic recording medium, at least a soft magnetic underlying layer (30), seed layers (31, 32), an orientation control layer (33), and a vertical magnetic layer are laminated in this order on the non-magnetic substrate. The soft magnetic underlying layer (30) has an amorphous or microcrystalline structure. The seed layers (31, 32) include a first seed layer (31) formed from a metal oxide or a metal nitride, and a second seed layer (32) which is formed on the first seed layer and is formed from a metal formed with an island-shape or a net shape. In the orientation control layer (33) and the vertical magnetic layer, respective crystal grains constitute columnar crystals that are continuous in a thickness direction based on the second seed layer (32).
US09245559B2	Track misregistration sensitive initialization of joint equalizer A method of mitigating an effect of track misregistration on read performance in a system comprising an array-reader includes determining an estimated off-track condition, selecting translation coefficients based on the estimated off-track condition, determining updated equalizer coefficients by applying the translation coefficients to native equalizer coefficients, and applying the updated equalizer coefficients to signals received from the array-reader to output a read signal.
US09245557B2	Head assembly and disk device provided with the same According to one embodiment, a head gimbal assembly includes a support plate, a wiring member including a thin metallic plate, an insulating layer and a conductive layer, the wiring member including a tongue portion located on a convex portion of the support plate, a proximal end portion fixed onto the support plate, and a bridge portion bridged between the tongue portion and the proximal end portion and including a inflection point with respect to a height direction of warping, a magnetic head attached to the tongue portion, and a piezoelectric element bonded to the bridge portion at a section between the proximal end portion and the inflection point.
US09245550B2	Write head tester using inductance A write head is tested by measuring the effect that magnetic fields have on the inductance of the write head. For example, a perpendicular write head may be placed in a magnetic field with a first angle, e.g., non-parallel and non-perpendicular, to the air bearing surface and the inductance is measured. After altering the angle of the magnetic field the inductance is again tested. In another embodiment, the angles may be parallel and perpendicular to the air bearing surface. The difference in the inductance value can be used to determine a characteristic of the write head, such as the presence of a recording pole. In some embodiments, the inductance may be measured while applying a bias current to the write head while the write head is in an external magnetic field.
US09245548B2	Magnetic head using a synthetic ferri free structure Embodiments of the present invention help to reduce mag-noise in a magnetoresistive head without deterioration in reproduced output and improve the signal/noise ratio (SNR) of the magnetoresistive head. According to one embodiment, the magnetoresistive head uses a synthetic ferri free layer and it is arranged such that the magnetic field which is applied to an end of a free layer with smaller film thickness and saturation magnetization in the track width direction by a coupling field is larger than the magnetic field which is applied to it by a bias layer.
US09245547B1	Magnetic sensor having enhanced linearization Method and apparatus for a magnetic sensor device having a magnetic field sensing element to generate an output signal and a signal processing module coupled to the magnetic field sensing element, the signal processing module including a linearization module to apply a third order Taylor expansion term to the output signal generated by the magnetic field sensing element. An output module can receive the linearized signal from the linearization module and provide a device output signal.
US09245543B1	Method for providing an energy assisted magnetic recording head having a laser integrally mounted to the slider A method for providing energy assisted magnetic recording (EAMR) heads are described. The method and system include providing a substrate, at least one EAMR transducer, an overcoat layer and at least one laser. The substrate has a leading edge and a substrate trailing edge. The EAMR transducer(s) reside in a device layer and on the substrate trailing edge. The overcoat layer includes a plurality of contacts. The device layer is between the overcoat layer and the substrate trailing edge. The laser(s) provide energy to the EAMR transducer. The overcoat layer is between the substrate trailing edge and the laser(s). The laser(s) are electrically coupled to at least a first portion of the contacts. The contacts provide thermal connection through the overcoat layer and through the device layer to the substrate. At least a second portion of the contacts is electrically insulated from the substrate.
US09245539B2	Voiced sound interval detection device, voiced sound interval detection method and voiced sound interval detection program This invention provides a voiced sound interval detection device which enables appropriate detection of a voiced sound interval of an observation signal even when a volume of sound from a sound source varies or when the number of sound sources is unknown or when different kinds of microphones are used together.
US09245536B2	Adjustment apparatus and method A disclosed adjustment apparatus includes: a calculation unit that calculates a ratio between a first frequency characteristic in a first frequency bandwidth of voice signals and a second frequency characteristic in a second frequency bandwidth of the voice signals, which is higher than the first frequency bandwidth, and calculates an adjustment amount for adjusting at least a portion of a frequency characteristic of the voice signals so that the calculated ratio approaches a predetermined reference, when the calculated ratio does not satisfy the predetermined reference; and a modification unit that modifies at least the portion of the frequency characteristic of the voice signals according to the adjustment amount.
US09245533B2	Enhancing performance of spectral band replication and related high frequency reconstruction coding The present proposes new methods and an apparatus for enhancement of source coding systems utilizing high frequency reconstruction (HFR). It addresses the problem of insufficient noise contents in a reconstructed highband, by Adaptive Noise-floor Addition. It also introduces new methods for enhanced performance by means of limiting unwanted noise, interpolation and smoothing of envelope adjustment amplification factors. The present invention is applicable to both speech coding and natural audio coding systems.
US09245532B2	Variable bit rate LPC filter quantizing and inverse quantizing device and method A device and a method for quantizing a LPC filter in the form of an input vector in a quantization domain, comprises a calculator of a first-stage approximation of the input vector, a subtractor of the first-stage approximation from the input vector to produce a residual vector, a calculator of a weighting function from the first-stage approximation, a warper of the residual vector with the weighting function, and a quantizer of the weighted residual vector to supply a quantized weighted residual vector. A device and a method for inverse quantizing of a LPC filter, comprises means for receiving coded indices representative of a first-stage approximation of a vector representative of the LPC filter in a quantization domain and of a quantized weighted residual version of the vector, a calculator of an inverse weighting function from the first-stage approximation, an inverse quantizer of the quantized weighted residual version of the vector to produce a weighted residual vector, a multiplier of the weighted residual vector by the inverse weighting function to produce a residual vector, and an adder of the first-stage approximation with the residual vector to produce the vector representative of the LPC filter in the quantization domain.
US09245527B2	Speech recognition wake-up of a handheld portable electronic device A system and method for parallel speech recognition processing of multiple audio signals produced by multiple microphones in a handheld portable electronic device. In one embodiment, a primary processor transitions to a power-saving mode while an auxiliary processor remains active. The auxiliary processor then monitors the speech of a user of the device to detect a wake-up command by speech recognition processing the audio signals in parallel. When the auxiliary processor detects the command it then signals the primary processor to transition to active mode. The auxiliary processor may also identify to the primary processor which microphone resulted in the command being recognized with the highest confidence. Other embodiments are also described.
US09245526B2	Dynamic clustering of nametags in an automated speech recognition system A speech recognition method includes receiving a nametag utterance, decoding the nametag utterance to recognize constituent subwords of the nametag utterance, determining the number of subwords in the nametag utterance, and associating the nametag utterance with one or more of a plurality of different nametag clusters based on the number of subwords in the nametag utterance. According to preferred aspects of the method, a confusability check is performed on the nametag utterance within the cluster(s) associated with the nametag utterance, stored nametags are received from memory by decoding the nametag utterance within the cluster(s) associated with the nametag utterance, and the stored nametags are played back by cluster.
US09245522B2	Methods and systems for correcting transcribed audio files Methods and systems for correcting transcribed text. One method includes receiving audio data from one or more audio data sources and transcribing the audio data based on a voice model to generate text data. The method also includes making the text data available to a plurality of users over at least one computer network and receiving corrected text data over the at least one computer network from the plurality of users. In addition, the method can include modifying the voice model based on the corrected text data.
US09245521B2	Method for correcting voice recognition error and broadcast receiving apparatus applying the same A method for correcting a voice recognition error and a broadcast receiving apparatus applying the same are provided. The method for correcting the voice recognition error includes, receiving a user's spoken command, recognizing the user's spoken command and determining text corresponding to the user's spoken command, if a user command to correct the determined text is input, displaying a text correction user interface in which a morpheme of the determined text and an indicator are associated with each other, and correcting the morpheme of the determined text by selecting the associated indicator of the text correction UI. Accordingly, the broadcast receiving apparatus exactly corrects the misrecognized word with a word desired by the user.
US09245518B2	Active vibration noise control apparatus An active vibration noise control apparatus uses an adaptive control process, which predicts rear road wheel noise canceling sounds by correcting a front road wheel reference signal or a rear road wheel reference signal with a corrective filter, based on different characteristics of front road wheel suspensions and rear road wheel suspensions.
US09245517B2	Noise reduction audio reproducing device and noise reduction audio reproducing method A noise reduction audio reproducing method includes the steps of: generating, from an audio signal of collected and obtained noise, an audio signal for noise cancellation to cancel the noise by synthesizing the audio signal for noise cancellation and the noise in an acoustic manner, reproducing the audio signal for noise cancellation acoustically to synthesize this with the noise in an acoustic manner; emphasizing an audio component to be listened to, of collected audio; synthesizing an audio signal with the audio component to be listened to being emphasized, and the audio signal for noise cancellation to supply the synthesized signal thereof to an electro-acoustic converting unit; and controlling so as to supply an audio signal, with the audio component to be listened to having been emphasized, to a synthesizing unit, regarding only a section based on a control signal.
US09245514B2	Speaker with multiple independent audio streams The various embodiments relate generally to systems, devices, apparatuses, and methods for providing audio streams to multiple listeners, and more specifically, to a system, a device, and a method for providing independent listener-specific audio streams to multiple listeners using a common audio source, such as a set of loudspeakers, and, optionally, a shared audio stream. In some embodiments, a method includes identifying a first audio stream for reception at a first region to be canceled at a second region, and generating a cancellation signal that is projected in another audio stream destined for the second region. The cancellation signal and the first audio steam are combined at the second region. Further, a compensation signal to reduce the cancellation signal at the first region can be generated.
US09245512B2	Acoustic antenna element for emitting and/or receiving waves under water and associated acoustic antenna An acoustic antenna element for receiving and/or emitting low-frequency underwater waves comprises an acoustic panel formed by at least one acoustic pick-up enclosed in a flexible jacket, the acoustic panel being generally rectangular and being mounted against a curved support by a mounting device including a clamping device comprising at least two flanges the ends of which are mounted on the support, the respective flanges comprising at least one tie between the two ends thereof, and the clamping device capable of adjusting the tension in the ties between the two respective ends thereof, the flanges being arranged so that the support is bent between the two respective ends of the ties and so that the panel is clamped against the support by the ties when they are under tension.
US09245511B1	Ultrathin electromagnetic driver and electric guitar including the same A string vibration sustaining device according to the present embodiment includes a rear pickup converting string vibration into an electrical signal, an amplifier amplifying the converted electrical signal, and an ultrathin electromagnetic driver converting the amplified electrical signal into a magnetic signal to excite strings. The ultrathin electromagnetic driver includes two magnetic pole plates formed of a magnetic material, a rare earth magnet arranged in parallel with the strings between the two magnetic pole plates, and a coil wound in a direction perpendicular to the strings around the rare earth magnet, is formed to be ultrathin to have an entire thickness equal to or smaller than 3 mm, and is arranged in a slight gap between a neck end portion and a front pickup of the electric guitar.
US09245510B2	Electronic cymbal trigger According to some aspects, a cymbal system is provided comprising a metal plate, a transducer coupled to the metal plate and configured to detect an acoustic signal generated by a strike of the metal plate, and processing circuitry, electrically connected to the transducer, configured to determine a cymbal articulation for the strike of the metal plate based on the detected acoustic signal. According to some aspects, a method is provided comprising the steps of detecting an acoustic signal generated by a strike of a metal plate, and determining a cymbal articulation for the strike of the metal plate based on the detected acoustic signal.
US09245506B2	Resonance tone generation apparatus and resonance tone generation program A resonance tone generation apparatus 20 is applied to an electronic musical instrument DM having a tone generator for generating, in accordance with a tone generation instruction signal having a key number n, a musical tone signal indicative of a piano sound having a key tone pitch specified by the key number. In the resonance tone generation apparatus 20, the key numbers n are assigned. The resonance tone generation apparatus 20 has a plurality of resonance tone generation circuits 30(n) each being configured to have a plurality of resonance frequencies and each retrieving a musical tone signal indicative of a musical sound of the piano and generating a musical tone signal indicative of a resonance tone which imitates a sound of strings of the piano, the sound being resonated by the piano sound indicated by the retrieved musical tone signal. The resonance tone generation apparatus 20 also has a resonance circuit setting portion 60 which allows respective resonance frequencies of the resonance tone generation circuit 30(n) to coincide with frequencies of a fundamental tone and overtones of a musical sound PS(n) generated by the tone generator in accordance with tone generation instruction information including the key number n.
US09245505B1	Electric guitar An electric guitar includes a neck and a body connected with the neck. The neck includes a mounting plate, a plurality of touch keys and a display screen. The touch keys and the display screen are mounted on the mounting plate. The touch keys are positioned at an upper edge or lower edge of the display screen. The body includes an outer shell, a human-machine interface, a control circuit board, a speaker and a power source. The human-machine interface is mounted on an upper surface of the outer shell. The control circuit board, the speaker and the power source are mounted in the outer shell; the touch keys, the display screen, the speaker and the human-machine interface are electrically connected with the control circuit board. The mounting plate is positioned at a right side surface of the outer shell.
US09245502B2	Hoop for a drum A hoop for a drum is presented. The hoop having a ring having an inward face, an outward linear plane face, a top edge, and a bottom edge, wherein the inward face is stepped such that the bottom edge has a width less than the width of the top edge and a shoulder is formed therebetween.
US09245490B1	Display device and data driving circuit thereof A touch display device includes a timing controller to generate a sync signal for controlling timing of a touch sensor driving period and a display driving period, where the display driving period comprises a first phase to drive odd signal lines according to a first polarity and to drive even signal lines according to a second polarity, a second phase to drive the odd signal lines according to the second polarity and to drive the even signal lines according to the first polarity, and a charge share period between the first phase and the second phase. A set of charge sharing switches couple the odd and even signal lines together during the charge share period and couple the odd and even signal lines together during the touch sensor driving period.
US09245488B2	Thin film transistor array panel having improved flicker and cross-talk characteristics A thin film transistor array panel, according to an embodiment of the present invention, includes a first data line, a second data line neighboring the first data line, a transistor disposed in a region between the first data line and the second data line, and a pixel electrode disposed close to the second data line among the first and second data lines. An extension of the pixel electrode may cross the second data line, thereby being connected to the transistor. Accordingly, it may not be necessary to use an additional connecting member between the pixel electrode and the data line such that the process may be shortened and the structure of the wiring may be simplified. Also, the spatial utility may be increased to improve the degree of integration.
US09245480B2	Organic light emitting diode display with vertical compensation control line formed in parallel with the data line An organic light emitting diode display including a substrate, a scan line transferring a scan signal, a compensation control line transferring a compensation control signal, an operation control line applying an operation control signal, a data line and a driving voltage line transferring a data signal and a driving voltage, respectively, a switching thin film transistor (TFT) connected to the scan line and the data line, a compensation TFT and an initialization TFT connected to the compensation control line, an operation control TFT connected to the operation control line and the switching TFT, a driving TFT connected to the driving voltage line, an organic light emitting diode connected to a drain electrode of the driving TFT, and a hold capacitor connected between a source electrode of the operation control TFT and a gate electrode of the initialization TFT.
US09245479B2	Display device and display device driving method A display device includes: a signal controller which receives an input image signal and generates a changed image signal, where the signal controller divides the inputted image signal into red, green and blue image signals, changes the blue image signal to a first blue image signal or a second blue image signal, matches white balance of the red, green, first blue or second blue image signals, and generates the changed image signal by compensating a gamma value of the red, green, first blue or second blue image signals; a display panel which displays an image corresponding to the changed image signal, where the display panel includes a pixel including red, green, first blue and second blue sub-pixels; and a data driver which receives the changed image signal from the signal controller and applies a data voltage corresponding to the changed image signal to the display panel.
US09245473B2	Display device and driving method thereof A display device includes a clock oscillator, a register, and a data driver. The clock oscillator generates a clock signal. The register stores a clock signal parameter for the clock signal. The data driver determines a number of clock signals in 1 horizontal period based on the clock signal parameter, and applies data signals to data lines connected to a plurality of pixels based on the 1 horizontal period.
US09245472B2	Display device having RGBW sub-pixels and method for driving the display device A display device including a data mapping unit configured to identify a minimum value of the three-color input data corresponding to red, green, and blue (RGB), to determine white output color data by multiplying the identified minimum value by a gain ratio, and to subtract the white output color data from each of the three-color input data to determine RGB output color data, a gain adjustment unit configured to determine a preliminary gain ratio to minimize standard deviations of each of the white and RGB output color data, and to change a preliminary gain ratio based on an accumulated sum of color data used for respective sub-pixels in a previously displayed image to determine the gain ratio, and a display unit including unit pixels, each including RGB and white sub-pixels, and configured to display an image which corresponds to the and RGB output color data.
US09245468B2	Display device A display device according to an exemplary embodiment of the present invention includes a display portion including a plurality of display pixels displaying an image and a dummy portion including a plurality of dummy pixels formed in a periphery region of the display portion. An electrostatic test element group (TEG) may be formed in at least one of the dummy pixels.
US09245465B1	School bus stop safety breakaway arm extension An extended school stop sign, which may but need not be retrofitable, and barrier is mounted on a conventional school bus stop sign and extends further into the adjacent lane to reduce instances in which motorists pass a stopped school bus. A first frame is permanently secured to conventional stop sign mechanism. A second breakaway frame or arm is attachable to and detachable from the first frame, and extends beyond the conventional stop sign. If a vehicle strikes the second frame, it separates without significantly damaging the conventional stop sign mechanism. The extension arm can be moved between a retracted and extended position by the same mechanism that opens and closes the conventional stop sign, or with a new mechanism entirely.
US09245461B1	Greeting card with pop-out and audio An interactive greeting card which operates as a faux cuckoo clock. The greeting card contains an opening thereon beneath which is a pop-out character. One or more moveable flaps cover the opening and conceal the pop-out character. A pull tab mechanism is used to open one or more moveable flaps and set forth the pop-out character. The pull tab mechanism may also initiate playback of one or more pre-recorded audio files stored on a memory device within the greeting card.
US09245457B2	Impact and sound analysis for golf equipment Golf performance and equipment characteristics may be determined by analyzing the impact between a golf ball and an impacting surface. In some examples, the impacting surface may be a golf club face. The impact between the golf ball and the surface may be measured based on sound and/or motion sensors (e.g., gyroscopes, accelerometers, etc.). Based on motion and/or sound data, various equipment-related information including golf ball compression, club head speed and impact location may be derived. Such information and/or other types of data may be conveyed to a user to help improve performance, aid in selecting golf equipment and/or to insure quality of golfing products.
US09245456B2	Literacy education system A literacy system provides teaching for reading and writing skills particularly adapted to students with autistic spectrum disorders (ADS). In one embodiment, the literacy system may include exercises for teaching visual sequencing, motor skills, phonology, semantics, syntax, and text. The literacy system may have a pre-reading section, which includes exercises for developing visual sequencing skills and motor skills prior to teaching the skills of reading and writing words.
US09245451B2	Air traffic control system An air traffic control system, for use by a controller controlling multiple aircraft, comprising a processor, an input device and a display device, further comprising: trajectory prediction means for calculating a trajectory for each aircraft, for inputting aircraft detected position data, and for recalculating the trajectories based on said position data, and conflict detection means for detecting, based on the trajectories, future circumstances under which pairs of aircraft violate predetermined proximity tests, and for causing a display on the display device indicating said circumstances, further comprising means for inputting instruction data corresponding to instructions issued by the controller to an aircraft, and in which the proximity indication means is arranged to use a first proximity test and a second, more restrictive, proximity test; and in which the system is arranged to display a symbol representing pairs of aircraft which violate the second test in a first display mode, and those which violate the first set but not the second set in a second display mode, and in which the system is arranged, on input of a said instruction by a controller in relation to a pair of aircraft, to change the display mode of the symbol for said pair from the second mode to a third mode indicating that no further action is necessary.
US09245450B1	System, apparatus, and method for generating runway visual aids on an aircraft display unit A present novel and non-trivial system, apparatus, and method for generating runway visual aids on an aircraft display unit. Visual aids could comprise of runway indicators corresponding to minimum and maximum rollout and touchdown points, each of which may be determined in real-time by applying input factors to one or more configurable landing profiles. Data representative of visual aids may be provided by one or more sources including runway data sources and real-time input factors. An image generating processor generates an image data set representative of a three-dimensional perspective view of a scene outside the aircraft, wherein the image data set is determined as a function of terrain data, runway data, and visual aid data. The image data set may be provided to a Head-Down Display unit, a Head-Up Display unit, or both, whereby an image contains a runway depicted with at least one visual aid.
US09245443B2	Passenger services system for an aircraft A passenger services system of an aircraft includes a cabin services system of a passenger service unit in the aircraft. The passenger service unit is associated with a passenger seat of the aircraft. The passenger services system further includes an infrared transmitting unit associated with the passenger seat. The infrared transmitting unit is configured to send signals to control operation of the cabin services system. The passenger services system includes a control unit including an infrared receiver. The control unit is associated with the passenger service unit. The infrared receiver is configured to receive the signals from the infrared transmitting unit. The control unit is configured to control the operation of the cabin services system in response to receiving the signals.
US09245441B1	Smart remote controller handset The present invention features a smart remote controller system which can also receive phone calls from any mobile device via Bluetooth. The system comprises a remote controller, at least a smartphone, and an optional docking station. This remote controller has speakers and can stream music from the mobile device via Bluetooth while the device is charging on the docking station. The smart remote controller is banana shaped remote which fits comfortable in a user's palm. The top curved area is to control TV, DVR and other devices needing remote controller. The inner face is designed to be a comfortable ear to mouth piece to make/answer calls via the mobile device. One side is a Wi-Fi speaker system playing back music from any mobile device. The handset can be conveniently charged on the docking station when not in use.
US09245440B2	Location based event notification systems and methods Spatial notification systems and methods are described. In one respect, a spatial notification system includes a spatial information requesting circuit configured to transmit a request for spatial information, the request including a spatial location. The spatial notification system further includes an association circuit configured to associate received spatial information with notification information and a notification delivery system. The spatial notification system also includes a transmitter configured to transmit at least a portion of the spatial information and associated notification information to a notification delivery system.
US09245439B2	Temporary security bypass method and apparatus A method, system, and apparatus for temporarily disarming a barrier alarm in a security system is described. In one embodiment, a method for temporarily disarming a barrier alarm is described, comprising receiving an indication to disarm the barrier alarm, the indication generated at the barrier alarm by a user, disarming the barrier alarm in response to receiving the indication, re-arming the barrier alarm upon the occurrence of a predetermined condition.
US09245435B2	Gas detector control system and method A gas detector management system includes a plurality of docking stations distributed in a region being monitored. One or more gas detectors in the region, which have been exposed to various gas concentrations, and which include respective stored maximum concentrations can be coupled to respective docking stations. Information including the maximum stored concentrations can be downloaded to the stations. Alert messages can be automatically generated and transmitted to displaced safety officer for follow-up.
US09245434B2	Warning and message delivery and logging system utilizable in the monitoring of fall arresting and prevention devices and method of same An active interface monitoring and warning system for fall arresting/prevention devices delivering specific fault condition messages to individuals who are subject to accidental falls or other safety hazards when performing construction or the like or when operating elevating construction machinery such as aerialift work platforms and the like. The invention further provides a data logging system to record and transmit operational conditions, fault conditions and safety infractions.
US09245433B1	Passive device monitoring using radio frequency signals A rule-based machine learning system monitors frequency bands to detect transmissions from nearby active transmitters, such as those associated with wireless mobile devices. The system logs unique identifiers (UID) embedded in detected transmissions, recognizes patterns of UID detection over time, and selectively takes action when UIDs are detected and when they are expected but absent.
US09245431B2	Cover mounted circuit board and antenna A security sensor includes a wall mount having features for fixing the wall mount to a wall to monitor an area for security. A cover is adapted to attach to the wall mount. The cover includes a base to couple to the wall mount, connectors to couple to a power source, a circuit board supported proximate the base and coupled to the connectors, the circuit board having a transmitter to receive signals from a sensor and wirelessly transmit the signals, and an antenna coupled to the circuit board and spaced from the wall to reduce electromagnetic interference from the wall.
US09245430B1	Beverage insulating cover with remote locating means A beverage koozie having a wireless locator that emits sounds under the control of a key fob. The koozie has an interior switch that causes a sound generator to emit sound when a beverage is placed in the koozie. The sound generator can also be activated by a key fob. In response to RF from the key fob the sound generator emits an audible signal to enable a user to find the koozie. The sound generator can also emit entertaining sounds when directed by the key fob.
US09245429B2	Haptic warping system A system is provided that transforms haptic signals. The system receives an original haptic signal, where the original haptic signal includes a first haptic effect space, and where the first haptic effect space includes one or more haptic effects that can be generated by a first haptic output device. The system further transforms the original haptic signal into a new haptic signal, where the new haptic signal includes a second haptic effect space that is different from the first haptic effect space, where the second haptic effect space includes one or more haptic effects that can be generated by a second haptic output device, and where data contained within the new haptic signal is based on data contained within the original haptic signal. The system further sends the new haptic signal to a haptic output device to generate one or more haptic effects.
US09245425B2	Produce lift apparatus A workstation includes a first window located in an upright plane, a second window located in a generally horizontal plane that intersects the upright plane, and a controller operative to read a barcode, and a weighing system having a horizontal platter operative to measure the weight of produce exerting gravitational force on the horizontal platter. The workstation also includes a four-bar apparatus having a front bar, a back bar, a first side bar, and a second side bar all atop the horizontal platter. The four-bar apparatus is operative to be settled into one of a first configuration and a second configuration. The upper edge of each of the front bar, the back bar, the first side bar, and the second side bar has an average height at the second configuration larger than its average height at the first configuration.
US09245422B2	Method of simultaneous indication of multiple winning combinations in a symbol matrix The present invention teaches novel methods for simultaneous indication of winning combinations in the symbol matrix. More specifically, the present invention simultaneously indicates all winning combinations formed by symbols appearing in symbol positions common to multiple pay lines. In a preferred embodiment, symbol positions common to multiple pay lines that display winning symbol combinations are simultaneously indicated to the player in a first manner. In addition, the remaining symbol positions for each of said multiple pay lines are simultaneously indicated in a second manner.
US09245421B2	Gaming system and method for providing a multiple dimension cascading symbols game A gaming system including a cascading symbol game which utilizes a plurality of adjacent symbol display position grids arranged at different depths. The multiple symbol display position grids at different depths provides that one or more of the symbols of at least a first symbol display position grid at a first depth are displayed to a player while one or more of the symbols of at least a second symbol display position grid at a second depth are not displayed to the player. When one or more symbols are removed from the first symbol display position grid at the first depth, before and/or after shifting the remaining displayed symbols from the first symbol display position grid into created empty symbol display positions of the first symbol display position grid, one or more symbols from the second symbol display position grid at the second depth become exposed.
US09245420B2	Gaming device having multiplier poker game A video poker gaming device, a method of operating a gaming device and a method of playing a poker game including a plurality of cards displayed to a player where the cards are drawn from a deck of fifty-two cards including at least one modifier card. The gaming device deals a first draw of the cards to form a player's hand. Any multiplier cards in the player's hand are replaced by a non-multiplier card. The gaming device enables the player to hold any of the cards in the hand and then determines if any winning card combinations are indicated by the non-multiplier cards in the hand. An award associated with any indicated winning card combinations is provided to the player. The award is multiplied by the multipliers associated with any multiplier cards in the player's hand.
US09245417B2	Mystery jackpot with restricted payout system and method therefor A mystery jackpot system having an restricted payout scheme allows a mystery jackpot to be incremented by player wagers in a rapid fashion while providing incentives to players to make larger wagers. The mystery jackpot system may have a primary jackpot pool and a secondary jackpot pool. The primary jackpot pool may be funded by eligible wagers, while the secondary jackpot pool may be funded by smaller ineligible wagers. The amount or value of the primary jackpot pool may be used to determine whether the mystery jackpot is active. For example, the mystery jackpot may be active and awardable only if the primary jackpot pool is above a particular amount and below a maximum amount. A player winning the mystery jackpot may be awarded both the primary and secondary jackpot pools. Only players making eligible wagers may win the mystery jackpot.
US09245412B2	Gaming system and method providing a game having a plurality of activatable award indicators Various embodiments of the present disclosure provide a gaming system and method providing a game having a plurality of activatable award indicators. Generally, in various embodiments, the gaming system enables a player to play any of a plurality of different games, each of which is associated with a different activatable award indicator of an award generator that is associated with a plurality of awards. For each different game, when a particular award indicator activation event occurs during play of that game, the gaming system activates the award indicator associated with that game. When an award determination triggering event occurs, the gaming system indicates a different award of the award generator for each active award indicator and provides the indicated awards to the player. The gaming system of the present disclosure thus enables the player to activate different award indicators through play of different games.
US09245411B2	Wagering game having game assets with multiple levels of enhancement A gaming system includes an input device, at least one display, and at least one controller. The input device receives a wager input for playing a wagering game. The at least one display displays a basic wagering game and a community bonus game. The at least one controller is operative to provide a player with a bonus-game asset that is usable in at least a first play of the community bonus game. The bonus-game asset is capable of having at least a first level and a second level that provides a higher bonus-game enhancement than the first level. The at least one controller is further operative to determine if that the bonus-game asset is available to the player for use in a second play of the community bonus game and to alter the level of the bonus-game asset from the first level to the second level for use in the second play.
US09245410B2	Funding and rewarding wagering game player accounts A wagering game system and its operations are described herein. In some embodiments, the operations can include transmitting an offer of a reward to deposit funds into a wagering game player account prior to initiating a wagering game session within a gaming venue, such as a physical gamine venue (e.g., a casino). In one example, the offer is transmitted to a computing device accessible outside the gaming venue. The operations can further include detecting player input associated with the offer, where the player input authorizes a transfer of the funds from a financial account for deposit into the wagering game player account. The operations can further include transferring of the funds specified via the player input from the financial account to the wagering game player account. The operations can further include assigning the reward to the wagering game player account in response to the transferring of the funds.
US09245409B1	System and method for communicating a gaming machine notification to a mobile device A system and method for communicating gaming machine information to a player is disclosed herein. The system includes a mobile communication device for the player, a server and a gaming machine at a venue. The gaming machine comprises a transceiver for receiving and transmitting short-range communication transmissions, and a maximum payoff event. The communication informs the player that the maximum payoff event for the gaming machine has not occurred and invites the player to visit the venue during the interval between visits.
US09245407B2	Gaming system and method that determines awards based on quantities of symbols included in one or more strings of related symbols displayed along one or more paylines Various embodiments of the present disclosure are directed to a gaming system and method for determining one or more awards based on quantities of symbols included in one or more strings of related symbols. The gaming system is configured to operate a game associated with a plurality of symbols each associated with one of a plurality of first characteristics and one of a plurality of second characteristics. The gaming system displays a plurality of the symbols. The gaming system determines whether a set of the symbols displayed along a payline path associated with a payline forms a string of related symbols. Symbols are related if the symbols share at least one of: (a) a same one of the set of first characteristics, and (b) a same one of the set of second characteristics. The gaming system determines any award based on a length of the string of related symbols.
US09245405B2	Cabinet system A cabinet system for securely storing items includes a cabinet housing, a controller, and at least one drawer unit. The cabinet housing has a locking mechanism, and the controller is in communication with the cabinet housing and configured to operate the locking mechanism. The drawer unit is designed to be releasably locked at least partially within the cabinet housing by the locking mechanism, and slidable within a portion of the cabinet housing when released by the locking mechanism. The drawer unit includes at least one storage compartment, a cover, memory, and a power source. The storage compartment is configured to store at least one item therein. The cover is movable to an open configuration and a closed configuration. When the cover is in the closed configuration, the cover limits access to the item of the storage compartment. The memory is powered by the power source and is configured to store data associated with a movement of the cover.
US09245404B1	Vending system with recyclable packaging having automated deposit and return Vending machines and dispensers, devices, apparatus, systems, and methods of providing and using a vending machine that dispenses goods in recyclable and reusable packaging having automated deposits and returns for the packaging. Customers purchase products such as firewood in recyclable containers having electronic tags from automated vending machines. Customers pay for the product at time of purchase along with an extra money deposit fee for using the recyclable container. Electronic activator tags fixably attached recyclable containers are detected when the containers are returned which triggers a sensor allowing for the deposits to be returned to the customer.
US09245400B2	Sensor and method for operating the sensor A sensor for checking value documents is arranged to carry out a self-test for testing its functionality. The sensor in the self-test reacts to at least one malfunction that is ascertained during the self-test and hinders the check of the value documents by the sensor automatically employing for checking the value documents, instead of the operating mode provided for checking the value documents. A modified operating mode employs at least one other measured value of the sensor for checking the value documents than is determined in the operating mode provided for checking the value documents. In contrast to the hitherto customary function failure of the sensor, the sensor can continue being operated for checking the value documents despite the malfunction.
US09245398B2	Interactive door system to provide door access to a user An interactive door system is able to validate a first user who seeks access through the door and simultaneously alerts a plurality of devices associated with a second user when the first user is present at the door. The system includes a base unit operably connected to the door and able to unlock a locking mechanism of the door. The base unit includes a monitor, a keypad, a speaker, a camera, a microphone, a biometric scanner, and a communication system able to simultaneously alert the plurality of devices associated with the second user when the first user is present at the door and allow the second user to engage in two-way voice or data communications between any one of the plurality of devices and the base unit. The system allows the second user to determine whether to provide door access to the first user.
US09245396B2	Method and system for providing intelligent alerts A system and method for providing intelligent alerts using data from sensors, mapping data, POI/events data, environmental data, and/or user data. The sensors may include a telematics control unit (TCU) on a vehicle, and the intelligent alerts may be based on a deviation in a pattern (of a user or of vehicles generally) or a new location traveled to by the user. Intelligent alerts may prompt a user to post a message on a social media network, to leave a review, or may simply provide information to the user. Intelligent alerts may be sent to users away from the vehicle, to users in the vehicle, or to the vehicle itself, such as on a vehicle display.
US09245392B2	Inspection system for vehicle and control method thereof An inspection system for a vehicle and a method thereof to inspect whether various electronic components mounted inside a completed vehicle may be normally operated, may include a wireless on-board diagnostics device (OBD) which may be mounted in the vehicle entering an inspection process, a plurality of inspection computers, which wirelessly communicates with the wireless OBD, and may be provided for each corresponding inspection step, and a barcode reader which may be provided in the inspection computers, recognizes a barcode of the vehicle, transmits a vehicle information about the vehicle, on which the inspection may be performed, to the inspection computers.
US09245388B2	Interactions of virtual objects with surfaces Embodiments are disclosed that relate to operating a user interface on an augmented reality computing device comprising a display system. For example, one disclosed embodiment includes displaying a virtual object via the display system as free-floating, detecting a trigger to display the object as attached to a surface, and, in response to the trigger, displaying the virtual object as attached to the surface via the display system. The method may further include detecting a trigger to detach the virtual object from the surface and, in response to the trigger to detach the virtual object from the surface, detaching the virtual object from the surface and displaying the virtual object as free-floating.
US09245386B2	Augmented reality system for product identification and promotion A system, method, and computer program product for automatically combining computer-generated imagery with real-world imagery in a portable electronic device by retrieving, manipulating, and sharing relevant stored videos, preferably in real time. A video is captured with a hand-held device and stored. Metadata including the camera's physical location and orientation is appended to a data stream, along with user input. The server analyzes the data stream and further annotates the metadata, producing a searchable library of videos and metadata. Later, when a camera user generates a new data stream, the linked server analyzes it, identifies relevant material from the library, retrieves the material and tagged information, adjusts it for proper orientation, then renders and superimposes it onto the current camera view so the user views an augmented reality.
US09245375B2	Active lighting for stereo reconstruction of edges Active lighting is provided for stereo reconstruction (30) of edges (11) of a Delta-8 bundle. Stereo images of a device with edges (11) are captured (24). The image capture (24) is repeated under different lighting conditions, such as illuminating (22) the edges (11) from different directions. The images from each viewing or capture direction are combined (28). The combined images are used to stereographically reconstruct (30) the edges (11).
US09245374B2	Space carving in 3D data acquisition Three-dimensional scanning is improved with the use of space carving to exclude certain scan results from processing and display. Using space carving techniques, a spatial matrix is maintained to store data on volumetric regions (or voxels) known to be empty. By excluding or modifying processing of outlier data from within these unoccupied voxels, a three-dimensional reconstruction process can achieve concurrent improvements in accuracy and speed. In addition, a real time display of scan results can be improved by modifying how such outliers are rendered.
US09245371B2	Global stores and atomic operations One embodiment of the present invention sets forth a method for storing processed data within buffer objects stored in buffer object memory from within shader engines executing on a GPU. The method comprises the steps of receiving a stream of one or more shading program commands via a graphics driver, executing, within a shader engine, at least one of the one or more shading program commands to generate processed data, determining from the stream of one or more shading program commands an address associated with a first data object stored within the buffer memory, and storing, from within the shader engine, the processed data in the first data object stored within the buffer memory.
US09245367B2	Computer-implemented system and method for building cluster spine groups A computer-implemented system and method for building spine groups is provided. Cluster spines, each having two or more clusters, are displayed. One or more candidate anchor clusters are identified for each of the cluster spines. Additional cluster spines are placed into the display by selecting one of the additional cluster spines and identifying one of the displayed cluster spines that is most similar to the selected additional cluster spine. A spine group is formed by grafting one of the clusters on the additional cluster spine to one of the candidate anchor clusters of the most similar cluster spine. An angle of the selected additional cluster spine is changed when the most similar cluster spine and the selected additional cluster spine exceed a maximum line segment.
US09245364B2	Portable device and display processing method for adjustment of images The present invention discloses a portable device and the display processing method thereof. The portable device comprises a first long side in the first dimension, a second short side in the second dimension, and a third side in the third dimension in the space, and the portable device comprises a first display unit in the plane formed by the first long side and the second short side. A first image is displayed on the first display unit. The display processing method comprises detecting the gesture operation of at least one side of the first long side, the second short side and the third side; generating an adjustment command according to the gesture operation; and adjusting the display effect of the first image according to the adjustment command.
US09245355B2	Method for encoding/decoding a 3D mesh model that comprises one or more components 3D mesh models are represented by three types of data: connectivity data, geometry data and property data. The surface of a 3D object is a triangle mesh. 3D meshes contain huge amounts of data that need to be compressed efficiently. Additionally to the common world coordinate system for the complete model and local coordinate system for a single triangle, an individual component coordinate system for each connected component is used. The component coordinate system is used to normalize the orientation of the respective component for quantization and de-quantization. This improves the accuracy of encoded 3D mesh models after quantization/de-quantization, particularly if a 3D mesh model comprises one or more distinct components.
US09245353B2	Encoder, decoder and method An encoder generating encoded data. The encoder comprising an analysis unit for analysing portions of data to be encoded, and for directing the portions to one or more encoding units, the encoding units are operable to encode the data portions to generate encoded data. The one or more encoding units are operable to employ mutually different encoding algorithms when encoding the one or more portions. At least one encoding unit of the one or more encoding units is operable to compute data values present in each portion received thereat, to sub-divide the data values into at least two sets, to compute at least one aggregate value for a given set derived from the data values present in the given set. A corresponding decoder for decoding data generated by the encoder executes an inverse of encoding steps employed in the encoder.
US09245350B1	Image-based color palette generation Systems and methods are provided for generating an image-based color palette based on a color image. A color palette can be a collection of representative colors each associated with a weight or other metadata. A color palette may be generated based on palette generation criteria, which may facilitate or control a palette generation process. Illustratively, the palette generation process may include image pre-processing, color distribution generation, representative color identification, palette candidate generation and palette determination. Representative colors with associated weight can be identified from a distribution of colors depicted by the color image, multiple palette candidates corresponding to the same color image can be generated based on various palette generation criteria, and a color palette can be identified therefrom.
US09245349B2	Method and apparatus for detecting edge in image A method and apparatus for detecting an image edge that detects an edge area from an input image is disclosed. The method of detecting the image edge includes removing noise of an input image, generating an intermediate image in which an edge area is accentuated based on the input image and the input image from which the noise is removed, determining a threshold value to be applied to the intermediate image through clustering the pixels of the intermediate image, and detecting an edge area from the intermediate image based on the threshold value.
US09245346B2	Registering of a scene disintegrating into clusters with pairs of scans A method for optically scanning and measuring a scene by a three-dimensional (3D) measurement device in which multiple scans are generated to then be registered in a joint coordinate system of the scene. At first at least one cluster is generated from at least one scan, further scans are registered for test purposes in the coordinate system of the cluster, and registering is then confirmed if specified quality criteria are fulfilled and the generated clusters are then joined, for which purpose pairs are formed of selected scans and/or clusters to form pairs, the pairs are registered for test purposes and registering is confirmed if appropriate.
US09245343B1	Real-time image geo-registration processing A geo-registration system with a camera receives an image of a scene, identifies features in the image, and computes vectors for each feature based on the known location and orientation of the camera. The system then compares the computed vectors to vectors associated with the same features identified in prior images. The geo-registration system then uses stochastic kriging techniques to create a geo-registration model based on the vectors.
US09245342B2	Obstacle detection device An obstacle detection device is provided, which includes a storage unit, a quasi-vertical edge detection module, an intersection determination module, a position determination module, and an obstacle detection module. The quasi-vertical edge detection module receives an input image and performs a quasi-vertical edge detection procedure on the input image to obtain a plurality of quasi-vertical edges. The intersection determination module determines whether the quasi-vertical edges intersect a predetermined virtual horizontal. If one of the quasi-vertical edges intersects the predetermined virtual horizontal, the position determination module determines whether an end of one of the quasi-vertical edges intersecting the predetermined virtual horizontal is located in a detection zone. If one end of one of the quasi-vertical edges intersecting the predetermined virtual horizontal is located in the detection zone, the obstacle detection module determines that an obstacle exists and issues a warning.
US09245339B2	Garment fitment system A computer-implemented method for determining a subject's fitment for a garment, has the steps of receiving a body type, receiving a body stance, receiving two or more photos of the subject comprising at least a side view photo and a front or rear view photo, determining the scale of each of the two or more photos, determining certain measurements from the two or more photos using the scale, and calculating further measurements from the determined measurements. The method may have the further steps of receiving one or more measurements comprising at least a height from the subject, and using the one or more measurements from the subject to determine a scale of each of the two or more photos. Alternatively, the scale of each of the two or more photos may be determined by a depth-sensing camera.
US09245336B2	Contour guided deformable image registration A method includes obtaining first volumetric image data, which is acquired at a first time, including a region of interest with a structural feature located at a first position. The method further includes obtaining second volumetric image data, which is acquired at a second different time, including the region of interest with the structural feature located at a second different position. The method further includes determining a registration transformation that registers the first and second volumetric image data such that the at least one structural feature in the first volumetric image data aligns with the at least one structural feature in the second volumetric image data. The registration transformation is based at least on a contour guided deformation registration. The method further includes generating a signal indicative of the registration transformation.
US09245334B2	Methods for quantitative assessment of volumetric image from a subject and uses therof Methods and systems are disclosed for assessing a quantitative image volume from an individual subject comprising comparing the image from the subject to images from a control group of subjects using voxel-wise comparison. The methods allow detection of pathologies or lesions in the individual subject being assessed.
US09245330B2	Image processing device, image processing method, and computer readable medium An image processing device for performing image processing on a facial image including a mouth of a person is provided, comprising a first organ likelihood identification unit configured to identify, based on a difference between a color of a location and a first representative color which is a representative color of an organ to be processed, a likelihood of the location being the organ as a first organ likelihood for each location of a first region including at least a part of the mouth; a first weight determination unit configured to determine a first weight which becomes smaller the greater a distance from a first location of the first region for each location; a correction degree determination unit configured to determine a correction degree of the location which becomes greater the greater the first organ likelihood and the first weight; and an image correction unit configured to correct an image.
US09245327B2	Method for reducing row and column noise in imaging systems A method for the reduction of noise in an image including identifying neighboring pixel values in pixels proximate to a subject pixel; comparing the neighboring pixel values to a preset tolerance range; using neighboring pixel values within the tolerance range to calculate a pixel intensity correction value; and applying the pixel intensity value to the subject pixel.
US09245325B2	Method and apparatus for generating image A method and an apparatus for generating images are provided. The method includes generating a first sinogram for a state of an object from among states of the object based on a motion of the object, and a second sinogram for the states, based on data obtained from the object, and determining a region of interest (ROI) of the object based on the first sinogram. The method further includes extracting, from the second sinogram, third sinograms corresponding to the ROI, and estimating motion information of the ROI based on the third sinograms. The method further includes correcting the data based on the motion information.
US09245322B2	Method and arrangement for suppressing noise in digital signal sequences and a corresponding computer program and a corresponding computer-readable storage medium The present invention relates to a method and an arrangement for suppressing noise in digital signal sequences, and to a corresponding computer program and a corresponding computer-readable storage medium, which can be used in particular to smooth and/or improve the signal-to-noise ratio in digital signal processing and in digital image processing. To this end, there is proposed a method for suppressing noise in digital signal sequences, wherein data values W0 of the signal sequence are transformed by evaluating data values Wi from an area around data values W0 to be transformed, characterized in that the number of data values Wi to be evaluated for the transformation of a data value W0 is determined individually for at least some of the data values W0 to be transformed.
US09245316B2	Image processing device, image processing method and non-transitory computer readable medium There is provided an image processing device including: a motion vector acquirer, a position generator, a weight calculator and an image generator. The acquirer acquires motion vectors with respect to a reference frame for pixels of an input frame. The position generator generates first position information indicating a position on a first frame on a basis of position information in the input frame and the motion vector of the pixel, for each pixel of the input frame. The calculator calculates a weight depending a distance from the position indicated by first position information to a pixel of the first frame, for each pixel of the first frame. The generator calculates an output pixel value, for each pixel of the first frame, on a basis of the weight and a pixel value of the pixel in the input frame, to generate an output frame.
US09245314B2	Video camera Embodiments provide a video camera configured to capture, compress, and store video image data in a memory of the video camera at a rate of at least about twenty three frames per second. The video image data can be mosaiced image data, and the compressed, mosaiced image data may remain substantially visually lossless upon decompression and demosaicing.
US09245313B2	Semiconductor device, electronic apparatus, and image processing method A semiconductor device 1 includes an image input unit 11 and an image output unit 12. The image input unit 11 receives first image data from a camera 91 and outputs second image data to a memory unit 93 through a shared bus 130. The image output unit 12 receives the second image data stored in the memory unit 93 through the shared bus 130 and outputs third image data to a monitor 92. The third image data is generated by performing an affine-conversion on the first image data. Magnification processing in the affine-conversion is not performed in the image input unit 11. In this way, it is possible to provide an excellent semiconductor device suitable for image processing or the like.
US09245311B2	Display apparatus actuators including anchored and suspended shutter electrodes This disclosure provides systems, methods and apparatus for actuating an electromechanical systems (EMS)-based light modulator. An actuator for an EMS-based light modulator can be formed from the combination of a drive electrode, an anchored shutter electrode, and a suspended shutter electrode. A parallel plate portion of the drive electrode along with the suspended shutter electrode form a parallel plate portion of the actuator. A zipper portion of the drive electrode and the anchored shutter electrode form a zipper portion of the actuator.
US09245295B2	Call to action lockout system and method A Call-To-Action Lockout on a mobile device coupled to a data network is disclosed as a method and apparatus comprising providing a media application configured to respond to a control point associated with media content, providing media content which has at least one associated control point, triggering at least one control point while experiencing the media content; and performing an appropriate Call To Action Script (CTAS) in response to the triggered control point.
US09245293B2	Goods and services purchase supporting apparatus, method and information storage medium The goods and services purchase supporting apparatus includes an identification information acquiring unit (30) to acquire an image of a medium on which a marker indicative of identification information of goods or services is presented, the medium being presented to a customer in association with the goods or the services, and acquire the identification information from the marker represented on the acquired image of the medium, a discount information acquiring unit (34) to acquire, from a storing unit (32) to store discount information applicable to the goods or the services in association with the identification information of the goods or the services, the discount information that is associated with the identification information acquired by the identification information acquiring unit, and an arranging unit (36) to arrange display information, which is based on the discount information acquired by the discount information acquiring unit, with the image of the medium.
US09245287B2	Method for providing support with associates anywhere and notifications According to one embodiment, a self-service system is to provide self-support knowledgebase (KB) information to allow users to navigate the self-support KB. A monitor is to track user interaction with the self-support KB while a user navigates through the self-support KB. A support service system is to receive a request from the first mobile device of the first user to request a live support service and in response to the request, the support service system is to identify a set of skills required to handle the first product currently navigated by the user. An agent manager to select a support agent having a skill set satisfying the identified skill set. A communications and routing system coupled to the support service system to establish session video chat communications session between the mobile devices of the user and the selected agent.
US09245286B2	Mesh platform utility computing portal A utility computing portal supports public and private modules for application development in a cloud computing environment. The public modules support downloads, customer support and access to a development community. The private modules are accessible to users with valid login credentials or those authenticated via a related entity, such as a Live ID. The private modules may include modules for testing, analysis, and billing. The utility computing portal also supports access to application configuration, for example, allowing a manager to change the number of front end and backend physical/virtual machines available to various application roles.
US09245284B2	Application of dynamic tokens A method assigns token requirements to service subscriptions in a service platform, such as a service platform containing entities or a database containing a plurality of said entities. The operator of the service platform establishes customization factors and maintains records reserving data services associated with token requirements for delivery to entities. In addition, customization factors are determined from values representing information associated with objects in a database. Token requirements associated with data services are calculated from one or more formulas utilizing customization factors. Sponsorships associated with the entities can be accepted by the service platform. The service platform can apply credit toward the fulfillment of token requirements. An entity can be provided a data service based on a relationship with a sponsorship such that an entity assigned a subscription having a token requirement fulfilled as a result of applying credit from a sponsorship will receive services related to the subscription.
US09245275B2	Relevance analysis device, relevance analysis method, and relevance analysis program Relevance analysis devices, methods, and programs analyze a mutual relevance between a plurality of users utilizing a server that allows users to view information provided by target viewed users. The devices, methods, and programs specify an analysis reference user and an analysis target user. The devices, methods, and programs specify a route that spans between the analysis reference user and the target viewed user, and specify a mutual relevance between the analysis reference user and the analysis target user based on a number of component routes that make up the specified route and based on a number of the component routes in which an origin-side user is registered as a target viewed user by an end-side user.
US09245274B2	Identifying selected dynamic content regions Selected regions in dynamic content may be identified. Analytics data may be received that may include a region identifier corresponding to a region from which a selectable element was selected from the content. It may be determined that the analytics data corresponds to a current region of a current version of the network content. Analytics data, which may include a region identifier, may be generated in response to a selection of a selectable element of content located within a region of network content.
US09245269B2	Unattended retail systems, methods and devices for linking payments, loyalty, and rewards Methods for generating a consumer profile. The method may include receiving a purchase authorization request including a card number from a consumer, generating, with a key module, a hash value of the card number and generating, at the server, a card identifier. The method may also include associating the generated card identifier with the generated hash value, storing, at a server database, the associated card identifier, and associating, with a processor, the card identifier with the consumer profile.
US09245267B2	Portable account number for consumer payment account A system, apparatus, and method for providing and using a payment account or payment device identifier when conducting a transaction. The bank identification number (BIN) is decoupled from the primary account number (PAN) or other form of device identifier when generating the payment account or payment device identifier. The payment account or payment device identifier is used to access information regarding the issuer, with that information being used to route a transaction authorization request message to the appropriate entity.
US09245263B2	Systems and methods for scripted content delivery The present subject matter relates generally to systems and methods for adding interactive functionality to a website, other digital media objects, and computer processor applications. Systems and methods for adding functionality to a web page served by a first web-server, may include receiving, at a second web-server, a request from a client-computer for code to add purchase functionality to the web-page. The code may be sent to the client-computer based on the request. A further request may be received from the client-computer containing information about objects identified in the web-page as relating to the purchase functionality and a request for information about the objects. Information about the objects may be sent to the client-computer based on the further request. An instruction to complete the purchase may be received from the client-computer, and a confirmation of the completion of the purchase may be sent to the client-computer. The web-page may be an HTML document and the objects may be objects according to the HTML Document Object Model.
US09245262B1	Systems and methods for bookmark payment processing The invention provides a method and system that performs transaction processing using a payment bookmark that is associated with a user bookmarked link. The system includes a computer processor constituted by a communication portion; a database; and a bookmark processing portion. The communication portion interfaces with the user to input selection of a payment bookmark, and upon selection of the payment bookmark, the computer processor invoking the bookmark processing portion, and the payment bookmark being mapped to the user bookmarked link (UB link) stored in the database. The UB link is constituted by UB link data, and the UB link data including core link data. The bookmark processing portion performs processing to retrieve available transaction data to append to the core link data of the UB link. The bookmark processing portion outputs the UB link including the UB link data to a server over a network.
US09245261B2	Automatic receipt logging and notifications for transactions Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium, and include a method for managing and processing receipt information including identifying a user associated with a transaction; receiving a receipt for the transaction from a merchant system or a payment source used to fund the transaction; logging the receipt in a database associated with the user; providing an acknowledgement to an entity associated with the transaction and providing a notification of the transaction to a device associated with the user.
US09245260B2	Data copyright management Embodiments of methods, apparatuses, devices, and/or systems for data copyright management are described. According to one embodiment of this disclosure, data copyright management may include displaying, storing, copying, editing, and/or transferring digital data. According to an embodiment, data copyright management may include protecting digital data copyrights. Various embodiments of this disclosure may use cryptographic keys to implement portions of the data copyright management disclosed.
US09245258B2	System and method of electronic interpersonal communication A system and method of electronic interpersonal communication includes receiving a selection of a recipient for communication. A user profile for the selected recipient is accessed. The user profile includes a plurality of communication traits of the selected recipient. A graphical display presents at least one communication trait of the selected recipient from the user profile. An electronic communication to the selected recipient is received. The electronic communication is sent to the selected recipient.
US09245256B2	Assigning and managing reviews of a computing file Embodiments of the present invention disclose a method, computer program product, and computer system for managing reviews of a computing file. The method includes a computer receiving a computing file, the computing file containing software program functions. The computing system receives a list of one or more reviewers to review the computing file. The computer parses the computing file by function. The computer receives an assignment of at least one of the one or more reviewers to at least one function within the computing file. The computer sends a request to review the computing file to the at least one of the one or more reviewers assigned.
US09245251B2	Managing electronic sticky notes System, method and program for managing electronic sticky notes. At a first workstation, a user defines content of an electronic sticky and specifies one or more workstations to receive and display the electronic sticky note. The first workstation sends to a server, via one or more networks, a definition of the electronic sticky note and the specification of the one or more workstations to receive and display the electronic sticky note. The server sends a request, via one or more networks, to the one or more workstations to display the electronic sticky note. The request includes a definition of the electronic sticky note. The server can verify that the one or more workstations are currently on line and/or verify that the user is authorized to send the electronic sticky note to the one or more workstations.
US09245249B2	General, flexible, resilent ticketing interface between a device management system and ticketing systems Systems and methods of the present disclosure facilitate synchronizing data between a device management system and ticketing systems. In some embodiments, the system includes an update module, a mapping module, and a service board selection module. The update module may be configured to update ticketing information about a ticketing ticket on the ticketing system to match device management information about a device management ticket on the device management system. The mapping module may be configured to select a ticket category for a device management ticket on the device management system responsive to the device management information about the device management ticket. The service board selection module may be configured to select a service board for a ticketing ticket on the ticketing system.
US09245246B2	Capacity over-commit management in resource provisioning environments Systems and methods for managing capacity over-commitment in a resource provisioning environment. The method comprising collecting historical data about capacity usage in a resource provisioning environment and failure statistics from an operational database, in addition to prior service commitments due to previously contracted service level agreements (SLAs) stored in a SLA repository; calculating equivalent capacity for the resource provisioning environment based on a defined residual benefit goal, and other business goals instrumented by way of a policy engine; and determining whether placing requested virtual resources on one or more hosts is feasible taking into account anti-collocation constraints that prohibit placement of two or more virtual resources on same host.
US09245245B2	Managing semantic data in a contextual workspace Techniques for managing a virtual workspace include: generating a virtual workspace viewable by a user on a graphical user interface, the virtual workspace comprising a plurality of workspace modules comprising data contained in a plurality of data objects; identifying an interaction by the user with at least some of the data contained in a particular data object of the plurality of data objects; and providing, through the virtual workspace, at least one suggestion comprising a description of data contained in the plurality of data objects that is semantically related to the data interacted with by the user.
US09245243B2	Concept-based analysis of structured and unstructured data using concept inheritance In one embodiment, a method comprises defining a set of concepts based on a first set of structured and unstructured data objects, defining a business rule based on the set of concepts, applying the business rule to a second set of structured and unstructured data objects to make a determination associated with that set, and outputting to a display information associated with the determination.
US09245242B2	Aircraft status timeline An apparatus, and an associated method, provides a visualization of an aircraft status relative to a scheduled airline timeline for the aircraft. Input information associated with the aircraft and operations associated therewith, are provided and detected. The input information is used to generate a timeline having one or more milestones and an aircraft icon. The timeline and the aircraft icon are together displayed by a displayer. The visualization is viewable by airline personnel, permitting their viewing of the visualization.
US09245241B2	Methods, systems and computer program products for planning resources based on primary and alternate location relief strategies In a computer-based method of planning resources, a plurality of Location Relief Strategy (LRS) plan data sets are imported into a resource planning application. The LRS plan data sets are associated with a resource need. One of the LRS plan data sets is defined as a primary LRS plan and at least one other one of the LRS plan data sets is defined as an alternate LRS plan. A resource plan is generated within the resource planning application based on the primary LRS plan and the alternate LRS plan. The primary LRS plan and the alternate LRS plan may each correspond to a plan for at least one of installing and retiring resources in a geographic area. The resources may, for example, be resources for carrying telecommunications in a geographic area.
US09245239B2	Method for organizing a manufacturing or assembling process A method and system for organizing a process having a plurality of operations is described. The process can be a manufacturing or assembly process. Some sequences of operations in the process are unfeasible. The method includes ordering the various operations of the process in a sequence by iteratively performing via a computer environment the acts of adding information on either a mandatory or an allowable sequence between two operations, and determining from the information on the sequence between the two operations further information on mandatory or allowable relations between operations of the plurality of operations, until all relations between couples of operations of the plurality have been determined. The method further includes organizing the process compliant with the set of relations obtained in the ordering via the computer environment.
US09245227B2	Expert answer platform methods, apparatuses and media A plurality of questions may be obtained for an AMA session. A priority for each of the plurality of questions may be calculated and a question to be answered from the plurality of questions may be determined based on question priority associated with each of the plurality of questions. An expert associated with the AMA session may be presented with the question. An answer to the question may be received from the expert associated with the AMA session and showing the answer to AMA participants may be facilitated.
US09245224B2	Optimally configuring an information landscape According to an embodiment of the present invention, a system optimizes an information processing environment, and comprises at least one processor. The system collects information pertaining to operational behavior of the information processing environment and including a plurality of parameters. A neural network structure is established to associate the parameters to a desired operational performance characteristic for the information processing environment. The neural network structure is trained with the collected information from the information processing environment to produce a model for the information processing environment. The model is optimized to determine values for the parameters and the information processing environment is adjusted based on the determined parameter values to attain the desired operational performance of the information processing environment. Embodiments of the present invention further include a method and computer program product for optimizing an information processing environment in substantially the same manner described above.
US09245221B2	Radio frequency identification sensor assembly In accordance with one embodiment, an RFID sensor assembly comprises an RFID chip, an antenna, a sensor, a substrate, and a laminated layer. The RFID chip is in electrical communication with the antenna and the sensor. The RFID chip, antenna, and sensor are secured to the substrate. The laminated layer is arranged as to create a generally airtight pouch between the substrate and the laminate layer. The laminated layer is further arranged to facilitate a post manufacturing method for exposing the contents of the pouch to the environment surrounding the RFID sensor assembly.
US09245220B2	Payment card and methods One variation of a payment card includes: a sheet comprising first and second icons; a transducer configured to output a voltage in response to an impulse on the sheet; a wireless communication module; a first input region adjacent the first icon; a second input region adjacent the second icon; a magnetic stripe emulator; and a processor configured to transition from a passive state to an active state in response a voltage output from the transducer, to receive a first magnetic sequence command associated with a first payment method and a second magnetic sequence command associated with a second payment method, to assign the first payment method to the first input region and the second payment method to the second input region, to receive a selection for the second payment method from the second input region, and to control the magnetic stripe emulator according to the second magnetic sequence command.
US09245212B2	Printing system and printing method wherein print data formed by print data forming device are printed by printer apparatus A printing device, a printing system, a program, and a printing method for improving security and user-friendliness are disclosed. The printing system (1) includes PC (10-1) and printer devices (20-1 to 20-N) connected via LAN (50). The PC (10-1) has a printing data forming unit (111) for forming print data according to a user instruction, a print data transmission unit (113) for transmitting the formed print data to the printer devices (20-1 to 20-N), a communication unit (17). The printer devices (20-1 to 20-N) have an external storage device (23) for storing received print data, an input unit (26) for inputting a user print instruction and a user identifier, a card reader (24), a print data management unit (212) for reading out print data corresponding to the user identifier from the external storage device (23), a printer engine (28) for performing printing according to the print read out data.
US09245211B2	Image processing apparatus, method of controlling the same, and program An image processing apparatus includes a deciding unit configured to decide an attribute of each pixel contained in a bitmap from received print commands for printing a plurality of objects, a determination unit configured to determine whether each pixel of the generated bitmap is an edge pixel or not, and a changing unit configured to change the decided attribute of each pixel based on a result of the determination of whether the pixel is an edge pixel or not. The bitmap may be generated by drawing the plurality of objects.
US09245209B2	Dynamic bleed area definition for printing of multi-dimensional substrates A method of defining a three-dimensional structure having multiple facets, such as a package, identifies an image that is to be printed on a first facet. It also identifies a second facet of the package that has a functional relationship with the first facet, determines whether the functional relationship is that of a crease, an edge, or another functional relationship, and automatically defines a bleed area by accessing a rule set and applying the rule set to the determined functional relationship. The bleed area includes an area in which the first image will be printed and that is outside of the location of the first facet.
US09245207B2	Differentiating abandoned and removed object using temporal edge information Disclosed is a computer-implemented method for classifying a detected region of change of a video frame as indicating an abandoned object or a removed object, the detected region of change is classified as an removed object if the temporal change of the edge consistency is from a more consistent state to a less consistent state, and the detected region of change is classified as an abandoned object if the temporal change of the edge consistency if from a less consistent to a more consistent state.
US09245204B2	Method and system for comparing images A method comparing first and second images, including: identifying and matching first and second keypoints in the first and second images; arranging a distribution of values of a calculated plurality of first distance ratios in a histogram; determining a number of correct keypoint matches, including: determining a matrix, each matrix element corresponding to a respective pair of keypoint matches with a value corresponding to a difference between a value of the histogram including a distance ratio of the respective pair of keypoint matches and an outlier probability density value weighted by a parameter; determining the parameter value such that the matrix dominant eigenvector is equal to a vector with a first value if the pair of keypoint match is correct and a second value if the pair of keypoint match is incorrect; determining the number of correct keypoint matches based on the dominant eigenvalue associated to the dominant eigenvector.
US09245201B1	Method and system for automatic registration of images A computer-implemented method and system register plural images using a computer processor and computer memory, where computer code stored in the computer memory causes the computer processor to perform the registration. The registration includes receiving a reference image; receiving a sensed image; computing an approximate image transformation between the reference image and the sensed image; finding plural candidate tie points by utilizing template matching; applying radiometric filtering to at least a portion of the plural candidate tie points; applying geometric filtering to at least a portion of the plural candidate tie points; computing a calculated image transformation using candidate points of the plural candidate points that were not filtered out by the radiometric and geometric filtering; transforming the sensed image using the calculated image transformation; and registering the sensed image with the reference image.
US09245200B2	Method for detecting a straight line in a digital image An embodiment is a computer-implemented method for detecting a straight line in a digital image comprising a plurality of pixels comprising the steps: detecting an edge in the digital image, generating a first straight line which passes through a first pixel of the detected edge, generating a second straight line which passes through a second pixel of the detected edge, which is different from the first pixel, determining at least two intersections with a boundary of the digital image for each generated straight line, determining a set of two parameter values for each generated straight line based on the respective determined at least two intersections, wherein the set of two parameter values uniquely determines the respective generated straight line, and detecting the straight line in the digital image based on the determined sets of two parameter values.
US09245199B2	Image processing apparatus and image processing method A plurality of images obtained by capturing a recognition target object from different viewpoint positions is acquired, and a portion set on the recognition target object in the image is received as a set portion for each of the images. A plurality of feature points is set in each of the images so as to set a larger number of feature points at the set portion than at an unset portion other than the set portion. The recognition target object is learned using image feature amounts at the feature points.
US09245194B2	Efficient line detection method An efficient line detection technique pre-processes an image to remove edge pixels that are not on straight lines, before performing line detection. By removing edge pixels not on straight lines, the complexity of the task of line detection can be significantly reduced, while increasing the accuracy. Various embodiments preprocess the edge maps of an image by anisotropic line filtering, kernel density estimation-based edge pruning, and connected component analysis. The resulting pruned edge map may then be processed using a Hough transform to detect straight lines in the image, having removed much of the noise in the edge map.
US09245192B2	Ad collateral detection A method including transmitting an image from a camera of an apparatus, where the image includes one or more Ad collateral; and automatically detecting by the apparatus at least one of the Ad collateral in the image. An apparatus including at least one processor; and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus at least to automatically discern at least one Ad collateral in a camera image.
US09245190B2	Biometric notification system A biometric notification system compares images or indicia of images and where there is a match provides a notification of the same.
US09245183B2	Geographical area condition determination A method and system for mapping the conditions of locations is provided. The method includes retrieving image data associated with a plurality of locations within a specified geographical area. The image data is compared to a plurality of stored image data that includes baseline measurement values associated with an expected condition level of baseline locations within a baseline geographical area. Condition score values associated with the plurality of locations are calculated. The condition score values indicate real time condition values associated with the plurality of locations. An overall condition score value associated with the specified geographical area is generated. A map indicating the overall condition score value is generated.
US09245180B1	Body modeling and garment fitting using an electronic device Methods and systems for generating a size measurement of a body part of person for fitting a garment include providing photographic data that includes images of the body part and using feature extraction techniques to create a computer model of the body part.
US09245179B2	Driver recognition system and recognition method for vehicle A driver recognition system for a vehicle includes a camera taking an image of a driver's foot, and a central processing unit receiving image information from the camera, analyzing the image information, and delivering a signal in accordance with an analyzed result. A control unit is installed to receive the signal delivered from the central processing unit and output a control command so as to set a driving environment and a driving mode in accordance with the received signal. A control execution unit operates in accordance with the command received from the control unit, and an operator set in accordance with the operation of the control execution unit.
US09245178B2	Biological information obtaining apparatus and biological information collating apparatus An obtaining unit of a biological information obtaining apparatus obtains biological information for authentication, and an extracting unit extracts first feature information from biological information for authentication. A generating unit of a biological information collating apparatus generates encrypted position correction information, and encrypted position correction information is transmitted to the biological information obtaining apparatus. A correcting unit decrypts encrypted position correction information to obtain position correction information, and by correcting first feature information, performs alignment between first feature information and second feature information extracted from biological information for registration. A transforming unit transforms corrected first feature information, and transmits transformed first feature information to the biological information collating apparatus. A collating unit collates transformed first feature information and transformed second feature information stored in a storing unit, and transmits a collation result to biological information obtaining apparatus.
US09245174B2	Human facial identification method and system, as well as infrared backlight compensation method and system A human facial identification method and system are disclosed, which belong to the mode identification technical field and intend to improve veracity of human facial identification implemented in outdoor environment. The human facial identification method includes: driving a group of infrared lamps by a high frequency pulse signal to generate infrared backlight, collecting identified human facial features in irradiation of the infrared backlight, comparing the collected identified human facial features with a human facial template to complete the human facial identification. A human facial compensation method and system are also disclosed, which are intend to improve luminance of infrared backlight. The technical solutions are mostly applied to the human image identification field.
US09245170B1	Point cloud data clustering and classification using implicit geometry representation An image processing system comprising a data repository and an image processor. The data repository is configured to store image data. The image processor is configured to place the image data into a three-dimensional mesh. The image processor is further configured to identify vectors of the image data in the three-dimensional mesh. The image processor is further configured to identify a number of clusters in the vectors of the image data in the three-dimensional mesh.
US09245168B2	Authentication apparatus, authentication program, and authentication method An authentication apparatus performs identity authentication by comparing and matching image information of a palm captured by a sensor unit with a preliminarily registered template. A surface information correcting unit corrects concavity/convexity of a palm surface for surface information that allows the concavity/convexity thereof to be evaluated. The surface information is extracted by a surface information extraction unit from the image information obtained by capturing the palm. When the surface information is not corrected by the surface information correcting unit or not used for authentication by an authentication unit even after correction, the authentication apparatus newly obtains image information of the palm. Correction by the surface information correcting unit reduces opportunities for the authentication apparatus to perform notification to guide the palm to a proper posture.
US09245167B2	Fingerprint sensors A sensor for detecting fingerprints is provided having first and second substrates, a two-dimensional array of sensing elements formed on the first substrate, and a plurality of thin-film transistors or TFTs for controlling the sensing elements at pixel locations along the array. Each of the sensing elements detects one of electrical signals (e.g., capacitance, resistance, or impedance), temperature, or light via one of the first or second substrates representative of one or more fingerprints. The top of the second substrate or the bottom of the first substrate may provide a platen upon which one or more fingers can be disposed. The sensor may be utilized in a fingerprint scanner having one or more processors driving sensing elements or reading from sensing elements analog signals representative of one or more fingerprints, and generating an image representative of the one or more fingerprints from the analog signals.
US09245164B2	Biometric authentication device and method A biometric authentication device uses IR-VCSELs as light sources for performing a better biometric authentication by providing clearer images. A light guide module is introduced to minimize the size of the device. Moreover, the biometric authentication device uses a single image sensing module to gather the vein image and the fingerprint image into the same detection signal which is then analyzed and compared with the pre-stored vein feature data and fingerprint feature data. Therefore, the biometric authentication device can achieve an approach in lowering hardware costs, simplifying circuit designs and providing an outstanding performance.
US09245162B2	Device for reading/writing RFID tags and collection terminal comprising such a device A device is provided for reading/writing at least one RFID tag carried by at least one object, including: at least one depositing cavity, for receiving the at least one object, said depositing cavity including: at least one bottom wall and at least one side wall; at least one RFID reading/writing means; and at least one insertion aperture, for depositing objects in the depositing cavity, formed substantially in a top part of the depositing cavity; at least one protective wall, arranged around the insertion aperture, extending upwards from the insertion aperture and attenuating waves between the depositing cavity and the outside; and at least one access opening, for accessing the insertion aperture through the at least one protective wall. A collection terminal using such device is also provided.
US09245158B2	Low power radio frequency communication A method, system and tag for low power radio frequency communication are described. In one embodiment, the RF tag comprises: a radio, an energy harvesting unit operable to convert incident RF energy to direct current (DC), a storage unit to store recovered DC power, one or more sensors for sensing and logging data, and a microcontroller coupled to the energy harvesting and storage units, the one or more sensors and the radio, the microcontroller operable to wake up from a sleep state and cause the radio to communicate, sensed data from at least one of the one or more sensors while powered by energy previously harvested and stored by the energy harvesting and storage unit.
US09245156B2	Process for capturing and transmitting window screen display data A process is disclosed for capturing screenshots on an electronic device of a user, and for transmitting representations of the captured screenshots to a monitoring system for storage. The captured screenshot data may, for example, be used to recover a device that is lost or stolen.
US09245152B2	Method for authenticating a storage device, machine-readable storage medium, and host device A method for authentication, by a host device, of a storage device having a plurality of unit storage areas comprises acquiring information on the distribution of locations of defect referenceive areas to be used for uniquely identifying the storage device, sampling the unit storage areas of the storage device, identifying the distribution of locations of physically defective areas among the sampled areas, determining the similarity between the acquired distribution of locations and the identified distribution of location, and authenticating the storage device according to the result of the determination.
US09245148B2	Secure storage and accelerated transmission of information over communication networks A system and method for securely obfuscating, storing, and transmitting digital information includes a computing device configured to parse at least a portion of one or more bit streams to form a plurality of first datasets. The computing device is configured to disperse the plurality of first datasets into multiple data blocks to form t volumes as part of a plurality of second bit streams such that m number of volumes contain a complete data set, wherein m
US09245147B1	State machine reference monitor for information system security A method and system for securing operating domains. The method includes receiving a captured communication, generating an event data record corresponding to the captured communication, where the event data record identifies a source system of the captured communication, a destination system of the captured communication, and an action to be performed at the destination system, where the action is obtained from the captured communication. The method further includes identifying a first state of an operating domain, where the state is a current active state of the operating domain and is associated with a state entry, making, using the state entry, a determination that the action is not permitted while the operating domain is in the state, and based on the determination, performing a state fault action.
US09245146B2	Information processing device for detecting an illegal stored document, illegal stored document detection method and recording medium The present invention provides an information processing device which can detect illegal authorization setting efficiently in a short period of time. The information processing device includes a database which stores electronic documents, a means for storing rank values of users of the database, a means for storing the authorization degree of an electronic document or an electronic document group and authorization degrees of respective document classes of the database, a means for analyzing the electronic documents and combining together documents having mutual similarity in a degree equal to or higher than a certain level into a similar document group, and a means for analyzing authorization degrees of respective document classes in the database with reference to the rank values of the users, and thus detecting an electronic document or an electronic document group whose authorization setting is improper.
US09245145B2	Methods and systems for regulating database activity Methods and systems are provided for regulating access to a database by a server. One exemplary method involves the server receiving one or more requests for an activity with respect to the database and determining an attempted usage for the activity over a monitoring period by a source of the requests. When the attempted usage exceeds an allowed usage of the activity for the monitoring period, the server provides a human verification test to the source and thereafter initiates the activity with respect to the database in response to receiving a satisfactory human verification response to the human verification test from the source.
US09245142B2	Access control data editing support device and method A computer-readable, non-transitory medium recording an access control data editing support program for causing a computer to implement a procedure. The procedure includes changing log information containing a record having an authorization result of first access authorization determined based on access control data and a content utilized for determining the first access authorization every time an access agent accesses an access target, and changing the access control data based on the changed log information, and determining second access authorization by applying the changed access control data to the content utilized for determining the first access authorization indicated by the log information and generating determination result information containing an authorization result of the second access authorization and a content utilized for determining the second access authorization.
US09245140B2	Secure data encryption in shared storage using namespaces A data storage device in a distributed computing system has physical block addresses that are each allocated to multiple namespaces. To access the data storage device, a host system issues a command to the data storage device that includes an access key and a virtual block address to be accessed. The data storage device converts the virtual block address to a physical block address of the data storage device using a mapping associated with the access key. Access to a physical data block associated with a particular namespace is granted only if an access key for that namespace is provided to the data storage device.
US09245134B2	System and method for transmitting image data Provided are a unit that only outputs notification in the case where users having access have been added, a unit that saves image data in a restricted access save area without outputting notification, and a unit that outputs notification in a case where a specific pattern such as copyright information or confidential information was included in an original document that was read, and the user is notified by a combination of any of these three units.
US09245133B1	Authentication method and system The present invention provides a method and apparatus for the production and labeling of objects in a manner suitable for the prevention and detection of counterfeiting. Thus, the system incorporates a variety of features that make unauthorized reproduction difficult. In addition, the present invention provides an efficient means for the production of labels and verification of authenticity, whereby a recording apparatus which includes a recording medium, having anisotrophic optical domains, along with a means for transferring a portion of the recording medium to a carrier, wherein a bulk portion of the recording medium has macroscopically detectable anisotrophic optical properties and the detecting apparatus thereon.
US09245132B1	Systems and methods for data loss prevention A computer-implemented method for data loss prevention may include (1) identifying a network configured with a data loss prevention system, (2) identifying a file subject to a data loss prevention assessment within the network, (3) identifying an origin of the file, (4) determining that the origin of the file is outside the network, and (5) determining that the origin of the second file does not contain sensitive information intended to be protected by the data loss prevention system. Various other methods, systems, and computer-readable media are also disclosed.
US09245131B2	Multi-user universal serial bus (USB) key with customizable file sharing permissions A method, data storage device and computer program product for having multiple users share a single data storage device securely. A data storage device, such as a Universal Serial Bus (USB) key, is plugged into a computing device. A USB controller of the USB key recognizes the computing device and creates an account for the user. The created account is associated with the user as well as associated with the computing device. Data uploaded to the USB key by the user is then associated with the created account. Only that user will be able to view that data on his/her computing device (computing device associated with the created account) unless the user indicates to share that data with other users. Such a process may be repeated each time the USB key is plugged into a different computing device thereby creating multiple accounts associated with multiple computing devices and users.
US09245128B2	Limiting enterprise applications and settings on devices Installing apps and setting configuration on a device. A method includes receiving user input. The user input indicates a level of control that a user is willing to give an enterprise over the device. The method further includes determining, based on the level of control indicated by the user input, a set of apps allowed to install on the device. The set of apps allowed to install on the device is limited by the level of control indicated by the user. The method further includes authorizing installation of the set of apps on the device while restricting installation of other apps that would be authorized had the user selected a different level of control that the user is willing to give the enterprise over the device.
US09245125B2	Duleak: a scalable app engine for high-impact privacy leaks Systems and methods are disclosed for protecting privacy in an application software (app) by detecting application repacking; detecting application tainting, including: detecting descrying information leakage; detecting vulnerability espial; and detecting a privacy leak.
US09245115B1	Determining risk exposure and avoiding fraud using a collection of terms Classification of electronic communications includes receiving an electronic communication, evaluating the received communication against a collection of terms, and classifying the received communication based at least in part on the evaluation. The collection of terms is representative of a particular strategy of an attacker. The evaluation includes determining a presence of a portion of the collection of terms in the electronic communication.
US09245112B2	Apparatus and method for managing entitlements to program code A method, apparatus and machine readable medium are described for managing entitlements on a computing device. For example, one embodiment of a method comprises: loading a first application into a system memory of a computing device; for each library value/symbol pair referenced by the first application, determining whether the first application has a correct entitlement to be linked with the library value/symbol pair; wherein if the application does not have the correct entitlement associated with the library value/symbol pair, then denying linking to the library value/symbol pair and/or linking the application to an alternate library value/symbol pair which does not have the entitlement associated therewith; and if the application has the correct entitlement associated with the library value/symbol pair, then linking the application to the library value/symbol pair with the entitlement in the system memory.
US09245110B2	Stack entry overwrite protection A computer processor receives a plurality of execution items corresponding to a computer process. The computer processor allocates a first memory portion corresponding to a first stack, wherein the first stack corresponds to a first class of execution items. The computer processor allocates a second memory portion corresponding to a second stack, wherein the second stack corresponds to a second class of execution items. The computer processor identifies a first execution item of the plurality of execution items and determining a class corresponding to the first execution item.
US09245107B2	Systems and methods for determining a strength of a created credential Devices, systems, and methods for determining a strength of a created credential are provided. The device includes one or more processors configured to decompose a created credential into credential components, parse the credential components using a limited dictionary, determine a probability of the credential components using a limited ruleset, and calculate a score of the created credential based on the determined probability. The device also includes a memory, the memory storing the limited dictionary and the limited ruleset, and a network interface component coupled to a network, the network interface component configured to transmit the created credential to a remote server over the network for a secondary credential strength determination if the calculated score is above a threshold.
US09245105B1	Verification of remote job state for access control A method of controlling access to one or more data resources may include receiving, from a client device by an authentication server device, a request to access a data resource. The request may include a job identifier associated with a job. The method may include transmitting, by the authentication server device to a scheduling server device, the job identifier, receiving, by the authentication server device from the scheduling server device, job information associated with the job, determining, by the authentication server device, whether at least a portion of the job information satisfies an access policy associated with the data resource, and granting the job access to the data resource in response to the at least a portion of the job information satisfying the access policy.
US09245100B2	Method and apparatus for unlocking a user portable wireless electronic communication device feature Embodiments provide a method and apparatus for unlocking a feature of a user portable wireless electronic communication device. The user portable wireless electronic communication device can include a camera configured to capture a characteristic of a waving hand of a user across the user portable wireless electronic communication device. The user portable wireless electronic communication device can include a controller coupled to the camera. The controller can determine whether the user is authorized to access a locked feature of the user portable wireless electronic communication device based on the captured characteristic. The controller can unlock the locked feature if the user is authorized to access the feature.
US09245094B2	Entitlement security and control A system, apparatus, and method are provided for entitlement security and control. A method of embodiments of the invention includes granting an entitlement permission upon satisfaction of entitlement rules by an entitlement request.
US09245092B2	System and method for cardiovascular testing A system includes a test device at a test location, a recipient computer at a diagnosis center, and a server operatively connected to the test device and the recipient computer remote from the test location and diagnosis center at a different facility. The test device can generate test data. The recipient computer is configured to receive the patient data from the test device and display the test data to a medical specialist for entry of a diagnosis. The server can send a signal to the recipient computer after the test device produces test data, and further transmit input indicative of the diagnosis to the computer at the test location.
US09245087B1	Methods, apparatus and system for reduction of power consumption in a semiconductor device At least one method, apparatus and system disclosed herein involves performing power reduction process on a FinFET device. A first design is provided. The first design comprises a process mask definition, a FinFET device that comprises a plurality of fins characterized by said process mask, and a timing requirement relating to an operation of said FinFET device. A timing parameter of said operation of said FinFET device is determined. Based upon said timing parameter, a determination is made as to whether a drive capability of said FinFET device is above a level required to maintain said timing requirement. The process mask is modified for reducing at least one of said fins in response to said determining that said drive capability is above said level required to maintain said timing requirement.
US09245085B2	Integrated circuit device configuration methods adapted to account for retiming A method of configuring an integrated circuit device with a user logic design includes analyzing the user logic design to identify timing requirements of paths within the user logic design, determining latency requirements along those paths, routing the user logic design based on availability of storage elements for incorporation into those paths to satisfy the latency requirements, and retiming the user logic design following that routing by incorporating at least some of the storage elements.
US09245082B2	High-speed shape-based router A high-speed shape-based router is applicable to standard-cell digital designs, chip-level-block assembly designs, and other styles of design. In a flow of the invention, the technique establishes an initial structure for each net to be routed. Nets or parts of them are ordered. Each part of the net may be routed using a spine routing search, depth first search, or a space flood search, or any combination of these. Where sections fail or an error occurs, conflicts are identified, and the technique tries routing again.
US09245079B1	Computer implemented method for performing extraction A computer implemented method for performing extraction is provided in the present invention. First, a layout of a semiconductor circuit having a resistor is imported by using a computer wherein a device region is defined in the layout and the resistor is located within the device region. Next, the device region of the layout are extracted, and a compensation value of Rs (Rc) is obtained according to the extracting step. An adjustment process is performed according to Rc to obtained a refined R value.
US09245078B2	Integrated circuit design system A design system for designing an integrated circuit, and the design system includes a processor and a computer readable medium embodying computer program code. The computer program code includes instructions executable by the processor and configured to cause the processor to: modify a circuit design of the integrated circuit to compensate for an impact of layout parameters of the circuit design; generate at least one recommended layout parameter of an integrated circuit device within the integrated circuit; calculate a circuit performance parameter of the integrated circuit using the at least one recommended layout parameter; and generate a layout design of the modified circuit design of the integrated circuit according to the at least one recommended layout parameter.
US09245076B2	Orthogonal circuit element routing Various embodiments include computer-implemented methods, computer program products and systems for aligning a set of orthogonal circuit elements in an integrated circuit (IC) layout. In some embodiments, a computer-implemented method for aligning a set of orthogonal circuit elements in an IC layout includes: classifying each orthogonal circuit element in the set of orthogonal circuit elements as including a first space-designated edge and a second space-designated edge; and aligning each orthogonal circuit element on an edge placement grid according to the first space-designated edge and the second space-designated edge, the edge placement grid having a first set of space-designated grid lines separated by a first distance, and a second set of space-designated grid lines separated by a second distance, wherein the first set of space-designated grid lines is separated from the second set of space-designated grid lines by an offset distance.
US09245074B2	Boundary based power guidance for physical synthesis A method and system to obtain a physical design of an integrated circuit from a logical design are described. The method includes performing a baseline synthesis to obtain a baseline physical design using timing constraints and an overall power budget. The method also includes computing power assertions, performing a re-synthesis using the timing constraints and the power assertions to obtain a new physical design, comparing the new physical design with the baseline physical design to determine a degradation of the new physical design in comparison with the baseline physical design, and reducing a weighting of the power assertions relative to the timing constraints based on the degradation. The executing the performing the re-synthesis, the comparing, and the reducing are done iteratively until the degradation is below a threshold value.
US09245069B2	Methods for calculating bone fracture load Methods are provided for modeling structural behavior of a bone. For example, the methods can model the structural behavior of a femur, and in particular, a proximal femur, under conditions representing a fall onto the greater trochanter of the proximal femur. In such an embodiment, the method can comprise determining a strength of the femur, by a processor and based on (a) the elastic modulus, (b) the cortical bone yield strength, (c) the stress level σmin, and (d) the post-yield stress-strain slope of the proximal femur.
US09245067B2	Probabilistic method and system for testing a material A method implemented using a processor based device for simulation based testing of materials, includes selecting a first set of points from a data generated from a design space and generating a stochastic metamodel based on the first set of points. The method also includes determining an uncertainty value based on the stochastic metamodel. The method also includes identifying a second set of points different from the first set of points, from the data generated from the design space, based on the uncertainty value. The method further includes combining the second set of points with the first set of points to generate a third set of points, assigning the third set of points to the first set of points. The method also includes iteratively generating, determining, identifying, combining, and assigning steps till the uncertainty value is less than or equal to a predetermined threshold value.
US09245065B2	Structural representation and facilitation of manipulation thereof via implicit vertex relationships The disclosed embodiments relate to a representation of a structure/space as a collection of interrelated partitions whereby manipulation of the partitions causes an automated propagation of the manipulation through the other interrelated partitions as a function of the relationships therebetween. Each partition is defined by one or more vertices, the location(s) of which is/are specified either relative to an origin or relative to, i.e. as a function of, or dependent upon, the location of another vertex within the partition (intra-partition) or within another partition (inter-partition). Where the location of a vertex is moved, the change is propagated implicitly to all other vertices whose location is related, i.e. specified as a function of the modified vertex.
US09245064B2	Securely sharing design renderings over a network Systems, methods, and design software allow for easy and efficient rendering, displaying, navigation, and/or sharing of computer generated designs and models. One or more implementations allow a user to share the geometry and the graphical attributes of a three-dimensional model without sharing the source file or the proprietary details of the source file. In particular, the one or more implementations provide the ability to capture the geometry and the graphical attributes of a three-dimensional model, and share then captured geometry with others. Furthermore, one or more implementations can allow for sharing of the geometry and graphical attributes of a three-dimensional model without requiring the viewer to have the software used to create the three-dimensional model.
US09245063B2	Creating ergonomic manikin postures and controlling computer-aided design environments using natural user interfaces A computer receives a set of spatial coordinates from a motion-sensing input device, the spatial coordinates describing a position of at least one joint of a limb of a human model. The computer sends the set of spatial coordinates to a computer-aided design application, the computer-aided design application representing movements of the ergonomic manikin based on changes in limb angles described by a plurality of instances of angle data. The computer receives angle specifications from a computer-aided design application, the angle specifications corresponding to an angle of the limb in at least one three-dimensional plane. The computer converts the set of spatial coordinates to angle data in accordance with the received angle specifications, the angle data describing positioning of the limb.
US09245060B2	Selection of three-dimensional parametric shapes It is provided a computer-implemented method for designing a CAD modeled object. The method comprises displaying three-dimensional parametric shapes; user-interacting with a screen; defining on a support at least one stroke corresponding to the user-interacting; determining, for each shape, a projection of the shape on the support; selecting at least one shape, the selected shape having a projection with a smallest distance to the stroke. Such a method makes the design of a CAD modeled object easier.
US09245059B2	System and method for determining a location within complex structures using pseudorandom encoding techniques A system and method for determining a location within a physical structure are described. The location within the physical structure can be determined by storing a model of a physical structure comprising a plurality of nodes connected by a plurality of struts, each of the nodes and struts of the model corresponding to respective nodes and struts of the physical structure; assigning a non-unique ID to each node of the model according to a pseudo-random sequence, wherein each node of the physical structure encodes the non-unique ID assigned to the corresponding node of the model; receiving a set of non-unique IDs encoded onto respective nodes of a contiguous subset of nodes of the physical structure; locating a set of non-unique IDs in the model corresponding to the received set of non-unique IDs; and determining a location in the physical structure from the located set of non-unique IDs in the model.
US09245057B1	Presenting a graphical visualization along a time-based graph lane using key performance indicators derived from machine data A services monitoring system causes display of time-based graphical visualizations that each correspond to a different key performance indicator (KPI) reflecting how a service provided by one or more entities is performing. The graphical visualizations are all calibrated to a same time scale. Each KPI is defined by a search query that derives one or more values reflected in the graphical visualization for that KPI from machine data pertaining to the one or more entities that provide the service corresponding to the KPI.
US09245056B2	Structured relevance—a mechanism to reveal why data is related A machine receives a group of members of a data set. The machine identifies key symbols from the members of the group or the data set. The machine then calculates, for each key symbol, a weighted magnitude for the key symbol in the group. The machine can then sort the key symbols according to their weighted magnitudes, and filter out common key symbols. The uncommon key symbols, as sorted according to their weighted magnitudes, can form a name for the group.
US09245053B2	Efficiently searching and modifying a variable length queue A system for ensuring that serialization is maintained between separate transactions while searching and/or modifying a variable length queue is system includes a computer processor and logic executable by the computer processor. The logic is configured to implement a method. The method includes searching, by a processing device, a queue using a transaction. A first sequence number is retrieved from a queue header and a second sequence number is retrieved from local storage for the transaction. The first sequence number is compared with the second sequence number according to embodiments. The search of the queue is resumed using an address of a next element saved from a previous transaction responsive to the first sequence number matching the second sequence number. The search of the queue is restarted at a first element responsive to the first sequence number not matching the second sequence number.
US09245052B2	Incremental query refinement A method of incrementally refining queries and updating query result lists without requiring a user to provide an explicit indicator of query submission. In the method, one or more query related character patterns are defined. Entry of query defining characters by a user is monitored to detect entry of a defined query related character pattern. The user is provided with one or more suggested query refinement options and an updated query result list each time a defined query related character pattern is detected. The query related character patterns may be a character pattern that indicates a word has been input by the user.
US09245050B2	Manipulation and/or analysis of hierarchical data Embodiments of methods, apparatuses, devices and/or systems for manipulating hierarchical sets of data are disclosed. In particular, methods, apparatus devices and or/or systems for analyzing hierarchical data are disclosed.
US09245048B1	Parallel sort with a ranged, partitioned key-value store in a high perfomance computing environment Improved sorting techniques are provided that perform a parallel sort using a ranged, partitioned key-value store in a high performance computing (HPC) environment. A plurality of input data files comprising unsorted key-value data in a partitioned key-value store are sorted. The partitioned key-value store comprises a range server for each of a plurality of ranges. Each input data file has an associated reader thread. Each reader thread reads the unsorted key-value data in the corresponding input data file and performs a local sort of the unsorted key-value data to generate sorted key-value data. A plurality of sorted, ranged subsets of each of the sorted key-value data are generated based on the plurality of ranges. Each sorted, ranged subset corresponds to a given one of the ranges and is provided to one of the range servers corresponding to the range of the sorted, ranged subset. Each range server sorts the received sorted, ranged subsets and provides a sorted range. A plurality of the sorted ranges are concatenated to obtain a globally sorted result.
US09245044B2	Use of generic universal resource indicators Various arrangements for creating and using generic universal resource indicators are presented. To create a generic universal resource indicator, one or more parameters of a universal resource indicator may be identified. An interface that permits a parameter of the one or more parameters to be selected and mapped to a variable may be presented. A selection of the parameter for mapping may be received. An indication of the variable to map to the parameter of the selection may also be received. The generic universal resource indicator having a generic parameter corresponding to the parameter of the selection may be created.
US09245042B2	Method and apparatus for searching and storing contents in portable terminal A method and apparatus uses various location information to store and search contents in a portable terminal. The method of storing and searching contents includes obtaining location-based information including at least one of region information and a Point Of Interest (POI) corresponding to current location information when storing the contents. The contents and the location-based information are stored by mapping the contents and the location-based information. At least one of the POI and the region information determined by a user is set when searching the contents. And the contents corresponding to the information determined by the user are searched.
US09245040B2	System and method for automatic searches and advertising A system and method provides location-aware search results from a navigation or other device and provides one or more enhanced listings or advertisements with the results to offset the communication cost of the search. The sponsor may be charged for the listing or advertisement and the charge may be based on whether the device arrives in an area around the sponsor location within a threshold amount of time.
US09245035B2	Information processing system, information processing method, program, and non-transitory information storage medium A cluster value identifying unit identifies a value of a parameter representing a level of a ground swell of interest related to provided information, which is determined in accordance with registration of information related to the provided information. A period identifying unit identifies, based on the value of the parameter, a period in which the ground swell of interest related to the provided information grows with a lapse of time. A user feature identifying unit identifies, based on the identified period, a feature of a user who registers the related information. Accordingly, the feature of the user may be identified based on the registration of the information related to the provided information.
US09245032B2	Globalization framework for providing locale-specific services using client-side scripting languages A method for providing a locale-specific module for client-side processing of documents is provided. The method includes intercepting a request at a server from an interface located at a client. The request may be a hypertext transfer protocol (HTTP) request from a web browser. The server determines locale preferences from the request. The server then determines a locale-specific module for the locale preferences. The locale-specific module is then sent to the client. The interface may use the module to provide locale-specific elements when executing scripts received in documents from the server. The scripts are executed at the client side and the locale-specific elements are determined and displayed in the documents.
US09245030B2	Analytics based on pipes programming model A hypertext transfer protocol (HTTP) request that includes embedded scripted code that specifies requested data search, search result data manipulation, and manipulated search result data visualization processing is received at a server. The received embedded scripted code that specifies the requested data search, search result data manipulation, and manipulated search result data visualization processing is executed. Visualized manipulated search results are generated as output of the execution of the received embedded scripted code. The visualized manipulated search results are returned in response to receiving the HTTP request that includes the embedded scripted code.
US09245028B2	System and method to identify machine-readable codes A method and a system to identify machine-readable codes using a web crawler are provided. Machine-readable codes include, but are not limited to, Universal Product Codes (UPC), quick response (QR) codes, stock-keeping units (SKUs) and international standard book number (ISBN) codes. A web crawler downloads pages from the World Wide Web. A determination module accesses the downloaded pages and identifies a machine-readable code corresponding to a product description included in the downloaded pages. The machine-readable code is included in a downloaded page of the downloaded pages. The determination module further extracts the product description from the downloaded page. A code database stores a record of the machine-readable code and the product description.
US09245023B2	Reputation analysis system and reputation analysis method Described are a reputation analysis device, reputation analysis method, and reputation analysis-use program capable of suitably analyzing temporal changes in reputation for an object indicated by a keyword. The disclosed reputation analysis device is provided with a voluntary activity description extraction means for extracting descriptions representing voluntary activity related to an object indicated by a keyword that has been input from within a plurality of documents; and a reputation chronological data estimation means for counting the number of occurrences of voluntary activity at each time point wherein the voluntary activity expressed by a description representing the voluntary activity related to the object has been performed, and estimating reputation chronological data for chronologically representing evaluations for the object by the agents of the voluntary activity.
US09245015B2	Entity disambiguation in natural language text A device analyzes first text to identify a pair of terms, within the first text, that are alias terms. The device analyzes the first text by performing two or more of: a latent semantic analysis of the pair of terms, based on the pair of terms being associated with a particular tag; a tag-based analysis that determines that the pair of terms are associated with compatible tags; a transitive analysis that determines that a pair of neighbor terms, associated with the pair of terms, are associated with compatible tags; or a co-location analysis based on a distance between the pair of terms in the first text. The device generates, based on analyzing the first text, a glossary that includes the pair of terms identified as alias terms. The device replaces terms within the first text or a second text that is different from the first text, using the glossary.
US09245013B2	Message recommendation using word isolation and clustering Network system provides a real-time adaptive recommendation set of documents with a high statistical measure of relevancy to the requestor device. The recommendation set is optimized based on analyzing text of documents of the interest set, categorizing these documents into clusters, extracting keywords representing the themes or concepts of documents in the clusters, and filtering a population of eligible documents accessible to the system utilizing site and or Internet-wide search engines. The system is either automatically or manually invoked and it develops and presents the recommendation set in real-time. The recommendation set may be presented as a greeting, notification, alert, HTML fragment, fax, voicemail, or automatic classification or routing of customer e-mail, personal e-mail, job postings, and offers for sale or exchange.
US09245012B2	Information classification system, information processing apparatus, information classification method and program An information classification system includes a server including a knowledge base that receives classification information to be classified, conducts language analysis of the classification information to acquire and classify a plurality of keywords into elements made up of a classification target word and a related word that modifies the classification target word, and conducts a search with the related word, so as to assign a classification identification value to the information; a classification candidate extraction section that extracts the classification identification value that the knowledge base assigns to generate an automatic classification result; and a classification update section that receives the automatic classification result and corrects registered items in the knowledge base with a correction value received through a GUI for classification confirmation while referring to log data that is a processing history about automatic classification for the language analysis and the element classification.
US09245011B2	Data model versioning for document databases A data model versioning method may read a first version tag associated with a document database. The method compares the first version tag to a second version tag associated with a current document template of an application, the second version tag indicating a document format used by the current document template for documents created by the application. When the first version tag does not match the second version tag, the method performs a version migration operation to update a document format of documents in the document database.
US09245004B1	Predicted query generation from partial search query input A search system monitors the input of a search query by a user. Before the user finishes entering the search query, the search system identifies and sends a portion of the query as a partial query to the search engine. Based on the partial query, the search engine creates a set of predicted queries. This process may take into account prior queries submitted by a community of users, and may take into account a user profile. The predicted queries are to be sent back to the user for possible selection. The search system may also cache search results corresponding to one or more of the predicted queries in anticipation of the user selecting one of the predicted queries. The search engine may also return at least a portion of the search results corresponding to one or more of the predicted queries.
US09244997B1	Asymmetric active-active access of asynchronously-protected data storage In one aspect, a method to provide asymmetric active-active access to a first storage volume using a global cache coupled to a first and second virtual storage volumes includes replicating asynchronously the first storage volume at a first site to a second storage volume at a second site, virtualizing the first storage volume with the first virtual storage volume; and virtualizing the second storage volume with the second virtual storage volume. The first storage volume has primary storage functionality.
US09244996B2	Replicating data across multiple copies of a table in a database system A mechanism for handling transaction messages in asynchronous data replication in a database system, in which the database system includes a source node and a target node, and each transaction message has information concerning a row change to a table copy at the source node. The mechanism determines whether a first transaction message has a dependency on a preceding non-completed transaction message. Responsive to the first transaction message having a dependency on the preceding non-completed transaction, the mechanism holds the first transaction message, completes the preceding non-completed transaction message including applying the row change associated with the preceding non-completed transaction message to the table copy at the target node, and responsive to completing the preceding non-completed transaction message, releases the first transaction message and applying the row change associated with the first transaction message to the table copy at the target node.
US09244995B2	Method and system for synchronizing a server and an on-demand database service In accordance with embodiments, there are provided mechanisms and methods for synchronizing a server and an on-demand database service. These mechanisms and methods for synchronizing a server and an on-demand database service can enable embodiments to synchronize a larger amount of data. The ability of embodiments to provide such feature can enable more effective synchronization of a user-level sharing entity database with a multi-user on-demand database service.
US09244982B2	Static analysis of PL/SQL objects and SQL queries Embodiments of the invention provide systems and methods for performing static analysis of query expressions embedded in programming language source code. According to one embodiment, performing static analysis of one or more query expressions embedded in programming language source code can comprise extracting the one or more query expressions from the programming language source code, performing the static analysis on the extracted one or more query expressions, and reporting results of performing the static analysis on the one or more query expressions, wherein the results relate errors and warning generated by performing the static analysis to the source code from which the one or more query expressions are extracted.
US09244981B2	Resource description framework security Systems, methods, and other embodiments associated with resource description framework (RDF) security are described. One example method includes generating, based on sensitivity labels associated with the contents of a triple in an RDF record, a sensitivity label. The example method may also include comparing the sensitivity label to an access label associated with an entity requesting an action associated with the record to be performed. The example method may also include performing the action upon determining that the entity has sufficient permission to request the action.
US09244977B2	Using content identification as context for search Techniques for using contextual information relating to content presented by a television as part of a search query for an information search are presented. A search management component, at a given moment in time during presentation of television-related content by a communication device in or associated with a television, identifies contextual information associated with a section of the television-related content and generates a content identifier timestamp associated with the contextual information and the section of television-related content. A search component augments a search query using the contextual information to facilitate customization of a subset of search results based on the contextual information. The contextual information in the search query can facilitate disambiguating the search query or promoting a search result over another search result in the subset of search results, based on the contextual information, to facilitate customization of the subset of search results.
US09244974B2	Optimization of database queries including grouped aggregation functions Embodiments of the invention provide techniques for generating predicted cardinality statistics for grouped aggregation functions included in database queries. In general, characteristics of a database query are determined, and are then supplied to a probability function configured to generate a predicted cardinality statistic. The generated statistic represents a prediction of the probable cardinality of the results of a grouped aggregation function in the event that the query is executed. The predicted cardinality statistic may be used by a query optimizer to determine an efficient query plan for executing the database query.
US09244969B1	Virtual disk recovery A method, article of manufacture, and apparatus for mounting virtual machine disks. In some embodiments, this includes accessing, by a client, a first repository of virtual machine disks, selecting a virtual machine disk from the first repository, using a file level referral to redirect the client to a second repository, receiving the selected virtual machine disk from the second repository.
US09244968B2	Temporal document verifier and method Temporal qualities of electronic documents are verified using a variety of techniques, including automated and human based feedback. The invention can be used in environments such as automated news aggregators, search engines, and other electronic systems which compile information having temporal qualities.
US09244966B2	Method and system for reducing lock occurrences in server/database systems Limiting the number of concurrent requests in a database system. Arranging requests to be handled by the database system in at least one queue. Defining a maximum value (SS) of concurrent requests corresponding to the at least one queue. Monitoring at least one queue utilization parameter corresponding to the at least one queue and calculating a performance value based on the at least one queue utilization parameter. Adapting the maximum value (SS) of concurrent requests of the at least one queue dynamically based on the performance value (PF) in order to improve system performance. Limiting the number of concurrent requests of the at least one queue dynamically based on the dynamically adapted maximum value (SS).
US09244961B2	Concurrent access for hierarchical data storage A method of providing concurrent access to a hierarchy in a data structure may include receiving a request from a first process to change a first value associated with an object, where the request may include a second value to be combined with the first value. The method may also include determining that a second process is currently accessing information associated with the object. The method may additionally include associating, in response to determining that the second process is currently accessing information associated with the object, the second value with the object without combining the first value and the second value.
US09244960B2	Metadata-driven version management service in pervasive environment Metadata driven version management service determines one or more version operations to perform based on the properties of a device, computing environment and metadata associated with a file being versioned. The version management service allows different devices to perform different version operations based on different device properties.
US09244957B1	Histogram interval selection A database system may include an array of storage devices configured to store a plurality of database tables and a plurality of histograms. Each histogram may correspond to one or more columns of a database table. The database system may further include a processor in communication with the storage device. The processor may receive an indication that a histogram is to be rebuilt, wherein the histogram has a first number of intervals. The processor may determine at least one condition associated with a distribution of column values of at least one column in the histogram. The processor may determine a second number of histogram intervals based on the at least one condition. The processor may rebuild the histogram to include the second number of intervals. A method and computer-readable medium may also be implemented.
US09244950B2	Method for synthetic data generation for query workloads Generation of synthetic database data includes annotated query subplans for a multiple table query workload that includes a desired cardinality for nodes (v) in the subplans. The subplans may be merged and represented by a direct acyclic graph (DAG). The maximum entropy joint probability distribution for each attribute (x) for each node (v) is determined as: p ⁡ ( x ) = exp ( ∑ v ⁢ ⁢ w v ⁢ f v ⁡ ( x ) Z ) for each node ν, where wv is a weight of node v, fv is a conjunct of predicates in a subplan rooted at node v, and Z is a normalization factor. This distribution is determined such that the desired cardinality, and selectivities for each node v determined from the desired cardinality, are satisfied. The data for a plurality of tables are generated by sampling the maximum entropy joint probability distribution for a domain of attributes (x) of a plurality of tables. Data may be efficiently generated for multiple table queries and for DAGs.
US09244945B2	Search system using source and target image categorization An Internet infrastructure supports searching of images by correlating a category selection with that of plurality of images hosted in Internet based servers in selected categories. An image search server supports delivery of search result pages to a client device based upon a search image or category selection, and contains images from a plurality of Internet based web hosting servers. The image search server delivers characteristic analysis of an image to the client device upon request. The selection of images is based upon: (i) word match, that is, by selecting images, titles of which correspond to the search image; and (ii) image correlation, that is, by selecting images, image characteristics of which correlates to that of category selection. The selection of images in the search result page also occurs on the basis of popularity. The category selection server also selects category based upon user's choice.
US09244942B1	Method to transfer image data between arbitrarily overlapping areas of memory An apparatus includes a first memory, a second memory, and a memory interface. The first memory may be configured to store an entire image. The second memory may be configured to store a portion of the image during an image processing operation. The memory interface may be configured to transfer the portion of the image (i) from a source area of the first memory to the second memory prior to the image processing operation and (ii) from the second memory to a destination area of the first memory following the image processing operation based upon how the source area and the destination area overlap in the first memory.
US09244941B2	Proactive creation of image-based products A method for proactively creating an image product includes storing a library of specification terms for image products by a computer system, receiving a command from a user, tokenizing the command into a plurality of tokens by the computer system, matching one or more of the tokens to the specification terms in the library to determine specification parameters for an image product by the computer system, automatically identifying images based on the specification parameters by the computer system, and automatically creating a design for the image product that incorporates at least some of the images identified based on the specification parameters.
US09244940B1	Navigation paths for panorama Aspects of the disclosure relate generally to allowing users to create their own image navigation experiences. As an example, a set of panoramic images may be identified using manual and/or automated methods. One or more suggested potential paths connecting ones of the panoramic images may be determined. This information may be displayed to a user with an interface that allows the user to create and change relationships between the panoramic images. For example, users may activate the suggested paths and create connections between the panoramic images of the set. Users may also draw their own connecting paths between panoramic images. The panoramic images and the connections between them may be used to provide a navigation experience.
US09244939B2	Managing I/O operations in a shared file system A method for managing I/O operations in a shared file system environment. The method includes receiving for each of a plurality of compute nodes, information associated with I/O accesses to a shared file system, and applications for executing the I/O accesses. The method includes creating application profiles, based, at least in part, on the received information. The method then includes determining execution priorities for the application, based, at least in part, on the created application profiles.
US09244930B1	Geotagged hashtags A system and method for geotagging hashtags. Geographic location information related to a hashtag is determined, and a geolocation is assigned to the hashtag based on the determined geographic location information. The assigned geolocation is stored in association with the hashtag in a data store. The hashtag may be provided for display on a map based on the assigned geolocation stored in the data store.
US09244921B2	Altering relevancy of a document and/or a search query Various embodiments provide for altering relevancy of a document by adding (e.g., to an index associated with the document) one or more term relationships (which may result, for example, in adding one or more non-obvious terms). Other embodiments provide for altering relevancy of a search query by adding to the search query one or more terms based upon one or more determined term relationships (in one example, the added term(s) may be one or more non-obvious terms).
US09244918B2	Locating electronic documents The present disclosure relates to processing computer documents. According to one aspect, a method for locating an electronic document may include acquiring a source document of a target document to be located, wherein the target document has a sending-receiving relation with the source document. Metadata information of the source document may be extracted. The extracted metadata information may be packaged to generate a link to the source document, the link being used for locating the target document. According to an example method and the system, it may be possible to directly and automatically locate the target document having a sending-receiving relation with a source document based on a link to the source document containing metadata information without manually analyzing and extracting the related information on the source document or changing the existing access right to the source document and the target document.
US09244913B2	Multi-language closed captioning A computer server receives, from a remote device, a request for closed caption data, the request specifying media content for which the closed caption data is to be provided. In the server, it is determined whether closed-captioned data for the specified media content is available, and if closed-captioned data for the media content is available, a sequence of records associated with the media content is provided to the device from the server.
US09244912B1	Methods and systems for facilitating a remote desktop redrawing session utilizing HTML Examples of methods, systems, apparatus, and machine-readable storage media are provided to facilitate access and control of a remote desktop of a remote machine by a windows web browser of a client device through a web server without installing proprietary plug-ins or protocols on the client device. A web server may translate user input requests from a web browser into input calls compatible with a remote desktop display protocol. The web server may receive remote desktop drawing commands from the remote machine and translate the remote desktop drawing commands into web browser drawing updates compatible with the windows web browser. A web server may communicate with the windows web browser via HTTP and communicate with the remote machine via a remote desktop display protocol.
US09244908B2	Generation of a semantic model from textual listings A corpus of textual listings is received and main concept words and attribute words therein are identified via an iterative process of parsing listings and expanding a semantic model. During the parsing phase, the corpus of textual listings is parsed to tag one or more head noun words and/or one or more identifier words in each listing based on previously identified main concept words or using a head noun identification rule. Once substantially each listing in the corpus has been parsed in this manner, the expansion phase assigns head noun words as main concept words and modifier words as attribute words, where possible. During the next iteration, the newly identified main concept words and/or attribute words are used to further parse the listings. These iterations are repeated until a termination condition is reached. Remaining words in the corpus are clustered based on the main concept words and attribute words.
US09244907B2	Systems and methods for identifying and suggesting emoticons Various embodiments provide a method that comprises receiving a set of segments from a text field, analyzing the set of segments to determine at least one of a target subtext or a target meaning associated with the set of segments, and identifying a set of candidate emoticons where each candidate emoticon in the set of candidate emoticons has an association between the candidate emoticon and at least one of the target subtext or the target meaning. The method may further comprise presenting the set of candidate emoticons for entry selection at a current position of an input cursor, receiving an entry selection for a set of selected emoticons from the set of candidate emoticons, and inserting the set of selected emoticons into the text field at the current position of the input cursor.
US09244904B2	Software-implemented method and computerized system for spell checking The invention concerns a computer-implemented method for spell checking, comprising the steps of: providing a user with a user interface adapted for managing files stored on at least one computer; receiving via the user interface a user action involving at least one first word; returning via the user interface at least one second word selected according to: a distance from said at least one second word to said at least one first word; and data of occurrence of said at least one second word in said files. The invention is also directed to a computer program product and computer system allowing for taking steps according to the invention.
US09244900B2	Template based website development and management There is disclosed a method and apparatus for template based website development and management. The method includes obtaining input of an entity identifier designating an entity database record within a database and obtaining entity data including data pertaining to the entity of the website from the entity database record within the database using the entity identifier. The method further includes accessing a template including a content container and a style element and substituting the entity data for the content container. The method further includes enabling revision of the web page by customizing style elements to thereby create customized style elements, receiving a request to update the web page to include updated entity data from the database, and regenerating the web page using the template by substituting the updated entity data for the content containers, the updated entity data presented as directed by the customized style elements.
US09244899B1	Systems and user interfaces for dynamic and interactive table generation and editing based on automatic traversal of complex data structures including time varying attributes Various systems and methods are provided for accessing and traversing one or more complex data structures and generating a functional user interface that can enable non-technical users to quickly and dynamically generate detailed reports (including tables, charts, and/or the like) of complex data including time varying attributes. The user interfaces are interactive such that a user may make selections, provide inputs, and/or manipulate outputs. In response to various user inputs, the system automatically calculates applicable time intervals, accesses and traverses complex data structures (including, for example, a mathematical graph having nodes and edges), calculates complex data based on the traversals and the calculated time intervals, displays the calculated complex data to the user, and/or enters the calculated complex data into the tables, charts, and/or the like. The user interfaces may be automatically updated based on a context selected by the user.
US09244898B2	Server for communication with an implantable medical device A system and method for modifying the parameters of an implantable medical device includes an implantable medical device that communicates with a remote control device that, in turn, communicates through the browser of a computer or any other device capable of using mark-up language protocol. The computer optionally communicates with other computers and/or devices through a network.
US09244891B2	Adjusting search result rankings based on multiple user highlighting of documents A system may aggregate highlighting information associated with a document that includes a number of elements. The highlighting information may identify one or more of the elements that have been highlighted by a group of users. The system may determine weight values for the one or more elements, generate information associated with the document based on the weight values, and provide the information.
US09244887B2	Computer-implemented systems and methods for efficient structuring of time series data Systems and methods are provided for analyzing through one-pass of unstructured time stamped data of a physical process. A distribution of time-stamped unstructured data is analyzed to identify a plurality of potential hierarchical structures for the unstructured data. A hierarchical analysis of the potential hierarchical structures is performed to determine an optimal frequency and a data sufficiency metric for the potential hierarchical structures. One of the potential hierarchical structures is selected as a selected hierarchical structure based on the data sufficiency metrics. The unstructured data is structured according to the selected hierarchical structure and the optimal frequency associated with the selected hierarchical structure, where said structuring of the unstructured data is performed via a single pass though the unstructured data. The identified statistical analysis of the physical process is performed using the structured data.
US09244879B2	Intermediate write operation dispersed storage network frame A method begins by generating write requests, wherein a write request includes a payload and a protocol header. The payload includes one or more slice payload sections and a transaction number field. The protocol header includes an operation code field that indicates a write operation. The method continues, when responses to the write requests are favorable, by generating write commit requests, wherein a write commit request includes a commit payload and a commit protocol header. The commit payload includes the transaction number and the commit protocol header includes the operation code field that indicates write commit operation. The method continues, when responses to the write requests are unfavorable, by generating write rollback requests, wherein a rollback request includes a rollback payload and a rollback protocol header. The rollback payload includes the transaction number and the rollback protocol header includes the operation code field that indicates write rollback operation.
US09244875B1	Systems and methods for transition-minimized data bus inversion Circuits and methods for Data Bus Inversion (DBI) are provided. In one example, the immediately previous value of the DBI bit affects the next value of the DBI bit. Specifically, in some instances, the value of the DBI bit is held to the immediately previous value of the DBI bit to limit the total number of transitions on a data bus.
US09244870B2	Semiconductor memory system with current consumption control According to one embodiment, a semiconductor memory system includes semiconductor memories, and a memory controller configured to control the semiconductor memories. Each of the semiconductor memories is configured to execute an internal sequence including operations and have a wait period after an end of each of the operations, to notify, during the wait period, a status signal, which notifies in advance a start of a next operation, to the memory controller, and to start the next operation upon receiving a restart instruction of the internal sequence from the memory controller.
US09244865B2	Obtaining diagnostic information through host interfaces Systems, methods, and apparatuses are provided to obtain diagnostic information from a storage device. A read command may be transmitted to a storage device, where the read command conforms to a block level storage protocol and is directed to an unused logical unit of storage memory included in the storage device, to an invalid logical block address, and/or to a mode page. The unused logical unit may be a predetermined logical unit of the storage memory that is not allocated by a file system. Diagnostic data may be received from the storage device in response to the read command. The diagnostic data may be information related to operation of the storage device and/or a component of the storage device.
US09244864B2	Information providing system, information processing apparatus, computer readable medium, and information providing method for providing encrypted information An information providing system includes first and second apparatuses. The first apparatus includes a memory storing a shared random number Ri and shared information, a providing unit providing the second apparatus with encrypted information e(Ki, Fi) obtained by encrypting information Fi with an encryption key and an encrypted key Yi obtained by encrypting a decryption key Ki with the random number Ri, and an updating unit updating Ri to Ri+1 based on the shared information. The second apparatus includes a memory storing the random number Ri and the shared information, an acquiring unit acquiring the encrypted information e(Ki, Fi) and the encrypted key Yi, a key decrypting unit decrypting the encrypted key Yi with the random number Ri to calculate the decryption key Ki and updating Ri to Ri+1 based on the shared information, and an information decrypting unit decrypting the encrypted information e(Ki, Fi) with the decryption key Ki.
US09244856B2	Dynamic address translation with translation table entry format control for identifying format of the translation table entry An enhanced dynamic address translation facility is provided. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. An index portion of the virtual address is used to reference an entry in the translation table. If a format control field contained in the translation table entry is enabled, the table entry contains a frame address of a large block of data of at least 1M byte in size. The frame address is then combined with an offset portion of the virtual address to form the translated address of a small 4K byte block of data in main storage or memory.
US09244855B2	Method, system, and apparatus for page sizing extension A method, system, and apparatus may initialize a fixed plurality of page table entries for a fixed plurality of pages in memory, each page having a first size, wherein a linear address for each page table entry corresponds to a physical address and the fixed plurality of pages are aligned. A bit in each of the page table entries for the aligned pages may be set to indicate whether or not the fixed plurality of pages is to be treated as one combined page having a second page size larger than the first page size. Other embodiments are described and claimed.
US09244851B2	Cache coherency protocol for allowing parallel data fetches and eviction to the same addressable index A technique for cache coherency is provided. A cache controller selects a first set from multiple sets in a congruence class based on a cache miss for a first transaction, and places a lock on the entire congruence class in which the lock prevents other transactions from accessing the congruence class. The cache controller designates in a cache directory the first set with a marked bit indicating that the first transaction is working on the first set, and the marked bit for the first set prevents the other transactions from accessing the first set within the congruence class. The cache controller removes the lock on the congruence class based on the marked bit being designated for the first set, and resets the marked bit for the first set to an unmarked bit based on the first transaction completing work on the first set in the congruence class.
US09244850B2	Device for executing program instructions and system for caching instructions A caching system, having a first instruction cache and second instruction cache, receives an instruction address from an instruction fetch unit. For an address resulting in a cache miss in both first cache and second cache, an instruction associated with the address is retrieved from computer memory and stored with the address in first cache. For an address resulting in a cache miss in second cache and a cache hit in first cache, the instruction associated with the address is retrieved from first cache. If no instruction in second cache matches the retrieved instruction, the retrieved instruction is stored in second cache and associated with the received address; otherwise the matching instruction is associated with the received address. For an address resulting in a cache hit in second cache, the instruction associated with the address is retrieved from second cache. The retrieved instruction is returned to the instruction fetch unit.
US09244849B2	Storage control apparatus, storage system and method A storage control apparatus includes a memory configured to store access management information concerning access from a host to each of a plurality of logical volumes, and a controller configured to refer to the access management information read from the memory, when receiving an entirety of updated data from the host, to set a write mode for data transfer from each of the plurality of logical volumes to the corresponding physical volume on the basis of the access management information to one of a difference data write mode in which difference data indicating a difference between an entirety of data stored in a storage apparatus and the entirety of updated data is written into a storage apparatus and an entire data write mode in which the entirety of updated data is written into the storage apparatus.
US09244845B2	System and method for improving snoop performance The present disclosure is directed to hardware hash tables, and more specifically, to generation of a cache coherent system such as in a Network on Chip (NoC). The present disclosure is further directed to a directory structure that includes a new field, referred to, for instance as, encoded value, which indicates the original owner of a dirty line. As an original holder may have held or modified the original line, by tracking the original holder, example implementations can track the agents that are potentially dirty, as the encoded value can indicate the agent with the most recently unique line, which can then be shared with the other agents.
US09244843B1	Methods for improving flow cache bandwidth utilization and devices thereof A network traffic management apparatus includes a first memory including a flow cache table including a plurality of entries. The network traffic management apparatus further includes configurable hardware logic coupled to the first memory and a processor, the configurable hardware logic including a valid split table including a plurality of entries, wherein each of the plurality of entries includes a validity bit. The configurable hardware logic is configured to implement periodically determining whether the validity bit of each of the valid split table entries is set. Additionally, the configurable hardware logic is further configured to implement retrieving one of the plurality of flow cache table entries corresponding to an index value associated with one of the valid split table entries, when it is determined that the validity bit of the one of the valid split table entries is set.
US09244841B2	Merging eviction and fill buffers for cache line transactions A processor includes a first cache memory and a bus unit in some embodiments. The bus unit includes a plurality of buffers and is operable to allocate a selected buffer of a plurality of buffers for a fill request associated with a first cache line to be stored in a first cache memory, load fill data from the first cache line into the selected buffer, and transfer the fill data to the first cache memory in parallel with storing eviction data for an evicted cache line from the first cache memory in the selected buffer.
US09244840B2	Cache swizzle with inline transposition A method and circuit arrangement selectively swizzle data in one or more levels of cache memory coupled to a processing unit based upon one or more swizzle-related page attributes stored in a memory address translation data structure such as an Effective To Real Translation (ERAT) or Translation Lookaside Buffer (TLB). A memory address translation data structure may be accessed, for example, in connection with a memory access request for data in a memory page, such that attributes associated with the memory page in the data structure may be used to control whether data is swizzled, and if so, how the data is to be formatted in association with handling the memory access request.
US09244837B2	Zero cycle clock invalidate operation A method to eliminate the delay of a block invalidate operation in a multi CPU environment by overlapping the block invalidate operation with normal CPU accesses, thus making the delay transparent. A range check is performed on each CPU access while a block invalidate operation is in progress, and an access that maps to within the address range of the block invalidate operation is treated as a cache miss to ensure that the requesting CPU will receive valid data.
US09244834B2	Method and apparatus for selecting a memory block for writing data, based on a predicted frequency of updating the data Some of the embodiments of the present disclosure provide a method for programming a flash memory having a plurality of memory blocks, wherein each memory block of the plurality of memory blocks is either a single-level cell (SLC) memory block or a multi-level cell (MLC) memory block, the method comprising assigning a weighting factor to each memory block of the plurality of memory blocks based on whether the memory block is an SLC memory block or an MLC memory block, tracking a number of write-erase cycles for each memory block, and selecting one or more memory blocks for writing data based at least in part on the weighting factor and the tracked number of write-erase cycles of each memory block of the plurality of memory blocks. Other embodiments are also described and claimed.
US09244832B1	Cache learning model A computer-executable method, system, and computer program product for managing a flash cache, having modes of cache management, the computer-executable method, system, and computer program product may be enabled to optimize flash cache by using a model to determine an optimized mode for the flash cache.
US09244831B2	Dynamic tuning of internal parameters for solid-state disk based on workload access patterns A system and method for tuning a solid state disk memory includes computing a metric representing a usage trend of a solid state disk memory. Whether one or more parameters need to be adjusted to provide a change in performance is determined. The parameter is adjusted in accordance with the metric to impact the performance of running workloads. These steps are repeated after an elapsed time interval.

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