| Document | Document Title |
|---|---|
| US09231567B2 |
Test solution for a random number generator
A random number generator and method for testing the same are described. In one embodiment, the random number generator comprises one or more ring oscillator structures, each of the one or more ring oscillator structures having a ring oscillator for use in generating random numbers and having a test structure to reconfigure the ring oscillator into a testable structure. |
| US09231563B2 |
Radio preset key assignment method and apparatus
A system and method for assigning received channels to preset tuning keys of a receiver. A series of preset keys are sequentially labeled and one preset key, such as the preset key marked “0,” is a pre-defined preset key. An elongated pressing of the pre-defined key causes the currently tuned channel, if it is not assigned to a preset key, to be assigned to an unassigned preset key. If the currently tuned channel is already assigned to a preset key, pressing the pre-defined key instead causes the currently selected channel to be un-assigned from that preset key. Radios with two tuners that each process different sets of radio signals assign channels for a particular tuner to alternating preset keys, allowing acceleration of sequentially selecting channels assigned to pre-set keys by pre-tuning another tuner to the next channel in the sequence. |
| US09231562B2 |
Decimation filter
A system includes a decimation module having an adjustable decimation rate and a filter module responsive to the decimation module. A digital phase lock loop is operable to control a decimation rate of the decimation module. The decimation module is a cascade integrator comb decimation module. |
| US09231561B2 |
Multi-stage adaptive filter
A multi-stage adaptive filter is disclosed, which exhibits a smaller mean square error than in prior art adaptive filters. The adaptive filter selectively manipulates the weights, in multiple stages, so as to achieve a global minimum of the error function, such that the filtered signal has as small an error as possible. |
| US09231551B2 |
Common mode filter with multi-spiral layer structure and method of manufacturing the same
A common mode filter with a multi-spiral layer structure includes a first coil, a first insulating layer, a second coil, a second insulating layer, a third coil, a third insulating layer, and a fourth coil, wherein the first coil serially connects with the fourth coil, and the second coil serially connects with the third coil. A first conductive pillar is configured to connect the first coil and the fourth coil, and a second conductive pillar is configured to connect the second coil and the third coil, wherein the first conductive pillar and the second conductive pillar are internally diagonally disposed relatively within a corner or the same side of corners of the rectangular spiral. |
| US09231549B2 |
Phase shifter and and related load device
A phase shifter and related load device are provided. The phase shifter includes a phase shifter core and load devices. The phase shifter core has an input port for receiving an input signal, an output port for outputting an output signal, and connection ports. The load devices are coupled to the connection ports, respectively. At least one of the load devices includes first varactor units each having a first node and a second node, where first nodes of the first varactor units are coupled to a first voltage, second nodes of the first varactor units are respectively coupled to a plurality of second voltages, and the second voltages include at least two voltages different from each other. The phase shifter and related load device are capable of mitigating effects resulted from varactor's non-linear C-V curve. |
| US09231544B2 |
AGC circuit for an echo cancelling circuit
An amplifier circuit and a method of amplification using automatic gain control (AGC) are disclosed. A method for reducing distortions incurred by an audio signal when being rendered by an electronic device is described. The method comprises receiving an input signal; determining signal strength; determining a frequency-dependent AGC filter; wherein the frequency-dependent AGC filter is adapted to selectively attenuate the input signal within a number N of predetermined frequency ranges, according to corresponding N degrees of attenuation; wherein N predetermined frequency ranges depend upon a rendering characteristic of the electronic device; and wherein the N-degrees of attenuation depend upon the signal strength; and attenuating the input signal using the frequency-dependent AGC filter to obtain an output signal for rendering by the electronic device. |
| US09231540B2 |
High performance class AB operational amplifier
A class AB operational amplifier includes an input stage, an output stage and a level shifter stage to control the quiescent current of the output stage and to transfer the signal from the input stage to the output stage, and a control circuit of the level shifter stage. The control circuit includes a transistor differential pair having a differential input terminals and the differential voltage at the differential terminals of the differential pair controls the level shifter stage. |
| US09231539B2 |
Amplifier, a residue amplifier, and an ADC including a residue amplifier
An amplifier, comprising: an input node; an output node; a gain stage having a gain stage inverting input, a gain stage non-inverting input and a gain stage output; a feedback capacitor connected in a signal path between the gain stage output and the gain stage inverting input; a sampling capacitor connected between the input node and the gain stage inverting input, and a controllable impedance in parallel with the feedback capacitor, wherein the controllable impedance is operable to switch between a first impedance state in which it does not affect current flow through the feedback capacitor, and a second impedance state in which it cooperates with the feedback capacitor form a bandwidth limiting circuit. |
| US09231536B2 |
Multi-mode multi-band self-realigning power amplifier
A power amplifier (PA) system is provided for multi-mode multi-band operations. The PA system includes one or more amplifying modules, each amplifying module including one or more banks, each bank comprising one or more transistors; and a plurality of matching modules, each matching module being configured to be adjusted to provide impedances corresponding to frequency bands and conditions. A controller dynamically controls an input terminal of each bank and adjusts the matching modules to provide a signal path to meet specifications on properties associated with signals during each time interval. |
| US09231531B2 |
Communication system and method for detecting loading variation of power amplifier thereof
A communication system is provided. The communication system includes an antenna, a power amplifier, a detector and a signal-processing module. The power amplifier provides an output signal to the antenna according to an input signal. The detector provides power information and voltage information according to the output signal. The signal-processing module obtains a loading variation according to the power information and the voltage information, and provides the input signal according to the loading variation. When the loading variation exceeds a threshold value, the signal-processing module performs a digital pre-distortion calibration for the input signal. |
| US09231527B2 |
Circuits and methods for power amplification with extended high efficiency
The present disclosure includes circuits and methods for power amplifiers. In one embodiment, a main and peaking amplifier receive dynamic power supply voltages to operate an RF power amplifier in a high efficiency range for a particular output voltage. The power supply voltages may be changed based on an output voltage so that the power amplifier operates within a high efficiency plateau. In one embodiment, different discrete power supply voltage levels are used for different output voltage ranges. In another embodiment, a continuous time varying power supply voltage is provided as the power supply voltage. A dynamic supply voltage may be generated having a lower frequency than a signal path of the power amplifier. |
| US09231526B2 |
Power amplifier and transmission device
An SCPA includes a pad, capacitative elements, amplifiers on an IC chip. The capacitative elements are disposed on a first circle whose center is located on the pad. The amplifiers which correspond to the capacitative elements are disposed on a second circle which is a concentric circle larger than the first circle. The pad, each of the capacitative elements, and a corresponding one of the amplifiers are aligned in a line so that the length of wiring is the shortest. |
| US09231522B2 |
Generation of band-limited noise with tunable crest factor
A method for generating a signal having a defined bandwidth and a desired crest factor is disclosed. The signal is composed of a number of individual sinusoidal signals, each having an amplitude and a frequency. The method includes determining an exponent to be used in a specific exponential function and corresponding to the desired crest factor, the exponent being determined based on an a priori known relationship between crest factor and exponent; calculating a phase value for each sinusoidal signal using the specific exponential function and the previously determined exponent; and superposing the sinusoidal signals to obtain the signal having the desired crest factor, whereby the phases of the individual signals are maintained. |
| US09231521B2 |
Oscillator
An oscillator oscillates a terahertz wave of a frequency fosc defined by a microstrip resonator configured such that a negative resistance element and a dielectric body are sandwiched between two conductors. The oscillator includes a resistance element disposed in parallel to the negative resistance element. The resistance element is disposed in a position corresponding to a node of an electric field stably existing in the resonator in the frequency fosc of the oscillated terahertz wave. |
| US09231518B2 |
Solar panel mechanical connector and frame
A design is described for solar panel that allows for modular installation and efficient removal of panels irrespective of the panel's relative location in an array arrangement. A system is provided that includes a plurality of modular panels (such as solar power panels). These panels are rimmed by frames featuring one or more exterior-facing, grooved channels. A first channel—which may be used to mount the panel, and which replaces traditional railing installation systems—and a second channel that is configured to allow movement of one or more panel splices used to secure the panels together. Integrated electrical connection interfaces are provided on opposite side surfaces of the frames to couple with the electrical connection interfaces of adjacent panels to establish an electrical path between them. A spacer component may be inserted between panels to provide access to the electrical connection interfaces; support and rigidity to the joined panels; a grounding path between the panels; and, when combined with the panel splices, to align the panels to prevent damage to the electrical connection interfaces. |
| US09231516B2 |
Control device for generator-motor and control method for generator-motor
Provided is a control device for a generator-motor including: a control section (111) for controlling a rotary electric machine (12) with use of an inverter (11); and a connection switch section (5) provided between a power source and the inverter, the connection switch section including a change-over contact (51) which is ON/OFF-controllable by the control section and a current reducing resistor (52) which are connected in parallel. The control section performs ON/OFF control of the change-over contact in accordance with drive characteristics of the rotary electric machine so that a drive current that flows when the rotary electric machine operates as a motor falls within a range not exceeding a permissible current value of the rotary electric machine. |
| US09231515B2 |
Method of monitoring performance of an electric motor
A method of monitoring performance of an electric motor includes calculating an actual input power and an expected input power of the electric motor. A power difference between the actual input power and the expected input power is recursively calculated over at least one period of an electrical cycle of the electric motor to determine a variance in the power difference during the at least one period of the electrical cycle. The variance in the power difference is compared to a threshold value to determine if the variance in the power difference is greater than the threshold value or less than the threshold value. The control module may signal that the electric motor is not operating within allowable operating parameters when the variance in the power difference is less than the threshold value. |
| US09231509B2 |
System and method for operating a power generation system within a power storage/discharge mode or a dynamic brake mode
In one aspect, a system for operating a power generation system within a battery storage/discharge mode or a dynamic brake mode may generally include a power convertor having a DC link, a switching module coupled to the DC link and a selector switch configured to selectively couple the switching module to one of a storage device or a resistive element of the power generation system. The selector switch may be movable between a first position, wherein the switching module is coupled to the storage device such that power is capable of being directed between the DC link and the storage device via control of the switching module, and a second position, wherein the switching module is coupled to the resistive element such that power is capable of being directed between the DC link and the resistive element via control of the switching module. |
| US09231506B2 |
Semiconductor device, electrical device and control signal, generation method
A The present invention provides a semiconductor device, an electrical device, and a control signal generation method that enable easy generation of a given control signal even by a comparatively low cost and low processing power microcontroller, whereby a microcontroller of a motor control system includes a PWM device equipped with a PWM setting register. The PWM setting register includes a duty update cycle register, a duty update value register and a duty update-times number register. A PWM generator generates and outputs a PWM signal according to values set in each register of the PWM setting register. The PWM device is capable of generating and outputting a PWM signal automatically with the PWM generator according to setting values set in the PWM setting register, even without an interruption by the software (CPU). |
| US09231502B2 |
Motor control system and fan apply thereto
A motor control system includes a voltage regulating module, an auxiliary activating module, and a drive module. The voltage regulating module is operable to receive a voltage and generate an electrical level regulated voltage by regulating the voltage. The auxiliary activating module is operable to generate a constant duty cycle signal and output the constant duty cycle signal for a period. The drive module is operable to receive the electrical level regulated voltage and the constant duty cycle signal, and control a motor based on the electrical level regulated voltage and the constant duty signal. Also, the present invention also discloses a fan which is applied to the above-mentioned motor control system. |
| US09231500B2 |
Sensorless motor braking system
An electric motor control system includes a motor control circuit for generating a motor control signal and a braking mechanism for adjusting the motor control signal to augment motor losses when the motor control circuit is in a braking mode. The braking mechanism includes a difference component for receiving a first signal containing motor reference speed information, for receiving a second signal containing actual speed information, and for generating a third signal containing information indicating a difference between the reference speed and the actual speed. An integrating component integrates the third signal and generates a fourth signal representing the integrated third signal. The fourth signal may augment a voltage control signal in a voltage-based control circuit or may augment a flux-producing component of a current control signal in a current-based control circuit. The electric motor control circuit may include multiple braking mechanisms for use in different modes of operation. |
| US09231499B2 |
Control device for internal combustion engine
There is provided a control device for an internal combustion engine. An electricity generator is configured to be driven by the internal combustion engine. A battery is configured to store electricity generated by the electricity generator. A discharge amount detection section is configured to detect a discharge amount of the battery. An automatic stop control section is configured to automatically stop the internal combustion engine when the discharge amount is a first setting value or less. A continuous discharge amount detection section is configured to detect a continuous discharge amount of the battery based on the discharge amount. An automatic stop prohibition section is configured to prohibit an automatic stop when the continuous discharge amount is a second setting value or more, which is lower than the first setting value. |
| US09231497B2 |
Optical member driving apparatus and lens apparatus having the same
An optical member driving apparatus includes an optical member holder holding an optical member, which is rectilinearly guided and has a rotating member supported rotatably about a rotation shaft extending perpendicularly to a movable direction in which the optical member holder is movable, a fixed member that extends in the movable direction, has two sliding surfaces facing each other with predetermined spacing therebetween, and is arranged in such a way that the rotating member is located between the two sliding surfaces, two movers each of which includes a base and a vibrator connected to the base, and a controller that controls driving of the two vibrators to move the optical member holder in the movable direction. The vibrators of the two movers are in pressure contact with one and the other of the two sliding surfaces respectively. The rotating member is rotatably held between the bases of the two movers. |
| US09231494B2 |
Power supply device with a resonant bridge circuit control unit
In a power supply device, the bridge circuit including a plurality of switching arms which is an inverse-parallel circuit of a semiconductor switch and a diode. The power supply device includes a control unit. The control unit switches the semiconductor switch such that a voltage v between AC terminals becomes a positive-negative voltage whose peak value is the voltage Vo between the DC terminals only during prescribed time periods before and after a point that has deviated from each zero crossing point ZCP of a current i by a prescribed compensation period φ and such that the voltage v between the AC terminals becomes a zero voltage during the other time periods, and sets the compensation period φ such that a time period during which the voltage v between the AC terminals becomes a zero voltage is the shortest. |
| US09231493B1 |
Rectifier with auxiliary voltage output
A rectifier includes two input paths configured to receive an alternating input voltage, two output paths configured to provide a direct output voltage, and an auxiliary output path configured to provide an auxiliary output voltage. At least two rectifying paths are connected between each of the input and output paths. At least two rectifying paths are switched-mode rectifying paths that are connected to the same output path. The two switched-mode rectifying paths are configured to connect one output path to one input path during one half wave of the input voltage, and to connect the one output path to the other input path during the other half wave. The two switched-mode rectifying paths each comprise two semiconductor elements with controllable paths that are series-connected with each other by an auxiliary output node. At least one rectifier element is connected between the auxiliary output and the two auxiliary output nodes. |
| US09231491B2 |
Cabinet-based DC power systems
In an embodiment, a compact factory assembled and tested cabinet-based Direct Current (DC) power system includes at least one Alternating Current (AC) to DC converter disposed in a cabinet as at least one interchangeable module. An AC input section is also disposed in the cabinet and supplies AC power to the converter(s). At least one other electrical component is disposed in the cabinet, possibly as a module and it receives DC power from the converter(s). Other embodiments are also disclosed. |
| US09231490B2 |
Frequency converter unit
A frequency converter unit includes a unit body, input bus bar means and output bus bar means. The input bus bar means have a plurality of input side bus bars spaced apart in a first direction, and the output bus bar means have a plurality of output side bus bars spaced apart in the first direction, which is perpendicular to an installation direction of the frequency converter unit. Each of the plurality of input side bus bars and the plurality of output side bus bars includes an aperture configured to connect the bus bar to a counterpart contact in a frame with a bolt-nut connection. |
| US09231489B2 |
Power adaptor
A power adaptor is provided. The power adaptor includes a connector, a rectifier, a filter, a regulator and a switching unit coupled between the rectifier and the filter. The connector receives an alternating current (AC) power. The rectifier provides a direct current (DC) power according to the AC power. The filter filters the DC power to generate a filtered signal. The regulator provides an output voltage according to the filtered signal. A switching state of the switching unit corresponds to the DC power. |
| US09231487B2 |
DC power source device and power conversion method using a single drive power supply
FETs disposed in a DC/DC converter are each driven by a drive transformer. A voltage from a single drive power supply disposed in common for the FETs is divided into positive and negative biases to be applied to the FETs, and an operational state of the FETs is detected based on voltage signals. A sequence circuit turns on an input from a three-phase AC power supply by driving a relay circuit at a time point when it is confirmed that the FETs have normally started stable ON/OFF operation, and drives a power factor improvement circuit, which converts AC voltage from the three-phase AC power supply into a DC voltage by simultaneously performing full-wave rectification and power factor improvement. |
| US09231485B2 |
Power supply
A power supply may include a driving power supply unit converting input power to supply driving power to a load, and a power supply control unit performing a control to detect a change in a voltage level of the driving power and cut off the input power when the detected voltage level of the driving power is equal to or more than a preset voltage level, in a preset standby mode. |
| US09231474B2 |
DC/DC converter and display device
There are provided a DC/DC converter and a display device. The DC/DC converter includes: an inductor connected to an input terminal; a switching element connected between the inductor and the earth; a diode connected between the inductor and an output terminal; a capacitor connected between the output terminal and the earth; a feedback circuit connected between the output terminal and the earth and outputting a feedback voltage; and an oscillating circuit performing an ON/OFF control of the switching element at a frequency corresponding to the received feedback voltage. The DC/DC converter further includes: a detection circuit which detects an external magnetic field and outputs a signal that is different depending on whether or not the detected magnetic field exceeds a predetermined threshold; and a control circuit performing a control of the DC/DC converter according to the signal, to suppress an overcurrent of the DC/DC converter in a strong magnetic field. |
| US09231468B2 |
Interleaved converter with inter-inductor switch
An interleaved converter configured by connecting a plurality of switching converter circuits in parallel includes an inter-inductor switch that selects whether inductors are connected in series, an input side switch that is connected to a connection point of the inductor and the inter-inductor switch and selects whether electric power is supplied from a rectifier circuit to the inductor side, an output side switch that is connected to a connection point of the inductor and the inter-inductor switch and selects whether electric power is supplied from the inductor to the diode side, and a control circuit that controls the inter-inductor switch, the input side switch, and the output side switch. |
| US09231466B2 |
Electronic circuit
The invention provides an electronic circuit capable of reducing surge voltage while reducing switching loss when a MOSFET is turned off. A capacitor (91) is connected between apart closer to a first power source terminal (31) of a U-phase module (3) in a bus bar (61a) and a part closer to a second power source terminal (32) of the U-phase module (3) in a bus bar (64a). A capacitor (92) is connected between apart closer to a first power source terminal (41) of a V-phase module (4) in a bus bar (62) and a part closer to a second power source terminal (42) of the V-phase module (4) in a bus bar (65). A capacitor (93) is connected between a part closer to a first power source terminal (51) of a W-phase module (5) in a bus bar (63) and a part closer to a second power source terminal (52) of the W-phase module (5) in a bus bar (66). |
| US09231465B2 |
Motor control apparatus
A motor control apparatus controlling a driving of a motor having two pairs of winding sets is provided. The motor control apparatus includes a current command value calculation portion, a first system, a second system, and a temperature difference calculation portion. The first system includes a first power inverter circuit, a first temperature sensor, a first current limit setting portion, and a first controller. The second system includes a second power inverter circuit, a second temperature sensor, a second current limit setting portion, and a second controller. One of the first controller and the second controller stops a driving of one of the first power inverter circuit and the second power inverter circuit or reduces the current limiting value of this. |
| US09231459B2 |
Motor topology with exchangeable components to form different classes of motors
Exchangeable stator components are selected and exchangeable rotor components are selected to transform a motor from one motor class to another motor class. A motor class includes a switched reluctance (SR) motor class, a parallel path magnetic technology (PPMT) motor class, or an interior permanent magnet (IPM) motor class. |
| US09231454B2 |
Motor provided with a printed circuit board
A motor includes a stationary unit, a rotary unit, and a bearing unit. The stationary unit includes a stator, a PCB and a base member. The stator includes a stator core and coils. The stator is arranged radially outward of the bearing unit. The PCB includes through-hole portions, land portions and PCB fixing portions. The base member includes a stator holding portion arranged to hold the stator and a bearing holding portion arranged to hold the bearing unit. The rotary unit includes a shaft positioned radially inward of the bearing unit and a magnet opposed to a circumferential surface of the stator core. The through-hole portions are arranged along a circumferential direction of the PCB. At least a portion of the PCB axially overlaps with the bearing unit. The PCB fixing portions are arranged radially outward of the through-hole portions. |
| US09231453B2 |
Electric actuator
An electric actuator includes a motor, an electricity storing body, a manual operating unit, a switch and a resetting unit. In a state wherein a controlled element has arrived at a first opening and a supply of power to the motor from the electricity storing body is cut off, the motor and the controlled element are in a non-linked state only while a button is pushed. The switch keeps a supply path of electric power open when the button has been pressed once. The resetting unit closes the switch at a point in time that the controlled element that is driven by the motor arrives at a specific second opening at a time of restoration of the external power supply in a state wherein the non-linked state of the motor and the controlled element by the button has been undone. |
| US09231449B2 |
Rotating electric machine and electric power steering device
A rotating electric machine for driving a drive object is provided. The rotating electric machine includes a motor case, a stator, a winding, a rotor, a shaft, a base cap, an end cap, an output rod, base cap holes, end cap holes, and through bolts. The base cap has base cap flanges formed on a circumferential edge and extending radially-outward beyond an outer wall of the motor case. The end cap has end cap flanges formed on a circumferential edge and extending radially-outward beyond the outer wall of the motor case. Base cap holes are formed on the base cap flanges and end cap holes in axial alignment with the base cap holes are formed on the end cap flanges. Through bolts fasten the base cap flanges to the end cap flanges. |
| US09231447B2 |
Stator winding of an electric generator
Apparatus for producing electrical power from mechanical power, includes an electric generator with a rotor and with a stator. The electric generator is configured for conversion of mechanical power into a polyphase alternating current. The polyphase alternating current has more than three phases. The stator has a stator core with a stator bore. The stator core provides a plurality of stator slots arranged at a distance from one another. A plurality of coil portions are inserted in the stator slots, and the coil portions are connected to form coils. The coils include a plurality of Z-shaped portions and are laid out in a wave pattern. |
| US09231432B2 |
Electronic device and charging circuit thereof
A charging circuit is used to charge a rechargeable battery. The charging circuit includes a voltage conversion unit and a leakage prevention unit. The voltage conversion unit converts a voltage of a power supply into a charging voltage of the rechargeable battery, and outputs the charging voltage to the leakage prevention unit. When the leakage prevention unit receives the charging voltage, the leakage prevention unit charges the rechargeable battery with the charging voltage. When the leakage prevention unit does not receive the charging voltage, the leakage prevention unit prevents a leakage of the rechargeable battery. |
| US09231429B2 |
Power receiving device and wireless power supply system
Provided is a power receiving device in which supply of power from a power supply device can be stopped while a reduction in Q-value is suppressed. The power receiving device includes a first antenna which forms resonant coupling with an antenna of the power supply device; a second antenna which forms electromagnetic induction coupling with the first antenna; a rectifier circuit including a plurality of switches and performing a first operation or a second operation depending on whether the plurality of switches is ON or OFF, the first operation being an operation in which voltage applied from the second antenna is rectified to be outputted, and the second operation being an operation in which a pair of power supply points is short-circuited; a load to which the voltage is applied; and a control circuit which generates a signal for selecting ON or OFF of the plurality of switches. |
| US09231427B2 |
Electronic device with battery recharge notification while in a disabled state
A delayed power-on function for an electronic device is disclosed. A charging unit charges a rechargeable battery with a pre-charge current when a voltage of the rechargeable battery is less than a voltage threshold value and with a current larger than the pre-charge current when the voltage of the rechargeable battery is greater than the voltage threshold value. A disabling unit can disable power-on when the voltage of the rechargeable battery is less than the voltage threshold value. A user may also be notified when power-on is disabled. |
| US09231423B2 |
Electric vehicle supply equipment and control method thereof
A voltage at an output end of a switch of an electric vehicle supply equipment is detected before charging an electric vehicle. An earth leakage circuit breaker is tripped for cutting off power inputted to the switch and preventing the output end from outputting the power when the voltage is higher than a first predetermined value. The switch is turned on for outputting the power from the output end to charge the electric vehicle when the voltage is lower than the first predetermined value. A current is detected at the output end. Power inputted to the switch is cut off for preventing the output end from outputting the power when the current is higher than a second predetermined value. |
| US09231422B2 |
Interconnecting solar rechargeable batteries
Portable stackable solar batteries are disclosed, in which the solar batteries can be connected in a planar arrangement for solar recharging and connected in a vertically stacked arrangement for powering an electrically powered device and/or for charging another rechargeable battery. |
| US09231420B2 |
Cell balance circuit and cell balance device
To provide a cell balance circuit and a cell balance apparatus with a low cost and with a compact size, and configured to equalize the charge voltages of rechargeable batteries when the rechargeable batteries are charged or discharged, while suppressing deterioration of the rechargeable batteries. A cell balance circuit AA includes a transformer T, a switch SW1 arranged so as to form a set with a rechargeable battery BT1, and a switch SW2 arranged so as to form a set with a rechargeable battery BT2. The transformer T includes a primary winding Wa arranged so as to form a set with the rechargeable battery BT1, and a secondary winding Wb arranged so as to form a set with the rechargeable battery BT2. When the rechargeable batteries BT1 and BT2 are charged or discharged, the cell balance circuit AA synchronously controls the switches SW1 and SW2. |
| US09231411B2 |
Selectable coil array
An inductive wireless power system using an array of coils with the ability to dynamically select which coils are energized. The coil array can determine the position of and provide power to one or more portable electronic devices positioned on the charging surface. The coils in the array may be connected with series resonant capacitors so that regardless of the number of coils selected, the resonance point is generally maintained. The coil array can provide spatial freedom, decrease power delivered to parasitic loads, and increase power transfer efficiency to the portable electronic devices. |
| US09231407B2 |
Battery system, method of controlling the same, and energy storage system including the battery system
A battery management system used to monitor a number of batteries. This battery management system includes a number of isolation circuits electrically connected to the batteries. The battery management system includes a measuring unit electrically connected to the isolation circuits to turn on or off the isolation circuits and measure voltages simultaneously of the batteries when the isolation circuits are turned on by the measuring unit. |
| US09231397B2 |
Cable gland assembly
A cable gland assembly includes a mounting member mounted in a predetermined object, one or multiple connection members, an outer cap, and one first packing device and one or multiple second packing devices mounted in the mounting member between the connection members and the outer cap and compressible by the outer cap and the connection members to wrap about the periphery of an inserted cable and to provide multiple packing effects. Thus, the cable gland assembly has high IP rating, and is practical for dynamic mechanical application, or application in a deep-water environment or high explosive atmosphere. |
| US09231396B2 |
Supply line reservoir
A supply line reservoir in an appliance housing for connecting lines that enter the housing and connect to insertable and removable appliances that are accommodated within includes a spare length of the connecting line. This spare length is fixed within said housing in such a way that an-appliance can be taken out of the housing while maintaining a connection of the line. The spare length of connecting line is guided within said housing when the appliance is in said housing, and released from the housing when the appliance is taken out of said housing. |
| US09231389B2 |
Electrical box, integrated flange and cover mechanisms
A “no profile” electrical box, integrated flange/protective assembly and interchangeable cover that obscures standard electrical outlets such that a wall surface appears nearly continuous, uninterrupted by the outlet or cover when in use or not in use. The profile of the combined unit equals only the thickness of the material from which it is constructed; no hinges, screws or fasteners of any kind are visible and no part of the assembly requires detachment or storage when the outlet is in use, as the hinged cover is undetectably stored in the electrical box, or may be used to cover the electrical cords when engaged in the outlet. Exemplary embodiments of the cover obscure the electrical outlet. Together, the electrical box and flange assembly allow the electrical outlet to be flush mounted or recessed interchangeably, even after installation. |
| US09231387B2 |
System for inserting and removing cables
A method and system for installing and removing a row of cables from a cable array is provided. The method includes providing an installation tool having a first body with a plurality of arms extending from one side. The plurality of arms being configured to receive a cable connector body, the plurality of arms including at least one first projection extending from one of the plurality of arms. The installation tool is moved onto a row of cables held coupled together by a bracket, each of the cables in the row of cables having a cable connector body. The connector bodies are engaged into receptacles and the bracket is moved with the at least one first projection. |
| US09231385B2 |
Method and tool for adjusting cable grips
A tool for adjusting a grip. The tool includes a tubular section for containing the grip while receiving a cable. A first stop is positioned in or near a first end of the tubular section to provide an opening for introducing the cable into the tubular section while the grip is contained in the tool. One of first and second stops is arranged for displacement along the longitudinal axis with respect to the other stop. With the grip positioned between the first and second stops, when one of the stops is displaced toward the other stop a force is applied against the grip, causing the size of the bore to increase and the length of the grip to be contracted. |
| US09231383B2 |
Corona discharge assembly, ion mobility spectrometer, computer program and computer readable storage medium
The present invention discloses a corona discharge assembly, including: an ionization discharge chamber, wherein the ionization discharge chamber includes a metal corona cylinder, and the metal corona cylinder is provided with an inlet of a gas to be analyzed and an annular piece-shaped port which forms a non-uniform electric field with corona pins and is provided with a circular hole at the middle; a rotating shaft is installed on the cylinder wall of the metal corona cylinder in an insulating manner, the rotating shaft is vertical to the axial line of the metal corona cylinder, and a turntable provided with multiple corona pins at the outer edge is installed at the end part of the rotating shaft the axial line of the metal corona cylinder passes in parallel through the rotation plane of the turntable. The present invention further discloses an ion mobility spectrometer using the above-mentioned corona discharge assembly. |
| US09231380B2 |
Electrode material for a spark plug
An electrode material for use with spark plugs and other ignition devices. The electrode material is a two-phase composite material that includes a matrix component and a dispersed component embedded in the matrix component. In a preferred embodiment, the matrix component is a precious-metal based material and the dispersed component includes a material that exhibits a high melting point and a low work function such as, for example, carbides, nitrides, and/or intermetallics. A process for forming the electrode material into a spark plug electrode is also provided. |
| US09231378B2 |
Spark plug for internal combustion engine
A spark plug for an internal combustion engine includes a center electrode, a tubular insulator, a tubular metal shell, a ground electrode and an overvoltage preventer. The insulator has the center electrode inserted and held therein. The metal shell has the insulator inserted and held therein such that a proximal part of the insulator is exposed from the metal shell. The ground electrode is joined to a distal end of the metal shell and faces the center electrode through a spark gap formed between the center and ground electrodes. The overvoltage preventer prevents a voltage higher than or equal to a threshold voltage from being applied across the spark gap. The overvoltage preventer is arranged in the proximal part of the insulator so as to be positioned outside the metal shell and farther than the metal shell from the spark gap. |
| US09231376B2 |
Technique for the growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices
A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface. |
| US09231375B2 |
Semiconductor device
A semiconductor device includes: a semiconductor substrate made of a hexagonal Group III nitride semiconductor and having a semi-polar plane; and an epitaxial layer formed on the semi-polar plane of the semiconductor substrate and including a first cladding layer of a first conductive type, a second cladding layer of a second conductive type, and a light-emitting layer formed between the first cladding layer and the second cladding layer, the first cladding layer being made of Inx1Aly1Ga1-x1-y1N, where x1>0 and y1>0, the second cladding layer being made of Inx2Aly2Ga1-x2-y2N, where0≦x2≦about 0.02 and about 0.03≦y2≦about 0.07. |
| US09231373B2 |
Multi-chip VECSEL-based laser tunable independently at multiple wavelengths
A laser device capable to simultaneously generate light at multiple wavelengths that are independently (and, optionally, simultaneously) tunable without a limit of how small a spectral separation between such wavelengths can be made is enabled with the use of a laser-cavity network that (i) contains multiple spatially-distinct laser cavity portions all of which have at least one spatial region of the cavity network in common and (ii) is defined by such optical elements that prevent the intracavity amplification of light at first and second of multiple wavelengths at the expense of the same laser gain medium. Each of the distinct cavity portions contains a dedicated laser chip supporting the generation of light at a corresponding wavelength. In a special case, at least two of the multiple lasing wavelengths in the output of the device can be simultaneously and independently tuned to become equal. |
| US09231371B2 |
Wavelength-tunable optical transmission apparatus
A wavelength-tunable optical transmission apparatus including an optical array unit comprising a plurality of light sources whose wavelengths are changed, an optical driving unit configured to receive an electrical signal transmitted from an external circuit, generate the current and input the generated current to the optical array unit, and a control unit configured to control the magnitude of current input to the optical array unit by controlling the optical driving unit. |
| US09231364B2 |
Laser apparatus
A laser light generator emits laser light, a frequency of which can be adjusted. A laser light detector bombards an iodine cell with the laser light and photoelectrically converts the laser light that has passed through the iodine cell, then outputs a light output signal. A third order differential lock-in amplifier generates a third order differential signal of the light output signal. A frequency locker causes the laser light generator to change the frequency of the laser light within a predetermined range, detects an amplitude corresponding to a saturated absorption line occurring in the third order differential signal, and causes the frequency of the laser light to stabilize to a predetermined value. An error detector outputs an error signal in a case where the amplitude corresponding to the saturated absorption line occurring in the third order differential signal is greater than a predetermined value. |
| US09231362B2 |
Multi-pass slab laser with internal beam shaping
The laser resonator includes a first resonator wall, a second resonator wall that is substantially parallel to the first resonator wall and is separated from the first resonator wall in a first transverse direction thereby defining a gap having a gap width between the first and second resonator walls, and at least two laser cavity mirrors. The laser cavity mirrors are arranged to allow an intra-cavity laser beam to reflect from the output coupling mirror thereby forming a first beam spot on the output coupling mirror. The first curved mirror has a radius of curvature such that the reflection of the intra-cavity laser beam from the first curved mirror causes the first beam spot on the output coupling mirror to have a substantially symmetric shape. |
| US09231360B2 |
Crimper tool
A portable crimper tool is disclosed having a frame, a crimper anvil and a bolt adapted to engage the frame and connected to the crimper anvil for actuation of the crimper tool. |
| US09231358B1 |
Captive cable holder for power distribution unit serviceability
A power cable holder includes a holder body and power cable-holding portions. The power cable-holding portions couple with one or more cables. The cable-holding portions hold power plugs on the cables in a predetermined spacing and order with respect to one another. A power connector plug extraction mechanism may be operable by a user to extract the power connector plugs from corresponding power connector receptacles in a power distribution unit. |
| US09231355B2 |
USB connector having signal processing IC and USB cable having the USB connector
A USB cable includes two USB connectors and a plurality of cable lines. Each USB connector includes a circuit board, a tongue board, a plurality of connection terminals, a signal processing IC, an isolated housing and a metal housing. The tongue board is connected with the circuit board. One end of the connection terminals are connected to the circuit board, and the other end of the connection terminals are set in the tongue board. The signal processing IC is electrically connected to the circuit board and further connected to the connection terminals. The isolated housing encapsulates the circuit board and the signal processing IC. The metal housing encapsulates the tongue board and the connection terminals. The signal processing IC encrypts data for transmitting externally through the connection terminals, and decrypts data received by the connection terminals to transmit to other end of the USB cable to be used. |
| US09231351B2 |
Smart plugs, smart sockets and smart adaptors
A smart socket is provided. The smart socket has a set of power sockets, configured for a set of power pins of a smart plug to plug into, a driving pin and a set of detection pins, configured for forming a circuit with a set of feedback pins of a smart plug when the set of power pins is plugged into the power sockets, and an identification code module, configured for obtaining an identification code of an electric appliance, from the circuit, to which the smart plug belongs. |
| US09231350B2 |
Connector
A connector includes a cylindrical-shaped housing inserting therein a wire, a shield shell disposed on an outer side of the housing, and a mounting member assembled with the housing and the shield shell. The mounting member includes a tubular portion inserted into a gap between the housing and the shield shell in a diameter direction of the housing and contacted with an end face of the housing. The shield shell includes a fixing portion fixed to the housing and a movable portion rotatably connected to the fixing portion. A fixing mechanism is provided between the movable portion and the tubular portion, moves the end face toward the tubular portion when the movable portion is rotated, and fixes the housing and the shield shell to the mounting member when the tubular portion and the end face closely contacted with each other. |
| US09231348B2 |
Waterproof connector
A waterproof connector includes a housing (20) that accommodates terminal fittings (12). A rubber plug (40) is fit in the housing (20) and a rear holder (50) is mounted behind the rubber plug (40). The rear holder (50) is set in a partially locked state while inserting the terminal fittings (12) and is set in a fully locked state after the terminal fittings (12) are accommodated completely. A lever (80) is assembled with the housing (20) and is moved to assist a connection to a mating connector (90). Movement limiting portions (70) are retracted from a movable range of the lever (80) to permit movement of the lever (80) when the rear holder (50) is in the fully locked state, but are in the movable range of the lever (80) to limit movement of the lever (80) when the rear holder (50) is in the partially locked state. |
| US09231345B2 |
Connector and connector device
A connector is to be connected to a mating connector. The connector includes a base portion for accommodating a plug and a cable connected to the plug; a connecting member disposed on the base portion to be rotatable relative to the mating connector for connecting the connector to the mating connector; a tightening member disposed on the base portion to be movable relative to the connecting member for tightening the cable; and a rotation preventing member disposed on the base portion to be movable relative to the connecting member for engaging with the connecting member so that the rotation preventing member prevents the connecting member from rotating relative to the mating connector. |
| US09231342B2 |
Connector
A lock arm (33) is arranged on the upper surface of a female connector housing (27), and lock-arm protection walls (37) stand at opposite widthwise sides of the lock arm (33). Detector protection walls (38) are provided behind the lock-arm protection walls (37), and first and second lock receiving portions (43, 44) are formed on the inner surfaces thereof. Two inwardly deflectable locking arms (56) are formed on a detector (39) and locked to the first or second lock receiving portions (43, 44) to restrict a backward movement when the detector (39) is at an initial position and a detecting position. The locking arms (56) are arranged utilizing dead spaces behind the lock-arm protection walls (37). |
| US09231339B1 |
Electrical couplers and methods of using them
Certain embodiments described herein are directed to couplers configured to provide an electrical connection between two or more separate electrical wires. In certain embodiments, the coupler is configured to provide the electrical connection without the two electrical wires physically contacting each other. In other instances, the coupler can be configured to provide an electrical connection between the wires without the use of an electrical box or wiring nuts. |
| US09231335B2 |
Connection structure for solar power generation module
A main object of the present invention is to provide a connection structure for a solar power generation module that has much better impact resistance at low temperature and flame retardancy even when made thinner and more compact. A connection structure for a solar power generation module according to the present invention is a connection structure for a solar power generation module, which links a solar power generation module with a cable for connecting to the solar power generation module, and includes a specific thermoplastic resin composition. |
| US09231332B2 |
Built-up plug
A built-up plug includes a first portion and a second portion. The first portion includes a first shell, a first metal foot and at least one fixing mass on the first shell. The second portion includes a second shell, a second metal foot and at least one fixing groove on the second shell. The first metal foot protrudes from a top portion of the first shell. The second metal foot protrudes from a top portion of the second shell. The fixing mass is placed in the fixing groove to combine the first portion and the second portion. |
| US09231328B2 |
Resilient conductive electrical interconnect
An interconnect assembly including a resilient material with a plurality of through holes extending from a first surface to a second surface. A plurality of discrete, free-flowing conductive particles is located in the through holes. The conductive particles are preferably substantially free of non-conductive materials. A plurality of first contact tips are located in the through holes adjacent the first surface and a plurality of second contact tips are located in the through holes adjacent the second surface. The resilient material provides the required resilience, while the conductive particles provide a conductive path substantially free of non-conductive materials. |
| US09231327B1 |
Electronic circuit slidable interconnect
An electronic circuit interconnect apparatus that includes two zipper tracks configured to zip together thereby causing a first circuit to electrically couple with a second circuit. Specifically, each of the zipper tracks include a plurality of teeth, one or more of which are electrically coupled to the first circuit or the second circuit. As a result, when the teeth coupled to the first circuit are zipped to the teeth coupled to the second circuit it causes the first and second circuits to be electrically coupled. |
| US09231325B2 |
Electrical contact with male termination end having an enlarged cross-sectional dimension
An electrical contact including a male termination end configured to be removably inserted into a female termination end of a mating contact. The male termination end having a slot between two beam sections. The slot is formed by a section of the male termination end having had material removed between the two beam sections. The two beam sections are outwardly deformed in opposite directions. The two beam sections are substantially parallel to each other along a majority of length of the male termination end. |
| US09231322B2 |
Board-connecting electrical connector device
The operation of a lock member and the check thereof are easily and reliably enabled with a simple configuration while achieving downsizing. When a movable lock engagement part is moved along a lock guide part in a state in which a fixed lock latch part provided on either one of first and second electrical connectors is in an arrangement relation that the fixed lock latch part is overlapped with the lock guide part provided on the other one in a mating direction, the movable lock engagement part is engaged with or released from the fixed lock latch part. An operation of engaging or releasing the movable lock engagement part with/from the fixed lock latch part is carried out in a state in which the operation can be visually checked through a housing-operation opening and facing the electrical connectors. |
| US09231321B2 |
Slim-profile hard-disk drive connector
Connectors having a slim profile and that may be used for hard-disk drives and other devices. One example may provide a connector that provides a route path including a 180-degree turn while maintaining a slim profile. Another example may provide a connector having a slim profile that is easily manufactured. |
| US09231319B2 |
Electrical connector assembly with a supporting plate and assembly method of the same
An electrical connector assembly includes an electrical connector and a complementary connector mated with the electrical connector. The electrical connector includes a shell and a terminal module received in the shell. The shell defining a mating portion extending forwardly and a receiving room recessed from the rear face thereof. The mating portion defines a mating face at a side surface thereof. The terminal module includes an insulator and a plurality of first terminals retained in the insulator. The insulator defines a first face and a second face opposite to the first face. The first terminals includes contacting portions protruding from the first face of the insulator. A supporting plate is inserted between the second face of the insulator and an inner surface of the receiving room and pushing the contacting portions of the first terminals exposed to the mating face. |
| US09231318B2 |
Integrated package insertion and loading mechanism (iPILM)
A holding member and system including a first holding member and a second holding member, wherein each of the first holding member and the second holding member are coupled to opposite sides of a load plate of a socket. A holding member includes a body including a pair of arms extending from a first side of the body and spaced to accommodate a portion of an integrated circuit chip package therebetween and at least one clip extending from a second side opposite the first side. Also, a method including coupling an integrated circuit chip package to a first holding member and a second holding member, wherein the first holding member is coupled to a first side of a load plate of a socket and the second holding member is coupled to a second side of the load plate; and inserting the package into a socket of a printed circuit board. |
| US09231313B2 |
Finger friendly twist-on wire connector
A finger friendly twist-on wire connector having a spiral coil and an open end rigid shell secured to the spiral coil with the rigid shell having an outer surface with a circumferential band and a closed end supporting a finger cushion material integral to at least a portion of the outer surface of the rigid shell with the finger cushion material including a plurality of circumferentially spaced elongated ribs resiliently deformable in response to radially and tangential finger forces thereon as rotational finger forces are transmitted to the rigid shell through the finger cushion material to thereby inhibit finger fatigue and finger injury while allowing the user to maintain a feel of the wire engagement within the wire connector. |
| US09231310B2 |
Radar sensor antenna with anti-reflection element
An antenna for a radar sensor includes an emitter element, a receiver element, and an anti-reflection element. The emitter element is configured to direct the emitted signal along a boresight that intersects a fascia. The receiver element is configured to detect a reflected signal reflected by an object located beyond the fascia. The anti-reflection element is configured to reduce reflection by the antenna of an early-reflection portion reflected by the fascia. |
| US09231309B2 |
Metamaterial magnetic field guide
A magnetic field manipulation apparatus comprises a metamaterial structure, the metamaterial structure including a multilayer stack of metamaterial layers, each metamaterial layer including a substrate supporting one or more conductive loops. The metamaterial structure may be configured to redirect the magnetic flux around the metamaterial structure, and in some examples concentrated into a gap between two adjacent metamaterial structures. An apparatus may further include a magnetic field source such as an electromagnet. |
| US09231306B2 |
Patch antenna and wireless communications device
A patch antenna includes a dielectric body, radiation element, earth conductor and feed member. The dielectric body increases in cross-sectional area from a first end toward a second end thereof. The radiation element is disposed on a surface of the dielectric body, and each side of the radiation element has a length adjusted based on the frequency of a radio wave to be received and the effective permittivity of the dielectric body. The earth conductor is disposed on the bottom surface of the dielectric body. The feed member is electrically connected to the radiation element. |
| US09231300B1 |
Grounded mast clamp current probe electrostatic shield counterpoise
The present invention is a grounded mast clamp current probe apparatus. The apparatus can have a current probe substantially enclosed by at least one housing. The housing forms an electrostatic shield that prevents passage of electricity to or from the current probe. A plurality of grounding elements are connected to the outer surface of the housing and radiate outwardly from the outer circumference of the housing. Each of the grounding elements radiates at a frequency angle θ, the angle formed between a longitudinal axis of the housing and a longitudinal axis of the grounding elements. The bandwidth and resonant frequency of the current probe is dependent on the frequency angle θ. |
| US09231299B2 |
Multi-bandpass, dual-polarization radome with compressed grid
A radome is provided and includes a dielectric wall and one or more inductive metallic grids embedded in and/or disposed on the dielectric wall. Each of the one or more grids includes compressed grid arms and is tuned to permit bandpass transmission at upper and lower frequencies. |
| US09231294B2 |
Method and apparatus for compensating frequency shifting of antenna
The present invention provides a method and an apparatus for compensating frequency shifting of an antenna, applicable to a wireless communication device having at least one frequency shifted operating mode, in which a frequency shifting exists due to a variation of a device use mode or an environmental condition, wherein the method comprises setting in the antenna at least one compensation matching circuit corresponding to the at least one frequency shifted operating mode; detecting the use mode, in which the wireless communication device operates; when the wireless communication device is in the frequency shifted operating mode, switching to a compensation matching circuit corresponding to the frequency shifted operating mode as detected. In the present invention, the difficulty in the bandwidth design of the antenna is reduced, and the effect of the variation of the use mode or environmental condition on the performance of the antenna is compensated adaptively. |
| US09231292B2 |
Multi-antenna signaling scheme for low-powered or passive radio communications
A multi-antenna signaling scheme, system and method for passive or low-powered RF devices, such as a radio frequency identification tag, are herein described. In one embodiment, the presently disclosed subject matter discloses a Retrodirective Array Phase Modulator which is configured to allow RFID tags to return higher-powered signals with higher data rates back to an RFID interrogator or reader unit. In some configurations, pattern strobing is used which is an array-based transmission technique for stepping or sweeping an RF waveform through space so that passive radio devices may more efficiently harvest energy without increasing transmit power. In some configurations, the presently disclosed subject matter may also use a Staggered Pattern Charge Collector to boost the collection of microwave power. |
| US09231288B2 |
High frequency signal combiner
A high-frequency signal combiner comprises at least one first bridge coupler for the transformation of two input-end, first high-frequency signals into at least two output-end, first high-frequency signals in each case with identical power, and a second bridge coupler for the transformation of four input-end, second high-frequency signals, in each case with identical power, into an output-end, second high-frequency signal, of which the power corresponds to the summated power of the four input-end, second high-frequency signals. In this context, the four input-end, second high-frequency signals are each supplied from one output-end, first high-frequency signal. In order to add an integer multiple of four high-frequency signals, a cascade of second bridge couplers is realized with a number of cascade stages corresponding to the integer multiple. In every cascade stage, every second bridge coupler of the preceding cascade stage is replaced respectively by four second bridge couplers. |
| US09231284B2 |
Electronic device with power indication function and indicating method thereof
An electronic device with a battery displays a label for indicating different power levels of the battery. The label comprises a plurality of columns. Each of the columns is capable of being illuminated. A number of the columns lighted correspond to a corresponding the power levels in a one-to-one relationship. The electronic device comprises a detection module, storage, an acquiring module, a check module, and a display module. The detection module detects the current voltage of the battery at regular intervals and stores the information in the storage. The acquiring module acquires a previous detected voltage from the storage. The check module checks whether the current voltage is a fluctuated voltage. The display displays the label with the numbers of the lighted columns corresponding to the power level which contains the previous detected voltage when the current voltage is a fluctuated voltage. |
| US09231280B2 |
Power storage apparatus and electric vehicle
A power storage apparatus, electric device, electric vehicle, and power system are disclosed. In an example embodiment, a power storage apparatus includes a battery block comprising a plurality of battery cells and an isolating unit that enables wireless information transfer regarding battery information of the battery block. |
| US09231275B2 |
Method for manufacturing sulfide-based solid electrolyte
Provided is a method for manufacturing a sulfide-based solid electrolyte including preparing a precursor comprising lithium sulfide, germanium sulfide, aluminum sulfide, phosphorus sulfide, and sulfur, conducting a mixing process of the precursor to prepare a mixture, and crystallizing the mixture to form a compound represented by Li9.7Al0.3Ge0.7P2S12. The sulfide-based solid electrolyte may have high ionic conductivity. |
| US09231272B2 |
Electrode and method for producing the same
The electrode of the present invention includes a current collector and an active material-containing layer formed on one side or both sides of the current collector. The active material-containing layer has a thickness of 20 to 200 μm per one side of the current collector, and diethyl carbonate permeates the active material-containing layer at a rate of 0.1 g/(cm2·min) or higher. Further, the method for producing an electrode of the present invention includes the steps of: forming an electrode precursor by forming an active material-containing layer on one side or both sides of a current collector; and compressing the electrode precursor. In the electrode precursor forming step, the active material-containing layer is formed such that the active material-containing layer has a higher porosity in a portion close to the current collector then in other portions. |
| US09231271B2 |
Merged battery cell with interleaved electrodes
A battery having the electrodes of multiple cell types interleaved to prevent thermal runaway by cooling a shorted region between electrodes. The battery includes multiple cell types where each cell type has multiple electrodes a first polarity. The electrodes of each of the cell types share a pair of the common electrodes having a second polarity. The electrodes of the multiple cell types and the multiple common electrodes are interleaved such that if the electrodes of the multiple cell types and the adjacent common electrodes of one or more cell types short together, the current within the shorted cells is sufficiently small to prevent thermal runaway and the electrodes of the adjacent cells of the other cell types of the first polarity and the common electrodes of the second polarity not having short circuits provide heat sinking for the heat generated by the short circuit to prevent thermal runaway. |
| US09231270B2 |
Lithium-ion battery
The present invention provides a cylindrical lithium-ion secondary battery. The lithium-ion battery of the present invention has a structure in which the value of B/A is optimized, where the distance between an electrode pole to which strip-form lead pieces are welded, the lead pieces being formed intermittently in the winding direction, which is the longitudinal direction of the belt-like electrodes, and the inner wall of the battery can is represented by A, and the distance between the electrode pole and the wound electrode group is represented by B, in order to secure an exhaust passage for the gas generated upon occurrence of an abnormality in the battery. |
| US09231269B2 |
Non-aqueous electrolyte air battery
An object of the present invention is to provide a non-aqueous electrolyte air battery with large discharge capacity and excellent rate characteristics. Disclosed is a non-aqueous electrolyte air battery including an air cathode, an anode and a non-aqueous electrolyte present between the air cathode and anode, wherein the non-aqueous electrolyte includes an ionic liquid as the solvent, the ionic liquid including bis(fluorosulfonyl)amide as the anion portion. |
| US09231267B2 |
Systems and methods for sustainable economic development through integrated full spectrum production of renewable energy
In one embodiment of the present invention, a method for providing an energy supply using a renewable energy source is provided comprising: providing a first source of renewable energy, wherein the first source of renewable energy is intermittent or does not provide a sufficient amount of energy; providing energy from the first source of renewable energy to an electrolyzer to produce an energy carrier through electrolysis; selectably reversing the electrolyzer for use as a fuel cell; and providing the energy carrier to the electrolyzer for the production of energy. |
| US09231266B1 |
Nitric acid regeneration fuel cell systems
Methods and systems for regenerating a fuel cell are disclosed, comprising sparging a catholyte liquid with a gaseous oxygen-containing flow stream. In addition, the gaseous byproducts in the catholyte can be collected and then converted to liquid forms for easy disposal. In some embodiments, the regeneration process comprises intermittently regenerating an oxidant flow stream, for example, based on detected conditions. In some embodiments, the regeneration process comprises switching between different modes of oxidant regeneration, for example, based on detected conditions. |
| US09231253B2 |
Binder for electrode of lithium battery, binder composition including the binder, and lithium battery containing the binder
In an aspect, a binder for a lithium battery electrode, a binder composition including the binder, and a lithium battery including the binder are provided. The binder may include a water-soluble electroconductive polymer having a carboxylate functional group. |
| US09231251B2 |
Electrode active material and secondary battery
An electrode active material is based on an organic compound containing in the structural unit thereof a pyrazine structure bound to cycloalkane. The electrode active material and a secondary battery containing it have large energy density, outputting high power, and having excellent cycle characteristics with little reduction in capacity even after repetition of charging and discharging. |
| US09231249B2 |
Positive electrode active material for lithium ion battery, positive electrode for lithium ion battery, and lithium ion battery
The present invention provides a positive electrode active material for a lithium ion battery with excellent battery characteristics can be provided. The positive electrode active material for a lithium ion battery is represented by the following composition formula: Li(LixNi1-x-yMy)O2+α (in the formula, M represents at least one selected from Sc, Ti, V, Cr, Mn, Fe, Co, Cu, Zn, Ga, Ge, Al, Bi, Sn, Mg, Ca, B, and Zr, 0≦x≦0.1, 0 |
| US09231247B2 |
Electrode active material layer, electrode body, lithium-ion secondary battery, and method of producing electrode active material layer
An electrode active material layer for a lithium-ion secondary battery is formed from an electrode active material of layered crystal. The electrode active material having layered crystal is oriented in a layer direction of the electrode active material layer, and a plurality of through holes are formed from the surface of the electrode active material layer. The diameter of the through holes is preferably 10 μm to 5000 μm inclusive. |
| US09231245B2 |
Positive electrode plate for nonaqueous electrolyte secondary battery, method for manufacturing the positive electrode plate, nonaqueous electrolyte secondary battery, and method for manufacturing the battery
A positive electrode plate for a nonaqueous electrolyte secondary battery, the positive electrode plate including: a positive electrode substrate; a positive electrode active material layer formed on the positive electrode substrate; and a positive electrode substrate exposed portion on which the positive electrode active material layer is not formed, the positive electrode substrate exposed portion having a region that is adjacent to the positive electrode active material layer and has a protective layer formed thereon, the positive electrode active material layer and the protective layer containing polyvinylidene fluoride, and the weight average molecular weight Mw of the polyvinylidene fluoride contained in the protective layer being larger than the weight average molecular weight Mw of the polyvinylidene fluoride contained in the positive electrode active material layer. Thus, a high reliable nonaqueous electrolyte secondary battery where the widths of the positive electrode material and the protective layers are stable can be provided. |
| US09231243B2 |
Interconnected hollow nanostructures containing high capacity active materials for use in rechargeable batteries
Provided are electrode layers for use in rechargeable batteries, such as lithium ion batteries, and related fabrication techniques. These electrode layers have interconnected hollow nanostructures that contain high capacity electrochemically active materials, such as silicon, tin, and germanium. In certain embodiments, a fabrication technique involves forming a nanoscale coating around multiple template structures and at least partially removing and/or shrinking these structures to form hollow cavities. These cavities provide space for the active materials of the nanostructures to swell into during battery cycling. This design helps to reduce the risk of pulverization and to maintain electrical contacts among the nanostructures. It also provides a very high surface area available ionic communication with the electrolyte. The nanostructures have nanoscale shells but may be substantially larger in other dimensions. Nanostructures can be interconnected during forming the nanoscale coating, when the coating formed around two nearby template structures overlap. |
| US09231241B2 |
Battery pack
A battery pack including a secondary battery arranged on an elastic member and a piezoelectric member is provided. Vertical movement of the secondary battery within the battery pack generates electrical energy that may be used to charge the secondary battery. |
| US09231235B2 |
Battery pack
A battery pack includes a pouch-type bare cell, a protecting circuit module, a top case and a protecting circuit module support part. The pouch-type bare cell has a sealing region positioned in an extraction direction of an electrode lead. The protecting circuit module is positioned in the sealing region and connected to the electrode lead. The top case surrounds the protecting circuit module. The protecting circuit module support part is provided between the top case and the protecting circuit module. Accordingly, the protecting circuit module support part is formed between the top case and the protecting circuit module, so that it is possible to prevent a component mounted on the protecting circuit module from being damaged by an external impact and to prevent the inflow of a foreign matter from the outside of the battery pack, thereby improving the reliability and safety of the battery pack. |
| US09231232B2 |
Light-emitting element, light-emitting module, light-emitting panel, and light-emitting device
A light-emitting element, a light-emitting module, a light-emitting panel, or a light-emitting device in which loss due to electrical resistance is reduced is provided. The present invention focuses on a surface of an electrode containing a metal and on a layer containing a light-emitting organic compound. The layer containing a light-emitting organic compound is provided between one electrode including a first metal, whose surface is provided with a conductive inclusion, and the other electrode. |
| US09231229B2 |
Light emitting panel and manufacturing method of light emitting panel
In the present invention, a light emitting panel has a transmissive light emitting region comprising a light emission section for emitting light and a light transmitting section for transmitting light. The light emission section of the transmissive light emitting region has a light emitting part that emits light and a conductive reflective layer that blocks and reflects light. The light emitting part of the transmissive light emitting region has the following: a first electrode layer that is electrically connected to one surface of the reflective layer and that is conductive and light transmissive; a second electrode layer that is disposed facing the first electrode layer and that is conductive and light transmissive; and an organic EL layer interposed between the second electrode layer and the first electrode layer. The light transmitting section of the transmissive light emitting region has a first electrode layer that is not in the position of the reflective layer, a second electrode layer, and an organic EL layer. In the space between the first electrode layer and organic EL layer of the light transmitting section of the transmissive light emitting region, an insulative and light transmissive resin layer is filled thereinto. |
| US09231226B2 |
Terahertz wave modulator based on hole-injection and -transfer
The present invention relates to a terahertz wave modulator. The terahertz wave modulator includes: a semiconductor substrate; a terahertz modulation layer including an organic-material layer disposed on the semiconductor substrate; and a first incident wave radiation unit for vertically radiating a first incident wave having a terahertz wave region onto the terahertz modulation layer. The transmitted terahertz wave may be variously modified according to the degree of crystallization of an organic material deposited on the semiconductor substrate and according to the intensity of incident light so as to maximize modulation efficiency using the modified terahertz wave. Thus, a device for modulating wavelength width, amplitude, and phase through waveform deformation in a time region may be provided. Furthermore, by bonding together a plasmons or metamaterials having similar surfaces, a highly functional terahertz wave modulation device may be provided, wherein said device may be widely used for optical purposes. |
| US09231223B2 |
Three-dimensional bicontinuous heterostructures, method of making, and their application in quantum dot-polymer nanocomposite photodetectors and photovoltaics
The present invention provides of a three-dimensional bicontinuous heterostructure, a method of producing same, and the application of this structure towards the realization of photodetecting and photovoltaic devices working in the visible and the near-infrared. The three-dimensional bicontinuous heterostructure includes two interpenetrating layers which are spatially continuous, they are include only protrusions or peninsulas, and no islands. The method of producing the three-dimensional biocontinuous heterostructure relies on forming an essentially planar continuous bottom layer of a first material; forming a layer of this first material on top of the bottom layer which is textured to produce protrusions for subsequent interpenetration with a second material, coating this second material onto this structure; and forming a final coating with the second material that ensures that only the second material is contacted by subsequent layer. One of the materials includes visible and/or infrared-absorbing semiconducting quantum dot nanoparticles, and one of materials is a hole conductor and the other is an electron conductor. |
| US09231222B2 |
Thin film transistor and method of manufacturing the same
A thin film transistor (“TFT”) includes a gate electrode, a gate insulating layer, a source electrode, a drain electrode and a semiconductor layer. The gate insulating layer is disposed on the gate electrode. The source electrode is disposed on the gate insulating layer. The drain electrode is disposed on the gate insulating layer. The drain electrode is spaced apart from the source electrode. The semiconductor layer is disposed on the gate insulating layer. The semiconductor layer makes contact with a side surface of the source electrode and a side surface of the drain electrode. |
| US09231215B2 |
Phenacene compounds for organic electronics
Phenacene compounds of formula (I) are disclosed. All the variables in the formula are the same as defined in the description. A thin film semiconductor comprising the above compounds, and a field effect transistor device, a photovoltaic device, an organic light emitting diode device and a unipolar or complementary circuit device comprising the thin film are also disclosed. |
| US09231212B2 |
Fabrication apparatus for fabricating a layer structure
The invention relates to a fabrication apparatus for fabricating a layer structure comprising at least a patterned first layer on a substrate. A layer structure (6) with an unpatterned first layer is provided on the substrate. A protective material application unit (8) applies protective material at least on parts of the provided layer structure for protecting at least the parts of the provided layer structure (6), an ablation unit (12) ablates the unpatterned first layer through the protective material such that the patterned first layer is generated, and the protective material removing unit (15) removes the protective material (9). This allows fabricating a layer structure for, for example, an OLED without necessarily using a technically complex and costly photolithography process. Moreover, ablation debris can be removed with removing the protective material, thereby reducing the probability of unwanted effects like unwanted shortcuts in the OLED caused by unwanted debris. |
| US09231211B2 |
Method for forming a multicolor OLED device
A method is provided for forming a multi-color OLED device that includes providing a substrate, coating the substrate with a fluorinated photoresist solution to form a first photo-patternable layer and exposing it to produce a first pattern of exposed fluorinated photoresist material and a second pattern of unexposed fluorinated photoresist material, developing the photo-patternable layer with a fluorinated solvent to remove the second pattern of unexposed fluorinated photoresist material without removing the first pattern of exposed fluorinated photoresist material, depositing a first organic light-emitting material over the substrate to form a first organic light-emitting layer for emitting a first color of light and applying the first pattern of exposed fluorinated photoresist material to control the removal of a portion of the first organic light-emitting layer. A second fluorinated photoresist solution is then coated over the first patterned organic light-emitting layer and exposed to form a third pattern of exposed fluorinated photoresist material having a pattern different from the first pattern and a fourth pattern of unexposed fluorinated photoresist material, and developing the photo-patternable layer in a fluorinated solvent to remove the fourth pattern of unexposed fluorinated photoresist material without removing the third pattern of exposed fluorinated photoresist material, depositing at least a second light-emitting material to form a second light-emitting layer for emitting a second color of light that is different than the first color of light and applying the third pattern of exposed fluorinated photoresist material to control the removal of a portion of the second organic light-emitting layer. |
| US09231210B2 |
Manufacturing device and manufacturing method for organic EL element
A vapor deposition source (60), a plurality of limiting plates (81) and a vapor deposition mask (70) are disposed in this order. A substrate spaced apart from the vapor deposition mask at a fixed interval is moved relative to the vapor deposition mask. Vapor deposition particles (91) discharged from vapor deposition source openings (61) of the vapor deposition source pass through between neighboring limiting plates, pass through mask openings (71) formed in the vapor deposition mask, and adhere to the substrate, whereby coating films (90) are formed. The limiting plates limit the incidence angle of the vapor deposition particles that enter the mask openings, as viewed in the relative movement direction of the substrate. In this way, an organic EL element can be formed on a large-sized substrate without increasing the pixel pitch or reducing the aperture ratio. |
| US09231205B2 |
Low form voltage resistive random access memory (RRAM)
The present disclosure provides a resistive random access memory (RRAM) cells and methods of making the same. The RRAM cell includes a transistor and an RRAM structure. The RRAM structure includes a bottom electrode having a via portion and a non-planar portion, a resistive material layer conformally covering the non-planar portion of the bottom electrode; and, a top electrode on the resistive material layer. The via portion of the bottom electrode is embedded in a first RRAM stop layer. The non-planar portion of the bottom electrode has an apex and is centered above the via portion. |
| US09231197B2 |
Logic compatible RRAM structure and process
A memory cell and method including a first electrode conformally formed through a first opening in a first dielectric layer, a resistive layer conformally formed on the first electrode, a spacing layer conformally formed on the resistive layer, a second electrode conformally formed on the resistive layer, and a second dielectric layer conformally formed on the second electrode, the second dielectric layer including a second opening. The first dielectric layer is formed on a substrate including a first metal layer. The first electrode and the resistive layer collectively include a first lip region that extends a first distance beyond the first opening. The second electrode and the second dielectric layer collectively include a second lip region that extends a second distance beyond the first opening. The spacing layer extends from the second distance to the first distance. The second electrode is coupled to a second metal layer using a via that extends through the second opening. |
| US09231196B2 |
Magnetoresistive element and method of manufacturing the same
According to one embodiment, a magnetoresistive element is disclosed. The element includes a lower electrode, a stacked body provided on the lower electrode and including a first magnetic layer, a tunnel barrier layer and a second magnetic layer. The first magnetic layer is under the tunnel barrier layer, the second magnetic layer is on the tunnel barrier layer. The first magnetic layer includes a first region and a second region outside the first region to surround the first region. The second region includes an element in the first region and other element being different from the element. |
| US09231194B2 |
High stability spintronic memory
An embodiment includes a magnetic tunnel junction (MTJ) including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier between the free and fixed layers; the tunnel barrier directly contacting a first side of the free layer; and an oxide layer directly contacting a second side of the free layer; wherein the tunnel barrier includes an oxide and has a first resistance-area (RA) product and the oxide layer has a second RA product that is lower than the first RA product. The MTJ may be included in a perpendicular spin torque transfer memory. The tunnel barrier and oxide layer form a memory having high stability with an RA product not substantively higher than a less stable memory having a MTJ with only a single oxide layer. Other embodiments are described herein. |
| US09231193B2 |
Magnetic memory and manufacturing method thereof
According to one embodiment, a magnetic memory includes a magnetoresistive effect element provided in a memory cell, the magnetoresistive effect element including a multilayer structure including a first magnetic layer, a second magnetic layer, and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, a first electrode provided on an upper portion of the multilayer structure and including a first material, and a first film provided on a side surface of the first electrode and including a second material which is different from the first material of the first electrode. |
| US09231189B2 |
Sodium niobate powder, method for producing the same, method for producing ceramic, and piezoelectric element
A sodium niobate powder includes sodium niobate particles having a shape of a cuboid and having a side average length of 0.1 μm or more and 100 μm or less, wherein at least one face of each of the sodium niobate particles is a (100) plane in the pseudocubic notation and a moisture content of the sodium niobate powder is 0.15 mass % or less. A method for producing a ceramic using the sodium niobate powder is provided. A method for producing a sodium niobate powder includes a step of holding an aqueous alkali dispersion liquid containing a niobium component and a sodium component at a pressure exceeding 0.1 MPa, a step of isolating a solid matter from the aqueous dispersion liquid after the holding, and a step of heat treating the solid matter at 500° C. to 700° C. |
| US09231188B2 |
Piezoelectric ceramics, manufacturing method therefor, piezoelectric element, liquid discharge head, ultrasonic motor, and dust removal device
Provided are a barium titanate-based piezoelectric ceramics having satisfactory piezoelectric performance and a satisfactory mechanical quality factor (Qm), and a piezoelectric element using the same. Specifically provided are a piezoelectric ceramics, including: crystal particles; and a grain boundary between the crystal particles, in which the crystal particles each include barium titanate having a perovskite-type structure and manganese at 0.04% by mass or more and 0.20% by mass or less in terms of a metal with respect to the barium titanate, and the grain boundary includes at least one compound selected from the group consisting of Ba4Ti12O27 and Ba6Ti17O40, and a piezoelectric element using the same. |
| US09231186B2 |
Electro-switchable polymer film assembly and use thereof
The invention relates to an electro-switchable polymer film assembly having a first and a second surface side, comprising at least one pair of electrodes (3, 4) and a polymer matrix (2), wherein structuring particles (5) can be embedded in the polymer matrix and the polymer matrix or the structuring particles consist of an electro-active polymer, wherein furthermore, the first and/or the second surface sides can be transferred from a plane condition into a structured condition by electric switching of the electro-active polymer. |
| US09231185B2 |
Method for manufacturing a piezoelectric film wafer, piezoelectric film element, and piezoelectric film device
A method for manufacturing a piezoelectric film wafer includes a first processing step for carrying out an ion etching on a KNN piezoelectric film formed on a substrate by using a gas containing Ar, and a second processing step for carrying out a reactive ion etching by using a mixed etching gas containing a fluorine-based reactive gas and Ar after the first processing step. |
| US09231183B2 |
Resonator element, resonator, electronic device and electronic apparatus
When a length along a vibrating direction of the thickness shear vibration of a multi-stage type mesa substrate of A resonator element is x, a thickness of the vibration section is t, and a distance between the vibration section and the bonding region is y, y is in a range of −0.0151×(x/t)+0.3471≦y≦−0.0121×(x/t)+0.3471. |
| US09231182B2 |
Angular velocity sensor
In a piezoelectric element, a piezoelectric film, a first electrode film provided on one surface of the piezoelectric film, and a second electrode film provided on the other surface of the piezoelectric film form a layered structure, an outer contour of the first electrode film and an outer contour of the second electrode film are positioned outside an outer contour of the piezoelectric film as viewed in a layering direction, an organic resin film is in contact with the piezoelectric film, and generation of noise is suppressed. |
| US09231178B2 |
Wafer-level flip chip device packages and related methods
In accordance with certain embodiments, semiconductor dies are at least partially coated with a conductive adhesive prior to singulation and subsequently bonded to a substrate having electrical traces thereon. |
| US09231177B2 |
Light emitting device
Provided is a light emitting device in which deterioration of the substrate member can be reduced. The light emitting device includes a base member mainly made of a resin, a plurality of wiring portions and arranged on the base member via an adhesive agent, a groove portion defined between adjacent wiring portions, and at least one light emitting element which is disposed straddling at least a part of the groove portion. The adhesive agent is applied covering the base member from the groove portion, and contains a light-shielding member. The light-shielding member shields the base member from light, for example at a specific wavelength, emitted from the at least one light emitting element. |
| US09231175B2 |
Light emitting device with sealing member containing filler particles
A light emitting device includes a base substrate, a light emitting element, and a sealing member. The light emitting element is provided on the base substrate. The sealing member seals the light emitting element. The sealing member contains a parent material and filler particles unevenly distributed in a surface side of the sealing member and has a surface which has an irregular geometry formed associated with the filler particles. |
| US09231168B2 |
Light emitting diode package structure
A light-emitting diode package structure including a chip carrier portion, a light-emitting diode chip, and a package material is provided. The light-emitting diode chip is disposed on the chip carrier portion of the package. The package material is filled in the chip carrier portion and covers the light-emitting diode chip. The package material includes a matrix material, a plurality of first powder particles, and a plurality of second powder particles. The first powder particles and the second powder particles are distributed in the matrix material. Each first powder particle is a wavelength conversion material. Each second powder particle has a shell-like structure. |
| US09231166B2 |
Light emitting device and lighting apparatus having the same
Disclosed are a light emitting device and a lighting apparatus having the same. The light emitting device includes a plurality of lead frames, a first body having reflectance, disposed on top surfaces of the lead frames and having an open region at a predetermined region of the top surfaces of the lead frames, a second body having transmittance, having a first opening corresponding to the open region of the first body, and disposed on a top surface of the first body, a light emitting chip on at least one of the lead frames exposed in the first opening of the second body, and a first resin layer disposed in the first opening of the second body to cover the light emitting chip. |
| US09231164B2 |
Light-emitting device
A light-emitting device comprises a first semiconductor layer; and a transparent conductive oxide layer comprising a diffusion region having a first metal material and a non-diffusion region devoid of the first metal material, wherein the non-diffusion region is closer to the first semiconductor layer than the diffusion region. |
| US09231161B2 |
Nanowire LED structure and method for manufacturing the same
A method for ablating a first area of a light emitting diode (LED) device which includes an array of nanowires on a support with a laser is provided. The laser ablation exposes a conductive layer of the support that is electrically connected to a first conductivity type semiconductor nanowire core in the nanowires, to form a first electrode for the LED device. In embodiments, the nanowires are aligned at least 20 degrees from the plane of the support. A light emitting diode (LED) structure includes a first electrode for contacting a first conductivity type nanowire core, and a second electrode for contacting a second conductivity type shell enclosing the nanowire core, where the first electrode and/or at least a portion of the second electrode are flat. |
| US09231158B2 |
Light-emitting diode structure with electrode pads of similar surface roughness and method for manufacturing the same
A light-emitting diode (LED) structure and a method for manufacturing the LED structure are disclosed for promoting the recognition rate of LED chips, wherein a roughness degree of the surface under a first electrode pad of a first conductivity type is made similar to that of the surface under a second electrode pad of a second conductivity type, so that the luster shown from the first electrode pad can be similar to that from the second electrode pad, thus resolving the poor recognition problem of wire-bonding machines caused by different lusters from the first and second electrode pads. |
| US09231156B2 |
Method for manufacturing light emitting device, and light emitting device
A method for manufacturing a light-emitting device, comprising: forming, over a substrate, a plurality of multilayered light-emitting structures each including a first electrode, a light-emitting layer, and a second electrode; forming, in the substrate, a plurality of grooves that surround the multilayered light-emitting structures individually; forming, over the substrate, a sealing film that covers the multilayered light-emitting structures and the grooves; and separating the multilayered light-emitting structures from one another after forming the sealing film, by cutting the substrate such that, in each groove, part of the sealing film covering a given inner side surface of the groove remains, the given inner side surface being adjacent to any of the multilayered light-emitting structures. |
| US09231152B2 |
Light emitting diode
The present invention provides a light emitting diode, which comprises a first LED die, a second LED die, and a dummy LED die, wherein the second LED die is disposed between the first LED die and the dummy LED die, and each die comprises a first semi-conductive layer, a second semi-conductive layer, and a multiple quantum well layer disposed between the first and the second semi-conductive layers. The first semi-conductive layer of the first LED die is coupled to the second semi-conductive layer of the second LED die, and the first semi-conductive layer of the second LED die is coupled to the first and second semi-conductive layers of the dummy LED die. |
| US09231145B2 |
Trench process and structure for backside contact solar cells with polysilicon doped regions
A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched. |
| US09231144B2 |
Light collecting module
A light collecting module includes a pliable light guide, an inner light source, and a photocell. A surface of the light guide has a first area, a second area, and a third area. The first and second areas face each other, and the third area is adjacent to the first or second area. At least one optical structure is formed in the second area, and the photocell is adjacent to the third area. The optical structure is for redirecting ambient light incident on the first or second area such that the ambient light is guided to the third area by refraction or reflection and incident on the photocell. The optical structure is for redirecting the light from the inner light source such that the light is guided to the surface of the light guide by refraction or reflection and exits the light guide. |
| US09231139B2 |
Structure and design of concentrator solar cell assembly receiver substrate
A substrate has a top side and a bottom side. A solar cell is secured to the top side of the substrate and has an anode and a cathode. A heat transfer element is secured to the bottom side of the substrate. An anode pad is formed on the top side of the substrate and is coupled to the anode of the solar cell; similarly, a cathode pad is formed on the top side of the substrate and is coupled to the cathode of the solar cell. The substrate coefficient of thermal expansion and the solar cell coefficient of thermal expansion match within plus or minus ten parts per million per degree C. |
| US09231138B2 |
Method of producing barrier film exhibiting excellent gas barrier property, and barrier film
Provided are a barrier film production method and a barrier film comprising at least one organic layer and two or more inorganic layers on a surface of a plastic film, wherein, under an atmosphere of at least 0.3 atmospheric pressure and at most 1.1 atmospheric pressure (1 atmospheric pressure is 1.01325×105 Pa), an organic layer coating liquid is applied on at least one surface of the plastic film, and dried to form the organic layer, thereafter, an inorganic layer coating liquid containing an inorganic compound is applied and dried on the organic layer to laminate at least 2 to 6 inorganic layers, and thereafter, at least two layers of the laminated inorganic layers are subjected to a conversion process. |
| US09231136B2 |
Method for preparing perovskite film and solar cell thereof
A method for preparing a perovskite film includes the steps of applying a first solution on a substrate to form a film by spin coating and applying a second solution on the film made from the first solution by spin coating to form the perovskite film. The perovskite film is expressed by a general formula of ABX3. The solute of the first solution at least contains one of AX and BX2. The solute of the second solution at least contains one of AX and BX2. A method for preparing the solar cell using the perovskite film as the active layer (absorber) is also disclosed. |
| US09231134B2 |
Photovoltaic devices
Photovoltaic devices are presented. A photovoltaic device includes a window layer and a semiconductor layer including a semiconductor material disposed on window layer. The semiconductor layer includes a first region and a second region, the first region disposed proximate to the window layer, and the second region including a chalcogen-rich region, wherein the first region and the second region include a dopant, and an average atomic concentration of the dopant in the second region is greater than an average atomic concentration of the dopant in the first region. |
| US09231132B2 |
Process for manufacturing solar cell equipped with electrode having mesh structure
A solar cell having on a light incident surface side an electrode with both low resistivity and high transparency to promote efficient excitation of carriers using inexpensive materials. The solar cell includes a photoelectric conversion layer, a first electrode layer arranged on the light incident surface side, and a second electrode layer arranged opposed to the first electrode layer. The first electrode layer has a thickness in the range of 10 to 200 nm, and plural penetrating openings, each of which occupies an area in the range of 80 nm2 to 0.8 μm2, and has an aperture ratio in the range 10 to 66%. The first electrode layer can be produced by etching using an etching mask in the form of a single particle layer of fine particles, or of a dot pattern formed by self-assembly of a block copolymer, or of a stamper. |
| US09231130B2 |
Photoelectric conversion element and solar cell
Provided is a photoelectric conversion element that has an nip structure formed of amorphous silicon and that is improved in energy conversion efficiency by a structure in which an n+-type a-Si layer is in contact with a transparent electrode formed by an n+-type ZnO layer. This makes it possible to realize photoelectric conversion elements and a solar cell module or facility with large area and high power with an influence on the global resources minimized. |
| US09231129B2 |
Foil-based metallization of solar cells
Approaches for the foil-based metallization of solar cells and the resulting solar cells are described. In an example, a solar cell includes a substrate. A plurality of alternating N-type and P-type semiconductor regions is disposed in or above the substrate. A conductive contact structure is disposed above the plurality of alternating N-type and P-type semiconductor regions. The conductive contact structure includes a plurality of metal seed material regions providing a metal seed material region disposed on each of the alternating N-type and P-type semiconductor regions. A metal foil is disposed on the plurality of metal seed material regions, the metal foil having anodized portions isolating metal regions of the metal foil corresponding to the alternating N-type and P-type semiconductor regions. |
| US09231128B2 |
Solar cell module
A solar cell module is discussed. The solar cell module includes a plurality of solar cells, each solar cell including a substrate and an electrode part positioned at a surface of the substrate, an interconnector electrically connecting at least one of the solar cells to another of the solar cells; and a first conductive adhesive film including a first resin and a plurality of first conductive particles dispersed in the first resin. The first conductive adhesive film is positioned between the electrode part of the at least one solar cell and the interconnector to electrically connect the electrode part of the at least one solar cell to the interconnector. A contact surface between the first conductive particles and the interconnector is an uneven surface. |
| US09231121B2 |
High voltage circuit layout structure
A high voltage circuit layout structure has a P-type substrate; a first N-type tub, a second N-type tub, a third N-type tub, a first P-type tub with a first width and a second P-type tub with a second width formed on the P-type substrate; wherein the first P-type tub is formed between the first N-type tub and the second N-type tub; and the second P-type tub is formed between the second N-type tub and the third N-type tub. |
| US09231112B2 |
Convex shaped thin-film transistor device having elongated channel over insulating layer
The present invention provides a semiconductor device that has a shorter distance between the bit lines and easily achieves higher storage capacity and density. The semiconductor device includes: first bit lines formed on a substrate; an insulating layer that is provided between the first bit lines and in a groove in the substrate, and has a higher upper face than the first bit lines; channel layers that are provided on both side faces of the insulating layer, and are coupled to the respective first bit lines; and charge storage layers that are provided on the opposite side faces of the channel layers from the side faces on which the insulating layers are formed. |
| US09231099B2 |
Semiconductor power MOSFET device having a super-junction drift region
A semiconductor device includes: a first conductivity type semiconductor substrate; and a plurality of second conductivity type semiconductor regions, the respective second conductivity type semiconductor regions being embedded in a plurality of stripe shaped trenches formed in the semiconductor substrate so that the respective second conductivity type semiconductor regions are extended in the row direction or the column direction in parallel with a first principal surface of the semiconductor substrate and are spaced in a fixed gap mutually. The semiconductor substrate and the plurality of the semiconductor regions are depleted by a depletion layer extended in the direction in parallel to the first principal surface from a plurality of pn junction interfaces, and the respective pn junction interfaces are formed between the semiconductor substrate and the plurality of the semiconductor regions. |
| US09231096B2 |
Semiconductor device and field effect transistor with controllable threshold voltage
A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, Ga-face grown, lattice relaxed, and having a composition In1−zAlzN (0≦z≦1), a channel layer having a composition of: AlxGa1−xN (0≦x≦1) or InyGa1−yN (0≦y≦1). Or GaN provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode. |
| US09231094B2 |
Elemental semiconductor material contact for high electron mobility transistor
Portions of a top compound semiconductor layer are recessed employing a gate electrode as an etch mask to form a source trench and a drain trench. A low temperature epitaxy process is employed to deposit a semiconductor material including at least one elemental semiconductor material in the source trench and the drain trench. Metallization is performed on physically exposed surfaces of the elemental semiconductor material portions in the source trench and the drain trench by depositing a metal and inducing interaction with the metal and the at least one elemental semiconductor material. A metal semiconductor alloy of the metal and the at least one elemental semiconductor material can be performed at a temperature lower than 600° C. to provide a high electron mobility transistor with a well-defined device profile and reliable metallization contacts. |
| US09231091B2 |
Semiconductor device and reverse conducting insulated gate bipolar transistor with isolated source zones
A semiconductor device includes a semiconductor mesa with at least one body zone forming first pn junctions with source zones and a second pn junction with a drift zone. A pedestal layer at a side of the drift zone opposite to the at least one body zone includes first zones of a conductivity type of the at least one body zone and second zones of the conductivity type of the drift zone. Electrode structures are on opposite sides of the semiconductor mesa. At least one of the electrode structures includes a gate electrode controlling a charge carrier flow through the at least one body zone. In a separation region between two of the source zones (i) a capacitive coupling between the gate electrode and the semiconductor mesa or (ii) a conductivity of majority charge carriers of the drift zone is lower than outside of the separation region. |
| US09231085B2 |
Semiconductor structure and methods of manufacture
FinFET end-implanted-semiconductor structures and methods of manufacture are disclosed herein. The method includes forming at least one mandrel on a silicon layer of a substrate comprising an underlying insulator layer. The method further includes etching the silicon layer to form at least one silicon island under the at least one mandrel. The method further includes ion-implanting sidewalls of the at least one silicon island to form doped regions on the sidewalls. The method further includes forming a dielectric layer on the substrate, a top surface of which is planarized to be coplanar with a top surface of the at least one mandrel. The method further includes removing the at least one mandrel to form an opening in the dielectric layer. The method further includes etching the at least one silicon island to form at least one fin island having doped source and drain regions. |
| US09231081B2 |
Method of manufacturing a semiconductor device
In a method of manufacturing a semiconductor device, a body region is formed in an epitaxial layer provided on a semiconductor substrate. A part of a semiconductor material forming the body region surface is removed to form a convex-type contact region protruding from the body region surface and to form a shallow trench surrounding the convex-type contact region. A deep trench region is formed so as to extend from the shallow trench surface to inside of the epitaxial layer. A gate insulating film is formed on an inner wall of the deep trench region which is filled with polycrystalline silicon that is held in contact with the gate insulating film. A source region and a body contact region are formed in the shallow trench and the convex-type contact region, respectively, and a silicide layer is formed to connect the source region and the body contact region to each other. |
| US09231078B2 |
Semiconductor and manufacturing method thereof
A semiconductor element and a manufacturing method thereof are provided. The semiconductor element includes a base, an epitaxy layer, a first well, a second well, a third well, a first heavily doping region, a second heavily doping region, a implanting region and a conductive layer. The epitaxy layer is disposed on the base. The first well, the second well and the third well are disposed in the epitaxy layer. The third well is located between the first well and the second well. A surface channel is formed between the first heavily doping region and the second heavily doping region. The implanting region is fully disposed between the surface channel and the base and disposed at a projection region of the first well, the second well and the third well. |
| US09231071B2 |
Semiconductor structure and manufacturing method of the same
A semiconductor structure and a manufacturing method thereof are disclosed. The semiconductor structure includes an isolation layer, a gate dielectric layer, a first work function metal, a first bottom barrier layer, a second work function metal, and a first top barrier layer. The isolation layer is formed on a substrate and has a first gate trench. The gate dielectric layer is formed in the first gate trench. The first work function metal is formed on the gate dielectric layer in the first gate trench. The first bottom barrier layer is formed on the first work function metal. The second work function metal is formed on the first bottom barrier layer. The first top barrier layer is formed on the second work function metal. |
| US09231070B2 |
Nonvolatile semiconductor memory device and manufacturing method thereof, semiconductor device and manufacturing method thereof, and manufacturing method of insulating film
An object is to provide a technique to manufacture an insulating film having excellent film characteristics. In particular, an object is to provide a technique to manufacture a dense insulating film with a high withstand voltage. Moreover, an object is to provide a technique to manufacture an insulating film with few electron traps. An insulating film including oxygen is subjected to plasma treatment using a high frequency under the conditions where the electron density is 1×1011 cm−3 or more and the electron temperature is 1.5 eV or less in an atmosphere including oxygen. |
| US09231067B2 |
Semiconductor device and fabricating method thereof
A semiconductor device and a method of fabricating the semiconductor device are provided. The semiconductor device includes a substrate, a gate structure over the substrate, a source/drain regions adjacent to the pair of spacers in the substrate, an etch stop layer next to the gate structure and overlying the substrate, a contact plug extending into the source/drain region and partially overlapping the gate structure, a protective layer over the etch stop layer overlying the substrate and covering the etch stop layer next to the gate structure without the contact plug, and an interlayer dielectric layer over the protective layer. The contact plug has no contact-to-gate short issue to the gate structure. |
| US09231063B2 |
Boron rich nitride cap for total ionizing dose mitigation in SOI devices
A semiconductor-on-insulator (SOI) structure that includes a cap layer composed of a boron-rich compound or doped boron nitride located between a top semiconductor layer and a buried insulator layer is provided. The cap layer forms a conductive path between the top semiconductor layer and the buried insulator layer in the SOI structure to dissipate total ionizing dose (TID) accumulated charges, thus advantageously mitigating TID effects in fully depleted SOI transistors. |
| US09231061B2 |
Fabrication of surface textures by ion implantation for antireflection of silicon crystals
The invention relates to a new method of texturing silicon surfaces suited for antireflection based on ion implantation of hydrogen and heavy ions or heavy elements combined with thermal annealing or thermal annealing and oxidation. The addition of the heavy ions or heavy elements allows for a more effective anti-reflective surface than is found when only hydrogen implantation is utilized. The methods used are also time- and cost-effective, as they can utilize already existing semiconductor ion implantation fabrication equipment and reduce the number of necessary steps. The antireflective surfaces are useful for silicon-based solar cells. |
| US09231058B2 |
Gallium nitride semiconductor substrate with semiconductor film formed therein
A method of fabricating a single crystal gallium nitride substrate the step of cutting an ingot of single crystal gallium nitride along predetermined planes to make one or more signal crystal gallium nitride substrates. The ingot of single crystal gallium nitride is grown by vapor phase epitaxy in a direction of a predetermined axis. Each predetermined plane is inclined to the predetermined axis. Each substrate has a minor polished primary surface. The primary surface has a first area and a second area. The first area is between an edge of the substrate and a line 3 millimeter away from the edge. The first area surrounds the second area. An axis perpendicular to the primary surface forms an off-angle with c-axis of the substrate. The off-angle takes a minimum value at a first position in the first area of the primary surface. |
| US09231056B2 |
Semiconductor device and fabrication method therefor, and power supply apparatus
A semiconductor device includes a drift layer having a structure wherein a plurality of quantum dot layers each including a quantum dot containing InxGa1-xN (0≦x≦1) and a burying layer burying the quantum dot and containing n-type Inx(GayAl1-y)1-xN (0≦x≦1, 0≦y≦1) are stacked. |
| US09231051B2 |
Methods of forming spacers on FinFETs and other semiconductor devices
Disclosed herein are various methods of forming spacers on FinFETs and other semiconductor devices. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate that defines a fin, forming a first layer of insulating material in the trenches that covers a lower portion of the fin but exposes an upper portion of the fin, and forming a second layer of insulating material on the exposed upper portion of the fin. The method further comprises selectively forming a dielectric material above an upper surface of the fin and in a bottom of the trench, depositing a layer of spacer material above a gate structure of the device and above the dielectric material above the fin and in the trench, and performing an etching process on the layer of spacer material to define sidewall spacers positioned adjacent the gate structure. |
| US09231050B1 |
Configuration and method to generate saddle junction electric field in edge termination
This invention discloses a semiconductor power device disposed in a semiconductor substrate and having an active cell area and an edge termination area the edge termination area wherein the edge termination area comprises a superjunction structure having doped semiconductor columns of alternating conductivity types with a charge imbalance between the doped semiconductor columns to generate a saddle junction electric field in the edge termination. |
| US09231049B1 |
Semiconductor switching device with different local cell geometry
A semiconductor device includes a semiconductor substrate having an outer rim, a plurality of switchable cells defining an active area, and an edge termination region arranged between the switchable cells defining the active area and the outer rim. Each of the switchable cells includes a body region, a gate electrode structure and a source region. A source metallization is in ohmic contact with the source regions of the switchable cells. A gate metallization is in ohmic contact with the gate electrode structures of the switchable cells. The active area defined by the switchable cells includes at least a first switchable region having a specific gate-drain capacitance which is different to a specific gate-drain capacitance of a second switchable region. |
| US09231048B2 |
Capacitor and method of forming same
A device comprises a substrate having at least one active region, an insulating layer above the substrate, and an electrode in a gate electrode layer above the insulating layer, forming a metal-oxide-semiconductor (MOS) capacitor. A first contact layer is provided on the electrode, having an elongated first pattern extending in a first direction parallel to the electrode. A contact structure contacts the substrate. The contact structure has an elongated second pattern extending parallel to the first pattern. A dielectric material is provided between the first and second patterns, so that the first and second patterns and dielectric material form a side-wall capacitor connected in parallel to the MOS capacitor. |
| US09231047B2 |
Capacitors and methods with praseodymium oxide insulators
Methods of forming and the resulting capacitors formed by these methods are shown. Monolayers that contain praseodymium are deposited onto a substrate and subsequently processed to form praseodymium oxide dielectrics. Monolayers that contain titanium or other metals are deposited onto a substrate and subsequently processed to form metal electrodes. Resulting capacitor structures includes properties such as improved dimensional control. One improved dimensional control includes thickness. Some resulting capacitor structures also include properties such as an amorphous or nanocrystalline microstructure. Selected components of capacitors formed with these methods have better step coverage over substrate topography and more robust film mechanical properties. |
| US09231039B2 |
Organic light emitting diode display
An organic light emitting diode (OLED) display is provided. One inventive aspect includes: a substrate, a scan line formed on the substrate and transmitting a scan signal, a data line configured to intersect the scan line and to transmit a data signal, a switching transistor connected to the scan line and the data line, a driving transistor connected to a switching drain electrode of the switching transistor, a compensation transistor connected to the driving transistor, an aging transistor connected to a driving drain electrode of the driving transistor and a source electrode of the compensation transistor, and an organic light emitting diode (OLED) connected to a driving drain electrode of the driving transistor. The compensation transistor is configured to compensate a threshold voltage of the driving transistor. The aging transistor is configured to perform an aging process for reducing a leakage current of the compensation transistor. |
| US09231033B2 |
Display panel and method of manufacturing the same
A display panel includes a plurality of unit pixels, where each of the unit pixels has a hexagonal-shape and includes: a first sub-pixel configured to emit a first color light, where the first sub-pixel has a rhombus-shape; a second sub-pixel configured to emit a second color light, where the second sub-pixel has the rhombus-shape; and a third sub-pixel configured to emit a third color light, where the third sub-pixel has the rhombus-shape, where first sub-pixels, second sub-pixels or third sub-pixels of neighboring unit pixels in a same row are arranged to adjoin each other. |
| US09231029B2 |
Semiconductor memory device and method for manufacturing same
According to one embodiment, a semiconductor memory device includes a plurality of global bit lines, a plurality of word lines, a plurality of bit lines, a plurality of resistance change films, a plurality of semiconductor layers, a gate insulating film, and a plurality of gate electrodes. Spacing in the first direction between the plurality of semiconductor layers is larger than spacing in the second direction between the plurality of semiconductor layers. The plurality of gate electrodes is separated in the first direction. |
| US09231028B2 |
Non-volatile memory device and method of manufacturing the same
According to one embodiment, there are provided a memory cell forming region, a first wiring hookup region in which first wirings extending in a first direction are formed by being drawn outside of the memory cell forming region, a second wiring hookup region which is disposed in a layer above the first wirings and in which second wirings extending in a second direction are formed by being drawn outside of the memory cell forming region, and a first dummy wiring connected to each of the second wirings. The first dummy wiring is disposed so that a sum of the area of the second wiring and the area of the first dummy wiring becomes the same in the respective second wirings. |
| US09231027B2 |
Magnetic random access memory having perpendicular enhancement layer and interfacial anisotropic free layer
The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto. |
| US09231019B2 |
Solid-state image sensor and method of manufacturing the same
A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions. |
| US09231016B2 |
Method of manufacturing a solid-state image pickup apparatus improved spectral balance
A solid-state image pickup apparatus includes a substrate, a wiring layer, and a waveguide. The substrate is provided with a pixel array portion constituted of a plurality of pixels each having a photoelectric converter that converts incident light into an electrical signal. The wiring layer includes a plurality of wirings and an insulating layer that covers the plurality of wirings that are laminated above the substrate. The waveguide guides light to each of the photoelectric converters of the plurality of pixels, the waveguide being formed in the wiring layer. The waveguide is formed to have a waveguide exit end from which light exits the waveguide so that a distance between the waveguide exit end and a surface of the photoelectric converter that receives light from the waveguide become shorter, as wavelengths of light guided by the waveguide are longer. |
| US09231010B2 |
Photoelectric conversion apparatus and imaging system having impurity concentration profile in a depth direction of the plural semiconductor regions
A photoelectric conversion unit has first semiconductor regions and a second semiconductor region that is disposed between the first semiconductor regions being adjacently disposed in the unit. Impurity concentration profile in a depth direction of the first and semiconductor regions has a plurality of peaks. The impurity concentration peaks of the first semiconductor region include a first impurity concentration peak and a second impurity concentration peak being lower than the first impurity concentration peak. The impurity concentration peaks of the second semiconductor region include a third, a fourth, and a fifth impurity concentration peak. The fourth impurity concentration peak is higher than the third impurity concentration peak, and a fifth impurity concentration peak is higher than the third impurity concentration peak. The depth of the third impurity concentration peak is closer to the depth of the second impurity concentration peak than that of the first impurity concentration peak. |
| US09231007B2 |
Image sensors operable in global shutter mode and having small pixels with high well capacity
An image sensor operable in global shutter mode ma include small pixels with high charge storage capacity, low dark current, and no image lag. Storage capacity of a photodiode and a charge storage diode may be increased by placing a p+ type doped layer under the photodiode and the charge storage diode. The p+ type doped layer ma include an opening for allowing photo-generated charge carriers to flow from the silicon bulk to the charge storage well located near the surface of the photodiode. A compensating n− type doped implant may be formed in the opening. Image lag is prevented by placing a p− type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. The p+ type doped layer may extend under the entire pixel array. |
| US09231006B2 |
Semiconductor element and solid-state imaging device
A solid-state imaging device includes a semiconductor region of p-type; a buried region of n-type, configured to serve as a photodiode together with the semiconductor region; a extraction region of n-type, configured to extract charges generated by the photodiode from the buried region, having higher impurity concentration than the buried region; a read-out region of n-type, configured to accumulate charges, which are transferred from the buried region having higher impurity concentration than the buried region; and a potential gradient changing mechanism, configured to control a potential of the channel, and to change a potential gradient of a potential profile from the buried region to the read-out region and a potential gradient of a potential profile from the buried region to the extraction region, so as to control the transferring/extraction of charges. |
| US09231004B2 |
Solid-state imaging apparatus and imaging system
According to one embodiment, there is provided a solid-state imaging apparatus having an imaging region. In the imaging region, a plurality of pixels are two-dimensionally arranged. The plurality of pixels include a first pixel and a second pixel. The first pixel is arranged near a center of the imaging region. The second pixel is arranged at a position farther away from the center of the imaging region than the first pixel. The first pixel includes a first micro lens having a substantially circular shape as viewed in a plan view. The second pixel includes a second micro lens having a substantially elliptical shape as viewed in a plan view and having an area larger than an area of the first micro lens. |
| US09230990B2 |
Silicon-on-insulator integrated circuit devices with body contact structures
Silicon-on-insulator integrated circuits including body contact structures and methods for fabricating the same are disclosed. A method for fabricating a silicon-on-insulator integrated circuit includes filling a plurality of first and second shallow isolation trenches with an insulating material to form plurality of first and second shallow trench isolation (STI) structures, and forming a gate structure over the semiconductor layer that includes a first portion disposed over and parallel to at least two of the plurality of second STI structures and a second portion disposed in between the at least two of the plurality of second STI structures. The method further includes forming contact plugs to a body contact region of the semiconductor layer. The body contact region comprises a portion of the semiconductor layer between at least one of the plurality of first STI structures and at least one of the plurality of second STI structures. |
| US09230989B2 |
Hybrid CMOS nanowire mesh device and FINFET device
A semiconductor hybrid structure on an SOI substrate. A first portion of the SOI substrate containing a nanowire mesh device and a second portion of the SOI substrate containing a FINFET device. The nanowire mesh device including stacked and spaced apart semiconductor nanowires located on the substrate, each semiconductor nanowire having two end segments in which one of the end segments is connected to a source region and the other end segment is connected to a drain region; and a gate region over at least a portion of the stacked and spaced apart semiconductor nanowires, wherein each source region and each drain region is self-aligned with the gate region. The FINFET device including spaced apart fins on a top semiconductor layer on the second portion of the substrate; and a gate region over at least a portion of the fins. |
| US09230986B2 |
3D memory
Three-dimensional memory cells and methods of making and using the memory cells are discussed generally herein. In one or more embodiments, a three-dimensional vertical memory can include a memory stack. Such a memory stack can include memory cells and a dielectric between adjacent memory cells, each memory cell including a control gate and a charge storage structure. The memory cell can further include a barrier material between the charge storage structure and the control gate, the charge storage structure and the barrier material having a substantially equal dimension. |
| US09230983B1 |
Metal word lines for three dimensional memory devices
A method of making a monolithic three dimensional NAND string includes forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, etching the stack to form at least one opening in the stack and forming at least one charge storage region over a sidewall of the at least one opening. The method also includes forming a tunnel dielectric layer over the at least one charge storage region in the at least one opening, forming a semiconductor channel material over the tunnel dielectric layer in the at least one opening, selectively removing at least portions of the second material layers to form recesses between adjacent first material layers and forming ruthenium control gate electrodes in the recesses. |
| US09230982B1 |
Protective structure to prevent short circuits in a three-dimensional memory device
In a three-dimensional stacked non-volatile memory device, a short circuit is prevented in a select gate layer by providing a protective material such as a diode, capacitor, linear resistor or varistor between select gate lines and a remaining portion of the select gate layer. Charges which are accumulated in the select gate lines due to plasma etching are therefore prevented from discharging through the remaining portion in a short circuit path when the select gate lines are driven. The protective material can comprise a p-n diode, an n-i-n or p-i-p resistor, a thin oxide layer between doped polysilicon layers in a capacitor, or a variable-resistance material such as ZnO2 between oxide layers in a varistor. |
| US09230981B2 |
Semiconductor device
Provided are a semiconductor device. The semiconductor device includes a memory block including a drain select line, word lines, and a source select line, which are spaced apart from one another and stacked in a direction perpendicular to a semiconductor substrate; and a peripheral circuit including a switching device connected to a bit line, which is disposed under a vertical channel layer vertically passing through the drain select line, the word lines, and the source select line. |
| US09230980B2 |
Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device
A memory film layer is formed in a memory opening through an alternating stack of first material layers and second material layers. A sacrificial material layer is deposited on the memory film layer. Horizontal portions of the sacrificial material layer and the memory film layer at the bottom of the memory opening is removed by an anisotropic etch to expose a substrate underlying the memory opening, while vertical portions of the sacrificial material layer protect vertical portions of the memory film layer. After removal of the sacrificial material layer selective to the memory film, a doped semiconductor material layer can be formed directly on the exposed material in the memory opening and on the memory film as a single material layer to form a semiconductor channel of a memory device. |
| US09230977B2 |
Embedded flash memory device with floating gate embedded in a substrate
An embedded flash memory device includes a gate stack, which includes a bottom dielectric layer extending into a recess in a semiconductor substrate, and a charge storage layer over the bottom dielectric layer. The charge storage layer includes a portion in the recess. The gate stack further includes a top dielectric layer over the charge storage layer, and a metal gate over the top dielectric layer. Source and drain regions are in the semiconductor substrate, and are on opposite sides of the gate stack. |
| US09230976B2 |
Method of making ultrahigh density vertical NAND memory device
Monolithic, three dimensional NAND strings include a semiconductor channel, at least one end portion of the semiconductor channel extending substantially perpendicular to a major surface of a substrate, a plurality of control gate electrodes having a strip shape extending substantially parallel to the major surface of the substrate, the blocking dielectric comprising a plurality of blocking dielectric segments, a plurality of discrete charge storage segments, and a tunnel dielectric located between each one of the plurality of the discrete charge storage segments and the semiconductor channel. |
| US09230975B2 |
Nonvolatile semiconductor memory device
According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor substrate, a first stacked layer structure including first to nth semiconductor layers (n is a natural number greater than or equal to 2) stacked in a first direction, and extending in a second direction, and first to nth memory cells provided on surfaces of the first to nth semiconductor layers facing a third direction. The ith memory cell (1≦i≦n) comprises a second stacked layer structure in which a first insulating layer, a charge storage layer, a second insulating layer, and a control gate electrode are stacked. The second insulating layer has an equivalent oxide thickness smaller than that of the first insulating layer. |
| US09230973B2 |
Methods of fabricating a three-dimensional non-volatile memory device
A method of fabricating a semiconductor device, such as a three-dimensional NAND memory string, includes forming a first stack of alternating layers of a first material and a second material different from the first material over a substrate, removing a portion of the first stack to form a first trench, filling the trench with a sacrificial material, forming a second stack of alternating layers of the first material and the second material over the first stack and the sacrificial material, removing a portion of the second stack to the sacrificial material to form a second trench, and removing the sacrificial material to form a continuous trench through the first stack and the second stack. |
| US09230970B2 |
Semiconductor device
A semiconductor device with a novel structure is provided in which stored data can be held even when power is not supplied and the number of writing is not limited. The semiconductor includes a second transistor and a capacitor over a first transistor. The capacitor includes a source or drain electrode and a gate insulating layer of the second transistor and a capacitor electrode over an insulating layer which covers the second transistor. The gate electrode of the second transistor and the capacitor electrode overlap at least partly with each other with the insulating layer interposed therebetween. By forming the gate electrode of the second transistor and the capacitor electrode using different layers, an integration degree of the semiconductor device can be improved. |
| US09230962B2 |
Semiconductor device and fabrication method therefor
A semiconductor device includes a non-conductive gate feature over a substrate and a spacer adjoining each sidewall of the non-conductive gate feature. |
| US09230957B2 |
Integrated snubber in a single poly MOSFET
Aspects of the present disclosure describe MOSFET devices that have snubber circuits. The snubber circuits comprise one or more resistors with a dynamically controllable resistance that is controlled by changes to a gate and/or drain potentials of the one or more MOSFET structures during switching events. |
| US09230953B2 |
ESD protection device
A semiconductor ESD protection device comprising a vertical arrangement of alternating conductivity type layers, wherein the layers are arranged as silicon controlled rectifier and wherein the silicon controlled rectifier is arranged as vertical device and having top and bottom opposing contacts. |
| US09230952B2 |
Semiconductor device
A protection circuit used for a semiconductor device is made to effectively function and the semiconductor device is prevented from being damaged by a surge. A semiconductor device includes a terminal electrode, a protection circuit, an integrated circuit, and a wiring electrically connecting the terminal electrode, the protection circuit, and the integrated circuit. The protection circuit is provided between the terminal electrode and the integrated circuit. The terminal electrode, the protection circuit, and the integrated circuit are connected to one another without causing the wiring to branch. It is possible to reduce the damage to the semiconductor device caused by electrostatic discharge. It is also possible to reduce faults in the semiconductor device. |
| US09230951B2 |
Antistatic device of display device and method of manufacturing the same
Discussed are an antistatic device of a display device, which has a high electrostatic discharge (ESD) speed and reduces consumption power, and a method of manufacturing the same. The antistatic device can include a first switching thin film transistor (TFT) in which an active layer is formed of oxide, a second switching TFT in which an active layer is formed of oxide, and an equalizer TFT in which an active layer is formed of amorphous silicon. |
| US09230948B2 |
Method of manufacturing a semiconductor device
Provided is a semiconductor device characterized by that first to fourth semiconductor chips are mounted on first to fourth electrodes formed by plating, respectively; the surface of the first semiconductor chip and the upper surface of a fifth electrode, the surface of the second semiconductor chip and the upper surface of the first electrode, the surface of the third semiconductor chip and the upper surface of the fourth electrode, the surface of the fourth semiconductor chip and the upper surface of the fifth electrode, and the upper surface of the second electrode and the upper surface of the third electrode are coupled to each other by first to fifth conductive members, respectively; and the back surfaces of the first to fifth electrodes are exposed from a resin molding. The invention makes it possible to reduce the size and the thickness of a semiconductor device configuring a diode bridge circuit. |
| US09230946B2 |
Semiconductor integrated circuit device
The present invention provides a multichip package in which a first semiconductor chip having an RF analog circuit area and a digital circuit area, and a second semiconductor chip having a digital circuit area are plane-arranged over an organic multilayer wiring board and coupled to each other by bonding wires. In the multichip package, the first semiconductor chip is made thinner than the second semiconductor chip. |
| US09230940B2 |
Three-dimensional chip stack for self-powered integrated circuit
Structures and methods for self-powered devices are disclosed herein. Specifically, disclosed herein is a stacked, three-dimensional integrated circuit including a power generation die including a power source. The integrated circuit also includes a functional system die including one or more functional components that are powered by power generated by the power source. The power generation die and the functional system die are stacked in a three-dimensional structure. |
| US09230939B2 |
Method for producing image pickup apparatus, method for producing semiconductor apparatus, and joined wafer
A method for producing an image pickup apparatus includes: a process of fabricating a plurality of image pickup chips by cutting an image pickup chip substrate where light receiving sections and electrode pads are formed; a process of fabricating a joined wafer by bonding the image pickup chips to a glass wafer; a process of filling a gap between the plurality of image pickup chips with a sealing member made of a BCB resin or polyimide; a process of machining the joined wafer to reduce a thickness; a process of forming through-hole vias; a process of forming an insulating layer that covers the image pickup chips; a process of forming through-hole interconnections; a process of forming external connection electrodes, each of which is connected to each of the through-hole interconnections; and a process of cutting the joined wafer. |
| US09230936B2 |
Integrated device comprising high density interconnects and redistribution layers
Some novel features pertain to an integrated device (e.g., integrated package) that includes a base portion for the integrated device, a first die coupled to a first surface of the base portion, and an underfill between the first die and the base portion. The base portion includes a dielectric layer, and a set of redistribution metal layers. In some implementations, the integrated device further includes an encapsulation material that encapsulates the first die. In some implementations, the integrated device further includes a second die coupled to the first surface of the base portion. In some implementations, the integrated device further includes a set of interconnects on the base portion, the set of interconnects electrically coupling the first die and the second die. In some implementations, the first die includes a first set of interconnect pillars and the second die includes a second set of interconnect pillars. |
| US09230935B2 |
Package on package structure and method of manufacturing the same
A package on package structure includes a first substrate having a first region and a second region, a bump formed on the first region of the first substrate, a first semiconductor die bonded to the second region of the first substrate, and a semiconductor die package bonded to the first substrate. The bump includes a metallic structure and a plurality of minor elements dispersed in the metallic structure. The semiconductor die package includes a connector bonded to the bump, and the first semiconductor die is between the semiconductor die package and the first substrate. |
| US09230931B2 |
Semiconductor device and method for forming the same
A semiconductor device includes an active region tilted at an angle with respect to a buried bit line. The buried bit line includes a metal silicide pattern and a metal pattern. The metal silicide pattern has a plurality of metal silicide films each disposed at a lower portion of the active region and corresponding to a bit line contact region. The metal pattern has a plurality of metal films. The metal silicide films and the metal films are alternately arranged and electrically coupled to each other. |
| US09230927B2 |
Method of fabricating wafer-level chip package
A method of fabricating a wafer-level chip package is provided. First, a wafer with two adjacent chips is provided, the wafer having an upper surface and a lower surface, and one side of each chip includes a conducting pad on the lower surface. A recess and an isolation layer extend from the upper surface to the lower surface, which the recess exposes the conducting pad. A part of the isolation layer is disposed in the recess with an opening to expose the conducting pad. A conductive layer is formed on the isolation layer and the conductive pad, and a photo-resist layer is spray coated on the conductive layer. The photo-resist layer is exposed and developed to expose the conductive layer, and the conductive layer is etched to form a redistribution layer. After stripping the photo-resist layer, a solder layer is formed on the isolation layer and the redistribution layer. |
| US09230926B2 |
Functionalised redistribution layer
An electronic device which comprises at least one interconnect, a semiconductor chip comprising at least one electric chip pad, an encapsulant structure packaging at least a part of the semiconductor chip, and an electrically conductive redistribution layer arranged between and electrically coupled with the at least one interconnect and the at least one chip pad, wherein the redistribution layer comprises at least one adjustment structure configured for adjusting radio frequency properties of a transition between the semiconductor chip and its periphery. |
| US09230924B2 |
Method of producing semiconductor module and semiconductor module
In order to securely ground an exterior shield and reduce burden imposed on a dicing blade and the exterior shield, a method of producing a semiconductor module comprises a hole-forming step of forming a hole 30 extending from a top surface of a sealing resin layer 3 to a ground wiring 111 (112) provided at a collective substrate 100, a film-forming step of forming an electrically conductive film made of an electrically conductive material so as to cover at least the top surface of the sealing resin layer 3, an internal surface of the hole 20, and the ground wiring 111 (112), and a separation step of separating from each other a plurality of individual module sections which the individual module section comprises. |
| US09230923B2 |
Electronic chip with means of protecting its back face
An electronic chip is provided, including an electronic circuit located at a front face of a substrate; a capacitive element placed at a back face of the substrate and facing the electronic circuit, and electrically connected to the electronic circuit by a first electrical connection and a second electrical connection, the first electrical connection including at least a first electrically conducting via passing through the substrate, the electronic circuit being configured to measure a value of electrical capacitance of the capacitive element between the first and the second electrical connections; and a plurality of second vias or trenches passing through the back face of the substrate and a part of the thickness of the substrate, and extending toward the electronic circuit such that bottom walls of the plurality of second vias or trenches are separated from the electronic circuit by at least one non-zero distance. |
| US09230922B2 |
Precursor composition for deposition of silicon dioxide film and method for fabricating semiconductor device using the same
A precursor composition for forming a silicon dioxide film on a substrate, the precursor composition including at least one precursor compound represented by the following chemical formulas (1), (2), and (3): HxSiAy(NR1R2)4-x-y (1) HxSi(NAR3)4-x (2) HxSi(R4)z(R5)4-x-z (3) wherein, independently in the chemical formulas (1), (2), and (3), H is hydrogen, x is 0 to 3, Si is silicon, A is a halogen, y is 1 to 4, N is nitrogen, and R1, R2, R3, and R5 are each independently selected from the group of H, aryl, perhaloaryl, C1-8 alkyl, and C1-8 perhaloalkyl, and R4 is aryl in which at least one hydrogen is replaced with a halogen or C1-8 alkyl in which at least one hydrogen is replaced with a halogen. |
| US09230921B2 |
Self-healing crack stop structure
A self-healing crack stop structure and methods of manufacture are disclosed herein. The structure comprises a crack stop structure formed in one or more dielectric layers and surrounding an active region of an integrated circuit chip. The crack stop comprises self healing material which, upon propagation of a crack, is structured to seal the crack and prevent further propagation of the crack. |
| US09230920B2 |
Semiconductor device
To improve reliability of a semiconductor device obtained through a dicing step. In a ring region, a first outer ring is provided outside a seal ring, and a second outer ring is provided outside the first outer ring. This can prevent a crack from reaching even the seal ring that exists in the ring region, for example, when a scribe region located outside the ring region is cut off by a dicing blade. |
| US09230918B1 |
Semiconductor package structure, alignment structure, and alignment method
A semiconductor package structure includes a first wafer and a second wafer. The first wafer has a concave portion. The concave portion has a bottom surface and at least one sidewall adjacent to the bottom surface. An obtuse angle is formed between the bottom surface and the sidewall. The second wafer is disposed on the first wafer and has a protruding portion. When the protruding portion enters an opening of the concave portion, the protruding portion slides along the sidewall to the bottom surface, such that the protruding portion is coupled to the concave portion. |
| US09230917B2 |
Method of processing a carrier with alignment marks
A method for processing a carrier may include forming at least one recess structure at least one of over and in the carrier; and annealing the at least one recess structure such that at least one hollow chamber is formed by material of the at least one recess structure, wherein the at least one hollow chamber may form an optical alignment structure. |
| US09230916B2 |
Semiconductor device manufacturing method and semiconductor device
There is provided a technology by which the position of 1 pin in a tabless package can be recognized easily. The rear surfaces of plural leads are exposed on a rear surface of a resin-sealed body which seals a semiconductor chip etc., a image recognition area is further provided adjacent to 1 pin (lead with index 1), and a rear surface of an identification mark is exposed from the rear surface of the resin-sealed body of the image recognition area. This identification mark is made of the same conductive member as the plural leads. |
| US09230912B2 |
Method for manufacturing semiconductor device and device manufactured using the same
A method for manufacturing a semiconductor device and a device manufactured using the same are provided. According to the embodiment, substrate with a dielectric layer formed thereon is provided. Plural trenches are defined in the dielectric layer, and the trenches are isolated by the dielectric layer. A first barrier layer is formed in the trenches as barrier liners of the trenches, followed by filling the trenches with a conductor. Then, the conductor in the trenches is partially removed to form a plurality of recesses, wherein remained conductor has a flat surface. Next, a second barrier layer is formed in the recesses as barrier caps of the trenches. |
| US09230911B2 |
Interconnect structure and method of forming the same
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a low-k (LK) dielectric layer over a substrate; a first conductive feature and a second conductive feature in the LK dielectric layer; a first spacer along a first sidewall of the first conductive feature; a second spacer along a second sidewall of the second conductive feature, wherein the second sidewall of the second conductive feature faces the first sidewall of the first conductive feature; an air gap between the first spacer and the second spacer; and a third conductive feature over the first conductive feature, wherein the third conductive feature is connected to the first conductive feature. |
| US09230909B2 |
Semiconductor device and manufacturing method thereof, and mounting method of semiconductor device
Disclosed is a semiconductor device whose reliability can be improved. The semiconductor device includes: first wiring formed over a semiconductor substrate via a first insulating film; a second insulating film that includes an inorganic film covering the first wiring and that has a flat surface on which CMP processing has been performed; a third insulating film that is formed over the second insulating film and includes an inorganic film having moisture resistance higher than that of the second insulating film; and second wiring formed over the third insulating film. The thickness of the second wiring is 10 times or more larger than that of the first wiring, and the second wiring is located over the third insulating film without an organic insulating film being interposed between itself and the third insulating film. |
| US09230907B2 |
Integrated switchable capacitive device
An integrated circuit includes a substrate. A fixed main capacitor electrode is disposed in a metal layer overlying the substrate. A second main capacitor electrode is disposed in a metal layer and spaced from the fixed main capacitor electrode. A movable capacitor electrode is disposed adjacent the fixed main capacitor electrode. The movable capacitor electrode is switchable between a first configuration in which the movable capacitor electrode and fixed main capacitor electrode are mutually spaced out in such a manner as to form an auxiliary capacitor electrically connected to the main capacitor. In a second configuration, the movable capacitor electrode and the fixed main capacitor electrode are in electrical contact in such a manner as to give a second capacitive value. |
| US09230902B2 |
Interconnect structure for wafer level package
A package includes a device die having a substrate. A molding compound contacts a sidewall of the substrate. A metal pad is over the substrate. A passivation layer has a portion covering an edge portion of the metal pad. A metal pillar is over and contacting the metal pad. A dielectric layer is over the passivation layer. A package material formed of a molding compound or a polymer is over the dielectric layer. The dielectric layer includes a bottom portion between the passivation layer and the package material, and a sidewall portion between a sidewall of the metal pillar and a sidewall of the package material. A polymer layer is over the package material, the molding compound, and the metal pillar. A post-passivation interconnect (PPI) extends into the polymer layer. A solder ball is over the PPI, and is electrically coupled to the metal pad through the PPI. |
| US09230901B2 |
Semiconductor device having chip embedded in heat spreader and electrically connected to interposer and method of manufacturing the same
A method of making a semiconductor device is characterized by the step of attaching a chip-on-interposer subassembly to a heat spreader with the chip inserted into a cavity of the heat spreader and the interposer laterally extending beyond the cavity. The interposer backside process is executed after the chip-on-interposer attachment and encapsulation to form the finished interposer. The heat spreader provides thermal dissipation, and the finished interposer provides primary fan-out routing for the chip. In the method, a buildup circuitry is electrically coupled to the interposer to provide further fan-out routing. |
| US09230900B1 |
Ground via clustering for crosstalk mitigation
Embodiments of the present disclosure are directed towards techniques and configurations for ground via clustering for crosstalk mitigation in integrated circuit (IC) assemblies. In some embodiments, an IC package assembly may include a first package substrate configured to route input/output (I/O) signals and ground between a die and a second package substrate. The first package substrate may include a plurality of contacts disposed on one side of the first package substrate and at least two ground vias of a same layer of vias, and the at least two ground vias may form a cluster of ground vias electrically coupled with an individual contact. Other embodiments may be described and/or claimed. |
| US09230899B2 |
Packaging substrate having a holder, method of fabricating the packaging substrate, package structure having a holder, and method of fabricating the package structure
A packaging substrate includes a holder, a first conductive pad disposed on the holder, a core layer disposed on the holder, a circuit layer disposed on the core layer, a plurality of conductive vias disposed in the core layer, and an insulating protection layer disposed on the core layer, wherein the first electrical pad is embedded in the core layer. By combining the holder on one side of the packaging substrate, cracks due to over-thinness can be prevented during transferring or packaging. A method of fabricating the packaging substrate, a package structure having a holder, a method of fabricating the package structure are also provided. |
| US09230890B2 |
Semiconductor device and measurement device
A semiconductor device includes a lead frame, an oscillator, an integrated circuit and first bonding wires. The oscillator includes plural terminals separated from each other by a predetermined distance, and that is mounted to an oscillator mounting region formed on a first face of the lead frame. The oscillator mounting region has a narrower width than the distance between the plural terminals. The integrated circuit is mounted to a second face of the lead frame, which is on an opposite side to the first face. The first bonding wires connect the plural terminals of the oscillator to terminals of the integrated circuit. |
| US09230889B2 |
Chip arrangement with low temperature co-fired ceramic and a method for forming a chip arrangement with low temperature co-fired ceramic
A chip arrangement is provided, the chip arrangement, including: a carrier; at least one chip including at least one contact pad disposed over the carrier; an encapsulation material at least partially surrounding the at least one chip and the carrier; and at least one low temperature co-fired ceramic sheet disposed over a side of the carrier. |
| US09230885B2 |
Semiconductor structure and method for making same
One or more embodiments relate to a method for forming a semiconductor structure, comprising: providing a workpiece; forming a dielectric barrier layer over the workpiece; forming an opening through the dielectric barrier layer; forming a seed layer over the dielectric barrier layer and within the dielectric barrier layer opening; and electroplating a first fill layer on the seed layer. |
| US09230884B2 |
Semiconductor device
A substrate may include: a base material having a predetermined thickness; an electrode section formed on one side surface in a thickness direction of the base material, and having a plurality of electrodes; and a concave section formed on at least a part of the surface on which the electrode section is formed, on the base material. |
| US09230881B2 |
Heat sink for dissipating a thermal load
A heat sink for dissipating a thermal load is disclosed that includes one or more heat sink bases configured around a central axis of the heat sink so as to define an interior space, at least one heat sink base receiving the thermal load, a thermal transport connected to the at least one heat sink base receiving the thermal load so as to distribute the thermal load in the heat sink, and heat-dissipating fins connected to each heat sink base, the heat-dissipating fins extending from each heat sink base into the interior space of the heat sink, each heat-dissipating fin shaped according to the location of the heat-dissipating fin with respect to the location of the thermal load and the location of the distributed thermal load in the heat sink. |
| US09230878B2 |
Integrated circuit package for heat dissipation
An apparatus for enclosing an electronic component to a base comprising, an enclosure attached to a base and surrounding an electronic component. The enclosure divided into a first portion and a second portion along a first plane substantially parallel to the base. The second portion of the enclosure is attached to the base. The first portion of the enclosure is attached to the second portion of the enclosure. The enclosure including one or more extruding elements on an exterior surface of the enclosure. The one or more extruding elements on the exterior surface of the enclosure increases an exterior surface area of the enclosure facilitating dissipation of heat from the electronic component. |
| US09230875B2 |
Interposer package structure for wireless communication element, thermal enhancement, and EMI shielding
Embodiments of provide an integrated circuit (IC) device. The IC device can include a substrate having first and second opposing surfaces, an IC die electrically coupled to the first surface of the substrate, a plurality of contact members coupled to the first surface of the substrate, and an interposer. The interposer can include a plurality of contact elements located on a first surface thereof, each conductive element being coupled to a respective one of the plurality of contact members, and an antenna formed using a conductive layer of the interposer, the antenna being electrically coupled to the IC die through at least one of the plurality of contact elements and at least one of the plurality of contact members. |
| US09230871B1 |
Test key structure and test key group
A test key structure includes a plurality of transistors formed on a scribe line of a wafer and arranged in a 2*N array having 2 columns and N rows. The transistors arranged in the 2*N array respectively includes a gate, a source, a drain, and a body. All of the sources of the transistors arranged in the 2*N array are electrically connected to each other. |
| US09230870B2 |
Integrated test circuit and method for manufacturing an integrated test circuit
An integrated test circuit, including a plurality of test structure elements, wherein each test structure element includes at least a supply line and a test line; a plurality of select transistors, wherein each select transistor is assigned to one corresponding test structure element, and wherein each select transistor includes a first controlled region, a second controlled region, and a control region, wherein the second controlled region of each select transistor is respectively connected to the supply line of the corresponding test structure element, so that each select transistor is unambiguously assigned to the corresponding test structure element; and a plurality of contact pads, connected to respective first controlled regions and control regions of the plurality of select transistors, such that each test structure element of the plurality of test structure elements can be individually addressed by the plurality of contact pads. |
| US09230869B2 |
Flexible organic light-emitting display apparatus and method of manufacturing the same
A method of manufacturing an organic light-emitting display apparatus, the method including removing a bubble by irradiating a laser in a cross direction to the bubble that occurs in a thin-film transistor. |
| US09230867B2 |
Structure and method for E-beam in-chip overlay mark
The present disclosure provides an integrated circuit structure that includes a semiconductor substrate having a first region and a second region having an area less than about 10 micron×10 micron; a first material layer over the semiconductor substrate and patterned to have a first circuit feature in the first region and a first mark in the second region; and a second material layer over the first material layer and patterned to have a second circuit feature in the first region and a second mark in the second region. The first mark includes first mark features oriented in a first direction, and second mark features oriented in a second direction perpendicular to the first direction. The second mark includes third mark features oriented in the first direction, and fourth mark features oriented in the second direction. |
| US09230866B2 |
Fabricating method of customized mask and fabricating method of semiconductor device using customized mask
A fabricating method of a customized mask includes forming first patterns in a mold structure, forming second patterns in the mold structure using initial masks, the mold structure having the first patterns formed therein, measuring overlap failure between the first patterns and the second patterns, and fabricating customized masks by compensating for pattern positions of the initial masks based on the measuring results, wherein compensating for the pattern positions of the initial masks includes shifting positions of at least some patterns of the initial masks according to shift directions and sizes of at least some of the first patterns. |
| US09230860B2 |
Semiconductor substrate, electronic device and method for manufacturing the same
A semiconductor substrate includes a vertical conductor and an insulating layer. The vertical conductor includes a metal/alloy component of a nanocomposite crystal structure and is filled in a vertical hole formed in the semiconductor substrate along its thickness direction. The insulating layer is formed around the vertical conductor in a ring shape and includes nm-sized silica particles and a nanocrystal or nanoamorphous silica filling up a space between the silica particles to provide a nanocomposite structure along with the silica particles. |
| US09230853B2 |
Semiconductor devices having bit line contact plugs and methods of manufacturing the same
A semiconductor device including active regions defined in a semiconductor substrate to be non-parallel with a first direction and a second direction which are perpendicular to each other, word lines intersecting active regions and extending in first directions to be spaced apart from each other in the second direction, bit lines crossing over word lines and extending in second directions to be spaced apart from each other in the first direction, first impurity regions disposed in respective ones of central portions of active regions to non-overlap with the word lines, second impurity regions disposed in both ends of each of the active regions to non-overlap with the word lines, and bit line contact plugs disposed between the first impurity regions and the bit lines. The bit line contact plugs having longish shapes including major axes substantially parallel with the second direction and minor axes substantially parallel with the first direction. |
| US09230851B2 |
Reduction of polysilicon residue in a trench for polysilicon trench filling processes
A method of fabricating a semiconductor device includes forming at least one trench from a top side of a semiconductor layer, wherein the trench is lined with a trench dielectric liner and filled by a first polysilicon layer. The surface of the trench dielectric liner is etched, wherein dips in the trench dielectric liner are formed relative to a top surface of the first polysilicon layer which results in forming a protrusion including the first polysilicon layer. The first polysilicon layer is etched to remove at least a portion of the protrusion. A second dielectric layer is formed over at least the trench after etching the first polysilicon layer. A second polysilicon layer is deposited. The second polysilicon layer is etched to remove it over the trench and provide a patterned second polysilicon layer on the top side of the semiconductor layer. |
| US09230847B2 |
Engineered substrate assemblies with thermally opaque materials, and associated systems, devices, and methods
Engineered substrates having thermally opaque materials for preventing transmission of radiative energy during epitaxial growth processes and for separating substrates from epitaxially grown semiconductor structures and associated systems and methods are disclosed herein. In several embodiments, for example, an engineered substrate can be manufactured by forming a thermally opaque material at an upper surface of a handle substrate and bonding an epitaxial formation structure on the handle substrate such that the thermally opaque material is between the epitaxial formation structure and the handle substrate. In various embodiments, the thermally opaque material at least partially blocks radiative heat transmission between the handle substrate and the epitaxial formation structure, for example, to provide increased accuracy of epitaxy process temperature measurements and/or increased uniformity of epitaxy growth characteristics across the engineered substrate. |
| US09230843B2 |
Loading unit and processing system
A loading unit which elevates a substrate holder holding a plurality of substrates to be subjected to heat treatment with respect to a cylindrical processing container whose bottom portion is opened and closed by a cap, includes, a loading housing, an elevator mechanism elevating the substrate holder, a shutter closing an opening of the bottom of the processing container, a substrate moving and loading mechanism having an elevatable moving and loading arm, a first partitioning box installed to surround the elevator mechanism and a moving space of the elevated substrate holder and provided with a cooling gas injecting means, a second partitioning box connected to the first partitioning box and is installed to surround the substrate moving and loading mechanism and a moving space of the substrate moving and loading mechanism, and a third partitioning box connected to the first partitioning box and is installed to surround the shutter. |
| US09230838B2 |
Apparatus for storage of objects from the field of manufacture of electronic components
A storage apparatus for objects in the manufacture of substrates, in particular of substrates for electronic components, is provided with a housing which forms at least one closed area for storage of the objects. The storage apparatus also has a pure air device by which a pure air atmosphere can be produced at least within a section of the housing. Using at least one input/output device for the storage apparatus, objects can be passed into the interior of the housing or removed from the interior, in which case the objects can be handled by at least one handling device in the interior of the housing, and object receptacles are provided within the housing, in which objects can be temporarily stored outside transport containers. In order to require a position area which is as small as possible for a storage apparatus such as this, despite it having a high storage capacity, the invention provides that two areas which are arranged at least partially one above the other are formed in the same housing of the storage apparatus, with a first area for an object storage device, and a second area for a transport container storage device. |
| US09230826B2 |
Etching method using mixed gas and method for manufacturing semiconductor device
A method for etching is provided in which the etching selectivity of an amorphous semiconductor film to a crystalline semiconductor film is high. Part of a stacked semiconductor film in which an amorphous semiconductor film is provided on a crystalline semiconductor film is etched using a mixed gas of a Br-based gas, a F-based gas, and an oxygen gas, so that part of the crystalline semiconductor film provided in the stacked semiconductor film is exposed. Reduction in the film thickness of the exposed portion can be suppressed by performing the etching in such a manner. Moreover, when etching for forming a back channel portion of a thin film transistor is performed with the method for etching, favorable electric characteristics of the thin film transistor can be obtained. An insulating layer is preferably provided over the thin film transistor. |
| US09230825B2 |
Method of tungsten etching
A method for etching a tungsten containing layer in an etch chamber is provided. A substrate is placed with a tungsten containing layer in the etch chamber. A plurality of cycles is provided. Each cycle comprises a passivation phase for forming a passivation layer on sidewalls and bottoms of features in the tungsten containing layer. Additionally, each cycle comprises an etch phase for etching features in the tungsten containing layer. |
| US09230824B2 |
Method of manufacturing semiconductor device
Provided is a method of manufacturing a semiconductor device. The method includes providing an object to be processed including a multilayer film formed by alternately laminating a first film and a second film having different dielectric coefficients within a processing container of a plasma processing apparatus; and repeatedly performing a sequence including: supplying a first gas including O2 gas or N2 gas, and a rare gas into the processing container and exciting the first gas, supplying a second gas including a fluorocarbon gas or a fluorohydrocarbon gas into the processing container and exciting the second gas, and supplying a third gas including HBr gas, a fluorine-containing gas, and a fluorocarbon gas or a fluorohydrocarbon gas into the processing container and exciting the third gas, so that the multilayer film is etched through a mask. |
| US09230821B2 |
Dry etching agent and dry etching method using the same
A dry etching agent according to the present invention contains (A) a fluorinated propyne represented by the chemical formula: CF3C≡CX where X is H, F, Cl, Br, I, CH3, CFH2 or CF2H; and either of: (B) at least one kind of gas selected from the group consisting of O2, O3, CO, CO2, COCl2 and COF2; (C) at least one kind of gas selected from the group consisting of F2, NF3, Cl2, Br2, I2 and YFn where Y is Cl, Br or I; and n is an integer of 1 to 5; and (D) at least one kind of gas selected from the group consisting of CF4, CHF3, C2F6, C2F5H, C2F4H2, C3F8, C3F4H2, C3ClF3H and C4F8. This dry etching agent has a small environmental load and a wide process window and can be applied for high-aspect-ratio processing without special operations such as substrate excitation. |
| US09230819B2 |
Internal plasma grid applications for semiconductor fabrication in context of ion-ion plasma processing
The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The ion-ion plasma may be used to advantage in a variety of etching processes. |
| US09230812B2 |
Method for forming semiconductor structure having opening
A method for forming a semiconductor structure having an opening is provided. First, a substrate is provided, wherein a first region and a second region are defined on the substrate and an overlapping area of the first region and the second region is defined as a third region. A pattern density of the first region is substantially greater than that of the second region. Then, a material layer is formed on the substrate. A first hard mask and a second hard mask are formed on the material layer. The first hard mask in the first region is removed to form a patterned first hard mask. The second hard mask in the third region is removed to form a patterned second hard mask. Lastly, the material layer is patterned by using the patterned second hard mask layer as a mask to form at least an opening in the third region only. |
| US09230809B2 |
Self-aligned double patterning
A system and method for a semiconductor device are provided. An embodiment comprises a dielectric layer and masking layers over the dielectric layer. A thin spacer layer is used to form spacers alongside a pattern. A reverse image of the spacer pattern is formed and an enlargement process is used to slightly widen the pattern. The widened pattern is subsequently used to pattern an underlying layer. This process may be used to form a pattern in a dielectric layer, which openings may then be filled with a conductive material. |
| US09230805B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor. |
| US09230804B2 |
Semiconductor devices and methods of manufacturing the same
A semiconductor device includes a first non-flat non-polar nitride semiconductor layer, a first structure layer on at least a portion of the surface of the first non-flat non-polar nitride semiconductor layer and a first non-polar nitride semiconductor layer on the first non-flat non-polar nitride semiconductor layer and the first structure layer. The first non-flat non-polar nitride semiconductor layer includes a plurality of solid particles. |
| US09230797B2 |
Dielectric and/or capacitor formation
Technologies are generally described for a component, a method to form a component and/or a system configured to form a component. In an example, the method to form a component may include placing a first layer including a conductive material on a support. The method may include placing a second layer, including the conductive material and oxygen, on the first layer. The method may include placing a third layer, including tellurium and oxygen, on the second layer. The method may include placing a fourth layer, including tin and tellurium, on the third layer. In an example, placing of the fourth layer on the third layer may include placing a fifth layer including tellurium on the fourth layer, placing a sixth layer including tin on the fifth layer, placing a seventh layer including tellurium on the sixth layer and annealing the fifth, sixth, and seventh layers to form the fourth layer. |
| US09230796B2 |
A-Si seasoning effect to improve SiN run-to-run uniformity
Embodiments of the present invention provide methods for depositing a nitrogen-containing material on large-sized substrates disposed in a processing chamber. In one embodiment, a method includes processing a batch of substrates within a processing chamber to deposit a nitrogen-containing material on a substrate from the batch of substrates, and performing a seasoning process at predetermined intervals during processing the batch of substrates to deposit a conductive seasoning layer over a surface of a chamber component disposed in the processing chamber. The chamber component may include a gas distribution plate fabricated from a bare aluminum without anodizing. In one example, the conductive seasoning layer may include amorphous silicon, doped amorphous silicon, doped silicon, doped polysilicon, doped silicon carbide, or the like. |
| US09230795B1 |
Directional pre-clean in silicide and contact formation
A method includes etching a dielectric layer to form an opening, with an underlying region underlying the dielectric layer exposed to the opening, and performing a bombardment to bombard a surface region of the underlying region through the opening. After the bombardment, the surface region is reacted with a process gas to form a reaction layer. An anneal is then performed to remove the reaction layer. |
| US09230794B2 |
Process for cleaning, drying and hydrophilizing a semiconductor wafer
Semiconductor wafers are cleaned, dried, and hydrophilized the following steps in the order stated: a) treating the semiconductor wafer with a liquid aqueous solution containing hydrogen fluoride, the semiconductor wafer rotating about its center axis at least occasionally, and b) drying the semiconductor wafer by rotation of the semiconductor wafer about its center axis at a rotational speed of 1000 to 5000 revolutions per minute in an ozone-containing atmosphere, the liquid aqueous solution containing hydrogen fluoride flowing away from the semiconductor wafer on account of the centrifugal force generated by the rotation, and the surface of the semiconductor wafer being hydrophilized by ozone. |
| US09230791B2 |
Anion generating and electron capture dissociation apparatus using cold electrons
An anion generating and electron capture dissociation apparatus using cold electrons, which comprises a cold electron generation module configured to generate a large quantity of cold electrons from ultraviolet photons radiated into a mass spectrometer vacuum chamber which is in a high vacuum state has a plurality of ultraviolet diodes configured to emit the ultraviolet photons in the mass spectrometer vacuum chamber. Micro-channel plate (MCP) electron multiplier plates induce and amplify initial electron emissions of the ultraviolet photons from the ultraviolet diodes, and generate a large quantity of electron beams from a rear plate. An electron focusing lens is configured to focus the electron beams amplified through the MCP electron multiplier plates. A grid is configured to adjust energy and an electric current of the electron beams together with the electron focusing lens. |
| US09230789B2 |
Printed circuit board multipole for ion focusing
An apparatus for focusing and for storage of ions and an apparatus for separation of a first pressure area from a second pressure area are disclosed, in particular for an analysis apparatus for ions. A particle beam device may have at least one of the abovementioned apparatuses. A container for holding ions and at least one multipole unit are provided. The multipole unit has a through-opening with a longitudinal axis as well as a multiplicity of electrodes. A first set of the electrodes is at a first radial distance from the longitudinal axis. A second set of the electrodes is in each case at a second radial distance from the longitudinal axis. The first radial distance is less than the second radial distance. Alternatively or additionally, the apparatus may have an elongated opening with a radial extent. The opening has a longitudinal extent which is greater than the radial extent. |
| US09230787B2 |
Ionization apparatus, mass spectrometer including ionization apparatus, and image forming system
Provided is an ionization apparatus including: a holder configured to hold a sample; a probe configured to determine a part to be ionized of the sample held by the holder; an extract electrode configured to extract ionized ions of the sample; a liquid supply unit configured to supply liquid to a part of a region of the sample; and a unit configured to apply a first voltage between the probe and the extract electrode, in which the first voltage is pulse-modulated. |
| US09230784B2 |
Mass spectrometer and mass spectrometry method
There are provided a mass spectrometer and a mass spectrometry method which can realize shortening of the measurement time and reduction of the consumption of a sample. Ions, in which the intensity distribution forms a peak waveform at both of each retention time and each mass-to-charge ratio (peaks P11, P21, P22 and P32) are detected as MS/MS precursor ions based on three-dimensional information of a retention time, a mass-to-charge ratio and an intensity. Whether or not MS3 analysis is performed for each ion is determined beforehand based on whether or not the isotopic distributions of a plurality of ions are superimposed at each retention time rt1 to rt3. Ions (peaks P21 and P22) for which MS3 analysis is performed and ions (peaks P11 and P32) for which MS3 analysis is not performed can be hereby determined at the time the MS spectrum is measured to detect MS/MS precursor ions. |
| US09230782B2 |
Plasma processing method and apparatus
Plasma processing of plural substrates is performed in a plasma processing apparatus, which is provided with a plasma processing chamber having an antenna electrode and a lower electrode for placing and retaining the plural substrates in turn within the plasma processing chamber, a gas feeder for feeding processing gas into the processing chamber, a vacuum pump for discharging gas from the processing chamber via a vacuum valve, and a solenoid coil for forming a magnetic field within the processing chamber. At least one of the plural substrates is placed on the lower electrode, and the processing gas is fed into the processing chamber. RF power is fed to the antenna electrode via a matching network to produce a plasma within the processing chamber in which a magnetic field has been formed by the solenoid coil. This placing of at least one substrate and this feeding of the processing gas are then repeated until the plasma processing of all of the plural substrates is completed. An end of seasoning is determined when a parameter including an internal pressure of the processing chamber has become stable to a steady value with plasma processing time. |
| US09230780B2 |
Hall effect enhanced capacitively coupled plasma source
Embodiments disclosed herein include a plasma source for abating compounds produced in semiconductor processes. The plasma source has a first plate and a second plate parallel to the first plate. An electrode is disposed between the first and second plates and an outer wall is disposed between the first and second plates surrounding the cylindrical electrode. The plasma source has a first plurality of magnets disposed on the first plate and a second plurality of magnets disposed on the second plate. The magnetic field created by the first and second plurality of magnets is substantially perpendicular to the electric field created between the electrode and the outer wall. In this configuration, a dense plasma is created. |
| US09230778B2 |
Method for removing hard carbon layers
The invention relates to a method for removing carbon layers, in particular ta-C layers, from substrate surfaces of tools and components. The substrate to be de-coated is accordingly arranged on a substrate support in a vacuum chamber, the vacuum chamber is charged with at least one reactive gas assisting the evacuation of carbon in gaseous form and a low-voltage plasma discharge is created in the vacuum chamber to activate the reactive gas and hence assist the required chemical reaction or reactions to de-coat the coated substrate. The low-voltage plasma discharge is a dc low-volt arc discharge, the substrate surfaces to be de-coated are bombarded substantially exclusively with electrons and oxygen, nitrogen and hydrogen are used as reactive gas. |
| US09230777B2 |
Water/wastewater recycle and reuse with plasma, activated carbon and energy system
The present invention provides a system that includes a glow discharge cell and a plasma arc torch. A first valve is connected to a wastewater source. An eductor has a first inlet, a second inlet and an outlet, wherein the first inlet is connected to the outlet of the electrically conductive cylindrical vessel, the second inlet is connected to the first valve, and the outlet is connected to the tangential inlet of the plasma arc torch. A second valve is connected between the tangential outlet of the plasma arc torch and the inlet of the glow discharge cell, such that the plasma arc torch provides the electrically conductive fluid to the glow discharge cell and the glow discharge cell provides a treated water via the outlet centered in the closed second end. |
| US09230775B2 |
Charged particle instrument
A charged particle instrument including a controlling and operating unit for controlling a charged particle source, deflecting means, and focus changing means and making a data for an image by an electric signal detected by a detector, and a recording unit for preserving a correction coefficient registered at each image-acquisition, in which the controlling and operating unit acquires plural images while changing a focus, and controls an optical condition such that a landing angle of a charged particle beam becomes perpendicular when an image for measurement is acquired on the basis of a position shift amount of a mark in the image and a correction coefficient registered to the recording unit. |
| US09230773B1 |
Ion beam uniformity control
A plasma chamber having improved controllability of the ion density of the extracted ribbon ion beam is disclosed. A plurality of pairs of RF biased electrodes is disposed on opposite sides of the extraction aperture in a plasma chamber. In some embodiments, one of each pair of RF biased electrodes is biased at the extraction voltage, while the other of each pair is coupled to a RF bias power supply, which provides a RF voltage having a DC component and an AC component. In another embodiment, both of the electrodes in each pair are coupled to a RF biased power supply. A blocker may be disposed in the plasma chamber near the extraction aperture. In some embodiments, RF biased electrodes are disposed on the blocker. |
| US09230768B2 |
Circuit breaker thermal-magnetic trip units and methods
A trip unit is provided for a circuit breaker that includes electrical contacts, a trip mechanism, a bimetallic strip, and an armature. The trip unit includes a first trip bar coupled to the trip mechanism and disposed about a pivot point, and a second trip bar coupled to the first trip bar and disposed about the pivot point. In a first operating condition, the first trip bar rotates about the pivot point substantially independently of the second trip bar, and activates the trip mechanism to open the electrical contacts. In a second operating condition, the second trip bar rotates about the pivot point, causing the first trip bar to rotate about the pivot point and activate the trip mechanism to open the electrical contacts. Numerous other aspects are provided. |
| US09230764B2 |
First-fail-safe electromotive furniture drive
A first-fail-safe electromotive furniture drive includes at least one drive unit having at least one motor; at least one actuating device having at least two actuating units, each of which includes a motor contact element and a safety contact element; at least one supply unit; and at least one safety device. The furniture drive is equipped with a reporting device for displaying the functioning and a failure of the at least two actuating units and the safety device. The furniture drive includes at least one safety actuating device. |
| US09230763B2 |
Relay assembly with fastening clip
A relay assembly comprises a relay mounted on a board. The relay may be a single or individual relay or a polyphasic relay. The relay has a housing and at least one dip solder pin extending from the housing and soldered to a circuit board. The relay is mounted on the circuit board via at least one fastening clip having a fitting part fitted into a hole in the housing, a latching part latched to a bore in the board, and a central flange between the fitting part and the latching part. |
| US09230761B2 |
Emergency stop system for a hybrid excavator
An emergency stop system for a hybrid excavator is provided, which includes an emergency switch and an emergency stop unit. In a normal operation state, a power supply that is applied from a power supply unit is provided to a hybrid controller and an engine controller, while when the emergency switch is pressed, the input power supply is intercepted to effectively stop the operation of the hybrid system in the case where equipment abnormality or an emergency situation occurs. Also, when the emergency switch is pressed, the power supply is applied to an emergency alarm unit and an energy discharge unit to notify an operator and neighboring persons of the equipment abnormality and emergency situation occurrence, and a hybrid power source vanishes completely. |
| US09230757B2 |
Switch guard for restricting the operation of a rocker type electric wall switch
An electrical rocker wall switch guard that is sized to fit over an electrical rocker wall switch where the electrical rocker wall switch guard has a main body sized to fit over a rocker arm of an electrical rocker wall switch; at least one aperture; and a circumferential skirt that extends downwardly from the main body and extends completely around the main body, the circumferential skirt having integrally formed portions at a first end and a second end of the electrical rocker wall switch guard that provide an attachment structure that permits removable attachment of the electrical rocker wall switch guard to an electrical rocker wall switch using screw receiving fittings that are provided in the electrical rocker wall switch for a decorative or protective wall plate. |
| US09230753B2 |
Illuminated touch keyboard
An illuminated touch keyboard includes a light source, a key structure, and a non-contact sensor board. The non-contact sensor board is used for sensing a depressing action of the key structure. The non-contact sensor board includes a light-shading plate, a light guide plate, and a reflecting plate. The light-shading plate includes a first wiring layer. The reflecting plate includes a second wiring layer. Since the light-shading plate, the light guide plate and the reflecting plate are include in the non-contact sensor board, the fabricating cost of the illuminated touch keyboard is reduced, and the overall height of the illuminated touch keyboard is decreased. |
| US09230751B2 |
Micro-electro-mechanical switch beam construction with minimized beam distortion and method for constructing
Disclosed is a micro-electro-mechanical switch, including a substrate having a gate connection, a source connection, a drain connection and a switch structure, coupled to the substrate. The switch structure includes a beam member, an anchor and a hinge. The beam member having a length sufficient to overhang both the gate connection and the drain connection. The anchor coupling the switch structure to the substrate, the anchor having a width. The hinge coupling the beam member to the anchor at a respective position along the anchor's length, the hinge to flex in response to a charge differential established between the gate and the beam member. The switch structure having gaps between the substrate and the anchor in regions proximate to the hinges. |
| US09230742B2 |
Capacitor
A capacitor includes a dielectric layer having a first plane, a second plane opposite to the first plane, and first and second through-holes communicated with the first plane and the second plane; a first external conductor layer disposed on the first plane; a second external conductor layer disposed on the second plane; a first internal electrode formed in the first through-hole, connected to the first external electrode layer, disposed in the second hole diameter part at a tip and separated from the second external electrode layer; and a second internal electrode formed in the second through-hole, connected to the second external electrode layer, and separated from the first external electrode layer. |
| US09230738B2 |
Multilayer ceramic electronic component including a lateral surface and internal electrodes having different distances from the lateral surface
There is provided a multilayer ceramic electronic component including: a ceramic body; a plurality of first internal electrodes formed within the ceramic body; a plurality of second internal electrodes alternately laminated together with the first internal electrodes with the dielectric layer interposed therebetween, insulated from the first internal electrodes, wherein a distance between the plurality of first internal electrodes 121 and the second lateral surface 2 and a distance between the plurality of second internal electrodes 122 and the second lateral surface 2 are different, and when the longest distance between the uppermost internal electrode and the lowermost electrode, among the plurality of first and second internal electrodes 121 and 122, is T1 and the shortest distance therebetween is T2, 0.76≦T2/T1≦0.97 is satisfied. |
| US09230737B2 |
Multilayer ceramic electronic component having a conductive paste
Disclosed are a conductive paste for an inner electrode and a multilayer ceramic electronic component having the same. There is provided a conductive paste for an inner electrode, including: a conductive metal powder for manufacturing the inner electrode for multilayer ceramic electronic component; an organic binder including at least one selected from a group consisting of acryl-based resin, butyral-based resin, and a cellulose-based resin to disperse the conductive metal powder; and a solvent including eucalyptol. |
| US09230735B2 |
Electrical coil forming apparatus and methods of assembling electrical coils
A coil forming apparatus for forming an electrical coil from an electrical wire. The apparatus includes a frame and a spindle assembly coupled to the frame. The spindle assembly includes: a first arm coupled to the frame, wherein the first arm includes a first moveable bracket and a plurality of first moveable spindles coupled to the first moveable bracket and to the electrical wire in a first position. The spindle assembly further includes a second arm coupled to the frame, wherein the second arm has a second moveable bracket that includes a plurality of second moveable spindles coupled to the second moveable bracket and coupled to the electrical wire in the first position. The coil forming apparatus includes a drive system coupled to the first moveable bracket and the second moveable bracket. The drive system is configured to move the first moveable bracket and the second moveable bracket. |
| US09230733B2 |
Method for manufacturing rare-earth magnet
Provided is a manufacturing method of a rare-earth magnet with high coercive force, including a first step of pressing-forming powder as a rare-earth magnet material to form a compact S, the powder including a RE-Fe—B main phase MP (RE: at least one type of Nd and Pr) and a RE-X alloy (X: metal element) grain boundary phase surrounding the main phase; and second step of bringing a modifier alloy M into contact with the compact S or a rare-earth magnet precursor C obtained by hot deformation processing of the compact S, followed by heat treatment to penetrant diffuse melt of the modifier alloy M into the compact S or the rare-earth magnet precursor C to manufacture the rare-earth magnet RM, the modifier alloy including a RE-Y (Y: metal element and not including a heavy rare-earth element) alloy having a eutectic or a RE-rich hyper-eutectic composition. |
| US09230729B2 |
Transformer, amorphous transformer and method of manufacturing the transformer
A transformer wherein the upper portions of cores are supported by a first supporting member disposed on first end surfaces of the upper portions of the cores, and a second supporting member disposed on second end surfaces of the upper portions of the cores, the first and second supporting members extend in the direction perpendicular to the faces of a magnetic material, and the cores are interposed between the first upper core supporting member and the second upper core supporting member; the first and second upper core supporting members are provided with hooks, the hooks of the first supporting member extending toward the second supporting member and the hooks of the second supporting member extending toward the first supporting member; bridging members are disposed on the opposing pairs of the hooks of the first and second upper core supporting members; and the cores are supported by the bridging members. |
| US09230725B2 |
Methods of designing an inductor having opening enclosed within conductive line
Embodiments are provided that include methods of designing an inductor. The inductor can include a conductive line including at least one turn and an opening positioned within an interior of a region of the conductive line. Embodiments of forming the inductor can include: providing an inductor design including a conductive line having at least one turn; determining a region of the conductive line that has current density below a threshold; and forming an opening in the region, the opening enclosed within the conductive line. |
| US09230723B2 |
Laminated common mode choke coil and high frequency component
A primary coil is configured by series connection of a first coil element (L1a), a second coil element (L1b) and a fifth coil element (L1c), and a secondary coil is configured by series connection of a third coil element (L2a), a fourth coil element (L2b) and a sixth coil element (L2c). The coil elements (L1a, L2b, L1c) are disposed coaxially and the coil elements (L2a, L1b, L2c) are also disposed coaxially. The respective coil elements (L1a, L1b, L1c) of the primary coil and the respective coil elements (L2a, L2b, L2c) of the secondary coil are disposed adjacently in a layer direction of a base material layer, respectively. The coil elements (L1a, L1b, L1c, L2a, L2b, L2c) are connected in such a manner that a magnetic field in the same direction is generated in all of the coil elements (L1a, L1b, L1c, L2a, L2b, L2c) when common mode current flows. |
| US09230722B2 |
Ferrite ceramic composition, ceramic electronic component, and process for producing ceramic electronic component
This disclosure provides a ferrite ceramic composition, a ceramic electronic component including the ceramic composition, and a process of producing a ceramic electronic component including the ferrite ceramic composition, of which the insulation performance can be secured even when fired simultaneously with a metal wire material containing Cu as the main component, and which can have good electric properties. The ferrite ceramic composition includes an Ni—Mn—Zn-based ferrite having a molar content of CuO of 5 mol % or less and in which, when the molar content (x) of Fe2O3 and the molar content (y) of Mn2O3 are expressed by a coordinate point (x,y), the coordinate point (x,y) is located in an area bounded by coordinate points A (25,1), B (47,1), C (47,7.5), D (45,7.5), E (45,10), F (35,10), G (35,7.5) and H (25,7.5). |
| US09230720B2 |
Electrically trimmable resistor device and trimming method thereof
An integrated circuit has a circuit part and a trimmable resistor, the resistance whereof may be modified by Joule effect. The trimmable resistor has first and second connection terminals coupled to the circuit part, and an intermediate terminal that divides the trimmable resistor into two portions. The first and the second connection terminals and the intermediate terminal are coupled to respective pads configured to receive electrical quantities designed to cause, in use, a respective trimming current flow in each portion. In this way, a substantially zero voltage drop is maintained between the first and second connection terminals while current is flowing in the resistor to change an electrical characteristic of the resistor, such as resistance or thermal coefficient. |
| US09230718B2 |
Chip thermistor
A chip thermistor includes a thermistor element body and a pair of outer electrodes. The thermistor element body has a pair of end faces opposing each other and a main face connecting the end faces to each other. The pair of outer electrodes are arranged on the pair of end faces, respectively. The pair of outer electrodes have a width in a direction intersecting the opposing direction of the pair of end faces made narrower with distance from the thermistor element body. |
| US09230714B2 |
High strength windable electromechanical tether with low fluid dynamic drag and system using same
A tether, and system using such a tether, adapted to provide mechanical and electrical coupling of an airborne flying platform to the ground. The tether may have a center structural core with electrical conductors on or near the outer diameter of the tether. The tether may utilize exterior configurations adapted to reduce drag. |
| US09230711B2 |
Composition for wire protective member, wire protective member, and wiring harness
A composition for a wire protective member with heat resistance, flame retardancy, and resistance against both a calcium chloride and a braided wire; a wire protective member and a wire harness using the composition. The composition for a wire protective member is produced by including a polypropylene having a propylene monomer constituting 50 to 95 percent by mass of monomers forming a polymer, a melt flow rate of 0.5 to 5 g/10 min, and a melting point of 150 degrees C. or more; a bromine-based flame retardant and an antimony trioxide as a flame retarder; a phenol-based antioxidant as a heat resistance life improving agent; and a metal deactivator, wherein the propylene has a tensile strength of 20 to 35 MPa and a Charpy impact strength of 10 kJ/m2 or more at 23 degrees C. |
| US09230708B2 |
Self assembly of naphthalene diimide derivatives and process thereof
The present disclosure is in relation to nanotechnology/nanobiotechnology, in particular to nano, meso and micro structures of Naphthalene diimide derivatives. The disclosure provides a method for supramolecular self-assembling of Naphthalene diimide derivatives, its characteristics and its applications. The present disclosure also relates to self assembled nano, meso or micro-structures of the Naphthalene diimide derivatives. |
| US09230707B2 |
Production method for a transparent conductive film and a transparent conductive film produced thereby
Provided is a production method for a transparent conductive film wherein: a substrate has formed thereon a transparent conductive oxide, a conductive metal body, and a conductive polymer comprised in a transparent composite conductive layer; or else a substrate has formed thereon a transparent conductive oxide layer; a conductive metal body layer, and a conductive polymer layer comprised in a transparent composite conductive layer; or a substrate has formed thereon a transparent conductive oxide layer, and also a conductive metal body and a conductive polymer comprised in an organic-inorganic hybrid layer in a transparent composite conductive layer. Also provided is a transparent conductive film produced by means of the method. |
| US09230705B2 |
Portable latent fingerprint developing apparatus
Disclosed is a portable latent fingerprint developing apparatus capable of visibly checking out an external shape of a finger print by using an UV LED lamp, after a fine spray of a fingerprint developing liquid is conducted by using a vibrator and providing the corresponding fingerprint image to an external terminal, after it is photographed by a camera. |
| US09230703B2 |
Gratings for X-ray imaging, consisting of at least two materials
Gratings for analyzing the interference image in interferometers for phase contrast X-ray tomography, comprising a carrier and grating webs produced from at least two different materials, method for producing the same and use thereof. |
| US09230699B2 |
Method of chemical decontamination for carbon steel member of nuclear power plant
A circulation pipe of a chemical decontamination apparatus including a malonic acid injection apparatus and an oxalic acid injection apparatus is connected to a purification system pipe, which is made of carbon steel, of a boiling water nuclear power plant. A malonic acid aqueous solution is injected from the malonic acid injection apparatus into the circulation pipe. An oxalic acid aqueous solution is injected from the oxalic acid injection apparatus into the circulation pipe. A reduction decontaminating solution including a malonic acid of 5200 ppm and an oxalic acid within a range of 50 to 400 ppm is supplied into the purification system pipe through the circulation pipe. Reduction decontamination for an inner surface of the purification system pipe is executed. After the reduction decontamination for the purification system pipe finishes, the malonic acid and oxalic acid included in the solution are decomposed and furthermore, the solution is purified. |
| US09230697B2 |
Steam generator for a nuclear reactor
A steam generator for a nuclear reactor comprises plenums proximate with a first plane, wherein the first plane intersects a bottom portion of a riser column of a reactor vessel. The steam generator may further comprise plenums proximate with a second plane, approximately parallel with the first plane, wherein the second plane intersects a top portion of the riser column of the reactor vessel. The steam generator may further include a plurality of steam generator tubes that convey coolant from a plenum located proximate with the first plane to one of the plenums proximate with the second plane. |
| US09230695B2 |
Nuclear fission igniter
Illustrative embodiments provide nuclear fission igniters for nuclear fission reactors and methods for their operation. Illustrative embodiments and aspects include, without limitation, a nuclear fission igniter configured to ignite a nuclear fission deflagration wave in nuclear fission fuel material, a nuclear fission deflagration wave reactor with a nuclear fission igniter, a method of igniting a nuclear fission deflagration wave, and the like. |
| US09230693B1 |
Repair circuit and semiconductor memory device including the same
A repair circuit includes a test data processing unit that outputs first and second fail detection signals using first and second test data of first and second memory banks, respectively, in response to a test mode signal, a repair address control unit that sets a priority of the first and second memory banks and selectively stores first and second addresses of the first and second memory banks based on the set priority in response to the first and second fail detection signals, and a fuse unit that performs repair programming based on the addresses selectively stored in the repair address control unit. |
| US09230689B2 |
Finding read disturbs on non-volatile memories
In non-volatile memory devices, the accessing of data on word line can degrade the data quality on a neighboring word line, in what is called a read disturb. Techniques are presented for determining word lines likely to suffer read disturbs by use of a hash tree for tracking the number of reads. Read counters are maintained for memory units at a relatively coarse granularity, such as a die or block. When the counter for one of these units reaches a certain level, it is subdivided into sub-units, each with their own read counter, in a process that be repeated to determine frequently read word lines with a fine level of granularity while only using a relatively modest amount of RAM on the controller to store the counters. |
| US09230688B2 |
Determining an age of data stored in memory
The present disclosure includes apparatuses and methods for determining an age of data stored in memory. A number of embodiments include determining a sensing voltage that results in a particular error rate being associated with a sense operation performed on a memory using the sensing voltage, determining a difference between the determined sensing voltage and a program verify voltage associated with the memory, and determining an age of data stored in the memory based on the determined difference. |
| US09230685B2 |
Memory programming methods and memory systems
Memory programming methods and memory systems are described. One example memory programming method includes first applying a first signal to a memory cell to attempt to program the memory cell to a desired state, wherein the first signal corresponds to the desired state, after the first applying, determining that the memory cell failed to place in the desired state, after the determining, second applying a second signal to the memory cell, wherein the second signal corresponds to another state which is different than the desired state, and after the second applying, third applying a third signal to the memory cell to program the memory cell to the desired state, wherein the third signal corresponds to the desired state. Additional method and apparatus are described. |
| US09230681B2 |
Selective activation of programming schemes in analog memory cell arrays
A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme. |
| US09230676B1 |
Weak erase of a dummy memory cell to counteract inadvertent programming
A NAND string includes dummy memory cells between data memory cells and source-side and drain-side select gates. A gradual increase in threshold voltage (Vth) for the dummy memory cells which occurs due to program-erase cycles is periodically detected by a read operation at an upper checkpoint voltage. If the Vth has increased beyond the checkpoint, the control gate voltage of the dummy memory cells is decreased during subsequent erase operations of program-erase cycles, causing a gradual weak erase. A decrease in the Vth is later detected by a read operation at a lower checkpoint voltage. If the Vth has decreased too much, the control gate voltage is raised during subsequent erase operations, causing a gradual weak programming. The process can be repeated to keep the Vth within a desired range and avoid disturbs due to an increase in a channel voltage gradient which would otherwise occur. |
| US09230671B2 |
Output circuit and semiconductor storage device
According to one embodiment, there is provided an output circuit including a driver transistor and a pre-driver circuit. The driver transistor is connected to an output terminal. The pre-driver circuit is configured to turn ON/OFF the driver transistor. The pre-driver circuit includes a first transistor, a second transistor, a third transistor. The first transistor is configured to control ON speed of the driver transistor. The second transistor is connected in parallel with the first transistor. The second transistor is configured to control ON speed of the driver transistor. The third transistor is connected in parallel with the first transistor and in series with the second transistor. The third transistor is configured to activate or deactivate the second transistor. |
| US09230669B2 |
Memory system and method of operation thereof
A method of operating a memory system including a non-volatile memory device and a memory controller controlling the non-volatile memory device, includes reading data from a memory cell array in a unit of a page which includes a plurality of sectors; performing error correction decoding on the read data in a unit of a sector of the page; selecting at least one target sector which includes at least one uncorrectable error and selecting at least one pass sector wherein all errors of the pass sector are correctable by the error correction decoding; inhibiting precharging of bit-lines connected to the at least one pass sector while precharging target bit lines connected to the at least one target sector; and performing a read retry operation for data in the at least one target sector. |
| US09230665B2 |
Nonvolatile semiconductor memory device
A control circuit provides an at least partially negative threshold voltage distribution to a memory cell, thereby erasing retained data of the memory cell, and provides multiple levels of positive threshold voltage distributions thereto, thereby programming multiple levels of data to the memory cell. The control circuit, when executing a program operation to the memory cell, executes a first program operation that provides the multiple levels of positive threshold voltage distributions to a first memory cell which is a memory cell subject to program, and executes a second program operation that provides a positive threshold voltage distribution, to a second memory cell adjacent to the first memory cell, irrespective of (regardless of) whether data to be programmed to the second memory cell is (already) present in the second memory cell or not. |
| US09230664B2 |
Nonvolatile memory and data writing method
According to one embodiment, a nonvolatile memory includes a memory cell array having a plurality of memory cells configured to store 3-bit data corresponding to first to third pages. Data coding, in which first page data values have one boundary, and second and three page data values each have three boundaries, is used to perform a first stage program based on data written into first page d, a second stage program based on data written into the first, second, and third pages, and a third stage program based on data written into the first, second, and third pages. |
| US09230660B2 |
Data modulation for groups of memory cells
Methods, devices, and systems for data modulation for groups of memory cells. Data modulation for groups of memory cells can include modulating N units of data to a combination of programmed states. Each memory cell of a group of G number of memory cells can be programmed to one of M number of programmed states, where M is greater than a minimum number of programmed states needed to store N/G units of data in one memory cell, and where the programmed state of each memory cell of the group is one of the combination of programmed states. |
| US09230658B2 |
Method of storing data on a flash memory device
Methods and apparatus are disclosed, such as those involving a flash memory device. One such method includes storing data on memory cells on a memory block including a plurality of word lines and a plurality of memory cells on the word lines. The word lines comprising one or more bottom edge word lines, one or more top edge word lines, and intermediate word lines between the bottom and top edge word lines. The data is stored first on memory cells on the intermediate word lines. Then, a remaining portion, if any, of the data is stored on memory cells on the bottom edge word lines and/or the top edge word lines. This method enhances the life of the flash memory by preventing a premature failure of memory cells on the bottom or top edge word lines, which can be more prone to failure. |
| US09230653B2 |
Semiconductor memory device
According to an embodiment, a semiconductor device includes an IO terminal unit, an first IO line, and a second IO line. The IO terminal unit includes first and second IO terminals. The first IO line is electrically connected to one of both the first IO terminal and the second IO terminal. The second IO line is electrically connected to the other of both the first IO terminal and the second IO terminal. When the semiconductor device receives a first signal, the first IO terminal is electrically connected to the first IO line and the second IO terminal is electrically connected to the second IO line. When the semiconductor device receives a second signal, the first IO terminal is electrically connected to the second IO line and the second IO terminal is electrically connected to the first IO line. The second signal is different from the first signal. |
| US09230651B2 |
Memory device having electrically floating body transitor
A semiconductor memory cell includes a floating body region configured to be charged to a level indicative of a state of the memory cell selected from at least first and second states. A first region of the memory cell is in electrical contact with the floating body region. A second region of the memory cell is spaced apart from the first region and is also in electrical contact with the floating body region. A gate is positioned between the first and second regions. A back-bias region is configured to generate impact ionization when the memory cell is in one of the first and second states, and the back-bias region is configured so as not to generate impact ionization when the memory cell is in the other of the first and second states. |
| US09230650B2 |
Semiconductor device and method for operating the same
A semiconductor device employs a technology for improving data retention characteristics of a cell array storing data regarding conditions for controlling internal operations of the semiconductor device. The semiconductor device includes a content addressable memory (CAM) cell array configured to store CAM data regarding conditions for controlling the internal operations, a control logic configured to store the CAM data read out of the CAM cell array, and a microprocessor configured to perform a reprogramming operation on the CAM cell array using the CAM data stored in the control logic. |
| US09230649B2 |
Non-volatile ternary content-addressable memory 4T2R cell with RC-delay search
The 4T2R cell comprises a write transistor, a first variable resistive element, a first transistor, a second variable resistive element, a second transistor, and a charge control transistor. The first transistor is electrically coupled to the first variable resistive element in series, and the second transistor is electrically coupled to the second variable resistive element in series, for providing search paths. For operating in a search phase, a pulse voltage is applied across the gate electrode and the source electrode of the first transistor (or across the gate electrode and the source electrode of the second transistor) for determining whether the gate voltage of the charge control transistor changes larger than a match threshold during the period of the pulse. Different RC-delay of the variable resistive elements controlling the voltage change speed of the gate voltage of the charge control transistor determines the matching result. |
| US09230648B2 |
Memory device
A memory device includes a memory cell storing data as stored data, an output signal line, and a wiring to which a voltage is applied. The memory cell includes a comparison circuit performing a comparison operation between the stored data and search data and taking a conduction state or a non-conduction state in accordance with the operation result, and a field-effect transistor controlling writing and holding of the stored data. A voltage of the output signal line is equal to the voltage of the wiring when the comparison circuit is in the conduction state. |
| US09230646B2 |
Nonvolatile semiconductor memory device and control method thereof
This nonvolatile semiconductor memory device comprises a memory cell array including a plurality of bit lines, a plurality of word lines intersecting the plurality of bit lines, and memory cells provided at intersections of the plurality of bit lines and the plurality of word lines, and further comprises a control unit for controlling a voltage applied to the bit lines and word lines. The memory cell includes a variable resistance element and a rectifier element. The control unit provides a first potential difference to a selected memory cell via a selected bit line and a selected word line, and then provides a second potential difference to the selected memory cell via the selected bit line and the selected word line, the second potential difference being for erasing a residual charge. |
| US09230645B2 |
Apparatus and methods for forming a memory cell using charge monitoring
Apparatus and methods of forming a memory cell are described. In one such method, a forming charge applied to a memory cell, such as a Resistive RAM (RRAM) memory cell, is monitored to determine the progress of the forming the cell. If the cell is consuming charge too slowly, a higher voltage can be applied. If the cell is consuming charge too quickly, a lower voltage can be applied. The charge may be monitored by charging a capacitor to a certain level, then monitoring the discharge rate of the capacitor though the cell. The monitoring may use comparators to measure the charge. The monitoring may also use an analog to digital converter to perform the monitoring. |
| US09230639B2 |
SNR estimation in analog memory cells
A method includes programming a group of analog memory cells by writing respective analog values into the memory cells in the group. After programming the group, the analog values are read from the memory cells in the group using a set of read thresholds so as to produce readout results. Respective optimal positions for the read thresholds in the set are identified based on the readout results. A noise level in the readout results is estimated based on the identified optimal positions of the read thresholds. |
| US09230636B2 |
Apparatus for dual purpose charge pump
Described is an apparatus which comprises: a first power supply node to provide a first power supply, a second power supply node, and a third power supply node; a first transistor which is operable to couple the first and second power supply nodes; and a charge pump circuit to provide a boosted voltage to the third power supply node in one mode, and to recover charge from the second power node in another mode. Described is a memory unit which comprises: a DRAM which is operable to be refreshed; a gated power supply node coupled to the DRAM to provide a gated power supply to the DRAM; and a charge recycling circuit to recover charge from the gated power supply node after the DRAM is refreshed. |
| US09230632B1 |
Word line driver circuit
A word line driver circuit allows for dynamic selection of different word line voltages for selection and deselection of memory cells included in a resistive memory array in a manner that reduces circuit complexity, device count, and leakage currents. |
| US09230630B2 |
Physically unclonable function based on the initial logical state of magnetoresistive random-access memory
One feature pertains to a method for implementing a physically unclonable function (PUF). The method includes providing an array of magnetoresistive random access memory (MRAM) cells, where the MRAM cells are each configured to represent one of a first logical state and a second logical state. The array of MRAM cells are un-annealed and free from exposure to an external magnetic field oriented in a direction configured to initialize the MRAM cells to a single logical state of the first and second logical states. Consequently, each MRAM cell has a random initial logical state of the first and second logical states. The method further includes sending a challenge to the MRAM cell array that reads logical states of select MRAM cells of the array, and obtaining a response to the challenge from the MRAM cell array that includes the logical states of the selected MRAM cells of the array. |
| US09230627B2 |
High density low power GSHE-STT MRAM
Systems and methods are directed to a memory element comprising a hybrid giant spin Hall effect (GSHE)-spin transfer torque (STT) magnetoresistive random access memory (MRAM) element, which includes a GSHE strip formed between a first terminal (A) and a second terminal (B), and a magnetic tunnel junction (MTJ), with a free layer of the MTJ interfacing the GSHE strip, and a fixed layer of the MTJ coupled to a third terminal (C). The orientation of the easy axis of the free layer is perpendicular to the magnetization created by electrons traversing the GSHE strip between the first terminal and the second terminal, such that the free layer of the MTJ is configured to switch based on a first charge current injected from/to the first terminal to/from the second terminal and a second charge current injected/extracted through the third terminal into/out of the MTJ via the third terminal (C). |
| US09230626B2 |
Electrically gated three-terminal circuits and devices based on spin hall torque effects in magnetic nanostructures apparatus, methods and applications
3-terminal magnetic circuits and devices based on the spin-transfer torque (STT) effect via a combination of injection of spin-polarized electrons or charged particles by using a charge current in a spin Hall effect metal layer coupled to a free magnetic layer and application of a gate voltage to the free magnetic layer to manipulate the magnetization of the free magnetic layer for various applications, including non-volatile memory functions, logic functions and others. The charge current is applied to the spin Hall effect metal layer via first and second electrical terminals and the gate voltage is applied between a third electrical terminal and either of the first and second electrical terminals. The spin Hall effect metal layer can be adjacent to the free magnetic layer or in direct contact with the free magnetic layer to allow a spin-polarized current generated via a spin Hall effect under the charge current to enter the free magnetic layer. The disclosed 3-terminal magnetic circuits can also be applied to signal oscillator circuits and other applications. |
| US09230625B2 |
Magnetic memory, spin element, and spin MOS transistor
A magnetic memory according to an embodiment includes: a multilayer structure including a semiconductor layer and a first ferromagnetic layer; a first wiring line electrically connected to the semiconductor layer; a second wiring line electrically connected to the first ferromagnetic layer; and a voltage applying unit electrically connected between the first wiring line and the second wiring line to apply a first voltage between the semiconductor layer and the first ferromagnetic layer during a write operation, a magnetization direction of the first ferromagnetic layer being switchable by applying the first voltage. |
| US09230624B2 |
Magnetic shift register memory device
In one embodiment, the invention is a magnetic shift register memory device. One embodiment of a memory cell includes a magnetic column including a plurality of magnetic domains, a reader coupled to the magnetic column, for reading data from the magnetic domains, a temporary memory for storing data read from the magnetic domains, and a writer coupled to the magnetic column, for writing data in the temporary memory to the magnetic domains. |
| US09230620B1 |
Distributed hardware tree search methods and apparatus for memory data replacement
A memory interface for a plurality of DRAM devices comprising an input DRAM address matching module includes a local memory comprising a plurality of data entries, wherein the plurality of data entries comprising a plurality of DRAM addresses and a plurality of associated pointers, and wherein the plurality of associated pointers comprise output DRAM addresses, and a matching mechanism coupled to the local memory, wherein the matching mechanism is configured to receive the input DRAM address, wherein the matching mechanism is configured to determine whether the input DRAM address is specified in the plurality of data entries, and when the input DRAM address is specified in the plurality of data entries, the matching mechanism is configured to output an associated pointer associated with the input DRAM address. |
| US09230616B2 |
Memory devices, memory device operational methods, and memory device implementation methods
Memory devices, memory device operational methods, and memory device implementation methods are described. According to one arrangement, a memory device includes memory circuitry configured to store data in a plurality of different data states, temperature sensor circuitry configured to sense a temperature of the memory device and to generate an initial temperature output which is indicative of the temperature of the memory device, and conversion circuitry coupled with the temperature sensor circuitry and configured to convert the initial temperature output into a converted temperature output which is indicative of the temperature of the memory device at a selected one of a plurality of possible different temperature resolutions, and wherein the converted temperature output is utilized by the memory circuitry to implement at least one operation with respect to storage of the data. |
| US09230614B2 |
Separate microchannel voltage domains in stacked memory architecture
Separate microchannel voltage domains in a stacked memory architecture An embodiment of a memory device includes a memory stack including one or more coupled memory dies, wherein a first memory die of the memory stack includes multiple microchannels, and a logic chip coupled with the memory stack, the logic chip including a memory controller. Each of the microchannels includes a separate voltage domain, and a voltage level is controlled for each of the plurality of microchannels. |
| US09230613B2 |
Power up detecting system
A power up detecting system for generating one of a first power up detecting signal and a second power up detecting signal as the final power up detecting signal, according to power provided by a power supplier. The power up detecting system comprises: a power up detecting module, controlled by a control signal to generate the first power up detecting signal in a first mode and to generate the second power up detecting signal in a second mode, wherein a voltage level of the first power up detecting signal is transited when the power reaches a first predetermined voltage value, and the voltage level of the second power up detecting signal is transited when the power reaches a second predetermined voltage value; where the first predetermined voltage value is higher than the second predetermined voltage value. |
| US09230608B2 |
Filter element for disc drive enclosure
A recirculation filter element for a disc drive enclosure. The filter element has a body having a surface area to volume ratio of at least 100/m and a self-assembled monolayer. The self-assembled monolayer may adsorb volatile contaminants from the enclosure or may have a chemical affinity to particulates, to accumulate and sequester particles on the body. |
| US09230599B2 |
Storage and editing of video and sensor data from athletic performances of multiple individuals in a venue
Video and sensor data from multiple locations in a venue, in which multiple individuals are engaged in athletic performances, is stored and edited to create individualized video programs of athletic performances of individuals. Each camera provides a video feed that is continuously stored. Each video feed is stored in a sequence of data files in computer storage, which data files are created in regular time intervals. Each file is accessible using an identifier of the camera and a time interval. Similarly, data from sensors is continuously received and stored in a database. The database stores, for each sensor, an identifier of each individual detected in the proximity of the sensor and the time at which the individual was detected. Each sensor is associated with one or more cameras. |
| US09230598B1 |
Methods and devices for mitigating gas leakage through an adhesive
In certain embodiments, an apparatus includes a basedeck for a hard disc drive. The basedeck includes an interior surface for supporting disc drive components and an exterior surface. The basedeck includes a cavity in either the exterior surface or interior surface. The cavity includes at least two pads for supporting an electrical connector. |
| US09230597B2 |
Magnetic head having a spin torque oscillator (STO) with a hybrid heusler field generation layer (FGL)
In one embodiment, a magnetic head includes a main pole configured to write data to a magnetic medium, a trailing shield positioned on a trailing side of the main pole, and a STO between the main pole and the trailing shield, wherein the STO includes a laminated structure having a FGL, a spun polarization layer (SPL), and a non-magnetic spacer positioned between the FGL and the SPL, wherein the FGL includes a laminated structure having one or more layers of a CoFe alloy and a Heusler alloy alternately laminated in this order from an end of the FGL closest to the non-magnetic spacer. In another embodiment, a method is presented for forming such a magnetic head utilizing a FGL that includes a laminated structure baying layers of a CoFe alloy and a Heusler alloy alternately laminated in this order from an end of the FGL closest to the non-magnetic spacer. |
| US09230596B2 |
Systems and methods for variable rate coding in a data processing system
The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for variable rate coding in a data processing system. As an example, a data processing system may include an encoder circuit. The encoder circuit includes at least a first encoder and a second encoder, and is operable to generate a first level encoded output that is the same length for a given code rate whether the first encoder or the second encoder is selected. |
| US09230589B2 |
Method for producing bi-polar complementary structure patterns
The embodiments disclose a method including creating at least one first structure including magnetically isolated features in servo fields, and creating at least one second structure including finger-structure patterns including intentional weak nucleation points in servo fields to create a regular bi-polar magnetization direction after bulk DC initialization, and wherein the first and second structures form bi-polar complementary structure patterns. |
| US09230586B1 |
Method of setting flying height and flying height setting device
While a plurality of drive currents for flying height setting with current values smaller than a tentative optimum drive current are supplied to a light source, respectively, heater power is supplied to a heater part, and touch down of a thermally-assisted magnetic recording head is detected. Tentative optimum heater power is determined based on a correlation between the heater power when the touch down is detected and each drive current for flying height setting. The tentative optimum drive current is supplied to the light source part; the tentative optimum heater power is supplied to the heater part; a reference signal is recorded in a magnetic recording medium; and flying height of the thermally-assisted magnetic recording head is set by determining whether or not the reference signal is recorded with the desired signal intensity. |
| US09230583B1 |
Disc device and controlling method
According to an embodiment, there is provided a disc device that execute a filtering process to remove one or more resonances from the first signal by the sum of transfer functions, the one or more resonances being included in first transfer characteristics from the first signal transmitted via the first control line to response of the first head, the transfer functions being indicative of resonances included in second transfer characteristics from the first signal transmitted via the second control line to response of the first head. |
| US09230582B2 |
Plasmonic funnel for focused optical delivery to a magnetic medium
An apparatus includes a transducer including a plasmonic funnel having first and second ends with the first end having a smaller cross-sectional area than the second end, and a first section positioned adjacent to the first end of the plasmonic funnel, and a first waveguide having a core, positioned to cause light in the core to excite surface plasmons on the transducer. |
| US09230581B2 |
Method of positioning head attaching part of head suspension and method of manufacturing half-finished head suspension
A positioning method positions a flexure whose front end side is joined to an outside frame with respect to a load beam, keeps the positioned state of the flexure and load beam, plastically deforms the outside frame to bend the front end side of the flexure so that the position of a tongue of the flexure is adjusted to the position of a dimple of the load beam, and joins the flexure and load beam to each other to keep the position adjusted state of the tongue. |
| US09230578B2 |
Multiple readers for high resolution and SNR for high areal density application
The present invention generally relates to a read head in a magnetic recording head. The read head utilizes two reader elements that are stacked in the down track direction within the same read gap to improve resolution and SNR by combining the signals from the two reader elements. The output waveform from each read element is asymmetric in the down track direction; however, by use of equalizer settings and waveform combining the algorithm in signal processing, the combined waveform has a similar or better resolution and higher SNR compared to a single read element in a smaller read gap. |
| US09230577B2 |
Thin seeded antiferromagnetic coupled side shield for sensor biasing applications
A composite side shield structure is disclosed for providing biasing to a free layer in a sensor structure. The sensor is formed between a bottom shield and top shield each having a magnetization in a first direction that is parallel to an ABS. The side shield is stabilized by an antiferromagnetic (AFM) coupling scheme wherein a bottom (first) magnetic layer is AFM coupled to a second magnetic layer which in turn is AFM coupled to an uppermost (third) magnetic layer. First and third magnetic layers each have a magnetization aligned in the first direction and are coupled to bottom and top shields, respectively, for additional stabilization. The top shield may be modified to include an AFM scheme for providing additional stabilization and guidance to magnetic moments within AFM coupled magnetic layers in the top shield, and to the third magnetic layer in the side shield. |
| US09230575B2 |
Magnetoresistive sensor with SAF structure having crystalline layer and amorphous layer
Implementations disclosed herein provide for a magnetoresistive (MR) sensor including a synthetic antiferromagnetic (SAF) structure that is magnetically coupled to a side shield element. The SAF structure includes at least one magnetic amorphous layer that is an alloy of a ferromagnetic material and a refractory material. The amorphous magnetic layer may be in contact with a non-magnetic layer and antiferromagnetically coupled to a layer in contact with an opposite surface of the non-magnetic layer. |
| US09230571B1 |
MgO based perpendicular spin polarizer in microwave assisted magnetic recording (MAMR) applications
A design for a microwave assisted magnetic recording device is disclosed wherein a spin torque oscillator (STO) between a main pole and write shield has a spin polarization (SP) layer less than 30 Angstroms thick and perpendicular magnetic anisotropy (PMA) induced by an interface with one or two metal oxide layers. Back scattered spin polarized current from an oscillation layer is used to stabilize SP layer magnetization. One or both of the metal oxide layers may be replaced by a confining current pathway (CCP) structure. In one embodiment, the SP layer is omitted and spin polarized current is generated by a main pole/metal oxide interface. A direct current or pulsed current bias is applied across the STO. Rf current may also be injected into the STO to reduce critical current density. A write gap of 25 nm or less is achieved while maintaining good STO performance. |
| US09230570B1 |
Write head having two yokes
A write head comprising a main pole having a pole tip proximate an air bearing surface (ABS), a leading side and a trailing side, with a leading yoke on the leading side of the main pole and a trailing yoke on the leading side of the main pole. The leading yoke has a greater thickness than the trailing yoke, with a ratio of the thickness of the leading yoke to the trailing yoke of at least 1.5:1. |
| US09230569B1 |
Low Bs spin-polarizer for spin torque oscillator
In one embodiment, a magnetic head includes a main magnetic pole positioned configured to generate a writing magnetic field when current is applied to a write coil, and a spin torque oscillator (STO) located adjacent the main magnetic pole, the STO being configured to generate a high frequency magnetic field when current is applied thereto, wherein the high frequency magnetic field is generated simultaneously to the writing magnetic field to assist in reversing magnetization of a magnetic recording medium. The STO includes: a spin polarization layer (SPL), a field generation layer (FGL) positioned adjacent the SPL, and one or more interlayers positioned between the SPL and the FGL, and a magnetization easy axis of the SPL is positioned in an in-plane direction such that the SPL has no perpendicular magnetic anisotropy. |
| US09230566B1 |
Perpendicular magnetic write head having a controlled magnetization state shield
Embodiments disclosed herein generally relate to a perpendicular magnetic recording head for recording magnetic information and a magnetic recording device employing the magnetic head. The magnetic recording head comprises at least one thin shield region having a high coercive force and a magnetization direction oriented towards the right when viewed from the MFS with the leading side on bottom and the trailing side on top, and at least one thick shield region having a low coercive force. The thin shield region surrounds a main pole, and the thick shield region partially surrounds the thin shield region. The magnetic recording head is able to reduce FTI by controlling the magnetization direction of the shield layers. |
| US09230562B2 |
System and method using feedback speech analysis for improving speaking ability
A speech analysis system and method for analyzing speech. The system includes: a voice recognition system for converting inputted speech to text; an analytics system for generating feedback information by analyzing the inputted speech and text; and a feedback system for outputting the feedback information. |
| US09230561B2 |
Method for sending multi-media messages with customized audio
A system and method of creating a customized multi-media message to a recipient is disclosed. The multi-media message is created by a sender and contains an animated entity that delivers an audible message. The sender chooses the animated entity from a plurality of animated entities. The system receives a text message from the sender and receives a sender audio message associated with the text message. The sender audio message is associated with the chosen animated entity to create the multi-media message. The multi-media message is delivered by the animated entity using as the voice the sender audio message wherein the mouth movements of the animated entity conform to the sender audio message. |
| US09230560B2 |
Smart home automation systems and methods
A smart home interaction system is presented. It is built on a multi-modal, multithreaded conversational dialog engine. The system provides a natural language user interface for the control of household devices, appliances or household functionality. The smart home automation agent can receive input from users through sensing devices such as a smart phone, a tablet computer or a laptop computer. Users interact with the system from within the household or from remote locations. The smart home system can receive input from sensors or any other machines with which it is interfaced. The system employs interaction guide rules for processing reaction to both user and sensor input and driving the conversational interactions that result from such input. The system adaptively learns based on both user and sensor input and can learn the preferences and practices of its users. |
| US09230557B2 |
Apparatus, method and computer program for manipulating an audio signal comprising a transient event
An apparatus for manipulating an audio signal comprising a transient event has a transient signal replacer configured to replace a transient signal portion, comprising the transient event of the audio signal, with a replacement signal portion adapted to signal energy characteristics of one or more transient signal portions of the audio signal, or to signal energy characteristics of the transient signal portion, to obtain a transient-reduced audio signal. The apparatus also has a signal processor configured to process the transient-reduced audio signal to obtain a processed version of the transient-reduced audio signal. The apparatus also has a transient-signal-re-inserter configured to combine the processed version of the transient-reduced audio signal with a transient signal representing, in an original or processed form, a transient content of the transient signal portion. |
| US09230555B2 |
Apparatus and method for generating an output audio data signal
An apparatus receives an input encoded audio data signal comprising a base layer and at least one enhancement layer. A reference unit (103) generates reference audio data corresponding to audio data of a reference set of layers. A layer unit (105) divides the layers of the input signal into a first subset and a second subset. A sample unit (107) generates sample audio data corresponding to the audio data of the first subset. A comparison unit (109) generates a difference measure by comparing the sample audio data to the reference audio data based on a perceptual model. An output unit (111) then determines if the difference measure meets a similarity criterion and generates an output signal without audio data from a layer of the second subset if the similarity criterion is met and including the audio data of the layer otherwise. The invention may provide reduced data rates without an unacceptable degradation of quality. |
| US09230554B2 |
Encoding method for acquiring codes corresponding to prediction residuals, decoding method for decoding codes corresponding to noise or pulse sequence, encoder, decoder, program, and recording medium
In encoding, the number of bits to be assigned to codes corresponding to noise or a pulse sequence obtained according to prediction analysis applied to time series signals included in a predetermined time interval is switched according to whether an index that indicates a level of periodicity and/or stationarity of input time series signals satisfies a condition that indicates high periodicity and/or high stationarity or a condition that indicates low periodicity and/or low stationarity, to acquire the codes corresponding to the noise and the pulse sequence. In decoding, a decoding mode for codes corresponding to noise or a pulse sequence included in codes corresponding to a predetermined time interval is switched according to the same criterion as that described above to decode the codes corresponding to the noise or the pulse sequence to acquire noise or a pulse sequence corresponding to the predetermined time interval. |
| US09230551B2 |
Audio encoder or decoder apparatus
An apparatus comprising at least one processor and at least one memory including computer program code the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus at least to perform: determining from an audio signal at least a first part and a second part; encoding the first part of the audio signal with a first encoder for generating a first encoded audio signal; encoding the second part of the audio signal with a second encoder configured to generate a second encoded audio signal comprising for a first section of the second part an indicator to at least part of the first part of the audio signal; and determining the first section of the second part of the audio signal such that the first encoded audio signal and second encoded audio signal is within a defined encoding efficiency parameter. |
| US09230550B2 |
Speaker verification and identification using artificial neural network-based sub-phonetic unit discrimination
In one embodiment, a computer system stores speech data for a plurality of speakers, where the speech data includes a plurality of feature vectors and, for each feature vector, an associated sub-phonetic class. The computer system then builds, based on the speech data, an artificial neural network (ANN) for modeling speech of a target speaker in the plurality of speakers, where the ANN is configured to discriminate between instances of sub-phonetic classes uttered by the target speaker and instances of sub-phonetic classes uttered by other speakers in the plurality of speakers. |
| US09230546B2 |
Voice content transcription during collaboration sessions
A method, computer program product, and system for voice content transcription during collaboration sessions is described. A method may comprise receiving an indication to provide one or more real-time voice content-to-text content transcriptions to a first collaboration session participant. The one or more real-time voice content-to-text content transcriptions may correspond to voice content of a second collaboration session participant in one or more collaboration sessions including the first collaboration session participant and the second collaboration session participant. The method may additionally comprise defining a preference for the first collaboration session participant to receive the one or more real-time voice content-to-text content transcriptions corresponding to the voice content of the second collaboration session participant in the one or more collaboration sessions including the first collaboration session participant and the second collaboration session participant based upon, at least in part, the indication. |
| US09230543B2 |
Method and apparatus for providing contents about conversation
Disclosed are a method and an apparatus for providing contents about conversation, which collect voice information from conversation between a user and another person, search contents on the basis of the collected voice information, and provide contents about the conversation between the user and the person. The method of providing contents about conversation includes: a voice information collecting step of collecting voice information from conversation between a user and another person; a keyword creating control step of creating search keywords by using the collected voice information; and a contents providing control step of searching contents by using the created search keywords, and providing the searched contents. |
| US09230541B2 |
Keyword detection for speech recognition
This application discloses a method implemented of recognizing a keyword in a speech that includes a sequence of audio frames further including a current frame and a subsequent frame. A candidate keyword is determined for the current frame using a decoding network that includes keywords and filler words of multiple languages, and used to determine a confidence score for the audio frame sequence. A word option is also determined for the subsequent frame based on the decoding network, and when the candidate keyword and the word option are associated with two distinct types of languages, the confidence score of the audio frame sequence is updated at least based on a penalty factor associated with the two distinct types of languages. The audio frame sequence is then determined to include both the candidate keyword and the word option by evaluating the updated confidence score according to a keyword determination criterion. |
| US09230540B2 |
Detecting potential significant errors in speech recognition results
In some embodiments, the recognition results produced by a speech processing system (which may include two or more recognition results, including a top recognition result and one or more alternative recognition results) based on an analysis of a speech input, are evaluated for indications of potential significant errors. In some embodiments, the recognition results may be evaluated using one or more sets of words and/or phrases, such as pairs of words/phrases that may include words/phrases that are acoustically similar to one another and/or that, when included in a result, would change a meaning of the result in a manner that would be significant for a domain. The recognition results may be evaluated using the set(s) of words/phrases to determine, when the top result includes a word/phrase from a set of words/phrases, whether any of the alternative recognition results includes any of the other, corresponding words/phrases from the set. |
| US09230535B2 |
Active vibration noise control apparatus
An active vibration noise control apparatus with which vibration noise can be reduced stably and effectively by preventing divergence of a filter coefficient or a delay in convergence due to an effect of a transfer characteristic on a secondary path. The active vibration noise control apparatus calculates an update step size in accordance with a magnitude of a gain in the transfer characteristic corresponding to a frequency of vibration noise, where the transfer characteristic is on the secondary path for propagation of a secondary vibration noise for reducing the vibration noise, and updates the filter coefficient on the basis of the calculated update step size. |
| US09230532B1 |
Power management of adaptive noise cancellation (ANC) in a personal audio device
A personal audio device, such as a wireless telephone, includes an adaptive noise canceling (ANC) circuit that adaptively generates an anti-noise signal from an output of a microphone that measures ambient audio. The anti-noise signal is combined with source audio to provide an output for a speaker. The anti-noise signal causes cancellation of ambient audio sounds that appear at the microphone. A processing circuit estimates a level of background noise from the microphone output and sets a power conservation mode of the personal audio device in response to detecting that the background noise level is lower than a predetermined threshold. |
| US09230527B2 |
Music synchronization arrangement
The invention generally pertains to a hand-held computing device. More particularly, the invention pertains to a computing device that is capable of controlling the speed of the music so as to affect the mood and behavior of the user during an activity such as exercise. By way of example, the speed of the music can be controlled to match the pace of the activity (synching the speed of the music to the activity of the user) or alternatively it can be controlled to drive the pace of the activity (increasing or decreasing the speed of the music to encourage a greater or lower pace). One aspect of the invention relates to adjusting the tempo (or some other attribute) of the music being outputted from the computing device. By way of example, a songs tempo may be increased or decreased before or during playing. |
| US09230523B1 |
Cymbal mounting assembly with centering clip
A cymbal mounting assembly that has a housing with a through hole. A mounting rod of a cymbal stand is to be conducted through the through hole with therebeing a loose fit between the mounting rod and the housing. A cymbal is loosely mounted on the housing so it can freely pivot or rock. The assembly includes a tightening nut with a friction feature included to adjust the amount of clamping force being applied to the cymbal. This friction feature prevents unauthorized adjusting of the rocking or pivoting motion (action) of the cymbal and this preselected amount of action by the drummer is maintained even when the cymbal is placed in storage when the drummer moves to another playing location and is only changed when the drummer decides to do so. The assembly may also include a centering clip within the through that prevents the housing from contacting the mounting rod in the area of the upper portion of the assembly. |
| US09230522B1 |
Hitting device for cajon
A hitting device for cajon includes a base having a cajon hitting assembly, a shaft, and a driving portion assembled thereon. When the treading portion is treaded, the first end of the bar member is pivoted about the pivoting portion, so that the bar member drives the driving member to move longitudinally and the arm drives the shaft to rotate along a direction where the cajon hitter moves forward the hitting surface of the cajon. |
| US09230521B2 |
Bass clarinet with low E tone hole not on the bell
A low E-flat bass clarinet with low E tone hole not on the bell is provided. The clarinet includes a mouthpiece coupled to a neck. The clarinet further includes an upper joint coupled to the neck on one end and coupled to a lower joint on an opposing end, the upper and lower joints comprising tone holes and associated key mechanisms mounted thereon, and further having thereon a finger spatula terminating in a cam end positioned adjacent to the lower end of the lower joint. The clarinet also includes an low E joint coupled to a lower end of the lower joint, the low E joint having a low E tone hole. Further, the clarinet includes a bell coupled to the lower end of the low E joint, the bell having no low E tone hole and no low E key mechanism located thereon. |
| US09230518B2 |
Fault-tolerant preemption mechanism at arbitrary control points for graphics processing
This disclosure presents techniques and structures for preemption at arbitrary control points in graphics processing. A method of graphics processing may comprise executing commands in a command buffer, the commands operating on data in a read-modify-write memory resource, double buffering the data in the read-modify-write memory resource, such that a first buffer stores original data of the read-modify-write memory resource and a second buffer stores any modified data produced by executing the commands in the command buffer, receiving a request to preempt execution of the commands in the command buffer before completing all commands in the command buffer, and restarting execution of the commands at the start of the command buffer using the original data in the first buffer. |
| US09230516B2 |
Automatic scrolling speed control by tracking user's eye
According to an aspect, an information display device includes a display unit, a visual line detector, and a control unit. The display unit displays information in a scroll region, which is provided in at least a part of a screen of the display unit, while scrolling the information. The visual line detector detects a visual line position of an operator with respect to the scroll region. The control unit controls a scroll speed, at which the information is scrolled in the scroll region, based on the visual line position detected by the visual line detector. |
| US09230512B2 |
LED backlight driving circuit and liquid crystal device
A LED backlight driving circuit is disclosed. The LED backlight driving circuit includes a boost circuit for converting an input voltage to an output voltage for a LED unit, a driving IC for controlling the boost circuit such that the boost circuit converts the input voltage to the output voltage for the LED unit, a discharging module for releasing charges stored within the boost circuit after the driving circuit is turned off, and a detecting module for detecting a voltage at an output end of the boost circuit and then for generating enable signals for controlling the operations of the driving IC. The LED backlight driving circuit is capable of detecting a discharging state of the boost circuit after being quickly rebooted. The driving circuit can be rebooted only if the output voltage is smaller than a reference voltage as the charges stored within the boost circuit is released. As such, the flashing issue is avoided. In addition, the liquid crystal device including the above LED backlight driving circuit is also disclosed. |
| US09230508B2 |
Efficient feedback-based illumination and scatter culling
Techniques are disclosed for rendering graphics objects in a scene file. A first pixel is selected from a plurality of pixels that are associated with an image frame. A set of graphics objects that intersect with the first pixel is identified. For each graphics objects in the first set of graphics objects. a set of light sources that illuminates the respective graphics object at the first pixel is identified, and, for each light source in the set of light sources, an entry is stored in a first table that includes references to the first pixel, the respective graphics object, and the respective light source. |
| US09230507B2 |
System and method for transitioning an electronic device from a first power mode to a second power mode
A system and method for reducing power consumption in an electronic device by controlling the transition of the electronic device from a sleep mode to a full power mode. The electronic device comprises a main processor a touch-sensitive overlay, and an overlay controller. A sequence of touch inputs on the touch-sensitive overlay are detected and captured using the overlay controller while the main processor is in the sleep mode. A subset of the sequence of touch inputs is processed using the overlay controller to determine that the sequence of touch inputs corresponds to a coarse model of a pre-determined wake-up gesture prior to transitioning the electronic device from the sleep mode to the full power mode. |
| US09230505B2 |
Apparatus, system and method for providing clock and data signaling
Techniques and mechanisms for exchanging communications which each represent a respective combination of data and clock signaling. In an embodiment, encoder logic generates a first signal pair, including encoding a first differential data signal pair with a first clock signal of a differential clock signal pair. The encoder logic further generates a second signal pair, including encoding a second differential data signal pair with a second clock signal of the same differential clock signal pair. In another embodiment, decoder logic receives and decodes the first signal pair and the second signal pair, wherein the decoding generates the first differential data signal pair, the second differential data signal pair and a clock signal. |
| US09230504B2 |
Display apparatus indicating control authority in content views and controlling methods thereof
A display apparatus is provided. The display apparatus includes a signal processor which processes a plurality of contents and forms image frames, a display unit which outputs a plurality of content views using the image frames, and a controller which controls the display to display an object which indicates a control authority in one of the plurality of content views. |
| US09230502B2 |
Display device having blocking circuit for extracting start pulse from signal
A display device with fewer terminals. The display device includes a timing signal generating circuit which outputs an output signal based on a clock signal, in which one signal line serves as both a signal line to which a start pulse signal that drives the timing signal generating circuit is input and a signal line to which an image signal is input. Further, a blocking circuit which outputs a start pulse to the timing signal generating circuit but does not output the image signal is provided between the signal line and the timing signal generating circuit. |
| US09230501B1 |
Device control utilizing optical flow
A computing device includes an interface configured to receive image data that is indicative of a field-of-view (FOV) that is associated with a head-mountable display (HMD). The computing device also includes a computing system configured to determine optical flow from the image data and to determine, based on the optical flow, whether or not the HMD is associated with operation of a vehicle. Further, the computing device is configured to control the HMD to display information in a first mode, if the HMD is associated with the operation of the vehicle, and to control the HMD to display information in a second mode, if the HMD is not associated with the operation of the vehicle. |
| US09230498B2 |
Driving circuit and method of driving liquid crystal panel and liquid crystal display
A driving circuit includes m×n TFT pixel units, a gate driver, a source driver, m scan lines and 2n data lines. Every row of TFT pixel units is connected to a scan line, and the m scan lines are connected to the gate driver which provides m rows of the TFT pixel units with scan signals through the m scan lines. A first data line and a second data line are set up to every column of the TFT pixel units. Odd-numbered rows of the TFT pixel units are connected to the first data line, and even-numbered rows of the TFT pixel units are connected to the second data line. The first and the second data lines are connected to one source driving chip set up in the source driver through a first switch unit and a second switch unit respectively. The driving circuit can reduce power consumption of the LCD panel, decline of number of source driving chips applied, and reduce production cost. |
| US09230493B2 |
LCD device driver circuit, driving method, and LCD device
A driver circuit of a liquid crystal display (LCD) device includes a drive line driving a lightbar of the LCD device. A discharge module and a switch module are in series connection between the drive line and a ground end of the LCD device driver circuit in sequence; a starting signal sent by the LCD device is coupled to the switch module. When the starting signal is an OFF signal, the switch module is turned on, and when the starting signal is an ON signal, the switch module is turned off. |
| US09230492B2 |
Methods for driving electro-optic displays
An electro-optic display uses first and second drive schemes differing from each other, for example a slow gray scale drive scheme and a fast monochrome drive scheme. The display is first driven to a pre-determined transition image using the first drive scheme, then driven to a second image, different from the transition image, using the second drive scheme. The display is thereafter driven to the same transition image using the second drive scheme; and from then to a third image, different from both the transition image and the second image, using the first drive scheme. |
| US09230488B2 |
Method of driving display device
A method of driving a display device includes displaying an image corresponding to a left eye image signal during a first frame set including one or more frames and displaying an image corresponding to a right eye image signal during a second frame set including one or more successive frames, in which the first frame set and the second frame set include at least one frame displaying a first image according to a first gamma curve and at least one frame displaying a second image according to a second gamma curve, and the first frame set and the second frame set include two successive frames displaying the second image. |
| US09230474B2 |
Array testing method and device
A method for testing an array, by using an array testing device for detecting a voltage distribution formed on an array substrate, includes resetting pixel voltages of a plurality of pixel circuits formed on the array substrate with a predetermined voltage, detecting the voltage distribution of the array substrate, generating a correction value for correcting the voltage distribution of the array substrate, and measuring a threshold voltage of a driving transistor included in the plurality of pixel circuits formed on the array substrate by applying the correction value. |
| US09230472B2 |
Organic light emitting display and degradation compensation method thereof
An organic light emitting display includes a display panel including pixels, a degradation sensing circuit which senses a threshold voltage of organic light emitting diodes included in the pixels and calculates an average degradation value defined by an average luminance value due to the degradation based on the sensed threshold voltage, a compensation target adjustor which adjusts a compensation target based on the average degradation value, each time the average degradation value is reduced by a previously determined reference value, and a data modulator which adds and subtracts a luminance compensation value determined depending on the adjusted compensation target to and from digital video data and modulates the digital video data. |
| US09230469B2 |
Display device using plural gamma curves and driving method thereof
A display device and a driving method is disclosed. The driving method includes receiving an image signal for one frame for one pixel, converting the image signal into at least two data voltages according to at least two gamma curves, applying a first gate signal and a second gate signal to a plurality of gate lines respectively connected to a plurality of subpixels included in one pixel during the frame. The method further includes applying the at least two data voltages to the plurality of subpixels during the frame. A gamma curve for the data voltage applied to one subpixel among the plurality of subpixels includes the at least two different gamma curves and is changed with a period of a first time. |
| US09230467B2 |
Display module and assembly method thereof
A display module and an assembly method thereof are provided. The display module includes a display region, at least one connection terminal, and a plurality of connective lines. The display region, the connection terminal, and the connective lines are disposed on a same flexible substrate. A plurality of pixels is arranged within the display region. The connection terminal is arranged at an extension portion of a non-display region of the flexible substrate. The connective lines respectively connect the pixels in the display region to the connection terminal at the extension portion. The connection terminal is connected to an external circuit for receiving signals and transmitting the same to the display region. |
| US09230465B2 |
Stereoscopic display apparatus and adjustment method
A 3D display system for displaying a 3D image includes a tracking unit, a pixel panel, a grating array, and a control unit. The tracking unit is configured to determine a spatial position of a viewer of the 3D display system. The pixel panel contains alternatingly arranged display units from two or more view images of the 3D image, and the grating array is coupled to the pixel panel to separate light from the view images from the pixel panel. The control unit is configured to adjust certain parameters of the grating array such that a maximum width of horizontal projection of edges of adjacent display units through the grating array is less than or equal to a inner-eye distance, and a minimum width of horizontal projection of two edges of a single display unit through the grating array is greater than or equal to an outer-eye distance. |
| US09230464B2 |
Method of driving shutter glasses and display system for performing the same
A method of driving shutter glasses of a display system includes generating a display panel driving signal which drives a display panel of the display system, where the display panel displays a left image and a right image, generating a second three-dimensional (“3D”) synchronizing signal based on a first 3D synchronizing signal and the display panel driving signal, generating a third 3D synchronizing signal by adjusting an intensity of the second 3D synchronizing signal, generating a shutter control signal, which controls a left shutter and a right shutter of the shutter glasses, based on the third 3D synchronizing signal, and outputting the shutter control signal to the shutter glasses. |
| US09230459B2 |
Ambience reflective display frame
An information handling system display frame disposed at the periphery of a display blends display and ambient light to provide a transitional zone for viewing of the display in ambient lighting conditions. A semi-scattering material absorbs light from the display and the ambient environment and scatters the light through the frame. A semi-reflective material directs at least some of the scattered light out of the frame so provide an appearance of the frame that transitions between displayed visual images of the display and the ambient light environment. |
| US09230456B2 |
Device and system for differentiating specific lead wires in a multi-wire environment
An identification system includes a clamshell device that grasps a wire, and a clip that secures the clamshell device in a locked and closed position. The clamshell and/or clip are preferably color-coded to differentiate one wire from another, hereby allowing a technician to easily discern which wire is plugged into which port, and which wire is connected to which patient. The invention is particularly well suited for incorporation with healthcare devices and machines which have long lead wires that reach from the patient to the machine, such as electrical stimulation machines. |
| US09230455B2 |
Steganographic embedding of executable code
A method for digital immunity includes identifying a call graph of an executable entity, and mapping nodes of the call graph to a cipher table of obscured information, such that each node based on invariants in the executable entity. A cipher table maintains associations between the invariants and the obscured information. Construction of an obscured information item, such as a executable set of instructions or a program, involves extracting, from the cipher table, ordered portions of the obscured information, in which the ordered portions have a sequence based on the ordering of the invariants, and ensuring that the obscured information matches a predetermined ordering corresponding to acceptable operation, such as by execution of the instructions represented by the obscured information, or steganographic target program (to distinguish from the executable entity being evaluated). The unmodified nature of the executable entity is assured by successful execution of the steganographic target program. |
| US09230453B2 |
Open-ditch pipeline as-built process
Imaging, attribution, and 3D modeling of utility pipelines and other assets is accomplished through the processing of terrestrial photogrammetric, aerial photogrammetric, and/or 3D LiDAR scanning measurements, all of which may be augmented by an Inertial Measurement Unit. These measurements are spatially controlled by photo-identifiable targets whose positions are established by real-time or post-processed GPS measurements which, in turn, determine the relative and absolute positions of the resulting 3D model. The necessary attribute information is available the moment an optically readable code is affixed to the asset. All proposed data collection methods provide imagery and point clouds systematically. It is therefore possible to read the attributes encoded in the optically readable code directly from the imagery or point cloud. Both the attributes of the feature and the position of the encoded attributes on the feature are captured. The information unique to each joint of pipe is attached to that joint positionally. |
| US09230447B2 |
Method of recording a motion for robotic playback
A method of recording the motion of a physical object moved under human control is described that allows repeated replay of the exact motion using a robot to cause the motion of the object to occur in such a way as to allow a human student to interact with the object and experience the fundamental movements required to reproduce the motion consistently, thereby enhancing motor learning. |
| US09230442B2 |
Systems and methods for adaptive vehicle sensing systems
An adaptive sensing system is configured to acquire sensor data pertaining to objects in the vicinity of a land vehicle. The adaptive sensing system may be configured to identify objects that are at least partially obscured by other objects and, in response, the adaptive sensing system may be configured to modify the configuration of one or more sensors to obtain additional information pertaining to the obscured objects. The adaptive sensing system may comprise and/or be communicatively coupled to a collision detection module, which may use the sensor data acquired by the adaptive sensing system to detect potential collisions. |
| US09230439B2 |
Method and system for monitoring interactions with a vehicle
A method and system for monitoring interactions with a vehicle are disclosed, the method comprising associating a mobile device of a user allowed for operating the vehicle with a device capable of providing an indication of a position of the vehicle; obtaining position data from the device capable of providing an indication of a position of the vehicle; obtaining position data from the mobile device associated with the device; comparing the obtained position data from the device with the obtained position data from the mobile device and using the comparison of the position data of the device with the position data of the mobile device to thereby monitor interactions with the vehicle. |
| US09230436B2 |
Dynamic location referencing segment aggregation
In one embodiment, road segments are aggregated for DLR. A plurality of connected road segments and corresponding traffic information for each of the connected road segments are identified. A processor aggregates the connected road segments into a fewer number of dynamic location reference (DLR) segments than the plurality. By testing different possible combinations, road segments with similar congestion are grouped. The processor calculates a traffic value for each of the DLR segments. Each traffic value is a function of the traffic information for the connected road segments of the respective DLR segment. An indicator of the aggregated DLR segment and the traffic value for at least one of the DLR segments is output. |
| US09230435B2 |
Driver controllable traffic signal
Traffic at an intersection, or other portion of a road, is detected, and the stop/go traffic signal apparatus at the intersection, or other portion is controlled based on vehicle types in the detected traffic. A vehicle type may be determined based on information collected by that vehicle's onboard telematics unit, or with a user's device in communication therewith. An input may be received from a user device, onboard the vehicle, to request changing the current stop/go configuration of the traffic signal. The request may be processed based on the determined vehicle type to determine whether or not to change the traffic signal in response to the request. The request may be accompanied by an offer of money, and if the request is not granted, the user device may forward another request associated with a different offer. |
| US09230432B2 |
System and method for determining arterial roadway throughput
Systems and methods for calculating the health of an intersection, including lane-level impacts, using traffic data obtained from the intersection. |
| US09230430B2 |
Detecting removal of wearable authentication device
A wearable device is disclosed that, while being worn by a user, may allow a user to authenticate to a second device such as a smartphone without having to enter an unlock code such as a personal identification number. The wearable device may detect when the user removes it. Removal of the wearable device may cause it to be disabled and prevent it from being used to authenticate a subsequent user to the second device until it is re-enabled. |
| US09230428B2 |
Field device of process automation
A field device of process automation technology having an interface for output of an electrical current signal and a specifying unit, which provides a value, on which depends an electrical current signal to be output via the interface. A first controllable electrical current sink and a second controllable electrical current sink are provided. The first controllable electrical current sink and the second controllable electrical current sink are settable to predeterminable electrical current levels, and that the first controllable electrical current sink and the second controllable electrical current sink are connected with the interface in such a manner that the electrical current signal which at the interface essentially depends on the lower of the predeterminable electrical current levels, to which the first controllable electrical current sink and the second controllable electrical current sink are set. |
| US09230424B1 |
Doorbell communities
Doorbells can send data to each other to enable a first doorbell user to warn a second doorbell user regarding a suspicious visitor. A first user can indicate a first trait of a visitor via a first remote computing device. The first user can create a user group to enable the members of the user group to use their doorbells to take pictures of suspicious visitors and to send the pictures of the suspicious visitors to other members of the user group. |
| US09230423B2 |
Drinking reminder apparatus and method
A drinking reminder method is implemented by an electronic apparatus. The apparatus includes a scale pan, a weight sensor, an analog/digital (A/D) converter, a display screen and a keypad. The keypad includes a power key, a reset key and a switching key. The weight sensor senses an analog pressure signal when a cup filled with water is placed on the scale pan, and the A/D converter converts the analog pressure signal to a digital weight signal. A total weight of the cup filled with water is measured according to the digital weight signal, and a cumulative water intake volume and a water shortage volume of a user. The display screen displays the cumulative water intake volume and the water shortage volume to remind the user to drink water. |
| US09230418B2 |
Portable device
A portable device includes a case having wall portions, a battery arranged within the case, and a polymer membrane arranged between at least one of the wall portions and the battery. The polymer membrane couples the battery to the at least one of the wall portions. The polymer membrane has a property of elastically changing at least one of the thickness and the length in a planar direction by being deformed in response to voltage application and restoring its original shape in response to the stoppage of the voltage application. The battery is caused to reciprocate by applying a voltage that changes periodically to the polymer membrane. |
| US09230416B2 |
Communication devices including a sensor configured to detect physical input
Communication devices are disclosed. In an example embodiment, a communication device may include a communication module including an illumination source and a body element. The body element may be configured to allow illumination generated by the illumination source to propagate within and illuminate at least a portion of an outer surface of the body element. |
| US09230414B2 |
Automated banking machine with audio jack
In accordance with an example embodiment, there is disclosed herein an externally accessible headphone jack that is suitable for use with an automated banking machine such as an ATM. The headphone jack is configured to be releasably, electrically connectable to portable audio output devices. The headphone jack includes an opening external of the machine that is configured to receive electrical connector plugs therein. A jack housing is located within the automated banking machine, wherein the jack housing extends below the opening and bounds an interior area, wherein the interior area houses at least one electrical contact configured for releasable electrical connection with electrical connector plugs. The jack housing includes a drain opening therein below the at least one electrical contact that is configured to drain water from the interior area of the jack housing. |
| US09230411B2 |
Gaming machine having an enhanced game play scheme
A gaming machine having an enhanced game play scheme is provided where, in response to receipt of a second wager to select an option, a player is provided with enhanced game play. Enhanced game play may include (1) providing more frequent bonus game play, (2) providing a larger bonus game value payout, (3) providing more frequent bonus game play and providing a larger bonus game value payout, (4) providing a larger or multiplied game value payout, (5) providing a guaranteed value payout for a non-winning outcome, (6) providing game features (7) providing a larger game value payout based on a partial game outcome, (8) providing an extra wild symbol capable of repositioning, and (9) providing a possibility of an additional reel movement to reposition an extra reel symbol or (10) providing a possibility of an extra pay line to include an extra reel symbol to increase a value payout. |
| US09230409B2 |
Electronic gaming device with quasi-persistent synchronized reel games
Examples disclosed herein relate to systems and methods, which may receive wagers on one or more paylines. The systems and methods may initiate one or more quasi-persistent synchronized reel structures. The systems and methods may determine one or more replacement symbols for the one or more symbols of the plurality of primary game symbols. The systems and methods may determine one or more payouts based on the additional gaming functionality. The systems and methods may display one or more presentations based on the additional gaming functionality. |
| US09230408B2 |
Method of gaming, a game controller and a gaming system
A method of gaming comprising: (a) defining a target outcome to be achieved in respect of a game, the target outcome having an associated award; (b) allocating a number of game rounds to achieve the target outcome; (c) conducting the allocated game rounds, each of which can result in a contribution to the target outcome; (d) accumulating any contributions during the one or game rounds; and (e) making the associated award if the target outcome is achieved based on the accumulated contributions before the allocated game rounds are exhausted. |
| US09230405B2 |
Gaming system, gaming device, and method providing poker game with awards based on odds of winning
A gaming device includes a poker game where two cards are dealt face-up to at least one player and to a dealer. The gaming device enables the player to place an optional wager based on the initially dealt two card hand. A pay out for the optional wager is determined based on the probability that the final player hand will outrank the final dealer hand. The pay out is inversely proportional to the probability that the player will win. Therefore, if the player has a high probability of winning, the associated pay out will be relatively small. Also, if the player has a low probability of winning, the associated pay out will be relatively large. The gaming device enables the player to place multiple wagers after each of a plurality of community cards are dealt, where the associated pay out changes according to a revised probability of winning. |
| US09230404B2 |
Side betting for enriched game play environment (single and/or multiplayer) for casino applications
Systems for making a side bet in a hybrid game having a gambling game portion and an entertainment game portion are provided. The side bet is made in regards to the play of the entertainment portion of the hybrid game and can be made using a real world credit, a game world credit or a game world element. If the side bet is made using a real world credit, the real world credits used by the gambling game portion of the hybrid game and credited to a player are incremented or decremented. If the side bet is made using a game world element, the entertainment game portion of the hybrid game is updated based on the outcome of the side bet. |
| US09230402B2 |
Partial pay progressives
A progressive jackpot system includes a progressive jackpot system controller, and a plurality of gaming machines coupled to the progressive jackpot system controller and participating in a progressive jackpot game in which a progressive jackpot is awarded in response to a triggering event at one of the gaming machines. A method of operating the progressive jackpot system includes maintaining data in the progressive jackpot system controller representing a composite progressive jackpot pool comprising a predetermined base component, and an incremental component funded by a portion of wagers made at the gaming machines. A message is sent from the gaming machine to the progressive jackpot system controller in response to the occurrence of a triggering event on the gaming machine. The message indicates that the triggering event has occurred and includes data representing a desired proportion of the progressive jackpot pool to award to the player. The progressive jackpot system controller calculates a composite progressive jackpot award for the player based on the desired progressive jackpot proportion. The composite progressive jackpot award comprises a first component funded from the predetermined base component of the progressive jackpot poll, and a second component funded from the incremental component of the progressive jackpot pool. A message is sent from the progressive jackpot system controller to the gaming machine indicating the amount of the progressive jackpot award for the player. The progressive jackpot system controller replenishes the base component of the progressive jackpot pool to the predetermined amount. |
| US09230401B2 |
Methods and apparatus for slot machine games
A slot machine includes an option in which the probability of an outcome is influenced by changing the probability of one or more symbols occurring on one or more reels (reel 1, reel 2, . . . ) by randomly or pseudo-randomly selecting reels from a set of two or more reels. The probability can be adjusted by changing, adding or subtracting symbols on a reel strip. |
| US09230398B2 |
Wide area table gaming system
An electronic gaming table adapted to host table games involving wagers includes a physical surface adapted for the play of live table games that include live players and the use of a live dealer and physical game components, multiple player terminals having separate processors, a master table controller in communication with each of the player terminal processors and adapted to control a plurality of electronic gaming table functions, and at least one interface in communication with the master table controller and one or more additional electronic gaming tables remotely located from the electronic gaming table. Each player terminal allows for a live player stationed thereat to participate in a first live table game directly at the electronic gaming table and also a second live table game remotely at a remotely located table. The first and second live table games can be different games, and can be played simultaneously. |
| US09230393B1 |
Method and system for advancing through a sequence of items using a touch-sensitive component
An electronic device includes a touch-sensitive component and a display that presents a sequence of content item. A user may scroll through the sequence by applying a touch input that continuously moves across at least two thresholds. So long as the input stroke remains uninterrupted, the display will advance through the sequence each time the stroke crosses one of the two thresholds. |
| US09230392B2 |
Gaming machine
A gaming machine comprising, a main circuit comprising a main processor and a main memory, the main memory storing program code that allows a player of the gaming machine to play the at least one game when executed by the main processor, the program code including authentication code that, when executed, causes the main processor to output challenge data and modify game play if valid response data is not received, and an auxiliary circuit in data communication with the main processor and comprising an auxiliary processor configured to process challenge data received from the main processor in order to output valid response data to the main processor. |
| US09230391B2 |
Product delivery device
A product delivery device includes a receiving tray. The receiving tray includes a bottom plate, a pushing plate, and a shielding plate. The pushing plate is toward the shielding plate, and the shielding plate is rotatably attached to the bottom plate. A product exit is defined in the bottom plate and is covered by the shielding plate. The pushing plate pushes a product onto the shielding plate. The shielding plate rotates to allow the product to drop out of the receiving tray via the product exit. |
| US09230379B2 |
Communication of automatically generated shopping list to vehicles and associated devices
Methods and systems for an improved navigation environment are provided. The navigation system can route users to preferred locations based on user profile data and past experience with the present driver and other drivers. The system provides more cost-effective and time-sensitive routing by incorporating other information about destinations. Further, the navigation system provides enhanced guidance in foreign or unfamiliar locations by incorporating experience from other drivers and other data. |
| US09230378B2 |
System and method for causing garage door opener to open garage door using an environmental sensor
A system and a method for causing a garage door to open using a garage door opener having a wireless receiver is provided. The system comprises an interface coupled to an environment sensor and configured to receive data from the environment sensor. The system can include processing electronics coupled to the interface and configured to receive the data from the interface and to use the received data to determine whether an environmental condition exists. The processing electronics provide a command to cause the garage door opener to open the garage door based on the determination of whether the environmental condition exists. |
| US09230377B2 |
Mobile device security
Systems and methods for providing mobile device security are disclosed. In some implementations, a request for access to a security mechanism is received at a user terminal. A short-range radio connection of the user terminal at a time of receiving the request for access is identified responsive to the request. A memory of the user terminal is accessed to determine whether the identified short-range radio connection corresponds to a user-identified secure radio connection. Upon determining that the radio connection corresponds to the user-identified secure radio connection, the user is granted access to the security mechanism without soliciting the user of the user terminal for a predetermined security input. Upon determining that the radio connection does not correspond to the user-identified secure radio connection, the user is solicited for the predetermined security input. |
| US09230376B2 |
Image forming apparatus, image forming system, and computer program product
An image forming apparatus includes: an acquisition unit that acquires visitor information regarding a visitor and notification destination information indicating a destination of notification to a visitor-receiving person who is to receive the visitor; an issuance unit that, based on the visitor information acquired by the acquisition unit, issues a permit indicating that the visitor is allowed to enter; and a notification unit that notifies the destination of notification indicated by the notification destination information acquired by the acquisition unit that the visitor has arrived. |
| US09230375B2 |
Physical access control
A system and method are disclosed for controlling physical access through a digital certificate validation process that works with standard certificate formats and that enables a certifying authority (CA) to prove the validity status of each certificate C at any time interval (e.g., every day, hour, or minute) starting with C's issue date, D1. C's time granularity may be specified within the certificate itself, unless it is the same for all certificates. For example, all certificates may have a one-day granularity with each certificate expires 365 days after issuance. Given certain initial inputs provided by the CA, a one-way hash function is utilized to compute values of a specified byte size that are included on the digital certificate and to compute other values that are kept secret and used in the validation process. |
| US09230370B2 |
Method and system for determining a status of at least one machine and computer readable storage medium storing the method
A method for determining a status of at least one machine includes the following steps: a processing unit is utilized to receive and record spindle load values of the spindle in a period of time to generate a spindle load record of the spindle, and to determine if a preset condition is matched according to the spindle load record. When the preset condition is matched, the processing unit is utilized to determine a present category corresponding to the spindle load record of the spindle, and to obtain parameter-to-be-collected information corresponding to the present category. The processing unit is utilized to obtain at least one value of at least one collected parameter of the at least one machine according to the parameter-to-be-collected information corresponding to the present category, and to determine a status of the at least one machine according to the obtained value of the at least one collected parameter. |
| US09230368B2 |
Hologram anchoring and dynamic positioning
A system and method are disclosed for displaying virtual objects in a mixed reality environment in a way that is optimal and most comfortable for a user to interact with the virtual objects. When a user is moving through the mixed reality environment, the virtual objects may remain world-locked, so that the user can move around and explore the virtual objects from different perspectives. When the user is motionless in the mixed reality environment, the virtual objects may rotate to face the user so that the user can easily view and interact with the virtual objects. |
| US09230367B2 |
Augmented reality personalization
A method is provided, such as for mobile augmented reality personalization. A front-facing camera of the mobile device acquires a first view of a user of the mobile device. A personal characteristic of the user of the mobile device is identified from the first view. A location of the mobile device may be determined. A back-facing camera of the mobile device may acquire a second view of a region at the location. Augmented reality information is selected as a function of the personal characteristic. A second view is displayed with the augmented reality information. |
| US09230365B2 |
Touring in a geographic information system
The present invention relates to navigating in a geographic information system. In an embodiment, a method tours geographic information in a geographic information system. A set of actions for a tour is received. Each action includes a tour time. A tour time of at least one of the actions is defined by a user. Each action in the set of actions is executed to tour geographic information in the geographic information system. |
| US09230363B2 |
System, method, and computer program product for using compression with programmable sample locations
A system, method, and computer program product enable compression with programmable sample locations, where the compression is a function of the programmable sample locations. The method includes the steps of storing a first value specifying a programmed sample location within a pixel in a first sample pattern table that is associated with a first display surface and storing, in a memory, geometric surface parameters corresponding to a first attribute at the programmed sample location within a first pixel of the first display surface. A second value specifying the programmed sample location within the pixel in a second sample pattern table that is associated with a second display surface is also stored and the first attribute is reconstructed based on the geometric surface parameters and the first value. |
| US09230359B2 |
Method for resizing an image
A method for resizing an image is disclosed. In a preferred embodiment, the method projects the image onto a lateral surface of a three-dimensional cylinder to transform the image into a three-dimensional image. Then, the method applies perspective projection (with a chosen viewpoint) to transform the three-dimensional image back to a two-dimensional image, based on which a final resized image is generated. By carefully choosing the diameter of the three-dimensional cylinder and the coordinate of the viewpoint, a rectangular shaped image may be resized into a square-shaped image. |
| US09230354B2 |
System and method for molecular breast imaging energy spectrum imaging and analysis
A system and method is provided for imaging a region of interest (“ROI”) including a breast having received a reduced dose of radionuclide using an imaging system including at least two gamma detectors. The acquired imaging data is analyzed respect to an energy characteristic and divided into subsets of data based on the analysis. A plurality of images is generated using the subsets of data, wherein the plurality of images include a primary image corresponding to subsets of data having energy including the energy characteristic and multiple secondary images corresponding to subsets of data having energy not including the energy characteristic. Each of the plurality of images is processed using energy information associated with each of the plurality of images and the processed plurality of images is combined to form a composite image of the ROI. |
| US09230347B2 |
Transparency-based image processing method, device, and terminal
The present disclosure discloses a transparency-based image processing method, device, and terminal. The method includes steps of: acquiring first simulated pixel information representing a first pixel, and acquiring first transparency information; acquiring second simulated pixel information representing a second pixel, and acquiring second transparency information; calculating third simulated pixel information representing a third pixel as a sum of a product of the first simulated pixel information times the first transparency information and a product of the second simulated pixel information times the second transparency information; and acquiring a third actual pixel by narrowing the third simulated pixel information. Compared with an existing fixed-point-number method, the present disclosure reduces prior six integer multiplications and three integer additions to two integer multiplications and one integer addition, such that efficiency in operating the method may be enhanced; compared with an existing method by looking up a table, the transparency-based image processing method provided by the present disclosure does not require traversing any 2D-array table or occupying more memory. |
| US09230346B2 |
Programmable gamma circuit for gamma correction
A programmable gamma circuit for gamma correction is disclosed. The programmable gamma circuit includes a string digital-to-analog converter, a first operational amplifier, and an output resistor string. The string digital-to-analog converter selects an analog voltage from a plurality of candidate voltages according to a digital reference code. An output terminal of the first operational amplifier outputs a first output voltage. A positive input terminal of the first operational amplifier is electrically connected to the string digital-to-analog converter for receiving the analog voltage. The output resistor string is divided into a first resistor part and a second resistor part by a connection terminal which is electrically connected to a negative input terminal of the first operational amplifier, and a resistance of the first resistor part is a multiple of a resistance of the second resistor part. |
| US09230337B2 |
Analysis of the digital image of the internal surface of a tyre and processing of false measurement points
A method for processing an image of a surface of a tire under inspection is described. A three-dimensional digital image of the surface is captured and, for each point of the captured image, a grey-level value corresponding to an elevation is assigned to the point. Utilizing a first morphological operator that uses a rectangular key element, a closure-type first transformation of the image of the surface is carried out. Utilizing a second morphological operator that uses a rectangular key element, an opening-type second transformation of the surface is carried out. For each point of the image, a grey-level value equal to a minimum value between a grey-level value at that point obtained in a preceding step and a grey-level value at that point is assigned, so as to eliminate false measurement points. |
| US09230335B2 |
Video-assisted target location
A method for locating features in a field of view of an imaging sensor that includes receiving image data from the field of view of an imaging sensor, wherein the image data includes a plurality of image frames. The method also includes receiving three-dimensional position measurements, in an absolute coordinate system, for the imaging sensor at the point in time each image frame is acquired and identifying one or more features in each of the image frames. The method also includes determining position and velocity of the one or more features in the image frames based on changes to the one or more features between the image frames and determining three-dimensional positions of the one or more features in the image frames based on the received three-dimensional position measurements for the imaging sensor and position and velocity of the one or more features in the image frames. |
| US09230329B2 |
Method, computer program and apparatus for determining a gripping location
According to one aspect of the invention, there is provided a method comprising: obtaining at least one image comprising at least one object; analyzing the at least one image to determine at least one gripping location to grip an object; selecting a gripping location from the at least one gripping location based on a predetermined criterion; and issuing at least one instruction to a gripper to grip the object at the selected gripping location. |
| US09230324B2 |
Serialization of single use endoscopes
A system, device and method for serializing and authorizing a single use imaging device are provided. In one embodiment, the invention provides a single use imaging device comprising a memory having a stored code that includes a unique serial identifier. In another embodiment, the invention provides a system for authorizing a single use imaging device comprising a single use imaging device with an image of a verification object that includes a serial identifier uniquely associated with the device, a control unit capable of electronically receiving the verification object image, a decoder capable of extracting a serial identifier from the verification object image, a database of authorized serial identifiers, and means for determining if the single use imaging device is authorized. |
| US09230313B2 |
Feature extraction method, object classification method, object identification method, feature extraction device, object classification device, object identification device, feature extraction/object classification/object identification program, and recording medium on which the program is recorded
Provided is a feature extraction that extracts a feature that represents a characteristic of a subject, the feature being extracted from an image that has imaged the subject, the feature being extracted without relation to the shape of the subject. The feature extraction extracts the feature from the image of the subject, the subject having been imaged by an imaging means. |
| US09230312B2 |
Methods and apparatus for performing tone mapping on high dynamic range images
Methods, apparatus, and computer-readable storage media for tone mapping High Dynamic Range (HDR) images. The HDR image is separated into luminance and color. Luminance is processed according to the parameters to obtain a base layer and a detail layer. The base layer is compressed into a lower dynamic range and the detail layer is adjusted according to the parameters. The compressed base layer, the detail layer, and the color component may be output as separate layers, and various image processing tools and techniques may be applied to the component layers separately to modify the layer(s). One or more tone-mapped images may be generated by merging the modified layers. Thus, each layer of the tone-mapped image may be processed separately using various image processing tools or techniques to modify the output of the tone mapping technique in a wide variety of ways. |
| US09230310B2 |
Imaging systems and methods for location-specific image flare mitigation
An imaging system may include a camera module with an image sensor having an array of image sensor pixels and one or more lenses that focus light onto the array. The system may include processing circuitry configured to mitigate flare artifacts in image data captured using the array based on at least one image flare map. The image flare map may identify a portion of the captured image data on which to perform image flare mitigation operations. The processing circuitry may perform image flare mitigation operations such as pixel value desaturation on the identified portion of the captured image data without desaturating portions of the image data that do not include flare artifacts. The flare map may be generated using a calibration system that characterizes the location, intensity, and color of all possible image flare artifacts that may be generated by the imaging system during normal imaging operations. |
| US09230307B2 |
Image processing apparatus and method for generating a high resolution image
To generate a high resolution image of higher quality depending on a target area. An image processing apparatus includes a blur amount estimating unit configured to estimate a blur amount in a set target area in each of images indicated by a plurality of low resolution image data, and a reference image selecting unit configured to select a low resolution image to be a reference for generating the high resolution image depending on the estimated blur amount. |
| US09230306B2 |
System for reducing depth of field with digital image processing
An electronic device may have a camera module. The camera module may capture images having an initial depth of field. The electronic device may receive user input selecting a focal plane and an effective f-stop for use in producing a modified image with a reduced depth of field. The electronic device may include image processing circuitry that selectively blurs various regions of a captured image, with each region being blurred to an amount that varies with distance to the user selected focal plane and in response to the user selected effective f-stop (e.g., a user selected level of depth of field). |
| US09230305B2 |
Summed area computation using ripmap of partial sums
Methods are provided to perform area summation of various subsections of data values in a regular input array of one or several dimensions and varying sizes. The summation is achieved by adding up values from a ripmap of partial sums, where the partial sums are computed from the input array using a binary reduction method. According to such embodiments, the generation of the ripmap of partial sums will employ several binary reduction stages. Within each stage, a reduction operator is used that adds two elements along the respective direction. This is repeated until the output is only one element wide in the respective direction. The addresses of partial sums in the ripmap may subsequently be computed using a binary analysis of the target subsections in order to choose those partial sum values for a desired area that results in the desired area sum using an optimal number of data fetches. |
| US09230304B2 |
Apparatus and method for enhancing image using color channel
Provided are an apparatus and method for enhancing an image using a color channel. A pre-processing unit generates an inverted image by inverting a luminance component estimated from a red (R) channel among color channels of a red, green, and blue (RGB) color space of an input image. A channel merging unit generates a merged luminance (L) channel by merging an L channel of an International Commission on Illumination (CIE) L*a*b* (CIELab) color space of the input image and the inverted image. A contrast enhancement unit enhances contrast by expanding a histogram of the merged L channel. A color restoration unit combines the merged L channel whose contrast has been enhanced and chromaticity components of the input image, and converts a resultant color image to the RGB color space, thereby generating a restored image. |
| US09230292B2 |
Providing on-demand services through use of portable computing devices
A method for requesting an on-demand service on a computing device is provided. One or more processors determine the current location of the computing device. A multistate selection feature of a plurality of service options for providing the on-demand service is presented on the display of the computing device. The multistate selection feature enables a user to select a service option that is available within a region that includes the current location to provide the on-demand service. In response to the user selecting one of the plurality of service options, a summary user interface is presented on the display to provide region-specific information about the on-demand service based on the selected service option. |
| US09230291B2 |
Load reduction based on percentage change in energy price
A thermostatic controller generally includes a transceiver configured to receive a signal that includes an energy price rate for a given time period, and an electronic memory device in which one or more energy price rates received by the transceiver are stored. A microprocessor is configured to select the lowest energy price rate received within a given time period for establishing a base energy price rate; determine if the energy price rate for a present time period exceeds the base energy price rate by more than a first percentage or multiplier factor of the base energy price rate; and respond to an energy price rate that exceeds the base energy price rate by more than the first percentage or multiplier factor by transmitting a signal via the transceiver to an energy consuming appliance indicating that the energy consuming appliance should be in an off state and/or to one or more ceiling fans to activate, deactivate and/or change speed of the one or more ceiling fans. |
| US09230289B2 |
Method for estimating power outages and restoration during natural and man-made events
A method of modeling electric supply and demand with a data processor in combination with a recordable medium, and for estimating spatial distribution of electric power outages and affected populations. A geographic area is divided into cells to form a matrix. Within the matrix, supply cells are identified as containing electric substations and demand cells are identified as including electricity customers. Demand cells of the matrix are associated with the supply cells as a function of the capacity of each of the supply cells and the proximity and/or electricity demand of each of the demand cells. The method includes estimating a power outage by applying disaster event prediction information to the matrix, and estimating power restoration using the supply and demand cell information of the matrix and standardized and historical restoration information. |
| US09230288B2 |
User-specific event popularity map
Information can be provided in a convenient manner to help a user decide what events to attend. The information can include information regarding a popularity of the events. The popularity of the events can be based upon the number of people expected to attend, the number of the user's friends expected to attend, and/or the number of people fitting user-defined criteria who are expected to attend. The events for a user-specified time period can be shown on a map along with information representing the popularity of the events. Thus, the user can choose to attend those events in the user's area which are more popular. The map can be displayed on a user device, such as a cellular telephone. In this manner, the user can more readily attend those particular events which the user is more likely to enjoy. |
| US09230282B2 |
Remote deposit capture system with check image generation and storage
A check image generator application generates a remote deposit capture RDC compatible check image. The RDC compatible check image is sent from a sender mobile device to a recipient mobile device. The RDC compatible check image may pass through a server and may be encrypted. The recipient mobile device receives the RDC compatible check image and forwards it to a financial institution for deposit. |
| US09230281B2 |
Transaction services reporting system
One or more devices within a transaction services hub collect session data of transaction services for multiple customers and provide a user interface with reporting options for transaction services associated with a particular customer. The user interface is accessible to a user device via a public network connection. The one or more devices receive a report request from a user account associated with the particular customer and retrieve, from the collected session data, data responsive to the report request. The one or more devices generate a report for the particular customer based on the report request and the data responsive to the report request. |
| US09230279B2 |
Systems and methods for recommending a retail location
A method and a system are disclosed for generating a recommendation of a retail location on a network-based system. For example, a system may obtain a retail location definition associated with a geographic location. The geographic location may represent the retail location. The system then builds a scan event model from product scan messages received from a plurality of scanning devices located within the geographic location. The scan event model may include one or more scan events each being associated with a product definition and the retail location definition. Next, a recommendation query from the search device is received by the system. The recommendation query may include a product identifier and a query location. The system may generate a recommendation of the retail location based on determining that the product identifier and the query location match the one or more scan events of the scan event model. |
| US09230276B2 |
Context-influenced application recommendations
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for recommending content based on context such as location. In one aspect, a method includes receiving data that references a location of a mobile device, selecting, from among multiple, different applications that are available in an online application marketplace, one or more of the applications that are relevant to the location, and providing, by a recommendation server, a recommendation to the mobile device, where the recommendation identifies the one or more applications as applications that the user is likely to be interested in purchasing or downloading. |
| US09230270B2 |
Method and system for displaying a cached web page advertisement after the completion of a browsing session
Presented is a method of displaying a web page advertisement on a computing device. A web page advertisement is segregated from content on the web page during a web browsing session. The web page advertisement is then cached on the computing device for display at a time later to the web browsing session. |
| US09230254B1 |
Credit card reader authenticator
A credit card reader is attached to a mobile device to process credit card transactions at the point of sale. A user of the credit card reader slides an authenticator card through the credit card reader to activate the credit card reader. Accordingly, the credit card reader may compare data stored in the authenticator card to an expected value for the data to determine whether the user is authorized to utilize the credit card reader. If there is a match, the credit card reader displays a unique password, known to the user, which the user can use to verify that the credit card reader is authentic. Further, if there is a match, the credit card reader may allow the user to process credit card transactions through the credit card reader. |
| US09230251B1 |
Cash deposit at point of sale using deposit product inventory item systems and methods
A system for receiving cash deposits at a point of sale includes a processor; a product inventory database; a communication interface; a product inventory item reader; and a purchase instrument reader. The processor is configured to receive a product code from the product inventory item reader; access the product inventory database to recognize the product code as a deposit product code; receive signals indicating an amount of a deposit associated with the deposit product code; receive signals from the purchase instrument reader identifying an account for the deposit; and send signals to a transaction processing network via the communication interface to thereby effect the deposit of the amount into the account. |
| US09230248B2 |
Physical-quantity receiving device and physical-quantity supplying device with payment receiving feature
A physical-quantity receiving device includes: a receiving section that receives a predetermined physical quantity from a physical-quantity supplying device; a notification section that provides a user with a notification that the user is under obligation to make payment for the received physical quantity; an input section that receives a user's input that indicates whether to receive the physical quantity; a display section that displays the notification from the notification section and the user's input to the input section; and a payment section that makes payment for the physical quantity per a unit time by electronic money after a lapse of the unit time, or makes payment for a unit physical quantity by electronic money after receipt of the unit physical quantity. |
| US09230243B2 |
Collaborative design using duplicated workspaces
A computer-implemented method includes storing data in a memory area such that the data is organized into a plurality of workspaces including a first workspace, creating a second workspace within the memory area, and copying at least a portion of the data from the first workspace into the second workspace. The method also includes enabling simultaneous editing of the first workspace and the second workspace, comparing the first workspace and the second workspace, and synchronizing the first workspace and the second workspace based on the comparison. |
| US09230241B1 |
Initiating a communication session based on an associated content item
This disclosure describes techniques in which one or more computing devices receive a signal from a first client computing device. The signal indicates that the first client computing device is available for participation in a communication session that enables communication between the first client computing device and one or more other client computing devices. The one or more computing devices determine a context for a topic of discussion associated with the communication session. The context is associated with a content item capable of being outputted by the first client computing device. Responsive to receiving the signal, the one or more computing devices initiate the communication session and send an invitation to at least one of the one or more other client computing devices to join the communication session. The invitation indicates the context of the communication session to at least one of the one or more other client computing devices. |
| US09230240B2 |
Contact relevance based on context
A method of determining a communications contact relevance for a user includes: analyzing stored contact information of a plurality of contacts with which the user can at least one of receive information from or transmit information to; analyzing context information relevant to likelihoods of imminent communication by the user with the contacts, the context information including information different from ones of the contacts with which the user most recently communicated, the context information further including present user context information and at least one of present context or historical context associated with each of the contacts, respectively; and determining the likelihoods of imminent communication between the user and the contacts based on the context information. |
| US09230237B2 |
Contract amendment mechanism in a virtual world
A method for amending a contract in a virtual world may include presenting an online chat option in response to another user's avatar coming within a predetermined proximity range of an avatar of the user and in response to the other user's avatar and the user's avatar having previously entered into a contract in the virtual world. The method may also include recording the online chat between the users to define an amendment to the contract in response to the online chat option being selected. The method may further include appending the amendment to contracting terms in a contract object in response to acceptance of the amendment by the users. |
| US09230236B2 |
Automated delivery vehicle, systems and methods for automated delivery
Provided are methods and systems for automated delivery using a delivery vehicle transported by a carrier vehicle. The automated delivery method comprises receiving, by a processing device, an order from a buyer. The order specifies one or more products to be delivered to the buyer and itinerary information. The processing device transmits the order to a placer robot. The placer robot positions the one or more products to a delivery vehicle. A carrier vehicle transports the delivery vehicle to a delivery destination based on the order. The carrier vehicle is driverless and lightweight and moves automatically. The carrier vehicle moves on a flat track using itinerary information of the order. |
| US09230231B1 |
Systems and methods for managing barcode information
The invention provides systems and methods for managing identifier labels for use in tracking one or more associated products in a supply chain. |
| US09230227B2 |
Pallet
A material handling apparatus including pallets developed to operate in radio frequency rich environments. Pallets are provided having at least one large compartment capable of enclosing at least one electronic device or a package populated with a plurality of devices. The devices include RFID pallet tags that communicate with RFID item tags and RFID beacon tags positioned within distributed RFID networks. The devices include sensors to monitor pallet conditions to which a pallet management system is responsive. The devices include wireless transceivers for communicating indicative information through LAN, WLAN and Cellular communications networks. An antenna array operating on different radio frequency signals is provided. The apparatus includes a power resource in order to facilitate long term autonomous operation. |
| US09230225B2 |
Product quality tracing to locate unsafe product material
A method and apparatus of tracing product quality to improve product safety. The method and apparatus can rapidly locate sources of product raw materials causing product quality safety incidents, which prevent further development of incidents and additional losses. The method is based on using a product production plan, and creating product raw material combinations corresponding to product batches and decision rules for determining sources of unqualified product raw materials. In response to when a product quality issue arises using the decision rules when producing products according to the product raw material combinations helps to quickly determine the sources of unqualified product raw materials and improves product quality safety. |
| US09230222B2 |
System and method enabling bi-translation for improved prescription accuracy
A system for bi-translation of speech and writing is provided. The system can comprise one or more electronic data processors contained within one or more computing devices. The system can also include a module configured to execute on the one or more electronic data processors in order to record a spoken and written segment into the one or more computing devices, where the segments can be corroborated by selecting potential medications and processes. The module can also be configured to convert the spoken segment into a stream of text or tokens and the written segment into a stream of text or tokens. Furthermore, the module can be configured to compare the converted spoken and written streams of text or tokens to determine whether the spoken segment and the written segment match and output the results. |
| US09230220B2 |
Situation-dependent libraries of affective response
Generating a situation-dependent library comprising a user's expected response to tokens representing stimuli that influence the user's affective state, including: receiving samples comprising temporal windows of token instances to which the user was exposed, wherein the token instances have overlapping instantiation periods and are spread over a long period of time that spans different situations; wherein at least one token is expected to elicit from the user a noticeably different affective response in the different situations; receiving target values corresponding to the temporal windows of token instances; the target values represent the user's responses to the token instances from the temporal windows of token instances; training a machine learning-based user response model using the samples and the corresponding target values; and analyzing the machine learning-based user response model to generate the situation-dependent library comprising the user's expected response to tokens, which accounts for the variations in the user's affective response in the different situations. |
| US09230213B2 |
Device and related method for scoring applications running on a network
A function is provided for effectively identifying computer applications running on a network. The function receives information related to frames of packets moving through the network. The information is compared to known information about computer applications. The known information is obtained from a plurality of mechanisms, including the option of obtaining it through custom mechanisms. The comparison information is scored for each of the plurality of mechanisms and those scores are combined to establish a single score indicative of the likely computer application associated with the received frames. One or more mathematical operations can be used to combine the scores. The mechanisms may be weighted for likely accuracy and the score that is established may include with it an indication of the level of confidence in that score. One or more of the plurality of mechanisms may be used to weight others of the types of mechanisms. |
| US09230207B2 |
RFID tag aerial with ultra-thin dual-frequency micro strip patch aerial array
The present invention relates to a RFID tag antenna with ultra-thin dual-frequency micro strip patch antenna array, the RFID tag antenna comprises an units array (1), a substrate (2) and a substrate base plate (3); the radiation units array (1) is configured to be asymmetrically distributed around a chip; a first radiation unit (5) and a third radiation unit (7) form a low-frequency resonant system of the RFID tag antenna (9), and a second radiation unit (6) and a fourth radiation unit (8) form a high-frequency resonant system of the RFID tag antenna (9), thereby achieving a dual-frequency effect, and enabling the RFID tag antenna of the present disclosure to be compatible with both of the working frequency bands in Europe and in U.S., and thus achieving a dual-frequency-band property. |
| US09230205B2 |
Image forming apparatus, non-transitory computer-readable recording medium storing an image forming program, and image forming method
An image forming device includes a residual paper amount detecting unit, a first execution unit and a second execution unit. The residual paper amount detecting unit is configured to detect a residual paper amount of a paper feeding cassette which retains papers. The first execution unit is configured to, if the number of papers required in executing an initially-inputted earliest job among a plurality of print jobs is more than the residual paper amount detected by the residual paper amount detecting unit, execute printing of a predetermined minimum number of printing papers in the earliest job. The second execution unit is configured to, after the printing of the minimum number of printing papers is executed by the first execution unit, execute one of the print jobs satisfying a predetermined priority condition. |
| US09230203B2 |
Control apparatus, control method, and storage medium
A control apparatus includes a display unit, a storing unit, a determining unit, and a notification unit. The display unit displays jobs. The storing unit stores attribute information of a sheet to be stored in sheet holding units. The determining unit determines, from among the jobs displayable on the display unit, a job where attribute information of a sheet to be used by the job does not correspond to the sheet attribute information stored in the storing unit. The notification unit notifies a user of the number of jobs determined by the determining unit. |
| US09230201B2 |
Computer system for manufacturing a physical medium configured to store data
A computer system which implements a method of manufacturing a physical medium configured to store data. The computer system includes a processor, a memory coupled to the processor, and a computer readable storage device coupled to the processor. The storage device contains program code which, upon being executed by the processor via the memory, implements the method. In accordance with the method, a layout design of visible information to be printed with visible ink in a book is generated, wherein the visible information including an article; and a layout design of invisible information to be printed with invisible ink in a book is generated, wherein the invisible information includes a Universal Resource Locator (URL) of an address of a web server at which additional information is located, the URL being encoded in a code within the invisible information, and the additional information being associated with the article. |
| US09230200B2 |
Method of processing graphics with limited memory
A method for combining layers of an image represented using an intermediate format receives at least two layers from the plurality of layers to be combined and estimates resources required to combine the received layers using a first combining operation. The first combining operation comprises at least rasterizing data of the received layers. The method attempts to combine the received layers using a second combining operation to produce an output in the intermediate format. In response, the method generates a combined layer for the image by combining the received layers in accordance with a selected one of the first combining operation (merge & flatten) and the second combining operation (merge). The selected combining operation is based on success of the attempt. Desirably the method is performed within a printer apparatus where limited memory and/or computing resources are available for image rendering which could otherwise limit the rendering of complex pages. |
| US09230198B2 |
Inkjet printer
A printer includes a recording head that ejects ink toward a recording medium, a first driving mechanism that moves the recording head in main scanning directions; a second driving mechanism that moves the recording head and the recording medium with respect to each other in sub scanning directions perpendicular to the main scanning directions; an input device that allows a user to input thereto printing information about printing time and image quality; and a control device that controls the recording head, the first driving mechanism and the second driving mechanism based on the printing information input to the input device. The printing information includes at least information about a pass number of the recording head. The input device allows the pass number to be changed continuously. |
| US09230196B2 |
Reuse of binary bitmaps generated for images in a print job
Systems and methods of reusing binary bitmaps for images appearing multiple times in a print job. In one embodiment, a system stores a binary bitmap for an image that appears in a print job. The system determines an offset of the binary bitmap into a sheetside, and calculates position values for the binary bitmap based on the offset of the binary bitmap. The system identifies a next appearance of the image in the print job, determines an offset of the image into a sheetside for the next appearance, and calculates position values for the next appearance of the image based on the offset of the image. The system determines if the position values for the image correspond with the position values for the binary bitmap, and verifies that the binary bitmap is reusable for the next appearance of the image if the position values correspond. |
| US09230195B2 |
Print head array
A printing apparatus including at least one print head array coupled to the printing apparatus, a servicing station configured to service the at least one print head array, and a print controller software coupled to computer readable medium and the print controller software configured to perform the steps of moving the at least one print head array to the servicing station when at least one occurs from the group consisting of a nozzle head crash, a clogged nozzle, a failure of a print head, a misalignment, and the image quality defect value is above a threshold value and configuring at least one additional print head array to continue a print job started by the at least one print head array when the at least one print head array is at a position following the at least one print head array and the at least one additional print head array is functional. |
| US09230192B2 |
Image classification using images with separate grayscale and color channels
Image classification techniques using images with separate grayscale and color channels are described. In one or more implementations, an image classification network includes grayscale filters and color filters which are separate from the grayscale filters. The grayscale filters are configured to extract grayscale features from a grayscale channel of an image, and the color filters are configured to extract color features from a color channel of the image. The extracted grayscale features and color features are used to identify an object in the image, and the image is classified based on the identified object. |
| US09230189B2 |
Method of raindrop detection on a vehicle windscreen and driving assistance device
The invention relates to a method of raindrop detection on a vehicle windscreen by capturing images using a camera which is at least focused on the windscreen, including a step of detecting edges (102) in a research area of said captured images, characterized in that said method of raindrop detection comprises a rejection step (103) in which edges that are uncharacteristic with respect to a raindrop are rejected. This invention also relates to an associated driving assistance device. |
| US09230188B2 |
Objective metric relating to perceptual color differences between images
Techniques described herein may determine an objective metric that relates to the color difference that may be perceived by humans viewing two images of the same visual scene. In one implementation, a method may include receiving first and second images; determining a first histogram based on hue values associated with pixels in the first image; and determining a second histogram based on hue values associated with pixels in the second image. A color difference metric may be determined based on a comparison between the first and second histograms. The color difference metric may relate to an objective measure of color differences between the first and second images. |
| US09230187B2 |
System and method for robust estimation of color dependent measurements
Methods, devices, and computer program products for robust estimation of color-dependent measurements are described herein. In one aspect, a method for generating a reference color grid that may be placed beside a color-dependent measuring device is disclosed. The reference color grid may contain a number of colors which enable a mapping from the color space of a testing device to a reference color space. This mapping may allow a function that is able to determine an estimate of a color-dependent measurement based on a color in the reference color space to be used. In another aspect, a method for robust estimation of color-dependent measurement using a reference color guide is disclosed. |
| US09230184B2 |
Image display control apparatus and method, and program for controlling image display control apparatus
An image within a search area of an image of interest is rotated from 0 to 345° in increments of 15°. An evaluation value of facial likeliness of an image after rotation thereof by each angular increment is calculated. A correction angle is calculated based upon a rotation angle (rotational manipulated variable θ) that affords the maximum evaluation value calculated. The image of interest is displayed upon being rotated based upon the correction angle calculated. Thus, the image of interest is displayed in an orientation suitable for appreciation. |
| US09230183B2 |
Automatic vehicle equipment monitoring, warning, and control system
An automatic vehicle equipment control system and methods thereof are provided, the system includes at least one imager configured to acquire a continuous sequence of high dynamic range single frame images, a processor, a color spectral filter array including a plurality of color filters, at least a portion of which are different colors, and pixels of an imager pixel array being in optical communication with substantially one spectral color filter, and a lens, wherein the imager is configured to capture a non-saturated image of nearby oncoming headlamps and at least one of a diffuse lane marking and a distant tail lamp in one image frame of the continuous sequence of high dynamic range single frame images, and the system configured to detect at least one of said highway markings and said tail lamps, and quantify light from the oncoming headlamp from data in the one image frame. |
| US09230180B2 |
Eyes-off-the-road classification with glasses classifier
A method for determining an Eyes-Off-The-Road (EOTR) condition exists includes capturing image data corresponding to a driver from a monocular camera device. A detection of whether the driver is wearing eye glasses based on the image data using an eye glasses classifier. When it is detected that the driver is wearing eye glasses, a driver face location is detected from the captured image data and it is determined whether the EOTR condition exists based on the driver face location using an EOTR classifier. |
| US09230177B2 |
Apparatus, systems, and methods for determining the location of a roadway mark or portion thereof not meeting standards
An apparatus, system, and method for determining the geographical location of a roadway mark or portion thereof not meeting roadway mark standards data. The system includes a GPS antenna; a GPS receiver responsive to the GPS antenna for determining the geographical location of the GPS antenna; and a system responsive to the GPS receiver. The system (a) determines the GPS geographical location of the roadway mark or portion thereof, (b) determines characteristic data of the roadway mark or portion thereof, (c) inputs roadway mark standards data, (d) compares the roadway characteristic data with the roadway mark standards data, and (e) determines the geographical location of the roadway mark or portion thereof based upon the comparison of the roadway characteristic and standards data. |
| US09230173B2 |
Soft decision making processes for analyzing images
A device may calculate a normalized value for each of a number of pixels in a frame of a video stream, by obtaining a first color from one of the pixels and a second color, by obtaining color components of the first color and the second color, by, for each of the color components, determining a distance between the first color and the second color, and by adding the distances of the color components to obtain the normalized value. In addition, the device may compute an accumulation of the normalized values, compare the accumulation to a threshold to determine whether a first image that includes the pixels matches a second image that includes the second color, and display a result of determining whether the first image matches the second image via a graphical user interface (GUI). |
| US09230172B2 |
Systems and methods for image-feature-based recognition
Methods and systems are described herein that allow a user to capture a single image snapshot from video, print, or the world around him or her, and obtain additional information relating to the media itself or items of interest displayed in the snapshot. A fingerprint of the snapshot is used as a query and transmitted to the server. Image Feature-Based Recognition, as described herein, uses a feature index to identify a smaller set of candidate matches from a larger database of images based on the fingerprint. Novel methods and systems using a distance metric and a radical hash table design exploit probabilistic effects and allow distinct image features to be preferred over redundant ones, allowing only the more distinctive data points to remain resident within the index, yielding a lean index that can be quickly used in the identification process. |
| US09230171B2 |
Object outlining to initiate a visual search
Methods and devices for initiating a search of an object are disclosed. In one embodiment, a method is disclosed that includes receiving video data from a camera on a wearable computing device and, based on the video data, detecting a movement that defines an outline of an area in the video data. The method further includes identifying an object that is located in the area and initiating a search on the object. In another embodiment, a server is disclosed that includes an interface configured to receive video data from a camera on a wearable computing device, at least one processor, and data storage comprising instructions executable by the at least one processor to detect, based on the video data, a movement that defines an outline of an area in the video data, identify an object that is located in the area, and initiate a search on the object. |
| US09230166B2 |
Apparatus and method for detecting camera tampering using edge image
An apparatus for detecting a camera tampering, includes: an image capturing unit to capture at least one image; an input-edge-image generating unit to extract an edge image from an object displayed in the captured image and generate an input edge image by using the extracted edge image; a reference-edge-image generating unit to generate a reference edge image from the input edge image; a stolen-edge-image generating unit configured to generate a stolen edge image by substracting the input edge image from the reference edge image; and a tampering determining unit to compare the input edge image with the reference edge image, compare the reference edge image with the stolen edge image, and determine whether or not a camera tampering has occurred, based on a first similarity and a second similarity. |
| US09230165B2 |
Object detection apparatus, vehicle-mounted device control system and storage medium of program of object detection
An object detection apparatus, using at least one processing circuit, for detecting an object in an image capturing area based on parallax information generated from a plurality of images captured by a plurality of image capturing units, includes a parallax histogram information generator to generate vertical-direction parallax histogram information indicating a frequency profile of parallax values in each of vertical row areas in a captured image based on the parallax information; and an object image area extraction unit to extract, among parallax values having frequency exceeding a given frequency threshold, a group of pixels having parallax values existing within proximity of a given parallax value and having a pixel-to-pixel interval in an image left-to-right direction within a given range as an object image area displaying an object based on the vertical-direction parallax histogram information. |
| US09230162B2 |
Identification control method and system for valuable document
An identification control method and system for a valuable document. The system comprises a collection part, an identification part, a control part, a transmission part and an upper computer. In the identification part, complete identification information about a valuable document is split into basic identification information and high-grade identification information. Only the basic identification information which is required by the control part is sent to the control part, and the information which is not required by the control part is directly sent to the upper computer by the identification part. The identification part only transmits the basic identification information to the control part, the data transmission amount is one-tenth of the original data transmission amount, and the transmission speed can be increased by 10 times, thereby solving the problem that a valuable document cannot be quickly processed continuously because the serial transmission speed between the control part and the identification part is slow. |
| US09230150B1 |
Finger print sensor and auxiliary processor integration in an electronic device
A system includes a fingerprint sensor and an auxiliary processor. The auxiliary processor is operable to arm the fingerprint sensor prior to the auxiliary processor entering a low power or sleep mode. The fingerprint sensor can detect a finger proximately located with the fingerprint sensor, capture and store fingerprint data from the finger, perform at least one pre-processing step after capturing the fingerprint data from the finger while the auxiliary processor is in the low power or sleep mode, and after the at least one pre-processing step and upon receiving a request from the auxiliary processor for the finger print data deliver the fingerprint data to the auxiliary processor. The auxiliary processor can compare the fingerprint data to reference data and determine whether the fingerprint data substantially matches the reference data. |
| US09230149B2 |
Biometric image sensing
An novel sensor is provided having a plurality of substantially parallel drive lines configured to transmit a signal into a surface of a proximally located object, and also a plurality of substantially parallel pickup lines oriented proximate the drive lines and electrically separated from the pickup lines to form intrinsic electrode pairs that are impedance sensitive at each of the drive and pickup proximal locations. |
| US09230147B2 |
Method and apparatus for optically reading out information stored in a barcode
In a method, whether there is a first bar having a width and located at at least one of both ends of a first black and white pattern is determined. The width of the bar is greater than a maximum width of a second bar. The maximum width of the second bar appears in a second black and white pattern assuming that the black and white pattern is part of the first barcode. The first black and white pattern is determined as readout data of the second barcode when it is determined that there is the first bar having the width greater than the maximum width of the second bar and located at at least one of both ends of the first black and white pattern. |
| US09230143B2 |
Bidirectional audio communication in reader devices
Aspects of the subject disclosure provide a card reader for receiving payment card information at a mobile point-of-sale terminal. In some implementations, a reader of the subject technology can include a memory, a conditioning module and a 3.5 mm audio plug including an audio bus that is configured for insertion into a headphone port of a host device, such as a smart phone or tablet computer. Implementations of the subject technology also include a microprocessor configured to perform operations for receiving a training sequence for use in determining communication parameters associated with a mobile device, and in response to the training sequence, transmitting an acknowledgement signal to the mobile device, via the audio bus, to indicate that a communicative coupling with the mobile device has been successfully established. |
| US09230142B2 |
Dimensioning and barcode reading system
A system and method for auto-calibrating a barcode scanning tunnel to determine the orientation of one or more cameras with respect to a range finder and a conveyor belt comprises providing a scanning tunnel having a moveable surface, at least one range finder having an orientation, at least one camera having an orientation and at least one calibration object having at least one indicia disposed in a predetermined relationship to one or more features of the at least one calibration object, capturing at least one image of the at least one calibration object by the at least one camera, electronically detecting the at least one calibration object at least one indicia and the one or more object features and electronically calculating at least one component of the at least one camera orientation with respect to the moveable surface in response to information obtained from the image and the at least one calibration object at least one indicia. |
| US09230141B2 |
RSSI estimate on variable length correlator output
A method for estimating a strength of a radio frequency signal according to one embodiment includes receiving a correlator magnitude signal from a correlator module; performing a gain scaling on the correlator magnitude signal; and averaging the scaled correlator magnitude signal or value associated therewith to generate an output indicative of a strength of the signal. Such methodology may also be implemented as a system using logic for performing the various operations. Additional systems and methods are also presented. |
| US09230140B1 |
System and method for detecting barcode printing errors
Barcode verifiers automate the verification process by capturing an image of the printed barcode and analyzing the image according to an industry specification. Industry specifications (e.g., ISO/IEC 15416,15415) identify common printing errors and prescribe test methods for detecting and quantifying these errors. Typically, these tests sample a barcode along one or more scan lines. Print errors that are parallel to these scan lines may be missed by the test. The present invention embraces a system and method to detect unprinted lines in barcodes resulting from a printer malfunction and produce a printer malfunction report with information regarding the quantity, position, and magnitude of these print errors. |
| US09230136B2 |
Tokenization column replacement
A tokenization system includes a vector table and one or more token tables. The tokenization system accesses sensitive data and a vector from a vector table column, and modifies the sensitive data based on the accessed vector. The tokenization system then queries the one or more token tables using a portion of the modified data to identify a token mapped to the portion of the modified data. The portion of the modified data is replaced with the token to create tokenized data. The vector table can be updated by replacing a vector table column with an updated vector table column. The tokenization system can modify subsequent data using the updated vector column prior to tokenization. |
| US09230134B1 |
Privacy setting metadata for application developers
Privacy setting metadata for application developers is described, including receiving, from a user, a request to submit an application; requesting, from the user, identification of one or more permissions and information associated with the one or more permissions; receiving the application, the one or more permissions, and the information associated with the one or more permissions, wherein the one or more permissions are associated with one or more functions of the application; storing the application, the permissions, and the information associated with the permissions; receiving a request to install the application to a device of another user; providing the application, the one or more permissions, and the information associated with the one or more permissions to the device; and receiving, from the device, one or more consents to the one or more permissions, the one or more consents indicate activation of the one or more functions of the application. |
| US09230117B2 |
Approval of content updates
A method, computer program product, and system is described. An indication of a problem regarding a content item is received, the content item being subject to a workflow including an approval protocol. A request for an emergency exception to the workflow with respect to an update to the content item is received, the update being associated with the problem. Permission for circumvention of one or more aspects of the approval protocol with respect to the update is provided, in response to receiving the request for the emergency exception. |
| US09230116B2 |
Technique for providing secure firmware
A technique to verify firmware. One embodiment of the invention uses a processor's micro-code to verify a system's firmware, such that the firmware can be included in a trusted chain of code along with the operating system. |
| US09230113B2 |
Encrypting and decrypting a virtual disc
A computer-readable storage medium containing machine executable instructions that when executed by a processor cause the processor to encrypt a virtual disc; wherein the virtual disc comprises a virtual disc image; and wherein execution of the machine executable instructions cause the processor to: receive the virtual disc; increase the size of the virtual disc; write a decryption-master-boot-record and a decryption program to the virtual disc; encrypt at least a portion of the virtual disc image, wherein the decryption program comprises decryption-machine-executable-instructions for decrypting the at least partially encrypted virtual disc image in accordance with a cryptographic key. |
| US09230109B2 |
Trusted platform module security
The described implementations relate to trusted platform module (TPM) security. One configuration that is implemented on a computing device includes a TPM configured to generate a key pair utilizing a factor stored on the TPM and an external cofactor that is not stored on the TPM. The computing device also includes a communication device configured to receive the external cofactor and convey the external cofactor to the TPM. |
| US09230103B2 |
System and method for registering users for communicating information on a web site
A system and method blocks or removes user accounts or complex information of user accounts that has or have a correspondence with complex information of other accounts or complex information on a blacklist. |
| US09230100B2 |
Securing anti-virus software with virtualization
The subject disclosure relates to systems and methods that secure anti-virus software through virtualization. Anti-virus systems can be maintained separate from user applications and operating system through virtualization. The user applications and operating system run in a guest virtual machine while anti-virus systems are isolated in a secure virtual machine. The virtual machines are partially interdependent such that the anti-virus systems can monitor user applications and operating systems while the anti-virus systems remain free from possible malicious attack originating from a user environment. Further, the anti-virus system is secured against zero-day attacks so that detection and recovery may occur post zero-day. |
| US09230099B1 |
Systems and methods for combining static and dynamic code analysis
A computer-implemented method for combining static and dynamic code analysis may include 1) identifying executable code that is to be analyzed to determine whether the executable code is capable of leaking sensitive data, 2) performing a static analysis of the executable code to identify one or more objects which the executable code may use to transfer sensitive data, the static analysis being performed by analyzing the executable code without executing the executable code, 3) using a result of the static analysis to tune a dynamic analysis to track the one or more objects identified during the static analysis, and 4) performing the dynamic analysis by, while the executable code is being executed, tracking the one or more objects identified during the static analysis to determine whether the executable code leaks sensitive data via the one or more objects. Various other methods, systems, and computer-readable media are also disclosed. |
| US09230098B2 |
Real time lockdown
A system and method that trusts software executables existent on a machine prior to activation for different types of accesses e.g. execution, network, and registry. The system detects new executables added to the machine as well as previously existent executables that have been modified, moved, renamed or deleted. In certain embodiments, the system will tag the file with a flag as modified or newly added. Once tagged, the system intercepts particular types of file accesses for execution, network or registry. The system determines if the file performing the access is flagged and may apply one or more policies based on the requested access. In certain embodiments, the system intercepts I/O operations by file systems or file system volumes and flags metadata associated with the file. For example, the NT File System and its extended attributes and alternate streams may be utilized to implement the system. |
| US09230092B1 |
Methods and apparatus for obscuring a valid password in a set of passwords in a password-hardening system
A password-hardening system comprises at least first and second servers. The first server is configured to store a plurality of sets of passwords for respective users with each such set comprising at least one valid password for the corresponding user and a plurality of chaff passwords for that user. The second server is configured to generate valid password indication information indicating for each of the sets which of the passwords in that set is a valid password. The valid password indication information comprises index values computed for respective ones of the password sets by the second server to identify respective valid passwords in the respective password sets. The second server may be further configured to compute the index values utilizing a keyed pseudorandom function, and to send the index values to the first server in association with respective values of a user number counter maintained in the second server. |
| US09230091B2 |
Managing use of a field programmable gate array with isolated components
Field programmable gate arrays can be used as a shared programmable co-processor resource in a general purpose computing system. Components of an FPGA are isolated to protect the FPGA and data transferred between the FPGA and other components of the computer system. For example, data written by the FPGA to memory is encrypted, and is decrypted within the FPGA when read back from memory. Data transferred between the FPGA and other components such as the CPU or GPU, whether directly or through memory, can similarly be encrypted using cryptographic keys known to the communicating components. Transferred data also can be digitally signed by the FPGA or other component to provide authentication. Code for programming the FPGA can be encrypted and signed by the author, loaded into the FPGA in an encrypted state, and then decrypted and authenticated by the FPGA itself, before programming the FPGA with the code. |
| US09230087B2 |
Optical filter security
An Optical Filter Security Invention incorporating an interactive system into a user authentication process (user name and password) and adding an additional simple layer of security that makes it much safer to perform online communications and transactions. It relates to the capability of the human eye to process information using a unique filter, such as a hand held card or a smart phone application, and the user's feedback of a security code into the computer for certification and protection of information. |
| US09230084B2 |
Method and system for enabling secure one-time password authentication
An approach for facilitating a one-time password (OTP) authentication procedure is described. A dedicated validation appliance receives a one-time password authentication request via an application programming interface, which is a single point of access to the dedicated validation appliance. The dedicated validation appliance then determines a validity of the request based on the correlating of a submitted OTP against OTP values independently generated by the dedicated validation appliance based on a large secret key exclusive to a client device that initiated the request. The single point of access to the dedicated validation appliance as well as exclusive sharing of the secret key with only another dedicated validation appliance or one-time with the client device reduces the likelihood of attackers discovering the secret keys. |
| US09230083B2 |
Securing application information in system-wide search engines
Securing application information in a shared, system-wide search service, in which each application can register a security filtering module that is to be used at search time to filter data associated with that application. Initial, unfiltered search results are obtained based on the contents of the shared search index, and are organized by application. Previously registered filter modules are called to perform user specific, per-application filtering on the initial results, such that data to which the user issuing the search request does not have access is removed from the search results, resulting in a set of filtered search results that are presented to the user and that contain indications only of data that is accessible to the user. |
| US09230082B2 |
Apparatus and method for enabling fingerprint-based secure access to a user-authenticated operational state of an information handling system
A computer-implemented method provides power to a fingerprint reader while the remaining components of the information handling system are held in a low power, non-operating state. Placement of a finger across the fingerprint reader is detected with the information handling system in the non-operating state. A fingerprint is read and a corresponding fingerprint image is generated. The fingerprint image is buffered and an embedded controller is triggered to start an authentication device having a secure storage. The fingerprint image is compared to a fingerprint template contained in the secure storage. In response to the fingerprint image matching the fingerprint template, the authentication device signals the embedded controller to activate a user authenticated wake-up cycle to provide power to the other components of the information handling system such that the information handling system activates an operating system and enters a fully powered and user authenticated, operational state. |
| US09230074B2 |
Method for switching wallpaper in screen lock state, mobile electronic device thereof, and storage medium thereof
A method for switching wallpaper in screen lock state, a mobile electronic device thereof, and a storage medium thereof are provided. In the present method, an input signal is received by a touch screen when a mobile electronic device enters a screen lock state. Then, whether the input signal is located in a specific area of the touch screen is determined. A moving track of the input signal is detected if the input signal is located in the specific area. Finally, wallpaper of the screen lock state is switched according to the moving track. As a result, a user can switch wallpaper arbitrarily even if the mobile electronic device is in the screen lock state, so as to increase convenience of switching wallpaper. |
| US09230073B2 |
Information processing apparatus, control method therefor, and storage medium storing program
The invention acquires a destination corresponding to a group to which an authenticated user belongs by searching a user management unit configured to manage a plurality of destinations respectively corresponding to a plurality of users and information of a group to which each of the plurality of users belongs, and sets to transmit data to the acquired destination. |
| US09230070B2 |
System for providing multiple levels of authentication before delivering private content to client devices
A system for providing multiple levels of authentication before delivering private content to the client devices over the communications network. A product identifier on the physical product is scanned using a code reader/decoder in the client device to access or request private content from the server. The server receives the device identifier associated with the client device and the product identifier associated with the physical product from the client device over the communications network for authentication. The server processor transmits the requested content, preferably a webpage, to the client device if both the device identifier and the product identifier are authenticated by the server processor. |
| US09230069B2 |
Execution-based license discovery and optimization
Techniques for execution-based license discovery and optimization. A method includes collecting execution information for one or more software processes on one or more servers in an operating system, mapping the collected execution information for the one or more software processes to one or more software products, determining usage of a software product in the operating system based on the mapping of the collected execution information for the one or more software processes to one or more software products, and identifying one or more software product license optimization opportunities based on a comparison of the determined usage of the software product in the operating system and an indication of all installations of the software product in the operating system. |
| US09230064B2 |
Personal wellness device
A personal wellness device comprise two housing bodies, a force sensor, a user interface, one or more processors, and/or other components. A first housing body and a second housing body may be movably coupled together by way of a coupling mechanism such that the two housing bodies are reconfigurable between an open configuration and a closed configuration. The force sensor may be configured to generate a force output signal that conveys information related to compressive force exerted on the two housing bodies while in the closed configuration. The user interface may be accessible with the two housing bodies in the open configuration. The one or more processors may be configured to execute one or more computer program modules, including a presentation module configured to present, via the user interface, information associated with compressive force exerted on the two housing bodies, the information being derived from the force output signal. |
| US09230063B2 |
Automated prostate tissue referencing for cancer detection and diagnosis
This application provides to a method for identifying one or more prostate tissue samples in a database that are closest to a test prostate sample, which can be used to aid pathologists when examining prostate tissues to attain reliable and consistent diagnoses of prostate cancer. Also provided are databases and computer algorithms that can be used with such methods. |