最新美国发明专利第2015-12-08期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US09209395B2	Variable resistance memory with lattice array using enclosing transistors A variable resistance memory array, programming a variable resistance memory element and methods of forming the array. A variable resistance memory array is formed with a plurality of word line transistors surrounding each phase change memory element. To program a selected variable resistance memory element, all of the bitlines are grounded or biased at the same voltage. A top electrode select line that is in contact with the selected variable resistance memory element is selected. The word line having the word line transistors surrounding the selected variable resistance memory element are turned on to supply programming current to the element. Current flows from the selected top electrode select line through the variable resistance memory element into the common source/drain region of the surrounding word line transistors, across the transistors to the nearest bitline contacts. The word lines are patterned in various lattice configurations.
US09209390B2	Memory device having stitched arrays of 4 F2 memory cells A memory device comprises a semiconductor substrate having a plurality of parallel trenches therein, a memory region formed in the substrate including an array of memory cells having a plurality of vertical selection transistors with respective channels formed in trench sidewalls, a plurality of buried source electrodes in trench bottoms, a plurality of paired gate electrodes formed on paired trench sidewalls, a first and second stitch region disposed adjacent the memory region along a trench direction including a first and second row of gate contacts, respectively, and a row of source contacts disposed in the first or second stitch region with each of the source contacts coupled to a respective one of the source electrodes. One of each pair of the gate electrodes is coupled to a respective one of the first row of gate contacts and the other one of each pair of gate electrodes is coupled to a respective one of the second row of gate contacts.
US09209388B2	Memory cells and methods of forming memory cells Some embodiments include a memory cell that has an electrode, a switching material over the electrode, a buffer region over the switching material, and an ion reservoir material over the buffer region. The buffer region includes one or more elements from Group 14 of the periodic table in combination with one or more chalcogen elements. Some embodiments include methods of forming memory cells.
US09209387B2	Phase change memory and fabrication method A phase change memory and its fabrication method are provided. A bottom electrode structure is provided through a substrate. A mask layer is formed on the substrate and the bottom electrode structure. A first opening is formed in the mask layer to expose the bottom electrode structure. A spacer is formed on sidewalls and bottom surface portions of the first opening to expose a surface portion of the bottom electrode structure. The first opening including the spacer therein has a bottom width less than a top width. A heating layer is formed at least on the surface portion of the bottom electrode structure exposed by the spacer. A phase change layer is formed on the heating layer to completely fill the first opening. A top electrode is formed on the phase change layer and the mask layer.
US09209386B2	Magneto-resistive element having a ferromagnetic layer containing boron According to one embodiment, a magneto-resistive element includes a first ferromagnetic layer formed on a substrate, a tunnel barrier layer formed on the first ferromagnetic layer, and a second ferromagnetic layer containing B formed on the tunnel barrier layer, the second magnetic layer containing therein any of He, Ne, Ar, Kr, Xe and N2.
US09209380B2	Acoustic wave device Embodiments described herein may provide an acoustic wave device, a method of fabricating an acoustic wave device, and a system incorporating an acoustic wave device. The acoustic wave device may include a transducer disposed on a substrate, with a contact coupled with the transducer. The acoustic wave device may further include a wall layer and cap that define an enclosed opening around the transducer. A via may be disposed through the cap and wall layer over the contact, and a top metal may be disposed in the via. The top metal may form a pillar in the via and a pad on the cap above the via. The pillar may provide an electrical connection between the pad and the contact. In some embodiments, the acoustic wave device may be formed as a wafer-level package on a substrate wafer.
US09209378B2	Fabrication of stable electrode/diffusion barrier layers for thermoelectric filled skutterudite devices Disclosed are methods for the manufacture of n-type and p-type filled skutterudite thermoelectric legs of an electrical contact. A first material of CoSi2 and a dopant are ball-milled to form a first powder which is thermo-mechanically processed with a second powder of n-type skutterudite to form a n-type skutterudite layer disposed between a first layer and a third layer of the doped-CoSi2. In addition, a plurality of components such as iron, and nickel, and at least one of cobalt or chromium are ball-milled form a first powder that is thermo-mechanically processed with a p-type skutterudite layer to form a p-type skutterudite layer “second layer” disposed between a first and a third layer of the first powder. The specific contact resistance between the first layer and the skutterudite layer for both the n-type and the p-type skutterudites subsequent to hot-pressing is less than about 10.0 μΩ·cm2.
US09209376B2	Thermoelectric device, in particular intended to generate an electric current in a motor vehicle The invention relates to a thermoelectric device, comprising a first circuit (1), called hot circuit, through which a first fluid can flow, and, a second circuit (2), called cold circuit, through which a second fluid can flow at a temperature lower than that of the first fluid, and elements (3p, 3n), called thermoelectric elements, that can be used to generate an electric current in the presence of a temperature gradient. According to the invention, it comprises fins (5f) in a heat exchange relationship with said hot circuit (1) and/or said cold circuit (2), the thermoelectric elements (3p, 3n) being in contact at least with said fins (5f), said fins having tracks (32) for conducting the current generated by said thermoelectric elements.
US09209374B2	Method for preparing and use of Sb2Te3 nanocrystals in thermoelectric materials Disclosed are a thermoelectric material and a method of forming a thermoelectric material having an optimal stoichiometry, the method including obtaining a first precursor material, wherein the first precursor material is an antimony precursor, and obtaining a second precursor material, wherein the second precursor is chosen from the group consisting of a tellurium precursor and a selenium precursor. The method further includes combining the precursor materials, heating the combination of precursor materials, and isolating a plurality of semiconductor nanocrystals from the heated precursor materials.
US09209371B2	Semiconductor construction, semiconductor unit, and manufacturing method thereof A semiconductor structure and its manufacturing method including multiple steps are provided. First, a patterned circuit board having a substrate and a patterned circuit layer is provided. The substrate includes a first surface, a second surface, at least one connecting channel, and at least one conductive through hole, wherein patterned circuit layer is disposed on the first surface, a second surface, and the inside wall of the conductive through hole. Then, the patterned circuit board is disposed on a carrier, and the patterned circuit layer disposed on one of the first surface and the second surface is touched with the carrier. Then, a filling process is applied. A filling material flows to the conductive through hole via the first surface or the second surface from the connecting channel. Then, a package material is provided to produce a semiconductor structure.
US09209369B2	Edge coupling alignment using embedded features Methods and systems may provide an alignment scheme for components that may reduce positional deviation between the components. The method may include placing a first component on top of a substrate, wherein the first component includes a receiving alignment feature, and coupling a second component to the first component, wherein the coupling includes inserting a protruding alignment feature of the second component into the receiving alignment feature of the first component. In one example, the first component includes an edge-emitting semiconductor die and the second component include one or more of an optical lens and an alignment frame.
US09209366B2	Organic optoelectronic device and method for the encapsulation thereof The invention relates to an organic optoelectronic device which is protected from ambient air by a sealed encapsulation structure of the type including at least one thin layer. The device includes a substrate; at least one light-emitting unit deposited on the substrate, incorporating internal electrodes and external electrodes defining an active zone and, between the electrodes, a stack of organic films; and a sealed encapsulation structure having one or more thin layers including at least one inorganic layer placed on top of the light-emitting unit and encasing same laterally. The device also includes a pre-encapsulation structure located between the external electrode and the encapsulation structure and which includes a buffer layer covering the external electrode and contains a heterocyclic organometallic complex having a glass transition temperature above 80° C., and a barrier layer covering the buffer layer and contains a silicon oxide SiOx, wherein x is 0
US09209359B2	Light emitting device with improved extraction efficiency In embodiments of the invention, a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown on a substrate. The substrate is a non-III-nitride material. The substrate has an in-plane lattice constant asubstrate. At least one III-nitride layer in the semiconductor structure has a bulk lattice constant alayer and [(\|asubstrate−alayer\|)/asubstrate]100% is no more than 1%. A surface of the substrate opposite the surface on which the semiconductor structure is grown is textured.
US09209356B2	Light-emitting element including a light-emitting stack with an uneven upper surface A light-emitting element includes: a light-emitting stack including an uneven upper surface; a transparent conductive layer formed on the uneven upper surface; an insulating layer formed on the transparent conductive layer and filling the uneven upper surface, and partial regions of the transparent conductive layer are exposed; a reflective layer formed on the transparent conductive layer and the insulating layer; and a contact interface including a current blocking area formed between the insulating layer and the reflective layer and a plurality of first contact regions formed between the transparent conductive layer and the reflective layer; and an electrode structure formed on the reflective layer, and the reflective layer is between the light-emitting stack and the electrode structure in a vertical direction of the light-emitting element; wherein the current blocking area and the plurality of first contact regions are coplanar.
US09209355B2	Light-emitting device Occurrence of a crosstalk phenomenon in a light-emitting device is inhibited. The light-emitting device includes an insulating layer; a first lower electrode over the insulating layer; a second lower electrode over the insulating layer; a structure over the insulating layer and between the first lower electrode and the second lower electrode; a first partition wall between the first lower electrode and the structure, over the insulating layer; a second partition wall between the second lower electrode and the structure, over the insulating layer; a first light-emitting unit over the first lower electrode, the first partition wall, the structure, the second partition wall, and the second lower electrode; an intermediate layer over the first light-emitting unit; a second light-emitting unit over the intermediate layer; and an upper electrode over the second light-emitting unit.
US09209351B1	Method for manufacturing light emitting element A method for manufacturing a light emitting element includes: preparing a wafer that has a substrate in which a first main face is provided with a plurality of convex components; and dividing the wafer along first dividing lines and second dividing lines. The convex components are in the form of circular cones or truncated circular cones, each of which having a circular bottom face and a side face that is connected to the bottom face, and disposed regularly so that a plurality of bounded regions are present around the convex components, and a shortest distance between the convex components and the centers of the bounded regions is less than a radius of the bottom faces of the convex components. The first and second dividing lines extend in a direction that intersects straight lines that link the centers of the plurality of bounded regions around a single convex component.
US09209343B2	Electrodeposition of thin-film cells containing non-toxic elements A structure and method of making a thin-film solar cell is provided. A thin-film solar cell includes a substrate, absorber layer and a buffer layer. The absorber layer is deposited by a single-step bulk electrochemical process, or a multi-layer electrochemical process. The buffer layer is deposited by an electrochemical deposition process such as a multi-layer deposition or an atomic layer deposition. The absorber and buffer layers are non-toxic materials which can include sulfur incorporated during the deposition process or incorporated after deposition by an anneal step.
US09209341B2	Thin film solar cell and method of forming same A solar cell device and a method of fabricating the device is described. The solar cell is fabricated by forming a back contact layer on a front side of a substrate, forming an absorber layer on the back contact layer, applying a protective layer on a back side of the substrate, depositing a buffer layer on the absorber layer. Excess buffer materials are deposited on the substrate back side, and the protective layer with excess buffer materials are removed.
US09209337B2	Photosensing transistors, methods of manufacturing the same, and display panels employing a photosensing transistor Photosensing transistors, display panels employing a photosensing transistor, and methods of manufacturing the same, include a gate layer, a gate insulation layer on the gate layer, a channel layer on the gate insulation layer, an etch stop layer on a partial area of the channel layer, a source and a drain on the channel layer and separated from each other with the etch stop layer being interposed between the source and the drain, and a passivation layer covering the source, the drain, and the etch stop layer, wherein the source is separated from the etch stop layer.
US09209334B2	Solar cell module A solar cell module includes an encapsulant and a solar cell in the encapsulant. The encapsulant includes a light-receiving side encapsulant at a light-receiving surface side of the solar cell, and a colored rear side encapsulant at a rear surface side of the solar cell. The rear side encapsulant contains an ethylene-vinyl acetate copolymer. An interface between the rear side encapsulant and the light-receiving side encapsulant is in contact with a side surface of the solar cell. In a part of an area where no solar cell is provided, the rear side encapsulant bulges to the light-receiving surface side.
US09209330B2	Semiconductor device, method of manufacturing the same, and camera A method of manufacturing a semiconductor device including a first member including a chip mounting region and a peripheral region, a semiconductor chip mounted in the chip mounting region, and a second member fixed to the first member to cover the semiconductor chip, includes adhering, to the second member, the peripheral region of the first member in a state that the semiconductor chip is mounted in the chip mounting region, using an adhesive, and generating a stress between the first member and the second member, after the adhesive starts to cure, to locally form a gap in at least one of a portion between the first member and the adhesive, and a portion between the second member and the adhesive.
US09209327B2	Solid-state photodetector pixel and photodetecting method A pixel is formed in a semiconductor substrate (S) with a plane surface for use in a photodetector. It comprises an active region for converting incident light (In) into charge carriers, photogates (PGL, PGM, PGR) for generating a lateral electric potential (Φ(x)) across the active region, and an integration gate (IG) for storing charge carriers generated in the active region and a dump site (Ddiff). The pixel further comprises separation-enhancing means (SL) for additionally enhancing charge separation in the active region and charge transport from the active region to the integration gate (IG). The separation-enhancing means (SL) are for instance a shield layer designed such that for a given lateral electric potential (Φ(x)), the incident light (In) does not impinge on the section from which the charge carriers would not be transported to the integration gate (IG).
US09209322B2	Multilayer thin-film back contact system for flexible photovoltaic devices on polymer substrates A polymer substrate and back contact structure for a photovoltaic element, and a photovoltaic element include a CIGS photovoltaic structure, a polymer substrate having a device side at which the photovoltaic element can be located and a back side opposite the device side. A layer of dielectric is formed at the back side of the polymer substrate. A metal structure is formed at the device side of the polymer substrate.
US09209320B1	Method of fabricating a single photon avalanche diode imaging sensor A method of fabricating an avalanche photodiode pixel includes growing a second doped semiconductor layer on a first doped semiconductor layer having a first doping concentration. The second doped semiconductor layer is grown with a second doping concentration and is of an opposite majority charge carrier type as the first doped semiconductor layer. A doped contact region having a third doping concentration is formed in the second doped semiconductor layer between the doped contact region and the first doped semiconductor layer. The doped contact region is of a same majority charge carrier type as the second doped semiconductor layer. The third doping concentration is greater than the second doping concentration. A guard ring region is formed in the second doped semiconductor layer, is of an opposite majority charge carrier type as the second doped semiconductor layer, and extends through the second doped semiconductor layer surrounding the doped contact region.
US09209308B2	Thin film transistor, array substrate and method for manufacturing the same, display device There is provided a thin film transistor, comprising a substrate (1) and a gate layer (3), a gate insulating layer (4), an active layer (5), an electrode metal layer (8) and a passivation layer (9) which are formed on the substrate (1) in sequence; the electrode metal layer (8) comprises a source electrode (8a) and a drain electrode (8b), which are separated from each other with a channel region being defined therebetween; between the gate layer (3) and the substrate (1), there is formed a first transparent conductive layer (2); between the active layer (5) and the electrode metal layer (8), there is formed a second transparent conductive layer (7). The transparent conductive layers (2, 7) are added so that adhesive force between the gate metal layer (3) and the substrate (1) is enhanced, diffusion of the electrode metal to the active layer (5) is prevented.
US09209307B2	Semiconductor device To provide a semiconductor device that includes an oxide semiconductor and is miniaturized while keeping good electrical properties. In the semiconductor device, an oxide semiconductor layer is surrounded by an insulating layer including an aluminum oxide film containing excess oxygen. Excess oxygen in the aluminum oxide film is supplied to the oxide semiconductor layer including a channel by heat treatment in a manufacturing process of the semiconductor device. Furthermore, the aluminum oxide film forms a barrier against oxygen and hydrogen. It is thus possible to suppress the removal of oxygen from the oxide semiconductor layer surrounded by the insulating layer including an aluminum oxide film, and the entry of impurities such as hydrogen into the oxide semiconductor layer; as a result, the oxide semiconductor layer can be made highly intrinsic. In addition, gate electrode layers over and under the oxide semiconductor layer control the threshold voltage effectively.
US09209305B1	Backside source-drain contact for integrated circuit transistor devices and method of making same An integrated circuit transistor is formed on and in a substrate. A trench in the substrate is at least partially filed with a metal material to form a source (or drain) contact buried in the substrate. The substrate further includes a source (or drain) region epitaxially grown above the source (or drain) contact. The substrate further includes a channel region adjacent to the source (or drain) region. A gate dielectric is provided on top of the channel region and a gate electrode is provided on top of the gate dielectric. The substrate is preferably of the silicon on insulator (SOI) type.
US09209299B2	Transistor device and fabrication method A transistor and a fabrication method are provided. In an exemplary transistor, a gate structure is formed on a surface of the substrate. A first doped region is formed in the substrate on both sides of the gate structure. An opening is formed in the first doped region. A stress layer is formed in the opening of the first doped region on the both sides of the gate structure. The stress layer has a thickness in the substrate less than a depth of the first doped region. The first doped region has a bottom in the substrate surrounding a bottom of the stress layer. The stress layer further contains a second doped region. The second doped region and the first doped region form a source region or a drain region.
US09209297B2	Integration of trench MOS with low voltage integrated circuits A high voltage trench MOS and its integration with low voltage integrated circuits. Embodiments include forming a first trench in a substrate, the first trench having a first width; forming a first oxide layer on side surfaces of the first trench; forming a second trench in the substrate, below the first trench, the second trench having a second width less than the first width; forming a second oxide layer on side and bottom surfaces of the second trench; forming spacers on sides of the first and second trenches; removing a portion of the second oxide layer from the bottom surface of the second trench between the spacers; filling the first and second trenches with a first poly-silicon to form a drain region; removing the spacers, exposing side surfaces of the first poly-silicon; forming a third oxide layer on the side surfaces and a top surface of the first poly-silicon; and filling a remainder of the first and second trenches with a second poly-silicon to form a gate region on each side of the drain region.
US09209295B2	Semiconductor memory device and method for manufacturing the same According to one embodiment, a semiconductor memory device includes: a substrate; a stacked body including a plurality of electrode layers and a plurality of insulating layers, both of them being alternately stacked on the substrate; a cap film provided in contact with the electrode layer within a hole formed to penetrate the stacked body; an insulating film provided on a side wall of the cap film and including a charge accumulation film; and a channel body provided on a side wall of the insulating film. The cap film includes a protrusion portion protruding toward the insulating film. In the cap film, a film thickness of a portion where the protrusion portion is provided in a direction in which the protrusion portion protrudes is larger than a film thickness of the other portions where the protrusion portion is not provided.
US09209294B1	Semiconductor device and method for manufacturing same A method for manufacturing a semiconductor device includes the steps of: forming, on a principal face of a substrate, a semiconductor layer including a first semiconductor region of a first conductivity type; and forming, in the semiconductor layer, a trench having a bottom located in the first semiconductor region. The method further includes a step of forming a trench bottom impurity region being of a second conductivity type and covering the bottom of the trench by performing annealing to cause part of the semiconductor layer corresponding to an upper corner portion of the trench to move to be placed on the bottom of the trench.
US09209292B2	Charge compensation semiconductor devices A field-effect semiconductor device includes a semiconductor body having a first surface and an edge, an active area, and a peripheral area between the active area and the edge, a source metallization on the first surface and a drain metallization. In the active area, first conductivity type drift portions alternate with second conductivity type compensation regions. The drift portions contact the drain metallization and have a first maximum doping concentration. The compensation regions are in Ohmic contact with the source metallization. The peripheral area includes a first edge termination region and a second semiconductor region in Ohmic contact with the drift portions having a second maximum doping of the first conductivity type which lower than the first maximum doping concentration by a factor of ten. The first edge termination region of the second conductivity type adjoins the second semiconductor region and is in Ohmic contact with the source metallization.
US09209291B2	Three-dimensional semiconductor device A three-dimensional (3D) semiconductor device includes first interlayer dielectric layers and word lines that are alternately stacked on a substrate; select lines formed on the first interlayer dielectric layers and the word lines; etch stop patterns formed on the select lines to contact the select lines; channel holes formed to pass through the select lines, the first interlayer dielectric layers, and the word lines; channel layers formed on surfaces of the channel holes; insulating layers formed in the channel holes, the insulating layers having an upper surface that is lower than upper surfaces of the etch stop patterns; impurity-doped layers formed in channel holes on upper surface of the insulating layers; and a second interlayer dielectric layer formed over the etch stop patterns and the impurity-doped layers.
US09209289B2	Semiconductor device and fabrication method thereof A method of fabricating a semiconductor device is provided. The method includes forming a substrate structure, wherein the substrate structure includes a substrate and a fin-shaped barrier layer formed on a surface of the substrate; forming a quantum well (QW) material layer on a surface of the fin-shaped barrier layer; and forming a barrier material layer on the QW material layer.
US09209286B2	Semiconductor device According to one embodiment, the pair of semiconductor regions are provided respectively on a pair of side walls of the second semiconductor layer having the fin configuration to form tunnel junctions with the second semiconductor layer. The gate electrode is provided on two sides of the second semiconductor layer at the pair of side walls to oppose the tunnel junctions with the semiconductor regions interposed between the gate electrode and the tunnel junctions. The third semiconductor layer is separated from the second semiconductor layer and the semiconductor regions by the first semiconductor layer to be adjacent to the first semiconductor layer.
US09209285B2	Silicon-based tunneling field effect transistors and transistor circuitry employing same A p-channel tunneling field effect transistor (TFET) is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The p-channel TFET includes a channel region comprising one of a silicon-germanium alloy with non-zero germanium content and a ternary III-V alloy. An n-channel TFET is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The n-channel TFET includes an n-type region, a p-type region with a p-type delta doping, and a channel region disposed between and spacing apart the n-type region and the p-type region. The p-channel TFET and the n-channel TFET may be electrically connected to define a complementary field-effect transistor element. TFETs may be fabricated from a silicon-germanium TFET layer structure grown by low temperature (500 degrees Centigrade) molecular beam epitaxy.
US09209284B2	Tunneling field effect transistor with new structure and preparation method thereof A tunneling field effect transistor with a new structure and a preparation method thereof are provided. The tunneling field effect transistor includes an active region between a source and a drain, a gate dielectric layer, and a gate located on a side of the gate dielectric layer deviating from the source, and a tunneling region disposed between the gate dielectric layer and the source and in contact with both the gate dielectric layer and the source. The source includes at least a first area and a second area perpendicularly connected in an “L” shape. The tunneling region is in contact with at least the first area and the second area. The gate dielectric layer is in contact with at least the tunneling region and the source.
US09209283B2	Thin film transistor, method for manufacturing the same, and semiconductor device In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
US09209279B1	Self aligned replacement fin formation Methods and apparatus for forming FinFET structures are provided. Selective etching and deposition processes described herein may provide for FinFET manufacturing without the utilization of multiple patterning processes. Embodiments described herein also provide for fin material manufacturing methods for transitioning from silicon to III-V materials while maintaining acceptable crystal lattice orientations of the various materials utilized. Further embodiments provide etching apparatus which may be utilized to perform the methods described herein.
US09209278B2	Replacement source/drain finFET fabrication A finFET is formed having a fin with a source region, a drain region, and a channel region between the source and drain regions. The fin is etched on a semiconductor wafer. A gate stack is formed having an insulating layer in direct contact with the channel region and a conductive gate material in direct contact with the insulating layer. The source and drain regions are etched leaving the channel region of the fin. Epitaxial semiconductor is grown on the sides of the channel region that were adjacent the source and drain regions to form a source epitaxy region and a drain epitaxy region. The source and drain epitaxy regions are doped in-situ while growing the epitaxial semiconductor.
US09209271B1	Vertical III-V nanowire field-effect transistor using nanosphere lithography A vertical III-V nanowire Field-Effect Transistor (FET). The FET includes multiple nanowires or nanopillars directly connected to a drain contact, where each of the nanopillars includes a channel of undoped III-V semiconductor material. The FET further includes a gate dielectric layer surrounding the plurality of nanopillars and a gate contact disposed on a gate metal which is connected to the gate dielectric layer. Additionally, the FET includes a substrate of doped III-V semiconductor material connected to the nanopillars via a layer of doped III-V semiconductor material. In addition, the FET contains a source contact directly connected to the bottom of the substrate. By having such a structure, electrostatic control and integration density is improved. Furthermore, by using III-V materials as opposed to silicon, the current drive capacity is improved. Additionally, the FET is fabricated using nanosphere lithography which is less costly than the conventional photo lithography process.
US09209269B2	Semiconductor structure and method for manufacturing the same A method for manufacturing a semiconductor structure comprises following steps: providing an SOI substrate, forming a gate stack on the SOI substrate, forming sidewall spacers on sidewalls of the gate stack, and forming source/drain regions on each side of the gate stack; depositing a first metal layer on surfaces of an entire semiconductor structure, and then removing the first metal layer; forming an amorphous semiconductor layer on surfaces of the source/drain regions; depositing a second metal layer on surfaces of the entire semiconductor structure, and then removing the second metal layer; and annealing the semiconductor structure. Accordingly, the present invention further provides a semiconductor structure. The present invention is capable of effectively reducing contact resistance at source/drain regions.
US09209268B2	Semiconductor device and method of making The present disclosure is related to semiconductor technologies and discloses a semiconductor device and its method of making. In the present disclosure, a transistor's source and drain are led out by concurrently formed metal-semiconductor compound contact regions at the source and drain and metal-semiconductor compounds in vias formed at positions corresponding to the source and drain. Because the metal-semiconductor compound has relatively low resistivity, the resistance of the metal-semiconductor compounds in the vias can be minimized. Also, because the material used to fill the vias and the material forming the source/drain contact regions are both metal-semiconductor compound, contact resistance between the material filling the vias and the metal-semiconductor compound source/drain contact regions can be minimized. Furthermore, because the material filling the vias is metal-semiconductor compound, the conducting material in the vias and dielectric material in the insulator layer can form good interface and have good adhesion properties, and the conducting material would not cause structural damage in the dielectric material. Thus, there is no need to form a barrier layer between the insulator layer and the material filling the vias.
US09209267B2	Method for forming oxide semiconductor film and method for manufacturing semiconductor device An oxide semiconductor film is formed over a substrate. A sacrifice film is formed to such a thickness that the local maximum of the concentration distribution of an injected substance injected into the oxide semiconductor film in the depth direction of the oxide semiconductor film is located in a region from an interface between the substrate and the oxide semiconductor film to a surface of the oxide semiconductor film. Oxygen ions are injected as the injected substance into the oxide semiconductor film through the sacrifice film at such an acceleration voltage that the local maximum of the concentration distribution of the injected substance in the depth direction of the oxide semiconductor film is located in the region, and then the sacrifice film is removed. Further, a semiconductor device is manufactured using the oxide semiconductor film.
US09209262B2	Silicon carbide semiconductor device and method for manufacturing same This silicon carbide semiconductor device includes: a silicon carbide semiconductor layer; a gate insulating layer which is arranged over the silicon carbide semiconductor layer and which includes a silicon oxide film; a gate electrode which is arranged on the gate insulating layer; and a carbon transition layer which is interposed between the silicon carbide semiconductor layer and the silicon oxide film and which has a carbon atom concentration is 10% to 90% of a carbon atom concentration of the silicon carbide semiconductor layer. In a region of the carbon transition layer which is located closer to the silicon oxide film than a position where a nitrogen atom concentration becomes the highest is, a ratio of an integral of nitrogen atom concentrations to an integral of carbon atom concentrations is equal to or greater than 0.11.
US09209255B2	Semiconductor device including an electrode structure formed on nitride semiconductor layers According to one embodiment, a semiconductor device includes a nitride semiconductor layer, a first electrode provided on the layer, a second electrode provided on the layer, a insulating film provided on the layer, a first control electrode provided on the film, and a conductor provided on the film. The first control electrode includes a first edge, and a second edge. The first edge is provided between the second edge and the first electrode. The conductor includes a first portion and a third edge positioned between the first portion and the first electrode. An electric field strength at a first region is substantially equal to an electric field strength at a second region. The first region overlaps the first edge when projected onto a plane perpendicular to a stacking direction. The second region overlaps the third edge when projected onto the plane.
US09209254B2	Structure and manufacturing method of the structure, and gallium nitride-based semiconductor light-emitting device using the structure and manufacturing method of the device In a structure including a gallium nitride-based semiconductor having an m-plane as a principal plane, and a metal layer provided on the principal plane, the principal plane has an n-type conductivity. An interface between the gallium nitride-based semiconductor and the metal layer contains oxygen. The metal layer includes a crystal grain extending form a lower surface to an upper surface of the metal layer.
US09209250B2	High electron mobility transistors, methods of manufacturing the same, and electronic devices including the same Provided are high electron mobility transistors (HEMTs), methods of manufacturing the HEMTs, and electronic devices including the HEMTs. An HEMT may include an impurity containing layer, a partial region of which is selectively activated. The activated region of the impurity containing layer may be used as a depletion forming element. Non-activated regions may be disposed at opposite side of the activated region in the impurity containing layer. A hydrogen content of the activated region may be lower than the hydrogen content of the non-activated region. In another example embodiment, an HEMT may include a depletion forming element that includes a plurality of regions, and properties (e.g., doping concentrations) of the plurality of regions may be changed in a horizontal direction.
US09209249B2	Semiconductor device and method of manufacturing the same To realize a semiconductor device having a power MOSFET satisfying both a low conduction resistance and a high junction breakdown voltage by a simple and easy manufacturing method. Over an n-type substrate, a p-type epitaxial layer of a low concentration is formed, and, in an active part, a plurality of active regions is defined by a plurality of trenches that is formed in the epitaxial layer and extends in a first direction with first intervals in a second direction orthogonal to the first direction. In the epitaxial layer between the adjacent trenches, an n-type diffusion region that functions as a drain offset layer is formed, and, in the epitaxial layer between a side wall of the trench and the n-type diffusion region, a p-type diffusion region connected with a channel region (the p-type diffusion region) is formed, to constitute a super junction structure. Further, by forming an n-type diffusion region in the epitaxial layer, having a prescribed width from a side wall of a trench lying in the end part of the active part toward an outer periphery part, to achieve the improvement of a drain breakdown voltage.
US09209247B2	Self-aligned wrapped-around structure An embodiment vertical wrapped-around structure and method of making. An embodiment method of making a self-aligned vertical structure-all-around device including forming a spacer around an exposed portion of a semiconductor column projecting from a structure layer, forming a photoresist over a protected portion of the structure layer and a first portion of the spacer, etching away an unprotected portion of the structure layer disposed outside a periphery collectively defined by the spacer and the photoresist to form a structure having a footer portion and a non-footer portion, the non-footer portion and the footer portion collectively encircling the semiconductor column, and removing the photoresist and the spacer.
US09209244B2	Semiconductor device with vertical structures that penetrate conductive patterns and interlayer insulating patterns Provided is a semiconductor device that includes first and second isolation patterns disposed on a substrate. Alternately stacked interlayer insulating patterns and a conductive patterns are disposed on a surface of the substrate between the first and second isolation patterns. A support pattern penetrates the conductive patterns and the interlayer insulating patterns and has a smaller width than the first and second isolation patterns. First and second vertical structures are disposed between the first isolation and the support pattern and penetrate the conductive patterns and the interlayer insulating patterns. A second vertical structure is disposed between the second isolation pattern and the support pattern and penetrates the conductive patterns and the interlayer insulating patterns. A distance between top and bottom surfaces of the support pattern is greater than a distance between a bottom surface of the support pattern and the surface of the substrate.
US09209240B2	Metal-oxide-metal capacitor structure A capacitor from a Metal-Oxide-Metal (“MoM”) process may include a plurality of metal layers arranged with different design structures. The metal layers may be connected with vias. The metal layers may include wires, such as rows and/or fingers that are arranged for maximizing capacitance between adjacent fingers, as well as between fingers of different metal layers. As the spacing of the fingers is increased, the reliability, yield of final product, and ease of manufacturing both increase. The capacitor increases the spacing of wires/fingers while either maintaining or improving the capacitance per unit area.
US09209239B2	Method of fabricating semiconductor device The method includes forming a metal interconnection layer and a first interlayer insulating layer on a semiconductor substrate, forming a reservoir capacitor region by etching the first interlayer insulating layer to expose the metal interconnection layer, forming a barrier metal layer on the reservoir capacitor region, forming a sacrificial insulating layer on the barrier metal layer in a lower portion of the reservoir capacitor region, performing a pre-cleaning process to remove the barrier metal layer on a sidewall of the reservoir capacitor region, and removing the sacrificial insulating layer.
US09209237B1	Organic light-emitting display device An organic light-emitting display device includes a plurality of organic light-emitting diodes which shares a cathode, a plurality of switching elements which is connected to the cathode, a plurality of capacitors, each comprising a first electrode which is connected to each of the switching elements, respectively, and a second electrode and a power bus line which is connected to the second electrode, wherein each of the plurality of switching elements controls a connection between the cathode and the first electrode.
US09209232B2	Dual-mode pixels including emissive and reflective devices, and dual-mode display using the pixels Provided is a dual-mode display including a substrate and a plurality of sub-pixels on the substrate, in which each sub-pixel includes an emissive device, a color selection reflector disposed on one side of the emissive device, and an optical shutter disposed on another side of the emissive device, wherein the emissive device includes a cathode and an anode, and the cathode and the anode include a carbon-based material including graphene sheets, graphene flakes, and graphene platelets, and a binary or ternary transparent conductive oxide including indium oxide, tin oxide, and zinc oxide.
US09209230B2	Optical films for reducing color shift and organic light-emitting display apparatuses employing the same Optical films, and organic light-emitting display apparatuses employing the same, include a high refractive index pattern layer including a first surface and a second surface facing each other, wherein the first surface includes a pattern having a plurality of grooves. The plurality of grooves each have a curved surface and a depth greater than a width thereof. The high refractive index pattern layer is formed of a material having a refractive index greater than 1. The optical films, and the organic light-emitting display apparatuses, further include a low refractive index pattern layer formed of a material having a refractive index smaller than the refractive index of the material constituting the high refractive index pattern layer. The low refractive index pattern layer includes a filling material for filling the plurality of grooves.
US09209228B2	Organic light emitting diode display and manufacturing method thereof An organic light emitting diode (OLED) display includes: pixel electrodes formed on a substrate; a pixel definition layer between the pixel electrodes and partitioning a pixel area; organic emission layers of a plurality of colors on the pixel electrodes; and a common electrode on the organic emission layers. The pixel definition layer includes a first pattern and a second pattern having different formation materials, thicknesses, and extension directions.
US09209227B2	Organic electroluminescence display panel and organic electroluminescence display apparatus An organic electroluminescence (EL) display panel includes an anode electrode formed above a bank and formed opposite to a plurality of cathode electrodes, and a charge functional layer commonly formed for each of the organic light-emitting layers across a plurality of aperture areas formed in the bank. A distance from the center of the display region to the end of the anode electrode is shorter than a distance from the center of the display region to the end of the charge functional layer.
US09209225B2	Cell structure of resistive non-volatile memory and manufacturing method thereof A cell structure of a non-volatile memory is provided. The cell structure includes a first metal layer, a first dielectric layer, a first material layer, a second material layer, a first transition layer, a second metal layer, a second dielectric layer, a third material layer, a fourth material layer, a second transition layer, and a third metal layer. The first dielectric layer has a first via, and the first metal layer is exposed through the first via. The first material layer and the second material layer are reacted with each other to form the first transition layer. The second dielectric layer has a second via, and the second metal layer is exposed through the second via. The third material layer and the fourth material layer are reacted with each other to form the second transition layer.
US09209218B2	Infrared solid-state imaging device An infrared solid-state imaging device with unit detecting sections in a matrix form, wherein the unit detecting section includes: an infrared light guiding layer; a first reflecting layer on the infrared light guiding layer; an infrared light detecting section on the first reflecting layer, the infrared light detecting section including an infrared light absorbing layer and upper and lower contact layers; and first metal wiring connected to the upper contact layer, wherein a side wall of the unit detecting section is inclined at an angle smaller than 45° to a normal direction, to form a groove between the adjacent unit detecting sections, a first insulating layer is provided on the side wall of the unit detecting section and second metal wiring is provided on the first insulating layer, and a refractive index of the first reflecting layer is lower than that of the lower contact layer.
US09209216B2	Passivation of back-illuminated image sensor A method for forming a back-illuminated image sensor includes forming a higher doped crystalline layer on a crystalline substrate, growing a lower doped crystalline layer on the higher doped crystalline layer and forming a photodiode and component circuitry from the lower doped crystalline layer. Metallization structures are formed to make connections to and between components. The crystalline substrate is removed to expose the higher doped crystalline layer. An optical component structure is provided on an exposed surface of the higher doped crystalline layer to receive light therein such that the higher doped crystalline layer provides a passivation layer for the photodiode and the component circuitry.
US09209213B2	Thin-type image capturing module structure for a web cam An image capturing module of a web cam device, and particularly to a thin-type web cam device, includes a circuit board having circuit lines and a through opening. A substrate plate having contacts attaches to the bottom of the circuit board. An image sensor is covered by a transparent shield. The image sensor and the shield are carried by the substrate plate and located within the through opening.
US09209211B2	Vertical gate transistor and pixel structure comprising such a transistor The present disclosure relates to a photodiode comprising: a P-conductivity type substrate region, an electric charge collecting region for collecting electric charges appearing when a rear face of the substrate region receives light, the collecting region comprising an N-conductivity type region formed deep in the substrate region, an N-conductivity type read region formed in the substrate region, and an isolated transfer gate, formed in the substrate region in a deep isolating trench extending opposite a lateral face of the N-conductivity type region, next to the read region, and arranged for receiving a gate voltage to transfer electric charges stored in the collecting region toward the read region.
US09209209B2	Photoelectric conversion device and method for operating the same To provide a photoelectric conversion device with low power consumption and a method for operating the photoelectric conversion device. The photoelectric conversion device includes a charge storage capacitor portion, a photodiode, and a plurality of transistors. The charge storage capacitor portion is charged after being reset. Then, the charge storage capacitor portion is discharged through the photodiode or a current mirror circuit connected to the photodiode for a given period of time, and after that, the potential of the charge storage capacitor portion is read. Since power is consumed only at the time of charging, power consumption can be reduced.
US09209206B2	Pulse converter circuit A pulse converter circuit includes a logic circuit to which a first signal is input and from which a second signal is output. The logic circuit includes a p-channel transistor which determines whether a voltage of the second signal is set to a first voltage depending on a voltage of the gate; and an n-channel transistor which determines whether the voltage of the second signal is set to a second voltage, which is higher than the first voltage, depending on a voltage of the gate. The p-channel transistor includes a semiconductor layer containing an element of a group 14. The n-channel transistor includes an oxide semiconductor layer.
US09209204B2	Thin film transistor array panel and method of manufacturing the same A thin film transistor array panel and a method of manufacturing the same, the thin film transistor array panel including: a polysilicon thin film transistor formed on a substrate, in which a source region and a drain region of a semiconductor layer of the thin film transistor are electrically connected to a power supply line. The power supply line is configured to apply a voltage to remove a floating state of a polysilicon semiconductor layer.
US09209201B2	Systems and methods for integrating different channel materials into a CMOS circuit by using a semiconductor structure having multiple transistor layers A multilayer semiconductor structure having a layout footprint with a first region and a non-overlapping second region and different transistor types fabricated using different channel material. The semiconductor structure comprises a first transistor layer comprising a first type of channel material in the first region but no channel material in the second region. The semiconductor structure further comprises a second transistor layer comprising a second type of channel material in the second region but no channel material in the first region. The second transistor layer is vertically elevated above the first transistor layer. A first transistor is fabricated on the first transistor layer. A second transistor is fabricated on the second transistor layer, and the first transistor is interconnected with the second transistor to form a circuit.
US09209200B2	Methods for forming a self-aligned maskless junction butting for integrated circuits A method for forming a semiconductor device includes forming gate stacks on a crystalline semiconductor layer; depositing a spacer layer over a top and sidewalls of the gate stacks; recessing the semiconductor layer between the gates stacks; and depositing a non-conformal layer over the gates stacks and within the recesses such that the non-conformal layer forms a pinch point over the recesses. The non-conformal layer is etched at a bottom of the recesses through the pinch point to expose the semiconductor layer. Dopant species are implanted at the bottom of the recesses through the pinch point in the semiconductor layer. The non-conformal layer is stripped, and source and drain material is grown in the recesses. The dopant species are activated to form PN junctions to act as a junction butt between portions of the semiconductor layer.
US09209198B2	Memory cell and manufacturing method thereof Provided is a memory cell including a substrate, two doped regions of a first conductivity type, one doped region of a second conductivity type, two stacked structures, and a first isolation structure. The doped regions of the first conductivity type are respectively disposed in the substrate. The doped region of the second conductivity type is disposed in the substrate between the two doped regions of the first conductivity type. The stacked structures are disposed on the substrate and respectively cover the corresponding doped regions of the first conductivity type and a portion of the doped region of the second conductivity type. Each of the stacked structures includes one charge storage layer. The first isolation structure completely covers and is in contact with the bottom surface of each of the doped regions of the first conductivity type and the bottom surface of the doped region of the second conductivity type.
US09209196B2	Memory circuit, method of driving the same, nonvolatile storage device using the same, and liquid crystal display device The present invention provides a memory circuit including a memory element to which writing can be performed with a small current and a low voltage, i.e., low power consumption, and provides a non-volatile storage device that can easily reduce a chip size by using this memory circuit. A memory element 1 is a memory transistor having a transistor structure including a source electrode 14, a drain electrode 15, a gate electrode 11, and, a source region, a drain region, and a channel region made of a metal oxide semiconductor layer 13. The resistance property between the source and the drain shows a low resistance, and the memory transistor is changed to have an ohmic resistance property, regardless of a voltage application state of the gate electrode, by allowing a writing current with a density not less than a predetermined value to flow in the channel region to generate Joule heat. The memory circuit stores information between a state indicating the ohmic resistance property after the writing and a state indicating a current-voltage characteristic as a transistor depending upon the voltage application state to the gate electrode before the writing.
US09209195B2	SRAM well-tie with an uninterrupted grated first poly and first contact patterns in a bit cell array An integrated circuit containing an SRAM may be formed using one or more periodic photolithographic patterns for elements of the integrated circuit such as gates and contacts, which have alternating line and space configurations in SRAM cells. Strap rows of the SRAM containing well ties and/or substrate taps which have SRAM cells on two opposite sides are configured so that the alternating line and space configurations are continuous across the regions containing the well ties and substrate taps.
US09209192B2	Semiconductor device and method of fabricating the same A semiconductor device includes the following elements. An element isolation portion separates first and second diffusion regions in a semiconductor substrate each other. A first insulating film is formed over the element isolation portion and the first and second diffusion regions. First and second contact plugs are formed over the first and second diffusion regions, respectively. The first and second contact plugs penetrate the first insulating film. A first conductive layer is formed over the first insulating film over the element isolation portion. A second insulating film is formed over the first conductive layer. A third contact plug penetrates the second insulating film, the third contact plug connecting the first contact plug. A second conductive layer is formed over the second insulating film contacting the third contact plug. The first and second conductive layers partly overlap the element isolation portion.
US09209189B2	Semiconductor integrated circuit device and method for producing the same A capacitive element has improved electrical properties. The capacitive element is configured in a DRAM cell and has a lower electrode, a capacitive insulator film formed over the lower electrode, and an upper electrode formed over the capacitive insulator film. The upper electrode has a structure in which from the capacitive insulator film side of this electrode, a first upper electrode, a second upper electrode and a third upper electrode are stacked in turn. The third upper electrode is a tungsten film that may contain an impurity. Between the first and third upper electrodes, the second upper electrode is interposed which is a barrier film for preventing the possible impurity in the third upper electrode from diffusing into the capacitive insulator film.
US09209177B2	Semiconductor devices including gates and dummy gates of different materials Semiconductor devices are provided. The semiconductor devices may include an active pattern and a insulation layer. The semiconductor devices may include a gate that is on the active pattern and that includes a first material, and a dummy gate that is on the insulation layer and that includes a second material different from the first material.
US09209171B2	Semiconductor device, method for manufacturing same, and nonvolatile semiconductor memory device Provided is a semiconductor element having, while maintaining the same integratability as a conventional MOSFET, excellent switch characteristics compared with the MOSFET, that is, having the S-value less than 60 mV/order at room temperature. Combining the MOSFET and a tunnel bipolar transistor having a tunnel junction configures a semiconductor element that shows an abrupt change in the drain current with respect to a change in the gate voltage (an S-value of less than 60 mV/order) even at a low voltage.
US09209168B2	Circuit with inter-layer vias and intra-layer coupled transistors A circuit comprises a first layer comprising a first voltage line, a first transistor coupled with the first voltage line, a second transistor coupled with the first voltage line, and a first line coupling a drain of the first transistor with a gate of the second transistor. The circuit also comprises a second layer comprising a second voltage line, a third transistor coupled with the second voltage line, a fourth transistor coupled with the second voltage line, and a second line coupling a drain of the third transistor with a gate of the fourth transistor. The circuit further comprises an inter-layer interconnect structure coupling the first transistor with the third transistor, and the second transistor with the fourth transistor.
US09209166B2	Semiconductor assemblies, stacked semiconductor devices, and methods of manufacturing semiconductor assemblies and stacked semiconductor devices Stacked semiconductor devices, semiconductor assemblies, methods of manufacturing stacked semiconductor devices, and methods of manufacturing semiconductor assemblies. One embodiment of a semiconductor assembly comprises a thinned semiconductor wafer having an active side releasably attached to a temporary carrier, a back side, and a plurality of first dies at the active side. The individual first dies have an integrated circuit, first through die interconnects electrically connected to the integrated circuit, and interconnect contacts exposed at the back side of the wafer. The assembly further includes a plurality of separate second dies attached to corresponding first dies on a front side, wherein the individual second dies have integrated circuits, through die interconnects electrically connected to the integrated circuits and contact points at a back side, and wherein the individual second dies have a thickness of approximately less than 100 microns.
US09209163B2	Package-on-package structures Embodiments of the present disclosure provide a package on package arrangement comprising a bottom package and a second package. The first package includes a substrate layer including (i) a top side and (ii) a bottom side that is opposite to the top side. Further, the top side defines a substantially flat surface. The first package also includes a die coupled to the bottom side of the substrate layer. The second package includes a plurality of rows of solder balls, and the second package is attached to the substantially flat surface of the substrate layer via the plurality of rows of solder balls.
US09209156B2	Three dimensional integrated circuits stacking approach A semiconductor package and a method of forming a semiconductor package with one or more dies over an interposer die are provided. By forming a first redistribution structure over the interposer die with TSVs, the die(s) bonded to the interposer die can have edge(s) beyond the boundary of the interposer die. In addition, a second redistribution structure may be formed on the opposite surface of the interposer die from the redistribution structure. The second redistribution structure enables reconfiguration and fan-out of bonding structures for external connectors of the interposer die.
US09209155B2	Method for manufacturing semiconductor device and adhesive for mounting flip chip The present invention aims to provide a method for producing a semiconductor device, the method being capable of achieving high reliability by suppressing voids. The present invention also aims to provide a flip-chip mounting adhesive for use in the method for producing a semiconductor device. The present invention relates to a method for producing a semiconductor device, including: step 1 of positioning a semiconductor chip on a substrate via an adhesive, the semiconductor chip including bump electrodes each having an end made of solder; step 2 of heating the semiconductor chip at a temperature of the melting point of the solder or higher to solder and bond the bump electrodes of the semiconductor chip to an electrode portion of the substrate, and concurrently to temporarily attach the adhesive; and step 3 of removing voids by heating the adhesive under a pressurized atmosphere, wherein the adhesive has an activation energy ΔE of 100 kJ/mol or less, a reaction rate of 20% or less at 2 seconds at 260° C., and a reaction rate of 40% or less at 4 seconds at 260° C., as determined by differential scanning calorimetry and Ozawa method.
US09209152B2	Molding material and method for packaging semiconductor chips A method and apparatus for packaging a semiconductor chip is presented. A semiconductor device includes a chip, a lead, and an encapsulant. The encapsulant includes a stabilization layer, a laminate molding layer connected to the stabilization layer, and a conductive strip connected to the laminate molding layer. The conductive strip electrically connects the contact area of the chip to the lead.
US09209150B2	Embedded packages, methods of fabricating the same, electronic systems including the same, and memory cards including the same Embedded packages are provided. The embedded package includes a chip attached to a first surface of a core layer, a plurality of bumps on a surface of the chip opposite to the core layer, and a first insulation layer surrounding the core layer, the chip and the plurality of bumps. The first insulation layer has a trench disposed in a portion of the first insulation layer to expose the plurality of bumps.
US09209144B1	Substrate with electrically isolated bond pads A substrate for use in semiconductor device assembly has an electrically insulating body with a die mounting surface and an opposite grid array surface. An array of external electrical connection pads is located in the grid array surface. Substrate bond padsare located in the die mounting surface. Interconnects in the insulating body selectively interconnect the substrate bond padsto the external electrical connection pads. Tertiary bond pads are located in the die mounting surface and are electrically isolated from the external electrical connection pads.
US09209140B2	Semiconductor devices and methods of manufacture thereof Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a semiconductor device includes a substrate, and a plurality of contact pads disposed over the substrate. The contact pads are arranged in a ball grid array (BGA), and the BGA includes a plurality of corners. A metal dam is disposed around each of the plurality of corners of the BGA.
US09209139B2	Multilayer security wrap A security wrap (20) for protecting an electronic component (16) having a bonding surface includes a substrate (22) having a first side and a second side opposite to each other. A first security screen (26) is disposed over the first side of the substrate (22) and includes a first pair of screen terminals (48) and a first conductive track (46) between the first pair of screen terminals (48). A second security screen (26) includes a second pair of screen terminals (48) and a second conductive track (46) between the second pair of screen terminals (48) and overlaying the first conductive track (46) on the first security screen (26). A layer of adhesive (30) is over a side of the second security screen (26) remote from the substrate (22) and bonds the second security screen (22) to the bonding surface of the electronic component (16).
US09209134B2	Method to increase interconnect reliability Methods to increase metal interconnect reliability are provided. Methods include forming a conformal barrier layer within an opening in a semiconductor device structure and forming a copper alloy material above the conformal barrier layer. Next, removing the copper alloy material that extends beyond the opening. Removing native oxide from a top surface of the copper alloy material. Further, annealing or applying a plasma treatment to the copper alloy material. Finally, forming a capping layer above the copper alloy material. Notably, near the top of the copper alloy material, smaller copper grain growth may be present. Furthermore, more non-copper alloy atoms are present near the top of the copper alloy material than the bulk of the copper alloy material.
US09209132B2	Semiconductor component and method of manufacture A common mode filter monolithically integrated with a protection device. In accordance with an embodiment a semiconductor material having a resistivity of at least 5 Ohm-centimeters is provided. A protection device is formed from a portion of the semiconductor material and a dielectric material is formed over the semiconductor material. A coil is formed over the dielectric material.
US09209130B2	Semiconductor device having ground shield structure and fabrication method thereof Semiconductor devices having a ground shield structure and methods for their formation are provided herein. An exemplary semiconductor device can include a substrate, a ground ring, a ground shield, an electronic device, and/or an insulation layer. The ground ring can be disposed over the substrate. The ground shield can be disposed over the substrate and surrounded by the ground ring. The ground shield can include a plurality of coaxial conductive wirings and a metal wire passing through the plurality of coaxial conductive wirings along a radial direction. The metal wire can be connected to the ground ring. The electronic device can be disposed over the ground shield. The insulation layer can be disposed between the ground shield and the electronic device.
US09209126B2	Self-aligned fine pitch permanent on-chip interconnect structures and method of fabrication An interconnect structure and methods for making the same include sidewall portions of an interlevel dielectric layer. The sidewall portions have a width less than a minimum feature size for a given lithographic technology and the width is formed by a thickness of the interlevel dielectric layer when conformally formed on vertical surfaces of a mandrel. The sidewall portions form spaced-apart openings. Conductive structures fill the spaced-apart openings and are separated by the sidewall portions to form single damascene structures.
US09209124B2	Chip package An embodiment of the invention provides a chip package including a semiconductor substrate having a first surface and a second surface opposite thereto. A conducting pad is located on the first surface. A side recess is on at least a first side of the semiconductor substrate, wherein the side recess extends from the first surface toward the second surface and across the entire length of the first side. A conducting layer is located on the first surface and electrically connected to the conducting pad, wherein the conducting layer extends to the side recess.
US09209120B2	Semiconductor package with lead mounted power bar A semiconductor package includes a lead frame having an interior region and leads surrounding the interior region, an integrated circuit, a region of insulating material, and a power bar. The integrated circuit, which is disposed in the interior region, has bond pads and electrical couplings (e.g., bond wires) between the bond pads and the leads. The region of insulating material is disposed on at least some of the lead frame leads and the power bar is disposed on the region of insulating material. There also are electrical couplings between the power bar and at least some of the bond pads.
US09209119B1	Semiconductor device assembled using two lead frames A packaged semiconductor device is assembled using a first lead frame upon which a die is mounted and encapsulated and a second lead frame that provides bent leads for the device. By using two different lead frames, an array of the first lead frames can be configured with more lead frames for more devices than a comparably sized lead frame array of the prior art because the first lead frame array does not need to provide the leads for the packaged devices. Instead, the leads are provided by the second lead frame array, which can be attached to the first lead frame array after the dies have been mounted and encapsulated on the first lead frame array.
US09209118B2	Integrated circuit arrangement An integrated circuit arrangement comprising a substrate and a flange disposed on top of the substrate. The flange comprises a cantilever portion configured to project over the substrate. A die disposed on top of the flange. A first output terminal disposed on the substrate. A first lead configured to provide for an electrical connection between the die and the first output terminal. A first electrically conducting member configured to provide at least part of a current return path between the substrate and the die and arranged to bridge a gap between the cantilever portion and the substrate. The first electrically conducting member is disposed between the die and the first output terminal and is configured to enable electrical current to flow from the substrate to the cantilever portion of the flange.
US09209109B2	IGBT with emitter electrode electrically connected with an impurity zone An IGBT includes a semiconductor portion with IGBT cells. Each IGBT cell includes a source zone of a first conductivity type, a body zone of a second, complementary conductivity type, and a drift zone of the first conductivity type separated from the source zone by the body zone. An emitter electrode includes a main layer and an interface layer. The interface layer directly adjoins at least one of the body zone and a supplementary zone of the second conductivity type. A contact resistance between the semiconductor portion and the interface layer is higher than between the semiconductor portion and a material of the main layer. For example, the interface layer may reduce diode emitter efficiency and reverse recovery losses in IGBTs.
US09209108B2	Method for forming a fine pattern using isotropic etching A method for forming a fine pattern using isotropic etching, includes the steps of forming an etching layer on a semiconductor substrate, and coating a photoresist layer on the etching layer, performing a lithography process with respect to the etching layer coated with the photoresist layer, and performing a first isotropic etching process with respect to the etching layer including a photoresist pattern formed through the lithography process, depositing a passivation layer on the etching layer including the photoresist pattern, and performing a second isotropic etching process with respect to the passivation layer. The second isotropic etching process is directly performed without removing the predetermined portion of the passivation layer.
US09209107B2	Electronic device, display device, and television receiver Provided is an electronic device whereby it is possible to suppress a decline in heat-dissipating properties. This liquid crystal display device (electronic device) (1) is provided with a semiconductor element (6a, 6b), a substrate (7) to which the semiconductor element is attached, and a chassis (5) disposed in opposition to the substrate and furnished with a rib (11, 12) that protrudes towards the semiconductor element side. The rib includes a contact part (11a, 12a) for contacting the semiconductor element. A pressing member (9) for inducing the semiconductor element into contact with the contact part is furnished at least at a position corresponding to the center part (7c) of the substrate.
US09209103B2	Battery heating circuits and methods based on battery discharging and charging using resonance components in series and current limiting components A circuit for heating a battery includes the battery including parasitic damping and current storage components, a switch unit, a switching control component coupled to the switch unit, a charge storage component, and a current limiting circuit. The damping component, current storage component, switch unit, and charge storage component are connected. The switching control component is configured to turn on and off the switch unit so as to control a first current flowing from the battery to the first charge storage component and a second current flowing from the first charge storage component to the battery. The current limiting circuit is configured to limit the second current flowing from the charge storage component to the battery. The circuit for heating the battery is configured to heat the battery by at least discharging and charging the battery.
US09209102B2	Passivation structure and method of making the same A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.
US09209099B1	Power semiconductor module A power semiconductor module is equipped with: a frame made of an insulator; a first electrode plate made of a metal and fixed to a bottom opening of the frame; semiconductor chips electrically and physically connected to the first electrode plate; a multilayer substrate fixed to a principal surface of the first electrode plate; wiring members that electrically connect front surface electrodes of the semiconductor chips and a circuit plate of the multilayer substrate; a second electrode plate fixed to a top opening of the frame; and a metal block that has a first surface having a projected portion and a second surface disposed on a side opposite to the first surface and that is tapered from the first surface to the second surface, the projected portion being electrically and physically connected to the circuit plate of the multilayer substrate and the second surface being electrically and physically connected to the second electrode plate.
US09209091B1	Integrated monolithic galvanic isolator A semiconductor device is described that includes a first electrical circuit and a second electrical circuit formed on a semiconductor on insulator wafer. The semiconductor on insulator wafer has a layer of semiconducting material formed over a buried layer of insulating material formed over a supporting layer of material. A wide deep trench is formed in the semiconductor on insulator wafer to galvanically isolate the first electrical circuit from the second electrical circuit. The first electrical circuit and the second electrical circuit are coupled together for exchanging energy between the galvanically isolated electrical circuits.
US09209085B2	Wafer processing method A wafer processing method includes a functional layer cutting step of applying a laser beam along each division line formed on a functional layer to thereby ablate the functional layer and form a laser processed groove along each division line. A protective member is attached to the front side of the functional layer. A groove is cut by positioning a cutting blade on the back side of the substrate in the area corresponding to each division line. The cut groove has a depth not reaching the functional layer. A dicing tape is attached to the back side of the substrate to support the outer circumferential portion of the dicing tape to an annular frame. The protective member is peeled off and the dicing tape attached to the back side of the substrate is expanded to increase the spacing between the devices.
US09209080B2	Semiconductor device comprising a protective structure on a chip backside and method of producing the same A semiconductor device includes a semiconductor chip including a first main face and a second main face. The second main face is the backside of the semiconductor chip. The second main face includes a first region and a second region. The second region is a peripheral region of the second main face and the level of the first region and the level of the second region are different. The first region may be filled with metal and may be planarized to the same level as the second region.
US09209075B2	Integration of optical components in integrated circuits Methodologies enabling integration of optical components in ICs and a resulting device are disclosed. Embodiments include: providing a first substrate layer of an IC separated from a second substrate level by an insulator layer; providing a transistor on the second substrate layer; and providing an optical component on the first substrate layer, the optical component being connected to the transistor.
US09209074B2	Cobalt deposition on barrier surfaces Embodiments of the invention provide processes for depositing a cobalt layer on a barrier layer and subsequently depositing a conductive material, such as copper or a copper alloy, thereon. In one embodiment, a method for depositing materials on a substrate surface is provided which includes forming a barrier layer on a substrate, exposing the substrate to dicobalt hexacarbonyl butylacetylene (CCTBA) and hydrogen to form a cobalt layer on the barrier layer during a vapor deposition process (e.g., CVD or ALD), and depositing a conductive material over the cobalt layer. In some examples, the barrier layer and/or the cobalt layer may be exposed to a gas or a reagent during a treatment process, such as a thermal process, an in situ plasma process, or a remote plasma process.
US09209071B2	Semiconductor structure with anti-etch structure in via and method for manufacturing the same A semiconductor structure includes a semiconductor substrate, a dielectric layer formed over the semiconductor substrate, a first anti-etch layer, a second anti-etch layer and a conductive material. The dielectric layer has an opening. The first anti-etch layer is formed on the sidewall of the opening and made of a material having resistance to peroxide. The second anti-etch layer is formed over the first anti-etch layer and made of a material having resistance to acid. The conductive material is formed within the opening and in contact with the second anti-etch layer.
US09209070B2	Manufacturing method of a semiconductor device and method for creating a layout thereof A method for manufacturing a semiconductor device of one embodiment of the present invention includes: forming an insulation layer to be processed over a substrate; forming a first sacrificial layer in a first area over the substrate, the first sacrificial layer being patterned to form in the first area a functioning wiring connected to an element; forming a second sacrificial layer in a second area over the substrate, the second sacrificial layer being patterned to form in the second area a dummy wiring; forming a third sacrificial layer at a side wall of the first sacrificial layer and forming a fourth sacrificial layer at a side wall of the second sacrificial layer, the third sacrificial layer and the fourth sacrificial layer being separated; forming a concavity by etching the insulation layer to be processed using the third sacrificial layer and the fourth sacrificial layer as a mask; and filling a conductive material in the concavity.
US09209069B2	Method of manufacturing high resistivity SOI substrate with reduced interface conductivity A method of preparing a high resistivity single crystal semiconductor handle wafer comprising implanting He ions through a front surface of the high resistivity single crystal semiconductor handle wafer, which is followed by an anneal sufficient to form a nanocavity layer in the damage region formed by He ion implantation. The anneal may be prior to or concurrent with thermal oxidation to prepare a front oxidized surface layer.
US09209067B2	Gap-fill methods Provided are gap-fill methods. The methods comprise: (a) providing a semiconductor substrate having a relief image on a surface of the substrate, the relief image comprising a plurality of gaps to be filled; (b) applying a gap-fill composition over the relief image, wherein the gap-fill composition comprises a self-crosslinkable polymer and a solvent, wherein the self-crosslinkable polymer comprises a first unit comprising a polymerized backbone and a crosslinkable group pendant to the backbone; and (c) heating the gap-fill composition at a temperature to cause the polymer to self-crosslink. The methods find particular applicability in the manufacture of semiconductor devices for the filling of high aspect ratio gaps.
US09209064B2	Apparatus for transferring substrates The present invention relates to an apparatus for transferring a substrate. The apparatus includes a supporting member; an elevating and rotating member; a transferring unit; a first arm whose one end is supported by the elevating and rotating member to be rotatable; a second arm whose one end is supported by the transferring unit to be rotatable and whose the other end is supported by the other end of the first arm to be rotatable; and an arm driving part, installed on the first arm, which drives the other end of the second arm to pivot on the other end of the first arm to allow the first arm and the second arm to be folded or unfolded and thus removes the state of singularity by rotating the other end of the second arm based on the other end of the first arm.
US09209063B2	Apparatus for transferring substrates The present invention relates to an apparatus for transferring a substrate. The apparatus includes a supporting member; an elevating and rotating member; a transferring unit; a first arm whose one end is supported by the elevating and rotating member to be rotatable; a second arm whose one end is supported by the transferring unit to be rotatable and whose the other end is supported by the other end of the first arm to be rotatable; and an arm driving part, installed on the first arm, which drives the other end of the second arm to pivot on the other end of the first arm to allow the first arm and the second arm to be folded or unfolded and thus removes the state of singularity by rotating the other end of the second arm based on the other end of the first arm.
US09209060B2	Mounting table structure and method of holding focus ring A mounting table structure includes a sheet, having thermal conductivity, provided between a focus ring and a base member; a pressing member having a pressing surface that presses the focus ring toward the base member and contact surfaces, facing downward, arranged at a predetermined interval in a circumferential direction thereof; and a supporting member that is connected to the base member and has first and second contact surfaces. Further, the first contact surfaces and the second contact surfaces are arranged at the predetermined interval in the circumferential direction such that the second and first contact surfaces are alternately arranged. Moreover, the first contact surfaces are located at a position different from that of the second contact surfaces in a height direction, and the contact surfaces of the pressing member are protruded at a distance larger than distances of the first and second contact surfaces in the height direction.
US09209056B2	Overhead buffer device and wafer transport system An overhead buffer device used for disposing in a semi-conductor factory includes a strut module and a plurality of buffer modules. The strut module disposed on the top wall of the factory has a horizontal beam and a plurality of overhead strut. The overhead strut is set on the horizontal beam and spaced arranged along the horizontal beam. The buffer modules are installed on the overhead strut respectively. Each buffer module has a plurality of buffers arranged in sequence and along a vertical direction. Each buffer is used for receiving one front opening unified pod (FOUP). Thus, the instant disclosure can be used for using the space of the factory efficiently. Besides, the instant disclosure also provides a wafer transport system having the overhead buffer device.
US09209051B2	Mounting apparatus and mounting method for flip chip bonding semiconductor chips using two-step pressing process In one embodiment the mounting apparatus mounts an upper chip on a lower chip, and thermally presses the upper chip with the lower chip. The mounting apparatus includes a first movement part for mounting the upper chip on the lower chip and preliminarily bonding by thermal pressing, and a second movement part for mainly bonding the plurality of upper chips preliminarily bonded with the plurality of lower chips for a longer time. The second movement part thermally presses the upper chips preliminarily bonded on the lower chip in a state that the upper chips are adsorbed on an adsorption surface parallel to a loading surface of the lower chip on which the upper chips are loaded.
US09209050B2	Laser crystallization system and method of manufacturing display apparatus using the same A laser crystallization system is disclosed. In one embodiment, the laser crystallization system includes i) a mother substrate including first, second, and third display regions sequentially arranged in a first direction and ii) a stage for supporting the mother substrate and moving in the first direction and in a second direction. The system also includes i) a first laser irradiation unit for irradiating a first laser beam having a width greater than or identical to a width of a side of one of the display regions in the first direction and ii) a second laser irradiation unit spaced apart from the first laser irradiation unit and irradiating a second laser beam having a width greater than or identical to the width of the side in the first direction. Furthermore, the first and second laser beams may correspond to widths of sides of the first and third display regions.
US09209047B1	Method of producing encapsulated IC devices on a wafer This method of waferscale packaging produces finished integrated circuits (ICs) individually completely encapsulated with environmentally protective packaging material while still in the wafer format. Following conventional semiconductor fabrication of chips at the wafer level and prior to their separation, a first polymer is applied to the front surface of the wafer with allowance for contact holes. A carrier wafer is attached to the exposed polymer. The original substrate is removed and the devices are separated by cutting through the semiconductor layer and the first polymer. A second polymer is applied to cover the exposed backside of the devices and to fill the cut spaces between them, thereby sealing the remaining five surfaces of the chips. The second polymer layer may also include contact holes for access to the back side of the device chips. A second singulation cutting leaves the chips on the wafer prepared for a pick-and-place operation.
US09209045B2	Fan out package structure and methods of forming An embodiment is a structure comprising a die having a pad on a surface and an encapsulant at least laterally encapsulating the die. The pad is exposed through the encapsulant. The structure further includes a first dielectric layer over the encapsulant and the die, a first conductive pattern over the first dielectric layer, and a second dielectric layer over the first conductive pattern and the first dielectric layer. The first dielectric layer and the second dielectric layer have a first opening to the pad of the die. The structure further includes a second conductive pattern over the second dielectric layer and in the first opening. The second conductive pattern adjoins a sidewall of the first dielectric layer in the first opening and a sidewall of the second dielectric layer in the first opening.
US09209041B2	Plasma processing method and plasma processing apparatus A plasma processing method performs an etching process of supplying a fluorine-containing gas into a plasma processing space and etching a target substrate, in which a silicon oxide film or a silicon nitride film is formed on a surface of a nickel silicide film, with plasma of the fluorine-containing gas (process S101). Then, the plasma processing method performs a reduction process of supplying a hydrogen-containing gas into the plasma processing space and reducing, with plasma of the hydrogen-containing gas, a nickel-containing material deposited on a member, of which a surface is arranged to face the plasma processing space, after the etching process (process S102). Thereafter, the plasma processing method performs a removal process of supplying an oxygen-containing gas into the plasma processing space and removing nickel, which is obtained by reducing the nickel-containing material in the reduction process, with plasma of the oxygen-containing gas (process S103).
US09209039B2	Methods of forming a reversed pattern in a substrate, and related semiconductor device structures A method of forming a reversed pattern in a substrate. A resist on a substrate is exposed and developed to form a pattern therein, the patterned resist having a first polarity. The polarity of the patterned resist is reversed to a second polarity, and a reversal film is formed over the patterned resist having the second polarity. The patterned resist having the second polarity is removed, forming a pattern in the reversal film. The pattern in the reversal film is then transferred to the substrate. Additional methods of forming a reversed pattern in a substrate are disclosed, as is a semiconductor structure formed during the methods.
US09209037B2	Methods for fabricating integrated circuits including selectively forming and removing fin structures Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming fin structures in a selected area of a semiconductor substrate. The method includes covering the fin structures and the semiconductor substrate with a mask and forming a trench in the mask to define no more than two exposed fin structures in the selected area. Further, the method includes removing the exposed fin structures to provide the selected area with a desired number of fin structures.
US09209034B2	Plasma etching method and plasma etching apparatus In a plasma etching method for etching a metal layer of a substrate to be processed through a hard mask by using a plasma etching apparatus, a first step in which a first etching gas comprising a mixed gas of O2, CF4 and HBr is used as an etching gas, and a second step in which a second etching gas comprising a mixed gas of O2 and CF4 is used as an etching gas, are continuously and alternately repeated a plurality of times. At this time, a first high-frequency power of a first frequency and a second high-frequency power of a second frequency, which is lower than the first frequency, are applied to a lower electrode, and the first high-frequency power is applied in a pulse form.
US09209032B2	Electric pressure systems for control of plasma properties and uniformity This disclosure relates to a plasma processing system for controlling plasma density near the edge or perimeter of a substrate that is being processed. The plasma processing system may include a plasma chamber that can receive and process the substrate using plasma for etching the substrate, doping the substrate, or depositing a film on the substrate. This disclosure relates to a plasma processing system for controlling plasma density near the edge or perimeter of a substrate that is being processed. In one embodiment, the plasma density may be controlled by reducing the rate of loss of ions to the chamber wall during processing. This may include biasing a dual electrode ring assembly in the plasma chamber to alter the potential difference between the chamber wall region and the bulk plasma region.
US09209031B2	Metal replacement process for low resistance source contacts in 3D NAND A fabrication process is provided for a 3D stacked non-volatile memory device which provides a source contact to memory holes at a bottom of a stack. The stack includes alternating control gate layers and dielectric layers on a substrate, and memory holes are etched through the stack. The process avoids the need to etch through films at the bottom of the memory hole. Instead, a path is formed from the bottom of the memory hole to the top of the stack. The path includes a horizontal portion using a voided trench in a substrate dielectric, and a passageway etched in the stack. The memory films, a channel material and a dielectric material are deposited throughout the interior surfaces of the void and the memory holes concurrently. The path is filled with metal to form a continuous, low resistance conductive path.
US09209025B2	Low temperature poly-silicon thin film, method for making the thin film, and transistor made from the thin film The present invention provides a method for making low temperature poly-silicon thin film, including the step of growing amorphous silicon layer, the step of firstly growing a layer of silicon oxide over the amorphous silicon layer; then forming a plurality of concave surfaces across the silicon oxide layer, wherein the concave surfaces will reflect light beams vertically projected toward the silicon oxide; and finally, the step of projecting excimer laser beam toward the amorphous silicon layer through the silicon oxide layer to transform the amorphous silicon layer into the low temperature poly-silicon thin film. The present invention further provides a low temperature poly-silicon thin film made from the method described above, and also a low temperature poly-silicon transistor. When the excimer laser annealing process is implemented to make the low temperature poly-silicon thin film, the starting point and direction of the recrystallization can be controlled so as to attain larger grain size.
US09209023B2	Growing III-V compound semiconductors from trenches filled with intermediate layers A method of forming an integrated circuit structure includes forming an insulation layer over at least a portion of a substrate; forming a plurality of semiconductor pillars over a top surface of the insulation layer. The plurality of semiconductor pillars is horizontally spaced apart by portions of the insulation layer. The plurality of semiconductor pillars is allocated in a periodic pattern. The method further includes epitaxially growing a III-V compound semiconductor film from top surfaces and sidewalls of the semiconductor pillars.
US09209020B2	Method of forming an epitaxial semiconductor layer in a recess and a semiconductor device having the same Semiconductor devices and methods of epitaxially forming a semiconductor layer in a recess of a semiconductor device are disclosed. In some embodiments, a method of epitaxially forming a semiconductor layer in a recess may include: providing a chemical vapor deposition system; placing a semiconductor substrate having a recess into the chemical vapor deposition system, wherein the semiconductor substrate includes at least one fissure extending from a surface of the recess into the semiconductor substrate; epitaxially forming a liner including a first semiconductor material within the recess and over the at least one fissure; and epitaxially forming a semiconductor layer including a second semiconductor material over the liner.
US09209014B2	Multi-step bake apparatus and method for directed self-assembly lithography control A method of forming a patterned substrate includes casting a layer of a block copolymer having an intrinsic glass transition temperature Tg, on a substrate to form a layered substrate. The method also includes heating the layered substrate at an annealing temperature, which is greater than about 50° C. above the intrinsic glass transition temperature Tg of the block copolymer, in a first atmosphere. The method further includes thermally quenching the layered substrate to a quenching temperature lower than the intrinsic glass transition temperature Tg, at a rate of greater than about 50° C./minute in a second atmosphere. The method further includes controlling an oxygen content in the first and second atmospheres to a level equal to or less than about 50 ppm to maintain the annealing and quenching temperatures below a thermal degradation temperature Td of the block copolymer.
US09209011B2	Method of operating film deposition apparatus and film deposition apparatus A method of operating a film deposition apparatus including a turntable provided in a vacuum chamber and configured to rotate a substrate mounted thereon, a first reaction gas supplying portion, a second reaction gas supplying portion, a separation area, a first vacuum evacuation port for mainly evacuating the first reaction gas, a second vacuum evacuation port for mainly evacuating the second reaction gas, and a cleaning gas supplying portion for supplying a cleaning gas to clean the turntable, the method includes a cleaning step of supplying the cleaning gas from the cleaning gas supplying portion into the vacuum chamber while terminating the evacuation from the first vacuum evacuation port and performing the evacuation from the second vacuum evacuation port.
US09209010B2	Substrate cleaning method and substrate cleaning device A substrate cleaning method includes removing a foreign material attached to a substrate while preventing deterioration of the substrate and any film formed on or above the substrate. A cleaning gas at a pressure between 0.3 MPa and 2.0 MPa is sprayed towards a wafer W with attached foreign material 22 placed in a near-vacuum, producing clusters 21 made up of a multitude of gas molecules 20, and the clusters 21 collide with the wafer W without undergoing ionization.
US09209009B2	Chunk polycrystalline silicon and process for cleaning polycrystalline silicon chunks The invention provides chunk polycrystalline silicon having a concentration of carbon at the surface of 0.5-35 ppbw. A process for cleaning polycrystalline silicon chunks having carbon contaminations at the surface, includes a thermal treatment of the polycrystalline silicon chunks in a reactor at a temperature of 350 to 600° C., the polycrystalline silicon chunks being present in an inert gas atmosphere during the thermal treatment, and the polycrystalline silicon chunks after the thermal treatment having a concentration of carbon at the surface of 0.5-35 ppbw.
US09209008B2	Fast start induction RF fluorescent light bulb A fast starting induction RF fluorescent lamp that is able to replace an ordinary incandescent light bulb, both in its ability to screw into a standard incandescent light bulb socket and to have the general look of the ordinary incandescent light bulb, but with all of the advantages of an induction lamp, as described herein. The present disclosure describes structures for an induction RF fluorescent lamp that includes a bulbous portion, an electronics portion, and a screw base, creating an external look that is similar to the profile of an ordinary incandescent light bulb, and with structures within the bulbous portion that facilitate rapid luminous development during the turn-on phase of the induction fluorescent lamp.
US09209006B2	Mass spectrometry There is provided an ion guide arrangement comprising a guide assembly comprising a plurality of elongate members arranged so as to be spaced about a common axis. The elongate members are capable of being in electrical association with one another so as to guide a stream of ions along an intended pathway substantially aligned with the axis. The or each elongate member is shaped at or near an end of the ion guide assembly so as to define a region capable of receiving a quantity of ions, whereby the or each elongate member is so shaped so as the region converges substantially toward the axis.
US09209004B2	Method and system for processing mass spectrometry data, and mass spectrometer Provided is a method for quantitatively estimating the probability of substance identification based on the result of an MS2 analysis using a certain MS1 peak as the precursor ion, before performing the MS2 analysis. Based on the result of MS1 and MS2 analyses and substance identification performed for each of a number of fractionated samples obtained from a known preparatory sample, an identification probability estimation model creator grasps m/z and S/N ratios of MS1 peaks having high probabilities of successful identification, calculates a parameter which determines the order of MS1 peaks and a parameter representing an identification probability estimation model, and stores the parameters in a memory. When identifying a substance, an approximate order is calculated for an MS1 peak obtained by the analysis. The identification probability for that peak is estimated from the approximate order with reference to the identification probability estimation model.
US09209001B2	Sputtering apparatus and sputtering method A sputtering apparatus includes: a vacuum chamber in which a target is to be disposed; a power supply to input power to the target; gas introduction device; exhaust device; and substrate holding device to hold a substrate to be processed. The substrate holding device includes: a chuck main body having positive and negative electrodes; a chuck plate having a rib portion capable of bringing a peripheral edge portion of the substrate into surface contact with the rib portion; and a multiplicity of supporting portions provided upright and arranged at predetermined intervals in an interior space surrounded by the rib portion; and a DC power supply to apply a direct voltage between the two electrodes. The sputtering apparatus suppresses a variation in film thickness among substrates.
US09208999B2	Coil section assembly for simulating circular coils for vacuum devices The invention relates to a vacuum treatment chamber, comprising a coil arrangement for generating a magnetic field in the chamber, wherein the coil arrangement comprises at least one first coil section and a second coil section, wherein the first coil section and the second coil section are arranged adjacent to each other in cross-section and preferably in one plane, such that at least a partial section of the first coil substantially follows the course of a partial section of the second coil, wherein the spacing of the first partial section from the second partial section is at least one order of magnitude smaller than the cross-section of the optionally smaller coil section.
US09208997B2	Method of etching copper layer and mask A method of etching a copper layer of a target object including, on the copper layer, a mask having a pattern to be transferred onto the copper layer is provided. The method includes etching the copper layer by using plasma of a first gas containing a hydrogen gas; and processing the target object by using plasma of a second gas containing a hydrogen gas and a gas (hereinafter, referred to as “deposition gas”) that is deposited on the target object. Further, the etching of the copper layer by using plasma of the first gas and the processing of the target object by using plasma of the second gas are repeated alternately.
US09208996B2	Ion implantation apparatus and ion implantation method An ion implantation apparatus includes a beamline device for transporting ions from an ion source to an implantation processing chamber. The implantation processing chamber includes a workpiece holder for mechanically scanning a workpiece with respect to a beam irradiation region. The beamline device may be operated under a first implantation setting configuration suitable for transport of a low energy/high current beam for high-dose implantation into the workpiece, or a second implantation setting configuration suitable for transport of a high energy/low current beam for low-dose implantation into the workpiece. A beam center trajectory being a reference in a beamline is equal from the ion source to the implantation processing chamber in the first implantation setting configuration and the second implantation setting configuration.
US09208988B2	Graphite backscattered electron shield for use in an X-ray tube The present invention is a shielded anode having an anode with a surface facing an electron beam and a shield configured to encompass the anode surface. The shield has at least one aperture and an internal surface facing the anode surface. The shield internal surface and anode surface are separated by a gap in the range of 1 mm to 10 mm. The shield of the present invention is fabricated from a material, such as graphite, that is substantially transmissive to X-ray photons.
US09208981B2	Information device A compact information device in which a shortened unlatch time is enabled so such device can transition from a power cutoff mode to a power supply mode to resume supplying power to internal circuits as a result of a latch circuit unlatching a control signal. Embodiments of such a device, which may be a printer, includes a CPU, a power switch, a capacitor, a switch circuit, an unlatch signal generating unit, and a switch control signal generator, which may include a latch circuit, and a potential difference detection circuit. The latch circuit and potential difference detection circuit operate with voltage Vin2. The CPU outputs a start latch signal VLT when the operating mode changes from the power supply mode to the power cutoff mode. When the power switch is turned off, the potential difference detection circuit outputs an unlatch signal VRST. When the unlatch signal VRST is input, the latch circuit unlatches the control signal.
US09208980B2	Pneumatic detector with integrated electrical contact The present disclosure relates to an advanced pneumatic detector (APD) alarm switch. The present APD may comprise a deformable diaphragm configured to make contact with a contact surface. This contact surface may be integral to a surface of the insulating material within the APD.
US09208979B2	High voltage DC breaker apparatus A high voltage DC breaker apparatus configured to break a fault current occurring in a high voltage DC conductor includes a current limiting arrangement having at least one section with at least one semiconductor device of turn-off type and at least one arrester connected in parallel therewith, and a mechanical DC breaker connected in series with the current limiting arrangement and including a mechanical switch. The mechanical DC breaker is configured to enable breaking of a fault current in said DC conductor once said semiconductor devices of said arrangement have been turned off.
US09208978B2	Electromagnetic operating device An electromagnet mechanism is coaxially disposed with a vacuum interrupter that is disposed in a circuit breaker, and has a movable core and a fixed core facing each other and an electromagnetic coil that makes the movable core and the fixed core separate or come into contact in response to electromagnetic force. A driving rod which is movably disposed in the axial direction of the electromagnet mechanism is coupled to the movable core, and in which one side is coupled to the circuit breaker and the other side passes through an opening side end plate of the electromagnet mechanism to be extended outward from the opening side end plate of the electromagnet mechanism. An indication unit is disposed on the opening side end plate of the electromagnet mechanism, and indicates a state of the circuit breaker in conjunction with the movement of the driving rod.
US09208975B2	Turn signal indicator device There is provided a turn signal indicator device that drives a turn signal indicators provided on a vehicle based on on/off states of a switch, and includes an operation state discrimination part that discriminates between first turn signal indication for lane change of the vehicle and second turn signal indication for course change of the vehicle based on on/off signals supplied from the switch.
US09208972B2	Slide fasteners A slide fastener includes rows of elements arranged so as to face one another along edges of opening-closing ends of opposing fastener tapes; and a slider. The slide fastener can be interposed between a powered device on an output side and a power supply unit and a signal unit on an input side so as to form an input-output line that activates the powered device with a closing operation of the slide fastener. The elements form a top holding section by bringing ends of element-upper-leg portions arranged so as to face one another closer to or away from one another; and a bottom holding section by bringing ends of element-lower-leg portions arranged to face one another closer to or away from one another in cooperation with interlock or separation of the interlock portions of the elements arranged to face one another, which form part of the input-output line.
US09208970B2	Key assembly for a handheld electronic device having a one-piece keycap A key assembly for an electronic device having a one-piece keycap and an electronic device having such a keycap are provided. In accordance with one embodiment, there is provided a key assembly for use in an electronic device, comprising: a keycap having a plurality of rigid key portions separated by mechanically deforming portions; and a flexible member having opposed first and second sides, the first side having a plurality of key stems which are attached to the plurality of key portions, the second side having a plurality of actuators for actuating dome switches of the electronic device.
US09208968B2	Liquidproof dome switch This is directed to a dome switch that may prevent liquid from coming into contact with circuit elements of the switch. A deformable dome may include a conductive inner surface region and may be placed over a conductive contact pad such that the dome may deform and the conductive elements may contact each other. At least one sheath may be positioned between the conductive region of the dome and the contact pad positioned below the dome for preventing liquid external to the one or more sheaths from contacting the conductive portions of the switch. In some embodiments, a first sheath may be coupled to the inner surface of the dome about the conductive inner surface region and a second sheath may be coupled to a mounting surface about the conductive contact pad, such that when a user deforms the dome, one of the sheaths may extend into the other sheath.
US09208967B2	Switching device A switching device that causes a force to act on an arc to diffuse the arc, has a magnet that generates a magnetic field in a direction orthogonal to a direction of the arc, the arc being generated at moment at which a movable member is brought into contact with or separated from a contact of a fixed member to switch between electric conduction and electric cutoff. The magnet is a plastic magnet in which metal is exposed to a surface of the magnet.
US09208959B2	Super capacitor structure and the manufacture thereof Disclosed is a super capacitor and method of manufacture thereof. This invention relates to a solid state super capacitor comprising a solid state polymer electrolyte and a modified carbonaceous electrode. Said modified carbonaceous electrode comprises a conductive carbonaceous material covered with active ingredients. Said modified carbonaceous electrode and said solid state polymer electrolyte are layered on top of each other to form a sandwich-like structure. Said super capacitor performs much better than known super capacitor comprising liquid or gel-form electrolytes. Said super capacitor has higher conductivity, therefore can be manufactured without a current collector. Since said super capacitor contains solid state polymer electrolyte, the method of manufacturing said super capacitor is more environmentally friendly and has a higher safety level.
US09208955B2	Dye-sensitized solar cell fabricating kit, dye-sensitized solar cell and method of using the same A dye-sensitized solar cell fabricating kit for fabricating a dye-sensitized solar cell includes a semiconductor electrode having a semiconductor layer carrying a dye, an opposite electrode disposed opposite the semiconductor electrode, an electrolytic solution made by dissolving electrolyte in a solvent and caused to fill between the semiconductor electrode and the opposite electrode during an initial assembly, the electrolytic solution being supplemented when decreased after assembly, so that an electrolyte concentration at the time of supplement is lower than an electrolyte concentration of the electrolytic solution supplied during the initial assembly, and a sealing member detachably attachable to an inlet through which the electrolytic solution is supplied between the semiconductor electrode and the opposite electrode to close the inlet.
US09208954B2	Electrolytic capacitor An electrolytic capacitor includes a capacitor element, an electrolyte solution with which the capacitor element is impregnated, and an outer package enclosing the capacitor element and the electrolyte solution. The capacitor element includes an anode foil having a dielectric layer on a surface thereof, a cathode foil, a separator disposed between the anode foil and the cathode foil, and a solid electrolyte layer in contact with the dielectric layer of the anode foil and the cathode foil. The electrolyte solution contains a low-volatile solvent that is at least one of polyalkylene glycol and a derivative of polyalkylene glycol.
US09208951B2	Capacitor and method of manufacturing capacitor A capacitor includes: dielectric layers including a first dielectric layer, a second dielectric layer, and at least one intermediate dielectric layer laminated between the first dielectric layer and the second dielectric layer; first interlayer electrode and second interlayer electrode arranged alternately with each other between at least two layers among the dielectric layers; a first external electrode disposed on lateral surfaces of the dielectric layers and coupled to the first interlayer electrode; and a second external electrode disposed on lateral surfaces of the dielectric layers and coupled to the second interlayer electrode, wherein the intermediate dielectric layer includes first internal electrodes coupled to the first interlayer electrode, arranged in a plane direction of the intermediate dielectric layer and spaced apart from each other, and second internal electrodes coupled to the second interlayer electrode, arranged alternately with the first internal electrodes and spaced apart from the first internal electrodes.
US09208947B2	Multilayer ceramic capacitor and board having multilayer ceramic capacitor embedded therein There is provided a multilayer ceramic capacitor, including a ceramic body including a plurality of dielectric layers stacked in a width direction and having upper and lower surface, first and second side surfaces, and first and second end surfaces, a first internal electrode formed on the dielectric layer and including a first lead part exposed to the upper and lower surfaces, a second internal electrode facing the first internal electrode, having at least one dielectric layer therebetween and having a second lead part exposed to the upper and lower surfaces, a first external electrode, a second external electrode, a first dummy pattern, and a second dummy pattern, wherein when a length of the ceramic body is B, a distance of the first lead part is C1, and a distance of the first dummy pattern is C3, 0.1≦(C1+C3)/B≦0.6 is satisfied.
US09208946B2	Multilayer ceramic electronic component and method of manufacturing the same There is provided a multilayer ceramic electronic component including a ceramic body including a plurality dielectric layers stacked thereon, a plurality of internal electrodes formed to be exposed to both end surface of the ceramic body, having the dielectric layer interposed therebetween, and external electrodes formed on the end surfaces of the ceramic body and electrically connected to the internal electrodes, respectively, wherein connectivity of the internal electrode is equal to or greater than 87%.
US09208942B2	Multi-layer-multi-turn structure for high efficiency wireless communication A structure for wireless communication having a plurality of conductor layers, an insulator layer separating each of the conductor layers, and at least one connector connecting two of the conductor layers wherein an electrical resistance is reduced when an electrical signal is induced in the resonator at a predetermined frequency.
US09208933B2	Electrical transformer assembly A support frame for an electrical transformer assembly, comprising two loop-shaped parts, each loop-shaped part having a plurality of limbs, each limb having a peripheral recessed portion in which a primary electrical coil is mountable, and at least one secondary coil is mountable in piggyback on the primary electrical coil, one limb of each loop-shaped part having a straight section. The frame also includes an adjustable attaching means for attaching one of the loop-shaped parts with respect to the other loop-shaped part and adjusting a distance therebetween, so that only the straight sections are adjacent and form a central leg, the central leg being for receiving a magnetic core distinct from the attaching means. The frame provides a means and a method to efficiently secure adjacent windings in a circular core transformer kernel.
US09208930B2	Voltage switchable dielectric material containing conductive core shelled particles A composition of voltage switchable dielectric (VSD) material that comprises a concentration of core shelled particles that individually comprise a conductor core and a shell, the shell of each core shelled particle being (i) multilayered, and/or (ii) heterogeneous.
US09208927B2	Shielded electrical cable A shielded electrical cable includes conductor sets extending along a length of the cable and spaced apart from each other along a width of the cable. First and second shielding films are disposed on opposite sides of the cable and include cover portions and pinched portions arranged such that, in transverse cross section, the cover portions of the films in combination substantially surround each conductor set. An adhesive layer bonds the shielding films together in the pinched portions of the cable. A transverse bending of the cable at a cable location of no more than 180 degrees over an inner radius of at most 2 mm causes a cable impedance of the selected insulated conductor proximate the cable location to vary by no more than 2 percent from an initial cable impedance measured at the cable location in an unbent configuration.
US09208924B2	Electrically conductive element, system, and method of manufacturing An electrically conductive element, including an insulator and a first conductor, is provided, which can be affixed to a second conductor consisting of conductive structural element, wherein the insulator is positioned between the first and second conductors to electrically isolate them. A power supply may be connected between the first and second conductors to provide power thereto, and an electrical device may be connected across the first and second conductors.
US09208923B2	Power cable comprising interpolymer compositions and methods for making the same Interpolymer resins having ethylene monomer residues and residues of a non-conjugated diene comonomer. The non-conjugated diene comonomer can be a dialkenyl phthalate. Incorporation of non-conjugated diene comonomers into interpolymers can provide additional labile unsaturation sites for cross-linking. The interpolymers and cross-linked variations thereof can be employed in a variety of articles of manufacture, such as, for example, as insulation material for power cables.
US09208922B2	Shield connector A first shield connector (20) includes a first housing 21 made of resin, wires (40), a shield member (50) to be mounted on the wires (40), and two brackets (61, 62) including a plate-like first shield member connecting portion (64) to be crimped to a peripheral edge of the shield member (50) and case connecting portions (65) to be connected to a case of a motor. The case connecting portions (65) are arranged at sides of the shield member connecting portions (64) arranged to face each other and bolt-fastened to the case in an overlapping state. The case connecting portions (65) are formed with a stopper (66) including a hole (66A). The first housing (21) is formed with retaining projections (23) to be inserted through the holes (66A). The brackets (61, 62) are held on the first housing (21) by inserting the retaining projections (23) through the holes (66A).
US09208921B2	Electrolyte membrane and process for producing the same An electrolyte membrane 5, 5a having different EW values in different regions provides durability comparable to that of an electrolyte membrane made of a single type of ion exchange resin (i.e., an electrolyte membrane having the same EW value in its entire regions). A process for manufacturing such electrolyte membrane is also provided. Two or more kinds of ion exchange resin membranes 1 and 2 having different EW values are disposed such that their edges overlap upon each other and are then placed on a lower die 11 of a hot press 10. An upper die 12 is moved closer to the lower die 11 to press the ion exchange resin membranes 1 and 2 while at least their overlapping region 3 is heated, whereby in the overlapping region 3 the respective ion exchange resins are fused and mixed integrally. The adjacent ion exchange resin membranes are thus integrally bonded to each other in a stable manner, thus forming an electrolyte membrane 5.
US09208920B2	Unitary graphene matrix composites containing carbon or graphite fillers A unitary graphene matrix composite comprising: (a) a unitary graphene matrix containing an oxygen content of 0.001% to 10% by weight, obtained from heat-treating a graphene oxide gel at a temperature higher than 100° C. and contains no discrete graphene platelets derived from the graphene oxide gel; (b) a carbon or graphite filler phase selected from carbon or graphite fiber, carbon or graphite nano-fiber, carbon nano-tube, carbon nano-rod, meso-phase carbon particle, meso-carbon micro-bead, exfoliated graphite flake with a thickness greater than 100 nm, exfoliated graphite or graphite worm, coke particle, needle coke, carbon black or acetylene black particle, activated carbon particle, or a combination thereof. The carbon or graphite filler phase is preferably in a particulate, filamentary, or rod-like form dispersed in and bonded by the unitary graphene matrix. This composite exhibits a combination of exceptional thermal conductivity, electrical conductivity, mechanical strength, surface hardness, and scratch resistance.
US09208918B2	Computerized tomography (CT) imaging system with multi-slit rotatable collimator Apparatus for collimating an X-ray beam, the apparatus including a multi-slit rotatable collimator including a semi-tubular structure extending coaxially along a longitudinal axis and being formed out of an X-ray impermeable material, with at least two slits formed in the semi-tubular structure, wherein the at least two slits extend parallel to the longitudinal axis of the semi-tubular structure, a mount for rotatably supporting the semi-tubular structure in the path of an X-ray beam, and a drive mechanism for selectively rotating the semi-tubular structure about the longitudinal axis of the semi-tubular structure, whereby to selectively (i) position one slit in the path of the X-ray beam so as to tailor the X-ray beam to the width of that slit, and (ii) position a solid portion of the semi-tubular structure in the path of an X-ray beam so as to block an X-ray beam.
US09208916B2	Methods for manufacturing three-dimensional devices and devices created thereby In certain exemplary embodiments of the present invention, three-dimensional micro-mechanical devices and/or micro-structures can be made using a production casting process. As part of this process, an intermediate mold can be made from or derived from a precision stack lamination and used to fabricate the devices and/or structures. Further, the micro-devices and/or micro-structures can be fabricated on planar or nonplanar surfaces through use of a series of production casting processes and intermediate molds. The use of precision stack lamination can allow the fabrication of high aspect ratio structures. Moreover, via certain molding and/or casting materials, molds having cavities with protruding undercuts also can be fabricated.
US09208914B2	System, method and apparatus for providing additional radiation shielding to high level radioactive materials A system, method and apparatus for providing radiation shielding to a ventilated cask for holding high level radioactive materials. In one aspect, the tubular shell is positioned to circumferentially surround the cask so that an annular gap exists between the tubular shell and a sidewall of the cask. The tubular shell includes a first air flow inlet and a second air flow inlet. An air flow barrier is placed within the annular gap, separating the annular gap into a first chamber and a second chamber. A first air flow into the first air flow inlet passes through the first chamber and into the inlet vent of the cask, a second air flow into the second air flow inlet passes through the second chamber and to an opening at the top end of the tubular shell, and the air flow barrier prohibits cross-flow of air between the first and second chambers.
US09208912B2	Composite metal foam and methods of preparation thereof The present invention is directed to composite metal foams comprising hollow metallic spheres and a solid metal matrix. The composite metal foams show high strength, particularly in comparison to previous metal foams, while maintaining a favorable strength to density ratio. The composite metal foams can be prepared by various techniques, such as powder metallurgy and casting.
US09208911B2	Full spectrum LOCA evaluation model and analysis methodology This invention relates to a computational system and method for performing a safety analysis of a postulated Loss of Coolant Accident in a nuclear reactor for a full spectrum of break sizes including various small, intermediate and large breaks. Further, modeling and analyzing the postulated small break, intermediate break and large break LOCAs are performed with a single computer code and a single input model properly validated against relevant experimental data. Input and physical model uncertainties are combined following a random sampling process, e.g., a direct Monte Carlo approach (ASTRUM-FS) and advanced statistical procedures are utilized to show compliance with Nuclear Regulatory Commission 10 CFR 50.46 criteria.
US09208908B2	Method of repairing shroud support and repair apparatus thereof A shroud support of a BWR includes a shroud support cylinder, shroud support legs welded to a bottom of a reactor pressure vessel (RPV) and a shroud support cylinder, and an annular shroud support plate disposed between the RPV and the shroud support cylinder and welded to the RPV and the shroud support cylinder. A support apparatus is set a CRD housings installed to the bottom of the RPV. A rail guide member horizontally set to the support apparatus reaches directly below the shroud support plate through an opening between the shroud support legs. A bent rail is set on the rail guide member. The bent rail setting a repair device is pushed out along the rail guide member toward the RPV through the opening portion by the rail push-out apparatus set on the support apparatus. The bent rail is spread at directly below the shroud support plate.
US09208904B2	Reinforcement for a nuclear fuel assembly A tie rod for reinforcing a nuclear fuel assembly. The tie rod includes an outer, hollow tubular member that extends from above the top nozzle through the bottom nozzle of the fuel assembly and has an axially split lower tip with an enlarged end and an upper portion having a circumferential threaded region. An inner rod extends axially through the hollow of the outer tube and has a slightly enlarged tip which spreads the split tip of the outer tube to lock the split tip below the lower nozzle of the fuel assembly. A nut is turned down on the upper threaded portion of the outer hollow tube and staked in position to lock the tie rod in position.
US09208902B2	Bitline leakage detection in memories An integrated circuit containing a memory and a sense amplifier. The integrated circuit also containing an extended delay circuit which extends the delay between when a precharged bitline is floated and when a wordline is enabled. A method of testing an integrated circuit to identify bitlines with excessive leakage.
US09208900B2	System and method for performing address-based SRAM access assists A method and a system are provided for performing address-based memory access assist. An address is received for a memory access and a determination is made, based on the address, that access assist is enabled for at least one storage cell corresponding to the address. The access assist is applied to the at least one storage cell to perform the memory access.
US09208899B2	Universal test structures based SRAM on-chip parametric test module and methods of operating and testing An integrated circuit on-chip parametric (OCP) test structure includes a static random access memory (SRAM) universal test structure (UTS) having UTS ports and an OCP controller configured to determine first and second UTS ports of the SRAM UTS for independent connection to first and second on-chip test pads, respectively. The integrated circuit OCP test structure further includes a UTS OCP router connected to the OCP controller and configured to connect the first and second UTS ports of the SRAM UTS to the first and second on-chip test pads, respectively. Methods of operating an integrated circuit OCP test structure and OCP testing of an integrated circuit are also included.
US09208898B2	Semiconductor device and operating method of semiconductor device A semiconductor device includes a plurality of stacked chips, a reference through silicon via (TSV) set passing through the plurality of stacked chips, a plurality of TSVs passing through the plurality of stacked chips, a reference delay information generation unit suitable for generating a reference delay information indicating an amount of delay of the reference TSV set and a determination unit suitable for determining abnormality of the plurality of TSVs by comparing a first test signal with each of a plurality of second test signals, wherein the first test signal is an initial test signal delayed by an amount of delay corresponding to the reference delay information, and wherein each of the plurality of second test signals is the initial test signal delayed by corresponding one of the plurality of TSVs.
US09208897B2	Configuring storage cells Apparatuses, systems, methods, and computer program products are disclosed for configuring storage cells. A method includes determining a usage history for a set of storage cells of a solid-state storage medium. A method includes adjusting a voltage threshold for a set of storage cells by an amount based at least in part on a usage history. A method includes configuring a set of storage cells to use an adjusted voltage threshold.
US09208896B2	Nonvolatile semiconductor memory device A nonvolatile semiconductor memory device includes a write control unit that performs a first write operation with respect to a first threshold distribution, a first verify operation on the first threshold distribution, and a second write operation on the basis of a result of the first verify operation, and then starts a third write operation with respect to a second threshold distribution.
US09208891B2	Memory array with power-efficient read architecture Various embodiments comprise apparatuses and methods including a three-dimensional memory apparatus having upper strings and lower strings. The upper strings can include a first string of memory cells and a second string of memory cells arranged substantially parallel and adjacent to one another. The lower strings can include a third string of memory cells and a fourth string of memory cells arranged substantially parallel and adjacent to one another. The strings can each have a separate sense amplifier coupled thereto. The first and third strings and the second and fourth strings can be configured to be respectively coupled in series with each other during a read operation. Additional apparatuses and methods are described.
US09208879B2	Fail address detector, semiconductor memory device including the same and method of detecting fail address A fail address detector includes cam latch groups configured to store fail addresses and a comparing section connected to the cam latch groups in common and configured to detect whether or not a fail address corresponding to a comparison address exists among the fail addresses received from the cam latch groups. The cam latch groups share the comparing section in time division.
US09208877B2	Semiconductor integrated circuit with data transmitting and receiving circuits Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit and a data receiving circuit that receives data transmitted from the data transmitting circuit. The data transmitting circuit includes a data output circuit that outputs the data or sets an output to a high impedance state, and a control circuit that outputs a control signal to the data output circuit so that the data output circuit outputs the data when the data transmitting circuit transmits the data, and the data output circuit keeps outputting data last output in the previous data transmission, during a predetermined period after the previous data transmission when the data transmitting circuit further transmits another data after transmitting the data.
US09208876B1	Verify pulse delay to improve resistance window Structures and methods for controlling operation of a programmable impedance element are disclosed herein. In one embodiment, a method of programming/erasing the programmable impedance element can include: (i) receiving a program/erase command to be executed on the programmable impedance element; (ii) generating, in response to the program/erase command, a program/erase pulse for performing a program/erase operation on the programmable impedance element; (iii) generating a time delay from the program/erase pulse, where the time delay includes additional delay to allow for at least partial dissipation of one or more effects caused by the program/erase operation; and (iv) performing, after the time delay has elapsed, a verify operation to determine if the program/erase operation has successfully programmed/erased the programmable impedance element.
US09208873B2	Non-volatile storage system biasing conditions for standby and first read Methods for reducing power consumption of a non-volatile storage system and reducing first read latency are described. The non-volatile storage system may include a cross-point memory array. In some embodiments, during a standby mode, the memory array may be biased such that both word lines and bit lines are set to ground. During transition of the memory array from the standby mode to a read mode, a selected word line comb may be set to a read voltage while the unselected word lines and the bit lines remain at ground. During the read mode, memory cells connected to the selected bit lines and the selected word line comb may be sensed while the selected bit lines are biased to a selected bit line voltage equal to or close to ground and the unselected bit lines are left floating after initially being set to ground.
US09208870B2	Multi-port memory devices and methods having programmable impedance elements A memory device can include at least two ports for transferring data to and from the memory device; and plurality of memory cells, each memory cell including at least one element programmable between different impedance states, and a plurality of access devices, each access device providing a current path between the element and a different one of the ports.
US09208863B1	Memory system and method of controlling memory system A controller performs a coding process based on a first frame including data of a plurality of pages connected to first word lines being a predetermined number of consecutive word lines in a block, and performs, when padding data is written to a plurality of pages connected to second word lines being the predetermined number of word lines subsequent to the first word lines, the coding process based on a second frame obtained by excluding the padding data from a frame including data of the pages connected to the second word lines.
US09208860B2	SRAM bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter Described is an apparatus comprising a plurality of memory arrays, local write assist logic units, and read/write local column multiplexers coupled together in a group such that area occupied by the local write assist logic units and the read/write local column multiplexers in the group is smaller than it would be when global write assist logic units and the read/write global column multiplexers are used. Described is a dual input level-shifter with integrated latch. Described is an apparatus which comprises: a write assist pulse generator operating on a first power supply; one or more pull-up devices coupled to the write assist pulse generator, the one or more pull-up devices operating on a second power supply different from the first power supply; and an output node to provide power supply to a memory cell.
US09208857B2	SRAM multiplexing apparatus An SRAM multiplexing apparatus comprise a plurality of local multiplexers and a global multiplexer. Each local multiplexer is coupled to a memory bank. The global multiplexer has a plurality of inputs, each of which is coupled to a corresponding output of the plurality of local multiplexers. In response to a decoded address in a read operation, an input of a local multiplexer is forwarded to a corresponding input of the global multiplexer. Similarly, the decoded address allows the global multiplexer to forward the input signal to a data out port via a buffer.
US09208854B2	Three dimensional dual-port bit cell and method of assembling same A three dimensional dual-port bit cell generally comprises a first portion of a latch disposed on a first tier, wherein the first portion includes a plurality of first port elements. A second portion of the latch is disposed on a second tier that is vertically stacked with respect to the first tier using at least one via, wherein the second portion includes a plurality of second port elements.
US09208853B2	Dual-port static random access memory (SRAM) In one embodiment, a memory cell circuit for storing data includes a pair of cross-coupled inverters for storing states of the memory cell circuit. Access devices provide access to the pair of cross-coupled inverters. The memory cell circuit also includes a set of electrically inactive p-type metal oxide semiconductor (PMOS) devices that are coupled to the pair of cross-coupled inverters. The set of electrically inactive PMOS devices in combination with a portion (e.g., PMOS devices) of the pair of cross-coupled inverters enables a continuous p-type diffusion layer for the memory cell circuit.
US09208849B2	Semiconductor device and method for driving semiconductor device, and electronic device The memory circuit has a first writing mode in which data can be retained for a long time and a second writing mode in which data can be written at high speed. The memory circuit in which data reading is performed on the basis of a determined conductive state of a transistor includes first and second capacitor parts that are connected through a switch and retain electric charge corresponding to the data. The first writing mode is a mode where the switch is on and electric charge corresponding to the data is accumulated in the first and second capacitor parts that are electrically connected. The second writing mode is a mode where the switch is off, electric charge corresponding to the data is accumulated in the first capacitor part, and electric charge corresponding to the data is not accumulated in the second capacitor part.
US09208847B2	Memory devices with improved refreshing operations A method and a system for memory cell programming and erasing with refreshing operation are disclosed. The system includes a selecting module, a processing module and a refresh module. In the method, at first, a target memory cell from a plurality of memory cells in a memory device is selected. Thereafter, the target memory cell belonging to a line of the matrix is programmed or erased by applying a selecting voltage on the target memory cell and a location-related memory cell belonging to the line of the matrix. Then, a refreshing operation to refresh the location-related cell is performed.
US09208846B2	Frequency resistance access magnetic memory The invention provides a multibit magnetic memory structure comprising a stack of two or more magnetic plaquettes, each of which has at least three distinct magnetic states. The invention provides for a new type of vertical memory where each layer encodes information in two degrees of freedom, which has the potential to increase the theoretical storage capacity by factor 4n. The information is read, through the resonant frequency of the stack or through a combination of the resonant frequency and resistance.
US09208841B2	Tracking circuit A circuit is in a memory macro and comprises a write path, a read path, a selection circuit, and a clock generator circuit. The write path includes a first signal generated based on a first edge of a clock signal in a write operation of the memory macro. The read path includes a second signal generated based on a first edge of the clock signal in a read operation of the memory macro. The selection circuit is configured to select the first signal as a third signal in the write operation of the memory macro, and to select the second signal as the third signal in the read operation of the memory macro. The clock generator circuit is configured to generate a second edge of the clock signal in the write operation or in the read operation based on the third signal.
US09208840B2	Semiconductor memory device having an electrically floating body transistor A method for performing a holding operation to a semiconductor memory array having rows and columns of memory cells, includes: applying an electrical signal to buried regions of the memory cells, wherein each of the memory cells comprises a floating body region defining at least a portion of a surface of the memory cell, the floating body region having a first conductivity type; and wherein the buried region of each memory cell is located within the memory cell and located adjacent to the floating body region, the buried region having a second conductivity type.
US09208838B2	Terminal for accessing wireless network and running method thereof Disclosed in the disclosure are a terminal for accessing a wireless network and a method for running the same, wherein the terminal includes an expanded external RAM and is configured to store the terminal firmware program obtained from the host side into the expanded external RAM, run the same and interact with the host side to complete a service. the terminal in the disclosure need not expand the FLASH storage space, and the terminal stores the terminal firmware program obtained from the host side into the expanded external RAM thereof, then runs the same and interacts with the host side to complete the service. The terminal does not use FLASH to store the terminal firmware program, avoiding the failure of not being able to be upgraded or used, wherein the failure is due to the exception of the terminal FLASH and reducing the costs of the wireless network access terminal.
US09208837B2	Apparatus and method for data movement The present disclosure relates to an apparatus and method capable of carrying out data movement in a memory of a terminal. The apparatus includes a processor configured to transmit a command for data movement and address information for data movement in a memory to the memory, and the memory configured to perform the data movement in units of word line in the memory by using the address information, in response to reception of the command for moving the data.
US09208835B2	Timing violation handling in a synchronous interface memory A phase-change memory includes a phase to provide an upper row address from a row address buffer, a phase to combine the upper row address with a lower row address to select data for a row data buffer, and a phase to output the data from the row data buffer, where an activate command starts and following activate commands are ignored until a preset time has elapsed.
US09208834B2	Latch circuit, nonvolatile memory device and integrated circuit A latch circuit may include a plurality of latches configured to operate in response to power supplied to a pull-up power supply node and a pull-down power supply node, a delay unit configured to generate a 1st delayed reset signal and a 2nd delayed reset signal by delaying a 1st reset signal and a 2nd reset signal, a power supply unit configured to supply identical power to the pull-up power supply node and the pull-down power supply node in response to the activated 1st reset signal or the activated 2nd reset signal, a 1st reset unit configured to reset a plurality of latches to a 1st level in response to the 1st delayed reset signal and a 2nd reset unit configured to reset the plurality of latches to a 2nd level in response to the 2nd delayed reset signal.
US09208830B2	Semiconductor memory device A semiconductor memory device includes a memory cell, a pair of local bit lines connected to the memory cell, first and second transistors, one end of the current channel of each connected to a power supply and the other end of the current channel of each connected to one of the local bit lines, third and fourth transistors, one end of the current channel of each connected to one of the local bit lines, the other end of the current channel of each connected to one of the global bit lines, fifth and sixth transistors, one end of the current channel of each connected to one of the global bit lines and the other end of the current channel of which connected to the power supply. The device further includes a control unit configured to control the transistors.
US09208823B2	System and method for managing address mapping information due to abnormal power events A method and apparatus for managing address map information are disclosed. In one embodiment, an apparatus may comprise a processor configured to store address map changes to a first data storage medium, save the address map changes to a nonvolatile data storage medium when an abnormal power state is detected, and when the power state is no longer abnormal retrieve the last saved address map information and address map changes and update the address map information using the address map changes. The apparatus may be configured to retrieve the instructions for the processor operation over a network connection.
US09208818B1	Replication of tape cartridge data Embodiments of the present invention disclose methods, computer program products, and systems for replicating data stored on a tape cartridge on one or more computing devices. In one embodiment, initiation of a replication sequence begins in response to at least one of: receiving a manual prompt of a user, loading of a first tape cartridge to be replicated into a first tape drive, receiving a request from a backup program, or occurrence of a predetermined time. When priming a first tape cartridge for writing of data, the first tape cartridge is configured for replication to a second tape cartridge. After loading the first tape cartridge into a first tape drive, data stored on the first tape cartridge can be directly transmitted from the first tape drive to a second tape drive in which the second tape cartridge is loaded without using an intermediate host computer system to facilitate data transfer.
US09208817B1	System and method for determination and reallocation of pending sectors caused by media fatigue System and method are disclosed for managing storage space of a magnetic storage device. The system may read data from a sector of the storage space and determine whether the data are successfully read from the sector. If it is determined that the data are not successfully read from the sector, the system may retrieve an address of the sector. The system may further determine whether the sector is subject to media fatigue based on the address. If it is determined that the sector is subject to media fatigue, the system may reallocate the sector subject to media fatigue to a spare sector.
US09208814B2	CD player and method for ejection control thereof A compact disc (CD) player and method for ejection control thereof is provided. The CD player has: a CD tray, an eject button, a front-end module, a back-end module, and a fast response eject module, wherein the front-end module and the back-end module are coupled to each other and integrated in an integrated circuit (IC). The fast response eject module has a tray control module for detecting a status of the eject button, and an ejection detection module for controlling the ejecting/inserting of the CD tray according to the detected status of the eject button after the CD player is powered up and before the front-end module starts to work. The CD player of the invention may quickly respond to the status of the eject button and control ejecting/inserting of the CD tray immediately after the CD player is powered up.
US09208812B2	Soft magnetic alloy for magnetic recording medium, sputtering target material, and magnetic recording medium There is provided a soft magnetic alloy for a perpendicular magnetic recording medium having a low coercive force, high amorphous properties, high corrosion resistance, and a high hardness; and a sputtering target for producing a thin film of the alloy. The alloy comprises in at. %: 6 to 20% in total of one or two of Zr and Hf; 1 to 20% of B; and 0 to 7% in total of one or two or more of Ti, V, Nb, Ta, Cr, Mo, W, Ni, Al, Si, and P; and the balance Co and/or Fe and unavoidable impurities. The alloy further satisfies 6≦2×(Zr%+Hf%)−B%≦16 and 0≦Fe%/(Fe%+Co%)<0.20.
US09208811B1	Apparatus and method for measuring pole tip protrusion ratio for a slider Methods and apparatuses are implemented to cause a first contact event between a slider and a magnetic recording medium at a first operating temperature, the slider comprising at least a writer, a writer heater, a reader, and a reader heater. Methods and apparatuses are implemented to cause a second contact event between the slider and the medium at a second operating temperature different from the first operating temperature, determine a flying height displacement of the slider for the contact events, and optionally store the flying height displacement.
US09208806B2	Near-field light generator including a waveguide and a plasmon generator A plasmon generator includes a first portion and a second portion. A core of a waveguide includes a main body portion and a protruding portion. The main body portion has a first surface and a second surface parallel to each other. The protruding portion lies on the first surface. A cladding of the waveguide includes a receiving-portion-forming layer lying on the first surface. At least part of the first portion of the plasmon generator is received in a receiving portion defined by the protruding portion and the receiving-portion-forming layer.
US09208798B2	Dynamic control of voice codec data rate A method, system, and computer-usable non-transitory storage device for dynamic voice codec adaptation are disclosed. The voice codec adapts in real time to devote more bits to audio quality when it is most needed, and fewer bits to less important parts of utterances are disclosed. Dialog knowledge is utilized for compression opportunities to adjust the bitrate moment-by-moment, based on the inferred value of each frame. Frame importance and appropriate transmission fidelity is predicted based on prosodic features and models of dialog dynamics. This technique provides the same communications quality with less spectrum needs, fewer antennas, and less battery drain.
US09208797B2	Tone detection for signals sent through a vocoder A tone detector and associated method for use with EVRC-B and GSM vocoders to enable reliable detection of system connect tones over a wireless communication system. The tone detection method examines a number of sequential data frames of the signal received from the vocoder and determines that the tone is present if the spectral energy at frequencies around the tone is much higher than that at neighboring frequencies and if the calculated center frequency of the data frames is at or near the frequency of the tone.
US09208789B2	Reduced complexity converter SNR calculation An audio encoder configured to encode an audio signal to generate a bitstream having E-AC-3 format, including by determining a first control parameter indicative of an allocation of available mantissa bits for quantized audio content of the signal. The encoder is configured to perform transcoding simulation to determine a second control parameter in a manner based at least in part on statistical analysis of results of E-AC-3 bit allocation processing of audio data assuming a first target data rate, and of AC-3 bit allocation processing of the data assuming a second target data rate, and to include the second control parameter in the bitstream for use by a converter to convert the bitstream into a second bitstream having AC-3 format at the second target data rate. Other aspects are converters configured to perform transcoding on a bitstream using such a second control parameter, and methods performed by any embodiment of the inventive encoder or converter.
US09208788B2	Method and apparatus for responding to a query at a dialog system A dialog system is accessed by a remote user and is typically configured to receive a natural language query from the user and return a natural language answer to the user. Dialog systems can be copied without authorization or can become an out-of-date version. A dialog system with a signature, referred to herein as a “signed” dialog system, can indicate the signature without affecting usage by users who are unaware that the dialog system contains the signature. The signed dialog system can respond to input such that only the designer of the dialog system knows the signature is embedded in the dialog system. The response is a way to check the source or other characteristics of the dialog system. A designer of signed dialog systems can prove whether an unauthorized copy of the signed dialog system is used by a third party by using publically-available user interfaces.
US09208787B2	Method and device for the natural-language recognition of a vocal expression The invention relates to a method and a device for the natural-language recognition of a vocal expression. A vocal expression of a person is detected and converted into a voice signal to be processed by a voice recognition device. Afterwards, the voice signal is analyzed at the same time or sequentially in a plurality of voice recognition branches of the voice recognition device using a plurality of grammars, wherein the recognition process is successfully completed if the analysis of the voice signal in at least one voice recognition branch supplies a positive recognition result.
US09208784B2	Methododolgy for live text broadcasting A Transcription Engine is able to broadcast over the Internet streaming text associated with a broadcast to registered and authenticated end users who may be hearing impaired or may have difficulty understanding the language used in the broadcast. The end users' understanding of the information being broadcast is improved because of the availability of the associated text. The Transcription Engine comprises an authentication server, a database server and a Transcription server. End users are first registered automatically at a website associated with the Transcription Engine. Registered end users can then login and are authenticated automatically by the Transcription Engine prior to being given access to a live or recorded broadcast of associated text. The end users thus obtain access to the associated text broadcast via the Internet after having been authenticated by the Transcription Engine.
US09208781B2	Adapting speech recognition acoustic models with environmental and social cues An acoustic model adaptation system includes a memory device and a model selector engine coupled to the memory device. The model selector engine is configured to compile information of environmental conditions to identify a current speech environment for audio input into a speech recognizer on a device. The model selector engine is further configured to compare the information of the environmental conditions with profiles of acoustic models. Each profile associates with an acoustic model. Each acoustic model compensates for background noise or acoustical distortions of the audio input. The model selector engine is further configured to select a first acoustic model for the speech recognizer based on the information of the environmental conditions exclusive of audio input from the user.
US09208776B2	System and method for speech-enabled access to media content by a ranked normalized weighted graph Disclosed herein are systems, methods, and computer-readable storage media for generating a speech recognition model for a media content retrieval system. The method causes a computing device to retrieve information describing media available in a media content retrieval system, construct a graph that models how the media are interconnected based on the retrieved information, rank the information describing the media based on the graph, and generate a speech recognition model based on the ranked information. The information can be a list of actors, directors, composers, titles, and/or locations. The graph that models how the media are interconnected can further model pieces of common information between two or more media. The method can further cause the computing device to weight the graph based on the retrieved information. The graph can further model relative popularity information in the list. The method can rank information based on a PageRank algorithm.
US09208772B2	Communications headset speech-based gain control A gain of a signal representing sounds detected by a talk-through and/or feedforward ANR microphone of a talk-through function provided by a communications headset is reduced in response to a user of the communications headset speaking.
US09208770B2	Noise event suppression for monitoring system A noise event suppression technique for a monitoring system detects a noise event in a signal waveform when a focal sample in the waveform has an amplitude greater than an amplitude of algorithmically determined earlier and later samples in the waveform that are noncontiguous with the focal sample. When the monitoring system detects the noise event, the monitoring system reduces the amplitude of the focal sample to an amplitude between those of the earlier and later samples. The monitoring system outputs data determined using the waveform once noise events have been adequately suppressed.
US09208767B2	Method for adaptive audio signal shaping for improved playback in a noisy environment Provided is a method for adaptively enhancing an end-user's perceived quality, or quality of experience (QoE), of speech and other audio under ambient noise conditions. The method comprises the steps of determining the ambient noise characteristics on a continuous basis to capture the time varying nature of ambient noises, and adaptively determining the most optimal signal shaping to be applied to the audio/speech signal to produce the most appropriate enhancement to compensate for the ambient noise impairment. The method also comprises a signal shaping technique by using an infinite impulse response (IIR) filter that performs the signal modification with a low delay; a multi-level automatic gain control (AGC); and a controlled amplitude clipping module that assures samples are below a certain limit; and outputs the modified signal for playback through a loudspeaker or the like.
US09208766B2	Computer program product for adaptive audio signal shaping for improved playback in a noisy environment Provided is a computer program product for adaptively enhancing an end-user's perceived quality, or quality of experience (QoE), of speech and other audio under ambient noise conditions. The computer program product comprises the steps of determining the ambient noise characteristics on a continuous basis to capture the time varying nature of ambient noises, and adaptively determining the most optimal signal shaping to be applied to the audio/speech signal to produce the most appropriate enhancement to compensate for the ambient noise impairment. The computer program product also comprises a signal shaping technique by using an infinite impulse response (IIR) filter that performs the signal modification with a low delay; a multi-level automatic gain control (AGC); and a controlled amplitude clipping module that assures samples are below a certain limit; and outputs the modified signal for playback through a loudspeaker or the like.
US09208765B1	Audio visual presentation with three-dimensional display devices Certain aspects of the present disclosure relate to an audio visual display device, which includes a transparent display module, a sensing module, and a controller. The sensing module generates sensing signals in response to detecting an object at a disc jockey side of the transparent display module. The controller includes stores computer executable codes which, when executed at a processor, are configured to: generate display signals for the transparent display module to control its pixels to display an image corresponding to the display signals; receive the sensing signals from the sensing module, and generate an object coordinate according to the sensing signals; in response to an audio visual display instruction, generate the display signals corresponding to a virtual disc jockey equipment; and in response to the object coordinate matching coordinates of the virtual disc jockey equipment, generate an audio effect command for the virtual disc jockey equipment.
US09208764B2	Methods and devices for determining media files based on activity levels Example methods and systems for determining media files based on activity levels are described. An example method includes receiving information indicative of a first speed of the computing device, and receiving information indicative of a geography of a location of the computing device. The method further includes determining, from a plurality of media files tagged with respective tempo identifiers, a first media file based on the geography of the location of the computing device and also having a tempo that substantially matches to the first speed of the computing device. The method includes providing an indication of the first media file to a media player, and based on a change in the first speed of the computing device to a second speed, determining from the plurality of media files tagged with respective tempo identifiers, a second media file having a tempo that substantially matches to the second speed.
US09208763B2	Method, apparatus and software for providing user feedback A device for providing feedback to a user of a string instrument is described. The device comprises receiving circuitry operable in use to communicate with at least one finger sensor capable of detecting the force of a finger on a string, a camera operable in use to capture an image and a display operable in use to display data, wherein the receiving circuitry, camera and display are connected to processing circuitry which is operable to: detect, from the receiving circuitry, the force of a user's finger on at least one string at a given time; detect, from the camera, the position of the user's finger on the at least one string at the given time; compare the detected force of the user's finger and the position of the user's finger on the at least one string at the given time with a predetermined value of force and position at the given time; and generate, on the basis of the said comparison, feedback to display on the display.
US09208760B2	Percussion instrument with interior porting Disclosed is a novel “cajon” or box percussion instrument. A cuboid or rectangular shaped percussion instrument has six sides. It usually consists of five (5) panels of equal thickness with at least one panel of a thinner more flexible sixth panel which vibrates when percussed. One or more chambers and interior porting system are included in improve tonal quality. One or more external port openings, usually rectangular in shape, are formed in the unit to permit sound to emanate. Different external port geometries including shapes and sizes are contemplated. Encompassed in a single unit, the chamber delivers distinct independent tones. In some models, an interior resonating baffle and reflective block have been introduced to direct sound waves and air flow out of the exterior port opening creating a greater larger frequency range and greater amplification. In one example multiple independent chambers and interior porting system are included to improve the tonal quality.
US09208756B2	Musical instrument with aggregate shell and foam filled core A musical instrument includes a body having an outer shell, an internal cavity defined by that outer shell and a center plate dividing that internal cavity into a first chamber and a second chamber. In one embodiment, a foam core fills the internal cavity.
US09208753B2	Unauthorized viewer detection system and method A system for detecting and responding to an intruding camera. The system includes an electronic media display device having a screen configured to display content, a sensor, and a processing circuit. The processing circuit is configured to obtain information from the sensor, analyze the information to determine a presence of a camera, and edit any displayed content in response to the presence of the camera.
US09208746B2	Signal transmission systems of electronic display devices and transmission methods A signal transmission system of electronic display devices includes a plurality of electronic display devices and a wireless signal transmission device. The wireless signal transmission device broadcasts a first packet data to the electronic display device. The first packet data comprises an access control address list, and the access control address list comprises the MAC address of a first group of electronic display device. When the wireless signal transmission device receives an acknowledgement (ACK) message from at least a first electronic display device of the first group of electronic display devices, the wireless signal transmission device changes the method of transmission from broadcast to unicast in order to transmit second packet data to the first electronic display device, wherein the second packet data comprises video packet data.
US09208745B2	Shift register and gate driving circuit using the same Disclosed are a shift register, and a gate driving circuit including a plurality of shift registers connected in sequence to respectively supply scan signals to a plurality of gate lines of a display device. Each shift register includes: an input unit which outputs a directional input signal having a gate high or low voltage based on an output signal from a previous or subsequent shift register to a first node; an inverter unit which is connected to the first node, generates an inverting signal to a signal at the first node, and outputs the inverting signal to a second node; and an output unit which includes a pull-up unit connected to the first node and activating an output clock signal based on the signal at the first node, and a pull-down unit activating and outputting a pull-down output signal based on a signal at the second node.
US09208743B2	Active matrix display device A display driving circuit having a shift register is formed on the display panel. The shift register includes a first stage having first and second transistors and a second stage having a third and fourth transistor. A voltage of a control electrode of the first transistor is boosted by a voltage of a first pulse line changing from low to high. In an On state, the second transistor connects the control electrode of the first transistor and a constant voltage line. A voltage of a control electrode of the third transistor is boosted by a voltage of a second pulse line changing from low to high. In an On state, the fourth transistor connects the control electrode of the third transistor and a constant voltage line. The fourth transistor is switched on by a signal from the first stage.
US09208742B2	Semiconductor device, driver circuit, and display device To provide a semiconductor device including a narrowed bezel obtained by designing a gate driver circuit. A gate driver of a display device includes a shift register unit, a demultiplexer circuit, and n signal lines. By connecting the n signal lines for transmitting clock signals to one stage of the shift register unit, (n−3) output signals can be output. The larger n becomes, the smaller the rate of signal lines for transmitting clock signals which do not contribute to output becomes; accordingly, the area of the shift register unit part is small compared to a conventional structure in which one stage of a shift register unit outputs one output signal. Therefore, the gate driver circuit can have a narrow bezel.
US09208741B2	Display panel On a display panel 10, a first scanning signal line drive circuit 12 is formed along a side of a display region 11 and a second scanning signal line drive circuit 13 is formed along the opposite side by the same process as pixel circuits. The size of a transistor included, the width of a wiring line, or the like, differs between the first and second scanning signal line drive circuits 12 and 13, and the two scanning signal line drive circuits have different sizes in a lateral direction. By this, the center of the display region matches that of a non-integral-type display panel, ensuring compatibility with the non-integral-type display panel. Moreover, by suitably determining the widths of or spacings between wiring lines included in the two scanning signal line drive circuits, leakage between the wiring lines and breaks in the wiring lines are reduced, improving yield of display panels.
US09208732B2	Liquid crystal display device and its driving method An LCD device includes a driver and a timing controller. The driver includes at least one or more gate driving IC for outputting a scan signal to a plurality of gate lines of a panel, and at least one or more data driving IC for respectively outputting a plurality of image data signals to a plurality of data lines of the panel. The timing controller determines whether a current mode is an abnormal mode in which the panel outputs an abnormal image by using at least one or more lock signals, outputs a driver control signal generated for controlling the driver when the current mode is determined as a normal mode, and outputs a masking control signal, which makes the panel not to output the abnormal image, to the driver when the current mode is determined as the abnormal mode.
US09208731B2	Display apparatus employing frame specific composite contributing colors This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for displaying images using a frame-specific contributing color (FSCC). In one aspect, an input is configured to receive image data corresponding to a current image frame. Contributing color selection logic is configured, based on received image data, to obtain a FSCC for use in conjunction with a set of frame-independent contributing colors (FICCs) to generate the current image frame on a display. In addition, subframe generation logic is configured to process the received image data for the current image frame to generate at least two subframes for each of the FICCs and the obtained FSCC such that an output by the display of the generated subframes results in the display of the current image frame.
US09208730B2	Optimization of light source drive values in backlight systems A method of optimizing the luminance level of a backlight system is presented. The method entails dividing the backlight system into zones, each of the zones having a light source; determining a target illumination level for each of the zones based on data values of a display panel that is to be illuminated by the backlight system; and setting a backlight drive value of the light source in a particular zone based on target illumination level of the particular zone and a backlight drive value assigned to its neighboring zone. The invention makes high-quality image display achievable with reduced power consumption by taking advantage of the “communal” aspect of the zones in a local dimming backlight system. In determining the backlight drive value of a zone, the invention takes into account the illumination contributions from neighboring zones.
US09208728B2	Display apparatus with backlight driving circuit and control method thereof A display apparatus and a control method thereof are disclosed. The display apparatus includes a signal processor which processes a video signal; a display which displays an image based on the video signal processed by the signal processor, a light source providing light for displaying the image; and a driving circuit which drives the light source on the basis of a dimming signal having an on-section and an off-section for dimming the light source. The driving circuit includes a protection circuit for performing a protection operation as a result of an abnormal electric current flowing in the light source during the off-section. The display apparatus is protected when a short circuit occurs between the light source and the driving circuit, thereby enhancing the stability and reliability of the apparatus.
US09208726B2	Pixel circuit, display device, driving method of pixel circuit, and driving method of display device A pixel circuit includes a drive transistor that has a gate connected to an input node and a source connected to an output node. The drive transistor supplies a driving current to an electrooptic element via the output node. A sampling transistor is connected between the input node and a signal line and samples an input signal from the signal line, which is retained in a retaining capacitance connected to the input node. The magnitude of the driving current is based on a value of the retained signal. The pixel circuit further includes a compensating circuit which detects a decrease in the driving current attendant on a secular change of the drive transistor from a side of the output node and feeds back a result of the detection to a side of the input node to compensate for the decrease.
US09208715B2	Display device with threshold voltage compensation and driving method thereof A display device is provided that can provide sufficient time for threshold voltage compensation of a driving transistor of each pixel during high-speed driving of the display device, and a method for driving the same. A data writing and threshold voltage compensation step of pixels at odd and even-numbered lines are concurrently performed during an extended time period so that the time available for threshold voltage compensation of the driving transistors can be increased.
US09208714B2	Display panel for refreshing image data and operating method thereof A display panel is provided, including an image data storage capacitor, a capacitive element, and four switches. The image data storage capacitor stores an image data. The sample unit has a control terminal for receiving a sample control signal. The capacitive element has a first terminal coupled to a pixel electrode of the image data storage capacitor via the sample unit. The first refresh unit has a control terminal coupled to the first terminal. The second refresh unit has a control terminal for receiving a refresh control signal. The third and first refresh units are serially coupled with each other between a corresponding source line and the image data storage capacitor for receiving a data signal. The shunt unit has a control terminal coupled to the pixel electrode, a data terminal coupled to the first terminal, and another data terminal for receiving a shunt control signal.
US09208712B2	Method of driving a display panel using switching elements between data channels and data lines and display panel driving apparatus for performing the method A display panel driving apparatus includes a first switching element and a second switching element. The first switching element applies first pixel data to a first pixel connected with a first data line of a display panel during a first sub frame period. The first switching element is connected with a data channel of a data driving part. The second switching element applies second pixel data having a level higher than a level of the first pixel data to a second pixel connected with a second data line of the display panel during a second sub frame period. The second switching element is connected with the data channel. Thus, display quality of a display apparatus may be enhanced.
US09208711B2	Apparatus and method for driving display An apparatus for driving a display includes a shift register, a first latch unit, a second latch unit, a data comparison unit and a level select unit. The shift register generates multiple latch signals according to a sync signal. The first latch unit latches a data signal in response to the latch signals to obtain multiple first data corresponding to multiple channels. The second latch unit is coupled to the first latch unit and latches the first data of the channels as multiple second data in response to a latch data signal. The data comparison unit responds to the latch data signal to respectively compare the first data and the second data corresponding to the same channel to output multiple third data corresponding to the channels. The level select unit selects multiple voltage levels corresponding to the channels according to the third data.
US09208708B2	Electro-optical device and electronic apparatus An electro-optical device includes a first pixel circuit provided so as to correspond to a first data line, a second pixel circuit provided so as to correspond to a second data line, a first storage capacitor of which one end is connected to the first data line and the other end is potential-shifted according to a current to be supplied to a light emitting element of the first pixel circuit, a second storage capacitor of which one end is connected to the second data line and the other end is potential-shifted according to a current to be supplied to a light emitting element of the second pixel circuit, and a constant potential line provided between the first storage capacitor and the second storage capacitor in plan view.
US09208707B2	Display window member for portable terminal and method for fabricating the same A method for fabricating a display window member for a portable terminal includes: fabricating a surface sheet to be attached to a surface of the window member; introducing the surface sheet into a mold; and molding the body of the window member by pouring poly synthetic resin into the mold, and at the same time, attaching the surface sheet to the outer surface of the body. Since the window member fabrication method employs a dual injection molding using polymer synthetic resin, the fabrication method can easily reduce the weight of the window member compared to the conventional fabrication method using a glass material only and can reinforce the surface hardness of the window member while easily fabricating the window member.
US09208706B1	Modular lawn sign and its associated method of assembly A prefabricated sign assembly that is self-supporting once set in the ground. The sign assembly has a base post. The base post has a bottom ground spike and a top free end. An extender post is provided. The extender post slides over the top of the base post. An internal support post is provided. The bottom of the internal support post slides over the top of the extender post. A sign board is provided having a first face panel and a second face panel. The two face panels are joined at a spine panel. A polygonal hole is disposed through the spine panel. The internal support post extends through the hole, wherein the internal support post and the hole rotationally interlock. The first face panel and the second face panel of the sign board are folded against the internal support post and are secured with fasteners.
US09208704B2	Hybrid self illuminated and actively back lit signage for printed graphics Hybrid signage capable of self illumination and having an active backlight. The signage includes a turning film having a structured surface for redirecting light in order to passively illuminate a printed graphic or shaped sign when the backlight is off. In the shaped sign, the shape provides the content, such as letters, to be conveyed to the viewer instead of a graphic. The signage can be actively illuminated when the backlight is on to supplemental the passive illumination.
US09208699B2	Thermally printable adhesive label A linerless label roll of repositionable labels adapted to be printed in varying lengths comprising a web of thermally printable paper wound along a running axis and having a continuous length of adhesive on one side of the web so that when a length of the web is caused to be thermally printed it will have an adhesive on the reverse side thereof that extends in a uninterrupted manner along the entire length of the thermally printed web.
US09208698B2	Device, method, and graphical user interface for manipulating a three-dimensional map view based on a device orientation An electronic device displays on a display a first three-dimensional map view of a respective map location. The first three-dimensional map view is viewed from a first angle while an orientation of the electronic device corresponds to a first orientation. The electronic device detects a rotation of the electronic device with at least one orientation sensor, and determines a respective orientation of the electronic device. The respective orientation is distinct from the first orientation. While detecting the rotation of the electronic device, the electronic device updates the first three-dimensional map view with a respective three-dimensional map view of the respective map location. The respective three-dimensional map view is viewed from a respective angle distinct from the first angle. The respective angle is determined in accordance with the respective orientation of the electronic device.
US09208697B2	Information display device, information display method, and program A method is provided for displaying information. The method comprises displaying, on a touch screen, at least one representation of a geographic location. The method further comprises detecting contact between an operating member and a position on the touch screen; and displaying, based on the detected contact, information associated with the geographic location. The method still further comprises detecting removal of the operating member from the touch screen; and maintaining display of the geographic location information after detection of the removal.
US09208696B2	Lung compliance simulation system and associated methods A patient simulator system for teaching patient care is provided. The system includes a patient simulator. The patient simulator includes a patient body comprising one or more simulated body portions. The one or more simulated body portions include a lung compliance simulation system in some instances. In that regard, the lung compliance system is configured to be used with an external ventilator, including positive end-expiratory pressure (PEEP) and assisted-control ventilation. In some instances, the lung compliance system includes a lung compartment, a simulated lung positioned within the lung compartment, where the lung compartment defines an available volume for the simulated lung to expand into and where the available volume for the simulated lung to expand into is adjustable to control a compliance of the simulated lung.
US09208695B2	Language study system and method employing multifaceted block device representation system A composition in the target language is parsed into plural different linguistic components, including sound level, grammar level and at least one functional grammar level component. The linguistic components are then expressed on different facets of an n-sided block device representation system according to predefined sets of rules. The facets of the block device may then be selectively examined by the learner to visualize how the target language functions to express the composition with respect to the way sounds, grammar and functional grammar are used. The block device representation system may be computer-implemented, rendering the facets on display panels associated with physical blocks, or as computer-generated images upon a display device.
US09208694B2	Security door breach training system A security door breach training system comprising a frame, a door attached to the frame, a latch attached to the door having a latching end, a plurality of elongate members fixed to the frame, at least one retaining pin adjacent to the frame and having a stub, a latch-receiving member positioned between the frame member and the stub of the at least one retaining pin, a elongate body having a first end attached to the third surface of the frame member and a free second end; and at least one bar attached between two of the elongate members.
US09208688B2	Wind calculation system using a constant bank angle turn A method and apparatus for operating an aircraft. The aircraft is flown at a constant bank angle in which the aircraft crosses an intended ground track for the aircraft. Information is identified about a wind using positions of the aircraft flying at the constant bank angle.
US09208686B2	Vehicle rear monitor There is provided a vehicle rear monitor displaying an image suitable for backing a vehicle, without requiring a switching operation. A rear camera mounted on a vehicle captures an image of a rear side of the vehicle, such image being processed to generate a top-down or perspective view displayed on an image output unit. The vehicle rear monitor comprises an image display control unit for setting a displayed image. When a gear detection unit has detected that a back gear is selected through a transmission, an image switching unit allows a predetermined top-down or perspective view to be displayed on the image output unit. When the gear detection unit has detected that the back gear is again selected after being thrown out, the image switching unit allows the image output unit to display the top-down or perspective view displayed before the back gear is thrown out, or a desired view.
US09208685B2	Navigation device, navigation system, and method of operating the same A navigation device and a method of operating the same are provided. Further, a method of operating a navigation system including a navigation device, a data server and an electronic device is provided. The navigation device includes a communication unit; a display; an input unit for receiving an input of data; a communication unit; and a controller for controlling operation of the display and the input unit. The controller connects to a data server through the communication unit, requests path setting information to the data server, receives the path setting information from the data server, acquires present position information of the navigation device, acquires a user moving path by reflecting the acquired position information and the received path setting information, and sets the user moving path as a guidance path. In this case, the path setting information is generated in another electronic device or the data server based on user input information input from the another electronic device.
US09208684B2	Travel optimization system A device may obtain information associated with a traffic light. The traffic light may control a flow of traffic associated with a first location. The device may obtain travel information associated with a mobile device and determine, based on the travel information, that the mobile device is located at a second location, that is different from the first location, and is traveling toward the first location. The device may determine a projected status of the traffic light based on the information associated with the traffic light and the travel information. The projected status of the traffic light indicating a status of the traffic light at a time the mobile device is projected to arrive at the first location. The device may transmit information identifying the projected status to the mobile device.
US09208680B2	Remote commissioning of an array of networked devices A system and method for identification of a particular one device from an array of networked devices. Each of the devices are individually addressable by a controller on the network, and a technician preferably identifies a particular one device by use of a handheld remote control. Pointing one of transmitter/receiver pair at a device including the complementary component allows remote disambiguation based upon ranging and signal strength, particularly when using a pair of orthogonal antennas to discriminate and confirm which particular device is being pointed to by the remote. Optional confirmation helps improve identification robustness, and then the properly identified device may be configured/commissioned.
US09208676B2	Devices, methods, and associated information processing for security in a smart-sensored home This patent specification relates to apparatus, systems, methods, and related computer program products for providing home security objectives. More particularly, this patent specification relates to a plurality of devices, including intelligent, multi-sensing, network-connected devices, that communicate with each other and/or with a central server or a cloud-computing system to provide any of a variety of useful home security objectives.
US09208675B2	Loitering detection in a video surveillance system A behavioral recognition system may include both a computer vision engine and a machine learning engine configured to observe and learn patterns of behavior in video data. Certain embodiments may be configured to learn patterns of behavior consistent with a person loitering and generate alerts for same. Upon receiving information of a foreground object remaining in a scene over a threshold period of time, a loitering detection module evaluates the whether the object trajectory corresponds to a random walk. Upon determining that the trajectory does correspond, the loitering detection module generates a loitering alert.
US09208672B2	System and method for medical diagnosis using geospatial location data integrated with biomedical sensor information In at least one embodiment, a method and system for accumulating geospatial location data and biomedical data for an individual during his/her travels is provided. In at least one embodiment, a device uses at least one location signal to determine geospatial data and receives a plurality of biomedical signals with both data types being stored for possible later retrieval for providing a diagnosis for the individual if a medical condition arises. An embodiment of the invention provides a method of operation of a device having at least a memory and a communications module where the method includes receiving at least one location signal with the communications module; storing geospatial data obtained at least from the at least one location signal with a time stamp in memory; receiving a plurality of biomedical signals over time from at least one sensor with the communications module; storing biomedical data from the received biomedical signal with a time stamp in memory; and repeating the receiving at least one location signal and storing geospatial data from the at least one location signal in different geographic locations.
US09208665B2	Automated, remotely-verified alarm system with intrusion and video surveillance and digital video recording An automated self-monitored alarm verification solution including at least a premises portion, a server portion, and an end user device portion. Alarm verification includes capturing by an image capture device at least one image in response to a detection event, and transmitting a first data signal including the image to a local signal processing device. The signal processing device transmits a second signal including at least a portion of the image to a remote hosted server according to at least a first set of predetermined parameters. After receiving the second signal, the server transmits a third signal including at least a portion of the image from the hosted server to a user device. Using the user device, a user views the image and indicates a validity status of the alarm based at least in part on the content of the image. Based at least upon either the validation status indicated by the user, or upon a failure to receive a message including a validation status from the user within a predetermined duration of time, the server portion may send an alarm signal to an emergency response service.
US09208661B2	Context dependent application/event activation for people with various cognitive ability levels The system includes a computer-readable memory having a data structure configured with electronic data indicative of the patient's cognitive ability and/or context information relevant to the patient. The computer system is programmed to dynamically present information based on the patient's cognitive ability and/or context, obtained by accessing the computer-readable memory. The system is thus able to dynamically customize the way the system interacts with the patient, dynamically rendering information and automatically launching specific applications and events based on set parameters to meet the assistive needs of the patient. The system also captures information about the patient's health and wellbeing which is dynamically communicated to the caregiver, which information is also in part based on cognitive ability of the patient and/or context.
US09208659B2	Structure for positioning operating unit A positioning structure, which fixes an operating unit (1) by a fixing bracket (4) and an adjusting bracket (2) provided with stoppers (3), easily performs the positioning that prevents the positions of the stoppers (3) from being displaced due to a customer's pressing force acted to the operating unit (1). Inclined rectangular holes (6) are formed at the adjusting bracket (2), and the adjusting bracket is fixable after fastening positions of fixing screws (5) are adjusted along the rectangular holes (6). Alternatively, step shaped rectangular holes (16) are formed, and the adjusting bracket is fixable after fastening positions of the fixing screws 5 are adjusted along the rectangular holes (16).
US09208651B2	Wagering game apparatus and method with enhancement parameter dictated by prior play A gaming system for conducting a wagering game includes a display device configured to portray wagering game outcomes indicated by symbols populated in symbol arrays. The gaming system receives a first wager and displays a first symbol array to indicate the outcome for the first wager. The gaming system receives a second wager and displays a second symbol array to indicate the outcome for the second wager. During portrayal of the second outcome, the first symbol array is displayed simultaneously with the second symbol array, and the first symbol array is modified according to one or more symbols in the second symbol array. The gaming system provides an award according to the improvement, if any, in the second symbol array resulting from the modification.
US09208645B2	Integrating social contact identifiers into wagering games Described herein are processes and devices that integrate social contact identifiers into wagering games. Some embodiments include providing game play elements configured for use in presentation of possible outcomes for a wagering game, wherein the wagering game is associated with a first player account stored on an account server. Some embodiments further include selecting, via one or more processors, a second player account indicated in the first player account as a social contact of a player associated with the first player account. Some embodiments further include, via at least one of the one or more processors, providing a social contact identifier of the second player account for use in the wagering game to represent at least a portion of at least one of the game play elements.
US09208642B2	Multiplayer slot machine gaming Slot Machine Arena provides computerized method and system for managing slot machine gaming sessions, including: adding a plurality of mutually competing players to a multiplayer session wherein a plurality of players play against one another, each added by a module of a hosting client terminal; receiving from each player a bet; calculating an outcome of the gaming session; instructing an outcome rendering on a respective display of each hosting client terminal; and crediting at least one player and debiting at least another player according to the outcome. Other aspects of these embodiments relate to a computer readable medium of computer executable instructions adapted to perform the method; and to a client terminal, interfaced with the gaming system wherein the terminal includes secure wireless communications with the server.
US09208641B2	Remote gaming method allowing temporary inactivation without terminating playing session due to game inactivity A mobile gaming device may be a player's own personal tablet, smartphone, PDA, etc., with an application program installed via the internet for carrying out a remote gaming session. All gaming functions are carried out by a stationary gaming terminal communicating with the mobile device, such as by using WiFi. The mobile device operates as a user interface. If the communications link is temporarily broken during a game, the mobile device will create the appearance that the game is continuous, such as by continuing to spin reels, until communications are reestablished. The reels will stop once the mobile device receives the final outcome from the gaming terminal. The player may pause the game to temporarily suspend the minimum game frequency rules. The mobile device may switch between gaming terminals. For 3D video, the original format is adjusted for the mobile device. The gaming terminal may be a gaming machine.
US09208637B2	Bonus with proximity of occurrence related to base game outcomes or payback percentage Each play of a base game increases the likelihood of winning a bonus award. A display provides a graphical indication of the change in likelihood of winning the bonus award. In one aspect, the bonus award comprises the opportunity to play a secondary game. In another aspect, winning the bonus award may be based on payback percentage or outcomes of the base game. In yet another aspect, the timing of the next bonus award can be configured, or otherwise based on one or more conditions.
US09208635B2	Item dispensing apparatus Various embodiments of the present invention are directed to a dispenser configured for storing one or more items and dispensing the stored items to authorized users. According to various embodiments, the dispenser generally includes a housing defining an interior portion dimensioned to receive a plurality of items and an access assembly configured to prevent unauthorized user access to the interior portion of the dispenser while providing selective access to certain items in response to input received from an authorized user. According to various embodiments, the access assembly comprises a pair of flexible barriers coupled to a sliding door assembly, which includes one or more lockable access doors. Together, the door assembly and flexible barriers prevent access to the interior of the dispenser when in a locked configuration and permit access to certain items when in an unlocked configuration.
US09208631B2	Banknote bundling device, banknote bundling method, and banknote bundling system A banknote bundling device (3) makes a bundle of banknotes by bundling with a bundling tape one-hundred bundling-object-banknotes of a specific kind from among a plurality of banknotes. The banknote bundling device (3) includes a serial-number identification unit (16) that acquires a serial number for identify the banknote for each banknote, a bundle-ID creating unit (183) that creates a bundle ID associated with the serial number of each banknote of the bundle of banknotes for each bundle of banknotes, and a print control unit (184) that controls a printer (55) to print the bundle ID created by the bundle-ID creating unit (183) on the bundling tape of the bundle of banknotes for each bundle of banknotes. Therefore, a financial institution can adequately handle a false claim regarding a valid bundle of banknotes.
US09208629B2	Garage door open alert A garage door can be detected as being open by sensing various physical conditions the existence of which indicate the garage door as being open. When a door is determined to be open, a notification message is wirelessly transmitted to a predetermined entity or person notifying them that the door is open. Corrective action can then be taken to close the door to keep the vehicle and contents of the garage secure.
US09208628B2	Electronic locks particularly for office furniture An electronic cam lock accessible either by PIN code or wirelessly transmitted code from a user's credential has a compact electronics housing that fits neatly and unobtrusively in office furniture, including metal or wood file cabinets. The housing has a rear-extending driver, which may be within a cylinder, preferably positioned where the driver of a cam lock of conventional keyed configuration would be located. One form of the lock is front-recess mounted. In another form the housing is inside-mounted, fitted within the usually one-inch top rail or vertical side rail of a file cabinet, with the electronic access terminal and a rotatable knob exposed for the user. The locks can be connected in a wired or wireless network for controlling access by time or by personnel, or for auditing entries.
US09208627B2	Scan tool with integrated global positioning system A diagnostic tool and method are provided wherein the diagnostic tool includes a global positioning system. The diagnostic tool can provide diagnostic data, global position and altitude to the user. The diagnostic tool can alert the user or the owner if the tool determines that it has been removed from a predefined area. The tool retrieves data from the determined altitude so that the vehicle can be serviced for optimal operations at that altitude.
US09208626B2	Systems and methods for segmenting operational data Various embodiments of the present invention are directed to an efficiency management system configured for evaluating various operational efficiencies based on operational data. In certain embodiments, the efficiency management system is adapted for use as a vehicle fleet management system and configured for receiving operational data from a fleet of vehicles and vehicle operators, and for segmenting the received operational data into a plurality of activity segments. Various embodiments of the vehicle fleet management system may also be further configured for generating a graphical representation of the identified activity segments.
US09208624B2	Time window authentication for vehicle telematics device One embodiment is directed to a method of authenticating a vehicle telematics device. The method includes receiving, at a server, identifying information for a vehicle telematics device and receiving, at the server, information identifying an account to which the vehicle telematics device is to be associated. The method also includes authenticating the vehicle telematics device by finalizing an association between the vehicle telematics device and the account if data that is specified for authentication is received at the server from the vehicle telematics device and if that data is obtained by the vehicle telematics device within a time window that is specified for authentication.
US09208619B1	Tracking the use of at least one destination location Tracking the use of at least one destination location is disclosed. Initially, four or more first images are received from a first camera having a first field of view. It is then determined that the first vehicle is stopped within the at least one destination location at a first time and that the first vehicle has left the at least one destination location at a second time. A first characteristic of an occupant of the first vehicle based on a first image is determined to correspond to a second characteristic of the occupant of the first vehicle based on a second image. It is then determined that the occupant of the first vehicle traveled between the first vehicle and a payment station. Payment information specifying a period of time that was received by a third-party parking payment system is received. The period of time is then associated with the first vehicle.
US09208616B2	Mobile terminal and method of controlling the same A mobile terminal and a method of controlling a mobile terminal are provided. A depth level of a stereoscopic graphic object using binocular parallax is controlled according to a user's usage pattern, and displaying of the stereoscopic graphic object is controlled according to various events such as various input signals.
US09208602B2	Techniques and architecture for improved vertex processing An apparatus may include an index buffer to store an index stream having a multiplicity of index entries corresponding to vertices of a mesh and a vertex cache to store a multiplicity of processed vertices of the mesh. The apparatus may further include a processor circuit, and a vertex manager for execution on the processor circuit to read a reference bitstream comprising a multiplicity of bitstream entries, each bitstream entry corresponding to an index entry of the index stream, and to remove a processed vertex from the vertex cache when a value of the reference bitstream entry corresponding to the processed vertex is equal to a defined value.
US09208595B2	Apparatus, image processing method and storage medium storing program Images of a layout target for a template are acquired. The plurality of acquired images are edited using editing processing corresponding to a category corresponding to a layout. The edited images are arranged on the template corresponding to the category.
US09208593B1	Proximity-based detail reduction of geographic data A system and method for storing a plurality data points, each data point representing a geographic location, a first set of data points representing a first geometric object and a second set of data points representing a second geometric object. The system and method then remove a first data point from the first set of data points representing the first geometric object based on at least a distance between a first location represented by the first data point and a second location represented by a second data point of the second set of data points representing a second geometric object.
US09208590B2	Manipulation of an object as an image of a mapping of graph data Techniques are disclosed for effectively reflecting a manipulation of an object in graph data. In one example, a method enables a manipulation performed on an object as an image of a mapping of at least a part of graph data including nodes and edges to be reflected in the graph data. The method includes the step of specifying, from among nodes in the graph data that are related to the object being modified by the manipulation, a shared node that may be related to another object as well, and the step of reflecting the manipulation in the graph data while preventing the shared node from being modified.
US09208587B2	Systems and methods for compressed sensing for multi-shell magnetic resonance imaging A method of compressed sensing for multi-shell magnetic resonance imaging includes obtaining magnetic resonance imaging data, the data being sampled along multi-shell spherical coordinates, the spherical coordinates coincident with a plurality of spokes that converge at an origin, constructing a symmetric shell for each respective sampled multi-shell to create a combined set of data, performing a three-dimensional Fourier transform on the combined set of data to reconstruct an image, and de-noising the reconstructed image by iteratively applying a sparsifying transform on non-sampled data points of neighboring shells. The method can also include randomly under-sampling the imaging data to create missing data points. A system configured to implement the method and a non-transitory computer readable medium are also disclosed.
US09208586B2	CT image reconstruction with edge-maintaining filtering A method is disclosed for reconstructing image data of an examination object from measurement data, wherein the measurement data were captured previously during a relative rotational movement between a radiation source of a computed tomography system and the examination object. Filtered measurement data are calculated from the measurement data. First image data are calculated from the measurement data. Edge information is obtained from the first image data, wherein the edge information, depending on position, specifies strength and direction of edges within the first image data. New measurement data are calculated using the edge information by mixing the measurement data and the filtered measurement data and second image data are calculated from the new measurement data.
US09208585B2	System and method for improved energy series of images using multi-energy CT A method for creating an energy series of images acquired using a multi-energy computed tomography (CT) imaging system having a plurality of energy bins includes acquiring, with the multi-energy CT imaging system, a series of energy data sets, where each energy data set is associated with at least one of the energy bins. The method includes producing a conglomerate image using at least a plurality of the energy data sets and, using the conglomerate image, reconstructing an energy series of images, each image in the energy series of images corresponding to at least one of the energy data sets.
US09208581B2	Method of determining measurements for designing a part utilizing a reference object and end user provided metadata A system and method for the measurement of distances related to an object depicted in an image. One aspect includes delivery of supplemental materials for fenestration and for constructing insulating materials for fenestration. A digital image containing a primary object dimension and a reference object dimension in substantially the same plane undergoes digital image processing to provide improved measurement capability. Information regarding a primary object, including end user provided metadata related to the primary object and/or a reference object, is provided to an automated measurement process, design and manufacturing system to provide customized parts to end users. A digital image is obtained having an observable constraint dimension to which a customized part is to conform wherein the digital image contains a reference object having a reference dimension and a constraint dimension is calculated from the digital image based on a reference dimension. The custom part is designed and manufactured based on the calculated constraint dimension.
US09208571B2	Object digitization Digitizing objects in a picture is discussed herein. A user presents the object to a camera, which captures the image comprising color and depth data for the front and back of the object. For both front and back images, the closest point to the camera is determined by analyzing the depth data. From the closest points, edges of the object are found by noting large differences in depth data. The depth data is also used to construct point cloud constructions of the front and back of the object. Various techniques are applied to extrapolate edges, remove seams, extend color intelligently, filter noise, apply skeletal structure to the object, and optimize the digitization further. Eventually, a digital representation is presented to the user and potentially used in different applications (e.g., games, Web, etc.).
US09208566B2	Speckle sensing for motion tracking Speckle sensing for motion tracking is described, for example, to track a user's finger or head in an environment to control a graphical user interface, to track a hand-held device, to track digits of a hand for gesture-based control, and to track 3D motion of other objects or parts of objects in a real-world environment. In various examples a stream of images of a speckle pattern from at least one coherent light source illuminating the object, or which is generated by a light source at the object to be tracked, is used to compute an estimate of 3D position of the object. In various examples the estimate is transformed using information about position and/or orientation of the object from another source. In various examples the other source is a time of flight system, a structured light system, a stereo system, a sensor at the object, or other sources.
US09208555B1	Method for inspection of electrical equipment Exemplary methods for inspecting electrical equipment in a power distribution network can include the steps of recording, by a mobile device, a photograph with a view of the object, transmitting recording information of the mobile device and the photograph to a computer server hosting a power network description database; generating, from a model stored in the power network description database of a candidate object and based on the recording information of the mobile device, a representation of the candidate object, and comparing the transmitted photograph and the generated representation to identify and characterize the object in the photograph as the candidate object.
US09208553B2	Image synchronization of scanning wafer inspection system An inspection system comprises a beam generator module for deflecting spots across scan portions of a specimen. The system also includes detection channels for sensing light emanating from a specimen in response to an incident beam directed towards such specimen and generating a detected image for each scan portion. The system comprises a synchronization system comprising clock generator modules for generating timing signals for deflectors of the beam generator module to scan the spots across the scan portions at a specified frequency and each of the detection channels to generate the corresponding detected image at a specified sampling rate. The timing signals are generated based on a common system clock and cause the deflectors to scan the spots and the detection channels to generate a detected image at a synchronized timing so as to minimize jitter between the scan portions in the response image.
US09208547B2	Stereo correspondence smoothness tool Stereo correspondence smoothness tool techniques are described. In one or more implementations, an indication is received of a user-defined region in at least one of a plurality of stereoscopic images of an image scene. Stereo correspondence is calculated of image data of the plurality of stereoscopic images of the image scene, the calculation performed based at least in part on the user-defined region as indicating a smoothness in disparities to be calculated for pixels in the user-defined region.
US09208546B2	Image processing apparatus, method and imaging apparatus An image processing apparatus includes an extraction section that extracts a first high brightness region from a source image where brightness is a first threshold value or greater, a mask generation section that performs blur processing and binarization processing on the first high brightness region and generates a mask containing the first high brightness region, a mask application section that based on the mask performs elimination processing, thinning processing, or both on the first high brightness region, a bright line generation section that generates a bright line based on a second high brightness region contained in output of the mask application section, and a synthesizing section that synthesizes the bright line onto the source image.
US09208545B2	Adaptive weighted-local-difference order statistics filters A novel modification to the order statistics filters called the Adaptive Weighted-Local-Difference Order Statistics is shown that will act as a generic framework for the design of adaptive filters suitable for specific signal processing applications. To demonstrate the design of filters using this framework two implementations were defined and evaluated: Edge Orientation Adaptive Weighted-Local-Difference Median Filter (EOAWLDMF) and Luminance-Similarity Adaptive Weighted-Local-Difference Median Filter (LSAWLDMF) for restoration of noisy images.
US09208544B2	Image processing apparatus and image fine-tuning method thereof An image processing apparatus and an image fine-tuning method are provided. The image processing apparatus includes a high-pass filter, a block comparator, an image data reconstructor, and a calculator. The high-pass filter receives a first image to generate a filtered image. The block comparator receives an input image and the first image to generate a block comparison result. The image data reconstructor receives the filtered image and the block comparison result to generate image reconstruction data. The calculator receives the input image and the image reconstruction data to generate an output image.
US09208541B2	Apparatus and method for correcting disparity map Disclosed herein are an apparatus and method for correcting a disparity map. The apparatus includes a disparity map area setting unit, a pose estimation unit, and a disparity map correction unit. The apparatus removes the noise of the disparity map attributable to stereo matching and also fills in holes attributable to occlusion using information about the depth of a 3-dimensional (3D) model produced in a preceding frame of a current frame, thereby improving a disparity map and depth performance and providing high-accuracy depth information to an application to be used.
US09208539B2	Image enhancement using semantic components A system for determining a high resolution output image that includes receiving a low resolution image and determining an intermediate high resolution image. The system detects semantic features based upon the input image and selects corresponding semantic components from a database based upon the detected semantic features. The first intermediate high resolution image is modified based upon information from the corresponding semantic components to determine the high resolution output image.
US09208532B2	Watermark processing device and method, and image capturing apparatus Disclosed are a watermark processing device, a method thereof, and an image capturing apparatus capable of reducing a processing time and a calculation amount while inserting a watermark into an image. The watermark processing method includes creating a watermarked image by inserting a predetermined watermark into a virtual wavelet image; and creating a synthesized image by synthesizing an input image and the watermarked image.
US09208527B2	General ledger (GL) journal delete/accounting line reversal web service A web service for automatically determining accounting entries that are affected by the deletion of a journal, formulating reverse accounting entries, and sending the reverse entries back to the source system is described. The service can use transaction identification keys to map and track which accounting entries are affected by the deletion of the journal. The web service can use extensible markup language (XML) among other formats.
US09208526B1	Method and system for categorizing vehicle treatment facilities into treatment complexity levels To determine a vehicle treatment facility for treating a damaged vehicle after a crash, several treatment facilities within a predetermined distance of the damaged vehicle are categorized by treatment complexity level. Treatment facilities within the same treatment complexity level category as the damaged vehicle are ranked based on several treatment facility evaluation characteristics such as repair duration data, quality rating, availability, price schedule, location data, or a quality rating for one or more suppliers used by the treatment facility. A treatment facility is then selected for treating the damaged vehicle based on the rankings.
US09208525B2	System and method for determining and monitoring auto insurance incentives A computer system or computer-implemented method may provide incentives to an insured customer for receiving sensor data indicating risk-reducing and risk-increasing behavior during the policy term. In-vehicle sensors or other devices may gather information about the vehicle and its use during the policy term and send the information to a back-end system for analysis. Based on this analysis, the back-end system may determine that the received information is indicative of risk-reducing or increasing behavior. Upon confirmation that the information indicates risk-reducing or increasing behavior, the back-end system may perform one or more actions defined by a set of rules to establish an incentive or disincentive for the customer corresponding to the behavior.
US09208522B2	Systems and methods for cash positioning and reporting Systems and methods for cash positioning and cash reporting are preferably provided. A system for cash reporting and cash positioning according to the invention may include a controller module and a web service module. The controller module may be adapted to receive a selection to update a data store. The web service module may be adapted to receive a call from the controller module. The call from the controller module may be sent in response to the selection to update the data store. The web service module may be configured to retrieve bank account information data in response to the call from the controller module.
US09208521B2	Computerized method and system for dynamically creating and updating a user interface The number of users viewing a given variable directly affects the rate of change and/or outcome of said variable. In the case of eCommerce, pricing of products and/or services is based upon a user accessing a website on which products and/or services are for sale. An initial price indicia associator associates initial price indicia with the products and/or services files. The initial pricing can be based upon historical indicia or the engine itself. Thereafter, a price indicia adjuster adjusts the pricing responsive to user access of the website or related website. A user interface meter shown on the website indicates to potential buyers how much interest there is in the product and/or service being sold so that peer activity is exhibited to potential buyers to encourage sales and impulsive buying behavior. Pricing is dynamic and adjusts in real-time at a rate determined by the amount of users accessing the website.
US09208514B2	Media properties selection method and system based on expected profit from profile-based ad delivery An automatic system facilitates selection of media properties on which to display an advertisement, responsive to a profile collected on a first media property, where a behavioral-targeting company calculates expected profit for an ad correlated with the profile and arranges for the visitor to be tagged with a tag readable by the selected media property. The profit can be calculated by deducting, from the revenues that are expected to be generated from an ad delivered based on the collected profile, at least the price of ad space at a media property where the BT company might like to deliver ads to the profiled visitor. When the calculated profit is positive (i.e., not a loss), the BT company arranges for the visitor to be tagged with a tag readable by the selected media property through which the BT company expects to profit.
US09208512B1	Generating content for promotional messages based on distance Apparatus and method for transferring promotional messages to a mobile communication device. A promotional message is generated for display on a mobile communication device. The promotional message is associated with an entity having a physical location. The promotional message has a plurality of different types of content each associated with a different distance between the mobile communication device and a physical location of the entity. The generated promotional message is thereafter stored in a memory. A controller selects and transfers the promotional message to the mobile communication device responsive to a detected distance between the mobile communication device and the physical location. The transferred promotional message displays, on the device, a selected one of the different types of content corresponding to the detected distance.
US09208511B2	System and method for location-based recommendations A method for providing a recommendation to a user, including retrieving, connection content associated with social network connections of the user; calculating, for each of the social network connections, an influence score for each of a plurality of locations; receiving a request location from a user device associated with the user; extracting a recommendation from relevant connection content, the relevant connection content being content associated with the request location and generated by at least one of the social network connections having the highest influence scores for the request location, the recommendation comprising a venue referenced within the relevant connection content; and sending the recommendation to the user device.
US09208509B1	System, method, and computer program for personalizing content for a user based on a size of a working vocabulary of the user A system, method, and computer program product are provided for personalizing content for a user based on a size of a working vocabulary of the user. In use, text is identified from content that is one of consumed and output by a user. Additionally, a size of a working vocabulary of the user is identified using the text. Further, the content is personalized based on the size of the working vocabulary of the user.
US09208507B2	AD network optimization system and method thereof A system and method for optimizing advertisements. To maximize revenue, a plurality of ad networks are tiered based on their pricing data, and in one embodiment, their cost per thousand impressions (CPM). Each tier includes a pricing data range. Periodically, the system may increase and decrease frequency caps for the ad networks to adjust the ad networks in the tiers. Frequency caps may be increased for an ad network when the CPM for the ad network is above the CPM range for the ad network's tier. The frequency caps may be decreased for the ad network when the CPM for the ad network is below the CPM range for the ad network's tier. For each ad network request received, the system traverses through the tiers of the plurality of ad networks for an ad network that is capable of serving an ad based on the ad network's frequency cap.
US09208505B1	Systems and methods for providing compensation, rebate, cashback, and reward for using mobile and wearable payment services Provided are methods and systems for providing compensation for using a mobile payment service. The method may commence with receiving payment information associated with a user. The method may include generating a unique code encoding the payment information and providing the generated unique code to the user. The method may continue with receiving a deposit amount associated with a purchase related to the user. The purchase may be made via the mobile payment service. The method may further include receiving a notification about a further purchase of the user via the mobile payment service. The notification may include at least the unique code and a product barcode. The product barcode may be associated with the further purchase. The method may further include providing a compensation from the deposit amount to the user. The compensation may be associated with a payment amount associated with the further purchase.
US09208503B2	Information processing apparatus, information processing method, information processing program, and recording medium An information processing apparatus determines a threshold value of the number of times of use of a keyword on the basis of the number of times of use of the keyword in each unit period included in a cycle period. Next, the information processing apparatus identifies a period in which the numbers of times of use exceeds the threshold value in the cycle period as a candidate of a popularity period of the keyword. Next, the information processing apparatus excludes the identified period from the popularity period if a situation in which the numbers of times of use in the identified period exceed the threshold value is different from a situation based on a periodic popularity of the keyword. When the identified candidate period is not excluded from the popularity period, the information processing apparatus determines the identified period to be the popularity period.
US09208501B2	Electronic computing device, personalized data recommending method thereof, and non-transitory machine-readable medium thereof An electronic computing device, a personalized information providing method thereof, and a non-transitory machine-readable medium thereof are provided. The electronic computing device establishes a first and a second tree structure data according to a first data of a first user and a second data of a second user arranged in a period respectively by using an ontology construction algorithm, and calculates a similarity between the first and the second tree structure data by using a similarity evaluating algorithm, and then analyzes the similarity to subsume the first and the second tree structure data into a group by using a clustering algorithm. The electronic computing device determines difference between the first and the second tree structure data according to the group and generates recommending information corresponding to the first user which is arranged in the period according to the difference, and then enables a monitor to display the recommending information.
US09208499B2	Dynamically mapping images on objects in a navigation system A method of and system for displaying information on a display are disclosed. In at least one embodiment, the method has the following actions: a) accessing a 3D model with 3D objects 5 b) showing on the display a graphical display of one or more scenes comprising a moving view on one or more of the 3D objects as seen from a certain moving point of view, the one or more 3D objects comprising at least one advertisement space, the at least one advertisement space having an advertisement space location and an advertisement space size, c) receiving a message inclusive of message data and message location data, and d) in dependence on a distance between the moving point of view and the one or more 3D objects, mapping the message data on the at least one advertisement space if the advertisement space location is associated with the message location data such that the message data overlays the advertisement space in the display.
US09208494B2	Code based product tracking methods and apparatus A system, method, and apparatus for using code based tracking are disclosed. An example apparatus includes a database including a product data structure configured to store (i) information indicative of a manufacturer of a woven carpet, (ii) information indicative of employees of the manufacturer that produced the woven carpet including a name and an age of each employee, (iii) information indicative of a certification inspection of the woven carpet, and (iv) information indicative of the woven carpet passing through customs. The example apparatus also includes a server configured to associate a code with the woven carpet, store the information of items (i) to (iv) to the product data structure, and make the information of items (i) to (iv) available a consumer upon receiving a message from a user device of the consumer indicative that the code was accessed by the user device.
US09208488B2	Using a mobile wallet infrastructure to support multiple mobile wallet providers Embodiments are directed to performing a transaction using a third party mobile wallet, performing a transaction using a third party point of sale (POS) system and to making a purchase from a third party mobile wallet provided by a third party mobile wallet provider. In one scenario, a cloud-based transaction platform is provided, which receives communication from an agent terminal over a communication channel connected to the cloud-based transaction platform. The agent communication indicates that a customer desires to perform a mobile wallet transaction using their third party mobile wallet. The cloud-based transaction platform sends the agent communication to a third party mobile wallet platform, receives communication from the third party mobile wallet platform confirming processing of the transaction, and sends communication to the agent terminal over a communication channel connected to the cloud-based transaction platform, where the communication indicates confirmation of the processing of the transaction.
US09208484B2	Systems and methods for risk triggering values Systems and methods for facilitating risk assessment for point of sale transactions utilizing at least one risk triggering value (RTV) is disclosed. An RTV is a condensed version of a set of complex risk data and strategies usually found in central processing sites. After receiving a request for payment authorization, a risk value is calculated for the request. The distributed processing site compares the risk value to the RTV to determine whether to authorize payment. If the risk value is less than or equal to the RTV, the payment is authorized while a risk value greater than the RTV will not be authorized. The central site calculates a new RTV for the account and distributes the new RTV to the distributed processing site.
US09208483B2	Sharing or reselling NFC applications among mobile communications devices A method for sharing applications (APPI, APP2, APPx; APP4) being stored in a source mobile communication device (MOx; MOI) with a destination mobile communication device (MO1; MOx) comprises: transmitting a sharing request (SR) from the source mobile communication device (MOx; MO1) to a Trusted Service Manager (TSM) with information about the application and the destination mobile communication device (MO1; MOx); at the Trusted Service Manager (TSM), retrieving the Service Provider (SP1, SP2, SPx) that has provided said application and sending a query (QU) to it; at the Service Provider (SP1, SP2, SPx), sending an installation request (INST) to the Trusted Service Manager (TSM) with an adapted version (APPx′) of the application and update instructions (UPD) for the source mobile communication device (MOx; MO1); at the Trusted Service Manager (TSM), getting the adapted application (APPx′) installed in the destination mobile communication device (MO1; MOx) and updating the source mobile communication device (MOx; MO1).
US09208479B2	Incident management for automated teller machines A computer system monitors a financial transaction system that contains a plurality of remote transaction machines, e.g., automated teller machines (ATMs). The computer system detects and analyzes whether any of the automated teller machines has an outage, whereby customers may be experiencing failed financial transactions. When an outage occurs, a severity level is selected by processing outage data. For example, the computer system determines a measure of the number of failed transactions and then selects a severity level of the outage from which the appropriate recovery procedure can then be initiated. When the transaction system comprises a plurality of networks, the severity level of an outage may be determined by aggregating or separately processing outage data for the networks. Outage ATMs may be prioritized from the number of corresponding failed transactions, so that the prioritization can be included in an indicator that initiates resolution of the outage.
US09208478B2	Posted message providing system, posted message providing apparatus, posted message providing method, and computer program Posted message providing systems, apparatuses, methods, and programs obtain a message posted on a computer network by a poster and location information associated with the posted message. The systems, apparatuses, methods, and programs obtain a poster location history that includes the specific locations of the poster in the past obtained at predetermined intervals. The systems, apparatuses, methods, and programs correct the location information associated with the posted message based on a text of the obtained posted message and the obtained poster location history, and communicate the posted message based on the corrected location information.
US09208477B2	Email client mode transitions in a smartpad device Methods and devices for selectively presenting a user interface for an email application are provided. More particularly, a change in the operating mode of a multiple virtual display smartpad device from a multiple virtual display operating mode to a single virtual display operating mode, or from a single virtual display operating mode to a multiple virtual display operating mode, can be determined. Moreover, a change in the operating mode can effect a change in a presentation of a user interface associated with an email application. More particularly, a presentation of a user interface can be retained, where the number of virtual displays of the device in view of the user is changed, provided a user interface for the email application remains in view of the user after the change in operating mode.
US09208475B2	Apparatus and method for email storage Embodiments of the present invention provide an apparatus for storing emails, comprising a neural network arranged to receive information associated with an email, to determine a storage location of the email according to one or more of the attributes of the email and to output information identifying the determined storage location.
US09208471B2	Matching users with similar interests Matching users with similar interests is disclosed, including: obtaining, from an external source, items of interest as indicated by a plurality of users; storing information about the plurality of users and their respective items of interest; and identifying, for a first user of the plurality of users, a set of similar users who have overlapping interests as the first user, wherein the overlapping interests are determined based at least in part on items of interest to the first user and items of interest to the plurality of users.
US09208468B2	Inventory management system The present disclosure provides an inventory management system that offers significant improvement over existing systems by automating requests to restock inventory. The present disclosure details an inventory management system that provides real time visibility to stock levels and streamlines materials management activities, while addressing the issues of human resource misallocations, inaccurate inventory data management and related out of stock conditions. Moreover, the system of the present disclosure promotes a high level of confidence in inventory data that enables on-hand inventory levels to be reduced, thereby reducing costs and waste.
US09208460B2	System and methods to facilitate analytics with a tagged corpus The disclosed embodiments provide a set of methods, systems, data structures, and computer-executable instructions for executing on a compute machine to automatically analyze data associated with an indexed corpora and to generate for graphical display a set of results associated with those analytic operations.
US09208459B2	System and method for performing serialization of devices A serialization service module is provided for configuring an asset management system to provide a secure means of generating, assigning to chips (or other electronic objects or devices), and tracking unique serial numbers. To provide this service, a controller is used to define a product model, then to define one or more serialization schemas to be bound to each product model. Each serialization schema contains a range of serial numbers for a particular product. The serial number schemas are sent over a secure, encrypted connection to appliances at the manufacturer's location. Agents can then request serial number values by product name. The serial numbers are generated by the appliance, metered, and provided to the agents. The serial numbers are then injected sequentially into each die in a chip manufacturing process using the agent.
US09208457B2	Optimized flight plan management system A method and apparatus for flight planning. Routes from a start point to an end point are identified for a flight of an aircraft from a database of routes. A plurality of different types of routes is present in the database of routes. A number of characteristics of the aircraft are applied to the routes to identify a performance of the aircraft for the routes using a number of weather conditions for the flight. The routes are ranked based on the performance of the aircraft on the routes in meeting a number of goals for the flight to form ranked routes. A portion of the ranked routes are displayed.
US09208454B2	System and method for providing a unified messaging and modeling infrastructure A system and method for providing a unified messaging and modeling infrastructure (UMMI) is disclosed. The system may comprise an input module of a first operations support system configured to receive information for processing at the first operations support system and a processor module of the first operations support system configured to process the information received at the first input module and an output module of the first operations support system configured to transmit a standardized data sheet to the second operations support system. The system may comprise an input module of the second operations support system configured to receive the standardized data sheet and a processor module of the second operations support system configured to update the standardized data sheet based on processing operations at the second operations support system and to generate executable code to support interface functionality based on definitions of the standardized data sheet.
US09208453B2	Targeted multi-dimension data extraction for real-time analysis Methods and systems for extracting targeted data for real-time reporting are discussed. In an example, a system can include a data store, a server, and a denormalized database. The data store can maintain data created by an application. The server can be communicatively coupled to the data store. The server can include a data extraction module and a data compression module. The data extraction module can extract a subset of the data stored in the data store according to an extraction scheme. The data compression module can compress the extracted subset of the data into a set of aggregated key value pairs. The denormalized database can store the aggregated key value pairs.
US09208452B2	Digital rights management for publishing scanned documents on the internet While documents which may be subject to existing copyrights are scanned to form electronically transmissible files, information is extracted from the copyright notice, supplemented by manual or automated research and processed by performing calculations of critical dates for geographical areas of interest preferably provided from memory as a table of algorithms to determine if the document is in the public domain or if a license for electronic distribution can be obtained. Automated generation and/or transmission of license requests is also provided. Deletion of electronic files from local storage for particular areas and identifiers thereof form indices for particular areas are also provided if a license for electronic distribution of particular documents is not obtained.
US09208448B2	System, method and computer program product for incremental learning of system log formats A method for learning a data format is disclosed including but not limited to inputting an initial description of a data format and a batch of data comprising data in a new data format not covered by the initial description, instructions to use the first description to parse the records in the data source; discarding records in the input data that parse successfully, instructions to collect records that fail to parse, instructions to accumulate a quantity, M of records that fail to parse, returning a modified description that extends the initial description to cover the new data, transforming the first description, D into a second description D′ to accommodate differences between the input data format and the first description D by introducing options where a piece of data was missing in the input data and introducing unions where a new type of data was found in the input data.
US09208447B1	Method and system for classifying vehicle tracks A method for classifying unclassified vehicle tracks using real-time sensor data comprises acquiring a computer database of vehicle track characteristics data for known vehicle tracks; defining vehicle track signatures based on the vehicle track characteristics data; and generating a graph based on the vehicle track signatures, the graph having state nodes representative of distinguishing vehicle track characteristics defined in the vehicle track signatures and links between the state nodes representative of relationships between distinguishing vehicle track characteristics defined in the vehicle track signatures, said graph also having reporting nodes for classifying unknown vehicle tracks when sufficient distinguishing vehicle track characteristics have been observed. The method also comprises processing with the graph, using a processor, real-time sensor data corresponding to a first unclassified vehicle track until the first unclassified vehicle track is classified.
US09208446B2	Methods of increasing fidelity of quantum operations Systems and methods are provided for improving fidelity of a quantum operation on a quantum bit of interest. A controlled quantum gate operation, controlled by the quantum bit of interest, id performed on an ancillary quantum bit. An energy state of the ancillary quantum bit is measured to facilitate the improvement of the fidelity of the quantum operation.
US09208444B1	Determining happiness indices A computer-implemented method that includes the actions of receiving a request for data indicative of a user segment of a social networking platform, accessing user data of the social networking platform, identifying a portion of the accessed user data, analyzing contents of the portion of the accessed user data, determining happiness scores for the users in the user segment, identifying a first subset of the users as being happy users, and identifying a second subset of the users as being unhappy users, determining a frequency at which the particular user performs one or more actions, comparing the determined frequencies at which the users in the second subset perform the one or more actions to a threshold frequency, identifying a third subset of the users included in the second subset, and generating a happiness index for the user segment that is based on one or more determined happiness scores.
US09208443B2	Systems and methods for providing recommendations based on collaborative and/or content-based nodal interrelationships In selected embodiments a recommendation generator builds a network of interrelationships between venues, reviewers and users based on their attributes and reviewer and user reviews of the venues. Each interrelationship or link may be positive or negative and may accumulate with other links (or anti-links) to provide nodal links the strength of which are based on commonality of attributes among the linked nodes and/or common preferences that one node, such as a reviewer, expresses for other nodes, such as venues. The links may be first order (based on a direct relationship between, for instance, a reviewer and a venue) or higher order (based on, for instance, the fact that two venue are both liked by a given reviewer). The recommendation engine in certain embodiments determines recommended venues based on user attributes and venue preferences by aggregating the link matrices and determining the venues which are most strongly coupled to the user.
US09208438B2	Duplication in decision trees A packet classification system, apparatus, and corresponding apparatus are provided for enabling packet classification. A processor of a security appliance coupled to a network uses a classifier table having a plurality of rules, the plurality of rules having at least one field, to build a decision tree structure for packet classification. Duplication in the decision tree may be identified, producing a wider, shallower decision tree that may result in shorter search times with reduced memory requirements for storing the decision tree. A number of operations needed to identify duplication in the decision tree may be reduced, thereby increasing speed and efficiency of a compiler building the decision tree.
US09208434B2	Neuromorphic system exploiting the intrinsic characteristics of memory cells A neuromorphic system comprises a set of at least one input neuron, a set of at least one output neuron and a synaptic network formed from a set of at least one variable-resistance memristive component, said synaptic network connecting at least one input neuron to at least one output neuron, the resistance of the at least one memristive component being adjusted by delivering to the synaptic network write pulses generated by the at least one input neuron, and return pulses generated by the at least one output neuron, the characteristics of the write and return pulses being deduced from the intrinsic characteristics of the at least one memristive component so that the combination of a write pulse and a return pulse in the at least one memristive component results in a modification of its resistance according to a learning rule chosen beforehand.
US09208432B2	Neural network learning and collaboration apparatus and methods Apparatus and methods for learning and training in neural network-based devices. In one implementation, the devices each comprise multiple spiking neurons, configured to process sensory input. In one approach, alternate heterosynaptic plasticity mechanisms are used to enhance learning and field diversity within the devices. The selection of alternate plasticity rules is based on recent post-synaptic activity of neighboring neurons. Apparatus and methods for simplifying training of the devices are also disclosed, including a computer-based application. A data representation of the neural network may be imaged and transferred to another computational environment, effectively copying the brain. Techniques and architectures for achieve this training, storing, and distributing these data representations are also disclosed.
US09208428B2	Identification articles Presently disclosed subject matter is directed to an identification article, methods of its manufacture and a sheet material forming part thereof. The article in accordance with the disclosed subject matter has a first end and a second end configured for attachment to each other through a contact section configured at either the first end or the second end. The article comprising a first, top layer including a bottom side, a second, bottom layer including a top side, and an identification component, wherein the bottom side of the first layer and the top side of the second layer bonded to at least encapsulate therebetween the identification component. In addition, the contact section comprises a release section constituting an end portion of the second layer, coated with a release agent on the top side thereof.
US09208425B2	RFID tag An RFID tag including an inlay having a sheet-like shape and including an antenna and an IC chip electrically connected to the antenna, an outer covering member that covers the inlay, the outer covering member having a planar shape and including a main surface and a rear surface, and a frame part arranged on at least one of the main surface and the rear surface. The frame part is erected in a thickness direction of the outer covering member. The frame part surrounds the IC chip in a plan view.
US09208423B1	Mobile device with time-varying magnetic field and single transaction account numbers An electronic transaction card communicates with an add-on slot of an intelligent electronic device. The add-on slot may be a memory card slot. The intelligent electronic device may be a mobile phone or other device with or without network connectivity. The electronic transaction card may have magnetic field producing circuitry compatible with magnetic card readers, smartcard circuitry, other point-of-sale interfaces, or any combination thereof.
US09208421B2	Apparatuses and methods generating a two-dimensional code with a logo A logo-added two-dimensional code creation device determines the color of a two-dimensional code to be superimposed on a logo image by adjusting the L value indicating the color lightness, whereby a logo-added two-dimensional code readable regardless of influence of post-printing processing and/or ambient light can be created. The logo-added two-dimensional code has smaller cells superimposed on the tiger character that can easily lose the design integrity than the cells superimposed on the background part, ensuring the design integrity of the logo image without impairing the readability of information.
US09208418B2	Method and system for forming a halftone screen A method of forming a halftone screen comprising representing each of a first, second, third and fourth tone range of increasing darkness by forming a plurality of dots arranged in a grid; the dots representing the second tone range larger than the dots representing the first tone range; the dots representing the third tone range having a body section and at least one extension extending toward a or respective nearest neighbor(s), the extension(s) narrower in width than the body section, the dots representing the third tone range substantially the same size as the dots representing the second tone range; and the dots representing the fourth tone range having a body section and at least one extension extending toward a or respective nearest neighbor(s), the extension(s) greater in width than the extension(s) associated with the dots representing the third tone range. A halftone screen and a printing system are also disclosed.
US09208415B2	Image processing apparatus and method encoding multi-valued image generated with fewer values An image processing apparatus includes a determining unit that determines whether image data includes multi-valued drawing information for drawing a multi-valued image; a multi-valued drawing unit that draws the multi-valued image of the image data when the multi-valued drawing information is determined to be included in the image data; a less-than-multi-valued drawing unit that draws a less-than-multi-valued image of the image data when the multi-valued drawing information is not determined to be included in the image data; a value-count reducing image processing unit that reduces number of values of a drawing result of the multi-valued image to generate an image with a fewer number of values; and a less-than-multi-valued encoding processing unit that encodes a drawing result obtained by drawing the less-than-multi-valued image and encodes the generated image with the fewer number of values.
US09208412B2	Setting change control for an image forming system and image forming apparatus Setting change for an image forming device may include determining whether the image forming device is currently performing print processing. In some examples, if the image forming device is currently performing print processing, the setting change may be delayed. In other examples, the setting change may be implemented irrespective of the print processing. In one arrangement, the setting change may be specific to a particular entity (e.g., a user).
US09208411B2	Print controlling apparatus, print controlling method and storage medium A paper attribute designated by a suspended job which has been stored in a print job queue and printing of which has not been executed is acquired. When executing replacement of paper supplied to the printing apparatus is executed, a screen in which a user can designate a paper attribute candidate after paper replacement is displayed so that the acquired paper attribute is preferentially displayed out of candidates which the user can select as the paper attribute candidate. An image is printed on printing paper after the replacement, based on a paper attribute designated by the user in the screen.
US09208409B2	Display apparatus, method for controlling the same, and storage medium for displaying a schedule screen for print jobs to be executed On a job schedule screen that displays a type of sheet, information for identifying a sheet storage unit in which the number of sheets has become smaller than or equal to a certain value is displayed. An identifier, which is the information for identifying a sheet storage unit, is set by a user.
US09208408B2	Printing apparatus and correction method of the printing apparatus In an apparatus including a first acquisition unit configured to acquire information of an operation amount of a conveyance unit configured to convey a printing medium, a second acquisition unit configured to acquire information of a density of an image printed by a printhead, and a specify unit configured to specify the density of the image based on histogram collection on the information of the density of the image acquired by the second acquisition, the following correction is made. More specifically, a correction value of the information of the operation amount based on a histogram on the acquired information of the operation amount is decided. Then, based on the decided correction value, the acquired information of the operation amount is corrected.
US09208404B2	Object detection with boosted exemplars In techniques for object detection with boosted exemplars, weak classifiers of a real-adaboost technique can be learned as exemplars that are collected from example images. The exemplars are examples of an object that is detectable in image patches of an image, such as faces that are detectable in images. The weak classifiers of the real-adaboost technique can be applied to the image patches of the image, and a confidence score is determined for each of the weak classifiers as applied to an image patch of the image. The confidence score of a weak classifier is an indication of whether the object is detected in the image patch of the image based on the weak classifier. All of the confidence scores of the weak classifiers can then be summed to generate an overall object detection score that indicates whether the image patch of the image includes the object.
US09208402B2	Face matching for mobile devices A method includes receiving an image of a face to match with images of known faces, extracting blocks multiple blocks from the received image, calculating local binary pattern histograms for each block, generating matching scores for each block against block of the images of known faces, determining a top number, N, of matching scores less than the number of blocks, and matching the received image to an image of a known face as a function of the top number of matching scores.
US09208398B2	Image processing for forming realistic stratum detritus detail in a camouflage pattern and a camouflage pattern formed thereby An image processing method forming realistic stratum detritus detail in a camouflage pattern comprises the steps of: Identifying the desired camouflage genre; Forming a base image layer with a shallow depth of field which includes a foreground focal element extending substantially across the width of the pattern; Forming a lattice work image layer including a lattice work of appropriate natural elements; Overlaying the lattice work image layer onto the base image layer; and Blending detritus images into the natural elements of the lattice work. Camouflage patterns formed according to the disclosed process are also disclosed which form a more effective hunter camouflage pattern.
US09208397B2	Codeless QR code A service provider receives, from a user, picture information captured by a user device from a picture mark associated with a product or service of a merchant. It determines a matching picture image by comparing the picture information with picture images in a server, previously registered by the merchant. It also determines, out of attributes previously registered by the merchant, a matching attribute set uniquely associated with the matching picture image. The attributes may be web links, mobile APPs, or any media files that the merchant desires to communicate to users about its products or services. The service provider then communicates to the user the matching attribute set to be loaded on the user device and direct the user to the web links, mobile APPs, or media files that the merchant predetermined.
US09208393B2	Mobile image quality assurance in mobile document image processing applications Techniques for assuring the quality of mobile document image captured using a mobile device are provided. These techniques include performing one or more tests to assess the quality of images of documents captured using the mobile device. The tests can be selected based on the type of document that was imaged, the type of mobile application for which the image quality of the mobile image is being assessed, and/or other parameters such as the type of mobile device and/or the characteristics of the camera of the mobile device that was used to capture the image. The image quality assurance techniques can also be implemented on can be implemented on a mobile device and/or on a remote server where the mobile device routes the mobile image to the remote server processing and the test results are be passed from the remote server to the mobile device.
US09208390B2	Intra-vehicular mobile device management The illustrative embodiments described herein provide a computer-implemented method, apparatus, and computer program product for managing mobile device usage in a moving vehicle. In response to detecting that a user is traveling at a speed consistent with vehicular travel, optical data from an interior of the moving vehicle is detected. The optical data is analyzed to identify a set of vehicular markers. The user's intra-vehicular location is determined in relation to the set of vehicular markers. If the user's intra-vehicular location is the driver's seat, then restricted use protocols are initiated.
US09208386B1	Crowd state characterization system and method A crowd state characterization system utilizes a plurality of processors to analyze video streams from numerous videos to select videos and/or video frames of interest. The processors digitize dismounts such as pedestrians and the like and then analyze the digitized pedestrians. The frames of video are characterized in terms of entropy related to discordant motion and enthalpy related to energy. A selector can then select from among numerous videos to allow observation of videos numerically determined to be of interest.
US09208385B2	System and method for moving object detection and processing A method is provided for an intelligent video processing system based on object detection. The method includes receiving an input video sequence corresponding to a video program, obtaining a plurality of frames of the input video sequence, and obtaining a computational constraint and a temporal rate constraint. The method also includes determining one or more regions of interest (ROIs) of the plurality of frames based on the computational constraint and temporal rate constraint, and selecting a desired set of frames from the plurality of frames based on the ROIs such that the desired set of frames substantially represent a view path of the plurality of frames. Further, the method includes detecting object occurrences from the desired set of frames based on the selected desired set of frames such that a computational cost and a number of frames for detecting the object occurrences are under the computational constraint and temporal rate constraint.
US09208374B2	Information processing apparatus, control method therefor, and electronic device A technique of high-speed information processing is realized by determining a method of accessing processing target data so as to allow high-speed access in consideration of a memory architecture. According to the technique, in a method of performing information processing by sequentially referring to element data of the processing target data stored in a main memory according to a predetermined information processing rule such as a recognition dictionary, when generating the information processing rule, a reference order of the element data which improves a cache hit rate is determined based on a rule for storing the element data of the processing target data in the main memory, records of the positions of referred element data, and the cache architecture.
US09208371B2	Low power navigation devices, systems and methods A system and method are disclosed for conserving power during navigation, e.g., user device pointer/cursor navigation, using a fingerprint image sensor, that may comprise processing, via a computing device, fingerprint image sensor data indicative of finger position and movement with respect to a fingerprint image sensor surface in a finger navigation mode to determine if the finger is in a first finger navigation mode; processing, via the computing device, fingerprint image sensor data indicative of finger position and movement with respect to a fingerprint image sensor surface in a finger navigation mode to determine if the finger is in a second finger navigation mode; and transitioning, via the computing device, the fingerprint image sensor from a first power consumption mode to a second power consumption mode, based on detecting a transition from the first finger navigation mode to the second finger navigation mode.
US09208370B2	Method and apparatus for authenticating swipe biometric scanners Methods and apparatuses for authenticating a biometric scanner, such as swipe type finger print scanners, involves estimating unique intrinsic characteristics of the scanner (scanner pattern), that are permanent over time, and can identify a scanner even among scanners of the same manufacturer and model. Image processing and analysis are used to extract a scanner pattern from images acquired with the scanner. The scanner pattern is used to verify whether the scanner that acquired a particular image is the same as the scanner that acquired one or several images during enrollment of the biometric information. Authenticating the scanner can prevent subsequent security attacks using counterfeit biometric information on the scanner, or on the user authentication system.
US09208369B2	System, method and computer software product for searching for a latent fingerprint while simultaneously constructing a three-dimensional topographic map of the searched space A system including an imaging device configured to capture one or more images of a designated area with illumination at a low optical transmission wavelength which makes a latent print or a contaminant within the designated area visible in a visible spectrum in the one or more captured images with clarity to determine an identification from the latent print or contaminant in the one or more images, and a computing system configured to create a three-dimensional image from the one or more images to provide a composite image of the designated area with the latent print or contaminant visible with clarity to determine an identification from latent print or contaminant in the composite image is disclosed. A method and a non-transitory processor readable storage medium are also disclosed.
US09208368B2	Recording media processing device, control method of a recording media processing device, and storage medium for recognizing magnetic ink characters The recognition rate is improved and recognition errors are suppressed when recognizing magnetic ink characters. A character recognition unit 80 calculates the difference between the reference waveform data of each character in a character set and the character waveform data of a read magnetic ink character 101, and defines the characters with the smallest differences to the read character as first and second candidate characters. If scaling the reference waveforms of the first and second candidate characters creates waveforms that are similar with a smaller difference therebetween than before scaling, and the ratio between the difference B between the waveform of the second candidate and the read character, and the difference A between the waveform of the first candidate and the read character, is greater than or equal to a specific value, the character recognition unit scales and adjusts the reference waveforms to recognize the magnetic ink character 101.
US09208367B2	Mobile computer configured to read multiple decodable indicia A device can comprise a processor, a memory, an imaging subsystem configured to acquire an image of decodable indicia, a display, and a communication interface. The device can be configured, responsive to acquiring an image of one or more objects within a field of view of the imaging subsystem, to locate within the image and decode one or more decodable indicia. The device can be further configured to display the image on the display and visually mark the one or more successfully decoded decodable indicia. The device can be further configured, responsive to accepting user input selecting at least one decodable indicia of the displayed one or more decodable indicia, to transmit to an external computer at least one decoded message corresponding to the at least one decodable indicia.
US09208366B2	Indicia decoding device with security lock A securable indicia encoding system with a lock receiving portion is disclosed herein. In one illustrative embodiment, a securable indicia decoding device may include an imaging subsystem, a memory, a processor, and a housing. The imaging subsystem may include an image sensor array and an imaging optics assembly operative for focusing an image onto the image sensor array. The memory may be capable of storing frames of image data comprising data communicated through the read-out portion of at least some of the pixels during the imaging operation. The processor may be operative for receiving one or more of the frames of image data from the data storage element and performing a decode operation for attempting to decode a decodable feature represented in at least one of the frames of image data. The housing may encapsulate the illumination subsystem and the imaging subsystem. The housing may include a lock receiving portion for receiving a security lock.
US09208355B1	Apparatus, system and method for providing cryptographic key information with physically unclonable function circuitry Techniques and mechanisms for providing a value from physically unclonable function (PUF) circuitry for a cryptographic operation of a security module. In an embodiment, a cryptographic engine receives a value from PUF circuitry and based on the value, outputs a result of a cryptographic operation to a bus of the security module. The bus couples the cryptographic engine to control logic or interface logic of the security module. In another embodiment, the value is provided to the cryptographic engine from the PUF circuitry via a signal line which is distinct from the bus, where any exchange of the value by either of the cryptographic engine and the PUF circuitry is for communication of the first value independent of the bus.
US09208354B2	Techniques for securing use of one-time passwords Various embodiments are generally directed to the provision and use of a secure enclave defined within a storage of a computing device by a processor element thereof to store executable instructions of an OTP component implementing logic to generate and use one-time passwords (OTPs) to enable access to services provided by another computing device. An apparatus includes a storage; a first processor element; and first logic to receive a one-time password (OTP) routine, store the OTP routine within a first secure enclave defined by the first processor element within the storage, obtain a measure of the contents of the first secure enclave with the OTP routine stored therein, transmit the first measure to a computing device, and receive an OTP seed. Other embodiments are described and claimed.
US09208346B2	Persona-notitia intellection codifier A persona-notitia intellection codifier (P-NIC) server intelligently codifies and disburses personal user information from a user device (smartphone, laptop, etc.) to a multiplicity of designee devices. Masking Persona-Notitia Intellection Codes (a.k.a. PICs) are created that each stipulate control(s) and parametric limitation(s) for the associated one of a variety of personal user information. The Persona-Notitia Intellection Codifier (P-NIC) server rapidly produces a mask comprising a multiple bit “key” value (i.e., a persona-notitia intellection code (PIC)) that is uniquely distinguishable from every other PIC that's ever been generated for a given user. The value of the PIC is typically many bytes in length, and associates attributes to a unique key value that describes a desired subset of all the user's available personal user information to be unlocked by the key value (i.e., by the PIC).
US09208343B2	Transitive closure security In one implementation, a plurality of records included in a transitive closure of a driving record is identified, and a record from the plurality of records or the driving record is determined to satisfy a security rule. The security rule is then applied to the driving record and the plurality of records.
US09208331B2	Efficient storage of encrypted data in a dispersed storage network A method begins with a processing module receiving a request to store a data object from a first requesting device. The method continues with the processing module determining that a substantially similar version of the data object is currently stored in a DSN. The method continues with the processing module determining that a number of unique combinations of retrieving the plurality of sets of encoded data slices has exceeded a threshold and, when so, encoding, with a same decode threshold number and an increased pillar width number, the data object to create and store a plurality of sub-set of redundancy encoded data slices. The method continues with the processing module creating a unique combination of retrieving the data object for the first requesting device based on the plurality of sets of encoded data slices and the plurality of sub-set of redundancy encoded data slices.
US09208329B2	Systems and methods for monitoring document life cycle and destruction Systems and methods for monitoring and managing documents printed by an imaging device, including receiving an electronic copy of a document printed by the imaging device and metadata associated with the document, automatically storing the electronic copy of the document and the associated metadata, associating a time period with the stored electronic copy and the associated metadata, the time period being a time during which the document is available for use. The methods further include automatically sending a notification, after the time period has elapsed, to a user, the notification requesting that the document needs to be destroyed.
US09208328B2	Security system and method for operating systems A device comprising an operating system to run processes and a middleware layer operable to launch applications. An application launched by the middleware layer is run using one or more processes in the operating system. The operating system has a user layer and a kernel wherein the processes run in the user layer and interact with other processes running in the user layer through the kernel, the interaction being in response to calls to the kernel made by the processes. The device has one or more policy files defining policies for interaction of processes with the kernel of the device, and a monitor configured to monitor interaction of a process with the kernel to link or associate defined policies to the process, and to read code defined in the policy file or files linked or associated to the process.
US09208327B2	Tiered object-related trust decisions Adware and viruses are examples of objects that may be embedded in a web page or linked to a web page. When such an object is detected to be associated with a web page loading on a browser, an analysis may be performed to determine a trust level for the object. The object is suppressed based on the trust level. A prompt is displayed to advise a user that the object has been suppressed, and to provide an opportunity to interactively accept or decline activation of an action for the object.
US09208325B2	Protecting data on a mobile device A password protection application is executed on a mobile device and provides an interface by which an authorized user can define and configure a “data protection profile” for the device. This profile defines at least one security event (criteria or condition) associated with the device, and at least one protection action that should occur to protect data on the device upon the triggering of the event. Once defined in a profile, the application monitors for the occurrence of the security event. Upon the occurrence of the specified event, the protection action is enforced on the device to protect the data.
US09208321B2	Method for administration of computer security threat countermeasures to a computer system A countermeasure for a computer security threat to a computer system is administered by establishing a baseline identification of an operating or application system type and an operating or application system release level for the computer system that is compatible with a Threat Management Vector (TMV). A TMV is then received, including therein a first field that provides identification of at least one operating system type that is affected by a computer security threat, a second field that provides identification of an operating system release level for the operating system type, and a third field that provides identification of a set of possible countermeasures for an operating system type and an operating system release level. Countermeasures that are identified in the TMV are processed if the TMV identifies the operating system type and operating system release level for the computer system as being affected by the computer security threat. The received TMV may be mutated to a format for processing of the countermeasure.
US09208319B2	Code base partitioning system The subject disclosure is directed towards partitioning a code base of a program into a trusted portion and an untrusted portion. After identifying sensitive data within the code base using annotation information, one or more program elements that correspond to the sensitive data are automatically transformed into secure program elements that can be retained in the untrusted portion of the code base. Cryptographic techniques are used to minimize a potential size of the trusted portion of the code base. Source files for the trusted portion and the untrusted portion are generated.
US09208296B1	Prevention of use of a contaminated medical product This disclosure relates generally to contaminable medical products. In particular, this disclosure provides systems, apparatuses, and methods for preventing contaminated use of medical products that become contaminated upon being used for an intended purpose that requires the operation of a medical treatment apparatus, medical treatment system, or both. A medical product may have a unique identity and a permissive operation session, that is associated with the unique identity, may be created to allow a use of the medical device when uncontaminated, while preventing the use of the medical product after it has been presumably contaminated during the permissive operation session.
US09208290B2	External storage of medical device treatment parameters Many electronic medical devices include program design features that direct the operation of the device. The program design features of most electronic medical devices reside in the device itself and therefore are easily discovered by reverse engineering. In most cases, however, these features can be introduced into the device from an external source for only so long as necessary for each operation of the device, thereby making the reverse engineering of these features more difficult (or even impossible) and preserving a greater degree of design secrecy.
US09208288B2	System and method for remote patient monitoring and assessment to facilitate patient treatment A system and method for remote patient monitoring and assessment to facilitate patient treatment are provided. The system includes at least one portable computing device (such as a smart cellular telephone) operated by a caregiver, which generates a plurality of user interface screens for allowing the caregiver to enter information relating to a patient's medical condition and treatment of the patient. The system compares a parameter of the information entered by the caregiver to a pre-defined threshold to determine whether the parameter is acceptable, and displays an alert screen on the portable computing device if the means for comparing the parameter determines that the parameter is unacceptable. A central server in communication with the portable computing device via a network receives the information entered by the caregiver, and electronically generates a report summarizing the patient's medical condition and treatment given to the patient by the caregiver.
US09208286B2	Method for transmitting physiological detection signals through mobile phone device via bluetooth/Wi-Fi communication system A method for transmitting physiological detection signals through a mobile phone device via a Bluetooth/Wi-Fi communication system includes steps of providing at least a physiological signal detector for performing a physiological examination on a subject so as to generate at least one physiological detection signal which is transmitted to a built-in Bluetooth/Wi-Fi module of a mobile phone of a subject through a communication interface and a Bluetooth/Wi-Fi module at a detection end. The physiological detection signal is encoded by the mobile phone of the subject to be a message or a signal code containing a data transmission command and a data format protocol and is transmitted to a mobile phone or an App ID of a remote caretaker, so that the caretaker is able to instantly control a physiological state of the subject.
US09208284B1	Medical professional application integration into electronic health record system Embodiments relate to integrating data collection and productivity applications with an EHR system. To integrate a patient's data collection application with the EHR system, an EHR server provides API calls to (i) retrieve patient information, (ii) post data to the patient's account, and (iii) post data to the medical professional's account. To integrate a medical professional's productivity application with the EHR system, an EHR server provides API calls to (i) retrieve practice information, (ii) retrieve patient information, and (iii) post data to the medical professional's account. Embodiments securely provide these APIs to third party providers.
US09208283B2	Grouping system using genotype-based SNS Disclosed is a grouping system using a genotype-based SNS in that, when the peoples having a genotype want to form their community, it provides a means of access to the genotype of an individual's particular position within the limit of a technical security maintenance, so that the social networks is constituted online according to the genetic identity, whereby satisfying personal tastes of the members.
US09208277B1	Automated adjustment of wire connections in computer-assisted design of circuits In one aspect, a method for providing a circuit design includes defining an interconnect network comprising a plurality of wire connections, the defining performed after modification of the interconnect network and before completion of the interconnect network. An adjustment technique is applied to the wire connections of the defined interconnect network before completion of the interconnect network.
US09208275B2	Methods for fabricating integrated circuits including generating photomasks for directed self-assembly Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes generating a photomask for forming a DSA directing pattern overlying a semiconductor substrate. The DSA directing pattern is configured to guide a self-assembly material deposited thereon that undergoes directed self-assembly (DSA) to form a DSA pattern. Generating the photomask includes inputting DSA target patterns. The DSA target patterns are grouped into groups including a first group and a group boundary is defined around the first group as an initial OPC mask pattern. A circle target is generated around each of the DSA target patterns in the first group to define a merged circle target boundary. The initial OPC mask pattern is adjusted and/or iteratively updated using the merged circle target boundary to generate an output final OPC mask pattern.
US09208271B1	Transaction correlation system Embodiments provide methods, systems, and devices involving transaction correlation tools that may record a limited number of run attributes yet are likely to be important in the debugging process. Some embodiments may include novel tabular representations of the runs. Embodiments may allow the user to specify directives for the recording of the runs and the creation of these tables. Embodiments may include comparing sets of failing and passing runs, which may be generated at random. This approach is called statistical debugging, as it employs statistical tools to find attributes of the DVE that tend to co-occur with the failure.
US09208267B2	Cloud based simulation and analysis for control appliances A cloud computing system according to various embodiments can include a computing cloud comprising at least one processing unit and at least one database and a plurality of users in communication with the computing cloud. The computing cloud is configured to receive a request to select a product and define a model of an infrastructure system associated with the selected product. The computing cloud generates a first model of the infrastructure system including a first control system, and generates a second model of the infrastructure system including a second control system. The cloud computing simulates a first control operations of the first model of the infrastructure system in operation with the first control system and simulates a second control operations of the second model of the infrastructure system in operation with the second control system. The cloud computing compares results of the first and second control operations.
US09208265B2	System and method for jewelry design A system for designing a customized ring may include a ring style selection component, a ring top design component, a ring side design component, and an image panel component where, the components support an interface for monitoring the progress of the ring design and an image panel may show an image of the ring that is periodically updated based on customization input. A system for creating and displaying ring assets may include an extraction component, a rendering component, and a display component. A system for displaying customized bezel text may include a text mapping module configured to receive bezel parameters, map text in a two dimensional space, map text in a three-dimensional space defined by bezel geometry, develop code for displaying the text, and displaying the text.
US09208264B2	Method for semi-automatic quantity takeoff from computer aided design drawings Embodiments of the present invention include methods for semi-automatic quantity takeoff from computer aided design (CAD) drawings. For each drawing object a corresponding takeoff object is created. A takeoff object may include the dimension of geometry (e.g., numerical, lineal, area) to quantify, the object parameter to be quantified for all instances of the object, and the takeoff calculations to be performed. After a takeoff object is defined, the corresponding instances are automatically identified and quantified. The cost of each instance is then calculated and added to the project cost. Using automated methods, instead of manual techniques, reduces errors and increases the accuracy of the generated cost estimate. Advantageously, the takeoff objects may be saved in the system database and reused for different projects, thereby ensuring consistency between projects. Furthermore, reusing takeoff information, both between instances of an object and between projects, reduces the time required to perform cost estimates.
US09208262B2	System for displaying a plurality of associated items in a collaborative environment A system is described for displaying a plurality of associated items in a collaborative environment. The system may include a memory, an interface, and a processor. The memory may store items, each item associated with another item. The processor may provide the graphical representation of the items to a user where each item is represented by a shape. The processor may receive a request to associate a first metric of the items with a size of each shape and a request to associate a second metric of the items with a color of each shape. The processor may transform the graphical representation such that the size of each shape is based on the value of the first metric of each item, and the color of each shape is based on the value of the second metric of each item. The processor may provide the transformed graphical representation to the user.
US09208261B2	Power reduction for fully associated translation lookaside buffer (TLB) and content addressable memory (CAM) An apparatus and method for saving power during TLB searches is disclosed. In one embodiment, a TLB includes a CAM having a plurality of entries each storing a virtual address, and enable logic coupled to the CAM. Responsive to initiation of a TLB query by a thread executing on a processor that includes the TLB, the enable logic is configured to enable only those CAM entries that are associated with the initiating thread. Entries in the CAM not associated with the thread are not enabled. Accordingly, an initial search of the TLB for responsive to the query is conducted only in the CAM entries that are associated with the thread. Those CAM entries that are not associated with the thread are not searched. As a result, dynamic power consumption during TLB searches may be reduced.
US09208256B2	Methods of coding and decoding, by referencing, values in a structured document, and associated systems The present invention concerns coding an XML-type structured document. The structured document includes values to be coded. The coding uses at least one indexing dictionary which includes entries. At least one entry value of the dictionary linked to the value to be coded is identified, by matching between at least part of one of the values and a subpart of the other value. The value to be coded is coded by reference, according to the matching, to at least the identified entry of the dictionary.
US09208254B2	Query and index over documents A document index is generated from a set of documents and is used to identify documents that match one or more queries. A tree is generated for each document with a node corresponding to each object of the document. The nodes of the generated trees are merged or combined to generate the document index, which is itself a tree. In addition, an inverted index is generated for each node of the index that identifies the tree(s) that the node originated from. When a query is received, the query is first executed against the document index tree: during the execution, proper set operations are applied to the inverted indices associated with the nodes matched by the query. The resulted set identifies the documents that may match the query. The query is then executed on the identified documents.
US09208251B2	Computer-based evaluation tool for selecting personalized content for users The invention relates to a method and system for selecting personalized content for a user, the method being performed by an evaluation tool instantiated on a computing device and comprising the evaluation tool. The evaluation tool creates a content selection rule for the user for finding and filtering content items, such as advertising content. The tool generates a content selection algorithm from the content selection rule for determining which content items to present to the user and presents the content item to the user based on the content selection algorithm and allows the user to interact with the presented content item. The tool also monitors the user's interaction with the presented content item for determining a modification of the content selection algorithm based on the user's interaction and presents the content item to the user based on the modified selection algorithm. The tool also enables the user to view and modify the selection rule and the content selection algorithm.
US09208247B2	Real estate content tracking on the internet Server systems and methods to track digital content pertaining to real estate listings use markers embedded within digital media files. The digital media files are accessible for presentation to client computing platforms through real estate search servers. Responsive to a digital media file being presented, for example through a browser software application, on a client computing platform, information related to browsing activity on the client computing platform is transmitted to a server that associates individual ones of the digital media files with individual ones of the real estate search servers through which a digital media file is presented.
US09208245B2	System and method for compending blogs The present disclosure provides a system and method for preparing compended biogs, In at least one embodiment, a method of posting blog content to a compended blog comprises establishing a compended blog having a selected keyword, obtaining a blog content, processing the blog content to identify at least one blog content keyword contained within the blog content, comparing the identified blog content keyword to the selected keyword to determine whether a match exists based upon at least one predetermined criterion, and posting the blog content the compended blog if the comparison reveals a match based upon meeting or exceeding the predetermined criterion.
US09208240B1	Implementation of a web scale data fabric Methods and systems for processing machine accelerated and augmented customer data using a Web-Scale Data Fabric (WSDF). According to embodiments, the data may be received as data transfer objects from a set of business operations client applications. The data transfer objects may be analyzed using complex event processing (CEP) and, based on the analyzing, rules specific to the business operations client application may be applied. The methods and systems may semantically classify text specific to the business operations client application. A federated database (FD) may archive the receive data transfer objects as well as analysis data specific to the business operations client application.
US09208239B2	Method and system for aggregating music in the cloud Cloud-based systems and methods for aggregating media collections of users are disclosed. In one embodiment, in order to generate an aggregate media collection catalog of a first user, a cloud-based media aggregation system identifies one or more second users that have an identifier that is the same as an identifier of the first user for purposes of media collection aggregation. The media aggregation system then aggregates media collection catalogs of the one or more second users with a media collection catalog of the first user to thereby provide an aggregate media collection catalog of the first user.
US09208236B2	Presenting search results based upon subject-versions Systems, methods, and computer-readable storage media for identifying queries having a version-intent and presenting search results in accordance with the version-intent are provided. Subject-versions associated with retrievable documents are identified and associated therewith as subject-version tags. When a search query is received, it is determined whether the query has a version-intent indicative of a particular version associated with a subject of the query. Documents are retrieved that satisfy the input query and ranked for presentation based upon the particular subject-version indicated by the version-intent. The ranked documents are then presented. Also presented is a user-manipulatable tool, manipulation of which permits a user to indicate that information concerning a different subject-version is desired. Upon receiving such indication, the search results are changed such that documents having subject-version tags indicative of the newly-indicated version-intent are ranked higher and receive more prominent placement than documents lacking such subject-version tags.
US09208233B1	Using synthetic descriptive text to rank search results Methods, systems, and apparatus, including computer programs encoded on computer storage media, for using synthetic descriptive text to rank search results. One of the methods includes receiving a search query from a user device; receiving data identifying a plurality of search result resources and respective initial scores for each of the search result resources; determining, from a search engine index, that a particular search result resource of the plurality of search result resources is associated with one or more pieces of synthetic descriptive text, wherein each piece of synthetic descriptive text is generated by applying a respective template to a respective linking resource that links to the particular search result resource; computing a synthetic descriptive text score for the particular search result resource; and adjusting the initial score for the particular search result resource based at least in part on the synthetic descriptive text score.
US09208229B2	Anchor text summarization for corroboration A system and method for corroborating a set of facts. If the anchor text of the references to a document matches the name of a set of facts, the referenced document is used to corroborate the set of facts. By analyzing the anchor text of the references to the document, the system is capable of determining if a document is relevant to the set of facts. These documents can then be used to corroborate or refute the facts, thereby improving their overall quality.
US09208227B2	Electronic apparatus, reproduction control system, reproduction control method, and program therefor Provided is an electronic apparatus including: a storage to store first and second contents, each of which includes scenes, and meta-information items each indicating a feature of each scene of the first and second contents; a reproducer to reproduce the first and second contents; an operation receiver to receive an input of an operation by a user; and a controller to control the storage to store an operation-history information item indicating an operation history of the user for each scene during reproduction of the first content while it is associated with the meta-information item of each scene, to calculate a similarity between scenes of the first and second contents based on the meta-information items, and to control the reproducer to change a reproduction mode for each scene based on the operation-history information item and the similarity during reproduction of the second content.
US09208226B2	Apparatus and method for generating evidence video Disclosed herein are an apparatus and method for generating evidence video. The apparatus includes a video object indexing unit, a video object search unit, and an evidence video generation unit. The video object indexing unit recognizes an object by storing and analyzing videos received from multiple surveillance cameras, extracts the features of the recognized object, and then generates object metadata. The video object search unit compares received search conditions with the object metadata, and then outputs search results, including the feature information of at least one object, which corresponds to the search conditions. The evidence video generation unit generates an evidence video by aggregating only videos including a specific object selected from the search results.
US09208223B1	Method and apparatus for indexing and querying knowledge models A method and apparatus for indexing content. The method includes the steps of converting content to one or more context knowledge graphs, identifying one or more knowledgebase triples or entities from the one or more context knowledge graphs, for each knowledgebase triple or entity, identifying one or more knowledgebase variations thereof, and storing the one or more knowledgebase variations as a knowledgebase representation of the content in a reverse index to a non-volatile computer readable storage medium.
US09208221B2	Computer-implemented system and method for populating clusters of documents A computer-implemented system and method for populating clusters of documents is provided. A set of clusters is placed in a display in relation to a common origin. One of a plurality of unclustered documents in the display is selected and an angle θ of the document from the common origin is determined. An angle σ of the cluster relative to the common origin is computed for each cluster. A difference is determined between the document angle θ and one such cluster angle σ. A predetermined variance is applied to the difference. The document is placed into the cluster when the difference is less than the variance.
US09208216B2	Transforming data into consumable content Concepts and technologies are described herein for transforming data into consumable content. In accordance with the concepts and technologies disclosed herein, a computing device can execute a transformation engine for transforming data into the consumable content. The computing device can be configured to analyze the data to identify relationships within data elements or other portions of the data. The computing device also can determine a visualization model to apply to the data and to choose a world based upon the determined visualization model. The computing device can obtain rules associated with the selected or chosen world, and can apply the rules to the data to generate the output. In some embodiments, the computing device can be configured to obtain and apply feedback to the output.
US09208215B2	User classification based on data gathered from a computing device Data regarding user actions on a user device is gathered from the user device (and/or from another computing device) by a server. The data is analyzed to make a decision. The decision is sent by the server to the user device (e.g., directly or via another computing device) and then used by the user device to implement a new action on the user device. This process may be automatically repeated in order to provide real-time customization of the user device.
US09208213B2	System and method for network user interface OLAP report formatting A network-based system for enabling users connected over the network to an OLAP system to select formatting options for reports requested for processing by the OLAP system. The system enables a user to select the format for each report in a workbook or for a stand-alone report. The format specified may be multiple levels of format that are applied in a hierarchical manner including global formats that apply to all reports in a workbook, report formats which apply to specific reports in the workbooks, attribute/element/metric formats which apply to specific attributes, elements, and metrics of a report, and value formats which apply to specific values within an element of a report. The formats specified may also comprise merged report formats, combined grid and graphs within a report and an autoformat that enables each recipient of the report to specify the format in which that recipient views the report when the report is received.
US09208209B1	Techniques for monitoring transformation techniques using control charts Techniques for applying transformation techniques and using transformation outputs to implement remedial actions are included. A system may include a receiver that may receive time series data including data points and one or more specifications for a transformation technique applicable to the time series data. The system may include a transformation engine that may apply the transformation technique to the time series data to produce outputs. The system may include a control engine that may determine a set of control limits using, for example, a control chart and a set of residual values. The system may include an anomaly detection engine that may generate the set of residual values using the current data points and the outputs. The anomaly detection engine may further identify one or more anomalies of the set of residual values based on the set of control limits and the control chart.
US09208208B2	Table application programming interfaces (APIs) A device receives, in a technical computing environment (TCE), a first variable with a first data type and a particular number of rows, and receives a second variable with a second data type and the particular number of rows. The second data type may be different than the first data type. The device receives a command to create a table based on the first variable and the second variable, and creates, based on the command, a heterogeneous table that includes the first variable and the second variable. The device stores the heterogeneous table, and/or provides the heterogeneous table for display.
US09208207B2	Distributed cache for graph data In one embodiment, a system includes a database operative to maintain a social graph; and a cache layer comprising a plurality of data shards, the data shards being divided among a plurality of cache nodes of a cache layer, wherein each data shard is operative to: maintain at least a portion of the social graph; receive a request to store associations between a first graph node and a second graph node of the social graph, wherein the first and second graph nodes are identified by a first and second unique identifier, respectively, the first and second graph nodes each corresponding to a particular data shard of the plurality of data shards; and update, responsive to the request, the data shard corresponding to the first graph node and the data shard corresponding to the second graph node.
US09208201B2	Cloud storage Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for data storage. In one aspect, a method includes the actions of identifying a running query from an application; determining one or more data items of a plurality of data items that the application has permission to view according to one or more application specific access policies; and presenting the one or more data items to the application while not presenting other data items of the plurality of data items.
US09208193B1	Problem management software Computer systems are managed by providing systems programmers with visual displays and user interfaces that identify certain issues and allow the system programmer to readily apply fixes, patches, and other updates without tediously sifting through a mountain of information and manually addressing those issues. The systems herein, provide a more streamlined approach for the system programmer by reducing the possibility of overlooking a particular issue that may adversely affect the system.
US09208188B2	Tenant management of a hosted multi-tenant application A hosted multi-tenant application is provided that permits a tenant to self-manage aspects of the operation of the application. A tenant may be permitted to upgrade the multi-tenant application on-demand or according to a schedule, to place the multi-tenant application into a read-only mode of operation, to create a shadow copy of their unshared organization database, to merge changes to a shadow copy into a master version of the unshared organization database, to create and revert to snapshots of an unshared organization database, and to perform other functions. A computing architecture that utilizes site-wide server computers and scale groups may be utilized to implement this functionality.
US09208187B2	Using a database system for selective inclusion and exclusion of types of updates to provide a configuration feed of a social networking system This disclosure provides implementations of methods, apparatus, systems, and computer program products for creating and managing granular relationships on an online social network. In some implementations, a request to generate an information feed is associated with configuration information, which identifies a source of information updates. Each of the information updates can be of a certain type. The configuration information identifies one or more of these types. An information update can be selected from the identified information source. The selected information update has one or more of the types associated therewith. The requested information feed is generated to include the selected information update and displayed on a display device.
US09208185B2	Indexing and search query processing A method for processing a search query according to one embodiment includes receiving a search query containing terms; combining at least some consecutive terms in the search query to create biwords; looking up at least some of the terms and biwords in a search index for identifying sections of documents containing the at least some of the terms and/or biwords; generating a content score for each of the identified sections based at least in part on a number of the terms and biwords found in the sections of each document, wherein the biwords are given a higher priority than matched terms, wherein the priority affects the content score; and selecting and outputting an indicator of at least one of the sections, or portion thereof, based at least in part on the content score.
US09208184B1	System design support apparatus and system design supporting method A system design support apparatus identifies design information elements each achieving a corresponding one of multiple requirements concerning a system to be newly designed, by using a first table. When multiple design information elements are identified with respect to a certain one of the requirements as a result of the identification, the system design support apparatus identifies a design information element that establishes a combination at a higher aptitude rank among the multiple design information elements, while referring to an aptitude rank of combined use of each of the multiple design information elements and design information elements identified with respect to another requirement among the multiple requirements, by using a second table. Then, the system design support apparatus outputs the design information elements, which are identified with respect to the multiple requirements, to a predetermined device.
US09208181B2	Migrating data from legacy storage systems to object storage systems One or more techniques and/or systems are provided for migrating a dataset from a file storage system to an object storage system. That is, a snapshot of a file system may be received from the file storage system. The snapshot may comprise file data associated with a file of the file system. The file may be converted into an object using the file data. The object may be stored within a data constituent volume of the object storage system. A namespace volume, used to track objects, may be populated with a redirector that maps a front-end data path (e.g., a path used by clients to reference the object) to a back-end data path that specifies a path to the object within the data constituent volume. In this way, a dataset of one or more files may be migrated from the file storage system to the object storage system.
US09208177B2	Facial recognition with social network aiding A facial recognition search system identifies one or more likely names (or other personal identifiers) corresponding to the facial image(s) in a query as follows. After receiving the visual query with one or more facial images, the system identifies images that potentially match the respective facial image in accordance with visual similarity criteria. Then one or more persons associated with the potential images are identified. For each identified person, person-specific data comprising metrics of social connectivity to the requester are retrieved from a plurality of applications such as communications applications, social networking applications, calendar applications, and collaborative applications. An ordered list of persons is then generated by ranking the identified persons in accordance with at least metrics of visual similarity between the respective facial image and the potential image matches and with the social connection metrics. Finally, at least one person identifier from the list is sent to the requester.
US09208173B1	Techniques for medical image retreival A technique for searching for an image includes calculating wavelet features of a plurality of images. A keyword included in radiographic interpretation information is extracted for each of the stored images. The calculated wavelet features and the extracted keywords are stored in association with the respective stored images. A newly taken image is acquired and a wavelet feature of the acquired image is calculated. A keyword included in radiographic interpretation information corresponding to the acquired image is extracted and a search for similar radiographic interpretation information from the stored keywords is performed. A wavelet feature-based spatial distance between the acquired image and each of images corresponding to the radiographic interpretation information found is calculated. A search result of any images for which the calculated wavelet feature-based spatial distance is shorter than a predetermined value is output, in ascending order of the calculated wavelet feature-based spatial distance.
US09208172B2	Method and system for vehicle identification A vehicle identification system and method comprising (a) Calculating vehicle image and reference image of each vehicle by algorithm, in order to obtain respectively the first feature point set and second feature point set. (b) Comparing first feature point with second feature point to calibrate the vehicle image of each vehicle. (c) Establishing plurality of vehicle model image with a gradient bevel distance of the base of the conversion of such vehicles. (d) Capturing instant image of the vehicle. (e) Calculating instant image and reference image by algorithm to obtain respectively the third feature point and the second feature point. (f) Comparing the second feature point and the third feature point to calibrate the instant vehicle image. (g) The instant judgments greatest body image and the gradient of each pixel in each of the base vehicle model for each pixel of the image of the product to determine the real-time vehicle body image should compare of the vehicle model image of one of them.
US09208170B1	Classifying natural mapping features Methods, systems, and apparatus, including computer programs encoded on computer storage media, for computerized travel services. One of the methods includes receiving natural feature mapping data, the natural feature mapping data representing geographic footprints of multiple natural features; receiving political feature mapping data, the political feature mapping data representing geographic footprints of multiple political features; classifying the natural features as a destination or not a destination, including: classifying at least one of the natural features as a destination based at least in part on determining that the geographic footprint of the natural feature overlaps with more than one of the geographic footprints of the political features, and storing data representing the natural features classified as a destination in a geographic data store.
US09208168B2	Inter-protocol copy offload Methods and apparatuses for performing inter-protocol copy offload operations are provided. In one embodiment, a method includes receiving a request in a first interface protocol from a host device. The request is a request to copy a data set from a source data storage location to a destination data storage location. The request includes a token, representing the data set, to be copied that was created using a second interface protocol that is different from the first interface protocol. The method also includes transferring the data set, in response to receiving the request, from the source data storage location to the destination data storage location without transferring the data set to the host device.
US09208166B2	Seeding replication A system, method and computer program product for determining one or more candidate segments for replication. One or more but not all files stored on a deduplicated storage system are selected to be replicated. One or more segments referred to by the selected one or more but not all files are determined. A data structure is created that is used to indicate that at least the one or more segments are to be replicated. In the event that an indication based at least in part on the data structure indicates that a candidate segment stored on the deduplicating storage system is to be replicated, the candidate segment is replicated.
US09208165B2	Data archive system The data archive system according to the present disclosure includes a client terminal 3, and a NAS device 12 connected to the client terminal 3 via a network 5. The NAS device 12 includes a server 2 and a storage device 1. The storage device 1 includes a drive 7 to record a file on a medium 9. The server 2 stores a file name of the file recorded on the medium 9 by the drive 7 and location information of the medium 9 in association with each other. Upon start of operation of reading a specific file, the client terminal 3 acquires location information of a medium 9 associated with a file name of the specific file from the server 2 via the network 5, and displays different icons according to the location information.
US09208163B2	Methods for preserving generation data set sequences Methods for automating the processing of generation data groups as groups prior to data recovery are described. The generation data groups to be recovered may correspond with a data storage volume that has been taken offline or has suffered a hardware failure. Prior to data recovery, a table of data sets associated with the data to be recovered may be created and then sorted based on the base names, creation dates and generation numbers of the data sets. The sorted table may be used to identify a particular sequence of generation data sets associated with a particular generation data group to be recovered. The generation data sets corresponding with the particular generation data group to be restored may be selected based on a catalog status of the particular generation data group and whether the particular generation data group is in a rolled-off or wrapped state.
US09208160B2	System and method for performing an image level snapshot and for restoring partial volume data The present invention relates to a method for performing an image level copy of an information store. The present invention comprises performing a snapshot of an information store that indexes the contents of the information store, retrieving data associated with the contents of the information store from a file allocation table, copying the contents of the information store to a storage device based on the snapshot, and associating the retrieved data with the copied contents to provide file system information for the copied contents.
US09208159B2	System and method for investigating large amounts of data A data analysis system is proposed for providing fine-grained low latency access to high volume input data from possibly multiple heterogeneous input data sources. The input data is parsed, optionally transformed, indexed, and stored in a horizontally-scalable key-value data repository where it may be accessed using low latency searches. The input data may be compressed into blocks before being stored to minimize storage requirements. The results of searches present input data in its original form. The input data may include access logs, call data records (CDRs), e-mail messages, etc. The system allows a data analyst to efficiently identify information of interest in a very large dynamic data set up to multiple petabytes in size. Once information of interest has been identified, that subset of the large data set can be imported into a dedicated or specialized data analysis system for an additional in-depth investigation and contextual analysis.
US09208158B2	System and method for content syndication service A method for providing content syndication to subscribers including receiving one or more content items from a plurality of information sources. One or more tags are assigned to the one or more content items, the one or more tags indicating a taxonomy of the one or more content items. One or more keywords associated with the one or more content items and a media type of the one or more content items are identified. The one or more content items are indexed with the one or more tags, the one or more keywords, and the media type. The method further includes retrieving the one or more content items based on the one or more tags, the one or more keywords, and the media type.
US09208156B2	Acquiring statistical access models One or more embodiments include collecting data associated with a first access profile, collecting data associated with a second access profile, determining whether the data associated with the first access profile has a particular number of characteristics in common with the data associated with the second access profile, assigning a statistical access model associated with the second access profile to the first access profile based on the particular number of characteristics that the data associated with first access profile has in common with the data associated with the second access profile, and detecting an anomalous access event based on the statistical access model.
US09208155B2	Adaptive recommendation system A recommendation system for optimizing content recommendation lists is disclosed. The system dynamically tracks a list interaction history of a user, which details that user's interactions with a plurality of different lists presenting different recommended items to that user. The system automatically correlates one or more list preferences with that user based on the list interaction history, and builds a recommendation list with a plurality of candidate items having different recommendation confidences. The recommendation list is built such that each candidate item with a higher recommendation confidence is prioritized over each candidate item with a lower recommendation confidence according to the one or more list preferences correlated to that user.
US09208154B1	IDF weighting of LSH bands for live reference ingestion Down scoring overcrowded bands via IDF weighting scores provides a soft way to reduce the effect of common bands from Locality Sensitive Hashing (LSH) processes. An index component indexes live video references of a live streaming infrastructure pathway process in a reference index. A scoring component scores a set of bands with a set of inverse document frequency (IDF) weighting scores in the reference index. A high score is generated for bands that are featured in a small number of references and a low score is generated for bands featured in a high number of references.
US09208152B2	Document retrieval apparatus, document retrieval method, and computer readable medium A document retrieval apparatus includes a switching section that switches an operation mode between a first mode and a second mode, a processor, a storing section, and a retrieval section. In the first mode, when a document-related operation of a certain type is performed, the processor performs a process corresponding to the operation, and the storing section stores information indicating the operation and a document being a target or a result of the process into a memory so as to associate the information with the document. In the second mode, when the operation is performed, the retrieval section does not perform the process, and retrieves the document which was a target or a result of the process on the basis of data stored in the memory.
US09208146B2	System for providing universal communication that employs a dictionary database Provided is a system for providing universal communication, by generating a universal communication signal including a frequency component including light, a sound, a language, a dialect, an electromagnetic wave, and a vibration, by recording/storing the generated universal communication signal, and by converting an input signal into a universal communication signal, to enable communication between a human and a communication media or a non-human entity.
US09208144B1	Crowd-sourced automated vocabulary learning system A method and system for providing users with an individual learning dictionary having exact context-based translation of words and phrases. Each user is provided with a personal dictionary containing words and phrases that the user had encountered and translated previously. The phrases and words are automatically added to the user personal dictionary along with their context-based translations chosen by the user. A contextual dictionary allows a user to choose a correct meaning of a word and save it along with the context for future reference.
US09208142B2	Analyzing documents corresponding to demographics Embodiments of the present invention disclose a method, computer program product, and system for analyzing documents corresponding to demographics. A computer determines whether a first text analysis algorithm corresponds to a demographic of a document, wherein Natural Language Processing (NLP) utilizes text analysis algorithms to produce an analysis of the document and provide annotations. Responsive to determining that the first text analysis algorithm does correspond to the demographic of the document, the computer analyzes the document utilizing the determined corresponding first text analysis algorithm. In another embodiment, the computer determines whether a second text analysis algorithm is available. Responsive to determining that a second text analysis algorithm is not available, the computer provides information from the analysis of the document utilizing one or more text analysis algorithms.
US09208141B2	Generating and displaying active reports Embodiments of the present invention enable the generation and display of active reports. Applications of the present invention include its use in embodiments of a web-based product for managing an Information Technology (IT) infrastructure although the present invention is not limited to such applications. In embodiments, an active report is an active report file comprising report data and a user interface (UI) reference to a network location of code that defines an interactive UI comprising graphical user interface (GUI) components to be rendered when displaying the report data. In embodiments, the interactive UI is defined by UI code (such as an Adobe Flash Small Web Format (SWF) file) that also defines the UI of a rich internet application (RIA). In embodiments, the UI reference may be a link designating a location to the location of the UI code on a network, such as the Internet.
US09208140B2	Rule based apparatus for modifying word annotations A rule based apparatus and method for modifying word annotations in an annotated text base, the apparatus comprising: an index creator component for creating an index of word annotations; an annotations modifying component for modifying word annotations; and a retriggering component, responsive to said annotations modifying component, for retriggering a rules engine to modify all occurrences of a matching word annotation in said annotated text base and updating the index of word annotations with the modified occurrences of a matching word annotation in said annotated text base.
US09208135B1	Tools to increase site performance Techniques described herein provide one or more tools to operators of one or more sites (e.g., websites) to facilitate increased performance of the respective sites. More specifically, these tools may provide feedback to the operators that allows the operators to make informed decisions regarding the use of features and content on their respective sites, which in turn may decrease latency experienced by the users of these sites.
US09208134B2	Methods and systems for tokenizing multilingual textual documents Methods and systems for tokenizing multilingual textual documents are provided. A method implemented in a computer infrastructure, includes determining an attribute of a current character in input text, the attribute of the current character indicating one or more classes of characters the current character is assigned thereto. The method further includes determining one or more attributes of one or more next characters in the input text, the one or more attributes of the one or more next characters indicating the one or more classes the one or more next characters are assigned thereto. The method further includes constructing a token of the input text that includes the current character and the one or more next characters, the attribute of the current character and the one or more attributes of the one or more next characters intersecting with each other.
US09208133B2	Optimizing typographical content for transmission and display A method is provided for displaying a page of content contained in an optimized document. In some embodiments, an optimized document is obtained, where the optimized document contains at least one page of content. A compressed page record in the optimized document that corresponds to a page to be displayed may be located. The compressed page record may be decompressed using a decompression counterpart to a technique used to compress the page record. An unfiltering may be performed on each set of values in the page record according to a filter determined to be applied to the particular set of values. Thereafter, the decompressed content may be displayed.
US09208128B2	Course determination system and driving assist system of vehicle A course determining system of a vehicle determines, when two or more objects that are present around the vehicle are detected, whether a passable road which the vehicle can enter is present between the two or more objects, recognizes the two or more objects as a single object when it is determined that there is no passable road between the two or more objects, and determines a running course based on at least one road including the passable road when it is determined that the passable road is present between the objects.
US09208127B2	Method for operating a vehicle powertrain A method of operating a vehicle powertrain, includes: sensing a vehicle speed; selecting a plurality of control strategies; activating one of the plurality of control strategies, the control strategy including: (i) operating the vehicle in a stationary start-stop mode when the vehicle speed is below a first threshold; and (ii) operating the vehicle in a rolling stationary start-stop mode when the vehicle speed is above the first threshold but below a second threshold.
US09208125B2	Methods for operating and configuring a reconfigurable processor The invention provides a method of compiling computer program instructions for implementation on a reconfigurable processor comprising a plurality of operational cells, each operational cell being connectable to and disconnectable from one or more of the other operational cells via a programmable interconnect, the method comprising: a routing step in which one or more signal processing paths are determined for performing one or more signal processing operations defined by the computer program instructions, each signal processing path comprising two or more of the operational cells connected via the programmable interconnect, the said signal processing paths being capable of implementation on the said operational cells and the said interconnect of the reconfigurable processor to perform the said one or more signal processing operations; and a post-routing step performed subsequent to the routing step in which an extended signal processing path is determined by extending one of the said signal processing paths determined in the routing step such that a critical path of the extended signal processing path is longer than a longest critical path of the signal processing paths determined in the routing step.
US09208121B2	High performance interconnect physical layer A periodic control window is embedded in a link layer data stream to be sent over a serial data link, where the control window is configured to provide physical layer information including information for use in initiating state transitions on the data link. The link layer data can be sent during a link transmitting state of the data link and the control window can interrupt the sending of flits. In one aspect, the information includes link width transition data indicating an attempt to change the number of active lanes on the link.
US09208113B2	Deferred inter-processor interrupts A data processing system includes, in one embodiment, at least a first processor and a second processor and an interrupt controller, and the system provides a deferred inter-processor interrupt (IPI) that can be used to wake up the second processor from a low power sleep state. The deferred IPI is, in one embodiment, delayed by a timer in the interrupt controller, and the deferred IPI can be cancelled by the first processor if the first processor becomes available to execute a thread that was made runnable by an interrupt which triggered the deferred IPI.
US09208110B2	Raw memory transaction support Methods, systems, and apparatus for implementing raw memory transactions. An SoC is configured with a plurality of nodes coupled together forming a ring interconnect. Processing cores and memory cache components are operatively coupled to and co-located at respective nodes. The memory cache components include a plurality of last level caches (LLC's) operating as a distributed LLC and a plurality of home agents and caching agents employed for supporting coherent memory transactions. Route-back tables are used to encode memory transactions requests with embedded routing data that is implemented by agents that facilitate data transfers between link interface nodes and memory controllers. Accordingly, memory request data corresponding to raw memory transactions may be routed back to requesting entities using headerless packets.
US09208108B2	Method and system for improved flash controller commands selection A system for selecting a subset of issued flash storage commands to improve processing time for command execution. A plurality of ports stores a first plurality of command identifiers and are associated with the plurality of ports. Each of the first plurality of arbiters selects an oldest command identifier among command identifiers within each corresponding port resulting in a second plurality of command identifiers. A second arbiter makes a plurality of selections from the second plurality of command identifiers based on command identifier age and the priority of the port. A session identifier queue stores commands associated with the plurality of selections among other commands forming a third plurality of commands. A microcontroller selects an executable command from the third plurality of commands for execution based on an execution optimization heuristic. After execution of the command, the command identifier in the port is cleared.
US09208105B2	System and method for intercept of UEFI block I/O protocol services for BIOS based hard drive encryption support An information handling system and method performs Unified Extensible Firmware Interface (UEFI) interception and pre-processing of data associated with block input/output (I/O) commands targeting encrypted storage devices. A UEFI interceptor block (IB) I/O driver intercepts each block I/O command targeting block addresses on a storage device and identifies whether any of the target block addresses is encrypted. In response to identifying an encrypted block address among the target block addresses, the UEFI IB I/O driver forwards data associated with the encrypted block address to an encryption-decryption module to perform one of an encryption and a decryption of the data. Final handling of the block I/O command is performed using a block I/O driver chained to the UEFI IB I/O driver. Data associated with I/O commands targeting encrypted block addresses is first processed by the encryption-decryption module before final handling of the I/O command is performed by the block I/O driver.
US09208104B2	Content replacement and refresh policy implementation for a content distribution network A method for replacing, refreshing, and managing content in a communication network is provided. The method defines an object policy mechanism that applies media replacement policy rules to defined classes of stored content objects. The object policy mechanism may classify stored content objects into object groups or policy targets. The object policy mechanism may also define metric thresholds and event triggers as policy conditions. The object policy mechanism may further apply replacement policy algorithms or defined policy actions against a class of stored content objects. The media replacement policy rules are enforced at edge content storage repositories in the communication network. A computing device for carrying out the method, and a method for creating, reading, updating, and deleting policy elements and managing policy engine operations, are also provided.
US09208103B2	Translation bypass in multi-stage address translation A computer system that supports virtualization may maintain multiple address spaces. Each guest operating system employs guest virtual addresses (GVAs), which are translated to guest physical addresses (GPAs). A hypervisor, which manages one or more guest operating systems, translates GPAs to root physical addresses (RPAs). A merged translation lookaside buffer (MTLB) caches translations between the multiple addressing domains, enabling faster address translation and memory access. The MTLB can be logically addressable as multiple different caches, and can be reconfigured to allot different spaces to each logical cache. Lookups to the caches of the MTLB can be selectively bypassed based on a control configuration and the attributes of a received address.
US09208100B2	Directory replacement method and device The present invention provides a directory replacement method and device. An HA receives a data access request including a first address from a first CA, if a designated storage where a directory is located is entirely occupied by the directory, and a first directory entry corresponding to the first address is not in the directory, the HA selects a second directory entry from the directory, deletes it and adds the first directory entry into the directory; before the HA replaces the directory entry in the directory, no matter what status (for example, I status, S status or A status) a share status of a cache line corresponding to an address in the directory entry to be replaced is, the HA does not need to request a corresponding CA to perform an invalidating operation on data, but directly replaces the directory entry in the directory, thereby improving replacement efficiency.
US09208099B2	Adjustment of the number of task control blocks allocated for discard scans A controller receives a request to perform a release space operation. A determination is made that a new discard scan has to be performed on a cache, in response to the received request to perform the release space operation. A determination is made as to how many task control blocks are to be allocated to the perform the new discard scan, based on how many task control blocks have already been allocated for performing one or more discard scans that are already in progress.
US09208097B2	Cache optimization A system and method for management and processing of resource requests at cache server computing devices is provided. Cache server computing devices segment content into an initialization fragment for storage in memory and one or more remaining fragments for storage in a media having higher latency than the memory. Upon receipt of a request for the content, a cache server computing device transmits the initialization fragment from the memory, retrieves the one or more remaining fragments, and transmits the one or more remaining fragments without retaining the one or more remaining fragments in the memory for subsequent processing.
US09208096B2	Cache pre-fetching responsive to data availability Systems and methods for pre-fetching data are disclosed that use a cache memory for storing a copy of data stored in a system memory and mechanism to initiate a pre-fetch of data from the system memory into the cache memory. The system further comprises an event monitor for monitoring events that is connected to a path on which signals representing an event are transmitted between one or more event generating modules and a processor. In some embodiments, the event monitor initiates a pre-fetch of a portion of data in response to the event monitor detecting an event indicating the availability of the portion of data in the system memory.
US09208095B2	Configurable cache for a microprocessor A cache module for a central processing unit has a cache control unit with an interface for a memory, a cache memory coupled with the control unit, wherein the cache memory has a plurality of cache lines, at least one cache line of the plurality of cache lines has an address tag bit field and an associated storage area for storing instructions or data, wherein the address tag bit field is readable and writeable and wherein the cache control unit is operable upon detecting that an address has been written to the address tag bit field to initiate a preload function in which instructions or data from the memory are loaded from the address into the at least one cache line.
US09208093B2	Allocation of memory space to individual processor cores Techniques are generally described for a multi-core processor with a plurality of processor cores. At least one cache is accessible to at least two of the plurality of processor cores. The multi-core processor can be configured for separately allocating a memory space within the cache to the individual processor cores accessing the cache.
US09208089B2	Selective release-behind of pages based on repaging history in an information handling system An information handling system (IHS) includes an operating system with a release-behind component that determines which file pages to release from a file cache in system memory. The release-behind component employs a history buffer to determine which file pages to release from the file cache to create room for a current page access. The history buffer stores entries that identify respective pages for which a page fault occurred. For each identified page, the history buffer stores respective repage information that indicates if a repage fault occurred for such page. The release-behind component identifies a candidate previous page for release from the file cache. The release-behind component checks the history buffer to determine if a repage fault occurred for that entry. If so, then the release-behind component does not discard the candidate previous page from the cache. Otherwise, the release-behind component discards the candidate previous page if a repage fault occurred.
US09208087B2	On-chip data caching method and apparatus The present invention discloses a data caching method and apparatus, and relates to the field of network applications. The method includes: receiving a first data request; writing target data in the first data request into an on-chip Cache, and counting a storage time of the target data in the on-chip cache; enabling a delay expiry identifier of the target data when the storage time of the target data in the Cache reaches a preset delay time; and releasing the target data when the delay expiry identifier of the target data is in an enabled state and processing of the target data is complete.
US09208084B2	Extended main memory hierarchy having flash memory for page fault handling A computer system with flash memory in the main memory hierarchy is disclosed. In an embodiment, the computer system includes at least one processor, a memory management unit coupled to the at least one processor, and a random access memory (RAM) coupled to the memory management unit. The computer system may also include a flash memory coupled to the memory management unit, wherein the computer system is configured to store at least a subset of a plurality of pages in the flash memory during operation. Responsive to a page fault, the memory management unit may determine, without invoking an I/O driver, if a requested page associated with the page fault is stored in the flash memory and further configured to, if the page is stored in the flash memory, transfer the page into RAM.
US09208077B1	Forced map entry flush to prevent return of old data A data storage device flushes newly written data in response to certain events such that, when the device has acknowledged newly written data, the device cannot return old data of the referenced logical block address to the host in any case. If the data of the logical block address has been corrupted, the device returns an uncorrectable error, not old data. A “force map entry flush” flushes modified map entries to NAND when an upper page is programmed. After a power failure and restoration, a storage device is able to analysis map entries to determine whether there is some host data in the uncorrectable die, then prevent return of old data to a host.
US09208073B2	Firmware storage and maintenance A mechanism is provided for improved firmware storage and maintenance. For each master device in a plurality of master devices: an amount of Flash memory space required by the master device is identified and the amount of Flash memory space from a Flash component is allocated to the master device as a virtual Flash memory allocation. An initial sector location of the virtual Flash memory allocation in a data structure is recorded as an offset into the Flash component and a length of the virtual Flash memory allocation and device information is also recorded in the data structure. Data that allows the master device to boot up is then loaded into the virtual Flash memory allocation.
US09208072B2	Firmware storage and maintenance A mechanism is provided for improved firmware storage and maintenance. For each master device in a plurality of master devices: an amount of flash memory space required by the master device is identified and the amount of Flash memory space from a Flash component is allocated to the master device as a virtual Flash memory allocation. An initial sector location of the virtual Flash memory allocation in a data structure is recorded as an offset into the Flash component and a length of the virtual Flash memory allocation and device information is also recorded in the data structure. Data that allows the master device to boot up is then loaded into the virtual Flash memory allocation.
US09208071B2	Apparatus, system, and method for accessing memory Apparatuses, systems, methods, and computer program products are disclosed for providing access to auto-commit memory. An auto-commit memory module is configured to cause a volatile memory buffer to commit data from the volatile memory buffer to a non-volatile memory medium in response to a trigger. A mapping module is configured to determine whether to associate a range of data with the volatile memory buffer. A bypass module is configured to service a request for the range of data directly from the volatile memory buffer in response to the mapping module determining to associate the range of data with the volatile memory buffer.
US09208070B2	Wear leveling of multiple memory devices A method of managing wear leveling in a data storage device includes determining whether a reliability measurement associated with a first portion of a first nonvolatile memory die satisfies a threshold. The first nonvolatile memory die is included in a plurality of memory dies. The method includes, in response to determining that the reliability measurement associated with the first portion of the first nonvolatile memory die satisfies the threshold, transferring first data from the first portion of the first nonvolatile memory die to a second nonvolatile memory die of the plurality of memory dies.
US09208069B2	Fuzzy counters for NVS to reduce lock contention A system for data management in a computing storage environment includes a processor device, operable in the computing storage environment, that divides a plurality of counters tracking write and discard storage operations through Non Volatile Storage (NVS) space into first, accurate, and second, fuzzy, groups where the first, accurate, group is one of incremented and decremented per each write and discard storage operation, while the second, fuzzy, group is one of incremented and decremented on a more infrequent basis as compared to the first, accurate group.
US09208067B2	Storage system and storage control method that compress and store data elements A pool is formed based on a plurality of storage devices. This pool is constituted by a plurality of real pages. Real pages of different lengths are included in this plurality of real pages. Among a plurality of virtual pages which make up a virtual volume, a controller compresses a write data element for a write destination virtual page, selects a real page of a real page length based on the data length of a data unit including the compressed write data element, and allocates the selected real page to the write destination virtual page.
US09208062B1	Promotion determination based on aggregated code coverage metrics Techniques are described for aggregating code coverage data generated from various types of testing of software modules, and automatically determining whether to promote software upwards in a multi-level software deployment hierarchy based on the aggregated code coverage data. In embodiments, a code coverage metric is determined for a software module, and the metric is compared to a set of promotion criteria, including whether the metric meets a predetermined threshold for quality. In some cases, the threshold may be a general threshold, a threshold based on the level of possible promotion, and/or a threshold that is based on an identified category for the software module such as whether the module is a front-end module, a shared module, a legacy module, or a critical module.
US09208060B1	Emulation-based expression evaluation for diagnostic tools Systems, methods and computer program products are described that enable a diagnostic tool, such as a debugger, to evaluate an expression based on the state of a target program process where the expression to be evaluated includes a call to a first function that exists in the target program process but where evaluation of such first function requires evaluation of a second function that does not exist in the target program process. For an expression such as this, the diagnostic tool emulates execution of the first function within a process other than the target program process, such as within the diagnostic tool process. In other embodiments, the emulation capability of the diagnostic tool is leveraged to enable a user thereof to simulate a modification of the target program process without making actual changes to the target program process.
US09208057B2	Efficient model checking technique for finding software defects A method for detecting defects in a computer program. The method steps include obtaining source code and a potential defect definition; identifying, based on the potential defect definition, a set of program objects associated with a potential defect in the source code; extracting an executable program slice having the potential defect from the source code; generating, by a processor, an abstracted model of the program slice by: modeling, using data abstraction, the set of program objects as data-abstracted variables, identifying, within the program slice, a set of control statements including predicates necessary for evaluating the set of control statements, modeling, using predicate abstraction, the predicates as predicate-abstracted Boolean variables, and creating, based on the data-abstracted variables and the predicate-abstracted Boolean variables, a finite state machine (FSM) model of the program slice; and identifying an error state of the FSM indicating an occurrence of the potential defect within the program slice.
US09208056B1	Transitive source code violation matching and attribution Methods, systems, and apparatus, including computer programs encoded on computer storage media, for matching and attributing code violations. One of the methods includes receiving a plurality of snapshots of a code base, including data representing a revision graph of the snapshots of the code base and data representing respective violations in each of the plurality of snapshots. A plurality of transitively matched violations in the code base are generated, wherein each transitively matched violation represents a respective sequence of matching violations from a first violation of a first snapshot to a second violation of a second snapshot, wherein each transitively matched violation identifies a respective first violation representing an initial occurrence of a coding defect in the code base and a respective second violation representing a last occurrence of the coding defect in the code base.
US09208053B2	Method and system for predicting performance of software applications on prospective hardware architecture A system and method for identifying optimal system architectures for a reference application are provided. The system and method comprise executing a reference application and a plurality of test applications on a current system architecture and sampling performance data for each of the applications. The performance data is used to compute an application signature for each application. A similarity element is derived from the application signatures that illustrates the similarity between each application and every other application. Using a similarity threshold and an algorithm, a subset of test applications that are similar to the reference application are derived.
US09208052B2	Algorithm selection for collective operations in a parallel computer Algorithm selection for collective operations in a parallel computer that includes a plurality of compute nodes may include: profiling a plurality of algorithms for each of a set of collective operations, including for each collective operation: executing the operation a plurality times with each execution varying one or more of: geometry, message size, data type, and algorithm to effect the collective operation, thereby generating performance metrics for each execution; storing the performance metrics in a performance profile; at load time of a parallel application including a plurality of parallel processes configured in a particular geometry, filtering the performance profile in dependence upon the particular geometry; during run-time of the parallel application, selecting, for at least one collective operation, an algorithm to effect the operation in dependence upon characteristics of the parallel application and the performance profile; and executing the operation using the selected algorithm.
US09208048B2	Determination method for determining installation direction of electronic device and electronic system A method is utilized for determining an installation direction of an electronic device. The electronic device is installed on an object and includes a device connector for utilizing a pluggable method to combine with an object connector of the object. A first interface and a second interface are configured in the device connector. When the electronic device is installed on the object by a first direction, the first interface is connected to an object interface of the object connector. When the electronic device is installed on the object by a second direction, a second interface is connected to the object interface of the object connector. The method includes detecting an outside connecting condition of the first interface and the second interface to generate a first result and a second result, and determining the installation direction of the electronic device according to the first result and the second result.
US09208047B2	Device hardware agent A server includes an electronic component, manager baseboard management controller (BMC), and a device hardware agent. The device hardware agent monitors operation of the electronic component and provides updates to the electronic component without utilizing a software agent.
US09208046B2	Method and system for optimizing testing efforts in system of systems testing A method and system for optimizing the testing efforts in system of systems testing includes receiving test parameters for a new constituent system in a system of systems. Based on the received test parameters, retrieving, historical test knowledge related to the system of systems. Based on the retrieved historical test knowledge, characterizing unique parameters from the received test parameters. The unique test parameters are combined in sequence or in parallel to identify executable test parameters and one or more test cases are selected corresponding to the identified executable test parameters for execution.
US09208040B2	Repair control logic for safe memories having redundant elements Repair control logic for a safe memory having redundant elements is provided. The repair control logic includes comparison logic including, for each bit slice of a memory array, a comparator circuit configured to determine whether a location value of an associated bit slice of the memory array is greater than a location value of a defective bit slice of the memory array, and data switching logic including, for each bit slice of the memory array, a switching circuit, responsive to a determination that the location value of the associated bit slice is greater than the location value of the defective bit slice, to switch data from the associated bit slice to an adjacent bit slice of the memory array.
US09208038B2	Detection of logical corruption in persistent storage and automatic recovery therefrom A method, system, and computer program product for restoring blocks of data stored at a corrupted data site using two or more mirror sites. The method commences by receiving a trigger event from a component within an application server environment where the trigger event indicates detection of a corrupted data site. The trigger is classified into at least one of a plurality of trigger event types, which trigger event type signals further processing for retrieving from at least two mirror sites, a first stored data block and a second stored data block corresponding to the same logical block identifier from the first mirror site. The retrieved blocks are compared to determine a match value, and when the match value is greater than a confidence threshold, then writing good data to the corrupted data site before performing consistency checks on blocks in physical or logical proximity to the corrupted data site.
US09208034B2	Determining security holes of a backup image A system and method provide for backing up and restoring using patch level data for operating system and application files. Patch level data for the files in the backup image may be displayed along with current patch level data. Further, files in a backup image may be replaced based on current patch level data indicating a patched version of the file in the backup image is available. Further, upon a restore, if a patched file is available for a corresponding file in a backup image, the patched file may be retrieved from a patch source and used in place of the file that would have been restored from the backup image.
US09208033B1	Consolidating decremental backups in a decremental backup chain Consolidating decremental backups in a decremental backup chain. In one example embodiment, a method for consolidating decremental backups in a decremental backup chain includes identifying a decremental backup chain that includes multiple decremental backups of a source storage and a base backup of the source storage, identifying, for consolidation, a sequential set of decremental backups in the multiple decremental backups, identifying a set of oldest blocks from the sequential set of decremental backups for unique block positions of blocks included in the sequential set of decremental backups, and creating a consolidated decremental backup that includes the set of oldest blocks.
US09208032B1	Managing contingency capacity of pooled resources in multiple availability zones A network-based services provider may reserve and provision primary resource instance capacity for a given service (e.g., enough compute instances, storage instances, or other virtual resource instances to implement the service) in one or more availability zones, and may designate contingency resource instance capacity for the service in another availability zone (without provisioning or reserving the contingency instances for the exclusive use of the service). For example, the service provider may provision resource instance(s) for a database engine head node in one availability zone and designate resource instance capacity for another database engine head node in another availability zone without instantiating the other database engine head node. While the service operates as expected using the primary resource instance capacity, the contingency resource capacity may be leased to other entities on a spot market. Leases for contingency instance capacity may be revoked when needed for the given service (e.g., during failover).
US09208031B2	Log structured content addressable deduplicating storage A log structured content addressable deduplicated data storage system may be used to store deduplicated data. Data to be stored is partitioned into data segments. Each unique data segment is associated with a label. The storage system maintains a transaction log. Mutating storage operations are initiated by storing transaction records in the transaction log. Additional transaction records are stored in the log when storage operations are completed. Upon restarting an embodiment of the data storage system, the transaction records from the transaction logs are replayed to recreate the state of the data storage system. The data storage system updates file system metadata with transaction information while a storage operation associated with the file is being processed. This transaction information serves as atomically updated transaction commit points, allowing fully internally consistent snapshots of deduplicated volumes to be taken at any time.
US09208029B2	Computer system to switch logical group of virtual computers A computer system has a plurality of computer nodes, and each computer node has a plurality of virtual computers and a control base unit controlling the virtual computers. Each virtual computer constitutes a multiplexing group with another virtual computer operating on another computer node different from its own computer node, with one operating as the master and the other as the slave. The control base unit controls whether each virtual computer is operating as either the master or the slave, and monitors the respective states of each virtual computer. The control base unit, when it has detected in its own node a failure of the virtual computer operating as the master virtual computer, makes a decision whether to also switch the other virtual computers operating on its own computer node from master virtual computers to slave virtual computers with the virtual computer in which the failure occurred.
US09208023B2	Systems and methods for scheduling post-write read in nonvolatile memory Post-write reading of data stored in a memory is performed only after a threshold amount of time has elapsed from the time the data was programmed. The threshold amount of time is at least the relaxation time of the memory cells, so that memory cells have reached stable states when post-write reading is performed.
US09208022B2	Techniques for adaptive moving read references for memory cell read error recovery Examples are given for generating or providing a moving read reference (MRR) table for recovering from a read error of non-volatile memory included in a storage device. In some examples, priorities may be adaptively assigned to entries included in the MRR table. The entries may be ordered for use based on the assigned priorities. In other examples, the MRR table may be ordered for use such that entries with a single MRR value for each read reference value may be used first over entries having multiple MRR values for each read reference value. For these other examples, the MRR table may be adaptively reordered based on which entries were successful or unsuccessful in recovering from a read error but may still be arranged to have single MRR value entries used first for use to recover from another read error.
US09208021B2	Data writing method, memory storage device, and memory controller A data writing method, a memory storage device, and a memory controller for controlling a rewritable non-volatile memory module are provided. The rewritable non-volatile memory module includes at least one memory chip, and each memory chip includes a plurality of physical erasing units. The data writing method includes following steps. A data is written into at least one first physical erasing unit. A first error correction code and a second error correction code are respectively generated according to the data, where a number of bits correctable to the second error correction code is greater than a number of bits correctable to the first error correction code. The second error correction code is written into a second physical erasing unit. The first physical erasing unit and the second physical erasing unit belong to the same memory chip. Thereby, the memory space can be efficiently used.
US09208020B2	Efficient error handling mechanisms in data storage systems A data storage system configured to efficiently search and update system data is disclosed. In one embodiment, the data storage system can attempt to correct errors in retrieved data configured to index system data. Metadata stored along with user data in a memory location can be configured to indicate a logical address associated in a logical-to-physical location mapping with a physical address at which user data and metadata are stored. The data storage system can generate modified versions of logical address indicated by the metadata and determine whether such modified versions match the physical address in the logical-to-physical mapping. Modified versions of the logical address can be generated by flipping one or more bits in the logical address indicated by the metadata. Efficiency can be increased and improved performance can be attained.
US09208018B1	Systems and methods for reclaiming memory for solid-state memory Apparatus and methods provide relatively low uncorrectable bit error rates, low write amplification, long life, fast and efficient retrieval, and efficient storage density such that a solid-state drive (SSD) can be reliably implemented using various types of memory cells, including relatively inexpensive multi-level cell flash. One embodiment intelligently coordinates remapping of bad blocks with error correction code control, which eliminates the tables used to avoid bad blocks.
US09208014B2	Fault handling in a distributed IT environment An improved method provides fault handling in a distributed IT environment. The distributed IT environment executes at least one workflow application interacting with at least one application by using interface information about the at least one application. The method comprises: storing at least one fault handling description in a implementation-independent meta language associated with the at least one application; associating the interface information with the at least one fault handling description based on at least one defined fault handling policy, created based on at least one service definition; and the workflow application if a fault response from the at least one application is received: retrieving at least one associated fault handling description based on at least one fault handling policy, and interpreting and executing a particular meta language code of the at least one associated fault handling description in order to continue the defined workflow application.
US09208012B2	Display processing system, display processing method, and program A display processing system (1) includes a display unit (114) that displays occurrence status information of heat accumulation of a server, which provides a service for a predetermined period of time, and occurrence status information of a failure, which has occurred due to the heat accumulation for the predetermined period of time, according to a level of the effect of the failure on the service.
US09208010B2	Failure interval determination For failure interval determination, a determination module determines a failure interval for transactions in a transaction queue based on a number of processed transactions. A transaction timeout module fails a first transaction in response to the first transaction not processing within the failure interval.
US09208009B2	Accessing a large data object in a dispersed storage network A method begins by a dispersed storage (DS) processing module generating a data object identifier for data to be stored in a dispersed storage network (DSN) and partitioning the data into a plurality of data partitions based on a set of retrieval preferences and data boundary information. For a data partition, the method continues with the DS processing module dispersed storage error encoding the data partition to produce a plurality of sets of encoded data slices and generating a plurality of sets of DSN addresses for the plurality of sets of encoded data slices, wherein a DSN address of the plurality of sets of DSN addresses includes a representation of the data object identifier, a representation of one or more retrieval preferences of the set of retrieval preferences, a representation of a corresponding portion of the data boundary information, and dispersed storage addressing information.
US09208004B2	Method of hosting a first application in a second application A method of hosting a first application (e.g., a virtual application) inside a second application (e.g., a control displayed by a web browser). The method includes executing the first application inside a runtime environment generated at least in part by a runtime engine. The executing first application calls user interface functions that when executed inside the runtime environment generate a first user interface. The runtime engine captures these calls, generates messages comprising information associated with the captured calls, and forwards the messages to a user interface manager that is a separate application from the runtime engine. The user interface manager receives the messages, translates the information associated with the captured calls into instructions for the second application, and sends the instructions to the second application. The control receives the instructions sent by the user interface manager, and displays a second user interface for the first application based on the instructions.
US09208002B2	Equalizing bandwidth for multiple requesters using a shared memory system A method for equalizing the bandwidth of requesters using a shared memory system is disclosed. In one embodiment, such a method includes receiving multiple access requests to access a shared memory system. Each access request originates from a different requester coupled to the shared memory system. The method then determines which of the access requests has been waiting the longest to access the shared memory system. The access requests are then ordered so that the access request that has been waiting the longest is transmitted to the shared memory system after the other access requests. The requester associated with the longest-waiting access request may then transmit additional access requests to the shared memory system immediately after the longest-waiting access request has been transmitted. A corresponding apparatus and computer program product are also disclosed.
US09207993B2	Dynamic application placement based on cost and availability of energy in datacenters An optimization framework for hosting sites that dynamically places application instances across multiple hosting sites based on the energy cost and availability of energy at these sites, application SLAs (service level agreements), and cost of network bandwidth between sites, just to name a few. The framework leverages a global network of hosting sites, possibly co-located with renewable and non-renewable energy sources, to dynamically determine the best datacenter (site) suited to place application instances to handle incoming workload at a given point in time. Application instances can be moved between datacenters subject to energy availability and dynamic power pricing, for example, which can vary hourly in day-ahead markets and in a time span of minutes in realtime markets.
US09207991B2	Methods and apparatus for processing load balancing in distributed problem processing Systems and techniques for computational load balancing. A problem space is partitioned into subspaces and the subspaces are assigned to processing nodes. The load of nodes associated with outer subspaces is compared with the load of nodes associated with inner subspaces, and partition boundary adjustments are made based on the relative loads of outer versus inner subspaces.
US09207983B2	Methods for adapting application services based on current server usage and devices thereof A method, non-transitory computer readable medium, and apparatus that monitor one or more capacity related factors of one or more servers providing one or more services to one or more client computing devices to obtain one or more values. An adaption factor for at least one of the one or more client computing devices is determined based on the one or more obtained values for the one or more monitored capacity related factors and one or more adaption rules. The adaption factor may further be determined based on obtained user profile information. The determined adaption factor to adapt operation of the one or more provided services at the at least one of the one or more client computing devices is provided.
US09207982B2	Method and system for managing processing resources The present disclosure improves upon existing systems and methods by providing a tool for managing processing resources. For instance, the presently described tool may be used to time replacement, plan for uplifts, budget for uplifts/decommissioning of hardware, and/or maintain a plurality of servers. This tool may lead to increased satisfaction, uptime, and a reduction of unexpected costs. The system may include initiating collection of variables to compile a prioritized list of servers, executing, a calculation application for determining a prioritized list of servers' end of life targets based on both technical and business parameters based on the entered variables, and prioritizing uplifts of the servers based on the technical and the business parameters.
US09207980B2	Balanced processing using heterogeneous cores Technologies are generally described for a multi-processor core and a method for transferring threads in a multi-processor core. In an example, a multi-core processor may include a first group including a first core and a second core. A first sum of the operating frequencies of the cores in the first group corresponds to a first total operating frequency. The multi-core processor may further include a second group including a third core. A second sum of the operating frequencies of the cores in the second group may correspond to a second total operating frequency that is substantially the same as the first total operating frequency. A hardware controller may be configured in communication with the first, second and third core. A memory may be configured in communication with the hardware controller and may include an indication of at least the first group and the second group.
US09207972B2	Meta-application management in a multitasking environment Techniques are disclosed to identify concurrently used applications based on application state. Upon determining that usage of a plurality of applications, including a first state of a first application of the plurality of applications, satisfies a criterion for identifying concurrently used applications, the plurality of applications is designated as a first meta-application having a uniquely identifiable set of concurrently used applications. The first meta-application has an associated criterion for launching the first meta-application. Upon determining that the criterion for launching the first meta-application is satisfied, at least one of the plurality of applications is programmatically invoked.
US09207971B2	Data parallel computing on multiple processors A method and an apparatus that allocate one or more physical compute devices such as CPUs or GPUs attached to a host processing unit running an application for executing one or more threads of the application are described. The allocation may be based on data representing a processing capability requirement from the application for executing an executable in the one or more threads. A compute device identifier may be associated with the allocated physical compute devices to schedule and execute the executable in the one or more threads concurrently in one or more of the allocated physical compute devices concurrently.
US09207968B2	Computing system using single operating system to provide normal security services and high security services, and methods thereof A method of providing normal security services and high security services with a single operating system in a computing system is disclosed. A secure thread is only accessible while the computing system is in a high security environment, and relates to one of the high security services. A pseudo normal thread is to be executed while the computing system in a normal security environment, and it works as a temporary of the secure thread, and is forwarded to a thread ordering service to gain access to resources of the computing system. When the pseudo normal thread gains access to the computing system resources, the computing system is changed to the high security environment to execute the secure thread.
US09207962B2	Virtual machine image analysis Techniques for analyzing virtual machine images are described. In one embodiment, a subset of settings is extracted from one or more virtual machine images, the virtual machine images store therein values of the settings. The settings are used by software executing in virtual machines of the virtual machine images, respectively. A target one of the virtual machine images is selected and target values of the settings are obtained from the target virtual machine image. Sample values of the settings are obtained from a plurality of virtual machine images. The subset formed by identifying similarities and differences of the values between the virtual machine images.
US09207960B2	Multilevel conversion table cache for translating guest instructions to native instructions A method for translating instructions for a processor. The method includes accessing a guest instruction and performing a first level translation of the guest instruction using a first level conversion table. The method further includes outputting a resulting native instruction when the first level translation proceeds to completion. A second level translation of the guest instruction is performed using a second level conversion table when the first level translation does not proceed to completion, wherein the second level translation further processes the guest instruction based upon a partial translation from the first level conversion table. The resulting native instruction is output when the second level translation proceeds to completion.
US09207958B1	Virtual machine coprocessor for accelerating software execution In one general aspect, a system includes an abstract machine instruction stream, a virtual machine coprocessor configured to receive an instruction from the abstract machine instruction stream and to generate one or more native machine instructions in response to the received instruction, and a processor coupled to the virtual machine coprocessor and operable to execute the native machine instructions generated by the virtual machine coprocessor. The virtual machine coprocessor is operable to generate one or more native machine instructions to explicitly control the virtual machine coprocessor.
US09207955B2	Dynamically configurable session agent A monitoring system captures the behavior of distributed applications and also provides a framework for augmenting functionality of the application in response to user interactions and different states of the application and network. Network events exchanged between an application and an application server are captured and the local client events on the client device are also selectively captured. The different disparate network events and client events are then combined together during a replay operation to simulate the user experience during the previous application session.
US09207951B2	Grouping with frames to transform display elements within a zooming user interface A method is provided to edit a display screen of a zooming user interface system; the method includes receiving a user request to transform a set of display elements that are displayed on a display screen encompassed by a frame; in response to the user request an information structured is produced in a non-transitory storage device that indicates each display element of the set of display elements that is displayed on the display screen encompassed by the frame; each display element indicated by the information structure is transformed according to the user request.
US09207933B2	Identifying authors of changes between multiple versions of a file A Source Code Author Identifier (SCAI) automates the process of manually running a comparison to identify changes between versions of a source code file and associates identified changes with the author who made the change. After a developer identifies a segment of code in a first file, wherein the first file as a newer version of a second file, SCAI compares the segment of code in the first file to a corresponding segment of code in the second file. SCAI identifies the author of the first file whenever a difference is detected between the segment of code in the first file and the corresponding segment of code in the second file. SCAI displays the author of the first file next to the detected difference between the segment of code from the first file and the corresponding segment of code from the second file. SCAI can repeat the comparison across a plurality of versions of the file, comparing each version with the previously created version.
US09207932B2	Uniform references Embodiments of the present invention provide a novel and non-obvious method, system and computer program product for uniform references to artifacts in a software configuration management tool. In one embodiment, a data processing system configured to resolve artifact references can include a software configuration management tool and uniform reference resolution logic coupled to the tool. In this regard, the uniform reference logic can be programmed to resolve a path name to a referenced artifact by processing a uniform reference specifying the referenced artifact.
US09207930B2	Map-reduce ready distributed file system A map-reduce compatible distributed file system that consists of successive component layers that each provide the basis on which the next layer is built provides transactional read-write-update semantics with file chunk replication and huge file-create rates. Containers provide the fundamental basis for data replication, relocation, and transactional updates. A container location database allows containers to be found among all file servers, as well as defining precedence among replicas of containers to organize transactional updates of container contents. Volumes facilitate control of data placement, creation of snapshots and mirrors, and retention of a variety of control and policy information. Also addressed is the use of distributed transactions in a map-reduce system; the use of local and distributed snapshots; replication, including techniques for reconciling the divergence of replicated data after a crash; and mirroring.
US09207927B2	Dynamic image composition method employing fenced applications The disclosed dynamic image composition method employs fenced applications. The method employs an information handling system (IHS) that may use an application fencing tool to generate a fenced application. The method may use the fenced imaging tool to dynamically modify images with fenced applications, statically modify images with fenced applications and/or generate images with fenced applications.
US09207913B2	API publication on a gateway using a developer portal A protocol is provided for configuring and publishing an API on an API gateway using an API developer portal. An executable module is created on the API gateway that includes variables that control API runtime behaviors. A flag is included in the executable module indicating that the executable module may be published to the API developer portal. An API template is created on the API gateway that is linked to the flagged executable module, and that specifies the executable module variables that may be configured on the API developer portal. On the API developer portal, the API template is selected, the variables specified by the API template are configured, and the configured API template is saved and published as an API on the API gateway.
US09207912B2	Visualization of data dependency in graphical models In an illustrative embodiment, an apparatus, computer-readable media, or method may be configured to suggest determine relationships. Interaction with a block diagram model may include receiving a first portion of a block diagram model. The block diagram model may include a plurality of blocks. Each of the plurality of blocks may represent a set of dynamic equations. The interacting may be performed using the computer. Relationships between a plurality of a synthesized input, a synthesized output, a synthesized state, or a synthesized derivative, may be determined. A determination may be performed for the first portion of the block diagram model. The determining may include determining a block Jacobian pattern of relationships between two or more of an input, an output, a state, or a derivative of a first block of the plurality of blocks in the graphical model.
US09207911B2	Modular uncertainty random value generator and method A system and method of generating a one-way function and thereby producing a random-value stream. Steps include: providing a plurality of memory cells addressed according to a domain value wherein any given domain value maps to all possible range values; generating a random domain value associated with one of the memory cells; reading a data value associated with the generated random domain value; generating dynamically enhanced data by providing an additional quantity of data; removing suspected non-random portions thereby creating source data; validating the source data according to a minimum randomness requirement, thereby creating a validated source data; and integrating the validated source data with the memory cell locations using a random edit process that is a masking, a displacement-in-time, a chaos engine, an XOR, an overwrite, an expand, a remove, a control plane, or an address plane module. The expand module inserts a noise chunk.
US09207908B1	Digital signal processing blocks with embedded arithmetic circuits A specialized processing block on an integrated circuit includes a first and second arithmetic operator stage, an output coupled to another specialized processing block, and configurable interconnect circuitry which may be configured to route signals throughout the specialized processing block, including in and out of the first and second arithmetic operator stages. The configurable interconnect circuitry may further include multiplexer circuitry to route selected signals. The output of the specialized processing block that is coupled to another specialized processing block together with the configurable interconnect circuitry reduces the need to use resources outside the specialized processing block when implementing mathematical functions that require the use of more than one specialized processing block. An example for such mathematical functions include the implementation of vector (dot product) operations, FIR filters, or sum-of-product operations.

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