Document Document Title
US09178267B2 Portable electronic apparatus and complex touch module thereof
A touchpad device includes a capacitive touch pad and a near field communication antenna. The capacitive touch pad includes a plurality of input circuits and a plurality of output circuits. Each input circuit and each output circuit intersect and are arranged substantially perpendicular to each other, thereby forming a chessboard-like circuit. The near field communication antenna includes an antenna structure crosses at least part of the plurality of input circuits and at least part of the plurality of output circuits. The antenna structure is substantially not parallel to any one of the input circuits crossed by the antenna structure, and the near field communication antenna being substantially not parallel to any one of the output circuits crossed by the antenna structure.
US09178263B1 Divider/combiner with bridging coupled section
A divider may include a first node, a second node, a third node, at least a first divider section, and a first bridging assembly. The first divider section may include associated first and second transmission lines that respectively include first and second conductors that couple the first node to the second and third nodes. The first bridging assembly may include first and second resistors, and third, fourth, fifth, and sixth conductors. First ends of the third and fourth conductors may be respectively connected to the first and second conductors. Second ends of the third and fourth conductors may be grounded. The fifth and sixth conductors may be connected together and their opposite ends may be respectively terminated to ground by the first and second resistors. The third and fifth conductors may be closely inductively mutually coupled, and the fourth and sixth conductors may be closely inductively mutually coupled.
US09178260B2 Dual-tapered microstrip-to-waveguide transition
An antenna apparatus comprises a substrate with a microstrip-to-waveguide transition comprising a microstrip feedline extending between a first terminal point and a second terminal point at a first metal layer and comprising a microstrip element and a probe element. The microstrip element includes a connection segment extending from the first terminal point to a second point, a taper segment extending from the second point to a third point, and a continuous-width segment extending from the third point to a fourth point. The probe element extends from the fourth point to the second terminal point and has a width which is narrower than the continuous-width segment. The substrate further includes a waveguide opening comprising a region surrounding the probe element and includes a plurality of metal vias disposed at the perimeter of the waveguide opening and which extend from the first metal layer to the second metal layer.
US09178256B2 Isotropically-etched cavities for evanescent-mode electromagnetic-wave cavity resonators
This disclosure provides implementations of electromechanical systems (EMS) resonator structures, devices, apparatus, systems, and related processes. In one aspect, a device includes an evanescent-mode electromagnetic-wave cavity resonator. In some implementations, the resonator includes an isotropically-etched cavity operable to support one or more evanescent electromagnetic wave modes. In some implementations, the resonator also includes a cavity ceiling arranged to form a volume in conjunction with the isotropically-etched cavity. In some implementations, the resonator also includes a capacitive tuning structure having a portion that is located at least partially within the volume so as to support the evanescent electromagnetic wave modes. In some implementations, a distal surface of the tuning structure is separated from the closest surface to it by a gap distance, a resonant electromagnetic wave mode of the cavity resonator being dependent at least partially on the gap distance.
US09178251B2 Button cell having bursting protection
A button cell has a housing closed in a liquid-tight manner including a cup, cover and seal, the cell cup having a base, circumferential casing, an edge area connecting the base and casing, and an end cut edge, the cell cover has a base, a circumferential casing, an edge area connecting the base and casing, and an end cut edge, the cover is inserted into the cup with the cut edge in front such that the casing of the cup and casing of the cover at least partially overlap and form a double-walled casing area, the seal is arranged between the cup and cover between the overlapping casing area such that they are isolated from one another, and at least one hole passes through the casing of the cup in the area which overlaps the casing of the cover.
US09178250B2 Electrolyte for a battery
Use of an electrolyte for an electrochemical cell and a method for manufacturing an electrochemical cell comprising such an electrolyte. The electrolyte comprises at least one conductive salt comprising lithium ions, at least one solvent and at least one wetting agent. The electrochemical cell comprises at least one anode, at least one cathode and at least one separator arranged between the at least one anode and the at least one cathode. The electrolyte may be filled between the at least one anode and the at least one cathode.
US09178246B2 Nonaqueous electrolyte battery and nonaqueous electrolyte
A nonaqueous electrolyte battery includes: a positive electrode; a negative electrode; a nonaqueous electrolyte that includes a solvent and an electrolyte salt, the solvent including a halogenated cyclic carbonate of the Formula (1) below, or at least one of unsaturated cyclic carbonates of the Formulae (2) and (3) below; and a polyacid and/or a polyacid compound contained in the battery, where X is a F group or a Cl group, R1 and R2 are each independently a CnH2n+1 group (0≦n≦4), and R3 is CnH2n+1−mXm (0≦n≦4, 0≦m≦2n+1), where R4 and R5 are each independently a CnH2n+1 group (0≦n≦4), where R6 to R11 are each independently a CnH2n+1 group (0≦n≦4).
US09178245B2 Energy conversion apparatus, in particular fuel cell stack or electrolyzer
The invention relates to an apparatus (1) for converting chemical energy into electrical energy and/or electrical energy into chemical energy with a housing (2, 3, 3a), which is open towards at least one side (6) and in which a pressure chamber (4) is formed, and with at least one electrochemically active cell (5) for energy conversion, which extends from the open side (6) of the housing (2, 3, 3a) into the housing (2, 3, 3a), wherein the open side (6) is closed by a plate (7, 31), which holds and/or supplies power to the cell (5). A sealing element (8, 9) is arranged between the housing (2, 3, 3a) and the plate (7, 31), closes the open side (6) of the housing (2, 3, 3a) in a fluid-tight and/or gas-tight manner so as to form the pressure chamber (4) and is formed at least partially from an elastic material. At least one pocket (10) extending into the pressure chamber (4) is formed in the sealing element (8, 9), wherein the cell (5) is positioned in said pocket and the pocket wall (28) of said pocket is flexible as a result of the elastic material, with the result that the pocket wall (28) bears against the cell (5) in the event of an excess pressure in the pressure chamber (4).
US09178244B2 Fuel cells and fuel cell components having asymmetric architecture and methods thereof
Embodiments relate to a composite for a fuel cell layer including a plurality of electron conducting components, a plurality of ion conducting components each having a first surface and a second surface and wherein each ion conducting component is positioned between two electron conducting components. The electron conducting components and the ion conducting components form a layer and at least one of the ion conducting components or the electron conducting components is geometrically asymmetric in one or more dimensions.
US09178236B2 Polymer electrolyte fuel cell
A polymer electrolyte fuel cell of the present invention includes a membrane-electrode assembly (5) and separators (6A and 6B). Each of the electrodes (4A and 4B) includes a catalyst layer (2A, 2B) and a gas diffusion layer (3A, 3B). One main surface of the catalyst layer contacts the polymer electrolyte membrane (1). The separator (6A) includes a peripheral portion (16A) and a portion (26A) other than the peripheral portion. The peripheral portion (16A) of the separator (6A) is formed in an annular shape when viewed from a thickness direction of the separator (6A) and is a region including a portion located on an inner side of the outer periphery of the separator (6A). The separator (6A) is configured such that a porosity of the peripheral portion (16A) is higher than that of the portion (26A) other than the peripheral portion.
US09178235B2 Reducing gas generators and methods for generating a reducing gas
One embodiment of the present invention is a unique reducing gas generator. Another embodiment is a unique method for generating a reducing gas. Other embodiments include apparatuses, systems, devices, hardware, methods, and combinations for generating reducing gas. Further embodiments, forms, features, aspects, benefits, and advantages of the present application will become apparent from the description and figures provided herewith.
US09178233B2 Smart in-vehicle reactive recovery strategy
A method for determining when to operate a voltage recovery process for recovering a reversible voltage loss of a fuel cell stack in a fuel cell system. The method includes estimating an irreversible voltage loss of the fuel cell and an actual voltage of the fuel cell stack, and determining whether a difference between the estimated irreversible voltage loss and the estimated actual voltage exceed a threshold, and if so, the voltage recovery process is performed.
US09178232B2 FCS overall efficiency by using stored cathode oxygen during down-transients
A system and method for utilizing a pressurized volume of oxygen in a cathode plumbing of a fuel cell system. The system and method includes calculating an air/oxygen balance that is based on an air balance and an oxygen balance in the cathode plumbing. The system and method further include determining the number of moles of oxygen available for fuel cell chemical reactions using the calculated air/oxygen balance and drawing current from a fuel cell stack using the moles of oxygen available for fuel cell chemical reactions.
US09178229B2 Membrane humidifier for fuel cell
A membrane humidifier is provided for a fuel cell. The membrane humidifier of the present invention includes a hollow housing, a joint member, a plurality of internal partition modules, and a plurality of hollow fiber membrane bundles. The hollow housing has a humid air inlet formed at one end thereof and a humid air outlet formed at the other end thereof. The joint member is formed integrally with an inner circumferential surface of the hollow housing. The plurality of internal partition modules are coupled to the joint member and arranged adjacent to each other in the hollow housing, and have a plurality of humid air guiding apertures passing therethrough. The plurality of hollow fiber membrane bundles are disposed in the plurality of internal partition modules, respectively.
US09178224B2 Sealing design for stamped plate fuel cells
A fuel cell stack of at least two fuel cells, each fuel cell having a unitized electrode assembly (UEA) including a membrane electrode assembly (MEA), a sub-gasket and gas diffusion media (DM), and positioned between modified stamped field-flow plates. The sub-gasket frames the MEA resulting in an overlap area between the MEA and the inner perimeter of the sub-gasket. The UEA is disposed between a pair of stamped flow-field plates which align in adjacent fuel cells to form a bipolar plate. The bipolar plate has an active region, an overlap region and a seal region. The active region is configured with channel and land features which provide reactant flow channels and coolant passages for the fuel cell. The configuration of features in the overlap region, however, is modified from the configuration in the active region so that the overlap region may sustain sufficient mechanical sealing pressure, and to prevent coolant and reactant bypass without impeding coolant and reactant flow in the active area. Modified channel and land feature configurations for the overlap region are exemplified.
US09178220B2 Catalyst assembly including an intermetallic compound of iridium and tungsten
A catalyst assembly having a substrate including an intermetallic compound of W and Ir. The weight ratio of W to Ir is in a range between a first ratio and a second ratio. A catalyst includes at least one noble metal is supported on and contacts the substrate. The first ratio may be in the range of 48:52 and the second ratio may be in the range of 51:49.
US09178219B2 Electrochemical device including amorphous metal oxide
In one or more embodiments, an electrochemical device includes a substrate having a substrate surface; an amorphous metal oxide layer supported on the substrate surface; and a noble metal catalyst supported on the amorphous metal oxide layer to form a catalyst layer. The amorphous metal oxide layer may contact only 25 to 75 percent of the substrate surface. The amorphous metal oxide layer may include less than 10 weight percent of crystalline metal oxide. In certain instances, the amorphous metal oxide layer is substantially free of crystalline metal oxide.
US09178218B2 Hyper-branched polymer, electrode and electrolyte membrane including the hyper-branched polymer, and fuel cell including at least one of the electrode and the electrolyte membrane
A hyper-branched polymer, which is a product obtained by performing condensation polymerization reaction of a hyper-branched polymer composition including a diisocyanate-based compound and a dihydroxyamine-based compound, a cross-linked hyper-branched polymer, an electrode and electrolyte membrane for a fuel cell including the hyper-branched polymer or the cross-linked hyper-branched polymer, and a fuel cell including the electrode and the electrolyte membrane.
US09178210B2 Negative active material for lithium battery, method of preparing the negative active material, and lithium battery employing the negative active material
A negative active material for a lithium battery with an improved cycle characteristic and capacity retention rate, and the negative active material comprises a plurality of particles comprising a plurality of first particles comprising Si, Ti, and Ni; and composite particles comprising a plurality of second particles in which at least one element selected from the group consisting of Cu, Fe, Ni, Au, Ag, Pd, Cr, Mn, Ti, B, and P is partially or completely deposited on surface(s) of other of first particles, a method of preparing the negative active material, and a lithium battery including a negative electrode including the negative active material.
US09178208B2 Composite materials for electrochemical storage
Composite materials and methods of forming composite materials are provided. The composite materials described herein can be utilized as an electrode material for a battery. In certain embodiments, the composite material includes greater than 0% and less than about 90% by weight silicon particles, and greater than 0% and less than about 90% by weight of one or more types of carbon phases. At least one of the one or more types of carbon phases can be a substantially continuous phase. The method of forming a composite material can include providing a mixture that includes a precursor and silicon particles, and pyrolyzing the precursor to convert the precursor into one or more types of carbon phases to form the composite material.
US09178204B2 Rechargeable battery
A rechargeable battery includes: a case; an electrode assembly housed in the case and including a first electrode, a second electrode, and a separator between the first electrode and the second electrode, the first electrode having a coated portion coated with a first active material and an uncoated portion absent the first active material; a safety assembly including a first electric conductive plate and a first supporting protrusion extending from the first electric conductive plate and physically coupled to the uncoated portion; a current collecting tab electrically coupling the electrode assembly with the terminal and physically coupled to the uncoated portion; and a first auxiliary plate physically coupled to the uncoated portion at a surface of the uncoated portion opposite to where the first supporting protrusion is physically coupled to the uncoated portion.
US09178203B2 Battery module with a flexible bus
A battery module includes a plurality of battery cells and a flexible bus. Each of the battery cells has a main body, a first terminal disposed on the main body, and a second terminal disposed on the main body. The main body includes active material configured to generate power from an electrochemical reaction. The bus includes an electrical current harness configured to conduct an electrical current through the battery module and a battery management system configured to detect and transmit status information, as well as selectively control a charging and a discharging of at least one of the battery cells.
US09178201B2 Electrode assembly and method for constructing the same
A jelly-roll type electrode assembly is disclosed. The jelly-roll type electrode assembly includes an anode, a cathode, and separators interposed between the anode and the cathode and having a greater length than width. Each of the separators is longer than the anode and the cathode. Each of the separators has a porous substrate and porous coating layers formed on both surfaces of the porous substrate. The porous coating layers include a mixture of inorganic particles and a binder polymer. The porous coating layers are formed only in areas where the separators are in contact with the anode and the cathode. The porous coating layers enhance the heat resistance of the separators. Due to the enhanced heat resistance, the separators can prevent the performance of a battery from deteriorating. In addition, the porous coating layers can be prevented from being separated from the separators during battery assembly processing.
US09178197B2 Lithium secondary battery
The present invention provides a lithium secondary battery, comprising a cathode, an anode, a non-aqueous solution containing a lithium salt and an organic solvent, and a safety vent for removing increased internal pressure, the non-aqueous solution having the prescribed composition and the safety vent having the prescribed operational characteristics. The lithium secondary battery of the present invention can ensure its safety even when overcharged.
US09178194B2 Battery pack having a cover with at least one cut portion formed therein
A battery pack to improve assembling reliability in a battery with a cover frame. The battery pack according to the present invention includes a rechargeable battery having at least one rounded lateral side; a cover frame including a frame surrounding each of lateral sides of the rechargeable battery, wherein more than at least one groove is formed at both ends of the frame covering the rounded lateral side of the rechargeable battery. Therefore, it is possible to couple the cover frame to the rechargeable battery via the groove without deforming the cover frame. Also, the rounded battery and the rounded cover frame closing each other is an effect that assembly error of a battery to cover frame can be reduced.
US09178191B2 Battery module
A battery module according to one aspect of the present invention includes: a plurality of rechargeable batteries; a housing configured to house the plurality of rechargeable batteries and having a first fastening portion; a cover configured to couple to the housing and having a second fastening portion configured to couple to the first fastening portion by a tight fitting; and an elastic member configured to fit between the first and second fastening portions.
US09178188B2 Rechargeable battery with collector plates having insulators and conductors
A rechargeable battery includes a plurality of electrode assemblies including positive and negative electrodes separated by a separator and a pair of electrode tabs protruding to both sides. A case receives the plurality of electrode assemblies. First and second current collecting plates cover openings formed on both sides of the case. First and second insulation plates are respectively disposed between the plurality of electrode assemblies and the first and second current collecting plates. The pair of electrode tabs at one side of the electrode assemblies pass through a first through hole formed in the first insulation plate and the pair of electrode tables at the other side of the electrode assemblies pass through a second through hole formed in the second insulation plate.
US09178186B2 Cell
A cell in which thermal welding of a laminate packaging is performed so that the thickness of a thermal welded portion including an electrode terminal is larger than that of a thermal welded portion including no electrode terminal.
US09178183B2 Organic light emitting diode display panel and method for manufacturing the same
Embodiments of the present invention provide an organic light emitting diode display panel and a method for manufacturing the same. The manufacturing method comprises: coating a photoresist layer on a transparent substrate with an active array formed; performing exposure on the photoresist layer from one side of the transparent substrate opposed to the photoresist layer, where the scan lines and the at least one kind of lines are used as a mask to prevent exposure of the corresponding photoresist, so that a photoresist remaining region is formed by the photoresist layer; conducting a development treatment on the photoresist layer, so that the photoresist outside the photoresist remaining region is removed and the photoresist in the photoresist remaining region is retained to form the pixel defining layer. The embodiments of the invention may simplify the fabricating flow of the display panel, reduce production costs of the display panel, and increase yield of the display panel.
US09178178B2 Organic light-emitting diode display having improved adhesion and damage resistance characteristics, an electronic device including the same, and method of manufacturing the organic light-emitting diode display
Provided is an organic light-emitting diode (OLED) display including: first and second plastic layers; a first barrier layer and a first intermediate layer each positioned between the first and second plastic layers; and an OLED layer formed on the second plastic layer. The first barrier layer comprises silicon nitride.
US09178170B2 Fiber-based organic electrochemical transistor
An organic electrochemical transistor (OECT) that may be used as a biosensor is built up by layers applied to a monofilament. A first conducting layer applied to the monofilament includes generally cylindrical source and drain contacts with a gap therebetween. An electro-active layer of an organic material altering its electrical conductivity through a change in redox state is in electrical contact with the source and drain contacts, and has a transistor channel interface for contacting an electrolyte. A gate electrode is spaced apart from the first monofilament, and may comprise a cylindrical layer built up on another length of monofilament.
US09178169B2 Organic semiconductor thin film transistor and method of fabricating the same
A substrate having a thin film transistor includes a buffer layer on a substrate, source and drain electrodes on the buffer layer, a portion of the buffer layer exposed between the source and drain electrodes, a small organic semiconductor layer on the source electrode and the drain electrode, the organic semiconductor layer contacting the exposed portion of the buffer layer, a gate insulating layer on the organic semiconductor layer, the gate insulating layer having substantially the same size as the organic semiconductor layer, a gate electrode on the gate insulating layer, a passivation layer over the surface of the substrate including the gate electrode; and a pixel electrode on the passivation layer, the pixel electrode electrically connected to the drain electrode.
US09178166B2 Conjugated polymers
The invention relates to novel conjugated polymers containing repeating units comprising a halogenated benzene ring, a silolobithiophene moiety, and a benzofused heteroaromatic moiety, to methods for their preparation and educts or intermediates used therein, to polymer blends, mixtures and formulations containing them, to the use of the polymers, polymer blends, mixtures and formulations as organic semiconductors in organic electronic (OE) devices, especially in organic photovoltaic (OPV) devices and organic photodetectors (OPD), and to OE, OPV and OPD devices comprising these polymers, polymer blends, mixtures or formulations.
US09178161B2 Benzo[c]phenanthrene compound and organic light-emitting device containing same
There is provided a benzo[c]phenanthrene compound represented by formula [1]: wherein R1 to R10 are each independently selected from a hydrogen atom, an alkyl group, an alkoxy group, an aromatic hydrocarbon group, and a heteroaromatic group; n represents an integer of 1 to 3, when n represents 2 or more, R1's in different benzo[c]phenanthrene rings may be the same or different, and the same is true for R2's to R10's in different benzo[c]phenanthrene rings; Ar represents an n-valent substituent and represents an aromatic hydrocarbon group or a heteroaromatic group, or Ar may represent a single bond when n represents 2.
US09178159B2 Copolymers with functionalized side chains
The present invention relates, inter alia, to copolymers, preferably conjugated polymers, formulations comprising the copolymers and electronic devices comprising the copolymers.
US09178157B2 Donor substrates, methods of manufacturing donor substrates and methods of manufacturing organic light emitting display devices using donor substrates
A donor substrate having a plurality of recesses and isolation structures may be provided. The isolation structures may be defined by the recesses. A first electrode is formed on a first substrate. A pixel defining layer may be formed on the first electrode to define a plurality of pixel regions. The donor substrate may be arranged over the first substrate, and a laser induced thermal imaging process may be performed to form a plurality of light emitting layers in the pixel regions. A second electrode may be formed on the pixel defining layer and the light emitting layers. The organic light emitting layers having minute dimensions may be effectively obtained from the donor substrate. The isolation structures may be formed integrally with the substrate, and thus the donor substrate may be easily recycled after the laser induced thermal imaging process.
US09178155B2 Flexible substrate, manufacturing method of display element, and manufacturing apparatus of display element
In a manufacturing apparatus of display element, a display element is formed in a flexible substrate that has a first surface and a second surface that is an opposite surface thereof, and this manufacturing apparatus of display element includes a transportation section that transports the flexible substrate in a predetermined direction that intersects with a width direction of the flexible substrate; a first partition wall formation section that forms a first partition wall for a display element in the first surface; and a second partition wall formation section that forms a second partition wall in the second surface.
US09178151B2 Work function tailoring for nonvolatile memory applications
Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.
US09178148B2 Resistive random access memory cell having three or more resistive states
Provided are resistive random access memory (ReRAM) cells, each having three or more resistive states and being capable of storing multiple bits of data, as well as methods of fabricating and operating such ReRAM cells. Such ReRAM cells or, more specifically, their resistive switching layer have wide range of resistive states and are capable of being very conductive (e.g., about 1 kOhm) in one state and very resistive (e.g., about 1 MOhm) in another state. In some embodiments, a resistance ratio between resistive states may be between 10 and 1,000 even up to 10,000. The resistive switching layers also allow establishing stable and distinct intermediate resistive states that may be assigned different data values. These layers may be configured to switching between their resistive states using fewer programming pulses than conventional systems by using specific materials, switching pluses, and resistive state threshold.
US09178141B2 Memory elements using self-aligned phase change material layers and methods of manufacturing same
A memory element and method of forming the same. The memory element includes a first electrode within a via in a first dielectric material. An insulating material element is positioned over and in contact with the first electrode. A phase change material is positioned over the first electrode and in contact with sidewalls of the insulating material element. The phase change material has a first surface in contact with a surface of the first electrode and a surface of the first dielectric material. A second electrode is in contact with a second surface of the phase change material, which is opposite to the first surface.
US09178137B2 Magnetoresistive element and magnetic memory
A magnetoresistive element includes first and magnetic layers, first and second non-magnetic layers and a W layer. Each of the first and second magnetic layers includes an axis of easy magnetization in a direction perpendicular to a film plane. The first magnetic layer has a variable magnetization direction. The second magnetic layer has an invariable magnetization direction. The first non-magnetic layer is provided between the first and second magnetic layers. The second non-magnetic layer is arranged on a surface of the first magnetic layer opposite to a surface on which the first non-magnetic layer is arranged and contains MgO. The W layer is arranged on a surface of the second non-magnetic layer opposite to a surface on which the first magnetic layer is arranged, and is in contact with the surface of the second non-magnetic layer.
US09178136B2 Magnetoresistive random access memory cell and fabricating the same
The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a tunneling layer disposed over the pinned layer, a free layer disposed over the tunneling layer and a capping layer disposed over the free layer. The capping layer includes metal-oxide and metal-nitride materials.
US09178129B2 Graphene-based films in sensor applications
An environmental sensor comprises a graphene thin-film as an environmentally responsive material. Such graphene films exhibit negative temperature coefficients (NTC), resulting in rapid decreases in electrical resistance as temperature increases, as well as a much faster response time than any other NTC material reported in the literature. The graphene film is also mechanically stable under bending, and, therefore, can be adapted for use in a mechanical sensor or pressure sensor, because the electrical resistance of the graphene film changes upon deflection and/or changes in pressure. The electrical resistance of the graphene film also increases in response to increases in environmental humidity. The electrical resistance changes of the graphene film can also be used as a sensing mechanism for changes in chemical and biological parameters in the environment of the sensor.
US09178126B2 Thermoelectric elements using metal-insulator transition material
Provided is a thermoelectric device including a first electrode, a substrate electrically connected to the first electrode, a thin film on the substrate, and a second electrode on the thin film. The substrate and the thin film may be configured to exhibit a metallic property at a temperature over a critical temperature, thereby having a thermoelectric power of the device that is higher than that of a semiconductor junction.
US09178122B2 Method of manufacturing light emitting device package having reflector and phosphor layer
A method of manufacturing a light emitting device (LED) package includes forming a reflector using nano-imprinting to increase an intensity of light extracted toward an external environment by increasing an angle of a reflector.
US09178120B2 Curable resin composition, curable resin composition tablet, molded body, semiconductor package, semiconductor component and light emitting diode
The present invention aims to provide a curable resin composition which gives a cured product having a low linear expansion coefficient. The curable resin composition of the present invention contains, as essential components, (A) an organic compound having at least two carbon-carbon double bonds reactive with SiH groups per molecule, (B) a compound containing at least two SiH groups per molecule, (C) a hydrosilylation catalyst, (D) a silicone compound having at least one carbon-carbon double bond reactive with a SiH group per molecule, and (E) an inorganic filler.
US09178119B2 Vertical light emitting diodes
A tunable color LED module comprises at least two sub-modules, each comprising an LED, a wavelength converting element (WCE) and a reflector cup. The total light emitted by the module comprises light generated from each LED and WCE and the module is configured to emit a total light having a predefined color chromaticity when activation properties of the LEDs are managed appropriately. The total light may have a broad white emission spectrum. The module combines the benefits of a low cost with uniform chromaticity properties in the far field, and offers long and controlled lifetime at the same time as flexibility and intelligence of tunable color chromaticity, Color Rendering Index (CRI) and intensity, either at manufacture or in an end user lighting application. A controlled LED module system comprises a control system for the managing activation properties of the LEDs in the sub-modules. Also described is a method of manufacture.
US09178118B2 Semiconductor light emitting device and method for manufacturing the same
According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a fluorescent material layer and a scattering layer. The semiconductor layer has a first surface and a second surface on an opposite side to the first surface and includes a light emitting layer. The p-side electrode and the n-side electrode are provided on the semiconductor layer on a side of the second surface. The fluorescent material layer is provided on a side of the first surface and includes a plurality of fluorescent materials and a first bonding material. The first bonding material integrates the fluorescent materials. The scattering layer is provided on the fluorescent material layer and includes scattering materials and a second bonding material. The scattering materials are configured to scatter radiated light of the light emitting layer. The second bonding material integrates the scattering materials.
US09178116B2 Semiconductor light-emitting element
A semiconductor light-emitting element (1) including: an n-type semiconductor layer (140); a light-emitting layer (150); a p-type semiconductor layer (160); a transparent conductive layer (170) laminated on the p-type semiconductor layer; a reflective film (180) which is composed of a material having optical transparency to light emitted from the light-emitting layer and an insulating property and is laminated on the transparent conductive layer; a p-conductive body (200) which penetrates the reflective film and is electrically connected to the transparent conductive layer; an n-electrode (310) electrically connected to the n-type semiconductor layer; and a p-electrode (300) having a p-adhesion layer (301) which is laminated on the reflective film, is electrically connected to the other end of the p-conductive body, and is composed of the same material as that for the transparent conductive layer and a p-metal reflective layer (302) which is laminated on the p-adhesion layer.
US09178115B2 Semiconductor light emitting apparatus, image displaying apparatus, mobile terminal, head-up display apparatus, image projector, head-mounted display apparatus, and image forming apparatus
A semiconductor light emitting apparatus includes a substrate. A plurality of first electrode wirings are formed on the surface of the substrate. At least one second electrode wiring is formed on the surface of the substrate. A light emitting section is connected between a corresponding one of the plurality of first electrode wirings and the at least one second electrode wiring. The light emitting section includes a plurality of light emitting elements.
US09178113B2 Method for making light emitting diodes
A method for making a LED comprises following steps. A substrate having a first surface and a second surface is provided. A patterned mask layer is applied on a first surface. A number of three-dimensional nano-structures are formed on the first surface and the patterned mask layer is removed. A first semiconductor layer, an active layer and a second semiconductor layer are formed on the second surface. A first electrode and a second electrode are formed to electrically connect with the first semiconductor layer and the second semiconductor pre-layer respectively.
US09178112B2 Light emitting device having light extraction structure
A light emitting device having a light extraction structure, which is capable of achieving an enhancement in light extraction efficiency and reliability, and a method for manufacturing the same. The light emitting device includes a semiconductor layer having a multi-layered structure including a light emission layer; and a light extraction structure formed on the semiconductor layer in a pattern having unit structures. Further, the wall of each of the unit structures is sloped at an angle of −45° to +45° from a virtual vertical line being parallel to a main light emitting direction of the light emitting device.
US09178109B2 Semiconductor light-emitting device and method of manufacturing the same
A light-emitting device is disclosed including a light emitting structure comprising a lower layer of the first conductivity type, an active layer, an upper layer of the second conductivity type; a first electrode connected to the lower layer of the first conductivity type; a second electrode connected to the upper layer of the second conductivity type. The light emitting structure is formed using a shell member, which comprises a planar portion and a shell portion. The extent of growth defects such as misfit dislocations is reduced and the extraction of light and heat is improved in the present device. The beam profile of the device may be altered by patterning the light emitting structure instead of shaping the entire chip. The device may be manufactured in a way more compatible with the established, cost-effective processing and packaging methods for large size wafers from the IC industry.
US09178108B2 Light emitting device and light emitting device package
The embodiment relates to a light emitting device and a light emitting device package, wherein the light emitting device includes a first conduction type semiconductor layer, an active layer formed on the first conduction type semiconductor layer, and a second conduction type semiconductor layer formed on the active layer, wherein the active layer includes a quantum well layer and a quantum barrier layer, and a face direction lattice constant of the first conduction type semiconductor layer or the second conduction type semiconductor layer is greater than the face direction lattice constant of the quantum barrier layer and smaller than the face direction lattice constant of the quantum well layer.
US09178107B2 Wafer-level light emitting diode structure, light emitting diode chip, and method for forming the same
A method for fabricating a wafer-level light emitting diode structure is provided. The method includes: providing a substrate, wherein a first semiconductor layer, a light emitting layer, and a second semiconductor layer are sequentially disposed on the substrate; subjecting the first semiconductor layer, the light emitting layer, and the second semiconductor layer with a patterning process to form a first depressed portion, a second depressed portion, a stacked structure disposed on the second depressed portion and a remained first semiconductor layer disposed on the depressed portion, wherein the stacked structure comprises a patterned second semiconductor layer, a patterned emitting layer, and a patterned first semiconductor layer; forming a first electrode on the remained first semiconductor layer of the first depressed portion; and forming a second electrode correspondingly disposed on the patterned second semiconductor layer of the second depressed portion.
US09178106B2 Nanowire sized opto-electronic structure and method for modifying selected portions of same
A method for treating a LED structure with a substance, the LED structure includes an array of nanowires on a planar support. The method includes producing the substance at a source and causing it to move to the array along a line. The angle between the line followed by the substance and the plane of the support is less than 90° when measured from the center of the support. The substance is capable of rendering a portion of the nanowires nonconductive or less conductive compared to before being treated by the substance.
US09178103B2 Apparatus and method for forming chalcogenide semiconductor absorber materials with sodium impurities
A method and system for forming chalcogenide semiconductor absorber materials with sodium impurities is provided. The system includes a sodium vaporizer in which a solid sodium source material is vaporized. The sodium vapor is added to reactant gases and/or annealing gases and directed to a furnace that includes a substrate with a metal precursor material. The precursor material reacts with reactant gases such as S-containing gases and Se-containing gases according to various process sequences. In one embodiment, a selenization operation is followed by an annealing operation and a sulfurization operation and the sodium vapor is caused to react with the metal precursor during at least one of the annealing and the sulfurization steps to produce a chalcogenide semiconductor absorber material that includes sodium dopant impurities.
US09178100B2 Single photon avalanche diode for CMOS circuits
A single photon avalanche diode for use in a CMOS integrated circuit includes a deep n-well region formed above a p-type substrate and an n-well region formed above and in contact with the deep n-well region. A cathode contact is connected to the n-well region via a heavily doped n-type implant. A lightly doped region forms a guard ring around the n-well and deep n-well regions. A p-well region is adjacent to the lightly doped region. An anode contact is connected to the p-well region via a heavily doped p-type implant. The junction between the bottom of the deep n-well region and the substrate forms a multiplication region when an appropriate bias voltage is applied between the anode and cathode and the guard ring breakdown voltage is controlled with appropriate control of the lateral doping concentration gradient such that the breakdown voltage is higher than that of the multiplication region.
US09178098B2 Solar cell with delta doping layer
A solar cell including a base region, a back surface field layer and a delta doping layer positioned between the base region and the back surface field layer.
US09178096B2 Luminescent solar concentrator
A stacked luminescent solar concentrator includes two separate absorption/emission cells, each having a layer of luminophore-type material, wherein a top layer is a high band gap layer comprised of quantum dots in polymer, wherein the quantum dots are engineered so as to absorb a significant percentage of photons above bandgap. The bottom layer is a lower band gap layer comprised of quantum dots in polymer, wherein the quantum dots in the second layer are engineered so as to absorb photons not absorbed in the top layer, thus increasing total percentage of absorbed photons. Photovoltaic cells are located below the layers at the bottom of the cells or at the edges of the cells. The sides and lower surfaces of the cells may include reflective surfaces as discussed further herein. Reflection losses from the top surface thereof may be minimized using a broadband anti-reflective coating (AR) on the surface.
US09178090B2 Reaction apparatus and method for manufacturing a CIGS absorber of a thin film solar cell
The present invention provides an apparatus and a method for manufacturing a CIGS absorber of a thin film solar cell. The apparatus includes a supply chamber configured to provide a flexible substrate coated with precursors. The apparatus further includes a reaction chamber coupled to the supply chamber for at least subjecting the precursors on the flexible substrate to a reactive gas at a first state to form an absorber material. Additionally, the apparatus includes a gas-balancing chamber filled with the reactive gas at a second state. The gas-balancing chamber is communicated with the reaction chamber for automatically updating the first state of the reactive gas to the second state. Moreover, the apparatus includes a control system to maintain the second state of the reactive gas in the gas-balancing chamber at a preset condition and to adjust the transportation of the flexible substrate through the reaction chamber.
US09178088B2 Apparatus and methods for fabricating solar cells
A method for fabricating a solar cell generally comprises delivering a solar cell substructure to a chamber. Electromagnetic radiation is generated using a wave generating device that is coupled to the chamber such that the wave generating device is positioned proximate to the solar cell substructure. The electromagnetic radiation is applied onto at least a portion of the solar cell substructure to facilitate the diffusion of at least one metal element through at least a portion of the solar cell substructure such that a semiconductor interface is formed between at least two different types of semiconductor materials of the solar cell substructure.
US09178085B2 Waveguide photodetector and forming method thereof
Techniques are described for forming a waveguide photodetector. In one example, a method of forming a waveguide photodetector includes forming a waveguide on a substrate, e.g., silicon on insulator, depositing a first oxide coating over the waveguide and on the SOI substrate, creating a seed window through the first oxide coating to a bulk silicon layer of the SOI substrate, depositing a photodetector material into the seed window and on top of the first oxide coating over the waveguide, depositing a second oxide coating over the photodetector material and over the first oxide coating deposited over the waveguide and on the SOI substrate, and applying thermal energy to liquefy the photodetector material.
US09178079B2 Semiconductor diode device
According to one embodiment, a semiconductor device includes first and second electrodes, and first, second, and third semiconductor regions. The first semiconductor region has a first conductivity type. The first electrode is provided above the first semiconductor region. The second semiconductor region has a second conductivity type and is provided between the first semiconductor region and the first electrode. The third semiconductor region is provided between the first semiconductor region and the first electrode, and has the second conductivity type. The third semiconductor region has an impurity concentration substantially equal to an impurity concentration of the second semiconductor region, and has first and second portions. The first and second portions constitute a concave-convex form on a side of the first semiconductor region of the third semiconductor region. The second electrode is provided above an opposite side of the first semiconductor region from the first electrode.
US09178070B2 Semiconductor structure and method for manufacturing the same
The present application discloses a semiconductor structure and a method for manufacturing the same. A semiconductor structure according to the present invention can adjust the threshold voltage by capacitive coupling between a backgate region either and a source region or a drain region with a common contact, i.e. a source contact or a drain contact, which leads to a simple manufacturing process, a higher integration level, and a lower manufacture cost. Moreover, the asymmetric design of the backgate structure, together with the doping of the backgate region which can be varied as required in an actual device design, can further enhance the effects of adjusting the threshold voltage and improve the performances of the device.
US09178068B1 FinFET with oxidation-induced stress
A method for inducing stress within the channel of a semiconductor fin structure includes forming a semiconductor fin on a substrate; forming a fin hard mask layer, multiple isolation regions, and multiple spacers, on the semiconductor fin; forming a gate structure on the semiconductor fin; and oxidizing multiple outer regions of the semiconductor fin to create oxidized stressors that induce compressive stress within the channel of the semiconductor fin. A method for inducing tensile stress within the channel of a semiconductor fin by oxidizing a central region of the semiconductor fin is also provided. Structures corresponding to the methods are also provided.
US09178067B1 Structure and method for FinFET device
The present disclosure provides an embodiment of a fin-like field-effect transistor (FinFET) device. The device includes a substrate having a first gate region, a first fin structure over the substrate in the first gate region. The first fin structure includes an upper semiconductor material member, a lower semiconductor material member, surrounded by an oxide feature and a liner wrapping around the oxide feature of the lower semiconductor material member, and extending upwards to wrap around a lower portion of the upper semiconductor material member. The device also includes a dielectric layer laterally proximate to an upper portion of the upper semiconductor material member. Therefore the upper semiconductor material member includes a middle portion that is neither laterally proximate to the dielectric layer nor wrapped by the liner.
US09178063B2 Semiconductor device
A semiconductor device includes a gate structure over a substrate, a source region in the substrate, where the source region is adjacent to the gate structure. Additionally, the semiconductor device includes a drain region in the substrate, where the drain region is adjacent to the gate structure. Moreover, the semiconductor device includes a first dislocation in the substrate between the source region and the drain region. Furthermore, the semiconductor device includes a second dislocation in the substrate between the source region and the drain region, where the second dislocation is substantially parallel to the first dislocation.
US09178062B2 MOS transistor, fabrication method thereof, and SRAM memory cell circuit
Various embodiments provide an MOS transistor, a formation method thereof, and an SRAM memory cell circuit. An exemplary MOS transistor can include a channel region including an asymmetric stressing layer having a stress gradually varied from a compressive stress to a tensile stress or from a tensile stress to a compressive stress from a first end of the channel region adjacent to a source region to a second end of the channel region adjacent to a drain region. The MOS transistor can be used as a transfer transistor in an SRAM memory cell circuit to increase a source-drain saturation current in a write operation and to reduce a source-drain saturation current in a read operation. Read and write margins of the SRAM can be increased.
US09178060B2 Semiconductor devices and methods of fabricating the same
A MOS transistor includes a pair of impurity regions formed in a substrate as spaced apart from each other, and a gate electrode formed on a region of the substrate located between the pair of impurity regions. Each of the impurity regions is formed of a first epitaxial layer, a second epitaxial layer on the first epitaxial layer, and a third epitaxial layer on the second epitaxial layer. The first epitaxial layer is formed of at least one first sub-epitaxial layer and a respective second sub-epitaxial layer stacked on each first sub-epitaxial layer. An impurity concentration of the first sub-epitaxial layer is less than that of the second sub-epitaxial layer.
US09178055B2 Semiconductor device
A semiconductor device includes a semiconductor substrate, a surface of which is provided with: a source region having a first conductivity type is formed in a body region having a second conductivity type opposite to the first conductivity type; a main electrode connected to the source region and the body region; and a gate electrode, to which a voltage for controlling a current flowing through the main electrode is applied, and the semiconductor device includes: a recess formed in the surface of the semiconductor substrate, wherein the source region is exposed on an inner surface of the recess and the main electrode is connected to the source region at the inner surface of the recess.
US09178052B2 Semiconductor device
According to one embodiment, a semiconductor device includes a structure, an insulating film, a control electrode, first and second electrodes. The structure has a first surface, and includes a first, a second, and a third semiconductor region. The structure has a portion including the first, second, and third semiconductor regions arranged in a first direction along the first surface. The insulating film is provided on the first surface. The control electrode is provided on the insulating film. The first electrode is electrically connected to the third semiconductor region. The second electrode is electrically connected to the first semiconductor region. The insulating film includes a charge trap region. A bias voltage is applied to the first and second electrodes, and includes a shift voltage. The shift voltage shifts a reference potential of a voltage applied to the first and second electrodes by a certain voltage.
US09178051B2 Semiconductor device
A semiconductor device includes an active region on a semiconductor substrate. The active region is defined by a device isolation layer and includes gate-recesses. The semiconductor device further includes gate electrodes in the gate-recesses, a contact recess in the active region between the gate-recesses, a cell pad that covers at least a portion of the active region between the gate-recesses and that fills at least a portion of the contact recess, and a bit line electrically connected to the cell pad.
US09178044B2 Semiconductor device and method for fabricating the same
Provided are a semiconductor device and a method for fabricating the same. The method for fabricating a semiconductor device comprises, providing an active fin and a field insulating film including a first trench disposed on the active fin; forming a second trench through performing first etching of the field insulating film that is disposed on side walls and a lower portion of the first trench; forming a first region and a second region in the field insulating film through performing second etching of the field insulating film that is disposed on side walls and a lower portion of the second trench, the first region is disposed adjacent to the active fin and has a first thickness, and the second region is disposed spaced apart from the active fin as compared with the first region and has a second thickness that is thicker than the first thickness; and forming a gate structure on the active fin and the field insulating film.
US09178039B2 Semiconductor device
A semiconductor device includes a gate trench across an active region of a semiconductor substrate, a gate structure filling the gate trench, and source/drain regions formed in the active region at respective sides of the gate structure. The gate structure includes a sequentially stacked gate electrode and insulating capping pattern, and a gate dielectric layer between the gate electrode and the active region. The gate electrode is located at a lower level than an upper surface of the active region and includes a barrier conductive pattern and a gate conductive pattern. The gate conductive pattern includes a first part having a first width and a second part having a second width greater than the first width. The barrier conductive pattern is interposed between the first part of the gate conductive pattern and the gate dielectric layer.
US09178036B1 Methods of forming transistor devices with different threshold voltages and the resulting products
One illustrative method disclosed herein includes, among other things, performing at least one recess etching process such that a first portion of a high-k oxide gate insulation layer and a first portion of a metal oxide layer is positioned entirely within a first gate cavity and a second portion of the high-k oxide gate insulation layer, a conformal patterned masking layer and a second portion of the metal oxide layer is positioned entirely within a second gate cavity, performing at least one heating process to form a composite metal-high-k oxide alloy gate insulation layer in the first gate cavity, while preventing metal from the metal oxide material from being driven into the second portion of the high-k oxide gate insulation layer in the second gate cavity during the at least one heating process, and forming gate electrode structures in the gate cavities.
US09178032B2 Gas sensor and manufacturing method thereof
Provided is a gas sensor including a substrate, a sensing electrode extended in a first direction on the substrate, and a plurality of heaters disposed in a second direction crossing the first direction on the substrate. The plurality of heaters is separated at both sides of the sensing electrode. The plurality of heaters includes graphene.
US09178030B2 Thin film transistor and display panel employing the same
A thin film transistor is provided. The transistor includes a gate; a first passivation layer covering the gate; a channel layer disposed on the first passivation layer; a source and a drain that are disposed on the first passivation layer and contact two sides of the channel layer; a second passivation layer covering the channel layer, the source, and the drain; first and second transparent electrode layers that are disposed on the second passivation layer and spaced apart from each other; a first transparent conductive via that penetrates the second passivation layer and connects the source and the first transparent electrode layer; and a second transparent conductive via that penetrates the second passivation layer and connects the drain and the second transparent electrode layer. A cross-sectional area of the gate is larger than a cross-sectional area of the channel layer, the source, and the drain combined.
US09178028B2 Semiconductor device
According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a first control electrode, a first electrode, a second control electrode, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, and a first insulating film. The first control electrode is provided on or above the first semiconductor region. The first electrode is provided on the first control electrode. The second control electrode is provided on or above the first semiconductor region and includes a first portion which is beside the first control electrode and a second portion which is provided on the first portion and beside the first electrode. The second semiconductor region is provided on the first semiconductor region. A boundary between the first semiconductor region and the second semiconductor region is above the lower end of the first electrode.
US09178027B1 Bidirectional trench FET with gate-based resurf
A device includes a semiconductor substrate having a surface, a trench in the semiconductor substrate extending vertically from the surface, a body region laterally adjacent the trench, spaced from the surface, having a first conductivity type, and in which a channel is formed during operation, a drift region between the body region and the surface, and having a second conductivity type, a gate structure disposed in the trench alongside the body region, recessed from the surface, and configured to receive a control voltage is applied to control formation of the channel, and a gate dielectric layer disposed along a sidewall of the trench between the gate structure and the body region. The gate structure and the gate dielectric layer have a substantial vertical overlap with the drift region such that electric field magnitudes in the drift region are reduced through application of the control voltage.
US09178022B2 Precursor composition and method for forming amorphous conductive oxide film
The present invention provides a precursor composition for forming a conductive oxide film having high conductivity and a stable amorphous structure maintained even after heated at high temperature by a simple liquid phase process. The precursor composition of the present invention contains at least one selected from the group consisting of carboxylates, nitrates and sulfates of lanthanoids (but, except for cerium); at least one selected from the group consisting of carboxylates, nitrosyl carboxylates, nitrosyl nitrates and nitrosyl sulfates of ruthenium, iridium or rhodium; and a solvent containing at least one selected from the group consisting of carboxylic acids, alcohols and ketones.
US09178015B2 Trench MOS device having a termination structure with multiple field-relaxation trenches for high voltage applications
A termination structure for a semiconductor device includes a semiconductor substrate having an active region and a termination region. Two or more trench cells are located in the termination region and extend from a boundary of the active region toward an edge of the semiconductor substrate. A termination trench is formed in the termination region on a side of the trench cells remote from the active region. A conductive spacer is located adjacent to a sidewall of the termination trench nearest the trench cells. A first oxide layer is formed in the termination trench and contacts a sidewall of the conductive spacer. A first conductive layer is formed on a backside surface of the semiconductor substrate. A second conductive layer is formed atop the active region and the termination region.
US09178013B2 Semiconductor device with edge termination and method for manufacturing a semiconductor device
According to an embodiment, a semiconductor device includes a semiconductor body having a first semiconductor material and a second semiconductor material having a band gap larger than a band gap of the first semiconductor material. A first pn-junction is formed in the first semiconductor material. A second pn-junction is formed by the second semiconductor material and extends deeper into the semiconductor body than the first pn-junction. The second semiconductor material is in contact with the first semiconductor material and forms part of an edge termination zone of the semiconductor device.
US09177997B2 Memory device
Microelectronic device, comprising a substrate, a first electrode arranged above the substrate, a first resistive switch and a resistivity structure coupled with each other, wherein the first resistive switch and the resistivity structure are arranged in a single layer of the device, and a second electrode arranged above the layer that includes the first resistive switch and the resistivity structure, wherein the first resistive switch and the resistivity structure are coupled with the first and the second electrode.
US09177991B2 Pixel, method of manufacturing the same, and image processing devices including the same
A pixel of an image sensor includes a color filter configured to pass visible wavelengths, and an infrared cut-off filter disposed on the color filter configured to cut off infrared wavelengths.
US09177990B2 Method for forming impurity layer, exposure mask therefore and method for producing solid-state imaging device
A method for forming an impurity layer, includes forming a resist material 16 on a surface portion of a semiconductor substrate 15; exposing the resist material using a grating mask 10 comprising a light transmission region 11 including a plurality of unit light transmission regions 14 being arranged two-dimensionally, each being composed of a plurality of minute partial sections 13A to 13D having different transmittance; forming a resist layer 18 on the surface of the semiconductor substrate 15 by developing the exposed resist material, the resist layer including a thin film region 17 having a film thickness corresponding to the transmittance of the light transmission region; implanting ions to the semiconductor substrate 15 via the thin film region; and diffusing ion groups 21A′, 21B′, 21C′, and 21D′ that are implanted at the same depth such that the ion groups are coupled in a lateral direction.
US09177987B2 Binary CMOS image sensors, methods of operating same, and image processing systems including same
A binary complementary metal-oxide-semiconductor (CMOS) image sensor includes a pixel array and a readout circuit. The pixel array includes at least one pixel having a plurality of sub-pixels. The readout circuit is configured to quantize a pixel signal output from the pixel using a reference signal. The pixel signal corresponds to sub-pixel signals output from sub-pixels, from among the plurality of sub-pixels, activated in response to incident light.
US09177982B2 Lateral light shield in backside illuminated imaging sensors
A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element.
US09177976B2 TFT substrate and method of repairing the same
A thin film transistor (TFT) substrate includes: a substrate; a plurality of scan lines, disposed on the substrate; a plurality of data lines, disposed across the scan lines; a scan line insulting layer disposed between the scan lines and the data lines; a plurality of thin film transistors, each of thin film transistors disposed on an intersection of each scan line and each data line; a data line insulting layer, disposed on a top surface of the scan line insulting layer and used to cover the data lines; and a common electrode, disposed on the data line insulting layer, and comprising a plurality of positioning through holes, wherein the positioning through holes expose the data line insulting layer, and are located right above the data lines.
US09177969B2 Semiconductor device
A semiconductor device having a high aperture ratio and including a capacitor capable of increasing the charge capacity is provided. A semiconductor device includes a transistor over a substrate, a first light-transmitting conductive film over the substrate, an oxide insulating film covering the transistor and having an opening over the first light-transmitting conductive film, a nitride insulating film over the oxide insulating film and in contact with the first light-transmitting conductive film in the opening, a second light-transmitting conductive film connected to the transistor and having a depressed portion in the opening, and an organic resin film with which the depressed portion of the second light-transmitting conductive film is filled.
US09177960B2 Method of forming semiconductor device
A method of forming semiconductor device includes forming a landing pad, forming a stopping insulating layer on the landing pad, forming a lower molding layer including a first material on the stopping insulating layer, forming an upper molding layer including a second material different from the first material on the lower molding layer, forming a hole vertically passing through the upper molding layer and the lower molding layer and exposing the landing pad, forming a first electrode in the hole, removing the upper molding layer to expose a part of a surface of the first electrode, removing the lower molding layer to expose another part of the surface of the first electrode, forming a capacitor dielectric layer on the exposed parts of the surface of the first electrode, and forming a second electrode on the dielectric layer.
US09177958B2 Vertical semiconductor device, module and system each including the same, and method for manufacturing the vertical semiconductor device
A vertical semiconductor device having a vertical channel region is disclosed. The vertical semiconductor device includes a pillar having a vertical channel region, a bit line buried in a semiconductor substrate located at a lower part of the pillar, and a body connection unit configured to couple at least one sidewall of the pillar to the semiconductor substrate. As a result, the floating body effect of the vertical semiconductor device can be more effectively removed.
US09177957B1 Embedded packaging device
An embedded packaging device is provided, including a leadframe, a first semiconductor component, a second semiconductor component, a passive component, and a first dielectric layer. The leadframe forms a counterbore. The first semiconductor component is disposed on the leadframe. The second semiconductor component is disposed on the leadframe and electrically connected with the first semiconductor component through the leadframe. The passive component is disposed on the leadframe and has a different thickness from the first semiconductor component, wherein the passive component or the first semiconductor component is disposed in the counterbore of the leadframe, such that a top surface of the passive component has the same height as that of the first semiconductor component. The first dielectric layer is formed on the leadframe and covers the first semiconductor component, the second semiconductor component, and the passive component.
US09177956B2 Field effect transistor (FET) with self-aligned contacts, integrated circuit (IC) chip and method of manufacture
Field Effect Transistors (FETs), Integrated Circuit (IC) chips including the FETs, and a method of forming the FETs and IC. FET locations and adjacent source/drain regions are defined on a semiconductor wafer, e.g., a silicon on insulator (SOI) wafer. Source/drains are formed in source/drains regions. A stopping layer is formed on source/drains. Contact spacers are formed above gates. Source/drain contacts are formed to the stopping layer, e.g., after converting the stopping layer to silicide. The contact spacers separate source/drain contacts from each other.
US09177954B2 Semiconductor device
A semiconductor device has a semiconductor substrate and a breakdown voltage adjusting first conductivity type low concentration region provided on the semiconductor substrate. A second conductivity type high concentration region is provided near a surface within the breakdown voltage adjusting first conductivity type low concentration region so as to be surrounded by the first conductivity type low concentration region but not surrounded by any low concentration region other than the first conductivity type low concentration region. A first conductivity type high concentration region is provided on the surface within the breakdown voltage adjusting first conductivity type low concentration region without being held in contact with the second conductivity type high concentration region.
US09177949B2 ESD protection element
In an aspect of the present invention, an ESD (Electrostatic Discharge) protection element includes a bipolar transistor comprising a collector diffusion layer connected with a first terminal and an emitter diffusion layer; and current control resistances provided for a plurality of current paths from a second terminal to the collector diffusion layer through the emitter diffusion layer, respectively. The bipolar transistor further includes a base diffusion region connected with the second terminal through a first resistance which is different from the current control resistances.
US09177948B2 Switching element unit
A switching element unit comprising a switching element and a smoothing capacitor that suppresses variation in DC voltage to be supplied to the switching element. An element mounting surface may be formed in an outer surface of the smoothing capacitor and may be formed integrally with a dielectric portion interposed between electrodes of the smoothing capacitor. A capacitor connection electrode as an electrode may be electrically connected to a terminal of the smoothing capacitor formed on the element mounting surface, and the switching element is placed on the element mounting surface such that a terminal of the switching element is electrically connected to the capacitor connection electrode.
US09177947B2 Semiconductor device having efficient capacitor arrangement
The invention includes: multiple bit lines b1 to b5 arranged in parallel to each other at a first line pitch; multiple word lines w1 to w4 arranged in parallel to each other at a second line pitch greater than the first line pitch and intersecting with bit lines b1 to b5; and multiple capacitors. Respective center positions 4 of the multiple capacitors lie above the bit lines and are displaced by given distance C from the intersection of the bit line and the word line in a direction of arranging the word lines.
US09177946B2 Semiconductor circuit with electrical connections having multiple signal or potential assignments
A semiconductor circuit provides at least one first electrical pin with multiple signal assignment or potential assignment in order to integrate several circuit variants in the semiconductor circuit. It has a switch element for isolating or connecting at least one first electrical pin from or to an input or output of a functional unit integrated in the semiconductor circuit.
US09177945B2 Packaged semiconductor device having multilevel leadframes configured as modules
Fabricating a packaged semiconductor device provides first planar leadframe with first leads and pads having attached electronic components. The first leadframe has a set of elongated leads bent at an angle away from the plane of the first leadframe. A second planar leadframe has second leads having attached electronic components. The bent leads of the first leadframe conductively connected to the second leadframe, forming a conductively linked 3-dimensional network between components and leads in two planes.
US09177941B2 Semiconductor device with stacked semiconductor chips
A semiconductor chip 109 is mounted on a substrate 100, first wire group 120 and a second wire group 118 having a wire length shorter than the first wire group are provided so as to connect the substrate 100 and the semiconductor chip 109 to each other, and a sealing resin 307 is injected from the first wire group 120 toward the second wire group 118 so as to form a sealer 401 covering the semiconductor chip 109, the first wire group 120, and the second wire group 118.
US09177939B2 Leadless surface mount assembly package and method of manufacturing the same
Embodiments of the present disclosure relate to a leadless surface mount assembly package, an electronic device, and a method for forming a surface mount assembly package, which package comprising: a first lead; a second lead; a chip fixed on an upper surface of the first lead; a clip coupled to the second lead, a lower surface of the clip being fixed to an upper surface of the chip. The surface mount assembly package further comprises a molding compound for molding the first lead, the second lead, the chip, and the clip, wherein ends of the first lead and the second lead are only exposed from the molding compound, without outward extending from the molding compound. By using the embodiments of the present disclosure, costs can be saved and processing flow can be simplified, and a new-model leadless surface mount assembly package is obtained.
US09177936B2 Method of manufacturing semiconductor device
Chip cracking that occurs when a dicing step using a blade is carried out to acquire semiconductor chips with the reduced thickness of a semiconductor wafer is suppressed. When the semiconductor wafer is cut at the dicing step for the semiconductor wafer, a blade is advanced as follows: in dicing in a first direction (Y-direction in FIG. 12) along a first straight line, the blade is advanced from a first point to a second point. The first point is positioned in a first portion and the second point is opposed to the first point with a second straight line running through the center point of the semiconductor wafer in between.
US09177934B2 Connection arrangement of an electric and/or electronic component
The connection arrangement (100, 200, 300, 400) comprises at least one electric and/or electronic component (1). The at least one electric and/or electronic component (10) has at least one connection face (11), which is connected in a bonded manner to a join partner (40) by means of a connection layer (20). The connection layer (20) can for example be an adhesive, soldered, welded, sintered connection or another known connection that connects joining partners while forming a material connection. Furthermore, a reinforcement layer (30′) is arranged adjacent to the connection layer (20) in a bonded manner. The reinforcement layer (30′) has a higher modulus of elasticity than the connection layer (20). A particularly good protective effect is achieved if the reinforcement layer (30′) is formed in a frame-like manner by an outer and an inner boundary (36, 35) and, at least with the outer boundary (36) thereof, encloses the connection face (11) of the at least one electric and/or electronic component (10).
US09177932B1 Semiconductor device having overlapped via apertures
Disclosed is a semiconductor device having overlapped via apertures formed in an encapsulant to outwardly expose solder balls. When different types of semiconductor devices are electrically connected to the solder balls through the overlapped via apertures, flux or solder paste is unlikely to contact sidewall portions of the overlapped via apertures. Therefore, different types of semiconductor devices can be mounted with improved efficiency.
US09177931B2 Reducing thermal energy transfer during chip-join processing
Embodiments of the present invention provide a semiconductor structure and method to reduce thermal energy transfer during chip-join processing. In certain embodiments, the semiconductor structure comprises a thermal insulating element formed under a first conductor. The semiconductor structure also comprises a solder bump formed over the first conductor. The semiconductor structure further comprises a second conductor formed on a side of the thermal insulating element and in electrical communication with the first conductor and a third conductor. The third conductor is formed to be in thermal or electrical communication with the thermal insulating element. The thermal insulating element includes thermal insulating material and the thermal insulating element is structured to reduce thermal energy transfer during a chip-join process from the solder bump to a metal level included in the semiconductor structure.
US09177930B2 Solder bump with inner core pillar in semiconductor package
A flip chip semiconductor package has a substrate with a plurality of active devices. A contact pad is formed on the substrate in electrical contact with the plurality of active devices. A passivation layer, second barrier layer, and adhesion layer are formed between the substrate and an intermediate conductive layer. The intermediate conductive layer is in electrical contact with the contact pad. A copper inner core pillar is formed by plating over the intermediate conductive layer. The inner core pillar has a rectangular, cylindrical, toroidal, or hollow cylinder form factor. A solder bump is formed around the inner core pillar by plating solder material and reflowing the solder material to form the solder bump. A first barrier layer and wetting layer are formed between the inner core pillar and solder bump. The solder bump is in electrical contact with the intermediate conductive layer.
US09177925B2 Apparatus related to an improved package including a semiconductor die
In one general aspect, a method can include forming a redistribution layer on a substrate using a first electroplating process, and forming a conductive pillar on the redistribution layer using a second electroplating process. The method can include coupling a semiconductor die to the redistribution layer, and can include forming a molding layer encapsulating at least a portion of the redistribution layer and at least a portion of the conductive pillar.
US09177924B2 Vertical nanowire transistor for input/output structure
Systems for protecting a circuit from an electrostatic discharge (ESD) voltage are provided. An input terminal receives an input signal. An ESD protection circuit receives the input signal from the input terminal. The ESD protection circuit includes one or more vertical nanowire field effect transistors (FETs). Each of the one or more vertical nanowire FETs includes a well of a first conductivity type. Each of the one or more vertical nanowire FETs also includes a nanowire having i) a source region at a first end of the nanowire, and ii) a drain region at a second end of the nanowire that is opposite the first end. The source region further includes a portion formed in the well, where the source region and the drain region are of a second conductivity type. A gate region surrounds a portion of the nanowire and is separated from the drain region by a distance.
US09177915B2 Nitride semiconductor device
A nitride semiconductor device includes first electrode interconnect layers and second electrode interconnect layers formed over a nitride semiconductor layer, a first insulating film formed on the first and second electrode interconnect layers and including first openings, first interconnect layers and second interconnect layers formed on the first insulating film and respectively connected to the first electrode interconnect layers and the second electrode interconnection layers through the first openings, a second insulating film formed on the first and second interconnect layers and including second openings, and a first pad layer and a second pad layer formed on the second insulating film and respectively connected to the first interconnect layers and the second interconnect layers through the second openings.
US09177913B2 Semiconductor structure and fabrication method
Various embodiments provide semiconductor structures and fabrication methods. In an exemplary method, a semiconductor substrate can contain a shallow trench isolation (STI) structure that includes a fuse region. A protective layer can be provided on the high-K dielectric layer, which is provided on the semiconductor substrate. A portion of each of the protective layer and the high-K dielectric layer can be removed from the fuse region to expose the STI structure. A fuse layer can be formed on the exposed surface of the STI structure. A portion of the fuse layer, the remaining portion of the protective layer, and a remaining portion of the high-K dielectric layer outside of the fuse region can be removed from the semiconductor substrate to form a fuse structure.
US09177908B2 Stacked semiconductor capacitor structure
The present invention discloses a capacitor in an integrated circuit which comprises a first and second conductive lines substantially parallel to each other and having a thickness equals substantially to a sum of a via thickness and an interconnect thickness, the first and second conductive lines, the via and the interconnect being formed by a single deposition step, and at least one dielectric material in a space horizontally across the first and second conductive lines, wherein the first and second conductive lines serve as two conductive plates of the capacitor, respectively, and the dielectric material serves as an insulator of the capacitor.
US09177904B2 Chip-on-film package and device assembly including the same
Chip-on-film packages and device assemblies including the same may be provided. The device assembly includes a film package including a semiconductor chip, a panel substrate connected to one end of the film package, a display panel disposed on the panel substrate, and a controlling part connected to another end of the film package. The film package includes a film substrate, a first wire disposed on a top surface of the film substrate, and a second wire disposed on a bottom surface of the film substrate.
US09177900B2 Semiconductor device and lead frame used for the same
A lead frame includes a first outer lead portion and a second outer lead portion which is arranged to oppose to the first outer lead portion with an element-mounting region between them. An inner lead portion has first inner leads connected to the first outer leads and second inner leads connected to the second outer leads. At least either the first or second inner leads are routed in the element-mounting region. An insulation resin is filled in the gaps between the inner leads located on the element-mounting region. A semiconductor device is configured with semiconductor elements mounted on both the top and bottom surfaces of the lead frame.
US09177897B1 Integrated circuit packaging system with trace protection layer and method of manufacture thereof
An integrated circuit packaging system and method of manufacture thereof including: providing a pre-plated leadframe having a contact protrusion and a protective pad on the contact protrusion; forming a contact pad and traces by etching the pre-plated leadframe; applying a trace protection layer on the contact pad, the traces, and the protective pad; removing the protective pad and a portion of the trace protection layer for exposing the contact pad; and depositing an external connector directly on a surface of the contact pad.
US09177896B2 Solder flow-impeding plug on a lead frame
Embodiments described herein relate to a packaged component including a lead frame and a non-conductive plug disposed between two or more adjacent sections of the lead frame. The plug is composed of a non-conductive material and is adhered to the two or more adjacent sections of the lead frame. The plug functions to impede the flow of solder along edges of the two or more adjacent sections during second level solder reflow events that occur after encapsulation of the packaged component. The plug includes a main portion disposed within a space between the two or more adjacent sections, and one or more overlap portions extending from the main portion. The one or more overlap portions are disposed on an internal surface of at least one of the two or more adjacent sections. At least one component is mounted on one of the plurality of sections of the lead frame.
US09177894B2 Latch-up suppression and substrate noise coupling reduction through a substrate back-tie for 3D integrated circuits
Roughly described, an integrated circuit device has a conductor extending entirely through the substrate, connected on one end to the substrate topside surface and on the other end to the substrate backside surface. In various embodiments the conductor is insulated from all RDL conductors on the backside of the substrate, and/or is insulated from all conductors and device features on any below-adjacent chip in a 3D integrated circuit structure. Methods of fabrication are also described.
US09177892B2 Apparatus and method for increasing bandwidths of stacked dies
A package structure includes a plurality of die carriers identical to each other. The respective features in each of the plurality of die carriers vertically overlap corresponding features in other ones of the plurality of die carriers. Each of the plurality of die carriers includes a plurality of through-substrate vias (TSVs) including a plurality of data buses. The plurality of die carriers is stacked and electrically connected to each other through the plurality of TSVs. The package structure further includes a plurality of device dies. Each of the plurality of device dies is bonded to one of the plurality of die carriers. Each of the plurality of data buses is configured to dedicate to data transmission of one of the plurality of device dies.
US09177889B2 Implementing microscale thermoacoustic heat and power control for processors and 3D chipstacks
A method and apparatus are provided for implementing microscale thermoacoustic heat and power control for processors and three dimensional (3D) chip stacks. A thermoacoustic heat engine is integrated with a 3D chip-stack and high power processors. The thermoacoustic heat engine is used in cooperation with a heat sink associated with the 3D chip-stack. Predefined connecting layers connect the 3D chip-stack to a cooling end of a thermoacoustic stack of the thermoacoustic heat engine, allowing the cooled end of the resonator to maintain temperature within the 3D chip-stack and to increase the efficiency of the heat sink.
US09177883B2 Curable composition
Provided is a curable composition and its use. The curable composition may exhibit excellent processibility and workability. The curable composition has excellent light extraction efficiency, crack resistance, hardness, thermal and shock resistance and an adhesive property after curing. The curable composition may provide a cured product exhibiting stable durability and reliability under severe conditions in a long time and having no whitening and surface stickiness.
US09177878B2 Method for indexing dies comprising integrated circuits
Indexing a plurality of die obtainable from a material wafer comprising a plurality of stacked material layers. Each die is obtained in a respective position of the wafer. A manufacturing stage comprises at least two steps for treating a respective superficial portion of the material wafer that corresponds to a subset of said plurality of dies using the at least one lithographic mask through the exposition to the proper radiation in temporal succession. The method may include providing a die index on each die which is indicative of the position of the respective die by forming an external index indicative of the position of the superficial portion of the material wafer corresponding to the subset of the plurality of dies including said die and may comprise a plurality of electronic components electrically coupled to each other by means of a respective common control line.
US09177872B2 Memory cells, semiconductor devices, systems including such cells, and methods of fabrication
A memory cell is disclosed. The memory cell includes a transistor and a capacitor. The transistor includes a source region, a drain region, and a channel region including an indium gallium zinc oxide (IGZO, which is also known in the art as GIZO) material. The capacitor is in operative communication with the transistor, and the capacitor includes a top capacitor electrode and a bottom capacitor electrode. Also disclosed is a semiconductor device including a dynamic random access memory (DRAM) array of DRAM cells. Also disclosed is a system including a memory array of DRAM cells and methods for forming the disclosed memory cells and arrays of cells.
US09177868B2 Annealing oxide gate dielectric layers for replacement metal gate field effect transistors
A method of manufacturing a semiconductor structure by forming an oxide layer above a substrate; optionally annealing the oxide layer to densify the oxide layer; forming a first sacrificial gate above the substrate; removing the first dummy gate; optionally annealing the first gate oxide layer; and forming a first replacement metal gate above the gate oxide layer. In some embodiments selective nitridation may be performed during the annealing step.
US09177867B2 Tungsten gates for non-planar transistors
The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of gates within non-planar NMOS transistors, wherein an NMOS work-function material, such as a composition of aluminum, titanium, and carbon, may be used in conjunction with a titanium-containing gate fill barrier to facilitate the use of a tungsten-containing conductive material in the formation of a gate electrode of the non-planar NMOS transistor gate.
US09177863B2 Multi-chip package with offset die stacking and method of making same
A semiconductor device has a plurality of stacked semiconductor dice mounted on a substrate. Each die has similar dimensions. Each die has a first plurality of bonding pads arranged along a bonding edge of the die. A first group of the dice are mounted to the substrate with the bonding edge oriented in a first direction. A second group of the dice are mounted to the substrate with the bonding edge oriented in a second direction opposite the first direction. Each die is laterally offset in the second direction relative to the remaining dice by a respective lateral offset distance such that the bonding pads of each die are not disposed between the substrate and any portion of the remaining dice in a direction perpendicular to the substrate. A plurality of bonding wires connects the bonding pads to the substrate. A method of manufacturing a semiconductor device is also disclosed.
US09177859B2 Semiconductor package having embedded semiconductor elements
A semiconductor package is disclosed, which includes: a carrier having at least an opening; a plurality of conductive traces formed on the carrier and in the opening; a first semiconductor element disposed in the opening and electrically connected to the conductive traces; a second semiconductor element disposed on the first semiconductor element in the opening; and a redistribution layer structure formed on the carrier and the second semiconductor element for electrically connecting the conductive traces and the second semiconductor element. Since the semiconductor elements are embedded and therefore positioned in the opening of the carrier, the present invention eliminates the need to perform a molding process before forming the redistribution layer structure and prevents the semiconductor elements from displacement.
US09177849B2 Chuck for mounting a semiconductor wafer for liquid immersion processing
Chucks for mounting and retaining semiconductor wafers during processing are described, particularly suited for wafer processing involving total immersion of the wafer-chuck structure in a liquid. Chuck structures are disclosed for preventing or hindering processing chemicals from contacting and contaminating large portions of the underside of the wafer undergoing processing, limiting such chemical contact to readily cleaned, relatively small annular regions on the periphery of the wafer. Embodiments include structures with supplemental gas flows on the underside of the wafer as well as the creation of gas/liquid meniscusci to prevent chemical penetration of the wafer's underside. Methods of processing semiconductor wafers employing such chucks are also described.
US09177848B2 Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer
A semiconductor wafer contains a plurality of die with contact pads disposed on a first surface of each die. Metal vias are formed in trenches in the saw street guides and are surrounded by organic material. Traces connect the contact pads and metal vias. The metal vias can be half-circle vias or full-circle vias. The metal vias are surrounded by organic material. Redistribution layers (RDL) are formed on a second surface of the die opposite the first surface. The RDL and through-hole vias (THV) provide expanded interconnect flexibility to adjacent die. Repassivation layers are formed between the RDL on the second surface of the die for electrical isolation. The die are stackable and can be placed in a semiconductor package with other die. The RDL provide electrical interconnect to the adjacent die. Bond wires and solder bumps also provide electrical connection to the semiconductor die.
US09177844B2 Transport system
A process-line-to-process-line transport apparatus transports a transport subject between corresponding two of process lines. A first transport vehicle transports the transport subject in a first process line, and a second transport vehicle transports the transport subject in a second process line. A relay stocking apparatus is placed in a corresponding location, at which the relay stocking apparatus receives the transport subject from one of the first transport vehicle and the second transport vehicle and passes the received transport subject to the other one of the first transport vehicle and the second transport vehicle.
US09177832B2 Semiconductor device and method of forming a reconfigured stackable wafer level package with vertical interconnect
A semiconductor device has a carrier with a semiconductor die mounting area. A plurality of conductive posts is formed in a periphery of the semiconductor die mounting area and in the carrier. A first portion of the carrier is removed to expose a first portion of the plurality of conductive posts such that a second portion of the plurality of conductive posts is embedded in a second portion of the carrier. A first semiconductor die is mounted to the semiconductor die mounting area and between the first portion of the plurality of conductive posts. A first encapsulant is deposited around the first semiconductor die and around the first portion of the plurality of conductive posts. A second portion of the carrier is removed to expose the second portion of the plurality of conductive posts. An interconnect structure is formed over the plurality of conductive posts and the first semiconductor die.
US09177830B1 Substrate with bump structure and manufacturing method thereof
A manufacturing method of a substrate with a bump structure, a copper layer is formed on a semiconductor substrate, and a nickel layer is formed on the copper layer. A bump structure is composed of the copper layer and the nickel layer, wherein the hardness of the bump structure after annealing process depends on the thickness of the nickel layer to meet the user's demand. The hardness of the bump structure meets the user's demand prevents a glass substrate from cracking when the substrate with the bump structure is bonded with the glass substrate.
US09177827B2 Etchant and method for manufacturing semiconductor device using same
Disclosed are an etchant which is used for the manufacture of a semiconductor device using a semiconductor substrate having an electrode and which is capable of selectively etching copper without etching nickel, and a method for manufacturing a semiconductor device using the same. Specifically disclosed are an etchant to be used for the manufacture of a semiconductor device using a semiconductor substrate having an electrode, including hydrogen peroxide, an organic acid, and an organic phosphonic acid, wherein the organic acid is at least one member selected from citric acid and malic acid; a content of hydrogen peroxide is from 0.75 to 12% by mass; a content of the organic acid is from 0.75 to 25% by mass; and a content of the organic phosphonic acid is from 0.0005 to 1% by mass, and a method for manufacturing a semiconductor device using the etchant.
US09177820B2 Sub-lithographic semiconductor structures with non-constant pitch
Fin structures and methods of manufacturing fin structures using a dual-material sidewall image transfer mask to enable patterning of sub-lithographic features is disclosed. The method of forming a plurality of fins includes forming a first set of fins having a first pitch. The method further includes forming an adjacent fin to the first set of fins. The adjacent fin and a nearest fin of the first set of fins have a second pitch larger than the first pitch. The first set of fins and the adjacent fin are sub-lithographic features formed using a sidewall image transfer process.
US09177817B2 Methods for fabricating three-dimensional nano-scale structures and devices
A method of fabricating a 3 dimensional structure, includes: forming a stack of at least 2 layers of photo resist material having different photo resist sensitivities upon a substrate; exposing the stack to beams of electromagnetic radiation or charged particles of different dosages to achieve selective solubility along a height of the stack; and dissolving soluble portions of the stack with a solvent to produce a 3 dimensional structure of desired geometry.
US09177815B2 Methods for chemical mechanical planarization of patterned wafers
Methods for chemical mechanical planarization of patterned wafers are provided herein. In some embodiments, methods of processing a substrate having a first surface and a plurality of recesses disposed within the first surface may include: depositing a first material into the plurality of recesses to predominantly fill the plurality of recesses with the first material; depositing a second material different from the first material into the plurality of recesses and atop the substrate to fill the plurality of recesses and to form a layer atop the first surface; and planarizing the second material using a first slurry in a chemical mechanical polishing tool until the first surface is reached. In some embodiments, a second slurry, different than the first slurry, is used to planarize the substrate to a first level.
US09177813B2 Manufacturing method of semiconductor device
In MOSFET having SBD as a protection element, a TiW (alloy having tungsten as a main component) film is used as an aluminum-diffusion barrier metal film below an aluminum source electrode in order to secure properties of SBD. The present inventors have found that a tungsten-based barrier metal film is in the form of columnar grains having a lower barrier property than that of a titanium-based barrier metal film such as TiN so that aluminum spikes are generated relatively easily in a silicon substrate. In the present invention, when a tungsten-based barrier metal film is formed by sputtering as a barrier metal layer between an aluminum-based metal layer and a silicon-based semiconductor layer therebelow, the lower layer is formed by ionization sputtering while applying a bias to the wafer side and the upper layer is formed by sputtering without applying a bias to the wafer side.
US09177808B2 Memory device with control gate oxygen diffusion control and method of making thereof
An embodiment relates to a memory device that includes a semiconductor channel, a tunnel dielectric located over the semiconductor channel, a charge storage region located over the tunnel dielectric, a blocking dielectric located over the charge storage region, and a control gate located over the blocking dielectric. An interface between the blocking dielectric and the control gate substantially prevents oxygen diffusion from the blocking dielectric into the control gate.
US09177804B2 Silicon carbide semiconductor device
A silicon carbide layer is epitaxially formed on a main surface of a substrate. The silicon carbide layer is provided with a trench having a side wall inclined relative to the main surface. The side wall has an off angle of not less than 50° and not more than 65° relative to a {0001} plane. A gate insulating film is provided on the side wall of the silicon carbide layer. The silicon carbide layer includes: a body region having a first conductivity type and facing a gate electrode with the gate insulating film being interposed therebetween; and a pair of regions separated from each other by the body region and having a second conductivity type. The body region has an impurity density of 5×1016 cm−3 or greater. This allows for an increased degree of freedom in setting a threshold voltage while suppressing decrease of channel mobility.
US09177802B2 High tilt angle plus twist drain extension implant for CHC lifetime improvement
An integrated circuit containing an analog MOS transistor may be formed by implanting drain extensions with exactly four sub-implants wherein at least one sub-implant implants dopants in a substrate of the integrated circuit at a source/drain gate edge of the analog MOS transistor at a twist angle having a magnitude of 5 degrees to 40 degrees with respect to the source/drain gate edge of the analog MOS transistor, for each source/drain gate edge of the analog MOS transistor, wherein a zero twist angle sub-implant is perpendicular to the source/drain gate edge. No more than two sub-implants put the dopants in the substrate at any source/drain gate edge of the analog MOS transistor. All four sub-implants are performed at a same tilt angle. No halo implants are performed on the analog MOS transistor.
US09177799B2 Semiconductor device manufacturing method and substrate manufacturing method of forming silicon carbide films on the substrate
Provided is a substrate processing apparatus, a semiconductor device manufacturing method, and a substrate manufacturing method. The substrate processing apparatus comprises: a reaction chamber configured to process substrates; a first gas supply system configured to supply at least a silicon-containing gas and a chlorine-containing gas or at least a gas containing silicon and chlorine; a first gas supply unit connected to the first gas supply system; a second gas supply system configured to supply at least a reducing gas; a second gas supply unit connected to the second gas supply system; a third gas supply system configured to supply at least a carbon-containing gas and connected to at least one of the first gas supply unit and the second gas supply unit; and a control unit configured to control the first to third gas supply systems.
US09177794B2 Methods of patterning substrates
A method of patterning a substrate includes forming spaced first features over a substrate. Individual of the spaced first features include sidewall portions of different composition than material that is laterally between the sidewall portions. A mixture of immiscible materials is provided between the spaced first features. At least two of the immiscible materials are laterally separated along at least one elevation between adjacent spaced first features. The laterally separating forms a laterally intermediate region including one of the immiscible materials between two laterally outer regions including another of the immiscible materials along the one elevation. The laterally outer regions are removed and material of the spaced first features is removed between the sidewall portions to form spaced second features over the substrate. Other embodiments are disclosed.
US09177790B2 Inkjet printing in a peripheral region of a substrate
Methods, apparatuses and devices relate to inkjet printing a covering layer on at least a first side of a substrate in a peripheral region thereof are discussed.
US09177787B2 NH3 containing plasma nitridation of a layer of a three dimensional structure on a substrate
Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method includes placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a first temperature; and exposing the first layer to an RF plasma formed from a process gas comprising ammonia (NH3) to transform the first layer into a nitrogen-containing layer, wherein the plasma has an ion energy of less than about 8 eV.
US09177786B2 Method of manufacturing semiconductor device, method of processing substrate, substrate processing apparatus, and recording medium
A method of manufacturing a semiconductor device includes forming a thin film on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a source gas to the substrate, and supplying excited species from each of a plurality of excitation units provided at a side of the substrate to the substrate. Each of the plurality of excitation units generates the excited species by plasma-exciting a reaction gas. In supplying the excited species from each of the plurality of excitation units, an in-plane distribution of the excited species supplied from at least one of the plurality of excitation units in the substrate differs from an in-plane distribution of the excited species supplied from another excitation unit, other than the at least one excitation unit, among the plurality of excitation units, in the substrate.
US09177785B1 Thin oxide formation by wet chemical oxidation of semiconductor surface when the one component of the oxide is water soluble
A method of forming a semiconductor structure is provided. The method comprises mixing a water soluble substance with an aprotic solvent to form a solvent mixture and forming a thin layer of oxide around a semiconductor surface by performing wet chemical oxidation operations on the semiconductor surface with the solvent mixture. The aprotic solvent may comprise propylene carbonate, dimethyl sulfoxide, ethylene carbonate or diethyl carbonate. The water soluble substance may comprise H2O2, O3, or parts per million (ppm) level H2O. The method may further comprise removing the oxide from the semiconductor surface to reduce the roughness of the semiconductor surface. The method may further comprise forming a second thin layer of oxide around the semiconductor surface by performing wet chemical oxidation operations with the solvent mixture and removing the second layer of oxide from the semiconductor surface to smoothen the semiconductor surface.
US09177781B2 Plasma processing method and manufacturing method of semiconductor device
A plasma processing method in which performing a plasma etching on metal layers formed on a substrate is conducted to form a pattern having the metal layers in a stacked structure, and then a deposit containing a metal that forms the metal layers and being deposited on a sidewall portion of the pattern is removed, the method includes: forming a protective layer by forming an oxide or chloride of the metal on sidewall portions of the metal layers; removing the deposit by applying a plasma of a gas containing fluorine atoms; and reducing the oxide or chloride of the metal by applying a plasma containing hydrogen after forming the protective layer and removing the deposit.
US09177775B2 Mass spectrometer
An object of the present invention is to prevent lowering of introduction efficiency of ions and to reduce labor for a cleaning operation. In order to solve the above problems, the present invention provides a mass spectrometer where ion introduction hole of an electrode is divided into a first region, a second region, and a third region, a central axis direction of the ion introduction hole in both or either one of the first region and the third region is different from a flow direction axis of the ion inside the ion introduction hole in the second region, and axes of the ion introduction hole in the first region and the third region are in an eccentric position relationship.
US09177772B1 Intermittent/discontinuous sample introduction to an inductively coupled plasma torch
A sample introduction system providing intermittent or discontinuous supply of liquid to a nebulizer is described. In one or more implementations, the sample introduction system includes a nebulizer configured to receive a fluid sample and a nebulizer gas and aerosolize the fluid sample with the nebulizer gas. The sample introduction system also includes a sample pump configured to supply a first aliquot of a sample to the nebulizer during a first time interval, stop supplying the first aliquot of the sample at the end of the first time interval, supply at least substantially no sample to the nebulizer during a second time interval subsequent to the first time interval, and supply a second aliquot of a sample to the nebulizer during a third time interval subsequent to the second time interval.
US09177770B2 Ion gate method and apparatus
The present invention generally relates to systems and methods for transmitting beams of charged particles, and in particular to such systems and methods that employ defecting at least one set of grid elements into the same plane to form an ion gate. In addition, an operation method of closing a gate involving alternating voltages on the adjacent gate wires is described.
US09177768B2 Method of avoiding space charge saturation effects in an ion trap
A mass spectrometer is provided comprising a first ion trap arranged upstream of an analytical second ion trap. The charge capacity of the first ion trap is set at a value such that if all the ions stored within the first ion trap up to the charge capacity limit of the first ion trap are then transferred to the second ion trap, then the analytical performance of the second ion trap is not substantially degraded due to space charge effects.
US09177766B2 Mass spectrometric quantitation assay for metabolites of leflunomide
Methods are described for determining the amount of metabolites of leflunomide in a sample. More specifically, mass spectrometric methods are described for detecting and quantifying teriflunomide in a sample.
US09177759B2 Processing apparatus and method using a scanning electron microscope
The present invention provides a processing apparatus using a scanning electron microscope, which includes the scanning electron microscope having an electron optical system radiating and scanning a focused electron beam on a sample placed on a stage to image the sample, and an image processing/control section which controls the scanning electron microscope and processes the image obtained by imaging with the scanning electron microscope. The electron optical system of the scanning electron microscope has image shift electrodes comprised of electrostatic electrodes, the image shift electrodes moving a position at which to apply the focused electron beam onto the sample with the stage stopped to thereby shift a region in which the sample is to be imaged.
US09177757B2 Charged particle beam apparatus
The present invention relates to a defect inspection apparatus based on the fact that contrasts of a grain and a void of a semiconductor copper interconnect in a scanning electron microscope are changed depending on electron beam irradiation accelerating voltages. A charged particle beam apparatus of the present invention irradiates the same portion of a specimen with electron beams at a plurality of accelerating voltages, and differentiates a grain (65, 66) from a void (67) on the basis of a contrast change amount of the same portion in a plurality of images (61, 62) acquired so as to respectively correspond to the plurality of accelerating voltages. Consequently, it is possible to automatically detect a grain and a void in a differentiation manner at a high speed without destructing a specimen.
US09177753B2 Radiation generating tube and radiation generating apparatus using the same
A radiation generating tube includes a cathode connected to an electron emitting member; an anode including a target; and an insulating tube disposed between the cathode and the anode to surround the electron emitting member. The insulating tube includes an electrical potential defining member at an intermediate portion of the insulating tube in a longitudinal axis direction of the insulating tube. The electrical potential defining member is electrically connected to an electrical potential defining unit. The potential of the electrical potential defining member is controlled to be higher than that of the cathode and lower than that of the anode. A boundary of the electrical potential defining member and the insulating tube does not face a portion of the anode exposed to the inside of the radiation generating tube.
US09177751B2 Carbon ion beam injector apparatus and method of use thereof
A charged particle cancer therapy system is used to accelerate an anion, such a C−, and to convert the anion to a cation, such as C6+, through use of one or more electron extraction subsystems. A first example of an electron extraction subsystem is a hydrogen gas electron stripping system. A second example of an electron extraction subsystem is a carbon foil electron stripping system. The resultant cation is accelerated in a synchrotron, transported along a beam-line, and targeted to a tumor resulting in ablation of the tumor.
US09177750B2 Ion source device and method for providing ion source
Various embodiments provide an ion source device and a method for providing the ion source. An exemplary ion source device can include an arc chamber, a filament, a reflector, a slit outlet, a source gas inlet, and/or a cleaning gas inlet. The filament can be configured to generate thermo-electrons in the arc chamber. The reflector can be configured to reflect the thermo-electrons back to the arc chamber. The slit outlet can be configured to exit a gaseous material out of the arc chamber. The source gas inlet and the cleaning gas inlet can be located on a same sidewall of the arc chamber configured to respectively introduce an ion source gas and an inert cleaning gas into the arc chamber.
US09177742B2 Modular solid dielectric switchgear
Modular switchgear and methods for manufacturing the same. The modular switchgear includes a vacuum interrupter assembly, a source conductor assembly, and a housing assembly. The vacuum interrupter assembly includes a bushing, a fitting, and a vacuum interrupter at least partially molded within the bushing and including a movable contact and a stationary contact. The source conductor assembly includes a bushing, a fitting, and a source conductor molded within the bushing. The housing assembly includes a housing defining a chamber and a drive shaft and conductor positioned within the chamber. The housing assembly also includes a first receptacle for receiving the fitting of the vacuum interrupter assembly and a second receptacle for receiving the fitting of the source conductor assembly. The vacuum interrupter assembly, the source conductor assembly, and the housing assembly are coupled without molding the assemblies within a common housing.
US09177739B2 Scalable medium voltage latching earthing switch
A scalable earthing switch that incorporates a torsion spring to effect rapid closure of the switch. The torsion spring is supported coaxially about a rotatable shaft on which contact blades are mounted resulting in compact design. The blade contacts are separated axially along the length of the shaft by one or more spacers. By using difference size spacers the distance between adjacent blade contacts can be changed and, thus, the earthing switch can be easily scaled for different applications. A latching (detent) mechanism is provided for latching the switch in an open position.
US09177738B2 Mobile terminal
A mobile terminal having a terminal body, a circuit board located in the terminal body, the circuit board including a plurality of switches located thereon and an input device is provided. The input device is configured to input a control command and is installed at the terminal body. The input device includes a key top configured to be pressable in one direction, the key top having a rear surface facing the circuit board, a plurality of pressing portions protruding from the rear surface of the key top, each pressing portion being configured to extend toward a corresponding switch of the plurality of switches and at least one dummy pressing portion disposed between one pressing portion and another pressing portion of the plurality of pressing portions, the at least one dummy pressing portion being supported by the circuit board when the key top is pressed such that, when one switch of the plurality of switches is pressed by said one pressing portion, the at least one dummy pressing portion is configured to prevent said another pressing portion from pressing another switch of the plurality of switches.
US09177734B2 Protective switch cover system
The instant invention teaches a protective cover for an electrical switch forming part of an electrical circuit having three key components: a fastening flange adapted to be secured to a cover plate for the switch, a shield portion connected to the fastening flange which serves to help block accidental contact, activation and/or access to the electrical switch, but does not totally prevent intentional movement of the switch by a user (especially via a hand-held tool), and a snap off tab or tabs forming part of the shield portion, with the snap off tab or tabs being adapted to be snapped off and removed to allow freer access to and movement of the electrical switch by a user while still providing significant protection against accidental contact and activation.
US09177730B2 Terminal for an electrical switchgear
A terminal is provided for an electrical switchgear. The terminal includes: a housing arrangement including an electrically insulating material and having an inner surface defining a cavity; and a first terminal electrical contact contained in the housing arrangement for making an electrical connection with an electrical component insertable into the cavity. The first terminal electrical contact is located in a first recess formed in the inner surface, the first terminal electrical contact being flush with the inner surface.
US09177723B2 High voltage high current transmission line
A high voltage high current transmission line for transmitting high voltage high current energy in the 10 kV and 200,000 A range from a power source to an end item to which the power is delivered. The high voltage high current transmission line includes two generally parallel configured conductive plates with an overlapping dielectric layering configuration. Each of the conductive plates are encompassed by a first dielectric material, both of the conductive plates encompassed by a second dielectric material, and the conductive plates are encompassed by an outer dielectric sheathing. The dielectric layering configuration may also include a dielectric material applied to the edges of the conductive plates. At one or both ends of the high voltage high current transmission line, a plug assembly may be provided for connecting to the power source and/or the discharge device. The high voltage high current transmission line may also include an exposed conductive plate surface with a staggered configuration such that the exposed surfaces of the conductive plates do not overlap.
US09177719B2 Edgewise wound coil manufacturing device
Disclosed is an edgewise wound coil manufacturing device for manufacturing an edgewise wound coil. The edgewise wound coil manufacturing device is provided with: a plurality of corners; a core having a recess formed between each pair of adjacent corners, and around which a flat wire is wrapped; a rotating part that forces the core to rotate around the central axis of the core; guide parts that hold the flat wire therebetween in the thickness direction, while guiding the flat wire in such a manner that the flat wire wraps around the core; a first moving part that forces at least one of the guide parts and the core to move in the approaching/receding direction of the other; and a controller that adjusts the amount that the first moving part moves such that the edgewise wound coil achieves the desired shape.
US09177718B2 Sensing transformer with pivotable and rotatable split cores
A split core sensing transformer comprises a first core portion and a second core portion joined to the first core portion for pivoting relative to the first core portion about a first axis and for rotation relative to the first core portion about a second axis substantially normal to said first axis.
US09177714B2 Transverse shield wire for energy transfer element
Energy transfer elements having a shield to reduce EMI while maintaining a low profile are disclosed. In one example, the transformer may include a transverse shield wire that may be utilized to keep displacement current within the energy transfer element. While windings of the energy transfer element are generally wound axially around the axis of a bobbin in a direction generally perpendicular to the axis of the bobbin, the transverse shield wire may be placed on the bobbin extending over multiple power windings of the energy transfer element in a transverse direction. The transverse shield wire may be situated outside all other windings wound around the bobbin. In some examples, one end of the transverse shield wire may be coupled to a switching node of the energy transfer element while the other end of the transverse shield wire may be coupled to a winding of the energy transfer element.
US09177713B2 Winding structure, coil winding, coil part, and coil winding manufacturing method
There is provided a winding structure, a coil winding, a coil part, and a coil winding manufacturing method, which are capable of preventing occurrence of an extra space due to existence of a connecting wire part when two winding parts and a connecting wire part connecting the winding parts are formed.
US09177711B2 Heat dissipation structure of transformer
A heat dissipation structure of transformer includes a bobbin formed with a hollow shape and wound with a primary coil and a secondary coil. A core surrounds an inside and an outside of the bobbin by combining a pair of upper cores with a pair of lower cores. A heat dissipating plate is disposed between the pair of upper cores and the pair of lower cores. According to an exemplary embodiment of the present disclosure, heat generated inside of the core can be effectively exhausted outside by a heat dissipating plate disposed in the center of the core.
US09177710B2 SMD transformer structure and SMD transformer array
A SMD transformer structure includes a substrate unit, a magnetic unit, a coil unit and a shielding unit. The substrate unit includes a support substrate. The magnetic unit includes at least one magnetic material core bar disposed on the support substrate. The coil unit includes at least one transformer coil assembly wound around the magnetic material core bar. The transformer coil assembly includes a plurality of transformer coils wound around the magnetic material core bar, and each transformer coil has two opposite end portions respectively and electrically connected to the corresponding first electrode and the corresponding second electrode of the substrate unit. The shielding unit includes at least one magnetic shielding board disposed on the magnetic material core bar. Whereby, the SMD transformer structure not only can be simplified to reduce its size, but also can be automatically manufactured to increase its production efficiency and product yield (reliability).
US09177709B2 Structure and method for high performance multi-port inductor
A multi-port inductor structure for use in semiconductor applications such as high-performance RF filters and amplifiers is provided. Embodiments of the present invention may provide 3 metallization layers and two via layers. The metallization layers and via layers may be substantially stacked on top of each other to conserve space. Each metallization layer comprises a ring pattern. In embodiments, the top two ring patterns include a plurality of concentric bands, forming a spiral pattern. The third (bottom) ring may include a broken ring pattern. In embodiments, the second (middle) ring may include one or more spans to facilitate connection to the inner bands of the second ring. The spans connect inner bands to an outer perimeter region of the second ring. Multiple tap points along the bands and spans allow multiple inductance values to be obtained from the structure.
US09177706B2 Method of producing an amorphous transformer for electric power supply
This method of producing an amorphous transformer for electric power supply comprises forming and shaping an iron core by laminating amorphous alloy thin bands and forming a winding, subjecting the iron core, after forming and shaping, to an annealing treatment in which a temperature of a center portion of the iron core during annealing is 300 to 340° C. and a holding time is not less than 0.5 hr, and applying a magnetic field having a strength of not less than 800 A/m to the iron core while subjecting the iron core, after forming and shaping, to the annealing treatment.
US09177702B2 PTC composition and resistive device and LED illumination apparatus using the same
A PTC composition comprises crystalline polymer and conductive ceramic filler dispersed therein. The crystalline polymer has a melting point less than 90° C. and comprises 5%-30% by weight of the PTC composition. The crystalline polymer comprises ethylene, vinyl copolymer or the mixture thereof. The vinyl copolymer comprises at least one of the functional group selected from the group consisting of ester, ether, organic acid, anhydride, imide or amide. The conductive ceramic filler comprises a resistivity less than 500 μΩ-cm and comprises 70%-95% by weight of the PTC composition. The PTC composition has a resistivity about 0.01-5 Ω-cm and its resistance at 85° C. is about 103 to 108 times that at 25° C.
US09177697B2 Flat cable and electronic device
A transmission line section of a flat cable includes a dielectric element including a signal conductor at an intermediate position of a thickness direction, a first ground conductor, and a second ground conductor. The first ground conductor includes elongated conductors that are spaced apart from each other in a width direction of the dielectric element, and extend in a longitudinal direction, and bridge conductors that connect the elongated conductors at spaced points along the longitudinal direction. A widened portion having a width larger than the width of the elongated conductors is located at the intermediate position between bridge conductors that are adjacent to each other along the longitudinal direction. The widened portion is configured to project in a direction in which the elongated conductors are opposed to each other. An interlayer connection conductor is located in the widened portion. The first ground conductor and the second ground conductor are connected by the interlayer connection conductor.
US09177695B2 Battery lead
Motor vehicle battery lead with a first connection element for a battery pole, a second connection element for at least one consumer, and a flat conductor arranged between the first connection element and the second connection element. A modular construction with a high degree of flexibility is achieved, in that the flat conductor is formed in a number of parts, wherein at least two parts of the multi-part flat conductor are connected to each other over the course of the flat conductor.
US09177687B2 Coating and electronic component
A coating for a conductor, the coating having a layered structure of a palladium layer. The palladium layer has a crystal plane whose orientation rate is 65% or more, which means 65% or more of the crystal planes of the palladium layer are aligned to this crystal plane. Preferably the crystal plane whose orientation rate is 65% or more in the coating is the (111) plane or (200) plane.
US09177685B1 High power, broadband terahertz, photoconductive antennas with chaotic shape electrodes
A photoconductive antenna is described that includes a substrate that includes a pair of trenches. Furthermore, a pair of non-parallel electrodes, which can be designed with a chaotic electrode geometry, can each be deposited in one of the trenches, and can be configured to produce chaotic trajectories of incoherent electric currents. Finally, an insulation layer, which can be either a physical electrical insulation layer or an air gap, can be included between each of the pair of non-parallel electrodes and the trench walls. Overall, the thickness of the substrate, the thickness of the trenches, and the thickness of the non-parallel electrodes can each be optimized to produce a coherent terahertz beam.
US09177677B2 Underwater remote inspection device and method for underwater remote inspection
An underwater remote inspection device is provided with an etching device and a magnifying observation device mounted to a supporting member. A chamber of the etching device is provided with a negative electrode, a positive electrode and a sealing device, and is connected to an etchant supply pipe and an etchant exhaust pipe. A single pair of annular sealing members of the sealing device is provided to a distal end portion of the chamber. A suction passage formed in the side wall of the chamber communicates to a sealing region formed between the sealing members. The magnifying observation device is provided with a magnifying camera in a waterproof container and a plurality of LED lights are installed to the waterproof container. The underwater remote inspection apparatus can prevent leakage of an etchant and reduce execution time of etching.
US09177675B2 Passive containment air cooling for nuclear power plants
A passive containment air cooling system for a nuclear power plant that enhances air flow over a metal containment that houses the reactor system to improve heat transfer out of the containment. The heat transfer is improved by employing swirl vanes to mix the air as it rises over the walls of the containment due to natural circulation and a vortex engine proximate an exit along the cooling air path to increase the quantity of air drawn along the containment.
US09177674B2 Compact nuclear reactor
A pressurized water nuclear reactor (PWR) includes a once through steam generator (OTSG) disposed in a generally cylindrical pressure vessel and a divider plate spaced apart from the open end of a central riser. A sealing portion of the pressure vessel and the divider plate define an integral pressurizer volume that is separated by the divider plate from the remaining interior volume of the pressure vessel. An internal control rod drive mechanism (CRDM) has all mechanical and electromagnetomotive components including at least a motor and a lead screw disposed inside the pressure vessel. Optionally CRDM units are staggered at two or more different levels such that no two neighboring CRDM units are at the same level. Internal primary coolant pumps have all mechanical and electromagnetomotive components including at least a motor and at least one impeller disposed inside the pressure vessel. Optionally, the pumps and/or CRDM are arranged below the OTSG.
US09177672B2 Methods of operating memory involving identifiers indicating repair of a memory cell
Method of operating memory including storing and/or using an identifier indicating repair of a memory cell.
US09177670B1 Method and apparatus for flash cache management
Example embodiments of the present invention relate to a method and a system for improving performance of flash cache memory, such as in a host of a storage environment, for example, by preventing a cache cell from reaching an operation limit. The method includes determining that a number of operations to a first cell of a flash memory has reached a threshold and managing the flash memory according to the determination to prevent a failure of a second cell of the flash memory.
US09177669B2 Storage-medium diagnosis device, storage-medium diagnosis method
A storage-medium diagnosis includes a storage unit that stores therein respective diagnosis results of subregions of a storage region of a storage medium; a higher-access executing unit that accesses a region corresponding to access request from a higher-level device, and stores a result of the access as a diagnosis result in the storage unit; a diagnosis-region identifying unit that identifies a diagnosis region to be diagnosed next on the basis of the respective diagnosis results of the subregions stored in the storage unit; and a diagnosis executing unit that accesses and diagnoses the diagnosis region identified by the diagnosis-region identifying unit, and stores a result of the diagnosis in the storage unit. The storage-medium diagnosis can reduce the time used for diagnosis of the storage medium and suppress degradation in performance even during operation.
US09177666B2 Shift register unit and driving method thereof, shift register and display apparatus
The present disclosure relates to a shift register unit and a driving method thereof, a shift register and a display apparatus. The shift register unit includes a carry signal output terminal (CA(n)); a driving signal output terminal (OUT(n)); a staged output module (33) connected to the pulling-up node (PU), the pulling-down node (PD), the carry signal output terminal (CA(n)) and the driving signal output terminal (OUT(n)), respectively, for outputting a carry signal and a driving signal in stages so that the driving signal maintains a high level in the evaluating phase and a low level in the resetting phase; a pulling-up node level maintaining module (34) for, in the evaluating phase, maintaining the level at the pulling-up node (PU) at a high level via the first output control module (31) so that the driving signal maintains the high level. It removes the effect of the leakage current of the depletion type TFT on the shift register by using staged output and maintaining the pulling-up node level, which increases stability and reliability thereof and decreases power consumption.
US09177655B2 Pulse control for nonvolatile memory
A nonvolatile memory device that uses pulsed control and rest periods to mitigate the formation of defect precursors. A first embodiment uses pulsed bitline control, where the coupling between a memory cell channel and a reference voltage is pulsed when it is desired to change state in the associated memory cell. Each pulse may be chosen to be less than about 20 nanoseconds, while a “rest period” between pulses can be on the order of about a hundred nanoseconds or greater. Because bitline control is used, very short rise times can be enabled, enabling generation of pulse durations of 50 nanoseconds or less. In other embodiments, these methods may also be more generally applied to other conductors (e.g., wordline or substrate well, for program or erase operations); segmented wordlines or bitlines may also be used, to minimize RC loading and enable sufficiently short rise times to make pulses robust.
US09177652B2 Bad block compensation for solid state storage devices
Technologies and implementations for reusing bad blocks in a solid state drive are generally disclosed.
US09177651B2 Programming methods and memories
Methods of programming a memory and memories are disclosed. In at least one embodiment, a memory is programmed by determining a pretarget threshold voltage for a selected cell, wherein the pretarget threshold voltage is determined using pretarget threshold voltage values for at least one neighbor cell of the selected cell.
US09177649B2 Flash memory circuit
A memory circuit is provided, including: a plurality of sectors, where each sector includes at least two parallel rows of memory units; a first control line, a second control line and a word line corresponding to each row of memory units, where at least two of the first control lines which are in the same sector and neighboring with each other are connected, and at least two of the second control lines which are in the same sector and neighboring with each other are connected; and a plurality of bit lines perpendicular with the word lines. The number of the first and second control lines may be reduced, so decoding units which control the control lines may occupy less chip areas, thereby reducing chip areas occupied by the memory circuit.
US09177648B2 3D non-volatile memory device having wordlines with large width
A nonvolatile memory device includes first to N-th memory blocks, wherein N is an integer and N≧3. Each memory block, of the first to N-th memory blocks comprises first to (M−1)-th strings, wherein each string, of the first to (M−1)-th strings, includes drain-side memory cells, source-side memory cells, and a pipe transistor connecting the drain-side memory cells and the source-side memory cells, where M is an integer and M≧2, and an M-th string, including drain-side memory cells formed adjacent to the first string, of a first to (M−1)-th strings, and including source-side memory cells formed adjacent to an (M−1)-th string of the first to (M−1)-th strings.
US09177646B2 Implementing computational memory from content-addressable memory
A content-addressable memory (CAM) with computational capability is described. The CAM includes an array of CAM cells arranged in rows and columns with a pair of search lines associated with each column of the array and a match line associated with each row of the array. The array of CAM cells is configured to implement, for a given cycle, either a read operation of data contained in a single selected column, or one of a plurality of different bitwise logical operations on data contained in multiple selected columns. All of the pairs of search lines in the columns of the array are configured to a certain state to implement the read operation or one of the plurality of different bitwise logical operations. A result of the read operation or one of the plurality of different bitwise logical operations is outputted onto all of the match lines in the array.
US09177644B2 Low-voltage fast-write PMOS NVSRAM cell
This invention discloses a low-voltage fast-write 12T or 14T PMOS NVSRAM cell structure which comprises a 6T LV SRAM cell and one pairs of two 3T or 4T HV PMOS Flash strings. Due to reverse threshold voltage definition of PMOS and NMOS flash cell, this PMOS NVSRAM cell has the advantage over the NMOS NVSRAM cell to have the same data polarity between SRAM and Flash pairs during the data writing operation. In addition, this PMOS NVSRAM's PMOS Flash cell uses similar low-current FN-tunneling scheme as NMOS NVSRAM, thus the fast data program and erase can be achieved in a big density up to 100 Mb simultaneously. As a result, low power voltage operation of NVSRAM with 1.2V VDD can be much easier to be designed without coupling the FSL line to any VDD level during the flash data loading into SRAM cell during a power-on period.
US09177643B2 Phase-change memory device and method for multi-level programming of phase-change memory device
A method for multi-level programming of a phase change memory device includes selecting a word line from multiple word lines and applying multiple bits of data to a bit line of a cell connected to the selected word line. According to the type of data, the method applies a program current to the selected word line or a multi-level program current to word lines adjacent to the selected word line.
US09177642B1 Crossbar RRAM array radiation hardened application
A method for programming a non-memory device comprising a plurality of resistive switching device. Each of the plurality of resistive switching device includes a resistive switching material characterized by a resistance characterized by a state depending on a conductive filament structure. A first programming code file to configure a system to perform a predetermined task is provided. The programmability of each of the plurality of resistive switching device is maintained. The system receives the first programming code file, executing the first programming code file, and verifies and validates that the system performs the predetermined task. Once the first programming code file is validated, the conductive filament in one or more resistive switching device is fixed spatially in a portion of the resistive switching material of the respective one or more resistive switching device by applying joule heating programming. The programmability of each of the memory device is removed.
US09177640B2 Multi-level recording in a superlattice phase change memory cell
A phase-change device capable of realizing a multi-level record in a superlattice phase-change memory cell in which a superlattice phase-change material is used as a recording film, and thereby achieving the reduction in power consumption and the capacity increase is provided. To a phase-change memory cell composed of GeTe/Sb2Te3 superlattice or SnTe/Sb2Te3 superlattice, a SET pulse is once applied to form a SET state (low resistance state). Thereafter, recording pulses having respectively different voltage values between a voltage value forming the SET state and a voltage value forming a RESET state (high resistance state) are respectively applied to the superlattice phase-change memory cell twice or more. In this manner, a read resistance (SET resistance) corresponding to a recording pulse (SET pulse) and read resistances corresponding to each of the recording pulses are obtained, so that the multi-level record can be realized.
US09177639B1 Memory devices, circuits and methods having data values based on dynamic change in material property
A method can include determining a data value stored in a memory element of a memory cell array based on the length of time required to cause a property of the memory element to change. A memory device can include a plurality of elements programmable into at least two different states; and an electrical bias section that applies sense conditions to a selected element; and a sense section configured to distinguish between the two different states according to whether a change in property occurs in the selected element within a predetermined time under the sense conditions.
US09177636B1 8T based SRAM cell and related method
Various embodiments include memory devices and related methods. An embodiment includes circuitry including: a first inverter having a first inverter storage node, the first inverter cross-coupled to a second inverter having a second inverter storage node, wherein each of the first inverter and the second inverter has a reverse bit line controlled feedback transistor coupled between an pull-down transistor and a pull-up transistor, and wherein each pull-down transistor is further coupled to a ground; a first signal line coupled with the reverse bit line controlled feedback transistor of the second inverter; a second signal line coupled with the reverse bit line controlled feedback transistor of the first inverter; a first access transistor coupled with the first inverter storage node, the first signal line, and a third signal line; and a second access transistor coupled with the second inverter storage node, the second signal line, and the third signal line.
US09177631B2 Memory circuit with switch between sense amplifier and data line and method for operating the same
A memory circuit includes at least one first memory cell of a first memory array for storing a first datum. The at least one first memory cell is coupled with a first word line and a first bit line. A first bit line bar is disposed substantially parallel with the first bit line. A first switch is coupled between a sense amplifier and the first bit line bar. The first switch can electrically isolate the sense amplifier from the first bit line bar if the sense amplifier is capable of sensing a first voltage difference between the first bit line. The first bit line bar and the first voltage difference is substantially equal to or larger than a predetermined value.
US09177629B2 Memory device having a transistor including a semiconductor oxide
To provide a memory device which can perform verification operation for detecting a memory cell whose data holding time is shorter than a predetermined length, accurately in a short time. Each memory cell includes at least a first capacitor, a second capacitor, and a transistor which functions as a switching element for controlling supply, storage, and release of charge in the first capacitor and the second capacitor. The capacitance of the first capacitor is thousand or more times the capacitance of the second capacitor, preferably ten thousand or more times the capacitance of the second capacitor. In normal operation, charge is stored using the first capacitor and the second capacitor. In performing verification operation for detecting a memory cell whose data holding time is shorter than a predetermined length, charge is stored using the second capacitor.
US09177624B1 Memory generating method of memory compiler and generated memory
A memory includes a logic controller, a word line driver, a boost circuit, plural capacitor circuits, plural memory cores, plural selectors, and plural output drivers. The logic controller generates a word line enabling signal and a boost enabling signal. The word line driver receives the word line enabling signal. The boost circuit receives the boost enabling signal. The plural capacitor circuits are connected between the boost circuit and the word line driver. Each of the plural memory cores is connected with the word line driver through plural word lines. The plural selectors are connected with the corresponding memory cores. The plural output drivers are connected with the corresponding selectors. The number of the plural memory cores is positively correlated with the number of the plural capacitor circuits.
US09177623B2 Memory interface offset signaling
A memory interface includes circuitry configured for applying a variable delay to a portion of a data signal and applying a variable delay to a data strobe. The delayed data strobe samples the delayed portion of the data signal. Delayed portions of the data signal are spaced away from non-delayed portions of the data signal by alternating the routing of delayed bits and non-delayed bits of the data signal. A training block determines and sets a value of the variable delay corresponding to a largest value of a number of recorded eye aperture widths.
US09177621B2 Fast bit-line pre-charge scheme
A device includes a first switch configured to control a connection between a first voltage node and a capacitor, and a second switch configured to control a connection between a common charge node and the capacitor. The device further includes a plurality of bit-lines, and a plurality of bit-line charge switches, each configured to control a connection between a respective one of the plurality of bit-lines and the common charge node.
US09177620B2 Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality
A semiconductor memory device includes an I/O line for transmitting read data that has been read from a memory cell, a plurality of driver circuits for driving the I/O line on the basis of the read data, a read circuit for receiving the read data transmitted through the I/O line, and an assist circuit for amplifying the read data transmitted through the I/O line. The assist circuit is disposed farther away from a prescribed drive circuit included in the plurality of drive circuits as viewed from the read circuit. The signal level can thereby rapidly change levels even in memories having relatively long I/O lines.
US09177616B2 Supply power dependent controllable write throughput for memory applications
Devices and methods that allow dynamic management of throughput in a memory device based on a power supply voltage are provided. According to various embodiments, the power supply level can be monitored. Based on the result of the monitoring, an appropriate throughput can be determined. Once the appropriate throughput is determined, an appropriate control signal based on the determined throughput can be generated. The control signal can be configured to cause a bitline driver circuit in a memory array to activate a number of bitlines consistent with the determined throughput.
US09177615B2 Power disconnect unit for use in data transport topology of network on chip design having asynchronous clock domain adapter sender and receiver each at a separate power domain
A power disconnect unit within a data transport topology of a NoC includes an asynchronous clock domain adapter unit inserted between a master side manager unit and a slave side manager unit. This configuration allows for the master and slave side managers of the power disconnect unit to be placed physically far apart on the chip, relieving the need to route long power rail signals on the chip. A response data path and associated asynchronous clock domain adapter unit is optionally included on the chip. A path to bypass the asynchronous clock domain adapter units is optionally included on the chip to enable a fully synchronous mode of operation without the data latency cost of the asynchronous adapter unit.
US09177614B2 Apparatuses and methods including memory with top and bottom data lines
Some embodiments include apparatuses and methods having a first set of data lines, a second set of data lines, and memory cells located in different levels of the apparatus. In at least one of such embodiments, the memory cells can be arranged in memory cell strings between the first and second set of data lines. Other embodiments including additional apparatuses and methods are described.
US09177608B2 Optical disc apparatus
According to one embodiment, there is provided an optical disc apparatus of a slot loading type, including a photosensor disposed near a disc insertion port and configured to change an output therefrom when an optical disc is inserted, a memory configured to record an output signal from the photosensor, and a controller configured to estimate a transparent clamp area of the optical disc based on the output signal, estimate a position of a center hole part of the optical disk based on the estimated clamp area, and detect presence of a foreign matter in the center hole part when a light-blocking percentage in the center hole part indicated by the output signal is equal to or higher than a predetermined value.
US09177599B1 Non-contact fly height calibration and compensation
Calibration and calculation of thermal clearance compensation of a head in a storage device without causing contact between the head and a storage medium. The thermal clearance compensation may be configured to compensate for any changing fly height of the head of the storage device during different temperature conditions based on high and low temperature signal data.
US09177596B2 Decoding device and decoding method
A decoding device includes: an interference canceling circuit (104) which extracts, from states of 2K-number (where K is a natural number) of detected signals that are likely within a range of K bit width where an interference between bits of the digital information occurs due to predetermined frequency characteristics, most likely 2M-number (where M is a natural number) of detected signals respectively corresponding to states of 2M-number of detected signals which exist within a range of M bit width that is included in the range of K bit width; and a Viterbi decoding circuit (105) which generates a decoded signal by calculating differences between the 2M-number of detected signals extracted by the interference canceling circuit (104) and expectation signals respectively corresponding to the 2M-number of detected signals and also by selecting a transition sequence of a state of a detected signal for which the calculated difference is smallest.
US09177592B2 Systems and methods for atomic film data storage
The present disclosure provides systems and methods associated with data storage using atomic films, such as graphene, boron nitride, or silicene. A platter assembly may include at least one platter that has one or more substantially planar surfaces. One or more layers of a monolayer atomic film, such as graphene, may be positioned on a planar surface. Data may be stored on the atomic film using one or more vacancies, dopants, defects, and/or functionalized groups (presence or lack thereof) to represent one of a plurality of states in a multi-state data representation model, such as a binary, a ternary, or another base N data storage model. A read module may detect the vacancies, dopants, and/or functionalized groups (or a topographical feature resulting therefrom) to read the data stored on the atomic film.
US09177586B2 Magnetic disk and manufacturing method thereof
A magnetic disk having at least a magnetic layer, a carbon protective layer, and a lubrication layer sequentially provided on a substrate. The lubrication layer is a film formed by a lubricant that contains two types of compounds having a perfluoropolyether main chain in the structure, a molecular weight distribution of the two types in total being within a range of 1 to 1.2. The two types of compounds include a compound a having a hydroxyl group at the end and a compound b having a number average molecular weight smaller than the number average molecular weight of the compound a and not more than 1500. A content of the compound b in the two types of compounds is not more than 10%.
US09177585B1 Magnetic media capable of improving magnetic properties and thermal management for heat-assisted magnetic recording
A method and system provide a magnetic recording media usable in a heat assisted magnetic recording (HAMR) disk drive. The magnetic recording media includes a magnetic recording layer, a crystalline underlayer, and a crystalline heat sink layer. The crystalline underlayer is between the crystalline heat sink layer and the magnetic recording layer. The magnetic recording layer stores magnetic data. The crystalline underlayer has a first crystal structure. The crystalline heat sink layer has a second crystal structure.
US09177584B2 Vinyl polymer and usage thereof
An aspect of the present invention relates to a method of manufacturing a vinyl polymer, which comprises: mixing a first liquid and a second liquid to conduct an addition reaction, wherein the first liquid has been obtained by reacting a sulfonic acid group-containing compound selected from the group consisting of taurine, N-methyl taurine, and meta-aminobenzenesulfonic acid with an alkali metal hydroxide in methanol, the second liquid comprises a vinyl polymer having an intramolecular epoxy group in a ketone solvent, and the addition reaction incorporates a sulfonic acid alkali metal salt group onto a side chain of the vinyl polymer.
US09177581B2 Head position demodulation method and magnetic disk device
According to one embodiment, at demodulation of an A-phase burst pattern and a B-phase burst pattern arranged in a down-track direction so as to be different from each other in phase in a cross-track direction, the demodulated position of a magnetic head is calculated based on a sin component and a cos component in the A-phase burst pattern and a sin component and a cos component in the B-phase burst pattern.
US09177579B2 Single-piece yoke damper for voice coil actuator
Approaches to improving actuator settle time by damping vibrations resulting from coil modes, such as with a voice coil actuator in a hard disk drive, include a single-piece damper plate coupled to the voice coil actuator yoke. The damper plate may be a single U-shaped piece of metal that covers the area of the yoke that experiences the maximum strain energy during operation, between the voice coil and the pivot bearing housing.
US09177578B1 Hard disk drive voice coil actuator latch
A voice coil actuator utilizes an eddy current magnet configured for positioning proximal to the outer perimeter side face of one or more recording disk, and which cooperates with the conductive side face to generate an eddy current force to rotate a latch lever to an unlatched position. Embodiments may include an end cam on a base on which the latch lever is rotatably disposed, and the latch lever includes a cam follower capable of rotatably engaging with the end cam, whereby the magnetic attraction between the eddy current magnet and the voice coil actuator yoke generates a latch bias force which causes the end cam and cam follower to engage or mesh in order to hold the latch lever in a latched position.
US09177575B1 Tunneling magnetoresistive (TMR) read head with reduced gap thickness
A tunneling magnetoresistive (TMR) read head has a read gap with a reduced thickness. A multilayer seed layer includes a first ferromagnetic seed layer on the lower shield, a ferromagnetic NiFe alloy on the first seed layer, and a third seed layer of Ru or Pt on the NiFe seed layer. The first and NiFe seed layers are magnetically part of the lower shield, thereby effectively reducing the read gap thickness. A free layer/capping layer structure includes a multilayer ferromagnetic free layer and a Hf capping layer on the free layer. The free layer includes a B-containing upper layer in contact with the Hf capping layer prior to annealing. When the sensor is annealed Hf diffuses into the B-containing upper layer, forming an interface layer. The Hf-containing interface layer possesses negative magnetostriction, so the free layer is not required to contain NiFe.
US09177573B1 Tunneling magnetoresistive (TMR) device with magnesium oxide tunneling barrier layer and free layer having insertion layer
A tunneling magnetoresistance (TMR) device has a thin MgO tunneling barrier layer and a free ferromagnetic multilayer. The free ferromagnetic multilayer includes a CoFeB first ferromagnetic layer, a face-centered-cubic (fcc) NiFe compensation layer with negative magnetostriction, and a body-centered-cubic (bcc) NiFe insertion layer between the CoFeB layer and the fcc NiFe compensation layer. An optional ferromagnetic nanolayer may be located between the MgO barrier layer and the CoFeB layer. An optional amorphous separation layer may be located between the CoFeB layer and the bcc NiFe insertion layer. The bcc NiFe insertion layer (and the optional amorphous separation layer if it is used) prevents the fcc NiFe layer from adversely affecting the crystalline formation of the MgO and CoFeB layers during annealing. The bcc NiFe insertion layer also increases the TMR and lowers the Gilbert damping constant of the free ferromagnetic multilayer.
US09177571B2 Reading method for linear tape open
In a method for operating a tape storage system, readback signals are simultaneously received from a set of data readers reading from data tracks of a set of adjacent data tracks extending along a longitudinal extension of a tape storage medium, wherein each data track of the set has a width and each data reader of the set has a width equal to or less than the width of a data track. Simultaneously to receiving the readback signals from the set of data readers readback signals are received from a servo reader arrangement containing at least one servo reader arranged laterally offset from one of the data readers by less than the width of a data track. At least one of lateral position, velocity, gain and timing information is determined dependent on the readback signals of each servo reader in the servo reader arrangement.
US09177570B2 Time scaling of audio frames to adapt audio processing to communications network timing
Methods and apparatus for coordinating audio data processing and network communication processing in a communication device by using time scaling for either inbound or outbound audio data processing, or both, in an communication device. In particular, time scaling of audio data is used to adapt timing for audio data processing to timing for modem processing, by dynamically adjusting a collection of audio samples to fit the container size required by the modem. Speech quality can be preserved while recovering and/or maintaining correct synchronizing between audio processing and communication processing circuits. In an example method, it is determined that a completion time for processing a first audio data frame falls outside a pre-determined timing window. Responsive to this determination, a subsequent audio data frame is time-scaled to control the completion time for processing the subsequent audio data frame.
US09177569B2 Apparatus, medium and method to encode and decode high frequency signal
A method and apparatus to encoding or decoding an audio signal is provided. In the method and apparatus, a noise-floor level to use in encoding or decoding a high frequency signal is updated according to the degree of a voiced or unvoiced sound included in the signal.
US09177564B2 Reconstructing an audio signal by spectral component regeneration and noise blending
An audio signal is conveyed more efficiently by transmitting or recording a baseband of the signal with an estimated spectral envelope and a noise-blending parameter derived from a measure of the signal's noise-like quality. The signal is reconstructed by translating spectral components of the baseband signal to frequencies outside the baseband, adjusting phase of the regenerated components to maintain phase coherency, adjusting spectral shape according to the estimated spectral envelope, and adding noise according to the noise-blending parameter. Preferably, the transmitted or recorded signal also includes an estimated temporal envelope that is used to adjust the temporal shape of the reconstructed signal.
US09177563B2 Encoding device and method, decoding device and method, and program
The present invention relates to an encoding device and method, and a decoding device and method, and a program which enable music signals to be played with higher sound quality by expanding a frequency band.A band pass filter divides an input signal into multiple subband signals, a feature amount calculating circuit calculates feature amount using at least any one of the divided multiple subband signals and the input signal, a high-frequency subband power estimating circuit calculates an estimated value of high-frequency subband power based on the calculated feature amount, and a high-frequency signal generating circuit generates a high-frequency signal component based on the multiple subband signals divided by the band pass filter and the estimated value of the high-frequency subband power calculated by the high-frequency subband power estimating circuit. A frequency band expanding device expands the frequency band of the input signal using the high-frequency signal component generated by the high-frequency signal generating circuit. The present invention may be applied to a frequency band expanding device, encoding device, decoding device, and so forth, for example.
US09177562B2 Speech signal encoding method and speech signal decoding method
A speech signal encoding method and a speech signal decoding method are provided. The speech signal encoding method includes the steps of specifying an analysis frame in an input signal; generating a modified input based on the analysis frame; applying a window to the modified input; generating a transform coefficient by performing an MDCT (Modified Discrete Cosine Transform) on the modified input to which the window has been applied; and encoding the transform coefficient. The modified input includes the analysis frame and a self replication of all or a part of the analysis frame.
US09177560B2 Systems and methods for reconstructing an audio signal from transformed audio information
A system and method may be configured to reconstruct an audio signal from transformed audio information. The audio signal may be resynthesized based on individual harmonics and corresponding pitches determined from the transformed audio information. Noise may be subtracted from the transformed audio information by interpolating across peak points and across trough points of harmonic pitch paths through the transformed audio information, and subtracting values associated with the trough point interpolations from values associated with the peak point interpolations. Noise between harmonics of the sound may be suppressed in the transformed audio information by centering functions at individual harmonics in the transformed audio information, the functions serving to suppress noise between the harmonics.
US09177558B2 Systems and methods for assessment of non-native spontaneous speech
Computer-implemented systems and methods are provided for assessing non-native spontaneous speech pronunciation. Speech recognition on digitized speech is performed using a non-native acoustic model trained with non-native speech to generate word hypotheses for the digitized speech. Time alignment is performed between the digitized speech and the word hypotheses using a reference acoustic model trained with native-quality speech. Statistics are calculated regarding individual words and phonemes in the word hypotheses based on the alignment. A plurality of features for use in assessing pronunciation of the speech are calculated based on the statistics, an assessment score is calculated based on one or more of the calculated features, and the assessment score is stored in a computer-readable memory.
US09177556B2 Sound analysis apparatus for detecting sound sources
A sound analysis apparatus includes a sound information obtaining section chat obtains information relating to a sound acquired by a sound acquiring section that acquires the sound and distinguishes a spoken voice of a wearer from a spoken voice of another person, a phase difference deriving section that derives a relationship between a frequency and a phase difference with respect to the sound acquired by the plural sound acquiring sections, a dispersion deriving section that derives a dispersion that is the level of irregularity of the derived phase difference, and a distance deriving section that derives a distance between the wearer and the other person using a first dispersion derived in a case where the sound is distinguished as the spoken voice of the other person and a second dispersion derived in a case where the sound is distinguished as the spoken voice of the wearer.
US09177551B2 System and method of providing speech processing in user interface
Disclosed are systems, methods and computer-readable media for enabling speech processing in a user interface of a device. The method includes receiving an indication of a field and a user interface of a device, the indication also signaling that speech will follow, receiving the speech from the user at the device, the speech being associated with the field, transmitting the speech as a request to public, common network node that receives and processes speech, processing the transmitted speech and returning text associated with the speech to the device and inserting the text into the field. Upon a second indication from the user, the system processes the text in the field as programmed by the user interface. The present disclosure provides a speech mash up application for a user interface of a mobile or desktop device that does not require expensive speech processing technologies.
US09177550B2 Conservatively adapting a deep neural network in a recognition system
Various technologies described herein pertain to conservatively adapting a deep neural network (DNN) in a recognition system for a particular user or context. A DNN is employed to output a probability distribution over models of context-dependent units responsive to receipt of captured user input. The DNN is adapted for a particular user based upon the captured user input, wherein the adaption is undertaken conservatively such that a deviation between outputs of the adapted DNN and the unadapted DNN is constrained.
US09177549B2 Method and system for cross-lingual voice conversion
A method and system for is disclosed for cross-lingual voice conversion. A speech-to-speech system may include hidden Markov model (HMM) HMM based speech modeling for both recognizing input speech and synthesizing output speech. A cross-lingual HMM may be initially set to an output HMM trained with a voice of an output speaker in an output language. An auxiliary HMM may be trained with a voice of an auxiliary speaker in an input language. A matching procedure, carried out under a transform that compensates for speaker differences, may be used to match each HMM state of the output HMM to a HMM state of the auxiliary HMM. The HMM states of the cross-lingual HMM may be replaced with the matched states. Transforms may be applied to adapt the cross-lingual HMM to the voices of the auxiliary speaker and of an input speaker. The cross-lingual HMM may be used for speech synthesis.
US09177547B2 System and method for processing speech to identify keywords or other information
A system and method are provided for performing speech processing. A system includes an audio detection system configured to receive a signal including speech and a memory having stored therein a database of keyword models forming an ensemble of filters associated with each keyword in the database. A processor is configured to receive the signal including speech from the audio detection system, decompose the signal including speech into a sparse set of phonetic impulses, and access the database of keywords and convolve the sparse set of phonetic impulses with the ensemble of filters. The processor is further configured to identify keywords within the signal including speech based a result of the convolution and control operation the electronic system based on the keywords identified.
US09177545B2 Recognition dictionary creating device, voice recognition device, and voice synthesizer
A recognition dictionary creating device includes a user dictionary in which a phoneme label string of an inputted voice is registered and an interlanguage acoustic data mapping table in which a correspondence between phoneme labels in different languages is defined, and refers to the interlanguage acoustic data mapping table to convert the phoneme label string registered in the user dictionary and expressed in a language set at the time of creating the user dictionary into a phoneme label string expressed in another language which the recognition dictionary creating device has switched.
US09177539B2 Devices for harmonization of mechanical and electromagnetic oscillations
Devices are provided for the harmonization of mechanical and electromagnetic oscillations, which include an outer body and an inner body, both having an axially symmetric shape relative to an axis (x). The inner body may be received inside a first cavity of the outer body so as to be firmly connected to the latter. The outer body and the inner body are made of, respectively, of stainless steel and copper, and may have a weight ratio equal to 3 or the number Φ. The dimensions of the device may be such that their ratios are integers, or fractions thereof, or numbers corresponding to powers of Φ and/or π.
US09177536B1 String adjustment apparatus
A string adjustment apparatus includes an outer shell, an adjustment stem member, a winding shaft member and a base. The outer shell includes a housing recess and a recess opening. The adjustment stem member includes a stem and a turning peg. The winding shaft member includes a shaft, a worm gear portion and a string hole portion. The base includes a plate corresponding to the recess opening and a first tube extended from the plate towards a direction remote from the outer shell. The worm gear portion and the stem are located in the housing recess and coupled with each other. The shaft runs through the first tube to make the string hole portion to pass through the first tube and also make the plate to cover the recess opening. Thus, a simpler structure is formed to make assembly easier.
US09177535B2 Hammer device for keyboard instrument
A hammer device for a keyboard instrument, enabling improvement of efficiency and yield, in manufacturing weights to be attached to each hammer body while suppressing an increase in manufacturing cost. Each hammer includes a hammer body having a weight mounting portion, a common weight attached to one of left and right side surfaces of the weight mounting portion, and an adjustment weight having a length set according to a touch weight required by the associated key and attached to the other of the left and right side surfaces of the weight mounting portion. A chassis has a plurality of partition parts, and on the left and right surfaces of the hammer body, there are formed left and right opposed protrusions, respectively, each of which protrudes outward of the weight and is opposed to a partition part associated therewith via a predetermined clearance.
US09177532B2 Manipulating a display window within an image and providing enhanced display features at the main image boundaries
Provided is an image display device, including: display means for displaying on a screen a partial area image indicating a given area within an image to be displayed; display area moving means for moving the given area in response to a predetermined operation performed by a user; and determination means for determining whether or not the given area is located at an end portion of the image to be displayed, in which, when the given area is located at the end portion of the image to be displayed, the display means changes a display magnification of the partial area image displayed on the screen and display the partial area image on the screen in response to the predetermined operation performed by the user (S1023, S1026).
US09177531B2 Image processing device and non-transitory computer-readable storage medium storing image processing program
When a process of rendering an image in a single frame is performed by allocating an object to be displayed as an image to any of a plurality of layers and superimposing the plurality of layers, an image processing device refers to an object database including a list of object rendering commands for each layer and dynamically changes the number of object rendering processes performed in each layer according to the number of rendering commands included in the list, at the time of rendering an image in a single frame.
US09177530B2 Handheld document reading device with auxiliary display
A method to display an electronic document includes receiving an electronic document, displaying a current page of the electronic document on a screen of a handheld device operated by a user, and displaying one or more adjacent pages of the electronic document on an external display. The method may also include changing the current page on the screen of the handheld device and the adjacent pages on the external display in response to user input. In some embodiments, the method includes pinning or unpinning one or more selected page(s) on the external display in response to user input. A corresponding apparatus, system, and computer readable medium are also disclosed herein.
US09177529B2 Method and device for determining afterimage level of display device
A method for determining the afterimage level of a display is used for solving the problem in the conventional technology that the accuracy is very low as the afterimage level of the display can only be determined by human-eye observation. The method comprises: determining a brightness variation index and an area index of an afterimage displayed by the display device after an afterimage test; and determining the afterimage level of the display device according to the determined brightness variation index and the determined area index. Because both the brightness variation index and the area index of the afterimage can be determined objectively, the means of human-eye subjective observation is not required any more and the afterimage level of the display can be determined objectively, and hence the accuracy of determining the afterimage level of the display can be improved.
US09177527B2 Multi-primary color display device
A multiple primary color display device includes a plurality of pixels located in a matrix including a plurality of rows and columns. The pixels are each formed of at least four sub pixels for displaying different primary colors, which can be sorted into n number of virtual pixels, and use each of the n number of virtual pixels as a minimum color display unit for providing display. The sub pixels which form each of the virtual pixels include a sub pixel common to another of the virtual pixels. When a line having a width corresponding to the n number of virtual pixels is displayed, two sub pixels which are located at both of two ends, in a width direction, of the line and display a certain identical primary color to each other have a luminance lower than the original luminance that the two sub pixels.
US09177526B2 Apparatus and method for setting display device, and non-transitory computer readable medium
An apparatus for setting a display device includes a target value obtainer, a measured value obtainer, and a determiner. The target value obtainer acquires a target value of a display setting including color temperature and brightness for a display device configured to display an image. The measured value obtainer acquires a measured value of display characteristics including the color temperature and the brightness in each of multiple states specific to the display device, from the display device for which the display setting is sequentially changed to the multiple states. The determiner determines a setting value in the display setting including the color temperature and the brightness from among the multiple states, on the basis of the target value and multiple measured values acquired by the measured value obtainer.
US09177524B2 Display apparatus and control method thereof
A display apparatus according to the present invention includes: a measuring unit that measures an image displayed on a screen; a first determining unit that determines a first display setting by executing a single unit calibration; a second determining unit that determines a second display setting by executing a link calibration; and a determining unit that determines, during display of an external input image, which is an image based on an image signal input from an external apparatus, whether or not an output setting of the external apparatus or the second display setting differs from a setting during display of a previous external input image. The second determining unit executes the link calibration when the determining unit determines that the output setting of the external apparatus or the second display setting differs from the setting during display of the previous external input image.
US09177523B2 Circuits for controlling display apparatus
The invention relates to methods and apparatus for forming images on a display utilizing a control matrix to control the movement of MEMs-based light modulators.
US09177521B2 Electronic device
An electronic device of the present invention includes a shift register SR provided integrally with a substrate, a first line 11 connected with a connection terminal 101 electrically connectable with an outside device provided independently of the shift registers SR, second lines 12a through 12c via which output waveforms of the shift register SR are extracted, and switching sections 13a through 13c by which the first line 11 and the second lines 12a through 12c are switched between an electrically connected condition and an electrically disconnected condition. With this, even in a case where the electronic device of the present invention is a liquid crystal display device having a driver monolithic structure, output waveforms of a drive circuit (electronic circuit) can be inspected.
US09177520B2 Display device
In a display device (1) according to an aspect of the present invention, at least part of an N-M first sub pixel(s) is/are driven according to one of first and second gamma curve groups being selected depending on a position(s) where said at least part of the N-M first sub pixel(s) is/are located, and at least part of a second sub pixel(s) is/are driven according to one of the first and second gamma curve groups being selected depending on a position(s) where said at least part of the second sub pixel(s) is/are located.
US09177519B2 Driving circuit
A driving circuit electrically coupled between a first data line and a second data line and between a first scan line and a second scan line. The driving circuit includes a first switch, a second switch, a third switch, a fourth switch, a first sub-capacitor, a second sub-capacitor, a fifth switch, a sixth switch, a first voltage dividing unit and a second voltage dividing unit. The first voltage dividing unit is coupled between a second end of the fifth switch and a reference voltage end. The second voltage dividing unit is coupled between a second end of the sixth switch and the reference voltage end, for redistributing stored electric charges.
US09177517B2 Display device and drive method therefor
A sum of the number of frames constituting a scanning period and the number of frames constituting a pause period is an even number. A polarity of a POL signal in each frame in each of the scanning period and the pause period is reversed every frame. Further, the polarity of the POL signal is reversed at a timing when switching from the scanning period to the pause period is carried out, and is maintained at a timing when switching from the pause period to the scanning period is carried out. Alternatively, the polarity of the POL signal is maintained at a timing when switching from the scanning period to the pause period is carried out, and is reversed at a timing when switching from the pause period to the scanning period is carried out.
US09177516B2 Description liquid crystal display device and pixel inspection method therefor
A liquid crystal display device includes an inspection control unit configured to alternately perform a first inspection operation in which an inspection signal is input from a first column data line connected to one pixel of the two pixels in each of the pairs into the one pixel and is read out to a second column data line connected to another pixel through the other pixel of the two pixels in each of the pairs and a second inspection operation in which an inspection signal is input from the second column data line into the other pixel and is read out to the first column data line through the one pixel, on all of the plurality of pixels in a unit of pixels in each row when the pixels being inspected.
US09177511B2 Electrophoretic display device and driving method thereof
An electrophoretic display device is provided, in which an image update period is constituted with a reset period including at least a stirring pulse for stirring electrophoretic particles and a compensation pulse for suppressing accumulation of the residual DC component and with a set period including a set pulse for applying, to intended pixels, a voltage of polarity for making transition to black or white for a prescribed amount of time according to a next image. The voltage waveforms for each display gradation are so designed that a period where a positive voltage is applied to a counter electrode and a period where a negative voltage is applied do not overlap with each other, and a compensation pulse is applied after the stirring pulse which sets all the pixels of the display unit to a white or black base state. Thereby, changes in the display state are not visually recognized.
US09177505B2 Pixel of a display panel capable of compensating differences of electrical characteristics and driving method thereof
A pixel of a display panel includes a first transistor with a first end coupled to a data line, a control end coupled to a scan line; a second transistor with a first end coupled to a first voltage source, a control end coupled to a second end of the first transistor; a third transistor with a first end coupled to a second end of the second transistor, a control end for receiving a control signal; a light emitting unit with a first end coupled to the second end of the second transistor, a second end coupled to a second voltage source; a first capacitor with a first end coupled to the second end of the first transistor, a second end coupled to a second end of the third transistor; and a second capacitor coupled between the second end of the first capacitor and the second voltage source.
US09177504B2 Image display device
To provide an image display device having a circuit for solving burning phenomenon without increasing the size of the circuit. An image display device is provided having a display unit formed using display devices, a signal line for inputting a display signal voltage to the display unit, and a display control unit for controlling the display signal voltage, the image display device comprising a detection power source, a switch for causing a current of the detection power source to flow to the display device, a detection circuit for detecting the current, and a detection information storage circuit for storing information, and compensating the display signal voltage, using the information, wherein using a first reference voltage, and current detection is carried out, the detection circuit feeds back the current detected to set a second reference voltage different from the first reference voltage, and carries out current detection.
US09177503B2 Display having integrated thermal sensors
Thermal sensors are disposed with OLEDs across a display of an electronic device to measure temperatures across the display surface. Thermal sensors may be used to create a temperature map across the display surface due to both the ambient environment and the internal environment of the electronic device. The thermal sensors may be disposed in the OLED layer, on a separate layer, or both. Thermal sensors may be disposed in a substantially 1:1 ratio with OLEDs or with zones of OLEDs. Both the temperature history and usage history for OLEDs may be recorded and processed to determine the age of each OLED. Controllers may adjust the driving strength of OLEDs or adjust the operation of components within the electronic device to compensate for aging or temperature based on the temperature map and age determination. Controllers may move static images from one part of the display to another less-aged part.
US09177501B2 Display apparatus having a bendable substrate and control method of the display apparatus
An apparatus includes a bendable substrate, light-emitting elements, a sensor, and a display controller. The display controller is configured to control the light-emitting elements at least in part based upon a bending of the substrate, which is detected by the sensor.
US09177494B2 Flag stabilizer
This stabilizer is a simple counterbalanced horizontal member that attached to a flag and is hoisted and lowered like a regular flag requiring no modifications to any external component, such as the flagpole. The flag remains fully unfurled and extended regardless of wind conditions, including indoors. It is simple to set up and use.
US09177493B2 Image display panel, image display panel installation equipment, and manufacturing method for image display panel
Provided is an image display panel, image display panel installation equipment, and a manufacturing method for an image display panel, which display an image by using reflective light and realize a high reproducibility of a base image with a simple method. An image is displayed by a plate-like body processed through carving work. The plate-like body has a main portion made of a metal reflecting light and a surface layer portion made of a material absorbing light more than the main portion. The carving work forms linear V-shaped grooves on the front surface side of the plate-like body such that each minute section includes a plurality of grooves. Shading of the image is expressed by the depths of the V-shaped grooves. The image is displayed by light absorption on the surface layer portion and light reflection on the V-shaped grooves.
US09177487B2 Digital map position information transfer method
It is an object of the invention to provide a method of transmitting position information of a digital map which can enhance matching precision on a receiving side.The invention provides a method of transmitting position information of a digital map in which a transmitting side transmits a vector shape on the digital map and a receiving side specifies the vector shape on a self-digital map by map matching, wherein the transmitting side selects a portion in which a plurality of candidate points are generated with difficulty during the map matching as an endpoint of the vector shape and transmits the vector shape having the endpoint in the portion to the receiving side. Mismatching on the receiving side can be prevented and the position information on the digital map can be transmitted accurately.
US09177483B2 Guiding method for aircraft docking process
A guiding method for aircraft docking process, which is used to detect an aircraft when docking to a stop line along a J-line on apron, includes steps as followed. According to response distances of different positions from a laser scanner, a distance between the aircraft and the stop line and offset angle during the docking process are detected. To show the distance and offset angle on a data display panel as guiding reference when a pilot of the aircraft operates the aircraft. The guiding method further has a waiting stage, a positioning stage, and a distinguishing stage and a guiding stage.
US09177476B2 Method and system for guiding a person to a location
Method and system for guiding a person to a location includes providing a processor, coupling an operator control such as a user interface to the processor to enable the person to enter a phone number which is provided to the processor, the processor being arranged to determine a physical location associated with the entered phone number, and guiding the person to the physical location associated with the entered phone number as determined by the processor. The method may be implemented in a vehicle context whereby the processor is arranged on a vehicle and the person is guided to the physical location by controlling a steering system, a throttle and/or brakes of the vehicle to automatically guide the vehicle to the physical location. Alternatively, the person may be guided to the physical location by providing audible and/or visual directions to the person operating the vehicle.
US09177474B2 Vehicle navigation system and method
Methods and systems are provided for a vehicle. A determination is made as to whether the vehicle requires a service. A determination is also made as to whether the vehicle is proximate a location at which the service can be performed. A notification is provided that the vehicle requires the service and is proximate the location.
US09177468B2 Ultrasonic transmission / reception for electromagnetic transmission reception
First apparatuses (10) such as tags and batches comprise receivers (11) for receiving ultrasonic signals (1) comprising first codes from sources (27, 30), analyzers (12) for analyzing first codes, transmitters (13) for transmitting electromagnetic signals (2) comprising second codes to second apparatuses (20), and controllers (14) for, in response to analysis of first codes, controlling at least parts of the first apparatuses (10), such as modes, transmissions, and supplies of second codes. Second apparatuses (20) such as parts of interfaces and parts of stations comprise receivers (21) for receiving the electromagnetic signals (2) comprising second codes from the first apparatuses (10), analyzers (22) for analyzing second codes, and generators (23) for, in response to analysis of second codes, generating parameter signals (5) defining issues like registration issues and authorization issues and environmental issues, and analysis results. The first apparatuses (10) may form part of first devices (100) such as mobile phones and organizers, and the second apparatuses (20) may form part of second devices (200) such as interfaces and stations.
US09177467B2 Electrical gateway and communication method of electrical gateway
An electrical gateway and a communication method of the electrical gateway are disclosed. The electrical gateway includes: an uplink communication module, a downlink communication module and a control unit; the uplink communication module is configured to communicate with an uplink network element; the downlink communication module is configured to communicate with a terminal device; and the control unit, connecting the uplink communication module and the downlink communication module, is configured to, when it is determined that downlink data sent by the uplink network element is obtaining terminal device information, transmit the terminal device information to the uplink communication module if the terminal device information is stored in the electrical gateway, and transmit the obtaining the terminal device information to the downlink communication module if the terminal device information is not stored in the electrical gateway. Therefore, data communication is achieved.
US09177464B2 Method and system for untethered two-way voice communication for an alarm system
An alarm system can provide security, fire, protection, or other alarm services for a premises, such as for a building or other property. When the alarm system detects an alarm condition, such as an intrusion or a fire, a two-way voice channel can be opened between the premises and a remote entity. Via the two-way voice channel, an operator at a central monitoring station can verbally communicate with someone at the premises, for example. A person associated with the alarm system may own a mobile communication device, such as a smartphone or other handheld cellular device. If the mobile communication device located is at the premises, the two-way voice channel can be established between the remote entity and the mobile communication device. Location of the mobile communication device can be determined based on GPS, service provider tracking, or user entry, for example.
US09177463B2 Alarm system with smart sensors
An alarm system for monitoring portable articles comprises a smart sensor for operatively engaging a portable article. The smart sensor includes an actuator having a secured state and an unsecured state relative to the portable article. A memory stores a sensor address. A controller has a sensor bus operatively connected to the smart sensor. The controller includes a memory storing sensor addresses. The controller is operative to periodically communicate with the smart sensor to determine state of the sensor and to read the sensor address. The controller generates an alarm when the smart sensor is in the unsecured state or if the sensor address read from the smart sensor is not stored in the memory.
US09177460B2 Pressure detection system for a pressure cooker indicating use-related wear
The invention describes a pressure detection system for a pressure cooker, having a sensor (17) for detecting a pressure prevailing inside the pressure cooker by means of measured values, a computer unit (16) connected to the sensor (17), and a display (3, 4), wherein the computer unit (16) is designed to evaluate the measured values supplied by the sensor (17) and to establish whether at least one first threshold value (S1) has been reached. In order to indicate use-related wear, the computer unit (16) is further designed to continue a counter when the measured value reaches the first threshold value (S1) and to output a notification on the display (3, 4) when a predefined value of the counter is reached.
US09177454B2 Hard cover product with concealed printed security device
A hard cover product with a pair of cover boards attached to an outer liner in spaced-relation to define a spine, with a thin-film ink-circuit security device printed on a laydown area, and having an inner liner. The laydown area can be defined in the spine, and the inner liner or an inner body attached to the cover boards conceals the printed security device from casual observation of its presence. The laydown area can be defined on a surface of a sheet laminated to another sheet to define one of cover boards. The laminated sheets sandwich the printed security device without a surface indication of the presence of the ink-circuit printed security device therein. In another aspect, the thin-film ink-circuit security device printed on a surface of the cover board is concealingly covered by the inner or the outer liner.
US09177453B2 System including a portable storage device equipped with a user proximity detector and method of preventing the loss thereof
A portable storage system. The portable storage system comprises a portable storage device having a flash memory element and a loss-prevention unit. The portable storage system further comprises Master and Slave proximity elements. One of the proximity elements is physically connected with the portable storage device, while the other is physically connected with the loss-prevention unit. The Master proximity element is configured to wirelessly determine the presence of the Slave proximity element within a predefined range.
US09177452B1 User interface for a modeling environment
A computer-implemented modeling system comprising a storage medium, an interface, an output device, and a processor. The storage medium to store executable instructions for providing a modeling environment using the system, the modeling environment supporting model development. The interface to receive an input instruction and create an executable instruction, where the user interaction represents the input instruction and instructs the modeling environment to perform one or more of: an analyzing operation, an editing operation, or a navigating operation. The output device to output at least one of: a tactile output representing tactile feedback, or a haptic output representing haptic feedback; and a processor to execute the executable instructions to provide the modeling environment, process the executable instruction using the modeling environment, and generate an output instruction, where the output instruction is used by an output device for generating the tactile output or the haptic output.
US09177447B2 Gaming system and method for providing a symbol matrix with a moveable symbol display window
In various embodiments, the present disclosure generally relates to gaming systems and methods which utilize a symbol matrix or symbol field in conjunction with a movable symbol display window to randomly select different subsets of symbols from the symbol matrix and provide different awards to players based on such selected symbol subsets.
US09177442B2 Gaming device and method providing relatively large awards with variable player participation levels
A number matching game which includes a matching game with multiple number sets. A player can win standard Keno paytable awards in addition to relatively large awards. A player's initial set has a minimum size requirement for the player to be eligible for the relatively large award. The gaming machine provides supplemental numbers to the player if the player does not select the minimum quantity of numbers. Any supplemental numbers created for the player cannot be used towards the Keno paytable awards. In one embodiment, odds of winning the relatively large awards are kept proportionate with the player's wager level.
US09177441B2 Wagering game with color-coordinated progressive award indicators
A gaming machine for conducting wagering games comprises a plurality of reels, each reel having one or more reel symbols with a colored background and one or more reel symbols with a white background. The gaming machine may include a progressive game having multiple progressive jackpots that are awarded based on patterns formed by the reel symbols with the colored background in the outcomes of the wagering game. In some embodiments, a video display device is provided for overlaying a video image on the reels. The video image operates as a colored placeholder to hold any partial patterns that were formed by the reel symbols having the colored background for multiple plays of the wagering game. Reel symbols having the colored background appearing in subsequent outcomes of the wagering game may then be used to complete one or more patterns.
US09177440B2 Gaming system and method providing one or more incentives to delay expected termination of a gaming session
Various embodiments of the present disclosure provide a gaming system and method providing one or more incentives to delay termination of a gaming session. In general, for a player, the gaming system utilizes gaming session data collected from the player's previous gaming sessions to determine one or more termination causation events for the player. When a designated number of the termination causation events occur during a current gaming session of the player, the gaming system provides an incentive to the player, wherein the incentive is configured to cause the player to delay expected termination of the player's current gaming session. In certain embodiments, the gaming system optimizes an incentive available to be provided to a player based on the effectiveness of prior incentives provided to the player.
US09177439B2 Service controller for servicing wagering game machines
Methods and apparatus for servicing wagering game machines are described herein. In one embodiment, the method includes receiving, over a wagering game network, service information originating from a wagering game machine, wherein the wagering game machine is configured to receive a wager associated with a wagering game. The method can also include, based on the service information and a service plan associated with the wagering game machine, determining a service action. The method can also include performing the service action.
US09177436B2 Method and apparatus for modifying gaming machines to provide supplemental or modified functionality
An apparatus and method for modifying the functionality of a legacy gaming device is disclosed. The apparatus uses a second processor communicatively coupled between a legacy display and audio device to modify interrupted display and audio signals and provide substitute signals to provide the modified functionality of the gaming device.
US09177435B2 Regulated hybrid gaming system
Systems of detecting unauthorized operation of a hybrid game are disclosed, including a plurality of hybrid games, each of the hybrid games constructed to: communicate, to a regulatory scanning and screening audit (RSSA) module, first and second game operating performance data (GOPD); and the RSSA module connected to the plurality of hybrid games via a communication link, the RSSA module constructed to: receive GOPD while the plurality of hybrid games are being played by a plurality of players, the GOPD comprising credit information accrued by the plurality of players; generate a reference profile using the GOPD; determining whether the second player is operating the hybrid game in an unauthorized manner; and generating a notification to an operator of the hybrid game upon determination that the second player is operating the hybrid game in an unauthorized manner.
US09177434B2 Systems and methods for map-based lottery games
Systems and methods for map-based lottery games are disclosed. According to one particular embodiment, a method for a map-based lottery game may comprise: establishing a game having a gameboard based on a map that includes a plurality of units; receiving from each of a plurality of players a selection of at least one available unit on the gameboard; uniquely associating each said player with the selected at least one unit such that each unit on the gameboard is associated with no more than one of the plurality of players; and conducting a lottery drawing to select at least one first unit from some or all of the plurality of units such that any player associated with said at least one first unit becomes a first winner of a prize.
US09177433B2 Moire magnification device
A moiré magnification device includes a transparent substrate, the transparent substrate carrying a regular array of micro-focusing elements on a first surface, where the focusing elements define a focal plane, and a corresponding array of microimage element unit cells located in a plane substantially coincident with the focal plane of the focusing elements, where each unit cell includes at least two microimage components. The pitches of the micro-focusing elements and the array of microimage element unit cells and their relative locations are such that the array of micro-focusing elements cooperates with the array of microimage element unit cells to generate magnified versions of the microimage components due to the moiré effect.
US09177430B2 Moveable barrier operator translation system and method
A system includes a translator device that is configured to receive, using a pre-programmed native mode of operation, a first barrier actuation code transmitted by a transmitter according to a first code format. The translator device then analyzes the first barrier actuation code and verifies that it is a valid code. When a valid code, the translator device saves the information contained in the code, and creates a second barrier actuation code at least in part from information contained in the first actuation code and transmits the second barrier actuation code according to the second code format, which is different from the first code format. A barrier operator is coupled to the translator device and a barrier. The barrier operator has a receiver apparatus and the receiver apparatus receives the second barrier actuation code. The barrier operator determines whether the second barrier actuation code is valid, and when the barrier actuation code is determined to be valid, actuates the barrier.
US09177424B2 Franking machine and method for servicing thereof
A franking machine has an ink jet printing device with exchangeable ink cartridges. The lower housing shell of a security housing of the franking machine has a sealable, shaft-shaped opening in the base and is designed to accommodate assemblies that can be contaminated with ink. These assemblies are situated in a non-secure region of the franking machine and are accessible via the aforementioned opening when a cover of the shaft-shaped opening is opened. A servicing procedure allows the franking machine to be retrofitted to print with a different ink color. After moving the print carriage in one direction and opening a cartridge flap, the ink cartridges can be removed. A displacement of the print carriage takes place after closing the cartridge flap, wherein the print carriage is moved in the opposite direction so that the print carriage arrives in the sealing position for ink cartridges. A box-shaped mod can now be removed from the franking machine. Servicing of the ink-contaminated modules subsequently takes place via the aforementioned opening.
US09177423B2 Data processing method for transforming a first 3D surface suitable for coating a first object into a second 3D surface suitable for coating a second object, and associated computer program and processing device
Processing method for transforming a first surface into a second surface, according to which: a/ in a (k+1)th iteration step, for each couple comprising a first elementary surface and a second elementary surface transformed from the first elementary surface in iteration k, the projection of the second elementary surface on the plane of the first elementary surface is determined and a matrix (A) is defined for said couple, where (A)=pkt,(pt)−1 and pt=[pn+1−pi]i=1 to n, pkt,=[p′n+1,k−p′i,k]i=1 to n; b/ the second elementary surfaces obtained for the (k+1)th iteration are determined as those minimizing a function including at least the term Eshape—k+1=(B). T k + 1 t ( A ) ∑ t ~ k + 1 ∈ S ⁢  P ~ k + 1 ′ ⁡ ( P ′ ) - 1 - T k + 1 ′  2 ( B )
US09177422B2 Method for generating regular elements in a computer-aided design drawing
The process of generating regular elements in a CAD drawing is accelerated by providing a CAD designer with graphical user interface (GUI) tools to generate regular elements for a CAD drawing interactively, dynamically, and in real-time. The GUI tools allow the CAD designer to preview the regular elements that he or she will be adding to the CAD drawing and modify the number of regular elements to be added interactively and in real-time.
US09177420B2 Intuitive shape control for boundary patches
A method and system for computer aided design (CAD) is disclosed for intuitive shape control of boundary patch. A boundary patch is also known as n-sided patch which is defined by a number of input curves/edges. Continuity constraints (G0, G1 and G2) can be specified individually for the input curves. Boundary patch is primarily used to cover a relatively flat area where other modeling operators such as loft, sweep or fillet cannot apply due to irregular shape of the area. The present invention provides a technique to directly manipulate boundary tangent magnitude of a patch and allows the user to deform the patch shape in a very intuitive way. Thus, the present invention is especially useful for industrial design applications.
US09177418B1 System and method for converting computer aided design data into a three dimensional model
A system and method for converting data generated in a computer aided design software component to an alternate, smaller format usable by a variety of alternate software components is provided. CAD data from a project having a plurality of objects is provided. Objects are identified and grouped into object data layers for processing, conversion and 3D model generation. The selected, grouped objects are processed by removing unnecessary data and redundancies, converted to an alternate format, transported to the alternate software component and regenerated by the alternate software component in its own environment.
US09177417B2 Variable-depth stereotactic surface projections
An implementation of SSP using variable depth for the vectors extending normal to the surface voxels of the brain so as to avoid white matter uptake extraction is provided. The implementation also provides the possibility to compare SSP for an individual amyloid imaging agent image to a SSP normal database and allows for 3D visualization of SSP information.
US09177413B2 Unique primitive identifier generation
A system, method, and computer program product are provided for generating unique primitive identifiers. A specified scope and geometry for a scene is received. A primitive identifier is generated for each primitive of a particular type, where each of the primitive identifiers is unique within the specified scope, and where the primitives are generated as the geometry for the 3D graphics scene is processed by a graphics processing unit. Different types may include patches, triangles, and vertices. The specified scope may be one of a frame, region, pixel, or draw call.
US09177411B2 Display apparatus and display method thereof
A display apparatus includes a display panel which includes a plurality of sub pixels each outputting a sub pixel value of R, G, or B, a renderer which renders a multi-view image to be outputted by the display, and a controller which determines a rendering pitch according to a viewing distance of a user, and controls the renderer so that each of at least some of the plurality of sub pixels outputs a combined sub pixel value corresponding to a combination of sub pixel values corresponding to each of the plurality of views of the multi-view image according to the determined rendering pitch.
US09177407B2 Method and system for assembling animated media based on keyword and string input
One aspect of the invention is a method for automatically assembling an animation. According to this embodiment, the method includes accepting at least one input keyword relating to a subject for the animation and accessing a set of templates. In this embodiment, each template generates a different type of output, and each template includes components for display time, screen location, and animation parameters. The method also includes retrieving data from a plurality of websites or data collections using an electronic search based on the at least one input keyword and the templates, determining which retrieved data to assemble into the set of templates, coordinating assembly of data-populated templates to form the animation, and returning the animation for playback by a user.
US09177405B2 Image processing apparatus, computer program product, and image processing system
An image processing apparatus includes a selecting unit that selects a plurality of strokes from among strokes drawn in a plurality of display images displayed in a switching manner, in accordance with attributes added to the strokes, and a generating unit that generates an image in which the selected strokes are arranged according to an arrangement rule set in advance.
US09177395B2 Display device and display method for providing image display in first color mode and second color mode
A display device has a first color mode in which an image is output in monochrome except for a designated color and a second color mode in which colors in an image are output in non monochrome. The display device includes a display unit operable to output a display, and a display controller operable to control the display output on the display unit. While a selecting operation by a user on an image is urged, the display controller displays an image on the display unit in the second color mode, and after completion of the selecting operation by the user, the display controller changes a color mode from the second color mode to the first color mode and then displays an image on the display unit in the first color mode.
US09177392B2 Image processing apparatus and image processing method
The present technique relates to an image processing apparatus and an image processing method which allow the encoding efficiency to be improved. The image processing apparatus includes: a determination unit which determines whether neighboring motion information is available or unavailable, the neighboring motion information being motion information of a neighboring region located around a current region and being used to encode motion information of the current region to be processed; and an encoding unit which encodes the motion information of the current region by using available motion information of another neighboring region in place of the motion information of the neighboring region determined by the determination unit to be unavailable. The present disclosure can be applied to an image processing apparatus.
US09177391B1 Image-based color palette generation
Systems and methods are provided for generating an image-based color palette based on a color image. A color palette can be a collection of representative colors each associated with a weight or other metadata. A color palette may be generated based on palette generation criteria, which may facilitate or control a palette generation process. Illustratively, the palette generation process may include image pre-processing, color distribution generation, representative color identification, palette candidate generation and palette determination. Representative colors with associated weight can be identified from a distribution of colors depicted by the color image, multiple palette candidates corresponding to the same color image can be generated based on various palette generation criteria, and a color palette can be identified therefrom.
US09177388B2 Method, system and apparatus for determining a hash code representing a portion of an image
A method of determining a hash code representing a portion of an image, is disclosed. A Delaunay region (e.g., 450) enclosing an image feature point (e.g., 210) representing at least the portion of the image is determined. The Delaunay region is determined from A* lattice points. A mapping transforming the Delaunay region to a predetermined canonical form is determined A point of the Delaunay region is received. The received point defines a plane containing the A* lattice points of the Delaunay region excluding the received point. A normal of the plane is determined by setting at least two co-ordinates of the normal to predetermined non-zero values, the two co-ordinates being selected according to the determined mapping. The hash code representing a portion of the image is determined according to a distance determined using the normal.
US09177387B2 Method and apparatus for real time motion capture
Methods for real time motion capture for control of a video game character is provided. In one embodiment, a method initiates with defining a model of a control object. Then, a location of a marker on the model is identified. Next, movement associated with the control object is captured. Then, the movement associated with the control object is interpreted to change a position of the model. Next, movement of the character being presented on the display screen is controlled according to the change of position of the model. A computer readable media and a processing system enabling control of video character through real time motion capture are also provided.
US09177386B2 Image processing apparatus, image processing method, and program
There are provided an apparatus and a method for executing calculation of a global motion vector (GMV) with a high degree of reliability. Local motion vectors (LMV) corresponding to blocks and block weights as reliability indicators of the LMVs of the respective blocks are calculated, and the global motion vector (GMV) is calculated on the basis of the block weights. By calculating a degree of reliability of the local motion vector (LMV) corresponding to each block of a target block and near-field blocks adjacent to the target block and a degree of similarity between the local motion vectors (LMV) of the target block and each near-field block, the block weight is calculated through arithmetic processing to which the degree of reliability and the degree of similarity are applied. With the present configuration, it is possible to efficiently calculate the global motion vector (GMV) with a high degree of reliability.
US09177385B2 Object counter and method for counting objects
An object counter performs a method for estimating the number of objects crossing a counting boundary. The method comprising: capturing, during a time period, a plurality of images representing moving images; registering, from the captured images, motion region areas passing across the counting boundary; calculating the integral of the registered motion region areas for forming a resulting total motion region area; and estimating the number of objects that have crossed the counting boundary by dividing the resulting total motion region area by a reference area.
US09177384B2 Sequential rolling bundle adjustment
A method for estimating position and orientation of an image-capturing device is proposed. The method comprises the step of obtaining a preceding set of frames by using the image-capturing device. Each frame includes a set of image data. The method of the present technology further comprises the step of estimating a previous position and orientation of the image-capturing device by using the set of image data included in at least one preceding frame, and the step of estimating a current position and orientation of the image-capturing device by replacing a set of image data included in at least one preceding frame by a set of image data included in at least one subsequent frame. At least one subsequent frame is obtained by using the image-capturing device.
US09177383B2 Facial detection
In one aspect, there is disclosed a digital signal processor and method performed by the same for performing object detection, including facial detection, in a reduced number of clock cycles. The method comprises using Sobel edge detection to identify regions with many edges, and classifying those regions as foreground candidates. Foreground candidates are further checked for vertical or horizontal symmetry, and symmetrical windows are classified as face candidates. Viola-Jones type facial detection is then performed only on those windows identified as face candidates.
US09177381B2 Depth estimate determination, systems and methods
Systems and methods for generating pixel based depth estimates are disclosed. An image processing system operating as depth analysis engine generates an estimated depth associated with a pixel based on a reference image and other related images. A current depth estimate is refined based on neighboring pixels and calculated consistency scores. Further, depth estimates can be levered in object or scene recognition to trigger or initiate an action taken by a computing device.
US09177379B1 Method and system for identifying anomalies in medical images
Method and sequence for locating anomalous features in medical images in which medical images are supplied by an external source such as a CAT or XRAY scan machine or other similar device. A sequence of specific measurements is executed on the supplied data to obtain metrics relating to the images. The metrics are then compared to the corresponding values in an accompanying database resulting in an anomalous/not anomalous determination. Anomalous determinations are presented to the test operator for final analysis along with supplemental historical data. In application to all types of medical imagery, potential anomalies are quickly located resulting in an efficient and more accurate diagnosis.
US09177377B2 Optimized detector readout for biosensor
The present invention provides a biosensor system comprising a light source, a cartridge adapted to be illuminated by said light source, a light detector adapted for detecting a signal originating from the cartridge, an illumination control means adapted to vary the illumination of the cartridge between at least two different states, a means for generating a first oscillation with a first frequency, and a means for generating a second oscillation with a second frequency, wherein the frame rate of the light detector is triggered by the first oscillation and the illumination control means is triggered by the second oscillation.
US09177374B2 Model-based processing of image data
An imaging system for processing image data of an object containing a component. The imaging system includes an imaging device arranged to obtain image data and a processor. The processor is adapted to receive the image data from the imaging device, obtain a component model for the component, obtain an imaging device model for the imaging device, construct an unconstrained objective function based on the component model and the imaging device model, and construct a model of the object containing the component based on the unconstrained objective function and the image data, and a display device adapted to display an image for the object containing the component based on the model.
US09177371B2 Non-destructive examination data visualization and analysis
Interactive virtual inspection of modeled objects is provided. A graphic user interface facilitates interaction between a Data Visualization and Analysis application and the inspector. The Data Visualization and Analysis application acquires non-destructive examination data that is collected with reference to an industrial component under evaluation. The acquired non-destructive examination data is transformed into a visualization defined by a volumetric representation that is rendered on at least one display device as at least one view representative of the component under evaluation. The inspector may navigate the volumetric representation to investigate the integrity of the industrial component including non-surface conditions thereof.
US09177368B2 Image distortion correction
Methods and systems for reducing or eliminating distortion in an image are described. The approach generally involves determining the distortion introduced by a lens, and modifying a captured image to reduce that distortion. In one embodiment, the distortion information associated with a lens is determined. The distortion information is stored. A captured image taken by that lens is processed, with reference to the distortion information.
US09177366B2 Edge-preserving noise filtering
The invention relates to an image processing apparatus (1) comprising an image providing unit (2) for providing a first image of an object and a second image of the same object and a filtering unit (3) which filters the first image depending on a first degree of similarity between image values of the first image and on a second degree of similarity between image values of the second image. This allows filtering the first image depending on the likeliness that image values belong to the same part of the object, for example, to tissue or to bone material of the object, if the object is a human being or an animal, even if due to noise the image values of one of the first image and the second image are disturbed, thereby improving, for example, an edge preserving property of the filtering procedure.
US09177362B2 Systems and methods for transforming an image
Systems, methods, and computer-readable media acquire an image captured with a mobile device. Motion sensor data of the mobile device at or near a time when the image was captured is acquired. An angle of rotation is computed based on the motion sensor data, and the image is transformed based on the angle of rotation. In another aspect, a user interface enables user control over image transformation. The user interface enables user control over rotating an image on a display at two or more granularities. A point of rotation may be user-defined. Rotated images may be scaled to fit within a viewing frame for displaying the transformed image.
US09177361B2 Systems, methods and devices for rotating image tiles using line segment read buffers
An embodiment generally relates to a device for rotating image tiles using line segment read buffers. The device comprises an image memory configured to store an image and a plurality of buffers, wherein the image comprises a plurality of tiles. The plurality of buffers comprises line segment read buffers configured to interface with the image memory to read line segments of the plurality of tiles from the image memory. A rotator logic module is configured to micro-rotate the line segments, aggregate the line segments as rotated tiles, and macro-rotate the rotated tiles to determine an address of the image memory at which to write the rotated tiles. Write buffers are configured to write the rotated tiles to the image memory at the determined address.
US09177360B2 Automatic image orientation and straightening through image analysis
Systems, methods, and computer readable media for adjusting the orientation of an image frame and a scene depicted in the image frame are described. In general, techniques are disclosed for analyzing an image with one or more feature detectors to identify features in the image. An alignment or position associated with one or more features identified in the image may be used to determine a proper orientation for the image frame. The image can then be rotated to the proper orientation. It may also be determined if a scene depicted in the image is properly aligned in the rotated image orientation. If not, alignment information associated with the identified features may be utilized to straighten the depicted scene.
US09177357B2 Method for creating coefficient table and image scaling processor
An image scaling processor includes a coefficient table storing interpolation coefficients, a multiplier that multiplies each of pieces of pixel data constituting input image data and each of the interpolation coefficients stored in the coefficient table, an adder that repeatedly adds pieces of multiplied data output from the multiplier and obtains a total sum of the pieces of multiplied data for a predetermined number of the pieces of pixel data, a selector that outputs a total sum of the pieces of multiplied data at a timing at which the total sum of the pieces of multiplied data is obtained for the predetermined number of the pieces of pixel data, and a shift circuit that shifts an output of the selector to adjust a bit count of the output image data to a bit count of the input image data.
US09177356B2 Digital image transitions
Among other things, methods, systems and computer program products are disclosed for displaying a sequence of multiple images to provide an appearance of a three-dimensional (3D) effect. A data processing device or system can identify multiple images to be displayed. The data processing device or system can divide a two-dimensional (2D) display area into multiple display portions. The data processing device or system can display a sequence of the identified images on the display portions so as to provide an appearance of a three-dimensional (3D) effect.
US09177355B1 Rendering adjustments to autocompensate for users with ocular abnormalities
A linear algebraic transform is established that adjusts images to be rendered by a computing device to the human from a default rendering for the baseline normal visual acuity to an adjusted rendering for the deviated visual acuity. Before visually presenting the images to be rendered by the computing device the linear algebraic transform is applied, which results in the adjusted rendering of the images. The images of the adjusted rendering are visually presented after the linear algebraic transform has been applied. The human, with myopia, hyperopia, or both, is able to perceive the images of the adjusted rendering without using the one or more corrective lenses. The perceived images are perceived with approximately a baseline normal visual acuity for the human population.
US09177354B2 Rendering apparatus, rendering method, and computer product
A rendering apparatus acquires graphic information of a figure to be rendered in a rendering area; specifies for each division area of the rendering area, graphic information of a figure to be rendered in the division area; calculates based on data size of the specified graphic information and for each division area, total data size of graphic information of the figure to be rendered in the division area; selects a division area as a rendering destination, based on each calculated total data size and a data capacity of a memory area to which graphic information is to be stored that is among the acquired graphic information and for the figure to be rendered; writes to the memory area, the graphic information of the figure to be rendered in the selected division area; and generates based on the written graphic information, an image for the selected division area.
US09177351B2 Multi-primitive graphics rendering pipeline
This disclosure describes techniques for rendering a plurality of primitives that includes at least two different types of primitives during the execution of a single draw call command. This disclosure also describes techniques for rendering a plurality of primitives using tessellation domains of different tessellation domain types during the execution of a single draw call command. The techniques of this disclosure may, in some examples, reduce the complexity and processing overhead for user applications, reduce the number of times that the rendering state of the graphics rendering pipeline needs to be switched during the drawing of a graphics scene, and/or reduce the number of times that shader programs need to be reloaded into different processing stages of a graphics pipeline during the rendering of a graphics scene.
US09177337B2 Methods and systems for providing a customized network
A method, system, and computer-readable medium for providing a secure computer network for the real time transfer of data are provided. The data is grouped and stored as per user preferences. The data being transmitted is encrypted, decrypted, and validated by the system (assuming user identifications/passwords are verified).
US09177336B2 Apparatuses and methods for recommending a path through an information space
A recommendation apparatus for determining, for a user, a set of one or more recommended paths through an information space in response to receiving from the user a path request message. Advantageously, in some embodiments, the path recommender apparatus determines a recommended path by analyzing a set of paths, where each path in the set was traversed by a person who is in a “social graph” belonging to the user (e.g., each path in the set was traversed by one of the user's Facebook friends). In this way, paths can be recommended to the user based on paths that are popular with the user's friends.
US09177335B1 Systems and methods to bypass online advertisement blockers
Some embodiments provide an adblocking bypass system for ensuring that advertisements are loaded and presented on a user device running one or more adblockers. The adblocking bypass system is comprised of a bypass loader and a bypass proxy. The bypass loader is a component that is embedded within content publisher content. When the content publisher content is downloaded and parsed by a user device, the bypass loader executes by detecting the presence of any adblocker on the user device. If found, the bypass loader forwards any blocked advertisement calls to the bypass proxy. The bypass proxy retrieves the requested advertisements and returns them to the bypass loader which then reintroduces the advertisements in final content presentation or rendering. The bypass proxy may also modify the content publisher content by replacing any blocked advertisement calls embedded within the content with calls to the bypass proxy.
US09177333B2 Ad copy quality detection and scoring
Methods, systems, and computer-readable media for evaluating the quality of text within online advertisements using output from a language model are provided. The output from the language model may be used by a machine-learning algorithm to generate a quality score for an individual advertisement. The quality score may be used to filter out advertisements with poor text quality or to tax or penalize an advertisement within an online auction. The ad quality scores may also be used to rank or score advertisers that submit the ads. In one embodiment, the advertiser's quality score is combined with an individual ad's quality score to create a final score, which is used to evaluate the advertisement. The advertiser rank/score and ad quality score may be communicated to an advertiser as advertiser feedback.
US09177329B2 Retargeting in a search environment
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for retargeting content in a search environment. In one aspect, a method includes receiving a request for a content item to be provided with a search results page and determining that one or more retargeted content items are eligible for presentation with the search results page. Each of the retargeted content items is a content item that is eligible for presentation with the search results page based on: (1) the search query matching a targeting keyword for the retargeted content item, and (2) the user identifier matching a retargeted identifier that is included in a retargeting set for the retargeted content item. A responsive content item to be presented with the search results page is selected, based at least in part on bids that are associated with the retargeted content items, and data specifying the responsive content item are provided.
US09177327B2 Sequential engine that computes user and offer matching into micro-segments
User data and a plurality of micro-segment definitions are received. Each micro-segment definition in the plurality of micro-segment definitions corresponds to one or more offers in an offer provider campaign. Further, a micro-segment parser parses each micro-segment definition from the plurality of micro-segment definitions into a plurality of parsed expression segments that indicate a plurality of micro-segment condition rules. In addition, a compiler compiles the plurality of parsed expression segments into an executable object that indicates a plurality of instructions to determine if the user data matches the plurality of micro-segment definitions. Each micro-segment definition is also serially processed, with a sequential evaluation engine, to apply the plurality of micro-segment condition rules to the user data to determine a match of a user belonging to a micro-segment. Further, the sequential evaluation engine assigns a score to indicate the strength of each match. In addition, the process ranks, with the sequential evaluation engine, each match according to the score for each match.
US09177324B2 Methods and systems for analyzing internet-based communication sessions through state-machine progression
A method of analyzing Internet-based communication sessions may include detecting interactions during a communication session and detecting an associated characteristic. The method may also include identifying other communication sessions that are also associated with the characteristic and accessing a group profile of the other communications sessions. The group profile may be assigned a first group profile state in a state-machine-based progression of group profile states and have a group lead score. The method may additionally include associating the communication session with the group profile, adjusting the group lead score based on the communication session to cross a threshold value, and moving to a second group profile state. The method may further include authorizing devices associated with the group profile access to additional data after moving to the second group profile state.
US09177320B2 System and method for intelligent information gathering and analysis
A system and method for intelligent information gathering and analysis. Information is gathered from a plurality of open sources such as markets, investigations, government databases, internet intelligence, and public records. The gathered information is parsed and linked based on marketplace activities including threats. The parsed and linked information is sent to a database where queries can be applied to produce dossiers on entities. A client may add his own information to enrich a dossier and reports may be made based on the dossiers. Alerts may be generated when certain predefined conditions are met. These alerts can be used to drive various actions.
US09177318B2 Method and apparatus for customizing conversation agents based on user characteristics using a relevance score for automatic statements, and a response prediction function
A conversation-simulating system facilitates simulating an intelligent conversation with a human user. During operation, the system can receive a user-statement from the user during a simulated conversation, and generates a set of automatic-statements that each responds to the user-statement. The system then determines a set of behavior-characteristics for the user, and computes relevance scores for the automatic-statements based on the behavior-characteristics. Each relevance score indicates an outcome quality that the user is likely to perceive for the automatic-statement as a response to the user-statement. The system selects an automatic-statement that has a highest relevance score from the set of automatic-statements, and provides the selected automatic-statement to the user.
US09177317B2 System and method for consumer protection
A method for combating website spoofing can be used in connection with a website for a financial institution accessible by a plurality of users. Registration information is stored for a user having a financial account with the financial institution, including user login information and customization information for a website associated with the financial institution. A marker is issued, to be stored on a computer used by the user to access the website. At some point, a request is received from the user to display a webpage of the website on the computer, and the user is recognized based on the marker. A webpage is then provided to the computer, having an interface with an attribute customized according to the customization information. The user login information is entered via the website. Upon receiving the user login information, the user is provided access to the financial account.
US09177314B2 Method of making secure electronic payments using communications devices and biometric data
Methods and systems for carrying out financial transactions include creating unique aliases for payment instrument having associated identification numbers, associating the created aliases to the payment instruments and enabling consumer use of the aliases to carry out financial transactions. Various special point-of-sale devices may be employed to carry out the financial transactions.
US09177313B1 System and method for issuing, circulating and trading financial instruments with smart features
A system and method for issuing, circulating and trading financial instruments with smart features is disclosed. In one particular exemplary embodiment, a financial instrument having smart features may comprise a document portion and a token device attached to or embedded in the document portion. The token device may comprise a storage device and a communication interface, wherein the token device is configured to provide a unique address for the financial instrument, the unique address including a device identifier that matches at least in part the document portion and a network address that changes based on a network location of the financial instrument and to communicate securely with an external entity at least to report an identity or a status of the financial instrument.
US09177310B2 Mobile device and application for remote deposit of check images received from payors
A check image generator application generates a remote deposit capture RDC compatible check image. The RDC compatible check image is sent from a sender mobile device to a recipient mobile device. The RDC compatible check image may pass through a server and may be encrypted. The recipient mobile device receives the RDC compatible check image and forwards it to a financial institution for deposit.
US09177307B2 Wearable financial indicator
A wearable article, such as but not limited to a watch, wristband, or ring, is configured for indicating financial information to a customer. The wearable article includes a communication device configured for receiving a financial indicator from a server. The financial indicator may be communicated by a financial institution's server in accordance with a financial indicator profile pre-established by the customer. A user output device, such as a display, is configured for communicating user output, such as a colored light, to the customer based at least in part on the financial indicator. The wearable article may be configured to communicate with the server through a mobile terminal, such as a mobile phone, an Internet hot spot, a mobile telephony system, a payment network, a point-of-sale terminal, or the like. The wearable article may be configured to communicate with a point-of-sale terminal so that the wearable article can also be used as a payment device.
US09177303B2 Methods for monitoring and processing batches of documents
A method and apparatus are provided for tracking documents. The documents are tracked by simultaneously monitoring each document's electronic processing status and physical location. Determinations are made whether specific combinations of electronic processing states and physical locations are valid and whether specific movements of documents are permitted. Invalid combinations or movements are reported to a reporting station. The preparation of batches of documents prior to scanning may be monitored and operator metrics related to the batch prep process may be tracked. Exception documents rejected during document processing may be monitored to enable retrieval of such documents.
US09177302B2 System for providing cardless payment
The method and system of the invention provide a variety of techniques for using a selected alias and a selected personal identification entry (PIE) in conjunction with use of a transaction card, such as a credit card, debit card or stored value card, for example. A suitable number or other identification parameter is selected by the account-holder as an alias. The account-holder is then required to choose a PIE for security purposes. The alias is linked to the account-holder's credit card number via a database. When the account-holder enters into a transaction with a merchant, the physical card need not be present. The account-holder simply provides his or her alias and then the PIE. This can be done at any point of sale such as a store, catalog telephone order, or over the Internet. The alias and PIE are entered and authorization is returned from the credit card company.
US09177300B2 Electronic device and method of messaging meeting invitees
A method of composing an email message at an electronic device and an electronic device operable to carry out the method are provided. The method includes receiving an email command from a user input of the electronic device through a calendar user interface, the email command relating to at least one of a plurality of intended attendees of a calendared meeting, and providing an email composition interface in response to receiving the email command. The email composition interface includes a user-editable portion of an address field. The user-editable portion of the address field is automatically populated with email address information for the at least one of the plurality of intended attendees.
US09177299B2 Interface for displaying electronic communications
An interface enables perception of information regarding e-mail communications. The interface includes an e-mail application user interface that enables perception of e-mail message information for one or more e-mails received by an e-mail participant and that enables active display of one or more of the received e-mails selected by the e-mail participant, The interface also includes a mechanism that determines a request for e-mail message information for one of the e-mails from within a desired e-mail message that is not actively displayed. The interface further includes an informational tool tip that provides a temporary perceivable indication to the e-mail participant of at least a portion of the requested information for the desired e-mail message while maintaining active display of the one or more selected e-mails.
US09177296B2 Composing, forwarding, and rendering email system
The present invention provides a computer implemented method for communicating a signature in a received email. Initially, a server receives a source email from a source client, the source email comprising a signature index entry, and a body. The server determines for a first recipient that a first associated destination client is capable of rendering a signature of the signature index entry in response to a selection of an indexed signature. The server, responsive to a determination that the destination client is capable of rendering the signature index entry, forwards the source email to the first recipient as a delivered email using the body of the source email such that an indexed signature is present in the body of the delivered email. In addition, a method for generating a signature header is shown that provides a many to one correspondence between indexed signatures and a signature index entry.
US09177295B2 Monitoring instant messaging usage
A method of monitoring instant messaging usage can include identifying an instant messaging session between a plurality of participants, selecting a participant in the instant messaging session, identifying at least one attribute of the instant messaging session, and identifying at least one attribute of the selected participant. The method further can include determining an instant messaging usage metric for the selected participant according to the at least one attribute of the instant messaging session and the at least one attribute of the selected participant and outputting the instant messaging usage metric of the selected participant.
US09177289B2 Enhancing enterprise service design knowledge using ontology-based clustering
Methods, systems, and computer-readable storage media for extending a knowledge base, implementations including receiving an enterprise service signature (ESS) associated with an enterprise service (ES), the ESS being stored in a computer-readable repository, segmenting the ESS to provide a segmented ESS, identifying one or more unknown terms from the segmented ESS, determining that at least one unknown term of the one or more unknown terms comprises at least one of a specialization and a new entity, and extending the knowledge base in view of the at least one of the specialization and the new entity.
US09177285B2 Method and system for controlling a space based on media content
Described is a system and method for controlling the state and capabilities of a meeting room automatically based on the content being presented. The system can detect certain states (such as transitions to a demo, or question-and-answer sessions) based on content of slides, and can automatically switch displays and other devices in a meeting room to accommodate these new states.
US09177282B2 Contextually aware monitoring of assets
An apparatus, method and system for contextually aware monitoring of a supply chain are disclosed. In some implementations, contextually aware monitoring can include monitoring of the supply chain tradelane with tracking devices including sensors for determining location, velocity, heading, vibration, acceleration (e.g., 3D acceleration), or any other sensor that can monitor the environment of the shipping container to provide contextual awareness. The contextual awareness can be enabled by geofencing and recursive algorithms, which allow dynamic modification of the tracking device behavior. Dynamic modification can reduce performance to save power (e.g., save battery usage) and lower costs. Dynamic modification can increase performance where it matters in the supply chain for improved reporting accuracy or frequency or recognition of supply chain events. Dynamic modification can adapt performance such as wireless communications to the region or location of the tracking device.
US09177281B2 Systems and methods for a secure shipping label
According to various embodiments, a shipping label validation system is provided for determining whether a shipping label is valid or counterfeit. The system may be used, for example, by a shipping entity (e.g., a common carrier) to prevent counterfeiting by generating and embedding onto the shipping label a shipping label hash index based upon at least a portion of the data located on the shipping label. The shipping label data may include, for example, a sender's address, recipient's address, package weight, tracking number, routing code, service code, and/or MaxiCode. The system may also be used to detect existing counterfeit shipping labels by independently generating a confirmation hash index based upon the same portion of the data used to calculate the shipping label hash index. In various embodiments, the system identifies counterfeit shipping labels based upon any discrepancies revealed when comparing the shipping label hash index to the confirmation hash index.
US09177279B2 System and method for risk detection reporting and infrastructure
A method, a system, and a device for monitoring risks associated with at least one business process, including: evaluating at least one of a plurality of document instances, wherein each of the document instances includes, in association therewith, a plurality of document values, against a plurality of risk categories; implementing the plurality of risk categories pursuant to at least one acceptable risk policy approved for the at least one business process; and qualifying at least one of the at least one of the plurality of documents pursuant to an approval rating of the at least one document in at least one risk category. The system, method, and device efficiently monitor risk, and allow for flexibility in modifying or updating risk policy.
US09177278B2 Systems and methods for rule inheritance
Systems and methods for automating and increasing the efficiency of access to data using inheritance of access rules within an organization based upon the relationship of positions within the organization and the roles associated with the positions. In one embodiment, a role structure is used in conjunction with a hierarchical organization structure to allow access rules to be inherited by some of the positions from other positions based upon the relationship of positions within the organization and the roles associated with the positions. Access rules can be applied across equivalent or similar positions, yet differentiated between distinct portions of the organization and the distinct roles associated with the positions. Consequently, particular access rules are not necessarily inherited by all of the positions subordinate to a particular position with which the rule originates, and are not necessarily inherited by all of the positions that are associated with a particular role.
US09177277B2 Workflow modeling with worklets and transitions
A computer is used to generate an approximation of a workflow in terms of worklets and transitions. Each worklet represents a phase of work in the workflow. Each transition indicates conditions for completion of a worklet. Each worklet includes at least one assistlet having executable code that will be executed for approximating of its work phase.
US09177276B2 Data association process, data association method, and data association apparatus
A computer-readable recording medium stores a program causing a computer to execute an association process that includes identifying a second storage location associated with a first storage location by referring to a memory unit configured to store storage location association information indicating relevance between the first storage location and the second storage location where data prepared at a second operation stage associated with a first operation stage is stored. The second storage location is identified when new data is stored to the first storage location where data prepared at the first operation stage among multiple stages for manufacture of a product is stored. The association process further includes creating and recording in the memory unit, data association information indicating the relevance between the new data stored in the first storage location and the latest data among the data that is stored in the second storage location.
US09177269B2 Complexity reduction of user tasks
An exemplary method for reducing complexity of at least one user task includes steps of calculating a complexity metric for the at least one user task; identifying one or more usability issues having a measurable impact on the complexity metric for the at least one user task; determining one or more recommendations for addressing at least one of the one or more usability issues; and displaying a representation of at least one of the one or more usability issues and of at least one of the one or more recommendations. In an illustrative embodiment, implementing any one of the one or more recommendations reduces the impact of the usability issue on the complexity metric of the at least one user task and thereby reduces a complexity of the at least one user task.
US09177267B2 Extended collaboration event monitoring system
An extended collaboration event monitoring system monitors users' interactions with computer software applications and detects and extracts events. The system intelligently determines whether the extracted events trigger undetected events or other action items. The system provides the extracted events to a social networking client that translates the extracted events and returns the translated data to the system. The system publishes the translated data to a social networking/collaboration interface embedded into the interface of the computer software application being utilized by one of the users. The system not only publishes the translated data corresponding to a user's interactions with the computer software application to that user's interface, but also publishes the user's interactions with the computer software application to interfaces corresponding to other project team members as well.
US09177266B2 Methods and systems for implementing ancestral relationship graphical interface
According to the invention, a method for displaying genealogical records may include providing a plurality of genealogical records, providing a plurality of icons, and associating each genealogical record with an icon. The method may also include providing a genealogical display and positioning a first icon in a docking field of the genealogical display. The method may further include displaying on a display device the first icon in the docking field, information about the genealogical record associated with the first icon, and other icons that represent genealogical records linked to the genealogical record represented by the first icon, where the other icons are arranged according to their relationship with the first icon. The method may additionally include replacing the first icon in the docking field with a second icon representing a different genealogical record and updating the icons displayed on the display device without shifting focus from the displayed icons.
US09177265B2 System and method for real time identification of a drug
A system for managing a prescribed drug regimen for a user, the system including at least one electronic device (Pod) for interactive communication with at least one user, a Pod server coupled via a communication link to each Pod, said Pod server including an analysis unit, the analysis unit including a database of drug characteristics, and a processor for comparing sensed characteristics of a drug in one of the Pods with characteristics in the drug characteristics database, so as to identify the drug, and to provide to the Pod an indication of compatibility of the drug with the drug regimen.
US09177263B2 Identifying and tracking grouped content in e-mail campaigns
A method, apparatus, and computer usable program code for identifying and tracking grouped content in e-mail campaigns. An instruction set is placed in an e-mail to form a modified e-mail, wherein the modified e-mail contains a grouped content having a plurality of levels that are expandable to present additional content. The modified e-mail is sent to a distribution list, wherein the instruction set is used to track information about the grouped content.
US09177260B2 Information classification device, information classification method, and computer readable recording medium
An information classification device (1) is provided with an union of sets determination unit (10) which performs correct/incorrect determination regarding a content to be classified using a union of sets rule, and an individual determination unit (11) which applies a plurality of individual determination rules to the content to be classified which has been determined as correct, determines whether the content matches the condition, and performs correct/incorrect determination again regarding the content to be classified which has been determined as correct on the basis of the determination result of each individual determination rule. The union of sets determination rule is created using a result of correct/incorrect determination previously performed by two or more people with respect to a plurality of contents which are different from the contents to be classified, and also using feature amounts of respective different contents. Each individual determination rule is created for respective person using the aforementioned result of correct/incorrect determination and the feature amount.
US09177259B1 Systems and methods for recognizing and reacting to spatiotemporal patterns
Embodiments of the disclosed systems and methods comprise systems and methods for recognizing actions of an object and matching those actions with expected patterns of actions. In some embodiments, the methods recognize actions using statistical classifiers and aggregate data about locomotions, actions, and interactions of the object to infer patterns of that object using a pattern recognition algorithm. In some embodiments, the systems and methods are further able to select responses to recognized patterns and learn patterns over time.
US09177258B2 Implementing a learning algorithm and estimation function utilizing a randomly selected prototype function with randomly set parameters
There is provided an information processing method including inputting a feature quantity vector and an objective variable corresponding to the feature quantity vector, generating a basis function for outputting a scalar quantity by mapping the feature quantity vector, mapping the feature quantity vector using the basis function and calculating the scalar quantity corresponding to the feature quantity vector, evaluating whether or not the basis function used to calculate the scalar quantity is useful for estimating the objective variable using the objective variable along with the scalar quantity and the feature quantity vector corresponding to the scalar quantity, generating an estimation function for estimating the objective variable from the scalar quantity by machine learning on the basis of the scalar quantity and the objective variable corresponding to the scalar quantity using the basis function evaluated to be useful, and outputting the estimation function.
US09177256B2 Method for solving linear programs
The invention provides for a computer-implemented method for solving a linear program (LP), the method comprising the steps of: receiving (100) the linear program; determining (101) a kernel K and determining a kernel matrix G of the kernel K, wherein the kernel matrix is a non-singular submatrix of the original matrix; determining (102) a set of non-basic variable indices and a set of extra constraint indices; computing (103) a primal kernel vector (xK) from the determined kernel; computing (104) a dual kernel vector (yK) from the determined kernel; and evaluating (105) the feasibility of the primal kernel vector and of the dual kernel vector.
US09177252B2 Incremental DFA compilation with single rule granularity
A composite DFA for multiple regular expressions or other rules may be generated in a two-step process—first compiling single rule DFAs, then performing subset construction on those DFAs to generate the composite DFA, with subset information retained. A new batch of one or more rules may be added by another subset construction from the old composite DFA and new single rule DFAs, with subset information for the new composite DFA compressed into sets of states from old and new single rule DFAs. A batch of one or more rules is deleted by deleting references to single rule DFA states from composite DFA subsets, deleting composite DFA states with empty subsets and merging composite DFA states with identical subsets. Rules are changed by deleting the old versions and then adding the new versions.
US09177250B2 Method and system for determining configuration rules based on configurations of complex systems
The current document discloses an automated method and system for inferring the logical rules underlying the configuration and versioning state of the components and subcomponents of a complex system, including data centers and other complex computational environments. The methods and systems employ a database of configuration information and construct an initial set of logical rules, or hypotheses, regarding system configuration. Then, using simulated annealing and a variant of genetic programming, the methods and systems disclosed in the current document carry out a search through the hypothesis state space for the system under several constrains in order to find one or more hypotheses that best explain the configuration and, when available, configuration history. The constraints include minimization of the complexity of the hypotheses and maximizing the accuracy by which the hypotheses predict observed configuration and configuration history.
US09177246B2 Intelligent modular robotic apparatus and methods
Apparatus and methods for an extensible robotic device with artificial intelligence and receptive to training controls. In one implementation, a modular robotic system that allows a user to fully select the architecture and capability set of their robotic device is disclosed. The user may add/remove modules as their respective functions are required/obviated. In addition, the artificial intelligence is based on a neuronal network (e.g., spiking neural network), and a behavioral control structure that allows a user to train a robotic device in manner conceptually similar to the mode in which one goes about training a domesticated animal such as a dog or cat (e.g., a positive/negative feedback training paradigm) is used. The trainable behavior control structure is based on the artificial neural network, which simulates the neural/synaptic activity of the brain of a living organism.
US09177243B2 Passive RFID transponder with powered element
A passive RFID transponder circuit comprises a transducer antenna, a power conditioning unit and an RFID signal module coupled to the transducer antenna and an additional powered element coupled to the transducer antenna in parallel with the power conditioning unit and RFID signal module. The powered element is powered by electrical current from the transducer antenna that bypasses the power conditioning unit and RFID signal module.
US09177242B2 Semiconductor device and manufacturing method thereof
To provide a wireless identification semiconductor device provided with a display function, which is capable of effectively utilizing electric power supplied by an electromagnetic wave. The following are included: an antenna; a power source generating circuit electrically connected to the antenna; an IC chip circuit and a display element electrically connected to the power source generating circuit; a first TFT provided in the power source generating circuit; a second TFT provided in the IC chip circuit; a third TFT provided in the display element; an insulating film provided to cover the first to third TFTs; a first source electrode and a first drain electrode, a second source electrode and a second drain electrode, and a third source electrode and a third drain electrode which are formed over the insulating film; and a pixel electrode electrically connected to the third source electrode or the third drain electrode. The first source electrode or the first drain electrode is electrically connected to the antenna.
US09177241B2 Portable e-wallet and universal card
Universal cards are used in place of all the other traditional cards which a person may want to carry. The universal card can include a short range communications transceiver to communicate with a mobile device. The mobile device can include a user interface and an e-wallet application so that the user can interface with the e-wallet application for programming the universal card via the short range communication link. Once programmed, the universal card emulates a function of a traditional card.
US09177234B2 Print controlling terminal apparatus, print controlling method, image forming apparatus, and method of controlling for analyzing state information
The present inventive concept relates to a print controlling terminal apparatus, print controlling method, image forming apparatus and method of controlling the same. The print controlling terminal apparatus according to the present inventive concept includes a user interface unit which inputs a set value determining whether or not to activate a state information analyzing operation of the image forming apparatus, storage unit which stores the input set value, print data generating unit which generates print data including the set value and spools the generated print data to the image forming apparatus, and a control unit which generates a notification message using the received state information according to the set value.
US09177233B2 Display processing apparatus, image forming system, and computer-readable storage medium
A display processing apparatus includes a receiving unit configured to receive display information indicating whether gloss-control plane image data is displayed and whether clear plane image data is displayed. The gloss-control plane image data specifies a type of a surface effect applied to a recording medium and a glossy area to which the surface effect is to be applied, and indicates a color of the glossy area when being displayed. The clear plane image data specifies a transparent image formed on the recording medium and indicates a color of the transparent image when being displayed. The apparatus also includes a generating unit configured to synthesize color plane image data indicating a color image and one of the gloss-control plane image data and the clear plane image data that is specified to be displayed thus to generate a synthetic image.
US09177232B2 Information processing device, method of processing information, and computer-readable recording medium for extracting a contour of an object
An information processing device includes a receiving unit, a processing range determination unit, and a contour extraction unit. The receiving unit receives specified position information that indicates a position specified by a user with respect to a target image. The processing range determination unit determines, when a distance between a start point position that indicates a start point of positions indicated by the specified position information, and a position indicated by the latest specified position information is a threshold or less, a closed area obtained based on a history of the received specified position information as a processing range. The contour extraction unit extracts a contour of an object in the processing range.
US09177230B2 Demographic analysis of facial landmarks
A facial image may be annotated with the plurality of facial landmarks. These facial landmarks may be points or regions of the face that are indicative, either alone or in combination with other facial landmarks, of at least one demographic characteristic. Demographic characteristics include, for example, age, race, and/or gender. Based on the demographic characteristic being analyzed, one or more of these facial landmarks may be selected and arranged into an input vector. Then, the input vector may be compared to one or more of the training vectors. An outcome of this comparison may involve in the given facial image being classified into a category germane to the analyzed demographic characteristic (e.g., an age range or age, a racial category, and/or a gender).
US09177226B2 Object detection in images based on affinity determinations
A hierarchy of clusters is determined, where each leave of the hierarchy corresponds to one of the images in a group, and each cluster in the hierarchy identifies images in the group that are deemed similar to one another. The hierarchy identifies a similarity between each of the plurality of clusters.
US09177221B2 Parking lot
A parking lot with a plurality of parking spaces for vehicles that have OCR-readable license numbers and onboard units with radio IDs that can be read out via radio signals. The parking lot including a central computer for storing parking space reservations, a vehicle license number and an assigned radio ID, a radio beacon for the parking spaces for reading out the radio ID of an entering vehicle via radio and signaling the radio ID to the central computer, and at least one camera unit for each parking space for reading the license number of a vehicle and correspondingly signaling the license number to the central computer. The central computer checks whether for a radio ID signaled to the central computer the vehicle license number is subsequently signaled by the camera unit of this parking space, and to log instances in which this is not the case.
US09177220B2 System and method for 3D space-dimension based image processing
An apparatus for 3D representation of image data, comprising: a structure identifier for identifying structures in motion within image data, and a skeleton insertion unit, which associates three-dimensional skeleton elements with the identified structures. The skeleton elements are able to move with the structures to provide a three-dimensional motion and structural understanding of said image data which can be projected back onto the input data. As well as individual elements, complex bodies can be modeled by complex skeletons having multiple elements. The skeleton elements themselves can be used to identify the complex objects.
US09177213B2 Method and apparatus for use in forming an image
A method for use in forming an image of an object comprises setting a value of an attribute of an image of an object according to a measured reflectance of the object. The image of the object thus formed may be realistic and may closely resemble the actual real-world appearance of the object. Such a method may, in particular, though not exclusively, be useful for providing a realistic image of a road surface and any road markings thereon to assist with navigation. Setting a value of an attribute of the image of the object may comprise generating an initial image of the object and adjusting a value of an attribute of the initial image of the object according to the measured reflectance of the object to form an enhanced image of the object. A method for use in navigation comprises providing a navigation system with data associated with an image formed using such a method. An image formed using such a method and a map database containing such an image are also disclosed.
US09177212B2 Method for combining a road sign recognition system and a lane detection system of a motor vehicle
A method combines a road sign recognition system and a lane detection system of a motor vehicle. The road sign recognition system generates road sign information from sensor data of a camera-based or video-based sensor system and the lane detection system generates lane course information from the sensor data. Meaning-indicating data for road signs are generated from the lane course information, and are used to check the plausibility of and/or to interpret the road sign information. Data indicating the course of the lane are generated from the road sign information, and are used to check the plausibility of and/or to interpret the lane course information.
US09177211B2 Method and apparatus for identifying motor vehicles for monitoring traffic
A method and an apparatus for identifying motor vehicles for monitoring traffic. The identification is carried out by image-evaluation and includes determining the size ratios of a license-plate contour in a perspectively distorted image on the basis of stored standardized license-plate formats, determining the size of the perspective distortion of the license-plate contour on the basis of the associated standardized license-plate format, establishing a calculation rule for the perspective rectification on the basis of the ascertained distortion of the license-plate contour with respect to the associated license-plate format, rectifying the extracted license-plate-containing motor-vehicle view, and comparing the rectified image with reference images of front views of motor vehicles stored in a database in order to assign the image with greatest correspondence to a group of classified motor vehicles.
US09177210B2 Processing container images and identifiers using optical character recognition and geolocation
Embodiments include a system configured to process location information for objects in a site comprising an imaging device configured to take a picture of an object, the picture containing a unique identifier of the object; a global positioning system (GPS) component associated with the imaging device and configured to tag the image of the object with GPS location information of the object to generate a tagged image; a communications interface configured to transmit the tagged image to a server computer remote from the imaging device over an Internet Protocol (IP) network; and a processor of the server configured to perform Optical Character Recognition (OCR) on the picture and to create an indicator code corresponding to the identifier of the object, wherein the processor is further configured to create a processed result containing the indicator code and the location to locate the object within the site.
US09177208B2 Determining feature vectors for video volumes
A volume identification system identifies a set of unlabeled spatio-temporal volumes within each of a set of videos, each volume representing a distinct object or action. The volume identification system further determines, for each of the videos, a set of volume-level features characterizing the volume as a whole. In one embodiment, the features are based on a codebook and describe the temporal and spatial relationships of different codebook entries of the volume. The volume identification system uses the volume-level features, in conjunction with existing labels assigned to the videos as a whole, to label with high confidence some subset of the identified volumes, e.g., by employing consistency learning or training and application of weak volume classifiers. The labeled volumes may be used for a number of applications, such as training strong volume classifiers, improving video search (including locating individual volumes), and creating composite videos based on identified volumes.
US09177207B2 Image cropping using supervised learning
Software for supervised learning extracts a set of pixel-level features from each source image in collection of source images. Each of the source images is associated with a thumbnail created by an editor. The software also generates a collection of unique bounding boxes for each source image. And the software calculates a set of region-level features for each bounding box. Each region-level feature results from the aggregation of pixel values for one of the pixel-level features. The software learns a regression model, using the calculated region-level features and the thumbnail associated with the source image. Then the software chooses a thumbnail from a collection of unique bounding boxes in a new image, based on application of the regression model. The software uses a thumbnail received from an editor instead of the chosen thumbnail, if the chosen thumbnail is of insufficient quality as measured against a scoring threshold.
US09177204B1 Spectrally enhanced vision system for low visibility operations
A system for enhancing an image displayed on a display unit of an aircraft is shown and described. The system includes an enhanced vision system that detects a scene and enhances the scene for display on the display unit. The enhanced vision system includes a sensor having a filter configured to filter out all but at least one narrowband spectrum of light from the scene to detect elements of a first color. The enhanced vision system causes remaining content of the scene to be removed from the filter output for completing the detection of the elements of the first color. The enhanced vision system enhances the elements of the first color on the display unit.
US09177202B2 Red-eye detection device
An ECU connected to an image sensor includes a face position and face feature point detection unit that detects the feature points of the face of the driver, a red-eye detection unit that detects the red eye with template matching using a red-eye template, an eye opening degree calculation unit that calculates the degree of eye opening, a relative eye opening degree calculation unit that calculates the relative degree of eye opening which is 0% in an eye-closed state and is 100% in an eye-open state, and a red-eye template update unit that generates a red-eye template on the basis of the relative degree of eye opening and updates a red-eye template used for the next template matching with the generated red-eye template.
US09177197B1 Systems and methods for alignment of check during mobile deposit
An alignment guide may be provided in the field of view of a camera associated with a mobile device used to capture an image of a check. When the image of the check is within the alignment guide in the field of view, an image may be taken by the camera and provided from the mobile device to a financial institution. The alignment guide may be adjustable at the mobile device. The image capture may be performed automatically by the camera or the mobile device as soon as the image of the check is determined to be within the alignment guide. The check may be deposited in a user's bank account based on the image. Any technique for sending the image to the financial institution may be used.
US09177195B2 System and method for detecting, tracking and counting human objects of interest using a counting system and a data capture device
A system for counting and tracking objects of interest within a predefined area with a sensor that captures object data and a data capturing device that receives subset data to produce reports that provide information related to a time, geographic, behavioral, or demographic dimension.
US09177192B2 Apparatus, method, and system for image-based human embryo cell classification
Apparatuses, methods, and systems for automated cell classification, embryo ranking, and/or embryo categorization are provided. An apparatus includes a classification module configured to apply classifiers to images of one or more cells to determine, for each image, a classification probability associated with each classifier. Each classifier is associated with a distinct first number of cells, and is configured to determine the classification probability for each image based on cell features including one or more machine learned cell features. The classification probability indicates an estimated likelihood that the distinct first number of cells is shown in each image. The classification module is further configured to classify each image as showing a second number of cells based on the distinct first number of cells and the classification probabilities associated therewith. The classification module is implemented in at least one of a memory or a processing device.
US09177187B2 Variable gain amplifier for bar code reader
A system and method for controlling an amplifier in a bar code reader are disclosed, wherein the method may include receiving light at a photodiode within the bar code reader from a bar code being scanned by a scan mirror powered by a scan motor; converting the received light into an initial electrical signal; determining whether the scan motor is undergoing a change in direction; establishing a gain value for the amplifier based on an outcome of the determining step; and amplifying the initial electrical signal into an amplified signal using the established gain value.
US09177185B2 Passive wireless sensors for chemical and biological agents and wireless systems including the passive wireless sensors
Wireless sensors for detection of an analyte may include a sensor receiving antenna configured to receive interrogation pulses having an interrogation frequency, a DC converter, a relaxation oscillator circuit electrically, and a sensor transmitting antenna. The relaxation oscillator circuit may include a capacitance element that defines a response-pulse frequency of the wireless sensor. The capacitance element may include an interdigitated capacitor coated with a detection layer of a functional material having a dielectric constant that defines the dielectric constant of the interdigitated capacitor. This dielectric constant changes when the functional material is exposed to the analyte, thereby changing the response-pulse frequency of the relaxation oscillator circuit to an analyte-exposure frequency indicative of the exposure of the functional material to the analyte. Wireless systems for detecting an analyte may include a wireless sensor that communicates with an interrogation module.
US09177181B2 Secure epass booklet based on double chip technology
A tamper-evident credential has a radio frequency identification (RFID) package with a first antenna and a subordinate antenna, RFID package defining a first part of the credential. The credential also has a subordinate RFID package defining a second part of the credential. The subordinate RFID package selectively coupled to said subordinate antenna so that an interrogation signal applied to said first antenna package is transmitted to the subordinate RFID package across said subordinate antenna.
US09177179B1 Electronic system with connection establishment by barcode scan
The present invention discloses an electronic system including a peripheral device whereon a barcode is formed, and a host device. The peripheral device is detachably installed on the host device. The host device includes a housing, a barcode reading module installed on the housing and for reading the barcode on the peripheral device as the peripheral device is installed on the housing of the host device, and a control module installed inside the housing and electrically connected to the barcode reading module for establishing connection between the host device and the peripheral device according to the barcode read by the barcode reading module.
US09177176B2 Method and system for secure system-on-a-chip architecture for multimedia data processing
Aspects of a method and apparatus for a secure system-on-a-chip (SOC) architecture for multimedia data processing are provided. A processor may configure at least one subsystem within the SOC via at least one unsecured bus while a security processor enables secure functionalities in configured subsystems via at least one secure bus. The unsecure buses may comprise a data bus and/or a control bus, for example. The secure buses may comprise a secure control bus and/or a secure key bus, for example. The configurable subsystems may be multimedia processing units, input and output modules, and/or memory controllers. The security processor may program bits in security registers within the subsystems to enable secure functionalities, such as data routing paths and/or key loading paths, for example. Moreover, the security processor may validate code to be executed by a processor for configuring the SOC subsystems.
US09177173B2 Handling repeated requests for the same user data
In accordance with some embodiments, data may be automatically provided on preordained conditions for specific types of data. Thus specific types of data or specific requestors may be treated differently. The system may be programmed to respond appropriately to requests for certain types of data from certain types of requestors. This offloads the need to review specific requests in many cases and enables an automated system for providing requested data as appropriate.
US09177172B2 Single system image via shell database
A single system image is provided for a parallel data warehouse system by exposing a shell database within a database management system comprising metadata and statistics regarding externally stored data. Further, functionality of the database management system can be exploited to perform pre-execution tasks. In one instance, one or more execution plans can be generated by the database management system for an input command and subsequently employed to generate a distributed execution plan.
US09177171B2 Access control for entity search
Method, system, and computer program product for access control for entity search are provided. The method includes: representing entity-relationship data in a conceptual model; representing entities in a search system as documents containing the entity's searchable content and metadata; defining authorization rules for searchers over entities and their relationships; and extending an entity document to include searchable tokens defining the authorization rules. Defining authorization rules may include: identifying query predicate constraints for entity search; and defining searchable tokens as paths for query predicates and permissible searchers; wherein the permissible searchers are permitted access to data based on a query that contains the predicate. Defining authorization rules may further include: defining searchable document files for a free-text predicate with a field name as a token of permissible searchers and the field value as the searchable content.
US09177162B2 Method and device for secured entry of personal data
A method for secured entry of personal data is disclosed. This method comprises for each item of personal data a first step of presentation of a virtual keyboard comprising keys and a first cursor, followed by a step of selection of a key corresponding to the item of personal data wherein the virtual keyboard also comprises at least one dummy cursor and wherein the position on the virtual keyboard of the at least one dummy cursor depends on the position of the first cursor. A device for secured entry of personal data configured to implement the method is further disclosed.
US09177160B1 Key management in full disk and file-level encryption
Methods, apparatus and articles of manufacture for key management in full disk and file-level encryption are provided herein. A method includes fetching a distinct cryptographic key from a secure module in connection with a request to perform one of a decryption operation and an encryption operation on at least one of an individual file and an individual sector within a storage device on a computing device; using the distinct cryptographic key to perform the one of a decryption operation and an encryption operation on the at least one of an individual file and an individual sector within the storage device on the computing device; and discarding the distinct cryptographic key subsequent to said performing the one of a decryption operation and an encryption operation on at least one of an individual file and an individual sector within the storage device on the computing device.
US09177159B2 Secure data parser method and system
A secure data parser is provided that may be integrated into any suitable system for securely storing and communicating data. The secure data parser parses data and then splits the data into multiple portions that are stored or communicated distinctly. Encryption of the original data, the portions of data, or both may be employed for additional security. The secure data parser may be used to protect data in motion by splitting original data into portions of data, that may be communicated using multiple communications paths.
US09177157B2 System and method for routing-based internet security
Method and system for improving the security of storing digital data in a memory or its delivery as a message over the Internet from a sender to a receiver using one or more hops is disclosed. The message is split at the sender into multiple overlapping or non-overlapping slices according to a slicing scheme, and the slices are encapsulated in packets each destined to a different relay server as an intermediate node according to a delivery scheme. The relay servers relay the received slices to another other relay server or to the receiver. Upon receiving all the packets containing all the slices, the receiver combines the slices reversing the slicing scheme, whereby reconstructing the message sent.
US09177155B2 Hybrid analysis of vulnerable information flows
Arrangements described herein relate to analyzing vulnerable information flows in an application. A black-box scan of the application can be performed to record a call-tree representation of call stacks arising in the application due to test inputs provided during the black-box scan. For each path in the call-tree representation that does not constitute a vulnerable information flow during the black-box scan, a static analysis can be performed to determine at least one parameter value that, when abstracted, drives execution of the application, via the path, to flow to the at least one security sink. A security report can be generated identifying at least one of the paths in the call-tree representation that does not constitute the vulnerable information flow during the black-box scan, but flows to the at least one security sink when the at least one parameter value is abstracted.
US09177154B2 Remediation of computer security vulnerabilities
A computer security vulnerability remediation system (CSVRS) is disclosed, including a CSVRS client communicatively coupled to a remediation server through a network. The CSVRS client includes software having a security vulnerability, which vulnerability may be known to malicious actors who develop an exploit. In some cases, the exploit is a “zero-day exploit,” meaning the vulnerability may not be known to the CSVRS client until the exploit is deployed. A RSP receives information about the exploit and vulnerability from a team of remediation experts. The RSP may prepare a remedial exploit, which carries a self-healing pay load. The remedial exploit may be delivered either through the vulnerability itself, or through credentials granted by the CSVRS client to the RSP. The self-healing pay-load takes appropriate action, such as closing ports or disabling scripts, to prevent the vulnerability from being further exploited.
US09177151B2 Operating speed control of a processor at the time of authentication before an operating system is started
According to one embodiment, non-volatile storage device stores a program for causing a processor to execute processing of determining whether registered authentication information exists in the information processing apparatus, authentication processing determining whether input authentication information matches the registered authentication information, and processing of booting an operating system. The operating speed control module decreases an operating speed of the processor in response to the determination that the registered authentication information exists in the apparatus, and increases the operating speed of the processor in response to the confirmation of the match between the input authentication information and the registered authentication information.
US09177144B2 Structural recognition of malicious code patterns
Various embodiments include an apparatus comprising a detection database including a tree structure of descriptor parts including one or more root nodes and one or more child nodes linked to from one or more parent descriptor parts chains, each of the root nodes representing a descriptor part, and each root node linked to at least one of the child nodes, each root node and each child node linked to any possible additional child nodes, wherein the possible additional child nodes include any possible successor child nodes and a descriptor comparator coupled to the detection database, the descriptor comparator operable to receive data including a plurality of logic entities, once or successively, and to continuously compare logic entities provided to the tree structure of descriptor parts stored in detection database, and to provide an output based on the comparison.
US09177142B2 Identification of electronic documents that are likely to contain embedded malware
The present invention provides a method for determining the likelihood that an electronic document contains embedded malware. After parsing or sequencing an electronic document, the metadata structures that make up the document are analyzed. A number of pre-established rules are then applied with respect to certain metadata structures that are indicative of embedded malware. The application of these rules results in the generation of a score for the electronic document being tested for embedded malware. The score is then compared to a threshold value, where the threshold value was previously generated based on a statistical model relating to electronic documents having the same format as the document being tested. The result of the comparison can then be used to determine whether the document being tested is or is not likely to contain embedded malware.
US09177140B1 System, method, and computer program product for managing a plurality of applications via a single interface
A system, method and computer program product are provided for managing a plurality of applications via a single interface. It is initially identified as to which of a plurality of applications are installed on a computer. A status of each of the applications is then presented via a single graphical user interface.
US09177138B2 Change convergence risk planning and avoidance
Disclosed is a change convergence risk mitigation system. The change convergence risk mitigation system typically includes a processor, a memory, and a risk mitigation module stored in the memory. The change convergence risk mitigation system is typically configured for: receiving information associated with a plurality of events; determining an event risk score for each of the plurality of events; aggregating the event risk scores of the plurality of events and, based on the event risk scores, determining a risk level for each of the plurality of time periods; identifying a risk mitigation event; determining a risk mitigation time period from the plurality of time periods such that the risk mitigation time period would not have a predefined level if the risk mitigation event occurred during the risk mitigation time period; and providing a recommendation that the risk mitigation event occur during the risk mitigation time period.
US09177137B2 System and method for dynamic analysis tracking object associations for application dataflow
Data source information is recorded into a source tracking object embedded in a wrapper object pointing to a data object from the data source. Tracking event information is recorded into a flow tracking object embedded in a wrapper object copy as the tracking event processes the wrapper object copy. Other tracking event information is recorded into another flow tracking object embedded in another wrapper object as the other tracking event processes the other wrapper object. The flow tracking object is associated with the other flow tracking object in response to a field retrieval of the wrapper object copy from the other wrapper object. The wrapper object copy is output to a data sink. Data sink information is recorded into a sink tracking object embedded in the wrapper object copy. The tracking objects are output as dynamic analysis of dataflow in the application program.
US09177136B2 Information device, program, method, and computer readable recording medium for preventing execution of malicious program code
An information device performs data processing by executing program codes loaded in a memory with a central control unit. The information device includes a detection unit which detects a timing when any one of the program codes is called, a return address acquisition unit which sequentially acquires return addresses of the program codes loaded in the memory at the timing detected by the detection unit, and a termination unit which searches for an illegal access based on destination addresses that are respectively pointed by the return addresses sequentially acquired by the return address acquisition unit at the timing detected by the detection unit and which terminates the data processing when the illegal access is detected.
US09177135B2 Signal security for wireless access point
A wireless access point receives a set of invalid passwords from at least one wireless device attempting to connect to a network through the wireless access point. The wireless access point reduces RF signal power in response to receiving the set of invalid passwords.
US09177132B2 Capturing data parameters in templates in a networked computing environment
Embodiments of the present invention provide an approach for allowing a user to capture a set of values for a set of input parameters in a template that may be used for present and/or future provisioning of virtual resources. Under this approach, the template may be managed within a networked computing environment (e.g., cloud computing environment) for future use by the creating user or other authorized users. The next time the user is interacting with the environment, the set of templates available may be accessed, and the user can select/utilize a previously stored template. Once a template is chosen, the user may initiate a provisioning request from the environment's interface(s), which may include graphical user interfaces (GUIs), command lines, application programming interfaces (APIs), etc. In any event, the user may also have the opportunity to update any saved data and/or provide additional data.
US09177129B2 Devices, systems, and methods for monitoring and asserting trust level using persistent trust log
Devices, systems, and methods for monitoring and asserting a trust level of a computing device are disclosed. In one illustrative embodiment, a computing device may include a memory having stored therein a persistent trust log, the persistent trust log comprising data relating to historic events influencing a trust level of the computing device, and a security controller configured to detect an event that influences the trust level of the computing device and to write data relating to the event to the persistent trust log.
US09177123B1 Detecting illegitimate code generators
Methods, apparatus and articles of manufacture for detecting illegitimate code generators are provided herein. A method includes generating a set of multiple verification algorithms; generating multiple versions of an authentication code associated with a protected resource, wherein each of the multiple versions of the authentication code satisfies all of the multiple verification algorithms; providing a first version of the authentication code from the multiple versions of the authentication code to a recipient, wherein the first version of the authentication code includes a first verification algorithm from the set of multiple verification algorithms; and providing a second version of the authentication code from the multiple versions of the authentication code to the recipient, wherein the second version of the authentication code includes (i) the first verification algorithm from the set of multiple verification algorithms and (ii) a second verification algorithm from the set of multiple verification algorithms.
US09177102B2 Database and imaging processing system and methods for analyzing images acquired using an image acquisition system
Methods are provided including receiving a plurality of images from at least one image acquisition system; selecting at least a portion of a set of images for analysis using at least one attribute of image metadata; selecting at least one method for deriving quantitative information from the at least a portion of the set of images; processing the selected at least a portion of the set of images with the selected at least one method for deriving quantitative information; associating the derived quantitative information with the at least a portion of the set of images via a data structure; selecting at least one method for aggregating at least a portion of a set of derived quantitative information into a reduced set of results; and generating at least one report to represent the reduced set of results for one of an individual image and the set of images as a pool.
US09177100B2 Method and systems for processing polymeric sequence data and related information
Methods and systems for organizing, representing and processing polymeric sequence information, including biopolymeric sequence information such as DNA sequence information and related information are disclosed herein. Polymeric sequence and associated information may be represented using a plurality of data units, each of which includes one or more headers and a payload containing a representation of a segment of the polymeric sequence. Each header may include or be linked to a portion of the associated information.
US09177099B2 Method and systems for processing polymeric sequence data and related information
Methods and systems for organizing, representing and processing polymeric sequence information, including biopolymeric sequence information such as DNA sequence information and related information are disclosed herein. Polymeric sequence and associated information may be represented using a plurality of data units, each of which includes one or more headers and a payload containing a representation of a segment of the polymeric sequence. Each header may include or be linked to a portion of the associated information.
US09177093B2 Routing interconnect of integrated circuit designs with varying grid densities
Routing methods for an integrated circuit design layout are disclosed. The layout can include design netlists and library cells. A multiple-level global routing can generate topological wire for each net. An area oriented graph-based detail routing on the design can be performed. A post route optimization after the detail routing can be performed to further improve the routing quality. Some methods can be single threaded all or some of the time, and/or multi-threaded some or all of the time.
US09177090B1 In-hierarchy circuit analysis and modification for circuit instances
Modifying a hierarchical circuit design includes accessing hierarchical circuit data in a hierarchical circuit design comprising top level block data and lower level block data; performing timing analysis on a selected portion of the hierarchical circuit data to determine whether timing closure is achieved; and in the event that timing closure is not achieved, determining, within a top level design process, an optimization move on the selected portion of the hierarchical circuit data; wherein the selected portion of the hierarchical circuit data includes a selected portion of the top level block data and a selected portion of the lower level block data.
US09177089B2 Formal verification coverage metrics for circuit design properties
A computer-implemented method and non-transitory computer readable medium for circuit design verification. Formal verification is performed on a circuit design to prove a correctness of a property of the circuit design. The circuit design has a cone of influence representing a portion of the circuit design capable of affecting signals of the property. A proof core of the circuit design is identified, the proof core being a portion of the cone of influence that is sufficient to prove the correctness of the property. A coverage metric is generated that is indicative of a level of formal verification coverage provided by the property based on the proof core of the circuit design.
US09177087B1 Methods and apparatus for generating short length patterns that induce inter-symbol interference
One embodiment relates to a method of generating worst case inter-symbol interference (ISI) inducing short patterns for simulating and/or testing a communication link. The method includes the generation of a binary clock sequence comprising bits of alternating values at the beginning of the pattern. In addition, an ISI inducing binary sequences and its complement are generated after the clock sequence. Another embodiment relates to a pattern generator for generating an worst case inter-symbol interference inducing short pattern for testing a communication link. Other embodiments, aspects, and features are also disclosed.
US09177086B2 Machine, computer program product and method to carry out parallel reservoir simulation
A machine, computer program product, and method to enable scalable parallel reservoir simulations for a variety of simulation model sizes are described herein. Some embodiments of the disclosed invention include a machine, methods, and implemented software for performing parallel processing of a grid defining a reservoir or oil/gas field using a plurality of sub-domains for the reservoir simulation, a parallel process of re-ordering a local cell index for each of the plurality of cells using characteristics of the cell and location within the at least one sub-domain and a parallel process of simulating at least one production characteristic of the reservoir.
US09177085B2 Integrated assemblage of 3D building models and 2D construction drawings
In one embodiment, a viewer executing on an electronic device having a touch sensitive display shows a three-dimensional (3D) model of a building created using computer aided design (CAD) software. A plurality of selectable interface nodes are provided at respective locations within the 3D model. Each interface node is linked to at least one corresponding two-dimensional (2D) construction drawing that shows a section view, a plan view, an elevation view or a detail view of the building related to the location of the interface node. In response to receiving input from a user indicating selection of a particular interface node, a menu is displayed with one or more selectable menu options. In response to receiving additional input from the user indicating selection of a particular menu option, a corresponding 2D construction drawing for the particular interface node is displayed in context of the 3D model of the building.
US09177082B2 Drawing automation in computer aided design systems
Methods for computer aided design (CAD) and corresponding systems and computer-readable mediums. A method includes performing a setup process to instantiate a booklet of CAD drawings. The method includes receiving a user selection of a template from a user. The method includes receiving geometry content information from the user and receiving reference geometry from a user. The method includes creating the booklet of CAD drawings based on the template, geometry content information and reference geometry. A CAD system maintains a CAD drawing booklet, the CAD drawing booklet associated with a plurality of drawings each including a sheet collection, and each drawing associated with at least one component.
US09177078B1 Systems and methods for analysis of international education credential equivalence
A system for converting educational credentials from a first country to credentials for a second country includes a database configured to store data related to at least one of grading scales, credit scales, course descriptions, rankings, and weighting for educational credentials and a processor configured to receive data from a user related to course grades and credits earned in the first country and a selection of the second country. The processor retrieves data from the database based on the user data and converting the course grades and credits earned in the first country to grades, credits, and grade point averages for use in the second country based on the data from the database. The processor provides the grades, credits, and grade point averages equivalent in the second country to an electronic display for display to the user.
US09177077B2 Method for improving backward/forward performance between certain types of dynamic web pages
A method for improving backward and forward web browser performance is described. In one embodiment, backward and forward web performance is enhanced by ignoring unload handler scripts and caching web pages. Web elements with unload handler scripts are examined. In a first pass, if the web page elements are not determined to be significant, then the related unload handler scripts can be ignored, enabling the web page to be cached. In a second pass, if the web page element is significant, but the unload handler script is determined to be insignificant, then the unload handler script can be ignored and the web page can be cached.
US09177070B2 System, method and computer program product for performing actions associated with a portal
Provided are mechanisms and methods for performing actions associated with a portion of portal content provided to a user. These mechanisms and methods for performing the actions associated with the portion of the portal content can enable an improved user experience, increased efficiency, optimized productivity, etc. Further, the actions associated with the portion of the portal content can include manipulations requested by the user, such as an addition to, a removal of, and a rearrangement of the portion of the portal content.
US09177069B1 Determining labels from similar geographic features
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, including a method that comprises: determining a target geographic feature that has insufficient targeting information associated therewith, the target geographic feature defining a location; determining one or more similar geographic features to the target geographic feature, each geographic feature including targeting information, the determining based on shared excess queries that are shared between geographic features that are determined to be similar to the target geographic feature, wherein each excess query is a query associated with and exceeds an expected query count for each of the similar geographic features and the target geographic feature; attributing targeting information associated with at least one of the one or more similar geographic features to the target geographic feature; and serving content responsive to queries that relate to the target geographic feature based at least in part on the attributed targeting information.
US09177066B2 Method and system for displaying comments associated with a query
A method and system for displaying comments associated with a query. The method includes receiving the query provided by a user, retrieving a set of comment clusters from a comment cluster database, selecting engaging comments from each comment cluster included in the set of comment clusters, aggregating the engaging comments that are obtained from each comment cluster, identifying a plurality of independent comments included in a list of aggregated comments and displaying a list of engaging comments to the user. The system includes an electronic device, a communication interface and a memory. The system also includes a processor to receive the query, retrieve a set of comment clusters, select engaging comments from each comment cluster, aggregate the engaging comments, identify a plurality of independent comments and display a list of engaging comments to the user.
US09177060B1 Method, system and apparatus for identifying and parsing social media information for providing business intelligence
A method, system and apparatus are provided to identify, collect and parse content for business intelligence. Particularly, the method, system and apparatus provide for deriving, over a communication network, knowledge from information indicative of human communication, emotions, reactions, and experiences to evaluate trends and decisions that impact business. Also, a system, method and apparatus are provided for processing and analyzing social media conversations via one or more modules communicating with a social cognition technology platform. A module according to an exemplary implementation of the present invention, implements next-generation business intelligence that finds, aggregates, and interprets an exhaustive source of digital Internet content (such as textual and voice conversational, and word-of-mouth content) in conjunction with a social cognition technology platform.
US09177056B2 Method and apparatus for a trusted localized peer-to-peer services marketplace
A trusted localized peer-to-peer services marketplace including an available search module to search an available services database for available services responsive to receiving a search query from a potential service buyer, a wanted services search module to search a wanted services database for wanted services responsive to a receiving a search query from a service seller, and a display module coupled with the available services search module and the wanted services search module, the display module to display the results of the search queries, the display module further to display an option for the potential service buyer to automatically populate the wanted services database based on the received available services search query, and to display an option for the service seller to automatically populate the available services database based on the received wanted services search query.
US09177054B2 Selective presentation of data items
A method includes identifying a plurality of data items responsive to a first query. A presentation value associated with each of the plurality of data items is determined, the presentation value of a respective data item being a value associated with the respective data item by a first user in exchange for the presentation of the data item by a publication system. The plurality of data items are ranked for presentation to a second user, the ranking being performed using the respective presentation values associated with the plurality of data items.
US09177053B2 Method and system for parallel fact checking
A fact checking system verifies the correctness of information and/or characterizes the information by comparing the information with one or more sources. The fact checking system automatically monitors, processes, fact checks information and indicates a status of the information.
US09177049B2 System and method for interactive visual representation of information content using assertions
This application relates to information analysis and more particularly to a system and method for interactive visual representation of information content and relationships using layouts and gestures. A visualization tool is provided which facilitates both ad-hoc and more formal analytical tasks as a flexible and expressive thinking environment. The tool provides a space focused on ‘Human Interaction with Information’ and enabling evidence marshalling. Capabilities of the tool include put-this-there cognition, automatic analysis templates, and gestures for the fluid expression of thought and scalability mechanisms to support large analysis tasks.
US09177045B2 Topical search engines and query context models
Topical search engines can add contextual keywords to an input query to bias results toward a particular topic or domain. In one instance, query context models can be constructed to facilitate topical search. Upon receipt of one or more topic-relevant sites, a plurality of topical queries can identified automatically. Contextual keywords can be identified with respect to the plurality of topical queries as a function of lexical generality, among other things. Subsequently, a query context model, comprising the identified topical queries and related contextual keywords, can be employed to restrict query results to a particular topic.
US09177038B2 Comparison of multi-dimensional datasets
Methods, systems, and apparatuses for comparing multi-dimensional datasets are provided. A multi-dimensional dataset comparison includes receiving a plurality of datasets, each including a plurality of coordinates, wherein a subset of coordinates defines a geo-fence. For a coordinate within a geo-fence of one of the plurality of datasets, determining analogous coordinates in each of the other datasets, the analogous coordinates defining a coordinate input set, and performing in parallel an operation on the coordinate input set to determine whether an entry is present at a coordinate of the coordinate input set.
US09177037B2 In-memory runtime for multidimensional analytical views
A multi-dimensional analytical view (MDAV) calculation can be enhanced by use of an in-memory MDAV runtime at a search engine server. The in-memory MDAV runtime can perform all or some of the processing required to respond to a data request that requires some analytical processing.
US09177036B2 Efficient assignment of query requests between analytical engines of differing complexity
Runtime performance of report generation and other response to query requests can be improve using a report analyzer that can parse the query request and distribute the necessary analytical task among two or more analytical engines of varying levels of complexity.
US09177034B2 Searchable data in an object storage system
A searchable data storage system is described herein. The storage system includes zones that are independent, and autonomous from each other. The zones include nodes that are independent and autonomous. The nodes include storage devices. When a data item is stored, a local database is updated with information about the newly stored data item. When a search for a data item meeting certain metadata criteria is received, multiple concurrent searches are conducted across all storage devices in all nodes in all zones of the storage system. The configuration of the data storage system allows a parallel concurrent search at constituent storage devices to be performed quickly.
US09177032B2 Decision device and method thereof
Decision devices, systems, and methods to provide a product resource are provided herein. The decision devices include an analysis engine. The analysis engine receives an information resource and at least one product parameter. The analysis engine searches the information resource to identify at least one search result and dynamically analyzes the at least one search result to provide the product resource.
US09177031B2 Method, apparatus, and computer program product for ranking content channels
A method, apparatus and computer program product are provided for ranking channel pages of a host system. Content channels may comprise content relating to a particular category or having a commonality. Explicit data provided by user input, and/or implicit data derived or received from a user device or third party may be used to generate explicit and/or implicit parameters. Based on the parameters, content channels may be ranked and displayed in an order based on the ranking, and/or a home content channel may be identified. The host system may therefore target a user with relevant content.
US09177024B2 System, method, and computer-readable medium for optimizing database queries which use spools during query execution
A database system comprises a processing module, and a storage device communicatively coupled with the processing module and allocated thereto. The storage device stores a base table allocated to the processing module. The processing module receives a database query from a client computer system, and generates a spool based upon a number of columns of a table, and partitions at least one column of the spool based upon the database query received from the client computer system.
US09177022B2 User pipeline configuration for rule-based query transformation, generation and result display
A query pipeline for an enterprise search system is configurable by a user of the system. A user may create rules for custom query transformation and parallel query generation, federation of queries, mixing of results and application of display layouts to the received search results. A user interface (UI) assists a user in configuring the search pipeline. For example, a user may enter condition action rules for queries that affect how a query is transformed, how parallel queries are generated, how queries are federated, how search results are ranked and displayed, how rules are ordered and the like.
US09177019B2 Computer system for optimizing the processing of a query
A computer system including a database having a database table for storing records including first columns for storing data values, and at least one second column for storing keys identifying records stored in the database. The computer system also including a set of index tables with each having assigned thereto an index table identifier, an arrangement for receiving a query an arrangement for storing a predefined ordered sequence of index table identifiers, and an arrangement for processing the query by checking each one of the index tables for being relevant for the execution of the query, storing the index table identifier for each relevant index table in a query execution table, sorting the query execution table in accordance with the predefined ordered sequence, and executing the query using the index tables identified in the query execution table in the order given by the sorting of the query execution table.
US09177018B2 Cross language search options
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for cross-language image search. One method includes receiving an image search query and image search results responsive to the image search query. Translations of the image search query into other languages are obtained, and search results responsive to each of the translations are received. Instructions are provided to a client device. The instructions cause the client device to present a user interface that includes one or more of the image search results responsive to the image search query and a cross-language search option for each of the translations. Each cross-language search option includes the translation and a preview of the image search results responsive to the translation.
US09177016B2 Saved queries in a social networking system
A user saves a structured query defining connections between two or more objects maintained by a social networking system. The social networking system finds objects matching the structured query, either by periodically performing searches for new objects or by analyzing objects as they are added or modified. The user creating the saved query can subsequently view the matching objects.
US09177015B2 Method and system for managing images and geographic location data in a mobile device
A mobile communication device and a method for managing images, associated geographic location data, and associated supplemental information, in which geographic location data is generated based on a current location of the mobile communication device; a map corresponding to the generated geographic location data is displayed; a plurality of images and associated supplemental information corresponding to each image in a list mode are displayed in a first user interface, wherein the displayed associated supplemental information comprises description information and a street address; a selection of the plurality images, the associated description information, and the associated street address is received; the selected associated location information is displayed in a second user interface, wherein the second user interface comprises an editing mode; and the supplemental information is edited in the edit mode by receiving note information and the note information is associated with the selected associated description information.
US09177011B2 Systems and methods for locating application specific data
A system and a method for locating application-specific data that has been previously deleted and located in an address of the data storage device marked as being available for storing new data. The method includes accessing unidentified data from at least one data storage device; examining the unidentified data to detect at least one application-specific data pattern associated with at least one application; for each detected application-specific data pattern, executing an application-specific validation process to determine whether the unidentified data includes valid data associated with a corresponding application; and if it is determined that the unidentified data includes valid data associated with the corresponding application, then recovering the valid data.
US09177009B2 Generation based update system
Techniques are directed to managing image generation for desktop and screen sharing systems as well as for large image systems such as mapping. An apparatus may comprise a logic device, a remote sharing module and an image generation module. The remote sharing module is operative on the logic device to share an image with one or more client devices. The image may be divided into a plurality of tiles each corresponding to a portion of the shared image. The image generation module is operative on the logic device to determine a version of each of the plurality of tiles and compares the version of each of the plurality of tiles with a received client version of the same image.
US09177007B2 Computer implemented methods and apparatus to interact with records using a publisher of an information feed of an online social network
Disclosed are methods, apparatus, systems, and computer-readable storage media for interacting with records using a publisher configured to publish information to a feed of a social network. In some implementations, a computing device receives a request to interact with a child record related to a parent record stored in a database system. The request is generated via the publisher displayed in a user interface on a display device. The user interface is also configured to display the feed in association with an entity of the social network. Child record information indicating a type of the child record and field data to populate one or more fields of the child record can be received. The field data is differentiated from message content generated via the publisher to include in a feed item for presentation in the feed when displayed to one or more users following the parent record. The requested interaction with the child record can be performed using the child record information.
US09177003B2 Manipulating sets of heirarchical data
Embodiments of methods, apparatus, devices and/or systems for manipulating hierarchical sets of data are discussed. For example, in one embodiment, a method of splitting a first tree into at least second and third trees includes the following. A first tree is converted to a first numeral via a computing platform. The first numeral is factored into at least second and third numerals. The at least second and third numerals are converted to at least second and third trees. Many other embodiments are disclosed.
US09177001B2 Data index using a linked data standard
A data indexing system including a plurality of servers and a tracked resource set client is provided. Each of the servers includes a plurality of resources that are part of a resource set. Each of the servers also includes a tracked resource set corresponding to the resource set. The tracked resource set describes the plurality of resources located in the resource set. The server identifies the plurality of resources using rules of linked data. The tracked resource set client is in communication with the plurality of servers. The tracked resource set client has a data index. The data index is built and kept up to date using the tracked resource set of each of the plurality of servers.
US09177000B2 Data index using a linked data standard
A data indexing system including a plurality of servers and a tracked resource set client is provided. Each of the servers includes a plurality of resources that are part of a resource set. Each of the servers also includes a tracked resource set corresponding to the resource set. The tracked resource set describes the plurality of resources located in the resource set. The server identifies the plurality of resources using rules of linked data. The tracked resource set client is in communication with the plurality of servers. The tracked resource set client has a data index. The data index is built and kept up to date using the tracked resource set of each of the plurality of servers.
US09176996B2 Automated resolution of database dictionary conflicts
Copying data in a table from a source database to a target database is performed by copying the table into a conflicts schema. A first INSERT/SELECT statement is executed to copy data from the table. Then, in response to a determination that the table definition for the table in a source database dictionary is not compatible with a table definition for the table in a target database dictionary, the INSERT/SELECT statement execution is rolled back in response to a determination that the data from the first INSERT/SELECT statement did not fit in a table in the target schema of the target database. A second INSERT/SELECT statement is executed including a WHERE clause to copy data from the table to the target schema of the target database. In response to a determination that the second INSERT/SELECT statement did not copy data from the table to the target schema of the target database, a third INSERT/SELECT statement is executed forcing the data to fit.
US09176995B2 Organization of data within a database
A computer implemented method is provided for processing data representing a data entity having sub entities. The method includes analyzing queries to the data entity for deriving information about sets of the sub entities frequently queried together, and grouping the sub entities to a number of banks, each bank having a maximum width, based on the information about sets of sub entities frequently queried together, in order to reduce an average number of banks to be accessed for data retrieval.
US09176993B2 Efficiently identifying images, videos, songs or documents most relevant to the user using binary search trees on attributes for guiding relevance feedback
A method, system and computer program product for efficiently identifying images, videos, audio files or documents relevant to a user using binary search trees in attribute space for guiding relevance feedback. A binary tree is constructed for each relative attribute of interest. A “pivot exemplar” (at a node of the binary tree) is set for each relative attribute's binary tree as corresponding to the database image, video, audio file or document with a median relative attribute value among that subtree's child examples. A pivot exemplar out of the available current pivot exemplars that has the highest expected information gain is selected to be provided to the user. Comparative attribute feedback is then received from the user regarding whether a degree of the attribute in the user's target image, video, audio file or document is more, less or equal with the attribute displayed in the selected pivot exemplar.
US09176992B2 Photosharing server filters for automatic storage and sharing of digital files
A method and system for providing on online file- service that automatically stores and organizes digital files. The method and system include providing the server with a set of trigger handlers that are each configured to perform a particular action on a digital file. The user may log into the server and specify attribute criteria for each of the trigger handlers. Digital files uploaded by the user are received by the server, wherein each file has a plurality of attributes associated therewith. The attributes of each file are then compared with the attribute criteria entered by the user for each of the trigger handlers. And upon a match, the corresponding trigger handler is invoked, such that actions are automatically performed on the digital files.
US09176990B2 Visual image annotation, tagging of infrared images, and infrared image linking
Methods used with a thermal imager in capturing a primary thermal image of an object or scene and then associating it, as desired, with any of a multitude of information relating to the object or scene. The related information can be associated with the primary thermal image in the field after the image is captured. The related information can pertain to further detail regarding the object, the surroundings of the scene, and/or surroundings of the location of the scene, which when associated with the primary thermal image, collectively represents a form of asset information card for the image.
US09176989B2 Image quality analysis for searches
Image analysis includes: determining, using one or more processors, an image quality score associated with an image, including: determining a foreground and a background in the image; calculating a set of one or more characteristic parameters of the image based on the determined foreground and background; calculating the image quality score based at least in part on the set of characteristic parameters, wherein calculating the image quality score comprises using an image quality computation model that has been pre-trained; and in response to a search query, generating a set of search results that includes a set the images, wherein inclusion of the images or ranking of the search results is based at least in part on image quality scores associated with the set of images.
US09176984B2 Mixed media reality retrieval of differentially-weighted links
An MMR system for publishing comprises a plurality of mobile devices, an MMR gateway, an MMR matching unit and an MMR publisher integrated into a network with an advertiser, an ad broker, and an MMR service bureau. The MMR matching unit receives an image query from the MMR gateway and sends it to one or more of the recognition units to identify a result including a document, the page and the location on the page. The MMR service bureau uses the result to retrieve advertising or other links associated with the location on the page. The list of results and links are sent back to the MMR gateway for presentation on the mobile device. The present invention also includes a number of novel methods including a differentially weighting links associated with an MMR document.
US09176982B2 System and method for capturing an image of a software environment
A method and system for optimally capturing an image on a physical or virtual environment and transferring it to a target system, by leveraging the capabilities of the operating system residing on the source system to manipulate the file system of the source storage device, and by presenting the target data storage as a local simulated disk to the source environment.
US09176979B2 System and method for analyzing data
A computer-implemented method, computer program product, and computing system for defining at least a portion within a simulation modeling file for copying from an original location, thus defining an identified portion. A destination location is defined for the identified portion. A multi-threaded copying procedure is effectuated to copy the identified portion from the original location to the destination location, thus generating a copied portion of the simulation modeling file. The multi-threaded copying procedure utilizes at least two processing threads.
US09176977B2 Compression/decompression accelerator protocol for software/hardware integration
Embodiments relate to providing a data stream interface for offloading the inflation/deflation processing of data to a stateless compression accelerator. An aspect includes transmitting a request to inflate or deflate a data stream to a compression accelerator. The request may include references to an input buffer for storing input data from the data stream, an output buffer for storing processed input data, and a state data control block for storing a stream state. The stream state is provided to the compression accelerator to continue processing the data stream responsive to the request being a subsequent request. The compression accelerator is instructed to store a current stream state in the state data control block responsive to the request being a non-final request. Accordingly, the current stream state is received from the compression accelerator responsive to the request being a non-final request. The processed input data is received from the compression accelerator.
US09176973B1 Recursive-capable lossless compression mechanism
Computer-executed method for losslessly compressing and decompressing electronic media data. The method is executed in four phases. During the initial phase, the most significant bits are removed. During the second phase, data segments capable of occupying less space are replaced with a nominator of a fixed field of denominators, and the resultant data is hashed. In the third phase, the hashed data is compressed using an entropy reduction technique. In the fourth phase, the compressed data is stored using an arithmetic coding. Multiple passes may be performed, therefore increasing the compression ratio.
US09176972B1 Implied M83 names in alternate name generation in directories supporting multiple naming protocols
An improved technique involves providing a naming scheme that uses a unique numeric identifier associated with a particular naming protocol. Along these lines, when a storage processor receives a first name of a file that conforms to a first naming protocol, the storage processor places the first name and an inode number corresponding to the file in a directory entry. The storage processor associates this entry with a unique numeric identifier by which the entry can be located within the directory. Based on this unique identifier, the storage processor is configured to generate the second name that conforms to the second naming protocol.
US09176967B2 File load balancing in an N-level directory tree of a data storage system
Implementations of the present disclosure involve a system and/or method for storing one or more data files in an n-level directory tree of a data storage system. In general, the system and/or method computes an n-byte value from a data file name which is used to create a directory path in the data storage system, where parts of the n-byte value are used to form each directory name in the directory path. Storage and retrieval of a data file is performed by storing in or retrieving data files from the computed directory. In one embodiment, the calculated n-byte value is obtained by computing the value with a cyclic redundancy check (CRC) algorithm. Use of the CRC algorithm to compute the directory path provides a balanced set of directories and number of data files that is repeatable such that location and retrieval of the data file is accomplished without the need to search through each directory of the system.
US09176966B2 Automated presentation of information using infographics
In one embodiment, a method for creating one or more infographics, comprising: receiving and storing data associated with an individual or an entity, in a format according to a schema that includes at least two properties associated with the individual or entity; reading at least a portion of the data; determining which of the at least two properties in the schema do not have corresponding read data associated with the individual or entity; based on that determination, selecting an infographic definition from among a plurality of infographic definitions defining the appearance of at least a portion of an infographic; generating one or more infographics based on (i) the at least a portion of the data and (ii) the selected infographic definition; and providing the one or more generated infographics to an output device.
US09176962B2 Digital media asset browsing with audio cues
Methods, systems and apparatus for image-based browsing through a plurality of digital media assets assisted by media cues are disclosed. The media cues can be provided by playback of short audio segments, referred to as snippets, of the digital media assets being browsed. The digital media assets can be grouped into collections of digital media assets. In one embodiment, as a user browses through digital media assets using visual representations of the collections of digital media assets, media cues can be provided.
US09176960B2 Playlist of multiple objects across multiple providers
A system includes a device such as a television or multimedia player that has access to content residing at various storage sites and multimedia content providers. For example, the device has access to locally stored content, remotely stored content, music content that resides at music service providers such as Rhapsody and video content from multiple providers such as YouTube, NetFlix, Amazon, VuDu, etc. The user is provided with tools to create a playlist of content where the content includes, for example, one or more videos from local storage and remote services such as YouTube, NetFlix, Amazon, VuDu, etc.
US09176958B2 Method and apparatus for music searching
In an exemplary embodiment of this disclosure, a method may include generating a tempo scale set based on a received query, where the query includes a plurality of query values defining a tempo of music to be searched. A tempo word set may be constructed based on the generated tempo scale set. The tempo word set may include one or more tempo words, where each tempo word includes at least one tempo scale in the tempo scale set. The music may be identified using the constructed tempo word set.
US09176949B2 Systems and methods for sentence comparison and sentence-based search
Systems and methods for performing logical semantic sentence comparisons and sentence-based searches. Training is performed by running an NLP pipeline on unstructured text comprising sentences and creating sentence matrix representations on the unstructured text; storing the matrix representations in an indexed database; combining the stored matrix representations; running an SVD on the combined matrix; storing the SVD components in the indexed database; reiterating through the output of the NLP pipeline the sentences of the unstructured training text to form a low-dimensional matrix conversion for each sentence for storage in the database based on the calculated SVD components. Subsequent query statements are run through the same process based and converted into low-dimensional matrix representations using the SVD components from training; the low-dimensionality query matrix is compared to the stored low-dimensional matrices to determine the closest relevant documents, that are returned to the user.
US09176947B2 Dynamically generated phrase-based assisted input
Techniques are disclosed for supplying users in an online environment with a safe and effective chat facility. The chat facility is “safe” in the sense that the ability of users to compose inappropriate messages is greatly restricted, while “effective” in the sense that users are still allowed a broad range of expressivity in composing and exchanging chat messages.
US09176937B2 Ensuring user interface specification accurately describes user interface after updates to user interface
A method, system and computer program product for ensuring a user interface specification accurately describes its corresponding user interface. The system links sections of the user interface code with corresponding user interface objects. Furthermore, the system links these sections of the user interface code with corresponding sections of the user interface specification. Upon detecting a modification to the user interface code which reflects an update to the user interface, the system notifies the user that the user interface specification needs to be updated. By linking the user interface objects to the user interface code and linking the user interface code to the corresponding sections of the user interface specification, appropriate modifications to the user interface specification can be recommended or implemented based on the modifications to the corresponding sections of the user interface code, which reflect the changes to the corresponding objects on the user interface.
US09176936B2 Transliteration pair matching
Feature sequences are extracted, as individual letters separated by spaces, from a digital representation of a proper name in a first language to obtain a first orthographic feature sequence set; and from a digital representation of a proper name in a second language to obtain a second orthographic feature sequence set. The first and second orthographic feature sequence sets (a transliteration pair) are compared to determine a similarity score, based on a similarity model including a plurality of conditional probabilities of known orthographic feature sequences in the first language given known orthographic feature sequences in the second language and a plurality of conditional probabilities of known orthographic feature sequences in the second language given known orthographic feature sequences in the first language. Based on at least one threshold value, it is determined whether the transliteration pair belong to an identical actual proper name.
US09176934B2 User interface for nonuniform access control system and methods
The term “access-control-discontinuous hyperlink” is used to describe a hyperlink which at least one user (an authorized user who could be reading its containing document) isn't authorized to follow. Discontinuous hyperlinks are automatically detected at various times, including at the end of document editing. If any are found, the operator is notified and given options to reduce the number of discontinuous hyperlinks and to reduce the number of affected users. Several alternative views of relevant information are provided, integrated with common document editing user interface elements. Sorted views enable the operator to identify and to remedy problems more efficiently and with greater confidence. Access dependency settings for selected text can be inserted with a single command. The operator can preview what various sets of users would see. Users are graphically represented by displays comprising photographic likenesses. Groups can be graphically represented by displays comprising photographic likenesses of selected members.
US09176932B2 Method for detecting falls and a fall detector
A method for detecting a fall by a user includes a method of detecting a fall by a user. The method includes processing measurements obtained from one or more sensors to extract a respective value for a plurality of features associated with a fall. A respective log likelihood ratio for each of the values is determined. Whether the user has fallen is determined based on the determined log likelihood ratios.
US09176931B2 Software tool for implementing modified QR decomposition in hardware
System and method for developing a circuit for QR decomposition with auxiliary functionality. A first function is included in a first program. The first function is configurable to specify an auxiliary function to be performed by a modified QR decomposition circuit in addition to QR decomposition of a matrix A into two matrices Q and R using a Modified Gram Schmidt process. A second program is automatically generated based on configuration of the QR decomposition and the first function. The second program includes program code implementing the QR decomposition and the auxiliary function for the first function in the first program. A hardware configuration program (HCP) may be automatically generated based on the first program, including the second program, where the HCP is deployable to hardware, e.g., a programmable hardware element, thereby implementing the modified QR decomposition circuit, including the QR decomposition of the matrix A and the auxiliary function.
US09176930B2 Methods for approximating hessian times vector operation in full wavefield inversion
Method for estimating the Hessian of the objective function, times a vector, in order to compute an update in an iterative optimization solution to a partial differential equation such as the wave equation, used for example in full wave field inversion of seismic data. The Hessian times vector operation is approximated as one forward wave propagation (24) and one gradient computation (25) in a modified subsurface model (23). The modified subsurface model may be a linear combination of the current subsurface model (20) and the vector (21) to be multiplied by the Hessian matrix. The forward-modeled data from the modified model are treated as a field measurement in the data residual of the objective function for the gradient computation in the modified model. In model parameter estimation by iterative inversion of geophysical data, the vector in the first iteration may be the gradient of the objective function.
US09176927B2 Methods and systems for decoding polar codes
A polar code decoder includes: processing elements each receiving a pair of input values and applying a first or a second predetermined mathematical function depending on a provided function control signal; a first memory that stores at least one of the outputs from processing elements and a plurality of channel values relating to a received polar code to be decoded; a second memory that stores indices of a plurality of frozen bits each representing a bit within an information-bit vector of the polar code being decoded; and a computation block that receives a plurality of inputs from a portion of the processing elements and generates an output that is can be set to a predetermined frozen value or to a calculated value, depending on whether a current index of the bit being decoded is indicated as frozen or not frozen.
US09176921B2 Dynamic address change optimizations
A method of setting an address of a component that includes determining a characterization value associated with a consumable, calculating a number of address change operations based upon the characterization value, and setting a last address generated from the number of address change operations as the new address of the component, wherein the characterization value is determined based upon a usage of the consumable.
US09176915B2 Data storage device carrier system
A data storage device carrier system includes a carrier configured to support one or more data storage devices, a backplane, including one or more coupling connector devices configured to electrically couple with a motherboard, and an interposer board operable to couple a plurality of the data storage devices supported by the carrier with the backplane. In an embodiment, the one or more coupling connector devices are operable to transfer communication signals and electrical power. The interposer board is operable to provide the electrical power from a single port on the backplane to each of the plurality of the data storage devices. The interposer board is also operable to pass communication signals between a primary port on the backplane to a first one of the plurality of the data storage devices, and to pass communication signals between a secondary port on the backplane to a second one of the plurality of the data storage devices.
US09176913B2 Coherence switch for I/O traffic
A system, apparatus, and method for routing traffic in a SoC from I/O devices to memory. A coherence switch routes coherent traffic through a coherency port on a processor complex to a real-time port of a memory controller. The coherence switch routes non-coherent traffic to a non-real time port of the memory controller. The coherence switch can also dynamically switch traffic between the two paths. The routing of traffic can be configured via a configuration register, and while software can initiate an update to the configuration register, the actual coherence switch hardware will implement the update. Software can write to a software-writeable copy of the configuration register to initiate an update to the flow path to memory for a transaction identifier. The coherence switch detects the update to the software-writeable copy, and then the coherence switch updates the working copy of the configuration register and implements the new routing.
US09176912B2 Processor to message-based network interface using speculative techniques
Methods and systems are provided for a message network interface unit (a message interface unit), coupled to a processor, that is used for allowing the processor to send messages to a hardware unit. Methods and systems are also provided for a message interface unit, coupled to a processor, that is used for allowing a processor to receive messages from a hardware unit. The message network interface unit described herein may allow for the implementation data-intensive, real time applications, which require a substantially low message response latency and a substantially high message throughput.
US09176906B2 Memory controller and memory system including the same
A memory system includes a memory unit and a memory controller. The memory unit includes a plurality of memory banks, wherein an information stored in a memory bank is accessed via a word line and a bit line. The memory controller is configured to limit repetitive accessing of a same word line or a same bit line so that the number of consecutive access is less than a predetermined critical value.
US09176904B2 Control of page access in memory
The present techniques provide systems and methods of controlling access to more than one open page in a memory component, such as a memory bank. Several components may request access to the memory banks. A controller can receive the requests and open or close the pages in the memory bank in response to the requests. In some embodiments, the controller assigns priority to some components requesting access, and assigns a specific page in a memory bank to the priority component. Further, additional available pages in the same memory bank may also be opened by other priority components, or by components with lower priorities. The controller may conserve power, or may increase the efficiency of processing transactions between components and the memory bank by closing pages after time outs, after transactions are complete, or in response to a number of requests received by masters.
US09176899B2 Communication protocol placement into switch memory
Direct memory transfer of data from the memory of a server to a memory of a switch. A server identifies a block of data in the memory of the server and a corresponding memory address space in the server. The server identifies a block of memory in the switch. The block of memory is at least the same size of the block of data. The switch comprises a network protocol. The server transfers the block of data into the block of memory. Based on the network protocol, the switch maps a network relationship. The mapping indicates a target server for the transferred block of data to be transmitted to.
US09176897B2 Writing area security system
A writing area security system (10) includes a CPU (34), a flash memory (64), and a memory controller (62). The memory controller (62), when receiving a read command of data stored in the flash memory (64) from the CPU (34), performs a parity check on the data. The memory controller (62) outputs the data to the CPU (34) only when the parity of the read data is correct.
US09176894B2 Managing resources using resource expiration data
Resource management techniques, such as cache optimization, are employed to organize resources within caches such that the most requested content (e.g., the most popular content) is more readily available. A service provider utilizes content expiration data as indicative of resource popularity. As resources are requested, the resources propagate through a cache server hierarchy associated with the service provider. More frequently requested resources are maintained at edge cache servers based on shorter expiration data that is reset with each repeated request. Less frequently requested resources are maintained at higher levels of a cache server hierarchy based on longer expiration data associated with cache servers higher on the hierarchy.
US09176890B2 Non-disruptive modification of a device mapper stack
Embodiments relate to non-disruptive modification of a device mapper stack. Aspects include receiving the device mapper stack comprising a first device mapper layer having an active mapping table and creating a second device mapper layer having a copy of the active mapping table from the first device mapper layer. Aspects further include creating an inactive mapping table having a desired mapping logic in the first device mapper layer and suspending and resuming an operation of the first device mapper layer. Suspending and resuming causes the active mapping table of the first device mapper layer to be replaced with the inactive mapping table of the first device mapper layer.
US09176887B2 Compressed level two block buffer metadata cache
Example apparatus and methods provide metadata for a file system operation from a multi-level data store. The data store may include an in-memory level one (L1) cache, an in-memory level two (L2) cache, and an external metadata store not located in the memory associated with the L1 and L2 caches. The L1 cache stores metadata in a non-compressed format that can directly service a file system operation while the L2 cache stores metadata in a compressed format that cannot directly service an operation. Metadata to support a file system operation may be sought in the L1 cache first, then in the L2 cache, and then finally in the external metadata store. When metadata is provided from the L2 cache, it is decompressed before being provided to the L1 cache. Metadata added to the L2 cache may be compressed after or in parallel with being provided to the L1 cache.
US09176886B2 Method and system for filling cache memory for cache memory initialization
Embodiments of the present invention relate to the filling of cache memory for cache memory initialization. In one embodiment, cache architecture dependent data is loaded into cacheable memory. The flow of initialization execution is transferred to the cache architecture dependent data in response to a trigger that indicates that an initialization of cache memory has been initiated. Each line contained in cache memory is filled using the cache architecture dependent data. The flow of initialization execution is returned back to the place in the initialization process from which it was transferred when the filling of cache memory is completed.
US09176881B2 Computer system and storage control method
The entirety or a part of free space of a second storage device included in a host computer is used as a cache memory region (external cache) outside of a storage apparatus. If Input/Output (I/O) in the host computer is Write, a Write request is transmitted from the host computer to a storage apparatus, the storage apparatus writes data associated with the Write request into a main cache that is a cache memory region included in this storage apparatus, and the storage apparatus writes the data in the main cache into a first storage device included in the storage apparatus. The storage apparatus writes the data in the main cache into an external cache included in the host computer. If the I/O in the host computer is Read, the host computer determines whether or not Read data as target data of the Read exists in the external cache. If a result of the determination is positive, the host computer reads the Read data from the external cache.
US09176879B2 Least recently used mechanism for cache line eviction from a cache memory
A mechanism for evicting a cache line from a cache memory includes first selecting for eviction a least recently used cache line of a group of invalid cache lines. If all cache lines are valid, selecting for eviction a least recently used cache line of a group of cache lines in which no cache line of the group of cache lines is also stored within a higher level cache memory such as the L1 cache, for example. Lastly, if all cache lines are valid and there are no non-inclusive cache lines, selecting for eviction the least recently used cache line stored in the cache memory.
US09176875B2 Power gating a portion of a cache memory
In an embodiment, a processor includes multiple tiles, each including a core and a tile cache hierarchy. This tile cache hierarchy includes a first level cache, a mid-level cache (MLC) and a last level cache (LLC), and each of these caches is private to the tile. A controller coupled to the tiles includes a cache power control logic to receive utilization information regarding the core and the tile cache hierarchy of a tile and to cause the LLC of the tile to be independently power gated, based at least in part on this information. Other embodiments are described and claimed.
US09176871B1 Garbage collection of chunks
Various techniques are provided for performing garbage collection in a chunk store that is being used to implement a hierarchical file system. In general, the techniques involve a “trace” phase in which all chunks that correspond to current versions of files are marked, and then a sweep phase in which all chunks that were not marked during the trace phase are reclaimed. Various techniques are also described for using snapshots to avoid the need to halt operations on the file system while the trace phase is being performed. In addition, techniques are provided for using a cache of last-touched timestamps to avoid the need to mark all current chunks in each trace phase.
US09176870B2 Off-heap direct-memory data stores, methods of creating and/or managing off-heap direct-memory data stores, and/or systems including off-heap direct memory data store
Certain example embodiments relate to a highly-concurrent, predictable, fast, self-managed, in-process space for storing data that is hidden away from the garbage collector and its related pauses. More particularly, certain example embodiments relate to improved memory management techniques for computer systems that leverage an off-heap direct-memory data store that is massively scalable and highly efficient. The off-heap store may be provided in connection with a Java-based environment, and garbage collection may be completely or nearly completely avoided for the off-heap store. The off-heap store may be integrated into a tiered storage solution in certain example embodiments.
US09176868B2 Translation layer in a solid state storage device
Solid state storage devices and methods for flash translation layers are disclosed. In one such translation layer, a sector indication is translated to a memory location by a parallel unit look-up table is populated by memory device enumeration at initialization. Each table entry is comprised of communication channel, chip enable, logical unit, and plane for each operating memory device found. When the sector indication is received, a modulo function operates on entries of the look-up table in order to determine the memory location associated with the sector indication.
US09176866B2 Active recycling for solid state drive
A solid state drive and a method for providing active recycling for the solid state drive are disclosed. The solid state drive includes a plurality of blocks and each of the plurality of blocks includes a plurality of pages. The method steps include receiving a read request from a data requester; identifying at least one page containing data requested by the read request; determining whether the at least one page belongs to a block identified for active recycling; writing the at least one page to a different block when the at least one page belongs to the block identified for active recycling; and sending the at least one page to the data requester in response to the read request.
US09176865B2 Data writing method, memory controller, and memory storage device
A data writing method for controlling a rewritable non-volatile memory module having physical erasing units is provided. The physical erasing units are grouped into a first buffer area and a second buffer area. A write command instructed to write a data to a first logical address is received. Whether the quantity of the data is smaller than a predetermined value is determined. If so, the data is written into the first buffer area or the second buffer area. If the data is written into the second buffer area, at least one second logical address mapped to at least one physical programing unit in the first buffer area is obtained, and valid data belonging to the second logical address is merged, wherein the number of the second logical address is smaller than a merging threshold. Thereby, the time for a host system to wait for a write success message is shortened.
US09176854B2 Presenting enclosure cache as local cache in an enclosure attached server
Presenting enclosure cache as local cache in an enclosure attached server, including: determining, by the enclosure, a cache hit rate for local server cache in each of a plurality of enclosure attached servers; determining, by the enclosure, an amount of available enclosure cache for use by one or more of the enclosure attached servers; and offering, by the enclosure, some portion of the available enclosure cache to an enclosure attached server in dependence upon the cache hit rate and the amount of available enclosure cache.
US09176853B2 Managing copy-on-writes to snapshots
An attempt to write to a block of data in a main volume of data is detected. An indicator associated with the block of data is accessed before a copy-on-write operation to a snapshot volume is performed for the block of data. The indicator is used to determine whether the copy-on-write operation is to be performed for the block of data.
US09176847B2 Managing diagnostic information
A method of and system for managing diagnostic information is disclosed. The method and system may include creating a data space in volatile memory. The data space may be configured to collect a selected diagnostic information. The selected diagnostic information may include a first diagnostic information from a first source and a second diagnostic information from a second source. The method and system may include collecting in the data space the selected diagnostic information. The method and system may include releasing from the data space at least a portion of the selected diagnostic information in response to a triggering event.
US09176843B1 Framework for efficient security coverage of mobile software applications
A method is described that includes receiving an application and generating a representation of the application that describes specific states of the application and specific state transitions of the application. The method further includes identifying a region of interest of the application based on rules and observations of the application's execution. The method further includes determining specific stimuli that will cause one or more state transitions within the application to reach the region of interest. The method further includes enabling one or more monitors within the application's run time environment and applying the stimuli. The method further includes generating monitoring information from the one or more monitors. The method further includes applying rules to the monitoring information to determine a next set of stimuli to be applied to the application in pursuit of determining whether the region of interest corresponds to improperly behaving code.
US09176838B2 Encrypted data inspection in a network environment
Technologies are provided in example embodiments for analyzing an encrypted network flow. The technologies include monitoring the encrypted network flow between a first node and a second node, the network flow initiated from the first node; duplicating the encrypted network flow to form a copy of the encrypted network flow; decrypting the copy of the encrypted network flow using a shared secret, the shared secret associated with the first node and the second node; and scanning the network flow copy for targeted data.
US09176837B2 In situ processor re-characterization
A re-characterization process is provided that adjusts one or more operating parameters of a processor to improve the health (e.g., reduce errors) of the processor. The parameters include voltage and/or clock frequency, as examples. The processor can be an inactive or active processor for which the re-characterization process is performed. It is performed, in one instance, by a hardware controller in real-time.
US09176833B2 Tolerating failures using concurrency in a cluster
A system, and computer program product for tolerating failures using concurrency in a cluster are provided in the illustrative embodiments. A failure is detected in a first computing node serving an application in a cluster. A subset of actions is selected from a set of actions, the set of actions configured to transfer the serving of the application from the first computing node to a second computing node in the cluster. A waiting period is set for the first computing node. The first computing node is allowed to continue serving the application during the waiting period. During the waiting period, concurrently with the first computing node serving the application, the subset of actions is performed at the second computing node. Responsive to receiving a signal of activity from the first computing node during the waiting period, the concurrent operation of the second computing node is aborted.
US09176831B2 Rearranging programming data to avoid hard errors
This disclosure relates to avoiding a hard error in memory during write time by shifting data to be programmed to memory to mask the hard error. In one implementation, a method of programming data to a memory array includes obtaining error data corresponding to a selected memory cell, shifting a data pattern such that a value to be stored by the selected memory cell matches a value associated with a hard error, and programming the shifted data pattern to memory array such that the value programmed to the selected memory cell matches the value associated with the hard error.
US09176829B2 Managing recovery virtual machines in clustered environment
Techniques involving replication of virtual machines of virtual machines in a clustered environment are described. One representative technique includes receiving a replication request to replicate a primary virtual machine. A clustering broker is configured to act on the replication request on behalf of a cluster of recovery nodes, by at least placing a replicated virtual machine corresponding to the source virtual machine on a recovery node and facilitate tracking the migration of the replicated virtual machine within the cluster. The clustering broker returns an address of the recovery node that has been placed or found through tracking for the particular virtual machine.
US09176828B2 System and method for merging results from multiple runs based on run inputs
The embodiments herein disclose a method for merging results from multiple runs based on run inputs in a source system. The method involves performing first run on a first input, to receive a first result and performing a second run on a second input to receive a second result. The first result and second result are aggregated based on a set of rules and a plurality of merge cases/conditions to obtain a final result. The first run is performed by carrying out a static analysis on the first inputs. The second run is performed by carrying out a static analysis on the second inputs. A method is also provided for merging cobertura coverage and a source code.
US09176824B1 Methods, apparatus and systems for displaying retrieved files from storage on a remote user device
The remote access to backed-up user data techniques include a method, a system, and/or an apparatus. In some embodiments of these techniques, the method includes receiving a request from a user interface to view a backed-up data. The method further includes retrieving a cache entry corresponding to the backed-up data from a cache, displaying contents of the backed-up data in the user interface using the retrieved cache entry, and validating the cache entry after displaying the contents of the backed-up data.
US09176820B2 Disk logging method applicable to storage medium and electronic device, storage medium using the same and electronic device using the same
The present disclosure proposes a disk logging method configured for an electronic device comprising a temporary non-volatile storage medium to log data from a volatile memory to said first storage medium, and the method includes the elements of aggregating data from applications of the electronic device in a queue, transferring the aggregated data to a per device queue targeted toward a native queue of the storage medium, writing the data stored in the native queue of the storage medium into a disk platter of the storage medium, and transmitting an interrupt in response to the completion of the writing of the data to the disk platter, wherein the first batch size is dynamically adjusted such that the step of writing the data to the platter takes more time than the step of transferring the data from the per device queue to the native queue of the storage medium.
US09176819B2 Detecting sensor malfunctions using compression analysis of binary decision diagrams
In particular embodiments, a method includes analyzing a binary decision diagram (BDD) representing a data stream from a sensor to determine a compression rate of the BDD and indicating a sensor malfunction in the sensor if the compression rate of the BDD deviates from a specified compression rate range.
US09176818B2 N-way parity for virtual disk resiliency
Resiliency techniques for a virtual disk are described that enable user control over storage efficiency and recovery time. Configuration parameters for a virtual disk are obtained that indicate a number of available storage devices and a specified tolerance for storage device failures. A default configuration for the virtual disk that designates a default amount of redundancy data to store with client data to balance storage efficiency and recovery time is derived based on the configuration parameters. Options may then be provided to specify a custom configuration that changes the amount of redundancy data to customize the level of storage efficiency and recovery time. The virtual disk is configured and data is stored thereon in accordance with the default configuration or the custom configuration as directed by the user.
US09176813B2 Information processing apparatus, control method
An information processing apparatus includes a memory, and a processor that executes a process in the memory. The process includes detecting a sign of a fault of a storage device that prohibits write access to a storage area of the storage device and permits read access to the storage area during a fault, and storing a copy of data to be written to the storage device as first copy data in the memory when the sign of a fault is detected.
US09176811B2 Storage control apparatus, storage apparatus, information processing system, and storage control method
A storage control apparatus includes a standard read request unit, an error correcting unit, and a high-accuracy read request unit. The standard read request unit is configured to issue a request for a read with standard accuracy to a read address in a memory. The error correcting unit is configured to perform error correction on the basis of an error correcting code and data returned by the memory in response to the read request with the standard accuracy. The high-accuracy read request unit is configured to issue, when an error incapable of being corrected by the error correction is caused, a request again for a read with higher accuracy than the standard accuracy to the read address.
US09176809B2 Time information obtaining device and radio-controlled timepiece
A time information obtaining device and a radio-controlled timepiece are shown. According to one implementation, the time information obtaining device includes the following. A code identifying section identifies each code of a code string in a radio wave. A first portion parity calculating section calculates a portion parity where a parity bit of a variable code is subtracted from a parity code showing a parity bit for a code string portion. A first portion parity deciding section decides a portion parity based on a calculated number of portion parities. A second portion parity deciding section obtains a portion parity from an invariable code other than the variable code. A parity confirming section confirms a match between the portion parities decided by the first portion parity deciding section and the second portion parity deciding section.
US09176805B2 Memory dump optimization in a system
Reducing memory dump data size by: (i) receiving a memory dump data including a set of stack(s), including at least a first stack which includes a current stack portion; (ii) removing from the memory dump data a first removed data portion that comes from a portion of the first stack to yield an optimized memory dump data; (iii) determining respective ranking values for a plurality of ranked data portions from the set of stacks; and (iv) selecting a ranked data portion from the current stack portion of the first stack to be a first removed data portion based, at least in part, upon the ranking values.
US09176803B2 Collecting data from a system in response to an event based on an identification in a file of the data to collect
Embodiments may comprise a data identifier to identify data to collect in response to an event and a data collector to collect the identified data. The data collector may comprise firmware, code in ROM, a state machine, and/or other logic, and the data identifier may also comprise firmware, code in ROM, a state machine, and/or other logic that may access information and/or code in a file or other data storage to identify the data to collect. The data storage may comprise information and/or code to identify the location of data to collect and, in some embodiments, the sequence with which to collect the data.
US09176800B2 Memory refresh methods and apparatuses
Apparatuses and memory refresh methods are disclosed, such as those involving checking a portion of a memory device for errors in response to the memory device being powered on, and reprogramming corrected data to the memory device if errors are found in checking the portion of the nonvolatile memory for errors. Other apparatuses and memory refresh methods are disclosed.
US09176797B1 Workflow processing and methods for auditing and playback of data
A method of transaction capture and playback is provided. The method comprises identifying monitored components, wherein monitored components comprise one or more hardware platforms supporting an enterprise service oriented architecture. Configuration states of monitored components are stored. Transaction messages into and out of the monitored components are captured, including timestamps. Responses received from components not being monitored are captured, including timestamps. A sequence of transactions is executed, in sequence and with the same timing as the captured transaction messages, to reproduce and monitor for failures.