| Document | Document Title |
|---|---|
| US09172310B2 |
Generator including a rectifier system for the electrical voltage supply of a motor vehicle
A generator, for example a three-phase generator including an associated rectifier system, is used, for example for the electrical voltage supply of a motor vehicle. The AC voltage produced by the generator is rectified by the rectifier system having a plurality of rectifying elements 2, 7. Rectifying elements 2 of the rectifier have a plurality of series connections of a self-conducting n-channel JFET and a self-conducting p-channel JFET, the gate terminals being connected to the outer source or drain terminals of the other transistor. Alternatively, the self-conducting JFETS of the rectifying element 2 in FIG. 1 may be replaced by self-conducting MOS field effect transistors (depletion mode MOSFET). The p-channel JFET of the exemplary embodiment according to FIG. 1 is replaced by a self-conducting p-channel MOSFET and the n-channel JFET is replaced by a self-conducting n-channel MOSFET. Furthermore, the gate terminals are connected to the diametrically opposed outer terminals. |
| US09172309B2 |
Switching mode power supply usable in an image forming apparatus, and image forming apparatus and method of supplying power by using the same
A switching mode power supply and a method of supplying power by using the same. The switching mode power supply includes a converting unit to convert an alternating current (AC) voltage input to the switching mode power supply to at least one direct current (DC) voltage by using at least one transformer, and a voltage controller to control a voltage level of an output voltage to be output to a system controller of the image forming apparatus from among the at least one DC voltage, where the system controller controls operations of the image forming apparatus. The voltage controller includes a switching unit to switch the voltage level of the output voltage from a first voltage level to a second voltage level when the image forming apparatus enters a power saving mode, where the second voltage level is lower than the first voltage level. |
| US09172306B2 |
Drive enhancement in switch driver circuitry
A driver circuitry includes a capacitor, a first switch, and a second switch. The capacitor includes a first node and a second node. The first switch is electrically coupled to the first node of the capacitor. The second switch is electrically coupled to the second node of the capacitor. Additionally, the second node of the capacitor and the second switch are electrically coupled to an output pin of the driver circuitry operable to drive an external switch. As discussed herein, settings of the first switch and the second switch control a voltage outputted from the output pin and charging of the capacitor. |
| US09172304B2 |
Constant input current filter using high-frequency switching for power supplies and related system and method
A system includes a constant input current filter configured to draw a constant input current from a power source and to generate a variable output current. The constant input current filter includes a capacitor, a boost converter, and a buck converter. The boost converter is configured to receive at least a portion of the input current and to charge the capacitor using at least the portion of the input current during first time periods associated with operation of a load. The buck converter is configured to discharge the capacitor and to provide an additional current as part of the output current during second time periods associated with operation of the load. The load could represent an electronic device having a time-varying output power characteristic, such as a wireless radio. |
| US09172301B2 |
Synchronous rectification in the three-level inverter-converter topologies
A power module is disclosed having a first module block defining a first rectifier and including a first rectifier switch having a first FET and connected in parallel with a first diode, a second module block including a second FET connected in parallel with a second diode, a third module block including a third FET connected in parallel with a third diode, wherein the second and third module blocks are positioned between first and second terminal interfaces of the power module, and wherein two serially connected diodes are on the first interface side of the power module in parallel with the serially connected second and third module blocks, and a fourth module block defining a second rectifier and including a second rectifier switch having a fourth FET and connected in parallel with a fourth diode. |
| US09172294B2 |
Planar motor and lithographic apparatus comprising such planar motor
A motor includes a stator including a plurality of stator poles arranged in a repetitive arrangement with a first pitch, the stator poles facing a first side of a plane of movement, and a mover including a plurality of mover poles arranged in a repetitive arrangement with a second pitch, the mover poles facing a second, opposite side of the plane of movement. The poles of the stator and/or the mover are provided with a winding to alter a magnetic field in the respective ones of the stator poles and the mover poles in response to an electric current through the respective winding. At least one of the stator and the mover includes a permanent magnet for generating a magnetic field extending from the permanent magnet via at least one respective pole of the stator and the mover to the other one of the stator and the mover and back. |
| US09172293B2 |
Hybrid stepping motor
There is provided a hybrid stepping motor including a rotor including a plurality of rotor small teeth arranged at an equal pitch on an outer circumferential surface thereof, and a stator including a plurality of salient poles, each including a plurality of stator small teeth arranged to face the outer circumferential surface of the rotor via a gap. The stator small teeth have a predetermined stator tooth thickness and are arranged at a predetermined stator tooth pitch. The rotor small teeth have a predetermined rotor tooth thickness and are arranged at a predetermined rotor tooth pitch. A repulsion area ratio which is a ratio of an area of repulsion poles to a total area of all stator small teeth facing the rotor ranges from 0% to a predetermined threshold value. |
| US09172278B2 |
Permanent magnet type rotary electric machine and electric power steering apparatus using the same
Not less than two regions different in magnetic circuit design are provided in a rotational axis direction of the rotor (30), the regions being different by changing a cross-sectional shape in the rotational axis direction in a cross-section perpendicular to a rotational shaft (10) of the rotor (30) having the permanent magnets (1) and the rotor core (2); the supplemental grooves (5) are provided in axial partial regions of each of the teeth (7) of the stator core (3); and the region in which the supplemental groove (5) is provided is each partial region for each region facing a region same in magnetic circuit design of the rotor (30). This enables to reduce cogging torque generated by variations on the rotor side. |
| US09172277B2 |
Actuator
An actuator includes an electrically conductive coil defining a longitudinal axis (L) and having a plurality of winding turns. A magnet is spaced from the winding turns in radial direction. A first conductive element has a mid region covering the coil on a side thereof facing away from the magnet. A second conductive element has a mid region covering the magnet on a side thereof facing away from the winding turns of the coil. The first conductive element projects beyond the coil in axial direction and the second conductive element projects beyond the magnet also in axial direction. The first and second conductive elements have respective collar-shaped projections whereat the first and second conductive elements project beyond the coil and the magnet, respectively. At least one of the first and second conductive elements is made of soft-magnetic powder composite material. |
| US09172275B2 |
Power monitoring and control system and method
A system includes a first controller carried by a first electrical outlet, and a management system in communication with the first controller through a first communication link. A second controller is carried by a second electrical outlet, and an electrical load operates in response to receiving power from the second electrical outlet. The management system determines a performance parameter of the electrical load in response to receiving information corresponding to the operation of the electrical load from the first controller. |
| US09172274B2 |
System, method, and apparatus for operating a power distribution system
A power distribution system includes a plurality of node devices and a computer communicatively coupled to the node devices. The computer includes a memory area configured to store at least one operating parameter of each of the node devices, and a processor that is programmed to determine a desired operating limitation of the power distribution system to be optimized, calculate an effect on the operating limitation based on a modification of the operating parameter of at least one of the node devices, and transmit a command to the node device to cause the node device to modify the operating parameter. |
| US09172262B2 |
Charging device and charging system
A charging device includes a power adapter, a cable assembly, and a control module. The power adapter is used for converting a power supplied from an external power source to a form suitable for charging a battery of an electronic device. The power adapter includes a first magnetic element. The cable assembly is used for electrically connecting the power adapter with the electronic device such that the battery can be charged. The cable assembly includes a first plug connected to the power adapter and a second magnetic element disposed in the first plug. The control module is used for controlling the first magnetic element and the second magnetic element to engage with each other to disconnect the first plug from the power adapter when the battery has been fully recharged. |
| US09172260B2 |
Efficient battery management system
A battery management system that monitors and controls the charging and discharging of a battery pack in the most versatile way at the block level with little dissipative loss but fast balancing is disclosed. The system has capability of using blocks of cells using different chemistry in the same battery pack. Such versatility makes it very useful for usage with erratic grid conditions, solar, wind and other natural energy sources for charging the battery. |
| US09172257B2 |
Converter for balancing the cells of an electric battery
A balancing converter is connected to terminals of cells of an electric battery. The converter includes a quasi-resonant circuit and a pseudo-control circuit coupled by a transformer and implements soft-switching techniques through quasi-resonances. |
| US09172255B2 |
Method and apparatus for performing battery balancing control with aid of pluggable mechanism
A method for performing battery balancing control with aid of pluggable mechanism is provided. The method is applied to a power supply device. The method includes the steps of: providing a pluggable external module, wherein the pluggable external module includes a first connection port, and further includes a set of external balancing circuits corresponding to a set of battery cells of a specific battery module within the power supply device, respectively; and on a case of the specific battery module, providing a second connection port corresponding to the first connection port, allowing the pluggable external module to be coupled to the specific battery module with aid of the pluggable mechanism formed with the first connection port and the second connection port, in order to utilize the set of external balancing circuits to perform balancing operations on the set of battery cells. Associated apparatuses are further provided. |
| US09172254B2 |
Battery pack system
A source of environmental pollution is the burning of fuel by the transportation vehicles (e.g., cars, trucks). The use of electric vehicles (EVs) is perceived as an essential step towards better utilization of energy. Current EVs make use of an electric engine and a battery pack that provides energy to that engine. The technology of electric engines is well developed because of the common use of such engines in trains, submarines and industrial facilities. But, while the battery packs used in EVs have made a lot of progress in the last couple of years, these battery packs still have problems. These battery packs are expansive, heavy, and limited in the amount of energy that they can provide. This obstacle is a major factor that limits the use of EVs today in the mass market. Described herein is an improved EV battery pack system. |
| US09172250B2 |
Electrical distribution system
An electrical generating system for aircraft with one or more engines includes a plurality of generators associated with the engines so as to produce respective AC outputs. The frequencies of these outputs can differ from each other, as a result of differing engine speeds and/or deliberate design, but they are to be connected to a common bus to avoid redundancy of wiring. One or more converters are present between the generators and the bus for adjusting the output frequency of the generators to provide an AC output voltage at a common bus frequency. The system includes a control system for setting the AC bus frequency in such a way that it can vary with time. The bus frequency may follow the natural frequency of the engine, and only small converters are needed to make the already approximately equal generator frequencies identical, so that they can all feed the common bus. |
| US09172248B2 |
Cascaded converter station and cascaded multi-terminal HVDC power transmission system
A cascade converter station and a multi-end cascade high-voltage direct current (HVDC) power transmission system. The converter station includes a low-voltage end converter station (11) and a high-voltage end converter station (12). The high-voltage end converter station (12) is connected in series with the low-voltage end converter station (11) through a medium-voltage direct current (DC) power transmission line (13) and connected to a HVDC power transmission line (14). With the cascade converter station and the multi-end cascade HVDC power transmission system, HVDC power transmission can be achieved in a flexible, reliable and economical manner. |
| US09172241B2 |
Electrostatic discharge protection circuit having high allowable power-up slew rate
A technique for providing electrostatic discharge (ESD) protection in complementary metal-oxide semiconductor (CMOS) technologies is disclosed. A power supply RC-based ESD protection circuit having an RC value in the nanosecond range increases the allowable power-up slew rate so that fast power-up events (e.g., hot-plug and power switching operations) are not erroneously interpreted as ESD events. Because the RC value is small, the layout area needed for the RC-based ESD protection circuit is also reduced. |
| US09172240B2 |
Electric rotating machine with load dump protector
An electric rotating machine for a vehicle is equipped with a load dump protector. The load dump protector works to selectively perform a first and a second load dump protection operation to suppress a voltage surge arising from the load dump. When a rate at which an output voltage from the electric rotating machine is determined to be smaller than a given value, the load dump protector waits for stating the first load dump protection operation until the time when a voltage surge arising from changing of switching devices of a rectifier module of the electric rotating machine is expected to be suppressed and then performs the first load dump protection operation. When the rate is greater than the given value, the load dump protector immediately initiates the second load dump protection operation. This ensures the stability in eliminating the risk of a voltage surge arising from the load dump. |
| US09172238B2 |
Vehicle or environment-controlled unit having a multiphase alternator with a protected high-voltage bus
A mobile environment-controlled unit, such as an over-the-road compartment trailer, having an environmental-control system, such as a refrigeration unit, powered by an alternator and having a high-voltage alternating current (AC) bus. The unit incorporates a high resistance ground scheme and can incorporate a solid-state input module to detect phase-chassis faults. This combination provides an improvement in protection for mobile applications that cannot have a voltage reference (or neutral point) solidly connected to earth ground. |
| US09172236B2 |
Overvoltage protection device having at least one surge arrester
The invention relates to an overvoltage protection device, comprising at least one surge arrester and one switchgear assembly, which is connected in series to the surge arrester and which can be triggered thermally, wherein the aforementioned components form a structural unit, and the thermal tripping means is arranged in the area of the expected heating up of the surge arrester when overloaded. According to the invention, the thermal tripping unit is configured as a stop element through which operating current or surge current does not flow. In the event of thermal overload, the stop element opens a releasing device of the switchgear assembly, wherein said switchgear assembly has an increased self-extinguishing capacity. |
| US09172232B2 |
Charging cable housing apparatus
A charging cable housing apparatus includes a winding core having a charging cable wound around an outer peripheral surface thereof, an end plate provided with a first slit extending from the winding core in a radial direction and having a predetermined width, and a side plate disposed to connect the base plate and the end plate and provided with a second slit having the same width as that of the first slit. One end of the charging cable wound around the winding core is being pulled out through the first slit or the second slit. |
| US09172230B2 |
Cable raceway support device for an aircraft, in particular an aircraft with a structure at least partly formed from a composite material
A cable raceway support device for an aircraft, formed from an electrically conductive material, comprising a pedestal having a fastening plane for the fastening of the device onto a primary structure and also having, on a support face which is an opposite face to the fastening plane, at least one pair of jaws having at least one electrical contact enabling a sliding electrical contact to be formed and the support face has a contact that projects, and also has a jaw overhanging the support face, the jaw forming with part of the pedestal the pair of jaws forming a stirrup-shaped clamp comprising a base and two branches, one branch of the clamp merging with the pedestal, and the other branch of the clamp corresponding to the jaw and bearing a second contact facing the first contact. |
| US09172226B2 |
Multi-core cable and aligning method therefor
One aspect of the invention relates to a multi-core cable in which a cable sheath covers plural electronic wires in each of which a central conductor is covered with a covering. In the multi-core cable, the electronic wires are exposed from a longitudinal end of the cable sheath, and distal ends of exposed portions of the plural electronic wires are parallel aligned, and the exposed portions of the plural electronic wires are fixed by a resin in a place within a range from the end of the cable sheath to a parallel aligned place. |
| US09172225B2 |
Induction-based reference point locator
According to one aspect of the present disclosure, an induction-based reference point locator is provided. The locator includes transmitter locatable at a position on a first side of a structure, the transmitter configured to generate an alternating magnetic field at a desired frequency; and a receiver locatable on a second side of the structure opposite the first side, the receiver configured to detect the magnetic field and provide a directional indication to the position of the transmitter relative to the second side of the structure. |
| US09172219B2 |
Systems and methods for coupling AC power to a rack-level power infrastructure
In accordance with the present disclosure, a detachable power cable interface box (PCIB) for coupling AC power to a rack-level power infrastructure is described. The detachable PCIB includes a body section and a terminal disposed within the body section. The terminal may be coupled to an AC power source. A wiring block may also be disposed within the body, and the modular wiring block may be coupled to the terminal. The wiring block may arrange power input from the AC power source into a pre-determined output configuration corresponding to a detachable interface. The system may also include the detachable interface, and the detachable interface may be configured to couple with an integrated connector of the rack-level power infrastructure. The detachable interface may be common to all types of AC power sources. |
| US09172210B2 |
Mount for semiconductor devices using conformable conductive layers, and method
A mount for semiconductor laser devices comprises thermally conductive anode and cathode blocks on either side of a semiconductor laser device such as a laser diode. Interposed between at least the anode block and the anode of the semiconductor laser device is a sheet of conformable electrically conductive material with high thermal conductivity such as pyrolytic highly-oriented graphite. In some embodiments, a second sheet of such electrically and thermally conductive conformable material is interposed between the cathode of the semiconductor laser device and the cathode block. The semiconductor laser device can be either a single laser diode or a diode bar having a plurality of emitters. A thermally conductive, but electrically insulating, spacer of essentially the same thickness as the laser diode or bar surrounds the diode or bar to prevent mechanical damage while still permitting the conformable material to be maintained in a compressed state and directing current through the laser device. |
| US09172200B2 |
Seeded optical amplifier apparatus for producing Femtosecond pulses
A source of femtosecond optical pulses comprises a seed pulse source arranged to generate seed pulses; an optical amplifier downstream of the seed pulse source, the optical amplifier having a gain bandwidth; a nonlinear optical element downstream of the amplifier, the optical element spectrally broadening optical pulses via a non linear process to have a spectral bandwidth that exceeds the gain bandwidth of the optical amplifier; and a pulse compressor downstream of the nonlinear optical element and arranged to reduce the temporal duration of optical pulses so as to provide output optical pulses having a femtoseconds time duration. |
| US09172198B2 |
Card edge connector with detecting structure
A card edge connector includes an ejector (3) with a pushing portion (32) extending from distal end thereof, the ejector (3) moves between an opening station and a locking station, and at least pair detecting contacts (4) which includes two detecting pins (41, 42), one of the detecting pins defines a spring engaging arm having an engaging portion (425) opposite to the pushing portion (32) which presses on the engaging portion (425) in the locking station or leave the engaging portion (425) in the opening station, thereby making the two detecting pins engage or disengage with each other for detecting if a memory card is inserted in the card edge connector or not. |
| US09172197B2 |
Method of assembling an aircraft
An aircraft pressure bulkhead electrical connector comprising a first connection terminal proximate at least one side of the electrical connector and a pressure seal arranged to maintain an applied air pressure differential across the electrical connector in use. |
| US09172196B2 |
Brush having a plurality of elastic contact pieces arranged in parallel
An aspect of the present invention provides a brush in which positional accuracy of elastic contact pieces is enhanced while production cost is reduced by simplifying production, whereby the brush includes a support that is connected to a base and a conductive portion that is integral with the support, such that the conductive portion includes plural elastic contact pieces extending in parallel from a side edge of the support. |
| US09172192B2 |
Implantable medical device headers that facilitate device and lead configuration variants
Implantable medical devices include headers having various features such as a modular design whereby the header is constructed from a series of stacked contact modules. Additional features include a feedthrough where pins exiting a housing of the implantable medical device extend into the header to make direct electrical connection to electrical contacts present within the header where those electrical contacts directly engage electrical connectors of leads inserted into the header. Other features include electrical contacts that are relatively thin conductors on the order of 0.040 inches or less and may include radial protrusions where the radial protrusions establish contact with the electrical connectors of the lead. Furthermore, electrical contacts may be mounted within the header in a floating manner so that radial movement of the electrical contact may occur during lead insertion. |
| US09172185B2 |
Card connector for receiving digital broadcasting and electronic apparatus
According to one embodiment, a card connector for receiving digital broadcasting includes a store portion into which a card for receiving digital broadcasting is inserted so as to be ejectable, and an ejection prevention mechanism configured to prevent the card stored in the store portion from being ejected. The card connector can automatically release the ejection prevention mechanism when the card is inserted into the store portion, and can automatically actuate the ejection prevention mechanism after the card is inserted into the store portion. |
| US09172183B2 |
Connector assembly with spring operated secondary lock
The present invention relates to an electrical connector assembly comprising a plug connector and a spring operated secondary lock, being arranged movable on the plug connector housing between an open position and a locked position. The connector is further provided with tension springs, which are tensioned when the secondary lock is moved from the locked to the open position. |
| US09172181B2 |
Coaxial connector and tool for disconnecting the coaxial connector
A coaxial connector includes a lip portion on one end thereof and an extension section coaxially extends from the lip portion. The extension section has a tubular portion coaxially mounted thereto and at least one protrusion extends from the outer surface of the tubular portion. A tool for disconnecting and connecting the coaxial connector includes a mounting portion for being mounted to the coaxial connector and the mounting portion has a yield slot defined therein which is located corresponding to the at least one protrusion of the coaxial connector. |
| US09172179B2 |
Cable connection component
A cable connection component for electrically conductively connecting a cable, having a union nut with an internal thread and a core receiving and guiding part with a plurality of incisions. At least one core and core insulation inserted into the core receiving and guiding part are severed by terminals arranged in the connection body and enter the incisions in the core receiving and guiding part and contact is made with the core conductors when a first thread of the union nut is screwed onto a connection body. A connected cable can be released with less effort by the union nut having a second internal thread with a thread pitch that is less than the thread pitch of the first internal thread. The core receiving and guiding part has a radially running collar which is matched to the profile of the threading of the second internal thread and interacts with it. |
| US09172177B2 |
Strain-relief/bending-protection apparatus
The invention relates to a strain relief/bending protection apparatus for a cable, in particular a high speed cable, connected to a plug connector, comprising a base section which can be fastened to a housing of the plug connector and a sleeve section projecting from the base section for surrounding the cable in a region disposed outside the housing, wherein the sleeve section continuously has a round cross-section and the cross-sectional area of the sleeve section reduces as the spacing from the base section increases. |
| US09172167B2 |
Junction failure inhibiting connector
An electrical connector for connecting wires including dissimilar electrical conductors such as copper and aluminum conductors with the electrical connector including failure inhibiting features that can include an oxidation inhibiting coating and a sealant. To ensure that a minimum pressure contact has been achieved at the interface between the electrical connector a shearable fastener can be used to secure an electrical conductor in the electrical connector. |
| US09172162B2 |
Circuit board connector
A circuit board connector includes a contact having a mating end with a spring beam having a separable mating interface and a terminating end configured to be terminated to a wire. A housing holds the contact and includes a main body extending between a front and a rear. The housing has a mounting flange extending from the main body. The main body has a contact channel holding the contact and a wire barrel at the front configured to receive the wire. The rear of the main body is positionable on the circuit board such that the spring beam of the contact is aligned with the contact pad. A fastener is coupled to the mounting flange and is used to secure the housing to a substrate independent of the circuit board. |
| US09172161B2 |
Impedance controlled LGA interposer assembly
An interposer plate assembly having an insulating plate and metal contacts in the plate with contact points above and below the plate and a central portion in the plate. Two cantilever arms extend from the central portion to each contact point. The central portion may be formed to have a large area to form an impedance shield for reducing impedance between adjacent signal contacts. Plastic bodies may be overmolded on separate contacts or on contact pairs and may have sliding fits in passages of the interposer plate. Contacts may be arranged as differential pairs with ground contacts located between the differential pairs. |
| US09172159B2 |
Process for the production of a plug and a plug
A process for the production of a plug, in which a circuit board panel with openings is provided for forming a circuit board. A plug insert, having a plurality of pins and a plurality of plug contact surfaces, is then placed in one of the openings, by means of an automatic SMD fitment device, in such a way that at least one pin of the plug rests on the circuit board panel, and at least two plug contact surfaces, which are electrically connected to the pins, rest on the circuit board, with the contact surfaces of the plug being on one plane. The plug contact surfaces are then automatically soldered to at least one of the contact surfaces of the circuit board. |
| US09172158B2 |
Terminal block
A terminal block (10) is for connecting terminals (T) connected to enameled wires extending from a motor and busbars (B) extending from an inverter and includes a plurality of nuts (20) arranged in a width direction and configured to fasten the terminals (T) and the busbars (B) together with bolts (BT), guides (54) are provided between adjacent nuts (20) and configured to guide bolt fastening portions (T1) of the terminals (T) to the upper surfaces of the nuts by coming into contact with lateral edge parts of the terminals (T), and posture correcting portions (55) provided at positions where the terminals (T) are pulled out backward from the nuts and configured to correct postures of barrel portions (T2) of the terminals (T) in the width direction by contacting the barrels (T2) in the width direction. |
| US09172157B2 |
Post-less coaxial cable connector with formable outer conductor
A post-less coaxial cable connector comprising coupler, a formable outer conductor, body, and actuating insert. The coupler is adapted to attach the coaxial cable connector to a terminal. The outer conductor positions in and rotatably retains the coupler. Body attaches to the outer conductor and positions about the coupler. Actuating insert is movably positionable within the body and is configured to advance toward the coupler and urge the outer conductor of the coaxial cable connector radially inwardly to form the outer conductor about outer conductor of coaxial cable. In this manner, the coaxial cable connector is configured to attach to a coaxial cable other than by using a post. |
| US09172153B2 |
Grounding member and mounting apparatus for hard disk drive
A mounting apparatus is used to mount a hard disk drive to a storage rack. The mounting apparatus includes a supporting frame and two grounding members. The supporting frame includes a handle, and two side brackets extending from opposite ends of the handle, and attached to opposite sides of the hard disk drive. Each grounding member is made of resilient and conductive material, and includes a mounting plate mounted to the side bracket, and two abutting plates extending out from two opposite ends of the mounting plate. A part of each abutting plate is exposed out of the corresponding side bracket. when the mounting apparatus mounting the hard disk drive in a storage rack, the abutting plates are sandwiched between the storage rack and the hard disk drive. |
| US09172152B2 |
Pressure welding terminal
Embodiments of pressure welding terminals are provided including a pair of spring portions and a slit for press-fitting and retaining a conductive body disposed between the pair of spring portions by a fixed push-in amount. An upper edge of the conductive body is retained by the slit at a fixed position from an opening of the slit, and a region is provided where an area of a cross section of at least one of the spring portions on the lower side of the upper edge of the conductive body is smaller than an area of a cross section of the at least one spring portion at a position of the upper edge of the conductive body. |
| US09172150B2 |
Component composite between two components used for current conduction and method for manufacturing a component composite
A component composite between two components used for current conduction, having a receptacle opening formed on the first component and a connection section of the second component, which is situated in the receptacle opening, the connection section of the second component being configured to be pin-shaped and a press-fit connection being formed between the receptacle opening and the connection section. In particular, it is provided that the receptacle opening is configured to be a blind hole. |
| US09172146B2 |
Antenna apparatus
According to an embodiment, an antenna apparatus include a ground plate; a first element disposed along the ground plate; a second element disposed along the first element at an opposing side of the ground plate; a connecting part to connect first and second terminal parts of the first element with first and second terminal parts of the second element, respectively, or to connect the first and second terminal parts of the first element with the ground plate; a first power feeding portion to feed power at a midpoint of the first or second element in a longitudinal direction when the first and second elements are connected together by the connecting part; and a second power feeding portion to feed power to the first element or the ground plate when the first element and the ground plate are connected together by the connecting part. |
| US09172144B2 |
Patch antenna with capacitive elements
Disclosed is a micropatch antenna comprising a radiating element and a ground plane separated by an air gap. Small size, light weight, wide bandwidth, and wide directional pattern are achieved without the introduction of a high-permittivity dielectric substrate. Capacitive elements are configured along the perimeter of at least one of the radiating element and ground plane. Capacitive elements may comprise extended continuous structures or a series of localized structures. The geometry of the radiating element, ground plane, and capacitive elements may be varied to suit specific applications, such as linearly-polarized or circularly-polarized electromagnetic radiation. |
| US09172134B2 |
Protective cover for a wireless device
In some embodiments, an apparatus includes a protective cover configured to attach to a wireless device having a surface including a first portion and a second portion mutually exclusive from the first portion. The second portion of the surface is associated with a proximity sensor of the wireless device. The protective cover is configured to cover the first portion of the surface when the protective cover is attached to the wireless device. The protective cover is configured to not cover the second portion of the surface when the protective cover is attached to the wireless device such that the proximity sensor is not triggered by the protective cover when the protective cover is attached to the wireless device and when the wireless device is operational. |
| US09172130B2 |
RFID inlay incorporating a ground plane
An RFID inlay. The RFID inlay can include a substrate having a first area and a second area, a conductive structure having a first part disposed over at least a portion of the first area and a second part disposed over at least a portion of the second area, and a dielectric material disposed over at least a portion of the conductive structure, wherein the substrate is adapted to be folded such that the first part of the conductive structure is disposed over the second part of the conductive structure and the dielectric material is disposed between the first part and the second part. |
| US09172129B2 |
Antenna system for signal-attenuating containers
A system can include a container that includes a cabinet capable of attenuating or blocking wireless signals, an AED located within the cabinet, an internal patch antenna removably mounted to an internal surface of the cabinet, an external patch antenna removably mounted to an external surface of the cabinet, and an electrical connection between the internal patch antenna and the external patch antenna. The internal and external patch antennas can be configured to transmit wireless signals at a particular frequency and to receive wireless signals at the particular frequency. The system can be configured such that the internal patch antenna is operative to receive a first wireless signal from the AED, a first electrical signal based on the first wireless signal is provided via the electrical connection to the external patch antenna, and a second wireless signal based on the first electrical signal is radiated by the external patch antenna. |
| US09172128B2 |
Antenna pointing system
An antenna pointing system for selectively moving a payload relative to a mounting surface includes at least one rotary actuator having a moving part movable relative to a fixed part mounted on the surface. A connecting rod movably connects to the moving part and to the payload. A flexible mounting structure movably attaches the payload to the mounting surface. |
| US09172126B2 |
Module and coupling arrangement
The application concerns a surface mount module adapted for transfer of a microwave signal between the module and a motherboard, the module comprising a substrate with a first microstrip conductor and a second microstrip conductor, wherein the two conductors are connected with a connection through the module. The module is distinguished in that the connection comprises the first microstrip conductor connected to a foil of electrically conducting material coated on the first side, the foil being surrounded by electrically conducting trenches running through the substrate from the first side to the second side forming a substrate integrated waveguide, wherein the trenches on the second side surrounds a second foil of electrically conducting material coated on the second side of the substrate and connected the second microstrip conductor. The application also concerns a coupling arrangement. |
| US09172123B2 |
Metal/air battery with gas driven mixing
In one embodiment, a metal/air battery includes a negative electrode, a positive electrode, a protection layer located between the negative electrode and the positive electrode, and a liquid phase electrolyte within the positive electrode, wherein the positive electrode is arranged to induce convection of the electrolyte by movement of a gas phase of oxygen within the positive electrode. |
| US09172122B2 |
Battery module
A battery module includes a first battery cell having a first housing and first and second electrical terminals. The first housing has first, second, third and fourth ends. The first and second electrical terminals extend outwardly from the third and fourth ends, respectively. A distance from the second end of the first housing to a second edge of the first electrical terminal is greater than a distance from the first end of the first housing to a first edge of the first electrical terminal. A distance from the second end of the first housing to a second edge of the second electrical terminal is greater than a distance from the first end of the first housing to a first edge of the second electrical terminal. The battery module further includes a cooling fin disposed adjacent to the first battery cell, and a cooling plate coupled to the cooling fin. |
| US09172120B2 |
Battery pack fault communication and handling
A method of handling a fault in a battery pack, the method comprising: a battery module supplying a voltage to a high-voltage circuit; a battery management system transmitting a heartbeat signal to the battery module via a fault bus; the battery module preventing the heartbeat signal from being transmitted back to the battery management system in response to the battery module detecting a critical condition; and the battery management system shutting off the supply of voltage from the battery module to the high-voltage circuit in response to the battery module preventing the heartbeat signal from being transmitted back to the battery management system. The battery module transmits battery data to the battery management system via a communication bus, which is distinct from the fault bus, and the battery management system transmits one or more commands to the battery module via the communication bus. |
| US09172118B2 |
Method and system for estimating battery life
Methods and systems for estimating remaining life of an automotive propulsion battery are provided. A total usable capacity of the battery is calculated based on cycling the battery. A first component of degradation is calculated based on driving throughput of the battery. A second component of degradation is calculated based on aging of the battery. The total degradation is calculated based on the sum of the first component and the second component of degradation. |
| US09172110B2 |
Solid electrolyte and lithium based battery using the same
A solid electrolyte includes an interpenetrating polymer network, a plasticizer and a lithium salt. The plasticizer and the lithium salt are dispersed in the interpenetrating polymer network. The interpenetrating polymer network includes CH2—CH2—On segments, and is formed by polymerizing a first monomer R1—OCH2—CH2—OnR2 with a second monomer R3—OCH2—CH2—OmR4 under an initiator. The “R1”, “R2” or “R3” respectively includes —C═C— group or —C≡C— group. The “R4” includes an alkyl group or a hydrogen atom. The “m” and “n” are integers. A molecular weight of the first monomer or a molecular weight of the second monomer is greater than or equal to 100, and less than or equal to 800. The first monomer is less than or equal to 50% of the second monomer by weight. The lithium salt is less than or equal to 10% the second monomer by weight. A lithium based battery using the solid electrolyte is also provided. |
| US09172103B2 |
Transient inlet relative humidity estimation via adaptive cathode humidification unit model and high frequency resistance
An apparatus and method to determine the relative humidity of a fuel cell system. A controller is cooperative with a first device and a second device to receive a valve signal and a high frequency resistance value. The controller controls the relative humidity of a fuel cell stack based on the estimation of the relative humidity of the fuel cell stack based on one or more algorithms. The controller modifies the relative humidity of the fuel cell stack through changes in the position of a valve based on at least one of the valve signal and the high frequency resistance value. In one form, the relative humidity of the fuel cell system is determined without the need of a humidity sensor. |
| US09172100B2 |
Fuel cell system
A fuel cell system to be mounted on an electric vehicle such as a hybrid vehicle or an electric vehicle. Cooling water is supplied from a cooling water inlet of a stack manifold, flows through a fuel cell stack, and returns to the stack manifold. A groove is formed on the rear surface side of the stack manifold, constituting, together with a terminal, a cooling water channel. The cooling water flows through the cooling water channel, and is discharged to the outside from a cooling water outlet. The cooling water channel is formed extending from the rear side to the front side of the vehicle, and warms an end plate. A pipe length of the cooling water channel to a radiator mounted in a front part of the vehicle is reduced. |
| US09172098B2 |
Fuel cell stack with improved corrosion resistance
The present invention provides a fuel cell stack with improved corrosion resistance, in which the outer edge of the fuel cell stack including an outer cut portion of each metallic bipolar plate can be effectively prevented from being corroded. For this purpose, the present invention provides a fuel cell stack including a waterproof member which is formed at an outer edge of a metallic bipolar plate to seal a gap between joined surfaces of the metallic bipolar plate, a membrane-electrode assembly, a gas diffusion layer, and a gasket from the outside thereof such that water vapor and moisture from the fuel cell stack are prevented from being brought into contact with an outer cut portion of each metallic bipolar plate by the waterproof member. |
| US09172097B2 |
Method for making electrode assembly for a solid oxide fuel cell
An electrode assembly for a solid oxide fuel cell, the electrode assembly including a porous ceramic oxide matrix and an array of fluid conduits. The porous ceramic oxide matrix includes a labyrinth of reinforcing walls interconnected to one another. Each of the fluid conduits is formed from the porous ceramic oxide matrix and has an external surface with a plurality of struts projecting outwardly therefrom and an internal surface defining a first passage for flowing a first fluid therethrough. The struts are configured to connect the fluid conduits to one another and the external surfaces and the struts define a second passage around the fluid conduits for flowing a second fluid therethrough. |
| US09172095B2 |
Method for manufacturing electrode for fuel cell comprising nanocarbon and core-shell-structured platinum-carbon composite and the electrode for fuel cell manufactured by the same
The present subject matter provides a method of manufacturing an electrode for a fuel cell, in which nanocarbons are grown on the surface of a substrate for a fuel cell using a process of simultaneously gasifying a platinum precursor and a carbon precursor, and simultaneously core-shell-structured platinum-carbon composite catalyst particles are highly dispersed between nanocarbons The subject matter also provides an electrode for a fuel cell, manufactured by the method. This method is advantageous in that an electrode for a fuel cell having remarkably improved electrochemical performance and durability can be manufactured by a simple process. |
| US09172094B2 |
Template electrode structures for depositing active materials
Provided are examples of electrochemically active electrode materials, electrodes using such materials, and methods of manufacturing such electrodes. Electrochemically active electrode materials may include a high surface area template containing a metal silicide and a layer of high capacity active material deposited over the template. The template may serve as a mechanical support for the active material and/or an electrical conductor between the active material and, for example, a substrate. Due to the high surface area of the template, even a thin layer of the active material can provide sufficient active material loading and corresponding battery capacity. As such, a thickness of the layer may be maintained below the fracture threshold of the active material used and preserve its structural integrity during battery cycling. |
| US09172093B2 |
Electrode active material for lithium secondary battery, electrode for lithium secondary battery including the same, and lithium secondary battery including the electrode
In an aspect, an electrode active material for a lithium secondary battery, the electrode active material including a silicon-based alloy and a coating film containing a polymer that includes a 3,4-ethylenedioxythiophene repeating unit and an oxyalkylene repeating unit, coated on the surface of the silicon-based alloy are provided. |
| US09172087B2 |
Electrode material, electrode and lithium ion battery
An electrode material contains an agglomerate formed by agglomerating a plurality of agglomerated particles formed by agglomerating a plurality of particles of a carbonaceous coated electrode active material having a carbonaceous coat formed on a surface, the agglomerate is made up of hollow-structured particles and solid-structured particles, the average particle diameter of the agglomerate is in a range of 0.5 μm to 100 μm, the volume density of the agglomerate is in a range of 50% by volume to 80% by volume, the micropore distribution of micropores present in the agglomerate is monomodal, the average micropore diameter in the micropore distribution is 0.3 μm or less, and the NMP oil absorption amount of the agglomerate is in a range of 40 g/100 g to 100 g/100 g. |
| US09172086B2 |
Cathode and lithium battery using the same
A cathode and a lithium battery including the cathode have improved electrical characteristics. The cathode includes a cathode active material composition including a conducting agent, a binder, and a cathode active material, wherein the cathode active material includes a first lithium compound and a second lithium compound, the first lithium compound having an open-circuit voltage greater than an open-circuit voltage of the second lithium compound, and wherein the second lithium compound includes a metal oxide coating layer. |
| US09172084B2 |
Method for producing porous granules from inorganic material and the use thereof
Build-up granulation and compaction granulation methods are generally known for producing granules from porous inorganic material. In order to allow a cost-efficient yet also reproducible production of porous granules having a more pronounced hierarchical pore structure, the invention relates to a method comprising the following steps: (a) supplying a feedstock flow to a reaction zone in which the feedstock is converted to material particles by means of pyrolysis or hydrolysis, (b) depositing the material particles on a deposition surface (1a) forming a soot layer (5), (c) thermally hardening the soot layer (5) to form a porous soot plate (5a), and (d) comminuting the soot plate (5a) to form porous granules (13). |
| US09172082B2 |
Electrode composite material and lithium ion battery using the same
The present disclosure relates to an electrode composite material. The electrode composite material includes a number of electrode composite material particles. Each of the plurality of electrode composite material particles includes an electrode active material particle and a doped aluminum phosphate layer coated on a surface of the electrode active material particle. A material of the doped aluminum phosphate layer is a semiconducting doped aluminum phosphate. |
| US09172081B2 |
Negative active material for rechargeable lithium battery, method of preparing the same, and rechargeable lithium battery including the same
The invention relates to a negative active material for a rechargeable lithium battery, including an inner layer including a material being capable of doping and dedoping lithium, a carbon layer outside the inner layer, and an outer layer disposed on the carbon layer and including a material being capable of doping and dedoping lithium. The materials being capable of doping and dedoping lithium may be the same or different from each other. The invention further relates to a method of preparing the negative active material including: preparing a tube-shaped template with a hollow part; forming an outer layer including a material which can dope and dedope lithium inside the template; forming an inner precursor layer including a material which can dope and dedope lithium modified with an organic functional group inside the outer layer; annealing the template; and removing the template. |
| US09172077B2 |
Low-loss storage battery
A storage battery comprises a first branch and a second branch, each of which has a first cell and a second cell, the first and second cells being connected in series, and a first switch for connecting the first cell from the first branch and the first cell from the second branch in parallel and connecting the second cell from the first branch and the second cell from the second branch in parallel. The first switch has a cutoff threshold selected to conduct current when one of the cells forms an open circuit. |
| US09172072B2 |
Battery comprising gas absorbent material and battery system
[PROBLEM] In space-conservative fashion, at low cost, and with high efficiency, to carry out absorption of gas produced at the interior of a battery.[SOLUTION MEANS] Secondary battery 21 is provided with case 3 in which positive electrode 10 and negative electrode 11 are sealed together with electrolyte, and with explosion prevention valve 4 for allowing escape of high-pressure gas present at the interior of case 3 when pressure within case 3 rises; and is further provided with gas absorber 13 or 14 for absorbing high-pressure gas. Gas absorber 13, includes gas-absorbent material 6 and capsule 5, which comprises hot-melt material, and is provided within case 3, this capsule 5 including, at the interior thereof, gas-absorbent material 6. Furthermore, gas absorber 14, which may be provided outside case 3, may include gas-absorbent material 6; cartridge case 14a which houses, at the interior thereof, gas-absorbent material 6; gas inlet valve 14b for causing high-pressure gas to flow thereinto; and gas outlet valve 14c for causing high-pressure gas to flow out therefrom. |
| US09172069B2 |
Battery sealing structure, electrolyte circulation type battery cell frame, electrolyte circulation type battery cell stack, and electrolyte circulation type battery
An easy-to-assemble battery sealing structure is provided. A cell frame includes a battery plate-like member (bipolar plate), a pair of frames for holding a peripheral portion of bipolar plate therebetween and pressing the peripheral portion from the front and the rear, and an annular packing made of an elastic material. Frames are provided with an annular groove between respective surfaces of the frames facing each other, for accommodating the peripheral portion of bipolar plate. Packing is mounted on the peripheral portion of bipolar plate, arranged in annular groove, and press-contacted between frames and the peripheral portion of bipolar plate. Packing includes a pair of legs for holding the peripheral portion of bipolar plate therebetween, and a base connecting legs together. |
| US09172067B2 |
Battery cell and terminal configuration
An electrochemical cell includes a can having a first end and a second end and a first element provided within the can and including an electrode. The cell also includes a first terminal integrally formed as a part of the can and extending from one of the first or second ends. The cell further includes a terminal assembly directly coupled to the first element and including a stud configured to act as a second terminal. The first end includes a boss that defines an aperture through which the stud extends, wherein the boss at least partially surrounds the stud and a bushing coupled to the stud. |
| US09172065B2 |
Organic EL display panel and method of manufacturing the same
An organic electroluminescence display panel includes a thin-film transistor layer above a substrate. A planarizing film is above the thin-film transistor layer with contact holes being formed in the planarizing film. A bank is above the planarizing film. The bank includes openings arranged in rows and columns that define regions for forming organic electroluminescence elements. Each opening is between a pair of adjacent concaves in one of the columns. The concaves are formed in an upper surface of the bank and sunken into the contact holes. The upper surface of the bank has repellency. A light-emitting layer is formed in each opening by ejecting drops of an ink from nozzles of an inkjet head into the openings while moving the inkjet head relative to the substrate. The nozzles further eject drops of the ink into the concaves when above the concaves for ejecting the drops of the ink through every nozzle. |
| US09172063B2 |
Method and apparatus for manufacturing display devices
A method for fabricating a display device including forming a standard mark in a flexible substrate fed in a first direction, forming a partition wall in the flexible substrate, and forming an electrode by applying a conductive member at a predetermined position between the partition walls by an applicator based on the standard mark. An apparatus is provided that includes a transportation unit to transport a flexible substrate in a first direction, a mark formation unit to form a standard mark in the flexible substrate, a partition wall formation unit to form a partition wall in the flexible substrate, and an application unit to apply a conductive member to a predetermined position between the partition walls based on the standard mark. A display device is provided that includes a flexible substrate, a partition wall formed by pressing the flexible substrate, and an electrode formed by application between the partition walls. |
| US09172061B2 |
Organic light-emitting diode (OLED) display panel
An organic light-emitting diode (OLED) display panel comprises: a plurality of pixel units arranged in an array, in which each pixel unit includes an organic light-emitting element provided with a first light-emitting surface and a second light-emitting surface; and light shield layers configured to shield at least the first light-emitting surfaces of organic light-emitting elements of a portion of the pixel units. The OLED display panel combines the double-faced organic light-emitting elements and the light shield layers to simply achieve double emission display. |
| US09172060B2 |
Organic light-emitting display and method of manufacturing the same
An organic light-emitting display and a method of manufacturing the organic light-emitting display are disclosed. In one embodiment, the organic light-emitting display includes: i) a pixel electrode disposed on a substrate, ii) an opposite electrode disposed opposite to the pixel electrode, iii) an organic emission layer disposed between the pixel electrode and the opposite electrode; a light-scattering portion disposed between the substrate and the organic emission layer, including a plurality of scattering patterns for scattering light emitted from the organic emission layer in insulating layers having different refractive indexes. The display may further include a plurality of light absorption portions disposed between the light-scattering portion and the organic emission layer to correspond to the scattering patterns. |
| US09172048B2 |
Charge-transporting varnish
A varnish containing a charge-transporting organic material and a solvent is used as a charge-transporting varnish. The charge-transporting organic material is composed of a charge-transporting substance comprising a charge-transporting monomer, or charge-transporting oligomer or polymer having a number average molecular weight of 200 to 500,000, or is composed of such a charge-transporting substance and an electron- or hole-accepting dopant substance. The solvent contains at least one type of high-viscosity solvent having a viscosity of 10 to 200 mPa·s at 20° C. The charge-transporting substance or the charge-transporting organic material is dissolved or uniformly dispersed in the solvent. The varnish has a high uniform film forming capability even in a system using a charge-transporting substance of low molecular weight and a charge-accepting dopant substance. When the varnish is used in, particularly an OLED device or PLED device, excellent EL device characteristics, namely a low drive voltage, a high luminance efficiency, and a long life are realized. |
| US09172045B2 |
4-aminocarbazole compound and use thereof
A 4-aminocarbazole compound represented by formula (1): wherein Ar1-Ar4 represent substituted or unsubstituted aryl, thienyl, pyridyl, benzothienyl, dibenzothienyl, dibenzofuranyl, 4-carbazolyl, dibenzothienylphenyl, dibenzofuranylphenyl or 9-carbazolylphenyl group; R1-R7 represent substituted or unsubstituted aryl, heteroaryl or heteroarylphenyl group, or alkyl, alkoxy, cyano group, or hydrogen or halogen atom; n is integer of 0-2; and X represents substituted or unsubstituted (n+1)-valent aromatic hydrocarbon, heteroaromatic or heteroarylphenyl group. The 4-aminocarbazole compound provides an organic EL device exhibiting enhanced emitting efficiency and durability. |
| US09172041B2 |
Plasmonic graphene devices
An integrated graphene-based structure comprises an N-dimensional array of elements formed on a surface of a substrate. The N-dimensional array of elements includes a plurality of rows. Each respective row in the plurality of rows comprises a corresponding plurality of elements formed along a first dimension. Each element in the corresponding plurality of elements comprising at least one graphene stack and separated from an adjacent element along the first dimension by a first average spatial separation thereby resulting in a first periodicity in lateral spacing along the first dimension. Each respective row in the plurality of rows is separated from an adjacent row along a second dimension by a second average spatial separation, thereby resulting in a second periodicity in lateral spacing along the second dimension. The N-dimensional array exhibits a set of characteristic electromagnetic interference properties in response to electromagnetic radiation incident on the N-dimensional array. |
| US09172037B2 |
Combined conductive plug/conductive line memory arrays and methods of forming the same
Memory arrays and methods of forming the same are provided. One example method of forming a memory array can include forming a conductive material in a number of vias and on a substrate structure, the conductive material to serve as a number of conductive lines of the array and coupling the number of conductive lines to the array circuitry. |
| US09172030B2 |
Magneto-electronic devices and methods of production
A magneto-electronic device includes a first electrode, a second electrode spaced apart from the first electrode, and an electric-field-controllable magnetic tunnel junction arranged between the first electrode and the second electrode. The electric-field-controllable magnetic tunnel junction includes a first ferromagnetic layer, an insulating layer formed on the first ferromagnetic layer, and a second ferromagnetic layer formed on the insulating layer. The first and second ferromagnetic layers have respective first and second magnetic anisotropies that are alignable substantially parallel to each other in a first state and substantially antiparallel in a second state of the electric-field-controllable magnetic tunnel junction. |
| US09172028B2 |
Semiconductor device
A yield of semiconductor devices having a magnetic shield is enhanced. A magnetic shield member SIE has a first shield member SIE1 and a second shield member SIE2. The first shield member SIE1 has a first facing region FP1 facing a first surface of a semiconductor chip SC. The second shield member SIE2 has a second facing region FP2 facing a second surface of the semiconductor chip SC. A resin layer RL1 has a portion thereof making contact with the first shield member SIE1, and has another portion thereof making contact with the second shield member SIE2. Then, the first shield member SIE1 and the second shield member SIE2 are magnetically coupled via the resin layer RL1 or directly. The first shield member SIE1 and the second shield member SIE2 cover a magnetic memory cell MR in plan view. |
| US09172027B2 |
Manufacturing method and system for an ultrasonic generating device that includes an attachment unit to generate an ultrasonic vibration
A manufacturing method of an ultrasonic generating device includes applying a compressive force to an attachment unit toward a first axial direction while a first end of a bolt-shaped member is a free end and the second end thereof is fixed, and thereby generating a first elastic force in the attachment unit. The manufacturing method includes attaching a fastening member to a bar portion of the bolt-shaped member in a balanced condition in which a second elastic force of the bolt-shaped member and the first elastic force are in balance, and thereby maintaining the balanced condition. |
| US09172017B2 |
Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes a first semiconductor layer of an n type including a nitride semiconductor, a first metal layer of an alloy containing Al and Au, and a second metal layer. The first metal layer is in contact with the first semiconductor layer. The second metal layer is in contact with the first metal layer. The second metal layer includes a metal different from Al. The first metal layer is disposed between the second metal layer and the first semiconductor layer. |
| US09172016B2 |
Semiconductor light emitting device and method for manufacturing same
According to one embodiment, the optical layer has a larger planar size than the semiconductor layer. The optical layer is transmissive to emission light of the light emitting layer. The first insulating film is provided on a side surface of the semiconductor layer continued from the first surface. The metal film includes a first reflective part covering the side surface of the semiconductor layer via the first insulating film. The metal film includes a second reflective part opposed to the optical layer in a region around the side surface of the semiconductor layer and extending from the first reflective part toward a side opposite from the side surface of the semiconductor layer. |
| US09172012B2 |
Multi-chip light emitter packages and related methods
Light emitter packages having multiple light emitter chips, such as light emitting diode (LED) chips, and related methods are provided. In one embodiment, a light emitter package can include a ceramic submount. An array of light emitter chips can be disposed over a portion of the submount, and each light emitter chip can include a horizontal chip structure having positive and negative electrical contacts disposed on a same side. The positive and negative electrical contacts can be adapted to electrically communicate to conductive portions of the submount. Light emitter packages can further include a lens overmolded on the submount and covering a portion of the array. |
| US09172007B2 |
Method of manufacturing light emitting device and spray coating machine
A method of manufacturing a light emitting device, using a spray coating method, a fluorescent material can be easily adhered on corner portions and side surfaces of an LED chip, a lens-shaped light transmissive resin member surface, an optical lens surface, etc., and a spray coating machine used in the method. The method includes mounting an LED chip on a substrate member, applying a spray coating to a coating object including the LED chip by spraying a powder-containing solution. The applying a spray coating is performed such that a powder-containing solution is sprayed through a solution nozzle arranged above the coating object, as a spray direction of the powder-containing solution indicating a central axis, while using at least one gas nozzle arranged in a surrounding relationship to the central axis, spraying a gas toward the central axis to alter the direction of the spray made of the powder-containing solution. |
| US09172004B2 |
Light emitting device package
A light emitting device package includes a body having a cavity therein and first and second recesses inside the cavity of the body. The first and second electrode layers are provided in the first and second recesses, and a light emitting device is provided on the first and second electrode layers. The first and second bumps are provided under the light emitting device and attached to the first and second recesses. |
| US09172002B2 |
Light-emitting device having a patterned substrate
A light-emitting diode device and a manufacturing method thereof. The light-emitting diode device includes: a substrate (1); an epitaxial layer at one side of the substrate (1) and including an N-type layer (2), a P-type layer (4), and an active layer (3) between the N-type layer (2) and the P-type layer (4); an N-type electrode (5); a P-type electrode (7); an adhesive layer (8); and a patterned substrate (9). The light-emitting diode device further includes an insulating layer (6) between the N-type electrode (5) and the P-type electrode (7), the insulating layer (6) electrically insulating the N-type electrode (5) and the P-type electrode (7). In the light-emitting diode device and the manufacturing method thereof, light-emitting efficiency and luminous efficiency of the light-emitting diode device can be improved, wiring is easier as compared with conventional chips, and the manufacturing process can be optimized. |
| US09171996B2 |
Low-voltage high-gain high-speed germanium photo detector and method of fabricating the same
Provided is a silicon-wafer-based germanium semiconductor photodetector configured to be able to provide properties of high gain, high sensitivity, and high speed, at a relatively low voltage. A germanium-based carrier multiplication layer (e.g., a single germanium layer or a germanium and silicon superlattice layer) may be provided on a silicon wafer, and a germanium charge layer may be provided thereon, a germanium absorption layer may be provided on the charge layer, and a polysilicon second contact layer may be provided on the absorption layer. The absorption layer may be configured to include germanium quantum dots or wires. |
| US09171994B2 |
Chemical vapor deposition apparatus and method of forming semiconductor epitaxial thin film using the same
A chemical vapor deposition apparatus includes: a reaction chamber including an inner tube having a predetermined volume of an inner space, and an outer tube tightly sealing the inner tube; a wafer holder disposed within the inner tube and on which a plurality of wafers are stacked at predetermined intervals; and a gas supply unit including at least one gas line supplying an external reaction gas to the reaction chamber, and a plurality of spray nozzles communicating with the gas line to spray the reaction gas to the wafers, whereby semiconductor epitaxial thin films are grown on the surfaces of the wafers, wherein the semiconductor epitaxial thin film grown on the surface of the wafer includes a light emitting structure in which a first-conductivity-type semiconductor layer, an active layer, and a second-conductivity-type semiconductor layer are sequentially formed. |
| US09171991B2 |
Flexible solar cell interconnection systems and methods
Disclosed is a highly automated method of interconnecting flexible solar cells to form solar modules having a wide variety of sizes and electrical characteristics. The method is fast and economical, providing many attributes of a “pseudo monolithic integration” scheme that has previously been attainable only on rigid substrates. |
| US09171990B2 |
Method of hybrid stacked flip chip for a solar cell
A method of hybrid stacked Flip chip for a solar cell onto which semiconductor layers of different materials are stacked in the Flip chip technology to solve the problem of lattices mismatch between the layers for further increase of the efficiency of solar cell. |
| US09171988B2 |
Photoconductive switch package
A photoconductive switch is formed of a substrate that has a central portion of SiC or other photoconductive material and an outer portion of cvd-diamond or other suitable material surrounding the central portion. Conducting electrodes are formed on opposed sides of the substrate, with the electrodes extending beyond the central portion and the edges of the electrodes lying over the outer portion. Thus any high electric fields produced at the edges of the electrodes lie outside of and do not affect the central portion, which is the active switching element. Light is transmitted through the outer portion to the central portion to actuate the switch. |
| US09171987B2 |
Radioactive ray detector and radioactive ray detecting apparatus
An object of the present invention is to provide a radioactive ray detector for enabling to reduce the parasitic capacity lower than that of the conventional art, which is generated between the semiconductor elements of the radioactive ray detectors neighboring with, and a radioactive ray detecting apparatus applying that therein. The radioactive ray detector, comprises a substrate, a first semiconductor element and a second semiconductor element, which are provided to face to each other with positioning the substrate therebetween, a first electrode pattern, which is electrically connected with the first semiconductor element on a surface facing to an opposite side of the substrate, and a second electrode pattern, which is electrically connected with the second semiconductor element on a surface facing to an opposite side of the substrate, wherein the first electrode pattern and the second electrode pattern are arranged not to overlap with each other, when seeing through the substrate in a direction of thickness thereof. |
| US09171982B2 |
Integrated jumpers for building integrable photovoltaic modules
Provided are novel building integrable photovoltaic (BIPV) modules having integrated jumpers for interconnecting similar modules in adjacent rows. An integrated jumper is provided on a back side of the photovoltaic portion of the module and includes at least two interconnected jumper contact points. The module also has two connectors provided on the front side of its flap portion. Each connector has at least one connector contact point connected to one or more photovoltaic cells of the module. When a module is positioned over flap portions of two other modules previously installed in an adjacent row, the two jumper contact points on the back side of this new module make electrical connections to the two connector contact points on the front side of the installed modules. In turn, these connections interconnect the photovoltaic cells of the two modules without any need for additional connectors or operations. |
| US09171979B2 |
Battery and solar method for manufacturing the same
A solar battery according to the embodiment of the present invention includes a rear electrode formed on a substrate and separated by a first through-hole; a light absorbing layer formed on the rear electrode including the first through-hole; a second through-hole exposing the rear electrode through the light absorbing layer; a buffer layer formed on the upper surface and the side surface of the light absorbing layer; a front electrode layer formed on the buffer layer; and a connection wiring extending from the front electrode layer and formed within the second through-hole. |
| US09171978B2 |
Epitaxial wafer, method for producing the same, photodiode, and optical sensor device
A method for producing an epitaxial wafer includes a step of growing an epitaxial layer structure on a III-V semiconductor substrate, the epitaxial layer structure including a III-V semiconductor multiple-quantum well and a III-V semiconductor surface layer, wherein the step of growing the epitaxial layer structure on the substrate is performed such that a lattice mismatch Δω of the multiple-quantum well with respect to the substrate satisfies a range of −0.13%≦Δω<0% or 0%<Δω≦+0.13%, the range having a center displaced from zero, and an X-ray rocking curve in a zero-order diffraction peak derived from the multiple-quantum well has a full width at half maximum (FWHM) of 30 seconds or less. |
| US09171976B2 |
Light detection device
A light detection device includes a substrate, a buffer layer disposed on the substrate, a first band gap change layer disposed on a portion of the buffer layer, a light absorption layer disposed on the first band gap change layer, a Schottky layer disposed on a portion of the light absorption layer, and a first electrode layer disposed on a portion of the Schottky layer. |
| US09171975B2 |
Solar cell element and process for production thereof
A solar cell element is disclosed. The solar cell element comprises a semiconductor substrate and electrodes. The semiconductor substrate with a first and second main surface comprises a body and a first layer. The electrodes comprise first electrodes on the first layer and second electrodes on the second main surface. At least one of the first electrodes and the second electrodes comprises silver, copper and nickel as a main component. A method for manufacturing a solar cell element is disclosed. An electrically conductive paste containing silver, copper and nickel is prepared. The electrically conductive paste is applied on the semiconductor substrate. The electrically conductive paste is fired to form the solar cell element. |
| US09171974B2 |
Semiconductor device and method of manufacturing the same
According to one embodiment, in a semiconductor device, a semiconductor substrate has a first surface and a second surface which is opposed to the first surface. An insulating layer is provided on the first surface of the semiconductor substrate. A metal wiring is provided within the insulating layer. A support substrate is bonded to the insulating layer. A poly silicon electrode is connected to the metal wiring through a contact. A pad is provided on the second surface of the semiconductor substrate and is connected to the poly silicon electrode through a metal film deposited in a via-hole to penetrate the semiconductor substrate and extend to the poly silicon electrode. |
| US09171971B2 |
Encapsulated sensors
An encapsulated sensors and methods of manufacture are disclosed herein. The method includes forming an amorphous or polycrystalline material in contact with a layer of seed material. The method further includes forming an expansion space for the amorphous or polycrystalline material. The method further includes forming an encapsulation structure about the amorphous or polycrystalline material. The method further includes crystallizing the amorphous or polycrystalline material by a thermal anneal process such that the amorphous or polycrystalline material expands within the expansion space. |
| US09171968B2 |
Solid-state imaging device and camera system
There is provided a solid-state imaging device including a wafer in which a guard ring with conductivity in an insulation film layered on a first conductivity type substrate is formed between an edge portion of at least a first chip, out of the first chip and a second chip of a layered chip, and a scribe line region, at least two second conductivity type layers are formed at an interval within a region corresponding to the guard ring, in the first conductivity type substrate, and the guard ring includes a first guard ring part connected to one of the second conductivity type layers on a chip edge portion side, and a second guard ring part connected to another one of the second conductivity type layers on a scribe line side. |
| US09171967B2 |
Schottky barrier diode
A Schottky barrier diode is provided with: an n-type semiconductor layer including Ga2O3-based compound semiconductors with n-type conductivity; and a Schottky electrode layer which is in Schottky-contact with the n-type semiconductor layer. An n− -type semiconductor layer, which has a relatively low electron carrier concentration and is brought into Schottky-contact with the Schottky electrode layer, and an n+ semiconductor layer, which has a higher electron carrier concentration than the n semiconductor layer, are formed in the n-type semiconductor layer. |
| US09171965B2 |
Force detection device, and force transducer device
A force detection device includes a diamond piezoresistor including a highly orientated diamond into which boron is introduced as an impurity. The absolute value of the piezoresistance coefficient of the diamond piezoresistor is greater than the absolute value of a piezoresistance coefficient π11 or π12 in a case in which a major axis is in the <100> direction. |
| US09171963B2 |
Electrostatic discharge shunting circuit
An integrated electrostatic discharge (ESD) shunting circuit includes a III-V semiconductor layer, and a first drain-less high electron mobility transistor (HEMT) or a metal-semiconductor FET (MESFET) transistor having a first gate and at least a second drain-less HEMT or MESFET having a second gate formed in the substrate. The HEMTs or MESFETs include a donor layer on the semiconductor layer, no drains, and a source including an ohmic contact layer on the donor layer. |
| US09171962B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a gate insulating film formed on the semiconductor substrate; a floating gate formed on the gate insulating film; a control gate formed on the floating gate and has a side coplanar with a side of the floating gate; a tunnel diffusion layer facing a portion of the floating gate; and a tunnel window formed in a portion of the gate insulating film between the floating gate and the tunnel diffusion layer, the tunnel window being formed to be thinner than a remaining peripheral portion of the gate insulating film. |
| US09171961B2 |
Coating materials for oxide thin film transistors
The present teachings provide a coating composition (a passivation formulation) for preparing a coating material in a metal oxide thin film transistor, where the coating material comprises a polymer blend including a polymer and a stabilizing agent. Incorporation of a stabilizing agent according to the present teachings in the coating material can lead to improved device performance of the metal oxide thin film transistor, in particular, reduced shift in the threshold voltage and long-term bias-stress stability. |
| US09171959B2 |
Semiconductor device and manufacturing method thereof
Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer. |
| US09171956B2 |
Thin film transistor and display device using the same
In a thin film transistor and a display device provided with the same, a thin film transistor according to an exemplary embodiment includes: a semiconductor layer including a channel region, a source region, a drain region, a light-doped source region, and a light-doped drain region; a gate electrode overlapping the channel region; a source electrode contacting the source region; and a drain electrode contacting the drain region. The channel region includes a main channel portion, a source channel portion, and a drain channel portion, and the source channel portion and the drain channel portion are extended from the main channel portion and separated from each other. The light-doped source region is disposed between the source channel portion and the source region and the light-doped drain region is disposed between the drain channel portion and the drain region. |
| US09171954B2 |
FinFET structure and method to adjust threshold voltage in a FinFET structure
FinFET structures and methods of manufacturing the FinFET structures are disclosed. The method includes performing an oxygen anneal process on a gate stack of a FinFET structure to induce Vt shift. The oxygen anneal process is performed after sidewall pull down and post silicide. |
| US09171952B2 |
Low gate-to-drain capacitance fully merged finFET
A low gate-to-drain capacitance merged finFET and methods of manufacture are disclosed. The method includes forming a plurality of fins on a substrate. The method further includes forming at least one dummy gate structure intersecting the plurality of fins. The method further includes forming a gap between sidewalls of the fins and an insulator material, which exposes portions of the substrate. The method further includes merging the fins together with semiconductor material formed within the gaps and over the insulator material. |
| US09171945B2 |
Switching element utilizing recombination
Provided is a switching element capable of effectively preventing a collapse phenomenon. A switching element (1a) includes an electron running layer (12), an electron supplying layer (13) formed on an upper surface of the electron running layer (12), having a band gap larger than that of the electron running layer (12), and forming a heterojunction with the electron running layer (12), a recombination layer (17) formed on an upper surface of the electron supplying layer (13) and having a band gap smaller than that of the electron supplying layer (13), a source electrode (14) and a drain electrode (15) at least partially formed on the upper surface of the electron running layer (12), and a gate electrode (16) at least partially formed on the upper surface of the electron supplying layer (13) and arranged between the source electrode (14) and the drain electrode (15). When the switching element (1a) is in an off state, electrons and holes are recombined in the recombination layer (17). |
| US09171944B2 |
Self-adaptive composite tunneling field effect transistor and method for fabricating the same
The present invention provides a tunneling field effect transistor and a method for fabricating the same which refer to a field effect transistor logic device and circuit in a CMOS ultra-large integrated circuit (ULSI). The inventive concept of the invention lies in that, in a case of an N-type transistor, a side portion of a doped source region adjacent to an edge of the control gate is further implanted with P+ impurities on a basis of the doped source region being initially doped N− impurities, so that the initial N− impurities in the implanted portion are completely compensated by the P+ impurities, and in a case of a P-type transistor, a side portion of the doped source region adjacent to an edge of the control gate is implanted with N+ impurities on a basis of the doped source region being initially doped P− impurities, so that the initial P− impurities in the implanted portion are completely compensated by the N+ impurities. In the transistor, the source region is implanted twice with different doping concentrations, such that a large current characteristic of the MOSFET can be effectively combined to increase an on-state current of the transistor, and also, the threshold adjustment for the MOSFET portion and the TFET portion of the transistor can be achieved in a self-adaptive way. |
| US09171942B2 |
Semiconductor element manufacturing method
There is provided a method of manufacturing a semiconductor element including: forming a semiconductor film of which a principal constituent is an oxide semiconductor; forming a first insulation film on a surface of the semiconductor film; applying a heat treatment in an oxidizing atmosphere; and, forming a second insulation film on a surface of the first insulation film, wherein a thickness of the first insulation film and a temperature of the heat treatment in the third step are adjusted such that, if the thickness of the first insulation film is represented by Z (nm), the heat treatment temperature is represented by T (° C.) and a diffusion distance of oxygen into the first insulation film and the semiconductor film is represented by L (nm), the relational expression 0 |
| US09171937B2 |
Monolithically integrated vertical JFET and Schottky diode
An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction. |
| US09171932B2 |
Display panel and method of manufacturing the same
A display panel includes a gate line, a gate electrode, a planarization layer, a gate insulation layer, an active layer, a data line, a source electrode, a drain electrode, and a pixel electrode. The gate electrode extends from the gate line. The planarization layer covers the gate line and the gate electrode to have an opening exposing a portion of the gate electrode formed therethrough. The gate insulation layer covers a portion of the gate electrode exposed by the opening and the planarization layer. The active layer is formed on the gate insulation layer and corresponds to the gate electrode. The data line is formed. The source electrode extends from the data line to cover a portion of the opening. The drain electrode is spaced apart from the source electrode and covers a portion of the opening. The pixel electrode is connected to the drain electrode. |
| US09171930B2 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device may include sequentially forming an n-type epitaxial layer, a p type epitaxial layer, and an n+ region on a first surface of an n+ type silicon carbide substrate; forming a buffer layer on the n+ region; forming a photosensitive film pattern on a part of the buffer layer; etching the buffer layer using the photosensitive film pattern as a mask to form a buffer layer pattern; sequentially forming a first metal layer and a second metal layer which include a first portion and a second portion; removing one or more components to expose a part of the n+ region; and etching the exposed part of the n+ region using the first portion of the first metal layer and the first portion of the second metal layer as masks to form a trench. |
| US09171927B2 |
Spacer replacement for replacement metal gate semiconductor devices
A method comprising steps of removing a first dielectric material, including a hard mask layer and one or more spacer material layers, from a semiconductor device having a sacrificial gate whose sidewalls being covered by said spacer material layers, and a raised source and a raised drain region with both, together with said sacrificial gate, being covered by said hard mask layer, wherein the removing is selective to the sacrificial gate, raised source region and raised drain region and creates a void between each of the raised source region, raised drain region and sacrificial gate. The method includes depositing a conformal layer of a second dielectric material to the semiconductor device, wherein the second material conforms in a uniform layer to the raised source region, raised drain region and sacrificial gate, and fills the void between each of the raised source region, raised drain region and sacrificial gate. |
| US09171922B1 |
Combination finFET/ultra-thin body transistor structure and methods of making such structures
One illustrative device disclosed herein includes, among other things, an active layer positioned above a layer of insulating material, a fin positioned above the active layer, a gate insulation layer positioned on the active layer and on the fin, a conductive gate structure that is positioned around at least a portion of the fin and above at least a portion of the active layer, wherein the conductive gate structure comprises at least one work function adjusting metal layer positioned on the gate insulation layer, a first channel region defined in the fin under the conductive gate structure, and a second channel region defined in the active layer under the conductive gate structure. |
| US09171919B2 |
Semiconductor element, semiconductor device and methods for manufacturing thereof
The present invention provides a method of manufacturing a semiconductor element having a miniaturized structure and a semiconductor device in which the semiconductor element having a miniaturized structure is integrated highly, by overcoming reduction of the yield caused by alignment accuracy, accuracy of a processing technique by reduced projection exposure, a finished dimension of a resist mask, an etching technique and the like. An insulating film covering a gate electrode is formed, and a source region and a drain region are exposed, a conductive film is formed thereover, a resist having a different film thickness is formed by applying the resist over the conductive film, the entire surface of the resist is exposed to light and developed, or the entire surface of the resist is etched to form a resist mask, and the conductive film is etched by using the resist mask to form a source and drain electrode. |
| US09171918B2 |
Semiconductor device with an electrode buried in a cavity
A semiconductor device includes an active device region formed in an epitaxial layer disposed on a semiconductor substrate and a buried electrode disposed below the active device region in a cavity formed within the semiconductor substrate. The buried electrode includes an electrically conductive material different than the material of the semiconductor substrate. |
| US09171915B1 |
Method for fabricating semiconductor device
A method for fabricating semiconductor device is disclosed. The method includes the steps of first providing a substrate, in which the substrate includes a SONOS region and a EEPROM region. Next, a first gate layer is formed in the SONOS region and the EEPROM region, the first gate layer is patterned by removing the first gate layer from the SONOS region and forming a floating gate pattern in the EEPROM region, an ONO layer is formed in the SONOS region and the EEPROM region, a second gate layer is formed on the ONO layer of the SONOS region and the EEPROM region, the second gate layer and the first gate layer are patterned to form a floating gate and a control gate in the EEPROM region, and the second gate layer is patterned to form a first gate in the SONOS region. |
| US09171909B2 |
Flexible semiconductor devices based on flexible freestanding epitaxial elements
Flexible semiconductor devices based on flexible freestanding epitaxial elements are disclosed. The flexible freestanding epitaxial elements provide a virgin as grown epitaxy ready surface for additional growth layers. These flexible semiconductor devices have reduced stress due to the ability to flex with a radius of curvature less than 100 meters. Low radius of curvature flexing enables higher quality epitaxial growth and enables 3D device structures. Uniformity of layer formation is maintained by direct absorption of actinic radiation by the flexible freestanding epitaxial element within a reactor. In addition, standard post processing steps like lithography are enabled by the ability of the devices and elements to be flattened using a secondary support element or vacuum. Finished flexible semiconductor devices can be flexed to a radius of curvature of less than 100 meters. Nitrides, Zinc Oxides, and their alloys are preferred materials for the flexible freestanding epitaxial elements. |
| US09171905B2 |
Transistor including a stressed channel, a method for fabricating the same, and an electronic device including the same
A semiconductor device includes a first channel, a second channel, a first strained gate electrode including a first lattice-mismatched layer for applying a first stress to the first channel, and a second strained gate electrode including a second lattice-mismatched layer for applying a second stress to the second channel. |
| US09171897B1 |
Area efficient series MIM capacitor
Two series-connected metal-insulator-metal (MIM) capacitors are disclosed that are suitable for fabrication in the back-end structure of an integrated circuit. The MIM capacitors have first and second electrically conducting plates on a first insulating layer, third and fourth electrically conducting plates overlapping the first and second conducting plates, a second insulating layer between the first and third conducting plates and between the second and fourth conducting plates, a blind via coupling the first and fourth conducting plates, and connections to the second and third conducting plates. Methods of fabricating such series-connected MIM capacitors are also disclosed. |
| US09171892B2 |
Method of manufacturing an organic light emitting display device by patterning and formation of pixel and gate electrodes
A organic light emitting display device includes a thin film transistor (TFT) having a gate electrode, a source electrode and a drain electrode which are insulated from the gate electrode, and a semiconductor layer which is insulated from the gate electrode and which contacts each of the source electrode and the drain electrode; and a pixel electrode electrically connected to one of the source electrode and the drain electrode. The gate electrode is made up of a first conductive layer and a second conductive layer on the first conductive layer, and the pixel electrode is formed of the same material as the first conductive layer of the gate electrode on a same layer as the first conductive layer of the gate electrode. |
| US09171888B2 |
Magnetic memory device and driving method for the same
According to one embodiment, a magnetic memory device includes a magnetic unit, a switching part, and a reading part. The magnetic unit includes a magnetic wire, and first and second magnetic parts. The magnetic wire includes magnetic domains and has one end and one other end. The first magnetic part is connected with the one end and has a first magnetization. The second magnetic part is connected with the one end, and has a second magnetization. The switching part includes first and second switches. The first switch is connected with the first magnetic part and flows a first current between the first magnetic part and the magnetic wire. The second switch is connected with the second magnetic part and flows a second current between the second magnetic part and the magnetic wire. The reading part is configured to read a magnetization of the magnetic domains. |
| US09171887B2 |
Semiconductor device and method of manufacturing same
A semiconductor device includes: a transistor on a main surface side of a semiconductor substrate; and a resistance change element on a back-surface side of the semiconductor substrate, wherein the transistor includes a low-resistance section in the semiconductor substrate, the low-resistance section extending to the back surface of the semiconductor substrate, an insulating film is provided in contact with a back surface of the low-resistance section, the insulating film has an opening facing the low-resistance section, and the resistance change element is connected to the low-resistance section through the opening. |
| US09171885B2 |
Infrared detector and infrared image sensor including the same
An infrared detector includes at least one infrared absorber provided on a substrate and a plurality of thermocouples. The at least one infrared absorber may include one of a plasmonic resonator and a metamaterial resonator. The plurality of thermocouples may be configured to generate electromotive forces in response to thermal energy generated by the at least one infrared absorber. |
| US09171883B2 |
Light emitting device
The present disclosure provides a light emitting device, including a serially- connected LED array including a plurality of LED cells on a substrate, including a first LED cell, a second LED cell, and a serially-connected LED sub-array intervening the first and second LED cell; a trench between two neighboring sides of the first and the second LED cells; and a protecting structure formed near the trench to prevent the light-emitting device from being damaged by a surge voltage higher than a normal operating voltage. The protecting structure includes a first insulating layer and a second insulating layer formed over the first insulating layer and partially filling in the trench, wherein two ends of the first insulating layer extending outward from the second insulating layer partially covers the top surfaces of the first and the second LED cells. |
| US09171872B2 |
Method of manufacturing an offset printing substrate and method of manufacturing a display substrate using the same
In a method of manufacturing an offset printing substrate and a method of manufacturing a display substrate, the method includes forming a first coating layer on a base substrate on which is formed a first concave pattern having a first width. An intermediate substrate is also formed upon the first coating layer of the base substrate, the intermediate substrate having a pattern corresponding to the first concave pattern. An offset printing substrate is also formed upon the pattern of the intermediate substrate, the offset printing substrate having a second concave pattern is formed to correspond to the pattern of the intermediate substrate, and the second concave pattern has a second width smaller than the first width. |
| US09171869B1 |
Array substrate and display device
The present invention provides an array substrate and a display device, to solve the problem of low testing precision due to significant difference between characteristics of TFTs in the detecting region and TFTs in the display region in the prior art. The array substrate comprises a display region and a dummy pixel region provided in the periphery of the display region, wherein, at least one detecting unit is provided in the dummy pixel region, each detecting unit comprises one second pixel unit, one thin film transistor is provided correspondingly to each second pixel unit, and respective electrodes of each thin film transistor provided correspondingly to the second pixel unit are connected to an external test device through test lines, respectively. |
| US09171868B2 |
Semiconductor device and electronic device
An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 μm is 1 aA or less. |
| US09171864B2 |
Display substrate and method of manufacturing the same
A display substrate includes a gate metal pattern including a gate line disposed on a base substrate and a gate electrode electrically connected with the gate line, an active pattern entirely overlapped with the gate metal pattern and comprising an oxide semiconductor and a data metal pattern disposed on the active pattern and including a data line, a source electrode electrically connected with the gate line and a drain electrode spaced apart from the source electrode. The active pattern has an overlapped region in which the active pattern is overlapped with the source electrode and the drain electrode and an exposed region in which the active pattern is not overlapped with the source electrode and the drain electrode. The thickness of the overlapping region and a thickness of the exposing region are same. |
| US09171861B2 |
Semiconductor memory device and system having the same
A semiconductor memory device includes a first dummy transistor coupled to a bit line, a first select transistor formed where a first selection line surrounds a vertical channel layer, a second dummy transistor coupled to a common source line, a second select transistor formed where a second selection line surrounds the vertical channel layer, and main cell transistors coupled between the first and second select transistors. |
| US09171857B2 |
Dense arrays and charge storage devices
There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing. |
| US09171855B2 |
Three-dimensional non-volatile memory
A three-dimensional one-transistor non-volatile memory device and a manufacturing method thereof are provided. The memory device includes a primary fin disposed on a substrate along a first direction, first and second secondary fins disposed on the substrate along a second direction, and a first gate of a first memory cell disposed on the substrate in a gate region thereof. The first gate includes a program gate, a floating gate and a control gate. |
| US09171849B2 |
Three dimensional dual-port bit cell and method of using same
A three dimensional dual-port bit cell generally comprises a first portion disposed on a first tier, wherein the first portion includes a plurality of port elements. The dual-port bit cell also includes a second portion disposed on a second tier that is vertically stacked with respect to the first tier using at least one via, wherein the second portion includes a latch. |
| US09171847B1 |
Semiconductor structure
A semiconductor structure includes a semiconductor substrate, an active area in the semiconductor substrate, two trenches intersecting the active area to thereby divide the active area into a source region and two drain regions spaced apart from the source region, a saddle-shaped N+/N−/N+ structure in the source region of the active area; and two N+ drain doping regions in the two drain regions, respectively. |
| US09171845B2 |
Integrated junction and junctionless nanotransistors
Semiconductor devices including a first transistor and a second transistor are integrated on a substrate. Each of the first and second transistors include a nano-sized active region including source and drain regions provided in respective end portions of the nano-sized active region and a channel forming region provided between the source and drain regions. The source and drain regions of the first transistor have the same conductivity type as those of the second transistor, and the second transistor has a threshold voltage lower than that of the first transistor. The channel forming region of the second transistor may include a homogeneously doped region, whose conductivity type is the same as the source and drain regions of the second transistor and is different from the channel forming region of the first transistor. |
| US09171844B2 |
Gate structures and methods of manufacture
A metal gate structure with a channel material and methods of manufacture such structure is provided. The method includes forming dummy gate structures on a substrate. The method further includes forming sidewall structures on sidewalls of the dummy gate structures. The method further includes removing the dummy gate structures to form a first trench and a second trench, defined by the sidewall structures. The method further includes forming a channel material on the substrate in the first trench and in the second trench. The method further includes removing the channel material from the second trench while the first trench is masked. The method further includes filling remaining portions of the first trench and the second trench with gate material. |
| US09171843B2 |
Semiconductor device and fabricating the same
The present disclosure provides a method for fabricating an integrated circuit device. The method includes providing a precursor including a substrate having first and second metal-oxide-semiconductor (MOS) regions. The first and second MOS regions include first and second gate regions, semiconductor layer stacks, and source/drain regions respectively. The method further includes laterally exposing and oxidizing the semiconductor layer stack in the first gate region to form first outer oxide layer and inner nanowire set, and exposing the first inner nanowire set. A first high-k/metal gate (HK/MG) stack wraps around the first inner nanowire set. The method further includes laterally exposing and oxidizing the semiconductor layer stack in the second gate region to form second outer oxide layer and inner nanowire set, and exposing the second inner nanowire set. A second HK/MG stack wraps around the second inner nanowire set. |
| US09171842B2 |
Sequential circuit and semiconductor device
A highly reliable semiconductor device in which a shift in the threshold voltage of a transistor due to deterioration is prevented is provided. The semiconductor device is formed using a sequential circuit including: a first transistor controlling the electrical connection between a first wiring and a second wiring; a second transistor and a third transistor in each of which a source and a drain are electrically connected to each other and which control the electrical connection between the second wiring and a third wiring; and a switch group controlling the electrical connection between a gate of the first transistor and the third wiring or a fourth wiring, the electrical connection between a gate of the second transistor and the third wiring or the fourth wiring, and the electrical connection between a gate of the third transistor and the third wiring or the fourth wiring in response to a control signal. |
| US09171841B2 |
Field plate trench transistor and method for producing it
A field plate trench transistor having a semiconductor body. In one embodiment the semiconductor has a trench structure and an electrode structure embedded in the trench structure. The electrode structure being electrically insulated from the semiconductor body by an insulation structure and having a gate electrode structure and a field electrode structure. The field plate trench transistor has a voltage divider configured such that the field electrode structure is set to a potential lying between source and drain potentials. |
| US09171840B2 |
Semiconductor device and manufacturing method thereof
An offset transistor and a non-offset transistor each including an oxide semiconductor are formed over one substrate. An oxide semiconductor layer, a gate insulator, and first layer wirings which serve as gate wirings are formed. After that, the offset transistor is covered with a resist and impurities are mixed into the oxide semiconductor layer, so that an n-type oxide semiconductor region is formed. Then, second layer wirings are formed. Through the above steps, the offset transistor and the non-offset transistor (e.g., aligned transistor) can be formed. |
| US09171839B2 |
Integrated circuits with resistors
An integrated circuit includes a transistor. The transistor includes a first gate dielectric structure over a substrate, a work-function layer over the first gate dielectric structure, a conductive layer over the work-function layer, and a source/drain (S/D) region adjacent to each sidewall of the first gate dielectric structure. Additionally, the integrated circuit includes a resistor structure. The resistor structure further includes a first doped semiconductor layer over the substrate, wherein a top surface of the resistor structure is substantially planar with a top surface of the transistor. |
| US09171836B2 |
Method of forming electronic components with increased reliability
An electronic component includes a depletion-mode transistor, an enhancement-mode transistor, and a resistor. The depletion-mode transistor has a higher breakdown voltage than the enhancement-mode transistor. A first terminal of the resistor is electrically connected to a source of the enhancement-mode transistor, and a second terminal of the resistor and a source of the depletion-mode transistor are each electrically connected to a drain of the enhancement-mode transistor. A gate of the depletion-mode transistor can be electrically connected to a source of the enhancement-mode transistor. |
| US09171831B2 |
Power semiconductor with a Si chip and a wideband chip having matched loss and area ratios
A power semiconductor apparatus which is provided with a first power semiconductor device using Si as a base substance and a second power semiconductor device using a semiconductor having an energy bandgap wider than the energy bandgap of Si as a base substance, and includes a first insulated metal substrate on which the first power semiconductor device is mounted, a first heat dissipation metal base on which the first insulated metal substrate is mounted, a second insulated metal substrate on which the second power semiconductor device is mounted, and a second heat dissipation metal base on which the second insulated metal substrate is mounted. |
| US09171827B2 |
Stack type semiconductor package
A stack type semiconductor package includes a lower semiconductor package including a lower package substrate and at least one lower semiconductor chip disposed on the lower package substrate; an upper semiconductor package including an upper package substrate larger than the lower package substrate and at least one upper semiconductor chip disposed on the upper package substrate; an inter-package connector connecting an upper surface of the lower package substrate to a lower surface of the upper package substrate; and a filler filling in between the lower package substrate and the upper package substrate while substantially surrounding the inter-package connector. |
| US09171826B2 |
High voltage solid-state transducers and solid-state transducer arrays having electrical cross-connections and associated systems and methods
Solid-state transducer (“SST”) dies and SST arrays having electrical cross-connections are disclosed herein. An array of SST dies in accordance with a particular embodiment can include a first terminal, a second terminal and a plurality of SST dies coupled between the first and second terminals with at least a pair of the SST dies being coupled in parallel. The plurality of SST dies can individually include a plurality of junctions coupled in series with an interconnection between each individual junction. Additionally, the individual SST dies can have a cross-connection contact coupled to the interconnection. In one embodiment, the array can further include a cross-connection between the cross-connection contacts on the pair of the SST dies. |
| US09171825B2 |
Semiconductor device and method of fabricating the same
A semiconductor device and a method of fabricating the same includes providing a first semiconductor chip which has first connection terminals, providing a second semiconductor chip which comprises top and bottom surfaces facing each other and has second connection terminals and a film-type first underfill material formed on the bottom surface thereof, bonding the first semiconductor chip to a mounting substrate by using the first connection terminals, bonding the first semiconductor chip and the second semiconductor chip by using the first underfill material, and forming a second underfill material which fills a space between the mounting substrate and the first semiconductor chip and covers side surfaces of the first semiconductor chip and at least part of side surfaces of the second semiconductor chip. |
| US09171824B2 |
Stacked semiconductor device assembly
The semiconductor device system includes multiple stacked substantially identical semiconductor devices each including a first side and an opposing second side. First and second pads are disposed at the first side of the semiconductor device, while third and fourth pads are disposed at the second side of the semiconductor device. First interface circuit is electrically coupled to the first pad and the third pad, while second interface circuit is electrically coupled to the second pad and the fourth pad. The second interface circuit is separate and distinct from the first interface circuit. At least one first semiconductor device of the multiple semiconductor devices is offset from other of the multiple semiconductor devices such that the fourth pad on the first semiconductor device is aligned with, and electrically connected to, the first pad on an adjacent one of the multiple semiconductor devices. In some embodiments, the first pad is associated with a first capacitance, while the second pad is associated with a second capacitance that is smaller than the first capacitance. |
| US09171819B2 |
Semiconductor package
Provided is a semiconductor package that may prevent deformation of stacked semiconductor chips and minimize a semiconductor package size. The semiconductor package includes a package base substrate, a lower chip stacked on the package base substrate, an upper chip stacked on the lower chip, and a first die attach film (DAF) attached to a bottom surface of the upper chip to cover at least a portion of the lower chip. The first DAF may be a multi-layer film including a first attaching layer contacting the bottom surface of the upper chip and a second attaching layer attached to a bottom of the first attaching layer to cover at least a portion of a side surface of the lower chip. |
| US09171811B2 |
Bump pad structure
An embodiment is a bump bond pad structure that comprises a substrate comprising a top layer, a reinforcement pad disposed on the top layer, an intermediate layer above the top layer, an intermediate connection pad disposed on the intermediate layer, an outer layer above the intermediate layer, and an under bump metal (UBM) connected to the intermediate connection pad through an opening in the outer layer. Further embodiments may comprise a via mechanically coupling the intermediate connection pad to the reinforcement pad. The via may comprise a feature selected from the group consisting of a solid via, a substantially ring-shaped via, or a five by five array of vias. Yet, a further embodiment may comprise a secondary reinforcement pad, and a second via mechanically coupling the reinforcement pad to the secondary reinforcement pad. |
| US09171805B2 |
Substrate identification circuit and semiconductor device
Provided is a substrate identification circuit that generates a numeric value, whose duplication is difficult and which is proper to a substrate, at low cost and a semiconductor device having such a substrate identification circuit. A substrate identification circuit 304 is produced by utilizing variations in characteristics among TFTs formed on a substrate having an insulating surface. The substrate identification circuit 304 includes a plurality of proper bit generating circuits, each of which is constructed from a plurality of TFTs and outputs a one-bit random number based on variations in characteristics among the plurality of TFTs. The substrate identification circuit generates a numeric value proper to the substrate using the one-bit random number. The substrate identification circuit may include a circuit that makes a judgment by comparing the numeric value proper to the substrate with an identification number inputted from the outside. |
| US09171800B2 |
Electrical fuse with bottom contacts
A method including forming a fuse link after a first fuse contact and a second fuse contact. The fuse link is in direct contact with both the first fuse contact and the second fuse contact. Embodiments of the invention provide an e-fuse that is capable of being connected to a device either through back end of line or by a long contact allowing for sufficient separation between the e-fuse and the device. |
| US09171799B2 |
Photoelectric conversion apparatus, image pickup system, and manufacturing method therefor
A photoelectric conversion apparatus includes a semiconductor substrate on which a photoelectric conversion element and a transistor are arranged and a plurality of wiring layers including a first wiring layer and a second wiring layer above the first wiring layer, in which a connection between the semiconductor substrate and any of the plurality of wiring layers, between a gate electrode of the transistor and any of the plurality of wiring layers, or between the first wiring layer and the second wiring layer, has a stacked contact structure. |
| US09171793B2 |
Semiconductor device having a trace comprises a beveled edge
A semiconductor device can include a substrate and a trace layer positioned in proximity to the substrate and including a trace for supplying an electrical connection to the semiconductor device. Conductive layers can be positioned in proximity to the trace layer and form a bond pad. A non-conductive thin film layer can be positioned between the trace layer and the conductive layers. The thin film layer can include a via to enable the electrical connection from the trace to the bond pad. A portion of the trace between the substrate and the plurality of conductive layers can have a beveled edge. |
| US09171790B2 |
Package on package devices and methods of packaging semiconductor dies
Package on package (PoP) devices and methods of packaging semiconductor dies are disclosed. A PoP device includes a first packaged die and a second packaged die coupled to the first packaged die. Metal stud bumps are disposed between the first packaged die and the second packaged die. The metal stud bumps include a stick region, a first ball region coupled to a first end of the stick region, and a second ball region coupled to a second end of the stick region. The metal stud bumps include a portion that is partially embedded in a solder joint. |
| US09171786B1 |
Integrated circuit with recess for die attachment
An integrated circuit (IC) die has an active side and an inactive side, opposite the active side. A recess is formed within the interior of the inactive side and extends partially through the integrated circuit towards the active side. The IC die is part of a packaged IC device, where the die is attached to a package component such as a lead frame, substrate, or another die, using die attach adhesive that fills the recess, thereby providing a more reliable bond between the IC die and the package component. |
| US09171783B2 |
Semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device includes forming a lower electrode pattern on a substrate, forming a first insulating layer on the lower electrode pattern, forming an upper electrode pattern on the first insulating layer, forming an etch blocking spacer at a side of the upper electrode pattern, forming a second insulating layer on the upper electrode pattern, etching the second insulating layer to form a cavity which exposes the etch blocking spacer, and forming a contact ball in the cavity. |
| US09171781B2 |
Semiconductor devices and methods of fabricating the same
Semiconductor devices, and methods of fabricating the same, include first conductive lines on a substrate, and a first molding layer covering the first conductive lines. The first conductive lines have air gaps between adjacent first conductive lines. Sidewalls of the first conductive lines and a bottom surface of the first molding layer collectively define a first gap region of each of the air gaps. The sidewalls of the first conductive lines and a top surface of the first molding layer collectively define a second air gap region of each of the air gaps. |
| US09171779B2 |
Semiconductor laser structure
A semiconductor laser structure is provided. The semiconductor laser comprises a central thermal shunt, a ring shaped silicon waveguide, a contiguous thermal shunt, an adhesive layer and a laser element. The central thermal shunt is located on a SOI substrate which has a buried oxide layer surrounding the central thermal shunt. The ring shaped silicon waveguide is located on the buried oxide layer and surrounds the central thermal shunt. The ring shaped silicon waveguide includes a P-N junction of a p-type material portion, an n-type material portion and a depletion region there between. The contiguous thermal shunt covers a portion of the buried oxide layer and surrounds the ring shaped silicon waveguide. The adhesive layer covers the ring shaped silicon waveguide and the buried oxide layer. The laser element covers the central thermal shunt, the adhesive layer and the contiguous thermal shunt. |
| US09171778B2 |
Dual-damascene process to fabricate thick wire structure
A method and a semiconductor device are provided. The semiconductor device includes a partial via etched in a stacked structure and a trough above the partial via. The method includes performing thick wiring using selective etching while etching the partial via to an etch stop layer. |
| US09171774B2 |
Power semiconductor module and method of manufacturing the same
A power semiconductor module has a first frame portion, a power semiconductor element, a second frame portion, a control integrated circuit, a wire, and an insulator portion. The power semiconductor element is mounted on a first surface of the first frame portion. The control integrated circuit is mounted on a third surface of the second frame portion for controlling the power semiconductor element. A wire has one end connected to the power semiconductor element and the other end connected to the control integrated circuit. The first surface of the first frame portion and the third surface of the second frame portion are located at the same height in a direction vertical to the first surface of the first frame portion. |
| US09171768B2 |
Semiconductor device
A semiconductor device includes an insulating substrate joined with a semiconductor chip, a case covering a surface of the insulating substrate where the semiconductor chip is joined, and a control terminal in which one end portion is electrically connected to the semiconductor chip, and another end portion passes through the case and is exposed to outside of the case. A portion of the control terminal exposed to the outside of the case includes a cut-out section where a part of the exposed portion is cut out, and a blocking section formed by bending a portion surrounded by the cut-out section and remaining on the control terminal. The blocking section contacts the case from the outside of the case and blocks a movement of the control terminal. |
| US09171766B2 |
Lead frame strips with support members
A lead frame strip includes a plurality of connected unit lead frames. Each unit lead frame has a die paddle for attaching to a semiconductor die, a tie bar connecting the die paddle to a periphery of the unit lead frame, and a plurality of leads projecting from the periphery toward the die paddle. The lead frame strip further includes a support member patterned into or connected to the periphery of each unit lead frame at a proximal end and bent into a different plane than the leads so that a distal end of each support member is disposed above or below the leads and projects toward the die paddles. The distal end of the support members can be anchored in a mold compound encapsulating electronic components attached to the die paddles, to maintain structural integrity during lead frame strip testing prior to unit lead frame separation. |
| US09171764B2 |
Methods for fabricating integrated circuits using self-aligned quadruple patterning
Methods for fabricating integrated circuits and for forming masks for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes etching an upper mandrel layer to form upper mandrels. At least one upper mandrel has a first critical dimension and at least one upper mandrel has a second critical dimension not equal to the first critical dimension. The method further includes forming upper spacers adjacent the upper mandrels and etching a lower mandrel layer using the upper spacers as an etch mask to form lower mandrels. The method also includes forming lower spacers adjacent the lower mandrels and etching a material using the lower spacers as an etch mask to form variably spaced structures. |
| US09171763B2 |
Methods of manufacturing a semiconductor device having varying p-top and n-grade regions
An improved semiconductor is provided whereby n-grade and the p-top layers are defined by a series of discretely placed n-type and p-type diffusion segments. Also provided are methods for fabricating such a semiconductor. |
| US09171760B2 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes: forming electrodes on a first major surface of a semiconductor substrate having first and second major surfaces facing in opposite directions; and forming a cleavage-inducing pattern on the first major surface of the semiconductor substrate. The cleavage-inducing pattern extends over a target cleavage position located between the electrodes, has a recess extending over the target cleavage position, and is made of a material different from the material of the semiconductor substrate. The method includes forming a scribed groove in the second major surface of the semiconductor substrate and in a position facing the target cleavage position; and cleaving the semiconductor substrate having the scribed groove and the cleavage-inducing pattern by applying pressure, through a cleaving blade, to the first major surface of the semiconductor substrate. |
| US09171759B2 |
System and method for die to die stress improvement
A semiconductor wafer having a plurality of chip die areas arranged on a wafer in an array, each chip die area including a seal ring area with one or more first sets of polygonal structures. The wafer further comprises scribe line areas between the chip die areas, the scribe line areas including one or more second sets of polygonal structures. The presence of proximate polygonal structures between the scribe line and seal ring areas balance stresses between the chip die areas during wafer dicing operation. |
| US09171758B2 |
Method of forming transistor contacts
Embodiments of the present invention provide an improved method for forming transistor contacts. A sacrificial layer is deposited in a first set of contact cavities, and a capping layer is formed on the sacrificial layer. This protects the first set of contact cavities during formation of a second set of contact cavities. The sacrificial layer is then removed, and the first and second sets of contact cavities are filled with a conductive material. |
| US09171755B2 |
Methods of manufacturing semiconductor devices including capped metal patterns with air gaps in-between for parasitic capacitance reduction
A method of manufacturing a semiconductor device may include: forming an interlayer insulating layer having openings on a substrate; forming a metal layer in the openings and on the interlayer insulating layer, the metal layer including a sidewall portion on a sidewall of each of the openings and a bottom portion on a bottom surface of each of the openings, wherein the bottom portion is thicker than the sidewall portion; reflowing the metal layer to form metal patterns in the openings, the metal patterns having top surfaces at a level lower than a topmost surface of the interlayer insulating layer; and/or forming capping patterns covering the metal patterns in the openings. |
| US09171752B1 |
Product comprised of FinFET devices with single diffusion break isolation structures, and methods of making such a product
One illustrative method disclosed herein includes, among other things, forming first, second and third fins that are arranged side-by-side, forming a recessed layer of insulating material in a plurality of trenches, after recessing the layer of insulating material, masking the first and second fins while exposing a portion of the axial length of the second fin, removing the exposed portion of the second fin so as to thereby define a cavity in the recessed layer of insulating material, forming an SDB isolation structure in the cavity, wherein the SDB isolation structure has an upper surface that is positioned above the recessed upper surface of the recessed layer of insulating material, removing the masking layer, and forming a gate structure for a transistor above the SDB isolation structure. |
| US09171748B2 |
Cassette adapter, adapter main body locking apparatus and seating sensor mechanism
A cassette adapter which makes it possible for a second cassette which accommodates a circular wafer of a diameter of 200 mm to be used on a load port ready for a first cassette which accommodates a different circular wafer of another diameter of 300 mm is locked to the load port by an adapter main body locking apparatus. The locking apparatus includes a locking air cylinder serving as a locking member for locking the first cassette to a carrier base of the load port, and a locking target member provided integrally on a rear face of an adapter plate of the cassette adapter for disengageably engaging with a locking pawl at an end of a rod of the air cylinder. A seating sensor mechanism detects that the second cassette is seated at a correct position on the adapter plate. |
| US09171747B2 |
Method and apparatus for irradiating a semi-conductor wafer with ultraviolet light
An apparatus for generating ultraviolet light and irradiating a 450 mm diameter semi-conductor wafer. The apparatus includes a plenum and an array of nine RF irradiator units coupled with the plenum. Each irradiator unit includes a plasma lamp bulb and an RF generator operable to generate a radiation energy field to excite the plasma lamp bulb and emit the ultraviolet light. The nine irradiator units are arranged in three rows with three of the irradiator units in each row. |
| US09171741B2 |
Packaging substrate and fabrication method thereof
A method for fabricating a packaging substrate includes: providing a carrier having a first metal layer and a second metal layer formed on the first metal layer; forming a first circuit layer on the second metal layer and forming a separating portion on an edge of the second metal layer such that the separating portion is spaced from the first circuit layer; forming a dielectric layer on the second metal layer and the first circuit layer such that the first circuit layer and the separating portion are embedded in the dielectric layer and portions of the dielectric layer are formed between the first circuit layer and the separating portion; forming a second circuit layer on the dielectric layer; and applying forces on the separating portion so as to remove the first metal layer and the carrier, thereby maintaining the integrity of the first circuit layer. |
| US09171740B2 |
Quad flat non-leaded semiconductor package and fabrication method thereof
A method for fabricating a quad flat non-leaded (QFN) package includes: forming die pads and bump solder pads by pressing a metal plate, wherein each of the die pads and the bump solder pads has at least a cross-sectional area greater than another located underneath along its thickness dimension, thereby enabling the die pads and the solder pads to be securely embedded in an encapsulant. The method further includes removing the metal plate after forming the encapsulant so as to prevent the encapsulant from overflowing onto the bottom surfaces of the bump solder pads. |
| US09171739B1 |
Integrated circuit packaging system with coreless substrate and method of manufacture thereof
An integrated circuit packaging system, and a method of manufacture thereof, including: a patterned first conductive plating; a molding on the patterned first conductive plating; a through via through the molding; a second conductive plating on the molding and the through via; a protection layer partially covering the first conductive plating, the second conductive plating and the molding; a device on the first conductive plating; and an external connector being attached to the second conductive plating. |
| US09171738B2 |
Systems and methods for integrating bootstrap circuit elements in power transistors and other devices
Embodiments relate to bootstrap circuits integrated with at least one other device, such as a power transistor or other semiconductor device. In embodiments, the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap diode, or the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap transistor. The bootstrap capacitor comprises a semiconductor-based capacitor, as opposed to an electrolytic, ceramic or other capacitor, in embodiments. The integration of the bootstrap circuit with another circuit or device, such as a power transistor device in one embodiment, is at a silicon-level in embodiments, rather than as a module-like system-in-package of conventional approaches. In other words, the combination of the bootstrap circuit elements and power transistor or other device forms a system-on-silicon, or an integrated circuit, in embodiments, and additionally can be arranged in a single package. |
| US09171737B2 |
Thermal oxide film formation method for silicon single crystal wafer
Disclosed is a method of forming a thermal oxide film on a silicon single crystal wafer, which includes throwing the silicon single wafer into a heat treatment furnace; elevating temperature of the heat treatment furnace up to a temperature T1 where a thermal oxide film is formed to form a thermal oxide film having a thickness d1; subsequently lowering the temperature of the heat treatment furnace down to a temperature lower than the temperature T1; and thereafter elevating the temperature of the heat treatment furnace up to a temperature T2 higher than the temperature T1 to additionally form a thermal oxide film having a thickness d2 thicker than the thickness d1. Thus, there is provided a thermal oxide film formation method to suppress occurrence of slip dislocation and/or crack of the silicon single wafer during formation of the thermal oxide film. |
| US09171731B2 |
Method of forming the gate with the LELE double pattern
The invention relates to microelectronic technology and, more specifically, relates to a method of forming a gate with a LELE double pattern. The method adopts an ONO structure (Oxide-SiN-Oxide). The ONO structure is exposed twice, and the advanced patterning film is used as a mask in the processing of polysilicon etching. The ONO structure is used to replace the traditional hardmask of silicon oxide, and the substructure of ODL (Organic Under Layer) which is based on the spin-on, and the middle layer structure of SHB (Si-based hardmask). The method saves cost and improves the process of advanced patterning film as a mask with the nodes in 40 nm and above which is applied to the process with the nodes in 22/20 nm and below. Consequently, the maturity and stability of the process for poly gate with the nodes in 22/20 nm and below are improved. |
| US09171728B2 |
Method for forming a power semiconductor device
A method for forming a semiconductor device includes providing a semiconductor body which has a main surface and a first n-type semiconductor region, forming a trench which extends from the main surface into the first n-type semiconductor region, and forming a dielectric layer having fixed negative charges on a surface of the trench, by performing at least one atomic layer deposition using an organometallic precursor. |
| US09171727B2 |
Method of manufacturing a semiconductor device
After forming a first film over the main surface of a semiconductor substrate, the first film is patterned, thereby forming a control gate electrode for a non-volatile memory, a dummy gate electrode, and a first film pattern. Subsequently, a memory gate electrode for the non-volatile memory adjacent to the control gate electrode is formed. Then, the first film pattern is patterned thereby forming a gate electrode and a dummy gate electrode. |
| US09171726B2 |
Low noise semiconductor devices
Semiconductor devices may be configured to reduce noise in the devices. For example, a semiconductor device may be configured or made with a first doped region within a semiconductor substrate to operate as an extended drain region, a trench isolation region, a second doped region between the first doped region and the trench isolation region, wherein the trench isolation region and the second doped region may be at least partially formed within the first doped region. Additionally, or alternatively, the second doped region may be within the first doped region and at least partially surround the trench isolation region, the first and second doped regions may have the same conductivity type, and the second doped region may have a higher conductivity than the first doped region. |
| US09171713B2 |
Device and method for controlling supply voltage/frequency of process variation
A device capable of controlling a supply voltage and a supply frequency using information of a manufacturing process variation includes a data storage device storing data indicating performance of the device, a decoder decoding the data stored in the data storage device and outputting decoded data, and a frequency control block outputting a frequency controlled clock signal in response to the decoded data output from the decoder. The device further includes a voltage control block outputting a level controlled supply voltage in response to the decoded data. The voltage control block outputs a body bias control voltage controlling a body bias voltage of at least one of a plurality of transistors embodied in the semiconductor device in response to the decoded data. The performance is operational speed of the device or leakage current of the semiconductor device. |
| US09171706B1 |
Mass analysis device and mass analysis method
Mass analysis is performed on the same sample while changing the cooling gas supply rate to the ion trap, i.e. the gas pressure conditions, and the respective mass spectra are obtained. Under high gas, ion energy will decrease and modifiers such as phosphate groups will not detach readily, while under low gas, ion energy will remain high and so detachment of modifiers will occur readily. Thus, between multiple mass spectra obtained while changing the gas pressure, if the mass difference between a peak for which signal intensity increased and a peak for which it decreased corresponds to the mass of a known modifier or an integer multiple thereof, it can be inferred that those peaks have the same basic structure and differ only in the number of modifiers. Thus, such peaks are selected as precursor ions to perform MS2 analysis and structural analysis. |
| US09171703B2 |
Apparatus with sidewall protection for features
Provided herein is an apparatus, including a patterned resist overlying a substrate; a number of features of the patterned resist, wherein the number of features respectively includes a number of sidewalls; and a sidewall-protecting material disposed about the number of sidewalls, wherein the sidewall-protecting material is characteristic of a conformal, thin-film deposition, and wherein the sidewall-protecting material facilitates a high-fidelity pattern transfer of the patterned resist to the substrate during etching. |
| US09171701B2 |
Bowl shaped metal nanostruture array
A bowl shaped metal nanostructure array includes a substrate having a surface and a number of particle-in-bowl structures located on the surface of the substrate. Each particle-in-bowl structures includes a bowl shaped concave structure and a protruding member protruding from the bowl shaped concave structure. The protruding member is integrated with the bowl shaped concave structure. |
| US09171699B2 |
Impedance-based adjustment of power and frequency
Systems and methods for impedance-based adjustment of power and frequency are described. A system includes a plasma chamber for containing plasma. The plasma chamber includes an electrode. The system includes a driver and amplifier coupled to the plasma chamber for providing a radio frequency (RF) signal to the electrode. The driver and amplifier is coupled to the plasma chamber via a transmission line. The system further includes a selector coupled to the driver and amplifier, a first auto frequency control (AFC) coupled to the selector, and a second AFC coupled to the selector. The selector is configured to select the first AFC or the second AFC based on values of current and voltage sensed on the transmission line. |
| US09171693B2 |
Coated X-ray window
An X-ray window including a primary and a secondary window element. In order to evaporate debris by ohmic heating, current flows through the secondary (upstream) window element. Meanwhile, electric charge originating from electron irradiation and/or depositing charged particles is to be drained off the window element. To prevent large debris particles from short-circuiting the window element and changing the desired heating pattern, the current for heating the window element flows through a layer which is insulated from the charge-drain layer. |
| US09171692B2 |
Drive for rotary anode with stator with yoke winding
An x-ray arrangement includes a vacuum container in, which a rotary anode and a rotor of an electrical machine are disposed. The rotary anode and the rotor have a torque-proof connection to one another and are rotatably supported in the vacuum container, so that the rotary anode and the rotor are rotatable around an axis of rotation. Viewed in a direction of the axis of rotation, a laminated stator core is disposed in an area of the rotor. The area of the rotor, in relation to the axis of rotation, surrounds the vacuum container radially outwards. A stator winding system is disposed in the laminated stator core. The stator winding system has windings embodied as a yoke winding. |
| US09171690B2 |
Variable field emission device
A field emission device is configured as a heat engine, wherein the configuration of the heat engine is variable. |
| US09171681B2 |
Electromagnetic switch
An electromagnetic switch is provided which includes: a coil generating magnetomotive force; a frame accommodating the coil and generating a flux path; a resin cover covering an opening of the frame; and a current-supply terminal member energizing the coil. The current-supply terminal member includes: a blade-shaped terminal whose end is connected to the coil and whose another end is drawn out of the resin cover in the axial direction of the electromagnetic switch; and a plate-shaped external connection terminal whose end is joined to an end of the blade-shaped terminal and whose another end is drawn out in the direction intersecting the axial direction. A portion between the ends of the external connection terminal is insert-molded in a terminal anchor block provided with the resin cover. A female terminal of a power supply connector provided at an electric supply line is fitted and electrically connected to the external connection terminal. |
| US09171675B2 |
Electrical storage device, lithium ion capacitor and negative electrode for lithium ion capacitor
An electrical storage device includes a positive electrode, and a negative electrode having a negative electrode active material layer containing a fluorine-containing acrylic binder, the negative electrode active material layer having a density of not less than 0.75 g/cc and not more than 1.10 g/cc. |
| US09171673B2 |
On-chip capacitors with a variable capacitance for a radiofrequency integrated circuit
Methods of fabricating an on-chip capacitor with a variable capacitance, as well as methods of adjusting the capacitance of an on-chip capacitor and design structures for an on-chip capacitor. The method includes forming first and second ports configured to be powered with opposite polarities, first and second electrodes, and first and second voltage-controlled units. The method includes configuring the first voltage-controlled unit to selectively couple the first electrode with the first port, and the second voltage-controlled unit to selectively couple the second electrode with the second port. When the first electrode is coupled by the first voltage-controlled unit with the first port and the second electrode is coupled by the second voltage-controlled unit with the second port, the capacitance of the on-chip capacitor increases. |
| US09171671B2 |
Laminate type electronic component and manufacturing method therefor
In a method of manufacturing a laminate type electronic component, while the distance between adjacent exposed ends of a plurality of internal electrodes is adjusted preferably to be about 50 μm or less, a plurality of conductive particles composed of Pd, Pt, Cu, Au, or Ag are provided on the surface of a component main body. The conductive particles have an average particle size of about 0.1 nm to about 100 nm, which are distributed in island-shaped configurations over the entire surface of the component main body, while the average distance between the respective conductive particles is adjusted to fall within the range of about 10 nm to about 100 nm. The component main body is subjected to electrolytic plating such that plating growth develops in and around a region including the respective exposed ends of the plurality of internal electrodes. |
| US09171670B2 |
Capacitor structures having supporting patterns and methods of forming the same
A method of forming a capacitor structure includes forming a mold layer on a substrate, in which the substrate includes a plurality of plugs therein, partially removing the mold layer to form a plurality of openings, in which the plugs are exposed by the openings, forming a plurality of lower electrodes filling the openings, in which the lower electrodes have a pillar shape, removing an upper portion of the mold layer to expose upper portions of the lower electrodes, forming a supporting pattern on exposed upper sidewalls of the lower electrodes and on the mold layer, removing the mold layer, and sequentially forming a dielectric layer and an upper electrode on the lower electrodes and the supporting pattern. |
| US09171658B2 |
Flat-conductor connection element for an antenna structure
A flat-conductor connection element for an antenna structure is described. The flat-conductor connection element is arranged in or on a pane and has: a flat conductor with a base layer, a conductor track, a first dielectric layer, a shield, and a second dielectric layer and a metal frame. |
| US09171657B2 |
Glass for insulating composition
The invention relates to a composition comprising mica and glass, said glass comprising: 10 to 30 mol % of SiO2 5 to 40 mol % of BaO 15 to 30 mol % of B2O3, the sum of the concentrations of zinc oxide, alkali metal oxide and alkaline earth oxide in the glass extending from 15 to 65 mol %. This composition is intended to be molded at a temperature above the Tg of the glass so as to form composite parts that can serve as an electrical insulator. |
| US09171656B2 |
Electrically insulating nanocomposite having semiconducting or nonconductive nanoparticles, use of this nanocomposite and process for producing it
A cellulose material contains cellulose fibers having an impregnation. Accordingly, the impregnation is made of nanoparticles, in particular BNNT, containing a shell of polymers, in particular PEDOT:PSS. The impregnation forms a type of network that can reduce the specific resistance of the cellulose material due to the electrical conductivity of the network. The cellulose material can thereby be advantageously adapted to corresponding applications with respect to the electrical properties thereof. The cellulose material can thus also be used to electrically insulate transformers, wherein the cellulose material is thereby saturated with transformer oil and an adaptation of the specific resistance of the cellulose material to the specific resistance of the oil leads to improved dielectric strength of the transformer insulation. A method for producing the cellulose material described above contains a suitable impregnation step for the cellulose material. |
| US09171651B2 |
Fixture for component to be mounted to circuit board
An object is to provide a fixture for a component to be mounted on a circuit board which is easily manufactured and can exhibit good solderability and high whisker resistance. In a fixture which includes a solder joint plate part 11 that can be fixed on a surface of a circuit board by soldering using solder cream, and a component fixing part 12 that can be fixed to a component configured to be mounted on the circuit board, and in which Sn plating is performed at least on a solder joint surface of the solder joint plate part, the solder joint plate part 11 is divided into a plurality of long-plate-like solder joint pieces 13, and on both sides of each of the long-plate-like solder joint pieces 13, wing-like joint feet are provided to protrude through bent flexible parts 16, and the lower surface of each of the joint feet 15 becomes a solder joint surface 18 to be joined with the surface of the circuit board by solder cream. |
| US09171648B2 |
Method of replacing shroud of boiling water nuclear reactor, and associated apparatus
An improved method of replacing at least a portion of a shroud apparatus of a BWR includes forming a cut in the shroud and removing at least a portion of the shroud apparatus that is adjacent the cut from a remaining portion of the shroud apparatus. The method also includes positioning a replacement shroud system adjacent the remaining portion of the original shroud apparatus and connecting a plurality of removable fastening devices between the new replacement shroud system and the remaining portion of the original shroud apparatus. The replacement shroud system thus can, in the future, be readily replaced by detaching the removable fastening devices, removing the replacement shroud system, and installing a new replacement shroud system with less effort than was required in cutting through the original shroud and replacing it with the replacement shroud system. An improved replacement shroud system is also disclosed. |
| US09171645B2 |
Address windowing for at-speed bitmapping with memory built-in self-test
Integrated circuits with memory built-in self-test (BIST) logic and methods of testing using the same are disclosed. The method includes setting an address window for locating defects in a memory array. The method further includes comparing output data of the memory array to expected data to determine that a defect exists at location “M” in the memory array within the address window. The method further includes storing, in registers, the address M and a resultant bit fail vector associated with the location “M” of the defect found in the memory array. The method further includes resetting the registers to a null value and resetting the address window with a new minimum and maximum address pair, to compare the output data of the memory array to the expected data within the reset address window which excludes address M. |
| US09171643B2 |
Solid state drive tester
Disclosed is a solid state drive tester which reduces the size of the tester and easily changes a function without changing hardware (H/W) by implementing a plurality of devices for testing an SSD as one chip using a Field Programmable Gate Array (FPGA). The solid state drive tester includes: a host terminal receiving a test condition for testing a storage from a user; and a test control unit generating a test pattern corresponding to the test condition, adaptively selecting an interface according to an interface type of the storage to be tested to test the storage using the test pattern, and storing fail data generated during the test in an internal memory. The test control unit is implemented by an FPGA to reduce the size of the tester and easily change a function without hardware. |
| US09171642B2 |
Sampling network
A circuit with a sampling network may include a pair of capacitors, where each of the capacitors has a first node and a second node; a first pair of switches communicatively coupling corresponding differential input voltage signals to the first node of each of the capacitors; and a second pair of switches communicatively coupling the second node of each of the capacitors to a common mode voltage source. Corresponding differential output voltage signals at the second node of each of the capacitors may be communicatively coupled using a differential switch. The second pair of switches may be coupled in parallel with the differential switch. A clock signal of the differential switch may be de-asserted prior to de-asserting corresponding clock signals for each of the second pair of switches. |
| US09171641B2 |
Shift register circuit and driving method thereof
An Nth shift register unit includes an input circuit, a voltage regulator, and an output circuit. The input circuit is disposed to control a voltage at a control node of the Nth shift register unit according to a first scan signal of an (N−K)th shift register unit or a second scan signal of an (N+K)th shift register unit. The voltage regulator includes a first coupling element coupled to a first clock, a first switch disposed to receive the voltage at the control node and generate a reverse bias for reducing current leakage, and a switch control unit disposed to control the first switch according to the first clock. The output circuit is disposed to output a third scan signal. |
| US09171633B2 |
Memory and sense parameter determination methods
Memory devices and methods for operating a memory include filtering a histogram of sensed data of the memory, and adjusting a parameter used to sense the memory using the filtered histogram. Filtering can be accomplished by averaging or summing, and may include weighting the sums or averages. |
| US09171622B2 |
Non-volatile memory device and method of fabricating the same
This technology provides a non-volatile memory device and a method of manufacturing the same, which may prevent an over-erase phenomenon and also increase the degree of integration, In an aspect, the non-volatile memory device includes a select gate formed over a substrate, a plurality of floating gates laterally formed with respect to the select gate and spaced apart from each other, to be independently programmable, and a plurality of junctions formed in the substrate and arranged to be controllable by the respective floating gates. |
| US09171619B2 |
Method and apparatus for configuring write performance for electrically writable memory devices
Methods and systems are provided that may include a nonvolatile memory to store information, where the nonvolatile memory is associated with a configuration register to indicate a write speed setting for at least one write operation to the nonvolatile memory. A circuit may supply current to achieve an indicated write speed setting for the at least one write operation to the nonvolatile memory. |
| US09171615B2 |
Semiconductor memory device
A semiconductor memory device according to an embodiment comprises a memory cell array configured from a plurality of row lines and column lines that intersect one another, and from a plurality of memory cells disposed at each of intersections of the row lines and column lines and each including a variable resistance element. Where a number of the row lines is assumed to be N, a number of the column lines is assumed to be M, and a ratio of a cell current flowing in the one of the memory cells when a voltage that is half of the select voltage is applied to the one of the memory cells to a cell current flowing in the one of the memory cells when the select voltage is applied to the one of the memory cells is assumed to be k, a relationship M2<2×N×k is satisfied. |
| US09171614B2 |
Reliable set operation for phase-change memory cell
A Phase-Change Memory (PCM) device and a method of writing data to the PCM device are described. The PCM device includes a multi-phase data storage cell having at least a Set state and a Reset state that may be established using a heater configured to heat the data storage cell. A memory interface may be coupled with the heater configured to write data to the data storage cell, the data being represented by the Set or the Reset states. A write Reset pulse is used to place the data storage cell in the Reset state corresponding to a read value that is less than a read threshold. A write Set pulse that is a predetermined function of the write Reset pulse is used to place the data storage cell in the Set state. The PCM device may include additional intermediate states that enable each data storage cell to store two or more bits of information. Other embodiments may be described and claimed. |
| US09171611B2 |
Nonvolatile memory apparatus and operating method thereof
A method operates a nonvolatile memory apparatus. The method includes performing a first write operation to store first data in first to third memory cells; and performing a second write operation to store second data in the first to third memory cells in which the first data has been stored, wherein, as a result of the first write operation and the second write operation, each of the first to third memory cells has one of first to third states. |
| US09171610B2 |
Static random access memory device including dual power line and bit line precharge method thereof
A static random access memory (SRAM) device is provided. A memory cell is supplied with a first driving voltage. A bit line pair is connected to the memory cell. A sense amplifier is connected to the bit line pair. The sense amplifier is supplied with a second driving voltage that is lower than the first driving voltage. A control logic selects a pre-charge voltage from the first and second driving voltages, pre-charges the bit line pair to the pre-charge voltage and adjusts the pre-charged voltage to a target voltage. |
| US09171605B1 |
Concentrated address detecting method of semiconductor device and concentrated address detecting circuit using the same
Provided is a method of detecting a concentrated address of a semiconductor device using an n-bit address. The method includes dividing the n-bit address into k groups, wherein each of n and k is an integer equal to or greater than 2, for each group of the k groups, detecting one or more concentrated sub addresses corresponding to the group, and generating at least one concentrated address by combining the one or more concentrated sub addresses for the k groups. |
| US09171597B2 |
Apparatuses and methods for providing strobe signals to memories
Apparatuses and methods for providing strobe signals to memories are described herein. An example apparatus may include a plurality of memories and a memory controller. The memory controller may be coupled to the plurality of memories and configured to receive an input clock signal. The memory controller may further be configured to provide a timing strobe signal having a delay relative to the input clock signal to a memory of the plurality of memories. The memory controller may further be configured to receive a return strobe signal from the plurality of memories. In some examples, the return strobe signal may be based at least in part on the timing strobe signal and the memory controller may be configured to adjust the delay based, at least in part, on a phase difference of the input clock signal and the return strobe signal. |
| US09171596B2 |
Short asynchronous glitch
A circuit receives a parameter signal at a set or reset input, a clock signal at a clock input and a constant digital value at a data input. A synchronous signal is output from the circuit: wherein when the parameter signal is in a first state, then the output synchronous signal has the digital value; wherein when the parameter signal transitions to a second state, then the output synchronous signal transitions to an inverse of the digital value at substantially the same time; and wherein when the parameter signal transitions back to the first state, then the output synchronous signal transitions to the digital value on a next clock edge. |
| US09171594B2 |
Handling collisions between accesses in multiport memories
A multiport memory having an array of storage cells for storing data; a plurality of data access ports; and access control circuitry to assign each data access port to one of the sets of access control lines and corresponding data lines. The control circuitry has collision detection circuitry to detect a colliding data access request received at a second data access port that requests access to a row of storage cells currently being accessed by a data access request received at a first data access port. The control circuitry is responsive to the detected collision to assign the set of access control lines and corresponding data lines currently assigned to the first data access port to the second data access port and to subsequently assign the first data access port to the set of access control lines and corresponding data lines previously assigned to the second access port. |
| US09171593B2 |
Multi-granularity parallel storage system
A multi-granularity parallel storage system including a plurality of memories, a shift generator, an address increment lookup unit, an address shifter, a row address generator, and a plurality of address adders. The shift generator is configured to generate a shift value. The address increment lookup unit is configured to generate input data for the address shifter. The address shifter is configured to cyclically shift the input data rightward by Shift elements and then output the shifted data. The row address generator is configured to generate a row address RowAddr and input the generated row address RowAddr to the other input terminal of each address adder. Each address adder is configured to perform a non-sign addition of the input data at the two input terminals to obtain a read/write (R/W) address for one of the memories and input the R/W address to an address input terminal of the memory. |
| US09171589B2 |
Memory device, method of performing read or write operation and memory system including the same
Provided is a memory device having a first switch configured to receive a first CSL signal to input or output data. A second switch is configured to receive a second CSL signal. A sensing and latch circuit (SLC) is coupled between the first and second switches. And at least one memory cell is coupled to the second switch. The second switch is configured to control timing of read or write operations of the at least one memory cell in response to the second CSL signal, e.g., where a read operation can be performed in not more than about 5 ns. The SLC operates as a latch in a write mode and as an amplifier in a read mode. The memory device may comprise part of a memory system or other apparatus including such memory device or system. Methods of performing read and write operations using such memory device are also provided. |
| US09171586B2 |
Dual memory bitcell with shared virtual ground
Embodiments include systems and methods for using a shared virtual ground to implement a dual memory bitcell. Some embodiments of the dual memory bitcell described herein operate substantially as would two adjacent conventional bitcells, but with reduced power, reduced area, and other features. For example, each of two memory bitcells can be coupled with a write bitline, a virtual ground line, and a respective write wordline. The virtual ground is configured to be switched according to the write bitline. In such a configuration, the value stored by the memory bitcells can be a function of the write bitline and the virtual ground line (e.g., when the respective write word line of the memory bitcell is asserted). Certain embodiments can include a novel physical layout of the dual memory bitcell. Some implementations of the novel physical layout can include changes to the physical memory bitcell components and to one or more metal layers. |
| US09171584B2 |
Three dimensional non-volatile storage with interleaved vertical select devices above and below vertical bit lines
A three-dimensional array of memory elements reversibly change a level of electrical conductance/resistance in response to one or more voltage differences being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. Local bit lines to which the memory elements of all planes are connected are oriented vertically from the substrate and through the plurality of planes. Vertically oriented select devices are used to connect the local bit lines to global bit lines. A first subset of the vertically oriented select devices are positioned above the vertically oriented bit lines and a second subset of the vertically oriented select devices (interleaved with the first subset of the vertically oriented select devices) are positioned below the vertically oriented bit lines. |
| US09171582B2 |
Rugged hard drive
According to an embodiment of the disclosure, an apparatus includes a sleeve configured to surround a hard drive. The sleeve includes a side portion, a bottom portion, a top portion, a front portion, and a back portion. At least one of the side portion, the bottom portion, the top portion, the front, or the back portion is made of an elastomeric material configured to absorb a portion of shock or vibration from being imparted on the hard drive. Additionally, at least one of the side portion, the top portion, or the bottom portion is tapered. |
| US09171578B2 |
Video skimming methods and systems
In an embodiment, a method of creating a skimming preview of a video includes electronically receiving a plurality of video shots, analyzing each frame in a video shot from the plurality of video shots, where analyzing includes determining a saliency of each frame of the video shot. The method also includes determining a key frame of the video shot based on the saliency of each frame the video shot, extracting visual features from the key frame, performing shot clustering of the plurality of video shots to determine concept patterns based on the visual features, and generating a reconstruction reference tree based on the shot clustering. The reconstruction reference tree includes video shots categorized according to each concept pattern. |
| US09171574B1 |
Shingled band with a cache track
A disc data storage medium can include a shingled band of tracks, some of which do not map to host accessible logical block address. The tracks that do not map to host accessible logical block addresses (cache tracks) can store cache data and may map to disc accessible logical block addresses. Data operations can be performed on the data in the cache tracks, and the data may then be moved to storage regions mapped to host logical block addresses. |
| US09171571B2 |
Read channel operable to calibrate a coefficient of a filter, such as an FIR filter, disposed before an interpolated-timing-recovery circuit, and related integrated circuit, system, and method
An embodiment of a read channel includes a filter, an interpolator, a recovery circuit, an error detector, a reverse interpolator, and a filter calibrator. The filter is operable to receive a raw sample of a signal and a coefficient-correction value, generate a filtered sample from the raw sample and a pre-established coefficient, and change the coefficient in response to the coefficient-correction value. The interpolator is operable to interpolate the filtered sample, and the recovery circuit is operable to generate a data symbol from the interpolated sample. The error detector is operable to generate an ideal sample from the data symbol and to generate a difference between the ideal sample and the interpolated sample, and the reverse interpolator is operable to reverse interpolate the difference. The filter calibrator is operable to receive the raw sample and to generate the coefficient-correction value from the raw sample and the reverse-interpolated difference. |
| US09171569B2 |
Method and apparatus for assisting with content key changes
A process may be utilized by the DVR. The process receives a plurality of segments of a set of content and a plurality of corresponding content rule sets. Further, the process provides one or more instructions to record and encrypt the plurality of segments of the set of content on a storage medium. In addition, the process provides the plurality of content rule sets to the DRM component to be inserted into a locally generated and secured content license associated with the encryption of the set of content. The secured content license includes a master key and a list of the plurality of corresponding content rule sets that have been received in order of reception. The process receives a plurality of marker tokens from the DRM component in order to facilitate trick mode playback. |
| US09171568B1 |
Data storage device periodically re-initializing spindle motor commutation sequence based on timing data
A data storage device is disclosed comprising a disk comprising timing data, a spindle motor configured to rotate the disk, wherein the spindle motor comprises a plurality of windings, and a head actuated over the disk. A phase of a commutation controller is initialized based on the timing data on the disk, and a commutation sequence of the commutation controller is driven based on the timing data on the disk, wherein the commutation controller is configured to commutate the windings based on the commutation sequence. The phase of the commutation controller is re-initialized based on the timing data on the disk, thereby compensating for a cumulative phase error when driving the commutation sequence based on the timing data on the disk. |
| US09171567B1 |
Data storage device employing sliding mode control of spindle motor
A data storage device is disclosed comprising a head actuated over a disk, and a spindle motor configured to rotate the disk. A speed of the spindle motor is sampled, and an error signal is generated based on a difference between the sampled speed and a target speed. A sliding mode control signal for controlling a speed of the spindle motor is generated based on a first non-zero gain when the error signal is greater than zero and less than a first positive threshold, and a second non-zero gain when the error signal is greater than the first positive threshold. |
| US09171559B1 |
Sensor structure with pinned stabilization layer
A reader sensor that has a sensor stack with an AFM layer, a pinned stabilization layer, and a pinned layer, with the pinned stabilization layer closer to the AFM layer than to the pinned layer. The stack also includes a non-magnetic spacer layer between and in contact with the pinned stabilization layer and with the pinned layer. A magnetic coupling between the pinned stabilization layer and the pinned layer is no more than 50% of a magnetic coupling between the pinned stabilization layer and the AFM layer. |
| US09171557B1 |
Write pole paddle
A write head having a write pole with a tip portion defining a pole tip and a paddle portion extending from the tip portion away from the pole tip, the paddle portion defining a back edge. The write head also has a coil structure having at least two active turns crossing the paddle portion, wherein a back of the coil structure is no more than 1 micrometer past the back edge of the write pole. In some implementations, a length from the pole tip to the back edge is no more than 4.5 micrometers. |
| US09171554B2 |
Magnetic disk unit and thermally-assisted magnetic recording method
The magnetic disk unit includes: a magnetic recording medium; a thermally-assisted magnetic recording head including a magnetic pole applying a recording magnetic field to the magnetic recording medium and a heating element heating the magnetic recording medium; and a controller allowing the heating element to perform a continuous heating operation at a first temperature for a first time period, and halting the heating operation of the heating element or allowing the heating element to perform a heating operation at a second temperature lower than the first temperature for a second time period that follows the first time period, the first time period having a length substantially equal to or less than a length of a time required for the magnetic recording medium to rotate one turn, and the second time period having a length substantially equal to or more than the length of the first time period. |
| US09171552B1 |
Multiple range dynamic level control
An audio-based system may perform dynamic level adjustment by detecting voice activity in an input signal and evaluating voice levels during periods of voice activity. The current voice level is compared to a plurality of thresholds to determine a corresponding gain strategy, and the input signal is scaled in accordance with this gain strategy. Further adjustment to the signal is performed to reduce output clipping that might otherwise be produced. |
| US09171550B2 |
Context-based arithmetic encoding apparatus and method and context-based arithmetic decoding apparatus and method
Disclosed are a context-based arithmetic encoding apparatus and method and a context-based arithmetic decoding apparatus and method. The context-based arithmetic decoding apparatus may determine a context of a current N-tuple to be decoded, determine a Most Significant Bit (MSB) context corresponding to an MSB symbol of the current N-tuple, and determine a probability model using the context of the N-tuple and the MSB context. Subsequently, the context-based arithmetic decoding apparatus may perform a decoding on an MSB based on the determined probability model, and perform a decoding on a Least Significant Bit (LSB) based on a bit depth of the LSB derived from a process of decoding on an escape code. |
| US09171549B2 |
Automatic configuration of metadata for use in mixing audio programs from two encoded bitstreams
An audio coding system uses mixing metadata to control the attenuation of a main audio program that is subsequently mixed with an associated audio program. The value of the attenuation is calculated by analyzing the estimated loudness of the main and associated audio programs. |
| US09171548B2 |
Methods and systems for speaker identity verification
A system for confirming that a subject is the source of spoken audio and the identity of the subject providing the spoken audio is described. The system includes at least one motion sensor operable to capture physical motion of at least one articulator that contributes to the production of speech, at least one acoustic signal sensor to receive acoustic signals, and a processing device comprising a memory and communicatively coupled to the at least one motion sensor and the at least one acoustic signal sensor. The processing device is programmed to correlate physical motion data with acoustical signal data to uniquely characterize the subject for purposes of verifying the subject is the source of the acoustical signal data and the identity of the subject. |
| US09171545B2 |
Browsing and retrieval of full broadcast-quality video
A method includes steps of indexing a media collection, searching an indexed library and browsing a set of candidate program segments. The step of indexing a media collection creates the indexed library based on a content of the media collection. The step of searching the indexed library identifies the set of candidate program segments based on a search criteria. The step of browsing the set of candidate program segments selects a segment for viewing. |
| US09171541B2 |
System and method for hybrid processing in a natural language voice services environment
A system and method for hybrid processing in a natural language voice services environment that includes a plurality of multi-modal devices may be provided. In particular, the hybrid processing may generally include the plurality of multi-modal devices cooperatively interpreting and processing one or more natural language utterances included in one or more multi-modal requests. For example, a virtual router may receive various messages that include encoded audio corresponding to a natural language utterance contained in a multi-modal interaction provided to one or more of the devices. The virtual router may then analyze the encoded audio to select a cleanest sample of the natural language utterance and communicate with one or more other devices in the environment to determine an intent of the multi-modal interaction. The virtual router may then coordinate resolving the multi-modal interaction based on the intent of the multi-modal interaction. |
| US09171534B2 |
Method for artificially reproducing an output signal of a non-linear time invariant system
A method for artificially reproducing an output signal of a non-linear time invariant system includes the steps of inserting an input signal of exponential sine sweep type in the non-linear time invariant system, acquiring an output signal of the non-linear time invariant system corresponding to the input signal, obtaining a mathematical function that characterizes the non-linear time invariant system on the basis of the output signal and applying the mathematical function to a further signal to obtain a still further signal which reproduces the output signal that would be obtained from the non-linear time invariant system if it were driven by the further signal. |
| US09171532B2 |
Sound signal analysis apparatus, sound signal analysis method and sound signal analysis program
A sound signal analysis apparatus 10 includes sound signal input portion for inputting a sound signal indicative of a musical piece; feature value calculation portion for calculating a first feature value indicative of a feature relating to existence of a beat in one of sections of the musical piece and a second feature value indicative of a feature relating to tempo in one of the sections of the musical piece; and estimation portion for concurrently estimating a beat position and a change in tempo in the musical piece by selecting, from among a plurality of probability models described as sequences of states q classified according to a combination of a physical quantity relating to existence of a beat in one of the sections of the musical piece and a physical quantity relating to tempo in one of the sections of the musical piece, a probability model whose sequence of observation likelihoods each indicative of a probability of concurrent observation of the first feature value and the second feature value in corresponding one of the sections of the musical piece satisfies a certain criterion. |
| US09171528B2 |
Carbon fiber guitar
A stringed musical instrument has a molded sound box and neck where the sound box is formed of between 20% to 60% carbon fibers, or other suitable fibers, and a polymeric resin or binder. The composition of materials utilized in the sound box is selected to increase stiffness and to control the tone of the instrument. The sound box includes an adjustable attachment mechanism having a pivot which is used to secure the neck to the sound box. The sound box includes a molded bracing structure having a plurality of braces and a molded bridge having a plurality of pockets which are used to enhance the structure for the sound box and provide a desired tone quality for the stringed instrument. The neck may include a molded neck insert and a molded fingerboard which are used to enhance the stiffness and stability of the neck. |
| US09171527B2 |
System and method for displaying geographic imagery
In one aspect, a computer-implemented method is disclosed for providing geographic imagery. The method may include receiving, at a computing device, a request for a geographic image, wherein the geographic image depicts at least a portion of a selected location within a geographic area. In addition, the method may include presenting, with the computing device, the geographic image and superimposing a map including normalized travel way data associated with the geographic area over at least a portion of the geographic image. |
| US09171526B2 |
Display device, method for controlling display device, program, and recording medium
A display device includes a display panel having pixels each constituted by red, green, blue, and white subpixels and a backlight, further including: a grayscale ratio calculating section acquiring RGB data and calculating a ratio of the lowest to the highest of RGB grayscales in each pixel; a detection section detecting, from the RGB data, a ratio of the number of target pixels in one frame; a conversion coefficient calculating section acquiring, by using the detected ratio, a conversion coefficient for converting the RGB data into RGBW data; a RGB data conversion section converting the RGB data into the RGBW data per pixel by using the conversion coefficient; and a display control section generating, from the RGBW data, an image to be displayed on the display panel and causing the display panel to display the image. |
| US09171524B2 |
Display device
A display device includes: a panel portion, on which a plurality of sub-pixels with a discrete bus line form each individual pixel, the plurality of sub-pixels that form the individual pixel being sequentially arranged in a horizontal and a vertical direction, the panel portion displaying a two-dimensional image or a three-dimensional image by application of a signal via the bus line; and a filter portion, provided on a front surface of the panel portion, that alternately changes, for each of predetermined horizontal regions, a polarization state of light passing through the panel portion. A boundary of each of the horizontal regions of the filter portion is positioned within a range of a first sub-pixel of each of the plurality of sub-pixels. The first sub-pixel displays a different image when the two-dimensional image is displayed on the panel portion to when the three-dimensional image is displayed on the panel portion. |
| US09171521B2 |
Tuning display devices
A technique comprising: determining a correction to a drive voltage for the front plane common electrode of a first display device according to the result of one or more measurements of an optical property for the first display device and the result of one or more measurements of said optical property for one or more other devices including an optical medium having the same optical response as the first display device. |
| US09171517B2 |
Display device, driving device, and driving method
A liquid crystal display device (1) according to one embodiment of the present invention includes a timing controller (4) which, (i) in a first display mode, in which a number of tones that each pixel is capable of displaying is smaller than a predetermined number, controls a scanning signal and a data signal by an interlace driving method, by which a single frame includes a plurality of fields, and (ii) in a second display mode, in which the number of tones that each pixel is capable of displaying is equal to or greater than the predetermined number, controls the scanning signal and the data signal by a progressive driving method. |
| US09171516B2 |
Gate driver on array circuit
The present invention provides a gate driver on array circuit. The gate driver on array circuit comprises: multiple gate driver on array units connected in cascade. The n-th gate driver on array unit of the gate driver on array circuit comprises a (n−2)-th signal input terminal 21, a (n+2)-th signal input terminal 22, a clock signal first input terminal 23, a clock signal second input terminal 24, a first low-level input terminal 25, a second low-level input terminal 26, a first output terminal 27 and a second output terminal 28. The n-th gate driver on array unit further comprises: a pulling-up driving unit 32, a pulling-up unit 34, a first to a third pulling-down unit 36, 37, 38. The present invention adds a second low-level signal, which uses the second low-level to decrease the voltage difference (Vgs) between the gate and the source of the thin film transistor of the first output terminal, so that the leakage current of the thin film transistor is less and can be controlled precisely. |
| US09171512B2 |
Display
Image signal line driving circuits each include a timing controller that generates a control signal to control the image signal line driving circuit itself and a different image signal line driving circuit. A master belonging to the image signal line driving circuits has a function of applying the control signal to a slave belonging to the image signal line driving circuits. The image signal line driving circuits each include an abnormality detecting circuit that detects an operation abnormality in the image signal line driving circuit itself, and a master/slave switching circuit that sets the image signal line driving circuit itself as the master or slave image signal line driving circuit. When detecting an abnormality, the abnormality detecting circuit outputs a master/slave switching signal, thereby switching the slave image signal line driving circuit to the master and switching the master image signal line driving circuit to the slave. |
| US09171509B2 |
Single backlight source where the backlight emits pure colored light in a sequential manner where the sequence is red, blue and green
A display system, having an emissive body, varying light emitted from the surface so that different temporally adjacent time periods see the emissive body outputting different primary colors. A liquid crystal display can then modulate the different primary colors that have been output at different times. In one embodiment, the different times modulate red green and blue colors. In another embodiment, the different times modulate red green blue and white colors. The emissive body can be a FIPEL type device. Light can be both color varied and also color temperature controlled. The light color is changed by changing a frequency used to drive the body. |
| US09171507B2 |
Controller for updating pixels in an electronic paper display
Systems, methods, and other embodiments associated with controlling pixels of a display are described. According to one embodiment, an apparatus includes a frame counter logic configured to maintain a global frame counter to track a number of refreshes of a display while updating pixels. The frame counter logic is also configured to determine a frame number when updating a pixel. The apparatus also includes a pixel logic configured to update the pixel. |
| US09171502B2 |
Pixel selection control method, driving circuit, display apparatus and electronic instrument
A pixel selection control method, driving circuit, display apparatus and electronic instrument are disclosed. A driving circuit includes a logic circuit configured to receive a reference signal associated with a line of pixels. The reference signal has a first logic level or a second logic level. The driving circuit also includes a switch circuit configured to receive the reference signal and an enable signal, and to provide the enable signal to the logic circuit when the reference signal is at the first logic level. A display apparatus may be provided that includes the driving circuit. |
| US09171501B2 |
Amoled pixel structure with a subpixel divided into two secondary subpixels
An active matrix organic light emitting diode pixel (AMOLED) pixel structure includes a plurality of sub pixels, wherein at least one of the sub pixels comprises two secondary sub pixels, and the secondary sub pixels are disposed with organic light emitting materials with different light emitting characteristics respectively, so that lights emitted from the secondary sub pixels are mixed to adjust the performance of the sub pixels. |
| US09171498B2 |
Organic light emitting diode display device and method for driving the same
An organic light emitting diode display device can include a display panel in which data lines and gate lines intersect each other; an image processing circuit converting a first digital image data including a plurality of color digital data into any one of a second digital image data including the plurality of color digital data and a first white digital data and a third digital image data including a plurality of color conversion digital data that converts the plurality of color digital data and a second white digital data according to whether the first digital image data is included in a first gray scale region or a second gray scale region which is higher than the first gray scale region; and a data driving circuit converting the second digital image data into data voltages and supplying the data voltages to the data lines. |
| US09171496B2 |
Image control display device and image control method
An image control technology that enables low power consumption with less compromise in the overall quality of the image is disclosed, in which color information of an image is saved while minimizing degradation of picture quality, and improving text readability. In one aspect, an image control display device includes an image controller configured to measure at least one of luminance values and chroma values of pixels of an input image. In addition, the image controller is configured to detect an edge using the at least one of luminance and chroma values and is configured to invert color information of the input image into inverted image data. The image controller is further configured to generate output image data comprising an inverted region and an exception region, where the inverted region displays the inverted image data and the exception region displays uninverted input image data. The display device additionally includes a data driver configured to receive the output image data and to apply a plurality of data voltages corresponding to the output image data to a display panel. |
| US09171494B2 |
OLED display device compensating image decay
The present invention discloses an OLED display device and control method thereof. The OLED display device includes a display screen, a sensor and a timing controller, wherein the timing controller includes a detection unit, a test image generation unit, a data compensation unit and image control unit. Detection unit provides command for generating test image. Test image generation unit generates test image according to the command for generating test image. Data compensation unit obtains decayed signal corresponding to test image detected by the sensor and to generate compensation signal to transmit to image control unit according to decayed signal. Image control unit transmits test image to display screen for detecting decay of display screen when inputting test image. As such, the present invention can improve the uneven display situation caused by decay of OLED display device as time passes. |
| US09171493B2 |
Semiconductor device and driving method thereof, and electronic device
A driving method of a semiconductor device for compensating variation in threshold voltage and mobility of a transistor is provided. A driving method of a semiconductor device including a transistor and a capacitor electrically connected to a gate of the transistor includes a first period where voltage corresponding to threshold voltage of the transistor is held in the capacitor, a second period where a total voltage of video signal voltage and threshold voltage is held in the capacitor holding the threshold voltage, and a third period where charge held in the capacitor in accordance with the total voltage of the video signal voltage and the threshold voltage in the second period is discharged through the transistor. |
| US09171492B2 |
Display device
To provide an active matrix display device in which power consumption of a signal line driver circuit can be suppressed, so that power consumption of the entire memory can be suppressed. A plurality of memory circuits which can write data of a video signal input to a pixel in one line period and can hold the data are provided in a signal line driver circuit of a display device. Then, the data held in each memory circuit is input to a pixel of a corresponding line as a video signal. By providing two or more memory circuits in a driver circuit, pieces of data of video signals corresponding to two or more line periods can be concurrently held in the memory circuits. |
| US09171491B1 |
Over-driving circuit and display device having an over-driving circuit
An over-driving circuit for a display device having a display panel includes a first 4-color data generation module configured to generate output 4-color data of the previous frame based on 3-color data and a gain of the previous frame, and to generate output 4-color data of the current frame based on 3-color data and a gain of the current frame. The over-driving circuit also includes a second 4-color data generation module configured to generate input 4-color data based on input 3-color data and the gain of the current frame. The over-driving circuit further includes a data modulator configured to generate modulated data based on the output 4-color data of the previous frame, the output 4-color data of the current frame, and the input 4-color data. |
| US09171490B2 |
Method of driving display panel and display apparatus for performing the same
A method of driving a display panel includes determining a driving mode including a two-dimensional (“2D”) mode and a three-dimensional (“3D”) mode and charging a voltage which varies according to the driving mode to at least one subpixel in a unit pixel of the display panel. |
| US09171486B1 |
Zipp seal security systems
A Zipp Seal apparatus which is designed to detect unlawful access of oil, and also to help ensure that oil tanks are and remain properly sealed. The invention may be an injection-molded plastic or nylon unit containing a zip tie with a solid cylinder component and a tail with one-way feeding teeth. The cylinder can be inserted into a hole on an oil tank valve, and the zip tie end can be inserted into the cylinder end of the unit. This may secure the valve into a specific position. If the invention is found in a different position, employees will know that the oil has been tampered with or unlawfully accessed. |
| US09171481B2 |
Method for identifying, displaying, selecting, naming and matching colors
The color device has a core with hues that gradually change whiteness, respectively. The discs have hues covering an entire color spectrum at a certain level of whiteness. All hues of the first and second discs have the first and second level of whiteness, respectively. The discs extend perpendicularly outwardly from the core. The first disc is axially remote from the second disc so that a distance (d) is formed therebetween. The discs are aligned so that color cells of the first disc axially aligned with color cells of the second disc have identical hues except for different whiteness. The level of color saturation in the color cells is gradually increased radially outwardly from the core. |
| US09171478B2 |
Learning model for dynamic component utilization in a question answering system
Mechanisms are provided in a data processing system for utilizing algorithms based on categories in a question answering system. The mechanisms capture a history of performance and correctness metrics for identifying efficiency of respective algorithms for finding answers to questions in respective question categories in a question answering system. The mechanisms determine sets of algorithms to use for respective question categories according to efficiency and correctness analysis. The mechanisms determine a question category of a given input question and execute a set of algorithms corresponding to the question category of the given input question that meet an efficiency threshold to contribute to finding a correct answer for the given input question. |
| US09171473B1 |
Method and system for dynamic automated corrections to weather avoidance routes for aircraft in en route airspace
A dynamic weather route system automatically analyzes routes for in-flight aircraft flying in convective weather regions and attempts to find more time and fuel efficient reroutes around current and predicted weather cells. The dynamic weather route system continuously analyzes all flights and provides reroute advisories that are dynamically updated in real time while the aircraft are in flight. The dynamic weather route system includes a graphical user interface that allows users to visualize, evaluate, modify if necessary, and implement proposed reroutes. |
| US09171468B2 |
In-vehicle information distribution system and in-vehicle information distribution method
An in-vehicle information distribution device includes a current-status-information acquisition unit that acquires current-status information, a status-type determination unit that refers to a status-type list table, and determines to which of status types classified in the status-type list table the current-status information corresponds, a status determination unit that refers to a status-type/status-determination-information correspondence table, acquires status-determination information corresponding to the determined status type, and determines a status of a train based on the status-determination information, and a display-content decision unit that refers to a status-type/display-content-information correspondence table, which classifies a display content to be displayed on a display device (AC-drive) and a display device (DC-drive) into status types, acquires display-content information corresponding to the determined status type, and selects display data corresponding to the display-content information. |
| US09171461B1 |
Method and apparatus for providing estimated patrol properties and historic patrol records
It is an object of the present invention to provide a predictive traffic law enforcement profiler apparatus and method which incorporates a means to determine current location, time, velocity and also incorporates a means to utilize a database derived from historic traffic law enforcement records, crowd sourced records and historical traffic data and also incorporates a predictive processing means to provide historic traffic law enforcement records and estimates of enforced speed limits and enforcement profiles, patrol locations and schedules of traffic law enforcement to a driver. |
| US09171449B2 |
Method and system for sending an alarm
The present invention relates to a method for sending an alarm. The method comprises sending an alarm comprising alarm code from a first terminal unit to a second terminal unit, and further providing the alarm to a third terminal unit if the third terminal unit is located within a predetermined distance from the first terminal unit, wherein the second and third terminal units are determined by a first and second contact register associated with the first and second terminal units, respectively. Furthermore, the present invention further relates to a corresponding server, computer program product and system adapted for generating and sending an alarm to terminal units. |
| US09171448B1 |
RFID tags for locating products
A computer-implemented method includes receiving a structure signal strength for a signal generated by a tag on a structure and receiving a product signal strength for a signal generated by a tag on a product. An indication that the product is positioned near the structure based on the received structure signal strength and the received product signal strength is then stored in memory. |
| US09171447B2 |
Method, computer program product and system for analyzing an audible alert
In an approach to analyzing audible alerts, one or more computer processors receive an audible alert originating external to a user. The one or more computer processors retrieve data related to the audible alert. The one or more computer processors analyze the data related to the audible alert. The one or more computer processors determine, based, at least in part, on the data related to the audible alert, a cause of the audible alert. |
| US09171444B2 |
Healthcare workstations and RFID devices for detecting medication errors, falls and wandering
A medication administration system that includes a system of pillboxes, a pharmacy workstation, and a system of attendant workstation. The pharmacy workstation reads RFID or barcode tags on the pillboxes and medication wrappers containing medication units as the medication units are checked into the pillboxes to ensure that the pillboxes are filled in accordance the appropriate prescription regimens. The attendant workstations read the RFID or barcode tags on the pillboxes and medication wrappers as the medication units are checked out of the pillboxes to ensure that the medications are administered in accordance the appropriate prescription regimens. The attendant workstations may activate alarms, which may include communicating the alarms to a central monitoring station or mobile communication devices assigned to healthcare providers, when the determine that a pillbox in not correctly filled, when a medication has been checked out of a pillbox improperly, or when a medication has not been checked out on time. |
| US09171443B2 |
Marking material
A material for indelibly and uniquely marking an article for identification purposes includes a mixture including between about 1% and 10% by weight fluorescent identifier, DNA, and the remainder including predominantly a solvent. |
| US09171434B2 |
Selectively redirecting notifications to a wearable computing device
A first computing device can include at least one processor, and a notification redirection module operable by the at least one processor to receive sensor data from a second computing device, responsive to determining, based on the sensor data, that the second computing device is not being worn, output and for display, a notification, and responsive to determining, based on the sensor data, that the second computing device is being worn, send to the second computing device, an indication of the notification. |
| US09171433B1 |
Use of NFC in conjunction with other range-based sensors to detect theft of other devices
A system and method for monitoring devices using near field communications (NFC) techniques is disclosed. A plurality of host devices each incorporates a NFC device. An audio or visual alert device is incorporated into each host device and is coupled to its associated NFC device. A detector has a detector NFC device. A monitor is incorporated in the detector and is coupled to the detector NFC device. An alert activator in each host device is coupled to the associated NFC device and associated alert device and activates the associated alert device when one of the host NFC devices moves out of communication range with another host NFC device. A monitor activator in the detector device coupled to the detector NFC device and the monitor activates the monitor when the one NFC device moves out of communication range with the other NFC device. |
| US09171426B2 |
Advertising space for tournaments
Examples disclosed herein relate to systems and methods for tournament game player. An electronic gaming device may include a memory, one or more processors, and a plurality of reels. One or more paylines may be formed on at least a portion of the plurality of reels. The memory may include one or more tournament game structures. The memory may also include one or more advertisement structures. The one or more processors may initiate one or more tournaments based on one or more tournament game structures. The one or more processors may initiate one or more advertisements based on at least one of the one or more advertisement structures and one or more triggering events. |
| US09171424B2 |
Systems, apparatuses and methods enhancing gaming outcome opportunities
Embodiments of the present invention set forth systems, apparatuses and methods for providing game features. In a game of chance involving at least one outcome, a plurality of alternative outcomes can be derived for a gaming event, such as when one of the outcomes will provide a payout at or above a certain level. The player is presented with an opportunity to select among the alternative outcomes, without being aware of the particular characteristics or values associated with the outcomes. While the player will only select the outcome having the payout at/above the threshold level a certain percentage of the time, the opportunity can be presented to the player more often, while keeping the mathematical probabilities the same or similar if desired, thereby providing the player with the feeling of getting higher value opportunities more often. |
| US09171420B2 |
Assignment template and assignment bundle in a gaming configuration and download system
A slot management system including a download and configuration server-based sub-system and method is disclosed for use with non-gaming devices to enable users to monitor, control, and modify game devices and other related activities. An assignment-creator/modifier is provided for creating and modifying assignment templates for assignments that include at least one job to modify a non-gaming device. A user graphical interface is provided to control and monitor execution of the download and configuration and to present a graphical image at least indicative of the temporal periods for execution of a download executable assignment. |
| US09171416B2 |
Banknote handling apparatus and banknote handling method
A banknote handling apparatus that performs a depositing handling or a depositing/dispensing handling by transporting banknotes along a transport path includes a recognizing unit that recognizes an inserted banknotes; a deposit acceptability judging unit that determines, based on a recognition result obtained by the recognizing unit, whether the banknotes is acceptable for deposit; a reject reason identifying unit that identifies a reject reason of rejected banknotes that is determined to be unacceptable for deposit by the deposit acceptability judging unit; and a dispensing handling unit that sorts and dispenses the rejected banknotes based on the reject cause identified by the reject cause identifying unit. |
| US09171407B2 |
System and method of detecting fuse disconnection of DC-DC converter
A system and method that compares an input voltage value through the input terminal of the LDC with a setting voltage in an ignition on-state and an on-state of a main relay for connection of a high-voltage battery Then a verification is made whether the main relay is in the on-state and whether the voltage of an input capacitor in an inverter is in a normal voltage range. As a result a diagnosis is made whether the disconnection of the input fuse has occurred in a low-voltage state when the input voltage is no more than the setting voltage and the on-state of the main relay and the state in which the voltage of the input capacitor in the inverter is in the normal voltage range. |
| US09171405B1 |
Identifying and filling holes across multiple aligned three-dimensional scenes
The capture and alignment of multiple 3D scenes is disclosed. Three dimensional capture device data from different locations is received thereby allowing for different perspectives of 3D scenes. An algorithm uses the data to determine potential alignments between different 3D scenes via coordinate transformations. Potential alignments are evaluated for quality and subsequently aligned subject to the existence of sufficiently high relative or absolute quality. A global alignment of all or most of the input 3D scenes into a single coordinate frame may be achieved. The presentation of areas around a particular hole or holes takes place thereby allowing the user to capture the requisite 3D scene containing areas within the hole or holes as well as part of the surrounding area using, for example, the 3D capture device. The new 3D captured scene is aligned with existing 3D scenes and/or 3D composite scenes. |
| US09171400B2 |
Creating a surface from a plurality of 3D curves
It is provided a computer-implemented method for creating a surface from a plurality of 3D curves. The method comprises providing a plurality of 3D curves, determining crossings between pairs of the curves, defining a base graph comprising nodes representing the crossings and arcs connecting pairs of nodes representing crossings that are neighbors, determining, from the graph, a mesh comprising vertices defined by a 3D position and edges connecting pairs of the vertices, and fitting the mesh with a surface. Such a method makes the creation of a surface from a plurality of 3D curves easier. |
| US09171398B2 |
Rendering caustics in computer graphics with photon mapping by relaxation
The invention relates to a method of rendering caustics in a computer graphics scene. The method comprises obtaining a photon map of said scene, redistributing photons from said photon map into an arrangement with a blue noise spectral signature by performing a relaxation step in respect of each of a number of photons, determining a constraining vector for each of a number of photons and rendering said scene using results from the redistributing photons and/or from determining a constraining vector. |
| US09171396B2 |
System and method of procedural visibility for interactive and broadcast streaming of entertainment, advertising, and tactical 3D graphical information using a visibility event codec
A system includes a server and a client computer device. The server determines a graphical object visible from a view region and determines one or more parameters defining the graphical object visible from the view region. The server further transmits the determined one or more parameters to a client computing device. The client computing device includes a processor to generate the graphical object using the determined one or more parameters received from the server. The client computing device further includes a display device to display the generated graphical object within a computer generated modeled environment. |
| US09171394B2 |
Light transport consistent scene simplification within graphics display system
Method including casting a first plurality of rays towards an original 3-D scene comprising objects with object surfaces. Method also includes constructing a simplified representation of the original 3-D scene and adjusting the simplified representation to be consistent with the original 3-D scene. Simplified representation is adjusted by using known rays and object surface intersections obtained from the casting, to produce an adjusted simplified representation. Method further includes steps for rendering a high quality image: casting a second plurality of rays toward the adjusted simplified representation and testing the second plurality of rays for points of intersection with the object surfaces within the adjusted simplified representation, estimating incoming light within the adjusted simplified representation at the points of intersection with the object surfaces, examining material properties of the object surfaces, and calculating a color and light intensity for a plurality of pixels associated with the second plurality of rays. |
| US09171392B2 |
Lenticular product having a radial lenticular blending effect
A method of integrating a radial zoom effect with a complementary radial image transition effect includes integrating the effects such that the two blended radial effects share a common center, and thereby share common displacement paths during the perceived transition. In addition to the visual appeal of the effect, the invention also resolves operational incompatibilities between the practice of commercial photography and the practice of lenticular printing. A lenticular product is formed in accordance with this method. |
| US09171388B2 |
Object display device and object display method
In an object display device, in the case that a marker is not detected at present, a display complementing unit acquires a change in an image in real space displayed on a display unit between the past when the marker was detected and the present. Since a virtual object is displayed based on the position and shape of the marker in the image in real space, the display position and display manner of the virtual object are also to be changed in accordance with a change in the image in real space. A display decision unit can therefore decide the display position and display manner of the virtual object at present from the display position and display manner of the virtual object in the past, based on the change in the image in real space between the past and the present. |
| US09171384B2 |
Hands-free augmented reality for wireless communication devices
This disclosure relates to techniques for providing hands-free augmented reality on a wireless communication device (WCD). According to the techniques, an application processor within the WCD executes an augmented reality (AR) application to receive a plurality of image frames and convert the plurality of image frames into a single picture comprising the plurality of image frames stitched together to represent a scene. The WCD executing the AR application then requests AR content for the scene represented in the single picture from an AR database server, receives AR content for the scene from the AR database server, and processes the AR content to overlay the single picture for display to a user on the WCD. In this way, the user may comfortably look at the single picture with the overlaid AR content on a display of the WCD to learn more about the scene represented in the single picture. |
| US09171383B2 |
Apparatus and method of scalable encoding of 3D mesh, and apparatus and method of scalable decoding of 3D mesh
A scalable three-dimensional (3D) mesh encoding method includes dividing the 3D mesh into layers of complexity into a plurality of graduated levels and generating vertex position information and connectivity information of each of the plurality of levels. The vertex position information about the 3D mesh is encoded based on a weighting in each bit plane and vertex position information having a higher weighting in each bit plane is first encoded. |
| US09171381B1 |
System and method for rendering an image of a frame of an animation
An exemplary system and method for recursively rendering an image, including marking renderable items of the image that have changed from a previous image, are provided. In some implementations, a client computing device may receive a plurality of frames as part of an animation. An image list may be maintained, where the image list is configured to store one or more references to one or more respective bitmap objects associated with a first image of a first frame in the animation. The bitmap objects referenced in the image list may be marked as having changed from the first image to the second image. The second image may be rendered based on the marked bitmap objects in the image list. |
| US09171380B2 |
Controlling power consumption in object tracking pipeline
Embodiments related to detecting object information from image data collected by an image sensor are disclosed. In one example embodiment, the object information is detected by receiving a frame of image data from the image sensor and detecting a change in a threshold condition related to an object within the frame. The embodiment further comprises adjusting a setting that changes a power consumption of the image sensor in response to detecting the threshold condition. |
| US09171378B2 |
Camera apparatus and method for tracking object in the camera apparatus
A camera apparatus capable of tracking a target object based on motion of a camera sensed by a motion sensor and a method for tracking an object in the camera apparatus are provided. The method includes, if input image data is inputted, sensing motion of a camera which captures the input image data, generating camera motion data corresponding to motion of the camera, estimating a pose or motion of the camera based on the camera motion data, and tracking translation of a target object based on at least one of the estimated pose or motion of the camera and the input image data. |
| US09171377B2 |
Automatic point-wise validation of respiratory motion estimation
A system for validating motion estimation comprising a field unit (110) for obtaining a deformation vector field (DVF) estimating the motion by transforming a first image at a first phase of the motion into a second image at a second phase of the motion, a metric unit (120) for computing a metric of a local volume change at a plurality of locations, and a conformity unit (130) for computing a conformity measure based on the computed metric of the local volume change at the plurality of locations and a local property of the first or second image defined at the plurality of locations. Based on the value of the conformity measure, the DFV estimating the motion is validated. Experiments show that the conformity measure based on the computed metric of a local volume change at a plurality of locations and the local property of the first or second image, defined at the plurality of locations, does not necessarily favor a large weight for the outer force to provide a more accurate registration. One reason for this observation may be that large deformations providing more accurate alignment often lead to deformations resulting in unreasonably large volume changes. DVFs comprising such deformations thus are more likely to be discarded by the system of the invention. |
| US09171375B2 |
Multi-cue object detection and analysis
Foreground objects of interest are distinguished from a background model by dividing a region of interest of a video data image into a grid array of individual cells. Each of the cells are labeled as foreground if accumulated edge energy within the cell meets an edge energy threshold, or if color intensities for different colors within each cell differ by a color intensity differential threshold, or as a function of combinations of said determinations. |
| US09171372B2 |
Depth estimation based on global motion
This disclosure describes techniques for estimating a depth of image objects for a two-dimensional (2D) view of a video presentation. For example, a plurality of feature points may be determined for a 2D view. The plurality of feature points may be used to estimate global motion, e.g., motion of an observer (e.g., camera), of the 2D view. For example, the plurality of feature points may be used to generate a global motion frame difference. The global motion frame difference may be used to create a depth map for the 2D view, which may be used to generate an alternative view of the video presentation that may be used to display a three-dimensional (3D) video presentation. |
| US09171367B2 |
Image processing apparatus, image processing method, and program
An image processing apparatus includes a calculation unit configured to calculate information indicating similarity among a plurality of tomographic images, and a generation unit configured to generate a tomographic image from the plurality of tomographic images based on the calculated information indicating similarity. |
| US09171366B2 |
Method for localization of an epileptic focus in neuroimaging
In a method for localizing a candidate foci in neuroimaging, two images are acquired, one being a baseline (interictal) image and another being an intervention (ictal) image. The two images are aligned and the intensities of the images are normalized. A difference image is calculated by subtracting the baseline (interictal) image from the intervention (ictal) image. The difference image is normalized and regions of interest are selected as candidate foci. |
| US09171361B2 |
Infrared resolution and contrast enhancement with fusion
The present disclosure relates to combination of images. A method according to an embodiment comprises: receiving a visual image and an infrared (IR) image of a scene and for a portion of said IR image extracting high spatial frequency content from a corresponding portion of said visual image. The method according to the embodiment further comprises combining said extracted high spatial frequency content from said portion of the visual image with said portion of the IR image, to generate a combined image, wherein the contrast and/or resolution in the portion of the IR image is increased compared to the contrast and/or resolution of said received IR image. |
| US09171358B2 |
Image editing device and image editing method
An image editing device of the present invention, for editing a combined photographic image formed by combining a plurality of images, comprises a first image processing section for carrying out first image processing on the image and creating a first image, a second image processing section for carrying out second image processing on the first image to create a second image, a combined photograph processing section for creating a combined photograph by combining the second image in accordance combining position of the combined photograph, and a control section for, after the first image processing has been carried out, creating a combined photograph by combining the second image that has been subjected to the second image processing in accordance with combining position of the combined photograph by the combined photograph processing section, and storing the combined photograph and the first image as a single image file. |
| US09171357B2 |
Method, apparatus and computer-readable recording medium for refocusing photographed image
The present disclosure relates to a method, apparatus and computer-readable recording medium for refocusing a photographed image using a depth map. According an aspect of the present disclosure, there is provided a refocusing method including a) outputting a photographed image on a display unit; b) determining whether a region to be refocused is specified in the output image; c) computing a depth map of the output image if the region to be refocused is specified; d) acquiring a refocused image by increasing resolution of the specified region to be refocused and decreasing resolution of regions other than the specified region to be refocused, based on the computed depth map; and e) outputting the refocused image on the display unit. According to the present disclosure, when an image photographed using a camera is not focused exactly or it is intended to focus on another region of the photographed image, a refocused image can be generated by specifying a region to be refocused in the photographed image. |
| US09171355B2 |
Near infrared guided image denoising
Systems and methods for multispectral imaging are disclosed. The multispectral imaging system can include a near infrared (NIR) imaging sensor and a visible imaging sensor. The disclosed systems and methods can be implemented to de-noise a visible light image using a gradient scale map generated from gradient vectors in the visible light image and a NIR image. The gradient scale map may be used to determine the amount of de-noising guidance applied from the NIR image to the visible light image on a pixel-by-pixel basis. |
| US09171346B2 |
Method and device for movement of image object
Provided is a method for the movement of an image object. In the method: A. determining the direction of movement of an image object to be moved, and a module X corresponding to same; B. moving the module X along the direction of movement by one unit; determining whether or not an overlap exists between the module X and another module; if not, terminating the process; otherwise, determining the module having the overlap with the module X as a blocking module; restoring the module X to the original position before swapping locations with the blocking module; determining whether or not all other modules apart from the module X and the blocking module can be properly placed; if yes, terminating the process; otherwise, executing step C; C. determining whether or not the module X can continue to move along the direction of movement; if not, terminating the process; otherwise, moving the module X by one unit; determining whether or not all other modules apart from the module X can be properly placed; if yes, terminating the process; otherwise, repeat step C. Employment of the solution provided in the present invention allows for an improved success rate for the movement of the image object. |
| US09171344B2 |
Methods, systems, and devices for managing medical images and records
The disclosure herein provides methods, systems, and devices for managing, transferring, modifying, converting and/or tracking medical files and/or medical system messages. In certain embodiments, the foregoing may generally be based on requesting medical files at a first medical facility, identifying the requested medical files at a second medical facility, initiating a secure network connection between the first and second medical facility, modifying a header portion of the medical files based on patient identification information created by the first medical facility, and other processing steps. |
| US09171341B1 |
Methods and systems for providing property data
The present invention relates to inventory management solutions, and in particular, to methods and systems for inventorying items and property over wireless and data networks, using digital imaging, positioning, RFID, and data terminals. The user experience in performing inventory management is simplified and enhanced over existing methods. |
| US09171338B2 |
Determining connectivity within a community
Systems and methods for determining trust scores and/or trustworthiness levels and/or connectivity are provided. Trust and/or trustworthiness and/or connectivity may be determined within, among or between entities and/or individuals. Social analytics and network calculations described herein may be based on user-assigned links or ratings and/or objective measures, such as data from third-party ratings agencies. The trust score may provide guidance about the trustworthiness, alignment, reputation, status and/or influence about an individual, entity, or group. The systems and methods described herein may be used to make prospective real-world decisions, such as whether or not to initiate a transaction or relationship with another person, or whether to grant a request for credit. |
| US09171337B2 |
System and method for monitoring social network conversations
A method, computer program product, and computer system for providing, using a processor of a computer, at least a portion of text that includes a link for use by a website. A plurality of posts associated with an online social network is monitored using the processor of the computer to determine whether the link is present in at least one post of the plurality of posts. A first user of the online social network that has the link included in the at least one post is identified using the processor of the computer, where the at least one post of the first user identifies a second user of the online social network. Information associated with the first user is recorded in a data store using the processor of the computer in response to identifying that the first user has the link posted in the at least one post. |
| US09171336B2 |
Cumulative connectedness
Embodiments of the invention are directed to systems, methods and computer program products for determining the connectedness from a first individual to a second individual on a social network. In some embodiments, a method includes: (a) receiving information associated with the social network, (b) determining a direct connection between the first individual and the second individual, (c) determining one or more indirect connections between a first individual and a second individual, and (d) determining the connectedness based at least partially on: the direct connection, and/or the number of indirect connections between the first individual and the second individual, and/or the type of each indirect connection, and/or a qualitative value of each indirect connection. Embodiments of the invention allow a user of a system to determine the strength (or quality/closeness) of a connection between two individuals on a social network. |
| US09171335B1 |
Providing social graph information for a webpage
Systems and techniques for displaying information associated with multiple accounts of multiple social media websites owned by an owner. In one implementation, a webpage accessed by a user can be determined to be a webpage of a social media website; data can be obtained from the webpage identifiable with an owner of an account of the social media website in which the owner of the account is not the user; based on the data from the accessed webpage identifiable with the owner, another social media webpage associated with another account of the owner for another social media website can be identified; data associated with the other social media webpage can be obtained; and the data associated with the other account can be provided for display with the accessed webpage. |
| US09171334B1 |
Tax data clustering
In various embodiments, systems, methods, and techniques are disclosed for generating a collection of clusters of related data from a seed. Seeds may be generated based on seed generation strategies or rules. Clusters may be generated by, for example, retrieving a seed, adding the seed to a first cluster, retrieving a clustering strategy or rules, and adding related data and/or data entities to the cluster based on the clustering strategy. Various cluster scores may be generated based on attributes of data in a given cluster. Further, cluster metascores may be generated based on various cluster scores associated with a cluster. Clusters may be ranked based on cluster metascores. Various embodiments may enable an analyst to discover various insights related to data clusters, and may be applicable to various tasks including, for example, tax fraud detection, beaconing malware detection, malware user-agent detection, and/or activity trend detection, among various others. |
| US09171332B2 |
Equity/interest rate hybrid risk mitigation system and method
The present invention provides a method and system for determining hedging transactions to meet required characteristics of risks associated with an insurance instrument, and mitigating the risks associated with the insurance instrument by executing hedging transactions. The hedging transactions utilize hybrid derivatives. In general, the equity/interest rate hybrid derivative concept encapsulates any derivative, or any investment vehicle with an embedded derivative, that contains a payoff formula(s). At a minimum the formula(s), is/are a function of two items: equities, and any interest rates. |
| US09171331B1 |
Commercial card packet
The present invention is directed to a commercial card packet form system that enables one or more users associated with a financial institution to input information associated with a customer to whom a commercial card (e.g., a purchase card, a travel card, a debit card, a credit card, a temporary card) is being issued. Each user may be granted or denied access to particular fields of information on the commercial card packet form depending on her or his role at the financial institution. The packet form may require reentry of information or user authentication to ensure accuracy of information. Pop-up warnings may alert the one or more users of potentially incomplete fields of information and instruct the one or more users to provide additional information. An audit trail may track updates to information and includes a timestamp and details associated with the user who made the updates. |
| US09171329B2 |
Vehicle impound and auctioning management system
A system is employed to operate a vehicle impounding facility for a municipality. A selection is received of a marked vehicle in a marked grid for titling, and an application for title for the selected vehicle is effectuated in the name of the municipality. A notation is received of a selected vehicle in a pending grid as being titled when the application for title for the selected vehicle has been approved and received. A scheduling is received of a titled vehicle in a select auction date grid for an upcoming auction. An assignment is received of a minimum bid value to a scheduled vehicle in a minimum bid guide grid in connection with the auction. Entry is received in a final auction grid of a purchase price for which a valued vehicle has been auctioned and a purchaser. |
| US09171325B2 |
Cross channel delivery system and method
Methods and systems consistent with the present invention provide a cross channel fulfillment system that enables consumers to purchase and receive items using different transmission mediums. The fulfillment system is a centralized distribution system that maintains information relating to consumers and has access to multiple transmission mediums. Specifically, the fulfillment system contains a database of consumer contact information relating to each transmission medium. The fulfillment system uses a remote device to provide information to consumers. The remote device transmits and receives broadcast messages including information relating to purchasable items. The fulfillment system may deliver a purchased item to the consumer using a medium different from that used to purchase the item. |
| US09171321B1 |
Providing electronic content based on sensor data
Techniques are described for using sensor data derived from a monitoring system to drive personalized content. Sensor data captured by a monitoring system may be used to determine attributes of users of the monitoring system and/or attributes of a property monitored by the monitoring system. The determined attributes may be used to select content to present to users of the monitoring system. Content presentation may be made through the monitoring system and may be triggered based on events detected by the monitoring system. |
| US09171320B2 |
Recommending link placement opportunities
Techniques for recommending Web pages or other content sources as candidates for link placement are described. Some embodiments provide a marketing activity support system (“MASS”) configured to recommend candidate Web pages for link placement. Recommending candidate Web pages may include determining multiple Web pages that include or reference one or more keywords that describe some subject matter domain. Recommending candidate Web pages may then further include ranking or ordering at least some of the multiple Web pages based on how many times each of the at least some Web pages references another one of the multiple Web pages. The ordered Web pages may then be presented as recommended candidate sites for link placement. |
| US09171319B2 |
Analysis system and method used to construct social structures based on data collected from monitored web pages
Embodiments of a method for determining a mapping are illustrated. In an embodiment, the method includes receiving a log record from a tracking component that is located on a plurality of web pages. The method further includes determining a first mapping between a plurality of anchors associated with the plurality of users. The method also includes determining a second mapping between the plurality of users based on the first mapping. |
| US09171318B2 |
Virtual insertion of advertisements
A device includes a communication interface and one or more processors. The communication interface may receive a playlist that lists segments of a content stream in an order the segments are to be recombined, receive advertisement information that describes an advertisement, receive a breakpoint, and send a revised playlist to a remote server. The one or more processors may generate the revised playlist based on the playlist, the advertisement information, and the breakpoint. The revised playlist may include references to the segments and the advertisements. |
| US09171317B2 |
Back-channel media delivery system
A back-channel media delivery system that may be used for tracking the number and type of human impressions of media content rendered by the system during the time the media was rendered is provided. The back-channel media delivery system includes a rendering device for rendering media, an environmental sensor for sensing impressions and other environmental variables and a computing device configured to play media on the rendering device, and gather data related to the external states detected by the environmental sensor. The system may include rules that interpret that data and may cause the system to custom select, tailor or control future playback of media on the system. |
| US09171316B2 |
Method and apparatus for vending a combination of products
A method and apparatus for delivering a plurality of products from a vending machine is disclosed. The method generally allows an offer for a package to be output, in which the package defines a plurality of products, including a selected product. An apparatus is also disclosed to carry out the method steps of the present invention. |
| US09171314B2 |
Cloud based management of an in-store device experience
The technology allows a user's demo experience to be set up and maintained remotely. Retailers and vendors may remotely manage and update the user experience on demonstration devices. A package of applications that highlight a particular device's capabilities can be selected and installed on demo versions of the particular device in stores all across the country. Usage information from the demonstration devices may be collected. With the collected information, retailers can ascertain user interest in particular devices and applications. Further, the user experience may be maintained and reset to default settings on a regular basis. Automatically resetting the experience maintains a consistent retail experience. |
| US09171313B2 |
Encoding AD and/or AD serving information in a click URL
The tracking of ad selections (such as ad clicks for example), and/or rich levels of ad performance may be facilitated by encoding one or more ad properties in a click URL of the ad. An intermediate URL server may be used to decode such ad properties when the ad is selected. Ad properties may include a rendering attribute of the ad; a geolocation to which the ad was served; information pertaining to advertiser charges, etc. |
| US09171311B2 |
Maintaining targetable user inventory for digital advertising
Systems, methods, and computer storage media having computer-executable instructions embodied thereon that maintain a targetable user inventory for digital advertising. In embodiments, a request is made for user data associated with a user identification. If the user data or user identification is not available, a list of alternative user identifications is ranked according to various criteria based on identification signals. A match is selected from the list of alternative user identifications and user data associated with the alternative user identification is communicated in response to the request. |
| US09171310B2 |
Search term hit counts in an electronic discovery system
Embodiments of the invention relate to systems, methods, and computer program products for improved electronic discovery. More specifically, embodiments relate to managing the process for creating search term sets to be applied to electronic data sets associated with a case in an electronic discovery system. A search term management application is provided that allows for multiple users to work collaboratively to define the final search term set that is subsequently applied to the corpus of electronic data for the case. In addition, the application provides for tracking the overall search term creation process. In addition, embodiments provide for a search term hit count engine that is configured to determine search term hit counts for data as a means of predicting the volume of data needed to review. |
| US09171309B2 |
Method and system for rating expert classified by keyword
A method and system for computing an expert point value of a user for each keyword is provided, including: a first step of assigning a first knowledge-based expert rating value associated with a keyword to a user identifier of a user which enters the keyword into an expert field; a second step of assigning a second knowledge-based expert rating value associated with the keyword to the user identifier when another user stores the keyword to correspond to the user identifier; a third step of assigning a third knowledge-based expert rating value associated with the keyword to the user identifier when the user of the user identifier performs an answer activity for the keyword; and a fourth step of computing the knowledge-based expert rating value of the user identifier for the keyword based on at least one of the first, the second, and the third knowledge-based expert rating values. |
| US09171308B2 |
Method and system for account management
A method and system for managing accounts that control access to resources of different providers. The account management system allows providers to use a common logon procedure through an account management server. The account management system dynamically creates accounts when users request to access resources. To access to a resource, a user provides their credentials (e.g., user identifier and password) through a certain location (e.g., client computer) and identifies the resource (e.g., application). The account management system determines whether an account has already been created for those credentials. If not, the account management system authenticates the user, creates a new account for those credentials (i.e., registration), and associates the identified resource with the account. |
| US09171307B2 |
Using successive levels of authentication in online commerce
A method comprising performing following acts on a network server: receiving a communication from a client terminal operated by a client; performing a first authentication of the client terminal or client; in response to the first authentication, delivering a first service to the client; after delivering the first service, sending an offer for a second service to the client terminal; receiving an acceptance message for the second service from the client terminal; performing a second authentication of the client terminal and/or the client; in response to receiving the acceptance message for the second service from the client terminal and to the second authentication being successful, delivering a second service to the client; wherein the first authentication and the second authentication use different authentication techniques. Other aspects include a programmed data processing apparatus for carrying out the method and a tangible program carrier instructing the apparatus to perform the acts. |
| US09171306B1 |
Risk-based transaction authentication
Apparatus and methods for authorizing an exchange between a customer and a services provider. The apparatus may include an electronic processor that is configured to: (1) calculate a reference event profile; and (2) determine a difference between a prospective transaction profile and the reference event profile. The prospective transaction profile may be based on the initiation of a prospective transaction by an individual whose identity has not been verified. The reference event profile may be based on a plurality of customer events that correspond to one or many different customers. The apparatus may include an output device that is configured to output authentication test information that corresponds to the difference. The authentication test information may support a revised prospective transaction profile that is more similar to the reference event profile than is the initial prospective event profile. |
| US09171302B2 |
Processing payment transactions without a secure element
A user conducts a wireless payment transaction with a merchant system by transmitting payment information from a user device to a terminal reader without accessing a secure element resident on the user device. A user taps a user device in a merchant system's terminal reader's radio frequency field. The terminal reader and the user device establish a communication channel and the terminal reader transmits a signal comprising a request for a payment processing response. The signal is received by the user device and converted by a controller to a request understandable by an application host processor. The controller transmits the request to the application host processor, where the request is processed, and a response is transmitted to the controller and then to the terminal reader. The response generated by the application host processor is identifiable by the merchant system as a payment response. |
| US09171299B1 |
Isolated payment system
A payment company separate from a retailer runs a payment application having credentials on a server computer. There are wireless personal portable interfaces belonging to the payment company but located in real and virtual retail, showrooms. The retailer agrees to the credentials of the payment company, which include prespecified real and virtual currencies for remittance. Credentials also include rules regarding limitations on acceptance of remittance in virtual currencies. A customer having a personal portable device enters a showroom and selects merchandise to purchase. She selects a payment company who remits payment to the retailer according to the credentials. |
| US09171297B2 |
Method and apparatus for money transfer
A staged bill payment transaction method comprises receiving transaction information from a user, building a staging record at a data center, and providing a retrieval key to the sender. The staging record comprises the transaction information and the retrieval key identifies the staging record for finalizing the transaction. |
| US09171295B2 |
Not-connected product data exchange via symbology
An electronic device, such as a print device, generates barcodes that contain encoded data corresponding to a functional destination and a variety of electronic device operational parameters. When a user selects a functional category, the electronic device determines the category's destination and relevant parameters, and generates the barcode with destination data and the parameters. A user may then use a barcode scanner to scan the barcode and automatically transmit the parameters to the destination. |
| US09171294B2 |
Methods and systems for providing mobile customer support
Methods, systems, and computer program products are provided for mobile customer support. A customer service request is received at a mobile device from a user associated with the mobile device to access a customer service feature of an application associated with the mobile device. In response to the request, a user context is determined by at least one of saving a state of the application, storing data associated with the application or accessing user activity associated with the application. A communication request comprising the user context is sent to a customer service center (“CSC”) associated with the customer service feature. Communication between the CSC and the user is enabled, wherein the CSC accesses the user context and uses the user context during the communication. |
| US09171288B2 |
Predicting an identity of a person based on an activity history
Systems and methods for predicting an identity of a person are provided. In some aspects, a list of subject activities accessed by a subject person is received. For each of a plurality of stored persons, a stored list of activities accessed with by the stored person is accessed in one or more data repositories. An intersection is calculated between the list of subject activities and the stored list of activities for at least one stored person from the plurality of stored persons. That the subject person is likely to correspond to the at least one stored person from among the plurality of stored persons is predicted, based on the calculated intersection. An indication that the subject person is likely to correspond to the at least one stored person from among the plurality of stored persons is provided. |
| US09171286B2 |
Recording events in a virtual world
Systems, methods and articles of manufacture are disclosed for recording events occurring in a virtual world. In one embodiment, properties of events previously recorded and/or attended by a user may be identified. Recording criteria for the user may be derived from the identified properties. Upon identifying an event satisfying the recording criteria, the event may be recorded. The recorded event may be played back at the convenience of the user. |
| US09171285B2 |
Methods for improving the clinical outcome of patient care and for reducing overall health care costs
System and method for reducing healthcare costs by improving care and encouraging healthy behaviors. A web-based or telephonic program using health plan sponsor funded financial incentives, offered to patients and providers for declaring or demonstrating adherence or providing a reason for non-adherence to performance standards. Financial incentives are contingent upon patient's and provider's agreement to allow the other to confirm or acknowledge the other's declaration or demonstration of adherence or non-adherence reason. Combining financial incentives with a set of checks and balances motivates participation in the program and adherence to the performance standards. Performance standards include evidence-based treatment guidelines, information therapy, wellness and prevention solutions, care management, and other methods proven to control costs by improving behaviors and healthcare. The system and method achieves improved health and more affordable healthcare by aligning the interests of providers, patients/consumers, and health plan sponsors in a win-win-win arrangement. |
| US09171282B2 |
Interactive complex event pattern builder and visualizer
Systems, methods, and other embodiments associated with complex event pattern building are described. One example method includes receiving, on a server-side, requests associated with user interactions with interactive menus. The method includes responding to the requests with commands that build a set of event-condition-action, data that describes an action to take in response to an occurrence of a complex event pattern. The example method may also include automatically converting the event-condition-action data into a programmatic construct that configures a complex event pattern engine to initiate the specified action in response to detecting an occurrence of the complex event pattern. |
| US09171267B2 |
System for categorizing lists of words of arbitrary origin
The present disclosure provides for categorization of lists of words. The method comprises querying DBpedia to find the resources related to the given list of words. Once the resources are found, the corresponding media Wikipedia categories can be retrieved, as well as their ancestors, generating a graph of categories. A number of graph analysis algorithms can then be applied to the graph, each returning a selected category. For each algorithm a classifier is trained to decide whether the output of the algorithm is indeed the “best” category. An ensemble weighted majority voting can then be used to select the best category based on votes cast by each classifier. The disclosure demonstrates a more accurate selection of the best category and can include an ensemble majority rated voting algorithm comprising all voting members initially casting one vote; i.e., highest frequency, most frequently occurring word, least common ancestor and centrality measures. |
| US09171265B1 |
Crowdsourcing for documents that include specified criteria
Techniques for utilizing a pool of human workers along with an automated classification feedback loop for identifying documents that meet certain criteria. As described herein, a requestor that desires to locate documents that meet certain specified criteria may first program a classifier with the specified criteria. The requestor may also determine the desired classes into which the classifier will categorize documents that are run against the classifier. The requestor may then locate one or more documents that represent each of the determined classes and then train the classifier using the documents. Thereafter, the requestor may publish a request to a pool of human workers soliciting documents meeting the criteria. Each of the documents may be run against the trained classifier and passed onto the requestor for further analysis if the classifier categorizes the respective document as acceptable. |
| US09171261B1 |
Analyzing or resolving ambiguities in an image for object or pattern recognition
Specification covers new algorithms, methods, and systems for artificial intelligence, soft computing, and deep learning/recognition, e.g., image recognition (e.g., for action, gesture, emotion, expression, biometrics, fingerprint, facial, OCR (text), background, relationship, position, pattern, and object), large number of images (“Big Data”) analytics, machine learning, training schemes, crowd-sourcing (using experts or humans), feature space, clustering, classification, similarity measures, optimization, search engine, ranking, question-answering system, soft (fuzzy or unsharp) boundaries/impreciseness/ambiguities/fuzziness in language, Natural Language Processing (NLP), Computing-with-Words (CWW), parsing, machine translation, sound and speech recognition, video search and analysis (e.g. tracking), image annotation, geometrical abstraction, image correction, semantic web, context analysis, data reliability (e.g., using Z-number (e.g., “About 45 minutes; Very sure”)), rules engine, control system, autonomous vehicle, self-diagnosis and self-repair robots, system diagnosis, medical diagnosis, biomedicine, data mining, event prediction, financial forecasting, economics, risk assessment, e-mail management, database management, indexing and join operation, memory management, and data compression. |
| US09171259B1 |
Enhancing classification and prediction using predictive modeling
In one embodiment, a system for enhancing predictive modeling includes an interface operable to receive a first dataset. The system may also include a processor communicatively coupled to the interface that is operable to generate a holdout dataset based on the first dataset. The processor may also train each of a plurality of boosting models in parallel using the first dataset, wherein for each of a number of iterations, training comprises: building a one-level binary decision tree to train a split-node variable; calculating an impurity of the split-node variable; and calculating an optimal split node, wherein the optimal split node is the split-node variable with a lowest impurity between the plurality of boosting models. The system may then determine a final model based on one of the plurality of boosting models that provides the lowest error rate when applied to the holdout dataset. |
| US09171257B2 |
Recommender evaluation based on tokenized messages
A machine may implement a recommender that provides recommendations to users. The machine may be configured to present a first version of the recommender configured by various parameters. A user may submit a message to the machine, and the machine may identify a parameter among the various parameters by tokenizing the message and identifying the parameter among the tokens. The machine may then generate a second version of the recommender by modifying the parameter and configuring the second version according to the modified parameter. The machine may then present the first and second versions of the recommender contemporaneously two different portions of the users. By tokenizing a further message received from the users, the machine may evaluate the first and second versions and determine whether the second version is a replacement of the first version. |
| US09171255B2 |
Method, software, and system for making a decision
A method for making a decision includes receiving a first decision question from a first user, providing a database of information regarding elements of decision quality, populating the database with data corresponding to each element of decision quality as applied to the first decision question, and providing a decision recommendation for the first decision question based at least in part on the data. |
| US09171254B2 |
Method for encoding ontology reasoning on a programmable logic controller
A method is disclosed for operating a programmable logic controller which executes program(s) based on cycles having a predetermined cycle time in a predefined memory. An automated reasoning method based on an ontology and a description logic is implemented in the programmable logic controller. To enable this, at least the concepts and roles of the ontology are encoded using index numbers and the axioms of the ontology are encoded using tuples of integral index numbers. The automated reasoning method is interrupted before the end of a cycle and subsequently resumed at the current status of program execution. This allows for the cyclic programming paradigm of a programmable logic controller. The method can be used for any types of programmable logic controller, e.g., controllers of devices belonging to an automation system or energy generation devices. In such scenarios the automated reasoning method may be used for diagnosing the corresponding devices. |
| US09171253B1 |
Identifying predictive models resistant to concept drift
A plurality of classifiers is identified. A set of test cases is selected based on time. The set of test cases are grouped into a plurality of datasets based on time where each of the plurality of datasets is associated with a corresponding interval of time. Each of the plurality of classifiers is applied to each of the plurality of datasets to generate classifications for test cases in each of the plurality of datasets. For each of the plurality of classifiers, a classification performance score is determined for each of the plurality of datasets based on the classifications generated for the test cases of each dataset. A classifier is selected from among the plurality of classifiers for production based on the classification performance scores of each of the plurality of classifiers across the plurality of datasets. |
| US09171252B2 |
Synchronization for context-aware complex event processing
A complex event processing system comprises one or more rule engines configured to receive information from a source system via a message broker. Multiple rule engines may be used in parallel, with the same/different rules deployed. According to an embodiment, a rule engine may include a manager component, a proxy component, a reasoner component, and a working memory. The manager and proxy serve as interfaces with the message broker to allow asynchronous communication with a provider storing state information. The reasoner is configured to execute rules based upon occurrence of events in the source system. Embodiments may be particularly suited to implementing a gamification platform including a business entity provider, with an existing business source system (e.g. CRM, ERP). |
| US09171247B1 |
System and method for fast template matching in 3D
Described is a pattern matching system for matching a test image with a 3D template. The system is initiated by generating a library of templates (each individual template is a three-dimensional array, with each pixel in the array representing a value at a particular x, y, and z coordinate). Each column of pixels along one axis (e.g., z) is converted into a neural input. Each neural input is fed through a neural network to establish a delayed connection between each neural input and output neuron and to generate a template neural network. Separately, a test image is converted into neural inputs. The neural inputs of the test image are input the template neural network to generate output neurons. The output neurons are evaluated to identify a location of the template in the test image. |
| US09171246B2 |
System, methods, apparatuses, and computer program products for detecting that an object has been accessed
A system, method, apparatus, and computer program product are provided for detecting that an object has been accessed. A system may include a first surface carrying a first signaling tag and a second surface carrying a second signaling tag. The first and second signaling tags may be positioned such that when the second surface is in a first position, the first signaling tag and the second signaling tag are sufficiently proximate to each other such that a coupling between the first signaling tag and the second signaling tag results in a first signal state being emitted by at least one of the signaling tags. When the second surface is transitioned from the first position to a second position, a decoupling between the first signaling tag and the second signaling tag may in a second signal state being emitted by at least one of the signaling tags. |
| US09171245B2 |
Chip arrangement, analysis apparatus, receiving container, and receiving container system
In various embodiments, a chip arrangement includes a first chip having a first antenna which is monolithically integrated in the first chip and is intended to communicate with at least one of an external reader or an external writer; a second chip having a second antenna which is monolithically integrated in the second chip and is intended to communicate with the at least one of the external reader or the external writer; and a booster antenna which is coupled to the first antenna in a first coupling area in order to increase a range of the first antenna and is coupled to the second antenna in a second coupling area in order to increase a range of the second antenna. |
| US09171244B2 |
RFID tag
Provided is an RFID tag, wherein a communication distance of several centimeter or more can be secured and the cost of which can be reduced in comparison to conventional on-chip antennas, even when being compact in size (square shaped with a side of 1.9 to 13 mm). The RFID tag (80) comprises an antenna (20), an IC chip (30) connected to the antenna (20), and a sealing material (10) that seals the IC chip (30) and the antenna (20). The antenna (20) is a coil antenna or a loop antenna, and the resonance frequency (f0) of an electric circuit constituted by the inductance (L) of the antenna (20) and the capacitance (C) of the IC chip (30) is equal to the operation frequency of the IC chip (30), or in the vicinity thereof. |
| US09171243B1 |
System for managing a digest of biographical information stored in a radio frequency identity chip coupled to a mobile communication device
A method of maintaining a biographical digest of information stored in a radio frequency identity chip communicatively coupled to a motherboard of a mobile communication device. The method comprises determining and writing inception information to the radio frequency identity chip once and preventing later modification of the inception information by a biographical digest software layer stored in a memory of the mobile communication device and executed by a processor of the device. The method further comprises determining and writing current information to the radio frequency identity chip by the biographical digest software layer in response to triggering events. |
| US09171242B2 |
Coded information bearing identification tags for cables
A information bearing device into which several wires or a cable can be disposed, for the display of QR code information pertaining to the wires or cable. The device includes a first indicia bearing engaging portion and a second receiving portion for mounting the device on a wire(s) or cable. QR code or micro QR code indicia may be printed directly onto the surface of the engaging portion, or the indica may be added to the indicia receiving surface by placement of self adhesive QR code containing tabs to be read by QR code readers, cameras and smart phones. |
| US09171237B2 |
Printing controlling terminal apparatus, image forming apparatus and method for controlling printing using the same
A printing controlling terminal apparatus, an image forming apparatus, and a printing controlling method thereof are provided. The printing controlling terminal apparatus includes a user interface that receives a command to print regarding a document, a determiner that determines if the document intended by the command to print is printed in color, a print data generator that generates print data regarding the document according to a result of the determining, and a communicator that transmits the generated print data to an image forming apparatus. The determiner divides each page of the document into a plurality of blocks, extracts color information from each of the plurality of blocks by applying weighted values to color values of the plurality of divided blocks, and determines whether to print the document in color based on the color information. |
| US09171235B2 |
Image forming apparatus, host apparatus, and method for printing out web page therewith
An image forming apparatus capable of printing out a web page displayed on an host apparatus. An image forming apparatus includes a sheet-supplying cassette to store a printable medium thereon, an input key to input a command for printing out the web page, an interface to transmit the command for printing out the web page to the host apparatus, and receive print data converted to fit onto the printable medium stored on the sheet-supplying cassette from the host apparatus if the input key is selected, and an image forming unit to print out the received print data on the printable medium. Therefore, a user can conveniently prints the web page. |
| US09171229B2 |
Visual object tracking method
A visual object tracking method includes the steps of: setting an object window having a target in a video image; defining a search window greater than the object window; analyzing an image pixel of the object window to generate a color histogram for defining a color filter which includes a dominant color characteristic of the target; using the color filter to generate an object template and a dominant color map in the object window and the search window respectively, the object template including a shape characteristic of the target, the dominant color map including at least one candidate block; comparing the similarity between the object template and the candidate block to obtain a probability distribution map, and using the probability distribution map to compute the mass center of the target. The method generates the probability map by the color and shape characteristics to compute the mass center. |
| US09171228B2 |
Method and system for estimating a similarity between two binary images
The invention relates to a method and a system for estimating the resemblance between two images of optionally different modalities. More particularly, the invention makes it possible to characterize a similarity between two binary images according to a formula that allows registration of images acquired in the fields of teledetection, medical imaging, and industrial vision. |
| US09171226B2 |
Image matching using subspace-based discrete transform encoded local binary patterns
Determining a match between the subjects of first and second images as a function of decimal-number representations of regions of the first and second images. The decimal-number representations are generated by performing discrete transforms on the regions so as to obtain discrete-transform coefficients, performing local-bit-pattern encoding of the coefficients to create data streams, and converting the data streams to decimal numbers. In one embodiment, the first and second images depict periocular facial regions, and the disclosed techniques can be used for face recognition, even where a small portion of a person's face is captured in an image. Subspace modeling may be used to improve accuracy. |
| US09171224B2 |
Method of improving contrast for text extraction and recognition applications
An electronic device and method receive (for example, from a memory), a grayscale image of a scene of real world captured by a camera of a mobile device. The electronic device and method also receive a color image from which the grayscale image is generated, wherein each color pixel is stored as a tuple of multiple components. The electronic device and method determine a new intensity for at least one grayscale pixel in the grayscale image, based on at least one component of a tuple of a color pixel located in correspondence to the at least one grayscale pixel. The determination may be done conditionally, by checking whether a local variance of intensities is below a predetermined threshold in a subset of grayscale pixels located adjacent to the at least one grayscale pixel, and selecting the component to provide most local variance of intensities. |
| US09171222B2 |
Image processing device, image capturing device, and image processing method for tracking a subject in images
An image processing device for tracking a subject included in a first image, in a second image captured after the first image includes: a segmentation unit that divides the first image into a plurality of segments based on similarity in pixel values; an indication unit that indicates a position of the subject in the first image; a region setting unit that sets, as a target region, a region including at least an indicated segment which is a segment at the indicated position; an extraction unit that extracts a feature amount from the target region; and a tracking unit that tracks the subject by searching the second image for a region similar to the target region using the extracted feature amount. |
| US09171220B2 |
Apparatus and method for tracking contour of moving object, and apparatus and method for analyzing myocardial motion
A moving object contour tracking apparatus includes a contour tracking section for performing, by taking an initial contour of the moving object in a predetermined image slice as a starting contour, contour tracking in a first time direction to acquire a first contour of the moving object and contour tracking in a second time direction to acquire a second contour of the moving object in each image slice; a contour comparison section for calculating, in the predetermined image slice, a similarity between the first contour and the initial contour and a similarity between the second contour and the initial contour; and a contour correction section for taking the contours in the image slices that are acquired in a contour tracking direction corresponding to the greater one of the two similarities as the contours of the moving object in the respective image slices. |
| US09171219B2 |
Methods and apparatus for image fusion
Systems and methods configured to implement sliced source imaging to produce a plurality of overlapping in-focus images on the same location of a single imaging detector without using beamsplitters. |
| US09171218B2 |
Image processing apparatus, image processing method, and computer readable medium that recognize overlapping elements in handwritten input
An image processing apparatus includes a reception unit, a determination unit, a handwriting separation unit, an image generation unit, an image recognition unit, and an output unit. The reception unit receives handwriting information. The determination unit determines whether first handwriting indicated by first handwriting information and second handwriting indicated by second handwriting information overlap each other on the basis of the handwriting information. The handwriting separation unit separates the first handwriting from the second handwriting by changing a first/second handwriting position in the first/second handwriting information when the determination unit has determined that the first and second handwriting overlap each other. The image generation unit generates an image from handwriting information obtained through the separation, and information regarding handwriting that has been determined not to overlap other handwriting. The image recognition unit recognizes the generated image. The output unit outputs the recognition result. |
| US09171217B2 |
Vision system for vehicle
A vision system for a vehicle includes a single forward facing camera and a control having a processor, with the camera and processor disposed in a unitary module installed in the vehicle. The processor, responsive to processing of captured image data, detects headlights of oncoming vehicles and the control, responsive to the detection, provides an output for a headlamp control system of the vehicle. The processor, responsive to processing of captured image data, detects lane marks on a road being traveled by the vehicle and, responsive to the detection, provides an output for a lane departure warning system of the vehicle. The processor may estimate distance from the vehicle to an object or vehicle present exteriorly of the vehicle. The module is supplied by an automotive supplier to the vehicle manufacturer with software operable by the processor for a plurality of driver assistance systems of the vehicle. |
| US09171211B2 |
Image processing for launch parameters measurement of objects in flight
An example embodiment includes a method of measuring launch parameters of an object in flight. The method includes capturing images of an object in flight. A radius of the object and a center of the object are identified in each of the images. A velocity, an elevation angle, and an azimuth angle are calculated based on the radius of the object, the center of the object, and pre-measured camera alignment values. The method further includes cropping the images to a smallest square that bounds the object and flattening the images from spherical representations to Cartesian representations. The method also includes converting the Cartesian representations to polar coordinates with a range of candidate centers of rotations. Based on a fit of the polar image pair, the spin axis and spin rate are measured. |
| US09171209B2 |
Overlay-based asset location and identification system
A network asset location system and methods of its use and operation are disclosed. In one aspect, the network asset location system includes a mobile application component executable on a mobile device including a camera and a display, the mobile application component configured to receive image data from the camera and display an image on the display based on the image data and overlay information identifying one or more network assets identifiable in the image data. The network asset location system also includes an asset management tracking engine configured to receive the image data and generate the overlay information including an identification of a location of at least one of the one or more network assets within the image. |
| US09171208B2 |
System and method for filtering data captured by a 2D camera
A system comprises a memory operable to store light intensity information for a plurality of neighboring pixels of an image that includes a dairy livestock. The system further comprises a processor communicatively coupled to the memory. The processor determine that a difference between the light intensity information for a first pixel of the plurality of neighboring pixels and at least some of the other neighboring pixels exceeds a threshold. The processor further discards the first pixel and determines a location of a teat of the dairy livestock based on the image, excluding the discarded pixel. |
| US09171202B2 |
Data organization and access for mixed media document system
A Mixed Media Reality (MMR) system and associated techniques are disclosed. The MMR system provides mechanisms for forming a mixed media document that includes media of at least two types (e.g., printed paper as a first medium and digital content and/or web link as a second medium). In one particular embodiment, the MMR system includes a content-based retrieval database configured with an index table to represent two-dimensional geometric relationships between objects extracted from a printed document in a way that allows look-up using a text-based index. A ranked set of document, page and location hypotheses can be computed given data from the index table. The techniques effectively transform features detected in an image patch into textual terms (or other searchable features) that represent both the features themselves and the geometric relationship between them. A storage facility can be used to store additional characteristics about each document image patch. |
| US09171199B2 |
Information processing device and information processing method
An information processing apparatus may include a user recognition unit to recognize a user in a captured image, and a behavior recognition unit to recognize a behavior of a user. In addition, the apparatus may include a generation unit to generate user behavior information including information of the recognized user and the recognized behavior of the recognized user. Further, the apparatus may include a communication unit to transmit the user behavior information to an external apparatus. |
| US09171198B1 |
Image capture technique
This disclosure relates to winking to capture image data using an image capture device that is associated with a head-mountable device (HMD). An illustrative method includes detecting a wink gesture at an HMD. The method also includes causing an image capture device to capture image data, in response to detecting the wink gesture at the HMD. |
| US09171196B2 |
Multi-band infrared camera system optimized for skin detection
What is disclosed is a system and method for selecting the optimal wavelength ban combination for a multi-band infrared camera system which is optimized for skin detection. An objective function is constructed specifically for this application from classified performance and the algorithm generates wavelengths by maximizing the objective function. A specific wavelength band combination is selected which maximizes the objective function. Also disclosed is a 3-band and 4-band camera system with filters each having a transmittance of one of a combination of wavelength bands optimized to detect skin in the infrared band. The camera systems disclosed herein find their intended uses in a wide array of vehicle occupancy detection systems and applications. Various embodiments are disclosed. |
| US09171195B1 |
Recognizing three-dimensional objects
An object recognition system may recognize an object in a query image by matching the image to one or more images in a database. The database may include images corresponding to multiple viewpoints of a particular device. Key points of the query image are compared to key points in the database images. Database images with many overlapping key points to the query image are selected as potential matches. The geometry of objects in the potential matches is verified to the geometry of the object in the query image to determine if the overlapping key points have a similar geographic relationship to each other across images. Objects in geometrically verified database images may be selected as potentially matching objects to the object in the query image. When a potential matching image is found, the system may confirm the match by performing matching with a second image of the object. |
| US09171191B2 |
Method for dynamic authentication between reader and tag, and device therefor
The present disclosure discloses a method for dynamic authentication between a reader and a tag, and an implementing device therefor, to solve the technical problem of necessity of dependence of a traditional authentication method on a real-time, online, reliable and secure connection with a background database, as well as lack of ways for highly autonomous authentication of a tag by a reader. In the present disclosure, only a legitimate reader can obtain corresponding tag authentication information from an authentication database and authenticate or update a corresponding tag status; only a legitimate tag can be processed by the legitimate reader; during the authentication, a dynamic updating mechanism is used for a tag ID which ensures forward security; the reader stores tag information using a hash table and thus increases an authentication speed; data synchronization is achieved cleverly by ways of a counting value. The use of a random number guarantees that a different data packet is used for every authentication, thus hiding tag position information effectively and offering excellent security. |
| US09171190B2 |
Appliance and method for data exchange in a household
Embodiments of an appliance and method utilize data keys to facilitate the exchange of data and information among devices as part of an energy management system. The data keys contain and/or encode information particular to the appliance. This information helps to distinguish data that originates from one appliance from data that originates from other appliances in the household. In one embodiment, the data keys are stored locally, either on devices (e.g., memory) incorporated into the appliance or on a communication device (e.g., a wireless radio) that can connect to the appliance to permit the exchange of inputs and outputs. Exemplary configuration of the appliance can sense the connection with the communication device and provide an input to the communication device to determine the data key that is associated with the appliance. |
| US09171189B2 |
Systems and methods for preventing saturation of analog integrator output
Systems and methods for preventing saturation of analog integrator outputs are provided. Applications of the systems and methods in hybrid analog-digital integrators are also provided. Exemplary systems include two switches, one operational amplifier, one capacitor C, four gain blocks, three comparators, one XOR gate, one OR gate, one T flip-flop, and one digital counter. |
| US09171188B2 |
Charge measurement
An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output. The apparatus also comprises a controllable current source coupled to the first input of the comparator and configured for supplying or drawing current. The apparatus also comprises a digital logic circuit that is configured for controlling an amount of current supplied or drawn by the controllable current source. The apparatus is configured for measuring a charge associated with an external source that is coupled to the first input of the comparator. |
| US09171186B2 |
Method for executing an application
The invention describes a method for executing an application (A) which comprises executable native or interpretable code and calls functions of an operating system (BS), whereby the operating system (BS) transmits a result of the respective function call (f1) to the application (A). The method according to the invention is characterized by the fact that the application (A) checks the result of a respective function call for a falsification, so as to detect an attack. |
| US09171185B1 |
Programmable logic device with improved security
Techniques of the present invention impede power consumption measurements of an encryption engine on a logic device by running the encryption engine with an independent clock. This clock produces a signal that is decoupled from and asynchronous to clock signals feeding other circuits on the device. The clock feeding the encryption engine is not accessible externally to the device. Circuits may be employed to intentionally slow down or add jitter to one or more of the clock signals. |
| US09171184B2 |
Transmission terminal, transmission system and recording medium
A transmission terminal includes an authentication unit that determines, when the transmission terminal is not connected to a network, whether authentication of a storage medium is confirmed based on authentication information stored in a storage unit and authentication information read from the storage medium, and transmits, when the transmission terminal is connected to the network, an authentication request containing the authentication information read from the storage medium to an authentication device connected to the network, and a maintenance unit that alters maintenance functions executable on the transmission terminal based on whether authentication of the storage medium is confirmed based on the authentication information stored in the storage unit or a notice indicating that authentication of the storage medium is confirmed is received from the authentication device. |
| US09171183B2 |
Method and computer device for handling COM objects having elevated privileges
A computer device and method are provided to handle COM objects. A COM creating unit intercepts a request for creation of an elevated COM object by a first user process, determines whether the first user process is entitled to access the COM object, and creates the COM object without elevated privileges. A COM implementing unit intercepts a second user process that implements the COM object, confirms that the second user process is entitled to access the COM object and elevates the privilege level of the second user process to implement the elevated COM object. |
| US09171182B2 |
Dynamic data masking
Described is a method for dynamic data masking (DDM) of sensitive data. The method for DDM comprises receiving a response output comprising sensitive data, based on a client request, from an application, and identifying a main masking specification, based on the response output, for masking of the sensitive data in the response output. Further, the response output is parsed for creating a Document Object Model (DOM) tree for the response output. Status of a masking approach indication field of the main masking specification is checked, and masking is performed on nodes in the DOM tree comprising the sensitive data, based on the status of the masking approach indication field of the main masking specification. |
| US09171181B2 |
Systems and methods for enhanced mobile photography
Certain embodiments of the disclosed technology allow users who are photographed to control those photographs, even when the photographs are taken from a third party's mobile device. Other aspects of the disclosed technology facilitate candid photographs to be taken of users that want them. |
| US09171180B2 |
Social files
Disclosed are systems, apparatus, methods, and computer readable media for creating and sharing social files in a feed system. In one embodiment, a request is received to perform an action related to a social file. The social file may provide access to a first document file within a social networking system. The first document file may be capable of being displayed on a display device. A determination may be made as to whether the requested action complies with a permission configuration record associated with the social file. The permission configuration record may identify one or more user accounts permitted to access the social file. |
| US09171176B2 |
Data access control systems and methods
Various hardware and software configurations are described herein which provide improved security and control over protected data. In some embodiments, a computer includes a main motherboard card coupled to all input/output devices connected to the computer, and a trusted operating system operates on the main motherboard which includes an access control module for controlling access to the protected data in accordance with rules. The trusted operating system stores the protected data in an unprotected form only on the memory devices on the main motherboard. The computer may also have a computer card coupled to the main motherboard via a PCI bus, on which is operating a guest operating system session for handling requests for data from software applications on the computer. A tamper detection mechanism is provided in the computer for protecting against attempts to copy the unprotected form of the protected data onto memory devices other than the one or more memory devices used by the motherboard or computer card. |
| US09171175B2 |
Data programming control system with secure data management and method of operation thereof
A method of operation of a data programming control system includes: providing a secure data management host server coupled to a network; encrypting a contract manufacturer job by the secure data management host server, including: providing a memory image file, creating a programmer encrypted file from the memory image file, and encrypting permissions and the programmer encrypted file to form the contract manufacturer job; decrypting the contract manufacturer job transmitted through the network by a secure data management local server; transmitting the programmer encrypted file by the secure data management local server to a device programmer; and programming a device with the memory image file decrypted by the device programmer. |
| US09171173B1 |
Protected indexing and querying of large sets of textual data
A protected querying technique involves creating shingles from a query and then fingerprinting the shingles. The documents to be queried are also shingled and then fingerprinted. The overlap between adjacent shingles for the query and the documents to be queried is different, there being less, or no overlap for the query shingles. The query fingerprint is compared to the fingerprints of the documents to be queried to determine whether there are any matches. |
| US09171170B2 |
Data and key separation using a secure central processing unit
A computing system, comprising includes a first central processing unit (CPU) and a second CPU coupled with the first CPU and with a host processor. The second CPU and the host processor may both request the first CPU to generate keys that have access rights to regions of memory to access specific data. The first CPU may be configured to, in response to a request from the second CPU, generate a unique key with a unique access right to a region of memory, the unique key usable only by the second CPU, not the host processor. |
| US09171168B2 |
Determine anomalies in web application code based on authorization checks
Example embodiments disclosed herein relate to determining an anomaly of a missing authorization or inconsistent authorization in web application code. The web application code is analyzed to identify methods that have authorization checks associated and labeling the identified methods as related to authorization checks. Unidentified methods are associated as non-authorization check methods. The methods are compared to determine the anomaly. |
| US09171167B2 |
Methods and systems for use in analyzing cyber-security threats in an aviation platform
Methods and systems for use in in analyzing cyber-security threats for an aircraft are described herein. One example method includes generating an interconnection graph for a plurality of interconnected aircraft systems. The interconnection graph includes a plurality of nodes and a plurality of links. The method also includes defining a cost function for a cyber-security threat to traverse each link and defining a requirements function for a cyber-security threat to exploit each node. The method further includes generating a set of threat traversal graphs for each cyber-security threat of a plurality of cyber-security threats. |
| US09171162B2 |
Random file request for software attestation
Technologies pertaining to attesting to computer-executable code residing on a robot are described herein. An attestation server includes a database that comprises file paths that correspond to files on the robot at a time of manufacture of the robot. The database also includes file digests that are indicative of content of the files on the robot. The attestation server randomly selects a file path and transmits the file path to the robot. The robot accesses the file at the file path and computes a file digest for that file. The robot then transmits the file digest to the attestation server, which compares the file digest from the robot with the file digest in the database. If the file digests match, then the attestation server attests to the computer-executable code on the robot. |
| US09171160B2 |
Dynamically adaptive framework and method for classifying malware using intelligent static, emulation, and dynamic analyses
Techniques for malware detection are described herein. According to one aspect, control logic determines an analysis plan for analyzing whether a specimen should be classified as malware, where the analysis plan identifies at least first and second analyses to be performed. Each of the first and second analyses identified in the analysis plan including one or both of a static analysis and a dynamic analysis. The first analysis is performed based on the analysis plan to identify suspicious indicators characteristics related to processing of the specimen. The second analysis is performed based on the analysis plan to identify unexpected behaviors having processing or communications anomalies. A classifier determines whether the specimen should be classified as malicious based on the static and dynamic analyses. The analysis plan, the indicators, the characteristics, and the anomalies are stored in a persistent memory. |
| US09171144B2 |
Electronic physical unclonable functions
An electronic asymmetric unclonable function applied to an electronic system being evaluated includes an electronic system and an AUF array electronically associated with the electronic system. The AUF array includes a plurality of non-identical cells. Each of the non-identical cells includes a test element representing a characteristic of the electronic system being evaluated and a measurement device evaluating the test element. A comparison unit processes an output of the measurement device to provide a multi-bit output value representing a magnitude of differences. |
| US09171142B2 |
Arrangements for identifying users in a multi-touch surface environment
Arrangements to identify, in some form, multiple participants by an interactive surface system utilizing multi-touch technology are disclosed. The interactive surface system could identify, authorize, and allocate space on a surface for a participant based on identifying at least one attribute of the participant such as an object associated with the participant. The method can include searching for a first distinctive attribute of the participant, assigning an identifier to the attribute, and storing the identifier for future use. Other embodiments are also disclosed. |
| US09171139B2 |
Lock screens to access work environments on a personal mobile device
One or more embodiments of the invention provide access to a work environment in a mobile device from a lock screen presented by a personal environment of the mobile device, wherein the work environment is running in a virtual machine supported by a hypervisor running within the personal environment and wherein the personal environment is a host operating system (OS) of the mobile device. The host OS receives an authentication credential from a user in response to a presentation of the lock screen on a user interface (UI) of the mobile device and then determines whether the authentication credential is valid for the personal environment or the work environment. If the authentication credential is valid for the personal environment, access is enabled only to the personal environment. If the authentication credential is valid for the work environment, access is enabled to both the personal environment and the work environment. |
| US09171138B1 |
Software activation and revalidation
Software activation and revalidation. For example, a method for software activation and revalidation may include collecting machine configuration information from a machine on which a software application has been at least partially installed, sending the machine configuration information and a product key to an activation server, applying activation rules to determine whether the product key is valid for the machine configuration information, if the product key is valid for the machine configuration information, activating the software application by sending, from the activation server to the machine, license data that authorizes access to the software application and that contains the activation rules, periodically applying, at the machine, the activation rules to newly-collected machine configuration information to determine whether the product key remains valid for the newly-collected machine configuration information, and if the product key remains valid, revalidating, at the machine, the license data to authorize continued access to the software application. |
| US09171137B2 |
Systems and methods for enabling an automatic license for mashups
Systems and methods for managing digital rights settings are provided. In some aspects, the systems and methods described include receiving user input including an order for obtaining access rights to a media asset. Control circuitry determines whether the media asset is associated with a first package of media assets. The control circuitry cross-references a database of user order history to determine whether the user has obtained access rights for each media asset in the first package of media assets. If the user has obtained access rights for each media asset in the first package of media assets, the control circuitry generates digital rights settings for each media asset in the first package of media assets to enable the user to create a mashup. The mashup includes portions of at least one media asset in the first package. The control circuitry generates a display based on the digital rights settings. |
| US09171133B2 |
Securing a device and data within the device
Systems and methods are provided for securing a self-securing device and information that is stored in memory within the device. The self-securing device comprising a processor unit and memory external to the processor unit. The processor unit contains a processor and processor unit memory. Upon initialization of the self-securing device, the processor unit determines whether a secure key is stored in the processor unit memory. If no secure key is stored, then the processor unit generates a secure key and stores it in the processor unit memory. The processor unit uses the secure key to decrypt information read from the memory external to the processor unit and to encrypt information to be stored in memory external to the processor unit. |
| US09171132B1 |
Electronic note management system and user-interface
An electronic note management system is provides that includes a storage component, a user-interface, and one or more navigation features. The storage component maintains a plurality of records, and the user-interface component renders a plurality of electronic notes from the plurality of records. The user-interface is configured to display a given group of two or more notes in the plurality of notes as a sequenced series while the two or more notes are in a rendered state. One or more navigation features provided with the user-interface to enable a user to navigate (i) from a first note in the group to a next note in the group that is adjacent to the first note in the sequenced series (ii) while the first note and the next note are in the rendered state. |
| US09171130B2 |
Multiple modality mammography image gallery and clipping system
A system and method for analyzing and retrieving images of breast tissue abnormalities obtained from multiple sources. Providing a tool for a radiologist that includes a convenient region-of-interest association of mammogram, or other anatomical images, of an individual patient. One embodiment provides an efficient collection of all of the mammogram abnormalities for a patient. In yet another embodiment, the region-of-interest abnormalities in a single location in a patient's tissue are correlated across a variety of imaging modalities including X-rays, mammogram, CT, ultrasound, MRI, or other imaging technologies. |
| US09171129B2 |
System and method for storing, accessing, and displaying specialized patient information and other medical information
The invention provides a system and method of providing a user with specialized patient information comprising: uploading, storing, requesting, receiving, and displaying cardiological patient information for a patient. The display of the cardiological information is configured to optimal care to be provided to a patient. |
| US09171128B2 |
System and methods for quantitative image analysis platform over the internet for clinical trials
The present disclosure is directed at a system and method for analyzing clinical trial data over a network. The system and method specifics image protocols, encodes a number of protocols and communicates that information to an acquisition unit that appends the protocols to a digital image. When the image needs to be analyzed to gather clinical trial data, the encoded information is extracted and the correct software application is initialized and used to analyze the image. |
| US09171126B1 |
Range pattern matching in mask data
Pattern matching technology is used to find locations in mask data that are available for later processes, such as marking. These locations are found using pattern definitions. A match algorithm outputs locations that match the pattern definitions. Each pattern definition may include multiple marks. The patterns can be symmetrical or asymmetrical and the marks can be correctly placed during a marking step by using orientation information determined during the pattern matching process. Large area geometries may be located by a two-step process that generates a pattern definition by defining smaller patterns therein and by defining the spatial relationships of the smaller patterns. An additional correlation step results in high accuracy while minimizing computing resources. |
| US09171124B2 |
Parasitic extraction in an integrated circuit with multi-patterning requirements
Systems and methods are provided for extracting parasitics in a design of an integrated circuit with multi-patterning requirements. The method includes determining resistance solutions and capacitance solutions. The method further includes performing parasitic extraction of the resistance solutions and the capacitance solutions to generate mean values for the resistance solutions and the capacitance solutions. The method further includes capturing a multi-patterning source of variation for each of the resistance solutions and the capacitance solutions during the parasitic extraction. The method further includes determining a sensitivity for each captured source of variation to a respective vector of parameters. The method further includes determining statistical parasitics by multiplying each of the resistance solutions and the capacitance solutions by the determined sensitivity for each respective captured source of variation. The method further includes generating as output the statistical parasitics in at least one of a vector form and a collapsed reduced vector form. |
| US09171122B2 |
Efficient timing calculations in numerical sequential cell sizing and incremental slack margin propagation
Techniques and systems are described for improving the efficiency of timing calculations in numerical sequential cell sizing and for improving the efficiency of incremental slack margin propagation. Some embodiments cache timing-related information associated with a source driver that drives an input of a sequential cell that is being sized, and/or timing-related information for each output of the sequential cell that is being sized. The cached timing-related information for the source driver can be reused when sizing a different sequential cell. The cached timing-related information for the outputs of the sequential cell can be reused when evaluating alternatives for replacing the sequential cell. Some embodiments incrementally propagate slack margins in a lazy fashion (i.e., only when it is necessary to do so for correctness or accuracy reasons) while sizing gates in the circuit design in a reverse-levelized processing order. |
| US09171119B2 |
Unit fill for integrated circuit design for manufacturing
Embodiments include systems and methods for implementing a dummy fill flow in a processor design that points to a library of fill shapes that are associated with (e.g., defined and supported according to) a particular foundry process. For example, a set of cell types is generated in accordance with a foundry process definition, so that each unit cell type has a unique type identifier and an associated polygon definition. These cell types can be stored as a cell library. An automated fill flow can generate a dummy fill of an integrated circuit geometry with respective shape fills having shape cells that each point to one of the cell types in the cell library. Some implementations can use the cell library to stream in and instantiate the fill in the geometric design of the integrated circuit. |
| US09171116B1 |
Method and system for reducing redundant logic in an integrated circuit
An apparatus and method are provided for removing redundant logic in a logic design of an integrated circuit (IC) design. The apparatus and method optimizes the integrated circuit by selecting stuck-at constant registers in the logic design, propagating a constant output value of the stuck-at constant registers across output nets of the stuck-at constant registers, identifying redundant logic in the logic design based on the propagation of the constant input value across the output net of the stuck-at constant register, and removing the redundant logic in the logic design. |
| US09171115B2 |
System, method, and computer program product for translating a common hardware database into a logic code model
A system, method, and computer program product are provided for translating a hardware design. In use, a hardware design is received that is a graph-based common representation of a hardware design stored in a hardware model database. Logic code is generated for each hardware module node of the graph-based common representation of the hardware design. Additionally, flow control code is generated for each hardware module node of the graph-based common representation of the hardware design. A logic code model of the hardware design that includes the generated logic code and the generated flow control code is stored. |
| US09171112B2 |
Semiconductor hold time fixing
Computer implemented techniques are disclosed for fixing signal hold-time violations in semiconductor chips. Analysis includes estimation of hold-time requirements using ideal clocks. Allocation of placement regions within the design and near the macro circuits allows for later placement and wiring use during layout hold-time fixing. The placement region sizes are based on estimates of the needed buffers. Nets, within the design for detail routing, are ordered such that nets with hold-time violations are wired later, thus fixing hold-time violations without scaling or adding further buffers. Hold times are re-evaluated once wiring of track routes is complete. |
| US09171111B1 |
Hardware emulation method and system using a port time shift register
A processor-based hardware functional verification system with time shift registers is described. The system includes a processor cluster with a plurality of processors that each have a data inputs and select inputs. Furthermore, a plurality of electronic memories each having a plurality of read ports is associated with the processors, respectively. The time shift registers each have an input in communication with the read ports of the electronic memories and an output in communication with the select inputs of the processors. The system further includes an instruction memory that provides a control signal to each of the time shift registers to store data output from read ports of the electronic memories that can be provided to the processor for evaluation during a subsequent emulation step. |
| US09171105B2 |
Electronic device and method of operating the same
An electronic device and a method of operating the same are provided. More particularly, in an electronic device and a method of operating the same, by recognizing a keyword of contents, reflecting the contents, and executing an application corresponding to the recognized keyword, an application execution environment corresponding to a user intention is provided. |
| US09171104B2 |
Iterative refinement of cohorts using visual exploration and data analytics
Methods and apparatus are provided for iterative refinement of cohorts using visual exploration and data analytics. A cohort comprised of multiple data objects is defined by obtaining an initial cohort seeding; visualizing the initial cohort using a selected view to present a current cohort; reducing the current cohort using one or more visual filters; visualizing the current cohort using a selected view; expanding the current cohort using one or more selected analytics; and determining whether the current cohort should be further modified using one or more of additional reductions and additional expansions. Cohorts can be passed between views and analytics via drag-and-drop interactions as an analysis unfolds. |
| US09171103B2 |
Concurrent insertion of elements into data structures
A method of adding an element to a data structure may include atomically associating the element with the data structure if the element is not associated with the data structure. The element may be prepared for insertion into a location in the data structure. The method may also include atomically inserting the element into the location in the data structure if another element has not been inserted into the location. |
| US09171102B1 |
Topological sorting of cyclic directed graphs
The disclosed embodiments included a system, apparatus, method, and computer program product for performing a topological sort of a directed graph that comprises a cyclic component or subcomponent. The apparatus comprises a processor configured to execute computer-readable program code embodied on a computer program product. And executing the computer-readable program code comprises identifying a plurality of vertices in a directed graph that depend upon each other in a cyclic manner and removing those vertices and all of the vertices in the same component from a topology object. The topology object then may be utilized to sort the acyclic components and/or subcomponents of the directed graph based the dependencies between the remaining vertices. |
| US09171100B2 |
MTree an XPath multi-axis structure threaded index
An index data structure (“MTree”) useful in creating indices for structured data is provided. The MTree index data structure is designed to meet the needs of the hierarchical XPath query language. The primary feature of MTree is the next subtree root node in document order for all axes are available to each context node in O(1). The MTree index data structure supports modification operations such as insert and delete. The MTree index structure is implemented in memory or in a digital storage medium. Improved performance in the MTree index structure utilizing a threading scheme is also provided. |
| US09171099B2 |
System and method for providing calculation web services for online documents
Embodiments of the present disclosure provide a method and system for providing additional functionality, including web functionality, to one or more online documents. Specifically, embodiments described herein include receiving a selection of a range of data to be used in a web extension and binding the selection of the range of data to the web extension. Once the data is bound, the binding is stored in a remote computing device. In response to the detection of the interaction with the bound range of data, the bound range of data is sent to the remote computing device where the bound range of data is updated based on the interaction. The updated data is then sent to the web extension to enable the web extension to be updated with the newly received data. |
| US09171096B2 |
System and method for harvesting metadata into a service metadata repository
Business Process Execution Language (BPEL) engines and Enterprise Service Buses (ESBs) often connect to adapters to integrate backend packaged applications with a process flow by invoking web services using Java Connector Architecture (JCA) and Simple Object Access Protocol (SOAP) bindings. The Web Service Description Language (WSDL) files for the web services that interact with the adapters can be introspected to harvest adapter integration and transformation information into a service metadata repository. This permits dependency and impact analysis to extend from services to adapters and transformations. |
| US09171089B2 |
Message distribution system and method
A networked computer system passes messages between source devices and destination devices based on source selections made by users of the destination devices. The source selections are based on taking into content contributed by the users. Overlap and duplication of content can be reduced in a datastream to enhance a user experience. |
| US09171088B2 |
Mining for product classification structures for internet-based product searching
A product search engine uses web-crawling software to index textual webpage content from multiple internet sources. The product data obtained from the web-crawling process is then granulized by parsing methods into key words, such as, words and/or phrases. These components are compared with existing key words from search queries or webpage content. Each key word includes component tags, where the component tags map each component to product classification information in the form of structural parameters; and other product information such as, URLs, product images and product descriptions. When at least one matching key word is found, structural parameters are extracted from the matching components and assigned to the received key words. A search results webpage including product information grouped by associated structural parameter may be provided. |
| US09171084B1 |
Sorting information by relevance to individuals with passive data collection and real-time injection
In one aspect, data, such as information articles, is sorted and prioritized based on a plurality of factors, such as user interest and popularity of data with respect to other users. The data is sorted by initial personal (i.e., user) data, sorted by the most relevant to the user, while passive interaction data is used to continually reorder the articles in real-time, while new stories are being injected into the stream in real time, all while other articles are increasing/decreasing in stature based on popularity with regard to other users and time decay. As such, the system provides that the information is fed to users in an efficient manner, in a manner based on time relevance, assumed interest with regard to that given user based on past actions by that user or information otherwise known about that user, as well as interest in the articles demonstrated by other users. |
| US09171079B2 |
Searching sensor data
In particular embodiments, a method includes receiving a query for particular sensor data among multiple sensor data from multiple sensors. The plurality of sensor data has been indexed according to a multi-dimensional array. One or more first ones of the dimensions include time, and one or more second ones of the dimensions include one or more pre-determined sensor-data attributes. The method includes translating the query to correspond to the indexing of the plurality of sensor data. The translated query includes one or more values for one or more of the dimensions of the multi-dimensional array. The method includes communicating the translated query to search among the plurality of sensor data according to its indexing to identify the particular sensor data. |
| US09171078B2 |
Automatic recommendation of vertical search engines
The automatic search engine recommendation technique described herein automatically recommends topic-specific search engines for user queries. In one embodiment, it automatically matches each query submitted to a non-topic specific or general search engine with one or more vertical search engines using a recommendation model and a set of features. For a given query, one embodiment of the technique suggests vertical search engines and topic-specific search results along with the search results from the general search engine. |
| US09171077B2 |
Scaling dynamic authority-based search using materialized subgraphs
According to one embodiment of the present invention, a method for processing a query is provided. The method includes generating a set of pre-computed materialized sub-graphs from a dataset and receiving a search query having one or more search query terms. A particular one of the pre-computed materialized sub-graphs is accessed and a dynamic authority-based keyword search is executed on the particular one of the pre-computed materialized sub-graphs. Nodes in the dataset are then retrieved based on the executing, and a response to the search query is provided which includes the retrieved nodes. |
| US09171075B2 |
Searching recorded video
Embodiments of the disclosure provide for systems and methods for creating metadata associated with a video data. The metadata can include data about objects viewed within a video scene and/or events that occur within the video scene. Some embodiments allow users to search for specific objects and/or events by searching the recorded metadata. In some embodiments, metadata is created by receiving a video frame and developing a background model for the video frame. Foreground object(s) can then be identified in the video frame using the background model. Once these objects are identified they can be classified and/or an event associated with the foreground object may be detected. The event and the classification of the foreground object can then be recorded as metadata. |
| US09171074B2 |
Document sorting system, document sorting method, and document sorting program
It is possible to analyze digitized document information gathered to be provided as evidence in a legal action and to classify the document information to be easily accessible in the legal action. A document classification system includes a keyword database, a related term database, a first classification unit which extracts a document including a keyword recorded in the keyword database from document information and attaches a specific classification mark to the extracted document based on keyword-corresponding information, and a second classification unit which extracts a document including a related term recorded in the related term database from document information, to which the specific classification mark is not attached in the first classification unit, calculates a score based on an evaluated value of the related term included in the extracted document and the number of related terms, and attaches a predetermined classification mark to a document, for which the score exceeds a given value, among the documents including the related term based on the score and the related term-corresponding information. |
| US09171073B1 |
Index mechanism for report generation
Database query analysis technology, in which an input query is received that relates to multiple attribute classes of data records. An index that is descriptive of the data records in data storage is accessed and relative positions in the accessed index for the multiple attribute classes are identified. The accessed index is processed based on more than one of the multiple attribute classes and the identified relative positions, and the processed index is used to identify groups of data records that are included in the data records in the data storage and that share common values for the multiple attribute classes in the input query. Metrics corresponding to the data records included in each of the identified groups of data records are accessed, computations are performed on the accessed metrics, and a report is generated that reflects results of the computations. |
| US09171071B2 |
Meaning extraction system, meaning extraction method, and recording medium
A meaning extraction device includes a clustering unit, an extraction rule generation unit and an extraction rule application unit. The clustering unit acquires feature vectors that transform numerical features representing the features of words having specific meanings and the surrounding words into elements, and clusters the acquired feature vectors into a plurality of clusters on the basis of the degree of similarity between feature vectors. The extraction rule generation unit performs machine learning based on the feature vectors within a cluster for each cluster, and generates extraction rules to extract words having specific meanings. The extraction rule application unit receives feature vectors generated from the words in documents which are subject to meaning extraction, specifies the optimum extraction rules for the feature vectors, and extracts the meanings of the words on the basis of which the feature vectors were generated by applying the specified extraction rules to the feature vectors. |
| US09171069B2 |
Method and apparatus for analyzing a document
Method, apparatus, and computer-readable medium are provided for analyzing a document including text. In one example, a method for identifying patterns in a document is described. The method includes identifying a plurality of candidate phrases in the document based on candidate identification criteria, grouping the candidate phrases of the plurality of candidate phrases with a phrase family based on family criteria and comparison between candidate phrases of the plurality of candidate phrases to obtain consistent phrases, and, for remaining phrases not meeting all of the candidate identification criteria, associating at least one of the remaining phrases with a phrase family based on inconsistent phrase criteria to obtain inconsistent phrases. Identified in this manner, the inconsistent phrase may be displayed via a user interface to permit a user the opportunity to determine whether an inconsistent phrase requires modification. |
| US09171068B2 |
Recommending personally interested contents by text mining, filtering, and interfaces
A personalized content recommendation system includes a client interface device configured to monitor a user's information data stream. A collaborative filter remote from the client interface device generates automated predictions about the interests of the user. A database server stores personal behavioral profiles and user's preferences based on a plurality of monitored past behaviors and an output of the collaborative user personal interest inference engine. A programmed personal content recommendation server filters items in an incoming information stream with the personal behavioral profile and identifies only those items of the incoming information stream that substantially matches the personal behavioral profile. The identified personally relevant content is then recommended to the user following some priority that may consider the similarity between the personal interest matches, the context of the user information consumption behaviors that may be shown by the user's content consumption mode. |
| US09171066B2 |
Distributed natural language understanding and processing using local data sources
An arrangement and corresponding method are described for distributed natural language processing. A set of local data sources is stored on a mobile device. A local natural language understanding (NLU) match module on the mobile device performs natural language processing of a natural language input with respect to the local data sources to determine one or more local interpretation candidates. A local NLU ranking module on the mobile device processes the local interpretation candidates and one or more remote interpretation candidates from a remote NLU server to determine a final output interpretation corresponding to the natural language input. |
| US09171058B2 |
Data analyzing method, apparatus and a method for supporting data analysis
A data analyzing method, apparatus, and a method for supporting data analysis includes creating or storing a semantic entity repository, wherein the semantic entity repository includes a structured entity set of entities and properties thereof, reference ranges describing the possible values of the properties, and the mappings between the entities and properties and a data structure of a data warehouse. When aggregating data, the entities, properties, and/or property values to be analyzed are selected from the semantic entity repository, and how to calculate at least one measure is defined. The data corresponding to the selected entities, properties, and property values are loaded from the data warehouse according to the mappings, and the at least one measure as defined is calculated. |
| US09171056B2 |
System and method for retrieving and normalizing product information
A system and method for retrieving and normalizing product information is described. The system may collect product information from suppliers. The product information may relate to a product that is described differently by two or more of suppliers. The system may further provide a normalized representation of the product. |
| US09171052B2 |
Methods and systems for replicating an expandable storage volume
Machine implemented method and system for generating a disaster recovery copy of an expandable storage volume having a namespace for storing information for accessing data objects stored at a data constituent volume is provided. A transfer operation for transferring a point in time copy of the expandable storage volume from a first location to a second location is generated. Information regarding the expandable storage volume from the first location is retrieved and a destination expandable storage volume is resized to match components of the expandable storage volume at the first location. Thereafter, the point in time copy of the expandable storage volume from the first location to the second location is transferred and configuration information regarding the point in time copy is copied from the first location to the second location; a data structure for storing information regarding the transferred point in time copy of the expandable storage volume is updated. |
| US09171051B2 |
Data definition language (DDL) expression annotation
Techniques are provided for data definition language (DDL) expression annotation. DDL expression text is captured. The DDL expression text corresponds to a DDL change in a source database. A component set is determined. The component set includes at least one component in the DDL expression text. An annotation set is generated. The annotation set includes at least one annotation for at least one component of the component set. Each annotation includes hierarchical data describing at least one hierarchical relationship in the component set. For example, an annotation may include a component ID, a component position, a component length, a component type, and a parent component ID. The annotation set and a change record comprising the DDL expression text are transmitted to a replication client. |
| US09171049B2 |
Offline simulation of online session between client and server
Systems and Methods for conducting an offline session simulating an online session between a client and server in a network environment. The client imports data and functional logic from the server prior to going offline. The imported functional logic is embedded into a format or document that is capable of being interpreted and performed by the local interface at the client that is used to interact with server when online. Whether offline or online, the user utilizes the same local interface at the client to transmit instructions to the functional logic to manipulate the data. In an offline session, such instructions cause the imported and embedded functional logic to execute, thereby manipulating the data imported at the client. Known synchronization methods may also be used to maintain consistency and coherency between the imported data at the client and the database at the server. |
| US09171048B2 |
Goal-based content selection and delivery
Systems and methods for implementing and performing goal-based workflows to assist a human user with achieving a goal or set of goals are described. In one example, a goal-based workflow includes operations for obtaining information from the human user relevant to a goal, performing a psychological and psychological assessment of the human user, selecting and providing goal-based content to the human user, and obtaining and processing a response to the goal-based content from the human user. The operations may be conducted in connection with a subscription or membership to an information service. In further examples, the information service may integrate the content delivery with a social network of “supporter” human users, used to provide encouragement and motivation to the human user for achieving the goal. In other further examples, rewards and adjustments may be provided to the human user based on previous responses to the goal-based content. |
| US09171046B1 |
System and method for generating an output of relevant queries for a database
Relevant queries of a database may be determined by: receiving data from a table in a database and reviewing the data and forming a K=2 graph. A K=2 graph is one which identifies relationships between two items in rows of the table in the database. If two items occur in the a same row in a database, then these two items are considered to have a relationship represented by an arc between each node which represents each data item or point. Each arc may be assigned a weight equal to the number of rows in which the two items appear together. Next, the K=2 graph may be compacted. Subsequently, cliques of up to a predetermined number, like seven nodes from the K=2 graph may be identified. For each clique that is identified, it may be determined if the clique meets a super clique threshold. The resultant super cliques are ranked. |
| US09171044B2 |
Method and system for parallelizing database requests
Methods and systems are described for applying the use of shards within a single memory address space. A database request is processed by providing the request from a client to a processor, the processor then distributing the request to multiple threads within a single process but executing in a shared memory address environment, wherein each thread performs the request on a distinct shard, and aggregating the results of the multiple threads being aggregated and returning a final result to the client. By parallelizing operations in this way, the request response time can be reduced and the total amount of communication overhead can be reduced. |
| US09171039B2 |
Query language based on business object model
Methods and apparatus, including computer program products, are provided for providing a query language based on a model. In one aspect, there is provided a computer-implemented method. The method may include receiving a first query; generating, based on a model including metadata representing a data structure, a second query specific to the data structure stored in a database; and sending the second query to the database. Related apparatus, systems, methods, and articles are also described. |
| US09171037B2 |
Searching for associated events in log data
To retrieve a sequence of associated events in log data, a request expression is parsed to retrieve types of dependencies between events which are searched, and the constraints (e.g., keywords) which characterize each event. Based on the parsing results, query components can be formed, expressing the constraints for individual events and interrelations (e.g., time spans) between events. A resultant span query comprising the query components can then be run against an index of events, which encodes a mutual location of associated events in storage. |
| US09171030B1 |
Exact match lookup in network switch devices
In a method for populating a lookup table, a plurality of hash tables are provided. Each hash table is accessed by a respective hash function. A plurality of hashed values for a key are generated using the hash functions corresponding to the plurality of hash tables. The plurality of hashed values are used to determine whether the key can be inserted into one or more hash tables of the plurality of hash tables without colliding with keys previously stored at respective locations corresponding to the determined hashed values. When it is determined that the key can be inserted into multiple hash tables, it is then determined which one of the multiple hash tables is populated with the greatest number of keys. The hash table that is populated with the greatest number of keys is selected for insertion of the key, and the key is inserted into the selected hash table. |
| US09171029B2 |
Performing batches of selective assignments in a vector friendly manner
Embodiments of the invention relate to processing queries. A query operation to be performed on a table of data is translated into a series of bit level logical operations using expansion and/or saturation operations. A mask is created from the series of bit level logical operations. This mask is then simultaneously applied to multiple rows from the table of data. |
| US09171024B1 |
Method and apparatus for facilitating application recovery using configuration information
A method and apparatus for facilitating application recovery using configuration information is described. In one embodiment, a method for facilitating application recovery using configuration information includes accessing information in memory associated with an application configuration that correlates with source computer hardware for operating an application using at least one processor, identifying at least one portion that is to be restored of the application configuration using the at least one processor and applying the at least one portion of the application configuration in the memory to destination computer hardware using the at least one processor. |
| US09171022B2 |
Method and device for ontology evolution
A method for modifying a mapping from at least one application path of a data system to a conceptual path of an ontology system, wherein the application path addresses a part of the structure of the data system and the conceptual path addresses a part of the structure of the ontology system. The method includes steps of detecting a change to a part of the structure of the ontology system one or more of the conceptual paths is addressing and updating the mappings to reflect the change to the part of the structure of the ontology system. |
| US09171021B2 |
Method and system for configuring storage device in hybrid storage environment
The present invention provides a method and a system for configuring a storage device in a hybrid storage environment. The method includes: acquiring a plurality of attribute parameters of each storage device; performing calculation according to the attribute parameters to obtain a priority of each storage device; acquiring a storage priority of each data object; and performing matching according to the storage priority of each data object and the priority of each storage device, so as to store each data object into a storage device with a priority corresponding to the storage priority of the data object. Accordingly, configuration of a plurality of storage devices and a plurality of data objects in a hybrid storage environment can be implemented, which avoids manual involvement, thereby reducing security risks, improving performance of the system, and reducing energy consumption of the system. |
| US09171019B1 |
Distributed lock service with external lock information database
A system that implements a distributed lock service may include a failure detector for servers and sessions, and may track the state of sessions on a per-client-connection basis. It may include an external lock information database that stores lock state information and that supports a higher write throughput rate than a distributed state manager. Each database record may store an identifier of a session during which a lock on a respective item was obtained (if any) and a staleness indicator. A distributed state manager may maintain a session identifier and a respective staleness indicator for each established session, and may push updates to this session information to interested client processes, which may cache the information. A client process wishing to lock an item may determine whether it can do so dependent on the information in a corresponding database record and on its own cached session information. |
| US09171018B2 |
System and method for associating images with semantic entities
A system and computer-implemented method for associating images with semantic entities and providing search results using the semantic entities. An image database contains one or more source images associated with one or more images labels. A computer may generate one or more documents containing the labels associated with each image. Analysis may be performed on the one or more documents to associate the source images with semantic entities. The semantic entities may be used to provide search results. In response to receiving a target image as a search query, the target image may be compared with the source images to identify similar images. The semantic entities associated with the similar images may be used to determine a semantic entity for the target image. The semantic entity for the target image may be used to provide search results in response to the search initiated by the target image. |
| US09171017B2 |
Sharing television and video programming through social networking
In particular embodiments, one or more computer systems of a social-networking system determine information associated with a product displayed on a display device and access a database of known products. The one or more computer systems of the social-networking system determine, by comparing the database of known products with the determined information associated with the product, an identity of the product displayed on the display device. The one or more computer systems of the social-networking system provide one or more instructions to display media content related to the identified product. |
| US09171015B2 |
Sharing asserted media
Concepts and technologies are disclosed herein for sharing asserted media. An assertion application can be executed by a device to generate asserted media. The assertion application can receive a request or other input for specifying information to be included in the asserted media. The assertion application also can be executed to obtain media captured with a media capture device and to obtain the information to be included in the asserted media. The assertion application also can associate the information with the media content to generate the asserted media and share the asserted media with one or more recipients. An assertion service remote from the user device can be configured to generate the asserted media and/or to share the asserted media with the recipients. |
| US09171014B2 |
Information processing device, information processing method, program, and information processing system
There is provided an information processing device including an event cluster creation unit configured to create an event cluster including, among a plurality of types of content, reference content serving as a reference and related content, the related content having a different type from the reference content and indicating the same event as the reference content, and a meta information appending unit configured to create meta information about the event on the basis of the event cluster and append the meta information to the event cluster. |
| US09171013B2 |
System and method for providing objectified image renderings using recognition information from images
An embodiment provides for enabling retrieval of a collection of captured images that form at least a portion of a library of images. For each image in the collection, a captured image may be analyzed to recognize information from image data contained in the captured image, and an index may be generated, where the index data is based on the recognized information. Using the index, functionality such as search and retrieval is enabled. Various recognition techniques, including those that use the face, clothing, apparel, and combinations of characteristics may be utilized. Recognition may be performed on, among other things, persons and text carried on objects. |
| US09171009B1 |
Cluster file system comprising storage server units each having a scale-out network attached storage cluster
A cluster file system comprises storage server units each configured for communication with a plurality of clients over a network. At least one of the storage server units comprises an object storage server, an object storage target associated with the object storage server, a metadata server, a metadata target associated with the metadata server, and a scale-out network attached storage cluster. The scale-out network attached storage cluster comprises storage directories corresponding to respective ones of the object storage and metadata targets. The object storage server and its associated object storage target may form part of a first storage tier of the storage server unit, and a plurality of nodes of the scale-out network attached storage cluster may form part of a second storage tier of the storage server unit. Parallel log-structured file system (PLFS) middleware may be used to control movement of data between the first and second storage tiers. |
| US09171006B2 |
Mobile station with expanded storage space and method of retrieving files by the mobile station
Disclosed is a mobile station having an expanded storage space, and a method of retrieving a file stored in a remote storage server. The method may include determining whether the file is locally stored or remotely stored, deleting files in a local storage to provide space if the file is determined to reside in a remote storage server, downloading the file from a remote storage server over the Internet by prefetching a portion of the file from the remote storage server, and opening the prefetched portion of the file while concurrently downloading a remaining portion of the file from the remote storage server. |
| US09171005B2 |
System and method for selective file erasure using metadata modifcations
A process that ensures the virtual destruction of data files a user wishes to erase from a storage medium, such as a hard drive, flash drive, or removable disk. This approach is appropriate for managing custom distributions from a large file sets as it is roughly linear in compute complexity to the number of files erased but is capped when many files are batch erased. |
| US09171004B2 |
System and method to respond to a data file deletion instruction
Systems and methods responsive to a data file deletion instruction are disclosed. A method includes receiving an instruction to delete a data file. The data file is stored at a plurality of persistent memory cells of a memory. The memory also stores a directory that includes a first entry corresponding to the data file. In response to receiving the instruction to delete the data file, multiple attribute bits of the first entry are programmed and also a first bit of the first entry is programmed. The first bit of the first entry is distinct from the multiple attribute bits. Programming the multiple attribute bits converts the first entry from a first entry type to a second entry type. Programming the first bit of the first entry indicates that the first entry has an unused status. |
| US09171002B1 |
File based incremental block backup from user mode
A system for incremental backup comprises a storage device and a processor. The processor is configured to: 1) start fileIO ETW tracking, wherein a file changed block info is tracked in map(s), wherein each of the map(s) tracks writes indicated via a node of a set of nodes; 2) receive request for an incremental backup of one or more files of one or more volumes, wherein the map(s) track changed blocks from writes to the one or more files; 3) halt writes to the one or more files and queue writes to the one or more files after halting; 4) freeze the map(s) of changed blocks; 5) change file IO ETW tracking, wherein the change block info is tracked to a new set of maps; 6) determine changed blocks using the map(s); 7) write changed blocks to a backup volume; and 8) release writes to the one or more files. |
| US09171001B2 |
Personalized playlist arrangement and stream selection
Method for determining a sequence of audio pieces, comprising receiving a set of audio pieces, and determining the sequence of audio pieces by arranging audio pieces from the set in an order; wherein a position of a respective audio piece within the order is determined based on a user's personal profile, the user's personal profile includes rules descriptive of the user's preferences, the rules relating to attributes including meta data attributes and/or acoustic parameters of audio pieces, and wherein the position of the respective audio piece is determined depending on one of the attributes of the respective audio piece according to one of the rules. |
| US09171000B2 |
Method and system for mapping short term ranking optimization objective to long term engagement
Method, system, and programs for identifying a target metric. In one example, at least one first type of metric computed based on a first period associated with a first length of time is measured for each of a plurality of users. At least one second type of metric computed based on a second period associated with a second length of time is measured for each of the plurality of users. The second length of time is larger than the first length of time. Correlations between each of the at least one first type of metric and each of the at least one second type of metrics are computed with respect to the plurality of users. A target metric is identified from the at least one first type of metric based on the correlations. The target metric is correlated with the at least one second type of metric. |
| US09170995B1 |
Identifying context of content items
Methods, systems, and apparatus, including computer program products, may be used for identifying context. Web attributes associated with a first instance of a content item displayed on a first web page may be identified along with a second web page displaying a second instance of the content item. Context information may be determined using the web attributes, and the context information may be associated with the second web page. |
| US09170994B2 |
Machine translation apparatus, method and computer readable medium
According to one embodiment, a machine translation apparatus includes a speech recognition unit, a translation unit, a detection unit and an addition unit. The speech recognition unit performs speech recognition of speech. The translation unit translates the plurality of source language strings into target language strings in a chronological order. The detection unit detects ambiguity in interpretation of the speech corresponding to a first target language string of the target language strings. The addition unit adds, an additional phrase being one of words and phrases to interpret uniquely a modification relationship, to the first target language string if ambiguity is detected. |
| US09170986B2 |
Power quality meter and method of waveform anaylsis and compression
A method for waveform analysis and compression includes determining harmonic components of a waveform, subtracting the harmonic components from the waveform, leaving a residual waveform, and compressing the residual waveform. Information about the harmonic components and the compressed residual transform can be transmitted across a network for analysis or reconstruction of the waveform in another device. The method is used in a low cost power quality meter, which can form part of a smart metering scheme. |
| US09170983B2 |
Digital audio synthesizer
A digital audio synthesizer is provided that includes the following: an input memory, a computer, a combiner, and an adder. The combiner is set up to calculate an auxiliary digital data set by taking an active set of estimated digital data divided by a window function on each time window. The adder is set up to add the active set of estimated digital data multiplied by the window function having the preceding value from an accumulated total. The digital audio synthesizer also includes an extrapolator that is set up to calculate the draft digital data set for an active window from the auxiliary digital data set for the preceding window, and the auxiliary digital data set is selectively multiplied by the square of the window function. |
| US09170981B2 |
Adaptive isochronous USB audio to RF communication device
A method of and a system for synchronizing isochronous audio data frames provided by a USB interface to a clock of a wireless RF communication device is provided. The USB interface and the wireless RF communication device are connected via an I2S link, the method comprising receiving the isochronous audio data frames and the wireless RF communication device clock in a streaming controller, phase locking the isochronous audio data frames to a USB interface clock, counting start-of-frame pulses of the phase locked isochronous audio data frames, comparing the counted start-of-frame pulses with the wireless RF communication device clock to determine a difference signal, the difference signal triggering a synchronization event code when a threshold difference has been reached, rate matching the isochronous audio data frames to the wireless RF communication device clock upon receiving the synchronization event code. |
| US09170979B2 |
Converging interconnect node controlling operation related to associated future item in dependence upon data predicted based on current transaction data item passing through
An integrated circuit includes one or more transaction data sources and one or more transaction data destinations connected via interconnect circuitry comprising a plurality of interconnect nodes. Within the interconnect nodes there are one or more converging interconnect nodes. A converging interconnect node includes prediction data generation circuitry for reading characteristics of a current item of transaction data from the converging interconnect node and generating associated prediction data for a future item of transaction data which will be returned to the converging interconnect node at a predetermined time in the future. This prediction data is stored within prediction data storage circuitry and is read by prediction data evaluation circuitry to control processing of a future item of transaction data corresponding to that prediction data when it is returned to the converging interconnect node. The interconnect circuitry may have a branching network topology or recirculating ring based topology. |
| US09170978B2 |
Data center activation and configuration
A device is configured to receive, from a source device, activation information associated with a set of server devices, to cause a first server device, of the set of server devices, to be activated based on the activation information. The device is configured to receive, from the source device, configuration information associated with the set of server devices. The device is configured to activate and configure at least one other server device, of the set of server devices, based on the activation information and the configuration information. |
| US09170977B2 |
Method and system for managing server information data based on position information of a server baseboard
Systems and methods are provided for managing server information data An information data management system obtains position information of each server baseboard from a controller storing the position information of the server baseboard, and establishes a corresponding relationship between the position information and an information data index of a rack server. The position information comprises slot information and rack information of the server baseboard. An information data configuring system obtains the position information, the information data index and the corresponding relationship between the position information and the information data index from the information data management system. |
| US09170974B2 |
Methods and systems for interconnecting host and expansion devices within system-in-package (SiP) solutions
Methods and systems are disclosed for interconnecting die-to-die-port (DTDP) host devices and DTDP expansion devices for combined system-in-package (SiP) solutions. Interconnect circuitry having a plurality of ports is configured to provide communication from the host device to the expansion device so that the expansion device appears to be resident on the host device. Further, direct circuit interconnection blocks (e.g., using copper pillar (CuP) connectors) can be used to improve connectivity and performance. In addition, level shift circuitry can be utilized within expansion devices to allow for standardized interconnect signals and supply voltages to be provided by DTDP host devices to DTDP expansion devices. |
| US09170972B2 |
Data transmitting device having serial advanced technology attachment device expansion function and serial advanced technology attachment module thereof
A serial advanced technology attachment (SATA) module includes a number of circuit boards and a number of SATA devices. Each of the circuit boards includes an expansion microchip. The expansion microchip includes an input terminal, an output terminal and an expansion terminal. The expansion microchips are electrically connected in series with the input terminal of one expansion microchip connecting to the expansion terminal of another expansion microchip. The input terminal of a front expansion terminal positioned at a first end of the expansion microchips is configured to connect to a SATA controller. Each of the SATA devices is electrically connected to the output terminal of one expansion microchip and configured to transmit data with the SATA controller by the corresponding expansion microchip. |
| US09170971B2 |
Fabric discovery for a cluster of nodes
Implementations of discovery functionalities in accordance with the present invention are characterized by being exceptionally minimalistic. A primary reason and benefit for such minimalistic implementations relate to these discovery functionalities being implemented via a management processor and associated resources of a system on a chip (SoC) unit as opposed to them being implemented on data processing components of a cluster of nodes (i.e., central processing core components). By focusing on such a minimalist implementation, embodiments of the present invention allow discovery functionalities to be implemented on a relatively low-cost low-power management processor coupled to processing cores that provide for data serving functionality in the cluster of nodes. |
| US09170970B2 |
Detector to search for control data
Implementations related to detecting control data are presented herein. A detector searches for control data in a first set of pre-determined control data, wherein a respective subset of the first set is assigned to a respective logical port and the respective subset is excluded from the first set when searching for the control data received from the respective logical port. |
| US09170968B2 |
Device, system and method of multi-channel processing
Some demonstrative embodiments include devices, systems and methods of multi-channel processing. For example, a multi-channel data processor may process data of a plurality of channels, the multi-channel data processor is to switch from processing a first channel to processing a second channel of the plurality of channels by performing a context switch during a single clock cycle, the context switch including storing first state context corresponding to a processing state of the first channel and loading previously stored second state context corresponding to a processing state of the second channel. |
| US09170966B2 |
System method for deterministic message processing a direct memory access (DMA) adapter with head pointers and tail pointers for determining the in and out sequence of packets
Deterministic message processing in a direct memory access (DMA) adapter includes the DMA adapter incrementing from a sub-head pointer, a sub-tail pointer until encountering an out-of-sequence packet. The DMA adapter also consumes packets between the sub-head pointer and the sub-tail pointer including incrementing with the consumption of each packet, the sub-head pointer until determining that the sub-head pointer is equal to the sub-tail pointer. In response to determining that the sub-head pointer is equal to the sub-tail pointer, the DMA adapter determines whether the head pointer is pointing to the next in-sequence packet. If the head pointer is pointing to the next in-sequence packet, the DMA adapter resets the sub-head pointer and the sub-tail pointer to the head pointer. If the head pointer is not pointing to the next in-sequence packet, the DMA adapter resets the sub-head pointer and the sub-tail pointer to the next in-sequence packet. |
| US09170964B2 |
USB device interrupt signal
A method and system for sending an interrupt signal is described herein. The method may include detecting sensor data in a sensor controller and detecting a powered down port between the sensor controller and an operating system. The method may also include sending the interrupt signal from the sensor controller to the operating system. In addition, the method may include detecting the operating system has provided power to the powered down port. Furthermore, the method may include sending the sensor data from the sensor controller to the operating system. |
| US09170961B2 |
Location of computing assets within an organization
Mechanisms are provided for determining the location of computing assets within an organization. These mechanisms determine first location information identifying a location of at least one first physical asset housing in a predetermined physical area of the organization relative to a predetermined coordinate system, and second location information identifying a location of at least one second physical asset housing within the at least one first asset housing. The mechanisms automatically determine third location information identifying a location of at least one computing asset within the at least one second physical asset housing. In addition, the mechanisms generate an asset location map data structure for the organization based on the first, second and third location information. The mechanisms also perform at least one management operation for managing resources of the organization, based on the asset location map data structure for the organization. |
| US09170956B2 |
System and method for virtual hardware memory protection
A memory protection unit including hardware logic. The hardware logic receives a transaction from a virtual central processing unit (CPU) directed at a bus slave, the transaction being associated with a virtual CPU identification (ID), wherein the virtual CPU is implemented on a physical CPU. The hardware logic also determines whether to grant or deny access to the bus slave based on the virtual CPU ID. The virtual CPU ID is different than an ID of the physical CPU on which the virtual CPU is implemented. |
| US09170955B2 |
Providing extended cache replacement state information
In an embodiment, a processor includes a decode logic to receive and decode a first memory access instruction to store data in a cache memory with a replacement state indicator of a first level, and to send the decoded first memory access instruction to a control logic. In turn, the control logic is to store the data in a first way of a first set of the cache memory and to store the replacement state indicator of the first level in a metadata field of the first way responsive to the decoded first memory access instruction. Other embodiments are described and claimed. |
| US09170954B2 |
Translation management instructions for updating address translation data structures in remote processing nodes
Translation management instructions are used in a multi-node data processing system to facilitate remote management of address translation data structures distributed throughout such a system. Thus, in multi-node data processing systems where multiple processing nodes collectively handle a workload, the address translation data structures for such nodes may be collectively managed to minimize translation misses and the performance penalties typically associated therewith. |
| US09170953B2 |
System and method for storing data in clusters located remotely from each other
A system for storing data includes a plurality of clusters located remotely from each other in which the data is stored. Each cluster has a token server that controls access to the data with only one token server responsible for any piece of data. Each cluster has a plurality of Cache appliances. Each cluster has at least one backend file server in which the data is stored. The system includes a communication network through which the servers and appliances communicate with each other. A Cache Appliance cluster in which data is stored in back-end servers within each of a plurality of clusters located remotely from each other. A method for storing data. |
| US09170950B2 |
Method, apparatus and computer programs providing cluster-wide page management
An exemplary method in accordance with embodiments of this invention includes, at a virtual machine that forms a part of a cluster of virtual machines, computing a key for an instance of a memory page that is to be swapped out to a shared memory cache that is accessible by all virtual machines of the cluster of virtual machines; determining if the computed key is already present in a global hash map that is accessible by all virtual machines of the cluster of virtual machines; and only if it is determined that the computed key is not already present in the global hash map, storing the computed key in the global hash map and the instance of the memory page in the shared memory cache. |
| US09170949B2 |
Simplified controller with partial coherency
A simplified coherency controller supports multiple exclusively active fully coherent agent interfaces and any number of active I/O (partially) coherent agent interfaces. A state controller determines which fully coherent agent is active. Multiple fully coherent agents can be simultaneously active during a short period of a transition of processing from one to another processor. Multiple fully coherent agents can be simultaneously active, though without a mutually consistent view of memory, which is practical in cases such as when running multiple operating systems on different processors. |
| US09170947B2 |
Recovering from data errors using implicit redundancy
Some implementations disclosed herein provide techniques and arrangements for recovery of data stored in memory shared by a number of processors through information stored in a cache directory. A core of a processor may initiate access (e.g., read or write) to particular data located in a first cache that is accessible to the core. In response to detecting an error associated with accessing the particular data, a location in the processor that includes the particular data may be identified and the particular data may be copied from the location to the first cache. |
| US09170945B2 |
Communication management apparatus, communication management method, and computer program product
According to an embodiment, a communication management apparatus mediates data between an information processing terminal having a temporary memory and an external memory device that is installed outside the information processing terminal. The apparatus includes a receiving unit configured to receive a write request issued by a device other than the information processing terminal for writing the data in the external memory device; a reading-writing unit configured to control reading of the data from the external memory device and control writing of the data in the external memory device; and a delete command issuing unit configured to, when the write request with respect to the external memory device is received, issue a delete command to the information processing terminal for deleting temporary data that is stored in the temporary memory. |
| US09170944B2 |
Two handed insertion and deletion algorithm for circular buffer
Exemplary embodiments of the present invention disclose a method and system for selecting an eviction location of an item to evict and an insertion location for a new item in a circular buffer. In a step, an exemplary embodiment specifies an insertion location with an insertion pointer. In another step, an exemplary embodiment increments an access count of a first item. In another step, an exemplary embodiment moves an eviction pointer clockwise when specifying an insertion location for the new item and the circular buffer is in eviction mode. In another step, an exemplary embodiment decrements an access count of a second item. In another step, an exemplary embodiment moves the insertion pointer to maintain a constant clockwise distance to the eviction location. In another step, an exemplary embodiment evicts the second item with an access count of zero and inserts the new item counterclockwise to the insertion location. |
| US09170941B2 |
Data hardening in a storage system
A storage system, and a method of data hardening in the storage system, including: a de-glitch module configured for a detection of a power failure event; a write page module, coupled to the de-glitch module, the write page module configured for an execution of a cache write command based on the power failure event to send a cache page from a cache memory to a storage channel controller, wherein the cache memory is a volatile memory; and a signal empty module, coupled to the write page module, the signal empty module configured for a generation of a sleep signal to shut down a host bus adapter, wherein the host bus adapter interfaces with the storage channel controller to write the cache page back to the cache memory upon a power up of the host bus adapter and the storage channel controller. |
| US09170939B1 |
Early de-allocation of write buffer in an SSD
A data storage system includes: non-volatile solid state memory including non-volatile storage units and a temporary register; a data storage controller configured to receive a write command including a plurality of logical segments of data from a host; a write buffer allocated to receive a portion of the plurality of logical segments of data and accumulate a physical segment of data corresponding to a write unit of the solid state memory; a solid state memory controller configured to transmit the accumulated data from the write buffer to the temporary storage register each time the write buffer accumulates a physical segment of data. The data storage controller acknowledges completion of the write command to the host after the last logical segment of data is written to the write buffer; and deallocates the write buffer after the solid state memory completes reception of the accumulated data into the temporary storage register. |
| US09170938B1 |
Method and system for atomically writing scattered information in a solid state storage device
Disclosed herein are several methods and systems for handling atomic write commands that reach scattered address ranges. One embodiment includes a method of performing an operation in a data storage device, the method comprising: receiving an atomic write command; obtaining a plurality of ranges of logical addresses affected by the atomic write command; for each of the plurality of affected ranges, assigning metadata information to track completion of a write operation performed at that range; performing the write operations in the ranges of logical addresses; updating the metadata information upon completion of the write operations in the ranges; and deferring an update to a translation map of the data storage device until the metadata information has been updated. |
| US09170937B2 |
Data storage device and operating method for flash memory
A data storage device and an operating method for a FLASH memory are disclosed. The disclosed data storage device includes a FLASH memory and a controller. The FLASH memory provides a storage space which is stored with a first storage type system information and a second storage type system information. Data recognition for the first storage type system information is stricter than that of the second storage type information. The controller reads the storage space of the FLASH memory and performs an error checking and correction process on data read from the storage space, and, based on the storage type system information, among the first and second storage type information, which first passes the error checking and correction process, the controller operates the FLASH memory. |
| US09170933B2 |
Wear-level of cells/pages/sub-pages/blocks of a memory
A method for wear-leveling cells, pages, sub-pages or blocks of a memory such as a flash memory includes receiving (S10) a chunk of data to be written on the cell, page, sub-page or block of the memory; counting (S40), in the received chunk of data, a number of times a given type of binary data ‘0’ or ‘1’ is to be written; and distributing (S50) the writing of the received chunk of data among cells, pages, sub-pages or blocks of the memory such as to wear-level the memory with respect to the number of the given type of binary data ‘0’ or ‘1’ counted in the chunk of data to be written. |
| US09170926B1 |
Generating a configuration test based on configuration tests of other organizations
System, method, and non-transitory medium for selecting a test scenario template useful for testing a configuration change involves execution of the following: identifying runs of test scenarios run by users belonging to different organizations implementing configuration changes on software systems; identifying first connections between configuration changes and the runs; clustering the runs into clusters of similar runs; identifying, from the first connections and the clustering, second connections between configuration changes and the clusters; receiving a certain configuration change of a certain user; identifying a certain cluster of similar runs which correspond to the certain configuration change by comparing the certain configuration change with configuration changes that take part in the second connections; generating test scenario templates based on runs belonging to the certain cluster; and selecting, based on number of different organizations associated with the templates, a representative test scenario template to represent the certain cluster. |
| US09170922B1 |
Remote application debugging
Techniques are described for debugging an application executing on a remote host device. A daemon executing on the host device is instructed, from a server device, to install an application to be debugged and to launch a remote debug module on the host device. A communication session is established between the remote debug module and a local debug module executing on the server device. Debug commands received at the local debug module are communicated to the remote debug module and employed during the debugging of the application. Debug output from the debugging session may be provided to the server device via a mount point into shared memory on the host device. |
| US09170919B2 |
Apparatus and method for detecting location of source code error in mixed-mode program
An apparatus for detecting a source code error location in a mixed-mode program is disclosed. The apparatus may include a compiler, a mapping table generator, a simulator, a comparison data generator and an error location detector. The apparatus extracts low-level data while simulating a verification program and while simulating a reference program. The low-level data is mapped to mapping tables for a verification program and a reference program, and by comparing the tables it is determined if there is an error in the mixed-mode program and if so, where. |
| US09170915B1 |
Replay to reconstruct program state
The state of a workflow application in a distributed computing environment can be reconstructed by replaying previously executed portions of the workflow application. Embodiments maintain non-serialized event data relating to workflow history and use the data to determine subsequent actions to take in order to advance the workflow. In some embodiments, workflow instances can be serialized in order to create a checkpoint. |
| US09170913B2 |
Method and apparatus for 3-D acceleromter based slope determination, real-time vehicle mass determination, and vehicle efficiency analysis
Three dimensional accelerometer data is used to determine a slope the vehicle is traveling over at a specific point in time. The slope data can then be combined with other metrics to provide an accurate, slope corrected vehicle mass. The vehicle mass can then be used along with other vehicle data to determine an amount of work performed by a vehicle, enabling a detailed efficiency analysis of the vehicle to be performed. To calculate slope, horizontal ground speed (VHGS) can be calculated using the Pythagorean Theorem. One can take the Z/Up magnitude and divide it by the horizontal ground speed. Replacing z, x and y with directional vectors enables one to calculate slope. The slope data is then used to determine the mass of the vehicle at that time. Previous techniques to calculate mass did not factor in slope, and thus are not accurate. |
| US09170910B2 |
Complex event processing system and method
A complex event processing system comprises a complex event processing engine (52) and an event harvesting system, wherein the event harvesting system is operable to monitor a computer network (10, 21, 22, 31, 32, 33), generate simple event reports in response to the result of monitoring the network and pass these to the complex event processing engine for processing. The event harvesting system comprises a central configuration control module (51, 53) and a plurality of capture node modules (41, 42) each of which is operatively connected to the central configuration control module. Each capture node module is operable to receive configuration instructions from the central configuration control module to determine what simple event reports are to be generated by the module and in response to what conditions detected on the monitored computer network. The central configuration control module includes an interface (51) in the form of a web server for receiving configuration instructions from a user of the system and for processing these configuration instructions and sending them to a specified capture node module for causing the module to operate in accordance with the specified configuration instructions. |
| US09170909B2 |
Automatic parallel performance profiling systems and methods
An automatic profiling system and method determines an algorithm profile including performance predictability and pricing of a parallel processing algorithm. |
| US09170906B2 |
Base protocol layer testing device
Embodiments relate to testing of a computing system using a base protocol layer testing device. An aspect includes, based on determining, by the base protocol layer testing device, that a current test comprises a test of a base protocol layer of the computing system, enabling a low level test assist device of the base protocol layer testing device for the current test, wherein the low level test assist device comprises a hardware device that is directly attached to an input/output (I/O) card of the computing system. Another aspect includes storing base protocol layer traffic that passes through the I/O card by the low level test assist device during performance of the current test by the base protocol layer testing device. Yet another aspect includes analyzing the stored base protocol layer traffic after completion of the current test to determine a result of the current test. |
| US09170905B2 |
Base protocol layer testing device
Embodiments relate to testing of a computing system using a base protocol layer testing device. An aspect includes, based on determining, by the base protocol layer testing device, that a current test comprises a test of a base protocol layer of the computing system, enabling a low level test assist device of the base protocol layer testing device for the current test, wherein the low level test assist device comprises a hardware device that is directly attached to an input/output (I/O) card of the computing system. Another aspect includes storing base protocol layer traffic that passes through the I/O card by the low level test assist device during performance of the current test by the base protocol layer testing device. Yet another aspect includes analyzing the stored base protocol layer traffic after completion of the current test to determine a result of the current test. |
| US09170904B1 |
I/O fault injection using simulated computing environments
A system for injecting I/O faults into a closed system, for example, the injection of link level I/O faults, involves the use of a simulated computing environment. In an embodiment, the system provides for fault injection using an emulated IBM System z environment and including the use of FICON and/or other suitable communication channel protocols. The emulated System z environment may include a simulated z/OS and/or emulated System z hardware and software components. |
| US09170902B2 |
Adaptive device-initiated polling
A method includes periodically sending a polling call to an enterprise system outside the firewall at a first polling rate during normal operating conditions, monitoring for a fault condition, periodically sending polling calls to the device outside the firewall at a second polling rate when a fault condition is detected, the second polling rate being higher than the first polling rate. The second polling rate is used as result of a fault condition. The method also includes sending a problem report with the polling calls when the fault condition is detected. |
| US09170896B2 |
Information processing apparatus and control method for information processing apparatus
An information processing apparatus includes a switch unit configured to connect some of the arithmetic processing devices and some of the storage devices in accordance with connection information, a first control unit being configured to output physical information converted from the logical information of the arithmetic processing device at the transmission destination and the physical information of the corresponding arithmetic processing device via a transfer path in accordance with the correlation information, a second control unit configured to change the connection information in response to occurrence of a failure of some arithmetic processing device in the system, and to control the switch unit such that the failed arithmetic processing device is replaced with another one included in the plural arithmetic processing devices. |
| US09170894B2 |
Memory error detection
Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation. |
| US09170893B2 |
Method and system for selecting region of a nonvolatile memory
Disclosed herein is a storage controlling apparatus, including: a status acquisition section configured to acquire status including a number of times of execution of verification after writing into a memory from the memory; a history information retention section configured to retain a history of the status as history information in an associated relationship with each of predetermined regions of the memory; and a region selection section configured to select a region which satisfies a condition in accordance with the history information when a new region is to be used in the memory. |