最新美国发明专利第2015-10-27期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09173049B2	Method, apparatus, and system for data transmission The present invention provides a method, an apparatus and a system for data transmission. The method includes: receiving processed first microwave data information that is received through a microwave antenna; performing multiplexing through a preset rule on the first microwave data information and processed first radio frequency data information that is received through a base station antenna, and sending multiplexed information to a baseband unit, so that the baseband unit sends the first microwave data information to a microwave indoor unit. In the method, the apparatus and the system for data transmission, microwave data information and radio frequency data information are multiplexed, and then multiplexed information is transmitted together. The microwave data information can be transmitted through a transmission medium between base station devices, such as a fiber, thereby saving connection cables between microwave transmission devices and reducing a device cost and an installation cost of the microwave transmission devices.
US09173044B2	Method and system for delivering announcements in a cabin A method for delivering announcements via a cabin communication facility comprising at least one cabin loudspeaker and via an on-board entertainment system comprising at least one headset output comprises the steps of delivering an announcement via the at least one cabin loudspeaker, beginning at a first instant, and delivering the announcement via the at least one headset output, beginning at a second instant, which differs from the first instant, the delivering of the announcement via the at least one cabin loudspeaker and the delivering of the announcement via the at least one headset output being initiated at differing instants.
US09173042B2	Bone anchor fixture for a medical prosthesis A screw-shaped anchoring fixture for anchoring a prosthesis in the skull bone. The anchoring fixture comprises a main body configured to be implanted into the bone and a flange configured to function as a stop to prevent the main body from completely penetrating through the bone. The main body comprises a distal tapered apical portion, a first portion, and a second portion. The inner diameter of the second portion is greater than the inner diameter of the first portion. The method for inserting the anchoring fixture includes providing the anchoring fixture, drilling a hole, and inserting the anchoring fixture into the hole until the flange contacts the skull bone, wherein the hole has a diameter that is greater than the inner diameter of the first portion and less than the outer diameter of the second portion.
US09173040B2	Miniaturized variable reluctance transducer The present invention comprises a new topology of a balanced variable reluctance transducer where magnets are moved to a lateral position relative to the dynamic flux circuit. This makes the whole transducerFIG.considerably smaller and the air gaps become fully visible from the outside.
US09173035B2	Dual coil moving magnet transducer Embodiments are disclosed for driving an electromagnetic transducer via a drive unit comprising stationary coils and a moving magnet. In some embodiments, an electromagnetic transducer comprises a diaphragm configured to generate acoustic vibrations, a moving magnet affixed to the diaphragm, and a pair of fixed coils surrounding the moving magnet, the fixed coils configured to direct electrical current in opposite directions.
US09173030B2	Speaker system and speaker driving method A speaker system includes: a display panel having a display screen; a structure having a plate part functioning as an acoustic diaphragm located outside of a perimeter of the display screen and being supported by the display panel; and an actuator attached to the structure so that a displacement direction of the actuator may be a direction of a plate surface of the plate part.
US09173025B2	Combined suppression of noise, echo, and out-of-location signals A system, a method, logic embodied in a computer-readable medium, and a computer-readable medium comprising instructions that when executed carry out a method. The method processes: (a) a plurality of input signals, e.g., signals from a plurality of spatially separated microphones; and, for echo suppression, (b) one or more reference signals, e.g., signals from or to be rendered by one or more loudspeakers and that can cause echoes. The method processes the input signals and one or more reference signals to carry out in an integrated manner simultaneous noise suppression and out-of-location signal suppression, and in some versions, echo suppression.
US09173024B2	Noise mitigating microphone system A microphone system has a package with a top, a bottom, and four sides that at least in part form an interior chamber. One of the sides forms an inlet aperture for communicating the inlet chamber with the exterior environment. The system also has first and second microphone dies, in a stacked relationship, respectively having a first and second diaphragms. A circuit die, positioned in electrical communication with the first and second microphone dies, is configured to mitigate vibrational noise from the first microphone die using a signal produced by the second microphone die or vice versa. The first and second microphone dies are positioned so that the first and second diaphragms are substantially the same distance from the inlet aperture in the side.
US09173017B2	Circumaural earphone and decorating strap thereof A circumaural earphone and a decorating strap thereof are provided. The circumaural earphone includes two earphone cups, a main strap, a decorating strap, a photosensitive switch, a power supplier and a light emitter. Two ends of the main strap are connected with the two earphone cups. Two ends of the decorating strap are detachably connected with the two earphone cups or the main strap. The photosensitive switch is disposed in one of the two earphone cups, the main strap or the decorating strap. The power supplier is disposed in one of the two earphone cups, the main strap or the decorating strap. The light emitter is disposed in the decorating strap and electrically connected with the power supplier through the photosensitive switch.
US09173015B2	Microphone module with sound pipe A microphone module has a substrate with an aperture to allow sound waves to pass through the substrate, a lid mounted to the substrate to define a first interior volume, a microphone mounted to the substrate within the first interior volume, and a housing coupled to the substrate and covering the aperture. The housing forms a second interior volume and includes an acoustic port configured to allow sound to enter the second interior volume. The module further includes a pipe extending from the acoustic port in the housing, and at least one exterior interface pad outside of the second interior volume. The pipe has an open end to receive sound waves and direct them toward the acoustic port in the housing. Moreover, the at least one exterior interface pad electrically couples to the microphone.
US09173009B2	Computer-implemented system and method for notifying users upon the occurrence of an event A computer-implemented system and method for notifying users on the occurrence of an event is disclosed. An embodiment further includes notifying selected users upon the occurrence of particular events in sessions using a variety of notification methods.
US09173001B1	Media content access systems and methods In one of many possible embodiments, a system includes a media content processing subsystem configured to process a flagging request, which designates a scene within the media content instance as a flagged scene. The processing subsystem is further configured to generate an actionable data module containing additional content corresponding to the flagged scene.
US09172993B2	Broadband local area network A BCN network with BCN modems that enable network wired devices to communicate over a typical home coaxial network that may include passive splitters and different types of coaxial cable.
US09172985B2	Video playback system allowing multiple mobile communication devices to control the same video decoder and related computer program products A video playback system includes a content provider server for providing video signals of a first and a second video; a video decoder; a display for displaying video content outputted from the video decoder; a playback control server for controlling the video decoder; a first mobile communication device for transmitting a first selection message to the playback control server via internet at a first time point; and a second mobile communication device for transmitting a second selection message to the playback control server via internet at a second time point. The playback control server utilizes the video decoder to receive video signals of the first video according to the first selection message, and utilizes the video decoder to receive video signals of the second video according to the second selection message after the second time point.
US09172982B1	Audio selection from a multi-video environment A method and system for audio selection is disclosed. Multiple active videos are rendered in a single video stream and the multiple active videos are simultaneously displayed on a client machine. A user selects a video from among the multiple active videos for which associated audio is presented. As the user selects different videos the previous audio is stopped and the new audio is played. The new audio is synchronized to the selected video.
US09172979B2	Experience or “sentio” codecs, and methods and systems for improving QoE and encoding based on QoE experiences Certain embodiments teach a variety of experience or “sentio” codecs, and methods and systems for enabling an experience platform, as well as a Quality of Experience (QoS) engine which allows the sentio codec to select a suitable encoding engine or device. The sentio codec is capable of encoding and transmitting data streams that correspond to participant experiences with a variety of different dimensions and features. As will be appreciated, the following description provides one paradigm for understanding the multi-dimensional experience available to the participants, and as implemented utilizing a sentio codec. There are many suitable ways of describing, characterizing and implementing the sentio codec and experience platform contemplated herein.
US09172978B2	Communicating primary content streams and secondary content streams including targeted advertising to a remote unit The invention relates to a method and system to communicate primary and secondary content streams to at least one remote unit, for example, via a television channel in a targeted television environment. The secondary content stream comprises a plurality of tertiary content streams (e.g., video streams) providing commercials, advertisements or any other content. The tertiary content streams are included in the secondary content stream as a mosaic so that each tertiary content stream is a subset or portion of an active display area or frame provided by the single secondary content stream. In one exemplary embodiment, the method and system provide targeted or specific commercial advertisements to demographically selected audiences.
US09172975B2	Method and system for encoding and transmitting high definition 3-D multimedia content One particular implementation of the present invention may take the form of a method and system for encoding and/or transmitting high definition 3-D multimedia content. In one embodiment, the frames for each eye of a viewer may be transmitted in a frame sequential manner to a display device, with an occasional null frame included in the frame stream. The null frame may be ignored by the display device and not presented to the viewer. In another embodiment, a synchronization signal may be presented to the display device to instruct the display device on how to display the frame-sequenced frames such that the 3-D effect of the content may be achieved. The synchronization signal may be presented to the display device embedded within the frames of the content or embedded within the null frames. The synchronization signal may also be provided out of band, such as on a high definition multimedia interface (HDMI) cable.
US09172965B2	Multi-level representation of reordered transform coefficients Techniques and tools for encoding and decoding a block of frequency coefficients are presented. An encoder selects a scan order from multiple available scan orders and then applies the selected scan order to a two-dimensional matrix of transform coefficients, grouping non-zero values of the frequency coefficients together in a one-dimensional string. The encoder entropy encodes the one-dimensional string of coefficient values according to a multi-level nested set representation. In decoding, a decoder entropy decodes the one-dimensional string of coefficient values from the multi-level nested set representation. The decoder selects the scan order from among multiple available scan orders and then reorders the coefficients back into a two-dimensional matrix using the selected scan order.
US09172964B2	Systems and methods for changing rate-control setting during video encoding Methods for changing a rate-control (RC) setting during video encoding, performed by an RC controller and a video encoder, are provided. An embodiment of the method comprises determining whether change in the RC setting is allowed for encoding a next portion of a video sequence, detecting a request for changing the RC setting before encoding the next portion of the video sequence if the RC setting is allowed to be changed; and executing video encoding for the next portion of the video sequence ceaselessly utilizing the changed RC setting when detecting the request.
US09172960B1	Quantization based on statistics and threshold of luminanceand chrominance Embodiments are directed towards modifying a quality of an image without affecting a bit rate associated with a video sequence of images. For each macro-block (MB) or sub-block within a MB for a target image to be encoded, various statistics are determined for a luminance component and chrominance components that provide at least average values for the chrominance components that may then be used to identify saturation thresholds. The saturation thresholds are used to determine a Qlevel. An average Qlevel from at least a previous frame is used to generate a Q modulation factor that may be combined with an activity based modulation factor and/or variance based modulation factor, or used singly. The final quantizer is calculated by bit-rate controller base quantizer multiplied by the Q modulation factor, and may be used to encode a MB or sub-block within a MB.
US09172959B2	Method and encoding/decoding of video using common merging candidate set of asymmetric partitions The present invention provides video encoding and decoding methods using block merging, which can be applied to a high resolution video of more than HD (High Definition) resolution. A video encoding method includes partitioning a current block into a first and a second prediction unit by using asymmetric partitioning, constructing a list of common merging candidate blocks including a predetermined number of common merging candidate blocks selected from adjacent blocks of the current block, selecting at least one candidate block from among the list of common merging candidate blocks and sending information of the selected candidate block to a decoder for each of the first and the second prediction unit.
US09172956B2	Encoding and decoding images using inter-prediction According to the present invention, an inter-prediction method includes: receiving mode information on the inter-prediction of a current block; decoding the received mode information; and performing inter-prediction using the decoded mode information. According to the present invention, image compression efficiency may be improved.
US09172947B2	Method and apparatus for processing multi-view image using hole rendering A method and apparatus for processing a multi-view image are provided. A priority may be assigned to each hole pixel in a hole region generated when an output view is generated. The priority of each hole pixel may be generated by combining a structure priority, a confidence priority, and a disparity priority. Hole rendering may be applied to a target patch including a hole pixel having a highest priority. The hole pixel may be restored by searching for a source patch most similar to a background of the target patch, and copying a pixel in the found source patch into a hole pixel of the target patch.
US09172946B2	Method for driving liquid crystal display device displaying stereoscopic images The image quality of a liquid crystal display device that can display stereoscopic images is improved without the decrease in resolution. In a method for driving a liquid crystal display device that displays stereoscopic images by a wavelength division method, a first image seen with left eye and a second image seen with right eye are displayed using R, G, and B whose wavelength bands are different from each other by a field-sequential method. In the field-sequential method, writing of video signals and lighting of a backlight are sequentially performed not in the entire pixel portion but in each given region of the pixel portion.
US09172945B2	Method of creation of a virtual three dimensional image to enable its reproduction on planar substrates A method of creation of a virtual three dimensional image to enable its reproduction on at least one planar substrate includes creating a virtual three dimensional space that includes a ground plane. A virtual model of an object is merged into the virtual three dimensional space and located at a desired position on the ground plane. A first virtual camera is placed at a first position in the virtual three dimensional space. Virtual lighting is added to the virtual three dimensional space to create shadows of the virtual model on at least the ground plane. The first virtual camera is used for rendering of the virtual model and the shadows to obtain a rendered image. The virtual model is removed and the rendered image is projected onto the ground plane. A second virtual camera is placed vertically above the projection of the rendered image on the ground plane and is used to capture the virtual three dimensional image of the projection of the rendered image on the ground plane to enable reproduction of the virtual three dimensional image on the at least one planar substrate.
US09172944B2	Image processing device, image processing method, non-transitory tangible medium having image processing program, and image-pickup device An image processing device includes: a parallax control processing section performing an image processing for modifying a parallax magnitude, on each of a plurality of parallax images obtained through shooting from a plurality of respective view point directions different from one another, with use of shooting information related to a shooting condition for each of the parallax images.
US09172937B2	Timed events during recorded media playback A system and method are provided for providing a timed event to a user viewing recorded media content at a defined time interval. The recorded media content may be any media viewed on a time-shifted basis. For example, the recorded media may be television content recorded by a Digital Video Recorder (DVR), media content recorded on a Digital Video Disc (DVD), streaming media content providing by a network such as the Internet, or the like. In general, the timed event may be, for example, presenting audio, visual, or audio-visual content and is configured to occur periodically at a time interval such as, but not limited to, every half-hour, every hour, or once a day. Once the timed event is configured, the timed event is periodically effected at the time interval to provide an indication of time while the user is viewing recorded media content.
US09172936B2	Inter-video corresponding relationship display system and inter-video corresponding relationship display method To enable a utilization frequency of each segment in a source video to be readily assessed between videos in a corresponding relationship during a creation process. Relationship information that is information indicating a segment in a corresponding relationship between a source video and a plurality of derived videos created using at least a part of segments of the source video is stored in a relationship information storing unit, and a corresponding relationship of the segment between the source video and the plurality of derived videos and a utilization frequency of each segment of the source video by the plurality of derived videos are displayed based on the relationship information stored in the relationship information storing unit.
US09172934B2	Method for white balance adjustment of images A white balance adjustment method includes capturing a raw image by an image capturing device where an arrangement format of the raw image is BGb/GrR, a predetermined sampling width is used to sample RGB pixels, and obtaining color scale values of each channel. Each channel includes a first buffer space and a second buffer space, the first buffer space storing smaller color scale values, the second buffer storing larger color scale values, an average value of the minimum color scale values stored in the first buffer space is calculated to obtain a reference black, an average value of the maximum color scale values stored in the second buffer space is calculated to obtain a reference white. A color histogram stretching method using the obtained reference black and white adjusts the white balance of the raw image.
US09172933B2	Correcting anamolous texture and feature width effects in a display that uses a multi primary color unit scheme A method for correcting artifact effects is a multi-primary color matrix display is provided where the display is populated by an array of red-green-blue (RGB) pixels and of non-RGB pixels. The method includes receiving all-RGB data in an all-RGB format; converting the all-RGB data into multi-primary data in accordance with a predefined multi-primary color scheme, testing for and applying one or more artifact correction modifications to each of primary colors that is not represented by all pixels, wherein the modification includes shifting of intensity production of a given non-primary color to a metameric equivalent of pixels in one or more adjacent RGB pixels.
US09172932B2	Video signal paths switching in a portable display system An image projection system includes a scaler IC, a micro-projector, a video connector, and a controller. The video connector is coupled to the scaler IC and the micro-projector. The controller controls the video connector and the scaler IC to form a first signal path mode and a second signal path mode. The video connector transmits a first image signal from the scaler IC for external displaying in the first signal path mode. The video connector receives a second image signal from a peripheral device and passes the second image signal to the micro-projector for projection in the second signal path mode.
US09172929B2	Encapsulation of light-emitting elements on a display module A video display module comprises a circuit board having a front face, a plurality of light-emitting elements electrically coupled to the front face of the circuit board, and a polymer encapsulating member adhered to the front face of the circuit board, the polymer encapsulating member substantially covering at least a portion of the circuit board and a portion of the plurality of light-emitting elements, the polymer encapsulating member substantially sealing the portion of the circuit board and the portion of the plurality of light-emitting elements.
US09172928B2	Color image capture system and method for light modulation A color image capture systems comprised of: a lens 110; a light sensitive sensor 114; a first wavelength dependent mask 120 located on an optical path 128 between the lens and sensor, wherein the first wavelength dependent mask 120 includes a first attenuation pattern for modulation of a light field; and a second wavelength dependent mask 130, wherein the second wavelength dependent mask includes a second attenuation pattern to modulate the modulated light field from the first wavelength dependent mask, the second wavelength dependent mask located on the optical path 128 between the first wavelength dependent mask and the sensor, further wherein the second wavelength dependent mask is separated from the sensor by a distance d.
US09172920B1	Doorbell diagnostics A doorbell can be configured to wirelessly communicate with a remote computing device. In some cases, components that enable the doorbell to wirelessly communicate with the remote computing device could make the doorbell incompatible with certain types of chimes. In some embodiments, the doorbell is configured to diagnose chime compatibility issues.
US09172911B2	Touch control of a camera at a remote video device A device, computer program product, and method control the operation of one or more cameras associated with a video conference endpoint in a video conference call. A camera control unit (remote control) includes a touch enabled end user component that presents to the user graphical objects representing video conference endpoints currently connected in a conference call, and/or one or more live video feeds currently captured by the video conference endpoint's cameras, and allows the user to manipulate a camera's pan, tilt and zoom using a touch screen display embedded in said camera control unit.
US09172908B2	Unpaired devices Disclosed is a user device comprising an output component configured to deliver an experience to a user in a standalone mode of the user device and an input component configured to receive a notification of an event. The device also comprises an indication generator for generating an indication for transmission over an air interface in response to receiving the input. The indication comprises an identifier relating to the event. Further, the device comprises a processing component configured to receive a message from a network node via a network. The message indicates that a media device has detected the identifier, and also comprises information of the media device. The processing component is configured to process the message received from the network to enable transfer of at least part of the experience to the media device.
US09172907B2	Method and apparatus for dynamically adjusting aspect ratio of images during a video call A method and apparatus for dynamically adjusting an aspect ratio of an image during a video call is described herein. Specifically, a method for dynamically adjusting the aspect ratio of an image during a video call may include obtaining at least one display parameter of a display device, performing a comparison of the at least one display parameter to at least one image capture parameter of a capture device, capturing an original image, modifying the original image based on the comparison performed, wherein the modified image has an adjusted aspect ratio different from an aspect ratio of the original image, and sending the modified image to the display device.
US09172906B2	Mobile communication terminal and data input method A mobile communication terminal includes a display module to display image data on an image display area, an input module to generate touch data according to a touch input in a touch area, and a storage module to store the touch data associated with the image data. A data input method includes displaying image data on an image display area, generating touch data according to a touch input in a touch area, associating the touch data with the image data, and storing the touch data associated with the image data.
US09172898B2	Video display apparatus and method of setting user viewing conditions A method of setting user viewing conditions of a video display apparatus including determining whether a detected terminal is registered by receiving address information of the detected terminal; measuring a received signal strength indication (RSSI) of the detected terminal, if the detected terminal is registered, comparing the RSSI of the detected terminal with preset reference RSSI; comparing a priority order of the detected terminal user profile with a priority order of a preset user profile, if a value of the measured RSSI is larger than a value of the reference RSSI; loading the detected user profile of the terminal, if the priority order of the detected terminal user profile is higher than the priority order of a preset user profile; and setting user viewing conditions based on the loaded user profile.
US09172896B2	Content-sensitive and context-sensitive user interface for an intelligent television An intelligent television can provide various interfaces for navigating processes associated with providing content. The user interfaces include unique visual representations and organizations that allow the user to utilize the intelligent television more easily and more effectively. Particularly, the user interfaces' layout, aspect ratio of elements, display of elements, and size of selectable images are dependent on the type of content presented. Further, the user interfaces provide unique process of transitioning between the content.
US09172893B2	Solid-state imaging device and imaging apparatus A solid-state imaging device includes a pixel array, control lines TG each provided for a corresponding one of rows of pixels and configured to control, e.g., operation of a transfer transistor, and a driver circuit 103 configured to control the operation of the transfer transistor through the control lines TG and connected to a power-supply line TGL. The solid-state imaging device performs all reset operation for resetting signal charges of all pixels by the driver circuit 103 and reading operation for reading a pixel signal from each row of the pixels. An impedance controller 130 configured to control an impedance value for power-supply line TGL in the reading operation to be less than an impedance value for power-supply line TGL in the all reset operation is provided.
US09172889B2	Imaging systems and methods for generating auto-exposed high-dynamic-range images Electronic devices may have camera modules that include an image sensor and processing circuitry. The image sensor may capture an image from a scene. The processing circuitry may extract image statistics and exposure levels from the image. The processing circuitry may use the image statistics and the exposure levels to generate a first exposure time, a second exposure time, and gain settings for the image sensor. The image sensor may capture additional images from the scene having long-exposure image pixel values that are captured using the first exposure time and short-exposure image pixel values that are captured using the second exposure time. The processing circuitry may generate a long-exposure image and a short-exposure image from the second image. The processing circuitry may generate auto-exposed high-dynamic-range images of the scene using the long-exposure image and the short-exposure image.
US09172883B2	Imaging apparatus with a finder device having at least one variable magnification lens which can be inserted into and removed from an optical path of the finder device A camera 10 has an imaging optical system, an imaging device 21a, and a finder device 15. The finder device 15 includes a variable magnification lens 64 which can be inserted into and removed from an optical path, and a shutter 62 which can switch between a closed state in which it interrupts light coming from a finder window 16 and an open state in which it allows passage of light coming from the finder window 16. The camera 10 is equipped with a driver 54 for controlling insertion and removal of the variable magnification lens 64 in accordance with the focal length of the imaging optical system, a driver 53 for controlling the state of the shutter 62, and a CPU 82. The CPU 82 controls the shutter 62 so that it is kept in the closed state while the variable magnification lens 64 is being moved.
US09172881B2	Camera and method of controlling operation of same It is arranged so that a user looking at an optical viewfinder and manipulating an operating member of a camera can ascertain which operating member is being manipulated. An optical image of a subject is displayed in the optical viewfinder. Operating members of the camera, which include a shutter-speed dial, exposure dial and command lever, are provided with respective touch sensors for sensing that these operating members have been touched. If the user touches the shutter-speed dial, an image representing the shutter-speed dial touched by the user appears on the optical image of the subject. Viewing the displayed image allows the user to ascertain that he is manipulating the shutter-speed dial.
US09172871B2	Method and device for multi-camera image correction Embodiments of the present invention provide a method and a device for multi-camera image correction. The method for multi-camera image correction includes: acquiring information of independent images that are captured by each camera and have no overlap area or have an overlap area smaller than a threshold; acquiring, according to information of each independent image, an image correction parameter that corresponds to each camera and allows adjacent independent images to be corrected into a contiguous image; and performing, according to the image correction parameter, correction processing on video data of a camera that corresponds to the image correction parameter. In the embodiments of the present invention, maintenance manpower is saved, adjustment efficiency is improved, and remote maintenance may be performed in the case of no overlap area or of a small overlap area. In addition, images are corrected in a data processing manner, which efficiently ensures precision of image correction.
US09172870B2	Real-time image processing method and device enhancing the resolution of successive images Disclosed herein are a method and a device of real-time image processing. The method comprises capturing three images, enhancing a resolution of the images to obtain for each image a high-resolution image (HRI), obtaining two displacement vectors using the HRIs, obtaining a superimposed HRI based on the HRIs and the displacement vectors, obtaining a compensatory vector based on the displacement vectors, and generating a super-resolution image based on the superimposed HRI and the compensatory vector.
US09172868B2	Imaging device, imaging method and storage medium for combining images consecutively captured while moving The present invention can easily acquire images having a uniform aspect ratio. In an imaging device of the invention, a control section detects the movement amount and the movement direction of the imaging device based on output from an acceleration sensor. Then, when the movement direction of the imaging device in its initial movement started at the beginning of imaging is substantially linear and a substantially horizontal or vertical direction, the control section calculates a reference movement amount by which a composite image having a predetermined aspect ratio can be generated, based on the movement amount of the imaging device, and controls the display section to display imaging area information (guide) indicating the final imaging area having the predetermined aspect ratio based on the reference movement amount.
US09172867B2	Method for running camera and electronic device thereof A method usable by an electronic device executes at least one application operating a first camera and a second camera and determines whether an image acquired by the second camera is shaded by an object obscuring a portion of the acquired second camera image. In response to a determination the acquired second camera image is shaded, the method displays on a preview screen an image acquired by the first camera.
US09172866B2	Electronic device, driving method of the same, and computer readable recording medium An electronic device includes: a display unit capable of displaying a rotational pathway which rotates on a screen and with which an operation of the electronic device is associated according to a position on the rotational pathway; a touch screen that detects a touch from an outside and receives an input of a positional signal according to a position of the touch; a display controller that converts the position of the touch corresponding to the positional signal received by the touch screen into a position on the rotational pathway and causes a mark to be displayed at the position converted; and an operation controller that controls an operation of the electronic device according to a display position of the mark on the rotational pathway.
US09172862B2	Information processing device, information processing method, and program An information processing device includes a detecting unit configured to detect a motion of a subject included in an image generated by an imaging device including multiple phase difference detecting pixels which generate a signal arranged to perform focus determination by phase difference detection, and multiple image generating pixels which generate a signal arranged to generate an image; and a determining unit configured to determine thinning-out processing when reading out a signal from the imaging device, according to the detected motion of a subject.
US09172859B2	Camera module and method for inspecting horizontality of object and the camera module Exemplary embodiments of a camera module are proposed, the camera module including an image sensor photographing a object image, a memory unit stored with a look-up table recorded with pixel number of the object image corresponding to a length of the object, and an image signal processor detecting a pixel number of the object image photographed by the image sensor, reading out a length of a object corresponding to the detected pixel number from the memory unit and inspecting horizontality of the image sensor and the object.
US09172858B2	Apparatus and method for controlling settings of an imaging operation An information processing apparatus includes a control unit configured to perform control for selecting settings for an imaging operation of an imaging unit based on surrounding sound obtained by a sound obtaining unit and an image generated by the imaging unit.
US09172857B2	Image capture apparatus, imaging lens, and image capture system An image capture system including an image capture apparatus and an imaging lens detachable from the image capture apparatus comprises an image capture unit which captures an image of an object, an aperture which adjusts an amount of light that enters the image capture unit; a stepping motor of a 1-2 phase driving type, which is configured to drive the aperture, and a control unit which controls to set the stepping motor in a current applied state when the aperture is stopped down, and to drive the aperture by a difference between an aperture value while the aperture is stopped down and an aperture value for still image capture, when a still image capture instruction is issued while the aperture is stopped down.
US09172856B2	Folded imaging path camera In embodiments of a folded imaging path camera, a device includes a camera lens module that focuses an image, which is received as reflected light. An image sensor captures the image from the reflected light that is directed at the image sensor. The device also includes one or more optics that fold the reflected light of the image along an imaging path directed through the camera lens module and directed at the image sensor. The imaging path directed through the camera lens module can be approximately perpendicular to an axis along which the reflected light of the image is received via an aperture in the device. Alternatively, the imaging path directed through the camera lens module is approximately parallel to the axis along which the reflected light of the image is received via the aperture in the device.
US09172853B2	Microlens array architecture for avoiding ghosting in projected images Light-field image data is processed in a manner that reduces projection artifacts in the presence of variation in microlens position by calibrating microlens positions. Approximate centers of disks in a light-field image are identified, and gridded calibration is performed, by fitting lines to disk centers along orthogonal directions, and then fitting a rigid grid to the light-field image. For each grid region, a corresponding disk center is computed, and a displacement vector is generated. For each grid region, the final disk center is computed as the vector sum of the grid region's geometric center and displacement vector. Calibration data, including displacement vectors, is then used in calibrating disk centers for more accurate projection of light-field images. In at least one embodiment, the imaging geometry is arranged so that disks are separated by a gap, so as to limit or eliminate ghosting.
US09172852B2	Camera system, video processing apparatus, and camera apparatus Disclosed herein is a camera system including, a camera apparatus having, an image sensor, a correction section, a first transmission processing section, and a synchronization processing section, and a video processing apparatus having a second transmission processing section and a conversion section, wherein the video processing apparatus outputs the video data obtained by the conversion by the conversion section.
US09172847B2	Scanning method and device for obtaining color images In a method of scanning an image on an original, an optical sensor including sensor elements for each of a number of basic colors is used to generate pixel values of rows of pixels of the scanned image. The sensor elements are used to generate grey scale pixel values representing different parts of the image. A first sensor element for each of the basic colors is used to generate pixel values of odd pixels of rows on the original, and a second sensor element for each of the basic colors is used to generate pixel values of even pixels of rows of the original. Each color pixel value is generated mainly on the basis of a pixel value of at least one of the first sensor elements and pixel values of at least two of the second sensor elements for adjacent pixels.
US09172836B2	Optical scanner illumination system and method An optical scanner having a scanner glass with a bottom surface includes an LED illumination source and a reflector, disposed below the glass. The illumination source has a target-oriented surface oriented to direct light toward the glass at a non-perpendicular angle. The reflector is oriented to direct light reflected off of the bottom surface toward the target-oriented surface.
US09172835B2	Information processing apparatus, information processing system, image forming apparatus, image forming system, and computer readable medium An information processing apparatus includes: an information storage that stores information; a request accepting section that accepts a predetermined request for the information; a setting section that, for each of the information, sets whether the predetermined request is allowed; a setting storage that stores a setting by the setting section; a determining section that, with respect to the information corresponding to a request accepted by the request accepting section, reads out a corresponding setting from the setting storage, and that determines allowance/non-allowance of the predetermined request; and a process executing section that, in a case where the determining section determines allowance of the predetermined request, executes a process corresponding to the predetermined request on the information.
US09172830B2	Image forming apparatus interface where user selections are displayed in a hierarchical manner An image forming apparatus, including: a display device; a coordinate detecting portion which detects a directed coordinate in a display area including a first area in which is displayed a hierarchy image including uppermost-level images and lower-level images; a first display control section; a second display control section to display at least one first button image; and a third display control section, the uppermost-level images including: a first image in which is displayed at least one second button image; a second image in which is displayed at least one third button image; and a third image, wherein, where the directed coordinate is one of coordinates corresponding to the first through third button images, the third control section displays a lower-level image corresponding to a button image corresponding to the directed coordinate, and wherein the first control section executes processing to display the one uppermost-level image so as to be changed.
US09172827B2	Communication apparatus, control method thereof and storage medium There is provided a technique of, in a communication apparatus capable of executing facsimile communication by a deemed voice scheme, enabling generation of a communication error to be prevented regardless of a voice encoding scheme used to encode a facsimile signal. To achieve this, a communication apparatus (first FAX apparatus) establishes a voice signal transmission session with the second FAX apparatus serving as a partner apparatus in FAX communication for FAX communication by the deemed voice scheme. The first FAX apparatus determines a voice encoding scheme which is used in the established session to encode a FAX signal into a voice signal. In accordance with the determination result, the first FAX apparatus limits modulation schemes usable in generation of the FAX signal when performing FAX communication by the deemed voice scheme.
US09172824B2	Apparatus, system, and method of inspecting image, and recording medium storing image inspection control program An apparatus, system, method, and non-transitory recording medium storing an image inspection control program, each of which is capable of inspecting a printed image are provided. While generating an inspection image to be used for inspecting a read image obtained by reading the printed image, attribute data indicating, for each pixel in the inspection image, whether the pixel belongs to drawing data in the inspection image is generated. The attribute data is used to process inspection of the read image based on comparison between the read image and the inspection image.
US09172815B2	System and method for initiating a conference call The present invention is a system and method for initiating conference calls via an instant messaging system to reduce the effort required to initiate and manage the call. The system uses an IM connection between a requesting party and a conference call server to inform the conference call server of the desire to initiate the conference call. The conference call server may initiate the conference call by having involved parties called by a conference bridge, thus reducing the effort required by the parties to join the call.
US09172814B1	Facilitating call continuity when transferring calls between a mobile access network to a VoIP network Systems, methods, and computer-readable media for facilitating call continuity when transferring calls between mobile access networks to voice over internet protocol networks. The method includes recognizing availability of a voice over internet protocol network during a voice call established via a wireless access network. Thereafter, a data connection between a user device and the voice over internet protocol network is established. A transfer of the voice call from the wireless access network to the voice over internet protocol network is initiated by initiating a three-way call. Such a three-way call includes a first portion routed to a destination device via a public switch telephone network and a second portion routed to the user device via the voice over internet protocol network.
US09172813B2	Systems and methods for call forwarding to a device based on a priority level and geographic proximity Systems and methods for call forwarding in a telecommunications network are described herein. A request to update a call forwarding number associated with a subscriber in the telecommunications network is provided. The request includes a phone number of an active mobile device, which is located within geographic proximity to a subscriber mobile device. The active mobile device is associated with a priority level.
US09172811B2	Method and system for restoring mobile device functions This provides for controlling mobile device functions and features. For example, it limits or disables the use of some of mobile device features which could cause distraction to the user, when the user is engaged in another activity. In an example, it enables other mobile device features based on occurrence of events related to the user or environment. Another example addresses controlling the mobile device features, such as SMS, while the user is in a vehicle or driving. Another example restricts the ability of the driver of a vehicle to text, while the vehicle is in motion, by automatically disabling the texting ability of mobile device within and around the perimeter of the driver's seat. Other variations, examples, improvements, detection mechanisms, models, techniques, calculations, verification mechanisms, and features are also described in details.
US09172809B1	System and method for prioritizing customers and predicting service escalation Systems, methods, and computer-readable storage media for predicting escalation risks in customer support contexts. A system implementing the example method can identify instances of customer escalation from a corpus of customer support sales, customer support, and product software development data, and determine, for the instances of customer escalation, sets of trigger conditions that were at least partially responsible for respective instances of customer escalation. Then the system can classify each of the instances of customer escalation by problem type based on the set of trigger conditions to yield classifications, and add the classifications, the sets of trigger conditions, and the instances of customer escalation to a database. Then the system can compare the database to support data to identify customers or support tasks that are likely to be escalated, and the system or a user can allocate additional support resources to proactively prevent escalations.
US09172808B2	Systems and methods for identifying a caller Systems and methods for authenticating callers are disclosed that may obtain identifying data and a voice print, and compare the voice print to one or more stored voice prints. Further, one or more initial scores may be calculated based on the data and the comparison, and a confidence interval score may also be calculated. The systems and methods may determine whether to authenticate based on the one or more initial scores and the confidence interval score.
US09172806B2	Method for providing support services using consumer selected specialists and specialist ratings A general queue and priority queues corresponding to agents are maintained. In response to a user request from a remote device of a user regarding a content item of a content document displayed at the remote device, it is determined whether the user request includes an agent identifier (ID). If the user request includes a first agent ID, a first of the priority queues is identified based on the first agent ID and the user request is inserted into the first priority queue. If the user request does not include an agent ID, the user request is inserted into the general queue. A case manager the requests from the general queue and the priority queues to the agents that are available to enable the agents to establish live communication sessions with users associated with the requests.
US09172805B1	Edge injected speech in call centers Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for receiving an input from an agent during a call with a caller where the input directs one or more processors to inject a recorded statement in the agent's voice into the call, and where the recorded statement in the agent's voice is stored in a computer-readable file. Obtaining the recorded statement in the agent's voice based on data associated with the input and in response to receiving the input. And causing the recorded statement in the agent's voice to be inserted into a media stream of the call.
US09172801B2	Method and apparatus for event notification A method (300) and apparatus are disclosed for event notification. An apparatus that incorporates teachings of the present disclosure may include, for example, a presence services system (PSS) (102) can have a controller (104) that manages operations of a communications interface (110). The controller can be programmed to monitor (302) presence information of a plurality of communication devices of an end user operating in a communications system, and receive (316) a request from a calendar reminder system (CRS) for access to the presence information. Additional embodiments are disclosed.
US09172798B1	Determining calling windows for called telephone numbers A location determination rule is applied by a dialer when processing a telephone number of a target party in record from a dialing list. The location determination rule indicates how a geo-location of the target party is to be ascertained, so that the time zone of the target party is ascertained. Once the time zone is known, then a local time of the target party is ascertained, and a determination can be made whether a call can be originated to the target party within a prescribed calling window. The calling window indicates the beginning and ending times, local to the target party, when calls can be attempted to the target party. In one embodiment, the location determination rule can be defined for each record in the dialing list or for all records in the dialing list.
US09172797B2	Audio recording apparatus, audio recording method and audio recording program An audio recording apparatus that includes: an acquisition part that acquires a fragment data set indicating an action of a switchboard to a call, and an execution time of the action; a history generation part that generates a historical data set indicating a history of response states of an agent to one call, from a plurality of fragment data sets acquired; a talking storage part that stores audio recording data of talking of the agent; a display control part that causes a link display image to be displayed on a display unit, the link display image indicating a link to the corresponding audio recording data, in association with historical display of response states of the agent, based on the historical data set; and a replaying part that replays the audio recording data, when the link display image is selected.
US09172796B2	Location based mixer priorities in conferences In one embodiment, a method includes identifying a plurality of locations associated with a conference system that has a conference server and a mixer, and prioritizing the locations by assigning a first priority to at least a first location and assigning a second priority to a second location. The second priority is lower than the first priority. The method also includes processing received media streams such that media streams received from endpoints associated with the first location are processed as having a higher priority than media streams received from endpoints associated with the second location.
US09172793B2	Method and apparatus for correlating a phone call with a display A computerized method for correlating a phone call with a telephone-number, comprising receiving at a service facility, comprising an at least one processor, a query from a computer about a status of a phone call with a telephone-number, and sending to the computer a response with information related to the status, and an apparatus for performing the same.
US09172791B1	Noise estimation algorithm for non-stationary environments Features are disclosed for estimating a noise level using a variable step size. An acoustic echo canceller (AEC) may be configured to perform echo cancellation. The acoustic echo canceller may determine an estimated echo using a playback signal. The acoustic echo canceller also may determine an estimated error using the estimated echo and a microphone signal. A variable step size may be determined using the estimated error and the microphone signal. Noise reduction may be performed using the variable step size.
US09172790B2	Mobile wireless communications device for hearing and/or speech impaired user A mobile wireless communications device includes a housing and transceiver carried by the housing for transmitting and receiving radio frequency (RF) signals carrying communications data of speech. A processor is coupled to the transceiver for processing the communications data as speech that is transmitted and received to and from the transceiver. A keyboard and display is carried by the housing and connected to the processor. A speech-to-text and text-to-speech module converts communications data as speech received from the transceiver to text that is displayed on the display and converting text that is typed by a user on the keyboard in the communications data as speech to be transmitted from the transceiver as an RF signal.
US09172785B2	Method for data communication in a vehicle and data communication device A method for data communication in a vehicle between an in-vehicle device and a mobile device coupled with the vehicle includes transmitting, by the in-vehicle device, data via a data bus of the vehicle to an in-vehicle data communication device, a first data protocol being used for this purpose, in which an arbitration occurs. The data communication device converts the data, and the data communication device transmits the converted data via a data link to the mobile device. A second data protocol is used in the data transmission from the in-vehicle data communication device to the mobile device, in which no arbitration occurs. A data communication device by which the method of the invention may be implemented is also described.
US09172783B1	Integrating two-dimensional barcodes and embedded links with call center operation In various embodiments, advertising campaigns can be defined that incorporate technologies such as two-dimensional bar codes or embedded links in electronic material, for directing a user to communicate with a call center. For instance, in particular embodiments, the reading of a two-dimensional bar code by a user with a smart phone may cause various forms of communication requesting a return communication. The communication from the smart phone may be sent to, and received at, the call center, where a calling campaign associated with an advertising campaign is identified using information associated with the communication. A responding communication may be initiated from the call center to the user.
US09172776B2	PCC control at PCRF failure A method for policy control in an infrastructure network comprising a Gateway (GW) an Access Function (AF), and at least one Policy and Charging Rules Function (PCRF) is provided. In some embodiments, the method includes: (a) the GW establishing a Gx or Gxx session in order to set the current PDN connection under PCC control, (b) the GW further providing information about the current PDN connection to a first PCRF, (c) the first PCRF performing authorization and policy decision based on the PDN connection information and sends it together with restoration instructions to the GW, (d) the GW when detecting that the first PCRF is not available, applying the restoration instructions, said instructions requiring the GW to try to regain PCC control and/or requiring the GW to gracefully delete the services associated with the PCC control.
US09172771B1	System and methods for compressing data based on data link characteristics Systems and methods for compressing data in a network system communicated across a network are discussed. The network system may determine a data link characteristic for a data link between a source and a destination. A compression algorithm may be selected from among a plurality of compression algorithms based on the data link characteristic. A chunk of data may be compressed, using the selected compression algorithm, to be communicated over the data link. A compression ratio of the compressed chunk and the chunk uncompressed may be compared to a compression threshold. The compressed chunk may be provided, using the control circuitry, if the compression ratio is greater or equal to the compression threshold. The chunk uncompressed may be provided if the first compression ratio is less than to the first compression threshold.
US09172770B1	Web-based distributed computing with browser-executed code A reusable distributed computing framework may be established in which contributors of computing resources may participate by using a web browser to visit a web page that incorporates a distributed computing participation component. A distributed computing job provider may submit distributed computing jobs to a web-based distributed computing service. A distributed computing job may include browser-executable code in accordance with a particular distributed computing programmatic interface and data to be processed by the browser-executable code. The web-based distributed computing service may assign independently processable portions of the job data to browsers visiting a donor page for processing with the job code. Results returned by the donor browsers may be indexed and made available in real-time, as may a status of the distributed computing job such as with respect to processing the job data.
US09172769B2	Server reservation method, reservation control apparatus and program storage medium An information processing device including a communication interface that exchanges data with a first device and a second device; and a processor that performs authentication of the first device; receives content data from the first device via the communication interface; and controls the communication interface to send the content data in real time to the second device based on an access control setting, which indicates a restriction on sending the content data.
US09172768B2	Method and apparatus for creating webpages in a media communication system A system that incorporates teachings of the present disclosure may include, for example, an Internet Protocol Television system having a controller to receive an identification of a first presentation device, select a webpage graphical user interface (GUI) template from a library according to the identification of the first presentation device, receive a request to present a customization of the webpage GUI template at a second presentation device, identify an adaptation process to accommodate presentation of the customization of the webpage GUI template at the second presentation device, customize the webpage GUI template according to one or more directives received from the first presentation device, thereby generating a customized webpage GUI, adapt the customized webpage GUI according to the adaptation process, present the customized webpage GUI at the first presentation device, and present the adapted customized webpage GUI at the second presentation device. Other embodiments are disclosed.
US09172761B2	Method of gathering information related to activity of a user and a data processing system program product Information related to activity of a user may be provided using a method or a data processing system program product to perform the method. In one embodiment, the method includes sending a first view request to a first electronic site, receiving a first view from the first electronic site, and first information related to the first view request to a second entity that is different from the first entity. In another embodiment, a data processing system program product may perform a method of sending information related to a view request from the user for an electronic site. The information is to be sent to an entity that is different from an entity that substantially controls or owns the electronic site and different from an Internet service provider of the user, if the user is to use the Internet service provider in accessing the electronic site.
US09172759B2	Fabric network Systems and methods relating to communication within a fabric network are presented. The fabric network includes one or more logical networks that enables devices connected to the fabric to communicate with each other using various profiles known to the devices. A device sending a message may follow a general message format to encode the message so that other devices in the fabric may understand the message regardless of which logical networks the devices are connected to. Within the message format, a payload of data may be included for the receiving device to forward, store, or process the message. The format and the contents of the payload may vary according to a header within the payload that indicates a profile and a message type within the profile. Using the profile and message type, the receiving devices may decode the message to process the message.
US09172758B1	Agent-assisted and directed web-channel customer care apparatus, method, and computer program An agent-assisted and directed web-channel customer care apparatus, method, and computer program is provided to receive, from a first device, an inbound message via an inbound messaging channel and create a web session utilizing a web session server. Session identification is received from the web session server and a unique identifier is transmitted to the first device in order for a second device to connect to an agent device via a web session. Communications is simultaneously maintained with the first and second device via the inbound messaging channel and the web session.
US09172747B2	System and methods for virtual assistant networks A system for the operation of a virtual assistant network, comprising a plurality of virtual assistants stored and operating on network-connected devices, and a plurality of virtual assistant brokers stored and operating on network-connected devices, wherein the virtual assistants receive user requests and send the requests to the virtual assistant brokers, and wherein the virtual assistant brokers delegate the requests to other virtual assistants for fulfillment.
US09172746B2	Information processing system An information processing system includes multiple network segments to which one or more information processors are connectable. The network segments includes a first network segment to which at least one first information processor configured to store predetermined information is connected, a second network segment to which at least one second information processor is connected, and a third network segment to which at least one third information processor is connected. The second network segment includes multiple predefined application programming interface (API)s, and the at least one second information processor executes a process corresponding to a called one of the APIs using the predetermined information stored in the at least one first information processor. In response to receiving a request from outside the information processing system, the at least one third information processor controls a process corresponding to the request by calling one of the APIs which corresponds to the request.
US09172738B1	Collaborative logistics ecosystem: an extensible framework for collaborative logistics The system describes a collaborative machine social network system with several elements. There is at least one system participant which communicates with the network. The participant's communications include short bursts of information not directed to a particular recipient but rather the network as a whole. The network further includes propagator nodes and integrator nodes to process communications from participants.
US09172737B2	Streamloading content, such as video content for example, by both downloading enhancement layers of the content and streaming a base layer of the content Video streaming applications are a major contributor to the recent dramatic rise of data traffic in cellular networks. Mobile users in a cellular network often experience fluctuating data rates, which might affect the quality of video they view in a streaming service. Although replacing such video streaming services with video downloading/renting services could potentially allow such mobile users to enjoy consistently higher quality videos, such services typically cost a lot more than video streaming services because of legal copyright pricing and management issues. By downloading enhancement layers but streaming base layers of the content, mobile users can enjoy download-quality videos with a service (legally) classified as a streaming service.
US09172735B2	Method and apparatus for content distribution via non-homogeneous access networks A method and apparatus for streaming content to an access network in an interactive information distribution system. The method encapsulates the content in accordance to an Internet Protocol (IP). The content is then transcoded into a format supported by the access network, and streamed over a distribution network to a remote server or to a subscriber terminal that is coupled to the access network. The apparatus is embodied as stream caching server for streaming the content encapsulated within the packet to access networks via a stream distribution network in response to a request for content. A packet processor is coupled to the stream server for processing the encapsulated content within the IP packets into a format native to the access network.
US09172731B2	Call processing system and method based on answer mode of push to talk over cellular user A call processing system and method based on an answer mode of a Push-to-Talk over Cellular (PoC) user are provided. A data format is defined, which inserts an indicator indicating a manual answer override into a payload of a Real-time Transport Control Protocol (RTCP) in a format of a new data field. When a PoC communication requester instructs the MAO to perform PoC communication regardless of an answer mode of a reception side PoC user, an auto-answer mode is immediately executed without any procedure of checking the instruction. In addition, when the reception side PoC user establishes an early session with a home PoC server in its own PoC terminal, the call processing can be performed at a quicker speed.
US09172730B2	Social aspects of media guides A computer-implemented method, including receiving, at a computing device, a request from a user to display descriptors of media programming content for a time period; identifying people associated with the user employing information stored in a computer database, and identifying time-associated media programs electronically scheduled on behalf of the identified people; and providing for display, to the user, the descriptions of the identified people and of the time-associated media programs.
US09172727B2	Customer premise equipment and microprocessor resource management method of customer premise equipment A customer premise equipment (CPE) with the ability to manage its own resources. When a communication device request establishment of a voice communication with an external terminal. A usage rate of a microprocessor of the CPE is detected, and the usage rate of the microprocessor is determined and classified as being between a number of usage levels. When the usage rate of the microprocessor is in a high level, two virtual channels are created, to divide a network bandwidth of the CPE. One of the virtual channels is used for packets of voice communication, and the other virtual channel is used for transmission of other kinds of data packages.
US09172723B2	Method of providing telecommunications network security Disclosed is a method of providing network security within a mobile radio communications network and including creating a security context for communications between a mobile radio communications device and the network, the security context being created responsive to an input parameter such as the downlink NAS count, and the method further including, as part of each initial handover attempt, controlling the parameter so as to apply a version of the parameter different from a previous version, for example as incremented downlink NAS count, and preferably independently of network signaling messages.
US09172717B2	Security-aware admission control of requests in a distributed system Systems and articles of manufacture for security-aware admission control of requests in a distributed system include identifying a request dropped by a first application component in a distributed system, determining one or more actions to take with respect to the dropped request, said determining comprises identifying one or more policies of the first application component responsible for the dropped request and identifying one or more additional application components in the distributed system to be affected based on the identified one or more policies, and executing said one or more actions to control admission of one or more requests associated with the dropped request at the one or more additional application components.
US09172716B2	System and method for detecting DNS traffic anomalies Systems and methods for analyzing domain name system (“DNS”) lookup data perform operations that may include: calculating traffic scores for a network address based on a set of DNS lookup data associated with the network address, where the set of DNS lookup data includes a plurality of query records having one or more queried network addresses; calculating a first variance and a second variance for the network address based on the traffic scores for the network address; and determining a rank of the network address based on the first and second variances.
US09172711B2	Originator publishing an attestation of a statement Methods, systems and apparatuses for an originator publishing an attestation of a statement are disclosed. One method includes obtaining information, wherein the information includes the attestation of the statement, wherein the statement includes at least a portion of the information to be attested to, and wherein the attestation includes a context describing conditions of the attestation, and wherein the attestation includes a cryptographic signature of the context and the statement. The method further includes validating the information. The method further includes communicating after validating the information the information to a destination while maintaining at least one of data privacy or data provenance, including creating a new statement by transforming the statement to a form suitable for the destination, creating, by the computing device, a new attestation by signing the new statement with a new context specific to the computing device, and making available the new attestation to the destination.
US09172709B2	Secure network portal According to one embodiment, a secure network portal includes a number of application servers coupled to one or more clients through a portal server. The application servers serve a number of secure services that may be consumed by clients. The portal server creates a login session with a graphical user interface in which the login session is associated with a particular authorization level. The portal server then displays a service access point for each of the plurality of secure services and restricts access to each of the secure services according to the authorization level of the login session.
US09172708B2	Computing system for managing data Various embodiments are described for systems and methods for managing data. The system may include a device group configured for peer-to-peer communications, the device group including a computing device and one or more peer computing devices. The system includes a cross device application programming interface (API) that is implemented as a device group API client executed on the computing device and each of the peer computing devices. Each device group API client includes a permissions module that is configured to determine whether a request satisfies a device-group-specific permission for access to data stored on any device associated with the device group. Upon authorization of the request, a file storage module is configured to retrieve and output the requested file.
US09172695B2	System and method to provide built-in and mobile VPN connectivity A system and method for facilitating the establishment of a virtual private network between a network and a remote computer, the system having: a mobile device connectable to the remote computer and storing a user profile, virtual private network information, and password information; virtual private network software being located on one of the mobile device and the remote computer; an access point communicating with the network; and communication means for communications between the access point and one of the mobile device and the remote computer, wherein the user profile, virtual private network information, and password information is passed to the virtual private network software upon connection of the mobile device to the remote computer, the virtual private network software using the user profile, virtual private network information, and password information to establish a virtual private network through the communications means and the access point to the network.
US09172694B2	Propagating delegated authorized credentials through legacy systems An approach is provided to access resources at legacy systems. In this approach, a resource request destined to a legacy system is receiving from a requestor with the resource request including an access token and being on behalf of a resource owner. A validation process is performed on the access token. If the access token is valid, the approach identifies the resource owner and one or more legacy access tokens used to access the legacy system. Another request is formed with the new request including the legacy access tokens. The new request is transmitted to the legacy system and a response is received back from the legacy system. The response received from the legacy system is transmitted back to the requestor.
US09172691B2	System for secure enrollment and secure verification of network users by a centralized identification service A system and method for providing, as a service over a computer network (especially a packet-switched computer network) to a body of merchants connected to the computer network, verification of consumer identification based on data provided over the computer network by scanning devices attached to the computers operated by consumers.
US09172689B2	Image processing apparatus, method of controlling the same and storage medium thereof An image processing apparatus that communicates with a server that has a microblogging function performs user authentication processing and follows a user authenticated by the user authentication processing in accordance with the performing user authentication processing succeeding.
US09172683B2	Method and apparatus for key distribution with implicit offline authorization In a Digital Rights Management (DRM) system, cryptographic keys for decrypting distributed assets (such as audio or video media) are distributed using an offline (e.g., non-Internet) method for distribution of the key generation process, with an implicit authorization to use the distributed key generation process. This is used to update an asset key for use by a client such as a media player when a key formula for generating the key for decrypting an asset has been compromised, such as by hackers.
US09172682B2	Local authentication in proxy SSL tunnels using a client-side proxy agent A traffic management device (TMD), system, and processor-readable storage medium are directed towards reducing a number of login web pages served by a server device over an end-to-end encrypted connection. In one embodiment, a TMD intercepts and processes requests for content addressed to the server device. The TMD may serve a stored copy of a login page corresponding to the requested content to the client device. In response, the client device may submit login information associated with the login page to the TMD. The TMD may extract the login information from the submitted response and send a request to the server device to authenticate the client device based on the extracted login information. If the client device is authenticated, the TMD may transmit a ‘login successful’ page to the client device.
US09172681B2	Digital social network trust propagation A trust propagation system is disclosed that propagates trust data based on established trust relationships. The trust system may automatically propagate trust data between parties A and C based on trust relationships with a common party B. Trust data may include authentication data such as biometric data, encryption data, passwords, etc. that may be used to conduct exclusive communications.
US09172680B2	Systems and methods for enabling secure messaging, command, and control of remote devices, communicated via a short message service or other message oriented communications mediums Given the rise in popularity of communicating personal, private, sensitive, or vital peer-to-peer or peer-to-group information over potentially insecure text messaging infrastructure, it would be desirable to provide a solution that enables the exchange of this type of information securely over at least one path via data and/or voice networks. Furthermore, it would be highly desirable to enable access to the secure exchange of information over the at least one path by a given entity, as well as other computer applications that the given entity may use.
US09172672B2	Communication streams Embodiments described herein organize and percolate important messaging and information to the top of a communications pile, and create a high ratio of front-and-center communication versus chatter communication. This is analogous to creating a high signal-to-noise ratio in signal communications. Thus, embodiments described herein raise the desired signal level high above the noise level to obtain a visual at-a-glance level of communication with reduced clutter or no clutter.
US09172669B2	Apparatus, methods and computer-readable storage media for security provisioning at a communication device Apparatus, methods and computer-readable storage medium are provided for security provisioning at a communication device. In some embodiments, a method can include: executing a high security application on a communication device based, at least, on detecting that high security is enabled for the communication device and detecting execution of a low security application; outputting, via a user interface (UI), information configured to detect an entry to the communication device; detecting an entry at the UI of the communication device; determining whether the entry corresponds to security access information stored in the communication device; and providing access to the communication device based, at least, on determining that the entry corresponds to the security access information.
US09172666B2	Locating a user based on aggregated tweet content associated with a location A user submitting a query from a computer at an unknown location is located using a language model. The language model is derived from an aggregation of tweets that were sent from known locations.
US09172663B2	Method and apparatus for replicating network information base in a distributed network control system with multiple controller instances A network control system that includes several controllers for managing several switching elements. Each controller includes a network information base (NIB) storage that stores data regarding the switching elements and a secondary storage for facilitating replication of at least a portion of data across the NIB storages of the different controllers. In some embodiments, the primary purpose for one or more of the secondary storage structures is to back up the data in the NIB. In these or other embodiments, one or more of the secondary storage structures serve a purpose other than backing up the data in the NIB. In some embodiments, the NIB is stored in system memory while the system operates for fast access of the NIB records. In some embodiments, one or more of the secondary storage structures are stored on disks which can be slower to access.
US09172662B2	Virtual chassis system control protocols A virtual chassis system includes a plurality of network nodes configured with a master virtual chassis address. The network nodes are connected by virtual fabric link (VFLs) that provide a connection for exchange of data packets between the network nodes. The data packets include source MAC addresses and associated hardware device information, such as source chassis ID, source network interface identifier and source port identifier information. The network nodes use this information to maintain synchronized MAC address tables for forwarding of data packets in the virtual chassis system. One or more control protocols in the network node are used for topology discovery, master network node election, generation of routing tables, health monitoring and other functions.
US09172657B2	Technique for resource creation in a cloud computing system A technique for creating a resource in a cloud computing system is described. A method implementation of this technique comprises providing a plurality of predefined base resource descriptions, each base resource description defining a base resource in the cloud computing system and specifying one or more properties of the base resource, providing a plurality of predefined modifiers, each modifier being applicable to a resource in the cloud computing system to add, remove or change a property of the resource, wherein each modifier is associated with metrics information, and receiving a resource request indicating one or more desired properties for a target resource in the cloud computing system. In response to receipt of the resource request, a selection operation is performed to select a base resource description and one or more modifiers that are to be applied to the base resource corresponding to the selected base resource description to create the target resource in the cloud computing system, wherein the selection operation is based on the metrics information. In a next step, the selected base resource description is deployed to create the corresponding base resource in the cloud computing system, and application of the selected modifiers to the base resource in the cloud computing system is triggered to create the target resource.
US09172654B2	Transfer device and transfer method A transfer device increments a value of a phase ID at predetermined time intervals, and registers a packet ID of a transmitted data packet and a phase ID on a determination table in an associated manner. When having received a response packet from a receiving-side transfer device, the transfer device determines an unarrived packet on the basis of received packet IDs contained in the received response packet and packet IDs of transmitted data packets. Then, the transfer device determines whether a data packet corresponding to the unarrived packet is lost or on-the-fly from a relationship between a phase ID of the unarrived packet and the maximum phase contained in the received response packet, and retransmits the corresponding data packet only if it is lost.
US09172649B2	Traffic classification and control on a network node A system is configured to receive traffic being transported via a network; obtain, as a result of receiving the traffic, content from one or more packets associated with the traffic; analyze the content to identify one or more attributes associated with the content, where the one or more attributes correspond to at least one of: a network address, information associated with an application with which the traffic is associated, information associated with message content, or information associated with software content; determining that at least one attribute, of the one or more attributes, matches an attribute, of a set of attributes that are stored within a memory, where the set of attributes corresponds to a set of categories of traffic; identify a category, of the set of categories, that corresponds to the attribute; associate the category and the traffic; and process the traffic based on the associated category.
US09172644B2	System and method for automatically adapting audio packet marking in a packet network Disclosed herein are systems, methods, and computer-readable storage media for managing a packet network to deal with a problem of dropped audio packets. A triggering event signal indicates that audio marked packet traffic in the packet network has exceeded a capacity limit. Upon receiving the triggering event signal, a transmitting device transmits audio packets marked as non-audio packets through the packet network. The transmitting device, for example, is a VoIP telephone. The triggering event signal, for example, is generated when the audio marked packet traffic exceeds a dropped packet threshold, or when monitoring of audio marked packet traffic indicates that audio marked packet traffic approaches a committed data rate (CDR) threshold.
US09172641B2	Server interconnection system, server, and data forwarding method A server interconnection system includes three switches each having n downlink ports and an uplink port, wherein n is an integer equal to or larger than 2; and m servers each having at least two network interface cards respectively connected to downlink ports of different switches, wherein m=3p/2, p is an even number equal to or larger than 2 but equal to or less than n, wherein every three servers form a group. A first server connects to a downlink port of a first switch and a downlink port of a second switch via two network interface cards. A second server connects to a downlink port of the first switch and a downlink port of a third switch via two network interface cards. A third server connects to a downlink port of the second switch and a downlink port of the third switch via two network interface cards.
US09172640B2	Frameworks and interfaces for offload device-based packet processing High-speed processing of packets to, and from, a virtualization environment can be provided while utilizing hardware-based segmentation offload and other such functionality. A hardware vendor such as a network interface card (NIC) manufacturer can enable the hardware to support open and proprietary stateless tunneling in conjunction with a protocol such as single root I/O virtualization (SR-IOV) in order to implement a virtualized overlay network. The hardware can utilize various rules, for example, that can be used by the NIC to perform certain actions, such as to encapsulate egress packets and decapsulate packets.
US09172634B2	Restarting a line card A method and a network device for preventing service disruption during a restart of a line card. The line card including a CPU control system and a forwarding system. Information on the CPU control system is stored in a predetermined storage and a flag is set prior to the restart of the line card. The stored information includes configuration information of the forwarding system and protocol state information of the CPU control system. The CPU control system is restarted while the forwarding system is maintained in a state of providing forwarding service. Upon detecting the flag is set during the restart of the CPU control system, the stored information is restored on the CPU control system.
US09172632B2	Optimized content distribution based on metrics derived from the end user Some embodiments provide systems and methods for determining a server of a distributed hosting system to optimally distribute content to an end user. The method includes identifying an IP address of the end user. Based on the IP address, a set of servers send packets to the end user to derive performance metrics. The performance metrics are used to determine a server from the set of servers that optimally distributes content to the end user. The method modifies a configuration for resolving end user requests such that the optimal server is identified to the end user when the end user requests content from the hosting system. Some embodiments determine the optimal server by providing downloadable content that is embedded with a monitoring tool. The monitoring tool causes the end user to derive performance metrics for the hosting system when downloading a particular object from a set of servers.
US09172628B2	Dynamic distribution of nodes on a multi-node computer system I/O nodes are dynamically distributed on a multi-node computing system. An I/O configuration mechanism located in the service node of a multi-node computer system controls the distribution of the I/O nodes. The I/O configuration mechanism uses job information located in a job record to initially configure the I/O node distribution. The I/O configuration mechanism further monitors the I/O performance of the executing job to then dynamically adjusts the I/O node distribution based on the I/O performance of the executing job.
US09172627B2	Device and related method for dynamic traffic mirroring A function is provided in a network system for the dynamic mirroring of network traffic for a variety of purposes including the identification of characteristics of the traffic. Multiple criteria are established for when, what and where to mirror the traffic. The criteria include what frames of traffic to mirror, what portions of the selected frames to mirror, one or more portals through which to mirror the selected frames, a destination for the mirroring and the establishment of a mirror in a device to carry out the mirroring. The criteria may also include when to stop the mirroring. The mirroring instructions can be changed based on the detection of a triggering event, such as authentication, device type or status, ownership of an attached function attached to the device, flow status, but not limited to that. The function may be established in one or more devices of the network.
US09172624B1	Determining physical connectivity of data center devices A patch panel device has communication ports respectively associated with a unique binary number having a number of binary digits, and a plurality of computing devices are each respectively coupled to at least one of the ports. A connectivity test includes configuring the patch panel device to send a message to a first sending device in response to receiving data at a port associated with a binary number having a first value as the respective binary digit, and not to send a message to a second sending device in response to receiving data at a port associated with a binary number having a second value as the respective binary digit. Each of the computing devices is caused to transmit data for arrival at a corresponding port, an indication is received for each device regarding whether the device received a message. A connectivity map is generated.
US09172618B2	Data storage system to optimize revenue realized under multiple service level agreements A data storage system comprising a Quality of Service server to optimize revenue realized under multiple service level agreements with a data storage client.
US09172615B2	System and methods for enabling customer network control in third-party computing environments The present invention relates to a system and methods for enabling a user control in third-party computing environments or cloud computing via a virtual private network created by a control module, which contains parameters defined by the user. The system and methods are used to create a fault tolerant virtual private network that allows user control over addressing, security encryption, routing, and the enablement of multicast protocols, regardless of the prohibition set by the third-party computing environment.
US09172613B2	Multiple topology routing architecture in computer networks In a multiple interface, low power and lossy network comprising a plurality of nodes, a low transmission power and medium transmission power topology are defined for the network and a channel-hopping schedule is defined for the devices operating in each topology. A sender determines that data is capable of being transmitted via a link on the low transmission power topology. The sender determines the transmission parameters for the transmission of the data over the link on the low transmission power topology and determines a low transmission power channel for transmission of the data. The sender transmits the determined channel and the transmission parameters to the receiver. The sender transmits the data via the determined channel in the low transmission power topology.
US09172612B2	Network device configuration management by physical location A method of managing a network including maintaining a database of network configuration profiles, each network configuration profile corresponding to a network device type and a physical location relative to the network, determining with a network device a physical location of the network device relative to the network upon the network device being initially connected to the network, the network device being of a network device type, and determining a network configuration profile with which to configure the network device from the database based on the physical location and the network device type of the network device.
US09172603B2	WAN optimizer for logical networks Some embodiments provide a non-transitory machine readable medium of a controller of a network control system for configuring a wide area network (WAN) optimizer instance to implement a WAN optimizer for a logical network. The controller receives a configuration for the WAN optimizer to optimize network data from the logical network for transmission to another WAN optimizer. The controller identifies several other controllers in the network control system on which to implement the logical network. The controller distributes the configuration for implementation on the WAN optimizer.
US09172602B1	Method and system for auto-negotiation Methods and systems for negotiating between a first network device and a second network device connected to a network, is provided. The method determining if a first port of the first network device having a plurality of Sub-Ports, is auto-negotiation enabled; wherein the plurality of Sub-Ports can be configured to operate independently as a port for sending and receiving information using one of a plurality of network links at a plurality of rates complying with a plurality of protocols; configuring any one or more of the Sub-Ports as one quad lane, two dual lane, one dual lane and two single lane, or four single lane ports; determining if lanes of the first port are physically swapped by identifying which one or more of the Sub-Ports will operate as a lane 0 for communicating with a particular lane 0 of the second network device; and processing auto-negotiation on all lanes.
US09172601B2	Communications links A system including a plurality of remotely configurable telephone network communication terminals (102) is adapted to communicate with a programming terminal (134) over a data network (222) by adding a remote interface means (RIM) (202) for each terminal to convert communications between the terminal to or from a format adapted for transmission over the data network, the programming terminal having a modem emulator (202) having communication and programming capabilities to interface the programming terminal with the network; by converting the programming terminal data to a network compatible format, obtaining an address for the RIM, connecting the programming terminal and the RIM via the data network, connecting the RIM and the communication terminal, transmitting the converted programming terminal data to the RIM, reconstituting the converted data to a format suitable for the communication terminal, and transmitting the reconstituted data to the communication terminal.
US09172600B1	Efficient I/O error analysis and proactive I/O failover to alternate paths for InfiniBand channel An InfiniBand managed storage environment is made up of processor nodes containing HCAs and managed storage devices containing TCAs and exposing a plurality of LUNs and volumes. For each InfiniBand channel between a specific HCA and a specific TCA, the paths between the HCA and any LUN or volume exposed by the TCA are grouped into a set. Occurrence of failures on specific paths of specific sets on specific channels are determined, for example by registering for callbacks or polling for occurrence of events which adversely affect communication between endpoints. Also, I/O operations executed by processor nodes are tracked and failures thereof are detected. When the occurrence of a failure on a specific path of a set is determined, all I/O operations on all paths of the set are proactively rerouted to a separate set on a separate channel that connects the same processor node and storage device.
US09172597B2	Data combiner and splitter In a network coupling redundant controllers to a control system, an electronic device is provided. The device comprises a first interface coupled to the control system addressed using a unique medium access control (MAC) address, a second interface coupled to a first redundant controller, and a third interface coupled to a second redundant controller. The device receives a first message via the first interface and transmits the first message via the second interface and via the third interface. The device receives a second message via the second interface and transmits the second message via the first interface. The device receives a third message via the third interface and transmits the third message via the first interface.
US09172590B2	Single virtual domain fibre channel over ethernet fabric The entire FCoE fabric is a single virtual domain, even though there may be multiple FCFs and FDFs. The virtual domain is a different Domain_ID than any of the FCFs. In certain embodiments there are multiple FCFs, of which one is selected as the master or designated FCF. The master FCF performs normal fabric configuration in conjunction with the Fiber Channel fabric. The master FCF assigns the virtual domain FC node IDs and controls development of subdomain IDs. Virtual links are instantiated between the master FCF and other FCFs, between top level FDFs and the FCFs and between the FDFs at each of various levels. FDFs connected to ENodes proxy the master FCF for most FIP operations. FIP FLOGI and FDISC operations are handled by the master FDF, but the FDFs convert the FIP FLOGI requests to VD_FLOGI requests, which include information about the FDF handling the transaction.
US09172589B2	Method for configuring a distributed avionics control system The present invention relates to a method for configuring synchronous table-driven operations of a distributed avionics control system comprising a plurality of processing nodes (S1-S4) interconnected in a network (2). The method comprises the steps of providing a global timing meta-data component (X4), a plurality of application meta-data components (X51-X52), and a node assignment meta-data component (X 2). The method also comprises the steps of detecting data communication paths, detecting communication requirements, generating a system schedule meta-data component, generating a system configuration data and providing the system configuration to the distributed avionics control system.
US09172586B1	Method and system for writing tag and data A computing device having a processor for executing an application for generating an input/output (I/O) request for writing data to a logical object presented to the application; and a device interfacing with the computing device having a processor for generating a single I/O command for writing data in response to the I/O request and writing a tag that is associated with the data are provided. The tag includes an identifier for the logical object used for writing the data at a storage device and a logical address for a location at the storage device where the data is written. Furthermore, the tag is stored at a memory device of the device, while the data is stored at a local caching device, at a storage area network (SAN) storage device or both.
US09172585B2	Content management apparatus, web server, network system, content management method, content information management method, and program A content management apparatus includes a content storage section configured to store a piece of content together with a content unique identifier; a content transmitter configured to transmit the piece of content together with the content unique identifier to a Web server; an intra-server management identifier receiver configured to receive an intra-server management identifier corresponding to the content unique identifier from the Web server; a management table for storing the content unique identifier and the intra-server management identifier; a content information updating message receiver configured to receive content information on the piece of content and a content information updating message containing the intra-server management identifier from the Web server; an identifier converter configured to convert the intra-server management identifier contained in the content information updating message into the content unique identifier; and a content management section configured to allow the content storage section to store the content information.
US09172582B2	Cellular network call management Management of a call between a calling party that is a mobile terminal in a first cellular network and a called party that is a mobile terminal in a second cellular network is provided by: receiving at an Application Server, AS, of the first cellular network a request to establish a call with the called party from the calling party, the called party being identified in the indication by a circuit-switched identifier; identifying a registration for the called party in the first cellular network using the circuit-switched identifier for the called party, the registration providing a packet-switched identifier for the called party; and setting up a call between the calling party and the called party of the first cellular network by initiating a packet-switched connection from the AS in the first cellular network to the called party in the second cellular network using the packet-switched identifier for the called party.
US09172581B2	Communication system, datacenter apparatus, and control method used in datacenter apparatus According to one embodiment, a communication system includes at least one user apparatus and a datacenter apparatus. The datacenter apparatus includes a processor, a memory and a controller. The processor includes a plurality of containers required to execute a plurality of communication functions associated with the exchange processing between the communication terminals or between the communication terminal and the communication line. The memory stores a user ID used to identify the user apparatus. The controller provides a communication service using at least one of the plurality of containers when a use request of the communication function is received from the user apparatus.
US09172580B1	Selecting transceiver for wireless network based on security keys Systems, methods, and software for operating communication systems and wireless communication devices are provided herein. In one example, a method is provided that includes transferring an access request for delivery to a remote data system, receiving a security challenge transferred by the remote data system, and in response, transferring a security answer for delivery to the remote data system that includes at least one hash result generated in the security portion using at least one of the security keys. The method also includes receiving a security grant transferred by the remote data system indicating one of the hash results, selecting at least one of the transceivers based on an association of the transceivers with one of the security keys used to generate the hash result indicated in the security grant, and transferring the data for delivery to the remote data system over a wireless network associated with the selected transceiver.
US09172579B2	Virtualization of control plane network elements A system includes a first regional network including a first network element; a second regional network including a virtualized control plane network element, the virtualized control plane network element supporting a routing protocol at the first regional network, the routing protocol employing a location-based cost model; and a network connection connecting the virtualized control plane network element to the first regional network, the network connection having a network connection cost, the network connection cost applied in the location-based cost model to support the routing protocol at the first regional network.
US09172578B1	High speed transceiver based on embedded leech lattice constellation A transceiver architectures can comprises an encoder and a decoder for communicating high speed transmissions. The encoder can modulate signal data for being mapped in a constellation that is generated based on a leech lattice. The data can be transmitted at a high speed according to the constellation with an embedded leech lattice configuration in order to generate a coding gain. A decoder operates to decode the received input signal data with a decreased latency or a minimal latency with a high spectral efficiency.
US09172577B2	System and method for orthogonal frequency division multiplexing-offset quadrature amplitude modulation A method for performing orthogonal frequency division multiplexing (OFDM)/offset quantization amplitude modulation (OQAM) includes obtaining a data burst. The method includes performing weighted circularly convolved filtering modulation on the data burst to produce an output signal. The method further includes a first wireless device transmitting the output signal to a second wireless device. The second wireless device receives an input signal from the first wireless device, and the second wireless devices performs weighted circularly convolved demodulation filtering on the input signal to produce the data burst.
US09172576B2	Base station and method of adjusting reference timing on base station An FFT processing unit performs an FFT process on an OFDM signal received by a reception unit. Based on an output signal of the FFT processing unit, an interference wave level acquisition unit obtains a signal level of an interference wave in a unit radio resource not used by the base station with respect to each of a plurality of candidate timings for the reference timing in the base station. A reference timing adjustment unit determines a new timing of the reference timing from the plurality of candidate timings based on the signal level of the interference wave obtained by the interference wave level acquisition unit.
US09172573B2	Method and system for controlling the peak-to-average power ratio of orthogonal frequency-domain signals Systems and methods are presented for controlling the peak-to-average-power of a baseband orthogonal-frequency-domain multiplexing (OFDM) signal by designating a subset of the available subcarriers as information-bearing data-subcarriers, and loading remaining subcarriers by symbols that are a function of the symbols loading the data-subcarriers. At the receiver, the data-dependent subcarriers are optionally combined with data-subcarriers to increase error protection.
US09172568B2	Wireless communication device and wireless communication method A tuner receives a received signal using one of a plurality of transmission formats that use at least one of either a first frequency or a second frequency band. A determination unit determines the transmission format being used in the received signal from among the plurality of transmission formats. In the determination unit, a pattern matching unit stores in advance a plurality of patterns respectively expressing a received waveform of a preamble in each of the plurality of transmission formats, conducts a pattern matching process between the received signal and the each of the plurality of patterns, and obtains a correlation value. A transmission mode determination unit determines the transmission format being used in the received signal on the basis of the correlation value.
US09172565B2	Signaling between master and slave components using a shared communication node of the master component In one aspect, a system includes a master component having a communication node; and a plurality of slave components. Each slave component has a bidirectional node. The slave components are configured to each store data in response to a trigger signal received at the bidirectional node from the communication node.
US09172562B2	Calibration circuit, integrated circuit having calibration circuit, and calibration method A calibration circuit for calibrating a device to be calibrated includes a variable current generator, a device under test and a control unit. The variable current generator is coupled to a first node of a reference voltage and configured to generate a variable current responsive to variations of the reference voltage. The device under test is a copy of at least one portion of the device to be calibrated, and coupled to the variable current generator to derive, at a second node, a voltage dependent on the variable current. The control unit is coupled to the second node to receive the derived voltage and configured to compare the derived voltage with the reference voltage and to generate, based on a comparison result, at least one calibration signal for adjusting an adjustable electrical parameter of the device under test and the device to be calibrated.
US09172557B2	Load balancing overlay network traffic using a teamed set of network interface cards A system includes a server including: logic adapted for receiving traffic from a virtual machine (VM), the traffic including at least one packet, logic adapted for hashing at least a portion of the at least one packet according to a hashing algorithm to obtain a hash value, and logic adapted for selecting an uplink based on the hash value; at least one accelerated network interface card (NIC), each accelerated NIC including: network ports including multiple Peripheral Component Interconnect express (PCIe) ports adapted for communicating with the server and a network, each network port including an uplink, logic adapted for encapsulating the at least one packet into an overlay-encapsulated packet, logic adapted for storing a media access control (MAC) address corresponding to the selected uplink as a source MAC (SMAC) address in an outer header of the overlay-encapsulated packet, and logic adapted for sending the overlay-encapsulated packet via the selected uplink.
US09172556B2	Method and apparatus for routing between fibre channel fabrics An interfabric link between two separate Fiber Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. In a second embodiment the external ports are configured as NL_ports and the connections between the virtual switches are E_ports. The virtual switches in the interfabric switch match domains with their external counterparts so that the virtual switches effectively form their own fabric.
US09172555B2	Distribution apparatus, communication system and communication method Distribution apparatuses include databases for storing data received from ECUs, and further include receiving buffers and sending buffers. The distribution apparatus continuously performs, in parallel, an operation for storing received data on the receiving buffer, operation for synchronizing contents of the database with the databases, and an operation for sending data from the sending buffer. Further, the distribution apparatus periodically copies data of the receiving buffer onto the database and data of the database onto the sending buffer.
US09172554B2	Method and network access device for enabling data forwarding between different physical mediums The disclosure discloses a network access device and a method for enabling data forwarding between different physical mediums. The method comprises: a network access device establishing a first Point-to-Point Protocol virtual channel (PPP channel) based on a first physical medium and a second PPP channel based on a second physical medium; the network access device performing channel negotiations with the first PPP channel and with the second PPP channel respectively, and the network access device setting a relationship between the first PPP channel and the second PPP channel to be a binding relationship, when the channel negotiations of the two virtual channels succeed, to enable data forwarding between the first physical medium and the second physical medium. The disclosure can enable data forwarding quickly and efficiently. The networking mode is simple and the operation cost is low.
US09172551B2	Reliable multicast with automatic session startup and client backfill support A form of multicast, referred to as “on-demand multicast,” provides a methodology that allows for “on demand” multicasting of data. On-demand multicast allows clients to join or leave a transmission at any point. There is no transmission session start or end time—the session is continuously available, although data is not necessarily continuously transmitted. Data blocks missed by late-joining clients are retransmitted per amalgamated client requests through multiple transmission cycles until all clients that have joined the transmission session receive all content. Once a client has received all data blocks comprising the content for the session, the client may exit the ongoing session.
US09172543B2	Determining CRL size in view of system capability A certificate revocation list (CRL) deployment system loads a portion of test data that represents revoked certificates into a cache at periodic intervals and generates a CRL for a corresponding periodic interval using the test data that is loaded in the cache at that corresponding periodic interval. The CRL deployment system determines a CRL size that the server computing system is capable to support using the generated CRLs and notifies a user of the CRL size that the server computing system is capable to support.
US09172542B2	System and method to pass a private encryption key A method and system may include receiving, by a certificate authority computing device, a request to provision and provide a private key. A connection may be established between a requester device and a network for identification. The identity of the requester device may be verified via a network path utilized by the connection. A secure session with the requester device may be initiated using an intermediate agent on the network. A private key may be provided from the certificate authority to the requester device using the secure session. The private key may be provisioned. The intermediate agent may be connected to the network at a location that provides the requester device with a connection to the network. The intermediate agent may further authenticate the requester device using the location of the connection to the network of the requesting device.
US09172541B2	System and method for pool-based identity generation and use for service access A computer-implemented system and method for pool-based identity generation and use for service access is disclosed. The method in an example embodiment includes seeding an identity generator with a private key; retrieving independently verifiable data corresponding to a service consumer; using the independently verifiable data to create signed assertions corresponding to the service consumer; generating a non-portable identity document associated with the service consumer, the identity document including the signed assertions; signing the identity document with the private key; and conveying the signed identity document to the service consumer via a secure link.
US09172538B2	Secure lock for mobile device A secure lock procedure for mobile devices is disclosed. The secure lock process generally includes detecting a device access attempt at a telecommunication device during a security-enabled boot sequence. The device access attempt may include a cryptographic key, which when detected, initiates a cryptographic authentication operation. The cryptographic authentication operation results in access to one or more resource of the telecommunication device being enabled, when the cryptographic key is determined to be valid, or denied, when the cryptographic key is determined to be invalid. The device access attempt may be associated with a root-level device access attempt or software flash attempt, and the secure lock procedure can be implemented in conjunction with a boot loader stored within a memory of the telecommunication device.
US09172537B1	Array encryption core A scalable and efficient array encryption architecture is provided for encrypting data with a cryptographic algorithm using a variable number of encryption cores. The architecture can be implemented as circuitry in a fixed logic device, or can be configured into a programmable integrated circuit device such as a programmable logic device (PLD). An input arbitration logic circuit may schedule timeslots within the encryption cores to maximize system bandwidth. Each one of the encryption cores may use a plurality of pipelined registers and may support simultaneous encryption operations of multiple data blocks. Each core may provide timeslot availability signals to indicate current or anticipated availability of a timeslot for processing data in that core. The same top-level design may be used for different choices of processing depth, parallelism level, and/or system throughput.
US09172533B2	Method and system for securing communication A method for securing communication between members. The method includes a first member obtaining a secret. An n-bit generator executing on the first member generates a message digest using the first secret. The first member extracts algorithm selector bits and an encryption key from the message digest, and selects an encryption algorithm identified by the algorithm selector bits. The method further includes the first member encrypting a communication using the encryption algorithm and the encryption key to obtain an encrypted communication, and the first member sending, to a second member of the group, the first encrypted communication.
US09172532B1	Multi-tiered encryption system for efficiently regulating use of encryption keys A multi-tiered encryption system efficiently regulates the use of encryption keys to encrypt and decrypt data. The system can include one or more encryption tiers. Each encryption tier can include a computing node programmed to service encryption and/or decryption requests and a key store to store encryption keys. At a root encryption tier, an unencrypted root encryption key can be stored in the key store. Each subsequent encryption tier includes encryption keys that are encrypted by encryption keys stored at a lower encryption tier. The encryption tiers collectively implement an encryption policy in which keys are automatically created and rotated such that a requesting device can request encryption services from the multi-tiered encryption system and receive the encryption services independent of key creation or key rotation and without access to the unencrypted root encryption key.
US09172526B1	IQ-skew adaptation for a symmetric eye in a SerDes receiver Described embodiments provide for, in a receiver circuit, an adaptation process that adjusts the IQ-skew automatically to obtain proper eye centering in a data eye, thereby maximizing horizontal margin of the eye. The IQ-skew adaptation algorithm is realized with a ‘biased’ bang-bang phase detector (BBPD) oof a clock and data recovery circuit (CDR) that biases the weights applied to UP and DOWN outputs of the phase detector, rather than treating them equally. By weighting the BBPD UPs and DOWNs differently, the system locks to the left and right inner corners, and thereby is able to locate the center of the inner eye.
US09172525B2	Method and device for compensating for time path Embodiments of the present disclosure relate to a method and a device for compensating for a time path. In the embodiments of the present disclosure, on the basis of not changing implemented 1588 synchronization architecture, a compensation unit is added on a service board unit, the compensation unit calculates a compensation time value for asymmetrical reception and transmission of fiber links and transfers the compensation time value into the service board unit, and the service board unit implements automatic compensation according to a port status. The method and the device for compensating for a time path according to the embodiments of the present disclosure may implement automatic compensation for receiving and sending fiber links without manually testing the asymmetry of links node by node, so that the embodiments of the present disclosure can be widely applied in time synchronization networks.
US09172522B2	Data transmitter and data receiver A data transmitter for transmitting a data packet to a data receiver via a communication channel includes a generator for generating the data packet and a transmitter for transmitting the data packet. The generator for generating the data packet is configured to generate a data packet having a first data block and a second data block and a predefined first reference sequence and second reference sequence for synchronizing the data receiver, wherein the first reference sequence is longer than the second reference sequence, and wherein in the data packet, the second data block is located between the first reference sequence and the second reference sequence, and the first reference sequence is located between the first data block and the second data block. The transmitter for transmitting the data packet is configured to transmit the data packet to the data receiver via the communication channel.
US09172517B2	Network power optimization via white lists A device and method for controlling radio power in a wireless sensor network. A wireless sensor device includes a wireless transceiver, a white list generator, and power control logic. The wireless transceiver is configured to transmit and receive via a wireless sensor network. The white list generator configured to identify wireless sensor nodes that communicate directly with the wireless sensor device via the wireless sensor network, to identify time slots assigned for communication between the wireless sensor device and each of the identified wireless sensor nodes, and to create and maintain a list of the identified wireless sensor nodes and corresponding time slots. The power control logic is configured to power the transceiver for reception of transmissions from each identified wireless sensor node based on the identified time slots corresponding to the identified wireless sensor node provided in the list.
US09172512B2	System and method for terminal-group based HARQ for cellular integrated D2D communications System and method embodiments are provided to support network communications with groups of UEs. The embodiments include a two-level group-based hybrid-automatic repeat request (HARQ) mechanism and acknowledgement (ACK)/negative ACK (NACK) feedback. An embodiment method includes receiving, at a UE within a virtual multi-point (ViMP) comprising UEs, a data packet for a target UE (TUE) that is broadcasted from a base station (BS) to the ViMP node, decode the data packet, and upon successfully decoding the data packet, broadcasting the data packet to the UEs within the ViMP node until a timer pre-established by the BS expires or an ACK message is received from the TUE or the ViMP node. In an embodiment, broadcasted data received in the ViMP node is re-broadcasted upon receiving a negative acknowledgment (NACK) message from the TUE, a beacon UE, or any of the UEs within the ViMP node.
US09172490B2	Virtual wavelength networks A computer implemented method provisions optical wavelength connections. A set of applications is grouped to form a set of application groups. A single optical connection having a bandwidth is established through a management plane for each of the set of application groups. A set of persistent upper layer connections is then established for each of the set of application groups. The underlying optical connection is adjusted while preserving the state of the upper layer protocols.
US09172488B2	Optical terminating apparatus for optical path network An optical signal terminating apparatus for an optical path network includes: a variable filter selecting an optical signal of a predetermined wavelength path making up any one of a plurality of wavebands included in one wavelength division multiplexing light selected from a plurality of wavelength division multiplexing lights respectively transmitted in parallel via a plurality of optical fibers to a relay node in the optical path network, the variable filter dropping the optical signal to an electric layer, the variable filter including a waveband separator separating the wavelength division multiplexing light into a plurality of wavebands, a waveband selector selecting one waveband from a plurality of wavebands separated by the waveband separator, a wavelength separator separating one waveband selected by the waveband selector into wavelengths, and a drop wavelength selector.
US09172487B2	Method for allocating resource of wireless communication and corresponding user device and base station A base station communicates with a user device in the mode of time division duplexing based on the orthogonal frequency division multiplexing scheme. The physics transmission resource used for communicating between the station and device is divided into a plurality of continuous frames in the time domain, each containing a plurality of sub-frames. The base station can include: a period determination device, for determining the period of the current frame, composed of a predetermined number of frames in a plurality of frames; a judgment device, for determining whether each sub-frame in the current frame is marked as the first or second state; a communication control device, for permitting the base station to communicate with the user device on the sub-frame when it is in the first state, forbidding communication only concerned with the user device performed by the base station on the sub-frame when it is in the second state.
US09172481B2	Automatic multi-generational data caching and recovery An electronic system comprising a receiver module and a mobile device, whereby the receiver module is capable of receiving data transmissions from a network of ground stations and buffering the data for future use, and whereby the receiver module provides a means for making requests for access to this buffered data, and the mobile device is capable of generating requests to the receiver module in order to access the buffered data and of displaying the data or playing the data to an operator.
US09172478B2	Frequency switching method and apparatus for radio data system A method and an apparatus for switching from the main frequency to an Alternative Frequency (AF) providing the same station is provided. The method includes measuring a received signal strength of a main frequency, receiving at least one alternative frequency list, establishing an accumulated alternative frequency list including all previously received alternative frequency lists, comparing the received signal strength of the main frequency with a predefined reference received signal strength, and attempting, when the received signal strength of the main frequency is less than the reference received signal strength, switching to an alternative frequency in the accumulated alternative frequency list.
US09172477B2	Wireless device detection using multiple antennas separated by an RF shield A system comprising one or more interior antenna(s) positioned within an at least partially enclosed operator area of a human operated machine and one or more exterior antenna(s) positioned on an external portion of the human operated machine, with a radio frequency shield positioned between the interior antenna(s) and the exterior antenna(s), is usable with a processing module electrically connected with the antennas for analyzing signals received from the antennas to determine whether a radio frequency generating device is active within the at least partially enclosed operator area.
US09172475B2	Method and apparatus for equalizing link performance Embodiments of the present invention provide a method and an apparatus for equalizing link performance, and relate to the field of optical wavelength division multiplexing. In the present invention, target input power spectra and target output power spectra in all OMS sections in a network and single wave attenuation at a power adjusting point may be concurrently calculated based on link information of the OMS sections, fast adjustment may also be implemented for a complex network topology, and the adjustment may be implemented in a one-off manner to avoid a problem that iteration adjustment is caused by mutual impact of power adjusting points during serial adjustment in a ring network. In addition, it is not required to connect an optical path in the calculation phase, thereby eliminating reliance on a connected optical path in a process for equalizing link performance.
US09172474B2	Method and system for split voltage domain transmitter circuits Methods and systems for a photonically enabled complementary metal-oxide semiconductor (CMOS) chip are disclosed and may comprise in an integrated circuit comprising a driver: amplifying a received signal in a plurality of partial voltage domains, and generating the partial voltage domains in a domain splitter in the driver. A voltage domain boundary value between two partial voltage domains may be controlled utilizing a differential amplifier that samples an output voltage of a cascade amplifier that is an input to the driver and controls a current supplying said cascade amplifier. A series of diodes may be driven in differential mode via the amplified signals. An optical signal may be modulated via the diodes, which may be integrated in a Mach-Zehnder modulator or a ring modulator. The diodes may be connected in a distributed configuration. The amplified signals may be communicated to the diodes via transmission lines, which may be even-mode coupled.
US09172472B2	Method for modulating a carrier light wave Method for modulating a carrier light wave to achieve, a modulated light wave which carries information by symbols selected from a set of at least two different symbols. The light led through each path is phase-shifted by a respective total variable part phase shift, which for each path is the sum of at least three respective variable part phase shifts. Each variable part phase shift for each modulation state assumes one of two respective predetermined values, and each symbol is modulated using a respective combination of two such total variable part phase shifts. The modulation performed by the two paths is a PSK (Phase Shift Keying) modulation scheme, the group of symbols includes 2N unique symbols, the light led through each respective path is phase shifted using 2N−1 variable part phase shifts, and the respective difference between the respective predetermined values is the same for all variable part phase shifts.
US09172469B2	Backdoor diagnostic communication to transceiver module Exemplary embodiments of the invention relate to an optical transceiver module having a diagnostic communications link, wherein the link is configured to access diagnostic and other data contained within the transceiver controller via a backdoor interface. Controller data, including operational parameter values and module setup values, is accessible while the transceiver operates in conjunction with an external host and may be retrieved, and sometimes modified, in real time without interrupting normal transceiver operation or suspending the transmission of data over optical fibers. The data is accessed with an external user device via a backdoor interface on the outside of the transceiver module.
US09172468B2	Optical transceiver with optical receiver electrically isolated from housing and optical transmitter with enhanced heat dissipation to housing An optical transceiver that copes with both the enhanced heat dissipation from heat generating components and the electrical isolation of components processing faint signals from other components generating EMI noises is disclosed. The optical transceiver provides, in addition to a bottom of a frame, a bottom cover made by material with higher thermal conductivity. The former components are directly mounted on the bottom cover through openings in the frame, while, other component to be electrically isolated from the chassis are mounted by putting an insulating support between them and the bottom cover.
US09172464B2	Handshake synchronization method and system based on visible light communication A handshake synchronization method and system based on visible light communication are provided. The method includes: connecting, by a transmitting end, in which a state machine varies with unit time, to a receiving end, the status of a state machine of the receiving end being synchronized with the status of the state machine of the transmitting end; using, by the transmitting end, a pseudocode signal which varies with unit time, to scramble an original signal and a pilot optical signal, and sending, in the form of a visible light signal, the scrambled signal obtained by scrambling; and receiving, by the receiving end, the visible light signal, identifying the scrambled signal of the current period of time by using a pilot optical signal, and decrypting the original signal according to the scrambled signal. Since a visible light signal which is transmitted between a transmitting end and a receiving end is not an original signal, the security of a photonic Internet of Things is improved.
US09172463B2	Systems, methods and devices for detecting infrared noise at a remote control Systems, devices and methods provide feedback about the quality of communication between a device and a remote control. A wireless signal is sent between a controlled device and the remote control. The quality of the signal can be measured and reported to a user, installer, troubleshooter, customer service agent or other person in any manner. Quality may be determined based upon the strength of the received signal as well as the amount of noise that is present. The quality measurements provide feedback that allows a user, installer, customer service representative or other person to change the positions of the device or the remote control, or to take other actions based upon the quality of the wireless signal that is received.
US09172457B2	Frequency re-use for service and gateway beams A method is presented for communicating data in multibeam satellite system utilizing frequency re-use. The method comprises establishing uplink service beams and downlink service beams between a satellite and a plurality of subscriber terminals. A plurality of the uplink service beams are transmitted to the satellite by re-using at least one common uplink frequency channel. A plurality of the downlink service beams are transmitted from the satellite by re-using at least one common downlink frequency channel. The method further comprises establishing at least one uplink feeder beam and at least one downlink feeder beam between the satellite and a gateway terminal. The at least one uplink feeder beam is transmitted to the satellite by further re-using the at least one common uplink frequency channel. The at least one downlink feeder beam is transmitted from the satellite by further re-using the at least one common downlink frequency channel.
US09172454B2	Method and system for calibrating a transceiver array A system and method for compensating phase differences between multiple local oscillators and group delay differences between multiple transceivers. The system may include; an antenna array; a plurality of transceivers connected to said antennas and operatively associated each with a local oscillator (LO), wherein at least some of the transceivers do not share a common LO, and wherein at least some of the LOs are using a common reference oscillator; a common digital beamformer circuit connected to the transceivers; a baseband processor configured to operate the system at a specified communication scheme; and a calibration circuit and software modules configured to eliminate or reduce mismatches and phase deviations between the different transceivers, wherein the calibration circuit and software modules are incorporated in system such that the elimination or reduction of mismatches and phase deviations is non-interrupting with a continuous operation of the system at the specified communication scheme.
US09172448B2	Base-station apparatus, terminal apparatus, communication system, and communication method A base-station apparatus configures a terminal apparatus with information related to mapping between a first channel-state information reference signal and a second channel-state information reference signal and codebook subset restriction information that restricts selection of a codebook subset as feedback information by the terminal apparatus, the codebook subset indicating precoding a weight to perform a first communication and a second communication. Using the information related to the mapping and the codebook subset restriction information, the terminal apparatus selects a codebook to perform the first communication and a codebook to perform the second communication. The terminal apparatus configures the base-station apparatus with information indicating the codebook to perform the first communication and information indicating the codebook to perform the second communication.
US09172444B2	Methods for opportunistic multi-user beamforming in collaborative MIMO-SDMA A system and method for opportunistically designing collaborative beamforming vectors is disclosed for a wireless multiple input, multiple output (MIMO) space division multiple access (SDMA) communication system by sequentially designing beamforming vectors for ranked channels in order to exploit the instantaneous channel conditions to improve per user average SNR performance. Each subscriber station independently transmits information to a base station that allows the base station to determine beamforming vectors for each subscriber station by ranking the subscriber stations by channel strength. Using sequential nullspace methods, the ranked channel matrices are then used to select the channel matrix Hi for the best subscriber station, to design the wi, vi for the best subscriber station as the left and right singular vectors of the MIMO channel matrix Hi, to transform the remaining channels and to continue the process until beamforming vectors are designed for all channels.
US09172439B2	Configuring channel-state information resources used for reference-signal-received-power feedback The initialization of the CoMP Resource Management Set for a given mobile terminal is based, at least in part, on an estimation of the mobile terminal's geographical location, which can be estimated using network positioning of the mobile terminal. One example method begins with the acquisition (410) by a network node of a geographical position estimate for the mobile terminal of interest. The network node then selects (420) a set of one or more CSI-RS resources for measurement by the mobile terminal, based on the estimated geographical position of the mobile terminal. Finally, the network node configures the mobile terminal to measure the selected CSI-RS resources by sending (430) control information identifying the set to the mobile terminal.
US09172438B2	Devices and methods related to controlling UE assumption of interference To control UE assumption of interference there is a controller module to control a plurality of transmission points, each constituted by a set of at least one transmit antenna, to transmit data to another device in a coordinated transmission from at least a subset of the plurality of transmission points. The controller module is configured to allocate, to each resource linked to the subset of the plurality of transmission points, an interference contribution parameter that is indicative of an expected interference contribution originating from said transmission point, and to inform said another device of those resources to which the subset of the plurality of transmission points is linked, together with the respective interference contribution parameter allocated to each resource. Another device reports feedback based on signals which are scaled with the respective interference contribution parameter.
US09172436B2	Wireless power transfer device and wireless power transfer method A wireless power transfer device including: a power transmitter 1 including a power transmission resonator composed of a power transmission coil and a resonant capacitance; and a power receiver including a power receiving resonator composed of a power receiving coil and a resonant capacitance. The wireless power transfer device further includes a power-transmission auxiliary device including an auxiliary resonator composed of an auxiliary coil and a resonant capacitance. The power-transmission auxiliary device and the power transmitter are configured to be disposed so as to face each other, forming a power receiving space for disposing the power receiving coil between the power transmission coil and the auxiliary coil. An efficient power transfer can be performed without providing an adjusting circuit in the power receiver even when the power receiving coil is not appropriately disposed with respect to the power transmission coil.
US09172435B2	Apparatus for power transmission and for inductive communication Apparatus for power transmission and for inductive communication with a track or rail-guided moving object, with a power transmission line which extends along an envisaged path of movement of the object—with which a current collector can make contact—for supplying power to moving loads, a separate data line, at least one communication inductance on the object coupleable magnetically to the data line, and with a communication device which is connected to the communication inductance. The communication device has a modem which operates on the basis of an orthogonal frequency-division multiplexing method at a data rate of at least 50 MBit/s. One end of the data line is connected to a communication device connected to a central control unit and containing a modem of the same type as the communication device in the moving object.
US09172434B2	Communication system using wireless power Provided are apparatuses, systems and methods for performing communication using wireless power. According to one general aspect, a communication device using wireless power may include: a controller configured to determine whether a mutual resonance occurs between a target resonator and a source resonator; and a modulator configured to modulate data based on whether the mutual resonance occurs.
US09172431B2	Channel selection in power line communications A power line communication (PLC) device comprises a processor and a memory coupled to the processor. The memory is configured to store program instructions executable by the processor to cause the PLC device perform operations. One or more time slots are sequentially scan in each of a plurality of frequency bands. A packet transmitted by a second PLC device to the PLC device over one of the plurality of frequency bands is detected. Additional packets received from the second PLC device across the plurality of frequency bands based, at least in part, upon the detected packet are synchronized. The additional packets are organized in a plurality of frames, each of the plurality of frames having been transmitted by the second PLC device to the PLC device over a respective one of the plurality of frequency bands. Each frame has a plurality of time slots, and each time slot has a pair of beacon and bandscan packets, Each bandscan packet includes information indicating a frequency band distinct from any of the plurality of different frequency bands to be used by the second PLC device to communicate with the first PLC device in a direction from the second PLC device to the first PLC device.
US09172425B2	Apparatus and method for ultra wideband communication using dual band pass filter An apparatus and method for ultra wideband (UWB) communication, using a dual band pass filter (BPF) is disclosed. The UWB communication apparatus may include a first BPF performing a first band pass filtering with respect to a UWB signal, a second BPF that has a center frequency differing from a center frequency of the first BPF, and performs a second band pass filtering with respect to the UWB signal, a first envelope detector that detects a size of a first signal filtered in the first BPF, a second envelope detector that detects a size of a second signal filtered in the second BPF, and a demodulator that demodulates a UWB signal, using the size of the first signal and the size of the second signal.
US09172424B2	Network self-synchronization using ultra wide band (UWB) impulse radio (IR) pulse train with unique repetition rates Described herein are techniques for self-synchronization of wireless nodes. For example, the technique may involve determining a repetition rate for receiving a signal from another access point, wherein the repetition rate identifies the another access point. The technique may also involve receiving at the access point an unmodulated impulse radio (IR) ultra wide band (UWB) pulse train from the another access point during a transmission interval associated with the repetition rate. The technique may also involve synchronizing a first clock associated with the access point to a clock associated with the another access point based on the received unmodulated IR UWB pulse train.
US09172423B1	Correlator time delay extraction for wireless acoustic sensors Methods, systems and devices for correlator time delay extraction for wireless acoustic wave devices. A receiver receives an analog signal as a sum of plural different analog coded signals each having a different time delay and matched filters corresponding to the acoustic devices is used to extract the time delay to recover the original plural different analog coded signals. In an embodiment the acoustic devices generate orthogonal-frequency codes signals with block-time-diversity to reduce the cross-correlation “noise” due to multi-codes. The time diversity spreads the tags ensemble energy in time, thereby reducing the time energy density. An estimate of the delay time using the passband frequency phase slope, or in the time domain by using the correlation peak, is obtained.
US09172420B2	Mobile communication terminal The present disclosure discloses a mobile communication terminal comprising: a first antenna, being configured to receive a radio frequency (RF) signal from the outside; a wireless transceiver, being configured to obtain the RF signal and amplifies a down-converted signal in the RF signal into a baseband signal; a baseband processor, being configured to obtain the baseband signal from the wireless transceiver and demodulate the baseband signal to generate a to-be-transmitted signal; the wireless transceiver is further configured to convert the to-be-transmitted signal into an RF signal and output the RF signal from the signal transmitting port; and a second antenna, being configured to obtain the to-be-transmitted RF signal and transmit the to-be-transmitted RF signal. With the above technical solution, the present disclosure solves the problem of insertion loss caused by using a duplexer, thereby lowering the noise level in the transmitting path within the receiving frequency band.
US09172413B2	Method and apparatus for performing wireless communications with aid of successive data processing in multiple iterations A method for performing wireless communications and an associated apparatus are provided, where the method is applied to an electronic device. The method includes the steps of: receiving at least one data stream, wherein each data stream from the at least one data stream is transmitted from a wireless channel; in a first iteration, utilizing a Maximum Likelihood (ML) estimator to perform demapping processing on at least one portion of the at least one data stream to obtain Log-Likelihood Ratios (LLRs) of the first iteration and performing Turbo decoding according to the LLRs of the first iteration to generate resultant LLRs of the first Iteration; and in at least one following iteration, utilizing a Max A Posterior (MAP) estimator to perform demapping processing on at least one portion of the at least one data stream and performing Turbo decoding, successively, in order to cancel interference due to the wireless channel.
US09172412B2	Reducing electromagnetic radiation emitted from high-speed interconnects Systems and methods reduce electromagnetic interference from high speed data carried by wired interconnects with a radio receiver for at least one protected radio frequency band. A spectral encoder changes the encoding of the high speed data to modify its frequency spectrum and reduce its spectral in the protected frequency band. The wired interconnect carries the spectrally encoded data to its destination, where it is spectrally decoded back to its original form. Spectral encoding may include polynomial scrambling. The data may be encoded with different coding parameters in parallel and the best result selected for communication over the wired interconnect. The coding parameters may be changed depending on which radio receivers and/or protected frequency bands are in use at any given time.
US09172408B2	Transmitter supporting two modes A transmitter includes a first channel and a second channel. The first channel includes a first mixer, and is used for processing a first input signal to generate a first output signal; the second channel includes a second mixer, where the second channel does not receive any input signal. When the transmitter is operated under a first mode, both the first mixer and the second mixer receive oscillation signals.
US09172406B2	Pressure resistant housing device for protecting an electromagnetic transmitter A pressure resistant, impact resistant, and corrosion resistant electromagnetic transmitter for pipeline uses and other applications. During use, the ferromagnetic core, the electromagnetic windings, and the other electromagnetic transmission components of the transmitter are entirely contained and sealed within a rugged outer housing.
US09172402B2	Multiple-input and multiple-output carrier aggregation receiver reuse architecture A wireless communication device configured for receiving a wireless multiple-input and multiple-output signal. The wireless communication device includes a first multiple-input and multiple-output carrier aggregation receiver reuse architecture. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a first antenna, a second antenna and a transceiver chip. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a first carrier aggregation receiver path. The wireless communication device also includes a second multiple-input and multiple-output carrier aggregation receiver reuse architecture. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a third antenna, a fourth antenna and a receiver chip. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a second carrier aggregation receiver path.
US09172401B2	Computing device with configurable antenna A computing device with a configurable antenna. The antenna is configured through a switching circuit operating under software control. Operating characteristics of the antenna are configured based on connections between conducting segments established by the switching circuit, allowing the nominal frequency, bandwidth or other characteristics of the antenna to be configured. Because the switching is software controlled, the configurable antenna may be integrated with a software defined radio. The radio and antenna can be reconfigured to support communication according to different wireless technologies at different times or to interleave packets according to different wireless technologies to support concurrent sessions using different wireless technologies.
US09172398B2	Vehicle data abnormality determination device Disclosed is a vehicle data abnormality determination device including a storage unit for pre-storing a 2-byte remainder term which is a result of a CRC arithmetic operation on a target area for arithmetic operations in a predetermined memory area, and an arithmetic operation unit for performing a CRC arithmetic operation while including the 2-byte remainder term in this CRC arithmetic operation. Because when performing the CRC arithmetic operation, the vehicle data abnormality determination device performs the CRC arithmetic operation while including the 2-byte remainder term in this CRC arithmetic operation after performing an arithmetic operation on the target area, the vehicle data abnormality determination device always makes the computed result be zero when the data has not been falsified, and can detect whether or not the data has been falsified easily and properly.
US09172393B2	Tri-level digital-to-analog converter Methods, systems, and apparatuses for converting a digital input signal to an analog output signal are disclosed. A first delta-sigma modulator receives a common mode reference signal and generates a common mode control signal. A data delta-sigma modulator receives a digital input signal and generates a modulated digital input signal. A shuffler receives the modulated digital input signal and the common mode control signal and generates a shuffled digital input signal. A digital to analog converter (DAC) has a plurality of tri-level unit DAC elements each receiving a corresponding portion of the shuffled digital input signal as a first input signal, and receiving second and third input signals. The tri-level unit DAC elements have first outputs coupled together generating a first output signal and second outputs coupled together generating a second output signal. An operational amplifier receives the first and second output signals and generates the analog output signal.
US09172386B2	Method and system for time interleaved analog-to-digital converter timing mismatch estimation and compensation Methods and systems for time interleaved analog-to-digital converter timing mismatch calibration and compensation may comprise receiving an analog signal on a chip, converting the analog signal to a digital signal utilizing a time interleaved analog-to-digital-converter (ADC), and reducing a blocker signal that is generated by timing offsets in the time interleaved ADC by estimating complex coupling coefficients between a desired digital output signal and the blocker signal. A decorrelation algorithm may comprise a symmetric adaptive decorrelation algorithm. The received analog signal may be generated by a calibration tone generator on the chip. An aliased signal may be summed with an output signal from a multiplier. The complex coupling coefficients may be determined utilizing the decorrelation algorithm on the summed signals. A multiplier may be configured to cancel the blocker signal utilizing the determined complex coupling coefficients.
US09172382B2	Semiconductor device and operating method thereof A semiconductor device includes first and second circuits disposed separately from each other. The first circuit may include: a counting unit suitable for generating count codes, each bit of which is cyclically changing, wherein the count codes include a number of toggles of a sampling signal toggling with a preset frequency representing a distance of single round trip of the sampling signal between the first and second circuits; and a pulse generation unit suitable for generating a measurement pulse according to the count codes representing the distance, wherein the pulse generation unit determines a pulse width of the measurement pulse according to the distance.
US09172379B1	Efficient controllers and implementations for elastic buffers Systems and methods relating to an elastic buffer for dynamically adjusting depth of a data-path implemented on an integrated circuit device. The device includes a first flip-flop, a second flip-flop, a multiplexer, and a controller. The first and second flip-flops are arranged in a cascade configuration with the multiplexer interposed therebetween. In certain embodiments, the multiplexer is capable of selecting between input received upstream and the output of the first flip-flop. The controller utilizes control logic to drive the first and second flip-flops and the multiplexer. The first and second flip-flops, and the multiplexer may represent an elastic buffer subunit corresponding to a single bit within a larger elastic buffer, in which a plurality of elastic buffer subunits are cascaded to form the elastic buffer along with a single shared controller.
US09172373B2	Verifying partial good voltage island structures Structures, methods, and systems for designing and verifying integrated circuits including redundant logic blocks are provided. An integrated circuit includes selection logic and selectable logic blocks that are individually controllable by the selection logic. The selectable logic blocks include respective instances of a redundant logic block, and respective instances of an interface logic block that selectively disable the redundant logic blocks in the integrated circuit.
US09172372B2	Apparatuses, circuits, and methods for reducing metastability in data synchronization Apparatuses, circuits, and methods are disclosed for reducing or eliminating unintended operation resin ling from metastability in data synchronization. In one such example apparatus, a sampling circuit is configured to provide four samples of a data input signal. A first and a second of the four samples are associated with a first edge of a latching signal, and a third and a fourth of the four samples are associated with a second edge of the latching signal. A masking circuit is configured to selectively mask a signal corresponding to one of the four samples responsive to the four samples not sharing a common logic level. The masking circuit is also configured to provide a decision signal responsive to selectively masking or not masking the signal.
US09172369B2	Programmable logic device and semiconductor device A programmable logic device having low power consumption with operation speed maintained is provided. The programmable logic device includes a first circuit; a second circuit; a first transistor making electrical connection between the first circuit and the second circuit depending on a potential of a gate of the first transistor; a first switch configured to control supply of a signal to a first node; a second switch configured to control supply of the signal to a second node; a second transistor having a gate and one of a source and a drain that are electrically connected to the first node and having the other of the source and the drain that is electrically connected to the second node; and a capacitor that holds a potential of the signal supplied to the first node.
US09172367B2	Drive unit for switching element In a drive unit for a switching element, a drive circuit changes the switching element between an on-state and an off-state, by controlling a potential difference between a reference terminal, which is one of a pair of ends of a current path of the switching element, and an opening-closing control terminal of the switching element. A determination section determines, if an on-operation command or an off-operation command is inputted as an operation signal for the switching element, whether or not the potential difference has reached a specific value toward which the potential difference shifts, in response to one of the operation commands, with respect to a threshold value by which the switching element is turned on. A forcible processing section removes charge for turning on the switching element from the opening-closing control terminal, if the determination section determines that the potential difference has not reached the specific value.
US09172363B2	Driving an MOS transistor with constant precharging A drive circuit may be configured to switch on an MOS transistor by precharging an input capacitance of the MOS transistor with a substantially constant amount of charge in a precharging phase, and charging the input capacitance with a controlled charging current after the precharging phase.
US09172358B1	Isolation circuit An isolation circuit includes a first multiplexer, a D flip-flop, a second multiplexer, an OR gate, and an AND gate. The first multiplexer selects a data signal or a scan-in signal as a first element output signal according to a scan enable signal. The D flip-flop generates a second element output signal according to the first element output signal. The second element output signal is fed back to the first multiplexer and is used as the data signal. The second multiplexer selects an isolation signal or the second element output signal as a third element output signal according to a test enable signal. The OR gate generates a fourth element output signal according to the scan enable signal and the third element output signal. The AND gate generates a second power domain signal according to a first power domain signal and the fourth element output signal.
US09172357B2	Pulse generator circuit A pulse generator circuit is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator.
US09172355B2	Transmission circuit and signal transmission and reception circuit A transmission circuit includes a first path that connects a first terminal for inputting or outputting signals, and one of a pair of second terminals for outputting or inputting the signals; a second path that connects the first terminal and another one of the pair of second terminals; a first circuit including a first capacitor that is serially inserted in the first path, which is configured to perform single-differential conversion on signals transmitted through the first path, to perform impedance matching, and to supply a bias voltage; a second circuit including a first inductor that is serially inserted in the second path, which is configured to perform single-differential conversion on signals transmitted through the second path, to perform impedance matching, and to supply a bias voltage; and a switch that is connected between the two terminals of the pair of second terminals.
US09172354B2	Analog active low-pass filters Apparatus and methods for high-frequency low-pass filtering are disclosed. A first resistor is operatively coupled between a first node and a second node. A second resistor is operatively coupled between the second node and a third node. An amplifier circuit has a first input operatively coupled to the third node and a first output operatively coupled to a fourth node. The first output is configured to provide a first output signal. A first complex impedance network is operatively coupled between the fourth node and the third node. A first feedback path is operatively coupled between the fourth node and the second node. The first feedback path is configured to invert at least a portion of the first output signal. The first feedback path is further configured to provide a first feedback capacitance at the second node.
US09172353B2	Programmable filter In one example embodiment, a programmable filter is provided, including a plurality of variable-inductance networks and a plurality of variable-capacitance networks. The programmable filter may be implemented in a classical filter topology, with variable-capacitance networks replacing discrete capacitors and variable-inductance networks replacing discrete inductors. An example variable-inductance network comprises a primary inductor with an intermediate tap, and secondary inductor connected at the intermediate tap, with switches for selecting an inductance.
US09172351B2	Piezoelectric resonator having electrode fingers with electrode patches According to embodiments of the present invention, a piezoelectric resonator is provided. The piezoelectric resonator includes a piezoelectric substrate, a first electrode comprising a first plurality of electrode fingers, a second electrode comprising a second plurality of electrode fingers, wherein the first plurality of electrode fingers and the second plurality of electrode fingers are interdigitated, and wherein electrode patches are arranged along the first plurality of electrode fingers and the second plurality of electrode fingers according to a 2-dimensional lattice.
US09172343B2	Volume adjustment based on user-defined curve In some implementations, a user can specify an audio control curve for an audio track. The audio track can include an audio signal that is sampled at a specified rate. The audio control curve can be used to generate an audio control signal that can be sampled at the same rate as the audio signal. The audio signal and the audio control signal can be combined to produce sample-accurate adjustments of the audio signal. In some implementations, the audio control curve can correspond to gain adjustments for the audio signal. In some implementations, the audio control curve can be used to adjust the amplitude of the audio signal at particular frequencies. The audio control curve can be used to adjust treble or bass levels during the playback of an audio track, for example.
US09172339B2	Cascode bias of power MOS transistors There is disclosed a driver circuit for a power amplifier of class D type having a segmented architecture with at least one current branch which can be powered down in a low power mode of operation of the circuit. The branch comprising a switch with a cascode MOS transistor, the circuit further comprises a bias circuitry adapted for dynamically generating a dynamic bias control signal so as to cause the cascode MOS transistor of the switch to be ‘Off’ in the low power mode.
US09172338B2	Transformer-based RF power amplifier Various embodiments include a power amplifier having power amplifier cells located in a die, conductive contacts overlying a surface of the die and coupled to the amplifier cells, and conductive lines overlying a surface of the die between the conductive contacts and coupled to the power amplifier cells. Additional apparatus are described.
US09172337B2	Wideband driver amplifier A wideband driver amplifier with embedded passive filtering and gain peaking is described. The wideband driver amplifier comprises a voltage to current circuit, a passive band-selection filter, and a current to voltage circuit. The driver amplifier features an Embedded CLC-Ladder band-selection filter and thereby immune to process variations.
US09172336B2	Method and apparatus for multilevel power amplification Circuits and methods for performing multilevel power amplification using multiple different supply voltages or states are disclosed. In some embodiments, power amplifiers are provided that switch between three or more supply voltages or states.
US09172334B2	Digital predistortion system and method with extended correction bandwidth The digital predistortion system and method with extended correction bandwidth includes a predistortion system that uses a two-box architecture based on the cascade of a memory polynomial followed by a memoryless predistortion function. The memoryless predistorter is identified offline and used to perform a coarse linearization which cancels out most of the static nonlinearity of the device under test allowing for a reduced observation bandwidth for the synthesis of the memory polynomial predistortion sub-function.
US09172331B2	Power supply circuit A power supply circuit includes: a push-pull amplifier unit which amplifies an input signal with a push-pull amplification protocol; a variable power supply unit which varies, with a control signal, the voltage level of a power supply voltage which is supplied to the push-pull amplifier; a switch control unit which, on the basis of the input signal, outputs the control signal which controls the voltage level of the power supply voltage; and a timing control unit which applies a specified time delay to the input signal. When the control signal rises, the switch control unit causes the control signal to rise at a faster timing, according to the voltage level switch transition timing, than a delay time upon the timing control unit, and when the control signal falls, the switch control unit causes the control signal to fall at the timing of the delay time.
US09172330B2	Nonlinear load pre-distortion for open loop envelope tracking An apparatus for providing envelope tracking (ET), comprising: a power amplifier (PA) load variation pre-distortion, and an open loop ET modulator operatively coupled to the PA load variation pre-distortion, wherein the PA load variation pre-distortion is configured to determine a load variation at a PA supply voltage path based on an input signal received by a PA, and generate a pre-distortion compensation signal using the load variation, and wherein the open loop ET modulator is configured to generate a PA supply voltage on the PA supply voltage path using the pre-distortion compensation signal.
US09172326B2	Speed of light based oscillator frequency An oscillator and a method of fabricating the oscillator are described. The oscillator includes a resonator with a plurality of transmission lines. An oscillation frequency of the oscillator is independent of at least one dimension of the plurality of transmission lines. The oscillator also includes a negative resistance circuit coupled to the resonator that cancels internal loss resistance of the resonator.
US09172324B2	Motor drive system A motor drive system has a brushless motor having coils classified into a group A and a group B, a stator having 12 teeth, around each of which any one of the coils classified into the group A and the group B is wound, and a shaft and a rotor which are provided inside the stator; a controller which applies three-phase voltages to each coil of the group A; a controller which applies the three-phase voltages to each coil of the group B; and a sensor portion which outputs an electric signal according to the rotation angle of the shaft to the controllers. Both the total number of the coils of the group A and the total number of the coils of the group B are 6.
US09172317B2	Apparatus for controlling a multi-winding rotary machine An apparatus for controlling a multi-winding rotary machine including an armature formed of a plurality of winding sets. In the apparatus, a command voltage calculator calculates command voltages to be applied to each winding set so as to control currents detected by a current detector to their respectively corresponding command currents. An interfering voltage calculator calculates, for each of the winding sets, interfering voltages proportional to the rotation speed of the rotary machine. An interfering voltage compensator compensates, for each of the winding sets, the command voltages for their respectively corresponding interfering voltages. An operation unit operates a voltage applicator to apply output values of the interfering voltage compensator to each winding set.
US09172315B2	Driving apparatus for analyzing apparatus Disclosed is an analyzing apparatus including a first drive part (71) for rotating a turntable (101) on which an analyzing device is set, a second drive part (72) selectively engaged with the first drive part (71) to reciprocate the analyzing device, and a third drive part (73) for relatively moving the first drive part (71) and the second drive part (72) a position where the first and second drive parts are engaged with each other and a position where the first and second drive parts are not engaged with each other. Thus in the mixing and agitation of a small amount of fluid, necessary acceleration can be obtained even in a short time.
US09172313B2	Oscillatory wave drive unit and image stabilization device An oscillatory wave drive unit includes at least one vibrator having an electromechanical energy converting element, and at least one supporting member configured to support the at least one vibrator. The oscillatory wave drive unit excites oscillation in the at least one vibrator and moves a moving body in contact with the at least one vibrator by frictional force. The oscillatory wave drive unit includes at least one moving mechanism configured to support the at least one vibrator movably in a plane parallel to the plane where the at least one vibrator and the moving body are in contact with each other, in a second direction intersecting with a first direction in which the at least one vibrator drives the moving body.
US09172307B2	Switching power source device and control IC which are capable of performing constant power control The present invention is a switching power source device which converts AC power of an AC power source into DC power and outputs the DC power, the device including: a rectifying-smoothing circuit configured to output a rectified-smoothed voltage signal obtained by rectifying and smoothing an AC voltage of the AC power source; a transformer having a primary winding, a secondary winding, and an auxiliary winding; a switching element connected to the primary winding of the transformer; and a control circuit configured to turn the switching element on and off based on a voltage signal which is based on an average value of current flowing through the switching element and the rectified-smoothed voltage signal from the rectifying-smoothing circuit.
US09172305B2	DC-to-DC converter with adaptive dead-time control A DC-to-DC converter includes first and second switches connected to each other at a node and biased by PWM pulses. A timing module determines a first time difference between a first edge of a first signal at the node and a first edge of a second signal at a control terminal of the first switch, and a second time difference between a second edge of the first signal and a second edge of the second signal. The first and second edges of the second signal correspond to first and second edges of one of the PWM pulses, respectively. A delay module delays the first and second edges of the second signal based on the first and second time differences, respectively. The delay module delays an edge of one of the PWM pulses based on an amount of change in a voltage output by a charge pump.
US09172303B2	Power management unit systems and methods Systems and methods provide for a power management unit and its operation. The power management unit includes: a step-down power converter configured to receive a first voltage and output a second voltage, wherein the second voltage is less than the first voltage and at least one step-up power converter configured to receive the second voltage and output a third voltage, wherein the third voltage is greater than the second voltage. It also includes an inductive element connected to the step-down power converter and the at least one step-up power converter and configured to store energy and selectively release the stored energy, wherein the inductive element is time shared by both the step-down power converter and the at least one step-up power converter; and a finite state machine configured to control the time sharing of the inductive element.
US09172300B2	Charge-pump voltage divider and associated control method The embodiments of the present invention disclose a charge-pump voltage divider and associated start-up method. The charge-pump voltage divider comprises a start-up circuit that can regulate an inrush current during start up. The start-up circuit comprises a switch, which operates in linear region state during start-up, and operates in switching state after the start-up completes. The charge-pump voltage divider may further comprise a load control switch configured to ensure the start-up is independent of a load current.
US09172299B2	Digital EMI filter The invention provides a digital active EMI filter that removes, minimizes, or reduces unwanted interference (i.e., EMI noise) generated by a power circuit such as, for example, a power converter. Digital active filtering includes digital sampling of the incident noise signal amplitude and frequency, discrete time conversion of the EMI noise source, processing (e.g., inverting) the digital signal, and then constructing an analog output signal (i.e., an EMI compensation signal) which is injected to the input of the power circuit. A digital EMI filter as described herein may be used in both differential-mode and common-mode configurations, and overcomes limitations of passive and active analog EMI filters.
US09172298B2	Fully-controlled bridge rectifying device with surge suppression function The present invention is suitable for a power supply control field, and provides a fully-controlled bridge rectifying device with surge suppression function. In the embodiment of the present invention, the electric equipment uses a fully-controlled bridge rectifying device with surge suppression function comprising a driving module, a first controllable half-bridge module, an isolation driving module, a second controllable half-bridge module, a half-bridge module and a current limiting resistor. At the starting moment of the electric equipment, the first controllable half-bridge module cooperates the half-bridge module to carry out the bridge rectifier for the alternative current to charge the filter capacitor quickly, and the surge is suppressed by the current limiting resistor, when the electrical equipment work from starting state transits to a stable work state, the first controllable half-bridge module cooperates the second controllable half-bridge module to carry out the fully-controlled bridge rectification for the alternative current to provide direct current to the electric device, the whole fully-controlled bridge rectifying device has the advantages of simple structure, low cost and small volume, and also effectively reduces the power consumption of the equipment.
US09172292B2	Hybrid stepping motor There is provided a hybrid stepping motor including a rotor including a plurality of rotor small teeth arranged on an outer circumferential surface thereof, and a stator including a plurality of salient poles, each including a plurality of stator small teeth. The stator small teeth have a predetermined stator tooth thickness and are arranged at a predetermined stator tooth pitch, the rotor small teeth have a predetermined rotor tooth thickness and are arranged at a predetermined rotor tooth pitch, and a facing area which is a difference between an area of attraction poles of the stator small teeth and the rotor small teeth and an area of repulsion poles thereof ranges between a maximum value in a parameter space of a dimensional ratio of the stator and/or the rotor and a threshold value of the maximum value.
US09172288B2	Reinforced flexible temperature sensor A stator winding temperature sensor including at least one sensing wire for connecting to a stator. The sensor also includes a body, including a core material comprising a polyimide substrate having an acrylic adhesive surrounding at least a portion of the sensing wire, and a laminate material over the core material. The body has a thickness adapted to protect the sensing wire. The sensor includes a lead wire for connecting to an external monitoring device. The sensing wire is electrically connected to the lead wire at a lead step portion of the sensor. The sensor further includes a tab extending from the lead wire and encompassing the lead step, the tab including a flexible zone where the tab is surrounded by a polyimide and an adhesive but is not surrounded by fiberglass.
US09172287B2	Actuator configuration for a rotary drive A rotary drive includes: a support structure; and a linear actuator supported by the support structure. The linear actuator includes: a first member; a second member that moves in a linear direction relative to the first member when a drive signal is applied to the linear actuator; and a bearing arrangement supporting the first and second members within the support structure and enabling independent movement of the first member and the second member relative to the support structure. The rotary drive also includes a linear-to-rotary converter to which the second member of the linear actuator is coupled. The linear-to-rotary converter includes an output member having a rotational axis. During operation, the linear-to-rotary converter converts linear reciprocating movement of the second member of the linear actuator to rotary movement of the output member about the rotational axis.
US09172286B2	Leveling motor Disclosed is a leveling motor, which removes a gap from a threaded portion converting a rotating force of the leveling motor into an axial feeding force to minimize a movement error and enable a leveling operation to be precisely controlled, and includes a housing, a shaft axially moving in the housing and having on an outer circumference thereof a threaded portion, a threaded pipe provided on an outer circumference of the shaft and having on an inner circumference thereof a grooved portion that corresponds to the threaded portion, and an elastic member supplying an upward elastic force to the shaft, whereby the threaded portion axially comes into close contact with the grooved portion by the elastic force of the elastic member.
US09172285B2	Linear stepping motor having a plate cover for fixing a bearing in a structure The present invention relates to a linear stepping motor, the motor characterized by: a housing; a stator mounted inside the housing: a rotor rotatively arranged at an inner surface of the stator and mounted with a female screw threaded to a lead screw; a mounting plate fixed at a lateral surface of the housing for passing the lead screw; and a plate cover coupled between the mounting plate and the housing configured to prevent a bearing rotatively supporting the female screw from axially moving, such that the bearing can be securely fixed in a simple structure by the plate cover itself to allow a free design in the size of a central hole of the housing or the size of an outer diameter of a magnet regardless of the size of outer diameter of the bearing, and the bearing is securely fixed to the plate cover by caulking to prevent the bearing from moving axially, whereby vibration and noise can be remarkably reduced to enhance the reliability of the product.
US09172282B2	Electric motor with add-on unit, as well as a method for connecting an electric motor and an add-on unit An electric motor with an add-on unit, such as a gearbox unit, encoder unit or controller unit, and disclosed whereby the electric motor and add-on unit can be firmly connected to each other. For a firm connection, a shrink ring is thermally shrunk on to the electric motor and add-on unit in the area of the joint so that the shrink ring covers the joint. A method is also disclosed for producing the connection, wherein a temperature difference is first created between the shrink ring on the one hand and the electric motor as well as add-on unit on the other hand, whereby furthermore the temperature of the shrink ring is greater than the temperature of the electric motor and add-on unit and whereby the components are then joined together and held so that the shrink ring shrinks on to the electric motor and add-on unit.
US09172281B2	Motor The disclosure discloses a motor including a stator and a mover. The stator and the mover are arranged facing each other so as to be relatively movable via a magnetic air gap. Any one of the stator and the mover includes a yoke, a plurality of teeth, and a plurality of coils. The plurality of teeth are disposed protruding from the yoke to the magnetic air gap side. The plurality of coils are wound around the plurality of teeth. The plurality of coils include, for each phase, coil groups. Each of the coil groups includes a plurality of the coils. The coils are continuously arranged along the relative movement direction and are in-phase with each other and have the same wire diameter with each other. The coil group includes at least one the coil in which a coil width is larger than a teeth pitch.
US09172279B2	Automotive embedded permanent magnet rotary electric machine An automotive embedded permanent magnet rotary electric machine can suppress increases in torque ripples and cogging torque, reduce core loss near a stator, and increase magnetic torque and reluctance torque. In the automotive embedded permanent magnet rotary electric machine, a first permanent magnet and a second permanent magnet that constitute a magnetic pole are embedded so as to line up in a main direction of rotation of magnetic poles of a rotor core and are embedded so as to be radially outwardly convex in a region that extends from a leading end portion to a trailing end portion in the main direction of rotation of the magnetic poles, and the first permanent magnet is formed into an integrated body that extends from the leading end portion in the main direction of rotation of the magnetic poles beyond a pole center toward a trailing side.
US09172276B2	Power transmission device and power transfer system A power transmission device that includes a high-frequency high-voltage generating circuit which applies a high voltage of high frequency between a power transmission device side active electrode and a power transmission device side passive electrode, the power transmission device side passive electrode being disposed in a manner to surround the power transmission device side active electrode and the high-frequency high-voltage generating circuit. An auxiliary high-frequency high-voltage generating circuit is provided between a ground of the power transmission device having a potential substantially equal to the ground potential and the power transmission device side passive electrode. The auxiliary high-frequency high-voltage generating circuit suppresses a potential change of the power reception device side passive electrode relative to the ground potential.
US09172271B2	Parallel control and protection for UPS According to one aspect, embodiments of the invention provide a method of operating a UPS system having a first UPS and a second UPS coupled in parallel to provide output power to a load from a power source, each of the first UPS and the second UPS having an inverter and having a bypass switch, with each UPS configured to operate in one of an inverter mode in which output power is derived from the power source through the inverter, and a bypass mode in which output power is derived from the power source bypassing the inverter, the method comprising powering on the first UPS and the second UPS in the inverter mode of operation, designating one of the first UPS and the second UPS as a master UPS, and controlling the bypass switch of the first UPS and the bypass switch of the second UPS using the master UPS.
US09172269B2	Device and method using a keyboard controller and voltage detection circuitry for battery charging A charging device including a charging circuit, a voltage detection circuit, and a keyboard controller is provided. The charging circuit receives a charging power source, and produces a battery-charging power source at a first node by the charging power source to charge a battery. The voltage detection circuit detects a voltage at the first node, and produces a voltage detection result. The keyboard controller determines whether the voltage at the first node is less than a predetermined voltage according to the voltage detection result, and determines whether a predetermined condition has been satisfied, wherein the predetermined condition includes the voltage at the first node being less than the predetermined voltage, and the keyboard controller is arranged to force the charging circuit to stop producing the battery-charging power source at the first node when the predetermined condition has been satisfied.
US09172267B2	Customer device presentation unit A consumer device presentation unit is disclosed. The consumer device presentation unit includes at least a first electric consumer device including at least a first rechargeable energy storage; at least a first autonomous energy provision unit; and a charge module coupled at least to the first autonomous energy provision unit and the first electric consumer device.
US09172265B2	Battery charger, voltage monitoring device and self-diagnosis method of reference voltage circuit A battery charger includes a battery cell, a reference voltage generating section, an A/D converting section including an A/D converter and a control section. The reference voltage generating section includes a first reference voltage circuit generating a first reference voltage and a second reference voltage circuit generating a second reference voltage equal to the first reference voltage. To diagnose the A/D converter, the first reference voltage circuit is used. To diagnose the first reference voltage circuit, a second A/D conversion value obtained by A/D converting a second divided voltage of the second reference voltage via the A/D converter using the first reference voltage is compared with a first reference value obtained by A/D converting a first divided voltage of the first reference voltage via the A/D converter using the first reference voltage when the first reference voltage circuit is normal.
US09172256B2	Battery management circuit and battery management method for managing battery apparatus A battery management circuit for managing a battery apparatus is provided. The battery apparatus includes at least a first battery unit and a second battery unit connected in parallel. The battery management circuit includes a detection circuit and an adjustment circuit. The detection circuit is arranged to detect a voltage relationship between the first and second battery units to generate a first detection result. The adjustment circuit is coupled to the detection circuit. When the voltage relationship does not meet a predetermined voltage condition, the adjustment circuit is arranged to adjust a voltage of at least one of the first and second battery units in order to make the voltage relationship meet the predetermined voltage condition.
US09172253B2	Apparatus and method for charging a battery pack A battery pack charger and a method of charging a battery pack may properly charge a battery pack regardless of the number of cells in the battery pack. The battery pack charger includes a voltage sensing unit configured to sense an output voltage of the battery pack being charged with a predetermined voltage for a predetermined period, a controller configured to determine a number of cells in the battery pack in accordance with the output voltage, and a power source charge and discharge unit configured to supply a charge voltage to the battery pack, the charge voltage being determined in accordance with the number of cells in the battery pack.
US09172251B2	Controlling the wireless transmission of power based on the efficiency of power transmissions Power is contactlessly supplied from a power transmitting portion to a power receiving portion. A transmitting efficiency detecting portion detects the transmitting efficiency, and a determining portion determines whether the transmitting efficiency is equal to or greater than a specified value. If the transmitted efficiency is less than the specified value, an obstruction may be present so power temporarily stops being transmitted. Power is then periodically transmitted with a minute power and the efficiency is detected. If the efficiency is equal to or greater than the specified value, power starts to be transmitted again with regular power.
US09172249B2	Intelligent microgrid controller A microgrid controller may control the generation, distribution, storage and use of electrical power on a microgrid. Embodiments of a microgrid controller may include inputs for different types of power (e.g. AC and DC) or power sources (e.g. wind and solar), an input for utility grid power, electrical equipment for conditioning the electrical power received from the multiple sources (e.g. rectifiers and inverters), outputs to multiple types of loads (e.g. three-phase AC and single-phase AC) and control circuitry designed to control the generation, storage, distribution and usage of electrical power on the microgrid. Embodiments of microgrid systems may include multiple types of electrical generation sources (e.g. wind, solar, electromechanical and fuel cell), multiple types of electrical loads (e.g. inductive and resistive), electrical storage units (e.g. batteries) and a microgrid controller.
US09172246B2	Phase balancing of power transmission system Phase balancing techniques for power transmission systems are disclosed. In one embodiment, a phase balancing protocol (240) includes executing a first phase balancing protocol (350) in relation to a first power transmission section (400a). A second phase balancing protocol (370) may be executed if the first phase balancing protocol (350) is unable to provide a phase balanced condition. The first phase balancing protocol (350) may utilize a first ordering sequence (364) to rank the current flow on the power lines (16) of the first power transmission section (400a), while the second phase balancing protocol (370) may utilize a second ordering sequence (384) to rank the current flow on the power lines (16) of the first power transmission section (400a). The order sequences (364, 384) are opposite of each other—one ranks the current flows from high-to-low, and the other ranks the current flow from low-to-high.
US09172244B1	Self biased electro-static discharge clamp (ESD) for power rail A circuit with an electro-static discharge clamp coupled to a first power source and second power source. The electro-static discharge clamp includes an NMOS stack and an electro-static discharge detector. The NMOS stack has a first NMOS transistor with a first gate node and a second NMOS transistor with a second gate node. The electro-static discharge detector is configured to control the NMOS stack, and may include three switches. A first switch is configured to switch the first gate node to the second power source. A second switch is configured to switch the first gate node to the second gate node. A third switch is configured to switch the first gate node to the ground.
US09172242B2	Electrostatic discharge protection for three dimensional integrated circuit The present disclosure provides a three dimensional integrated circuit having a plurality of dies. Each die includes a trigger line common to the other dies, the trigger line controlling the power of a power clamp in each respective die, a dedicated electrostatic discharge (ESD) line for each respective die, and an ESD detection circuit connected to the dedicated ESD line and to a first power line common to the other dies. When an input signal is received by the ESD detection circuit of one of the plural dies, the ESD detection circuit generates an output signal to the common trigger line to supply power to the power clamp in each of the plural dies to clamp ESD voltage or current to the common first power line or a second power line.
US09172231B2	Arrangement configuration of bus bars In an arrangement configuration of bus bars including a plurality of bus bars having a connecting portion provided at a center portion thereof and a housing integrally molded while exposing the connecting portions of the plurality of bus bars, the bus bar has a pair of bending portions that is bent so that both edge sides come close to each other, the plurality of bus bars is arranged in parallel to each other so that the pair of bending portions is located adjacent to each other, and the housing is integrally molded so as to cover the pair of bending portions of each of the plurality of bus bars.
US09172229B2	Wire harness securing structure A wire harness securing structure secures a wire harness to a panel using a wire harness clip having a plate portion and a latch portion provided at the plate portion to be press-fitted to a hole of the panel. The latch portion includes a post extending from the plate portion and a pair of latch pieces extending from an end of the post toward the plate portion and having an end which engages with an edge of the hole. The plate portion and the wire harness are covered and secured by the self-adhesive sheet. A surface of the self-adhesive sheet facing the panel contacts with the end of the latch piece before the latch portion is press-fitted. When the latch portion is press-fitted and latched to the hole, the adhesive sheet between the plate portion and the panel is compressed and contacts firmly with an outer periphery of the hole.
US09172228B2	Electrical fittings with integral cover plate and method of use thereof An electrical fitting that comprises an integral cover plate and an electrical component, such as an outlet or a switch, the combined electrical component/cover plate being secured via screws through the cover plate into a wall box. Wires are secured to power wires coming from the wall box via quick-connectors or wirenuts.
US09172223B2	Cable manipulator A cable manipulator includes a base and a plurality of plates attached to the base, each of the plurality of plates including a pair of cams attached to each plate. Each cam of the pair of cams is spaced from each other such that a length of cable can be inserted therebetween. At least one of the plurality of plates is a rotatable plate such that rotation of the rotatable plate causes an end of the cable to be moved closer to the cable manipulator.
US09172221B2	Converter building A converter building including at least one room having a solid room wall enclosing an interior space and an electrical active part contained in the interior space, the room wall having at least one opening, which is designed such that it allows a human to enter the interior space. The opening is sealable, the room wall encloses the interior space in a gas-tight manner when the opening is sealed, and the interior space contains a dielectric insulation medium including a dielectric insulation component other than air.
US09172220B1	Configurable modular power control system A modular power control system is provided and includes a base enclosure, wherein the base enclosure and a base enclosure door, wherein the base enclosure defines a base enclosure cavity and the base enclosure door defines a base enclosure door cavity. Additionally, a module enclosure is provided and includes a module enclosure top, a module enclosure bottom, and two module enclosure sides, wherein the module enclose defines a module enclosure cavity and a module enclosure internal support, wherein the module enclosure internal support includes a module enclosure internal support rear and two module enclosure internal support sides having a first module guide channel located on one of the two module enclosure internal support sides and a second module guide channel located on the other of the two module enclosure internal support side.
US09172218B2	Electrical junction box An electrical junction box of the present invention includes a frame (11) in which a storing box B is formed which has a unit storing room (20) in which an electronic control unit (63) is accommodated, and an upper cover (15) which is assembled to the side of the frame (11) where a accommodating port (20a), which becomes an entrance when the electronic control unit (63) is accommodated in the unit storing room (20), is formed so that the accommodating port (20a) is closed.
US09172217B2	Pre-chamber spark plug with tubular electrode and method of manufacturing same A pre-chamber spark plug that includes a shell, and an end cap attached to the shell. Additionally, the pre-chamber spark plug includes an insulator disposed within the shell. In a particular embodiment, a center electrode has a first portion surrounded by the insulator, and a second portion that extends from the insulator into a pre-chamber. The pre-chamber defined by the shell and end cap. In a further embodiment, a ground electrode is attached to the shell. In particular embodiments, the ground electrode is tubular in shape and includes an inner spark surface ring spaced in surrounding relation to the center electrode to create a spark gap, an outer ring attached to the shell, and a plurality of rounded spokes connecting the inner and outer rings. In a particular embodiment, the ground and center electrodes accommodate attachment of precious metal alloys to increase electrode surface life.
US09172216B2	Prechamber sparkplug A pre-chamber sparkplug is suggested with a central electrode, with at least one ground electrode, which is distanced from the central electrode forming a spark gap, and with at least one transfer bore in a pre-chamber cap. The ground electrode comprises an internal circumferential area, which faces the central electrode, and an external circumferential area, which faces away from the central electrode. The internal circumferential area of the ground electrode shows a concave progression in the longitudinal direction of the pre-chamber sparkplug, subjected to a tensile force, and the external circumferential area shows a convex progression in the longitudinal direction of the pre-chamber sparkplug, subjected to a pressure.
US09172215B2	Spark plug having center electrode tip of varying widths A spark plug includes a tip joined to a center electrode. The coefficient of linear thermal expansion of the center electrode is greater than that of the tip. The tip has a gap-forming portion having a maximum width of 1.2 mm or greater and forming a gap in cooperation with the ground electrode and a to-be-joined portion joined to the center electrode. At a position A which is shifted 0.1 mm from the forward end of the outer surface of the fusion portion toward the forward end side, the width of the to-be-joined portion measured on the cross section is smaller than the width of the gap-forming portion. The to-be-joined portion satisfies Dtw/Dw≦1.1, where Dtw represents the width of the to-be-joined portion at the position A, and Dw represents the width of the fusion portion at the forward end of the outer surface thereof.
US09172214B2	Spark plug comprising early recovery from a fuel bridge A spark plug includes a center electrode, a ceramic insulator provided with an axial hole, a metal shell, and a ground electrode having a facing surface that faces a leading end surface of the center electrode. An annular space is formed between an outer peripheral surface of the center electrode and an inner peripheral surface of the axial hole and is opened toward a leading end side, and when C (mm) is a distance between the outer peripheral surface of the center electrode and the inner peripheral surface of the axial hole in the opening of the annular space, C≧0.2 mm is satisfied. In a cross-section which includes the axial line and is orthogonal to the center axis of the ground electrode, a contour line of lateral surfaces of the ground electrode has a curved shape convexed outward.
US09172212B2	Tunable semiconductor laser diode A tunable LD with reduced number of the butt joint is disclosed. The tunable LD includes the reflector and a waveguide core. The reflector includes a plurality of segments each having a grating region and a space region adjacent to the grating region. The waveguide core includes a gain region extending in two segments adjacent to each other and a tuning region extending in two segments adjacent to each other and also adjacent to the segment for the gain region.
US09172208B1	Raman beam combining for laser brightness enhancement An optical source capable of enhanced scaling of pulse energy and brightness utilizes an ensemble of single-aperture fiber lasers as pump sources, with each such fiber laser operating at acceptable pulse energy levels. Beam combining involves stimulated Raman scattering using a Stokes' shifted seed beam, the latter of which is optimized in terms of its temporal and spectral properties. Beams from fiber lasers can thus be combined to attain pulses with peak energies in excess of the fiber laser self-focusing limit of 4 MW while retaining the advantages of a fiber laser system of high average power with good beam quality.
US09172205B2	Method for oscillating an optical vortex laser and optical vortex laser oscillation device Provided is an optical vortex laser oscillation device which is capable of an increased out and can generate an optical vortex even in a wide frequency range and if the optical vortex has a quantum number which is not an integer. A laser device according to one embodiment of the present application comprises: a laser light source for generating laser light; an optical vortex generation unit for generating an energized optical vortex on the basis of the laser light generated by the laser light source; and an optical resonance unit for resonating the energized optical vortex generated by the optical vortex generation unit and dividing the energized optical vortex into signal light and idler light. Therein, it is preferable that the optical resonance unit comprises a non-liner medium and a pair of resonator mirrors sandwiching the non-linear medium, and it is preferable that the non-linear medium includes at least one among KTiOPO4, periodically polarization-reversed LiNbO3, and periodically polarization-reversed LiTaO3.
US09172204B2	Method for adjusting electro-optic modulator in laser device, and laser device A laser device includes: a signal light source that outputs seed light; an electro-optic modulator that chops a portion of the seed light outputted from the signal light source and outputs signal light; an optical amplifier that amplifies the signal light outputted from the electro-optic modulator; a wavelength conversion optical element that wavelength converts the signal light amplified by the optical amplifier; a converted light detector that detects the signal light that has been wavelength converted by the wavelength conversion optical element; and an EU control unit that controls the operation of the electro-optic modulator, wherein the EU control unit is adapted, in the state in which the seed light is being outputted, to adjust bias voltage of the electro-optic modulator on the basis of the applied voltage when the intensity of the signal light after wavelength conversion detected by the converted light detector becomes substantially maximum.
US09172199B2	Electrical fixture secured to a junction box via a cover plate having an electrical connector An electrical fixture includes an electrical fixture housing having a mounting surface, an electrical connector disposed on the mounting surface, and an electrical fixture support. A corresponding cover plate includes an electrical connector configured to electrically connect to hot and neutral lines from a junction box and the corresponding electrical connector disposed on the mounting surface of the electrical fixture. An electrical fixture ground connection separate from the fixture electrical connector electrically connects to an electrical ground from the junction box.
US09172194B2	Coaxial connector plug An outer conductor has a substantially cylindrical shape extending in an axial direction. A center conductor has a substantially cylindrical shape extending in the axial direction, and is provided inside the outer conductor. An insulator fixes the center conductor relative to the outer conductor. The center conductor is provided with a hole that communicates with the inside and the outside of the center conductor. The insulator extends, via the hole, to the inside of the center conductor from the outside.
US09172193B2	Joint connector extending structure and joint connector A joint connector extending structure includes first and second connector terminals, first and second housings for housing the first and second connector terminals, and a joint connector configured to fit in first and second cutouts of the first and second housings laid on top of one another to engage with male contacts of the first and second connector terminals housed in the first and second housings thereby to conduct the first and second connector terminals and integrate the first and second housings.
US09172191B2	Housing for electrical connection between a foil conductor and a conductor A housing having an electrical connection between a conductor and a foil conductor is described. An inlet opening (8) of the housing is rounded off at entry edges thereof on at least one side for the foil conductor, such that the inlet opening increasingly expands in an outward direction.
US09172190B2	Connector A connector to be detachably fitted with a connecting object such as a flexible printed circuit board or flexible flat cable, includes a plurality of contacts each having a contact portion adapted to contact the connecting object, a housing arranging and holding therein the contacts and having a fitting opening into which the connecting object is inserted, and a pivoting member rotatably or pivotally mounted on the housing. According to the invention, an auxiliary member having an engaging unit for engaging the pivoting member is mounted on the pivoting member at its predetermined position. With the aid of the auxiliary member, the pivoting member can be easily rotated or pivotally moved.
US09172189B2	High speed modular jack having central shield A modular jack includes an insulative housing, a set of central shields, and a set of insert modules. The modular jack defines a mounting port. Each insert module includes a printed circuit broad assembly (PCBA) disposed horizontally in the mounting port and a terminal module located below the PCBA. The terminal module has a set of first terminals, a set of second terminals, and an insulative carrier holding the first and second terminals. Each central shield is disposed between two adjacent insert modules and mounted to the insulative housing. The central shield has a metal wafer and an insulative body for holding the metal wafer. The insulative body includes a pressing face extending along a front-to-back direction and the insulative carrier has a receiving pressure face extending along the front-to-back direction. Each terminal has a mounting portion for electrically and mechanically engaged with an exterior PCB.
US09172184B2	Lever connector A fitting lever (30) includes housing coupling substrates (31) which are coupled to the outside surfaces of a first connector housing (10), cam plates (32) which are coupled to the central parts of the housing coupling substrates (31), and a lever body 33 which is an operating part to pivot the cam plates (32). The cam plates (32) include cam grooves (322a, 322b) into which the connector housings (10, 20) are fitted with each other with pivoting, and engagement opening grooves (323) which make the cam plates (32) detachable from the connector housings when the cam plates (32) are moved to a pivoting final position N2.
US09172180B2	Canalphone coupler system and method A canalphone system may include a canalphone coupler, and four connectors carried by the canalphone coupler of which at least two of the four connectors carry an acoustical signal. The system may also include a mechanical joint that joins the canalphone coupler to a cable where the mechanical joint is assembled and disassembled by a user.
US09172176B2	Panel mount digital card connector assembly A digital card connector assembly (10) for mounting to a panel (100) having a slot (101) whereby a digital card (90) may be inserted into the digital card connector assembly to communicate with an electronic device (95). The digital card connector assembly includes a connector body (10), a cable assembly (50), and a radio frequency (RF) shield (30). The connector body has a plurality of electrical contacts configured to make contact with a plurality of electrical contacts of the digital card when the digital card is inserted into the digital card connector assembly. The cable assembly has a plurality of electrical conductors (87) electrically connected to the plurality of electrical contacts of the connector body. The RF shield is affixed to the connector body and is configured to make electrical contact with the panel when the digital card connector assembly is mounted to the panel.
US09172175B2	Underwater electrical connection and termination assemblies An underwater electrical connection assembly may include a contact pin including an axially extending conductive core and an axially extending annular insulation portion around said conductive core, a front end portion of the conductive core having an electrical contact surface, a rear end portion of the conductive core having an electrical contact surface, and an intermediate portion of the conductive core extending axially at an intermediate location between the front and rear end portions, wherein the rear end portion of the conductive core of the pin has a diameter larger than the diameter of the intermediate portion thereof, and wherein the annular insulation portion includes an inner insulating layer around the intermediate portion of the conductive core and an insulating sleeve around the inner insulating layer.
US09172174B2	Electrical connection socket having insulating seats stacked together An electrical connection socket includes: at least two insulating seats each having a base and terminals to form at least one contact interface, wherein one end of the base of at least one insulating seat is projected to form at least one tongue, the base is thicker than the tongue, the tongue has the contact interface, and the bases of the at least two insulating seats are stacked; a metal casing covering the at least two insulating seats and having one end formed with an opening, the metal casing at least directly resting against one of the insulating seats; and at least two connection slots disposed in the metal casing, wherein the tongue is disposed in a connection slot, and the contact interface to be electrically connected to a plug is disposed in each connection slot.
US09172173B2	Structure universal serial bus connector This invention relates to an improved structure of USB connector, particularly relating to the structure of USB connector its bottom having a reading slot for memory card. An insulating base having a slice extending from the insulating base, the top of an insulating base and a slice is hollowly equipped with a number of terminal grooves which are arranged every other line for inlaying USB terminals. Mainly the bottom of an insulating base is equipped with grooves whose middle is protrudently equipped with a number of inlaying strips which are arranged every other line, and the rear of the grooves is protrudently equipped with bumps which are corresponding to the inlaying strips. The spaces between each inlaying strip and each bump are provided for inlaying the connecting terminals. In addition, both sides of an insulating base are equipped with inlaying grooves for inlaying a -shape hook which is provided for pressing each connecting terminal not to be loosened. Furthermore, one side of the bottom of an insulting base is protrudently equipped with a guiding slice and inlaying groove for inlaying a top locking spring. Also, a metal shell can fixedly be inserted to an insulating base forming aforementioned a USB connector having upper slot and rear reading slot of memory card.
US09172172B2	Connector A guide connector includes a first movable body, a second movable body, a box-like body capable of accommodating the movable bodies, and a lid. The guide connector is positioned below a substrate. Contacts are inserted into a female connector after passing through contact insertion holes to of the guide connector and penetrating the substrate. After the electrical connection between the contacts and female contacts are respectively established, a slider is pressed down, which causes pressing pins and to press the first movable body and the second movable body. With this, a lower stage of the first movable body and a lower stage of the second movable body detach from restriction beams. This allows springs to extend, to move the first movable body and the second movable body away from the contacts.
US09172171B2	Connector housing with fixed ended lance and removal jig for the same A connector housing includes a terminal accommodating chamber, a lance and a pair of arms. The terminal accommodating chamber is formed with an opening configured such that a terminal is inserted therethrough. The lance extends from a top wall of the terminal accommodating chamber toward the opening in an extending direction. The pair of arms are respectively formed integrally to both lateral side surfaces of the lance, extend from both the lateral side surfaces to front and back sides of the lance in the extending direction, and are connected to a bottom wall of the terminal accommodating chamber. An unlocking protrusion is formed in one of the arms.
US09172168B2	Connector, connector device, and battery unit A connector is provided with a first housing, a second housing attached to the first housing and forming a contact receiving portion jointly with the first housing, and a contact at least partially received in the contact receiving portion. The second housing is attached to the first housing so as to be movable in a predetermined direction relative to the first housing. The contact is received in the contact receiving portion in a state where the contact is not fixed to the first housing or the second housing so as to be movable relative to the first housing and the second housing.
US09172166B2	Press-fit terminal and terminal press-fit structure To provide a press-fit terminal and a terminal press-fit structure that enable shortening of a press-fit portion in its longitudinal direction and miniaturization of a connector. A press-fit terminal has insertion stoppers that are projectingly provided on respective flanks of a press-fit portion and that have respective engagement surfaces oriented orthogonally to a press-fit direction; and holding projections that are projectingly provided on respective protruding leading-end faces of the insertion stoppers and that bite into interior side walls of a press-fit hole of a housing which receives the press-fit portion. Each of the holding projections is projectingly formed in a portion of the protruding leading-end face of the insertion stopper along its thicknesswise direction.
US09172165B1	Memory module connector assembly An apparatus includes a memory module connector assembly physically secured along an edge of a printed circuit board. The printed circuit board includes a first plurality of contacts on a first surface of the printed circuit board and a second plurality of contacts on a second surface of the printed circuit board. The memory module connector assembly includes a first edge connector socket for receiving a first memory module, a second edge connector socket for receiving a second memory module, a first plurality of electrical leads electrically connecting contacts within the first edge connector socket to the first plurality of contacts on the first side of the printed circuit board, and a second plurality of electrical leads electrically connecting contacts within the second edge connector socket to the second plurality of contacts on the second side of the printed circuit board.
US09172151B2	Structure for connecting electric wire to crimp terminal A metallic cover having at one longitudinal end thereof a half pipe region having a circular-arc cross sectional shape and at other longitudinal end thereof an annular region having a substantially circular cross sectional shape is fitted to a conductor at an end of an electric wire. The half pipe region is situated at a leading end of the conductor so as to cover a space above the conductor, and the annular region is fitted around an outer periphery of the conductor. The end of the electric wire equipped with the cover is set on a bottom plate of an electric wire connecting region while the conductor exposed outside an open area of the half pipe region remains oriented toward the bottom plate. Conductor crimping pieces and sheath crimping pieces are folded inward in that state, thereby being crimped and crimped.
US09172149B2	Cable assembly with improved wire management A cable assembly comprises: an insulative housing; a plurality of contacts received into the insulative housing; a spacer assembled to a rear end of the insulative housing; a wire management assembled to a rear end of the spacer, and a cable electrically connected to the rear ends of the plurality of contacts. The wire management defines a plurality of first and second channels formed on top surfaces. Each of second channel defines a rear inlet and two front outlets. The cable comprises several pairs of signal wires received into the corresponding second channels. Each differential pair of signal wires comprises two signal conductors, a grounding conductor and a shielding layer surrounding the two signal conductors and a grounding conductors. Two front ends of the two signal conductors are exposed out of the shielding layer and extending out of the wire management through two outlets.
US09172147B1	Ultra wide band antenna element Antenna unit cells suitable for use in antenna arrays are disclosed, as are antenna arrays and mounting platform such as an aircraft comprising antenna unit cells. In one embodiment, an antenna unit cell comprises a signal feed line, a ground plane, a first antenna element comprising a first antenna arm coupled to the signal feed line and a second antenna arm coupled to the ground plane, and a first narrow-band conductor coupled to the first antenna arm and to the ground plane. Other embodiments may be described.
US09172145B2	Transmit/receive daughter card with integral circulator A mixed-signal, multilayer printed wiring board fabricated in a single lamination step is described. The PWB includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the PWB. The PWB includes a number of unit cells with radiating elements and an RF cage disposed around each unit cell to isolate the unit cell. A plurality of flip-chip circuits are disposed on an external surface of the PWB and a heat sink can be disposed over the flip chip components.
US09172142B2	Horizontal radiation antenna This disclosure provides a horizontal radiation antenna. The antenna includes a back-surface-side grounded conductor plate on a back surface of a substrate, a radiation element to which a coplanar line is connected on the front surface of the substrate, and a passive element closer to an end portion side of the substrate than the radiation element. A front-surface-side grounded conductor plate is provided at a substantially same height as the radiation element with respect to a thickness direction of the substrate, and a conductive wall surface capable of reflecting a high-frequency signal radiated from the radiation element is provided between the front-surface-side grounded conductor plate and the back-surface-side grounded conductor plate.
US09172141B2	Antenna, antenna apparatus, and communication apparatus The claimed invention discloses an antenna including: a magnetic core (11); a coil winding section (14a, 14b) in which a conductive wiring line is wound around the magnetic core; and an adjustment section (13) connected to one end of the coil winding section. The adjustment section (13) is disposed at an end part of the magnetic core (11) and includes a plurality of adjustable conductive wiring lines (13b-13d) formed by dividing a conductive wiring line connected to one end of the coil winding section (14a, 14b) into multiple conductive wiring lines in a direction intersecting with a winding axis direction of the coil winding section (14a, 14b).
US09172132B2	Integrated antenna for RFIC package applications A chip package includes a set of layers including conductive planes connected by vias. A first portion has at least one antenna, antenna ground plane, and first grounded vias. A second portion has a conductive plane parallel to the ground plane that forms an interface for connecting to at least one integrated circuit device. A third portion between the first and the second portion has a vertical transmission line that includes a signal via connecting the antenna feed line to the at least one integrated circuit and a parallel-plate mode suppression mechanism. The parallel-plate mode suppression mechanism includes a grounded reflector that forms a cage with the grounded vias around an antenna region and further includes second ground vias surrounding the signal via.
US09172131B2	Semiconductor structure having aperture antenna The semiconductor package includes a first substrate having a first surface and a second surface opposite to the first surface. A circuit portion is formed on the first surface of the substrate, wherein the circuit portion includes a wave guiding slot and a microstrip line overlapping the wave guiding slot. A chip is disposed on the circuit portion. An antenna is formed on the second surface of the substrate, wherein the antenna overlaps the wave guiding slot.
US09172125B1	Non-reciprocal circuit element In a non-reciprocal circuit element, first to third center conductors intersect one another in an insulated state around a microwave magnetic body, and first ends of the first to third center conductors define first to third ports. A first capacitance element is connected to the first center conductor in parallel and a second capacitance element is connected to the second center conductor in parallel, and the other ends of the first to third center conductors are connected to one another and are grounded via a first inductance element and a third capacitance element that are connected in series. A second inductance element is connected to one end of the center conductor in parallel, and the other end of the second inductance element is grounded. A fourth capacitance element is connected to a connection point between the one end of the center conductor and the second inductance element, and the other end of the fourth capacitance element is connected to a third terminal.
US09172124B2	Photoelectrode material and photocell material A photoelectric conversion material is obtained through easy processing from a substance containing silicon oxide, which is inexpensive, imposes no burden on the environment, and is stable, as a component. This material can be used in a photocell and a secondary photocell. Any of synthetic quartz, fused quartz glass, soda-lime glass, non-alkali glass, and borosilicate glass, which are compositions containing silicon oxide, is pulverized, immersed in an aqueous solution of halogen acid, washed with water, and dried. The resultant material is deposited on an electrode plate and this electrode plate is placed in water where an appropriate electrolyte is mixed. This electrode plate is electrically connected to an opposite electrode to provide a photoelectrode. The material may be enclosed in a container, mixed with an organic electrolyte, having an extraction electrode and an opposite electrode, to provide a photocell.
US09172119B2	Mobile terminal and method for controlling charging thereof For a mobile terminal and a method for controlling charging thereof, when the remaining power amount of a power supply, including first and second power sources, is less than a minimum power consumption amount required for a call, power is charged using the second power source. The remaining power amount resulting from the charging is compared with a power consumption amount corresponding to a callable time, and information that is associated with the callable time corresponding to a result of the comparison is outputted.
US09172116B2	System and method for remote management of electric vehicle charge profiles The described principles provide a method and system for assisting a user of an electric vehicle in maintaining a charge state of the chargeable onboard energy storage system. In an implementation, an intuitive remote interface allows the user to create, modify, save and select profiles. The user may select a profile to apply at a current time as well as optionally at a later time. A profile may have a date limitation or day of week limitation in addition to a time limitation. In an implementation, the user may opt to apply a selected profile to a plurality of vehicles. A linkage with utility data allows for the use of rate-based criteria in an implementation.
US09172114B2	Solid state catholytes and electrolytes for energy storage devices The present invention provides an energy storage device comprising a cathode region or other element. The device has a major active region comprising a plurality of first active regions spatially disposed within the cathode region. The major active region expands or contracts from a first volume to a second volume during a period of a charge and discharge. The device has a catholyte material spatially confined within a spatial region of the cathode region and spatially disposed within spatial regions not occupied by the first active regions. The device has a protective material formed overlying exposed regions of the cathode material to substantially maintain the sulfur species within the catholyte material. Also included is a novel dopant configuration of the LiaMPbSc (LMPS) [M=Si, Ge, and/or Sn] containing material.
US09172113B2	Sulfide solid electrolyte material, lithium solid-state battery, and method for producing sulfide solid electrolyte material A sulfide solid electrolyte material contains glass ceramics that contains Li, A, X, and S, and has peaks at 2θ=20.2° and 23.6° in X-ray diffraction measurement with CuKα line. A is at least one kind of P, Si, Ge, Al, and B, and X is a halogen. A method for producing a sulfide solid electrolyte material includes amorphizing a raw material composition containing Li2S, a sulfide of A, and LiX to synthesize sulfide glass, and heating the sulfide glass at a heat treatment temperature equal to or more than a crystallization temperature thereof to synthesize glass ceramics having peaks at 2θ=20.2° and 23.6° in X-ray diffraction measurement with CuKα line, in which a ratio of the LiX contained in the raw material composition and the heat treatment temperature are controlled to obtain the glass ceramics.
US09172111B2	Layered materials with improved magnesium intercalation for rechargeable magnesium ion cells Electrochemical devices which incorporate cathode materials that include layered crystalline compounds for which a structural modification has been achieved which increases the diffusion rate of multi-valent ions into and out of the cathode materials. Examples in which the layer spacing of the layered electrode materials is modified to have a specific spacing range such that the spacing is optimal for diffusion of magnesium ions are presented. An electrochemical cell comprised of a positive intercalation electrode, a negative metal electrode, and a separator impregnated with a nonaqeuous electrolyte solution containing multi-valent ions and arranged between the positive electrode and the negative electrode active material is described.
US09172109B2	Electrode assembly and secondary battery using the same An electrode assembly includes first and second electrode plates respectively comprising first and second active material portions on which first and second active materials are coated and first and second non-coating portions on which the first and second active materials are not coated; a separator interposed between the first and second electrode plates; and first and second electrode tabs respectively coupled to the first and second non-coating portions. In the electrode assembly, portions of the first and second non-coating portions are opposite to each other but the first and second electrode tabs are not opposite to each other in the electrode plates. The electrode assembly is formed by winding the first and second electrode plates from the portion at which the first and second non-coating portions are opposite to each other. A secondary battery includes the electrode assembly and a case accommodating the electrode assembly therein.
US09172107B2	Composite proton conducting electrolyte with improved additives for fuel cells Additives can be used to prepare polymer electrolyte for membrane electrode assemblies in polymer electrolyte fuel cells in order to improve both durability and performance. The additives are chemical complexes comprising certain metal and organic ligand components.
US09172106B2	Fuel cell microporous layer with microchannels One embodiment of the invention includes a product comprising: a solid polyelectrolyte membrane having a first face and an opposite second face; a first catalyst layer overlying the first face of the membrane; a first microporous layer overlying the first catalyst layer, and wherein the first microporous layer includes a plurality of microchannels formed therein open toward the first catalyst layer; and wherein each of the microchannels of the first microporous layer are defined by a surface that is free of cracks.
US09172102B2	Fuel cell system having improved fuel gas circulation The invention relates to a fuel cell system (1, 2) having at least one or more fuel cells (10, 30), wherein the fuel cell (10, 30) extends between a first cell end (10a, 30a) and a second cell end (10b, 30b) in a tubular shape, and wherein the fuel cell (10, 30) is mechanically received with the first cell end (10a, 30a) on an inflow distributor unit (11, 33), and wherein a fuel gas flows through the fuel cell (10, 30), the gas entering the first cell end (10a, 30a) and exiting one of the cell ends (10a, 10b, 30a, 30b) as exhaust gas. According to the invention, means (12, 16, 18, 32) are provided which suction at least a part of the exhaust gas exiting the fuel cell (10) and feed said gas to the inflow distributor unit (11, 33) for recirculation.
US09172101B2	Attachment for a fuel tank of a fuel cell powered system and electronic portable device equipped therewith An attachment for a fuel tank of a fuel cell powered system is described. The attachment thermally conducts heat generated from an electronic component to the fuel tank. The attachment further affixes to the electronic component by a securing portion. In one aspect, the attachment is comprised in a fuel cell powered electronic device. In another aspect, the attachment is integral to the fuel tank.
US09172099B2	Nano-fibers for electrical power generation A fibrous sheet for fuel cell or battery applications is formed by electrospinning a fluorinated ion-conducting polymer solution to form an agglomeration of fibers.
US09172091B2	Core-shell type anode active material for lithium secondary batteries, method for preparing the same and lithium secondary batteries comprising the same Provided are a core-shell type anode active material for lithium secondary batteries including a carbonaceous material core; and a shell formed outside the carbonaceous material core, the shell including a PTC (Positive Temperature Coefficient) medium. The core-shell type anode active material for lithium secondary batteries has the shell including the PTC medium, and thus has the improved conductivity and high output density, exhibiting excellent electrical characteristics. And, a lithium secondary battery manufactured using the anode active material has excellent safety, in particular safety against overcharge and external short circuit.
US09172090B2	Electrochemical device comprising lithium manganese borate compounds The present invention generally relates to certain lithium materials, including lithium manganese borate materials. Such materials are of interest in various applications such as energy storage. Certain aspects of the invention are directed to lithium manganese borate materials, for example, having the formula LixMny(BO3). In some cases, the lithium manganese borate materials may include other elements, such as iron, magnesium, copper, zinc, calcium, etc. The lithium manganese borate materials, according to one set of embodiments, may be present as a monoclinic crystal system. Such materials may surprisingly exhibit relatively high energy storage capacities, for example, at least about 96 mA h/g. Other aspects of the invention relate to devices comprising such materials, methods of making such materials, kits for making such materials, methods of promoting the making or use of such materials, and the like.
US09172089B2	Anode active material, method of preparing the same, anode including the anode active material, and lithium battery including the anode An anode active material including: a core having a molybdenum-based material; and a coating layer formed on at least a portion of a surface of the core, wherein the coating layer comprises at least one material selected from the group consisting of molybdenum oxynitride and molybdenum nitride, a method of preparing the same, and an anode and a lithium battery.
US09172085B2	Electrode including current collector with nano-scale coating and method of making the same Current collectors and methods are provided that relate to electrodes that are useful in electrochemical cells. The provided current collectors include a metallic substrate, a substantially uniform nano-scale carbon coating, and an active electrode material. The coating has a maximum thickness of less than about 200 nanometers.
US09172083B2	Lithium ion secondary battery The lithium-ion secondary battery provided by the present invention comprises a positive electrode, a negative electrode, and a non-aqueous liquid electrolyte. The positive electrode comprises as a primary component of its positive electrode active material, a lithium-containing olivine compound. The positive electrode further comprises 2 to 20 parts by mass of an activated carbon relative to 100 parts by mass of the positive electrode active material.
US09172080B2	Electrode production system An electrode production system is configured so that a metal foil is folded back a plurality of times and conveyed by a plurality of rollers that are disposed for a coating device, a drying device and a pressing device. A coating process, a drying process and a pressing process are serially performed by the coating device, the drying device and the pressing device, respectively, by using the rollers. This makes it possible to unwind the rolled metal foil and convey the metal foil in the up-and-down direction. The coating device, the drying device and the pressing device can be integrated and thus the size of the electrode production system can be reduced. Furthermore, since a small-size electrode production system can be configured, it is easy to install the electrode production system in a clean and dry environment.
US09172079B2	Rechargeable battery A rechargeable battery includes a case having an interior and an exterior, an electrode assembly having a first electrode and a second electrode, the electrode assembly being disposed in the interior of the case, an electrode terminal, an electrode connection portion, the electrode connection portion being electrically connected to the electrode terminal through a fuse portion, the fuse portion being positioned between and extending between the electrode connection portion and the electrode terminal.
US09172078B2	Energy storage element and method for manufacturing the same An energy storage element includes: a container; an electrode assembly housed in the container; an electrode terminal; a current collector which electrically connects the electrode terminal and the electrode assembly; and an external insulation sealing member for insulating the container and the electrode terminal. The container includes a protrusion part having a through-hole for allowing penetration of the electrode terminal and protruding from the upper surface of the container. The electrode terminal is electrically connected to the current collector in a state where the electrode terminal penetrates through the protrusion part. The external insulation sealing member has a side part disposed along the side surface of the protrusion part, and the end surface of the end part of the side part at the side of the upper surface is apart from the upper surface.
US09172076B2	Membranes suitable for use as separators and electrochemical cells including such separators Disclosed are membranes suitable for use as separators in electrochemical cells as well as electrochemical cells, where the membranes are configured to substantially reduce the passage of multivalent ions therethrough without substantially reducing the permeability of the membranes to lithium ions.
US09172075B2	Battery separators with variable porosity A porous polymer battery separator is provided that includes variable porosity along its length. Such battery separators can increase the uniformity of the current density within electrochemical battery cells that may normally experience higher current density and higher temperatures near their terminal ends than they do near their opposite ends. By disposing a variable porosity separator between the electrodes of an electrochemical cell such that its terminal end has a lower porosity than its opposite end, the transport of ions, such as lithium ions, through the separator can be more restricted in normally high current regions and less restricted in normally low current regions, thereby increasing the overall uniformity of current density within the battery cell. Variable porosity battery separators may be produced by a modified solvent exchange process. The process may include forming a polymer-containing film having a non-uniform thickness, selectively densifiying the film so that it has a non-uniform polymer concentration, and inducing variable porosity in the film.
US09172074B2	Nonwoven material with particle filler A ply includes a fibrous nonwoven web fabric forming a foundational structure, wherein the foundational structure includes fibers forming first pores and is partially filled with particles, wherein the particles at least partially fill the first pores so as to form regions filled with particles, wherein the particles in the filled regions form second pores, and wherein an average diameter of the particles is greater than an average pore size of more than 50% of the second pores.
US09172070B2	Battery pack, holster, and extendible processing and interface platform for mobile devices A battery pack is provided for a mobile communication device, comprising a casing defining a cavity that conforms, at least partially, to the outer shape of the mobile communication device and one or more rechargeable power cells housed within the thickness of the casing. An internal interface engages a corresponding interface on the mobile communication device to provide power from the one or more rechargeable cells to the mobile communication device. An external interface is electrically coupled to the internal interface in order to transmit signals from the mobile communication device to an external device and may further serve to recharge the one or more rechargeable power cells. The battery pack may also serve as an extendible platform by providing additional integrated communication interfaces and/or processors that can be utilized by the mobile communication device to extend its communication and/or processing capabilities.
US09172058B2	Light emitting structure having sub-pixel regions, organic light emitting layers, and a blocking member for emitting different color lights, display device including a light emitting structure and method of manufacturing a display device including a light emitting structure A light emitting structure includes a first hole injection layer, a first organic light emitting layer, a charge generation layer, a second hole injection layer, a second organic light emitting layer, an electron transfer layer, and a blocking member. The light emitting structure has first, second, and third sub-pixel regions. The first organic light emitting layer may be on the first hole injection layer. The charge generation layer may be on the first organic light emitting layer. The second hole injection layer may be on the charge generation layer. The second organic light emitting layer may be on the second hole injection layer. The electron transfer layer may be on the second organic light emitting layer. The blocking member may be at at least one of the first to the third sub-pixel regions.
US09172056B2	Organic light emitting diode with transparent electrode and method of making same A transparent electrode is provided for an organic light emitting diode (OLED) device. The electrode may be made according to a method including: sputter-depositing a first layer of or including indium tin oxide (ITO) on a substrate; sputter-depositing a thin second metallic or substantially metallic layer on the glass substrate over the first layer to form an electrode structure, and heat treating the electrode structure at temperature(s) of at least about 400 degrees C. in order to thermally activate at least the first layer of or including ITO. The electrode structure may then be provided in an OLED device on the light-emitting side of the organic light emitting semiconductor layer.
US09172051B2	Organic light emitting host materials Polyphenylene compounds such as compounds represented by Formulas 1-28 may be used in electronic devices such as organic light-emitting devices. For example, the compounds may be used as host material in an emissive layer.
US09172050B2	Compound and organic light emitting device including the same A compound represented by Formula 1 below and an organic light-emitting device including the compound of Formula 1: wherein Ar1, Ar2, Ar3, Ar4, R1, X, and Y in Formula 1 above are defined as in the specification.
US09172049B2	Solution-processable electron-transport materials and related organic optoelectronic devices Charge transport compounds are provided. The compounds are useful in optoelectronic devices that include the compounds incorporated as a charge-transport layer. Methods for forming films of the compounds are also provided. Additionally, methods are provided for forming films of a charge-transport layer on an active layer of an optoelectronic device. The films are formed from a solution with solubility orthogonal to the solubility of the active layer, such that the active layer is not solvated during deposition of the charge-transport layer.
US09172042B2	Organic, radiation-emitting component and method for producing such a component A method for producing an organic, radiation-emitting component is specified, wherein at least one layer (10) containing an emitter material is produced in a radiation-emitting region (4) of the component, wherein the layer (10) is produced by means of atomic layer deposition and has a thickness of at most 2 nm.
US09172040B2	Resistive memory cell fabrication methods and devices A phase change memory cell and methods of fabricating the same are presented. The memory cell includes a variable resistance region and a top and bottom electrode. The shapes of the variable resistance region and the top electrode are configured to evenly distribute a current with a generally hemispherical current density distribution around the first electrode.
US09172038B2	Nonvolatile memory element and method of manufacturing the same A variable resistance layer between a first electrode and a second electrode includes: a first variable resistance layer contacting the first electrode; and a second variable resistance layer contacting the second electrode and having a lower degree of oxygen deficiency than the first variable resistance layer. A principal face of the first variable resistance layer which is close to the second variable resistance layer is flat. The second variable resistance layer is in contact with both the first variable resistance layer and the second electrode in a polygonal region including a vertex inward of an outline of the variable resistance layer and vertices along the outline when seen from a direction perpendicular to the principal face of the variable resistance layer, and is not in contact with at least one of the first variable resistance layer and the second electrode in a region outside the region inside the polygon.
US09172035B2	Memristors and methods of fabrication Memristors and their fabrication are provided. A first dielectric layer is formed over one or more conductive pathways. Vias are formed in the dielectric layer and filled with conductive material. A second dielectric layer is formed there over, and vias are formed aligned with and extending to the filled vias. A reactant fluid is introduced into the vias such that a reacted portion of the conductive material is defined within the filled vias. The vias in the second dielectric layer are then filled with conductive material such that memristors are defined. Conductive pathways are then formed over and in contact with the memristors such that each is individually addressable.
US09172034B2	Memory diodes A memory cell (32C), including a first non-insulator (34C) and a second non-insulator (40C), different from the first non-insulator. The second non-insulator forms a junction (46C) with the first non-insulator. The cell further includes a first electrode (48C) which is connected to the first non-insulator and a second electrode (50C) which is connected to the second non-insulator. At least one of the first and second non-insulators is chosen from a group consisting of a solid electrolyte and a mixed ionic electronic conductor and has an ionic transference number less than 1 and greater than or equal to 0.5.
US09172033B2	MRAM device and fabrication method thereof A method of forming and a magnetoresistive random access memory (MRAM) device. In an embodiment, the MRAM device includes a magnetic tunnel junction (MTJ) disposed over a bottom electrode, the magnetic tunnel junction having a first sidewall, a top electrode disposed over the magnetic tunnel junction, and a dielectric spacer supported by the magnetic tunnel junction and extending along sidewalls of the top electrode, the dielectric spacer having a second sidewall substantially co-planar with the first sidewall of the magnetic tunnel junction.
US09172031B2	Resistive memory device A resistive memory device includes: a resistive layer which includes a first magnetic layer, a second magnetic layer, and a tunnel insulating layer interposed between the first magnetic layer and the second magnetic layer, and is switched between different resistance states; and a strained film formed over a sidewall of the resistive layer and applying a strain to the resistive layer, wherein the strained film includes a semiconductor material containing ions implanted therein
US09172029B2	Storage element and memory A storage element includes a storage layer, a fixed magnetization layer, a spin barrier layer, and a spin absorption layer. The storage layer stores information based on a magnetization state of a magnetic material. The fixed magnetization layer is provided for the storage layer through a tunnel insulating layer. The spin barrier layer suppresses diffusion of spin-polarized electrons and is provided on the side of the storage layer opposite the fixed magnetization layer. The spin absorption layer is formed of a nonmagnetic metal layer causing spin pumping and provided on the side of the spin barrier layer opposite the storage layer. A direction of magnetization in the storage layer is changed by passing current in a layering direction to inject spin-polarized electrons so that information is recorded in the storage layer and the spin barrier layer includes at least a material selected from oxides, nitrides, and fluorides.
US09172024B2	Ultrasound probe and method of manufacturing ultrasound probe A backing material is provided on the back face side of a piezoelectric transducer, with a first width substantially equal to the piezoelectric transducer widthwise and perpendicular to the radiation direction. A front face of a layer located on the front face side with regard to a wiring pattern has a width substantially equal to the first width. Moreover, the back face of this layer has a second width shorter than the first width. A space is provided between this layer and the backing material due to the difference between the first width and the second width of this layer, and a covering member covering the wiring pattern covers the wiring pattern extending at least from the folded section of the flexible substrate into the space.
US09172021B2	Semiconductor light emitting device According to an embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, an second electrode, a first insulating film, a first interconnection and a second interconnection. The semiconductor layer includes a luminous portion and a non-luminous portion. The first electrode is provided on the luminous portion, and the second electrode is provided on the non-luminous portion. The first insulating film is provided on the semiconductor layer, the first electrode and the second electrode. The first interconnection having a first protrusion is provided on the first insulating film and electrically connected to the first electrode. The second interconnection having a second protrusion is provided on the first insulating film and electrically connected to the second electrode. A tip end of the first protrusion faces a tip end of a second protrusion, being apart therefrom with a minimum gap between the first interconnection and the second interconnection.
US09172020B2	Light emitting diode package and light emitting module comprising the same The present invention provides a light emitting diode package including a light emitting diode chip, a lead frame having a chip area on which the light emitting diode chip is disposed, and a package body having a cavity and supporting the lead frame. The chip area is exposed through the cavity. The lead frame includes a first terminal group disposed at a first side of the chip area and a second terminal group disposed at a second side of the chip area. The first terminal group and the second terminal group each include a first terminal connected to the chip area and a second terminal separated from the chip area. The second terminal of the first terminal group is exposed through the cavity, and the second terminal of the second terminal group is buried in the package body.
US09172019B2	Light emitting device package and method of manufacturing the same A light emitting device package includes a frame unit including at least two lead frames spaced apart from one another and a light emitting region defined by a distance between the two lead frames; a light emitting device mounted on a surface of the frame unit such that the light emitting device is positioned across the light emitting region, and electrically connected to the lead frames; a wavelength conversion unit provided in the light emitting region, and configured to convert a wavelength of light emitted from the light emitting device and emit the light having the converted wavelength; and a reflective molding unit formed on the surface of the frame unit to cover the light emitting device.
US09172015B2	Light emitting device, light emitting device package, and lighting system Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a substrate, a light emitting structure layer, a second electrode, a first electrode, a contact portion, and a first electrode layer. The first electrode is disposed in the substrate from a lower part of the substrate to a lower part of a first conductive type semiconductor layer in a region under an active layer. The contact portion is wider than the first electrode and makes contact with the lower part of the first conductive type semiconductor layer. The first electrode layer is disposed under the substrate and connected to the first electrode.
US09172014B2	Optoelectronic semiconductor chip and method for producing an optoelectronic semiconductor chip An optoelectronic semiconductor chip includes a semiconductor layer sequence having an active layer that generates an electromagnetic radiation and a light exit side, and a light coupling-out layer applied to the light exit side, wherein the light coupling-out layer includes of radiation-inactive nanocrystals composed of a material transmissive to the radiation generated, and a refractive index of the radiation-transmissive material for the radiation is at least 1.9.
US09172013B2	Light emitting device having dual sealing resins Provided is a light emitting device with improved light extracting efficiency and further higher heat releasing performance. A light emitting device includes a planar lead frame having a first lead and a second lead, and includes a light emitting element mounted on the first lead, a resin frame surrounding a periphery of the light emitting element, a first sealing resin filled in the inner side of the resin frame and sealing the light emitting element, and a second sealing resin covering the resin frame and the first sealing resin. Lower end of inner surface of the resin frame is arranged only on the first lead, and at an outside of the resin frame, and the second resin member covers at least a part of the first lead and the second lead. Of the back-surface of the first lead, a region directly under the blight emitting element is exposed.
US09172011B2	Composition for encapsulant, encapsulant, and electronic device A composition for an encapsulant, an encapsulant, and an electronic device, the composition including an adhesion-promoting agent, the adhesion-promoting agent including an epoxy group in an amount of about 2.0 to about 5.0 mmol/g, at least one first polysiloxane that includes a hydrogen bound to a silicon at a terminal end thereof, and at least one second polysiloxane that includes an alkenyl group bound to a silicon at a terminal end thereof.
US09172010B2	Light-emitting device, lighting device, light-emitting device assembly, and method for producing light-emitting device A light-emitting device includes a substrate including a mirror surface region on its upper surface, a semiconductor light-emitting element disposed in the mirror surface region, and an encapsulating layer joined onto the upper surface of the substrate. The encapsulating layer includes a lower layer that is in contact with the upper surface of the substrate, covers the surrounding of the semiconductor light-emitting element, and contains phosphor; and an upper layer that is positioned on the lower layer, and has a larger phosphor content per unit area than that of the lower layer.
US09172009B2	Light-emitting device having an interlayer of a polysiloxane mixture Formation of an interlayer is realized for a light-emitting device, the interlayer having properties of anticorrosion and adhesion to a silicone layer, thus preventing incidence of cracking during a baking process. The light-emitting device includes a light-emitting element covered with the silicone layer, and the interlayer is provided between the light-emitting element and the silicone layer. The interlayer is formed of a mixture of a tri-functional polysiloxane and a tetra-functional polysiloxane.
US09172006B2	Lighting apparatus The invention relates to a lighting apparatus comprising a conversion material (2) for converting primary light (4) into secondary light (5), wherein the conversion material (2) comprises converting photolummescent material (15), which degrades to non-converting photolummescent material over time when the conversion material (2) is illuminated by the primary light (4). The conversion material (2) is adapted such that, when the conversion material (2) is illuminated by the primary light (4), the relative decrease in concentration of the converting photolummescent material (15) within the conversion material (2) is larger than the relative decrease in intensity of the secondary light (5). This allows the lighting apparatus to provide an only slightly reduced absorbance of the primary light, even if a large part of the photolummescent material has been bleached, and thus a longer lifetime, with the same or a slightly reduced intensity of the secondary light.
US09172005B2	Semiconductor light emitting diode having a contact portion and a reflective portion A semiconductor light emitting diode of the present invention includes a semiconductor layer including a light emitting portion, and a pad electrode located on the semiconductor layer, the semiconductor light emitting diode further including, between the semiconductor layer and the pad electrode, a reflective portion including a light transmitting insulating layer serving as a current blocking layer located on the semiconductor layer, and a reflective layer located on the light transmitting insulating layer; a contact portion formed from an ohmic electrode in contact with the reflective portion, located on the semiconductor layer; and a conductive hard film between the reflective layer and the pad electrode, the conductive hard film having HV×t>630, where the Vickers hardness is HV (Hv) and the thickness is t (μm).
US09172001B2	Semiconductor light emitting device with thick metal layers A device according to embodiments of the invention includes a semiconductor structure including a light emitting layer sandwiched between an n-type region and a p-type region and first and second metal contacts, wherein the first metal contact is in direct contact with the n-type region and the second metal contact is in direct contact with the p-type region. First and second metal layers are disposed on the first and second metal contacts, respectively. The first and second metal layers are sufficiently thick to mechanically support the semiconductor structure. A portion of a sidewall the device adjacent to one of the first and second metal layers is reflective.
US09172000B2	Semiconductor light emitting device and method of manufacturing the same Disclosed are a semiconductor light emitting device and a method of manufacturing the same. The method includes providing a substrate having first and second main surfaces opposing each other and forming a first uneven structure in the first main surface, forming a sacrificial layer on the first main surface of the substrate, forming a mask having open regions on the sacrificial layer so as to expose a portion of an upper surface of the sacrificial layer, forming a second uneven structure in the substrate by etching the sacrificial layer and the substrate through the open regions, removing the sacrificial layer and the mask from the substrate, and forming a light emitting stack on the first and second uneven structures of the substrate.
US09171999B2	Thin film transistor array panel and method for manufacturing the same A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer.
US09171998B2	Light emitting lamp Disclosed is a light emitting lamp including a light source module including at least one light source and a light guide layer disposed on a substrate burying the at least one light source, and a housing accommodating the light source module, and the at least one light source includes a body having a cavity, a first lead frame including one end exposed to the cavity and the other end passing through the body and exposed to one surface of the body, a second lead frame including one end exposed to one portion of the surface of the body, the other end exposed to the another portion of the surface of the body, and an intermediate part exposed to the cavity, and at least one light emitting chip including a first semiconductor layer, an active layer and a second semiconductor layer, and disposed on the first lead frame.
US09171997B2	Semiconductor light emitting device A semiconductor light emitting device is provided including a first conductivity-type semiconductor layer, an active layer including at least one quantum barrier layer made of InxGa(1-x)N, wherein 0≦x
US09171995B2	Flip chip type light emitting diode and manufacturing method thereof The present disclosure provides a flip chip type light emitting diode which comprises a substrate and a light emitting diode chip. The substrate comprises a body, a plurality of third pads, a fourth pad, a first electrode, a second electrode, a plurality of first vias, and a second via. The body has a first surface and a second surface opposite to the first surface. The third pads and the fourth pad are disposed on the first surface of the body. The first electrode and the second electrode are disposed on the second surface of the body. The first vias traverse through the body and are each electrically coupled to a respective one of the third pads and the first electrode. The second via traverses through the body and is electrically coupled to the fourth pad and the second electrode.
US09171993B2	LED die and method of manufacturing the same An LED die includes a substrate, a light emitting structure, electrodes, a first transparent protecting layer, a reflection layer, and a second transparent protecting layer. The light emitting structure includes a first semiconductor layer, an active layer, a second semiconductor layer successively formed on the substrate. A part of first semiconductor layer being exposed. A first electrode is formed the first semiconductor layer. A second electrode is formed on the second semiconductor layer. The first transparent protecting layer, the reflection layer, and the second transparent protecting layer successively formed on the first electrode. The present disclosure also provides a method of manufacturing the LED die.
US09171986B2	Semiconductor photo-detecting device A photo-detecting device includes a first nitride layer, a low-current blocking layer disposed on the first nitride layer, a light absorption layer disposed on the low-current blocking layer, and a Schottky junction layer disposed on the light-absorption layer. The low-current blocking layer includes a multilayer structure.
US09171984B2	Optical system and method of use In one embodiment, the present disclosure provides an energy production apparatus. The apparatus includes fuzzy focusing optics and a mounting plate having a generally planar surface. The planar surface is positioned relative to the fuzzy focusing optics such that at least a portion of light incident on the fuzzy focusing optics is directed onto the planar surface. The apparatus also includes a plurality of solar cells coupled to the planar surface of the mounting plate. A power transmission bus is coupled to the plurality of solar cells. A drive mechanism is coupled to the mounting plate and configured to rotate the mounting plate about an axis normal to the planar surface of the mounting plate.
US09171983B2	Heat dissipation structure A heat dissipation structure is provided and includes a plurality of heat conduction bases and at least one flexible fin. Each of the heat conduction bases includes a first surface and a second surface. A positioning groove is formed in the first surface of each of the heat conduction bases, and the second surface of each of the heat conduction bases is assembled to a backlight surface of a solar module. The fin is coupled to the positioning grooves and connected between the heat conduction bases.
US09171981B2	Profiles for fixing rigid plates The present invention relates to profiles for attaching rigid plates, especially photovoltaic modules, to a roof and to a method and system for attaching photovoltaic modules to a roof structure with the help of profiles.
US09171980B2	Photovoltaic apparatus, photovoltaic module and fastener thereof A photovoltaic apparatus includes at least one photovoltaic panel, at least one frame and at least one fastener. The frame includes at least one pair of holding parts, a sidewall and at least one protrusion. The photovoltaic panel is positioned between the holding parts. Part of the sidewall connects the holding parts. The sidewall includes an outside surface opposite to the photovoltaic panel. The protrusion is connected to the outside surface of the sidewall, and includes at least one slot thereon. The fastener includes a buckle part at the top of the fastener. Portion of the buckle part is used for engaged into the slot.
US09171966B2	Implantation of gaseous chemicals into cavities formed in intermediate dielectrics layers for subsequent thermal diffusion release The present invention generally relates to methods for increasing the lifetime of MEMS devices by reducing the landing velocity on switching by introducing gas into the cavity surrounding the switching element of the MEMS device. The gas is introduced using ion implantation into a cavity close to the cavity housing the switching element and connected to that cavity by a channel through which the gas can flow from one cavity to the other. The implantation energy is chosen to implant many of the atoms close to the inside roof and floor of the cavity so that on annealing those atoms diffuse into the cavity. The gas provides gas damping which reduces the kinetic energy of the switching MEMS device which then should have a longer lifetime.
US09171960B2	Metal oxide layer composition control by atomic layer deposition for thin film transistor This disclosure provides systems, methods and apparatus for a thin film transistor (TFT) device on a substrate. In one aspect, the TFT device includes a gate electrode, an oxide semiconductor layer, and a gate insulator between the gate electrode and the oxide semiconductor layer. The oxide semiconductor layer includes at least two metal oxides, with the two metal oxides having a varying concentration relative to one another between a lower surface and an upper surface of the oxide semiconductor layer. The TFT device also includes a source metal adjacent to a portion of the oxide semiconductor layer and a drain metal adjacent to another portion of the oxide semiconductor layer. The composition of the oxide semiconductor layer can be precisely controlled by a sequential deposition technique using atomic layer deposition (ALD).
US09171957B2	Semiconductor device and method for manufacturing the same To provide a highly reliable semiconductor device by giving stable electrical characteristics to a transistor including an oxide semiconductor film. A gate electrode layer is formed over a substrate, a gate insulating film is formed over the gate electrode layer, an oxide semiconductor film is formed over the gate insulating film, a conductive film is formed over the oxide semiconductor film, so that a region in vicinity of an interface with the oxide semiconductor film in contact with the conductive film is made amorphous, heat treatment is performed, the conductive film is then processed to form a source electrode layer and a drain electrode layer, and a part of the amorphous region in the oxide semiconductor film which is exposed by formation of the source electrode layer and the drain electrode layer is removed.
US09171935B2	FinFET formation with late fin reveal A FinFET semiconductor device fabrication process includes forming a plurality of FinFET fins upon a semiconductor substrate, forming a first dielectric layer upon the semiconductor substrate so that an upper surface of the first dielectric layer is coplanar with upper surfaces of the FinFET fins, forming a plurality of dummy gates upon the FinFET fins and the first dielectric layer orthogonal to the FinFET fins, revealing the FinFET fins by removing first portions of the first dielectric layer from source-drain regions, removing the dummy gates, and subsequent to the removal of the dummy gates, revealing the FinFET fins by removing second portions of the first dielectric layer from channel regions.
US09171934B2	Methods of forming semiconductor devices using a layer of material having a plurality of trenches formed therein One method disclosed includes, among other things, forming a plurality of laterally spaced-apart source/drain trenches and a gate trench in a layer of material above an active region, performing at least one process operation through the spaced-apart source/drain trenches to form doped source/drain regions, forming a gate structure within the gate trench, and forming a gate cap layer above the gate structure positioned within the gate trench.
US09171933B2	Display device and manufacturing method thereof A display device includes a plurality of pixel areas and a thin film transistor disposed on a substrate. A first light blocking member is disposed on the thin film transistor, and a contact hole is disposed in the first light blocking member to expose a portion of the thin film transistor. A pixel electrode is disposed on the first light blocking member, and connected with the thin film transistor through the contact hole. A second light blocking member is disposed on the pixel electrode overlapping with the contact hole. A roof layer is disposed spaced apart from the pixel electrode with a microcavity interposed therebetween. An injection hole is disposed below the roof layer to expose a portion of the microcavity, and a liquid crystal layer is disposed in the microcavity. An encapsulation layer is disposed on the roof layer covering the injection hole so as to seal the microcavity.
US09171926B2	Channel doping extension beyond cell boundaries An integrated circuit includes a first and a second standard cell. The first standard cell includes a first gate electrode, and a first channel region underlying the first gate electrode. The first channel region has a first channel doping concentration. The second standard cell includes a second gate electrode, and a second channel region underlying the second gate electrode. The second channel region has a second channel doping concentration. A dummy gate includes a first half and a second half in the first and the second standard cells, respectively. The first half and the second half are at the edges of the first and the second standard cells, respectively, and are abutted to each other. A dummy channel is overlapped by the dummy gate. The dummy channel has a third channel doping concentration substantially equal to a sum of the first channel doping concentration and the second channel doping concentration.
US09171925B2	Multi-gate devices with replaced-channels and methods for forming the same A device includes a semiconductor substrate, isolation regions in the semiconductor substrate, and a Fin Field-Effect Transistor (FinFET). The FinFET includes a channel region over the semiconductor substrate, a gate dielectric on a top surface and sidewalls of the channel region, a gate electrode over the gate dielectric, a source/drain region, and an additional semiconductor region between the source/drain region and the channel region. The channel region and the additional semiconductor region are formed of different semiconductor materials, and are at substantially level with each other.
US09171924B2	SOI bipolar junction transistor with substrate bias voltages A circuit configuration and methods for controlling parameters of a bipolar junction transistor (BJT) fabricated on a substrate. A bias voltage is electrically coupled to the substrate and can be adjusted to alter the working parameters of a target BJT.
US09171921B2	Trench MOSFET and method for fabricating the same The present disclosure relates to a trench MOSFET and a method for fabricating the same. The method comprises: providing a substrate with an epitaxy layer; forming a trench in the epitaxy layer; forming a first insulating layer, a first gate, a second insulating layer, and a second gate successively in the trench by deposition and etching; forming a well and a source region at both sides of the trench by ion implantation, and forming a trench-type contact and a metal plug. By forming the first gate and the second gate which are separated from each other, the first insulating layer between a lower portion of the first gate and the epitaxy layer has a thickness larger than that of the second insulating layer between the second gate and the well and the source region. The two separate gates are connected with each other by the metal plug. The resultant MOSFET has an increased breakdown voltage and stable performance while its manufacturer cost is lowered because the manufacturer process is simplified.
US09171920B2	Gate structure The present invention discloses a gate structure, which is applied for an electronic component comprising a substrate and an active region defined thereon, and such the gate structure is disposed in the active region and is a T-shaped gate having a stem with a height of 250 nm. Preferably, the gate structure has a gate length of 60 nm.
US09171917B2	Edge termination configurations for high voltage semiconductor power devices This invention discloses a semiconductor power device disposed in a semiconductor substrate and having an active cell area and an edge termination area wherein the edge termination area comprises a wide trench filled with a field-crowding reduction filler and a buried field plate buried under a top surface of the semiconductor substrate and laterally extended over a top portion of the field crowding field to move a peak electric field laterally away from the active cell area. In a specific embodiment, the field-crowding reduction filler comprises a silicon oxide filled in the wide trench.
US09171916B1	LDMOS with thick interlayer-dielectric layer Semiconductor devices, such as LDMOS devices, are described that include an interlayer-dielectric layer (ILD) region having a thickness of at least two and one half (2.5) microns to increase the maximum breakdown voltage. In one or more implementations, the semiconductor devices include a substrate having a source region and a drain region formed proximate to a surface of the substrate. A gate is positioned over the surface and between the source region and the drain region. An ILD region having a thickness of at least two and one half (2.5) microns is formed over the surface and the gate of the device. The device also includes one or more field plates configured to shape an electrical field generated between the source region and the drain region when a voltage is applied to the gate.
US09171913B2	Thin film transistor and method of manufacturing the same and display device including the same Disclosed is a thin film transistor that includes a gate electrode, a semiconductor overlapping with the gate electrode, a source electrode that is electrically connected to the semiconductor, a drain electrode that is electrically connected to the semiconductor and faces the source electrode, and a stacked gate insulating layer that is positioned between the gate electrode and semiconductor. The stacked gate insulating layer includes an aluminum oxide layer. A method of manufacturing the same and a display device including the thin film transistor are also disclosed.
US09171912B2	Group IV element doped P-type Zn(Mg,Cd,Be)O(S,Se) semiconductor A p-type group II-VI semiconductor may include a group IV element as a dopant. The group II-IV semiconductor may be Zn1-a-b-cMgaCdbBecO1-p-qSpSeq, wherein a=0˜1, b=0˜1, c=0˜1, p=0˜1 and q=0˜1.
US09171908B2	SiC semiconductor device and method of manufacturing the same A semiconductor device of an embodiment includes, an n-type SiC substrate that has first and second faces, and contains a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D being a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus), the ratio of the concentration of the element A to the concentration of the element D in the combination(s) being higher than 0.40 but lower than 0.95, the concentration of the element D forming the combination(s) being not lower than 1×1018 cm−3 and not higher than 1×1022 cm−3, an SiC layer formed on the first face, a first electrode formed on the first face side, and a second electrode formed on the second face.
US09171907B2	Graphene transistor A transistor includes a silicon carbide crystal (110) having a silicon terminated face (112). A semiconducting-type graphene layer (120) is bonded to the silicon terminated face (112). A first semimetallic-type graphene layer (122) is contiguous with a first portion of the semiconducting-type graphene layer (120). A second semimetallic-type graphene layer (122) is contiguous with a second portion of the semiconducting-type graphene layer (120) that is spaced apart from the first portion. An insulator layer (132) is disposed on a portion of the semiconducting-type graphene layer (120). A gate conductive layer (134) disposed on the insulator layer (132) and spaced apart from the semiconducting-type graphene layer (120).
US09171903B2	Transistors having features which preclude straight-line lateral conductive paths from a channel region to a source/drain region Some embodiments include transistors having a channel region under a gate, having a source/drain region laterally spaced from the channel region by an active region, and having one or more dielectric features extending through the active region in a configuration which precludes any straight-line lateral conductive path from the channel region to the source/drain region. The dielectric features may be spaced-apart islands in some configurations. The dielectric features may be multi-branched interlocking structures in some configurations.
US09171898B2	Method for manufacturing semiconductor layout pattern, method for manufacturing semiconductor device, and semiconductor device A method for manufacturing a semiconductor device includes providing a substrate having a mask layer formed thereon, providing a first photomask having a first layout pattern and a second photomask having a second layout pattern, the first layout pattern including a plurality of active area portions and at least a neck portion connecting two adjacent active area portions, transferring the first layout pattern from the first photomask to the mask layer to form a plurality of active area patterns and at least a neck pattern connecting two adjacent active area patterns in the mask layer, and transferring the second layout pattern from the second photomask to the mask layer to remove the neck pattern to form a patterned mask. The patterned mask includes the active area patterns. A slot is at least formed between the two adjacent active area patterns.
US09171896B2	Light emitting device A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
US09171895B2	Display and method of manufacturing the same A display, a method of manufacturing the display, and an electronic apparatus are provided. The display includes a resin, a transistor; and a light shielding material positioned between the resin and the transistor. The light shielding material is configured to suppress an incidence of light on the transistor. Light is prevented from entering an oxide semiconductor layer to be used as an active layer so as to suppress deterioration of transistor characteristics.
US09171894B2	Organic EL element, organic EL panel, organic EL light-emitting apparatus and organic EL display apparatus An organic EL element including: pixel electrode on a section of TFT substrate corresponding to pixel region; auxiliary connector on a section of TFT substrate corresponding to auxiliary region; hole injection layer on pixel electrode and auxiliary connector; and light-emitting layer on a section of hole injection layer corresponding to pixel region. The organic EL element additionally includes: electron injection layer on light-emitting layer and a section of hole injection layer corresponding to auxiliary region; and seamless common electrode on electron injection layer. Hole injection layer contains WOx. Electron injection layer contains NaF. Common electrode contains Al that causes the reduction of NaF contained in electron injection layer.
US09171893B2	Mother substrate for organic light-emitting display device and method of manufacturing organic light-emitting display device A mother substrate for an organic light-emitting display device includes a base substrate, a plurality of display areas arranged in an array on the base substrate, the array having a plurality of rows and a plurality of columns that are perpendicular to the plurality of rows. The mother substrate further includes a plurality of first dummy patterns formed between the plurality of rows of display areas, and a plurality of second dummy patterns formed between the plurality of columns of display areas. The plurality of first dummy patterns are spaced apart from each other by a plurality of cut portions.
US09171890B2	Organic light emitting diode display An organic light emitting diode display includes a substrate having three folded portions overlapping each other, and a first light emitting unit, a second light emitting unit, and a third light emitting unit on respective ones of the three folded portions of the substrate, the first through third light emitting units overlapping each other and emitting different colors, wherein the first through third light emitting units are on a same surface of the substrate, when the substrate is unfolded to have the three folded portions substantially planar.
US09171889B2	Electronic devices having semiconductor memories Provided is an electronic device including a semiconductor memory which includes a cell array region having a first variable resistance element and a peripheral circuit region having a decoupling capacitor, the decoupling capacitor including a bottom electrode, a dielectric layer pattern, and a top electrode. The cell array region may include: a first gate; a first contact over the first gate; a second contact over an active region at one side of the first gate; and the first variable resistance element over the second contact, and the peripheral circuit region may include: a second gate formed of the same material at the same level as the first gate; the bottom electrode disposed over the second gate and formed at the same level as the first contact; and the dielectric layer pattern and the top electrode disposed over the bottom electrode.
US09171886B2	Semiconductor memory device and manufacturing method thereof A semiconductor memory device according to embodiments includes a semiconductor substrate and plural switching transistors provided on the semiconductor substrate. In the semiconductor memory device, a contact plug is embedded between adjacent two of the switching transistors, and is insulated from gates of the adjacent two switching transistors. The contact plug is also electrically connected to a source or a drain of each of the adjacent two switching transistors, and an upper surface of the contact plug is at a position higher than an upper surface of the switching transistors. A memory element is provided on the upper surface of the contact plug and stores data. A wiring is provided on the memory element.
US09171882B2	Semiconductor light emitting device and light emitting module According to one embodiment, a semiconductor light emitting device includes a plurality of chips, a first insulating layer provided between the chips, one p-side external terminal, and one n-side external terminal. Each of the chips includes a semiconductor layer, a p-side electrode, and an n-side electrode. Each of the chips is separated from each other. The one p-side external terminal is provided corresponding to one chip on the second face side. The p-side external terminal is electrically connected to the p-side electrode. The one n-side external terminal is provided corresponding to one chip on the second face side. The n-side external terminal is electrically connected to the n-side electrode.
US09171881B2	LED component by integrating epitaxial structure and package substrate together and method of manufacturing the same The present invention discloses an integral LED component which integrates LED epitaxial structure electrodes and interconnects with a package substrate together and an integral manufacturing process thereof. The integral LED component can be made with multiple epitaxial structures or with just a single epitaxial structure. The integral LED component can be mounted into a hollow carrier. And by having support by the hollow carrier, the package substrate can be mounted and contacted with a heat conductive or a dissipation device. The integral LED component is fabricated by wafer level process and cut from the wafer as an independent component. By different manufacturing process, the integral LED component can be made as Vertical LED structure or Lateral LED structure.
US09171879B2	Method for fabricating sensor A method for fabricating a sensor, comprising: forming a pattern of a bias line on a base substrate by using a first patterning process; forming a pattern of a transparent electrode, a pattern of a photodiode, a pattern of a receive electrode, a pattern of a source electrode, a pattern of a drain electrode, a pattern of a data line and a pattern of an ohmic layer by using a second patterning process; forming a pattern of an active layer, a pattern of a first passivation layer, a pattern of a gate electrode and a pattern of a gate line by using a third patterning process. The above method reduces the number of used mask in the fabrication processes as well as the production cost and simplifies the production process, thereby significantly improves the production capacity and the yield rate.
US09171877B2	Semiconductor imaging device having ligth transmission layers formed relative to a guard ring structure in a predetermined manner A solid-state imaging device includes: a photodiode formed to be segmented with respect to each pixel in a pixel area in which plural pixels are integrated on a light receiving surface of a semiconductor substrate; an insulator film formed on the semiconductor substrate to cover the photodiode; a recessed part formed with respect to each of the pixels in the insulator film in an upper part of the photodiode; a first light transmission layer of a siloxane resin formed to fill the recessed part and configure an optical waveguide in the pixel area; a second light transmission layer formed to configure an on-chip lens with respect to each of the pixels in the pixel area; and a guard ring formed to surround an outer circumference of the pixel area to partition an inner area containing the pixel area and an outer dicing area.
US09171876B2	Self-aligned implants to reduce cross-talk of imaging sensors A method of preparing self-aligned isolation regions between two neighboring sensor elements on a substrate. The method includes patterning an oxide layer to form an opening between the two neighboring sensor elements on the substrate. The method further includes performing a first implant to form a deep doped region between the two neighboring sensor elements and starting at a distance below a top surface of the substrate. The method further includes performing a second implant to form a shallow doped region between the two neighboring sensor elements, wherein a bottom portion of the shallow doped region overlaps with a top portion of the deep doped region.
US09171867B2	Semiconductor device A semiconductor device includes a pixel portion having a first thin film transistor and a driver circuit having a second thin film transistor. Each of the first thin film transistor and the second thin film transistor includes a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer. Each of the layers of the first thin film transistor has a light-transmitting property. Materials of the gate electrode layer, the source electrode layer and the drain electrode layer of the first thin film transistor are different from those of the second transistor, and each of the resistances of the second thin film transistor is lower than that of the first thin film transistor.
US09171865B2	Flat panel display apparatus and method for manufacturing the flat panel display apparatus A display apparatus includes an active layer that overlaps a substrate and comprises a channel region. The display apparatus further includes an insulating layer disposed on the substrate and the active layer. The display apparatus further includes a gate electrode disposed on the insulating layer, overlapping the channel region, and comprising a first gate electrode layer and a second gate electrode layer, wherein the first gate electrode layer is formed of a first material and is disposed between the insulating layer and the second electrode layer, and wherein the second gate electrode layer is formed of a second material that is different from the first material. The display apparatus further includes a contact portion disposed on the insulating layer and comprising a first contact layer that is formed of the first material. The display apparatus further includes a pixel electrode that contacts the first contact layer.
US09171863B2	Methods and apparatuses including strings of memory cells formed along levels of semiconductor material Various embodiments include methods and apparatuses including strings of memory cells formed along levels of semiconductor material. One such apparatus includes a stack comprised of a number of levels of single crystal silicon and a number of levels of dielectric material. Each of the levels of silicon is separated from an adjacent level of silicon by a level of the dielectric material. Strings of memory cells are formed along the levels of silicon. Additional apparatuses and methods are disclosed.
US09171860B2	Three-dimensional nonvolatile memory device A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, and a plurality of gate electrodes. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicular to the semiconductor substrate. The gate electrodes include a first gate electrode and a second gate electrode. The first gate electrode is disposed on the memory cell region to intersect the active pillars. The second gate electrode is disposed on the contact region, connected to the first gate electrode and comprising metal material.
US09171859B2	Semiconductor device and method of manufacturing the same A semiconductor device may include interlayer insulating patterns and local word lines which are alternately stacked to form a stepped structure, and a first insulating layer formed on a surface of the stepped structure. The semiconductor device may also include a word line selection gate formed along a surface of the first insulating layer, and active patterns passing through the word line selection gate and the first insulating layer, and connected to the local word lines, respectively.
US09171858B2	Multi-level memory cells and methods for forming multi-level memory cells Integrated circuits with multi-level memory cells and methods for producing the same are provided. A method for producing an integrated circuit with a multi-level memory cell includes forming a gate insulator overlying a substrate. A select gate is formed overlying the gate insulator such that one multi-level memory cell includes one select gate. A thin film storage layer with nanocrystals is formed overlying the select gate and the substrate, and a left and right control gate are formed on opposite sides of the select gate such that the thin film storage layer is between the substrate and each of the control gates. A left implant and a right implant are formed in the substrate such that the select gate, the left control gate, and the right control gate are positioned between the left and right implants.
US09171856B2	Bias generator for flash memory and control method thereof A bias voltage generator for providing a control voltage and a source line voltage to a memory array includes a reference voltage generating circuit and a voltage converting circuit. The reference voltage generating circuit receives a program signal or an erase signal, and generates a reference voltage. If the program signal is received by the reference voltage generating circuit, the reference voltage has a positive temperature coefficient. If the erase signal is received by the reference voltage generating circuit, the reference voltage has a negative temperature coefficient. The voltage converting circuit converts the reference voltage into the control voltage and the source line voltage. The voltage converting circuit enlarges the reference voltage by a first magnification so as to produce the source line voltage, and enlarges the reference voltage by a second magnification so as to produce the control voltage.
US09171851B2	One click web records A method, system, computer medium, and other embodiments for integrating unrelated web services with stand-alone media-based devices are provided. Users can access and control the media-based device conveniently with a web-browser through various portals on the Internet. In an embodiment directed to a single web session, users program the media-based device by clicking on one or more hyperlinks or hypertexts in the form of advertisements of upcoming broadcasts. The advertisements may be web-hosted or sponsored by web portals.
US09171850B2	Ferroelectric capacitor A ferroelectric capacitor includes a ferroelectric film, a lower electrode in contact with one surface of the ferroelectric film, and an upper electrode in contact with the other surface of the ferroelectric film. At least one of the upper electrode and the lower electrode has a stacked electrode structure in which one or more oxide conductive layers and one or more metal layers are stacked alternately, and the stacked electrode structure includes at least one of two or more oxide conductive layers and two or more metal layers.
US09171848B2	Deep trench MIM capacitor and moat isolation with epitaxial semiconductor wafer scheme An integrated circuit structure provides at least one metal-insulator-metal (MIM) capacitor and a moat isolation structure wherein the number of processes required is substantially minimized and the formation of the MIM capacitor and the moat isolation structure effectively decouple while the number of processes common to the moat isolation structure and the MIM capacitor are maximized. Additional required processes are non-critical and tolerant of overlay positioning error.
US09171846B2	Leakage and performance graded memory Embodiments of the present invention provide a memory configuration on a chip containing multiple memory segments having different memory grades. In a typical embodiment, a single chip will be provided on which the memory segments are positioned. A memory grade may include low performance (low leakage), medium performance (medium leakage), and high performance (high leakage). Each memory segment or group of memory segments may have a separate power supply and/or controller. In one example, memory segments may be stacked in a through-silicon via configuration.
US09171838B2	Integrated semiconductor device An integrated semiconductor device having a stabilization function includes a substrate layer, an insulating layer, ground plane layer formed between the substrate layer and the insulating layer and a signal plane layer formed on a surface of the insulating layer facing away from the substrate layer. An n-port, e.g. a transistor, is formed within the substrate layer on a first side of the substrate layer. A via hole is formed through the insulating layer. A resistor is formed within the ground plane layer.
US09171837B2	Cascode circuit A cascode circuit arrangement has a low voltage MOSFET and a depletion mode power device mounted on a substrate (for example a ceramic substrate), which can then be placed in a semiconductor package. This enables inductances to be reduced, and can enable a three terminal packages to be used if desired.
US09171835B2	Semiconductor apparatus including dummy patterns A semiconductor apparatus and system including a semiconductor apparatus may include: a main pattern block having a plurality of main patterns formed to be coupled to a power source and one or more dummy pattern blocks formed around the main pattern block. Any one of the one or more dummy pattern blocks may include a protection part formed to protect the main pattern block.
US09171834B2	Over voltage protection for a thin oxide load circuit An IC includes: a substrate having a thick oxide portion and a thin oxide portion; a load circuit disposed on the thin oxide portion and coupled between a supply node and a virtual supply node; and a current source circuit and protection circuit disposed on the substrate. The current source circuit has an output coupled to the virtual supply node and is operable to provide a voltage at the virtual supply node. The protection circuit includes a sensing portion and a protection portion. The sensing portion is coupled to the virtual supply node and is operable to detect the voltage at the virtual supply node. The protection portion is coupled to the sensing portion and is operable, in response to the sensed voltage, to prevent a difference in voltage between the voltage at the virtual supply node and a second voltage at the supply node from exceeding a maximum voltage.
US09171833B2	Semiconductor structure for enhanced ESD protection A semiconductor structure for enhanced ESD protection is disclosed. The semiconductor structure includes a plurality of fingers, wherein each finger of the plurality of fingers includes a plurality of voltage clamps, and each voltage clamp of the plurality of voltage clamps includes at least a first well having a first conductivity type and a second well having a second conductivity type, and a connection between a well tie of the first well of a first voltage clamp of the plurality of voltage clamps and a well tie of the first well of a second voltage clamp of the plurality of voltage clamps, wherein the connection is enabled to couple a bias voltage associated with a current flow in the first voltage clamp to the second voltage clamp, and the first voltage clamp and the second voltage clamp are thereby enabled to trigger on substantially simultaneously.
US09171830B2	Fabricating a proximity sensor having light-blocking structure in leadframe A method for fabricating a semiconductor proximity sensor includes providing a flat leadframe with a first and a second surface. The second surface is solderable. The leadframe includes a first and a second pad, a plurality of leads, and fingers framing the first pad. The fingers are spaced from the first pad by a gap which is filled with a clear molding compound. A light-emitting diode (LED) chip is assembled on the first pad and encapsulated by a first volume of the clear compound. The first volume outlined as a first lens. A sensor chip is assembled on the second pad and encapsulated by a second volume of the clear compound. The second volume outlined as a second lens. Opaque molding compound fills the space between the first and second volumes of clear compound, forms shutters for the first and second lenses, and forms walls rising from the frame of fingers to create an enclosed cavity for the LED. The pads, leads, and fingers connected to a board using a layer of solder for attaching the proximity sensor.
US09171829B2	Photocoupler A photocoupler includes: a light emitting element; a light receiving element; an inner resin layer; and an outer resin layer. The light emitting element is driven by an input electrical signal. The light receiving element is configured to convert emission light of the light emitting element into an electrical signal. The inner resin layer includes a base resin and a curing agent. The base resin contains isocyanuric acid having an epoxy group. The curing agent contains an acid anhydride having an acid anhydride group. The inner resin layer covers the light emitting element and the light receiving element. Then outer resin layer encloses the inner resin layer and configured to block the emission light. Carbon atomic concentration increases and oxygen atomic concentration decreases with distance in depth direction of the inner resin layer from an interface.
US09171820B2	Method of manufacturing semiconductor device including thermal compression A method of manufacturing a semiconductor device includes attaching a curable film to a first connection member including a first circuit terminal, attaching a conductive film to a second connection member including a second circuit terminal, and thermally compressing the first connection member to the second connection member, with the first connection member and the second connection member placed such that the curable film and the conductive film face each other.
US09171818B2	Package structure and the method to manufacture thereof The invention discloses a package structure with an overlaying metallic material overlaying a solder material. A substrate comprises a first solder pad and a second solder pad thereon. A conductive element on the substrate comprises a first electrode and a second electrode thereon. A solder material electrically connects the first solder pad and the second solder pad to the first electrode and the second electrode respectively. An overlaying metallic material overlays the exposed areas of the solder metallic material, the first solder pad, the second solder pad, the first electrode and the second electrode, wherein the exposed areas comprise metallic material having a lower melting point than the second metallic material.
US09171816B2	High density substrate routing in BBUL package Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads.
US09171812B1	Semiconductor device having conductive pads with neck-down portions to prevent solder reflow Methods and devices for a semiconductor device having conductive pads to prevent solder reflow are disclosed and may include a substrate comprising conductive pads of rectangular shape and neck-down portions on opposite sides of the rectangular shape, a semiconductor die comprising conductive pillars, and a solder electrically coupling the conductive pillars to the conductive pads. The neck-down portions may comprise a solder mask for the conductive pads to prevent solder from flowing in an unwanted direction on the conductive pads. The conductive pillars may comprise an elliptical cross-section with a minor axis length X and a major axis length Y. The major axis of the elliptical cross-section may be parallel to a long axis of the rectangular shape of the conductive pads. A decrease (W) in width of the conductive pads from the rectangular shape to the neck-down portions may be defined by X/5≦W≦X/2.
US09171810B2	Electronic device incorporating a randomized interconnection layer having a randomized conduction pattern An electronic device incorporating a randomized interconnection layer. In one example, the device includes a randomized interconnection layer having a randomized conductive pattern formed by etching of a heterogeneous layer; and a sensing circuit, electrically coupled to the randomized interconnection layer to detect the randomized conductive pattern. In another example, a method of fabricating the device includes forming a set of electrodes proximate to a silicon substrate; depositing a heterogeneous layer of elements onto the substrate; etching the heterogeneous layer to form a randomized conductive pattern; and electrically coupling the electrodes to a sensing circuit and the randomized conductive pattern.
US09171806B2	Method of making a semiconductor chip including identifying marks A semiconductor chip includes a first mark for identifying a position of the chip within an exposure field. The semiconductor chip includes a first matrix in a first layer of the chip and a second mark within the first matrix identifying a position of the exposure field on a wafer.
US09171804B2	Method for fabricating an electronic component A carrier and a semiconductor chip are provided. A connection layer is applied to a first main face of the semiconductor chip. The connection layer includes a plurality of depressions. A filler is applied to the connection layer or to the carrier. The semiconductor chip is attached to the carrier so that the connection layer is disposed between the semiconductor chip and the carrier. The semiconductor chip is affixed to the carrier.
US09171803B2	Semiconductor device and manufacturing method thereof To improve the reliability of a semiconductor device including a low-resistance material such as copper, aluminum, gold, or silver as a wiring. Provided is a semiconductor device including a pair of electrodes electrically connected to a semiconductor layer which has a stacked-layer structure including a first protective layer in contact with the semiconductor layer and a conductive layer containing the low-resistance material and being over and in contact with the first protective layer. The top surface of the conductive layer is covered with a second protective layer functioning as a mask for processing the conductive layer. The side surface of the conductive layer is covered with a third protective layer. With this structure, entry or diffusion of the constituent element of the pair of conductive layers containing the low-resistance material into the semiconductor layer is suppressed.
US09171797B2	System-in-package having integrated passive devices and method therefor A semiconductor device has a substrate, first passivation layer formed over the substrate, and integrated passive device formed over the substrate. The integrated passive device can include an inductor, capacitor, and resistor. A second passivation layer is formed over the integrated passive device. System components are mounted to the second passivation layer and electrically connect to the second conductive layer. A mold compound is formed over the integrated passive device. A coefficient of thermal expansion of the mold compound is approximately equal to a coefficient of thermal expansion of the system component. The substrate is removed. An opening is etched into the first passivation layer and solder bumps are deposited over the opening in the first passivation layer to electrically connect to the integrated passive device. A metal layer can be formed over the molding compound or first passivation layer for shielding.
US09171796B1	Sidewall image transfer for heavy metal patterning in integrated circuits A method for fabricating a plurality of conductive lines in an integrated circuit includes providing a layer of conductive metal in a multi-layer structure fabricated upon a wafer, forming a spacer in a layer of the multi-layer structure residing above the layer of conductive metal, wherein the spacer is formed from a metal-containing atomic layer deposition material, and transferring a pattern from the spacer to the layer of conductive metal using a sidewall image transfer technique, wherein the transferring results in a formation of the plurality of conductive lines in the layer of conductive material.
US09171792B2	Semiconductor device packages having a side-by-side device arrangement and stacking functionality A semiconductor device package including a substrate, a first device module, a second device module, and an package body. The first device module and the second device module are disposed side-by-side on a carrier surface of the substrate. The first device module includes first connecting elements provided with a first pitch. The second device module includes second connecting elements provided with a second pitch. The first pitch is different from the second pitch. The package body is disposed on the carrier surface and covers the first chip module and the second chip module. The package body includes first openings exposing the first connecting elements and second openings exposing the second connecting elements.
US09171787B2	Packaged semiconductor device having an embedded system Disclosed is a packaged device, comprising a carrier comprising a first carrier contact, a first electrical component having a first top surface and a first bottom surface, the first electrical component comprising a first component contact disposed on the first top surface, the first bottom surface being connected to the carrier, an embedded system comprising a second electrical component having a second top surface, an interconnect element, and a first connecting element, the embedded system having a system bottom surface, wherein the system bottom surface comprises a first system contact, wherein the second top surface comprises a first component contact, and wherein the first system contact is connected to the first component contact by the interconnect element and the first component contact of the second electrical component is connected to the first carrier contact by means of the first connecting element.
US09171785B2	Power overlay structure with leadframe connections A power overlay (POL) packaging structure that incorporates a leadframe connection is disclosed. The a POL structure includes a POL sub-module having a dielectric layer, at least one semiconductor device attached to the dielectric layer and that includes a substrate composed of a semiconductor material and a plurality of connection pads formed on the substrate, and a metal interconnect structure electrically coupled to the plurality of connection pads of the at least one semiconductor device, with the metal interconnect structure extending through vias formed through the dielectric layer so as to be connected to the plurality of connection pads. The POL structure also includes a leadframe electrically coupled to the POL sub-module, with the leadframe comprising leads configured to make an interconnection to an external circuit structure.
US09171784B2	Dual power converter package using external driver IC A dual power converter package is disclosed. The package includes a leadframe having a first control FET paddle configured to support a drain of a first control FET, and a second control FET paddle configured to support a drain of a second control PET. The leadframe further includes a sync FET paddle configured to support a source of a first sync FET and a source of a second sync FET, and a first plurality of contacts configured to receive control signals for each of the control PETS and each of the sync FETs from a driver integrated circuit (IC) external to the leadframe. The leadframe may additionally include first and second switched nodes, configured for electrical connection to the first control FET and the first sync FET via a first clip, and to the second control PET and the second sync PET via a second clip, respectively.
US09171777B2	Semiconductor device and method for manufacturing a semiconductor device A semiconductor device includes a semiconductor substrate including a main surface with a polygonal geometry and a main electric circuit manufactured within a main region on the semiconductor substrate. The main electric circuit is operable to perform an electric main function. The main region extends over the main surface of the semiconductor substrate leaving open at least one corner area at a corner of the polygonal geometry of the main surface of the semiconductor substrate. The corner area extends at least 300 μm along the edges of the semiconductor substrate beginning at the corner.
US09171776B2	Semiconductor cooling device A semiconductor cooling device includes: a cooling medium flow channel, through which a cooling medium for cooling a semiconductor chip flows; a laminar flow section which is provided in a region upstream of the cooling medium flow channel and allows the cooling medium to flow in the form of laminar flow; and a turbulent flow section which is provided in a region downstream of the laminar flow section in the cooling medium flow channel and allows the cooling medium, which flows in the form of laminar flow from the laminar flow section, to flow in the form of turbulent flow.
US09171773B2	Semiconductor device A semiconductor device according to the present invention includes a base plate, an insulating layer provided on an upper surface of the base plate, a metal pattern provided on an upper surface of the insulating layer, a semiconductor element bonded to the metal pattern, and an insulating substrate disposed to be in contact with an upper surface of the semiconductor element. An end of the insulating substrate is located outside the semiconductor element in plan view. The end of the insulating substrate and the metal pattern are directly or indirectly bonded. The semiconductor element includes an electrode on the upper surface. A portion of the insulating substrate, in which the electrode on the upper surface of the semiconductor element overlaps in plan view, is provided with a through-hole.
US09171772B2	Semiconductor device A semiconductor device comprises: a semiconductor package having a top surface, a bottom surface, and a through hole provided from the top surface to the bottom surface; and an electrode inserted into the through hole of the semiconductor package. The semiconductor package includes: an insulating substrate; a semiconductor chip on the insulating substrate; an electrode pattern on the insulating substrate and connected to the semiconductor chip; a resin sealing the insulating substrate, the semiconductor chip, and the electrode pattern; and an electrode section on an inner wall of the through hole and connected to the electrode pattern. The through hole penetrates the insulating substrate and the resin. The electrode inserted into the through hole is connected to the electrode section inside the semiconductor package.
US09171771B2	Semiconductor unit with cooler A semiconductor unit includes a cooler having a fluid flow space, an insulating substrate bonded to the cooler through a metal, a semiconductor device soldered to the insulating substrate, an intermediate member interposed between the insulating substrate and the fluid flow space and having a first surface where the insulating substrate is mounted, and a mold resin having a lower coefficient of liner expansion than the intermediate member. The insulating substrate, the semiconductor device and the cooler are molded by the mold resin. The intermediate member has a second surface that extends upward or downward relative to the first surface. The first surface is covered by the mold resin. The second surface is covered by a resin cover.
US09171769B2	Semiconductor device and method of forming openings through encapsulant to reduce warpage and stress on semiconductor package A semiconductor device has a plurality of semiconductor die mounted active surface to a carrier. An encapsulant is deposited over semiconductor die and carrier. Openings are formed through a surface of the encapsulant to divide the encapsulant into discontinuous segments. The openings have straight or beveled sidewalls. The openings can be formed partially through the surface of the encapsulant in an area between the semiconductor die. The openings can be formed partially through the surface of the encapsulant over the semiconductor die. The openings can be formed through the encapsulant in an area between the semiconductor die. A portion of the surface of the encapsulant is removed down to a bottom of the openings. The carrier is removed. An interconnect structure is formed over the encapsulant and the semiconductor die. The encapsulant is cured prior to or after forming the openings.
US09171767B2	Semiconductor device and manufacturing method for the same A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad.
US09171765B2	Inline residual layer detection and characterization post via post etch using CD-SEM Methods of determining an amount and/or a thickness of residual material in a via based on LL-BSE images of the material are disclosed. Embodiments include etching a plurality of vias through at least one material layer on a wafer; loading the wafer with predetermined measurement parameters in a CD-SEM; acquiring an image of each via of interest using LL-BSE imaging; quantifying grey level values of the images; characterizing residuals of the at least one material layer in each via based on the grey level values; determining an etching success rate based on the characterizing of the residuals; adjusting the etching based on the determining of the etching success rate; and repeating the steps of acquiring, quantifying, characterizing, determining, and adjusting until a desired etching success rate is achieved.
US09171762B2	Semiconductor device and fabrication method thereof A semiconductor device and a method for fabricating the semiconductor device are disclosed. A gate stack is formed over a surface of the substrate. A recess cavity is formed in the substrate adjacent to the gate stack. A first epitaxial (epi) material is then formed in the recess cavity. A second epi material is formed over the first epi material. A portion of the second epi material is removed by a removing process. The disclosed method provides an improved method by providing a second epi material and the removing process for forming the strained feature, therefor, to enhance carrier mobility and upgrade the device performance.
US09171761B2	Resin sealing type semiconductor device and method of manufacturing the same, and lead frame The invention is directed to firm bonding between semiconductor dies etc bonded to a lead frame and wire-bonding portions of the lead frame by ultrasonic Al wire bonding, and the prevention of shortcircuit between the semiconductor dies etc due to a remaining portion of the outer frame of the lead frame after the outer frame is cut. By extending the wire-bonding portion etc on the lead frame in a wire-bonding direction and connecting the wire-bonding portion etc to the outer frame of the lead frame through a connection lead etc, the ultrasonic vibration force in the ultrasonic Al wire bonding is prevented from dispersing and the Al wire and the wire-bonding portion etc are firmly bonded. The outer frame is cut after a resin sealing process is completed. Even when a portion of the outer frame remains on the side surface of the resin package, connection between the connection lead etc and other hanging lead etc are prevented by providing a notch etc in the outer frame between the connection lead etc and the hanging lead etc.
US09171757B2	Dual shallow trench isolation liner for preventing electrical shorts A shallow trench is formed to extend into a handle substrate of a semiconductor-on-insulator (SOI) layer. A dielectric liner stack of a dielectric metal oxide layer and a silicon nitride layer is formed in the shallow trench, followed by deposition of a shallow trench isolation fill portion. The dielectric liner stack is removed from above a top surface of a top semiconductor portion, followed by removal of a silicon nitride pad layer and an upper vertical portion of the dielectric metal oxide layer. A divot laterally surrounding a stack of a top semiconductor portion and a buried insulator portion is filled with a silicon nitride portion. Gate structures and source/drain structures are subsequently formed. The silicon nitride portion or the dielectric metal oxide layer functions as a stopping layer during formation of source/drain contact via holes, thereby preventing electrical shorts between source/drain contact via structures and the handle substrate.
US09171756B2	3D IC method and device A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated dies or wafers. Either or both of the die and wafer may have semiconductor devices formed therein. A first element having a first contact structure is bonded to a second element having a second contact structure. First and second contact structures can be exposed at bonding and electrically interconnected as a result of the bonding. A via may be etched and filled after bonding to expose and form an electrical interconnect to interconnected first and second contact structures and provide electrical access to this interconnect from a surface. Alternatively, first and/or second contact structures are not exposed at bonding, and a via is etched and filled after bonding to electrically interconnect first and second contact structures and provide electrical access to interconnected first and second contact structure to a surface. Also, a device may be formed in a first substrate, the device being disposed in a device region of the first substrate and having a first contact structure. A via may be etched, or etched and filled, through the device region and into the first substrate before bonding and the first substrate thinned to expose the via, or filled via after bonding.
US09171754B2	Method including an etching of a portion of an interlayer dielectric in a semiconductor structure, a degas process and a preclean process A method includes providing a semiconductor structure. The semiconductor structure includes a substrate having a frontside and a backside, an electrically conductive feature including copper provided at the frontside of the substrate and a low-k interlayer dielectric provided over the electrically conductive feature. A portion of the interlayer dielectric is etched. In the etch process, a surface of the electrically conductive feature is exposed. A degas process is performed, wherein the semiconductor structure is exposed to a first gas, and wherein the semiconductor structure is heated from the backside and from the frontside. A preclean process may be performed. The preclean process may include a first phase wherein the semiconductor structure is exposed to a substantially non-ionized second gas and a second phase wherein the semiconductor structure is exposed to a plasma created from the second gas.
US09171745B2	Substrate treatment apparatus and method for manufacturing thin film To provide a substrate treatment apparatus capable of suppressing adherence of dust to a film coated on a substrate. As an aspect of the present invention is a substrate treatment apparatus provided with a spin-coating treatment chamber 4a for coating a film on the substrate by spin-coating, a first air-conditioning mechanism that regulates an amount of dust in the air in the spin-coating treatment chamber, an annealing treatment chamber 7a for performing lamp annealing treatment on the film coated on the substrate, a conveying chamber 2a that is connected to each of the spin-coating treatment chamber and the annealing treatment chamber and is for conveying the substrate between the spin-coating treatment chamber and the annealing treatment chamber each other, and a second air-conditioning mechanism that regulate an amount of dust in the air in the conveying chamber.
US09171743B2	Electrical connectivity for circuit applications According to example configurations herein, a leadframe includes a first conductive strip, a second conductive strip, and a third conductive strip disposed substantially adjacent and substantially parallel to each other. A semiconductor chip substrate includes a first array of switch circuits disposed adjacent and parallel to a second array of switch circuits. Source nodes in switch circuits of the first array are disposed substantially adjacent and substantially parallel to source nodes in switch circuits of the second array. When the semiconductor chip and the leadframe device are combined to form a circuit package, a connectivity interface between the semiconductor chip and conductive strips in the circuit package couples each of the source nodes in switch circuits of the first array and each of the multiple source nodes in switch circuits of the second array to a common conductive strip in the leadframe device.
US09171742B2	Alignment of integrated circuit chip stack The present disclosure relates to methods and devices for manufacturing a three-dimensional chip package. A method includes forming a linear groove on an alignment rail, attaching an alignment rod to the linear groove, forming alignment channels on a plurality of integrated circuit chips, and aligning the plurality of integrated circuit chips by stacking the plurality of integrated circuit chips along the alignment rail. Another method includes forming an alignment ridge on an alignment rail, forming alignment channels on a plurality of integrated circuit chips, and aligning the plurality of integrated circuit chips by stacking the plurality of integrated circuit chips along the alignment rail.
US09171736B2	Spacer material modification to improve K-value and etch properties A method for performing a spacer etch process is described. The method includes conformally applying a spacer material over a gate structure on a substrate, and performing a spacer etch process sequence to partially remove the spacer material from a capping region of the gate structure and a substrate region on the substrate adjacent a base of the gate structure, while retaining a spacer sidewall positioned along a sidewall of the gate structure. The K-value of high-K spacer materials are reduced to an acceptable range with oxidation using an oxygen plasma treatment. The etch rate of low-K spacer materials are reduced to a target range using a nitrogen plasma treatment. Integration of the spacer etch processing is selected based on impact to the other structures in the substrate.
US09171733B2	Method of selectively etching a three-dimensional structure A method of selectively etching a three-dimensional (3-D) structure includes generating a plasma in contact with the 3-D structure, and illuminating a designated portion of the 3-D structure with a laser beam while the plasma is being generated. Nonilluminated portions of the 3-D structure are etched at a first etch rate, and the designated portion of the 3-D structure is etched at a second etch rate, where the second etch rate is different from the first etch rate.
US09171730B2	Electrodes for semiconductor devices and methods of forming the same A III-N semiconductor HEMT device includes an electrode-defining layer on a III-N material structure. The electrode-defining layer has a recess with a first sidewall proximal to the drain and a second sidewall proximal to the source, each sidewall comprising a plurality of steps. A portion of the recess distal from the III-N material structure has a larger width than a portion of the recess proximal to the III-N material structure. An electrode is in the recess, the electrode including an extending portion over the first sidewall. A portion of the electrode-defining layer is between the extending portion and the III-N material structure. The first sidewall forms a first effective angle relative to the surface of the III-N material structure and the second sidewall forms a second effective angle relative to the surface of the III-N material structure, the second effective angle being larger than the first effective angle.
US09171729B2	Methods of manufacturing vertical semiconductor devices Methods of manufacturing vertical semiconductor devices may include forming a mold structure including sacrificial layers and insulating interlayers with a first opening formed therethrough. The sacrificial layers and the insulating interlayers may be stacked repeatedly and alternately on a substrate. The first opening may expose the substrate. Blocking layers may be formed by oxidizing portions of the sacrificial layers exposed by the first opening. A first semiconductor layer pattern, a charge trapping layer pattern and a tunnel insulation layer pattern, respectively, may be formed on the sidewall of the first opening. A second semiconductor layer may be formed on the first polysilicon layer pattern and the bottom of the first opening. The sacrificial layers and the insulating interlayers may be partially removed to form a second opening. The sacrificial layers may be removed to form grooves between the insulating interlayers. Control gate electrodes may be formed in the grooves.
US09171724B2	Substrate processing apparatus and method for manufacturing semiconductor device A substrate processing apparatus includes a process chamber which processes a substrate, a conductive substrate support table which is installed within the process chamber, a dielectric plate on which the substrate is mounted, the dielectric plate being placed on the substrate support table, a microwave generator which is installed outside the process chamber, and a microwave supplying unit which supplies a microwave generated by the microwave generator into the process chamber.
US09171723B2	Formation of localised molten regions in silicon containing multiple impurity types A method for creating an inwardly extending impurity distribution profile in a substrate comprising crystalline silicon material having a background doping of a first impurity type, comprising: a) providing one or more additional impurity sources with at least two different types of impurity atoms within the substrate or in proximity to the surface of the substrate, with each of these impurity atoms having different diffusion coefficients or segregation coefficients; b) locally melting a point on the surface of the substrate with a laser, whereby the at least two different types of impurity atoms are incorporated into the melted silicon material; c) removing the laser to allow the silicon material to recrystallize; d) controlling a rate of application and/or removal of the laser to control the creation of the impurity distribution profile, with different distribution profiles for each of the at least two types of impurity atoms in the recrystallized material.
US09171718B2	Method of epitaxial germanium tin alloy surface preparation Methods of preparing a clean surface of germanium tin or silicon germanium tin layers for subsequent deposition are provided. An overlayer of Ge, doped Ge, another GeSn or SiGeSn layer, a doped GeSn or SiGeSn layer, an insulator, or a metal can be deposited on a prepared GeSn or SiGeSn layer by positioning a substrate with an exposed germanium tin or silicon germanium tin layer in a processing chamber, heating the processing chamber and flowing a halide gas into the processing chamber to etch the surface of the substrate using either thermal or plasma assisted etching followed by depositing an overlayer on the substantially oxide free and contaminant free surface. Methods can also include the placement and etching of a sacrificial layer, a thermal clean using rapid thermal annealing, or a process in a plasma of nitrogen trifluoride and ammonia gas.
US09171716B2	Method of forming metal oxide hardmask A method of forming a metal oxide hardmask on a template includes: providing a template constituted by a photoresist or amorphous carbon formed on a substrate; and depositing by atomic layer deposition (ALD) a metal oxide hardmask on the template constituted by a material having a formula SixM(1-x)Oy wherein M represents at least one metal element, x is less than one including zero, and y is approximately two or a stoichiometrically-determined number.
US09171715B2	Atomic layer deposition of GeO2 Atomic layer deposition processes for forming germanium oxide thin films are provided. In some embodiments the ALD processes can include the following: contacting the substrate with a vapor phase tetravalent Ge precursor such that at most a molecular monolayer of the Ge precursor is formed on the substrate surface; removing excess Ge precursor and reaction by products, if any; contacting the substrate with a vapor phase oxygen precursor that reacts with the Ge precursor on the substrate surface; removing excess oxygen precursor and any gaseous by-products, and repeating the contacting and removing steps until a germanium oxide thin film of the desired thickness has been formed.
US09171714B2	Integrated processing of porous dielectric, polymer-coated substrates and epoxy within a multi-chamber vacuum system confirmation Methods and apparatus for processing a substrate are described herein. A vacuum multi-chamber deposition tool can include a degas chamber with both a heating mechanism and a variable frequency microwave source. A method for degassing a substrate can include positioning a substrate comprising a polymer or an epoxy within a processing chamber maintained between a degas temperature and a glass transition temperature, exposing the substrate to variable frequency microwave radiation, exposing the substrate to a plasma comprising an inert gas, removing oxygen containing compounds from the chamber, raising the pressure of inert gas in the chamber, and maintaining the pressure of inert gas while cooling the substrate to a temperature lower than the degas temperature.
US09171708B1	Ambient pressure ionization source using a laser with high spatial resolution An interchangeable ion source for a spectrometer. The ion source includes an interface which mounts the ion source relative to a gas inlet of the spectrometer, a sample holder, a laser which produces a laser beam capable of ionizing the sample at ambient pressure, and an optical system. The ion source includes an equipment chassis which supports the interface, the sample holder, the laser and the optical system as a rigid unit such that the interface, the sample holder, the laser and the optical system remain in alignment upon attachment and detachment of the ion source from the spectrometer and an enclosure which embraces an atmosphere around components of the ion source. In addition, the ion source includes a circulator which circulates at least part of the atmosphere within the enclosure.
US09171704B2	Mass spectrometer A mass spectrometer of reduced size and weight is provided which is capable to conduct highly accurate mass spectroscopy. The mass spectrometer includes an ion source adapted to ionize gas flowing in from outside in order to ionize a measurement sample and a mass spectroscopy section for separating the ionized measurement sample. The ion source has its interior reduced in pressure by differential pumping from the mass spectroscopy section and ionizes the gas when the interior pressure rises as it inhales the gas, and the mass spectroscopy section separates the ionized measurement sample when its interior pressure falls after inhale of the gas. The mass spectrometer may further include a restriction device for suppressing a flow rate of the gas the ion source inhales and an open/close device for opening and closing a flow of the gas the ion source inhales.
US09171702B2	Consumable isolation ring for movable substrate support assembly of a plasma processing chamber A consumable isolation ring of a movable substrate support assembly is described. The consumable isolation ring is configured to be supported on a step of a movable ground ring fit around a fixed ground ring. The consumable isolation ring is configured to electrically isolate the movable ground ring from a dielectric ring of the movable substrate support assembly.
US09171700B2	Plasma pulse tracking system and method A plasma processing system may include a radio frequency (RF) generator configured to supply a pulsing process signal to a target in a plasma processing chamber via a RF matching network. A phase and magnitude detector circuit is coupled to the RF generator and configured to sense the pulsing process signal and output a magnitude error signal and a phase error signal. A pulse tracking circuit is electrically coupled to the phase and magnitude detector circuit and configured to receive the magnitude error signal and the phase error signal and output a tracked magnitude signal and a tracked phase signal. A match controller is electrically coupled to the pulse tracking circuit and the RF matching network and configured to receive the tracked magnitude signal and the tracked phase signal and vary an impedance of the RF matching network in response to the tracked magnitude and phase signals.
US09171697B2	Method and apparatus for an imaging system The present invention provides apparatus for an imaging system comprising a multitude of imaging elements upon a substrate. In some embodiments the substrate may be approximately round with a radius of approximately one inch. Various methods relating to using and producing an imaging system are discussed.
US09171696B2	Orientation imaging using wide angle convergent beam diffraction in transmission electron microscopy Methods of orientation imaging microscopy (OIM) techniques generally performed using transmission electron microscopy (TEM) for nanomaterials using dynamical theory is presented. Methods disclosed may use a wide angle convergent beam electron diffraction for performing OIM by generating a diffraction pattern having at least three diffraction discs that may provide additional information that is not available otherwise.
US09171688B2	Cold field emission cathode using carbon nanotubes Devices for use in cold-field emission and methods of forming the device are generally presented. In one example, a method may include providing a conductive base, dispersing carbon-filled acrylic onto the conductive base to form a conductive film, coupling a copper plate to a first side of the conductive film, and irradiating the conductive film. The method may further include dispersing carbon nanotubes (CNTs) on a second side of the conductive film to form a substantially uniform layer of CNTs, removing excess CNTs from the second side, and curing the conductive film. In one example, a device may include a polycarbonate base, a layer of carbon-filled acrylic on one side of the polycarbonate base and a layer of irradiated carbon-filled acrylic on the other, a copper plate coupled to the carbon-filled acrylic, and a substantially uniform layer of randomly aligned CNTs dispersed on the irradiated carbon-filled acrylic.
US09171686B2	Bistable electric switch with shape memory actuator A bistable electric switch is described. The switch has as actuators a pair of opposing SMA wires acting on a drive element integral with a snap-action spring so as to toggle the snap-action spring between two stable positions corresponding to two operating positions of the switch, the drive element being shorter than the distance existing between the two opposing SMA wires when one of the SMA wires is contracted and the other SMA wire is uncontracted. The entire force exerted by the activated SMA wire is used to overcome the resistance of the snap-action spring.
US09171680B2	Nanoelectromechanical switch with localized nanoscale conductive pathway The present invention is directed to a nanoelectromechanical (NEM) switch comprising two electrodes (12, 18), wherein: at least one (18) of the electrodes comprises an active layer (10) thereon; and at least one (12) of the electrodes is movable along a given direction (z), from a: non-contact position to a contact position where one of the electrodes contacts the other one (18) of the electrodes, at the level of a contact point (P); and the active layer exhibits a conductive pathway (16), which pathway: extends along said given direction (z) to enable electrical conduction from one of the electrodes to the other one of the electrodes in the contact position; and is confined to a given region (R1) of the active layer, the region having nanoscale dimensions in a sectional plane (x, y) perpendicular to the given direction. The present invention is further directed to related devices, systems and methods.
US09171679B2	Electrochemical flow capacitors The present invention generally relates to devices for energy storage technologies, and more particularly to electrochemical flow capacitor systems and applications. In some aspects, these flow capacitors have at least one electrode comprising a non-stationary solid or semi-solid composition comprising supercapacitive particles and an electrolytic solvent in electrical communication with at least one current collector, and energy is stored and/or released by charging and/or discharging the electrode(s).
US09171677B2	Ionic liquid and power storage device including the same An ionic liquid having high electrochemical stability and a low melting point. An ionic liquid represented by the following general formula (G0) is provided. In the general formula (G0), R0 to R5 are individually any of an alkyl group having 1 to 20 carbon atoms, a methoxy group, a methoxymethyl group, a methoxyethyl group, and a hydrogen atom, and A− is a univalent imide-based anion, a univalent methide-based anion, a perfluoroalkyl sulfonic acid anion, tetrafluoroborate, or hexafluorophosphate.
US09171676B2	Organic colourant and uses thereof in photovoltaic cells The present invention relates to an organic colorant corresponding to one of the following structures (I) or (II): eD-pi-conjugated chromophore-L-A (I) A-L-pi-conjugated chromophore-eD (II) in which eD represents an electron donor segment; L represents a covalent bond or a spacer segment; A represents an electron attractor segment able to form a covalent bond with a semi-conductor; the pi-conjugated chromophore comprising at least two aromatic rings, at least one of which is a thiophene, selenophene or furan type ring. The present invention relates to the use thereof as photosensitizer in a photovoltaic device and said photovoltaic device.
US09171672B2	Stacked leaded array A stacked leaded array is provided wherein the stacked leaded array allows for increased packing density of electronic components. The stacked leaded array has a multiplicity of electronic components in a stacked array. Each electronic component comprises a first termination and a second termination. A multiplicity of first leads are provided wherein each first lead is in electrical contact with at least one first termination. Second leads are in electrical contact with second terminations.
US09171669B2	Ultra-wideband assembly system and method An ultra-wideband assembly is provided. The assembly includes a non-conductive tapered core having an outer surface, a proximate end and a distal end being larger than proximate end. The assembly includes a conductive wire having a proximate end and a distal end and being wound about at least a portion of the non-conductive tapered core. The proximate end of the conductive wire extends away from the proximate end of the tapered core and is being conductively coupled to a micro-strip line of a circuit board. The distal end of the conductive wire extends away from the distal end of the tapered core. The conductive wire contacts at least a portion of the outer surface of the non-conductive tapered core. The assembly includes a supporting bracket coupled to the non-conductive tapered core. The supporting bracket is configured to dispose the non-conductive tapered core at a predetermined angle to the circuit board.
US09171668B2	Magnet member A magnet member excellent in both corrosion resistance and adhesion is provided. The magnet member 30 in accordance with the present invention is a magnet member comprising a magnet base body 32 including a rare-earth magnet and a plating film 34 containing Ni and covering the magnet base body 32, while the plating film 34 has a sulfur content lower in a marginal part 38 in a surface S of the magnet base body having an easy magnetization direction M of the magnet base body 32 as a perpendicular thereto than in a center part 36 of the surface S.
US09171666B2	Reactor A reactor includes a coil, a magnetosensitive element attached to a lead wire of the coil, a magnetic shielding plate that shields the magnetosensitive element from a magnetic field of the coil, and a case body in which the magnetic shielding plate, the magnetosensitive element and the coil are housed. In the reactor, the magnetosensitive element and the coil are covered with a resin containing a magnetic material in the case.
US09171662B2	Dry transformer heater A dry-type transformer heater includes a closed housing, and at least one transformer winding arranged in the housing. The at least one transformer winding includes at least one corresponding winding conductor and a corresponding insulation layer surrounding the transformer winding, respectively. In addition to the respective winding conductor, at least one coil heating wire is provided in at least one of the insulation layer and on the surface of the insulation layer to input thermal power into the respective insulation layer.
US09171661B2	Noise reducer A noise reducer is provided that ameliorates electromagnetic noise interference. More specifically, the noise reducer ameliorates electromagnetic noise interference for electronic equipment caused by noise superimposed on a conductor wire. The conductor wire includes a magnetic cylindrical core that penetrates a hollow hole, a winding coiled around the magnetic cylindrical core, and an impedance element connected to the winding. When a noise current is superimposed on the conductor wire that has been made to penetrate the magnetic cylindrical core, part of the noise current is electromagnetically induced from the conductor wire to the winding and flows to the winding. The noise current that flows to the winding is transformed into heat and consumed by the impedance element. As a result, the noise power that gives electromagnetic noise interference to the electronic devices can be reduced and the electromagnetic noise interference for the electronic devices ameliorated.
US09171660B2	Superconducting coil, superconducting magnet, and method for manufacturing superconducting coil An inner circumferential portion is formed by winding one of first and second superconducting wires each having a band shape. An outer circumferential portion is formed by winding the other of the first and second superconducting wires around the inner circumferential portion. A welding portion joins the first and second superconducting wires to each other by welding between the inner circumferential portion and the outer circumferential portion. The first superconducting wire is higher in strength than the second superconducting wire. The second superconducting wire is smaller in thickness than the first superconducting wire.
US09171659B2	Radial water barrier and a dynamic high voltage submarine cable for deep water applications A radial water barrier is provided for a dynamic high-voltage submarine cable. The water barrier includes a corrugated metal tube having an inner diameter in a range of 50-90 mm and a corrugation pitch in a range of 6-10 mm. The metal tube has a wall thickness in a range of 0.7-1 mm and a corrugation depth of more than 6 mm.
US09171655B2	Solid electrolyte film, and method for producing same A solid electrolyte film including a resin having a repeating unit containing a bis(perfluoroalkanesulfonyl)methide moiety. This solid electrolyte film combines high proton conductivity with low methanol permeability for prevention of methanol crossover and can suitably be used for a direct methanol fuel cell.
US09171653B2	Lithium manganese composite oxide and method for preparing same The present invention relates to a lithium manganese composite oxide and a method for preparing the same, and more particularly, to a lithium manganese composite oxide and a method for preparing same, in which a wet-milling process and a spray-drying process are applied, and the abundance ratio of Mn3+ ions to Mn4+ ions at the surface of the composite oxide is adjusted by controlling an oxidizing atmosphere during heat treatment.
US09171649B2	Shielded structure for radiation treatment equipment and method of assembly A modularized approach for rapidly and cost effectively assembling a structure suitable for housing radiation emitting equipment is disclosed. The modules include reinforced walls to contain radiation shielding fill material. The modules are transported empty and then filled on site with the fill material to form a radiation shielding barrier around radiation emitting equipment.
US09171644B2	Circuit board having bypass pad An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided.
US09171640B2	Shift register and display device The shift register includes first to fourth flip-flops. A first clock signal which is in a first voltage state in a first period and in a second voltage state in second to fourth periods is input to the first flip-flop. A second clock signal which is in the first voltage state in the second period and in the second voltage state in the third period and the fourth period is input to the second flip-flop. A third clock signal which is in the second voltage state in the first, second, and fourth periods and in the first voltage state in the third period is input to the third flip-flop. A fourth clock signal which is in the second voltage state in the first and second periods and in the first voltage state in the fourth period is input to the fourth flip-flop.
US09171638B2	Nonvolatile storage device, integrated circuit device, and electronic apparatus A latch circuit that latches stored data of a nonvolatile storage device used for setting the function of a semiconductor device and adjusting the characteristics of the semiconductor device required a dedicated input-output circuit for a test of the semiconductor device. By providing a dummy storage device, it becomes possible to perform a test of the semiconductor device without providing a dedicated input-output circuit.
US09171630B2	Method for driving semiconductor device and semiconductor device To read multilevel data from a memory cell having a transistor using silicon and a transistor using an oxide semiconductor, without switching a signal for reading the multilevel data in accordance with the number of the levels of the multilevel data. The electrical charge of a bit line is discharged, the potential of the bit line is charged via a transistor for writing data, and the potential of the bit line which is changed by the charging is read as multilevel data. With such a structure, the potential corresponding to data held in a gate of the transistor can be read by only one-time switching of a signal for reading data.
US09171629B1	Storage device, memory controller and memory control method According to one embodiment, a storage device comprises a nonvolatile memory and a memory controller that performs reading and writing data from and into the nonvolatile memory. A number, not being 2n, of threshold areas can be set in the memory cells of the nonvolatile memory. The memory controller performs first writing based on first data value assignment, which sets 2n data values to correspond to 2n threshold areas, in first-time writing into a first memory cell of the nonvolatile memory and performs second writing on the first memory cell after the first writing without erasing data based on second data value assignment, which sets 2n data values to correspond to 2n threshold areas including threshold areas not used in the first data value assignment.
US09171628B2	Incremental step pulse programming (ISPP) scheme capable of determining a next starting pulse based on a current program-verify pulse for improving programming speed A method for programming a memory including a plurality of memory cells is provided. The method comprises selecting a current cell and executing a pre-program verify operation at a first program verify level. The method comprises executing a program and program verify operation for the current cell, including applying a sequence of program pulses and performing program verify steps. The sequence includes a starting pulse having a starting magnitude. The program verify steps use a second program verify level. The method also comprises determining the starting magnitude for a next cell as a function of a magnitude of the program pulse in an instance of the program verify step in which the current cell passes verify at the second program verify level.
US09171627B2	Non-boosting program inhibit scheme in NAND design A low-current FN channel scheme for erase, program, program-inhibit and read operations is disclosed for NAND NVM memories. This invention discloses a block array architecture and 3-step half-page program algorithm to achieve less error rate of NAND cell threshold voltage level. Thus, the error correction code capability requirement can be reduced, thus the program yield can be increased to reduce the overall NAND die cost at advanced nodes below 20 nm. As a result, this NAND array can still use the LV, compact PGM buffer for saving in the silicon area and power consumption. In addition, the simpler on-chip state-machine design can be achieved with the superior quality of less program errors.
US09171625B2	Apparatuses and methods to modify pillar potential Apparatus are disclosed, such as a block including a number of strings of charge storage devices, each string including a number of charge storage devices associated with a pillar, and each pillar including semiconductor material. Methods are disclosed, such as a method that includes performing a first operation on a first charge storage device associated with a pillar in the block, modifying an electrical potential of the pillar, and performing a second operation on a second charge storage device in the block. Additional apparatus and methods are described.
US09171624B2	Management of data storage in analog memory cells using a non-integer number of bits per cell A method for data storage includes storing data in a group of memory cells, by encoding the data using at least an outer code and an inner code, and optionally inverting the encoded data prior to storing the encoded data in the memory cells. The encoded data is read from the memory cells, and inner code decoding is applied to the read encoded data to produce a decoding result. At least part of the read data is conditionally inverted, depending on the decoding result of the inner code.
US09171618B2	Semiconductor integrated circuit and processor In one embodiment, there is provided a semiconductor integrated circuit that includes: a first inverter; a second inverter; a first transistor, wherein one end of the first transistor is connected to a first bit line and the other end of the first transistor is connected to a first input terminal of the first inverter; a first element group including second transistors, wherein one end of the first element group is connected to a first output terminal of the first inverter and the other end of the first element group is connected to a second bit line; and a second element group including third transistors and a magnetoresistive element whose magnetic resistance is varied. The second element group is disposed between the second output terminal of the second inverter and a first terminal or disposed between the first transistor and the first terminal.
US09171617B1	Resistive memory device and method programming same A method of programming memory cells of a resistive memory device includes; applying a first current pulse to each of the plurality of memory cells; applying a second current pulse that increases by a first difference compared to the first current pulse to each of the plurality of memory cells to which the first current pulse is applied; and applying a third current pulse that increases by a second difference compared to the second current pulse to each of the plurality of memory cells to which the second current pulse is applied, wherein the first through third current pulses non-linearly increase, and the second difference is greater than the first difference.
US09171613B2	Memristors with asymmetric electrodes Embodiments of the present invention are directed to nanoscale memristor devices that provide nonvolatile memristive switching. In one embodiment, a memristor device includes an active region, a first electrode disposed on a first surface of the active region, and a second electrode disposed on a second surface of the active region, the second surface opposite the first surface. The first electrode is configured with a smaller width than the active region in a first direction, and the second electrode is configured with a larger width than the active region in a second direction. Application of a voltage to at least one of the electrodes produces an electric field across a sub-region within the active region between the first electrode and the second electrode.
US09171609B2	Address transition detecting circuit The address transition detecting circuit includes two identical address transition detecting signal generating module, an inverter and a signal combining module. Both of the two address transition detecting signal generating modules have a unilateral delay circuit for generating an output pulse at the rising edge of the address signal and an output pulse at the falling edge of the address signal. The address transition detecting signal generating module can control the width of the two output pulses by controlling the delay times of the corresponding unilateral delay circuit. The signal combining module outputs the ATD signal having pulses at both the rising edge and falling edge of the address signal. The present application uses two unilateral delay circuits to control the width of the ATD signal at the rising edge and the falling edge of the address signal, thereby significantly preventing the width of the ATD signal from influence of the burr on the address line.
US09171602B2	Electronic elements based on quasitwo-dimensional electron/hole gas at charged domain walls in ferroelectrics The present invention relates to a device including a ferroic material having a ferroelectric order parameter and including at least two domains, as well as a first and second electrode in electrical contact with the ferroic material. The device is configured to form a head-to-head polarization orientation or a tail-to-tail polarization orientation at an interface between the two domains to form a charged domain wall at said interface and between the first and second electrodes. The present invention relates to a corresponding method for operating such a device.
US09171598B2	Memory system A memory system according to the embodiment comprises a cell array including a unit cell array, the unit cell array containing plural first lines, plural second lines intersecting the plural first lines, and plural memory cells provided at the intersections of the plural first lines and the plural second lines and operative to store data in accordance with different physical states; and an access circuit operative to make access to the memory cell via the first line and the second line, wherein the access circuit, on writing data in the access cell, uses a non-access-side first line driver to electrically connect a non-access first line adjacent to an access first line to a first potential power supply via a diode-connected transistor.
US09171591B2	Circuits and methods for efficient execution of a read or a write operation A system for efficient execution of a read or a write is described. The system includes a memory array including a way. The system further includes a read and compare circuit. The read and compare circuit compares data stored within lower address memory cells of the way with information received from a storage device to generate a result of comparison. Moreover, the read and compare circuit compares data stored within higher address memory cells of the way with the information to generate a result of comparison. The system further includes a merge and multiplex circuit coupled to the read and compare circuit. The merge and multiplex circuit merges the result of comparison generated based on the comparison with the lower address memory cells and the result of comparison generated based on the comparison with the higher address memory cells to create a merged outcome of comparison.
US09171590B2	Sensing marging expanding scheme for memory A sensing margin expanding scheme for a memory and a method therefor is disclosed. A first terminal of a first capacitor is coupled to a bit line. A first terminal of a second capacitor is coupled to a reference voltage. In a first phase, the controller controls a first common switch and a second common switch to store the voltage difference between the bit line and the reference voltage to the first capacitor and the second capacitor. In a second phase, controlling the first common switch and the second common switch to open the first terminal of the first capacitor and the second terminal of the second capacitor and open the second terminal of the first capacitor and the first terminal of the second capacitor, and then coupling the second terminal of the first capacitor and the second terminal of the second capacitor to a common voltage.
US09171587B2	Vertical memory with body connection An embodiment of an apparatus includes a substrate, a body semiconductor, a vertical memory access line stack over the body semiconductor, and a body connection to the body semiconductor.
US09171581B2	Friction force measurement assembly and method The application discloses a sensor device to measure friction force at a head-media interface. As disclosed, the sensor device has a transducer element oriented to provide an electrical output responsive to force or strain imparted to the transducer element along an in-plane axis. Sensor circuitry is coupled to the transducer element to process the electrical output to provide an output measure of friction force. In illustrated embodiments, the head includes an actuator element which is powered on/off at an on/off frequency to cyclically protrude a localized portion of the head. The on/off frequency of the actuator is used by the sensor circuitry to detect excitation of the sensor device due to friction force at the head-media interface.
US09171576B2	Randomly accessible visual information recording medium and recording method, and reproducing device and reproducing method Access point pictures designated as randomly accessible positions are I pictures or P pictures. Information indicating the decoding sequence (I1, P1, B1, B2, B3, B4, P2, . . . ) of pictures functioning as access points and attribute information (picture_type) indicating whether a picture functions as an access point or is necessary for decoding of the access point following a given access point are recorded on the video information recording medium. Random access is possible even if the GOP interval is lengthened.
US09171573B2	Reading method for linear tape open A method for operating a tape storage system includes simultaneously receiving readback signals from a set of data readers reading from data tracks of a set of adjacent data tracks extending along a longitudinal extension of a tape storage medium. Each data track has a width and each data reader has a width that exceeds the width of a data track. In the readback signal, of one of the data readers of the set a simultaneous presence of two defined waveforms is detected stemming from two different servo patterns arranged in servo sections of adjacent data tracks of the set. At least one of lateral position, velocity, gain and timing information is derived from a measure of the energy of the two defined waveforms detected in the readback signal of the data reader and applying this information in the operation of the tape storage system.
US09171572B1	Multi-dimensional optimization of read channel Variations of the Nelder-Mead direct search method are employed to find read channel parameter settings in a discrete field having three or more dimensions. The three or more dimensions correspond to read channel parameters, at least some of which are highly correlated. The steps of the Nelder-Mead method are executed according to a methodology to arrive at substantially optimal parameter settings for a read channel, even where a discrete function defining parameter outcomes is noisy. In some embodiments, dimensional collapse, considered inefficient in a two-dimensional field, is allowed in order to reach an optimal solution in a greater-than-two-dimensional field.
US09171570B2	Information processing apparatus, information processing system, information processing method, and program An information processing apparatus includes: a data processing unit which performs copy processing for recording recorded data of a first medium in a second medium, wherein the data processing unit receives playlist sequence information which represents the use sequence of a playlist applied to reproduction processing of copy data recorded in the second medium, from a management server and performs processing for generating an attribute file which stores the playlist sequence information and recording the generated attribute file in the second medium.
US09171566B2	Buckling mechanism for a tape drive loader Embodiments include systems and methods for buckling in a loader assembly of a tape storage drive. Some implementations translate driving forces of an elevator of the loader assembly into driving forces that act on a pusher plate of a buckling mechanism in both buckling and unbuckling directions. For example, a plate interface can couple the pusher plate with the elevator in a manner that translates rotational motion of the elevator's drive gear into a lateral driving force that drives the pusher plate between its home and buckling positions. Certain implementations also include a home holding mechanism for removably securing the pusher plate in the home position when the elevator is in its unloaded position.
US09171564B2	Optical disc device and optical disc reproduction method An optical disc device is configured to reproduce an optical disc. The optical disc device includes an optical pickup, a high-frequency production component, a driver and a controller. The optical pickup includes a laser emission component configured to emit a laser beam, and a light receiver configured to receive returning light of the laser beam. The high-frequency production component is configured to produce a high-frequency signal. The driver is configured to produces a drive signal for driving the laser emission component by superposing the high-frequency signal produced by the high-frequency production component onto a specific drive signal. The controller is configured to control the high-frequency production component to adjust an amplitude of the high-frequency signal.
US09171563B1	Recording medium having independent track for velocity, timing and/or longitudinal position A product according to one embodiment includes a magnetic recording tape having at least one first servo track having timing information, and a supplemental servo track having at least one of: velocity encoding and longitudinal position encoding. An apparatus according to one embodiment includes a magnetic head and at least one module having an array of transducers. The apparatus is configured to read and/or write to magnetic recording media having at least one first servo track having timing information, and a supplemental servo track having at least one of: velocity encoding and longitudinal position encoding.
US09171562B1	Patterned metal layer to control solder connection between laser and submount in a magnetic head A laser diode device is affixed to a mounting face of a slider, opposite the air bearing surface. The laser includes a submount having an electrically conductive surface layer that is normal to the mounting face. The electrically conductive surface layer is a patterned metal layer that includes a lateral probing region and a laser mounting region to which a laser is soldered. The laser mounting region is connected to the lateral probing region by a bridge portion of the patterned metal layer. The laser mounting region is otherwise separated from the lateral probing region by a solder blocking gap in which the submount lacks the patterned metal layer, and which is adjacent to the laser. The solder blocking gap defines a solder blocking gap height normal to the mounting face that is in the range of ⅔rds to ⅚ths of a total height of the laser mounting region.
US09171561B1	Assemblies and methods for slider electrical connection containing through circuit electrical connections Assemblies and methods that include a flex circuit having a slider facing surface and an opposing back surface; a slider having a back surface and an opposing air bearing surface (ABS), the slider including an electrical connection region; and a through circuit electrical connection, that is in electrical connection with the electrical connection region of the slider, the back surface of the slider interfacing with the slider facing surface of the flex circuit.
US09171560B1	Sloping transition on a ramp of a hard disk drive Certain aspects of the present disclosure provide a ramp for a hard disk drive. The HDD ramp generally includes a ramp body having a head separator fin, a gimbal limiter adjacent to the head separator fin which is thicker than the head separator fin, and a first chamfer at a transition between a first surface of the gimbal limiter and a first surface of the head separator fin. A hard disk drive including such a HDD ramp and a method for using the HDD ramp are also disclosed.
US09171556B2	Magnetic head including two contact sensors A magnetic head includes a medium facing surface, a read head unit, a write head unit, and a protrusion device. The protrusion device causes part of the medium facing surface to protrude toward a recording medium. The read head unit has a first end face located in the medium facing surface and includes a first contact sensor for detecting contact of the first end face with the recording medium. The write head unit has a second end face located in the medium facing surface and includes a second contact sensor for detecting contact of the second end face with the recording medium. The first end face and the second end face are located at positions different from each other in a direction of travel of the recording medium.
US09171555B2	Magnetic flux barrier Data storage systems having barriers that may reduce erasure flux and increase write-ability are provided. Data storage systems include a writing element. The writing element has a write pole with a flare region. A magnetic flux barrier is located along the write pole flare region. The magnetic flux barrier is illustratively made from an in-plane magnetically anisotropic material that has an easy plane of magnetization. In another embodiment, a data storage system includes a writing element having an air bearing surface and a shield at the air bearing surface. The shield has a magnetic permeability of approximately zero. The shield illustratively includes alternating layers of positive and negative permeabilities. The shield optionally includes a plurality of shields that may include top, bottom, and side shields.

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