最新美国发明专利第2015-09-15期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US09136427B2	Light emitting diode and method of fabricating the same Exemplary embodiments of the present invention disclose a light emitting diode including an n-type contact layer doped with silicon, a p-type contact layer, an active region disposed between the n-type contact layer and the p-type contact layer, a superlattice layer disposed between the n-type contact layer and the active region, the superlattice layer including a plurality of layers, an undoped intermediate layer disposed between the superlattice layer and the n-type contact layer, and an electron reinforcing layer disposed between the undoped intermediate layer and the superlattice layer. Only a final layer of the superlattice layer closest to the active region is doped with silicon, and the silicon doping concentration of the final layer is higher than that of the n-type contact layer.
US09136421B2	Wide area array type photonic crystal photomixer for generating and detecting broadband terahertz wave Provided is a broadband photomixer technology that is a core to generate continuous frequency variable and pulsed terahertz waves. It is possible to enhance light absorptance by applying the transmittance characteristic of a 2D light crystal structure and it is possible to increase the generation efficiency of terahertz waves accordingly. Moreover, it is possible to implement a wide area array type terahertz photomixer by applying an interdigit structure and spatially properly arranging a light crystal structure having various cycles. Accordingly, it is possible to solve difficulty in thermal characteristic and light alignment by mitigating the high light density of a light absorption unit and low photoelectric conversion efficiency is drastically improved. In addition, the radiation pattern of terahertz waves may be electrically controlled through the present invention.
US09136418B2	Optoelectronic devices including heterojunction and intermediate layer Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.
US09136412B2	Reconfigurable solar panel A reconfigurable solar panel that provides for the repair, replacement, modification and upgrade of various solar panel components.
US09136408B2	Perovskite and other solar cell materials Photovoltaic devices such as solar cells, hybrid solar cell-batteries, and other such devices may include an active layer having perovskite material and copper-oxide or other metal-oxide charge transport material. Such charge transport material may be disposed adjacent to the perovskite material such that the two are adjacent and/or in contact. Inclusion of both materials in an active layer of a photovoltaic device may improve device performance. Other materials may be included to further improve device performance, such as, for example: one or more interfacial layers, one or more mesoporous layers, and one or more dyes.
US09136407B2	Solid-state image sensor, method of manufacturing the same, and camera A method of manufacturing a solid-state image sensor having a first charge accumulation region, a second charge accumulation region, includes implanting ions into a semiconductor substrate through first and second openings of a mask to form the first and second charge accumulation regions. The implanting ions includes a first implantation of implanting ions into a portion below a first transfer gate, and a second implantation of implanting ions into a portion below a second transfer gate in a direction different from a direction of the first implantation.
US09136406B2	Solar cell assembly with diffraction gratings A solar cell structure using either a dye-sensitized or organic absorber is provided with a diffraction grating on at least one side to enhance the travel of first order diffraction components through the photo sensitive material. A two-sided cell uses diffraction gratings both top and bottom wherein the periodic diffraction elements of one grating are shifted by one-quarter of the grating period relative to the other.
US09136401B2	Compound semiconductor device and method of manufacturing the same A compound semiconductor device includes a substrate, a p-type first semiconductor layer over the substrate and contains antimony, a p-type second semiconductor layer over the first semiconductor layer and contains antimony, an n-type third semiconductor layer over the second semiconductor layer, a fourth semiconductor layer between the first semiconductor layer and the second semiconductor layer, the fourth semiconductor layer containing phosphorus and having a thickness in which electrons tunnel between the first semiconductor layer and the second semiconductor layer, a first electrode in ohmic contact with the first semiconductor layer, and a second electrode in ohmic contact with the third semiconductor layer. The first semiconductor layer is made from a material whose contact resistance with the first electrode is lower than contact resistance of the second semiconductor layer.
US09136396B2	Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device includes forming devices including source, drain and gate electrodes on a front surface of a substrate including a bulk silicon, a buried oxide layer, an active silicon, a gallium nitride layer, and an aluminum-gallium nitride layer sequentially stacked, etching a back surface of the substrate to form a via-hole penetrating the substrate and exposing a bottom surface of the source electrode, conformally forming a ground interconnection on the back surface of the substrate having the via-hole, forming a protecting layer on the front surface of the substrate, and cutting the substrate to separate the devices from each other.
US09136395B2	Three-dimensional semiconductor memory devices Three-dimensional (3D) nonvolatile memory devices include a substrate having a well region of second conductivity type (e.g., P-type) therein and a common source region of first conductivity type (e.g., N-type) on the well region. A recess extends partially (or completely) through the common source region. A vertical stack of nonvolatile memory cells on the substrate includes a vertical stack of spaced-apart gate electrodes and a vertical active region, which extends on sidewalls of the vertical stack of spaced-apart gate electrodes and on a sidewall of the recess. Gate dielectric layers extend between respective ones of the vertical stack of spaced-apart gate electrodes and the vertical active region. The gate dielectric layers may include a composite of a tunnel insulating layer, a charge storage layer, a relatively high bandgap barrier dielectric layer and a blocking insulating layer having a relatively high dielectric strength.
US09136393B2	HK embodied flash memory and methods of forming the same A method includes forming a selection gate and a control gate for a flash memory cell in a memory device region. The selection gate and the control gate are over a semiconductor substrate. A protection layer is formed to cover the selection gate and the control gate. Stacked layers are formed in a logic device region, wherein the stacked layers extend to overlap the selection gate and the control gate. The stacked layers are patterned to form a gate stack for a logic device in the logic device region. After the patterning, an etching step is performed to etch a residue of the stacked layers in a boundary region of the memory device region. After the etching step, the protection layer is removed from the memory device region. Source and drain regions are formed for each of the flash memory cell and the logic device.
US09136392B2	Semiconductor memory device and method for manufacturing the same According to one embodiment, the underlying film includes a memory region including a first trench and a peripheral region including a second trench. The stacked body includes conductive layers and insulating layers alternately stacked on the underlying film. The channel body is provided in a pair of first holes and the first trench. The first holes pierce the stacked body to be connected to the first trench. The memory film includes a charge storage film provided between a side wall of the first hole and the channel body, and between an inner wall of the first trench and the channel body. The conductor is provided in a pair of second holes and the second trench. The second holes pierce the stacked body to be connected to the second trench.
US09136390B2	Semiconductor device and manufacturing method thereof A semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are formed over one substrate to form plural kinds of circuits and in which the number of steps is not greatly increased is provided. After a metal thin film is formed over an insulating surface, an oxide semiconductor layer is formed thereover. Then, oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely. Further, structures of thin film transistors are different between a circuit in which emphasis is placed on the speed of operation, such as a logic circuit, and a matrix circuit.
US09136387B2	Semiconductor device and electronic apparatus A semiconductor device includes: a transistor including an oxide semiconductor film; a first insulating film covering the oxide semiconductor film and including a first resin material; and a second insulating film including a second resin material that has polarity different from polarity of the first resin material, the second insulating film being laminated on the first insulating film.
US09136383B2	Contact structure of semiconductor device The disclosure relates to a semiconductor device. An exemplary structure for a contact structure for a semiconductor device comprises a substrate comprising a major surface and a cavity below the major surface; a strained material in the cavity, wherein a lattice constant of the strained material is different from a lattice constant of the substrate; a Ge-containing dielectric layer over the strained material; and a metal layer over the Ge-containing dielectric layer.
US09136380B2	Device structure and methods of making high density MOSFETs for load switch and DC-DC applications Aspects of the present disclosure describe a high density trench-based power MOSFETs with self-aligned source contacts and methods for making such devices. The source contacts are self-aligned with spacers that are formed along the sidewall of the gate caps. Additionally, the active devices may have a two-step gate oxide. A lower portion may have a thickness that is larger than the thickness of an upper portion of the gate oxide. The two-step gate oxide combined with the self-aligned source contacts allow for the production of devices with a pitch in the deep sub-micron level. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09136378B2	Semiconductor device and manufacturing method for same A semiconductor device includes a first conductive-type semiconductor layer, a second conductive-type body region formed in a surficial portion of the semiconductor layer, a first conductive-type source region formed in a surficial portion of the body region, a gate insulating film provided on the semiconductor layer and containing nitrogen atoms, the gate insulating film including a first portion in contact with the semiconductor layer outside the body region, a second portion in contact with the body region, and a third portion in contact with the source region, and a gate electrode provided on the gate insulating film in an area extending across the semiconductor layer outside the body region, the body region, and the source region. The third portion of the gate insulating film has a thickness greater than the thickness of the first portion and the thickness of the second portion.
US09136377B2	High density MOSFET array with self-aligned contacts delimited by nitride-capped trench gate stacks and method A high density trench-gated MOSFET array and method are disclosed. It comprises semiconductor substrate partitioned into MOSFET array area and gate pickup area; epitaxial region, body region and source region; numerous precisely spaced active nitride-capped trench gate stacks (ANCTGS) embedded till the epitaxial region. Each ANCTGS comprises a stack of polysilicon trench gate with gate oxide shell and silicon nitride cap covering top of polysilicon trench gate and laterally registered to gate oxide shell. The ANCTGS forms, together with the source, body, epitaxial region, a MOSFET device in the MOSFET array area. Over MOSFET array area and gate pickup area, a patterned dielectric region atop the MOSFET array and a patterned metal layer atop the patterned dielectric region. Thus, the patterned metal layer forms, with the MOSFET array and the gate pickup area, self-aligned source and body contacts through the inter-ANCTGS separations.
US09136372B2	Silicon carbide semiconductor device In a silicon carbide semiconductor device, a plurality of trenches has a longitudinal direction in one direction and is arranged in a stripe pattern. Each of the trenches has first and second sidewalls extending in the longitudinal direction. The first sidewall is at a first acute angle to one of a (11-20) plane and a (1-100) plane, the second sidewall is at a second acute angle to the one of the (11-20) plane and the (1-100) plane, and the first acute angle is smaller than the second acute angle. A first conductivity type region is in contact with only the first sidewall in the first and second sidewalls of each of the trenches, and a current path is formed on only the first sidewall in the first and second sidewalls.
US09136367B2	Semiconductor device A semiconductor device includes: a p-type semiconductor layer mainly made of GaN; an n-type semiconductor layer mainly made of GaN and joined with the p-type semiconductor layer; a protective film arranged to coat the p-type semiconductor layer and the n-type semiconductor layer; a gate insulating film arranged to coat the p-type semiconductor layer and the n-type semiconductor layer; and a gate electrode joined with the gate insulating film. The protective film includes: a first layer made of Al2O3 and arranged adjacent to the p-type semiconductor layer and the n-type semiconductor layer to coat an edge of a p-n junction surface; a second layer made of an electrical insulation material different from Al2O3 and formed on the first layer; and an opening structure formed to pass through the first layer and the second layer. The gate insulating film is placed inside of the opening structure.
US09136360B1	Methods and structures for charge storage isolation in split-gate memory arrays Forming a memory structure includes forming a charge storage layer over a substrate; forming a first control gate layer; patterning the first control gate layer to form an opening in the first control gate layer and the charge storage layer, wherein the opening extends into the substrate; filling the opening with an insulating material; forming a second control gate layer over the patterned first control gate layer and the insulating material; patterning the second control gate layer to form a first control gate electrode and a second control gate electrode, wherein the first control gate electrode comprises a first portion of each of the first and second control gate layers and the second control gate electrode comprises a second portion of each of the first and second control gate layers, and the insulating material is between the control gate electrodes; and forming select gate electrodes adjacent the control gate electrodes.
US09136358B2	Nonvolatile semiconductor memory device and method for manufacturing same According to one embodiment, a nonvolatile semiconductor memory device includes: a stacked body including a plurality of electrode layers and a plurality of first insulating layers; a first channel body layer penetrating the stacked body; a memory film; an interlayer insulating film provided on the stacked body; a selection gate electrode provided on the interlayer insulating film; a second channel body layer penetrating the selection gate electrode and the interlayer insulating film and connected to the first channel body; a gate insulating film provided between the selection gate electrode and the second channel body layer; a second insulating layer provided on the gate insulating film and on the selection gate electrode; a contact layer provided on the second insulating layer; and a diffusion layer provided between the contact layer and the second insulating layer and connected to the second channel body layer and the contact layer.
US09136356B2	Non-planar field effect transistor having a semiconductor fin and method for manufacturing A method for manufacturing a semiconductor device includes forming two isolation structures in a substrate to define a fin structure between the two isolation structures in the substrate. A dummy gate and spacers are formed bridging the two isolation structures and over the fin structure. The two isolation structures are etched with the dummy gate and the spacers as a mask to form a plurality of slopes under the spacers in the two isolation structures. A gate etch stop layer is formed overlying the plurality of slopes. The dummy gate and the two isolation structures beneath the dummy gate are removed to create a cavity confined by the spacers and the gate etch stop layer. A gate is then formed in the cavity.
US09136347B2	Nitride semiconductor device Provided is a nitride semiconductor device including: a substrate having through via holes; first and second nitride semiconductor layers sequentially stacked on the substrate; drain electrodes and source electrodes provided on the second nitride semiconductor layer; and an insulating pattern provided on the second nitride semiconductor layer, the insulating pattern having upper via holes provided on the drain electrodes, wherein the through via holes are extended into the first and second nitride semiconductor layers and expose a bottom of each of the source electrodes.
US09136346B2	High electron mobility transistor (HEMT) capable of absorbing a stored hole more efficiently A semiconductor device that can more efficiently absorb a stored hole includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first electrode, a second electrode, a control electrode, and a third electrode. The second semiconductor layer is provided on the first semiconductor layer and has a band gap narrower than that of the first semiconductor layer. The second semiconductor layer includes a first portion and a second portion which is provided together with the first portion and contains an activated acceptor. The third semiconductor layer is provided on the first portion and has a band gap wider than or equal to the band gap of the second semiconductor layer. The first and the second electrodes are provided on the third semiconductor layer. The control electrode is provided between the first electrode and the second electrode. The third electrode is provided on the second portion.
US09136345B1	Method to produce high electron mobility transistors with Boron implanted isolation A method to produce high electron mobility transistors with Boron implanted isolation comprises the following steps: on a substrate forming in sequence a nucleation layer, a buffer layer, a barrier layer and a cap layer; coating a photoresist layer on the cap layer; photomasking and by exposure eliminating the photoresist layer of at least one isolation region; executing plural times an ion implantation process including: adjusting an incident angle of a Boron ion beam with respect to the substrate, and implanting the Boron ion beam into the cap layer, the barrier layer, the buffer layer, the nucleation layer and the substrate within the at least one isolation region so as to form an isolation structure while rotating the substrate by a rotation angle; eliminating the rest of the photoresist layer by exposure; and forming a source, a drain and a gate on the cap layer.
US09136340B2	Doped protection layer for contact formation Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate having a first doped region and a second doped region, and a gate stack formed on the semiconductor substrate. The semiconductor device also includes a main spacer layer formed on a sidewall of the gate stack. The semiconductor device further includes a protection layer formed between the main spacer layer and the semiconductor substrate, and the protection layer is doped with a quadrivalent element. In addition, the semiconductor device includes an insulating layer formed on the semiconductor substrate and the gate stack, and a contact formed in the insulating layer. The contact has a first portion contacting the first doped region and has a second portion contacting the second doped region. The first region extends deeper into the semiconductor substrate than the second portion.
US09136337B2	Group III nitride composite substrate and method for manufacturing the same, laminated group III nitride composite substrate, and group III nitride semiconductor device and method for manufacturing the same A group III nitride composite substrate includes a support substrate and a group III nitride film. A ratio st/mt of a standard deviation st of the thickness of the group III nitride film, to a mean value mt of the thickness thereof is 0.001 or more and 0.2 or less, and a ratio so/mo of a standard deviation so of an absolute value of an off angle between a main surface of the group III nitride film and a plane of a predetermined plane orientation, to a mean value mo of the absolute value of the off angle thereof is 0.005 or more and 0.6 or less. Accordingly, there is provided a low-cost and large-diameter group III nitride composite substrate including a group III nitride film having a large thickness, a small thickness variation, and a high crystal quality.
US09136331B2	Semiconductor constructions Some embodiments include semiconductor constructions having semiconductor material patterned into two mesas spaced from one another by at least one dummy projection. The dummy projection has a width along a cross-section of X and the mesas have widths along the cross-section of at least 3X. Some embodiments include semiconductor constructions having a memory array region and a peripheral region adjacent the memory array region. Semiconductor material within the peripheral region is patterned into two relatively wide mesas spaced from one another by at least one relatively narrow projection. The relatively narrow projection has a width along a cross-section of X and the relatively wide mesas have widths along the cross-section of at least 3X.
US09136329B2	Semiconductor structure with dielectric-sealed doped region Leakage current can be substantially reduced by the formation of a seal dielectric in place of the conventional junction between source/drain region(s) and the substrate material. Trenches are formed in the substrate and lined with a seal dielectric prior to filling the trenches with semiconductor material. Preferably, the trenches are overfilled and a CMP process planarizes the overfill material. An epitaxial layer can be grown atop the trenches after planarization, if desired.
US09136326B2	Semiconductor device with increased ESD resistance and manufacturing method thereof A semiconductor device and manufacturing method are disclosed which provide increased ESD resistance. By disposing a slit mask when forming a second p-type well layer, impurity concentration of the second p-type well layer is partially reduced. By forming a second n-type offset layer in the second p-type well layer having decreased impurity concentration, it is possible to increase thickness of the second n-type offset layer in this place compared with that heretofore known. By increasing thickness of the second n-type offset layer, a depletion layer does not reach an n-type drain layer at a low voltage when reverse bias is applied to the drain. It thus is possible to prevent thermal destruction caused by localized electrical field concentration. As a result, it is possible to increase ESD resistance. As it is sufficient to replace a photoresist mask, there is no increase in the number of processes.
US09136321B1	Low energy ion implantation of a junction butting region The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming a junction butting region using low energy ion implantation to reduce parasitic leakage and body-to-body leakage between adjacent FETs that share a common contact in high density memory technologies, such as dynamic random access memory (DRAM) devices and embedded DRAM (eDRAM) devices. A method disclosed may include forming a junction butting region at the bottom of a trench formed in a semiconductor on insulator (SOI) layer using low energy ion implantation and protecting adjacent structures from damage from ion scattering using a protective layer.
US09136316B2	Thin-film transistor array substrate with connection node and display device including the same A thin-film transistor (TFT) array substrate including: a first conductive layer selected from an active layer, a gate electrode, a source electrode, and a drain electrode of a TFT; a second conductive layer in a layer different from the first conductive layer; and a connection node coupling the first conductive layer to the second conductive layer. Here, the TFT array has a node contact hole formed by: a first contact hole in the first conductive layer; and a second contact hole in the second conductive layer, the second contact hole being integral with the first contact hole and not being separated from the first contact hole by an insulating layer, and at least a portion of the connection node is in the node contact hole.
US09136315B1	Organic light emitting display device and method of manufacturing the same Provided are an organic light emitting display (OLED) device and a method of manufacturing the same. The OLED device includes: an array substrate, an intermediate layer over the array substrate, an insulating layer over the intermediate layer, and a plurality of driving signal lines over the insulating layer in a non-display area of the array substrate, the plurality of driving signal lines being completely separated from the intermediate layer by the insulating layer, each of the plurality of driving signal lines being configured to supply a driving signal from a driving circuit unit to a respective sub-pixel of a pixel among a plurality of pixels, wherein the intermediate layer under the plurality of driving signal lines is configured to reduce visibility of the driving signal lines such that incident light on the intermediate layer is uniformly reflected or absorbed with the plurality of driving signal lines.
US09136314B2	Method for manufacturing organic EL display and organic EL display A method for manufacturing an organic electroluminescence display including multilayer structures that are each formed in a respective one of pixel areas in an effective area of a substrate and are each formed by a lower electrode, an organic layer, and an upper electrode, the organic electroluminescence display having a common electrode that electrically connects the pixel areas, the method including the steps of: forming a protective electrode and an outer-peripheral electrode that are electrically connected to the common electrode; forming the multilayer structures; and carrying out film deposition treatment involving electrification of the substrate.
US09136313B2	Organic light-emitting display apparatus and method for manufacturing the same An organic light-emitting display apparatus and a method for forming the same, the apparatus including a transparent protection layer on a substrate; a via insulation layer on the transparent protection layer; a pixel electrode on the via insulation layer; an opposite electrode on the pixel electrode; and an intermediate layer between the pixel electrode and the opposite electrode, the intermediate layer including an organic emission layer.
US09136309B2	Organic electroluminescent display An organic electroluminescent (EL) display includes a plurality of organic EL devices for red, green, and blue subpixels, each including a first electrode on a light output side, a second electrode opposite the first electrode, and an organic compound layer including a light-emitting layer therebetween. The organic EL devices have a resonator structure between a first reflective surface closer to the first electrode than the organic compound layer and a second reflective surface closer to the second electrode than the organic compound layer. A predetermined white color is displayed by mixing the three colors such that an optical distance of the organic EL devices of each color between an emission position in the light-emitting layer and the second reflective surface is set within ±10% from an optical distance corresponding to an nth-order minimum of a curve of required current density against at least the optical distance.
US09136302B2	Apparatus for vertically integrated backside illuminated image sensors A backside illuminated image sensor comprises a photodiode and a first transistor located in a first chip, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a second transistor formed in a second chip and a plurality of logic circuits formed in a third chip, wherein the second chip is stacked on the first chip and the third chip is stacked on the second chip. The logic circuit, the second transistor and the first transistor are coupled to each other through a plurality of boding pads and through vias.
US09136301B2	Multi-wave band light sensor combined with function of IR sensing and method of fabricating the same Provided is a multi-wave band light sensor combined with a function of infrared ray (IR) sensing including a substrate, an IR sensing structure, a dielectric layer, and a multi-wave band light sensing structure. The substrate includes a first region and a second region. The IR sensing structure is in the substrate for sensing IR. The dielectric layer is on the IR sensing structure. The multi-wave band light sensing structure includes a first wave band light sensor, a second wave band light sensor, and a third wave band light sensor. The second wave band light sensor and the first wave band light sensor are overlapped and disposed on the IR sensing structure on the first region of the substrate from the bottom up. The third wave band light sensor is in the dielectric layer of the second region.
US09136300B2	Next generation imaging methods and systems The advent of electronic-based imaging generally followed the four generalized ‘eras’ identified in FIG. 16 The trend is clearly toward higher and higher levels of integration for the act of “taking pictures.” FIG. 17 is a humble graphic attempt to summarize certain aspect of the present technology, and how a synthesis of these additional technical capabilities can represent a next era quite nicely. To the extent a great deal of past photography and filming has involved the mastery of technical limitations and turning limitations into art, a new challenge should develop where everyone has their own pocket Hasselblad/Steadicam, and exploration of new subject matter becomes the game.
US09136298B2	Mechanisms for forming image-sensor device with deep-trench isolation structure Embodiments of mechanisms of for forming an image-sensor device are provided. The image-sensor device includes a substrate having a front surface and a back surface. The image-sensor device also includes a radiation-sensing region operable to detect incident radiation that enters the substrate through the back surface. The image-sensor device further includes a doped isolation region formed in the substrate and adjacent to the radiation-sensing region. In addition, the image-sensor device includes a deep-trench isolation structure formed in the doped isolation region. The deep-trench isolation structure includes a trench extending from the back surface and a negatively charged film covering the trench.
US09136297B2	Method for driving semiconductor device A method for driving a semiconductor device which enables three-dimensional imaging is provided. The method for driving the semiconductor device also enables a reduction in the size of a pixel, two-dimensional imaging concurrently with the three-dimensional imaging, and/or accurate three-dimensional imaging of a fast-moving object. The distance from a light source to an object is measured by performing a first imaging and a second imaging with respect to the timings of the first irradiation and the second irradiation, respectively. A first photosensor absorbing visible light and a second photosensor absorbing infrared light are overlapped with each other and enable the two-dimensional imaging and the three-dimensional imaging, respectively, to be performed concurrently. Adjacent photosensors detect light reflected off substantially the same point of an object, preventing a reduction in the accuracy of the three-dimensional imaging of a fast-moving object.
US09136296B2	Photoelectric conversion apparatus and radiographic imaging apparatus A photodiode includes a first semiconductor layer having a first conductivity type, a second semiconductor layer having a second conductivity type that is opposite to the first conductivity type of the first semiconductor layer, and a third semiconductor layer interposed between the first semiconductor layer and the second semiconductor layer. An edge of the first semiconductor layer is inset from an edge of the second semiconductor layer.
US09136290B2	Solid state imaging device, portable information terminal device and method for manufacturing solid state imaging device According to one embodiment, a solid state imaging device includes a sensor substrate having a plurality of pixels formed on an upper face, a microlens array substrate having a plurality of microlenses formed and a connection post with one end bonded to a region between the microlenses on the microlens array substrate and with the other end bonded to the upper face.
US09136286B2	Display panel and electronic book It is an object to provide a display panel and an electronic book which are manufactured with high yield and have high reliability. A display panel is provided which includes, a flexible display portion in which a scan line and a signal line intersect with each other over a substrate, a signal line driver circuit for outputting a first signal to the signal line adjacent to a first side of the flexible display portion over the substrate, and a scan line driver circuit for outputting a second signal to the scan line adjacent to a second side of the flexible display portion. In the display panel, the mechanical strength of a portion provided with the signal line driver circuit or the scan line driver circuit is improved as compared to the mechanical strength of other than the portion.
US09136282B2	Memories and methods of forming thin-film transistors using hydrogen plasma doping Methods of forming thin-film transistors and memories are disclosed. In one such method, polycrystalline silicon is hydrogen plasma doped to form doped polycrystalline silicon. The doped polycrystalline silicon is then annealed. The hydrogen plasma doping and the annealing are decoupled.
US09136281B2	Display device According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second semiconductor layer, a gate line, a first source line, a second source line, a switching element, and a pixel electrode, wherein an area in which the first light shielding layer and the pixel electrode are opposed to each other and an area in which the second light shielding layer and the pixel electrode are opposed to each other are equal in size.
US09136280B2	Semiconductor device and driving method thereof A semiconductor device has a non-volatile memory cell including a write transistor which includes an oxide semiconductor and has small leakage current in an off state between a source and a drain, a read transistor including a semiconductor material different from that of the write transistor, and a capacitor. Data is written or rewritten to the memory cell by turning on the write transistor and applying a potential to a node where one of a source electrode and drain electrode of the write transistor, one electrode of the capacitor, and a gate electrode of the read transistor are electrically connected to one another, and then turning off the write transistor so that the predetermined amount of charge is held in the node.
US09136279B2	Display panel A display panel includes a plurality of pads configured to provide a driver thereon, a plurality of first contacts respectively connected to the plurality of pads, a plurality of second contacts respectively provided so as to be opposed to the plurality of first contacts, a semiconductor layer configured to form a plurality of polysilicon films that are respectively extended to connect the plurality of first contacts and the plurality of second contacts to each other, and a gate metal layer different from the polysilicon layer. Each of a plurality of transistors is formed at a position where the gate metal layer traverses the polysilicon layer, and a plurality of transistor groups of the plurality of transistors are arranged in a zigzag pattern. Each of the plurality of transistor groups include three adjacent transistors of the plurality of transistors.
US09136277B2	Three dimensional stacked semiconductor structure and method for manufacturing the same A three dimensional stacked semiconductor structure comprises a stack including plural oxide layers and conductive layers arranged alternately, at least a contact hole formed vertically to the oxide layers and the conductive layers, and extending to one of the conductive layers, an insulator formed at the sidewall of the contact hole, a conductor formed in the contact hole and connecting the corresponding conductive layer, and the corresponding conductive layer comprises a silicide. The silicide could be formed at edges or an entire body of the corresponding conductive layer. Besides the silicide, the corresponding conductive layer could, partially or completely, further comprise a conductive material connected to the conductor. The corresponding conductive layer which the contact hole extends to has higher conductivity than other conductive layers. Also, the 3D stacked semiconductor structure could be applied to a fan-out region of a 3D flash memory.
US09136276B1	Memory cell structure and method for forming the same A method for forming a memory cell structure includes following steps. A substrate including at least a memory cell region defined thereon is provided, and a first gate stack is formed in the memory cell region. A first LDD implantation is performed to form a first LDD at one side of the first gate stack in the memory cell region, and the first LDD includes a first conductivity type. A second LDD implantation is performed to form a second LDD at one side of the first gate stack opposite to the first LDD in the memory cell region, and the second LDD includes the first conductivity type. The first LDD and the second LDD are different from each other.
US09136275B2	Semiconductor device A semiconductor device includes at least one channel layer, insulating layers stacked on top of one another while surrounding the at least one channel layer, first grooves and second grooves alternately interposed between the insulating layers, wherein the first groves have a greater width than the second grooves having a second width, and conductive layers formed in the first grooves.
US09136272B2	Semiconductor device A semiconductor device may include a voltage supply unit suitable for supplying a voltage, a first conductive line coupled to the voltage supply unit, a second conductive line formed over the first conductive line, a voltage contact plug formed over the second conductive line, a voltage transmission line formed over the voltage contact plug, and a switching element suitable for switching the voltage transferred from the voltage transmission line.
US09136268B2	Semiconductor device and semiconductor memory device including capacitor A semiconductor device includes: a second transistor having a second conductive type formed on a first well region having a first conductive type; a first transistor having a first conductive type formed on a second well region having a second conductive type; a first well guard ring having the first conductive type, the first well guard ring including at least a first portion formed between the first transistor and the second transistor; a second well guard ring having the first conductive type, the second well guard ring including at least a first portion formed between the first transistor and the second transistor; and a first capacitor formed on at least one of the first well region and the second well region, and located between the first portion of the first well guard ring and the first portion of the second well guard ring.
US09136261B2	Structures and techniques for using mesh-structure diodes for electro-static discharge (ESD) protection An Electro-Static Discharge (ESD) protection using at least one I/O pad with at least one mesh structure of diodes provided on a semiconductor body is disclosed. The mesh structure has a plurality of cells. At least one cell can have a first type of implant surrounded by at least one cell with a second type of implant in at least one side of the cell, and at least cell can have a second type of implant surrounded by at least one cell with a first type of implant in at least one side of the cell. The two types of implant regions can be separated with a gap. A silicide block layer (SBL) can cover the gap and overlap into the both implant regions to construct P/N junctions on the polysilicon or active-region body on an insulated substrate. Alternatively, the two types of implant regions can be isolated by LOCOS, STI, dummy gate, or SBL on silicon substrate. The regions with the first and the second type of implants can be coupled to serve as the first and second terminal of a diode, respectively. The mesh structure can have a first terminal coupled to the I/O pad and a first terminal coupled to a first supply voltage.
US09136260B2	Method of manufacturing chip-stacked semiconductor package A method of manufacturing a chip-stacked semiconductor package, the method including preparing a base wafer including a plurality of first chips each having a through-silicon via (TSV); bonding the base wafer including the plurality of first chips to a supporting carrier; preparing a plurality of second chips; forming stacked chips by bonding the plurality of second chips to the plurality of first chips; sealing the stacked chips with a sealing portion; and separating the stacked chips from each other.
US09136259B2	Method of creating alignment/centering guides for small diameter, high density through-wafer via die stacking A method is provided for forming a die stack. The method includes forming a plurality of through-wafer vias and a first plurality of alignment features in a first die. A second plurality of alignment features is formed in a second die, and the first die is stacked on the second die such that the first plurality of alignment features engage the second plurality of alignment features. A method of manufacturing a die stack is also provided that includes forming a plurality of through-wafer vias on a first die, forming a plurality of recesses on a first die, and forming a plurality of protrusions on a second die. A die stack and a system are also provided.
US09136256B2	Converter having partially thinned leadframe with stacked chips and interposer, free of wires and clips Power supply system (100) comprises vertically sequentially a QFN leadframe (101), a first chip (110) with FET terminals on opposite sides, a flat interposer (120), and a second chip (130) with FET terminals and the terminals of the integrated driver-and-control circuit on a single side. Leadframe pad (107) has a portion (107a) recessed as pocket with a depth and an outline suitable for attaching the first chip with one terminal in the pocket and the opposite terminal co-planar with the un-recessed pad surface. The interposer comprises metal patterned in traces separated by gaps; the traces include metal of a first height and metal of a second height smaller than the first height, and insulating material filling the gaps and the height differences; one interposer side attached to the leadframe pad with the first chip, the opposite interposer side attached to the terminals of the second chip.
US09136255B2	Methods of fabricating package stack structure and method of mounting package stack structure on system board A package stack structure includes a lower semiconductor chip on a lower package substrate having a plurality of lower via plug lands, a lower package having a lower molding compound surrounding a portion of a top surface of the lower package substrate and side surfaces of the lower semiconductor chip, an upper semiconductor chip on an upper package substrate having a plurality of upper via plug lands, an upper package having an upper molding compound covering the upper semiconductor chip, via plugs vertically penetrating the lower molding compound, the via plugs connecting the lower and upper via plug lands, respectively, and a fastening element and an air space between a top surface of the lower molding compound and a bottom surface of the upper package substrate.
US09136253B2	Semiconductor light emitting device According to one embodiment, a semiconductor light emitting device includes: a conductive layer; a first stacked body; a second stacked body; a first light-transmissive electrode; and a first interconnect electrode. The first stacked body includes a first semiconductor layer and a second semiconductor layer. The second semiconductor layer is provided between the first semiconductor layer and the conductive layer. The first light emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The second stacked body includes a third semiconductor layer, a fourth semiconductor layer, and a second light emitting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the conductive layer. The second light emitting layer is provided between the third semiconductor layer and the fourth semiconductor layer. The first interconnect electrode is provided between the second semiconductor layer and the third semiconductor layer.
US09136252B2	Semiconductor device A semiconductor device includes a substrate having a first surface, a height adjuster mounted on the first surface of the substrate via a first adhesive layer, a semiconductor chip mounted on the height adjuster via a second adhesive layer, an electronic component mounted on the first surface of the substrate via a third adhesive layer, a bonding wire, and a sealing member. The length of the electronic component in a first direction corresponding to the thickness direction of the substrate is larger than the length of the semiconductor chip in the first direction, and the sum of the lengths of the height adjuster, the second adhesive layer, and the semiconductor chip in the first direction is larger than the length of the electronic component in the first direction.
US09136248B2	Multi-chip stacked package and method for forming the same The present disclosure relates to a multi-chip stacked package and a method for forming the same. The package comprises a chip carrier and multiple levels of chips, with one or more chips being arranged in each level, wherein one or more levels of chips, except for the topmost chips, have conductive vias, a patterned conductor layer is arranged on a back surface of a lower one of two chips in two adjacent levels, conductive bumps are provided between two adjacent levels of chips, and the conductive vias of a lower chip are electrically coupled to an upper chip by means of the patterned conductor layer and the conductive bumps. In the present disclosure, electrical connections are redistributed by means of the patterned conductor layer, and are further used for coupling multiple levels of chips by means of the conductive bumps. The resultant chip has a reduced chip size and can be used for electrically coupling various levels of chips, which achieves flexible electrical connections.
US09136246B2	Integrated chip package structure using silicon substrate and method of manufacturing the same An integrated chip package structure and method of manufacturing the same is by adhering dies on a silicon substrate and forming a thin-film circuit layer on top of the dies and the silicon substrate. Wherein the thin-film circuit layer has an external circuitry, which is electrically connected to the metal pads of the dies, that extends to a region outside the active surface of the dies for fanning out the metal pads of the dies. Furthermore, a plurality of active devices and an internal circuitry is located on the active surface of the dies. Signal for the active devices are transmitted through the internal circuitry to the external circuitry and from the external circuitry through the internal circuitry back to other active devices. Moreover, the chip package structure allows multiple dies with different functions to be packaged into an integrated package and electrically connecting the dies by the external circuitry.
US09136236B2	Localized high density substrate routing Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
US09136232B2	Method for bonding wafers and structure of bonding part A method for bonding wafers includes forming a first bonding part on a surface of a first wafer by stacking a diffusion preventing layer formed of a material having low wettability with AuSn above the first wafer and forming a bonding layer on a surface of the diffusion preventing layer such that the bonding layer stays back of an edge of the diffusion preventing layer, forming a second bonding part on a surface of a second wafer, and bonding the first bonding part and the second bonding part by eutectic bonding with an AuSn solder under a condition that the first wafer and the second wafer are opposed to each other.
US09136230B2	IC package with integrated waveguide launcher Embodiments described herein include an integrated circuit (IC) device. For example, the IC device can include a substrate configured to be coupled to a printed circuit board (PCB), an IC die attached to the substrate, and a waveguide launcher formed on the substrate. The waveguide launcher is electrically coupled to the IC die through the substrate.
US09136228B2	ESD protection device An ESD protection device includes a semiconductor substrate including input/output electrodes and a rewiring layer provided on a surface of the semiconductor substrate. An ESD protection circuit is provided on or in an outer layer of the semiconductor substrate, and the input/output electrodes are connected to the ESD protection circuit. The rewiring layer includes interlayer wiring lines, in-plane wiring lines, and post electrodes. First ends of the interlayer wiring lines disposed in the thickness direction are connected to the input/output electrodes disposed on the surface of the semiconductor substrate, and second ends of the interlayer wiring lines are connected to first ends of the in-plane wiring lines routed in plan view. Prismatic post electrodes are provided between second ends of the in-plane wiring lines and terminal electrodes.
US09136227B2	Semiconductor device with buried bit line A semiconductor device includes an isolation region, a semiconductor region, a groove, and an insulating film. The semiconductor region is defined by the isolation region. The groove is in the semiconductor region. The groove has first and second ends. At least one of the first and second ends reaches the isolation region. The insulating film is in the groove.
US09136226B2	Impurity doped UV protection layer An ultra-violet (UV) protection layer is formed over a semiconductor workpiece before depositing a UV curable dielectric layer. The UV protection layer prevents UV light from reaching and damaging underlying material layers and electrical devices. The UV protection layer comprises a layer of silicon doped with an impurity, wherein the impurity comprises O, C, H, N, or combinations thereof. The UV protection layer may comprise SiOC:H, SiON, SiN, SiCO:H, combinations thereof, or multiple layers thereof, as examples.
US09136224B2	Alignment mark, photomask, and method for forming alignment mark According to one embodiment, an alignment mark provided on an underlayer includes a plurality of first guide pattern features, and a first self-assembled film. The first guide pattern features extend in a first direction and are aligned in a second direction crossing the first direction. The first self-assembled film is provided between adjacent ones of the first guide pattern features and includes a plurality of first line pattern features and a second line pattern feature. The first line pattern features extends in the first direction, is aligned in the second direction, and has a pitch in the second direction narrower than a pitch in the second direction of the first guide pattern features. The second line pattern feature is provided between adjacent ones of the first line pattern features and extends in the first direction.
US09136223B2	Forming alignment mark and resulting mark Methods for forming an alignment mark and the resulting mark are disclosed. Embodiments may include forming a first shape having rotational symmetry; forming a second shape; and forming an alignment mark by combining the first shape and one or more of the second shape, wherein the alignment mark has rotational symmetry.
US09136220B2	Semiconductor package and method for manufacturing the semiconductor package A semiconductor package includes a first semiconductor chip including a target circuit surface and a side surface, a first sealing insulating layer including a first surface positioned toward the target circuit surface and configured to seal the target circuit surface and the side surface, at least one wiring layer formed on the first surface of the first sealing insulating layer, at least one insulating layer formed on the at least one wiring layer, a second semiconductor chip mounted on the at least one insulating layer, and a second sealing insulating layer formed on the at least one insulating layer and configured to seal the second semiconductor chip.
US09136217B2	One-time programmable memory cell A programmable memory cell including a thick oxide spacer transistor, a programmable thin oxide anti-fuse disposed adjacent to the thick oxide spacer transistor, and first and second thick oxide access transistors. The thick oxide spacer transistor and first and second thick oxide access transistors can include an oxide layer that is thicker than an oxide layer of the programmable thin oxide anti-fuse. The programmable thin oxide anti-fuse and the thick oxide spacer transistor can be natively doped. The first and second thick oxide access transistors can be doped so as to have standard threshold voltage characteristics.
US09136215B2	Manufacturing method for semiconductor package A manufacturing method includes the follow steps. Firstly, a carrier is provided. Then, a plurality of traces are formed on the carrier. Then, a trace molding compound layer is formed on the carrier by a first molding process. Then, the carrier is removed from the trace molding compound layer to expose an etched surface of the trace molding compound layer and trace upper surfaces of the traces. Then, at least a chip is disposed on the etched surface of the trace molding compound layer and the chip is connected to the trace upper surfaces. Then, a chip molding compound layer is formed on the etched surface by a second molding process substantially similar to the first molding process, wherein the chip molding compound layer and the trace molding compound layer are formed of substantially the same molding compound material.
US09136210B2	Interposer and semiconductor device An interposer includes a substrate includes a plurality of penetrating electrodes, and a wiring portion formed on the substrate, in which the wiring portion includes a wiring layer electrically connected to the penetrating electrodes and an insulating layer covering the wiring layer. The interposer includes a plurality of first UBM structures provided at a side opposite the substrate of the wiring portion, in which the first UBM structures are electrically connected to the wiring layer. The interposer includes a plurality of bumps provided at the side opposite the wiring portion of the substrate, in which the plurality of bumps is electrically connected to each of the penetrating electrodes via a plurality of second UBM structures.
US09136206B2	Copper contact plugs with barrier layers A device includes a conductive layer including a bottom portion, and a sidewall portion over the bottom portion, wherein the sidewall portion is connected to an end of the bottom portion. An aluminum-containing layer overlaps the bottom portion of the conductive layer, wherein a top surface of the aluminum-containing layer is substantially level with a top edge of the sidewall portion of the conductive layer. An aluminum oxide layer is overlying the aluminum-containing layer. A copper-containing region is over the aluminum oxide layer, and is spaced apart from the aluminum-containing layer by the aluminum oxide layer. The copper-containing region is electrically coupled to the aluminum-containing layer through the top edge of the sidewall portion of the conductive layer.
US09136197B2	Impedence controlled packages with metal sheet or 2-layer RDL A microelectronic assembly includes an interconnection element, a conductive plane, a microelectronic device, a plurality of traces, and first and second bond elements. The interconnection element includes a dielectric element, a plurality of element contacts, and at least one reference contact thereon. The microelectronic device includes a front surface with device contacts exposed thereat. The conductive plane overlies a portion of the front surface of the microelectronic device. Traces overlying a surface of the conductive plane are insulated therefrom and electrically connected with the element contacts. The traces also have substantial portions spaced a first height above and extending at least generally parallel to the conductive plane, such that a desired impedance is achieved for the traces. First bond element electrically connects the at least one conductive plane with the at least one reference contact. Second bond elements electrically connect device contacts with the traces.
US09136194B2	Resin composition for encapsulation and electronic device using the same The present invention provides a resin composition for encapsulating electronic components that contains a phenol resin curing agent and an epoxy resin, in which either the phenol resin curing agent or the epoxy resin has a biphenyl structure; a resin composition for encapsulating electronic components that contains a phenol resin curing agent and an epoxy resin, in which a glass transition temperature of a cured material is equal to or higher than 200° C., and a weight reduction rate of the cured material is equal to or lower than 0.3%; and an electronic device that includes an electronic component encapsulated with the resin composition.
US09136192B2	Warp correction device and warp correction method for semiconductor element substrate A warp correction apparatus includes an injection mechanism including a nozzle that performs injection treatment, an adsorption table that holds the substrate by adsorption at a principal surface side or a film surface side, a moving mechanism that moves the adsorption table so that the substrate relatively moves with respect to an injection area of an injection particle by the nozzle, an injection treatment chamber that houses the substrate held on the adsorption table and in the interior of which injection treatment is performed, a measurement mechanism that measures a warp of the substrate, and a control device that, based on a difference between a target warp amount and a warp amount measured by the measurement mechanism, performs at least either one of a setting processing of an injection treatment condition of the injection mechanism and an accept/reject determination of the substrate for which injection treatment has been performed.
US09136190B2	Semiconductor manufacturing process system and method According to one embodiment, a wafer processing device includes a processed number counting unit that counts a number of processed wafers, and a maintenance post-processing unit that executes a dummy lot process and a QC lot process after a maintenance process. A wafer preparation device prepares the dummy lot and the QC lot, when a first processed number is counted by the processed number counting unit. When a second processed number is counted by the processed number counting unit, a carrier device carries the dummy lot and the QC lot to the wafer processing device simultaneous with the maintenance process, before the maintenance process is completed.
US09136187B2	Method of adjusting a threshold voltage of a transistor in the forming of a semiconductor device including the transistor A method of forming a semiconductor device includes forming a first transistor and a second transistor on a substrate, monitoring processes of forming the first and second transistors to find an error and performing an additional ion implantation process to form a low-concentration dopant region or a halo region on the first transistor or the second transistor corresponding to a found error.
US09136184B2	In situ optical diagnostic for monitoring or control of sodium diffusion in photovoltaics manufacturing A method of fabricating a photovoltaic device 100, includes the steps of providing a glass substrate 102, depositing a molybdenum layer 104 on a surface of the glass substrate, directing light through the glass substrate to the near-substrate region of the molybdenum layer 206, detecting an optical property of the near-substrate region of the molybdenum layer after interaction with the incident light 208 and determining a density of the near-substrate region of the molybdenum layer from the detected optical property 210. A molybdenum deposition parameter may be controlled based upon the determined density of the near-substrate region of the molybdenum layer 218. A non-contact method measures a density of the near-substrate region of a molybdenum layer and a deposition chamber 300.
US09136183B2	Transistor device and fabrication method Fabrication methods for junctionless transistor and complementary junctionless transistor. An isolation layer doped with a first-type ion is formed on a semiconductor substrate and an active layer doped with a second-type ion is formed on the isolation layer. The active layer includes a first portion between a second portion and a third portion of the active layer. Portions of the isolation layer under the second and third portions of the active layer are removed to suspend the second and third portions of the active layer. A gate structure is formed on the first portion of the active layer. A source and a drain are formed by doping the second portion and the third portion of the active layer with the second-type ion on both sides of the gate structure. The source and the drain have a same doping type as the first portion of the active layer.
US09136177B2	Methods of forming transistor devices with high-k insulation layers and the resulting devices Method of forming transistor devices is disclosed that includes forming a first layer of high-k insulating material and a sacrificial protection layer above first and second active regions, removing the first layer of insulating material and the protection layer from above the second active region, removing the protection layer from above the first layer of insulating material positioned above the first active region, forming a second layer of high-k insulating material above the first layer of insulating material and the second active region, forming a layer of metal above the second layer of insulating material, and removing portions of the first and second layers of insulating material and the metal layer to form a first gate stack (comprised of the first and second layers of high-k material and the layer of metal) and a second gate stack (comprised of the second layer of high-k material and the layer of metal).
US09136176B2	Semiconductor devices including an epitaxial layer with a slanted surface A method of fabricating one or more semiconductor devices includes forming a trench in a semiconductor substrate, performing a cycling process to remove contaminants from the trench, and forming an epitaxial layer on the trench. The cycling process includes sequentially supplying a first reaction gas containing germane, hydrogen chloride and hydrogen and a second reaction gas containing hydrogen chloride and hydrogen onto the semiconductor substrate.
US09136172B2	Method of manufacturing semiconductor device and method of manufacturing electronic assembly A method of manufacturing a semiconductor device, includes: providing an adhesive layer on a support body; providing a semiconductor element on the adhesive layer; providing a resin layer on the adhesive layer, the semiconductor element being provided on the adhesive layer, and forming a substrate on the adhesive layer, the substrate including the semiconductor element and the resin layer; and removing the substrate from the adhesive layer, wherein an adhesive force of the adhesive layer in a direction in which the substrate is removed is less than an adhesive force of the adhesive layer in a planar direction in which the substrate is formed.
US09136171B2	Interconnect structure and fabrication method An interconnect structure and fabrication method are provided. A substrate can include a semiconductor device disposed in the substrate. At least two porous films can be formed over the substrate and can include a first porous film having a first pore size, and a second porous film having a second pore size formed on the first porous film. The first porous size and the second porous size are different. The interconnect can be formed through the plurality of porous films to provide electrical connection to the semiconductor device in the substrate.
US09136165B2	Methods for stiction reduction in MEMS sensors A method of the invention includes reducing stiction of a MEMS device by providing a conductive path for electric charge collected on a bump stop formed on a substrate. The bump stop is formed by depositing and patterning a dielectric material on the substrate, and the conductive path is provided by a conductive layer deposited on the bump stop. The conductive layer can also be roughened to reduce stiction.
US09136164B2	Semiconductor device and fabrication method Semiconductor devices and fabrication methods are provided. First metal layers are provided in a substrate including a first region and a second region. An interlayer dielectric (ILD) layer formed over the substrate includes a top surface in the second region coplanar with a bottom of a trench in the ILD layer in the first region. Through-holes are formed in the ILD layer. A polymer layer fills the through-holes and the trench in ILD layer and covers top surface of ILD layer in both regions. The polymer layer is exposed and developed to form vias, each including an upper via in the polymer layer and a lower via in ILD layer. A second metal layer is formed to fill each via on a corresponding first metal layer in both regions. The polymer layer between adjacent second metal layers is removed to form air gaps in the second region.
US09136161B2	Micro pick up array with compliant contact Micro pick up arrays for transferring micro devices from a carrier substrate are disclosed. In an embodiment, a micro pick up array includes a compliant contact for delivering an operating voltage from a voltage source to an array of electrostatic transfer heads. In an embodiment, the compliant contact is moveable relative to a base substrate of the micro pick up array.
US09136160B2	Solid hole array and method for forming the same A solid hole array and a method for forming the same are disclosed. The solid hold array may comprise: substrate with a via; a top hole array base formed on a top surface of the substrate and a bottom hole array base formed on a bottom surface of the substrate, wherein a front hole is located in the top hole array base at a place corresponding to the via; and top protection layer formed on a surface and sidewalls of the top hole array base and a bottom protection layer formed on a surface of the bottom hole array base, wherein a rear window is located in the bottom hole array base and the bottom protection layer at a place corresponding to the via.
US09136157B1	Deep N wells in triple well structures A disclosed method for fabricating a structure in a semiconductor die comprises steps of implanting a deep N well in a substrate, depositing an epitaxial layer over the substrate, and forming a P well and a lateral isolation N well over the deep N well, wherein the lateral isolation N well and the P well are fabricated in the substrate and the epitaxial layer, and wherein the lateral isolation N well laterally surrounds the P well, and wherein the deep N well and the lateral isolation N well electrically isolate the P well. Implanting a deep N well can comprise steps of depositing a screen oxide layer over the substrate, forming a mask over the screen oxide layer, implanting the deep N well in the substrate, removing the mask, and removing the screen oxide layer. Depositing the epitaxial layer can comprise depositing a single crystal silicon over the substrate.
US09136154B2	Substrateless power device packages A substrate-less composite power semiconductor device may be fabricated from a vertical conductive power semiconductor device wafer that includes a top metal layer located on a top surface of the wafer by a) forming solder bumps on top of the top metal layer; b) forming wafer level molding around the solder bumps such that the solder bumps are exposed through a top of the wafer level molding; c) grinding a back side of the device wafer to reduce a total thickness of a semiconductor material portion of the device wafer to a final thickness; and d) forming a back metal on a back surface of the wafer.
US09136153B2	3D semiconductor device and structure with back-bias A 3D semiconductor device, including: a first layer including first transistors; a first interconnection layer interconnecting the first transistors and includes aluminum or copper; a second layer including second transistors; where the second transistors are aligned to the first transistors with a less than 40 nm alignment error, and where the second layer is overlying the first interconnection layer, and where at least one of the second transistors has a back-bias structure designed to modify the performance of at least one of the second transistors.
US09136149B2	Loading port, system for etching and cleaning wafers and method of use A loading port includes a housing and a plurality of stations defined in the housing configured to receive a front opening universal pod (FOUP). The loading port further includes a connector configured to receive an inert gas. At least one of the plurality of stations is configured to deliver the inert gas to the FOUP to purge an interior of the FOUP of moisture. A system including the loading port and a method of using the system are also described.
US09136138B2	Equipment for manufacturing semiconductor device and seasoning process method of the same Disclosed is an apparatus for processing a semiconductor and a method for generating a seasoning process of a reaction chamber. The method may include generating plasma in the reaction chamber using a production process recipe, obtaining at least one reference measurement value related to a byproduct of the generated plasma, performing a plurality of seasoning tests on the chamber to obtain a plurality of test results, generating an empirical model by forming at least one relational expression correlating variables manipulated during the performing of the plurality of seasoning tests to the plurality of test results, and estimating a seasoning process by using the at least one relational expression to estimate at least one estimated calculation value.
US09136137B2	Etchant composition and methods of fabricating metal wiring and thin film transistor substrate using the same An etchant composition including 0.5 wt % to 20 wt % of a persulfate, 0.01 wt % to 1 wt % of a fluorine compound, 1 wt % to 10 wt % of an inorganic acid, 0.01 wt % to 2 wt % of an azole-based compound, 0.1 wt % to 5 wt % of a chlorine compound, 0.05 wt % to 3 wt % of a copper salt, 0.01 wt % to 5 wt % of an antioxidant or a salt thereof, based on a total weight of the etchant composition, and water in an amount sufficient for the total weight of the etchant composition to be equal to 100 wt % is disclosed. The etchant composition is suitable for use in forming a metal wiring by etching a metal layer including copper or in fabricating a thin film transistor substrate for a display apparatus.
US09136135B2	Method of fabricating semiconductor device A method of fabricating a semiconductor device includes forming a gate pattern on a substrate, and etching sides of the gate pattern using a first wet-etching process to form a first recess. The first wet-etching process includes using an etchant containing a first chemical substance including a hydroxyl functional group (—OH) and a second chemical substance capable of oxidizing the substrate. The concentration of the second chemical substance is 1.5 times or less the concentration of the first chemical substance.
US09136131B2	Common fill of gate and source and drain contacts A semiconductor structure includes a source region, a drain region, a channel region and a gate region over a bulk silicon substrate. The gate region further includes a dielectric layer and one or more work function layers disposed over the dielectric layer. A first filler material, such as a flowable oxide is provided over the source region and the drain region. A second filler material, such as an organic material, is provided within the gate region. The first filler material and the second filler material are selectively removed to create, source, drain and gate openings. The gate, source and drain openings are filled simultaneously with a metal, such as tungsten, to create a metal gate structure, source contact and drain contact.
US09136129B2	Non-volatile memory (NVM) and high-k and metal gate integration using gate-last methodology A method of making a semiconductor structure uses a substrate and includes a logic device in a logic region and a non-volatile memory (NVM) device in an NVM region. An NVM structure is formed in the NVM region. The NVM structure includes a control gate structure and a select gate structure. A protective layer is formed over the NVM structure. A gate dielectric layer is formed over the substrate in the logic region. The gate dielectric layer includes a high-k dielectric. A sacrificial gate is formed over the gate dielectric layer in the logic region. A first dielectric layer is formed around the sacrificial gate. Chemical mechanical polishing is performed on the NVM region and the logic region after forming the first dielectric layer. The sacrificial gate is replaced with a metal gate structure.
US09136127B2	Method of fabricating GOI silicon wafer, GOI silicon wafer and GOI detection method The invention discloses a method of fabricating a GOI silicon wafer, a GOI silicon wafer, and a method of GOI detection on the fabricated GOI silicon wafer, where the method of fabricating a GOI silicon wafer includes: in a process of fabricating a trench-type VDMOS, after a trench is formed and a gate oxide layer is grown, a poly-silicon layer is grown; and after the poly-silicon layer is grown, a mask of a metal layer is aligned with a silicon substrate with the poly-silicon layer grown, where the mask of the metal layer is a mask used in formation of the metal layer in the process of fabricating the VDMOS; and at least one pattern for GOI detection is formed on the silicon substrate with the poly-silicon layer grown, through the aligned mask of the metal layer in a photo-lithography to form a GOI silicon wafer. With the technical solution here according to an embodiment of the invention, an error between the GOI silicon wafer and the VDMOS device can be lowered, good accuracy can be achieved, and a resource can be saved effectively, and furthermore the accuracy in a result of GOI detection can be well improved.
US09136117B2	Method for making semiconducting single wall carbon nanotubes A method for making semiconducting single walled carbon nanotubes (SWCNTs) includes providing a substrate. A single walled carbon nanotube film including metallic SWCNTs and semiconducting SWCNTs is located on the substrate. At least one electrode is located on the single walled carbon nanotube film and electrically connected with the single walled carbon nanotube film. A macromolecule material layer is located on the single walled carbon nanotube film to cover the single walled carbon nanotube film. The macromolecule material layer covering the metallic SWCNTs is removed by an electron beam bombardment method, to expose the metallic SWCNTs. The metallic SWCNTs and the macromolecule material layer covering the semiconducting SWCNTs are removed.
US09136115B2	Method for manufacturing semiconductor device An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.
US09136114B2	Method of manufacturing semiconductor device, substrate processing method, computer-readable medium with program for executing a substrate processing method, and substrate processing apparatus A method of manufacturing a semiconductor device is provided, including: forming an oxynitride film having a specific film thickness on a substrate by performing multiple numbers of times a cycle of: forming a specific element-containing layer on the substrate by supplying a source gas containing a specific element into a processing vessel in which the substrate is housed; changing the specific element-containing layer to a nitride layer by supplying a nitrogen-containing gas into the processing vessel; and changing the nitride layer to an oxynitride layer by supplying an oxygen-containing gas and an inert gas into the processing vessel, with this sequence as one cycle, wherein a composition ratio of the oxynitride film having the specific film thickness is controlled by controlling a partial pressure of the oxygen-containing gas in the processing vessel, in changing the nitride layer to the oxynitride layer.
US09136108B2	Method for restoring porous surface of dielectric layer by UV light-assisted ALD A method for restoring a porous surface of a dielectric layer formed on a substrate, includes: (i) providing in a reaction space a substrate on which a dielectric layer having a porous surface with terminal hydroxyl groups is formed as an outer layer; (ii) supplying gas of a Si—N compound containing a Si—N bond to the reaction space to chemisorb the Si—N compound onto the surface with the terminal hydroxyl groups; (iii) irradiating the Si—N compound-chemisorbed surface with a pulse of UV light in an oxidizing atmosphere to oxidize the surface and provide terminal hydroxyl groups to the surface; and (iv) repeating steps (ii) through (iii) to form a film on the porous surface of the dielectric layer for restoration.
US09136107B2	Semiconductor device and method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes forming an electron transit layer on a semiconductor substrate, forming an electron supply layer on the electron transit layer, forming a cap layer on the electron supply layer, forming a protection layer on the cap layer, the protection layer having an opening part, through which a part of the cap layer is exposed, and forming an oxidation film on an exposed surface of the cap layer by a wet process.
US09136106B2	Method for integrated circuit patterning A method of forming a target pattern includes forming a plurality of lines over a substrate with a first mask and forming a first spacer layer over the substrate, over the plurality of lines, and onto sidewalls of the plurality of lines. The plurality of lines is removed, thereby providing a patterned first spacer layer over the substrate. The method further includes forming a second spacer layer over the substrate, over the patterned first spacer layer, and onto sidewalls of the patterned first spacer layer, and forming a patterned material layer over the second spacer layer with a second mask. Whereby, the patterned material layer and the second spacer layer collectively define a plurality of trenches.
US09136105B2	Bevel etcher The wafer bevel etching apparatus of the present invention includes a wafer-protecting mask to cover parts of a wafer. A central region and a wafer bevel region surrounding the central region are defined on the wafer. The wafer-protecting mask includes a center sheltering region and at least one wafer bevel sheltering region. The center sheltering region can completely shelter the central region of the wafer, and the wafer bevel sheltering region extends from the outside edge of the center sheltering region, shelters parts of the wafer bevel region, and exposes the other parts of the wafer bevel region.
US09136098B2	Ion guide coupled to MALDI ion source A pulsed ion source is disclosed wherein the ion source is energized one or more times to generate a first group of ions and a second group of ions. The first and second groups of ions are simultaneously transmitted through an ion guide whilst keeping the first and second groups of ions isolated from each other.
US09136091B2	Electron beam apparatus for inspecting a pattern on a sample using multiple electron beams An electron beam apparatus for inspecting a pattern on a sample using multiple electron beams includes a plurality of primary electro-optical systems and a plurality of secondary electro-optical systems associated with the respective primary electro-optical systems. The primary electro-optical systems are for irradiating multiple primary electron beams on a surface of the sample, and each includes an electron gun having an anode and an objective lens. The secondary electro-optical systems are for inducing secondary electrons emitted from a surface of the sample by irradiation of the primary electron beams. Detectors are each for detecting the secondary electrons and generating electric signals corresponding to the detected electrons. The anodes of the electron guns of the primary electro-optical systems comprise an anode substrate in common having multiple holes corresponding to the axes of the respective primary electro-optical systems. The anode substrate has metal coatings around the respective holes.
US09136088B2	Detection apparatus and operating method The disclosed technology provides a detection apparatus and its operating method. The disclosed technology provides a detection apparatus, comprising: a test chamber, an exchange chamber, and a communicating mechanism, which is provided between the test chamber and the exchange chamber and capable of rendering the test chamber and the exchange chamber separated from or communicated with each other; wherein transmission devices are positioned within the test chamber and the exchange chamber, respectively, and the transmission devices are adapted to convey a probe frame from the test chamber to the exchange chamber or from the exchange chamber to the test chamber.
US09136085B2	Shock-resistant image intensifier In one exemplary embodiment, a shock-resistant night vision assembly is configured to detect a high-acceleration event, for example, resulting from a round or burst of high-caliber rifle fire. Upon detecting the event, a voltage such as a photocathode voltage is forced to an inactive or protective level and held there for approximately 50 ms, giving time for mechanical excursions of the microchannel plate to settle out. Damage from physical impact and electrostatic discharge may thus be mitigated.
US09136084B2	Micro discharge devices, methods, and systems Micro discharge devices, methods, and systems are described herein. One device includes a non-conductive material, a channel through at least a portion of the non-conductive material having a first open end and a second open end, a first electrode proximate to a first circumferential position of the channel between the first open end and the second open end, a second electrode proximate to a second circumferential position of the channel between the first open end and the second open end, a discharge region defined by a portion of the channel between the first electrode and the second electrode, an optical emission collector positioned to receive an optical emission from the discharge region, and a discharge shielding component between the discharge region and the optical emission collector.
US09136082B2	Ground-fault circuit interrupter A ground-fault circuit interrupter (GFCI) device, including a relay for control a switch to be in an open position or a closed position, the relay including a first coil and a second coil, wherein when both the first coil and the second coil are non-conductive, the switch is caused to be in the open position. The GFCI also includes a relay start circuit connected to the first coil for causing the first coil to be conductive or non-conductive, wherein when the first coil is conductive, the first coil causes the switch to be in the closed position, but after the first coil is conductive, the coil start circuit becomes non-conductive. The GFCI further includes a relay sustain circuit connected to the second coil for causing the second coil to be conductive or non-conductive. In addition, the GFCI includes a ground fault detect circuit for causing both the relay start circuit and the relay sustain circuit to become non-conductive when a fault signal is detected, causing both the first coil and the second coil to be non-conductive, thereby causing the switch to be in the open position.
US09136081B2	D/C trip assembly A D/C trip assembly for a circuit breaker is provided. The D/C trip assembly includes a magnet, a mounting assembly and an armature assembly. The mounting assembly includes a body, the mounting assembly body including a pivotal coupling. The armature assembly includes a magnetic body and a trip bar linkage, the trip bar linkage extending from the armature assembly body. The armature assembly body is structured to move between a first position, wherein the armature assembly body is close to the magnet, and a second position, wherein the armature assembly body is spaced from the magnet. The trip bar linkage is structured to move between a first position and a second position, the trip bar linkage positions corresponding to the armature assembly body positions. The trip bar linkage is structured to be coupled to a trip bar.
US09136080B2	Electromagnet device and electromagnetic relay using the same The present invention provides an electromagnet device including: an electromagnet block having a spool around which a coil is wound and an iron core inserted in a central hole of the spool; a yoke connected to an end portion of the iron core via a permanent magnet; a movable iron piece pivotably supported on a pivoting shaft center located at an end face edge portion of the yoke, the movable iron piece is adapted to pivot on a basis of magnetization and demagnetization of the electromagnet block, and a protrusion having a linear edge portion which extends in parallel to the pivoting shaft center and the protrusion protrudes from at least either the movable iron piece or the iron core, the protrusion protrudes in a facing direction in which the movable iron piece and the iron core face each other.
US09136076B2	Mechanically operated cell switch of vacuum circuit breaker There is provided a mechanically operated cell (MOC) switch of a vacuum circuit breaker, which is uniformly operated regardless of an insertion stroke of a push rod that operates a MOC switch of a vacuum circuit breaker. The MOC switch outputting an ON/OFF state of a vacuum circuit breaker when the vacuum circuit breaker operates includes: a main bracket; a rotational shaft installed in the main bracket; a connection lever rotatably coupled to the rotational shaft and having one end connected to an auxiliary switch; a roller coupled to the other end of the connection lever; and a horizontal moving unit installed in a portion of the to main bracket and making a horizontal movement to rotate the roller and allowing the other end of the connection lever to make an ascending and descending movement.
US09136075B2	Switch module built in steering wheel Disclosed is a switch module located within a steering wheel of a vehicle that includes an input switch module, a feedback module, and a controller. The input switch module allows a driver to conduct a variety of switching operations by, for example, pressing the left, right, front, or back of the steering wheel, or by making a leftward or rightward torsional motion or a leftward or rightward diagonal motion with respect to the steering wheel. The switch module controller receives inputs from the input switch module that correlate to these switching operations, and outputs a signal to a vehicle device such as, for example, a head up display, and also to a feedback module, which provides a feedback response to the driver confirming the switching operation. The present invention allows the driver to control vehicle devices and systems while maintaining contact with the steering wheel, thereby improving vehicle safety.
US09136072B2	Indicator apparatus In an indicator apparatus, a prism member includes: a prism member side surface; and a transmitting and reflecting surface that is inclined relative to the prism member side surface, and into which light from a light source is admitted. An adjacent member has an adjacent surface that is adjacent to the prism member side surface. The light from the light source is admitted into the transmitting and reflecting surface when the light source is lit, and passes through the prism member. If the prism member is viewed frontally when the light source is not lit, the adjacent surface is visible by optical reflection at the transmitting and reflecting surface.
US09136060B2	Precision high-frequency capacitor formed on semiconductor substrate A method of fabricating a capacitor in a semiconductor substrate. The semiconductor substrate is doped to have a low resistivity. A second electrode, insulated from a first electrode, is formed over a front side surface and connected by a metal-filled via to the back side surface. The via may be omitted and the second electrode may be in electrical contact with the substrate or may be formed on top of the dielectric layer, yielding a pair of series-connected capacitors. ESD protection for the capacitor is provided by a pair of oppositely-directed diodes formed in the substrate connected in parallel with the capacitor. Capacitance is increased while maintaining a low effective series resistance. Electrodes include a plurality of fingers, which are interdigitated with the fingers of other electrode. The capacitor is fabricated in a wafer-scale process with other capacitors, where capacitors are separated from each other by a dicing technique.
US09136057B2	Ceramic electronic component, method of manufacturing the same, and collective component A collective component has a first region that intersects with a conductive film for external terminal electrodes in a break line in which break leading holes are arranged and a second region that does not intersect with the conductive film for external terminal electrodes in the break line. The plurality of break leading holes includes at least one extending break leading hole located so as to extend over the first region and the second region.
US09136050B2	Magnetic device and method of manufacturing the same A magnetic device comprises a lead frame, a first core body and a coil. The lead frame has a first portion and a second portion spaced apart from the first portion. A first core body is disposed on the lead frame, wherein the first core body comprises a first through opening and a second through opening. A coil is disposed on the first core body, wherein the coil has a first terminal and a second terminal, wherein the first portion is electrically connected with the first terminal via the first through opening, and the second portion is electrically connected with the second terminal via the second through opening, respectively.
US09136047B2	Method of forming low-resistance metal pattern, patterned metal structure, and display devices using the same Disclosed herein is a method of forming low-resistance metal pattern, which can be used to obtain a metal pattern having stable and excellent characteristics by performing sensitization treatment using a copper compound before an activation treatment for forming uniform and dense metal cores, a patterned metal structure, and display devices using the same.
US09136046B2	Superconducting wire rod and method for manufacturing superconducting wire rod Impurities are reduced in an oxide superconducting layer and in an interface between the oxide superconducting layer and an intermediate layer. A superconducting wire rod 1 has a structure including a substrate (10), an intermediate layer (20) formed on the substrate (10), a reaction suppressing layer (28) formed on the intermediate layer (20) and mainly containing polycrystalline SrLaFeO4+δ1 or CaLaFeO4+δ2, in which the δ1 and the δ2 each represent an amount of non-stoichiometric oxygen, and an oxide superconducting layer (30) formed on the reaction suppressing layer (28) and mainly containing an oxide superconductor.
US09136042B2	Differential signal transmission cable, multiwire differential signal transmission cable, and differential signal transmission cable producing method and apparatus A differential signal transmission cable includes an insulated wire including a pair of differential signal transmission conductors coated with an insulation, a shield tape conductor made of a band-like member including an electrically conductive metal layer, and wrapped along an outer surface of the insulated wire so that its ends in a width direction are overlapped together, a first resin tape spirally wound along an outer surface of the shield tape conductor and around an outer side of the shield tape conductor, and a second resin tape spirally wound along an outer surface of the first resin tape and around an outer side of the first resin tape. The shield tape conductor, the first resin tape and the second resin tape are wound in a same circumferential direction around a center axis of the insulated wire.
US09136037B1	Adhesion promoter Compositions useful for improving the adhesion of coating compositions, such as dielectric film-forming compositions, include a hydrolyzed amino-alkoxysilane having a protected amino moiety. These compositions are useful in methods of improving the adhesion of coating compositions to a substrate, such as an electronic device substrate.
US09136036B2	Injection moldable, thermoplastic composite materials A thermoplastic composite material, which includes a thermoplastic, organic polymer; and a plurality of carbon nanotubes, is provided. The thermoplastic composite material exhibits a bulk volume resistivity of about 103 Ω-cm (ohm cm) to 1010 Ω-cm at 5,000 volts. Such thermoplastic composite materials may find utility in applications that require the thermoplastic to be capable of withstanding high voltage spikes, as would be encountered during a lightning strike.
US09136034B2	Polymer electrolyte membrane for a fuel cell, and method for preparing same The present disclosure relates to a polymer electrolyte membrane having a construction wherein an ionomer is charged in pores of a nanoweb having a high melting point, being insoluble in an organic solvent and having excellent pore characteristics, under optimum conditions. Therefore, an overall thickness of the electrolyte membrane may be reduced, thereby attaining advantages such as decrease in ohmic loss, reduction of material costs, excellent heat resistance, low thickness expansion rate which in turn prevents proton conductivity from being deteriorated over a long term. The polymer electrolyte membrane of the present invention comprises a porous nanoweb having a melting point of 300□ or more and being insoluble in an organic solvent of NMP, DMF, DMA, or DMSO at room temperature; and an ionomer which is charged in pores of the porous nanoweb and contains a hydrocarbon material soluble in the organic solvent at room temperature.
US09136032B2	Cathode material Provided is a cathode material capable of obtaining high energy density and superior instantaneous output characteristics in a lithium ion secondary battery. The cathode material is used in a lithium ion secondary battery (1), and includes FeF3 and LiV3O8 as a cathode active material. A mass ratio of FeF3 to LiV3O8 of the cathode material is in a range of 86:14 to 43:57. The cathode material further comprises a conductive auxiliary.
US09136031B2	Alumina sintered body, member including the same, and semiconductor manufacturing apparatus An alumina sintered body contains alumina as a main component and titanium. The alumina sintered body further contains at least one element selected from the group consisting of lanthanum, neodymium, and cerium. Aluminum is contained in the alumina sintered body in an amount such that a ratio of aluminum oxide to total oxides in the alumina sintered body becomes 93.00 to 99.85% by weight where the total oxides are defined as a total amount of all oxides contained in the alumina sintered body. Titanium is contained in an amount such that a ratio of titanium oxide to the total oxides becomes 0.10 to 2.00% by weight. Lanthanum, neodymium, and cerium are contained in a combined amount such that a ratio of the combined amount to the total oxides becomes 0.05 to 5.00% by weight. Volume resistivity is 1×105 to 1×1012 Ω·cm at room temperature.
US09136029B2	Scintillator panel, and radiographic image sensor A scintillator panel 1 and a radiation image sensor 10 in which characteristics can be changed easily at the time of manufacture are provided. The scintillator panel 1 comprises a scintillator 3 having an entrance surface 3a for a radiation; a FOP 2, arranged on an opposite side of the scintillator 3 from the entrance surface 3a, for transmitting the light generated by the scintillator 3; and a resin layer 5, formed from a resin containing a color material on the entrance surface 3a side of the scintillator 3, for performing at least one of absorption and reflection of the light generated by the scintillator 3.
US09136027B2	Method of drying high-level radioactive wastes and device thereof A method of drying high-level radioactive wastes and device thereof contains a suspension mechanism for hanging a manual elevating mechanism, and a shielding cover. The manual elevating mechanism couples with a basket for accommodating wastes by using a hanging rope, and the shielding cover is fixed below the suspension mechanism and in a moving path of the basket. The basket is moved to a storage tank containing water in which radioactive wastes are stored, and the radioactive wastes are pumped into the basket by means of a pump. The basket is then lifted above a water surface of the storage tank and received in the shielding cover, and then the shielding cover is moved into a water holder so as to drain waters in the basket. The basket is further moved onto a heating seat to be heated and a vacuum equipment is started to dry the radioactive wastes.
US09136026B2	Reactor bottom repairing method A heating laser beam is emitted to a cracked portion to remove moisture from the cracked portion, and subsequently, a welding laser beam is emitted to the cracked portion to heat and melt the cracked portion. The heating laser beam and the welding laser beam are emitted to an entire surface of the cylindrical body inside the reactor such as a stub tube penetrating through and fixed to a reactor bottom portion and a crack of the welded portion between the cylindrical body and the reactor bottom portion to thereby prevent a new crack from occurring and reactor water from leaking.
US09136025B2	Dual-cooled fuel rod's spacer grids with upper and lower cross-wavy-shape dimple A dual-cooled fuel rod's spacer grid with upper and lower dimples, including a blocking area of a flow passage that coolant flows through is reduced and dual-cooled fuel rods are supported, and reduces a turbulent flow of the coolant as well as vibrations of the dual-cooled fuel rods, thereby lessening fretting damage done to the rods. The spacer grid includes a plurality of unit grid straps, each of which includes a body disposed in a vertical direction, an upper dimple protruding from an upper portion of the body, and a lower dimple spaced apart from the upper dimple in a downward direction and protruding from a lower portion of the body. The unit grid straps form a grid structure that have inner grid holes into which the dual-cooled fuel rods are held, and the held dual-cooled fuel rods are each supported in four directions by the upper and lower dimples.
US09136021B2	Self-repair logic for stacked memory architecture Self-repair logic for stacked memory architecture. An embodiment of a memory device includes a memory stack having one or more memory die elements, including a first memory die element, and a system element coupled with the memory stack. The first memory die element includes multiple through silicon vias (TSVs), the TSVs including data TSVs and one or more spare TSVs, and self-repair logic to repair operation of a defective TSV of the plurality of data TSVs, the repair of operation of the defective TSV including utilization of the one or more spare TSVs.
US09136020B2	Semiconductor memory device According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.
US09136018B2	Internal voltage generation circuits An internal voltage generation circuit includes a reference voltage generator and an internal voltage generator. The reference voltage generator is configured to adjust resistance values according to test signals and to generate an upper limit reference voltage and a lower limit reference voltage whose levels are determined according to the resistance values. The internal voltage generator is configured to generate an internal voltage which is driven according to the levels of the upper and lower limit reference voltages.
US09136014B2	Method for replacing the address of some bad bytes of the data area and the spare area to good address of bytes in non-volatile storage system A method for replacing the address of some bad bytes (bad columns) of the data area and the spare area to the good address of bytes (good columns) in non-volatile storage system is disclosed. The steps of the method are: waiting for a command from a host; judging if there is still some data to be processed; if no, go back to the previous step; if yes, go to next step; judging if a bad column is used; if no, process data access and go back to the step of judging if there is still some data to be processed; and if yes, process data accessing as original operation and increase the address by one.
US09136012B1	Reliable readout of fuse data in an integrated circuit An integrated circuit includes fuse readout logic and first and second sets of fuses. One of the sets includes one or more primary fuses whose burn states represent respective bit values, and the other of the sets includes one or more secondary fuses whose burn states are indicative of the bit values stored in the primary fuses. The fuse readout logic is configured to read the bit values by sensing the burn states of the primary fuses, and to conditionally correct the read bit values by sensing the burn states of one or more of the secondary fuses.
US09136011B2	Soft information module A system and method for generating reliability information, such as “soft information,” from a flash memory device is disclosed. A plurality of memory cells are read by a data storage controller at a first read level to obtain a plurality of program values. On an error indicator being received in connection with reading the plurality of memory cells, the plurality of memory cells are read one or more times at one or more different read levels to categorize the plurality of memory cells into two or more cell program regions. A confidence value is then assigned to each memory cell based on a corresponding cell program region for the memory cell, the confidence value being representative of a likelihood that the memory cell is programmed to a corresponding program value read at the first read level.
US09136004B2	Semiconductor memory device and programming method for flash memory for improving reliabilty of insulating layer of memory cell A programming method for suppressing deterioration of an insulating layer in a memory cell is provided. In the programming method for a flash memory of the invention, a cell unit including programming units that have been programmed is electrically isolated from a bit line; a cell unit not including programming units is electrically coupled with the bit line; a programming voltage is applied to selected word lines; and a pass voltage is applied to non-selected word lines. Moreover, during a period of applying the programming voltage, carriers are generated in a P-well, and hot carriers passing through a depletion region and accelerated by an electric field are injected into the memory cell.
US09136002B2	Semiconductor memory devices utilizing randomization and data programming methods thereof A data programming method of a semiconductor memory device is provided which includes randomizing write data using a randomization method selected from among a plurality of randomization methods according to whether the write data is programmed in one of a plurality of nonvolatile memories; and programming the randomized write data in at least one of the plurality of nonvolatile memories, wherein the plurality of nonvolatile memories has different types from one another.
US09135999B2	Methods and apparatus for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well as the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
US09135993B2	Temperature based logic profile for variable resistance memory cells A data storage device may generally be constructed and operated with at least one variable resistance memory cell having a first logic state threshold that is replaced with a second logic state threshold by a controller. The first and second logic states respectively corresponding to a predicted resistance shift that is based upon an operating temperature profile.
US09135992B2	Methods for forming memory devices with reduced operational energy in phase change material Methods of forming and operating phase change memory devices include adjusting an activation energy barrier between a metastable phase and a stable phase of a phase change material in a memory cell. In some embodiments, the activation energy barrier is adjusted by applying stress to the phase change material in the memory cell. Memory devices include a phase change memory cell and a material, structure, or device for applying stress to the phase change material in the memory cell. In some embodiments, a piezoelectric device may be used to apply stress to the phase change material. In additional embodiments, a material having a thermal expansion coefficient greater than that of the phase change material may be positioned to apply stress to the phase change material.
US09135987B2	FinFET-based boosting supply voltage circuit and method A memory circuit includes a voltage boosting circuit for generating a voltage that exceeds a voltage supply of the voltage boosting circuit. The voltage boosting circuit includes a first transistor having a first polarity type and a second transistor having a second polarity type opposite the first transistor. The first transistor is a planar transistor, a source of the first transistor being connected with the voltage supply, and a gate of the first transistor receiving a control signal. The second transistor includes a gate formed in at least two planes. A source of the second transistor is connected with the voltage supply, a gate of the second transistor receives the control signal, and a drain of the second transistor is connected with a drain of the first transistor and forms an output of the voltage boosting circuit for generating a boosted supply voltage as a function of the control signal.
US09135986B2	Systems and methods of sectioned bit line memory arrays, including hierarchical and/or other features A sectioned bit line of an SRAM memory device, an SRAM memory device having a sectioned bit line, and associated systems and methods are described, including embodiments having sectioned bit lines with hierarchical aspects. In one illustrative implementation, each sectioned bit line may comprise a local bit line, a memory cell connected to the local bit line, and a pass gate coupled to the local bit line, wherein the pass gate is configured to be coupled to a global bit line. Further, in some embodiments, the sectioned bit lines are arranged in hierarchical arrays. In other implementations, SRAM memory devices may be configured involving sectioned bit lines (including hierarchical) and a global bit line wherein the pass gates are configured to connect and isolate the sectioned bit line and the global bit line.
US09135985B2	Memory cell This invention relates generally to a memory cell. The embodiments of the present invention provide a SRAM cell and a SRAM cell array comprising such SRAM cell. The SRAM cell according to the embodiments of the present invention includes a pull-up transistor and a pull-down transistor, such that it is unnecessary to pre-charge a pre-read bit line at the time of performing read operation. By adopting the method of the present invention, generation of leakage current can be suppressed and hence power consumption of SRAM chip can be reduced.
US09135982B2	Techniques for accessing a dynamic random access memory array Examples are disclosed for accessing a dynamic random access memory (DRAM) array. In some examples, sub-arrays of a DRAM bank may be capable of opening multiple pages responsive to a same column address strobe. In other examples, sub-arrays of a DRAM bank may be arranged such that input/output (IO) bits may be routed in a serialized manner over an IO wire. For these other examples, the IO wire may pass through a DRAM die including the DRAM bank and/or may couple to a memory channel or bus outside of the DRAM die. Other examples are described and claimed.
US09135981B2	Memory system having memory ranks and related tuning method A memory device comprises at least two memory ranks sharing input/output lines, at least one mode register configured to store bits used to tune delays of data signals of the at least two ranks output through the input/output lines, a controller configured to determine tuning parameters for the data signals based on the stored bits in the at least one mode register, the tuning parameters comprising at least the delays of the data signals, and at least one nonvolatile memory disposed in at least one of the at least two memory ranks and configured to store the tuning parameters.
US09135980B2	Memory control circuit and method of controlling data reading process of memory module This invention discloses a memory control circuit and method of controlling a data reading process of a memory module. In the data reading process, the memory module transmits a data signal and a data strobe signal used to recover the data signal. The data strobe signal includes a preamble part. The method includes steps of: controlling an impedance matching circuit of the memory module so that the data strobe signal is kept at a fixed level before the preamble part; generating a clock; generating an enabling signal according to the clock; sampling the data strobe signal according to the enabling signal to generate a sampled result; adjusting an enabling time of the enabling signal according to the sampled result; and starting a data recovering process for the data signal according to the enabling signal.
US09135975B2	Write pulse width scheme in a resistive memory A resistive memory array includes a controller, a test reset driver coupled to the controller, a test write driver also coupled to the controller, and a test read sense amplifier also coupled to the controller. The resistive memory array also includes a set of test resistive memory elements representing a resistive memory macro. The test resistive memory elements are coupled to the test reset driver, the test write driver and the test read sense amplifier. A change in the state of one of the test resistive memory elements represents a change in the state of a set of corresponding elements in the resistive memory macro.
US09135971B2	Boosted read write word line One or more techniques or systems for boosting a read word line (RWL) or a write word line (WWL) of a two port synchronous random access memory (SRAM) bit cell array are provided herein. In some embodiments, a boosted control block is configured to generate a boosted word line signal configured to operate a RWL, a WWL, or a read write word line (RWWL). In some embodiments, the boosted word line signal includes a first stage and a second stage. For example, the first stage is associated with a first stage voltage level at a positive supply voltage (Vdd) voltage level and the second stage is associated with a second stage voltage level above the Vdd voltage level. In this manner, a read or write operation is boosted for an SRAM bit cell, because the second stage boosts a corresponding transistor in the SRAM bit cell, for example.
US09135970B2	Tamper detection and response in a memory device A technique for detecting tampering attempts directed at a memory device includes setting each of a plurality of detection memory cells to an initial predetermined state, where corresponding portions of the plurality of detection memory cells are included in each of the arrays of data storage memory cells on the memory device. A plurality of corresponding reference bits on the memory device permanently store information representative of the initial predetermined state of each of the detection memory elements. When a tamper detection check is performed, a comparison between the reference bits and the current state of the detection memory cells is used to determine whether any of the detection memory cells have changed state from their initial predetermined states. Based on the comparison, a tamper detect indication is flagged if a threshold level of change is determined. Once a tampering attempt is detected, responses on the memory device include disabling one or more memory operations and generating a mock current to emulate current expected during normal operation.
US09135950B1	Optical disc drive high frequency modulation signal detection A plurality of time periods corresponding to times at which a predicted transition in a signal is expected to occur are determined. The signal has bi-phase modulation, and the predicted transition corresponds to a transition in the signal from a first state to a second state as part of the bi-phase modulation. A next transition in the signal from the first state to the second state is detected, and it is determined whether the detected next transition occurred during one of the plurality of time periods. In response to determining that the detected next transition occurred during one of the plurality of time periods, a timing of the detected next transition is used to adjust a clock used for recovering channel bits in the signal.
US09135945B2	Disk rotating motor comprising bracket including cylindrical portion and folded portion A disk rotating motor is provided with: a stator including a stator core and a bracket for fixing the stator core; a rotor that can be rotated with respect to the stator and includes a rotary shaft; and a bearing that rotatably supports the rotary shaft on the outer diameter side of the rotary shaft, the bearing being supported by the bracket. The bracket includes a cylindrical portion extending along the rotary shaft, and a folded portion formed by folding the upper end of the cylindrical portion onto the outer diameter side such that at least a coaxial part of the folded portion extends coaxially along an outer surface of the cylindrical portion. The cylindrical portion and the folded portion are sandwiched by the stator core and the bearing in a radial direction.
US09135943B2	Tape guide with flanges A tape guide is provided for use with a tape drive that is configured to receive a length of tape having a tape width. The tape guide includes a body having an outer surface for receiving the tape thereon, and flanges on opposite ends of the body. The flanges may be spaced apart by a distance that is 125 to 500 microns greater than the tape width.
US09135942B2	Heat assisted magnetic recording head having wider heat sink and pole In one embodiment, a system includes a magnetic head having a write portion having a main pole, a near field transducer comprising a conductive metal film having outer regions extending from an active region, and an optical waveguide for illumination of the near field transducer, wherein the conductive metal film extends in a cross track direction for a width at least 200% greater than a width of the active region of the conductive metal film, wherein a portion of the main pole extends along the conductive metal film in a cross track direction for a width at least 200% greater than the width of the active region of the conductive metal film.
US09135941B2	Dye for optical information recording medium and optical information recording medium Provided is an optical information recording medium employing an In-Groove recording system, and having a preferable recording characteristic with a high modulation degree and low jitter characteristics. The medium is comprised of a circular-disk shaped substrate 2 having a through hole at a center portion thereof and a helical guide groove 3 on one surface thereof; a reflective layer 4 formed on the guide groove 3 of the substrate 2; a recording layer 5 formed on the reflective layer 4 and composed of an organic material including a dye; a protection layer 6 provided on the recording layer 5; and a light-transmissive layer 7 formed on the protection layer 6. The recording layer 5 includes an organic dye which is an azo metal complex compound having a structure represented by (Chemical formula 1) and a functional group represented by (Chemical formula 2).
US09135940B2	Radio frequency circuit A radio frequency (RF) circuit includes a first microchip for transmitting RF signal, a second microchip, two resistors and at least two signal lines. Each signal line has opposite first and second ends, and each first end of each signal line is connected to the first microchip and each second end of each signal line is connected to the second microchip. Each signal line defines first and second gaps, the first gaps are adjacent to the first microchip and the second gaps are adjacent to the second microchip. The two resistors are selectively located at the gaps of any one signal line, whereby the first microchip and the second microchip are connected to each other through the signal line and the resistors to form a connection path.
US09135935B1	Customized head gimbal assembly bonding skew angle for adjusting two-dimensional magnetic recording reader alignment System and methods are illustrated for customizing the HGA bonding skew angle of a TDMR slider including a plurality of readers to adjust reader alignment relative to a track location on disk media. Overlay error caused by manufacturing variations is compensated for by adjusting the skew angle of the slider when it is bonded to the suspension to form the HGA. Process operations for manufacturing a TMDR HDD include manufacturing a multiple reader, multiple layer TDMR slider, determining an overlay error in the slider, determining a slider bonding skew angle based on the determined overlay error and other parameters, and bonding the slider to a HDD suspension at the determined bonding skew angle.
US09135926B2	Apparatus and method of enhancing quality of speech codec An apparatus and method of improving the quality of a speech codec are provided. In the method, a first energy of a signal decoded by a low-band codec is calculated, and a second energy of a signal decoded by a low-band enhancement mode is calculated. Then, when the first energy is less than a first threshold value or less than a product of the second energy and a second threshold value, a size of the decoded signal is scaled. Accordingly, generation of a quantization error with respect to a silence segment is reduced.
US09135925B2	Apparatus and method of enhancing quality of speech codec An apparatus and method of improving the quality of a speech codec are provided. In the method, a first energy of a signal decoded by a core codec is calculated, and a second energy of a signal decoded by a low-band enhancement mode is calculated. Then, when the first energy is less than a first threshold value or less than a product of the second energy and a second threshold value, a size of the decoded signal is scaled. Accordingly, generation of a quantization error with respect to a silence segment is reduced.
US09135919B2	Quantization device and quantization method A quantization device and quantization method are provided that reduce coding distortion with a small degree of calculation and achieve adequate coding performance thereby. A multistage vector quantization unit treats a number of candidates N that are designated prior to operation in the first-stage vector quantization unit, decrements the number of candidates by one beginning with the second-stage vector quantization unit and continuing with each stage thereafter. If the number of candidates is three or less, the multistage vector quantization unit assesses the quantization distortion at each stage, treating the number of candidates at the following stage as a predetermined value P if the quantization distortion is greater than a prescribed threshold, and treating the number of candidates at the following stage as a value Q that is less than the predetermined value P if the quantization distortion is less than or equal to the predetermined threshold.
US09135913B2	Voice input system, interactive-type robot, voice input method, and voice input program A first voice input system according to the present invention includes: a voice input unit 21, which inputs a voice, and outputs a voice signal; a condition storing unit 22, which stores a malfunction condition set including a malfunction condition element to detect a voice input state; a condition selection unit 23 by which a selection signal for selecting a malfunction condition set from a condition storing unit 22 is input from an external application 30, and a malfunction condition set corresponding to the selection signal is stored; a voice input state detection unit 24 which analyzes the voice signal, collates the analysis result and a malfunction condition element included in the malfunction condition set held by the condition selection unit 23, and output the detection result; and a response unit 25 for operation processing according to the detection result.
US09135909B2	Speech synthesis information editing apparatus A speech synthesis information editing apparatus is provided. The speech synthesis information editing apparatus includes a phoneme storage unit that stores phoneme information, which designates a duration of each phoneme of speech to be synthesized. The speech synthesis information editing apparatus also includes a feature storage unit that stores feature information, which designates a time variation in a feature of the speech. In addition, the speech synthesis information editing apparatus includes an edition processing unit that changes a duration of each phoneme designated by the phoneme information with an expansion/compression degree, based on a feature designated by the feature information in correspondence to the phoneme.
US09135907B2	Method and apparatus for reducing the effect of environmental noise on listeners A method and apparatus for enhancing a desired audio signal for delivery through an electroacoustic channel include obtaining a noise estimate attributable to an external disturbance, applying the noise estimate to a dynamic noise compensation (DNC) process to thereby condition the desired audio signal as a function of the spectral characteristics of the noise estimate, applying the noise estimate to an adaptive equalization (AEQ) process to thereby condition the desired audio signal as a function of the electroacoustic response of the electroacoustic channel, and applying the noise estimate to an active noise cancellation (ANC) process configured to generate anti-noise for delivery into the electroacoustic channel.
US09135903B2	Electronic keyboard instrument When a key depression speed and a key release speed of a key is to be detected based on a value of a counter (44) which accumulates a value every time the key passes through key switches (SW1, SW2), a number of digits of data indicating the key depression speed, a unit of the data being a bit and a number of digits of data indicating the key release speed, a unit of the data being a bit, are made the same.
US09135898B1	Finger pick for stringed instrument A finger pick for being retained on a user's finger and for aiding in the playing of a stringed musical instrument includes a base portion, sizing wings, a spoon portion, and an opening defined by the base portion and the sizing wings. The sizing wings are bent upward from the base portion to define an interior space into which a user's finger is received to attach the finger pick to the finger. The opening extends transversely across the base portion and upward into the sizing wings when the sizing wings are bent upward. When the finger pick is inserted on the finger of a user, the soft tissue of the finger will protrude outwardly from the sizing wings and also through the opening, providing for three points of contact to the retain the finger pick on the finger.
US09135896B2	Pedal-operated stringed musical instrument actuator apparatus A device for depressing the strings of a musical instrument, including a foot-operated pedal portion having a plurality of pedals operatively coupled to a control device, the pedals arranged chromatically and corresponding to major chords; a second foot-operated portion including toggles for modifying the major chords; and a hands-free string-engaging portion operatively coupled to the pedal portion. The string-engaging portion includes a plurality of actuators configured to overlie and depress the strings of the stringed musical instrument. The pedal portion also may include a control device operably coupled to and configured to receive input signals from the pedals and toggles, and the control device may be operably coupled to and configured to send output signals to the actuators, such that depressing one of the pedals causes the actuators corresponding to a predetermined chord to be depressed.
US09135894B2	Data access method and electronic apparatus for accessing data A data access method applicable to a storage apparatus for reducing or eliminating an image tearing effect includes defining at least one write check point; comparing an actual write speed for writing data into the storage apparatus with a predetermined write speed at the write check point; and adjusting the actual write speed when a difference between the actual write speed and the predetermined write speed is larger than a predetermined value, for adaptively reducing the difference to be smaller than or equal to the predetermined value.
US09135893B2	Display device A display device is provided. The display device comprises a display comprising a plurality of pixels arranged in a display plane. The display device is configured to determine a virtual plane at which a long-sighted user of the display device who is looking at the display sees sharp. Further, the display device is configured to determine a first contiguous group of pixels of the display which are located within a first optical path from a first virtual pixel of the virtual plane to an eye of the long-sighted user, and to determine a second contiguous group of pixels of the display which are located within a second optical path from a second virtual pixel of the virtual plane to the eye of the long-sighted user.
US09135890B2	Display device and driving method thereof The present invention relates to a display device and a driving method thereof. A display device according to exemplary embodiments of the present invention includes: a signal controller to process an input image signal and an input control signal to control output of a digital image signal; a gray voltage generator to generate a gray reference voltage; and a data driver to generate gray voltages based on the gray reference voltage from the gray voltage generator, to receive the digital image signal, and to output a portion selected from the generated gray voltages as a data voltage, wherein the gray reference voltage includes a first gray reference voltage for the input image signal and a second gray reference voltage for an insertion gray, and the gray voltage generator generates one of the first gray reference voltage or the second gray reference voltage according to the selection signal included in the control signal to be provided to the data driver.
US09135887B2	Display device and driving method of the same A display device includes: a display panel including scan lines, data lines, and color pixels located at crossing regions of the scan lines and the data lines, each of the color pixels including a driving transistor, the color pixels including first color pixels, second color pixels, and third color pixels; a scan driver configured to transfer a scan signal; a data driver configured to transfer an image data signal; an initialization voltage controller configured to set different initialization voltages for each pixel during each frame according to a threshold voltage deviation for the driving transistor of each pixel and calculate the initialization voltages including first, second, and third initialization voltages corresponding to the plurality of color pixels; an initialization voltage driver configured to apply the calculated first, second, and third initialization voltages; and a signal controller configured to generate and transfer a control signal and the image data signals.
US09135884B2	LCD plateau power conservation Described herein are power conservation systems and methods that reduce power consumption for an electronics device including a liquid crystal display (LCD). The LCD includes a backlight that offers multiple luminance levels, where each level consumes a different amount of power. The systems and methods alter video information while the backlight remains at a backlight luminance level. The alteration reduces luminance for the video information to produce new video information that can be presented at a lower backlight luminance level. Change to the lower backlight luminance level may then occur without significantly affecting aggregate luminance of the new video information, as perceived by a user. The LCD and electronics device consume less power at the lower luminance level.
US09135879B2	Chamfer circuit of driving system for LCD panel, uniformity regulating system and method thereof The present disclosure provides a chamfer circuit in a driving system of a liquid crystal display (LCD) panel and a uniformity regulating system and method. The chamfer circuit comprises a discharging resistor. The discharging resistor is an adjustable resistor, a resistance of the adjustable resistor is adjustable. In the present disclosure, a slope of a chamfered section is changed by regulating the resistance of the discharging resistor to change uniformity of the LCD panel. In this way, the discharging resistance is regulated without replacing the discharging resistor, and the uniformity of the LCD panel is regulated in accordance with each piece of the LCD panel.
US09135878B2	Shift register and liquid crystal display device using the same A shift register is provided that outputs a gate driving pulse even if a start pulse provided to a first stage is not synchronized with a clock pulse. The shift register has multiple stages that sequentially output gate driving pulses. At least one stage includes a first switching device turned-on by a first clock signal and applying the start pulse to a first node. A second switching device is turned-on by the first clock signal and applies a first supply voltage to a second node. A third switching device is turned-on by the start pulse applied to the first node and outputs a second clock signal. A fourth switching device is turned-on by the first supply voltage and outputs a second supply voltage. A fifth switching device is turned-on by the start pulse and applies the start pulse to the first node.
US09135874B2	Display device and driving method thereof The present invention provides a display device with reduced power consumption and that reduces changes in luminance, and perceptibility of flicker, and a driving method thereof. A display device according to an exemplary embodiment comprises: a display panel configured to display a still image and a motion picture; a signal controller configured to control signals for driving the display panel; and a graphics processing unit configured to transmit input image data to the signal controller, wherein the signal controller comprises a frame memory configured to store the input image data, and the display panel is driven at a first frequency when the motion picture is displayed and the display panel is driven at a second frequency that is lower than the first frequency when the still image is displayed.
US09135873B2	Liquid crystal display device According to one embodiment, a liquid crystal display device includes an array substrate, a counter-substrate, a liquid crystal layer and a signal line driver. The array substrate includes a signal line, a pixel electrode, and a thin-film transistor. The counter-substrate includes a common electrode. The signal line driver is configured to deliver video signals of a positive polarity and a negative polarity to the signal line. The signal line driver is configured to deliver, prior to delivering the video signals to the signal line, a precharge signal to the signal line in every 1 horizontal scanning period.
US09135867B2	Display element pixel circuit with voltage equalization This disclosure provides systems, methods and apparatus for improving the reliability of dual actuator light modulators by equalizing voltages provided to the two actuators of the light modulator. A pixel circuit for driving the dual actuator light modulator can include a data loading circuit coupled to an actuation circuit. The data loading circuit is utilized to store data received from a controller for a pixel associated with the light modulator. The actuation circuit is utilized to control a first actuator and a second actuator of the dual actuator light modulator based on the data stored by the data loading circuit. The actuation circuit includes a first stabilization capacitor and a second stabilization capacitor for stabilizing voltages provided to the first and second actuators. The actuation circuit also includes an equalization switch for equalizing voltages provided to the first and second actuators.
US09135864B2	Systems and methods for accurately representing high contrast imagery on high dynamic range display systems A dual-panel display system is provided that comprises control modules and algorithms to select codeword pairs (CWs) to drive a first image-generating panel and a second contrast-improving panel. The first codewords is selected by considering some characteristics of the input image data (e.g., peak luminance) and to improve some image rendering metric (e.g., reduced parallax, reduced contouring, improved level precision). The first codeword may be selected to be the minimum first codeword within a set of codeword pairs that preserves the peak luminance required by the input image data. Also, the first codeword may be selected to minimize the number of Just Noticeable Difference (JND) steps in the final image to be rendered. The second codeword may be selected to similarly improve image quality according to a given quality metric.
US09135859B2	Organic light-emitting diode display for minimizing power consumption in standby mode, circuit and method for driving thereof According to the present invention, there is discussed an organic light-emitting diode display device. More particularly, the present invention relates to an organic light-emitting diode display device for minimizing power consumption in a standby mode in which no images are displayed but not in a normal mode in which typical images are displayed, and a driving circuit and method thereof. An organic light-emitting diode according to an embodiment of the present invention may control a drain-source voltage (VDS) of the drive transistor provided in the pixel, thereby having an effect of capable of minimizing power consumption when in a standby mode.
US09135855B2	Display device, electronic device, driving circuit, and driving method thereof A display device includes a pixel circuit that supplies current to a light emitting diode (LED) and a driver circuit. The pixel circuit includes a constant current circuit including a first transistor and a capacitor connected to a gate terminal of the first transistor, and a switch circuit including a second transistor. The driver circuit controls the pixel circuit such that the LED emits light by connecting the anode of the LED diode and the first power line under a non-light emission state of the LED, connecting the gate terminal of the first transistor and the anode after the anode is disconnected from the first power line, setting the gate terminal of the first transistor to a voltage corresponding to an amount of a supply current from the first power line, and after setting the gate terminal, switching a state of the LED into a light emission state.
US09135851B2	Methods and systems for measuring and correcting electronic visual displays The present disclosure relates to methods and systems for measuring and correcting electronic visual displays. A method in accordance with one embodiment of the present technology includes generating a series of patterns for illuminating proper subsets of the light emitting elements of the display, such as regular grids of nonadjacent activated light emitting elements with the elements in between deactivated. For each generated pattern, an imaging device captures information about the activated light emitting elements. A computing device analyzes the captured information, comparing the output of the activated light emitting elements to target output values, and determines correction factors to calibrate the display to better achieve the target output values. In some embodiments, the correction factors may be uploaded to firmware controlling the display or used to process images to be shown on the display.
US09135850B2	Indicating operating system selection Techniques related to abrasion scorings for illuminating operating system selections are described herein. A first abrasion scoring of a display material may reflect light from a first light source resulting in an image associated with a first operating system of the computing device being illuminated at the display material. A second abrasion scoring of the display material may reflect light from a second light source resulting in an image associated with a second operating system of the computing device being illuminated at the display material.
US09135849B2	Variable operating mode HMD application management based upon crowd determined distraction Disclosed is a system and method for managing variable operating mode applications that vary a cognitive load of the output of the applications presented to users wearing head mounted display devices. A tolerance level is indicative of the cognitive load of each operating mode of an application is established. In a vehicle setting, the operating mode of the application is selected to enable the safe operation of the vehicle based in part upon the tolerance level associated with the operating mode. If errant operations of vehicles are detected, then an application server modifies the tolerance level and synchronizes the modified tolerance level with head mounted display devices including the application.
US09135844B2	Optical projection system capable of detecting projection image deformation and associated detection method An optical projection system capable of detecting projection image deformation is provided. The optical projection system includes a laser source system, a scan unit, a detection unit and a signal control processing unit. The laser source system generates a visible laser having a visible wavelength and a detection laser. The scan unit projects the visible laser and the detection laser onto a projection plane, and drives the visible laser and the detection laser to scan along multiple scan lines to form a projection image. The detection unit detects the detection laser reflected by the projection plane, and outputs a voltage signal. The signal control processing unit determines whether the projection image is deformed according to the voltage signal, and accordingly determines whether to perform a correction operation.
US09135842B1	Mobile display and advertising assembly A vehicle mounted display system generating advertising and/or other displayed messages which are clearly viewable from at least a rear exterior vicinity of the vehicle. An electronically powered display may comprise a digital display screen, such as an LCD, or a mechanically driven but electronically powered scrolling assembly. A mounting assembly selectively disposes the display assembly between operative and stored positions and a viewing assembly including at least one camera disposed to observe exterior areas which are obstructed by the operatively positioned display assembly. The viewing assembly also comprises a camera display disposed to be clearly viewable by the vehicle operator enables the operator to the view the obstructed areas.
US09135840B2	Multi-sectioned, billboard-mounted light-emitting device The present invention relates to a multi-sectioned, billboard-mounted light-emitting device comprising: a mounting frame onto which one or a plurality of partition pieces are joined by being slotted in a detachable fashion, and on the front of which are formed a plurality of billboard housing space parts; a light-emitting-diode module in which a plurality of LEDs are provided at predetermined intervals; a light-guide plate which surface emits due to the LEDs; a back-surface plate devised such that the light generated from the light-guide plate is emitted towards the front surface; and a billboard plate which is provided on the front surface of the light-guide plate while being received in a detachable fashion at a size matched to each of the billboard housing space parts which are section bared by means of the partition pieces.
US09135835B2	Stain-resistant label adhered to product including one or more label-staining materials therein In combination, a plastic label attached to an outer surface of a product by a pressure sensitive adhesive. The pressure sensitive adhesive is attached to an exposed surface of an inner surface layer of the label, and the product includes one or more materials capable of migrating through the label and providing visible stains therein. The inner surface layer of the label includes a hydroxyl functionalized polyether amine resin preventing the material exuded from the product from migrating through the label thickness to provide visible staining of said label. A single extruded film of the label or the core of a multilayer label including either high crystalline polypropylene homopolymer, with or without a hard resin, or a conventional polypropylene with a hard resin.
US09135833B2	Process for selecting compressed key bits for collision resolution in hash lookup table A method and network element identify a set of bit indices for forming compressed keys, which are used to map a set of keys of corresponding input values to assigned lookup values in a hash table, where the keys of the input values have colliding hash values according to a hash function of the hash table. The method includes a set of steps including receiving the set of keys. The bits of the set of keys are traversed to find a best split bit index. The set of keys are split into two subsets according to the best split bit index. A check is made whether all of the set of keys have been split into separate subsets. A selected best split bit is added to a bit index. Alternate split bits are tallied and a bit is selected with a highest tally to add to bit index.
US09135830B2	Airport travel surface edge lighting and foreign object detection system and method An object detection system for use in airports including an airport travel surface light assembly, a rotatable sensor assembly mounted on the airport travel surface light assembly for sensing objects and an omnidirectional illuminator mounted above the rotatable sensor assembly.
US09135829B2	Distance separation criteria indicator Methods, systems, and computer-readable media described herein provide for the display of aircraft traffic and climb/descent information on an aircraft display. Flight data is received from a traffic aircraft in the vicinity of an ownship aircraft. Similar flight data is determined for the ownship aircraft. The flight data for the traffic aircraft and the ownship aircraft is used to determine a criteria indicator that is associated with at least the longitudinal separation and closure rate between the two aircraft. According to various embodiments, a number of altitude indication lines are displayed and an aircraft traffic indicator and ownship indicator corresponding with the traffic aircraft and ownship aircraft are displayed on the appropriate altitude indication lines. The criteria indicator is displayed so that the position of the criteria indicator with respect to the aircraft traffic indicator and ownship indicator informs a pilot as to whether an altitude change is possible.
US09135821B2	System and method for identifying parking spaces for a community of users A mobile communications device includes a locator unit to receive and process information regarding a current location for the mobile communications device, a parking status determination unit to determine a parking status for the device based on at least changes in the current location, and a communication unit to forward the parking status to a parking community processor. A method includes determining a parking status of a vehicle associated with a person as a function of movement of a personal mobile communications device.
US09135817B2	Traffic management system A real-time traffic management system comprising a main light controller module configured to monitor and control functionality of one or more traffic lights, a master control unit server software application, a network operations control module, and a network watcher application program. The main light controller nodule communicates with one or more coordinating light controller modules, onsite personnel, and a network operations center. The main light controller uses a camera that detects instances of vehicle demand and provides live images for situational awareness. The main light controller module comprises a global positioning satellite receiver and a light sensor for monitoring ambient lighting conditions. The network watcher application program continuously scans incoming data, monitors performance of all components in the system, and issues alerts and alarms to notify personnel of events or conditions outside of established tolerances.
US09135816B2	Intelligent laser tracking system and method for mobile and fixed position traffic monitoring and enforcement applications An intelligent laser tracking system and method for mobile and fixed position traffic monitoring and enforcement applications. The system disclosed herein can autonomously track multiple target vehicles with a highly accurate laser based speed measurement system or, under manual control via a touch screen, select a particular target vehicle of interest. In a mobile application the police vehicle speed is determined through the OBD II CAN port and updated for accuracy though an onboard GPS subsystem. The system and method of the present invention simultaneously provides both narrow and wide images of a target vehicle for enhanced evidentiary purposes. A novel, low inertia pan/tilt mechanism provides extremely fast and accurate target vehicle tracking and can compensate for geometrical errors and the cosine effect.
US09135812B1	Miniature remote controller A shortened adapter for a light bulb socket with highly overlapped male and female parts with an insulating hand-ring that extends only partially over the external surface of the adapter's female threading so it fits into the unthreaded collar of a light bulb socket, thereby significantly reducing the light bulb displacement. The shortened adapter can respond to an incoming signal and control the output of a light bulb. A reversible ring on the insulating hand-ring can change the adapter from being a dimmer to being an on-off control. A mechanism is disclosed to reversibly lock the adapter onto a light bulb. A miniature remote controller to work with the adapter is provided that has many advantages because of its very small size and compact shape. Further, one such controller can control several lights and several such controllers can control a single light in arbitrary combinations selected by the user.
US09135804B2	Systems and methods for assessing risks of pressure ulcers A system, method and computer program product for assessing a risk of developing pressure ulcers, including a user input unit configured to receive facility setting information and objective and subjective information of a patient for a plurality of categories of patient data; a correlation unit configured to determine a corresponding risk value of developing a pressure ulcer for each category of patient data, based on the patient data received in each category; and a risk determination unit configured to determine a level of risk of a patient developing a pressure ulcer based on the correlated risk values.
US09135803B1	Advanced vehicle operator intelligence system The method, system, and computer-readable medium causes the monitoring of a vehicle operator during the course of vehicle operation to determine whether the vehicle operator is impaired and causes a mitigating response when an impairment is determined to exist. The vehicle operator, the environment surrounding the vehicle, or forces acting on the vehicle may be monitored using a variety of sensors, including optical sensors, accelerometers, or biometric sensors (e.g., skin conductivity, heart rate, or voice modulation). When the vehicle operator is determined to be impaired, an alert or other mitigating response is implemented, based on the sensor data. In some embodiments, mitigating actions may be taken to avoid vehicle operator impairment.
US09135802B2	Hardware attitude detection implementation of mobile devices with MEMS motion sensors Systems and methods for detecting an attitude of a device are disclosed. The system includes a processing system including at least a sensor processor and an application processor, which are distinct. The system further includes a memory system including one or more computer-readable media. The computer-readable media contains instructions that, if executed by the processing system, cause the system to perform operations. The operations include executing an application using the application processor, and receiving raw sensor readings from one or more sensors, using the sensor processor. The operations also include determining, using the sensor processor, a processed sensor metric comprising attitude data, and transmitting the processed sensor metric to the application.
US09135792B2	System and method generating motor driving signal and method controlling vibration A system and method that generate a vibration motor driving signal includes; a first control unit that receives a first input signal and gain-adjusts the first input signal in response to a reference voltage to generate a first output signal, and a second control unit that receives the first output signal and gain-adjusts the first output signal in response to the reference voltage to generate a second output signal, wherein the second output signal is applied to a vibration motor as the vibration control signal.
US09135791B2	Haptic information presentation system and method A system and method are disclosed in which in a conventional non-grounding man-machine interface having no reaction base on the human body and for giving the existence of a virtual object and the impact force of a collision to a person, a haptic sensation of a torque, a force and the like can be continuously presented in the same direction, which cannot be presented by only the physical characteristic of a haptic sensation presentation device. In a haptic presentation device, the rotation velocity of at least one rotator in the haptic presentation device is controlled by a control device, and a vibration, a force or a torque as the physical characteristic is controlled, so that the user is made to conceive various haptic information of the vibration, force, torque or the like.
US09135785B2	Gaming system and method providing indication of notable symbols The gaming device and method disclosed herein produces an indication of an appearance of a notable or designated symbol in a symbol display region while at least one reel is spinning. The indication continues while the notable symbol appears in the symbol display region and while the at least one reel is spinning. Different indications are produced for the different notable symbols when appearing in the symbol display region while the at least one reel is spinning.
US09135782B2	Gaming machine and control method thereof To provide a gaming machine and a control method therefor, having a new entertainment characteristics, a slot machine 10 of the present invention, when a “BONUS” symbol 250 associated with a pick-up bonus game is selected, receives selection of any one of twenty little pig's noses 210 displayed. Then, a benefit associated with the selected little pig's nose 210 is awarded. When the benefit to be awarded is a “stick house” 218 which means “step-up”, a step-up occurs to the stick house stage and the expectation value for a payout is raised. Thus, when one little pig's nose 210 is selected out of the twenty little pig's noses 210 displayed in the stick house stage, the payout amount of the benefit associated with the little pig's nose 210 is increased.
US09135781B2	Gaming machine and control method thereof To provide a gaming machine and a control method therefor, having a new entertainment characteristics, a slot machine 10 of the present invention, when a “BONUS” symbol 250 associated with a pick-up bonus game is selected, receives selection of any one of twenty little pig's noses 210 displayed. Then, a benefit associated with the selected little pig's nose 210 is awarded. When the benefit to be awarded is a “stick house” 218 which means “step-up”, a step-up occurs to the stick house stage and the expectation value for a payout is raised. Thus, when one little pig's nose 210 is selected out of the twenty little pig's noses 210 displayed in the stick house stage, the payout amount of the benefit associated with the little pig's nose 210 is increased.
US09135780B2	Enhanced wagering game system with additional bonus challenges A gaming system and method for conducting a wagering game includes a display having a display area showing a poker-themed wagering game. A wager input device receives a base wager to play the poker-themed wagering game. A controller is coupled to the display and the wager input device. The controller is operative to provide a plurality of symbol-bearing objects to form a user-playable hand and award a payoff based on a ranking of the user-playable hand meeting a predetermined criterion. The controller may receive a side wager separate from the base wager from the player to trigger a challenge based on meeting a condition in at least one of a predetermined number of future plays of the wagering game. Additional free challenges may be triggered for the predetermined number of future plays.
US09135777B2	Management of downloadable game components in a gaming system Systems and methods provide interfaces to control the download of downloadable game components to one or more gaming machines or systems. The gaming configuration elements may include banner content, advertising content, denomination data, pay table, language data, video content, audio content, episodic game data, wagering game software, operating system software, device driver software and device firmware.
US09135776B2	Autonomous agent hybrid games Systems and methods in accordance with embodiments of the invention operate an autonomous agent hybrid game including a gambling game providing a game of chance and an entertainment game providing a game of skill, where the autonomous agent hybrid game utilizes an agency module constructed to: configure an agent player profile based upon player instructions, where an agent player action during entertainment game gameplay is determined by the configuration of the agent player profile; communicate an agent gameplay gambling event occurrence based upon an agent player action to the gambling game, where the gameplay gambling event occurrence triggers an agent wager in the gambling game; and allocate a payout from the agent wager to a player profile associated with the player instructions based upon the agent player profile.
US09135775B2	Remote live automatic electro-mechanical and video table gaming Electro-mechanical and video table games of chance send video feeds of game play and digital representations of results of game play by network communications to remote clients that receive wagers placed upon the result of the game play and derives a winning or a loss from both the wager and the digital representation of the result of the game play. The table game can include a roulette wheel, a roulette style ball, a device for rotating the roulette wheel at randomly changing rotational speeds, and a device for mechanically propelling the roulette style ball onto the rotating wheel at randomly changing velocities and spins. Also included can be a platform for supporting a die having a plurality of surfaces each bearing indicia unique to that on the other surfaces, and a device for randomly changing the movement and speed of the platform relative to the die.
US09135771B2	Memento dispensing device with simulated gaming features A memento dispensing device for dispensing mementos in the form of tokens, medallions, souvenirs, and other articles or objects having commemorative value through the simulated operation of a gaming device commonly referred to and known in the art as a slot machine. Instructive steps set forth in a computer program, as executed and controlled by a main microcontroller, serve to direct and command the memento dispensing device to dispense at least one memento to the consumer or operator upon the consummation of a spin cycle for a set of mechanical reel wheels or simulated reel wheels on a video display. The main microcontroller, operating under the direction of the computer program, further directs the timed playback of video and audio stored on recognizable formats and activates lights at select moments during operation and after every instance the memento is dispensed from the memento dispensing device.
US09135768B2	Vertical medication storage system Storage systems for inventory control are disclosed. The storage systems include a vertical storage structure having a plurality of vertically-stacked pockets. Each vertically-stacked pocket can be configured to be separately openable for providing user access to contents of the vertically-stacked pocket. The vertical storage structure can be a vertical sliding-type door, a hinged-type door, or a wall-mounted cabinet.
US09135766B2	Method of identifying a counterfeit bill using a portable terminal A method and a portable terminal for identifying a counterfeit bill. The method includes receiving, by the portable terminal, an image of a bill photographed using visible rays and an image of the bill photographed using infrared rays; determining a denomination of the bill by comparing the image photographed using the visible rays with a denomination database; obtaining correction information using the image photographed using the visible rays and a corresponding bill image in the denomination database; forming a corrected image by correcting the image photographed using the infrared rays using the correction information; and determining whether the bill is counterfeit by comparing the corrected image with an image of the corresponding bill pre-stored in a genuine bill database.
US09135762B2	Determining operational state with tags Systems and methods are provided relating to utilizing a plurality of RFID tags in conjunction with a circuit comprising at least one reed switch to facilitate determination of operational states and actions based thereon. A magnet can activate the reed switch causing a first RFID tag to be activated and transmit an associated RFID identifier from which a position/operation associated with the first RFID can be determined. The magnet can be removed to activate a second RFID tag whereupon a second RFID identifier is transmitted from which a second position/operation can be determined. The circuit comprising the reed switch and RFID tags can have an induction coil enabling the circuit to be activated when the induction coil is brought into proximity of a second induction coil and inductively coupled.
US09135760B2	Information sharing system, on-vehicle diagnosis terminal, and display terminal An information sharing system (1) including a plurality of on-vehicle diagnosis terminals (10) and one or a plurality of display terminals (20) and sharing diagnostic information over wireless communication. The terminals (10, 20) include a first determination unit S7, S8 and a second determination unit S34, S35 configured to determine whether or not predetermined times T1, T2 have passed from stored clock times C1, C2 at which data sets DS are acquired from the any of the other terminals (10, 20). When the predetermined times have passed, new data sets DS are acquired and the storing into an other-vehicle data storing unit 15B and a data storing unit 25A is performed. When the predetermined times have not passed, new wireless communication is established with communication units (13, 23) of the terminals (10, 20) capable of establishing wireless communication.
US09135759B2	Driver measurement and incentive system for improving fuel-efficiency A vehicle driver is provided with a display interface a smartphone, tablet, PC, or any telematics or in-vehicle device installed in the vehicle. The display interface presents a real-time target for the driver to follow to maximize fuel economy and safety, achieved by modulating the accelerator pedal appropriately.
US09135758B2	Vehicle status notification and operator identification A computing system located on-board a vehicle issues an event notification responsive to detection of an event condition. The on-board computing system detects the presence of wireless-enabled devices located within the vehicle or within proximity to the vehicle over a wireless communications link. The on-board computing system seeks to determine the identity of one or more persons that enter, attempt to enter, or operate the vehicle based on identifiers obtained from one or more wireless-enabled devices carried by those persons. The on-board computing system distinguishes multiple users from each other by designating one user as the vehicle operator, and one or more other users as passengers of the vehicle. The on-board computing system may include a removable on-board interface device that interfaces with an on-board vehicle control system.
US09135753B2	Apparatus and method of augmented reality interaction A method of augmented reality interaction for repositioning a virtual object on an image of a surface comprises capturing successive video images of the surface and first and second control objects and defining an interaction start area over the surface with respect to the virtual object. The method detects the control objects in successive video images, detects whether the control objects are brought together over the interaction start area, and if so, analyzes a region of successive video images using optical flow analysis to determine the overall direction of motion of the control objects and augmenting the video image to show the virtual object being held by the control objects. Augmenting the video image itself comprises superposing a graphical effect on the video image prior to superposition of the virtual object, such that the graphical effect visually disconnects the virtual object from the video image in the resulting augmented image.
US09135751B2	Displaying location preview A mapping application that provides a graphical user interface (GUI) for displaying information about a location is described. The GUI includes a first display area for displaying different types of media for a selected location on a map. The GUI includes a second display area for displaying different types of information of the selected location. The GUI includes a set of selectable user interface (UI) items, each of which for causing the second display area to display a particular type of information when selected.
US09135748B2	Triangulation method of a surface of a physical object An exemplary embodiment of the invention provides a method for producing a triangulation of a surface of a physical object the method comprising the steps of generating an intermediate mesh representation of the surface out of surface voxels (102) and detecting at least one T-junction in the intermediate mesh representation (103). The method further comprising the steps of decomposing of the at least one T-junction into at least one triangle and at least one two-point-polygon (104), and generating the triangulation of the surface out of the modelled intermediate mesh representation (107).
US09135740B2	Animated messaging A method and apparatus that allows an animated interactive talking character to appear on a user's screen when conducting an Instant Messaging (IM) session. The character which is displayed on the user's screen is determined by a profile for the sender of the message. This allows a user to pre-select which character will be displayed on the screen of recipients of the instant messages.
US09135738B2	Efficient elasticity for character skinning A novel algorithmic framework is presented for the simulation of hyperelastic soft tissues that drastically improves each aspect discussed above compared to existing techniques. The approach is robust to large deformation (even inverted configurations) and extremely stable by virtue of careful treatment of linearization. Additionally, a new multigrid approach is presented to efficiently support hundreds of thousands of degrees of freedom (rather than the few thousands typical of existing techniques) in a production environment. Furthermore, these performance and robustness improvements are guaranteed in the presence of both collision and quasistatic/implicit time stepping techniques. The result is a significant advance in the applicability of hyperelastic simulation to skeleton driven character skinning.
US09135736B2	Image processing device and image processing method which gather a plurality of images within an output image A image processing device includes an image selection means and an image gathering means. The image selection means receives a plurality of rectangular selected images selected by user's operation. The image gathering means overlays specific sides of two selected images on each other among the plurality of selected images to gather the plurality of selected images within an output image corresponding to predetermined paper.
US09135735B2	Transitioning 3D space information to screen aligned information for video see through augmented reality Methods, apparatuses, and systems are provided to transition 3D space information detected in an Augmented Reality (AR) view of a mobile device to screen aligned information on the mobile device. In at least one implementation, a method includes determining augmentation information associated with an object of interest, including a Modelview (M1) matrix and a Projection (P1) matrix, displaying the augmentation information on top of a video image of the object of interest using the M1 and P1 matrices, generating a second Modelview (M2) matrix and a second Projection (P2) matrix, such that the matrices M2 and P2 represent the screen aligned final position of the augmentation information, and displaying the augmentation information using the M2 and P2 matrices.
US09135724B2	Image processing apparatus and method This technique relates to an image processing apparatus and a method for improving the coding efficiency for a quantization parameter.Provided are a predicted quantization parameter setting unit for setting a predicted quantization parameter for a current coding unit by using multiple quantization parameters which are set for multiple surrounding coding units located around the current coding unit which is target of coding processing, and a difference quantization parameter setting unit for setting a difference quantization parameter indicating a difference value between the quantization parameter which is set for the current coding unit and the predicted quantization parameter which is set by the predicted quantization parameter setting unit. The present disclosure can be applied to, for example, an image processing apparatus.
US09135719B1	Color name generation from images and color palettes Systems and methods are provided for generating color names for colors corresponding to images and/or palettes. A color image is obtained, and one or more color palettes corresponding to the color image are identified. The color palette may be generated based on palette generation criteria, which may facilitate or control a palette generation process. Illustratively, the palette generation process may include image pre-processing, color distribution generation, representative color identification, palette candidate generation, and palette determination. A color name for each color identified in the color palette and/or the color image can be identified based at least in part on color name popularity information. Color name popularity information may be identified from color name-related voting results provided by a social network site. Aspects of the disclosure are further directed to processing the identified color name(s), such as updating color name metadata associated with the original color image and/or the color palette.
US09135715B1	Local feature cameras for structure from motion (SFM) problems with generalized cameras Methods and systems for extraction of 3D geometry from a plurality of generalized camera images by a device that comprises an electronic circuit are provided. Methods include identifying an x and y coordinate, an orientation, and a scale for each of one or more feature locations in each of the generalized camera images, extracting a local image feature at each feature location, generating a feature camera centered on each feature location, identifying groups of feature cameras providing consistent triangulation opportunity, and triangulating each identified feature camera group by finding the 3D point that minimizes an error term.
US09135714B1	Method and system for integrating a graphical user interface capture for automated test and retest procedures According to an embodiment of the present invention, a computer implemented system and system for capturing an image for automated test and retesting using an image capture function provided by a computer processor comprises: a capture tool, comprising at least one processor, configured to capture a screen image, a click position and user interaction; an image processing module, comprising at least one processor, configured to receive the screen image and generate a sub-image based at least in part on the click position; and a display module, comprising at least one processor, configured to display the sub-image and the user interaction to the user for generating at least one automated test step.
US09135712B2	Image recognition system in a cloud environment An image recognition system in a cloud environment including uploading a plurality of images to the cloud environment, preprocessing the plurality of images, determining image classifiers for each of the plurality of images, extracting the features of each of the plurality of images, storing the images, features and classifiers, determining the image classifiers and key features of an image to be recognized from a multiplatform image device, selecting from the plurality of images, images which have the same classifiers as the image to be identified, matching a best one of the selected images with the image to be identified and displaying the match on a display of the .multi-platform image device. The system further functions by performing one or more of the above in the multiplatform imaging device and/or cloud environment.
US09135710B2	Depth map stereo correspondence techniques Depth map stereo correspondence techniques are described. In one or more implementations, a depth map generated through use of a depth sensor is leveraged as part of processing of stereo images to assist in identifying which parts of stereo images correspond to each other. For example, the depth map may be utilized to describe depth of an image scene which may be used as part of a stereo correspondence calculation. The depth map may also be utilized as part of a determination of a search range to be employed as part of the stereo correspondence calculation.
US09135707B2	Real-time quality control of EM calibration A probe (20) generates a plurality of image volumes (13i, 13j) of an anatomical object (10) within a coordinate system (11) and an imaging device (21) generates imaging data (22) representative of the image volumes (13i, 13j) of the anatomical object (10). A position sensor (30) is attached to the probe (20), and a tracking device (31) generates tracking data (22) representative of a tracking of the position sensor (30) within the coordinate system (11). A registration device (40) executes a validation testing of a calibration matrix (51) associated with a spatial relationship between the image volumes (13i, 13j) and the position sensor (30). The validation testing includes a testing of an absolute differential between an image based volume motion (VMIB) and a tracking based volume motion (VMTB) relative to a calibration threshold (CT).
US09135693B2	Image calibration and analysis Systems, methods, apparatuses and computer program products for image calibration and analysis are described. One aspect provides quantitatively analyzing a representation of a dermatological condition of an image; and providing one or more outputs responsive to said quantitatively analyzing said representation of said dermatological condition of said image. Other embodiments are described.
US09135689B2	Apparatus and method for performing detail enhancement An apparatus and method are provided for performing detail enhancement. The apparatus includes an edge detector that detects an edge pixel from contents based on a luminance component of the contents, a histogram analyzer that generates at least one histogram with respect to the edge pixel and determines a gain variable value of the edge pixel based on the at least one histogram, and a gain regulator that determines a gain corresponding to the gain variable value of the edge pixel.
US09135688B2	Method for brightness equalization of various images The present invention provides a method for brightness equalization of a plurality of images to equalize brightness when composing, into a single image, a plurality of images acquired from a plurality of cameras.
US09135687B2	Threshold setting apparatus, threshold setting method and recording medium in which program for threshold setting method is stored Disclosed is a threshold setting apparatus including a creating unit which creates a plurality of images of tones by performing a tone conversion process on an original image including a subject by using a plurality of temporary thresholds which are different from each other, a subject detection unit which detects the subject in each of the plurality of images of tones which are created by the creating unit, an evaluation value calculating unit which calculates evaluation values relating to likeness to the subject from the plurality of subjects detected by the subject detection unit and associates the evaluation values with the temporary thresholds, and a setting unit which sets a threshold suited for the tone conversion of the original image based on the plurality of evaluation values calculated by the evaluation value calculating unit.
US09135685B2	Image processing method and image processing device A method includes: calculating a pixel statistical value and edge of pixels for each of areas of a multi-layer, the areas each containing a target pixel and having a successively decreased range; correcting the edge based on a pixel statistical value of an area that is wider than an area of a specific layer; correcting difference between a pixel statistical value of the specific layer and the pixel statistical value of a layer that is wider than the specific layer using the post-correction edge; correcting the pixel statistical value of the specific layer using post-correction difference and the pixel statistical value of the layer that is wider than the specific layer; and correcting the target pixel by repeating correction of the pixel statistical value successively in each layer until the area reduces its range from the maximum range to the minimum range.
US09135681B2	Image chroma noise reduction An embodiment of a method for reducing chroma noise in digital image data and of a corresponding image processor. Chrominance components are subjected to low-pass filtering. The strength of the low-pass filtering is modulated in accordance with the dynamic range of the luminance signal and the dynamic range of each of the two chrominance signals in order to avoid color bleeding at image-object edges. Moreover, the low-pass filtering is selectively applied to pixels with similar luminance and chrominance values only. A combination of down-sampling and up-sampling units is employed so that comparatively small filter kernels may be used for removing chroma noise with low spatial frequency.
US09135677B2	Apparatus which layout one or more images and produce output, and the method thereof An apparatus comprising: a determination unit configured to determine whether an object image satisfies a predetermined standard, if the object image is changed to a standard image size predetermined; a changing unit configured to change the standard image size predetermined, in case that the object image does not satisfy a predetermined standard by the determination unit; a generation unit configure to change the image to the image standard image size predetermined set or the standard image size changed by the standard image size changing unit and to generate the layout image.
US09135672B2	Display system and data transmission method thereof A display system and a data transmission method thereof are provided. When a first frame stored in a frame buffer is identical to a second frame to be output from an audio and video (AV) source, the AV source is set an AV control signal corresponding to a self-refresh mode, and a timing controller reads the first frame to output a display data controlled by the AV control signal. When the first frame is differed from the second frame, the AV source is set the AV control signal corresponding to a data update mode and a AV data signal corresponding to the second frame, and the timing controller stores the second frame in the frame buffer controlled by the AV control signal and outputs the display data corresponding to the first frame or the second frame according the timing sequences of the AV data signal and the display data.
US09135670B2	Operational reliability systems and methods An operational reliability system includes a flight grouping module, a block modification module, and a pairing optimizer. The system evaluates potential modifications to scheduled flight block time and quantifies associated changes in on-time performance B0. The system also evaluates the impact of block modifications to headcount, regulatory compliance, operating expenses, and so forth. Via use of the operational reliability system, compliance with external regulations, for example Federal Aviation Regulations (FAR), may be achieved with a higher degree of probability.
US09135669B2	Interrogation system employing prior knowledge about an object to discern an identity thereof An interrogation system employable with an object having a radio frequency identification (RFID) tag and method of operating the same. In one embodiment, the interrogation system includes a database having prior knowledge about the object, and an interrogator that scans the RFID tag and discerns additional information therefrom about the object. The interrogator still further includes a control system that identifies the object based on the prior knowledge and the additional information.
US09135667B2	Systems and methods for building energy use benchmarking Systems and methods for using an energy use model of a building for benchmarking is shown and described. An exemplary method includes receiving building data indicative of one or more characteristics of the building. The method further includes generating an energy use model for the building based on the building data and using the energy use model to generate statistics for the building. The method also includes identifying one or more other buildings having the same classification as the building. The method yet further includes comparing the generated statistics for the building to statistics for the identified one or more other buildings and providing an indication of the comparison.
US09135661B2	System and method for determining the liquidity of a credit The present invention relates to a credit index, a system and method for structuring a credit index, a system and method for operating a credit index, and a system and method for determining the liquidity of a credit.
US09135652B2	Scannable recipe card to add items to shopping list A system and method for automatically importing retail grocery products into an electronic shopping list by importing the ingredients listed on a recipe card, page in a recipe book, or the like. The recipe card may contain an identifier code that is uniquely associated with that recipe. The identifier code may be presented on the recipe card as a bar code. The system includes a database of recipes that returns a list of products when queried with a recipe identifier code. A user may scan or otherwise import the recipe identifier code through a mobile computing device, which then presents the ingredients as products in an electronic shopping list. The electronic shopping list may be implemented in a smartphone app.
US09135650B2	Person-to-person item recommendation with decline A system that allows individuals to maintain lists of items of interest in an account, such as books, restaurants, hotels, clothes, etc. The system allows an individual to share an item in a list with another individual. When an individual wishes to share an item, the system may generate a share message to be sent by a selected method to a recipient. The share message may include a link for allowing the recipient to view the item on the system and provide a mechanism for allowing the recipient to accept or decline the share. The acceptance or, in particular, the rejection of the share establishes a positive or negative relationship between each individual and the item. The sharing of Items between individuals can be temporally and geographically mapped to identify patterns of interest, the value of an item to one or more people, or the strength of the bond between two or more people.
US09135647B2	Methods and systems for flexible and scalable databases Methods and systems for utilizing a database are disclosed. The methods and systems determine a key representative of a storage location of first RDF data in a NoSQL database. In addition, the methods and systems read the first RDF data in the NoSQL database using the key. The methods and systems also write second RDF data derived from the first RDF data into a second database stored in memory. The methods and systems may also modify the second RDF data, and write third RDF data derived from the modified second RDF data into the NoSQL database.
US09135645B2	Systems and methods for commerce in media program related merchandise The disclosed technology provides systems and methods for delivering a media program and purchase opportunities related to the media program to user equipment. A media program and its related merchandise information can be located at a distribution facility. The distribution facility can tailor the purchase opportunities it provides to the user equipment based on the user equipment's equipment category. When user equipment receives purchase opportunities, the user equipment can select the opportunities based on which types of merchandise are supported by the user equipment. The user equipment and/or a distribution facility may be able to determine the location of the user equipment. When the distribution facility provides merchandise information for physical merchandise to the user equipment, the merchandise information can be selected to include physical merchandise that are available for purchase at stores that are, for example, near the location of the user equipment.
US09135639B2	Systems and methods for selecting advertisements for display over a communications network Systems and methods are provided for selecting advertisements for display over a communications network and, more particularly, to systems and methods for selecting video advertisements for display within internet web pages based on relevance, bid price, past performance, or a combination thereof.
US09135638B2	Software program and method for offering promotions on a phone The present invention includes a method and software application for providing a promotion to a user on a phone. The software application resides on a user's phone and “listens” for phone numbers dialed by a user. In response to the user dialing a phone number, the software determines whether a promotion or an offer for a promotion should be provided to the user. In response to determining to play or offer to play a promotion to the user, the software application on the phone effectively “intercepts” the call and plays to the user either a promotion or an offer to hear about a promotion prior to placing an outbound voice call. The software application may retrieve the promotion from local memory or may connect with a remote server to download an applicable promotion.
US09135636B2	System and method for routing media The system and method for streaming media to a viewer and managing the media comprises an enhanced service routing processor (ESRP), a real time switch management system (RTSMS), a name routing processor (NRP), and a managed media switch (MMS). The RTSMS has a reservation system. The ESRP receives media from an owner, manages the media according to media rules and order rules defined by the owner, and distributes the media to one or more switches, such as the MMS, according to the media rules and the order rules. The RTSMS is configured to receive the media rules and to receive a viewer's media request via the reservation server. The reservation system of the RTSMS processes the media request according to the media rules and builds a reservation for the requested media. The RTSMS generates the reservation to the viewer and to the NRP. The NRP receives the reservation data from the viewer and from the RTSMS. The NRP processes the reservation data and locates an MMS that can stream the media to the viewer. The NRP transmits the IP address of the MMS to the viewer and transmits the reservation data to the MMS. The viewer initiates a session or connection with the MMS using the reservation number. If the reservation data from the viewer matches the reservation data from the NRP, the MMS streams the media to the viewer.
US09135635B2	System and method for routing media The system and method for streaming media to a viewer and managing the media comprises an enhanced service routing processor (ESRP), a real time switch management system (RTSMS), a name routing processor (NRP), and a managed media switch (MMS). The RTSMS has a reservation system. The ESRP receives media from an owner, manages the media according to media rules and order rules defined by the owner, and distributes the media to one or more switches, such as the MMS, according to the media rules and the order rules. The RTSMS is configured to receive the media rules and to receive a viewer's media request via the reservation server. The reservation system of the RTSMS processes the media request according to the media rules and builds a reservation for the requested media. The RTSMS generates the reservation to the viewer and to the NRP. The NRP receives the reservation data from the viewer and from the RTSMS. The NRP processes the reservation data and locates an MMS that can stream the media to the viewer. The NRP transmits the IP address of the MMS to the viewer and transmits the reservation data to the MMS. The viewer initiates a session or connection with the MMS using the reservation number. If the reservation data from the viewer matches the reservation data from the NRP, the MMS streams the media to the viewer.
US09135634B1	Static discharge station Implementations of a static discharge station are provided. In some implementations, the static discharge station may be employed by a user to discharge a build-up of static electricity prior to pumping gas. In some implementations, the static discharge station may have advertising thereon. In this way, a user or a passerby may be exposed to the displayed advertisement(s). In some implementations, the static discharge station may be comprised of a body portion having a button thereon, a support pole, a base, a wire, and a grounding rod. In some implementations, the button may be configured to selectively make contact with the support pole of the static discharge station. In some implementation, a user may discharge a static electricity build-up by touching the button. In this way, the static build-up may travel through the button, support pole, base, and wire into the grounding rod. In some implementations, the base may serve to ground the static discharge station without the use of a wire and/or grounding rod.
US09135633B2	Needs-based mapping and processing engine A mechanism is disclosed that dramatically minimizes the time it takes to gather needs, dramatically minimizes the expense it takes to gather those needs, and ensures those statements are formulated in manner that comply with a set of rules designed to ensure the right inputs are used in downstream strategy formulation, marketing, product development, and related company workflows. In addition, the mechanism may or may not minimize the time it takes for a company to acquire the capability to uncover these needs statements.
US09135627B2	Method and system for on-line survey recruitment A system and method are disclosed for presenting on-line survey invitations to users over a network. The system selectively presents survey invitations to users in accordance with a survey recruitment definition associated with a tag embedded within a Web page (node) downloaded and executed on a user computer. A particular survey is selected from a set of presently active surveys applied by a survey logic server to received requests based upon a category (node ID) provided by a user computer in accordance with the execution of logic contained in the survey recruitment definition.
US09135626B2	Advertising middleware A method and system for facilitating interaction with one or more advertisement functionalities is provided. An advertisement middleware provides advertisement functionalities for interfacing with one or more systems and components of an underlying device. The advertisement middleware includes a transport layer, an application programming interface and one or more functional modules. The functional modules may include a player module, a cache, a report module, a profile module, a loyalty module and a payment module. Each module may perform various advertising tasks for an advertisement application. In addition, use of a particular advertisement application may be tracked to provide incentives to developers to create advertisement applications.
US09135622B2	Secure payment made from a mobile device through a service provider Methods and systems enable merchants to accept payments through a service provider from a consumer using an app on a mobile device, for example, without redirecting the consumer to the service provider and without collecting the customer's service provider password (a separate PIN may be used). An example of an app on a mobile device is given, but secure payments are also enabled for purchases and other transactions for a website, a merchant, or a service provider who needs to accept payments from customers. A two-key approach allows a merchant, using the two keys—a collection key for merchant apps and general servers and a private, more secure, charge key for merchant “back-end” systems—to collect a user's username and personal identification number (PIN) for acquiring payments through a service provider without compromising the user's service provider username and password (the PIN is distinct from the password).
US09135621B2	Methods and systems for performing authentication in consumer transactions The method for authenticating a mail order or telephone order transaction according to the present invention includes receiving authentication information from a cardholder, providing authentication information to an issuer, and determining whether the authentication information is valid. If the authentication information is valid, the issuer informs the merchant that the transaction is valid. In an embodiment, the issuer may not supply a personal assurance message and/or other confidential cardholder information previously supplied by the cardholder in response to the authentication information.
US09135619B1	Merchant identification of payer via payment path Novel features to be used in a proxy card payment system include a real-time request to override a declined transaction or to select a different financial account and the insertion of user identification information into the transaction approval message sent to the merchant. A payment request is forwarded to the payment system, which maintains the proxy card account and determines whether the transaction violates a user-defined rule. If the transaction is declined by the issuer that maintains the financial account, or the payment system for violation of a user-defined rule, the payment system sends a real-time message to the user. The user is prompted to override the rule causing the transaction to be declined or to select a new account to process the transaction. Once the payment system receives authorization for the transaction, it inserts the user identification information in an approval message before transmitting the approval to the merchant.
US09135616B2	Systems and methods to facilitate online transactions Systems and methods are provided to facilitate online transactions via mobile communications. In one aspect, a system includes a communication interface to receive an input from a merchant; a plurality of converters to interface with a plurality of controllers for delivery of premium messages sent by the system to collect funds for purchases made by customers; and a common format processor coupled with the plurality of converters to send the premium messages. The common format processor determines a combination of one or more premium messages, in response to a first customer making a first purchase from the merchant at a first price. The total price of the one or more premium messages is based on the first price and a portion of service charges associated with the one or more premium messages, where the portion is specified by the input received via the interface.
US09135615B1	Systems and methods for processing payment transactions at fuel dispensing stations The methods and systems described herein provide for processing electronic payments at a retail location. Secure payment information for use in processing future payment transactions initiated by a mobile device may be stored at a secure location remote from retail locations. A mobile device of a user may be detected and location determined based at least in part on the strength of a signal via a wireless antennas at the retail location. A determination is made that the mobile device is associated with a user who previously provided payment information for use in processing payment transactions. The mobile device may receive incentives based at least in part on the determined location. A user may complete a payment transaction at the retail location without providing the secure payment information at the retail location.
US09135614B2	System and method for managing issuance of financial accounts A system for managing issuance of a corporate meeting account for use in making purchases related to a meeting. The system comprises a communication interface adapted to communicate with a client computer executing an event management software and with a computer from each issuer, a processor coupled to the communication interface, and a management module executable by the processor. The management module receives, through the communication channel, a request to issue a financial account related to the meeting from the event management software. The request includes an issuer identifier and meeting account parameters. The management module generates an account issuance message and transmits the message to a computer of the issuer identified by the issuer identifier. This way, the process of opening a financial account associated with a meeting event is automatically done without having to manually contact the issuer.
US09135613B2	System and method for controlling financial transactions over a wireless network A system and method for controlling financial transactions is disclosed. A customer, using a wireless device, identifies a point of sale and the amount of a transaction at that point of sale is first communicated to a central service and then transmitted to the wireless device for display at the wireless device. The customer can either accept the transaction amount to complete the transaction or reject the amount to cancel the transaction. The customer may have to enter a password or personal identification number to verify the authorization to use the wireless financial system. The customer is billed for the transaction via credit, debit, ATM or other methods, such as the wireless carrier or an internet provider.
US09135611B1	Advanced systems and methods for geographical card A system, method, and computer-usable medium are disclosed for managing financial transactions by controlling the purchase of allowed and disallowed purchase items. A transaction control card is used to purchase a purchase item. Account information related to the transaction control card and purchase item data related to the purchase item is then processed to determine whether the purchase item is disallowed for purchase by any single, or combination of, disallowed purchase item data parameters.
US09135609B2	System and method to purchase applications by a point of sale terminal A system and method to allow users to purchase software applications for point of sale (POS) terminals from an application server via a network (e.g., the Internet) utilizing the POS terminal itself. One or more menus providing portals to available applications and their respective demonstration applications are provided to users on POS terminals. The demonstration applications may be directly downloaded from the application server onto the POS terminals. In addition, the user is able to purchase the application via the POS terminal either before or after the user has viewed/downloaded the demonstration application. After purchase, the application may be downloaded directly from the application server onto the POS terminal. Further, information associated with the demonstration applications downloaded to each POS terminal may be reported to a manufacturer of each demonstration application.
US09135606B2	Changing email addressee categorization A request to change an addressee category of a received email is received by a computing device. An indication of a changed addressee category is also received by the computing device. The changed addressee category is propagated to one or more instances of the received email.
US09135603B2	Methods and systems for merging topics assigned to content items in an online application A question-and-answer application having questions with which topics are associated is described. In some embodiments, user-generated topics are assigned to questions to indicate the subject matter covered by the questions. The application logic includes topic merge logic for quickly and efficiently merging two topics, while enabling the topic merge operation to be easily undone if necessary.
US09135599B2	Smart notebook Techniques are disclosed herein for allowing sharing of notes and ideas between electronic devices. The presence of a number of electronic devices is determined. A determination is made that the electronic devices are to be part of a shared workspace. A shared workspace is generated for the electronic devices. The shared workspace is displayed on a display screen of at least one of the electronic devices. The shared workspace that is displayed may be based on the capabilities of the electronic device. The shared workspace that is displayed may reflect the location of the electronic devices.
US09135598B2	Anonymous reporting system An anonymous reporting system (10) is provided for use in reporting and following up on incidents, accidents and the like. The system (10) is initiated by a system provider (12) on behalf of an institutional participant/client (14) for access by any number of individual users (16). The most common implementation is a web based interface (24) including a web site (27). The interface (24) includes an anonymizer (38) for safeguarding the identity of each individual user (16). The system (10) permits the user (16) to enter a report (28) and then assigns a random number identifier (74) associated with the report (28). The report (28) is forwarded to selected recipients (22) and to one or more administrators (32) associated with the participant/client (14). The administrators (32) may request follow up comments or send messages (64) associated with the report (28) by the access number (74) so that the user (16) may continue dialog, all while remaining totally anonymous. The system (10) is especially adapted for use in school or large company situations.
US09135595B2	High-load business process scalability The present disclosure involves systems, software, and computer implemented methods for providing high-load business process scalability in cloud-based infrastructures. One process includes operations for receiving a message at a first computer node executing a first business process instance. A second business process instance associated with the message is identified. The message is sent to a messaging queue for retrieval by the second business process instance if the second business process instance is not located at the first computer node.
US09135594B2	Ambient project management A computer-implemented method of ambient ad hoc project management can include defining a project and associating a project decay function with the project, wherein the project decay function regulates a rate at which project health declines. Responsive to detecting a project event, one or more parameters of the project decay function can be determined from the project event. Project health can be calculated according to the project decay function using the parameter(s). An indication of the project health can be output.
US09135593B2	Internal management of contact requests Embodiments of the invention provide for systems, devices, apparatus, methods, and computer program products for allowing a first agent associated with an entity to initiate contact with a second agent associated with the entity via a contact entry point. The contact entry point is displayed on an interface page and enables a first agent to contact other agents associated with the entity in a faster, more efficient, and better informed manner.
US09135592B2	Device management system A device management system is equipped with a storage section, a detecting component, and a calculating component and manages an installation device. The storage section stores operating rules of the installation device. The detecting component detects a violating action of the installation device running counter to the operating rules. The calculating component calculates a violating quantity that quantitatively expresses the violating action.
US09135589B2	Navigation bridge Described herein is a system that can link multiple electronic media production and/or publication applications. The linking of the multiple applications may be facilitated through a browser. Also, a toolbar included in the browser may facilitate the links between applications and assist a user in controlling one or more workflows that use the linked applications.
US09135587B2	Methods and systems for creating business-oriented report entities In an implementation, when creating a report, a user is provided with one or more suggestions for the report, such as a suggested grouping category, based on what has been done in one or more previous reports.
US09135585B2	Managing consistent interfaces for property library, property list template, quantity conversion virtual object, and supplier property specification business objects across heterogeneous systems A business object model, which reflects data that is used during a given business transaction, is utilized to generate interfaces. This business object model facilitates commercial transactions by providing consistent interfaces that are suitable for use across industries, across businesses, and across different departments within a business during a business transaction. In some operations, software creates, updates, or otherwise processes information related to a property library, a property list template, a quantity conversion virtual object, and/or a supplier property specification business object.
US09135584B2	Method and apparatus to model content state and access control in backend-systems and business processes A method to model and change the state of associated content objects from one or more workflow and task management systems is provided. The method includes overlaying a business process model associated with a graphical content state overlay. A state of the content objects changes accordingly when the business process instance proceeds. Access rights are forwarded from human tasks in a business process to an associated content object. Concurrent access rights that are forwarded from multiple systems are handled. The graphical content state overlay areas include an active state overlay to graphically indicate a business process instance is active, an assessed overlay to graphically indicate a business process instance is assessed, an approval/rejected overlay to graphically indicate a business process instance has received one of an approval decision and a rejection decision, and a state archived overlay to graphically indicate a business process instance has been archived.
US09135582B2	Power demand forecast device, method and system and power failure detection system Disclosed herein is a power demand forecast device including: an absence detection section adapted to detect whether a consumer is absent at a given location; and a power demand forecast section adapted to forecast a power demand on a forecasted date and time in future based on an absence detection result obtained by the absence detection section.
US09135580B1	Systems and methods for parking vehicles In one embodiment, a method includes associating a pre-existing dataset to one or more physical entities via association with an encoded token; monitoring interactions between the entity and the token; providing data from the dataset to the entity based on that monitoring; and updating the dataset with new or modified data from the entity by referencing the encoded token. In another embodiment, a method includes transmitting a vehicle retrieval request to a service provider including a delivery location; generating a listing event based on transmission of retrieval request; and transmitting a dataset back to retrieval requester.
US09135577B2	Statistical determination of power-circuit connectivity A mechanism is provided for statistical determination of power circuit connectivity based on signal detection in a circuit. Signal data from the circuit gathered and a determination is made as to whether a signal of interest is present in the gathered signal data from the circuit using a statistical analysis of the gathered signal data. The statistical analysis comprises using a mean current value and statistical deviation of the current value of the signal data over a predetermined period of time to compute a confidence range. The confidence range is compared to a first threshold and a second threshold. A determination is made that the signal is present in response to the confidence range being above the first threshold. A determination is made that the signal is not present in response to the confidence range being below the second threshold.
US09135574B2	Contextual decision logic elicitation Disclosed herein is a method of managing decision logic. The method includes receiving data, storing the data, and receiving a set of rules. A decision is generated based at least in part on the data and on the set of rules, and is a part of the decision logic. The decision logic is managed in a first mode or a second mode. When in the first mode or the second mode, the set of rules is managed in the context of the data by a first user. The managing includes reviewing and editing the set of rules for the decision logic in the context of the data. The editing is done by at least one of (i) modifying a rule in the set of rules, (ii) creating another rule and adding it to the set of rules and (iii) making an exception to a rule in the set of rules.
US09135571B2	Methods and apparatus for entity detection Techniques for entity detection include matching a token from at least a portion of a text string with a matching concept in an ontology, wherein the at least a portion of the text string has been labeled as corresponding to a particular entity type. A first concept may be identified as being hierarchically related to the matching concept within the ontology, and a second concept may be identified as being hierarchically related to the first concept within the ontology. Based at least in part on the labeling of the at least a portion of the text string as corresponding to the particular entity type, a statistical model may be trained to associate the first concept with a first probability of corresponding to the particular entity type and the second concept with a second probability of corresponding to the particular entity type.
US09135570B2	Active acquisition of privileged information A method for active learning using privileged information is disclosed. A processing device receives a set of labeled examples and a set of unlabeled examples. For each unlabeled example in the set of unlabeled examples, the processing device determines whether to query at least one of an oracle to obtain a label for the unlabeled example or a teacher to obtain privileged information about the unlabeled example. The processing device outputs a decision rule based on minimizing a number of queries to the oracle for a label and the teacher for privileged information. Minimizing the number of queries to the teacher and the oracle is based on a cost of querying the teacher or the oracle.
US09135566B2	Apparatus and method for processing sensor data in sensor network using a feature vector identifier of the sensor data In a sensor network, a sensor data processing apparatus generates a feature vector identifier table by classifying feature vector identifiers of a plurality of situation information determination reference data to be a reference of situation determination according to a sensor type index and a feature vector identifier set index of the plurality of situation information reference data. When the sensor data processing apparatus receives sensor data, the sensor data processing apparatus generates a feature vector identifier of the sensor data and extracts a sensor type index and a feature vector identifier set index of a feature vector identifier most similar to the feature vector identifier of sensor data with reference to a feature vector identifier table, and generates situation recognition information using the extracted sensor type index and feature vector identifier set index.
US09135564B2	Using cyclic Markov decision process to determine optimum policy A method for determining an optimum policy by using a Markov decision process in which T subspaces each have at least one state having a cyclic structure includes identifying, with a processor, subspaces that are part of a state space; selecting a t-th (t is a natural number, t≦T) subspace among the identified subspaces; computing a probability of, and an expected value of a cost of, reaching from one or more states in the selected t-th subspace to one or more states in the t-th subspace in a following cycle; and recursively computing a value and an expected value of a cost based on the computed probability and expected value of the cost, in a sequential manner starting from a (t−1)-th subspace.
US09135560B1	Automatic parser selection and usage The automatic selection and usage of a parser is disclosed. Raw data is received from a first remote device. At least a portion of the raw data is evaluated using a plurality of rules. A confidence measure is determined for at least some of the rules. An indication that the raw data pertains to a source is provided as output when the confidence measure exceeds a threshold.
US09135559B1	Methods and systems for predictive engine evaluation, tuning, and replay of engine performance Disclosed are methods and systems of creating, evaluating, and tuning a predictive engine for machine learning, including steps to deploy the predictive engine with an initial parameter set; receive queries to the deployed engine variant and in response, generate predicted results; receive corresponding actual results; associate the queries, the predicted results, and the actual results with a replay tag; evaluate the performance of the deployed engine variant; generate a new engine parameter set based on tuning of one or more parameters of the initial engine parameter set, according to the evaluation results; deploy the new engine variant to replace the initial engine variant; receive a replay request from an operator specifying the currently or a previously deployed engine variant; and in response to the replay request, replay at least one of the queries, the corresponding predicted results, the actual results, and the evaluation results.
US09135555B2	Enhanced predictive input utilizing a typeahead process Particular embodiments may retrieve information associated with one or more nodes of a social graph from one or more data stores. A node may comprise a user node or a concept node. Each node may be connected by edges to other nodes of a social graph. A first user may be associated with a first user node of the social graph. Particular embodiments may detect that the first user is entering an input term. Predictive typeahead results may be provided as the first user enters the input term. The predictive typeahead results may be based on the input term. Each predictive typeahead result may include at least one image. Each predictive typeahead result may correspond to at least one node of the social graph.
US09135551B2	Inductive antenna coupling This invention pertains to the connection between a radio frequency circuit and its antenna. Miniaturization of radio frequency integrated circuits has made attaching these circuits to their antennas increasingly difficult and costly. This invention uses magnetic coupling, as performed in transformers, between circuits and antennas as a practical solution to reduce cost and effort in attaching the two sides as well as to protect the circuit against electrostatic discharge. Furthermore a simple pre-assembly testing methodology is accounted for as an additional benefit of the method.
US09135545B1	Magnetic stripe emulator for persistently emulating magnetic stripe data A proxy card for persistently emulating a set of magnetic stripe data associated with a payment card is disclosed. The proxy card provides a magnetic stripe emulator that includes a plurality of parallel traces of conductive material oriented in a direction perpendicular to a direction in which the proxy payment card is designed to be swiped. The parallel traces are coated with a layer of a magnetic medium of low coercivity. A microcontroller on the proxy card generates electrical signals to drive electrical current along each of the plurality of parallel traces in a selected direction. The electrical current causes alignment of particles in the magnetic medium of the magnetic stripe emulator which encodes the set of magnetic stripe data on the magnetic stripe emulator. The proxy card can then emulate the payment card when swiped through a magnetic card reader without consuming any power.
US09135541B2	Image forming apparatus and nonvolatile memory writing method Provided is an image forming apparatus, including a nonvolatile memory writing unit configured to write into the nonvolatile memory, at every predetermined time period in which change data is written into the volatile memory within that predetermined time period, the change data written into the volatile memory, a temporary area writing unit configured to write new change data into a temporary area while a primary area writing unit is writing any change data into the primary area, and a primary area transfer unit configured to transfer any change data written into the temporary area by the temporary area writing unit to the primary area when the primary area writing unit completes writing the change data into the primary area.
US09135540B2	Image processing apparatus, image processing method, and program for processing black characters at high resolution An image processing apparatus includes an acquiring unit configured to acquire first image data representing gradation of a black character image, and second image data having a resolution lower than that of the first image data and representing gradation of a color image; a first generating unit configured to generate first dot data in accordance with a gradation value of each pixel in the first image data acquired by the acquiring unit; and a second generating unit configured to assign a number of dots to each pixel in the second image data, the number being greater than the maximum number of dots to be assigned by the first generating unit to each pixel in the first image data, and generating dot data for forming an image having an image attribute, in accordance with a gradation value of each pixel in the second image data acquired by the acquiring unit.
US09135539B1	Barcode printing based on printing data content A method and system is provided for printing a barcode computed based on content of a printed page data system on a document, the method comprising: using a methodology of regular expression; applying a regular expression subsystem to text contained in a print stream generating data; converting the data to a barcode applying barcode computation, to produce a bitmap barcode representing the barcode; inserting the bitmap barcode into an Enhanced Meta File (EMF) print stream defined by the printing system in the Port Monitor or Print Processor subsystem; inserting the bitmap barcode into an XML Paper Specification (or XPS) print stream defined by the printing system in the Port Monitor or Print Processor subsystem; and combining the barcode with the print stream to contain the barcode in a specific position in the print stream in the Port Monitor or Print Processor subsystem.
US09135537B2	Information processing apparatus, information processing method, and medium An object of the present invention is to provide an information processing apparatus capable of skipping printing of an appropriate margin area based on information on a header or footer at the time of performing printing. In the present invention, header/footer information including at least one of header information and footer information for a document, which is set to an application that creates the document, is acquired, and based on the acquired header/footer information, a margin area of the document is calculated. Then, a setting is performed to a printer driver capable of giving a printing apparatus instructions to perform printing by skipping printing of a margin area so that the printing apparatus skips printing of the margin area calculated in the calculation step.
US09135536B2	Image processing apparatus and image processing method generating binary data specifying dot arrangement in a unit area of a print medium Even in the case where input image data is binary data, dot arrangement appropriate for a printing apparatus is achieved to output a high quality image that suppresses an adverse influence such as density unevenness, stripes, or granular feeling. For this purpose, after the inputted binary data has been converted to multivalued data having lower resolution, a dot arrangement pattern that preliminarily specifies printing or non-printing for each of print pixels is set with being related to the multivalued data, and thereby new binary data is generated. At this time, the dot arrangement pattern is set to the dot arrangement appropriate for the printing apparatus, and therefore the high quality image that suppresses the adverse influence such as the density unevenness, stripes, or granular feeling can be outputted.
US09135530B2	Printer position determination and selection for a terminal apparatus and system A terminal apparatus includes: a first position receiving unit configured to receive terminal position information indicating a position of the terminal apparatus; a receiving unit configured to receive a plurality of distance information corresponding to each of printers that are printer candidates to execute a printing, wherein each of the plurality of distance information is generated on the basis of coordinate information, which includes information of a latitude and a longitude indicating a position of the corresponding printer, and the terminal position information; a choosing unit configured to preferentially choose a printer having a short distance to the terminal apparatus from the printers based on the distance information; and a printing instruction unit configured to transmit a printing instruction for printing execution to a specific printer of the one or more chose printers.
US09135529B2	Terminal apparatus configured to perform wireless communication with a printing apparatus for executing printing processing based on a printing job A non-transitory computer-readable medium has a computer program stored thereon and readable by a computer of a terminal apparatus configured to perform wireless communication with a printer. The computer program, when executed by the computer, causes the computer to perform operations including: a position registration process of registering information, which indicates a first position for acquiring related information, with a storage unit in the terminal apparatus; a terminal position acquisition process of acquiring terminal position information indicative of a position of the terminal apparatus; an information acquisition process of acquiring the related information corresponding to a current status of the printer in a case where the position of the terminal apparatus is within a specific range that is defined on the basis of the first position; and an output process of outputting the acquired related information.
US09135528B2	Information processing apparatus, job processing method in information processing apparatus, and storage medium A user inputs information, such as a user identification (ID), on a printer by using an operation unit included in the printer. The printer inputs a print request for printing an intermediate print job corresponding to the user ID to the printer driver of an application server. When the request is received from the printer, a print request receiving function of the printer driver starts a series of print processing. The printer driver extracts an intermediate print job corresponding to a target user ID stored on a print job storage memory. A print setting final determination function finally determines print setting information to the extracted intermediate print job.
US09135527B2	Ejecting device for storage card An ejecting device includes a housing for allowing insertion of a storage card, an engaging member, a processor, a ejecting member, an electromagnet, a switch button, and an spring member. The ejecting member is received and movable in the housing. The engaging member is configured to engage in the ejecting member or disengage from the ejecting member. The switch button is configured to generate an ejection signal. The processor is configured to execute a program to save data in the storage card in response to the ejection signal and control the electromagnet to pull the engaging member out of the ejecting member after the execution of the program is finished. The spring member is configured to push the ejecting member and the storage card out of the housing.
US09135526B2	Method for extracting information of interest from multi-dimensional, multi-parametric and/or multi-temporal datasets Method of extraction of information of interest to multi-dimensional, multi-parametric and/or multi-temporal datasets related to a same object under observation through data fusion, in which a plurality of different data sets are provided concerning a single object, with the data related to various parameters and/or different time acquisition instants of said parameters. The data set are subjected to a first processing step by principal component analysis generated by an identical number of datasets with transformed data; and each of the datasets is combined in non-linearly with the corresponding transformed data set to obtain a certain predetermined number of combinations of parameters by weighing using parameters determined empirically using training datasets which determine the values of the non-linear weighting parameters that maximize the value of the new features associated with the data of interest, as compared to those of other data.
US09135520B2	Histogram methods and systems for object recognition A multidimensional histogram is used to characterize an image (or object), and is used to identify candidate matches with one or more reference images (or objects). An exemplary implementation employs hue information for two of the dimensions, and a second derivative function based on luminance for a third dimension. The simplicity and speed of the detailed arrangements make them well suited for use with cell phones and other mobile devices, which can use the technology for image/object recognition, e.g., in visual search applications.
US09135517B1	Image based document identification based on obtained and stored document characteristics A method and apparatus for identifying a document in a set of stored documents based on a pattern of characteristics in the document is presented. A digital image including at least a portion of the a document is acquired. A pattern of characteristics is then identified in the digital image. The pattern is matched to the set of stored documents to identify the document in the digital image from the set of stored documents.
US09135514B2	Real time tracking/detection of multiple targets A mobile platform detects and tracks at least one target in real-time, by tracking at least one target, and creating an occlusion mask indicating an area in a current image to detect a new target. The mobile platform searches the area of the current image indicated by the occlusion mask to detect the new target. The use of a mask to instruct the detection system where to look for new targets increases the speed of the detection task. Additionally, to achieve real-time operation, the detection and tracking is performed in the limited time budget of the (inter) frame duration. Tracking targets is given higher priority than detecting new targets. After tracking is completed, detection is performed in the remaining time budget for the frame duration. Detection for one frame, thus, may be performed over multiple frames.
US09135511B2	Three-dimensional object detection device A three-dimensional object detection device includes an image capturing unit, an image conversion unit, a three-dimensional object detection unit, a light source detection unit a degree-of-certainty assessment unit and a control unit. The degree-of-certainty assessment unit assesses a degree of certainty that a light source is headlights of another vehicle in two lanes over. The control unit sets a threshold value so that the three-dimensional object is more difficult to detect in a forward area of a line connecting the light source and the image capturing unit in the detection frame when the degree of certainty is at a predetermined value or higher, and sets a threshold value so that the three-dimensional object is more difficult to detect in progression from a center side toward front or rear ends of the detection frame when the degree of certainty is less than a predetermined value.
US09135507B2	Method for searching a roof facet and constructing a building roof structure line A method for searching a building roof facet and reconstructing a roof structure line, in which the searching is performed automatically and without limitation of how slope of the roof facet, and the building structure line is constructed through aerial imagery. At first, lidar point clouds on the roof are extracted to compose a roof facet by using coplanarity analysis, and the roof is differentiated to a possible flat roof and a pitched roof. An optimal roof facet is obtained by analyzing lidar point clouds to overcome the low pitched facet issue. A relationship of a roof facet on a 2-dimensional space is analyzed to ascertain an area of a roof structure line. An initial boundary is generated. Line detection is performed on the images and a roof structure line segment is composed. All the structure line segments are used to reconstructing a 3-dimensional building pattern in object space.
US09135506B2	Method and apparatus for object detection A method for detecting a plurality of object regions in an image, wherein the plurality of object regions having similar specific structural features, comprises: an estimation step for estimating a common initial value for the specific structural features of the plurality of object regions; and a determination step for determining, for each of the plurality of object regions, a final value for the specific structural feature of the object region and a final position thereof separately based on the estimated common initial value.
US09135502B2	Method for the real-time-capable, computer-assisted analysis of an image sequence containing a variable pose The invention relates to a method for the real-time-capable, computer-assisted analysis of an image sequence of an object consisting of elements that can be moved relative to each other and are interconnected, said sequence containing a variable pose, wherein the individual images of the image sequence are recorded by way of a time-of-flight (TOF) camera such that said images can be processed by a computer, and contain brightness and distance data as functions of the pixel coordinates of the camera for each image of the sequence, comprising the following steps: a. Capturing the pixels of an individual image forming the object, b. calculating a three-dimensional (3D) point cloud in a virtual space, said point cloud representing the surface of the object that is visible to the camera, by a computational projection of object-depicting pixels in such a space, while taking captured distance data to the object into consideration, c. fitting a model of the object consisting of nodes and edges into the computer-generated 3D point cloud for the individual images, wherein the nodes represent a selection of elements of the object and the edges represent the connections of said elements amount each other, d. iteratively updating all node positions by applying a learning rule for training a self-organizing map having a previously defined number of randomly selected dots of the point cloud, e. repeating steps a. to d. for each subsequent individual image of the sequence, wherein for the fitting in step c. the result of step e. of the preceding image is used in each case, and f. determining the varying pose from the positions of predetermined nodes of the model which have been captured in at least representative images of the image sequence.
US09135500B2	Facial recognition Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for performing facial recognition. In one aspect, a method includes accessing a first digital photograph. A first face template is generated for each face detected in the first digital photograph. Second user identifiers that are associated with a first user identifier are determined. A digital photograph index of photographs, user identifiers, and areas in the digital photographs in which a face of a user identified by user identifier is located is accessed. Second user identifiers are selected, and second face templates are generated from the faces of the user the digital photographs. First face templates that match second face templates are identified, and for each first face template that matches a second face template, data is generated specifying the area in the first digital photograph in which the face of the second user is located.
US09135497B2	Identifying randomly distributed microparticles in images to sequence a polynucleotide Performing sequencing of a polynucleotide. A first image of microparticles that are distributed in a random fashion on a substrate may be received. Each of the microparticles may include a plurality of similar oligonucleotides of the polynucleotide. A second image of the microparticles may be received. A plurality of first subportions of the first image may be determined. Each subportion may include a respective plurality of microparticles distributed in a random fashion. The second image may be analyzed to identify a plurality of second subportions in the second image. Each of the plurality of second subportions may correspond to a respective one of the plurality of first subportions. A plurality of the microparticles may be matched from the first and second images based on said analyzing. At least a portion of the sequence of nucleotides of the polynucleotide may be determined based on said matching.
US09135492B2	Image based dial gauge reading A system and method include obtaining an image of an analog dial gauge. The image is processed to identify an endpoint of the gauge and a needle position in the image. A reading of the gauge is determined from the endpoint, the needle position, and information regarding the range of the gauge.
US09135491B2	Digital point-of-sale analyzer A digital point-of-sale system for determining key performance indicators (KPIs) at a point-of-sale includes a product identification unit and a realogram creation unit. The product identification unit is configured to receive a captured image of a product display and to identify products in the captured image by comparing features determined from the captured image to features determined from products templates. The realogram creation unit is configured to create a realogram from the identified products and product templates. A product price KPI unit is configured to identify a product label proximally located to each identified product, and to recognize the product price on each product label. Each product price is compared to a predetermined range of prices to determine whether the product label proximally located to the identified product is a correct product label for the identified product.
US09135487B2	Sample information detection apparatus and sample information detection method According to an embodiment, a sample information detection apparatus includes, a reflection unit includes a reflection mirror configured to reflect an image of a sample container configured to contain a sample, an image acquisition unit includes an imaging unit configured to image an imaging range covering images reflected by the reflection mirror, the image acquisition unit being configured to acquire the image of the sample container that is reflected by the reflection mirror, and a sample information detection unit configured to detect information displayed on a side portion of the sample container based on the acquired image.
US09135484B2	Data reader with light source arrangement for improved illumination Light sources are contained in a data reader housing that also contains an imager. In one embodiment, one light source includes a number of LEDs placed in a number of hollow reflectors located toward the rear of a data scanner, where the hollow reflectors have substantially flat reflective surfaces to project light through a window and into a read volume. Other embodiments include additional light sources located proximate sidewalls of the data scanner and also include a number of LEDs placed in hollow reflectors to project light through the window and into the read volume. In other embodiments, additional LEDs are included outside the hollow reflectors to project light through the window and into a different portion of the read volume than the LEDs located in the hollow reflectors.
US09135483B2	Terminal having image data format conversion There is set forth herein an indicia reading terminal having data format conversion capabilities. The indicia reading terminal includes an image sensor integrated circuit with an image sensor array comprising a plurality of pixels. The image sensor integrated circuit is configured to output image data in a first data format to a data formatting circuit for conversion to image data in a second data format. The data formatting circuit is configured to provide the image data in the second data format to the at least one data interface of a microprocessor integrated circuit, which is operative to transfer image data received by the at least one data interface into memory of the indicia reading terminal. A CPU of the microprocessor integrated circuit is operative for executing a decoding algorithm for processing image data in the memory for attempting to decode at least one symbol represented in the memory.
US09135482B2	Mobile dispensing system for medical articles A mobile dispensing cart having a plurality of locked drawers has medical articles stored therein for particular patients. The storage drawers have sizes wherein the resonant frequency of the sizes does not match the frequency of operation of the RFID system of the cart. Faraday cages and enclosures are used in the storage areas that provide robust RFID fields for exciting and reading RFID tags. An HCP for a particular patient obtains access to the drawers and opens a drawer. An RFID scanning system takes an inventory of the cart after the drawer is closed to determine if any medical article was taken, and if so which one. The identified taken article is compared to the data base of medical articles stored in the cart for the patient and if the taken article does not match the patient data base, an alarm is provided.
US09135479B2	Antenna assembly for a tag reader An antenna assembly includes a stand having a convex outer surface positioned to intercept and engage a vehicle tire as the vehicle tire passes over the convex stand surface. The height and contour of the convex stand surface slows the rotational rate of the vehicle tire, and thereby a transmitting device carried by the tire, to a preferred rotational read rate as the vehicle tire passes over the convex surface. One or more antenna members mount to the stand proximal to the convex surface, each antenna having a directionally aimed tilted antenna field positioned to continuously receive data transmission from the electronic transmitting device as the vehicle tire passes over the convex stand surface at the reduced rotational read rate.
US09135474B2	PCB mounted cover activated intrusion detection switch An intrusion detection switch is attached directly to a printed circuit board and utilized within an enclosure. Wires are not used to extend the switch to the top of the enclosure. An extension mechanism is used to extend a triggering portion of the intrusion detection switch to an engaging surface at the top of the enclosure. When the enclosure lid is properly shut, the engaging service is directed downward, thereby pushing an activation switch of the intrusion detection switch down. Switches may be assembled to an internal main printed circuit board where the switch is completely protected. Therefore, routing and maintaining of wiring to a switch is eliminated. A linkage system or mechanism can be mounted to the main chassis of the enclosure and act as an interface to an enclosure top cover. This eliminates potential damage to switches and wires and provides for a more reliable switch.
US09135471B2	System and method for encryption and decryption of data Systems and methods for reducing problems and disadvantages associated with traditional approaches to encryption and decryption of data are provided. A method for encryption and decryption of data, may include encrypting or decrypting data associated with an input/output operation based on at least one of an encryption key and a cryptographic function, wherein at least one of the encryption key and the cryptographic function are selected based on one or more characteristics associated with the data to be encrypted or decrypted. Another method may include encrypting an item of data based on at least one of a first-layer encryption key and a first-layer cryptographic function to produce first-layer encrypted data and encrypting the first-layer encrypted data based on at least one of a second-layer encryption key and a second-layer cryptographic function to produce second-layer encrypted data.
US09135463B2	Storage device, method for accessing storage device, and storage medium storing program for accessing storage device A storage device that stores data accessed by a host device via an interface includes a deactivation executing part performing a plurality of deactivating processes deactivating access to the data at different levels via the interface; a setting information storing part storing setting information which includes deactivation identifying information identifying the deactivating process and a condition under which the deactivating process is performed; a judging part referring to the setting information stored on the setting information storing part, comparing the condition represented by the setting information with an operation state of the storage device, and judging whether the condition represented by the setting information is satisfied or not; and a deactivation control part ordering the deactivation executing part to execute one of the plurality of deactivating processes identified with the deactivation identifying information represented by the setting information when the judging part has judged that the condition is satisfied.
US09135462B2	Upload and download streaming encryption to/from a cloud-based platform Embodiments of the present disclosure include systems and methods for upload and/or download streaming encryption to/from an online service, or cloud-based platform or environment. The encryption process includes the following parts: Upload encryption, download decryption, and a central piece of infrastructure called the Interval Key Server (IKS). During both upload and download, the encryption and decryption processes are performed while the files are being uploaded/downloaded, (e.g., the files are being encrypted/decrypted as they are being streamed).
US09135461B1	Heterogeneous virtual machines sharing a security model Methods and systems for sharing a security model with heterogeneous virtual machines (VMs) are provided. A method for sharing a security model with heterogeneous VMs may include making a direct function call to an object model from each of two or more heterogeneous VMs using a direct binding generated for the respective VM based on the respective VM and a security policy. The direct bindings of the two or more heterogeneous VMs share the security policy. The method may also include ensuring only one of the two or more heterogeneous VMs interacts with the object model at a time. A system for sharing a security model with heterogeneous VMs may include a heterogeneous VM manager and a heterogeneous VM scheduler. The system may further include a principal tracker and a proxy component.
US09135460B2	Techniques to store secret information for global data centers Techniques to store secret information for global data centers securely may provide a front end service for a back end data store. The front end service may be responsible for deployment, upgrade, and disaster recovery aspects, and so forth, of data center maintenance. Data centers may access data and data-related services from the back end data store through the front end service. Secrets that are needed to access secure data may be stored on behalf of the data centers without providing the secrets to the data centers.
US09135459B2	Security management unit, host controller interface including same, method operating host controller interface, and devices including host controller interface A method of operating a host controller interface includes receiving a buffer descriptor including sector information from a main memory, fetching data by using a source address included in the buffer descriptor, selecting one of a plurality of entries included in a security policy table by using the sector information, and determining whether to encrypt the fetched data by using a security policy included in the selected entry.
US09135456B2	Secure data parser method and system A secure data parser is provided that may be integrated into any suitable system for securely storing and communicating data. The secure data parser parses data and then splits the data into multiple portions that are stored or communicated distinctly. Encryption of the original data, the portions of data, or both may be employed for additional security. The secure data parser may be used to protect data in motion by splitting original data into portions of data, that may be communicated using multiple communications paths.
US09135454B2	Systems and methods for enabling searchable encryption A system and method for enabling searchable encryption of encrypted documents stored by a client on one or more storage providers includes a broker server in communication with the client and the one or more storage providers. The broker server is adapted to transfer the encrypted documents between the client and the one or more storage providers and to maintain information indicating where the encrypted documents are transferred. The broker server further stores information for at least one encrypted index for the encrypted documents and a test function for a searchable encryption mechanism used to encrypt the at least one encrypted index.
US09135452B2	Method and system for anonymization in continuous location-based services In some embodiments, a computer-implemented method includes receiving a first location-based service (LBS) request from a requesting device. One or more peer devices are selected from a plurality of actual peer devices. A set of false queries is generated, by a computer processor, based on the selected peer devices. Transmitted to a service provider are a real query, representing the first LBS request of the requesting device, and the set of false queries representing the selected peer devices. A set of query responses are received from the service provider. From the set of query responses, a real query response is extracted, corresponding to the real query. The real query response is transmitted to the requesting device in reply to the first LBS request.
US09135451B2	Data isolation in shared resource environments A data connection of a shared resource is placed in isolation mode to remove its ability to communicate with other data connections of the shared resource. This ability to isolate the data connection is dynamic in that it can be turned on/off at any time. This provides increased data security for the entities using the data connection.
US09135445B2	Providing information about a web application or extension offered by website based on information about the application or extension gathered from a trusted site A method for installing an offered web application or browser extension in a web browser includes receiving a user action on a website located at a first internet domain. Information about the offered web application or browser extension not currently installed in the web browser is displayed in response to the user action. The displayed information is provided by a digital marketplace located at a second internet domain distinct from the first internet domain. A correspondence of the displayed information to the offered web application or browser extension is ensured through functionality provided by the web browser. An indication to install the offered web application or browser extension is received from a user, and the web application or browser extension is installed in response to the received indication.
US09135441B2	Progressive static security analysis A disclosed method includes determining modifications have been made to a program and deriving data flow seeds that are affected by the modifications. The method includes selecting one of the data flow seeds that are affected by the modifications or data flow seeds that are not affected by the modifications but that are part of flows that are affected by the modifications and performing a security analysis on the program. The security analysis includes tracking flows emanating from the selected data flow seeds to sinks terminating the flows. The method includes outputting results of the security analysis. The results comprise one or more indications of security status for one or more of the flows emanating from the selected data flow seeds. At least the deriving, selecting, and performing are performed using a static analysis of the program. Apparatus and program products are also disclosed.
US09135438B2	Systems and methods for correlating and distributing intrusion alert information among collaborating computer systems Systems and methods for correlating and distributing intrusion alert information among collaborating computer systems are provided. These systems and methods provide an alert correlator and an alert distributor that enable early signs of an attack to be detected and rapidly disseminated to collaborating systems. The alert correlator utilizes data structures to correlate alert detections and provide a mechanism through which threat information can be revealed to other collaborating systems. The alert distributor uses an efficient technique to group collaborating systems and then pass data between certain members of those groups according to a schedule. In this way data can be routinely distributed without generating excess traffic loads.
US09135437B1	Hypervisor enforcement of cryptographic policy Techniques for restricting the execution of algorithms contained in applications executing on virtual machines executing within a computer system are described herein. A first sampled set of computer executable instructions is gathered from a virtual machine by a controlling domain and compared against a reference set of computer executable instructions. If the first set is similar to the reference set, and if the execution of the algorithm corresponding to the reference set is restricted by one or more computer system polices, one or more operations limiting the execution of the restricted algorithm are performed, thus ensuring conformance with the computer system policies.
US09135436B2	Execution stack securing process An approach to securing an execution stack (or cloud architecture) is provided. For example, an image is separated into a plurality of layers to form a trusted execution stack. Each of the plurality of layers is hardened to secure key cloud components of the trusted execution stack.
US09135435B2	Binary translator driven program state relocation This disclosure is directed to binary translator driven program state relocation. In general, a device may protect vulnerable program functions by setting them as non-executable. If an attempt is made to execute a protected program function, the program may trap to a binary translator in the device that may be configured to relocate program state from what has already been established (e.g., on a stack register). Program state may include resources (e.g., memory locations) used by the program during the course of execution. The binary translator may then translate the program into an executable form based on the relocated program state, and may be executed accordingly. Intruding code that attempts to overcome normal program execution and implement hostile operations (e.g., based the program state that is reflected in the stack register) will not function as intended since the relocated program state will cause unexpected results.
US09135434B2	System and method for third party creation of applications for mobile appliances The creation of an application for any mobile appliance, for example Apple's iPhone, requires several elements to be present at compile time. In the Apple example of an enterprise application where an entity wishes to develop applications internally for its staff, two of these elements are the source code and a digital certificate. These must be combined in the compiler so that the application may be properly authorized to run in the appliance. Where the owner of the source code and the owner of the digital certificate are not the same, serious concerns arise because each element must be secured. An intermediating system and method are described that allows each party to cooperate securely through a third party escrow service to produce the complied application while leaving no unwanted residue of the independent parts.
US09135431B2	Harmonic detector of critical path monitors A system for monitoring a clock input signal including a reference clock to be monitored, a flip-flop, a plurality of delay logic blocks, a sampling unit, and a comparison unit. The reference clock may have an expected maximum frequency. The flip-flop may be configured to generate a corresponding clock signal at a reduced frequency compared to the reference clock. The plurality of delay logic blocks may be configured to receive the reduced frequency clock signal and delay the signal for various amounts of time, each less than an expected period of the reference clock. The sampling unit may be configured to sample the signals output from the plurality of delay logic blocks. The comparison unit may be configured to receive the outputs of the flip-flop and the sampling unit and use these outputs to determine if the reference clock is running at an acceptable frequency compared to the expected frequency.
US09135429B2	Mobile device for authenticating a device accessory A mobile device for authenticating a device accessory is disclosed. The mobile device receives a unique identifier from a device accessory, sends the received unique identifier to a server via a communication network, and receives information from the server relating to the unique identifier.
US09135428B2	Cross system secure logon A cross system secure logon in a target system by using a first authentication system and a second authentication system. A correct password may be valid on the first authentication system and the second authentication system. An aspect includes receiving an input password, generating a first hash key by using the first authentication system, and/or generating a second hash key by using the second authentication system, wherein each authentication system uses a system unique non-collision free hash algorithm. Further, in one aspect, comparing the first hash key with a first predefined hash key of the correct password stored in the first authentication system, and/or comparing the second hash key with a second predefined hash key of the correct password stored in the second authentication system. Furthermore, granting access to the target system based on at least one of the comparisons.
US09135427B2	Authentication using a subset of a user-known code sequence Authentication in a system includes presenting information to a user containing a partial sequence of a passcode along with distractors. The user is challenged to identify the partial sequence from among the information in order to gain access to the system.
US09135420B2	Biometric data-driven application of vehicle operation settings Biometric data-driven application of vehicle operations is implemented by a scanner, a computer processor communicatively coupled to the scanner over a vehicle network, and logic executable by the computer processor. The logic receives, from the scanner over the vehicle network, biometric data for an operator of a vehicle and compares the biometric data from the scanner to sets of biometric data stored in a memory device of the vehicle. Upon determining that the biometric data from the scanner matches one of the sets of biometric data stored in the memory device, the logic retrieves operational settings configured for the operator and implements at least one action to achieve a result defined by the operational settings.
US09135416B2	GUI-based authentication for a computing system Machines, systems and methods for providing an authentication challenge are provided. The method comprises analyzing data stored in a computing system equipped with a graphical user interface (GUI), wherein the data stored is related to identity and relationships among items that have a profile; and based on the analysis, issuing a challenge to authenticate access to one or more content or services available by way of the computing system, in response to a user interaction with the computing system, wherein the response to the challenge is known to a user who has personal knowledge of the identity and relationships among the items with a profile, and wherein the user successfully authenticates against the challenge by interacting with visual presentations of the items by placing the items in an order that indicates a correct relationship between at least two or more of the items.
US09135412B1	Token-based security for remote resources Systems and methods of token-based protection for remote resources are disclosed. For example, a method may include receiving, at a second computing device, a configuration message from a first computing device. The configuration message includes information to configure a resource at the second computing device. For example, the resource may be a cloud transcoder. The method also includes generating, at the second computing device, a short token that enables the first computing device to access the resource. For example, the short token may be used to receive a long token that can be used to send application programming interface (API) requests to the cloud transcoder.
US09135407B2	License management apparatus, license management method, and storage medium A license management apparatus transfers license information from a transfer source device to a transfer destination device. The license information is required for enabling functions of a program package serving as an integrated product including a plurality of functions. The license management apparatus includes a management unit and a transfer unit. The management unit manages all or part of the plurality of functions as belonging to one group. After license information of functions included in the program package and managed by the management unit as belonging to the same group is acquired from the transfer source device, the transfer unit transfers license information of functions managed as belonging to the same group to the transfer destination device.
US09135402B2	Systems and methods for processing sensor data Systems and methods for processing sensor data are provided. In some embodiments, systems and methods are provided for calibration of a continuous analyte sensor. In some embodiments, systems and methods are provided for classification of a level of noise on a sensor signal. In some embodiments, systems and methods are provided for determining a rate of change for analyte concentration based on a continuous sensor signal. In some embodiments, systems and methods for alerting or alarming a patient based on prediction of glucose concentration are provided.
US09135400B2	Method and system for displaying a volume of influence by an electrode inserted in neural tissue This document discusses, among other things, brain stimulation models, systems, devices, and methods, such as for deep brain stimulation (DBS) or other electrical stimulation. In an example, a target volume of activation (VOA) can be received, a test VOA can be simulated, and at least one of a target electrode location or parameter can be provide using a relationship between the target VOA and the test VOA.
US09135398B2	System and method for adapting alarms in a wearable medical device According to another example, a wearable medical device controller is provided. The device controller includes a memory and a processor coupled to the memory. The processor is configured to determine a correlation between a phenomenon identifiable by the wearable medical device controller and at least one response pattern associated with a patient and store, responsive to detecting the correlation, an adaptation path to address the at least one response pattern, the adaptation path specifying an adaptation of at least one characteristic of an alarm. The at least one response pattern may include a plurality of response patterns and the adaptation path may reflect adaptations made to address at least some of the plurality of response patterns.
US09135396B1	Method and system for determining sets of variant items Various embodiments of a method and system for determining sets of variant items are described. Various embodiments may include a system configured to generate multiple item pairs each corresponding to a particular item and another item determined to be similar to the particular item. For the particular item and the other item, each item pair may include a respective sequence of text strings (e.g., a title). For each item pair, the system may perform a corresponding text alignment and determine one or more misalignments of the item pair. The system may also assign a similarity score to each item pair; the similarity score may be dependent on the misalignment(s) determined for the particular item pair. Based on each aligned item pair and the similarity score assigned to that aligned item pair, the system may generate an indication specifying that each of a set of items are variants of each other.
US09135390B2	Method of designing power supply network To design a power supply network of a 3D semiconductor device employing through-silicon-via (TSV) technology, board wiring of each of boards of the device is determined. An initial network structure is created for the boards. A layout of power bumps and through-silicon-vias, using the initial network structure, is produced such that voltages of all nodes of wiring of the boards are greater than a reference voltage. A semiconductor device having boards, power bumps and through-silicon-vias conforming to the layout is fabricated. Thus, the numbers of the through-silicon-vias and the power bumps of the power supply network of the semiconductor device are minimal.
US09135389B2	Clock skew adjusting method and structure A clock transmission adjusting method applied to integrated circuit design is provided. The clock transmission adjusting method includes the following steps. At first, a timing path including a clock source and a sequential logic cell is provided. Then, at least one non-active wire delay module is inserted in the timing path to approach a predetermined clock arrival time. An integrated circuit structure utilizing the clock transmission adjusting method is also provided.
US09135385B2	Data error susceptible bit identification As consistent with one or more embodiments, electronic circuitry is characterized to provide an indication of susceptibility of the circuitry to error. As consistent with one or more embodiments, bits corresponding to a circuit component of a circuit design are evaluated using a software program that characterizes a hardware description language representing the circuit components and their interconnectivity. A noise power value is calculated for each bit, and bits are identified as being susceptible to data error based upon the noise power value and a signal-to-noise (SNR) ratio reference value. A characterization of the circuit components (e.g., a quality factor) is provided based upon a number of bits susceptible to data errors.
US09135384B1	Compilation and simulation of a circuit design In one embodiment, a method for compiling an HDL specification for simulation of a circuit design is provided. Using one or more processors the circuit design is elaborated from the HDL specification. Two or more instances of a module of the elaborated design that have a same hardware configuration are determined. Simulation code that models the circuit design is generated. A first portion of the simulation code is configured to model the module having the hardware configuration. For each of the two or more instances, a second portion of the simulation code is configured to, in response to an indication to simulate the instance, execute the first portion of simulation code using a respective set of nets corresponding to the instance.
US09135381B2	Modeling and simulation system for optimizing prosthetic heart valve treatment A computer-implemented method for simulating blood flow through a heart valve may first involve receiving patient-specific data, including imaging data related to the heart valve, an inflow tract of the heart valve and an outflow tract of the heart valve, and at least one clinically measured flow parameter. Next, the method may involve generating a digital model of the heart valve and the inflow and outflow tracts, based at least partially on the imaging data, discretizing the model, applying boundary conditions to a portion of the digital model that contains the heart valve and the inflow and outflow tracts, and initializing and solving mathematical equations of blood flow through the model to generate computerized flow parameters. Finally, the method may involve comparing the computerized flow parameters with the at least one clinically measured flow parameter.
US09135373B1	Method and system for implementing an interface for I/O rings Disclosed are improved methods, systems, and computer program products for implementing an interface for visualizing, generating, and optimizing an I/O ring arrangement for an electronic design. A ribbon-based interface may be employed to visually see and control the design of the I/O ring.
US09135372B2	Process for selecting objects in a PLM database and apparatus implementing this process The invention is directed to a process, an apparatus and a program for selecting objects in a PLM database containing modeled objects. The invention allows a user to rapidly display a view of the set of objects while allowing for selecting objects in the view, without the need for loading the complete and exact representations of all the objects of the view when the user is looking for particular objects to work on.
US09135370B2	Method and apparatus of generating update parameters and displaying correlated keywords Provided is a method of generating updating parameters. The method obtains search keywords used by users within a predetermined time period; counts the search keywords to obtain primary keywords, related keywords, co-search frequencies of each primary keyword and the respective related keywords being searched together, and search frequencies of the primary keywords being searched alone; computes first feature values based on the search frequencies of the primary keywords being searched alone; and then computes second feature values based on the first feature values and the co-search frequencies of the primary keywords and the respective related keywords. The second feature values serve as updating parameters for determining displaying modes of the related keywords. An apparatus of generating updating parameters, and a method and an apparatus of displaying related keywords according to the updating parameters are also provided. The solution keeps abreast with the user trends to allow a better user experience and improve computing performance and efficiency. For a service provider, no special secret algorithm is needed, and the operation is easy with a low development cost.
US09135367B2	XPath evaluation in an XML repository XPath evaluation in an XML data repository includes parsing an input XPath query using a simple path file to generate an execution tree about the XPath query, where the simple path file includes an XML file that is generated based on the hierarchical architecture of a plurality of XML files in the data repository, and the names of the nodes in the generated XML file are generated by recording the tag information of respective nodes in the plurality of XML files in the data repository. Execution of an execution tree for the data repository generates a final evaluation result.
US09135366B2	Galaxy search display A computer implemented system and method presents search results in various forms upon a physical display. The spacing and movement of presented search results may be subjected to system defined gravitational forces wherein presented search results are shown as spheres or other icons of various sizes positioned at various distances from the center of the display. Displayed search results with greater ranking are displayed as relatively larger spheres or icons nearer the center of a display as compared to lower ranking results, which are smaller and displayed further afield. Ranking is shown as a matter of degree, rather than just as an ordinal list as in the related art. Attributes, such as link age, quantity, and other characteristics, of represented websites and various interconnections among represented websites are depicted by user controlled toggles.
US09135364B1	Delivery of web pages with markup for speed A web page delivery method and system uses speed-up parameters such as retrieval hints, cache time parameters and criticality hints to improve delivery of web pages. It may be operated by a web server, an edge server, and/or a client device. A first server receives a request to deliver the web page and determines that page includes static content elements, variable content elements, and a speed-up parameter. The first server serves the web page. It also uses the speed-up parameter to retrieve updated data corresponding to the variable content element from a second server. The first server serves the web page with the updated data corresponding to the variable content element without updating the static content elements.
US09135363B2	Methods and systems for automatic content retrieval and organization Methods and systems for automated retrieval of content embedded in or referred to in a message received in a user account are provided. A UCM and/or a UCR may access a user account and retrieve a message from the account. The message may be then analyzed to extract information related to the content that may be included in the message. The content associated with the extracted information is accessed and retrieved. The retrieved content is presented to the user.
US09135358B2	Result types for conditional data display A set of user interfaces is provided to an administrator of a website. The user interfaces enable the administrator to configure search functionality of the website to present different types of search results differently. For instance, the administrator can use the user interfaces to configure the search functionality to present different properties for search results belonging to different result types.
US09135354B2	Method and system for topical browser history Disclosed is a method and system for displaying topical history of a user's browsing experience. A browser executing on a computing device navigates to a web page. A client-side module executing on the computing device obtains a set of topics associated with the web page. The client-side module determines other topics related to the set of topics associated with the web page. The client-side module determines web pages associated with the other topics that the browser has previously navigated to within a predetermined past period of time. The browser displays in a first content area the web page, and the browser displays in a second content area the set of topics associated with the web page, the other topics related to the set of topics, and links to the web pages associated with the other topics.
US09135347B2	Exercise tracking and analysis systems and related methods of use A method for assessing physical performance may include receiving first performance data relating to an activity performed by a user, and generating a first performance profile. The method also may include generating a first comparison by comparing the first performance data to a second performance profile relating to the activity, and generating feedback based on the first comparison by indicating whether the first performance profile deviated from the second performance profile.
US09135345B1	Generating and updating online content using standardized tagged data Methods, and systems, including computer programs encoded on computer-readable media, for managing content associated with a content campaign of a content provider are disclosed herein. In one aspect, the present disclosure is directed to a system of generating and updating online content using standardized tagged data. The system may periodically crawl a document that includes one or more document reference tags. The system may identify at least one document reference tag and corresponding tagged data. The system may receive a request for content to display. The system may select an item of content comprising a content reference tag corresponding to the at least one document reference tag. Responsive to the request for content, the system may replace the content reference tag with the corresponding tagged data to assemble an item of content. The system may transmit the assembled content for display.
US09135343B2	Search engine platform Systems and methods to perform efficient searching for web content using a search engine are provided. In an illustrative implementation, a computing environment comprises a search engine computing application having an essential pages module operative to execute one or more selected selection algorithms to select content from a cooperating data store. In an illustrative operation, the exemplary search engine executes on a received search query to generate search results. Operatively, the retrieved results can be generated based upon their joint coverage of the submitted search query by deploying a selected sequential forward floating selection (SFFS) algorithm executing on the essential pages module. In the illustrative operation, the SFFS algorithm can operate to iteratively add one and delete one element from the set to improve a coverage score until no further improvement can be attained. The resultant processed search results can be considered essential pages.
US09135341B2	Method and arrangement for paginating and previewing XHTML/HTML formatted information content The invention relates to a method and an arrangement for paginating and previewing essentially continuously-flowing non-paginated search results, such as XHTML/HTML formatted information content. The method includes at least: entering a search query; sending the query to a search engine; and receiving a search result having a list of data files matching to the search query. The method comprises at least: paginating the essentially continuously-flowing content of the data files retrieved; rendering preview pages from the data files; selecting the preview pages to be previewed; and previewing the matching preview pages associated with the data files retrieved.
US09135337B2	Method and system for performing searches for television content using reduced text input A method and system are provided for identifying a television content item desired by a television viewer from a set of television content items. Each of the television content items has one or more associated descriptors. The system receives from the television viewer a reduced text search entry directed at identifying the desired television content item. The search entry is a prefix substring of one or more words relating to the desired television content item. The system dynamically identifies a group of one or more television content items from the set of television content items having one or more descriptors matching the search entry as the television viewer enters each character of the search entry. The system then transmits the names of the one or more television content items of the identified group to be displayed on a device operated by the television viewer.
US09135330B2	Query expansion classifier for E-commerce A system and method of query expansion are disclosed. A query expansion source, a query expansion candidate, and feature data for the query expansion source and the query expansion candidate are received. The feature data comprises information for a plurality of features. A determination is made as to whether the query expansion candidate qualifies as an expansion of the query expansion source based on an analysis of the information for the plurality of features. The query expansion candidate is assigned as an expanded query of the query expansion source in a query expansion dictionary in response to a determination that the query expansion candidate qualifies as an expansion of the query expansion source.
US09135324B1	System and method for analysis of process data and discovery of situational and complex applications Systems and methods include receiving log data corresponding to a plurality of processes performed by devices in a network. The log data may include codified parameters. The method may include identifying codified parameters in the log data. The method may include filtering the log data based upon a codified parameter of the codified parameters in the log data to identify a portion of the log data. The method may include identifying, by a processor system, a cluster of processes from the portion of the log data that have been activated a predetermined number of times in a sequence of activation. The method may include determining a list including application data identifying a candidate application. The candidate application may have been determined to have instructed performance of the cluster of processes.
US09135322B2	Environment classification A method and system for classifying environment components within a computer system. The computer system includes an information management service for defining services to be provided to data objects residing in the computer system. One exemplary method identifies environment components, such as servers, storage locations, databases, applications, and the like, within the computer system. The service level capabilities of each of the environment components are then identified. The environment components are then classified in accordance with their identified service level capabilities. By categorizing the environment components in accordance with their service level capabilities, the service level objective requests of data objects residing in the system can efficiently be matched to the environment components that are capable of providing the requested services.
US09135321B2	Synchronization infrastructure for networked devices, applications and services in a loosely coupled multi-master synchronization environment The subject disclosure relates to an efficient multi-master synchronization infrastructure is provided enabling loosely coupled networked client and server devices, applications and services to efficiently convey and receive synchronization knowledge across interconnecting network(s). A set of synchronization methods and standardized interfaces are also provided that enable rich offline application experiences and collaboration among devices, applications and services predicated on the efficient synchronization infrastructure.
US09135315B2	Data masking Aspects include data masking in database operations including intercepting a database query and identifying masked data in the query. The masked data in the query is unmasked by substituting the masked data with equivalent real values. The unmasked query is sent to the database engine, and a result provided by the database engine in response to the unmasked query is intercepted. The values in the result that correspond to sensitive information are identified. The result is masked by substituting the values in the result corresponding to sensitive information with masked equivalents. The masked result is returned to a user.
US09135310B2	Query routing in a distributed database system A distributed query system includes a distributed collection of dynamically created compiled queries. As each client submits a query, a parameterized query skeleton is identified, which identifies the general form of the query, and the parameters associated with the particular query. If a compiled form of the skeletal query is available within the distributed system, it is executed with the parameters of the current query. If the compiled form of the skeletal query is not available within the distributed system, a compiled form is created, and the location of this compiled skeletal query is stored for subsequent access by this client, or other clients. The executable compiled skeletal queries may be stored at each client system, in a commonly available server storage system, or within one or more database servers. A routing system may be provided to efficiently route parameterized queries to the appropriate location(s) of the compiled skeletal query.
US09135309B2	System and method for building decision trees in a database A computer-implemented method of creating a data mining model in a database management system comprises accepting a database language statement at the database management system, the database language statement indicating a dataset and a data mining model to be created from the dataset, and creating, in the database management system, the indicated data mining model using the indicated dataset, wherein creation and application of the data mining model does not require moving data to a separate data mining engine.
US09135301B2	Pushdown of sorting and set operations (union, intersection, minus) to a large number of low-power cores in a heterogeneous system A system and method for performing a query operation on a pair of relations in a database system coupled to a heterogeneous system (HS) is disclosed. Assuming that that pair of relations is partitioned and already loaded into the HS, the database system receives a query on the pair of relations and based on the type of query operation computes the cost of performing the query operation on the database alone or the costs of performing the query operation with the assistance of the HS, each of the costs corresponding to a particular algorithm. If the costs indicate that the HS improves the performance of the query operation, then the HS computes portions of the operation, and returns the results back to the database system. If any parts of the relation are out of sync with the database system, the database system performs operations to maintain transactional consistency.
US09135300B1	Efficient sampling with replacement A method, article of manufacture, and apparatus for process data. In some embodiments, this includes determining a dataset, wherein the dataset includes a plurality of data values and a plurality of identifiers, and wherein the plurality of identifiers are in a non-continuous order, and wherein the dataset is stored across a number of segments, determining a number of samples to take from the dataset, identifying a minimum identifier and a maximum identifier, and a total number of identifiers, calculating a density based on the plurality of identifiers, minimum identifier and maximum identifier, calculating a number of samples to take from a segment based on the calculated density, the number of samples to take from the dataset, and the number of segments, generating a sub-dataset based on the calculated number of samples to take from a segment, joining the generated sub-dataset with the dataset, and storing the joined dataset in a storage device.
US09135298B2	Autonomically generating a query implementation that meets a defined performance specification A database query optimizer allows specifying a performance specification for a query. When an access plan is created, the actual performance for executing the query using the access plan is determined and compared to the performance specification for the query. If the actual performance does not satisfy the performance specification for the query, the query optimizer autonomically generates a different access plan to see if the performance improves. If an access plan that meets the performance specification is generated, the new access plan is stored in the access plan cache for the query. If no access plan can be generated that meets the performance specification for the query, the access plan that provided the best performance is selected and stored in the access plan cache for the query.
US09135296B2	System, method, and data structure for automatically generating database queries which are data model independent and cardinality independent Systems and methods are provided for performing a query in a distributed system. In one example, a query generation system receives an identification of data item components and associations between the data item components, wherein the data item components include a measure and a category, and wherein the identified association indicates that the measure is independent of another data item component, indicates that the measure is dependent on another data item component, or indicates that two or more data item components are correlated. The query generation system creates and executes a database query for retrieving data item components, wherein the database query includes a first Uquery, wherein the first Uquery includes a Mx segment subquery and a U0 segment subquery, wherein the Mx segment subquery is associated with a table that contains the measure, a table that contains columns for a calculated measure, or a correlated table, and wherein the U0 segment subquery is associated with a table that contains the category, a table that contains columns for a calculated category, a dependent measure table, or a dependent filter table. In another example, the query generation system generates a virtual results table by aggregating the Uquery results from one Uquery with Uquery results from another Uquery and reports the virtual results table.
US09135295B2	Methods and systems for automated searching The present invention provides systems and methods for automating a search over a network such as the Internet. A user selects data such as text from within an application. The selected data is activated and a search is performed without the user having to leave the application. The search is performed while the user is continuing within the application. When the search is complete, the search results are made available to the user within the application from which the search was initiated. In one embodiment, the data is pre-searched and the results are cached such that the results are already available should the user desire. The present invention is particularly suited to integration with an operating system such that the methods of the present invention are thereby available to all applications. Alternatively, the present invention can be specific to a particular application.
US09135292B1	Selecting a template for a content item Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for selecting a template for a content item. In one aspect, a method includes receiving a content item request that includes context data. A content item that is eligible to be presented in response to the content item request is identified. A determination is made that the content item includes a template variable that is resolved based on the context data. A template feed including a set of templates is identified based on the template variable. A template is selected from the template feed for the content item. The template can be selected based on the context data. The selected template is populated with content for the content item to create a formatted content item. The formatted content item is provided in response to the content item request.
US09135290B2	Analyzing time variations in a data set Methods for analyzing and rendering business intelligence data allow for efficient scalability as datasets grow in size. Human intervention is minimized by augmented decision making ability in selecting what aspects of large datasets should be focused on to drive key business outcomes. Variable value combinations that are predominant drivers of key observations are automatically determined from several competing variable value combinations. The identified variable value combinations can then be then used to predict future trends underlying the business intelligence data. In another embodiment, an observed outcome is decomposed into multiple contributing drivers and the impact of each of the contributing drivers can be analyzed and numerically quantified—as a static snapshot or as a time-varying evolution. Similarly, differences in observations between two groups can be decomposed into multiple contributing sub-groups for each of the groups and pairwise differences among sub-groups can be quantified and analyzed.
US09135276B2	Digital media frame A method and a device for displaying images on a digital media frame is disclosed. In one embodiment, the device includes a memory, a processing unit, a display, an interface circuit, and a display circuit. The interface circuit has at least one receiving port capable of identifying various types of networking protocols that are used to transfer the image data. The processing unit attaches auxiliary information to each image before images are stored in a memory. The display circuit displays images according to the image data received. The digital media frame further contains a user input device, which allows a user to alter the image display sequence. The user input device is an input device other than a keyboard or a cursor control device.
US09135275B2	Digital photographing apparatus and method of providing image captured by using the apparatus A method of providing an image captured by using a digital photographing apparatus includes: displaying a first image from among a plurality of images stored in the digital photographing apparatus; obtaining a second image captured within a predetermined distance in a first direction from where the first image was captured, from the plurality of images by using position information about each of the first image and the second image; providing a user interface corresponding to the first direction; and displaying the second image in response to a user's input for selection of the user interface corresponding to the first direction.
US09135274B2	Medical imaging workflow manager with prioritized DICOM data retrieval Example systems and methods for retrieval and display of image data are disclosed. An example image retrieval system includes a workflow manager and an image streaming engine. The example workflow manager is to receive an image request and identify a storage location for the requested image based at least in part on metadata information. The example image streaming engine is to be associated with the storage location to stream the requested image from the storage location to a viewer, the workflow manager to select the storage location based on a location priority and to trigger streaming of the requested image from the storage location to the viewer.
US09135269B2	System and method of implementing an object storage infrastructure for cloud-based services A method for storing objects in an object storage system includes the steps of establishing a network connection with a client over an inter-network, receiving an upload request indicating an object to be uploaded by the client, selecting at least two storage nodes on which the object will be stored, receiving the object from the client via the network connection, and streaming the object to each of the selected storage nodes such that the object is stored on each of the selected storage nodes. The method can also include writing an object record associating the object and the selected storage nodes to a shard of an object database and generating a Universally Unique Identifier (UUID). The UUID indicates the shard and the object ID of the object record, such that the object record can be quickly retrieved. Object storage infrastructures are also disclosed.
US09135261B2	Systems and methods for facilitating data discovery A system for facilitating data discovery on a network, wherein the network has one or more data storage devices. The system may include a crawler program configured to select at least a first set of files and a second set of files, each of the first set of files and the second set of files being stored in at least one of the one or more data storage devices. The system may also include a data fetcher program configured to obtain a copy of the first set of files, the data fetcher program being further configured to resist against obtaining a copy of the second set of files. The system may also include circuit hardware implementing one or more functions of one or more of the crawler program and the data fetcher program.
US09135260B2	Method and system for creation, analysis and navigation of virtual snapshots A method for generation of virtual images on a computer system having a Virtual Machine (VM), including (a) generating a virtual image of the VM that includes a state of the VM's disk at a particular moment in time; wherein the virtual image is viewable via a host-side graphical representation component for viewing a history of virtual images representing states of the VM's disk at prior moments in time; (b) storing the virtual image as multiple chunks or partitions; (c) from the host side, acquiring a state of the VM's memory using a guest-side Application Process Interface (API) and adding the state of the VM's memory to the virtual image; (d) configuring the graphical representation component to display only selected virtual images based on user selection, and (e) in the graphical representation component, displaying a representation of differences between at least two of the virtual images.
US09135257B2	Technique for implementing seamless shortcuts in sharepoint A system and method for creating shortcuts within a database for archived items. A client computer sends a retrieval request for a given item to a web server. The given item may be an electronic document. A custom HTTPModule within the web server intercepts the request. The HTTPModule uses a uniform resource locator (URL) provided in the request to locate a record associated with the given item. If a given fixed string value is read from the record in place of the original content data, then the web server requests original content data for the given item from an archive store. The record still maintains identification information, such as a document identifier and the URL in order to maintain links and workflows. The retrieval request is not rerouted to an alternate path, and the client computer receives the original content data, rather than an indication of a shortcut.
US09135256B2	Method for searching content A content searching method for enabling a user to directly search for desired contents is provided. The content searching method includes displaying a location of a cell including a content being executed in a distribution map, which displays a plurality of cells divided according to a distribution axis, and when a search button is input, redistributing and displaying a location of the cell including the content being executed in a distribution map, which displays a plurality of cells in a changed skin screen depending on a distribution axis having a changed keyword.
US09135254B2	Segmenting documents within a full text index A system, method and computer program product for searching documents within a collection includes partitioning the collection into a plurality of document segments based on a range of values for a document attribute. Each document segment is associated with a different value range for the document attribute and includes documents each with a value for the document attribute within the associated value range. The system, method and computer program product also determines one or more document segments to search based on one or more search criteria within a search request pertaining to the document attribute. The system, method and computer program product further searches the determined one or more document segments for information satisfying the search request.
US09135252B2	System and method for near and exact de-duplication of documents A system, method and computer program product for identifying near and exact-duplicate documents in a document collection, including for each document in the collection, reading textual content from the document; filtering the textual content based on user settings; determining N most frequent words from the filtered textual content of the document; performing a quorum search of the N most frequent words in the document with a threshold M; and sorting results from the quorum search based on relevancy. Based on the values of N and M near and exact-duplicate documents are identified in the document collection.
US09135250B1	Query completions in the context of a user's own document Methods, systems and apparatus are described herein that include receiving a partial query entered into a search field on a computing device, and data indicating a document presented on the computing device during entry of the partial query. The presented document has been edited by a user of the computing device. Search results are then obtained which identify respective lists of search results documents for corresponding candidate query completions in a set obtained for the partial query. Similarity scores are then calculated for candidate query completions based at least in part on a similarity between content in the displayed document and content in search result documents in the corresponding lists. One or more candidate query completions in the set are then selected as refined query completions for the partial query based at least in part on the similarity scores and provided for presentation by the computing device.
US09135248B2	Context demographic determination system Systems, methods, and devices for determining contexts and determining associated demographic profiles using information received from multiple demographic sensor enabled electronic devices, are disclosed. Contexts can be defined by a description of spatial and/or temporal components. Such contexts can be arbitrarily defined using semantically meaningful and absolute descriptions of time and location. Demographic sensor data is associated with or includes context data that describes the circumstances under which the data was determined. The demographic sensor data can include demographic sensor readings that are implicit indications of a demographic for the context. The sensor data can also include user reported data with explicit descriptions of a demographic for the context. The demographic sensor data can be filtered by context data according a selected context. The filtered sensor data can then be analyzed to determine a demographic profile for the context that can be output to one or more users or entities.
US09135245B1	Filtering content based on acquiring data associated with language identification Content is filtered based on acquiring data associated with language identification. Data associated with language identification is acquired. Content is filtered based on a preferred language identified using the acquired data. The data associated with language identification is acquired from a plurality of sources. A language preference model provides a recommendation of a preferred language and determines a source of the acquired data having a highest priority. The acquired data is stored in a user profile.
US09135244B2	Method and apparatus for configurable microplanning Methods, apparatuses, and computer program products are described herein that are configured to be embodied as a configurable microplanner. In some example embodiments, a method is provided that comprises accessing a document plan containing one or more messages. The method of this embodiment may also include generating a text specification containing one or more phrase specifications that correspond to the one or more messages in the document plan. The method of this embodiment may also include applying a set of lexicalization rules to each of the one or more messages to populate the one or more phrase specifications. In some example embodiments, the set of lexicalization rules are specified using a microplanning rule specification language that is configured to hide linguistic complexities from a user. In some example embodiments, genre parameters may also be used to specify constraints that provide default behaviors for the realization process.
US09135243B1	Methods and apparatus for identification and analysis of temporally differing corpora Differences are identified, at the lexical unit and/or phrase level, between time-varying corpora. A corpus for a time period of interest is compared with a reference corpus. N-grams are generated for both the corpus of interest and reference corpus. Numbers of occurrences are counted. An average number of occurrences, for each n-gram of the reference corpus, is determined. A difference value, between number of occurrences in corpus of interest and average number of occurrences, is determined. Each difference value is normalized. N-grams can be selected for display, or for further processing, on the basis of the normalized difference value. Further processing can include selecting a sample period. A plurality of reference corpora are produced, where a begin time, for each sub-corpus of the plurality of reference corpora, differs, from a begin time for the corpus of interest, by an integer multiple of the sample period. Word Cloud visualization is shown.
US09135242B1	Methods and systems for the analysis of large text corpora Computerized methods and systems for the analysis of textual data, including: receiving, from one or more memories at one or more processors, textual data; using the processors, formatting the textual data for analysis and applying a probabilistic topic model to the textual data to extract semantically meaningful topics that collectively describe it; using a keyword weighting module, generating a topic cloud view representing the topics as a tagcloud with each being associated with a plurality of keywords; using a topic ordering module, generating a document distribution view representing a distribution of the textual data across multiple topics; using a document entropy calculation module, generating a document scatterplot view representing how many topics are attributable to the textual data; using a temporal topic trend calculation module, generating a temporal view representing changes in the occurrence of topics over time; and displaying one or more of the views to a user.
US09135240B2	Latent semantic analysis for application in a question answer system A system and method that improves obtaining similarity measure between concepts based on Latent Semantic Analysis by taking onto account graph structure derived from the knowledge bases by using a vector propagation algorithm, in the context domain, such as a medical domain. Concepts contained in a corpus of documents are expressed in a graph wherein each node is a concept and edges between node express relation between concepts weighted by the number of semantic relations determined from the corpus. A vector of neighbors is created and assigned to each concept, thereby providing an improved similarity measure between documents, i.e., corpus and query against corpus.
US09135238B2	Disambiguation of named entities Named entities are disambiguated in search queries and other contexts using a disambiguation scoring model. The scoring model is developed using a knowledge base of articles, including articles about named entities. Various aspects of the knowledge base, including article titles, redirect pages, disambiguation pages, hyperlinks, and categories, are used to develop the scoring model.
US09135237B2	System and a method for generating semantically similar sentences for building a robust SLM A system and method are described for generating semantically similar sentences for a statistical language model. A semantic class generator determines for each word in an input utterance a set of corresponding semantically similar words. A sentence generator computes a set of candidate sentences each containing at most one member from each set of semantically similar words. A sentence verifier grammatically tests each candidate sentence to determine a set of grammatically correct sentences semantically similar to the input utterance. Also note that the generated semantically similar sentences are not restricted to be selected from an existing sentence database.
US09135235B1	Exporter A method, apparatus, and computer program product are disclosed for self-service design, scheduling, and delivery of user-defined reports regarding promotions. The method includes receiving, from a user device, a report type and report delivery information. Based on the report type, relevant data regarding the one or more promotions is collected, using which a report is generated. The method then outputs the generated report based on the report delivery information. Optionally, analytical insights, such as trends within the data, sample size, suitability of control data, and indications of statistical significance, are generated and included in the report. A corresponding apparatus and computer program product are also provided.
US09135234B1	Collaborative generation of digital content with interactive reports Collaborative generation of digital content with interactive reports is enabled. An editor selects a layout and assigns story blocks to authors. Story blocks include a textual component and an interactive report component. In one embodiment, the interactive report includes static data captured at authorship time. In another embodiment, the interactive report includes live data updated at read time. After an author creates a story block, it is submitted to the editor for review and approval. The editor may send the story block back to the author for subsequent editing prior to approval. Once the editor approves all of the content from all of the authors, the editor can publish the content. The resulting content is published as an interactive report or magazine, enabling readers to see not just the story content of the publication, but to interact with the reports and underlying data.
US09135233B2	Suggesting alternate data mappings for charts Data mapping alternatives for creating a visual representation of a set of data are presented. A set of data is identified for analysis. The identified set of data and properties associated with the identified set of data are analyzed. Based on the analysis, data mapping alternatives for the identified set of data are determined. The determined data mapping alternatives for the identified set of data are ranked. The determined data mapping alternatives are presented in an order according to the ranking of the determined data mapping alternatives.
US09135227B2	Methods and systems for enabling the provisioning and execution of a platform-independent application A method for enabling the provisioning and execution of a platform-independent application includes receiving, by a mobile computing device, from a provisioning source, an XML document describing at least a portion of functionality provided by an application. An abstraction layer executing on the mobile computing device populates a Document Object Model (“DOM”) structure at least in part representing the running state of the application consistent with the received XML document. The abstraction layer presents a device-appropriate application user interface responsive to the DOM structure. The application receives a user input from within the rendered application user interface. Programming code referenced by the DOM receives, from the abstraction layer, the input event. The programming code reconfigures the DOM, in response to the received input event to reflect a response by the application to the input. The abstraction layer updates the device-appropriate application user interface, responsive to the reconfiguring of the DOM.
US09135222B2	Method of viewing document file and projecting the document file by projection apparatus A method for viewing a document file and a projection apparatus using the method are provided. The method is suitable for a projection apparatus which has a built-in file viewer. In the method, multi-lingual word banks supported by the projection apparatus are grouped to obtain a plurality of language groups. Each of the language groups shares at least one of the word banks. One of the language groups is linked in response to an input condition, and the linked language group is provided to the file viewer for performing a loading operation, so as to allow the file viewer to view the document file.
US09135221B2	Neuropsychological spatiotemporal pattern recognition Systems and methods for identifying and analyzing neuropsychological flow patterns, include creating a knowledge base of neuropsychological flow patterns. The knowledge base is formed by obtaining signals from multiple research groups for particular behavioral processes, localizing sources of activity participating in the particular behavioral processes, identifying sets of patterns of brain activity for the behavioral processes and neuropsychologically analyzing the localized sources and the identified patterns for each of the research groups. The neuropsychological analysis includes identifying all possible pathways for the identified sets of patterns, ranking the possible pathways based on likelihood for the particular behavioral process and reducing the number of ranked possible pathways based on additional constraints. A system for comparison of obtained signals from an individual to the created knowledge base is provided. These obtained signals are then used to further update the existing knowledge base.
US09135216B2	Systems and methods for merchandise display, sale and inventory control An automated retail system according to embodiments of the present invention includes a front and/or rear product rack, each rack having a plurality of bins, each of which has a product door, the system further including a basket moveable along an x-y plane on a rail system to selectively open a product door of a product bin to permit the product within the bin to fall into the basket, the basket movable to a product delivery position to release the product from the basket. Such a system may include sensors and/or scanners to determine contents of each bin, such that any product may be placed in any bin, and inventory of each bin or all bins may be determined at any time. The basket may be configured to move in x and y but not z directions, and may also serve as the sole actuation mechanism for opening the doors.
US09135214B2	System, method, and computer program product for assigning elements of a matrix to processing threads with increased contiguousness A system, method, and computer program product are provided for assigning elements of a matrix to processing threads. In use, a matrix is received to be processed by a parallel processing architecture. Such parallel processing architecture includes a plurality of processors each capable of processing a plurality of threads. Elements of the matrix are assigned to each of the threads for processing, utilizing an algorithm that increases a contiguousness of the elements being processed by each thread.
US09135213B2	Extending a processor system within an integrated circuit and offloading processes to process-specific circuits A method of extending a processor system within an integrated circuit (IC) can include executing program code within the processor system implemented within the IC, wherein the IC includes a programmable fabric. The processor system further can be coupled to the programmable fabric. A process can be performed using a process-specific circuit implemented within the programmable fabric in lieu of using the processor system. A result of the process from the process-specific circuit can be made available to the processor system.
US09135211B2	Systems and methods for trending and relevance of phrases for a user The present disclosure is directed to a method for identifying which phrases are trending across an aggregate of users that are relevant to a specific user. The method may include receiving, by a server, identification of a user. The server may identify a plurality of phrases that are trending upwards based on velocity of clicks to content containing, related to or associated with the plurality of phrases. The server may identify trending or temporally popular phrases based on aggregating multiple users' interactions with an aggregate of content. The server may determine a relevance score for each phrase of the plurality of phrases that are trending upwards based on identification of the user and actions of the user on content associated with each phrase, such as user clicking on content identifying or related to each phrase. The server may identify one or more phrases of the plurality of phrases based on relevance score.
US09135209B2	Apparatus and method for exchanging data between UPnP based devices An apparatus and method are provided for exchanging data between Universal Plug and Play (UPnP) based devices. The apparatus includes a controller that generates and transmits a request for a parameter to a controlled device, and receives a response to the request from the controlled device; and a fast event data bus module that establishes a fast event data transmission path, based on information included in the response, and receives fast event data.
US09135204B1	Hardened DVI interface A hardened DVI transmitter includes a differential driver to convert a ground-up DVI signal into a balanced DVI signal. The balanced DVI signal is transmitted to a DVI compliant cable, through one or more transformers. Transformers effectively remove direct current interference from sources such as lightning. A hardened DVI receiver receives the balanced DVI signal, from the DVI compliant cable, through one or more complimentary transformers. The balanced DVI signal is then converted back to a ground-up DVI signal. By this method, DVI compliant signals may be sent through DVI cables longer than ten meters, and survive interference from lightning.
US09135199B2	System and method for signal input control and video device thereof A system and method for signal input control and a video device thereof are provided, adapted for a control device controlling the signal input to the video device. The method includes the following steps: the control device provides a process information and a control command; the video device detects the control commands and receives the process information through a Display Data Channel (DDC); and the video device controls the switch unit to transmit the process information to the Extended Display Identification Data (EDID) ROM or the processor according to the control command.
US09135198B2	Methods and structure for serial attached SCSI expanders that self-configure by setting routing attributes of their ports based on SMP requests Methods and structure are provided for Serial Attached SCSI (SAS) expanders that program their own routing attributes. The structure includes a SAS expander comprising multiple physical links with associated transceivers (PHYs), wherein the PHYs are configured into ports at the expander, and a memory that defines routing attributes for each of the ports. The SAS expander also comprises a control unit that is operable to detect a discovery Serial Management Protocol (SMP) request received at a port of the expander, and that is further operable to set the routing attribute for the port to subtractive routing responsive to detecting the SMP request.
US09135196B2	Method for operating a bus system for communication with a plurality of communication nodes, and motor vehicle A method operates a bus system for communication with a plurality of communication nodes, in particular in a land vehicle and/or aircraft. A static, cyclically recurring time window of fixed length each communication node is assigned a time slot for transmission of user information of a byte count that can be specified at least once and fixed during the operation of the bus system. The time window has at least two cohesive sub-time windows. The same byte count is specified for all time slots of a sub-time window.
US09135195B2	Prediction of electronic component behavior in bus-based systems Systems and methods for predicting electronic component behavior in bus-based systems are described. In some embodiments, a method may include identifying a first bus access request pending in a request queue, the first bus access request associated with a first master component operably coupled to a bus. The method may also include calculating a first wait time corresponding to the first bus access request, the first wait time indicative of a length of time after which the first master component is expected to be granted access to the bus. The method may further include, in response to the first wait time meeting a threshold value, issuing a command to the first master component. In some embodiments, various techniques disclosed herein may be implemented, for example, in a computer system, an integrated circuit, or the like.
US09135193B2	Expander interrupt processing In one example in accordance with aspects of the present disclosure, an expander is provided. The expander comprises a workload scheduling module to cause the expander to enter a first mode of operation where the expander processes interrupts, and further to enter a second mode of operation where the expander processes interrupts for up to a predetermined time period before responding to at least one of Serial Management Protocol (SMP) commands and Serial SCSI Protocol (SSP) commands with a retry message.
US09135192B2	Memory system with command queue reordering A non-volatile memory system includes a memory controller that receives commands from a host and identifies commands that can be executed in parallel. The order in which commands are received is recorded so that responses may be provided to the host in the same order in which the commands were received.
US09135190B1	Multi-profile memory controller for computing devices The present invention pertains to a multi-profile memory controller and devices that use multi-profile memory controllers. More particularly, the present invention pertains to a multi-profile memory controller and related methods and systems that can operate with memory locations, memory devices, or both which are associated with different memory attributes, different attribute qualifiers, or the like, while minimizing or avoiding some or all of the disadvantages of the prior art.
US09135179B2	System and method of arbitrating cache requests This disclosure relates to arbitration of different types of requests to access a cache. Features of this disclosure can be implemented in a graphics processing unit (GPU). In one embodiment, an arbiter can receive requests from a color processor and a depth processor and determine which of the received requests has the highest priority. The request with the highest priority can then be provided to the cache. The priority can be configurable. The arbiter can determine priority, for example, based on whether a location in the cache associated with a request is available, a weight associated with the request, a number of requests of a particular type processed by the arbiter, or any combination thereof.
US09135176B1	System and method for thin provisioning A method, computer program product, and computing system for configuring a cache memory device to include a cache portion and a thinly-provisioned, direct attached storage portion. Data is stored on the thinly-provisioned, direct attached storage portion. At least a portion of the thinly-provisioned, direct attached storage portion is relinquished, thus generating a relinquished portion. The relinquished portion is reassigned to the cache portion.
US09135175B2	Distributed cache coherency directory with failure redundancy A system includes a number of processors with each processor including a cache memory. The system also includes a number of directory controllers coupled to the processors. Each directory controller may be configured to administer a corresponding cache coherency directory. Each cache coherency directory may be configured to track a corresponding set of memory addresses. Each processor may be configured with information indicating the corresponding set of memory addresses tracked by each cache coherency directory. Directory redundancy operations in such a system may include identifying a failure of one of the cache coherency directories; reassigning the memory address set previously tracked by the failed cache coherency directory among the non-failed cache coherency directories; and reconfiguring each processor with information describing the reassignment of the memory address set among the non-failed cache coherency directories.
US09135168B2	Apparatus and method for generating descriptors to reaccess a non-volatile semiconductor memory of a storage drive due to an error A storage drive including a first module and a second module. The first module is configured to, based on an instruction signal of a first descriptor, transfer a block of data to or from a non-volatile semiconductor memory in the storage drive. The second module is configured to: monitor a status of the transfer of the block of data; determine whether an error exists with respect to the transfer of the block of data; and independent of communication with a host device, initiate generation of a second descriptor if the error exists. The second module is configured to, according to the second descriptor, perform a reaccess event including reaccessing the non-volatile semiconductor memory to again transfer the block of data to or from the non-volatile semiconductor memory.
US09135164B2	Synchronous mirroring in non-volatile memory systems First data is received for storing in a first asymmetric memory device. A first writing phase is identified as a current writing phase. A first segment included in the first asymmetric memory device is identified as next segment available for writing data. The first data is written to the first segment. Information associated with the first segment is stored, along with information indicating that the first segment is written in the first writing phase. Second data is received for storing in the asymmetric memory. A second segment included in the first asymmetric memory device is identified as the next segment available for writing data. The second data is written to the second segment. Information associated with the second segment and the second memory block is stored along with information indicating that the second segment is written in the second writing phase.
US09135163B2	Maintaining versions of data in solid state memory One or more embodiments are directed a solid state storage device for maintaining versions of data. The solid state storage device comprises a processor and a solid state memory communicatively coupled to the processor. A flash translation layer receives at least one request from a file system to write at least one dataset to a logical page of the solid state memory. At least one physical page in a data block of the solid state memory associated with the logical page is identified. At least one dataset in the physical page is stored. At least one data versioning tag is associated with the dataset in a data structure associated with the logical page. The data versioning tag identifies the dataset as a given version of the logical page. The dataset is maintained as accessible from the physical page irrespective of subsequent write operations to the logical page.
US09135161B2	Flash translation layer system for maintaining data versions in solid state memory One or more embodiments are directed to managing data in a solid state memory supporting data versioning. At least one request to perform an operation on at least one logical page of a solid state memory is received from a file system. A data structure associated with the at least one logical page is identified. The data structure at least identifies one or more physical pages associated with the at least one logical page, and a version of the at least one logical page represented by a dataset stored in each of the one or more physical pages. The operation is performed on the at least one logical page based on the data structure that has been identified.
US09135158B2	Inheritance of growth patterns for derived tables Systems and methods are disclosed in which a derived table can inherit a growth pattern from a template table. A growth pattern is used to define how memory is allocated to a table as the table grows. The derived table can inherit the growth pattern defined by its template table or it can provide an override growth pattern. Inheritance of the growth pattern can be performed by explicit copying or by reference or link. Growth patterns can be edited, and the edits can be applied universally or locally.
US09135155B2	Storage and retrieval of shaped data Systems and methods of encoding and decoding shaped data include determining a bit representation corresponding to a bit in a representation of a codeword that is read from a non-volatile memory of a data storage device. A soft metric corresponding to the bit representation is determined at least partially based on an amount of shaping of data.
US09135154B2	Algorithm execution output cache Techniques are disclosed for algorithm execution output cache. A remote presentation session server conducting concurrent remote presentation sessions with a plurality of clients generates a signature for each image that it is to send to a client. The remote presentation server also maintains a signature table comprising pairs of signatures and compressed images. Each signature and compressed image pair corresponds to input data (i.e. the signature was generated from an image and the compressed image was generated from that same image). The remote presentation session server checks the signature against the signature table. Where the remote presentation session server determines that there is a match between the signature and a signature in the signature table, it sends the client the compressed image that corresponds to the signature in the signature table that generated the match. In doing so, the remote presentation session server may avoid redundantly compressing the second image.
US09135152B2	Optimizing test data payload selection for testing computer software applications via computer networks Testing a computer software application by configuring a first computer to execute a copy of data-checking software used by a computer software application at a second computer, processing a first copy of a test data payload using the data-checking software at the first computer, where the test data payload is configured to test for an associated security vulnerability, determining that the first copy of the test data payload is endorsed by the data-checking software at the first computer for further processing, and sending a second copy of the test data payload via a computer network to the computer software application at the second computer for processing threat.
US09135150B2	Automated execution of functional test scripts on a remote system within a unit testing framework A unit testing framework automatically issues a call to a remote testing automation framework on an originating system to automatically execute a functional test script specified in a unit testing framework test case through a functional testing framework on a target on a remote system. The originating system automatically issues a call to the remote testing automation framework to copy a functional test log resulting from executing the functional test script from the remote system to the originating system. The unit testing framework automatically evaluates whether the functional test log comprises at least one error. The unit testing framework, responsive to the functional test log comprising at least one error, automatically marks the unit testing framework test case as failed.
US09135149B2	Test case arrangment and execution Systems and methods for generating and traversing test cases trees are provided. A test case tree indicates an order of execution for multiple test cases, where setup and tear down or equivalent steps are not required before and after execution of each test case in the tree. The tree may allow for generation of virtual test cases to encompass multiple test cases which ordinarily would have mutually exclusive execution requirements.
US09135142B2	Workload performance projection for future information handling systems using microarchitecture dependent data A performance projection system includes a test IHS and a currently existing IHS. The performance projection system includes surrogate programs and user application software. The test IHS employs a memory that includes a virtual future IHS, currently existing IHS, surrogate programs, and user application software for determination of runtime and HW counter performance data. The user application software and surrogate programs execute on the currently existing MS to provide designers with runtime data and HW counter or microarchitecture dependent data. Designers execute surrogate programs on the future IHS to provide runtime and HW counter data. Designers normalize and weight the runtime and HW counter data to provide a representative surrogate program for comparison to user application software performance on the future IHS. Using a scaling factor, designers may generate a projection of runtime performance for the user application software executing on the future IHS.
US09135141B2	Identifying software responsible for a change in system stability A computer-implemented method detects a stability change in a first computer system, and compares a first set of software applications installed on the first computer system to each set of software applications installed on a plurality of other computer systems. The method then identifies a second computer system from among the plurality of other computer systems, wherein the set of software applications installed on the second computer system includes all of the first set of software applications except for a given software application. The given software application is then identified as the cause of the stability change in the first computer system. The computer systems are preferably virtual machines being managed by a management module, such as a provisioning manager. The method may be used to detect both increases in stability and instability.
US09135140B2	Identifying software responsible for a change in system stability A computer program product including computer usable program code embodied on a tangible computer usable storage medium, includes: computer usable program code for detecting a stability change in a first computer system; computer usable program code for comparing a first set of software applications installed on the first computer system to each set of software applications installed on a plurality of other computer systems in communication with a management module; computer usable program code for identifying a second computer system from among the plurality of other computer systems, wherein the set of software applications installed on the second computer system includes all of the first set of software applications except for a given software application; and computer usable program code for identifying the given software application as the cause of the stability change in the first computer system.
US09135139B2	Methods and systems to identify and reproduce concurrency violations in multi-threaded programs using expressions Methods and systems to identify and reproduce concurrency bugs in multi-threaded programs are disclosed. An example method disclosed herein includes defining a data type. The data type includes a first predicate associated with a first thread of a multi-threaded program that is associated with a first condition, a second predicate that is associated with a second thread of the multi-threaded program, the second predicate being associated with a second condition, and an expression that defines a relationship between the first predicate and the second predicate. The relationship, when satisfied, causes the concurrency bug to be detected. A concurrency bug detector conforming to the data type is used to detect the concurrency bug in the multi-threaded program.
US09135137B2	Control flow analysis utilizing function dominator trees A method for control flow analysis according to an embodiment of the present invention includes: acquiring an original function call tree of a program, wherein nodes of the original function call tree represent functions and a parent/child relation between the nodes represents a calling relation; generating a corresponding function dominator tree from the calling relation, wherein nodes of the function dominator tree represent the functions and a parent/child relation between the nodes represents a dominator relation, wherein a first function dominates a second function if all the invocations to the second function are originated by the first function; and simplifying the original function call tree according to the function dominator tree so as to obtain a simplified function call tree. According to an embodiment of the present invention, the function call tree for control flow analysis can be simplified.
US09135132B2	Method of testing a device under test, device under test, and semiconductor test system including the device under test A method of testing a plurality of DUTs includes providing a plurality of shift registers to test a plurality of cores in each DUT, supplying test input data, a test mode input signal, a test clock signal, and a test reset signal to the shift registers and cores, receiving a master bit, a first control value, and a second control value, based on the test input data and the test mode input signal, according to the test clock signal and the test reset signal, selecting at least one core and a test method, according to the first control value, selecting a target DUT according to the master bit or the second control value, simultaneously testing and debugging the selected core according to the test method, and outputting the test data output of the target DUT to check a result of the testing when an output enable signal is received.
US09135125B1	Distributed uninterruptible power supply A distributed uninterruptible power supply provides power to a system including a plurality of electronic computing devices. Each electronic computing device may include an on-board battery to provide power when a power outage occurs. The electronic computing devices that are executing processes that may be temporarily suspended without adversely impacting the processing of a majority of the plurality electronic computing devices may be identified as sacrificial devices. The motherboard of each sacrificial device may be deactivated to suspend any executing processes. The DC power provided by the on-board battery of each sacrificial device may be converted to AC power and then supplied to the non-sacrificial devices.
US09135122B2	Data mover discovery of object extent Performing data backup for a client includes receiving, at a host other than the client, volume information including data indicating a physical data storage location of at least a part of a volume comprising one or more stored objects associated with the client; and determining at the host, based at least in part on the volume information, a stored object information for a stored object included in the volume, the stored object information including data associated with a physical data storage location of the stored object.
US09135121B2	Managing updates and copying data in a point-in-time copy relationship expressed as source logical addresses and target logical addresses Provided are a computer program product, system, and method for managing updates and copying data in a point-in-time copy relationship expressed as source logical addresses and target logical addresses. A copy relationship indicates a source set of a subset of source logical addresses to copy to a target set comprising a subset of target logical addresses. An update is received to a source logical address that has not been copied. Determinations are made of the target logical address corresponding to the source logical address to be updated according to the copy relationship, a target group of target logical addresses in the target set that include the determined target logical address, and the source logical addresses in the source set that correspond to the target logical addresses in the target group. The determined source logical addresses are copied to the target logical addresses in the determined target group.
US09135119B1	System and method for data management A method, computer program product, and computing system for generating a frontend snapshot of a primary frontend cache system at a particular point in time. A backend snapshot of a backend storage system coupled to the primary front end cache system is generated at the particular point in time. The front end snapshot of the primary frontend cache system is transferred to a backup frontend cache system.
US09135118B2	System to catalog and search point-in-time instances of a file system A system to catalog and search point-in-tine instances of a file system is disclosed. A catalog engine takes backups of file data generated by a storage system and catalogs the backups of file data into a searchable catalog of independent metadata records. The metadata is represented by baseline structure and delta files.
US09135117B2	Recovery for long running multithreaded processes In response to receiving a checkpoint request from a first task for a process executing in parallel with at least a second task for the process, checkpoint data from the first task is stored to establish a restart point for the first task, wherein the checkpoint data records a current state of the first task, and the checkpoint data from the first task is merged with previously received checkpoint data for the at least second task to create a checkpoint file. In response to restarting the process, the first task and the at least second task are restarted using the checkpoint data in the checkpoint file.
US09135116B1	Cloud enabled filesystems provided by an agent which interfaces with a file system on a data source device Information is managed by receiving at a data source device, from an application running on a data source device, an instruction associated with a file system object. It is determined at the data source device if the instruction is able to be satisfied by a file system running on the data source device. If it is determined that the instruction is not able to be satisfied by the file system, the instruction is performed without the services of the file system; the application is unaware that the file system object is managed by an entity other than the file system running on the data source device.
US09135115B2	Storing data in multiple formats including a dispersed storage format A method begins by a processing module of a dispersed storage network (DSN) receiving data in a redundant array of independent disks (RAID) format and converting from the RAID format to an original format of the data. The method continues with the processing module dispersed storage error encoding a data segment of the data in the original format to produce a set of encoded data slices, where a set of encoded data slices includes a decode threshold sub-set of encoded data slices and an error correcting sub-set of encoded data slices. The method continues with the processing module converting the decode threshold sub-set of encoded data slices into a RAID formatted data segment, storing the RAID formatted data segment in RAID memory, and storing at least the error correcting sub-set of encoded data slices in DSN memory.
US09135114B2	Adjusting a dispersal parameter of dispersedly stored data A method begins by a processing module storing data files utilizing a dispersed storage error coding function that includes a pillar width parameter and a decode threshold parameter. The method continues with the processing module determining whether to adjust redundancy of the dispersed storage error coding function based on performance of the DSN. When the redundancy of the dispersed storage error coding function is to be adjusted, changing a ratio between the pillar width parameter and the decode threshold parameter and adjusting storage of one or more sets of the plurality of sets of encoded data slices based on the changing of the ratio.
US09135112B2	Policy for read operations addressing on-the-fly decoding failure in non-volatile memory An apparatus includes a non-volatile memory and a controller. The controller is operatively coupled to the non-volatile memory and configured to perform read and write operations on the non-volatile memory using codewords as a unit of read access. The controller includes an error correction engine configured to perform an error correction on codewords read from the non-volatile memory, and, if the error correction fails, to perform one or more retry procedures. The controller is further configured to perform one or more background procedures as a result of the error correction or one or more of the retry procedures not being successful and send an error message as a result of all of the retry procedures not being successful. The one or more background procedures are directed to determining a cause of the error correction failure.
US09135111B2	Nonvolatile memory device and bad area managing method thereof Example embodiments relate to a bad area managing method of a nonvolatile memory device. The nonvolatile memory device may include a plurality of memory blocks and each block may contain memory layers stacked on a substrate. According to example embodiments, a method includes accessing one of the memory blocks, judging whether the accessed memory block includes at least one memory layer containing a bad memory cell. If a bad memory cell is detected, the method may further include configuring the memory device to treat the at least one memory layer of the accessed memory block as a bad area.
US09135109B2	Determination of optimum threshold voltage to read data values in memory cells An adaptive search scheme leads to threshold voltages that have lower bit error rates over initial values. An initial reference voltage is used and data is measured for set steps in voltage about the initial value sufficient to fit a polynomial curve. A minimum is used to determine the lowest bit error rate and corresponding optimum threshold voltage. This voltage is adopted as the new threshold voltage for reading the given data.
US09135105B2	Probability-based remedial action for read disturb effects A method may be performed in a data storage device that includes a memory including a three-dimensional (3D) memory and a controller, in response to a request to read data from the memory. The data is located within a first word line of the memory. The method includes accessing the data from the first word line and determining, based on a probability threshold, whether to perform a remedial action with respect to a second word line.
US09135101B2	Virtual function timeout for single root input/output virtualization controllers Systems and methods presented herein provide for resetting a controller in a Single Root Input/Output Virtualization (SR-IOV) architecture. The architecture includes a physical function that periodically issues a heartbeat command to a physical function of an SR-IOV controller, starts a first timer, determines a firmware failure of the controller upon expiration of the first timer, and issues a command to reset the firmware of the controller. The architecture also includes a plurality of a virtual function drivers coupled to a plurality of virtual functions of the controller. Each virtual function driver periodically issues a heartbeat command to its corresponding virtual function, starts a second timer having a duration that is less than a duration of the first timer, determines a firmware failure of the controller upon expiration of the second timer, and pauses input/output operations to its corresponding virtual function until the firmware of the controller is reset.
US09135100B2	Cooperative memory error detection and repair Some embodiments include apparatuses and methods having a memory structure included in a memory device and a control unit included in the memory device. The control unit can provide information obtained from the memory structure during a memory operation to a host device (e.g., a processor) in response to a command from the host device. If the control unit receives a notification from the host device indicating that the host device has detected an error in the information obtained from the memory structure, then a repair unit included in the memory device performs a memory repair operation to repair a portion in the memory structure.
US09135099B2	Memory error correction A method includes, by a first circuit, converting a plurality of bits in a first format to a second format. The plurality of bits in the second format is used, by a second circuit, to program a plurality of memory cells corresponding to the plurality of bits. The first format is a parallel format. The second format is a serial format. The first circuit and the second circuit are electrically coupled together in a chip. In some embodiments, the plurality of bits includes address information, cell data information, and program information of a memory cell that has an error. In some embodiments, the plurality of bits includes word data information of a word and error code and correction information corresponding to the word data information of the word.
US09135097B2	Node death detection by querying Systems, methods, and other embodiments associated with detecting a node death in a clustered distributed system are described. In one embodiment, a method includes transmitting a ping message to a peer node in the network. If a reply to the ping message is not received from the peer node, a query is sent to table of port identifiers that lists ports in the cluster. In one embodiment, the query includes a port identifier associated with the peer node. The peer node is declared as inactive/dead when the query fails to locate a match in the table for the port identifier. When the query locates a match in the table for the port identifier, another ping message is periodically transmitted to the peer node.
US09135090B2	Messaging bus residing on a mobile device Systems and methods are disclosed for handling messages using a messaging bus residing on a mobile device. An example system includes a register module that registers first and second applications. The second application is executing on the mobile device. The system also includes a routing module that receives from the first application a communication in a first format for the second application, determines a second format associated with the second application, and determines whether the first format is different from the second format. When the first format is determined to be different from the second format, the routing module transmits to the second application the communication in the second format. The system further includes a translation module that when the first format is determined to be different from the second format, translates the communication in the first format to the second format.
US09135089B2	Method and apparatus for facilitating a persistence application programming interface One embodiment of the present invention provides a system for implementing a persistence application programming interface (API) that is platform independent and can make up-calls to business logic. During operation, the system receives a request at the API to execute a command at a persistence tier of an n-tier distributed application. In response to the request, the system determines an entity type for an entity affected by the command. Next, the system identifies a function at a middle tier of the n-tier distributed application that is associated with the entity type and the command, wherein the middle tier includes the business logic. The system then sends an instruction to the middle tier to execute the function. Finally, upon receiving a confirmation at the API that the function executed, the system executes the command at the persistence tier.
US09135088B2	Multi processing system In a multi processing system, packet routing units are arranged in respective middleware layers in first nodes corresponding to memory spaces connected to plural processor cores and perform routing of a packet among parent nodes and child nodes in a tree. The child nodes are user nodes that are objects of respective application layers in the memory spaces. The first nodes are the parent nodes. The user nodes, the first nodes, and a second node in the tree are assigned addresses that identify parent-child relationship of nodes in the tree. The second node is a parent node of the first nodes. The packet routing unit (a1) stores the packet if the source address is identical to an own node address, (a2) transfers the packet to a child node if the source address indicates the child node, and (a3) transfers the packet to a parent node in the other cases.
US09135087B1	Workgroup handling in pipelined circuits Systems and methods for limiting resource usage of a kernel of an integrated circuit are provided. For example, in one embodiment a method for limiting a number of workgroups that may simultaneously access a kernel of an integrated circuit (IC) includes determining a threshold number of workgroups that may access the kernel simultaneously. A thread of execution is received. The thread of execution is allowed to access the kernel when the threshold number of workgroups would not be exceeded by the thread of execution accessing the kernel.
US09135084B2	Service provider class application scalability and high availability and processing prioritization using a weighted load distributor and throttle middleware Processing of tickets received by a ticket processing system is performed by allowing processes running on one or more hosts to access a ticket processing table to retrieve and process the tickets. A weighted load distributor (WLD) grants weighted round robin turn access to the processes running on the hosts. The WLDs running on different hosts coordinate so that a primary WLD is selected that is responsible for distributing turn access to the ticket processing table to various requesting processes. The hosts use a throttle to determine the real-time availability of resources for the hosts. The throttle determines whether a process should be allowed to proceed with processing tasks associated with a particular ticket based on resource costs associated with the required processing, as well as resources available to the respective host and ticket priority.
US09135082B1	Techniques and systems for data race detection A race detection mechanism can include running threads of a multithreaded program on a processor, the program being configured to produce locksets each of which indicate a set of one or more locks that a thread holds at a point in time. The mechanism can cause a performance monitoring unit included in the processor to monitor memory accesses caused by the threads and to produce samples based on the memory accesses, the samples being indicative of an accessed memory location. The mechanism can detect an existence of a data race condition based on the samples and the locksets. Detecting can include identifying a protected access to a memory location by a first thread of the threads and identifying an unprotected access to the memory location by a second thread of the threads. The process selectively outputs an indication of the data race condition.
US09135081B2	Work-queue-based graphics processing unit work creation One embodiment of the present invention enables threads executing on a processor to locally generate and execute work within that processor by way of work queues and command blocks. A device driver, as an initialization procedure for establishing memory objects that enable the threads to locally generate and execute work, generates a work queue, and sets a GP_GET pointer of the work queue to the first entry in the work queue. The device driver also, during the initialization procedure, sets a GP_PUT pointer of the work queue to the last free entry included in the work queue, thereby establishing a range of entries in the work queue into which new work generated by the threads can be loaded and subsequently executed by the processor. The threads then populate command blocks with generated work and point entries in the work queue to the command blocks to effect processor execution of the work stored in the command blocks.
US09135080B2	Dynamically assigning a portion of physical computing resource to logical partitions based on characteristics of executing logical partitions A computer implemented method includes determining first characteristics of a first logical partition, the first characteristics including a memory footprint characteristic. The method includes assigning a first portion of a first set of physical computing resources to the first logical partition. The first set of physical computing resources includes a plurality of processors that includes a first processor having a first processor type and a second processor having a second processor type. The first portion includes the second processor. The method includes dispatching the first logical partition to execute using the first portion. The method includes creating a second logical partition that includes the second processor and assigning a second portion of the first set of physical computing resources to the second logical partition. The method includes dispatching the second logical partition to execute using the second portion.
US09135076B2	Automated capacity aware provisioning According to one general aspect, a method may include monitoring, via a communications network, an actual system resource usage of each of a plurality of target computing devices configured to execute one or more respective workload tasks. The method may also include receiving a request for a suggestion for an assigned target computing device to be assigned a new workload task. The method may further include providing the suggestion regarding the assigned target computing device to be assigned a new workload task, wherein the suggestion suggests one or more target computing device(s) that is included in the plurality of target computing devices. The method may also include adjusting a system resource usage profile of the assigned target computing device to include an estimated system resource usage for the new workload task and an actual system resource usage of the assigned target computing device that was previously monitored.
US09135072B2	QoS-aware scheduling In an embodiment, a memory controller includes multiple ports. Each port may be dedicated to a different type of traffic. In an embodiment, quality of service (QoS) parameters may be defined for the traffic types, and different traffic types may have different QoS parameter definitions. The memory controller may be configured to schedule operations received on the different ports based on the QoS parameters. In an embodiment, the memory controller may support upgrade of the QoS parameters when subsequent operations are received that have higher QoS parameters, via sideband request, and/or via aging of operations. In an embodiment, the memory controller is configured to reduce emphasis on QoS parameters and increase emphasis on memory bandwidth optimization as operations flow through the memory controller pipeline.
US09135069B2	Application resource model composition from constituent components Techniques for composing an application resource model are disclosed. The techniques include obtaining operator-level metrics from an execution of a data stream processing application according to a first configuration, wherein the application is executed by nodes of the data stream processing system and the application includes processing elements comprised of multiple operators, wherein two or more of the operators are combined in a first combination to form a processing element according to the first configuration, generating operator-level resource functions from the first combination of operators based on the obtained operator-level metrics, and generating a processing element-level resource function using the generated operator-level resource functions to predict a model for the processing element formed by a second combination of operators, the processing element-level resource function representing an application resource model usable for predicting characteristics of the application executed according to a second configuration.
US09135068B2	System and method for dynamic rescheduling of multiple varying resources with user social mapping A system and method for scheduling resources includes a memory storage device having a resource data structure stored therein which is configured to store a collection of available resources, time slots for employing the resources, dependencies between the available resources and social map information. A processing system is configured to set up a communication channel between users, between a resource owner and a user or between resource owners to schedule users in the time slots for the available resources. The processing system employs social mapping information of the users or owners to assist in filtering the users and owners and initiating negotiations for the available resources.
US09135064B2	Fine grained adaptive throttling of background processes Approaches for throttling backgrounds processes to a high degree of precision. The utilization of a shared resource that is used by one or more background processes is monitored. A frequency at which the one or more background processes are executed is dynamically adjusted based on the current utilization of the shared resource without adjusting the frequency in which one or more foreground processes are executed to ensure that the utilization of the shared resource does not exceed a threshold value. The monitoring of the utilization of the shared resource may be performed more often than the adjusted of the frequency at which the background processes are executed, and the utilization of the shared resources may be performed many times a second. Consequently, the utilization of the shared resource may be above a certain level (such as 65%) and less than another level, such as 90%, when background processes are executing.
US09135063B1	Apparatus and method for efficient scheduling of tasks A system and method of scheduling tasks, comprising receiving activity and performance data from registers or storage locations maintained by hardware and an operating system; storing calibration coefficients associated with the activity and performance data; computing an energy dissipation rate based on at least the activity and performance data; and scheduling tasks under the operating system based on the computed energy dissipation rate.
US09135062B2	Hardware assisted method and system for scheduling time critical tasks A method and system for scheduling a time critical task. The system may include a processing unit, a hardware assist scheduler, and a memory coupled to both the processing unit and the hardware assist scheduler. The method may include receiving timing information for executing the time critical task, the time critical task executing program instructions via a thread on a core of a processing unit and scheduling the time critical task based on the received timing information. The method may further include programming a lateness timer, waiting for a wakeup time to obtain and notifying the processing unit of the scheduling. Additionally, the method may include executing, on the core of the processing unit, the time critical task in accordance with the scheduling, monitoring the lateness timer, and asserting a thread execution interrupt in response to the lateness timer expiring, thereby suspending execution of the time critical task.
US09135061B2	Method and system for controlling a scheduling order per category in a music scheduling system A system and method for controlling a scheduling order per category is disclosed. A scheduling order can be designated for the delivery and playback of multimedia content (e.g., music, news, other audio, advertising, etc) with respect to particular slots within the scheduling order. The scheduling order can be configured to include a forward order per category or a reverse order per category with respect to the playback of the multimedia content in order to control the scheduling order for the eventual airplay of the multimedia content over a radio station or network of associated radio stations. A reverse scheduling technique provides an ideal rotation of songs when a pre-programmed show interferes with a normal rotation. Any rotational compromises can be buried in off-peak audience listening hours of the programming day using the disclosed reverse scheduling technique.
US09135059B2	Opportunistic multitasking Services for a personal electronic device are provided through which a form of background processing or multitasking is supported. The disclosed services permit user applications to take advantage of background processing without significant negative consequences to a user's experience of the foreground process or the personal electronic device's power resources. To effect the disclosed multitasking, one or more of a number of operational restrictions may be enforced. By way of example, thread priority levels may be overlapped between the foreground and background states. In addition, system resource availability may be restricted based on whether a process is receiving user input. In some instances, an application may be suspended rather than being placed into the background state. Implementation of the disclosed services may be substantially transparent to the executing user applications and, in some cases, may be performed without the user application's explicit cooperation.
US09135058B2	Method for managing tasks in a microprocessor or in a microprocessor assembly This method includes steps for the parallel management of a first list and of a second list. The first list corresponds to a list of tasks to be carried out. The second list corresponds to a list of variables indicating the presence or absence of tasks to be carried out. The list of tasks is managed in a “FIFO” manner, that is to say that the first task inputted into the list is the first task to be executed. A task interruption is managed using a “Test And Set” function executed on the elements of the second list, the “Test And Set” function being a function which cannot be interrupted and including the following steps: reading the value of the element in question, storing the read value in a local memory, and assigning a predetermined value to the element which has just been read.
US09135057B2	Operator graph changes in response to dynamic connections in stream computing applications A stream computing application may permit one job to connect to a data stream of a different job. As more and more jobs dynamically connect to the data stream, the connections may have a negative impact on the performance of the job that generates the data stream. Accordingly, a variety of metrics and statistics (e.g., CPU utilization or tuple rate) may be monitored to determine if the dynamic connections are harming performance. If so, the stream computing system may be optimized to mitigate the effects of the dynamic connections. For example, particular operators may be unfused from a processing element and moved to a compute node that has available computing resources. Additionally, the stream computing application may clone the data stream in order to distribute the workload of transmitting the data stream to the connected jobs.
US09135055B2	Transparent network substrate system A transparent network substrate system including at least one server module and at least one client module. The server module provides a selected functionality, such as moving an actuator, performing a mathematical operation, and receiving data from a sensor. Upon execution the server module's machine code writes information necessary to describe the selected functionality to memory. The information written to memory includes information necessary to invoke the server module functionality and may include types, members, and parameters. The client module searches the memory for the selected functionality; requests information from the server module; and invokes the functionality of the server module. Once invoked by the client the server module uses the information in memory for creating dynamic function calls.
US09135052B2	Distributed multiple monitor display split using multiple client devices in a virtualization system A mechanism for distributed multiple monitor display split using multiple client devices in a virtualization system is disclosed. A method of the invention includes determining, by a remote access protocol server executed by a computing device, that a monitor configuration of a primary client device is not compatible with a multiple monitor configuration of a virtual machine (VM) hosted by a hypervisor of the computing device, establishing a communication session with remote access protocol clients of multiple client devices of a logical client unit comprising the primary client device, wherein each of the multiple client devices comprises at least one monitor, and for each VM monitor of the multiple monitors configured for the VM, mapping, by the remote access protocol server, the VM monitor to a monitor of a client device in the logical client unit.
US09135051B2	Redirecting guest-generated events to an event aggregator in a networked virtualization environment A method for integrating responses to asynchronous events is provided. A hypervisor of a host receives a request from a network manager to re-direct asynchronous events from a guest to an address of an event aggregation manager distinct from an address of the network manager. The hypervisor receives an asynchronous event having a destination address of the network manager from the guest. The hypervisor maps the destination address of the network manager to the address of the event aggregation manager. The hypervisor transmits the asynchronous event to the event aggregation manager.
US09135049B2	Performing thin-provisioning operations on virtual disk images using native features of the storage domain A virtual disk image manager running on a computing device determines that an operation is to be performed on a virtual disk image. The virtual disk image manager then determines whether an underlying storage domain on which the virtual disk image is stored supports the operation. In response to determining that the storage domain supports the operation, the virtual disk image manager uses native capabilities of the storage domain to perform the operation. In response to determining that the storage domain does not support the operation, the virtual disk image manager performs the operation without the use of the storage domains native capabilities.
US09135047B2	Apparatus, method, and program for managing a plurality of virtual machines An apparatus includes a memory and a processor that executes a program including a procedure on the memory. The procedure comprises receiving information in which a communication amount corresponding to an amount of transmitted and received data is associated with a transmission source and a destination of the data with respect to each of virtual machines operating in a system including servers, calculating a correlation degree between the transmission source and the destination based on the information, calculating an arrangement candidate of the virtual machine with respect to the server based on the correlation degree, calculating a load on the network in the system imparted by the transmission and reception of the data attributable to a movement of the virtual machine to match the arrangement candidate; and controlling the movement of the virtual machine in accordance with the arrangement candidate based on the load and a threshold.
US09135043B1	Interface for enabling an application in a virtual machine to access high performance devices A high-performance device interface (HPDI) provides flexible and high-performance access by applications residing in a Virtual Machine (VM) to high-performance devices. The technique enables VM applications to use a single interface even when multiple device drivers exist, and can pass data efficiently between a VM application and a front-end device driver (a device driver implemented in a VM, such as may be used in a paravirtualization environment). It improves overall performance of a VM by reducing the copying of data during communications between a VM application and a front-end device driver, which reduces processor and memory usage.
US09135032B2	System, method and computer program product for data processing and system deployment in a virtual environment Systems, methods, and computer program products for processing data are disclosed. A method according to one embodiment includes reading a data processing instruction locally called by a virtual work unit; optimizing the read data processing instruction; and performing data processing for the virtual work unit using the optimized data processing instruction. The step of optimizing the read data processing instruction may include one or more of: merging data processing instructions from different virtual work units for same data, and analyzing data processing instructions from different virtual work units to select suitable data processing timing. The data processing method is executed in a virtual environment.
US09135029B2	Securely reconfiguring a multi-node system to prevent firmware rollback A computer program product includes computer readable program code for initiating boot of a multi-node system including a first compute node scaled together with a second compute node, wherein the multi-node system boots from a basic input output system of the first compute node that is identified as a primary node by a trusted platform module of the first compute node. The computer program product further comprises computer readable program code for receiving a request to reconfigure the multi-node system so that the second compute node would become the primary node, and computer readable program code for reconfiguring the multi-node system so that the second node is the primary mode only in response to a user manually asserting physical presence to a trusted platform module of the first compute node.
US09135028B2	Synchronizing launch-configuration information between first and second application environments that are operable on a multi-modal device A method for a multi-modal device for transferring launch information for a panel and first docking bar in a first application environment to a second application environment for a second docking bar in the second application environment includes detecting a docking of the multi-modal device to a hardware module, and displaying a user interface for the second application environment operating on the multi-modal device on the hardware module. The method includes receiving at the second application environment the launch information for launching launchable objects in the first application environment from the second application environment, and parsing, by the second application environment, the launch information to determine a change to the panel or the first docking bar. The change is in the first application environment. The method includes changing the second docking bar to include the change to the panel or the first docking bar based on parsing the launch information.
US09135027B1	Code generation and execution for dynamic programming languages A device may identify a first compiled block with an original constraint and an additional constraint. The first compiled block may be identified based on a program counter value and may include compiled information relating to a first segment of program code, linking information associated with a second compiled block, and information distinguishing the original constraint from the additional constraint. The original constraint may relate to a type of variable used in the first segment of programming code. The additional constraint may relate to a variable used in a second segment of programming code associated with the second compiled block. The device may copy information of the first compiled block to generate a third compiled block that lacks the additional constraint. The device may execute the third compiled block to execute a program associated with the programming code.
US09135019B2	Computer and hardware parameter configuring method thereof A hardware parameter configuring method operating under in an Extensible Firmware Interface-based basic input/output system mode includes reading a currently-existing hardware profile including multiple hardware parameters; reading a preloading hardware profile including multiple hardware parameters; comparing the currently-existing hardware parameters with their corresponding preloading hardware parameters to generate a comparison result; displaying the comparison result through a graphical interface; and loading the preloading hardware parameters to the hardware units to replace the currently-existing hardware parameters when receiving confirmation signal. Moreover, a computer having a central processing unit (CPU) used for implementing the steps including reading a current-existing hardware profile; reading a preloading hardware profile, comparing the currently-existing hardware parameters with their corresponding preloading hardware parameters to generate a comparison result; displaying the comparison result through a graphical interface; and loading the preloading hardware parameters to the hardware units to replace the currently-existing hardware parameters when receiving confirmation signal.
US09135014B2	Data processing system with latency tolerance execution A data processing system comprises a processor unit that includes an instruction decode/issue unit including a re-order buffer having entries that include an execution queue tag that indicates an execution queue location of an instruction to which a re-order buffer entry is assigned, a result valid indicator to indicate that a corresponding instruction has executed with a status bit valid result, and a forward indicator to indicate that the status bit can be forwarded to an execution queue of an instruction pointed to that is waiting to receive the status bit.
US09135011B2	Next branch table for use with a branch predictor A data processing system 2 is provided with branch prediction circuitry 20 for performing branch prediction operations. Next branch table circuitry 22 stores data identifying from a given branch instruction what will be the address of the next branch instruction to be encountered within the program flow. This next branch instruction address is supplied to the branch prediction circuitry 20 which uses it to form its prediction prior to that next branch instruction being identified as such by the instruction decoder 16. This permits branch prediction to commence earlier in the branch prediction circuitry 20 than would otherwise be the case.
US09135009B2	Apparatus and method for compressing instructions and a computer-readable storage media therefor Provided is a technique that is capable of efficiently compressing instructions by inserting instruction compression bits into valid instruction bundles and deleting no operation (NOP) instruction bundles. Accordingly, the number of instructions that can be parallel-processed in a processor may be increased.
US09135008B2	Device and method for performing conditional bitwise set/clear/toggle manipulations in a general purpose register A device and a method for performing bitwise manipulation is provided. Multiple bitwise logic circuits are coupled to an instruction decoder, a register array and a rotator. Each bitwise logic circuit includes input multiplexers connected to an output multiplexer. The instruction decoder receives a bit manipulation instruction and sends to each corresponding input multiplexer a control signal based on a type of the instruction. Each input multiplexer of each bitwise logic circuit receives a control signal, a constant signal that has a value that is indifferent to the value of the mask, and a mask affected signal that has a value that is responsive to a value of an associated mask bit. Each input multiplexer selects between the constant signal and the mask affected signal based on the control signal, and outputs a selected signal. Each output multiplexer receives selected signals from each of the corresponding input multiplexers, and elects between the selected signal based on a value of an associated manipulated register bit and based on a value an associated control register bit.
US09135005B2	History and alignment based cracking for store multiple instructions for optimizing operand store compare penalties Store multiple instructions are managed based on previous execution history and their alignment. At least one store multiple instruction is detected. A flag is determined to be associated with the at least one store multiple instruction. The flag indicates that the at least one store multiple instruction has previously encountered an operand store compare hazard. The at least one store multiple instruction is organized into a set of unit of operations. The set of unit of operations is executed. The executing avoids the operand store compare hazard previously encountered by the at least one store multiple instruction.
US09135002B1	Systems and methods for recovering an application on a computing device A computer-implemented method for recovering an application is described. A priority level is assigned to a process that interacts with the application. A state of the application is monitored. A determination is made that the state of the application is unstable. A first process that is assigned a first priority level is disabled. A determination is made as to whether the state of the application remains unstable.
US09135001B2	Dynamically configuring an integrated development environment In a method for configuring an integrated development environment for programming a type of computer application, a computer receives a selection of a target application runtime program supporting one or more types of computer applications. The computer sends a request for information and receives information on the one or more types of computer applications supported by the target application runtime program. The computer determines, based on the received information, the one or more types of computer applications supported by the target application runtime program. The computer requests and receives a selection of the type of computer application. The computer configures an integrated development environment for programming the type of computer application selected.
US09135000B2	Runtime process diagnostics Content management includes populating a library with modular objects and metadata associated with the modular objects. In response to a query, the library can be searched based in part on the metadata. The query can relate to implementation of an industrial process. One or more modular objects in the library can be identified as satisfying the query. A result of the query can be output and the output can include the identified modular objects and the respective metadata associated with the identified modular objects. The metadata can be anything known about the object that might not be accessible at runtime control.
US09134999B2	System and method for monitoring software development and program flow A system and method for monitoring software development and project flow in the insurance industry using user stories is disclosed. The system and method include a communication interface that receives information included in communications; a processor and memory to: identify from the monitored communication a plurality of user stories; estimate a priority and assign a value to each story; store each story and associated priority and value as a product backlog; calibrate the difference in the assigned value of each story by comparing each story and the associated assigned value, and iteratively adjusting the assigned value based on the calibrated difference; and update the product backlog of user stories and associated calibrated assigned value; and a display device for displaying the status of the software development and project flow based on the stories remaining in the product backlog as compared to the completed user stories.
US09134998B2	Enforcing alignment of approved changes and deployed changes in the software change life-cycle On a host, host content change requests are intercepted in real-time. In a tracking mode, the change requests are logged and allowed to take effect on the host. In an enforcement mode, the change requests are logged and additionally compared against authorized change policies and a determination is made whether to allow the change to take effect or to block the changes, thereby enforcing the authorized change policies on the host. Tracking and enforcement can be done in real-time. In either mode and at any time, the logged changes can be reconciled against a set of approved change orders in order to identify classes of changes, including changes that were deployed but not approved and changes that were approved but not deployed.
US09134997B2	Methods for assessing deliverable product quality and devices thereof A method, non-transitory computer readable medium, and apparatus that quantitatively assesses the impact of a project change request to software quality including determining at least one initial project request defect value based on an initial project request effort value and a defect insertion rate, determining at least one project change request defect value based on a project change request effort value and the defect insertion rate, comparing at least one project change request defect value to at least one initial project request defect value, and providing a quality impact value based on the result of the comparison.
US09134996B2	Updating anti-virus software A method of updating an anti-virus application including an updatable module running on a client terminal. The method includes receiving an update at the client terminal, initializing the updatable module within a sandbox environment and applying the update to the updatable module. Control tests are then run on the updated sandboxed module and if the control tests are passed, the updated module is brought out of the sandbox environment and normal scanning is allowed to proceed using the updated module. If the control tests are not passed, however, normal scanning using the updated module is prevented.
US09134991B2	Automatic upgrade of virtual appliances A software application distributed as a virtual appliance is automatically installed, updated and removed in a virtual machine system running on top of a virtual machine monitor in a computer. The software application virtual appliance comprises a virtual disk, which is automatically detected and installed or removed at the customer by a virtual disk activation manager program, which executes scripts including commands through an API to the virtual machine monitor. The virtual appliance virtual disk is also created automatically by the software manufacturing using the virtual disk activation manager program. The virtual appliance virtual disk stores the binaries of the software application, a software package created by the software manufacturer using a software package tool, an installer to execute the software package, installation and un-installation scripts and a unique identifier which is a signature for the virtual machine virtual disk.
US09134990B2	System and method for implementing a secure client hosted virtualization service layer in an information handling system A client hosted virtualization system (CHVS) has a non-volatile memory that includes BIOS code and virtualization manager code that operates to initialize the CHVS and to launch a virtual machine. The CHVS establishes a secure communication channel with a client update system via a network interface, receives an update to the virtualization manager code, authenticates the update and overwrites the non-volatile memory with the update. The CHVS is configurable to execute the BIOS and not virtualization manager, or to execute the virtualization manager and not the BIOS.
US09134987B2	Retiring target machines by a provisioning server A provisioning server can provide and interact with an eraser agent on target machines. The eraser agent can execute on one or more target machines to erase all the contents of storage on the target machines. In particular, the eraser agent can utilize secure algorithms to alter and obscure the information stored the storage devices of the target machines. The provisioning server can instruct the target machines to alter their power state (e.g. power cycle), if necessary, to provide and to initiate the eraser agent.
US09134981B2	OpenCL compilation Systems and methods for increasing speed and reducing processing power of a compile process of programmable logic of an integrated circuit (IC) are provided. For example, in one embodiment, a method includes obtaining a high level program, comprising computer-readable instructions for implementation on programmable logic of an integrated circuit (IC); translating the high level program into low level code representative of functional components needed to execute functionalities of the high level program; generating a host program comprising computer-readable instructions for implementing the low level code based upon the high level program; obtaining modifications to the high level program; determining whether the modifications can be implemented by a new host program utilizing the low level code; and generating the new host program to implement the modifications, when the modifications can be implemented by the new host program utilizing the low level code.
US09134977B2	Compiler operation for handling conditional statements A computer-implemented method and apparatus for optimizing conditional code by identifying conditional code in a source code, adding a no-operation instruction to an executable code corresponding to the source code in place of the conditional code, adding an entry to a table to pair the no-operation instruction to the conditional code, compiling the conditional code, and storing the compiled conditional code separate from the executable code. A computer-implemented method and apparatus to optimize conditional code by loading an executable code to be executed, checking whether conditional code associated with the executable code is enabled for execution, looking up a location of a no-operation instruction in a table and a location of a compiled conditional code in the table, and replacing the no-operation instruction in the executable code with the compiled conditional code.
US09134975B1	Determining which computer programs are candidates to be recompiled after application of updates to a compiler Source code of a computer program is compiled by a compiler to generate object code. During compilation of the source code, for each function of the source code compiled, an identifier indicating the function can be entered into a module entry point list. An update for the compiler is received. Responsive to receiving the compiler update, a determination is made, by processing the module entry point list, whether any of the functions of the source code were compiled at least one compiler module to be changed by the compiler update. Responsive to determining that at least one of the functions of the source code was compiled by a compiler module to be changed by the compiler update, a determination is made that the source code of the computer program is a candidate to be recompiled with an updated version of the compiler having the compiler update applied.
US09134973B2	Dynamic compiling and loading at runtime A compiler is loaded by a computing device using an evaluation function that is included in a program in a compiled form. The evaluation function causes the compiler to compile source code for the program, wherein the source code includes new instructions that are uncompiled, and wherein compiling the source code generates compiled code that includes the new instructions. The evaluation function loads the compiled code into memory, retrieves the new instructions, and executes the new instructions. The evaluation function may perform these operations during runtime of the program that includes the evaluation function.

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