最新美国发明专利第2015-05-26期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09041737B2	Display navigation using navigation controls Navigating on a display includes tracking motion of an input tool on a display, comparing a motion of the input tool to a threshold, and changing a position of the visible portion of a page of information on the display if the input tool motion exceeds the threshold. The position of the visible portion of the page of information on the display is constrained if the motion does not exceed the threshold.
US09041735B2	Image display device and method of managing content using the same A method of managing content using an image display device includes reproducing and displaying first content in a first region of a screen of the image display device, displaying a first image representing a first mobile terminal connected to and communicating with the image display device and a second image representing second content stored in the first mobile terminal in a second region of the screen, receiving a first user command for selecting the second image, displaying a third image representing a device which will reproduce, store or receive the second content in a third region of the screen, receiving a second user command for selecting the device which will reproduce, store or receive the second content, and enabling the selected device to reproduce, store or receive the second content according to the second command.
US09041733B2	Methods for adjusting a presentation of graphical data displayed on a graphical user interface Methods and systems for adjusting graphical data displayed on a graphical user interface (GUI) of an electronic device are disclosed. The method may include monitoring movement of the electronic device and identifying a predetermined movement of the electronic device. The method may further include overlaying new graphical data to existing graphical data displayed on the GUI in response to the predetermined movement.
US09041729B1	Graphical design tool A set of graphical data is stored, the set of graphical data including a first representation of an image in each of a first format and a second format. A set of processes that are organized according to a specified order is stored. The processes are applied, in the specified order, to the graphical data, thereby generating a second representation of the image in each of the first format and the second format.
US09041727B2	User interface tools for selectively applying effects to image Some embodiments provide an image editing application that edits an image. The image editing application assigns a mask value to each pixel of the image that includes several pixels. The mask value for a pixel is for using when processing the pixel. The image editing application displays the image in a display area. The image editing application receives several user inputs on a set of pixels of the image. The image editing application incrementally applies an image processing operation to the set of pixels by changing the mask values for the set of pixels each time the set of pixels receives a user input.
US09041726B2	Analyzing large data sets using digital images Approaches for analyzing large data sets using a digital image. A hardware or software component may arrange values of one or more data sets into a table. Each cell of the table may comprise a set of values from the one or more data sets. After mapping each cell of the table to a particular color, a digital image is generated based on the mapping of values in each of the cells of the table to color. The digital image may identify the minimum value and the maximum value of the one or more data sets. An analytical operation on the digital image may be performed by deriving values represented by the colors associated with the pixels of the digital image using the minimum value and the maximum value. The digital image enables data analysis on the data represented by the digital image in an expeditious and intuitive manner.
US09041724B2	Methods and apparatus for color rendering Methods and apparatus for rendering colors in displays, such as adjustable interferometric modulation displays can produce many colors with different sub-sets of primary colors. Received colors to be rendered are analyzed to determine when the colors to be rendered are within a predefined neutral region of a color space. Temporal primary colors may be generated to be used for rendering the received colors in a color space that are generated by temporal modulation using at least two temporal subframes to mix first and second primary colors of a display, such as white and black primaries. The temporal primary colors are used when rendering colors that lie within the predefined neutral region of the color space. When white and black primaries are used for temporal modulation, the produced grayscale temporal primaries are more robust than using two complementary colors, affording more robust neutral and near neutral colors.
US09041723B2	Method of and apparatus for encoding and decoding data Each block of texture data elements is encoded as a block of texture data that includes a set of integer values to be used to generate a set of base data values for the block, and a set of index values indicating how to use the base data values to generate data values for the texture data elements that the block represents. The integer values and the index values are both encoded in an encoded texture data block using a combination of base-n values, where n is greater than two, and base-2 values. Predefined bit representations are used to represent plural base-n values (n>2) collectively, and the bits of the bit representations representing the base-n values are interleaved with bits representing the base-2 values in the encoded texture data block.
US09041722B2	Updating background texture for virtual viewpoint animations Image data of an event is provided by updating a textured 3d model of the event. For example, in a sporting event, a model of a stadium can be periodically updated to reflect changes over time in lighting, advertisements, number of spectators in the stands and so forth. Different virtual viewpoints of the event can be depicted in an animation using the textured 3d model and image data from objects at the event such as participants in the sporting event. The same image from which object data is obtained can also be used to update the textured 3d model so that the model is current in the animation, resulting in greater realism. The updating can be based on an operator command or automatic detection of a specified event, such as change in lighting or passage of time. The animation can be provided in a broadcast television signal.
US09041718B2	System and method for generating bilinear spatiotemporal basis models Techniques are disclosed for generating a bilinear spatiotemporal basis model. A method includes the steps of predefining a trajectory basis for the bilinear spatiotemporal basis model, receiving three-dimensional spatiotemporal data for a training sequence, estimating a shape basis for the bilinear spatiotemporal basis model using the three-dimensional spatiotemporal data, and computing coefficients for the bilinear spatiotemporal basis model using the trajectory basis and the shape basis.
US09041716B2	Multivalue bar graph displays and methods of implementing same A display for showing indicia in the form of a bar graph is provided. The display is configured so that each bar of the bar graph depicts a numerical or other quantitative value of a parameter. Each bar is provided with one or more additional indicia representative of numerical values that are related to the numerical values represented by the bar(s) shown in the bar graph. Each of the one or more additional indicia is positioned to as to be superimposed over the respective bar to which the additional indicia correspond, and depict the relationship(s) between the value represented by the bar and the value represented by the one or more additional indicia.
US09041715B2	Method, system and computer program for obtaining the transformation of an image The invention relates to a system for obtaining the transformation (30) of an image, said system comprising means for capturing or introducing a image proportions; means for capturing or introducing a width of the transformation; means for capturing or introducing a height of the virtual representation of the image; means for establishing or introducing coordinate axes at the point on the surface, onto which the viewing point is orthogonally projected; and comprising a computer equipped with a program for obtaining: a first transformation angle (α) from two parameters: the distance between the point on the surface onto which the viewing point is projected and the upper end furthest from the transformation; and the distance corresponding to the coordinate of the upper end furthest from the transformation in relation to said viewing point, and the distance corresponding to the coordinate of the upper end furthest from the transformation in relation to the viewing point; a lateral transformation longitude (L3) from the first transformation angle and the transformation width; a longitude (L4) of the transformation (30) from the captured proportions and height of the virtual representation; a second transformation angle (λ) from two parameters: the distance between the point on the surface onto which the viewing point is projected and the lower end closest to the transformation; and the distance corresponding to the coordinate of the lower end closest to the transformation.
US09041707B2	Confirming compliance with a configuration Confirming compliance with a configuration includes: receiving information about a fixture, where the information includes a specified configuration of items to be displayed on the fixture; generating a display using the information, where the display depicts the specified configuration; presenting the display using a graphics system of a computing device; receiving an image depicting an actual configuration of the fixture; associating metadata with the image, where the metadata includes searchable data that distinguishes the fixture from at least some other fixtures of like type; sending the image, along with the metadata, over a network to a server that is remote from the computing device; and in a case that the specified configuration substantially matches the actual configuration, sending, along with the image and the metadata, a message indicating that the fixture is in compliance with the specified configuration.
US09041705B2	Organic light emitting display device An organic light emitting display device includes a panel driver and a display panel including a plurality of pixels having a pixel circuit, a first driving voltage terminal connected to the driving transistor, a light emitting element, a second driving voltage terminal connected to the light emitting element, and a capacitor connected between a gate and source electrode of the driving transistor, the panel driver to drive the pixel circuit in a data charging period in which a difference between a data and reference voltage is charged into the capacitor, and a light emitting period in which the driving transistor receives a first driving voltage from the first driving voltage terminal and is turned on according to the voltage charged into the capacitor during the data charging period, whereby a current is supplied to the light emitting element which thereby emits light.
US09041704B2	Pixel and organic light emitting display using the same A pixel circuit for an organic light emitting diode (OLED) display is disclosed. One inventive aspect includes an organic light emitting diode, a first transistor, a second transistor, a first capacitor connected to a second node and a fixed voltage source, a third transistor, a fourth transistor, a second capacitor connected to the fourth transistor and a third node, a first control transistor and a second control transistor. The fourth transistor is connected to the first and third nodes and is turned off when an emission control signal is supplied to an emission control line and turned on otherwise. The first control transistor is connected to the third node and the first power source and is turned on when a first control signal is supplied.
US09041703B2	Source driver A source driver applied in a liquid crystal display is disclosed. The source driver at least includes a first pair of channels, a second pair of channels, two P-type digital/analog converting modules, two N-type digital/analog converting modules, two multiplexers, two polarization multiplexers, and four amplifying and buffer modules. The first pair of channels includes a first channel and a second channel which are adjacent, and the second pair of channels includes a third channel and a four channel which are adjacent. The two P-type digital/analog converting modules correspond to a first set of gamma values, and the two N-type digital/analog converting modules correspond to a second set of gamma values. The first pair of channels shares the two P-type digital/analog converting modules and the second pair of channels shares the two N-type digital/analog converting modules to save the used chip area.
US09041701B2	Electronic apparatus, electronic apparatus controlling method, and computer program product According to one embodiment, an electronic apparatus includes: a presence determining module configured to determine at an interval whether a user is present based on image data output by a camera; a display power controller configured to turn on a display when the user is present and to turn off the display when the user is not present, based on a result of the presence determining module; and a detection interval controller configured to control the interval such that the interval is shorter when the display is off compared to when the display is on and the user is determined to be present.
US09041698B2	Wave guide for improving light sensor angular response Electronic displays encounter visibility issues due to varying ambient light conditions. An ambient light sensor can be provided to sense ambient light and dynamically adjust display brightness to compensate for changes in ambient light. A wave guide for improving angular response in a light sensor is provided.
US09041696B2	Display device A display device includes: a flexible display panel having a display area variably exposed in a first direction and including a conductive pattern; a sensing pattern positioned to correspond to the conductive pattern in the first direction; and a controller sensing a current flowing to one of the conductive pattern and the sensing pattern to display an image corresponding to the display area of the flexible display panel in the flexible display panel.
US09041694B2	Overdriving with memory-in-pixel Within one gate selection time interval: first pixel information is driven from a source line to a liquid crystal LC element of a pixel; and second pixel information is driven from the source line to a memory element of the pixel; and the second pixel information is driven from the memory element of the pixel to the LC element of the pixel. Respecting a second pixel, similar occurs for third and fourth pixel information within a second gate selection time interval, such that the second pixel information is driven from the memory element of the first pixel to the LC element of the first pixel simultaneous with the third pixel information being driven from the source line to the LC element of the second pixel. Such simultaneous driving enables a faster refresh rate and/or larger displays. Various circuit-specific implementations are shown.
US09041693B2	Scan driver and organic light emitting display using the scan driver A scan driver includes a plurality of stages for receiving a first start signal and a second start signal, a first clock signal and a second clock signal, and at least one of two interrupt signals and outputting a scan signal. Each stage includes an up-signal output unit for receiving the first start signal and for outputting a first output signal that is shifted by one horizontal period from the first start signal, a down-signal output unit for receiving a second start signal and outputting a second output signal shifted by one horizontal period from the second start signal, and a scan signal output unit for receiving the first and second output signals and outputting a high-level or low-level scan signal.
US09041688B2	Optical detection system and program An optical detection system includes a detection part that detects object information as information of an object based on a light reception result of reflected light by reflection of irradiation light on the object, and a processing part that performs processing based on the object information, and the processing part acquires reflectance information of the object as the object information and performs processing of a command designated by the object based on the acquired reflectance information.
US09041685B2	Distributed blanking for touch optimization Embodiments of the invention generally provide an input device with display screens that periodically update (refresh) the screen by selectively driving common electrodes corresponding to pixels in a display line. In general, the input devices drive each electrode until each display line (and each pixel) of a display frame is updated. In addition to updating the display, the input device may perform capacitive sensing using the display screen as a proximity sensing area. To do this, the input device may interleave periods of capacitive sensing between periods of updating the display based on a display frame. For example, the input device may update the first half of display lines of the display screen, pause display updating, perform capacitive sensing, and finish updating the rest of the display lines. Further still, the input device may use common electrodes for both updating the display and performing capacitive sensing.
US09041683B2	Electrostatic capacity type touch sensor The invention provides an electrostatic capacity type touch sensor that is not influenced by a parasitic capacitor formed between a sensor line connected to a touch sensor pad and other signal line and provides a stable sensor output. A sensor line connected to a touch sensor pad is connected to a non-inverting input terminal (+) of a charge amplifier. An LED is disposed in the touch sensor pad, and the cathode of the LED is connected to an LED signal line. Since the LED signal line is disposed adjacent to the sensor line, a parasitic capacitor is formed between the LED signal line and the sensor line. In order to keep the capacitance of this parasitic capacitor constant, a pull-up resistor is connected to the LED signal line. The LED signal line is biased to a power supply potential Vdd by the pull-up resistor.
US09041681B2	Onscreen function execution method for mobile terminal having a touchscreen An onscreen function execution method for a mobile terminal having a touchscreen is provided. The method allows for executing functions of an activated application by a tap on a specific area of the touchscreen. An onscreen function execution method of the present invention includes mapping active regions of the touchscreen to functions of at least one application, displaying an application screen in response to an application activation command and executing, if a tap is detected on one of the active regions, a function mapped to the application activation command. The active regions may include a function execution display region and the applications may comprise a camera application, a music player application, an idle mode screen application and the like. The method allows a user to execute functions of an activated application by tap on the touchscreen.
US09041674B2	Method for operating a control system for a vehicle and control system for a vehicle A method for operating an operator control system having a graphical display unit and a touch-sensitive interface, wherein coordinates from information presented on the display unit are associated with coordinates of the touch-sensitive interface. Also disclosed is an operator control system for a vehicle having a graphical display unit that presents a piece of information for a user; a touch-sensitive interface that detects a touch by the user; and a control unit coupled to the display unit and the touch-sensitive interface, the control unit controlling presentation of at least one operator control panel on the display unit.
US09041673B2	Method of controlling noise processing circuit of touch panel and related noise processing apparatus The present invention provides a method of controlling a noise processing circuit of a touch panel and a related noise signal processing apparatus. At first, the present invention detects whether the touch panel is interfered with by noise. Then, according to whether the noise interferes with the touch panel, the noise processing circuit is controlled to be activated or not activated. Therefore, the noise processing circuit can be turned off if it is unnecessary, thereby to reduce the workload due to the noise processing.
US09041672B2	Methods and devices for flipping pages of electronic data and electronic apparatuses using the same A method and device for flipping pages of electronic data and an electronic apparatus using the same are provided. According to the method, a touched position is detected when the touch panel is touched. The number of pages of electronic data to be flipped is determined according to the touched position. According to the method and device for flipping pages of electronic data and the electronic apparatus, users can achieve the page flipping with different numbers of pages to be flipped by performing the touch operation once.
US09041670B2	Operation control apparatus and operation control method for external apparatus connected to vehicle-mounted apparatus There are provided an operation determining unit which, when a touch panel is pressed, determines whether or not the press on the touch panel has been an operation on a soft key for designating one of the plurality of functions assigned to the one hard key, and a state transition unit which, when it is determined that the press corresponds to an operation on the soft key, shifts a function acceptability state of the one hard key. Thus, when the soft key corresponding to the hard key is pressed, the function acceptability state of the hard key is shifted to a correct state, even without actually operating one hard key.
US09041667B2	Electronic device and method of control of displays A method includes displaying information in a display area of a first display of an electronic device, detecting a low-power condition for the electronic device, in response to detecting the low-power condition, discontinuing displaying information in the display area of the first display, and displaying information on a second display, which information is visible through the non-display area of the first display.
US09041665B2	Devices and processes for data input Devices are disclosed for inputting data to a touch sensitive user interface, which devices comprise a base operative to affix to the user interface, a button having an outer touch surface and an inner surface operative to engage the user interface to convey a data input signal thereto in response to presence of a user's finger at the outer touch surface of the button, and an arm connecting the button to the base; processes for data input are also disclosed.
US09041664B2	Moving an object by drag operation on a touch panel A contact state of a finger with respect to an object displayed on a first layer is detected. The object is moved onto a second layer and displayed on the second layer in response to detecting that the finger has moved from the contact state to a proximity state with respect to the object and in response to the finger reaching a second layer displayed nearer than the first layer.
US09041661B2	Cover for an electronic device A cover configured to overlie a touch screen of an electronic device the cover including an output portion configured to enable content presented on the touch screen to be visible to a user through the cover; and the cover including a plurality of distinct input portions each sharing a physical characteristic that demarcates each of the plurality of distinct input portions as an input portion, wherein each of the plurality of distinct input portions is configured to enable one of a plurality of touch sensitive areas of the touch screen to be actuated.
US09041657B2	Ergonomic keyboard An ergonomic keyboard is described. In one aspect, a keyboard layout for a subject language is developed by determining a percent of frequency of monograph characters and digraphs of characters used in writing in the subject language. Thereafter, each key for the characters from each most frequent digraph is positioned under different hands on the keyboard layout, on a middle row of the keyboard layout, and under the index or middle fingers of a keyboard user. Other most frequent characters are positioned in the middle row of the keyboard layout or in a position on the keyboard layout to be struck using the index or middle fingers. The least frequent monograph characters are positioned in the bottom and top rows of the keyboard, with the least frequent characters under pinky fingers of a keyboard user. An optimized Arabic keyboard layout is also disclosed.
US09041651B2	Multi-touch mouse A multi-touch mouse includes a mouse body, a touch pad, and a controlling unit. In a case that the touch pad is not touched and the touch state is OFF, the multi-touch mouse is in a conventional two-dimensional mouse mode. In a case that the touch state of the touch pad is ON in response to a touch action and the mouse body is moved, the controlling unit switches the control mode of the multi-touch mouse to a touch gesture control mode and generates a touch gesture command.
US09041650B2	Using measurement of lateral force for a tracking input device Systems and methods for using measurements of a lateral force applied to a motion-based input device are disclosed. The input device has a force detection module operable to detect lateral forces applied to the input device and generate force data representative of the applied lateral forces. The system also includes a processor coupled to the force detection module. The processor is operable to initiate an event based upon the force data.
US09041649B2	Coordinate determination apparatus, coordinate determination method, and coordinate determination program To switch a coordinate mode by automatically recognizing a coordinate mode more usable for a user performing a natural operation, a coordinate determination apparatus (200) according to the present invention includes: an obtain and store unit (204) which obtains coordinate information from a coordinate input device (201) and stores the coordinate information onto a recording medium; a time correlation specifying unit (320) which specifies a correlation between times of input indicated by first and second coordinate information; a coordinate correlation specifying unit (324) which specifies input coordinates indicated by the second and third coordinate information; a coordinate mode selection unit (326) which selects the coordinate mode based on a coordinate correlation value and a time correlation value; and a coordinate transform unit (328) which transforms the input coordinates indicated by the second coordinate information into coordinates selected according to the coordinate mode.
US09041646B2	Information processing system, information processing system control method, information processing apparatus, and storage medium An information processing system determines a relationship between an observer and an observation target person based on personal information of the observer and personal information of the observation target person, and displays content information generated based on the determined relationship together with an image of the observation target person in a display area of a display unit.
US09041641B2	Liquid crystal display device, driving control circuit and driving method used in same A liquid crystal display device is provided which improves quality of images made up of moving images and images having moving images and still images in a mixed manner. Each frame of an input video signal having a specified frame frequency (60 Hz) is divided into four sub-frames each having a frequency being four times as large as the specified frame frequency and, after an overdriving operation is performed in the first sub-frame on each pixel region of a liquid crystal display panel, a normal driving operation is performed in the second sub-frame and thereafter, and in which a backlight flashes two times at a frequency being two times as large as a frame frequency (120 Hz) of the first frame frequency during one frame period in specified time intervals.
US09041637B2	Display device including switching elements and method for driving the display device A display device includes: a gate line transmitting a gate line; a data line transmitting a data voltage; a first switching element and a second switching element connected to the gate line and the data line; a third switching element connected between the second switching element and a terminal providing a first reference voltage signal; a first liquid crystal capacitor connected to the first switching element; and a second liquid crystal capacitor connected to the second switching element, wherein the third switching element includes a first control terminal connected to the gate line and a second control terminal connected to a terminal providing a second reference voltage signal. The second and third switching elements are operated to form a voltage dividing network having a respective voltage dividing ratio.
US09041636B2	Liquid crystal display device and drive method therefor A liquid crystal display devices (1a, 1b) each include a touch panel (2), a liquid crystal panel (3), a touch panel controller (4), a liquid crystal driving controller (timing generator) (5), oscillation circuits (7a, 7b), a correcting circuit (10), and a frequency counter (11). The frequency counter (11) counts a reference clock signal CLK supplied from the oscillation circuit (7a) or (7b). The correcting circuit (10) determines, in accordance with information supplied from the frequency counter (11), whether or not a frequency of the reference clock signal CLK is a predetermined frequency. In a case where the frequency of the reference clock signal CLK is not the predetermined frequency, the correcting circuit (10) corrects (i) a frequency at which the liquid crystal panel (3) is driven or (ii) a frequency at which sensing of the touch panel (2) is carried out.
US09041633B2	Organic light emitting display device An organic light emitting display device includes a display unit having pixels located at crossing regions of scan, control, data and sensing lines. Scan, control line, and data drivers respectively supply scan, control, and data signals to the scan, control, and data lines. A switching unit selectively couples the data lines to output lines of the data driver, a reference voltage source, or a negative bias voltage source. A sensing unit senses degradation information of an organic light emitting diode in the pixels and threshold voltage of a driving transistor in the pixels through the sensing lines. A control block stores the sensed degradation information and threshold voltage information. A timing controller is configured to generate a second data by converting an externally inputted first data using the degradation information and the threshold voltage information, and supply the second data to the data driver.
US09041631B2	Display device, method for driving the same, and electronic device A display device, a method for driving the same, and an electronic device capable of making μ correction function reliably even in the case where light emission luminance is low. A potential difference between the gate and the source of a transistor is corrected to a threshold voltage of the transistor. After that, while a horizontal drive circuit outputs a third voltage Vofs2, correction of mobility of the transistor starts. Subsequently, while the horizontal drive circuit outputs a second voltage Vsig, writing of a voltage according to the second voltage Vsig to the gate of the transistor is started.
US09041628B2	EL display device and electronic apparatus to compensate back-gate effect on light-emitting unit drive transistor A display device includes: a plurality of light-emitting elements, each light-emitting element having a light-emitting unit and a driving circuit for driving the light-emitting unit. The driving circuit at least includes (A) a drive transistor having source/drain regions, a channel forming region, and a gate electrode, (B) a video signal write transistor having source/drain regions, a channel forming region, and a gate electrode, and (C) a capacitive unit. In the drive transistor, (A-1) one of the source/drain regions is connected to the corresponding current supply line, (A-2) the other region of the source/drain regions is connected to the light-emitting unit and connected to one end of the capacitive unit, and forms a second node, and (A-3) the gate electrode is connected to the other region of the source/drain regions of the video signal write transistor and connected to the other end of the capacitive unit, and forms a first node.
US09041623B2	Total field of view classification for head-mounted display Virtual images are located for display in a head-mounted display (HMD) to provide an augment reality view to an HMD wearer. Sensor data may be collected from on-board sensors provided on an HMD. Additionally, other day may be collected from external sources. Based on the collected sensor data and other data, the position and rotation of the HMD wearer's head relative to the HMD wearer's body and surrounding environment may be determined. After resolving the HMD wearer's head position, the HMD wearer's total field of view (TFOV) may be classified into regions. Virtual images may then be located in the classified TFOV regions to locate the virtual images relative to the HMD wearer's body and surrounding environment.
US09041621B2	Apparatus and method for implementing haptic-based networked virtual environment which supports high-resolution tiled display An apparatus and method of implementing haptic-based networked virtual environments supporting high-resolution tiled displays. A haptic rendering process of detecting collision between a user of a haptic-device over a virtual environment and each of at least one virtual object and providing a physical force corresponding to a detection result to the haptic-device is performed, and a graphic rendering process of converting each virtual object represented as 3-D data into an object stream represented as 2-D data such that each virtual object is displayed as a 2-D image, and assigning a priority and a frame rate to each converted object stream according to a preset assignment criterion is performed. A plurality of displays provide a display image, including object streams of the virtual objects and background pixels, so that a virtual environment allowing the user of the haptic-device to visually and tactilely immerse thereto is effectively realized by utilizing limited resources.
US09041613B1	High gain dish antenna with a tapered slot feed A broadband antenna can include a parabolic dish having a diameter D and a radius of curvature that establishes a focal point for the parabolic dish. A tapered slot feed having a feed point can be positioned above the parabolic dish so that its effective radiation point is spaced a distance F from the center of the dish, where F is the focal length of the dish. With this configuration, feed point for the tapered slot feed can be coincident with parabolic dish focal point. The tapered slot feed can include two elements that form an exponentially tapered slot, which establishes a phase center for the tapered slot feed. A conductive bar can interconnect the two elements, in order to minimize the phase center variation during broadband operation.
US09041612B2	Localized wave generation via modal decomposition of a pulse by a wave launcher Implementations for exciting two or more modes via modal decomposition of a pulse by a wave launcher are generally disclosed.
US09041599B2	Radar receiver, and radar device equipped with same There is provided a radar receiver that effectively prevents local oscillator signals from leaking out from an antenna. A receiver 21 includes a local oscillator 5, a mixer 6, a buffer amplifier 11, and a mode switcher 16. The local oscillator 5 outputs a local oscillation signal LO. The mixer 6 mixes a high-frequency signal RF received by a radar antenna 2 with the local oscillation signal LO. The buffer amplifier 11 is disposed between the local oscillator 5 and the mixer 6. The mode switcher 16 switches at least between a standby mode in which power is supplied to the local oscillator 5 and no power is supplied to the buffer amplifier 11 and a reception mode in which power is supplied to both the local oscillator 5 and the buffer amplifier 11.
US09041595B2	Determining the location of a load for a tower crane A tower crane load location determiner is disclosed. One example includes a load location measurer to provide load location measurement information for a load coupled with a tower crane. In addition, a load position determiner utilizes the load location measurement information to determine a location of the load. A user accessible load location provider provides the determined location of the load.
US09041593B2	Target tracking apparatus, storage medium stored a target tracking program, target tracking system, and target tracking method According to one embodiment, a target tracking apparatus acquires a first determination result by determining which combination of N-dimensional tracks is for the real target, acquires a second determination result by determining which combination of N-dimensional angular observation values is for the real target, selects the first determination result when an observation environment is an environment other than a dense environment, selects the second determination result when the observation environment is a dense environment, and calculates distance information to thereby generate an (N+1)-dimensional track for each target.
US09041587B2	Apparatus and method for assisting vertical takeoff vehicles According to one aspect of the present invention, a radar system is provided which accurately measures the surface profile in a wide sector beneath and forward of a helicopter, to aid low level transit and landing in poor visibility. This uses an electronic beam synthesis technique to form multiple beams directed at the area of interest, each measuring the distance to the first reflected signal received by each beam. These distances represent the profile of the ground and any objects on the ground. A processor then compares the measured profile with the ideal ground profile for safe landing. If the deviations from straight and level exceed the specified requirement for safe landing, or if sufficient rotor clearance is not detected, then a warning is given to the operator. A display will show the measured ground profile highlighting the unsafe regions, allowing the operator to seek a safe region to land. The novelty lies in the way the beams are formed to measure and display the ground profile and provide a warning system. This beam-forming technique is simpler and more cost effective than with a conventional phased array radar.
US09041586B2	Vectorization approach to isolating local maxima in an N-dimensional dataset Identification of maximum power scatters in an N-dimensional dataset generally requires two basic steps. The first step is to identify the max power scatters of the dataset and the second step removes neighboring power scatters (e.g., “hits”) of lower power. Current naïve approaches utilize an inefficient and computationally intensive brute force implementation which requires multiple comparisons of each initial “hit” power to all “hits” of lesser power. Such brute force implementations require 2×N×(M−1)! comparisons, where N is the number of dimensions and M is the number of “hits.” Embodiments of the present disclosure utilize vectorization to identify a plurality of neighboring hits for each max power scatter and removes the neighboring hits of lesser power that are within a predetermined isolation region. Advantageously, embodiments of the present invention perform M−1 comparisons.
US09041584B2	Dual-path comparator and method A method includes receiving a differential voltage signal at first and second inputs of a comparator and selectively providing the differential voltage signal to one of a first conversion path and a second conversion path of the comparator during a conversion phase to determine a digital value corresponding to the differential voltage signal. The first and second conversion paths including first and second pluralities of gain stages, respectively. The method further includes coupling the selected one of the first conversion path and the second conversion path to an output to provide the digital value.
US09041582B2	Organism state quantity measuring apparatus An apparatus including a detecting unit that detects information indicating a state of an organism from the organism or an organism specimen extracted from the organism and outputs the detected information as a current, a current-voltage conversion circuit that converts the current output from the detecting unit into a voltage, a double-integration-type A/D conversion circuit having an integration capacitor that is charged based on a voltage output from the current-voltage conversion circuit and is thereafter discharged, and a counter that measures a charge time during which the integration capacitor is charged and a discharge time during which the integration capacitor is discharged, the A/D conversion circuit converting into digital quantities the charge time and the discharge time measured by the counter, and outputting the digital quantities, and an information processing unit that calculates a state quantity of the organism based on the digital quantities output from the A/D conversion circuit.
US09041577B2	Digital-to-analogue converter The invention relates to digital-to-analog converters for converting current. The converter includes a pair of differential branches with two transistors controlled by a digital register activated at a clock frequency, and two resistive loads receiving the currents of the differential branches to produce a differential electrical signal representing the analog result of the conversion. The converter includes a dual switching circuit for the currents of the differential branches: a first switching circuit enables the transmission of the currents of the differential branches toward the loads for 70% to 95% of the clock period and shunts these currents outside the loads for the rest of the time; a second switching circuit alternately and symmetrically makes a direct link followed by a cross link between the differential branches and the loads. The converter provides a signal with high spectral purity and can work with a good level of power in the four Nyquist zones of the spectrum of the output analog signal, and notably in the second and third zones.
US09041574B2	Input converter for a hearing aid and signal conversion method In order to minimize noise and current consumption in a hearing aid, an input converter including a first voltage transformer and an analog-to-digital converter of the delta-sigma type for a hearing aid is devised. The analog-to-digital converter of the input converter has an input stage, an output stage, and a feedback loop, and the input stage includes an amplifier (QA) and an integrator (RLF). The first voltage transformer (IT) has a transformation ratio such that it provides an output voltage larger than the input voltage and is placed in the input converter upstream of the input stage. A second voltage transformer (OT) having a transformation ratio such that it provides an output voltage larger than the input voltage, is optionally placed in the feedback loop of the converter. The voltage transformers (IT, OT) are switched-capacitor voltage transformers, each transformer (IT, OT) having at least two capacitors (Ca, Cb, Cc, Cd). The invention further provides a method of converting an analog signal.
US09041573B2	Sampling device with buffer circuit for high-speed ADCs A sampling and interleaving stage device for use in an analog-digital-converter and for providing a sampling output signal and an analog-to-digital-converter. The sampling and interleaving stage device for use in an analog-digital-converter, including: a receiving unit having a clock unit with a plurality of clock-driven switches for receiving an input signal; for each of the plurality of clock-driven switches, a first demultiplexer, for receiving the input signal via a clock-driven switch and for providing a number of first demultiplexer outputs; for a first demultiplexer output, at least one storage element for a stored input potential depending on the input signal; and an output demultiplexer for receiving an indication about the stored input potential and for outputting a corresponding sampling output signal to a respective sampling output.
US09041569B2	Method and apparatus for calibration of successive approximation register analog-to-digital converters A successive approximation register (SAR) ADC includes an SAR comparator circuit including first and second inputs, a control input, and first and second outputs. The SAR comparator circuit further includes a plurality of capacitors coupled to the first and second inputs and includes a plurality of switches configured to couple the plurality of capacitors to one of a first voltage and a second voltage. The SAR ADC further includes a calibration circuit coupled to the first and second outputs and to the control input of the SAR comparator. The calibration circuit is configured to control the plurality of switches to selectively couple the plurality of capacitors to one of the first and second voltages to provide a calibration signal to the SAR comparator circuit. The calibration circuit is configured to calibrate the SAR comparator based on corresponding output signals at the first and second outputs.
US09041566B2	Lossless compression of the enumeration space of founder line crosses Various embodiments provide lossless compression of an enumeration space for genetic founder lines. In one embodiment, an input comprising a set of genetic founder lines and a maximum number of generations G is obtained. A set of genetic crossing templates of a height h is generated. A determination is made if at least a first genetic crossing template in the set of genetic crossing templates is redundant with respect to a second genetic crossing template in the set of genetic crossing templates. Based on the at least first genetic crossing template being redundant is redundant with respect to the second genetic crossing template, the at least first genetic crossing template is removed from the set of genetic crossing templates. This process of removing the at least first genetic crossing template from the set of genetic crossing templates the redundant creates an updated set of genetic crossing templates.
US09041565B2	NRZ signal amplifying device and method, and error rate measurement device and method To set an optimum offset voltage and detect an NRZ signal with a very small amplitude. An NRZ signal amplifying device 2 includes: input-side voltage detection means 13 for detecting a high-level voltage and a low-level voltage of an input signal to the main amplifier 12; output-side voltage detection means 14 for detecting the two signals inverted relative to each other; and offset voltage control means 15 for calculating a center voltage between the detected high-level voltage and low-level voltage, setting an offset voltage at which the center voltage is the center of an appropriate input range of the main amplifier 12 to the offset circuit 11, and finely adjusting the offset voltage, such that a voltage difference between the detected two signals inverted relative to each other and a polarity change point is close to 0.
US09041560B2	System and method of displaying a runway temporarily displaced threshold and an aircraft landing aiming point A system and method are described for receiving a NOTAM and storing information relating to the distance of a temporarily displaced threshold for a runway. When that runway is selected for approach and landing, the temporarily displaced threshold and new aiming point are automatically displayed. The change made to the display using NOTAM data can be indicated to the pilot by distinct symbology or particular color, or by using an icon or an annunciation.
US09041555B2	Devices, systems and methods for reinforcing a traffic control assembly Reinforcement devices and systems for holding a traffic control assembly in compression are provided. The traffic control assembly includes a traffic signal disconnect hanger and/or a traffic signal and a first span wire positioned above the traffic control assembly. In some embodiments, the reinforcement device includes an upper support device connected to the first span wire where the upper support device has a length that is greater than a width of the traffic control assembly and the upper support device is configured to spread the load of the traffic signal assembly to the first span wire. The reinforcement device includes a lower support device operably connected to the traffic signal, a first vertical support member, and a second vertical support member where the first and second vertical members are tensioned when the upper support device, the lower support device and the first and second vertical support members are connected together.
US09041550B2	Time diversified packet protocol A method of reporting information from a meter interface unit to a receiving device in which a data packet is transferred from the meter interface unit containing meter readings, which are associated with an indicator of the elapsed time since the reading was taken. The receiving device compares this elapsed time value with the actual elapsed time, based upon the internal clock of the receiving device, in order to determine any inaccuracies in the clock of the meter interface unit. In another embodiment, the data packet includes at least two nonsequential meter readings, separated by a multiplicity of reading intervals, on a rolling basis, such that data will not be lost as a result of a temporary obstruction that interferes with the transmission or receipt of meter readings.
US09041548B2	Battery-powered fuel data collection unit A battery-powered fueling data collection unit for use with a meter and a register associated with a fuel transfer apparatus and for use with a system for managing fueling transactions of a fleet operator using fuel transfer apparatuses at multiple locations includes a fueling data interface module for receiving fueling information from the fueling meter and/or register and an internal battery power source. A processor is provided for monitoring the power level in the battery and for detecting if the power level in the battery drops below a threshold amount. Also, a communications module is provided for wirelessly forwarding an alert to a remote computer to alert the remote computer that the battery power is low.
US09041544B2	Power outage detection A network device receives notification configuration information that includes a time interval criteria and a selected geographical area for providing power outage notifications. The network device receives, during a particular time interval, a loss-of-power alarm from a network interface device (NID) associated with a customer premises. The loss-of-power alarm includes a particular NID identifier. The network device retrieves, from a database, customer configuration information that associates the particular NID identifier with a particular address and identifies a power outage in a particular region associated with the particular address. The identifying is based on receiving the loss-of-power alarm and determining if other loss-of-power alarms have been received from other NIDs in the same region and within the particular time interval.
US09041541B2	Monitoring or feedback systems and methods The present invention generally relates to systems and methods for monitoring and/or providing feedback for drugs or other pharmaceuticals taken by a subject. In one aspect, the present invention is directed to devices and methods for determining a species within the skin of a subject; and producing feedback to a subject based on the determination of the species. The feedback may be, for example, visual, audible, tactile, a change in temperature, etc. In some cases, information regarding the determination of the species may be transmitted to another entity, e.g., a health care provider, a computer, a relative, etc., which may then provide feedback to the subject in some fashion. In some cases, the feedback may be directly indicative of the species, e.g., whether the species is present, the concentration of the species, whether a by-product of a reaction involving the species is present, whether a compound affected by the species is present, etc. However, the feedback may also be indirect in some embodiments. For example, the subject may be presented with an external reward, e.g., based on the determination of the species within the skin. For instance, a reward such as cash, coupons, songs, discounts, personal items, etc., may be offered based on the level of compliance of the subject. Still other aspects of the invention are generally directed to kits involving such devices (with or without the drug to be monitored), methods of promoting such systems, or the like.
US09041538B2	Diagnostic radio frequency identification sensors and applications thereof An integrated passive wireless chip diagnostic sensor system is described that can be interrogated remotely with a wireless device such as a modified cell phone incorporating multi-protocol RFID reader capabilities (such as the emerging Gen-2 standard) or Bluetooth, providing universal easy to use, low cost and immediate quantitative analyses, geolocation and sensor networking capabilities to users of the technology. The present invention can be integrated into various diagnostic platforms and is applicable for use with low power sensors such as thin films, MEMS, electrochemical, thermal, resistive, nano or microfluidic sensor technologies. Applications of the present invention include on-the-spot medical and self-diagnostics on smart skin patches, Point-of-Care (POC) analyses, food diagnostics, pathogen detection, disease-specific wireless biomarker detection, remote structural stresses detection and sensor networks for industrial or Homeland Security using low cost wireless devices such as modified cell phones.
US09041527B2	System and method for using alarm system zones for remote objects An alarm system for monitoring a local premises and multiple remote objects is described. The system includes sensors in the local premises, an alarm panel connected to the sensors in the local premises, and remote objects having alarm systems in communication with the alarm panel. The remote objects are assigned a zone in the alarm panel to represent the remote object, such that an alarm condition at the remote object is reported as an alarm condition in the assigned zone.
US09041525B2	Light control system A machine having a light control system is provided. The light control system includes a hazard light associated with the machine, a plurality of control locations provided on the machine, and a light control module provided at each of the plurality of control locations and communicably coupled to the hazard light. The light control module configured to receive an input signal from each of the plurality of control locations. The light control module is further configured to prioritize the input signal based on a time stamp associated with the input signal. The light control module is further configured to control an operation of the hazard light based, at least in part, on the prioritized input signal.
US09041524B2	Creation of image designating file and reproduction of image using same A technique for enabling scenario files and image files for supply to a scenario generating device to be created easily is provided. The scenario creating device creates a scenario file supplied to a scenario reproducing device capable of reproducing only image files of a predetermined format. The scenario creating device comprises: an input section including a pointing device; a display section; and a scenario creating section for creating the scenario file. The scenario creating section provides a display of an execution icon on the display screen for causing the scenario creating section to execute a process. When a file icon for a source file of a predetermined format including pagewise scenario information and image information is dragged and dropped on the execution icon by means of operation of the pointing device, a scenario file is created on the basis of the scenario information, and an image file of the predetermined format is generated on the basis of the image information.
US09041523B1	Car seat occupancy alarm The car seat occupancy alarm is an alarm that detects the presence of individuals seated in the rear of the vehicle, and upon detection of which shall emit an alarm, provided the vehicle is turned off. The alarm system includes pressure sensors that are integrated into the rear seats of a vehicle, and which are in wired communication with a central processing unit located elsewhere within said vehicle. The central processing unit is further in wired communication with a timer, vehicle lights, and a vehicle battery in order to operate, sense, and emit an alarm upon detection that individuals remain in any of the rear seats while the vehicle is parked.
US09041515B2	Apparatus comprising display driving integrated circuit and radio-frequency identification reader A display driving integrated circuit operates as both a radio-frequency identification (RFID) reader and a display driver. The display driving integrated circuit operates as the RFID reader by supplying power to an RFID tag, verifying the RFID tag according to communication between the RFID tag and the processor to produce verification data, transferring the verification data from the processor to the RFID tag, and transmitting some of the verification data to the display unit. It operates as a display driver by processing data received from the processor and transferring the processed data to the display unit. The display driving integrated circuit implements functions for the RFID reader and the display unit driver using one or more shared elements selected from a timer, a clock signal generator, a cyclic redundancy check calculator, and a data interface.
US09041514B2	RFID tag and RFID tag system An aspect of the present invention provides an RFID tag, in which a null point is hardly generated. The RFID tag includes a long antenna provided in a rectangular surface. The antenna is accommodated in a tag case of the RFID tag, and the antenna extends in a direction oblique to sides constituting the rectangular surface of the tag case.
US09041513B1	System and method for communicating with sensors/loggers in integrated radio frequency identification (RFID) tags A system and method is disclosed for communicating with sensors/loggers in integrated radio frequency identification (RFID) tags. An RFID reader uses a Communicate With Data Logger Command to communicate with a data logger in an RFID tag. The RFID reader performs data access processes using an Index Register and a Data Register of the RFID tag. The RFID reader selects one of (1) Index Read access (2) Index Write access (3) Data Write access (4) Data Read access with parity and (5) Data Read access with cyclic redundancy check (CRC). The RFID tag performs the requested data access and then performs an error detection process.
US09041511B2	Facility management using mobile devices A method includes docking a mobile device in a docking station and providing, by the mobile device, identification information to the docking station, where the identification information identifies a user associated with the mobile device. The method also includes forwarding, by the docking station, the identification information to a network device, and receiving, by the network device, the identification information. The method also includes updating, by the network device, a database based on the received identification information.
US09041509B2	Facility monitoring/controlling system and facility monitoring/controlling method A facility monitoring/controlling system and method enabling provision of a screen display function having an adequate real-time property in the range of a low rate, e.g., around 64 kbps. An on-site facility monitoring/controlling subsystem (10) operates/controls a controlled facility (200) by an on-site input means (14) through an on-site manipulation screen means (30) showing the visualized operating state of the controlled facility (200). A center facility monitoring/controlling subsystem (20) reproduces/displays a remote manipulation screen (30′) with the same contents as the on-site manipulation screen (30) on a center display means (22), and controls the controlled facility (200) by a center input means (23) and remotely operate/control the controlled facility (200). The site facility monitoring/controlling subsystem (10) extracts difference data by a difference data extraction unit (15) and performs data conversion using the analysis results of the periodicity of the change of the site manipulation screen (30) and analysis results of intermittence of the change of a cursor image from the difference data by a data conversion processing unit (19). The center facility monitoring/controlling subsystem (20) reversely converts the converted data by a manipulation screen reproducing/displaying processing unit, reproduces/displays the remote manipulation screen (30′) on the center display means (22), and remotely operates/controls the controlled facility (200).
US09041508B2	Image-based inventory control system and method Systems and methods for determining an inventory condition of objects based on captured images are described. An exemplary inventory control system or method utilizes a highly efficient and economical approach to apply suitable imaging parameters for capturing images of a storage drawer being accessed by a user, or for manipulating the captured images of the drawer. An inventory condition of the drawer is determined based on the captured images or manipulated images.
US09041502B2	Heat dissipating electromagnetic device arrangement An electromagnetic device arrangement includes a transformer assembly having a core, windings, and a housing disposed around at least a portion of the core and windings. An enclosure at least partially encloses the transformer assembly. The transformer assembly is mounted to a first portion of the enclosure such that heat is transferred from the transformer assembly to the first portion of the enclosure. A second portion of the enclosure has an extension extending therefrom such that the extension is placed in thermal contact with the transformer assembly to transfer heat from the transformer assembly to the extension.
US09041495B2	Cavity filter with connecting structure connected between slider and driving device A cavity filter includes a slider, a driving device, and an adapter. The slider is used to slide relative to and couple with a plurality of resonators located in the cavity filter to adjust a resonating frequency of the cavity filter. The driving device is used to drive the slider slide relative to the plurality of resonators and includes a shaft having a free end. The adapter is installed between the slider and the driving device and rotateably connected to the free end of the shaft with a gap configured between the free end and the adapter.
US09041492B2	Unreleased mems resonator and method of forming same A microelectromechanical (MEM) resonator includes a resonant cavity disposed in a first layer of a first solid material disposed on a substrate and a first plurality of reflectors disposed in the first layer in a first direction with respect to the resonant cavity and to each other. Each of the first plurality of reflectors comprises an outer layer of a second solid material and an inner layer of a third solid material. The inner layer of each of the first plurality of reflectors is adjacent in the first direction to the outer layer of each reflector and to either the outer layer of an adjacent reflector or the resonant cavity.
US09041486B2	Ladder type surface acoustic wave filter and duplexer using same An object of the present invention is to improve the passing characteristic at high temperature in a ladder-type elastic wave filter and a duplexer including the filter. The ladder-type elastic wave filter of the present invention includes a piezoelectric substrate, a first series elastic-wave resonator formed on the piezoelectric substrate and connected in series between the input and output terminals of the filter, a parallel elastic-wave resonator formed on the piezoelectric substrate and connected in parallel between the series elastic-wave resonator and the ground terminal, and a dielectric film formed on the piezoelectric substrate so as to cover the first series elastic-wave resonator. The piezoelectric substrate is formed of a material with a negative temperature coefficient. The dielectric film is formed of a material with a positive temperature coefficient and its film thickness is formed thicker than that with which the frequency-temperature coefficient of the first series elastic-wave resonator becomes 0.
US09041482B2	Attenuation reduction control structure for high-frequency signal transmission lines of flexible circuit board An attenuation reduction control structure for high-frequency signal transmission lines of a flexible circuit board includes an impedance control layer formed on a surface of a substrate. The impedance control layer includes an attenuation reduction pattern that is arranged in an extension direction of the high-frequency signal transmission lines of the substrate and corresponds to bottom angle structures of the high-frequency signal transmission lines in order to improve attenuation of a high-frequency signal transmitted through the high-frequency signal transmission lines. An opposite surface of the substrate includes a conductive shielding layer formed thereon. The conductive shielding layer is formed with an attenuation reduction pattern corresponding to top angle structures of the high-frequency signal transmission lines.
US09041480B2	Virtual RF sensor A radio frequency (RF) generation system includes an impedance determination module that receives an RF voltage and an RF current. The impedance determination module further determines an RF generator impedance based on the RF voltage and the RF current. The RF generation system also includes a control module that determines a plurality of electrical values based on the RF generator impedance. The matching module further matches an impedance of a load based on the RF generator impedance and the plurality of electrical components. The matching module also determines a 2 port transfer function based on the plurality of electrical values. The RF generation system also includes a virtual sensor module that estimates a load voltage, a load current, and a load impedance based on the RF voltage, the RF generator, the RF generator impedance, and the 2 port transfer function.
US09041479B2	Systems and methods for providing modulation of switchmode RF power amplifiers Systems and methods are provided for generating an amplitude modulation signal to a switchmode power amplifier. A DC to DC switch is configured to receive a DC input voltage and to provide a DC output voltage. A low dropout regulator is configured to provide the amplitude modulation signal according to a modulation control signal received by the low dropout regulator. A control circuit is configured to establish a nominal operating power level for the power amplifier via the amplitude modulation signal and to maintain a minimum voltage difference between the DC output voltage and the low dropout regulator output. A modulator control circuit is configured to provide the modulation control signal to the low dropout regulator. The modulator control circuit provides the transition from a high amplitude to a low amplitude and a transition from the low amplitude to the high amplitude at configurable first and second slopes, respectively.
US09041478B2	Electronic oscillation circuit An electronic oscillator circuit has a first oscillator, for supplying a first oscillation signal, a second oscillator, for supplying a second oscillation signal, a first controller for delivering the first control signal as a function of a phase difference between a first controller input and a second controller input of the first controller; a second controller for delivering the second control signal as a function of a phase difference between a first controller input of the second controller and a second controller input of the second controller; a resonator; at least a second resonance frequency, with a first phase shift dependent on the difference between the frequency of a second exciting signal and the second resonance frequency and processing means, for receiving the first oscillator signal and the second oscillator signal, determining their mutual proportion, looking up a frequency compensation factor in a prestored table and outputting a compensated oscillation signal.
US09041477B2	Voltage-controlled oscillator An apparatus is disclosed that includes a first cross-coupled transistor pair, a second cross-coupled transistor pair, at least one capacitance unit, and an inductive unit. The first cross-coupled transistor pair and second cross-coupled transistor pair are coupled to a pair of first output nodes and a pair of second output nodes, respectively. The at least one capacitance unit is coupled to at least one of the pair of first output nodes and the pair of second output nodes. The inductive unit is coupled to the first cross-coupled transistor pair at the first output nodes and coupled to the second cross-coupled transistor pair at the second output nodes. The inductive unit generates mutual magnetic coupling between one of the first output nodes and one of the second output nodes and between the other of the first output nodes and the other of the second output nodes.
US09041476B2	Crystal controlled oscillator A crystal controlled oscillator includes a crystal package and an IC chip board that includes an IC chip integrating an oscillator circuit. The crystal package includes a first container, a crystal resonator, a lid body, and an external terminal at an outer bottom surface of the first bottom wall layer of the first container. The IC chip integrates an oscillator circuit disposed at an outer bottom surface of the first bottom wall layer of the crystal package. The oscillator circuit connects to the lower side excitation electrode of the crystal resonator from the external terminal to an input side with high impedance. The oscillator circuit connects to the upper side excitation electrode to an output side with low impedance. The upper side excitation electrode is a shielding electrode of the crystal resonator.
US09041473B2	Power amplifier A power amplifier includes: first and second bias terminals to which bias voltages are respectively supplied; a first transistor having a first control terminal connected to the first bias terminal, a first terminal that is grounded, and a second terminal; a second transistor having a second control terminal connected to the second bias terminal, a third terminal connected to the second terminal, and a fourth terminal; a capacitor connected between the second control terminal and a grounding point; and a variable resistor connected in series with the capacitor, between the second control terminal and the grounding point.
US09041469B1	High-efficiency power module One or more embodiments of the present invention pertain to an all solid-state microwave power module. The module includes a plurality of solid-state amplifiers configured to amplify a signal using a low power stage, a medium power stage, and a high power stage. The module also includes a power conditioner configured to activate a voltage sequencer (e.g., bias controller) when power is received from a power source. The voltage sequencer is configured to sequentially apply voltage to a gate of each amplifier and sequentially apply voltage to a drain of each amplifier.
US09041468B2	Switched-mode power supply and method of operation A method of operating a switched-mode power supply (SMPS) for supplying power to a load circuit, which draws a supply current that varies with an input signal to the load circuit is disclosed. The method comprises monitoring the input signal and controlling the amount of accumulated energy transferred for consumption by the load circuit, in use, in accordance with the input signal.
US09041465B2	Amplifier circuits Differential amplifier circuits for LDMOS-based amplifiers are disclosed. The differential amplifier circuits comprise a high resistivity substrate and separate DC and AC ground connections. Such amplifier circuits may not require thru-substrate vias for ground connection.
US09041464B2	Circuitry for reducing power consumption Circuitry for reducing power consumption is described. The circuitry includes a power amplifier. The circuitry also includes a predistorter coupled to the power amplifier. The circuitry further includes a power supply coupled to the power amplifier. The circuitry additionally includes a controller coupled to the power amplifier, to the predistorter and to the power supply. The controller captures a transmit signal and a feedback signal concurrently and determines a minimum bias voltage from a set of voltages and a predistortion that enable the power amplifier to produce an amplified transmit signal in accordance with a requirement.
US09041462B2	Power amplifier with an adaptive bias An electronic circuit, including, a power amplifier adapted to amplify an RF signal and provide it as output from the integrated circuit; a power source that is adapted to provide an unregulated voltage to the power amplifier; a regulator adapted to provide a regulated bias voltage; a subtracter that is adapted to accept a voltage proportional to the unregulated voltage and subtract it from the bias voltage to provide a reference voltage to the power amplifier; wherein the power amplifier is adapted to use the reference voltage to adjust the output from the power amplifier so that it will provide a stable power output.
US09041460B2	Packaged power transistors and power packages A power package is provided comprising a packaged transistor and a driving unit connected to the transistor and adapted to drive the transistor. A control terminal of the transistor is connected to a middle terminal pin of the housing of the transistor and outer terminal pins of the housing are connected to the driving unit and to a voltage level, respectively, wherein the connections are crossing free.
US09041456B2	Power semiconductor device A transistor being one of an IGBT and a MOSFET and arranged near a gate control circuit applies a gate control signal from the gate control circuit to the gate of a transistor arranged far from the gate control circuit. A gate control signal is applied via a resistive element to the transistor arranged near the gate control circuit.
US09041454B2	Bias circuit for a switched capacitor level shifter A noise resistant switch control circuit is provided. The circuit includes a low pass filter configured to couple to a first terminal of a switch and a first voltage clamp coupled to the low pass filter. The first voltage clamp is configured to couple to a control terminal of the switch and limit a voltage of the control terminal relative to the first terminal to within a first clamping range. The circuit includes a second voltage clamp coupled to an input terminal of the switch control circuit. The second voltage clamp is configured to couple to the control terminal of the switch. The second voltage clamp is further configured to reduce a level of a control voltage coupled to the second voltage clamp. The circuit includes a bias device configured to couple to the control terminal of the switch and to impress a biasing voltage to the control terminal.
US09041453B2	Pulse generation circuit and semiconductor device Two gate drivers each comprising a shift register and a demultiplexer including single conductivity type transistors are provided on left and right sides of a pixel portion. Gate lines are alternately connected to the left-side and right-side gate drivers in every M rows. The shift register includes k first unit circuits connected in cascade. The demultiplexer includes k second unit circuits to each of which a signal is input from the first unit circuit and to each of which M gate lines are connected. The second unit circuit selects one or more wirings which output an input signal from the first unit circuit among M gate lines, and outputs the signal from the first unit circuit to the selected wiring(s). Since gate signals can be output from an output of a one-stage shift register to the M gate lines, the width of the shift register can be narrowed.
US09041452B2	Circuit and method of clocking multiple digital circuits in multiple phases A circuit includes a power supply terminal and a clock parsing circuit configured to produce multiple clock signals having a common clock period and different phases. The circuit further includes a plurality of digital circuits coupled to the clock parsing circuit and the power supply terminal. Each digital circuit includes an input to receive data and logic to process the data. Each digital circuit is responsive to a phase associated with a respective clock signal of the multiple clock signals to draw current from the regulated power supply terminal to process the data to produce a data output. Additionally, the circuit includes an output timing management circuit coupled to each of the plurality of digital circuits and configured to control data outputs of each of plurality of digital circuits to prevent timing violations at one or more destination circuits.
US09041443B2	Digital phase-locked loop using phase-to-digital converter, method of operating the same, and devices including the same A digital phase locked loop (DPLL), a method of operating the same, and a device including the same are provided. The DPLL includes a digitally-controlled oscillator configured to change a frequency and a phase of an output oscillation signal in response to a digital control code; a main divider configured to divide the frequency of the output oscillation signal and generate a first feedback signal based on the divided frequency; and a phase-to-digital converter configured to subdivide the phase of the output oscillation signal and to generate a quantized code by converting a phase difference between a reference signal and the first feedback signal using a phase-subdivided signal resulting from the subdivision. The digital control code is generated based on the quantized code.
US09041441B2	Sequence circuit A sequence circuit includes first through third signal terminals, first through ninth resistors, and first through fifth electronic switches. The sequence circuit receives a first signal through the first signal terminal. The sequence circuit receives a second signal through the second signal terminal. The sequence circuit outputs a third signal through the third signal terminal. The sequence circuit is used to ensure the sequence of the first through third signals.
US09041440B2	Graphene-based frequency tripler A frequency tripler device is disclosed. The frequency tripler device includes a first graphene based field effect transistor (FET) of a first dopant type, having a gate, a drain, and a source, and a second graphene based FET of a second dopant type, having a gate, a drain, and a source, the gate of the first FET coupled to the gate of the second FET and coupled to an input signal having an alternating current (AC) signal of a first frequency, the combination of the first and second FETs generates an output signal with a dominant AC signal of a frequency of about three times the first frequency.
US09041439B2	Transmitter having voltage driver and current driver A circuit includes a first power node at a first voltage level, a second power node at a second voltage level, a first voltage driver, a first current driver, and a control unit. The first voltage driver is configured to electrically couple a first output node to the first power node when a first input signal at the first input node is at a first logic state, and electrically couple a first output node to the second power node when the first input signal is at a second logic state. The first current driver is configured to inject or extract a first adjustment current into or out of a first output node. The control unit is configured to generate a measurement result of the first voltage level, and to set the first adjustment current according to the measurement result.
US09041438B2	Output buffer and signal processing method An output buffer comprises a series connection of a first field effect transistor and a second field effect transistor, wherein the first field effect transistor is connected to a first supply potential terminal and the second field effect transistor is connected to a second supply potential terminal. An output terminal is connected to a common connection of the first transistor and the second transistor. The output buffer has a series connection of a resistive element and a capacitive element, wherein the capacitive element is connected to the output terminal, and a control circuit, to which an input signal is provided. The control circuit controls the transistors in such a way that turning off of a transistor is performed immediately, while turning on of a transistor is performed depending on the charging or discharging of the capacitive element, thus achieving a defined slew rate of the output signal at the output terminal.
US09041437B2	Switching device driving apparatus A switching device driving apparatus for preventing arm short circuit is provided, including: a first switching device driving unit for receiving a control signal for controlling a first switching device and a second switching device so that they will not turn ON at the same time and outputting an ON/OFF drive signal to the first switching device; and a second switching device driving unit for receiving the control signal and outputting an ON/OFF drive signal to the second switching device, in which the first switching device driving unit outputs a drive signal for increasing the delay of the ON timing of the first switching device with respect to the OFF timing of the second switching device with increase in ambient temperature.
US09041436B2	Semiconductor device having pull-up circuit and pull-down circuit To reduce power supply noises occurring in a control circuit unit for controlling an output buffer. A semiconductor device includes unit buffers for driving a data output terminal, impedance control circuits for controlling the unit buffers, and a control circuit unit for controlling the impedance control circuits. The impedance control circuits and the control circuit unit operate by mutually-different power supplies, the control circuit unit supplies pull-up data and pull-down data in mutually reverse phase to the impedance control circuits, and the impedance control circuits convert the pull-up data and the pull-down data from reverse phase to in-phase and supply the same to the unit buffers. Thereby, a noise is difficult to occur in a power supply VDD used for the control circuit unit.
US09041428B2	Placement of storage cells on an integrated circuit A method for configuring the placement of a plurality of storage cells on an integrated circuit includes grouping the plurality of storage cells into a plurality of words, where each of the plurality of words is protected by an error control mechanism. The method also includes placing each of the storage cells on the integrated circuit such that a distance between any two of the storage cells belonging to one of the plurality of words is greater than a minimum distance. The minimum distance is configured such that a probability of any of the plurality of words experiencing multiple radiation induced errors is below a threshold value.
US09041427B2	Quantum circuit within waveguide-beyond-cutoff A quantum information processing system includes a waveguide having an aperture, a non-linear quantum circuit disposed in the waveguide and an electromagnetic control signal source coupled to the aperture.
US09041426B2	Default current test method of impulse voltage mixed high voltage direct current converter valve The present invention provides to a default current testing method of the high voltage direct current converter valve composited by impulse voltage. The technical scheme of the invention composites the symmetrical positive and negative voltage and the impulse into asymmetric positive and negative high voltage, it makes the test valve voltage accurately achieve required peak value at the set time. The test circuit is simple relatively; the high voltage source of the default current test circuit is instead by surge generators. The test method is flexible, safe, and suitable for different DC project converter valves.
US09041416B2	Physical property sensor with active electronic circuit and wireless power and data transmission Wireless sensors configured to record and transmit data as well as sense and, optionally, actuate to monitor physical properties of an environment and, optionally, effect changes within that environment. In one aspect, the wireless sensor can have a power harvesting unit; a voltage regulation unit, a transducing oscillator unit, and a transmitting coil. The voltage regulation unit is electrically coupled to the power harvesting unit and is configured to actuate at a minimum voltage level. The transducing oscillator unit is electrically coupled to the voltage regulation unit and is configured to convert a sensed physical property into an electrical signal. Also, the transmitting coil is configured to receive the electrical signal and to transmit the electrical signal to an external antenna.
US09041413B2	Electric leakage detection apparatus An electric leakage detection apparatus may quickly detect an electric leakage. An electric leakage detection apparatus includes a pulse generator that supplies a pulse to a coupling capacitor, a voltage detector that detects a voltage at the coupling capacitor, an electric leakage determination unit that compares the voltage detected by the voltage detector to a first threshold and determines presence or absence of the electric leakage of a DC power supply based on a comparison result. The electric leakage detection apparatus also includes a discharge determination unit that compares the voltage detected by the voltage detector to a second threshold lower than the first threshold and determines whether the detection voltage becomes lower than the second threshold by a discharge of the coupling capacitor. The pulse generator generates a new pulse when the discharge determination unit determines that the detection voltage becomes lower than the second threshold.
US09041411B2	Testing of an integrated circuit that contains secret information An integrated circuit (10) comprises a functional circuit (12a-c) that contain information that must be secured against unauthorized access. The integrated circuit comprises a test access circuit (14, 16) coupled to the functional circuit (12a-c), and a plurality of fuse elements (18) coupled to the test access circuit (14, 16). The fuse elements (18) are connected in a circuit configuration that makes the functional circuit (12a-c) consistently accessible via the test access circuit (14, 16) only when first fuse elements (18) of the plurality are in a blown state and second fuse elements (18) of the plurality are in a not-blown state. As a result the integrated circuit can be tested after selectively blowing all of the first fuse elements (18). After testing at least part of the second fuse elements (18) is blown. As a result, a person that does not know which fuse elements are first fuse elements and which are second fuse elements is presented with difficulties to restore the integrated circuit to a state where test access with the danger of access to the secured information is possible.
US09041409B1	Localization of failure in high density test structure An integrated circuit structure can include a plurality of solder bumps coupled in series forming a chain and a plurality of diodes, wherein each diode is coupled to one of the plurality of solder bumps. The integrated circuit structure also can include a first pad coupled to the solder bump of the plurality of solder bumps at an end of the chain. The first pad can be configured to provide a test current responsive to application of a forward bias voltage to each diode of the plurality of diodes.
US09041403B2	Electrical storage module An electrical storage module includes: a plurality of electrical storage units; electrical storage unit connecting conductors electrically connecting the plurality of electrical storage units; and a voltage detection line unit electrically connected to the plurality of electrical storage units for detecting a voltage of each of the plurality of the electrical storage units, wherein: the voltage detection line unit is unitized with the electrical storage unit connecting conductors, includes voltage detection lines for each detecting the voltage of one of the plurality of the electrical storage units, and is configured such that, when the electrical storage unit connecting conductors are mechanically connected to the plurality of electrical storage units, the voltage detection lines are electrically connected to the electrical storage units.
US09041395B2	MRI method of calculating and generating spatially-tailored parallel radio frequency saturation fields A method for producing magnetic resonance images of a subject in which artifacts resulting from a localized source, such as from pulsatile blood flow, are substantially mitigated is provided. The location of an artifact source, at which spins corresponding to flowing blood are located, is identified. Using this identified artifact source location, a region-of-saturation is calculated. A magnetic resonance imaging (MRI) system is then directed to perform a pulse sequence that results in the generation of a radio frequency (RF) saturation field being produced by an array of RF transmission coils. The RF saturation field is sized and shaped according to the calculated region-of-saturation. Images are reconstructed from image data acquired after application of the RF saturation field, and artifacts related to motion of the spins at the identified location of the artifact source are substantially mitigated in these images.
US09041394B2	Magnetic resonance imaging apparatus executing phase-corrected imaging pulse sequence based on data obtained from multiple pulse sub-sequences executed without readout direction gradients but instead using phase or slice encoding direction gradients during readout A magnetic resonance imaging apparatus according to an embodiment includes an executing unit, a calculating unit, and a correcting unit. The executing unit executes a first pre-scan in which a readout gradient magnetic field and a phase encoding gradient magnetic field are not applied and sampling gradient magnetic fields is applied in a phase encoding direction and a second pre-scan in which the readout gradient magnetic field is not applied, the sampling gradient magnetic field is applied at the same echo signal as that in the first pre-scan, and a representative phase encoding gradient magnetic field in a main scan. The calculating unit calculates the amount of correction from phase differences between the echo signals collected by the first pre-scan and between the echo signals collected by the second pre-scan. The correcting unit corrects the pulse sequence for the main scan on the basis of the calculated amount of correction.
US09041393B2	Interleaved single magnetic resonance sequence for MR quantification A magnetic resonance sequence includes an interleaved slice-selective pre-pulse and a slice-selective multi-echo acquisition. This sequence is repeated with different delays between the pre-pulse and the acquisition resulting in a matrix of complex images. Based on this matrix T1 and T2 relaxations, proton density and the B1 field can be estimated. These quantified parameters enable synthetic magnetic resonance imaging (MRI) and form a robust input for tissue segmentation in computer aided diagnosis for MRI.
US09041390B1	Digitally controlled high-current DC transducer A direct current transducer includes an open-loop Hall-effect sensor, a first ADC coupled to the open-loop Hall-effect sensor, a thermistor, a second ADC coupled to the thermistor, a manually controlled mode-selection device, a digital processor coupled to the first ADC and the second ADC, and digital memory coupled to the digital processor. The manually controlled mode-selection device is operative to develop an operating mode selection digital signal for a plurality of operating modes including a temperature-compensated direct current (DC) transducer mode and a calibration mode.
US09041383B2	Method and device for linearizing a transformer A method for linearizing voltage transmission through a transformer including a magnetic core and, input and output windings. A measurement signal is supplied to the input winding at a first frequency and an output signal is measured at the output winding of the transformer, wherein the voltage of the measurement signal may be so low that the transformer operates in a non-linear region. The method includes, for a conditioning signal, selecting a second frequency different from the first frequency, defining an amplitude value of the conditioning signal and supplying the conditioning signal to the input winding at the second frequency with the defined amplitude value so that the transformer operates in its linear region.
US09041381B2	Current mirror circuits in different integrated circuits sharing the same current source A current mirror circuit, receiving an input current and outputting a plurality of mirroring currents, comprising: a first transistor, wherein a control terminal and a first terminal of the first transistor are connected to a first mirroring current of the input current; at least one second transistor, wherein a control terminal and a first terminal of the at least one second transistor are connected to the at least one second mirroring current of the input current; and a plurality of third transistors, outputting the plurality of mirroring currents from first terminals of the plurality of third transistors, wherein control terminals of the plurality of third transistors are connected to control terminals of the first transistor and the at least one second transistor. The first transistor, the at least one second transistor and the plurality of third transistors are identical.
US09041379B2	Bootstrap startup and assist circuit A bootstrap assist circuit and a startup circuit comprising a voltage controlled switch and a startup ramp voltage generator connected to the voltage controlled switch that will control a high side switch, a dimming interface or an enable/disable input function. Said system is used to provide a bootstrap technique to continuously switch a floating high side switch (MOSFET) by continuously charging a capacitor and then “level shifting” said capacitor voltage across the gate and source of the said high side switch to turn the switch on.
US09041376B2	Synchronous DC-DC converter having soft-stop function A synchronous DC-DC converter having a soft-stop function includes an output stage for supplying an output voltage, wherein the output stage includes a high-side transistor for charging the output voltage and a low-side transistor for discharging the output voltage; an output control circuit, coupled to the output stage, for controlling the high-side transistor and the low-side transistor of the output stage; at least one protection device, for controlling the high-side transistor to be turned off when a specific situation occurs, in order to stop supplying the output voltage; and a soft-stop control circuit, coupled to the output control circuit, for controlling the low-side transistor of the output stage to be turned on when the protection device controls the high-side transistor to be turned off or the synchronous DC-DC converter is disabled, in order to discharge the output voltage.
US09041374B2	Power converting circuit and control circuit thereof A power converting circuit includes an upper gate switch, a transistor, a current source circuit, a comparator circuit, a delay circuit, and a pulse width modulation signal generating circuit. The transistor and the current source circuit provide a reference signal. The comparator circuit generates a comparing signal according to the reference signal and an output signal provided by the upper gate switch. The delay circuit generates a delay signal according to the comparing signal and a clock signal. The pulse width modulation signal generating circuit generates a control signal for the upper gate switch according to the delay signal and the clock signal for configuring the conduction status of the upper gate switch. The power converting circuit adjusts the conduction time of the upper gate switch according to the reference signal and the output signal.
US09041370B2	Charge pump regulator circuit with a variable drive voltage ring oscillator A charge pump regulator circuit includes a voltage controlled oscillator and a plurality of charge pumps. The voltage controlled oscillator has a plurality of inverter stages connected in series in a ring. A plurality of oscillating signals is generated from outputs of the inverter stages. Each oscillating signal has a frequency or amplitude or both that are variable dependent on a variable drive voltage. Each oscillating signal is phase shifted from a preceding oscillating signal. Each charge pump is connected to a corresponding one of the inverter stages to receive the oscillating signal produced by that inverter stage. Each charge pump outputs a voltage and current. The output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to the load.
US09041368B2	Power supply device A power supply device includes a first converter which converts an input voltage to a first voltage, a second converter which converts the first voltage from the first converter to a second voltage, a voltage comparison section which compares the first voltage outputted from the first converter with a predetermined reference voltage, a voltage comparison result output section which outputs a first signal until the first voltage is determined to be higher than the predetermined reference voltage by the voltage comparison section and retains a second signal as an output after the first voltage is determined to be higher than the predetermined reference voltage, and a converter control section which controls the second converter to stop when the first signal is outputted from the voltage comparison result output section and controls the second converter to operate when the second signal is outputted from the voltage comparison result output section.
US09041367B2	Voltage regulator with current limiter A voltage regulator includes an amplifier having a first input coupled to a first reference voltage and a second input coupled to a voltage feedback signal; a multiplexer having a first input coupled to an output of the amplifier, a second input coupled to a voltage clamp signal, and a control input; and a control circuit having a first input coupled to an over current indicator, a second input coupled to a no over voltage indicator, a third input coupled to a timer signal, and an output coupled to the control input of the multiplexer.
US09041363B2	Windowless H-bridge buck-boost switching converter A “windowless” H-bridge buck-boost switching converter includes a regulation circuit with an error amplifier which produces a ‘comp’ signal, a comparison circuit which compares ‘comp’ with a ‘ramp’ signal, and logic circuitry which receives the comparison circuit output and a mode control signal indicating whether the converter is to operate in buck mode or boost mode and operates the primary or secondary switching elements to produce the desired output voltage in buck or boost mode, respectively. A ‘ramp’ signal generation circuit operates to shift the ‘ramp’ signal up by a voltage Vslp(p−p)+Vhys when transitioning from buck to boost mode, and to shift ‘ramp’ back down by Vslp(p−p)+Vhys when transitioning from boost to buck mode, thereby enabling the converter to operate in buck mode or boost mode only, with no need for an intermediate buck-boost region.
US09041358B2	Semiconductor device for battery control and battery pack A semiconductor device for battery control includes a CPU, a first bus coupled to the CPU, a second bus not coupled to the CPU, and a protective function circuit for protecting a battery from stress applied thereto. The semiconductor device also includes a non-volatile memory storing trimming data, a trimming circuit to perform trimming required to allow the protective function circuit to exert a protective function, and a bus control circuit capable of selectively coupling the first bus and the second bus to the non-volatile memory. The semiconductor device further includes a transfer logic circuit which causes, by making the bus control circuit select the second bus, a trimming data transfer path leading from the non-volatile memory to the trimming circuit to be formed and the trimming data stored in the non-volatile memory to be transferred to the trimming circuit without involving the CPU.
US09041355B2	Battery controller, battery control method and program There is provided a battery controller including a storing unit which stores an upper limit voltage and a lower limit voltage, each defining a first voltage range in which a battery is charged/discharged, and a second upper limit voltage and a second lower limit voltage, each defining a second voltage range which is wider than the first voltage range, and a charge/discharge regulation unit which temporarily changes, when charge/discharge is performed in the first voltage range and permission for charge/discharge in the second voltage is received, setting of the battery such that charge/discharge is performed in the second voltage range.
US09041341B2	More readily available traction battery A battery includes a first terminal, a second terminal, a first battery module, a second battery module, and a third batter module. The first battery module and the second battery module includes a first pole, a second pole, a plurality of battery cells, a charge and disconnect device, a disconnect device, and a bridging device. The third battery module includes a first pole, a second pole, a plurality of battery cells, a first disconnect device, a second disconnect device, and a bridging device. The first and second poles of the first battery module are connected in series with the first terminal and the first pole of the third battery module. The first and second poles of the second battery module are connected in series with the second terminal and thesecond pole of the third batter module.
US09041336B2	Robot having repeatable disturbance compensation algorithm A controller for a substrate transport apparatus. The controller includes a first system and a second system for at least partially controlling a movement of a motor of the substrate transport apparatus. The first system is configured to control the movement of the motor based upon a signal from a position sensor. The position sensor outputs the signal based upon a position of a rotor of the motor relative to a stator of the motor. Torque output of the motor is at least partially controlled based upon the signal from the position sensor. The second system for at least partially controlling the movement of the motor is based upon expected disturbances during movement of an arm of the substrate transport apparatus by the motor, where the second system is configured to at least partially increase and/or decrease the torque output of the motor by first system.
US09041334B2	Motor control with voltage harmonic shaping A control system for an electric motor comprises a current sensing means arranged to produce a current sensing output indicative of electric current in the motor, current control means arranged to receive the current sensing output and to output a voltage demand indicative of voltages to be applied to the motor, and voltage demand correction means arranged to generate a correction signal and to use the correction signal and the voltage demand to produce a corrected voltage demand.
US09041326B2	Method for operating a brushless electric motor A method for operating a brushless electric motor, the windings being energized by an inverter with the aid of six switches. A detection unit for detecting defective switches, a unit for measuring voltage at the outputs of the inverter, and a microcontroller for controlling the switch and for generating a pulse width modulated voltage supply for the windings are provided. A short-circuited switch causes a torque in the electric motor opposite the actuating direction of the electric motor. The method proposes that after detecting a short-circuited switch, the windings (U. V. W) are energized to generate a motor torque that is, on the whole, positive. An actuating period of the electric motor is divided into a plurality of sectors, wherein, in accordance with the defective switch, individual sectors are deactivated for the actuation of the windings (U, V, W), while other sectors are used to actuate the windings (V, W).
US09041320B2	Portable, electric work apparatus The invention relates to a portable work apparatus having a housing and a work tool which is driven by an electric motor via a gear assembly. A flywheel which rotates about a rotational axis is arranged in the drive train between the electric motor and the gear assembly, which flywheel is connected fixedly to an output shaft so as to rotate with it, which output shaft protrudes into a gear assembly space and has a drive pinion. The output, shaft and the flywheel are mounted in the housing by two bearing locations, the rotational axis of the flywheel and a motor shaft of the electric motor lying coaxially with respect to one another, and the motor shaft of the electric motor being connected fixedly to the flywheel so as to rotate with it. The electric motor is fixed in the housing exclusively via a torque support.
US09041319B2	Actuator having an address selector A system incorporating an actuator connected to a polarity-insensitive two-wire communications bus. The actuator may have an electromechanical mover, a processor connected to the electromechanical mover, and a potentiometer, having a number of address settings, connected to the processor. A setting of the number of settings of the potentiometer may be a selection of an address for the actuator on the communications bus. There may be additional actuators and a controller connected to the communications bus. Each actuator may have an address which is different from an address of the other actuators connected to the communications bus. If an actuator is substituted with a replacement actuator, then a setting of a plurality of settings on a potentiometer of the replacement actuator may be selected to obtain an address that is the same as the address of the actuator which is substituted.
US09041317B2	Ballast lead wire configuration A ballast lead wire configuration includes a ballast having a pair of power inputs and a pair of power outputs. A primary lamp is electrically connected to the ballast. A first primary lamp ballast terminal is formed on the primary lamp and electrically connected to the ballast. A second primary lamp ballast terminal is formed on the primary lamp and electrically connected to the ballast. A second lamp electrically connected to the ballast, and the second lamp is electrically connected to the first lamp in series. A first secondary lamp ballast terminal is formed on the secondary lamp and electrically connected to the ballast. A second secondary lamp ballast terminal is formed on the secondary lamp and electrically connected to the ballast. The first lamp and the second lamp are florescent lamps over 36 inches long.
US09041313B2	Low dropout light emitting diode (LED) ballast circuit and method therefor A ballast circuit for a Light Emitting Diode (LED) has a regulator element coupled to the LED and to an input voltage source. A control circuit is coupled to the LED and to an input voltage source. A first switching device is coupled in series with the regulator element. A second switching device is coupled to the input voltage and the control circuit.
US09041310B2	Load driving apparatus related to light emitting diodes A load driving apparatus related to light emitting diodes (LED) is provided. The load driving apparatus includes a power conversion circuit, a complex function circuit, and a control chip. The power conversion circuit receives a DC input voltage and provides a DC output voltage to at least one LED string in response to a gate pulse-width-modulation (PWM) signal. The complex function circuit is serially connected with the LED string and provides a short-protection mechanism. The control chip is coupled to the power conversion circuit and the complex function circuit. The control chip generates the gate PWM signal to control the operation of the power conversion circuit, and when the LED string is short-circuited, the control chip controls the complex function circuit to activate the short-protection mechanism, so as to protect the load driving apparatus from being damaged.
US09041309B1	Dynamically programmable LED illumination system, method and apparatus A dynamically programmable LED illumination system, method and apparatus provides for a dynamically programming an LED illumination unit including LED bulbs affixed on a circuit board and arranged to providing an animating display (such as a logo, sign, . . . ), where a user can customize the animating display on the LED illumination unit by selecting control signals. LED bulbs in the unit can illuminate or be adjusted such as to provide an animating display to a viewer.
US09041308B2	Systems and methods of controlling the output of a light fixture Systems and methods of controlling the output of a light fixture. The light fixture includes a plurality of light sources and a controller. The controller is configured to receive a first input control value for a first control parameter and a first input control value for a second control parameter. The controller is also configured to determine a first difference between the first input control value for the first control parameter and a second input control value for the first control parameter stored in a memory and determine a second difference between the first input control value for the second control parameter and a second input control value for the second control parameter stored in the memory. The controller is also configured to set a slew time based on the first determined difference when the first determined difference is greater than the second determined difference and based on the second determined difference when the second determined difference is greater than the first determined difference.
US09041306B2	Dimmable light source with temperature shift An illumination device (1) comprises: input terminals (2) for coupling to AC mains; a LED string (10) connected in series with the input terminals; a rectifier (30), having input terminals connected in series with the LED string; a controllable voltage source (40), having input terminals coupled to the rectifier output terminals; a series arrangement of at least one auxiliary LED (51) and a second ballast resistor (52) connected to the output terminals of the controllable voltage source. The voltage source comprises: a series arrangement of an adjustable first resistor (46) and a second resistor (47) connected in parallel to the input terminals; a tuneable Zener diode (49) connected in parallel to the output terminals, having a control input terminal (48) connected to the node between the two resistors; wherein positive output terminal is connected to positive input terminal and negative output terminal is connected to negative input terminal.
US09041305B2	Regulation of wavelength shift and perceived color of solid state lighting with intensity variation Representative embodiments of the invention provide a system, apparatus, and method of controlling an intensity and spectrum of light emitted from a solid state lighting system. The solid state lighting system has a first emitted spectrum at a full intensity level and at a selected temperature, with a first electrical biasing for the solid state lighting system producing a first wavelength shift, and a second electrical biasing for the solid state lighting system producing a second, opposing wavelength shift. Representative embodiments provide for receiving information designating a selected intensity level or a selected temperature; and providing a combined first electrical biasing and second electrical biasing to the solid state lighting system to generate emitted light having the selected intensity level and having a second emitted spectrum within a predetermined variance of the first emitted spectrum over a predetermined range of temperatures.
US09041304B2	Current control circuit and associated method A current control circuit and associated method are disclosed hereby. The current control circuit has a fly-wheel circuit, comprising an inductor, a rectifier and a load; a current sense circuit, detecting a load current, configured to generate a first current signal; a compensating circuit, generating a compensating signal; a control circuit, generating a control signal according to the first current signal and the compensating signal; a first switch, coupled to the fly-wheel circuit, turned ON and OFF according to the control signal. By the effect of the compensating signal, the drift error of the average load current is prohibited.
US09041298B2	Motion activated toilet bowl lighting device A motion activated toilet bowl lighting device includes a body member having inner, outer, top, and bottom walls that define an interior area. The inner wall includes an inwardly annular configuration complementary to a toilet bowl rim outer surface. The lighting device includes an attachment arm displaced from the inner wall. A bridge connects the top wall to the attachment arm such that the inner wall, attachment arm, and bridge sandwich the toilet rim. A motion detector is positioned on the outer wall and a light is positioned on the attachment arm. A light sensor is positioned on the body member. A battery and timer are situated in the interior area. The light is energized when the light sensor detects lower than a predetermined amount of ambient light and when the motion detector detects movement, the light being de-energized when the timer expires.
US09041297B2	Large area lighting system with wireless control Sensors and lighting components are provided that are capable of matching an emitted color to a color observed at a remote location. The sensor measures a light characteristic at a first location, and provides data to a remote lighting component, such as via a wireless connection. The lighting component is configured to emit light based upon the light characteristic, and thus is able to match an observed lighting condition. The lighting component may match the color, intensity, temperature, pattern, texture, or other characteristic of light at a remote location.
US09041292B2	Phase and frequency control of a radio frequency generator from an external source Controlling a phase and/or a frequency of a RF generator. The RF generator includes a power source, a sensor, and a sensor signal processing unit. The sensor signal processing unit is coupled to the power source and to the sensor. The sensor signal processing unit controls the phase and/or the frequency of a RF generator.
US09041291B2	Lamp A band pass filter comprises an air filled aluminum chamber, having a lid and a cuboid resonant cavity having a central iris. At opposite end nodes of the cavity, perfect electric conductors (PECs) are provided. One is connected to a feed wire from an input at one end of the cavity. The other PEC is connected via a further feed wire to a radiator in a fabrication of solid-dielectric, lucent material.Threaded tuning projections opposite the PECs and in the iris are provided, whereby the pass band and the transmission characteristics of the filter in the pass band can be tuned to match the input impedance of the band pass filter and the wave guide to the output impedance of a microwave drive circuit (not shown). Typically the impedance will be 50Ω.
US09041286B2	Volumetric light emitting device A volumetric light emitting device includes a substrate, a semiconductor light emitting diode disposed on the substrate and a reflector ring extending axially from the substrate. The reflector ring defines a first volume bounded by the substrate, an inner wall of the reflector ring, and a terminal plane at a distal end of the reflector ring. An encapsulant fills the first volume and encapsulates the semiconductor light emitting diode. A volumetric light conversion element surrounds the reflector ring and the first volume wherein the volumetric light conversion element is adapted to down-convert light emitted from the semiconductor light emitting diode at a first wavelength and emit the down-converted light at a second wavelength. A second volume of encapsulant or scattering material extends axially between the terminal plane and the volumetric light conversion element.
US09041278B2	Display panel, organic light emitting display device having the same, and method of manufacturing a display panel A method of manufacturing a display panel of an organic light emitting display device includes determining a plurality of pixel groups, the pixel groups corresponding to groups of pixels of the display panel, calculating aperture ratios for the pixels, respective aperture ratios being calculated by pixel group based on respective distances between a power unit and the pixel groups, and forming the pixels of the display panel to have the respective aperture ratios according to the corresponding pixel groups.
US09041274B2	Spark plug having firing pad A spark plug has a shell, an insulator, a center electrode, a ground electrode, and a firing pad. The firing pad is made of a precious metal material and is attached to the ground electrode. The firing pad has a side surface at a peripheral edge that can be flush or nearly flush with a free end surface of the ground electrode. This construction can help improve ignitability and flame kernel growth of the spark plug during a sparking event, and can provide better thermal management at the attached ground electrode and firing pad.
US09041271B2	Crystal device A crystal device is provided, in which a peeling of a bonding material is prevented by using the bonding material having a thermal expansion coefficient which is between the coefficients in a first direction and a second direction of a bonding surface of a crystal element. A crystal device includes a rectangular crystal element formed with a crystal material that includes an excitation part and a frame surrounding the excitation part. The device further includes a rectangular base bonded to a principal surface of the frame, and a lid bonded to another principal surface of the frame; and the frame, the base and the lid have edges respectively along a first direction and a second direction intersecting with the first direction. The bonding material is applied having a thermal expansion coefficient that is between the coefficients in the first direction and second direction of the crystal element.
US09041270B2	Driving apparatus A driving apparatus comprises a piezoelectric element (12) expanding and contracting in accordance with a driving pulse signal (40, 42), a supporting shaft (14) connected to said piezoelectric element, a movable body (20) frictionally engaged with said supporting shaft and capable of moving along said supporting shaft, and a driving portion (30) applying said driving pulse signal having a voltage value that corresponds to a driving voltage value (VD) to said piezoelectric element in order to cause relative movement of said movable body to said supporting shaft, wherein a driving voltage waveform (50) showing a time-varying of said driving voltage value has a first dropping portion (55) where said driving voltage value sharply drops from a first value (V1) to a second value (V2), a second dropping portion (56) where said driving voltage value slowly drops from said second value (V2) to a third value (V3) compared with said first dropping portion, and a third dropping portion (57) where said driving voltage value sharply drops from said third value (V3) to a standard value (V0) compared with said second dropping portion.
US09041269B2	Motor There is provided a motor including a rotor and a stator arranged outside the rotor in the radial direction. The rotor includes a rotor core, a plurality of magnets arranged at equal intervals in the circumferential direction of the rotor core and functioning as one magnetic pole, and salient poles integrated with the rotor core, each arranged between adjacent magnets and at a distance from the magnets. The salient poles function as the other magnetic pole. A stator has a stator core having a plurality of teeth extending in the radial direction of the stator and arranged at equal intervals in the circumferential direction, and multi-phase coils attached to the teeth.
US09041268B2	Rotary electric machine A rotary electric machine includes a rotor core in which first magnetic pole portions having permanent magnets and second magnetic pole portions having no permanent magnets are alternately arranged in a circumferential direction; and a stator core which is arranged to face an outer periphery of the rotor core. The rotor core is configured such that an average gap length between the stator core and the second magnetic pole portions is larger than an average gap length between the stator core and the first magnetic pole portions.
US09041260B2	Cooling system and method for an electronic machine Embodiments of the invention provide an electric machine module including an electric machine which can include a stator assembly. The stator assembly can include stator end turns. Some embodiments can provide a housing at least partially enclosing the electric machine and the housing can at least partially define a machine cavity. Further, at least one baffle can be coupled to the housing at a region near the stator end turns, so that the at least one baffle surrounds a portion of a perimeter of the stator end turns.
US09041258B2	Machine tool The present invention provides a machine tool making it possible that an operator needs to remove a key member from a predetermined position after an unlock condition of a door is established when a door lock mechanism brings the door into an unlocked state, meanwhile the operator can recognize the necessity of reattaching the key member to the predetermined position when the door lock mechanism brings the door into a locked state. In the machine tool, an interlock mechanism 5a allows a door lock mechanism 8 to bring a door 3 into the unlocked state in a state that the unlock condition of the door 3 is established and when the key member 9 is removed from the predetermined position and, after the door 3 is unlocked, allows the door lock mechanism 8 to bring the door 3 into the locked state only when the key member 9 is attached to the predetermined position in a state that the door closed state detection mechanism 7 detects that the door is located at the predetermined closed position.
US09041257B2	System for distributing electric power to an electrical grid A system for distributing electric power to an electrical grid. The system includes a DC/AC inverter arranged to convert a DC voltage output from an electric power generator to an AC voltage, a transformer arranged to receive the AC voltage, transform the AC voltage and deliver the transformed AC voltage to the grid, and a connector arranged to selectively connect and disconnect the transformer from the grid. The DC/AC inverter is arranged to control primary winding magnetizing current delivered to the transformer. Further, the connector is arranged to selectively connect and disconnect the grid to and from the transformer on the basis of the controlled magnetizing current.
US09041251B2	Boost converter with multiple inputs and inverter circuit A boost converter with a multiple input and with improved efficiency has two or more inputs. A DC voltage source can be connected to each input. A common output carries a DC voltage whose value is greater than or equal to that of the input voltages. The common output is in each case connected to each of the plurality of inputs via a positive lead branch and a negative lead branch. At least one inductor is arranged in the positive lead branch and/or the negative lead branch from each input, and at least one rectification element is arranged in the positive lead branch and/or the negative lead branch from each input. Furthermore, the inputs can be connected in series by means of two or more switching elements via the inductors, wherein at least two of the inductors can in each case be connected in parallel.
US09041250B1	System and method for maintaining power to electrical systems A back-up feed system includes a feed input, a feed output, and a feed switching device. The feed input is coupled with an electrical power source. The feed output can couple with power lines in a power distribution unit at a location downstream from circuit protection devices the power distribution unit. The feed switching device can supply back-up electrical power from the power source to electrical systems in the event of a fault condition in the power distribution unit.
US09041248B2	Control of the distribution of electric power generated by a wind farm between an AC power transmission link and a DC power transmission link A power distribution system for distributing electric power generated by a wind farm between an AC power transmission link and a DC power transmission link is provided. Both power transmission links connect the wind farm to a substation of a power grid. The power distribution system includes a central wind farm controller and a distribution device. In response to a control signal from the central wind farm controller, the distribution device distributes the generated electrical power between the two power transmission links. It is further described a power transmission system with the above described power distribution system and a method for distributing electric power between an AC power transmission link and a DC power transmission link.
US09041244B2	On-board power supply protection The system includes a first and a second power supply terminal configured to have at least one of a battery and a generator connected thereto, a first external terminal coupled to the first power supply terminal, and a second external terminal coupled to the second power supply terminal, and a protection unit connected between the first external terminal and the first power supply terminal. The protection unit includes a semiconductor switching unit having a load path and a control terminal, the load path connected between the first external terminal and the first power supply terminal, and a control circuit coupled to the control terminal of the semiconductor switching unit and configured to switch the switching unit on and off dependent on at least one electrical parameter in the on-board power supply system.
US09041241B2	Systems and methods for powering a charging circuit of a communications interface Embodiments include systems and methods of powering a mobile device using a sink device. The method may include detecting a coupling of the mobile device to the sink device and transmitting an acknowledgement in response to a query, the acknowledgement confirming that the sink device has charging capability. Power may be selectively provided in response to the power request. According to some embodiments, the method includes transmitting a query by a communications transmitter to determine if a sink device has charging capability, and deactivating a driver for a power line and transmitting a power request using the communications transmitter in response to receiving an acknowledgement signal from the sink device. The method may further include selectively providing power received from the sink device to a charging circuit of the mobile device. The mobile device may include an HDMI transmitter for communicating through a transmission line to an HDMI sink device.
US09041240B2	Wind turbine apparatus A wind turbine apparatus includes a wind turbine, a support column supporting the wind turbine, and a turning base as a base for the support column, the turning base including a turning gear and a turning base shaft. By turning the turning gear 360 degrees or more, only the wind turbine, or the support column and the wind turbine can turn 360 degrees or more about a rotating axis of the turning gear.
US09041233B2	Ice detection method and system for wind turbine generators using sun radiation sensors The present invention defines a system and method aiming at measuring the direct solar radiation received by a wind turbine generator in order to detect ice formation. The measured value is subsequently compared to a theoretical radiation curve wherein measured values on a cloudy day will be well below theoretical curves. Ice detection is made considering the presence of clouds and temperature. Measured parameters are preferably the direct sun radiation transmittance and ambient temperature.
US09041228B2	Molding compound including a carbon nano-tube dispersion A molding compound comprising a resin, a filler, and a carbon nano-tube dispersion is disclosed. The carbon nano-tube dispersion achieves a low average agglomeration size in the molding compound thereby providing desirable electromechanical properties and laser marking compatibility. A shallow laser mark may be formed in a mold cap with a maximum depth of less than 10 microns.
US09041227B2	Package-on-package assembly with wire bond vias A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.
US09041222B2	Semiconductor device A semiconductor device is provided, which comprises a first semiconductor package, a second semiconductor package, and a connection structure. The first semiconductor package includes a first substrate. The first substrate includes a first region and a second region. The second semiconductor package is mounted on the first semiconductor package. The connection structure electrically connects the second semiconductor package and the first semiconductor package. The connection structure comprises first connection patterns at the first region. The first connection patterns provide a data signal at the first region. The connection structure further comprises second connection patterns at the second region. The second connection patterns provide a control/address signal at the second region. A number of the second connection patterns is less than a number of the first connection patterns.
US09041221B2	Electronic component implementing structure intermediate body, electronic component implementing structure body and manufacturing method of electronic component implementing structure body An implementing structure intermediate body including: a first chip having a first connection terminal; a second chip having a second connection terminal in a face that faces the first chip; and a film wiring substrate having a third connection terminal in one face, which is arranged between the first chip and the second chip, is loaded on a chip loading substrate having a fifth connection terminal so that another one face of the first chip is confronted thereby. In the film wiring substrate, there is a portion that is located outside any of the first chip and the second chip, at the tip part, is provided a fourth connection terminal connected to the third connection terminal by wiring, one part of the first connection terminal is connected with the second connection terminal, the third connection terminal is connected with another one part of the first connection terminal, and the fifth connection terminal is connected to the fourth connection terminal.
US09041220B2	Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device A semiconductor device includes a die coupled to a substrate, a first memory device coupled to a surface of the die opposite the substrate and a coupling device coupled between the surface of the die opposite the substrate and a second memory device such that the second memory device at least partially overlaps the first memory device. Also disclosed is method of mounting first and second memory devices on a die in an at least partially overlapping manner.
US09041219B2	Multi chip package, manufacturing method thereof, and memory system having the multi chip package A multi-chip package is provided. The multi-chip package includes a plurality of chips including at least one bad chip and at least one good chip that are stacked and a plurality of through electrodes each penetrating the chips. A logic circuit included in the at least one bad chip is isolated from each of the plurality of through electrodes.
US09041217B1	Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate, the first layer including a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. A second layer of the interconnect structure is disposed above the first layer of the interconnect structure, the second layer including a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines of the second grating. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating. First and second dielectric regions are disposed between the metal lines of the first grating and the metal lines of the second grating, and in a same plane as upper portions of the dielectric lines of the first grating and lower portions of the dielectric lines of the second grating. The first dielectric region is composed of a first cross-linked photolyzable material, and the second dielectric region is composed of a second, different, cross-linked photolyzable material.
US09041216B2	Interconnect structure and method of forming the same An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a lower conductive feature in a lower low-k (LK) dielectric layer; a first etch stop layer (ESL) over the lower conductive feature, wherein the first ESL comprises a metal compound; an upper LK dielectric layer over the first ESL; and an upper conductive feature in the upper LK dielectric layer, wherein the upper conductive feature extends through the first ESL and connected to the lower conductive feature. The interconnect structure may further include a second ESL between the upper LK dielectric layer and the first ESL, or between the first ESL and the lower conductive feature, wherein the second ESL comprises a silicon compound.
US09041213B2	Microelectromechanical system devices having through substrate vias and methods for the fabrication thereof Methods for the fabrication of a Microelectromechanical Systems (“MEMS”) devices are provided, as are MEMS devices. In one embodiment, the MEMS device fabrication method includes forming at least one via opening extending into a substrate wafer, depositing a body of electrically-conductive material over the substrate wafer and into the via opening to produce a via, bonding the substrate wafer to a transducer wafer having an electrically-conductive transducer layer, and forming an electrical connection between the via and the electrically-conductive transducer layer. The substrate wafer is thinned to reveal the via through a bottom surface of the substrate wafer, and a backside conductor is produced over a bottom surface of the substrate wafer electrically coupled to the via.
US09041212B2	Thermal design and electrical routing for multiple stacked packages using through via insert (TVI) Some implementations provide a semiconductor package structure that includes a package substrate, a first package, an interposer coupled to the first package, and a first set of through via insert (TVI). The first set of TVI is coupled to the interposer and the package substrate. The first set of TVI is configured to provide heat dissipation from the first package. In some implementations, the semiconductor package structure further includes a heat spreader coupled to the interposer. The heat spreader is configured to dissipate heat from the first package. In some implementations, the first set of TVI is further configured to provide an electrical path between the first package and the package substrate. In some implementations, the first package is electrically coupled to the package substrate through the interposer and the first set of TVI. In some implementations, the first set of TVI includes a dielectric layer and a metal layer.
US09041210B2	Through silicon via wafer and methods of manufacturing A through silicon via with sidewall roughness and methods of manufacturing the same are disclosed. The method includes forming a via in a substrate and roughening a sidewall of the via by depositing material within the via. The method further includes removing a backside of the substrate to form a through via with a roughened sidewall structure.
US09041207B2	Method to increase I/O density and reduce layer counts in BBUL packages An apparatus including a die including a dielectric material on a device side, an insulating layer surrounding a die area and embedding a thickness dimension of the die; and a carrier including a plurality of layers of conductive material disposed on the device side of the die, a first one of the layers of conductive materials being formed on the insulating layer and patterned into traces at least a portion of which are connected to respective contact points on the die. A method including disposing a die on a sacrificial substrate with a device side of the die opposite the sacrificial substrate; disposing a mold on the sacrificial substrate around; introducing an insulating material into a chase of the mold; removing the mold; forming a carrier on the insulating material adjacent a device side of a die; and separating the die and the carrier from the sacrificial substrate.
US09041202B2	Semiconductor device and manufacturing method of the same An object is to provide a semiconductor device with high aperture ratio or a manufacturing method thereof. Another object is to provide semiconductor device with low power consumption or a manufacturing method thereof. A light-transmitting conductive layer which functions as a gate electrode, a gate insulating film formed over the light-transmitting conductive layer, a semiconductor layer formed over the light-transmitting conductive layer which functions as the gate electrode with the gate insulating film interposed therebetween, and a light-transmitting conductive layer which is electrically connected to the semiconductor layer and functions as source and drain electrodes are included.
US09041198B2	Maskless hybrid laser scribing and plasma etching wafer dicing process Maskless hybrid laser scribing and plasma etching wafer dicing processes are described. In an example, a method of dicing a semiconductor wafer having a front surface with a plurality of integrated circuits thereon and having a passivation layer disposed between and covering metal pillar/solder bump pairs of the integrated circuits involves laser scribing, without the use of a mask layer, the passivation layer to provide scribe lines exposing the semiconductor wafer. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, wherein the passivation layer protects the integrated circuits during at least a portion of the plasma etching. The method also involves thinning the passivation layer to partially expose the metal pillar/solder bump pairs of the integrated circuits.
US09041192B2	Hybrid thermal interface material for IC packages with integrated heat spreader Flip chip packages are described that include two or more thermal interface materials (TIMs). A die is mounted to a substrate by solder bumps. A first TIM is applied to the die, and has a first thermal resistance. A second TIM is applied to the die and/or the substrate, and has a second thermal resistance that is greater than the first thermal resistance. An open end of a heat spreader lid is mounted to the substrate such that the die is positioned in an enclosure formed by the heat spreader lid and substrate. The first TIM and the second TIM are each in contact with an inner surface of the heat spreader lid. A ring-shaped stiffener may surround the die and be connected between the substrate and heat spreader lid by the second TIM.
US09041183B2	Power module packaging with double sided planar interconnection and heat exchangers A double sided cooled power module package having a single phase leg topology includes two IGBT and two diode semiconductor dies. Each IGBT die is spaced apart from a diode semiconductor die, forming a switch unit. Two switch units are placed in a planar face-up and face-down configuration. A pair of DBC or other insulated metallic substrates is affixed to each side of the planar phase leg semiconductor dies to form a sandwich structure. Attachment layers are disposed on outer surfaces of the substrates and two heat exchangers are affixed to the substrates by rigid bond layers. The heat exchangers, made of copper or aluminum, have passages for carrying coolant. The power package is manufactured in a two-step assembly and heating process where direct bonds are formed for all bond layers by soldering, sintering, solid diffusion bonding or transient liquid diffusion bonding, with a specially designed jig and fixture.
US09041182B2	Semiconductor package and method of manufacturing the same A semiconductor package according to embodiments includes: a semiconductor chip including a front electrode on a front surface thereof and a back electrode on a back surface thereof; a front-side cap portion including an air gap in a portion between the semiconductor chip and the front-side cap portion and a front-side penetrating electrode, and is positioned to face the front surface of the semiconductor chip; a back-side cap portion bonded with a first cap portion to hermetically seal the semiconductor chip, includes an air gap at least in a portion between the semiconductor chip and the back-side cap portion and a back-side penetrating electrode, and is positioned to face the back surface of the semiconductor chip; a front-side connecting portion which electrically connects the front electrode and the front-side penetrating electrode; and a back-side connecting portion which electrically connects the back electrode and the back-side penetrating electrode.
US09041180B2	Semiconductor package and method of manufacturing the semiconductor package The stack package includes a first semiconductor package and a second semiconductor package. The first semiconductor package includes a first substrate having a first modulus and at least one semiconductor chip mounted on the first substrate. The second semiconductor package stacked on the first semiconductor package and includes a second substrate having a second modulus and at least one semiconductor chip mounted on the second substrate. The second modulus is less than the first modulus. Even in the event that the first semiconductor package is under severe warpage due to a temperature change, the flexible second substrate, which includes e.g., polyimide or poly ethylene terephthalate, of the second semiconductor package may be less sensitive to the temperature change, thereby improving reliability of the stack package.
US09041168B2	Overmolded semiconductor package with wirebonds for electromagnetic shielding According to one exemplary embodiment, an overmolded package includes a component situated on a substrate. The overmolded package further includes an overmold situated over the component and the substrate. The overmolded package further includes a wirebond cage situated over the substrate and in the overmold, where the wirebond cage surrounds the component, and where the wirebond cage includes a number of wirebonds. The wirebond cage forms an EMI shield around the component. According to this exemplary embodiment, the overmolded package further includes a conductive layer situated on a top surface of the overmold and connected to the wirebond cage, where the conductive layer forms an EMI shield over the component.
US09041164B2	Conformal anti-reflective coating In one aspect, a method is disclosed that includes providing a substrate having a topography that comprises a relief and providing an anti-reflective film conformally over the substrate using a molecular layer deposition step. The anti-reflective film may be formed of a compound selected from the group consisting of: (i) an organic compound chemically bound to an inorganic compound, where one of the organic compound and the inorganic compound is bound to the substrate and where the organic compound absorbs light at at least one wavelength selected in the range 150-500 nm, or (ii) a monodisperse organic compound absorbing light at at least one wavelength selected in the range 150-500 nm. The method further includes providing a photoresist layer on the anti-reflective film.
US09041163B2	Semiconductor structure and manufacturing method thereof A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a device layer and a least one conductive post. The substrate includes a first surface, a second surface opposite to the first surface, and at least one through hole penetrating the substrate. The substrate includes a first side wall portion and a second side wall portion at the through hole. The first side wall portion is connected to the first surface and includes a plurality of first scallops. The second side wall portion is connected to the second surface and includes a non-scalloped surface. The device layer is disposed on the second surface, and the second side wall portion of the substrate further extends into the device layer along the non-scalloped surface. The conductive post is disposed in the through hole, wherein the conductive post is electrically connected to the device layer.
US09041162B2	Wafer and a method of dicing a wafer A wafer includes a plurality of chips, each of the chips being spaced from each other by kerf-line regions including a reduced width.
US09041159B2	Epitaxial structure and epitaxial growth method for forming epitaxial layer with cavities An epitaxial growth method includes the steps of: providing a substrate; forming a sacrifice layer on the substrate; patterning the sacrifice layer to form a plurality of bumps spaced apart from each other on the substrate; epitaxially forming a first epitaxial layer on the substrate to cover a portion of each of the bumps; removing the bumps to form a plurality of cavities; and epitaxially forming a second epitaxial layer on the first epitaxial layer such that the cavities are enclosed by the first epitaxial layer and the second epitaxial layer. An epitaxial structure grown by the method is disclosed as well.
US09041156B2	Semiconductor reference voltage generating device A reference voltage generating circuit has more than two first wells each having a first impurity concentration and more than two second wells each having a second impurity concentration different from the first impurity concentration. A first group of MOS transistors has more than two MOS transistors formed in respective ones of the first wells. A second group of MOS transistors has More than two MOS transistors formed in respective ones of the second wells.
US09041155B2	Semiconductor structure A semiconductor structure includes a first capacitor and a second capacitor. The first capacitor includes a plurality of first units and each first unit includes a plurality of first finger electrodes. The second capacitor includes a plurality of second units and each second unit includes a plurality of second finger electrodes. The first units and the second units are alternately arranged to form an array. The semiconductor structure further includes a plurality of first connecting lines and a plurality of second connecting lines being parallel with each other. The first connecting lines are electrically connected to the first finger electrodes, and the second connecting lines are electrically connected to the second finger electrodes. The first finger electrodes and its adjacent first connecting lines form a straight line, and the second finger electrodes and its adjacent second connecting lines form another straight line.
US09041153B2	MIM capacitor having a local interconnect metal electrode and related structure According to one exemplary embodiment, a method for fabricating a metal-insulator-metal (MIM) capacitor in a semiconductor die comprises forming a bottom capacitor electrode over a device layer situated below a first metallization layer of the semiconductor die, and forming a top capacitor electrode over an interlayer barrier dielectric formed over the bottom capacitor electrode. The top capacitor electrode is formed from a local interconnect metal for connecting devices formed in the device layer. In one embodiment, the bottom capacitor electrode is formed from a gate metal. The method may further comprise forming a metal plate in the first metallization layer and over the top capacitor electrode, and connecting the metal plate to the bottom capacitor electrode to provide increased capacitance density.
US09041151B2	Fin eFuse formed by trench silicide process A semiconductor structure and method of manufacturing the same are provided. The semiconductor device includes an enhanced performance electrical fuse formed in a polysilicon fin using a trench silicide process. In one embodiment, at least one semiconductor fin is formed on a dielectric layer present on the surface of a semiconductor substrate. An isolation layer may be formed over the exposed portions of the dielectric layer and the at least one semiconductor fin. At least two contact vias may be formed through the isolation layer to expose the top surface of the semiconductor fin. A continuous silicide may be formed on and substantially below the exposed surfaces of the semiconductor fin extending laterally at least between the at least two contact vias to form an electronic fuse (eFuse). In another embodiment, the at least one semiconductor fin may be subjected to ion implantation to facilitate the formation of silicide.
US09041144B2	Integrated circuitry comprising transistors with broken up active regions Some embodiments include integrated circuits having first and second transistors. The first transistor is wider than the second transistor. The first and second transistors have first and second active regions, respectively. Dielectric features are associated with the first active region and break up the first active region. The second active region is not broken up to the same extent as the first active region. Some embodiments include methods of forming transistors. Active areas of first and second transistors are formed. The active area of the first transistor is wider than the active area of the second transistor. Dielectric features are formed in the active area of the first transistor. The active area of the first transistor is broken up to a different extent than the active area of the second transistor. The active areas of the first and second transistors are simultaneously doped.
US09041143B2	Semiconductor devices The semiconductor device includes a first semiconductor layer of the first conductive type, a second semiconductor layer having the cubic crystalline structure formed on the first semiconductor layer, an electrode formed on the second semiconductor layer, and a reactive region formed between the second semiconductor layer and the electrode. The second semiconductor layer includes an upper surface that is tilted from the (100) plane. The reactive region includes at least one element constituting the second semiconductor layer, at least one element constituting the electrode, and forming a protuberance extending toward the second semiconductor layer.
US09041141B2	Structure and method of fabricating a CZTS photovoltaic device by electrodeposition Techniques for using electrodeposition to form absorber layers in diodes (e.g., solar cells) are provided. In one aspect, a method for fabricating a diode is provided. The method includes the following steps. A substrate is provided. A backside electrode is formed on the substrate. One or more layers are electrodeposited on the backside electrode, wherein at least one of the layers comprises copper, at least one of the layers comprises zinc and at least one of the layers comprises tin. The layers are annealed in an environment containing a sulfur source to form a p-type CZTS absorber layer on the backside electrode. An n-type semiconductor layer is formed on the CZTS absorber layer. A transparent conductive layer is formed on the n-type semiconductor layer. A diode is also provided.
US09041140B2	Grids in backside illumination image sensor chips and methods for forming the same A device includes a semiconductor substrate having a front side and a backside, a photo-sensitive device disposed on the front side of the semiconductor substrate, and a first and a second grid line parallel to each other. The first and the second grid lines are on the backside of, and overlying, the semiconductor substrate. The device further includes an adhesion layer, a metal oxide layer over the adhesion layer, and a high-refractive index layer over the metal layer. The adhesion layer, the metal oxide layer, and the high-refractive index layer are substantially conformal, and extend on top surfaces and sidewalls of the first and the second grid lines.
US09041139B2	Low voltage diode with reduced parasitic resistance and method for fabricating A method of making a diode begins by depositing an AlxGa1-xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n− GaN layer, an AlxGa1-xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au—Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n−, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal; and an ohmic contact is deposited on the n+ layer.
US09041136B2	Avalanche photodiode According to one aspect, there is provided an avalanche photodiode comprising a first semiconductor layer that absorbs photons of a first wavelength range and having a first energy bandgap; a second semiconductor layer that absorbs photons of a second wavelength range and having a second energy bandgap, the second energy bandgap being different from the first energy bandgap; and a control layer between the first semiconductor layer and the second semiconductor layer, the control layer having a third energy bandgap engineered to suppress carriers created from dark current.
US09041131B2	Magnetic tunnel junction device and fabrication A method of forming a magnetic tunnel junction (MTJ) device includes forming a first MTJ cap layer on a MTJ structure. The first MTJ cap layer includes a first non-nitrified metal. The method also includes forming a second MTJ cap layer over the first MTJ cap layer. The second MTJ cap layer includes a second non-nitrified metal. The method further includes forming a top electrode layer over the second MTJ cap layer. The second MTJ cap layer is conductive and configured to reduce or prevent oxidation.
US09041130B2	Magnetic memory device According to one embodiment, a magnetic memory device includes a semiconductor substrate, a memory cell array area on the semiconductor substrate, the memory cell array area including magnetoresistive elements, each of the magnetoresistive elements having a reference layer with an invariable magnetization, a storage layer with a variable magnetization, and a tunnel barrier layer therebetween, a magnetic field generating area which generates a first magnetic field cancelling a second magnetic field applying from the reference layer to the storage layer, and which is separated from the magnetoresistive elements, and a closed magnetic path area functioning as a closed magnetic path of the first magnetic field, and surrounding the memory cell array area and the magnetic field generating area.
US09041129B2	Semiconductor memory storage array device and method for fabricating the same A semiconductor memory storage array device comprises a first electrode layer, an oxide layer, a second electrode layer, a memory material layer and a first insulator layer. The oxide layer is disposed on the first electrode layer. The second electrode layer is disposed on the oxide layer. The memory material layer is disposed on the second electrode layer. The first insulator layer is disposed adjacent to two sidewalls of the first electrode layer, the oxide layer, the second electrode layer and the memory material layer, so to define a gap either between the first electrode layer and the oxide layer or between the second electrode layer and the oxide layer.
US09041128B2	Planar cavity MEMS and related structures, methods of manufacture and design structures A Micro-Electro-Mechanical System (MEMS). The MEMS includes a lower chamber with a wiring layer and an upper chamber which is connected to the lower chamber. A MEMS beam is suspended between the upper chamber and the lower chamber. A lid structure encloses the upper chamber, which is devoid of structures that interfere with a MEMS beam. The lid structure has a surface that is conformal to a sacrificial material vented from the upper chamber.
US09041126B2	Deeply depleted MOS transistors having a screening layer and methods thereof A semiconductor transistor structure fabricated on a silicon substrate effective to set a threshold voltage, control short channel effects, and control against excessive junction leakage may include a transistor gate having a source and drain structure. A highly doped screening region lies is embedded a vertical distance down from the surface of the substrate. The highly doped screening region is separated from the surface of the substrate by way of a substantially undoped channel layer which may be epitaxially formed. The source/drain structure may include a source/drain extension region which may be raised above the surface of the substrate. The screening region is preferably positioned to be located at or just below the interface between the source/drain region and source/drain extension portion. The transistor gate may be formed below a surface level of the silicon substrate and either above or below the heavily doped portion of the source/drain structure.
US09041124B2	Semiconductor memory device and method of manufacturing the same A semiconductor memory device and a method of manufacturing the same are provided. The device includes a semiconductor substrate in which active regions and isolation regions are alternately defined, and a support region is defined in a direction crossing the active regions and the isolation regions, first trenches formed in the isolation regions, second trenches formed under the first trenches in the active regions and the isolation regions; and a support layer formed under the first trenches in the support region.
US09041123B2	Thin film transistors and high fill factor pixel circuits and methods for forming same A method and structures to achieve improved TFTs and high fill-factor pixel circuits are provided. This system relies on the fact that jet-printed lines have print accuracy, which means the location and the definition of the printed lines and dots is high. The edge of a printed line is well defined if the printing conditions are optimized. This technique utilizes the accurate definition and placement of the edges of printed lines of conductors and insulators to define small features and improved structures.
US09041122B2	Semiconductor devices having metal silicide layers and methods of manufacturing such semiconductor devices Provided are a semiconductor device and a method of manufacturing the semiconductor device. In order to improve reliability by solving a problem of conductivity that may occur when an air spacer structure that may reduce a capacitor coupling phenomenon between a plurality of conductive lines is formed, there are provided a semiconductor device including: a substrate having an active region; a contact plug connected to the active region; a landing pad spacer formed to contact a top surface of the contact plug; a contact conductive layer formed to contact the top surface of the contact plug and formed in a space defined by the landing pad spacer; a metal silicide layer formed on the contact conductive layer; and a landing pad connected to the contact conductive layer in a state in which the metal silicide layer is disposed between the landing pad and the contact conductive layer, and a method of manufacturing the semiconductor device.
US09041117B2	SRAM cell connection structure A Static Random Access Memory (SRAM) cell includes a first pull-up transistor and a second pull-up transistor, and a first pull-down transistor and a second pull-down transistor forming cross-latched inverters with the first pull-up transistor and the second pull-up transistor. A conductive feature includes a first leg having a first longitudinal direction, wherein the first leg interconnects a drain of the first pull-up transistor and a drain of the first pull-down transistor. The conductive feature further includes a second leg having a second extending direction. The first longitudinal direction and the second extending direction are un-perpendicular and un-parallel to each other. The second leg interconnects the drain of the first pull-up transistor and a gate of the second pull-up transistor.
US09041116B2	Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs) A method for forming an electrical device that includes forming a high-k gate dielectric layer over a semiconductor substrate that is patterned to separate a first portion of the high-k gate dielectric layer that is present on a first conductivity device region from a second portion of the high-k gate dielectric layer that is present on a second conductivity device region. A connecting gate conductor is formed on the first portion and the second portion of the high-k gate dielectric layer. The connecting gate conductor extends from the first conductivity device region over the isolation region to the second conductivity device region. One of the first conductivity device region and the second conductivity device region may then be exposed to an oxygen containing atmosphere. Exposure with the oxygen containing atmosphere modifies a threshold voltage of the semiconductor device that is exposed.
US09041115B2	Structure for FinFETs An SRAM array is formed by a plurality of FinFETs formed by fin lines. Each fin line is formed in a substrate, wherein a bottom portion of the fin line is enclosed by an isolation region and an upper portion of the fin line protrudes above a top surface of the isolation region. From a first cross sectional view of the SRAM array, each fin line is of a rectangular shape. From a second cross sectional view of the SRAM array, the terminals of each fin line is of a tapered shape.
US09041112B2	Semiconductor device including a current mirror circuit In a semiconductor device, where, with respect to a parasitic resistor in a current mirror circuit, a compensation resistor for compensating the parasitic resistor is provided in the current mirror circuit, the current mirror circuit includes at least two thin film transistors. The thin film transistors each have an island-shaped semiconductor film having a channel formation region and source or drain regions, a gate insulating film, a gate electrode, and source or drain electrodes, and the compensation resistor compensates the parasitic resistor of any one of the gate electrode, the source electrode, and the drain electrode. In addition, each compensation resistor has a conductive layer containing the same material as the gate electrode, the source or drain electrodes, or the source or drain regions.
US09041108B2	MOSFET with recessed channel film and abrupt junctions MOSFETs and methods for making MOSFETs with a recessed channel and abrupt junctions are disclosed. The method includes creating source and drain extensions while a dummy gate is in place. The source/drain extensions create a diffuse junction with the silicon substrate. The method continues by removing the dummy gate and etching a recess in the silicon substrate. The recess intersects at least a portion of the source and drain junction. Then a channel is formed by growing a silicon film to at least partially fill the recess. The channel has sharp junctions with the source and drains, while the unetched silicon remaining below the channel has diffuse junctions with the source and drain. Thus, a MOSFET with two junction regions, sharp and diffuse, in the same transistor can be created.
US09041106B2	Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates are described. For example, a semiconductor device includes a semiconductor substrate. An insulating structure is disposed above the semiconductor substrate. A three-dimensional germanium-containing body is disposed on a semiconductor release layer disposed on the insulating structure. The three-dimensional germanium-containing body includes a channel region and source/drain regions on either side of the channel region. The semiconductor release layer is under the source/drain regions but not under the channel region. The semiconductor release layer is composed of a semiconductor material different from the three-dimensional germanium-containing body. A gate electrode stack surrounds the channel region with a portion disposed on the insulating structure and laterally adjacent to the semiconductor release layer.
US09041102B2	Power transistor and associated method for manufacturing The present disclosure discloses a lateral transistor and associated method for making the same. The lateral transistor comprises a gate formed over a first portion of a thin gate dielectric layer, and a field plate formed over a thick field dielectric layer and extending atop a second portion of the thin gate dielectric layer. The field plate is electrically isolated from the gate by a gap overlying a third portion of the thin gate dielectric layer and is electrically coupled to a source region. The lateral transistor according to an embodiment of the present invention may have reduced gate-to-drain capacitance, low specific on-resistance, and improved hot carrier lifetime.
US09041093B2	Semiconductor memory device and manufacturing method thereof The semiconductor memory device of the present invention includes a plurality of memory strings having a plurality of electrically reprogrammable memory cells connected in series, the memory strings having a column shaped semiconductor, a first insulation film formed around the column shaped semiconductor, a charge accumulation layer formed around the first insulation film, a second insulation film formed around the charge accumulation film and a plurality of electrodes formed around the second insulation film, a bit line connected to one end of the memory strings via a plurality of selection transistors, and a conducting layer extending in two dimensions and in which the plurality of electrodes of the memory strings and the plurality of electrodes of different memory strings are shared respectively, wherein each end part of the conducting layer is formed in step shapes in a direction parallel with the bit line.
US09041089B2	Nonvolatile memory structure A nonvolatile memory structure includes a substrate having thereon a first, a second, and a third OD regions arranged in a row. The first, second, and third OD regions are separated from one another by an isolation region. The isolation region includes a first intervening isolation region between the first OD region and the second OD region, and a second intervening isolation region between the second the third OD region. A first select transistor is formed on the first OD region. A floating gate transistor is formed on the second OD region. The floating gate transistor is serially coupled to the first select transistor. The floating gate transistor includes a floating gate completely overlapped with the second OD region and is partially overlapped with the first and second intervening isolation regions. A second select transistor is on the third OD region and serially coupled to the floating gate transistor.
US09041085B2	Semiconductor device and method of forming the same A semiconductor device may include, but is not limited to, a semiconductor substrate having a first gate groove; a first fin structure underneath the first gate groove; a first diffusion region in the semiconductor substrate, the first diffusion region covering an upper portion of a first side of the first gate groove; and a second diffusion region in the semiconductor substrate. The second diffusion region covers a second side of the first gate groove. The second diffusion region has a bottom which is deeper than a top of the first fin structure.
US09041083B2	Flux-closed STRAM with electronically reflective insulative spacer Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer.
US09041081B2	Image sensors having buried light shields with antireflective coating An image sensor with an array of image sensor pixels is provided. Each image pixel may include a photodiode and associated pixel circuits formed in a semiconductor substrate. Buried light shielding structures may be formed on the substrate to prevent pixel circuitry that is formed in the substrate between two adjacent photodiodes from being exposed to incoming light. The buried light shielding structures may be lined with absorptive antireflective coating material to prevent light from being reflected off the surface of the buried light shielding structures. Forming buried light shielding structures with absorptive antireflective coating material can help reduce optical pixel crosstalk and enhance global shutter efficiency.
US09041080B2	Semiconductor optical element To provide a light-emitting element where electrons are efficiently injected into a Ge light emission layer and light can be efficiently emitted, the light-emitting element has a barrier layer 3 which is formed on an insulating film 2, worked in a size in which quantum confinement effect manifests and made of monocrystalline Si, a p-type diffused layer electrode 5 and an n-type diffused layer electrode 6 respectively provided at both ends of the barrier layer 3, and a monocrystalline Ge light emission part 13 provided on the barrier layer 3 between the electrodes 5, 6. At least a part of current that flows between the electrodes 5, 6 flows in the barrier layer 3 in a horizontal direction with respect to a substrate 1.
US09041076B2	Partial sacrificial dummy gate with CMOS device with high-k metal gate A gate structure in a semiconductor device includes: a gate stack formed on a substrate with three sections: a bottom portion, a top portion, and a sacrificial cap layer over the top portion; gate spacers; source and drain regions; a nitride encapsulation over top and sidewalls of the gate stack after removal of the sacrificial cap layer; an organic planarizing layer over the nitride encapsulation, planarizing the encapsulation; and silicidation performed over the source and drain regions and the bottom portion after removal of the nitride encapsulation, the organic planarizing layer, and the top portion of the gate stack.
US09041074B2	Multilayered circuit type antenna package A multilayered antenna package including: a radio frequency integrated circuit (RFIC) interface layer that is configured to transmit a radio frequency (RF) signal; a first dielectric layer that is disposed on the RFIC interface layer; a coplanar waveguide layer that is disposed on the first dielectric layer and is configured to receive the RF signal transmitted by RFIC layer; a second dielectric layer disposed on the coplanar waveguide layer; and an antenna portion that is disposed on the second dielectric layer and is configured to irradiate a signal that is transmitted from the coplanar waveguide layer.
US09041068B2	3D semiconductor device and 3D logic array structure thereof A 3D semiconductor device and a 3D logic array structure thereof are provided. The 3D semiconductor device includes an array structure, a periphery line structure and a 3D logic array structure. The array structure has Y contacts located at a side of the array structure. Y is within MN-1 to MN. Y, M and N are natural numbers. M is larger or equal to 2. The 3D logic array structure includes N sets of gate electrodes, an input electrode and Y output electrodes. Each set of the gate electrodes has M gate electrodes. The Y output electrodes connect the Y contacts. The M·N gate electrodes and the input electrode connect the periphery line structure.
US09041067B2	Integrated half-bridge circuit with low side and high side composite switches There are disclosed herein various implementations of an integrated half-bridge circuit with low side and high side composite switches. In one exemplary implementation, such an integrated half-bridge circuit includes a III-N body including first and second III-N field-effect transistors (FETs) monolithically integrated with and situated over a first group IV FET. The integrated half-bridge circuit also includes a second group IV FET stacked over the III-N body. The first group IV FET is cascoded with the first III-N FET to provide one of the low side and the high side composite switches, and the second group IV FET is cascoded with the second III-N FET to provide the other of the low side and the high side composite switches. The first and second III-N FETs are normally ON FETs, and the low side composite switch and the high side composite switch are normally OFF switches
US09041064B2	High voltage GaN transistor A multiple field plate transistor includes an active region, with a source, drain, and gate. A first spacer layer is between the source and the gate and a second spacer layer between the drain and the gate. A first field plate on the first spacer layer and a second field plate on the second spacer layer are connected to the gate. A third field plate connected to the source is on a third spacer layer, which is on the gate and the first and second field plates and spacer layers. The transistor exhibits a blocking voltage of at least 600 Volts while supporting current of at least 2 or 3 Amps with on resistance of no more than 5.0 or 5.3 mΩ-cm2, respectively, and at least 900 Volts while supporting current of at least 2 or 3 Amps with on resistance of no more than 6.6 or 7.0 mΩ-cm2, respectively.
US09041062B2	Silicon-on-nothing FinFETs A semiconductor device includes an insulator formed within a void to electrically isolate a fin from an underlying substrate. The void is created by removing a doped sacrificial layer formed between the substrate and a fin layer. The sacrificial layer is doped to allow for a thicker layer relative to an un-doped layer of substantially similar composition. The doped sacrificial layer thickness may be between 10 nm and 250 nm and may be carbon doped silicon-germanium. The thicker sacrificial layer allows for a thicker insulator so as to provide adequate electrical isolation between the fin and the substrate. During formation of the void, the fin may be supported by a dummy gate. The semiconductor structure may also include a bulk region that has at least a maintained portion of the doped sacrificial layer.
US09041058B2	Metal oxide semiconductor having epitaxial source drain regions and method of manufacturing same using dummy gate process A method of manufacturing a transistor by which sufficient stress can be applied to a channel region within allowable ranges of concentrations of Ge and C in a mixed crystal layer. A semiconductor device is also provided.
US09041051B2	Semiconductor device An insulated gate bipolar transistor having a gate electrode (7) and an emitter electrode (9) is provided in a transistor region. A termination region is arranged around the transistor region. A first N type buffer layer (18) is provided below an N type drift layer (1) in the transistor region. A P type collector layer (19) is provided below the first N type buffer layer (18). A second N type buffer layer (20) is provided below the N type drift layer (1) in the termination region. A collector electrode (21) is directly connected to the P type collector layer (19) and the second N type buffer layer (20). An impurity concentration of the second N type buffer layer (20) decreases as a distance from the collector electrode (21) decreases. The second N type buffer layer (20) does not form any ohmic contact with the collector electrode (21).
US09041049B2	Power JFET In general, in a semiconductor active element such as a normally-off JFET based on SiC in which an impurity diffusion speed is significantly lower than in silicon, gate regions are formed through ion implantation into the side walls of trenches formed in source regions. However, to ensure the performance of the JFET, it is necessary to control the area between the gate regions thereof with high precision. Besides, there is such a problem that, since a heavily doped PN junction is formed by forming the gate regions in the source regions, an increase in junction current cannot be avoided. The present invention provides a normally-off power JFET and a manufacturing method thereof and forms the gate regions according to a multi-epitaxial method which repeats a process including epitaxial growth, ion implantation, and activation annealing a plurality of times.
US09041034B2	Light emitting diode component comprising polysilazane bonding layer In one embodiment, a semiconductor component, such as a wavelength converter wafer, is described wherein the wavelength converter is bonded to an adjacent inorganic component with a cured bonding layer comprising polysilazane polymer. The wavelength converter may be a multilayer semiconductor wavelength converter or an inorganic matrix comprising embedded phosphor particles. In another embodiment, the semiconductor component is a pump LED component bonded to an adjacent component with a cured bonding layer comprising polysilazane polymer. The adjacent component may the described wavelength converter(s) or another component comprised of inorganic material(s) such as a lens or a prism. Also described are methods of making semiconductor components such as wavelength converters and LED's.
US09041029B2	Light emitting diode A light emitting diode including a substrate, a first semiconductor layer, an active layer, and a second semiconductor layer is provided. The substrate includes a first surface and a second surface, and the second surface is a light emitting surface of the LED. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked on the first surface in that order. A first electrode electrically is connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer. A number of three-dimensional nano-structures are located on at least one surface of the substrate and aligned side by side, and a cross section of each of the three-dimensional nano-structure is M-shaped.
US09041027B2	Methods of producing free-standing semiconductors using sacrificial buffer layers and recyclable substrates A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a spinel substrate using a sacrificial buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The sacrificial buffer material and semiconductor materials may be deposited using lattice-matching epitaxy or coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The sacrificial buffer layer may be dissolved using an epitaxial liftoff technique in order to separate the semiconductor device from the spinel substrate, and the spinel substrate may be reused in the subsequent fabrication of other semiconductor devices. The low-defect density semiconductor materials produced using this method result in the enhanced performance of the semiconductor devices that incorporate the semiconductor materials.
US09041016B2	LED module An LED module includes a substrate, one or more LED chips supported by a main surface of the substrate, and wirings. The substrate has one or more through holes penetrating from the main surface to a rear surface. The wirings are formed on the substrate and make electrical conduction with the LED chips. The wirings include pads which are formed on the main surface and make electrical conduction with the LED chips, rear surface electrodes which are formed on the rear surface, and through wirings which make electrical conduction between the pads and the rear surface electrodes and are formed on the inner sides of the through holes.
US09041013B2	Light emitting device and lighing system having the same Provided is a light emitting device. The light emitting device includes a plurality of metal layers spaced from each other, a first insulation film having an opened area in which a portion of the plurality of metal layers is opened, the first insulation film being disposed around top surfaces of the plurality of metal layers, a light emitting chip disposed on at least one of the plurality of metal layers, the light emitting chip being electrically connected to the other metal layer, a resin layer disposed on the plurality of metal layers and the light emitting chip, and a first guide member formed of a non-metallic material, the first guide member being disposed on the first insulation film.
US09041011B2	Modular power converter having reduced switching loss In one implementation, a modular power converter having a reduced switching loss includes a package, a field-effect transistor (FET) including a gate terminal, a drain terminal, and a source terminal, and fabricated on a semiconductor die situated inside the package, and a driver circuit inside the package. The driver circuit is configured to drive the gate terminal of the FET. The driver circuit is further configured to sample a drain-to-source voltage (VDS) of the FET directly from the drain terminal and the source terminal, thereby enabling the reduced switching loss.
US09041010B2	Wide band gap semiconductor wafers grown and processed in a microgravity environment and method of production Wide band gap semiconductor wafers with previously unattainable characteristics and the method of processing and producing the same are disclosed and claimed herein. Specifically, the application discloses and claims a method to process silicon carbide and other similar wide band gap semiconductors in a microgravity environment. The wafers are placed onto stackable containment systems that create an appropriate gap between each wafer to allow for homogeneous heating and processing. The resulting wide band gap semiconductors have unique molecular structures not attainable when wide band gap semiconductors with the identical chemical composition are produced in a standard 1 gravity environment.
US09041009B2	Method and structure for forming high-K/metal gate extremely thin semiconductor on insulator device A semiconductor device is provided that includes a gate structure present on a substrate. The gate structure includes a gate conductor with an undercut region in sidewalls of a first portion of the gate conductor, wherein a second portion of the gate conductor is present over the first portion of the gate conductor and includes a protruding portion over the undercut region. A spacer is adjacent to sidewalls of the gate structure, wherein the spacer includes an extending portion filling the undercut region. A raised source region and a raised drain region is present adjacent to the spacers. The raised source region and the raised drain region are separated from the gate conductor by the extending portion of the spacers.
US09041007B2	Semiconductor device A MOSFET cell of a semiconductor device includes a polysilicon gate electrode and an n+-source region formed in an upper portion of an n−-drift layer. An interlayer insulating film covers the gate electrode. An Al source electrode extends on the interlayer insulating film. An Al gate pad is connected to the gate electrode. A barrier metal layer that prevents diffusion of aluminum is interposed between the source electrode and the interlayer insulating film, and between the gate pad and the gate electrode.
US09041006B2	Silicon carbide MOS semiconductor device A silicon carbide MOS semiconductor device is disclosed which suppresses degradation of efficiency percentage yield with respect to a breakdown voltage even when a surface region with a high impurity concentration is formed by ion implantation with such a high dose as required for attaining a good ohmic contact. The device has a silicon carbide semiconductor substrate, a voltage blocking layer of a first conductivity type formed on the substrate, a body region of a second conductivity type formed on the voltage blocking layer, a body contact region of the second conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the body contact region having such a high impurity concentration as to impart an ohmic contact, a source contact region of the first conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the source contact region having such a high impurity concentration as to impart an ohmic contact, and a source extension region with an impurity concentration lower than that in the source contact region under the source contact region at a region deeper than a tail part of a bottom region of the source contact region by selective ion implantation, the source extension region having an impurity concentration less than 3×1019 cm−3.
US09041003B2	Semiconductor devices having a recessed electrode structure An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.
US09040996B2	Light emitting device and electronic appliance The present invention is to provide a light emitting device capable of obtaining a certain luminance without influence by the temperature change, and a driving method thereof. A current mirror circuit formed by using a transistor is provided for each pixel. The first transistor and the second transistor of the current mirror circuit are connected such that the drain currents thereof are maintained at proportional values regardless of the load resistance value. Thereby, a light emitting device capable of controlling the OLED driving current and the luminance of the OLED by controlling the drain current of the first transistor at a value corresponding to a video signal in a driving circuit, and supplying the drain current of the second transistor to the OLED, is provided.
US09040995B2	Semiconductor device and method for manufacturing the same A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region.
US09040994B2	Thin film transistor, display device and manufacturing thereof, display apparatus A thin-film transistor (TFT) comprises a gate electrode, a gate insulating layer, a source electrode and a drain electrode which are formed on a base substrate, the source electrode and the drain electrode are disposed on different layers and isolated from each other through a semiconductor connecting section made of an oxide semiconductor material; a position of the semiconductor connecting section corresponds to a position of the gate electrode; and at least one part of the source electrode and at least one part of the drain electrode overlap each other at a position corresponding to the semiconductor connecting section. A display device comprising the TFT and a display device comprising the display device are also disclosed.
US09040993B2	Organic light-emitting display apparatus and method of manufacturing the same An organic light-emitting display apparatus and a method of manufacturing the same. The organic light-emitting display apparatus includes an organic light-emitting device in which a pixel electrode, an intermediate layer that includes an emissive layer, and a cathode electrode are sequentially stacked. The cathode contact unit includes a cathode bus line that is formed on the same layer as the pixel electrode and contacts the cathode electrode, a first auxiliary electrode that is formed on the cathode bus line along an edge area of the cathode bus line, and a second auxiliary electrode that contacts the first auxiliary electrode.
US09040991B2	Pixel structure of organic light emitting device A pixel structure including a first scan line, a second scan line, a data line and a power line substantially perpendicular to the first scan line and the second scan line, a reference signal line and an emission signal line substantially parallel with the first scan line and the second scan line, a common thin film transistor (C-TFT), a first pixel unit, and a second pixel unit is provided. The common thin film transistor has a common gate electrode, a common source electrode and a common drain electrode. The common gate electrode is electrically connected to the first scan line, the common drain electrode is electrically connected to the reference signal line. The first and the second pixel units respectively have a first TFT, a second TFT, a third TFT, a fourth TFT, a fifth TFT, a sixth TFT, a capacitor, and an emission device.
US09040989B2	Semiconductor device and manufacturing method thereof One embodiment of the present invention is to achieve high mobility in a device using an oxide semiconductor and provide a highly reliable display device. An oxide semiconductor layer including a crystal region in which c-axis is aligned in a direction substantially perpendicular to a surface is formed and an oxide insulating layer is formed over and in contact with the oxide semiconductor layer. Oxygen is supplied to the oxide semiconductor layer by third heat treatment. A nitride insulating layer containing hydrogen is formed over the oxide insulating layer and fourth heat treatment is performed, so that hydrogen is supplied at least to an interface between the oxide semiconductor layer and the oxide insulating layer.
US09040986B2	Three dimensional integrated circuit having a resistance measurement structure and method of use A three-dimensional integrated circuit (3DIC) including a top chip having at least one active device and an interposer having conductive routing layers and vias. The 3DIC further includes a plurality of conductive connectors configured to electrically connect the top chip and the interposer. The 3DIC further includes a conductive line over at least one of the top chip or the interposer. The conductive line traces a perimeter of top chip or interposer parallel to an outer edge of the top chip or interposer. The conductive line is configured to electrically connect the conductive connectors. The 3DIC further includes at least one testing element over at least one of the top chip or the interposer. The testing element is configured to electrically connect to the plurality of conductive connectors.
US09040983B2	Passivation layer structure of semiconductor device and method for forming the same A passivation layer structure of a semiconductor device is provided, which includes a passivation layer formed of halogen-doped aluminum oxide and disposed on a semiconductor layer on a substrate, in which the semiconductor layer includes indium gallium zinc oxide (IGZO) or nitride-based III-V compounds. A method for forming the passivation layer structure of a semiconductor device is also disclosed.
US09040982B2	Device with light-responsive layers An electrical device with light-responsive layers is disclosed. One or more electrically conducting stripes, each insulated from each other, are deposited on a smooth surface of a substrate. Then metal oxide layers, separated by a composite diffusion layer, are deposited. On top of the topmost metal oxide layer another set of elongated conductive strips are disposed in contact with the topmost metal oxide layer such that junctions are formed wherever the top and bottom conducting stripes cross. The resulting device is light responsive only when a certain sign of bias voltage is applied and may be used as a photodetector. An advantage that may be realized in the practice of some disclosed embodiments of the device is that this device may be formed without the use of conventional patterning, thereby significantly reducing manufacturing difficulty.
US09040978B2	Organic electroluminescence display device and method of manufacturing the same A sealing film includes a first inorganic layer that has, in a surface thereof, a convex portion corresponding to an upper surface of an element layer, a second inorganic layer that covers the first inorganic layer, and an organic layer disposed between these layers. The surface of the first inorganic layer includes a recurved area changed from an area around the convex portion to the convex portion, and a flat area surrounding the element layer. The flat area includes an outer peripheral area on an outer end of the first inorganic layer, and an inner peripheral area between the outer peripheral area and the recurved area. The organic layer has an end in the outer peripheral area, has another portion in the recurved area, and avoids the inner peripheral area. A part of the second inorganic layer contacts the first inorganic layer in the inner peripheral area.
US09040977B2	Organic EL element having at least one organic light-emitting layers formed of a mixture containing a polymer material and method for manufacturing the organic EL element To form stabilized organic light-emitting medium layers using the relief printing method and to provide an organic EL element excellent in terms of pattern-forming accuracy, film thickness uniformity and light-emitting characteristics, a substrate 2, first electrode layers 3 provided on the substrate 2, organic light-emitting medium layers 5 which are provided on the first electrode layers 3 and emit light when electrically connected, and second electrodes 6 which are provided on the organic light-emitting medium layers 5 and make the organic light-emitting medium layers 5 electrically connected when voltage is applied between the first electrodes 3 and the second electrodes are provided. In addition, at least one of the organic light-emitting medium layers 5 is formed of a mixture containing a polymer material having a weight-average molecular weight in a range of 1.5 million to 25 million and at least one low molecular material having a non-repetitive structure. Also, the mixing ratio between the polymer material and the low molecular material is set in a range of 0.05:1 to 0.5:1 in terms of weight ratio.
US09040975B2	Organic electroluminescence element, illumination device, and display device The purpose of the present invention is to provide: an organic electroluminescence element having a plurality of light-emitting dopants of different light-emitting wavelengths and emitting white light, the white-light-emitting organic electroluminescence element having excellent longevity, low-voltage driving, and chromatic stability, and also having a few dark spots; as well as an illumination device and a display device that use the element. This organic electroluminescence element contains at least one light-emitting layer sandwiched between a positive electrode and a negative electrode, the organic electroluminescence element characterized in that the light-emitting layer contribution ratio, defined as the ratio ΔPL/ΔEL of the photoluminescence intensity decay rate to the electroluminescence intensity decay rate, is 0.3 to 1.0.
US09040971B2	Thin film transistor and organic light emitting pixel having the same A thin film transistor (TFT) that includes a control electrode, a semiconductor pattern, a first input electrode, a second input electrode, and an output electrode is disclosed. in one aspect, the semiconductor pattern includes a first input area, a second input area, a channel area, and an output area. The channel area is formed between the first input area and the output area and overlapped with the control electrode to be insulated from the control electrode. The second input area is formed between the first input area and the channel area and doped with a doping concentration different from a doping concentration of the first input areas. The second input electrode makes contact with the second input area and receives a control voltage to control a threshold voltage.
US09040969B2	Organic electroluminescence display device and method for manufacturing the same The organic electroluminescence display device has a laminated portion on a base substrate. The device may have a cavernous portion formed by exploding a part of the laminated portion in a screening processing. A protective layer is formed to cover a whole surface of a wall defining the cavernous portion. Therefore, substances contained in the air are prevented from contacting to an organic electroluminescence layer at least partially defining the cavernous portion. Therefore, even if moisture is contained in the air, it is possible to prevent moisture from being absorbed by the organic electroluminescence layer. Moreover, since moisture is not absorbed by the organic electroluminescence layer, it is possible to reduce irregular spot on the device. In addition, it is possible to reduce a short circuit at an open defective portion.
US09040964B2	Thin film semiconductor device and organic light-emitting display apparatus An apparatus and a method of manufacturing a thin film semiconductor device having a thin film transistor with improved electrical properties in organic light-emitting display apparatus are described.
US09040963B2	Organic light emitting device Provided is an organic light emitting device. The organic light emitting device comprising a first light emitting part on a substrate, emitting a first light of a first wavelength, wherein the first light emitting part includes a transparent first electrode, a first organic light emitting layer, and a transparent second electrode sequentially stacked on the substrate, a second light emitting part on the first light emitting part, emitting a second light of a second wavelength, wherein the second light emitting part includes a transparent third electrode, a second organic light emitting layer, and a reflective fourth electrode sequentially stacked on the first light emitting part, and a fluorescent material disposed at least one between the substrate and the first light emitting part, and between the first light emitting part and second light emitting part.
US09040960B2	Heterojunction tunneling field effect transistors, and methods for fabricating the same The present invention relates to a heterojunction tunneling effect transistor (TFET), which comprises spaced apart source and drain regions with a channel region located therebetween and a gate stack located over the channel region. The drain region comprises a first semiconductor material and is doped with a first dopant species of a first conductivity type. The source region comprises a second, different semiconductor material and is doped with a second dopant species of a second, different conductivity type. The gate stack comprises at least a gate dielectric and a gate conductor. When the heterojunction TFET is an n-channel TFET, the drain region comprises n-doped silicon, while the source region comprises p-doped silicon germanium. When the heterojunction TFET is a p-channel TFET, the drain region comprises p-doped silicon, while the source region comprises n-doped silicon carbide.
US09040957B2	Field effect transistor using graphene According to example embodiments, a field effect transistor includes a graphene channel layer on a substrate. The graphene channel layer defines a slit. A source electrode and a drain electrode are spaced apart from each other and arranged to apply voltages to the graphene channel layer. A gate insulation layer is between the graphene channel layer and a gate electrode.
US09040942B1	Electron beam lithography with linear column array and rotary stage One embodiment relates to an apparatus for electron beam lithography which includes a linear array of reflection electron beam lithography columns and a rotary stage. Each column is separately controllable to write a portion of a lithographic pattern onto a substrate. The rotary stage is configured to hold multiple substrates and to be rotated under the linear array of reflection electron beam lithography columns. Another embodiment relates to a method of electron beam lithography which includes simultaneously rotating and linearly translating a stage holding a plurality of wafers, and writing a lithography pattern using a linear array of reflection electron beam lithography columns over the stage. Each said column traverses a spiral path over the stage as the stage is rotated and linearly translated. Other embodiments, aspects and feature are also disclosed.
US09040940B2	Scintillator panel and production method thereof, flat panel detector and production method thereof Disclosed is a scintillator panel provided with on a support a phosphor layer comprising columnar crystals and a protective layer sequentially in this order, wherein degraded areas on lateral surfaces of columnar crystals at an end of the phosphor layer and produced by a cutting treatment account for not less than 0% and not more than 40% of an area of all of the side surfaces of the columnar crystals. A production method of the scintillator panel is also disclosed.
US09040938B2	Device comprising a source for emitting ultraviolet light A device (1) comprises a source (20) for emitting ultraviolet light, an inlet (30) for letting in fluid to the device (1), an outlet (40) for letting out fluid from the device (1), and means (51, 52) for performing a straightening action of a flow of fluid through the device (1). The flow straightening means comprise at least one flow straightening element (51, 52) having inlet openings for letting in fluid at one side and outlet openings for letting out fluid at another side, wherein each inlet opening is in communication with a plurality of outlet openings, and wherein the element (51, 52) comprises a maze of randomly arranged, interconnected holes. In such a structure, a water element that is moving from one side of the element (51, 52) to another side may take one of various paths, as a result of which variations in inlet conditions can be dampened.
US09040936B1	Bunch length compression method for free electron lasers to avoid parasitic compressions A method of bunch length compression method for a free electron laser (FEL) that avoids parasitic compressions by 1) applying acceleration on the falling portion of the RF waveform, 2) compressing using a positive momentum compaction (R56>0), and 3) compensating for aberration by using nonlinear magnets in the compressor beam line.
US09040934B2	Two-dimensional detection system for neutron radiation in the field of neutron scattering spectrometry This invention relates to a two-dimensional detection system for neutron radiation comprising a means (1) for emitting a neutron beam (10), a support means (2) adapted for receiving a sample (3), a photoemission means (5) adapted for being activated by a neutron radiation, a cooled low light level charge-coupled detection device (7). The emission means (1) emits a monochromatic neutron beam (10). The system further comprises a filter means (4), the filter means (4) being located between the support means (2) and the photoemission means (5) and being adapted for trapping at least a substantial part of the monochromatic neutron beam transmitted (12) by the sample (3), and an amplification means (6) located upstream the charge-coupled detection device (7) and coupled with the charge-coupled detection device (7).
US09040932B2	Surface contamination monitoring system and method A surface contamination monitoring system/method configured to correct the detected the radioactive net count rate (NCR) value of a whole-body surface contamination monitoring device based on monitored subject height and thickness is disclosed. The system includes a height detection means for determining the height of a monitored subject and a thickness detection means for determining the thickness of at least a portion of the monitored subject. The net count rate (NCR) is corrected based on the determined height and thickness of the monitored subject as applied to site calibration factor data and self-shielding factor data to produce a corrected net count rate (CNR). If the corrected net count rate (CNR) registers above a preset alarm threshold, the monitored subject is considered contaminated and an appropriate alarm is registered.
US09040928B2	Detection of ionising radiation A detector for detecting ionizing radiation comprises a scintillator 10 selected to emit light in response to incidence thereon of radiation to be detected, at least one detector 16 for detecting said emitted light, and at least one optical waveguide 12 for transmitting said emitted light to said detector 16. The optical waveguide typically comprises a flexible solid or hollow fiber that can be incorporated into a flexible mat or into a fiber-reinforced structure, so that the detector is integrated therewith.
US09040922B2	THz frequency range antenna A THz frequency range antenna is provided which comprises: a semiconductor film (3) having a surface adapted to exhibit surface plasmons in the THz frequency range. The surface of the semiconductor film (3) is structured with an antenna structure (4) arranged to support localized surface plasmon resonances in the THz frequency range.
US09040919B2	Photomixer-waveguide coupling tapers Disclosed are systems and methods for improving the performance of systems for generating and detecting electromagnetic radiation at terahertz (THz) frequencies. Embodiments of the systems and methods include the fabrication and use of coupling tapers to provide efficient transfer of THz radiation between a photomixer and a waveguide that supports a propagating THz mode. A representative system comprises of a photomixer to convert high-frequency components of an optical pump signal into corresponding electrical THz frequencies, a waveguide that supports a propagating THz mode, and a matching taper that effectively converts the highly localized currents generated by the photomixer to the mode supported by the waveguide.
US09040915B2	Optical module for simultaneously focusing on two fields of view The invention relates to an optical module, comprising a semiconductor element having a surface that is sensitive to electromagnetic radiation and an objective for projecting electromagnetic radiation onto the sensitive surface of the semiconductor element (image sensor or camera chip, in particular CCD or CMOS). The objective preferably comprises at least one lens and one lens retainer.In the optical module, an optical element having two sub-areas is arranged either in the space between the objective and the sensitive surface of the semiconductor element or between individual lenses of the objective in the entire cross-section of the beam path. All electromagnetic radiation that reaches the sensitive surface of the semiconductor element passes through the optical element.A first distance range (e.g. near range) is imaged in a first area of the sensitive surface of the semiconductor element in a focused manner by a first sub-area of the optical element, and a second distance range (e.g. far range) is imaged in a second area of the sensitive surface of the semiconductor element by a second sub-area.
US09040912B2	Infrared sensing element and infrared imaging device An infrared sensing element is provided and includes a substrate, a supporting electrical insulating layer formed on the substrate; a first electrode formed on the supporting electrical insulating layer, a pyroelectric layer formed on the first electrode, and a second electrode formed on the pyroelectric layer. The pyroelectric layer has a light receiving area of 1×102 to 1×104 μm2, has a thickness of 0.8 to 10 μm, and contains therein a compound expressed as Pb(ZrxTi1-x)O3, where 0.57
US09040910B2	Multi-column electron beam inspection that uses custom printing methods A method of testing for photomask print errors includes dividing a photomask print into sub-regions and inspecting each sub-region with a different (e.g., electron) beam column, each sub-region aligned with a beam column axis during a calibration process. The different sub-regions may be inspected on different photomask prints on a wafer plane.
US09040909B2	System and method for simultaneous detection of secondary electrons and light in a charged particle beam system A method and system for the imaging and localization of fluorescent markers such as fluorescent proteins or quantum dots within biological samples is disclosed. The use of recombinant genetics technology to insert “reporter” genes into many species is well established. In particular, green fluorescent proteins (GFPs) and their genetically-modified variants ranging from blue to yellow, are easily spliced into many genomes at the sites of genes of interest (GoIs), where the GFPs are expressed with no apparent effect on the functioning of the proteins of interest (PoIs) coded for by the GoIs. One goal of biologists is more precise localization of PoIs within cells. The invention is a method and system for enabling more rapid and precise PoI localization using charged particle beam-induced damage to GFPs. Multiple embodiments of systems for implementing the method are presented, along with an image processing method relatively immune to high statistical noise levels.
US09040904B2	Analysis method, adhesive tape, and pen There is provided an analysis method including the steps of forming a layer including a calibration reagent, that can generate ions by using a DART ion source apparatus, in a predetermined area of a sample, and performing mass spectrometry on the ions generated from an area of the sample including the layer by using DART or DESI while moving the sample having the layer formed therein.
US09040899B2	Tool setting or analysis device with backup or repeated trigger signal for detecting a rotating tool A tool setting or tool analysis device for a machine tool includes a light source for producing a light beam. A light receiver receives the light beam and produces a signal indicative of the amount of light received. This is analyzed by a main analysis circuit to generate a trigger signal to a machine controller when the beam is at least partially occluded. To provide fail-safe operation should the main circuit not recognize the tool, a back-up trigger signal is produced after a delay by a delay circuit. In one preferred form, the back-up trigger signal may oscillate, providing repeated edges which can ensure fail-safe operation even if the machine controller suffers from a blind window and therefore misses the initial trigger signal.
US09040897B2	Photo-sensing pixel circuit with conversion gain adjustment unit and image sensor A photo-sensing pixel circuit including a photo-sensing part, a transfer transistor, a plurality of adjustment transistors, and an output circuit is provided. The photo-sensing part senses a light source and generates a corresponding number of electrons. The transfer transistor coupled to the photo-sensing part has a floating node and converts the electrons generated by the photo-sensing part into a voltage signal. The adjustment transistors have a first end and a second end, wherein the first end is coupled to a power supply, and the second end is coupled to the transfer transistor via the floating node. The output circuit coupled to the transfer transistor outputs a sensing signal according to the voltage signal, wherein the sensing signal is corresponding to the brightness of the light source. The adjustment transistors operate in at least two operation modes. Different numbers of the adjustment transistors are turned on in different operation modes.
US09040892B2	High dynamic range image sensor having symmetric interleaved long and short exposure pixels To generate data for color pixels in an image, Bayer symmetric interleaved exposures can more evenly spread the long exposure pixels in the vertical direction and produce a higher dynamic range by having pixels with different exposure times interleaved within different rows. Long and short exposure pixels can be interleaved across two adjacent rows to form 4 pixel wide by 2 pixel tall blocks that are repeated across a Bayer pattern color array. In each block, the first row can be three long and one short exposure pixel; and the second row can be three short and one long exposure pixel. The long exposure pixels can form an “L” shaped pattern rotated 90 degrees clockwise; and the short exposure pixels can form an “L” shaped pattern rotated 90 degrees counter-clockwise. Subsequent rows of the blocks may be offset horizontally to form diagonal bands of long and short exposure pixels.
US09040876B2	Multi purpose heating and cooling safety device A heating and cooling device is disclosed. The device has an outer covering, and a plurality of heating and cooling coils within the covering. A plurality of flexible air flow chambers inside the covering provide air flow over the heating and cooling coils, and a plurality of vents exit the outer covering from the plurality of air conduits.
US09040874B2	Modular welding equipment Welding equipment that includes a tooling cart for transferring interchangeable tooling modules to a welding machine. A latch is mounted to the welding machine for latching the tooling cart to the welding machine, and a latch is provided for latching the tooling modules onto the tooling cart. A two-piece tooling cart includes a removable upper section for securing tooling modules thereto and a reusable lower section for use with other tooling modules. A welding method permits operation of a welding machine using a user interface that permits modular programming of at least one operational sequence of welding machine valves and weld operations for a variety of different tooling modules. An operator inputs a new sequence of operations using the user interface rather than having to rewrite ladder logic just to switch over the welding machine to use with a different tooling module.
US09040873B2	Systems and methods to feed a wire within a welder The invention includes a wire feed system that is used within a welder, the system having a forward drive roll that rotates in a first direction, a reverse drive roll that rotates in a second direction, which is opposite the first direction, wherein the forward drive roll and the reverse drive roll are both located on a first side of a wire, a first idle roll disposed opposite the forward drive roll, a second idle roll disposed opposite the reverse drive roll, wherein the first idle roll and the second idle roll are located on a second side of the wire, an arm that pivotally couples the first idle roll to the second idle roll, and an actuator that displaces the first idle roll to engage with the forward drive roll to advance the wire or displaces the second idle roll to engage with the reverse drive roll to retract the wire based upon a predetermined condition.
US09040872B2	Connection system comprising a coupling device and a plug element for a welding torch The invention relates to a connection device (27) comprising a coupling device (24) and a plug element (34) for a welding torch (10) connected to the coupling device (24) by at least one hose assembly (23), said coupling device arranged at least partially in the housing, wherein a welding wire (13), delivered by a feed unit (29) which is arranged on a motor plate (28), and additional media are conducted to the welding torch (10) via the hose assembly (23) and wherein the hose assembly (23) is connected to the plug element (34). In order to create such a connection system (27), the coupling device is formed by a connection device (30) comprising an end wall (38) and a separating wall (39) of the motor plate (28), wherein the end wall (38) is designed to receive the coupling (35), the connection device (30) is constructed to at least guide and position a pin (37), and the connection device (30) is independent of the housing.
US09040870B2	Device for re-contouring a gas turbine blade A device for recontouring a gas turbine blade includes at least one support configured to rest on an edge of the gas turbine blade during the recontouring, at least one side bearing configured to rest on an intake side or an outlet side of the gas turbine blade during the recontouring and a machining unit for machining the gas turbine blade. The machining unit is configured to fuse at least one partial area of the edge of the gas turbine blade using a beam of energy that is targeted such that material of the blade solidifies into a new contour, substantially without the addition of supplementary material.
US09040869B2	Plasma cutter having microprocessor control A system is provided that includes a torch power unit, wherein the torch power unit includes a motor and a digital device coupled to the motor and configured to control the motor. A method of operation is provided that includes controlling one or more aspects of a torch power unit via a microprocessor, a digital signal processor, or a field programmable gate array, or a combination thereof. In another embodiment, a system is provided that includes a torch power unit that includes a torch, one or more components comprising a generator, a power converter, a compressor, a motor, a wire feeder, or a combination thereof, and a microprocessor configured to control the one or more components.
US09040866B2	Spot welding apparatus There is provided a spot welding apparatus. The spot welding apparatus includes a pressing force actuator that causes a movable electrode to move to a pressing force applying position where the movable electrode applies a pressing force to a workpiece together with a fixed electrode, a control pressing force applying actuator that causes a receiving unit to move to a control pressing force applying position where the receiving unit is located adjacent to the fixed electrode and comes into contact with the workpiece so as to apply a control pressing force, and a welding transformer. The control pressing force applying actuator and the welding transformer are linearly aligned at a rear side of the pressing force actuator that is arranged at a front side of a support bracket.
US09040864B2	Profiled arc splitter plate A profiled arc splitter plate for a switch having a fixed contact and a movable contact is provided to increase electromagnetic attractive forces on the arc generated during contact separation. The plate (300) comprises a body (306) defining an operatively inverted substantially V-shaped recess having a center notch (302) provided at the vertex of the recess and at least one protrusion (304) defined on either side of the center notch (302) along the inclined side walls of the recess, the movable contact of the switch displaceable through the recess without contacting the inclined side walls, in a spaced apart manner from the protrusions (304) and the center notch (302). Chamfers 308 are provided at an end of the plate (300) proximal to the vertex of the recess to provide an exit for hot gases towards the vent of the arc chamber.
US09040862B2	Electrode assembly for vacuum interrupter An electrode assembly for a vacuum interrupter is configured such that supporting members can support most of a contact electrode plate and a supporting electrode plate in an axial direction with coil conductors interposed therebetween. Accordingly, an impact generated between electrode assemblies upon a closing operation of the vacuum interrupter may be evenly distributed onto the supporting members, which may result in preventing each of the electrode plates and the coil conductors from being deformed. Also, the supporting members are inserted into the electrode plates and the coil conductors, thereby effectively preventing a current from flowing via the supporting members. In addition, the supporting member may be wide and large so as to simplify an assembly operation and reduce an assembly time.
US09040859B2	Detecting apparatus, removing apparatus, detecting method, and removing method A detection apparatus for detecting foreign substances or defective goods, with which it is easy to accomplish inspection even if the inspection objects have a shape that tends to allow rolling, comprises: transparent members 11 and 12, partitions 21 and 22, a supplying unit 30, cameras 41 and 42, a control unit 50. A removing apparatus 1, which includes such detection apparatus, comprises a suction controller 60 and suction nozzles 61 to 68. While the partitions 21, 22 move around, inspection objects A are each put in each cell of the partitions 21, 22, and are photographed by the cameras 41 and 42, from above and below the transparent members 11, 12, respectively. The images obtained by such photographing are analyzed, and foreign substances or defective goods mingling in the inspection objects A are detected. The foreign substances or defective goods are separated from the conforming goods by selectively sucking the inspection objects A with the suction nozzles 61 to 64.
US09040850B2	Assembling a keypad to a mobile device A mobile device has a front frame with a key opening, a first forward facing surface adjacent the key opening and a second forward facing surface adjacent the key opening. The mobile device includes a keypad with keys coupled to a flexible backing. The keypad is insertable from behind the front frame of the mobile device to position the keys into openings in the front frame and laterally expandable to position the keys on opposing lateral sides of the keypad in front of forward facing surfaces of the front frame.
US09040849B2	Rotating switch mechanism with locking mechanism An electronic device, comprising a rotating switch mechanism for switching a conduction state of a predefined electronic circuit corresponding to a rotating operation of a rotating operation part rotatably provided on a housing on the predefined rotational axis, a locking mechanism for locking the rotation of the rotating operation part relative to the housing, and a switching member for switching an operating state and a non-operating state of the electronic device, wherein the locking mechanism locks the rotation of the rotating operation part relative to the housing when the electronic device is in the operating state and does not lock the rotation of the rotating operation part relative to the housing when the electronic device is in the non-operating state so that the rotation of the rotating operation part of the rotating switch mechanism provided to the electronic device can be locked with improved usability.
US09040848B2	Open back junction box and method for pre-fab wiring A bracket and open back junction box assembly allows simplified wiring at a construction site. An open back junction box including a detachable and reattachable rear cover plate is pre-assembled with a plaster ring, electrical device, and leads, at a prefab facility. A Metal Clad (MC) cable may be attached to the open back junction box and wires carried in the MC Cable may be connected to the leads. A mounting bracket is generally sandwiched between the open back junction box and the plaster ring for mounting to framing members at the construction site. Following assembly at the prefab facility, the prefab open back junction box is shipped to the construction site where the bracket and open back junction box assembly is mounted to framing members. Connections to wires carried by MC Cables are then facilitated by removing the rear cover plate to access the open back junction box interior.
US09040846B2	Shielded cable fixing structure A shielded cable fixing structure includes a shielded cable that includes an electric wire, a braid for covering the electric wire, and a sheath for covering the braid, an insulation housing that receives a terminal fitting electrically connected to the electric wire, a pair of split shield shells in which the insulation housing is mounted, a groove-shaped portion press-formed on a section of each of the split shield shells to cover a wire lead-out port of the insulation housing, from which the electric wire is led out, and is recessed on an outer surface of each of the split shield shells, and a braid fixing member fixed on an annular mounting groove constituted by the groove-shaped portions of the split shield shells, in a state where the braid is disposed between the annular mounting groove and the braid fixing member.
US09040841B2	Axiocentric scrubbing land grid array contacts and methods for fabrication A contact structure and assembly and a method for manufacturing the same for a microelectronics device includes first and second electrically conductive contacts being helically shaped. A carrier element is attached to and positioned between the first and second contacts. The first and second contacts are in electrical communication with each other, and the first and second contacts are in a mirror image relationship with each other. A pair of insulating substrates each include electrically conductive members. A contact point on each of the first and second contacts is attached and electrically communicating to respective electrically conductive members such that the first and second electrically conductive contacts between the pair of insulating substrates form an electrically conductive package. A metal layer on the carrier element provides electrical conductivity through a first opening defined by the carrier element between the first and second portions of the helix shaped contact.
US09040837B2	Wiring board and method for manufacturing the same A wiring board includes a first multilayer wiring board having first conductive layers and having a surface, a second multilayer wiring board having second conductive layers and positioned such that the second multilayer wiring board has a surface facing the surface of the first multilayer wiring board, and an adhesive layer including an adhesive sheet and interposed between the first multilayer wiring board and the second multilayer wiring board such that the adhesive layer is adhering the first multilayer wiring board and the second multilayer wiring board. The first multilayer wiring board has a first pad on the surface of the first multilayer wiring board, the second multilayer wiring board has a second pad on the surface of the second multilayer wiring board, and the first pad and the second pad are positioned such that the first pad and the second pad face each other across the adhesive layer.
US09040835B2	Attenuation reduction grounding structure for differential-mode signal transmission lines of flexible circuit board An attenuation reduction grounding structure of differential-mode signal transmission lines of a flexible circuit board includes a flexible substrate on which at least one pair of differential-mode signal lines, at least one grounding line, a covering insulation layer, and a thin metal foil layer are formed. At least one via hole extends through the thin metal foil layer and the covering insulation layer and corresponds to a conductive contact zone of the grounding line. The via hole is filled with a conductive paste layer to electrically connect the thin metal foil layer to the conductive contact zone of the grounding line to provide an excellent grounding arrangement. The thin metal foil layer includes a plurality of openings formed at locations corresponding to top angles of the differential-mode signal lines.
US09040833B2	Capacitive transparent conductive film and preparation method thereof A capacitive transparent conductive film comprises: a transparent substrate, comprises a first surface and a second surface which is opposite to the first surface; a light-shield layer, formed at the edge of the first surface of the transparent substrate, the light-shield layer forms a non-visible region on the first surface of the transparent substrate; and a polymer layer, formed on the first surface of the transparent substrate, and covering the light-shield layer, the surface of the polymer layer is patterned to form a meshed trench, the trench is filled with conductive material to form a sensing region on the surface of the polymer layer. The capacitive transparent conductive film can effectively protect the conductive material and has low cost and good conductivity. A preparation method of the capacitive transparent conductive film is also provided.
US09040831B2	Manufacturing method for printed circuit board A printed circuit board is manufactured by forming on a top surface of a support base, in a pattern having a predetermined width, a first metal layer for defining boundary ends between adjacent printed circuit boards in a printed circuit board assembly, forming on top of the first metal layer a wiring structure portion having an insulating layer and a conductive layer for each printed circuit board in the printed circuit board assembly, forming, in the wiring structure portion, grooves having a pattern corresponding to the pattern of the first metal layer to expose the first metal layer, forming a second metal layer on the wall surface of the grooves in the wiring structure portion, and cutting the first metal layer on the bottom surface of the grooves to separate each printed circuit board.
US09040828B2	Coated conductor with voltage stabilized inner layer Disclosed are polymeric compositions with improved breakdown strength. The polymeric compositions contain a polyolefin and a voltage stabilizing agent. The voltage stabilizing agent contains a triazine. The triazine may include a substituent that enables keto-enol tautomerism, which provides the voltage stabilizing agent with additional energy dissipation capacity. The present polymeric compositions exhibit improved breakdown strength when applied as an insulating layer for power cable.
US09040827B2	LAN cable A LAN cable includes an unshielded LAN cable including one or plural pairs of pair twisted wires and a sheath formed collectively covering a periphery of the pair twisted wires. The sheath includes a resin including nickel hydroxide at a mixing mass ratio of not less than 25% and not more than 60%.
US09040823B2	Low impedance boosted high speed data cable A high speed video cable carries signals according to the High-Definition Multimedia Interface (HDMI) or DisplayPort standards, and includes a raw cable and a boost device. The raw cable includes coaxial lines of a characteristic cable impedance lower than the impedance implied in the standards. The correct impedance is observed at the sending end by series resistors mounted in the first cable connector. The resultant loss of signal is made up with the boost device mounted in the connector at the other end of the cable.
US09040820B2	Solar power inverter with sealing means A solar power inverter having a sealing means includes: a main case having an opening on a front surface thereof, the opening open and closed by a main cover; an auxiliary case coupled to one side surface of the main case, and having a second opening on a front surface thereof, the second opening open and closed by an auxiliary cover; and a gasket interposed between the main case and the auxiliary case, wherein the main case and the auxiliary case are coupled to each other by coupling bolts which pass through the main case, the gasket and the auxiliary case.
US09040816B2	Methods and apparatus for forming photovoltaic cells using electrospray Methods of forming a photovoltaic structures including nanoparticles are disclosed. The method includes electrospray deposition of nanoparticles. The nanoparticles can include TiO2 nanoparticles and quantum dots. In an example, the nanoparticles are formed on a flexible substrate. In various examples, the flexible substrate is light transparent. Photovoltaic structures and apparatus for forming photovoltaic structures are disclosed.
US09040814B2	Anti-reflective coating for photovoltaic cells A surface of a photovoltaic cell is coated with a solution that includes barium titanate to reduce reflection of sunlight that is incident on the surface. The solution may include a base of polydimethylsiloxane and carbon nanotubes. The process may be used in the fabrication of new photovoltaic cell assemblies, or to retrofit existing assemblies in situ.
US09040812B2	Photovoltaic device including flexible substrate or inflexible substrate and method for manufacturing the same A photovoltaic device including a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
US09040804B2	Electronic stringed instrument An electronic stringed instrument has a bridge section attached to one end portion of each of a plurality of conductive strings; a string touch sensor detecting a pitch when the strings are respectively pressed against and conducted to a plurality of conductive metal frets; bridge saddles and insulation tubes, which insulate the strings from the bridge section; and electrically conductive tubes, serving as connection sections, respectively connected and conducted to the strings. While holding a string with a finger, the same string can be picked, and the string pushed by the finger can be pressed against the metal fret. Accordingly, the string can be operated without a sense of incongruity. Because the strings and the bridge section can be insulated even when the bridge section is formed of metal, musical sound information can be precisely and reliably detected, and a favorable musical performance can be achieved.
US09040802B2	Accompaniment data generating apparatus An accompaniment data generating apparatus has a storing portion 15 for storing sets of phrase waveform data each related to a chord identified on the basis of a combination of chord type and chord root, and a CPU 9. The CPU 9 carries out a chord information obtaining process for obtaining chord information by which a chord type and a chord root are identified, and a chord note waveform data generating process for generating phrase waveform data indicative of chord notes of the chord root and the chord type identified by the obtained chord information in accordance with the obtained chord information by use of the sets of phrase waveform data stored in the storing portion 15, and outputting the generated data as accompaniment data.
US09040800B2	Musical tone signal generating apparatus A musical tone signal generating apparatus has waveform memory WM which stores a plurality of compressed data sets obtained by compressing, by linear prediction, sample values obtained by sampling musical tones. The musical tone signal generating apparatus has cache circuit 740 which reads out compressed data from waveform memory WM within an assigned computing period in response to instructions to generate a musical tone, and decoding circuit 750 which decodes the compressed data and outputs the decoded data as the data indicative of a sample value. The musical tone signal generating apparatus has CPU 901 inputs tone pitch information indicative of a tone pitch of a musical tone which is to be generated, identifies waveform data which is to be read out by cache circuit 740 from waveform memory WM and determines, in accordance with the identified waveform data, the length of the computing period which is to be assigned.
US09040797B1	Multi-function ukulele chord wheel A portable, multi-function Ukulele learning device is disclosed having three disks. In one embodiment, a larger inner disk is axially affixed at its center to a smaller disk on its obverse face and on its converse face. Both smaller disks define slots for exposing key, note, vamp or chords on the inner disk. The disclosed apparatus provides an efficient, unique means of teaching Ukulele users, or the users of other instrument, to play music.
US09040793B2	Protector for musical instrument and player Embodiments of the present disclosure include systems and apparatus for protecting a musical instrument and the player of said instrument. One embodiment is an apparatus that includes a first layer including a moisture permeable and wicking material configured to wick fluid and moisture across and through the layer. The first layer includes a first player-facing surface and a first musical instrument facing surface. The apparatus also includes a second layer including a second player-facing surface and a second musical instrument facing surface, wherein the second player-facing surface abuts the first musical instrument facing surface of the first layer. The second layer includes a moisture impermeable material configured to prevent the wicked fluid and moisture to come into contact with the musical instrument.
US09040789B2	Variety corn line FX6815 The present invention provides an inbred corn line designated FX6815, methods for producing a corn plant by crossing plants of the inbred line FX6815 with plants of another corn plant. The invention further encompasses all parts of inbred corn line FX6815, including culturable cells. Additionally provided herein are methods for introducing transgenes into inbred corn line FX6815, and plants produced according to these methods.
US09040788B1	Maize inbred PH1M9D A novel maize variety designated PH1M9D and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PH1M9D with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PH1M9D through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PH1M9D or a locus conversion of PH1M9D with another maize variety.
US09040785B2	Variety corn line FX8609 The present invention provides an inbred corn line designated FX8609, methods for producing a corn plant by crossing plants of the inbred line FX8609 with plants of another corn plant. The invention further encompasses all parts of inbred corn line FX8609, including culturable cells. Additionally provided herein are methods for introducing transgenes into inbred corn line FX8609, and plants produced according to these methods.
US09040779B2	Soybean variety A1035446 The invention relates to the soybean variety designated A1035446. Provided by the invention are the seeds, plants and derivatives of the soybean variety A1035446. Also provided by the invention are tissue cultures of the soybean variety A1035446 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety A1035446 with itself or another soybean variety and plants produced by such methods.
US09040776B2	Genes regulating plant branching, promotors, genetic constructs containing same and uses thereof The invention relates to genes coding for TCP family transcription factors and having a biological role in the development of axillary buds and branch growth. Furthermore, the invention relates to the promoters of the transcription of said genes, to the genetic constructs containing same and to the uses thereof, including the use of agents that modulate the expression of these genes in order to modify plant architecture.
US09040772B2	Compositions and methods for enhancing resistance to northern leaf blight in maize The invention relates to methods and compositions for identifying and selecting maize plants with enhanced resistance to northern leaf blight. Maize plants generated by the methods of the invention are also a feature of the invention.
US09040771B2	Nonhuman mammal whose mtDNA is from a nonhuman mammal resistant to a selected disease or disorder and whose nDNA is from a nonhuman donor mammal more susceptible to the selected disease or disorder Provided herein are mitochondrial-nuclear exchanged cells and animals comprising mitochondrial DNA (mtDNA) from one subject and nuclear DNA (nDNA) from a different subject. Methods for producing a mitochondrial-nuclear exchanged animal and animals made by the methods are provided. Also provided are methods of screening for agents useful for treating a disease or disorder using mitochondrial-nuclear exchanged animals or cells, tissues or organs thereof.
US09040762B2	Catalysts for petrochemical catalysis Metal oxide catalysts comprising various dopants are provided. The catalysts are useful as heterogenous catalysts in a variety of catalytic reactions, for example, the oxidative coupling of methane to C2 hydrocarbons such as ethane and ethylene. Related methods for use and manufacture of the same are also disclosed.
US09040758B2	Washing system for nitroaromatic compounds A method of removing alkalinity and salt from a nitroaromatic product downstream of water washing to remove mineral acids and alkaline washing to remove salts of organic acids, comprises washing the product stream with an acidic aqueous solution, prior to the step of removing excess organic reactant, by steam stripping or distillation. Acid removed from the stripper or column is recycled back for use in the acidic washing. The acidic washing is done instead of the neutral washing step of the prior art. It removes residual salt and decreases the level of entrained colloidal water in the nitroaromatic product.
US09040755B2	Hydrogenation of styrene oxide forming 2-phenyl ethanol A process for preparation of 2-phenyl ethanol by catalytic hydrogenation of styrene oxide using a catalyst consisting of Pd (II) on basic inorganic support is investigated. The present invention comprises development of new Pd based catalysts. The present method yields 2-phenyl ethanol in 98% selectivity at total conversion of styrene oxide. The present process represents an environment friendly alternative to conventionally used methods in industry and eliminates the reduction step for catalyst preparation. In the present invention the active catalyst is generated in situ during the hydrogenation of styrene oxide. In addition, Pd (II) supported catalysts do not catch fire (non pyrophoric), can be stored under ambient conditions and produce very less or no dust which makes said catalysts suitable for industrial application.
US09040748B2	Hydrocarboxylation of aqueous formaldehyde using a dehydrating recycle stream to decrease water concentration Disclosed is a process for the production and purification of glycolic acid or glycolic acid derivatives by the carbonylation of aqueous formaldehyde. The water in the hydrocarboxylation zone is reduced via reaction with the ester bonds in a recycle stream comprising glycolic acid oligomers and/or methyl glycolate oligomers.
US09040746B2	Systems and processes for the production of isophthalic acid and terephthalic acid Various embodiments of the present invention generally disclose systems and processes for the conversion of a feed stream comprising at least one C8 aromatic into a product stream comprising isophthalic acid and purified terephthalic acid (IPA/TA).
US09040742B2	Catalytic synthesis of vitamin A intermediate The present invention relates to a process of production of a compound, which is useful as an intermediate (building block) in organic synthesis, especially in the synthesis of vitamin A or β-carotene and derivatives thereof, e.g. canthaxanthin, astaxanthin or zeaxanthin.
US09040739B2	Catalyst and method for synthesis of lactic acid and its derivatives A catalyst for synthesis of lactic acid and it derivatives is provided. The catalyst includes SnY2.mH2O and at least one of NH4X or quaternary ammonium salts, wherein X and Y are selected from F—, Cl—, Br—, I—, CH3SO3—, C6H5SO3—, CH3C6H4SO3— or CN—, m represents an integer of 1 to 15. A method for synthesis of lactic acid and it derivatives with the above catalyst is also provided. By using the above catalyst and method, it is capable of converting carbohydrate-containing raw material to lactic acid and its derivatives directly in a more efficient and economical way.
US09040738B2	Intermediate compounds of tamiflu, methods of preparation and uses thereof Chiral amino compounds, methods of preparation and uses thereof. Tamiflu can be obtained from the said compounds. Multi-substituted chiral tetrahydropyrrolyl amine which can be used as intermediate compounds of medicament can also be produced by the said compounds.
US09040736B2	Stabilized isocyanate group-containing ethylenically unsaturated compound An object of the present invention is to improve the stability of an ethylenically unsaturated compound having an isocyanate group in the molecule by preventing a polymerization of the ethylenically unsaturated compound. The present invention relates to a stabilizing composition for an isocyanate group-containing ethylenically unsaturated compound, comprising: an isocyanate group-containing ethylenically unsaturated compound (A) which comprises one or more isocyanate groups and one or more ethylenically unsaturated groups in the molecule; and a stabilizing agent (B) which is a compound in which at least one of the ethylenically unsaturated groups in the compound (A) is replaced with an alkyl group which may have a substituent.
US09040733B2	Process for making nitriles An improved multi-reaction zone process provides for improved nitrile product quality and yield. In a first reaction zone, 1,3-butadiene is reacted with hydrogen cyanide in the presence of a catalyst to produce pentenenitriles comprising 3-pentenenitrile and 2-methyl-3-butenenitrile. In a second reaction zone, 2-methyl-3-butenenitrile, recovered from the first reaction zone, is isomerized to 3-pentenenitrile. In an optional third reaction zone, 3-pentenenitrile recovered from the first and second reaction zones is reacted with hydrogen cyanide in the presence of a catalyst and a Lewis acid to produce adiponitrile. A portion of the first catalyst is purified and recycled. Zero valent nickel is added to the purified first catalyst before it is recycled.
US09040728B2	Crystallization of (20R) 19-nor-24-difluoro-1α,25-dihydroxyvitamin D3 Disclosed are methods of purifying the compound (20R)-19-nor-24-difluoro-1α,25-dihydroxyvitamin D3 to obtain the compound in crystalline form. The methods typically include the steps of dissolving a product containing the compound in a solvent comprising hexane and 2-propanol, cooling the solvent and dissolved product below ambient temperature for a sufficient amount of time to form a precipitate of crystals, and recovering the crystals.
US09040727B2	Histone deacetylase inhibitor of benzamides and use thereof Disclosed in the present invention is a novel histone deacetylase inhibitor of benzamides and use thereof. The inhibitor has good efficacy in treating diseases caused by abnormal gene expression, such as tumors, endocrine disorders, immune system diseases, genetic diseases and nerve system diseases. The histone deacetylase inhibitor of benzamides is a compound of the following general chemical structural formula (I) or a salt thereof.
US09040726B2	Process for the preparation of quaternary N-alkyl morphinan alkaloid salts An improved process for the N-alkylation of tertiary morphinan alkaloid bases to form the corresponding quaternary morphinan alkaloid derivatives.
US09040724B2	Diaryl sulfone compound, and manufacturing method for same The present invention provides a diaryl sulfone compound represented by Formula (1) below: wherein R1 to R4 and R1′ to R4′ are the same or different; each represents hydrogen, C1-4 alkyl, or halogen; and R5 is (thio)glycidyl, acryloyl, or the like; and a method for producing the same. According to the present invention, a novel compound useful as a monomer for producing synthetic resin having a high refractive index and excellent transparency for optical materials can be efficiently produced with a simple production process, using an inexpensive material as a starting material.
US09040721B2	Halogenated compounds for Photodynamic therapy Halo-organic heterocyclic compounds are described, in which at least two halogen atoms are bound to a nitrogen-containing heterocyclic terminal moiety of the compound, with at least one of such halogen atoms being iodine or bromine. Also described are polymethine dyes based on these heterocyclic compounds, and dendrimeric compounds and conjugates of such polymethine dyes. The polymethine dyes are characterized by enhanced properties, e.g., brightness, photostability, sensitivity and/or selective affinity that make them useful to target cancer cells, pathogenic microorganisms, and/or other biological materials, in applications such as photodynamic therapy, photodynamic antimicrobial chemotherapy (PACT), cancer treatment, selective removal or attachment of biological materials, antimicrobial coating materials, and other diagnostic, theranostic, spectrum shifting, deposition/growth, and analytic applications.
US09040714B2	IRE-1α inhibitors Compounds which directly inhibit IRE-1α activity in vitro, prodrugs, and pharmaceutically acceptable salts there-of. Such compounds and prodrugs are useful for treating diseases associated with the unfolded protein response or with regulated IRE1-dependent decay (RIDD) and can be used as single agents or in combination therapies.
US09040710B2	Aryloxy-phthalocyanines of group IV metals The present disclosure relates to a compound comprising an aryloxy-phthalocyanine compound of Group IV metals, a method for preparing aryloxy-phthalocyanine compound of Group IV metals and an article of manufacture made therefrom.
US09040706B2	Pyrrolidine inhibitors of IAP The invention provides novel inhibitors of IAP that are useful as therapeutic agents for treating malignancies where the compounds have the general formula I: wherein A, Q, X1, X2, Y, R1, R2, R3, R4, R4′, R5, R6 and R6′ are as described herein.
US09040703B2	Inhibitors of arginase and their therapeutic applications Compounds according to Formula I and Formula II are potent inhibitors of Arginase I and II activity: where R1, R2, R3, R4, R5, R6, R7, R8, R9, D, M, X, and Y are defined as set forth in the specification. The invention also provides pharmaceutical compositions of the compounds and methods of their use for treating or preventing a disease or a condition associated with arginase activity.
US09040700B2	Method of producing polymeric phenazonium compounds A process of making a polymeric phenazonium compound having the general formula: wherein R1, R2, R4, R5, R6, R8, and R9 are the same or different, and represent hydrogen, a low alkyl or a substituted aryl, R3 starts with NH2 and is diazotized followed by a polymerization, R5 and R8 may alternatively represent monomeric or polymeric phenazonium radicals, R7 is a carbon in the aromatic ring, Rx and Ry represent any combination of CH3, C2H5, and hydrogen, except that Rx and Ry cannot both be hydrogen, A is an acid radical, and n is an integer from 2 to 100, preferably from 2 to 20 is described. The polymeric phenazonium compound is usable as an additive in a metal plating bath comprising copper. The method includes the steps of a) dissolving an effective amount of an amino compound in a formic acid solution; b) adding a nitrite salt to diazotize the amino compound; and c) adding sulfamic acid to neutralize any excess nitrous acid that may be formed in step b), whereby a polymeric phenazonium compound is produced with a smaller quantity of unreacted monomer remaining in the end product than those produced using methods of the prior art.
US09040698B2	Method for preparing optically pure (+)-ambrisentan and (+)-darusentan Disclosed is a method for preparing optically pure (+)-ambrisentan and (+)-darusentan, comprising: firstly catalyzing the asymmetric epoxidation of a β-unsaturated alkene using a chiral ketone derived from fructose or a hydrate thereof as a catalyst, and then subjecting the product to an epoxy compound ring-opening reaction and substitution reaction successively to obtain optically pure (+)-ambrisentan and (+)-darusentan.
US09040697B2	Process for the production of moxonidine 4,6-dichloro-2-methyl-5-(1-acyl-2-imidazolin-2-yl)-aminopyrimidine is reacted with methanol in the presence of a non-ionic organic base, and moxonidine is obtained directly from the reaction mixture.
US09040694B1	Compounds and methods useful for directing stem cell differentiation The presently-disclosed subject matter relates to compounds of the formula: and methods for use thereof. The presently-disclosed subject matter relates methods of selectively differentiating a stem cell, and methods of screening for compounds useful for enhancing terminal differentiation of committed cardiac progenitor cells.
US09040688B2	Intermediates in the preparation of 1,4-diphenyl azetidinone The process of the present invention relates to a method for the synthesis of a 1,4-diphenylazetidinone of formula (VIII) by using novel oxime intermediates.
US09040684B2	Cellulose interpolymers and method of oxidation This invention provides cellulose ester interpolymers, and methods of oxidizing cellulose interpolymers and cellulose ester interpolymers. The invention also provides routes to access carboxylated cellulose ester derivatives with high acid numbers wherein the carboxyl group is attached directly to the cellulose backbone by a carbon-carbon bond. Through functionalization of an intermediate aldehyde, the corresponding cationic or zwitterionic cellulose ester derivatives can also be accessed. The interpolymers of the present invention have a number of end-use applications, for example, as binder resins in various types of coating compositions and as drug delivery agents.
US09040683B2	Cellulose interpolymers and method of oxidation This invention provides cellulose ester interpolymers, and methods of oxidizing cellulose interpolymers and cellulose ester interpolymers. The invention also provides routes to access carboxylated cellulose ester derivatives with high acid numbers wherein the carboxyl group is attached directly to the cellulose backbone by a carbon-carbon bond. Through functionalization of an intermediate aldehyde, the corresponding cationic or zwitterionic cellulose ester derivatives can also be accessed. The interpolymers of the present invention have a number of end-use applications, for example, as binder resins in various types of coating compositions and as drug delivery agents.
US09040678B2	Functionalization and purification of molecules by reversible group exchange Embodiments of the present disclosure include methods and compositions for functionalizing molecules, such as oligonucleotides, with functional groups, including polyhistidine tags useful in affinity methods. Some embodiments include methods for modifying and purifying complex mixtures of molecules by exchange of functional tags.
US09040675B2	Formulations for nucleic acid stabilization on solid substrates The present disclosure generally relates to dry solid matrices for the extraction, stabilization, and storage of nucleic acids, particularly RNA, in a dry format under ambient conditions for a prolonged period of time. Methods for collecting and recovering the nucleic acids stored in the dry solid matrix are also described.
US09040672B2	Devices and methods for reducing matrix effects Devices and methods are provided for reducing matrix effects in protein precipitated bioanalytical samples comprising: a support, and a sorbent associated with the support capable of binding matrix interfering agents present in the bioanalytical sample, wherein the device further comprises filtering means for removing precipitated protein particles. The filtering means is a size exclusion filter or a polymeric or inorganic monolith having a maximum pore size less than or equal to the diameter of the particles to be removed from the sample, and can be integral with the sorbent or associated with the sorbent. The sorbent is characterized by sufficient selectivity between the matrix interfering agents and analytes of interest to provide retention of the matrix interfering agents while providing elution of the analytes of interest (e.g., a reversed phase or a polar modified reversed phase). Typical devices incorporating these features include luer syringe filters, individual filter cartridges, multiwell plates, pipette tips, or inline columns for multiple or single use.
US09040667B2	Antibody cocktail The present invention relates to a composition comprising at least three primary antibodies or fragments thereof, wherein the at least three antibodies or fragments thereof binds specifically to at least three different proteins, and wherein the at least three different proteins are AMCAR, CK 5/6, and HMWC. Methods for using the composition in diagnosis, prognosis, and assessing efficacy of treatment is further included as well as kits comprising said composition, and optionally, instructions of its use.
US09040666B2	Single-domain antigen-binding proteins that bind mammalian IgG The present application relates to antigen-binding proteins that are capable of binding to mammalian IgG. The frame-work regions of the antigen-binding proteins of the application preferably correspond to those of antibodies naturally that are devoid of light chains as may e.g. be found in camelids. The application further relates to nucleic acids that encode such antigen-binding proteins, to immunoadsorbent materials that comprise such proteins, to the uses of such immunoadsorbent materials for the purification of mammalian IgG antibodies and for therapeutic apheresis.
US09040665B2	Controlled cross-linking processing of proteins A method of forming a cross-linked protein structures includes preparing a solution of protein dissolved in a benign solvent and forming an intermediate protein structure from the solution. The intermediate protein structure can be cross-linked by providing for a specific ratio of chemical cross-linking agents to form the cross-linked protein structure. The solution can be prepared by adding a cross-linker of N-hydroxysuccinimide (NHS) and 1-ethyl-3-(3-dimethylaminopropyl)carbodiimide hydrochloride (EDC) at a ratio of two-to-one of NHS to EDC to alcohol. PBS buffer (20×) can be added to the solution until the volume ratio of PBS buffer (20×) to alcohol is about one-to-one. About 16 percent by weight of protein can be dissolved in the solution. The solution can be electrospun to form an intermediate protein structure. After a period of time, the protein structure can be cross-linked to form the cross-linked protein structure.
US09040663B2	Melanocortin receptor-specific peptides The invention relates to melanocortin receptor-specific cyclic peptides of Formula (I) or a pharmaceutically acceptable salt thereof, where R1, R2, R3, R4a, R4b, R4c, R5, x and y are as defined in the specification. These compounds are particularly useful in the treatments of energy homeostasis and metabolism related (e.g. diabetes), food intake related and/or energy balance and body weight related diseases, disorders and/or conditions, including obesity, overweight and diseases, disorders and/or conditions associated with obesity and/or overweight, such as type 2 diabetes and metabolic syndrome.
US09040659B2	Methods and materials for removing metals in block copolymers The present invention relates to a method for treating a block copolymer solution, wherein the method comprises: providing a solution comprising a block copolymer in a non aqueous solvent; and, treating the solution to remove metals using an ion exchange resin. The invention also relates to a method of forming patterns using the treated block copolymer.
US09040654B2	Process for manufacturing polycarbonate from dianhydrohexitol Dialkylcarbonate A process for manufacturing a polycarbonate, having a glass transition temperature greater than or equal to 50° C., includes: a step (1) of introducing into a reactor a monomer of formula (I) and R1 and R2 being identical or different alkyl groups; a step (2) of introducing into the reactor at least one cyclic diol or a mixture of diols (B) including at least 20 mol % of cyclic diols; a subsequent step (3) of polycondensation via transesterification of the mixture of monomers including the monomers (A) and (B); a step (4) of recovering the polycarbonate formed during step (3).
US09040651B2	Poly(aryl ether sulfone) composition, and method of making A poly(aryl ether sulfone) comprises units of formula (I): wherein Ar1 is a divalent C6-C15 aromatic group, Ar2 is a divalent C6-C15 aromatic group, Ar3 is a divalent C6-C15 aromatic group, and n is greater than 1; and a terminal group of formula (II) derived from a monofunctional phenoxide wherein is X is a hydrogen atom or an organic substituent having from 1 to 20 carbon atoms; wherein the poly(aryl ether sulfone) has a hydroxyl group content greater than 0 and less than 50 parts per million (ppm), based on the poly(aryl ether sulfone) weight, a glass transition temperature of 180 to 290° C., a weight average molecular weight of 20,000 to 100,000, a halogen content of greater than 0 and less than 3000 ppm based on the poly(aryl ether sulfone) weight. The poly(aryl ether sulfone) is free of methoxy groups.
US09040647B2	Photochromic material Provided are: a method for controlling the decoloration reaction rate and color density of a fast light-modulating material to levels suitable for practical use; and a fast light-modulating material having a decoloration reaction rate and a color density which are suitable for practical use. A polymer obtained by polymerizing a paracyclophane-bridged hexaarylbisimidazole compound having a radical-polymerizable group, and a copolymer obtained by copolymerizing the compound with a (meth)acrylic acid compound or a sensitizer having a radical-polymerizable group can achieve controlled decoloration reaction rates, photosensitivity and color tones.
US09040643B2	Bridged metallocene catalyst systems with switchable hydrogen and comonomer effects The present invention provides polymerization processes utilizing an ansa-metallocene catalyst system for the production of olefin polymers. Polymers produced from the polymerization processes have properties that vary based upon the presence or the absence of hydrogen and/or comonomer in the polymerization process.
US09040641B2	Polycarbonate-polysiloxane copolymer, and method for preparing same A polycarbonate-polysiloxane copolymer includes a polysiloxane unit. The polycarbonate-polysiloxane copolymer can have superior melt flowability and ductility while maintaining high transparency and low haze.
US09040639B2	Method for the continuous production of biodegradable polyesters A process for the continuous production of a biodegradable polyester, wherea mixture of aliphatic dihydroxy compounds, aliphatic and aromatic dicarboxylic acids or their liquid esters, and, optionally, further comonomers is mixed, without addition of a catalyst, to give a paste, and i) this mixture with at least a portion of the catalyst, is continuously esterified or, transesterified; ii) the transesterification or, esterification product obtained in i) is continuously precondensed with any remaining amount of catalyst to an intrinsic viscosity of from 20 to 70 cm3/g; iii) the product obtainable from ii) is continuously polycondensed to an intrinsic viscosity of from 60 to 170 cm3/g, and iv) the product obtainable from iii) is reacted continuously with a chain extender in a polyaddition reaction to an intrinsic viscosity of from 150 to 320 cm3/g. The invention further relates to biodegradable polyesters obtained_by this process.
US09040634B2	Polycarboxylic acid dye with low polymerization degree The present invention provides a polycarboxylic acid dye with low polymerization degree, which is formed by using a macromolecule skeleton of polymaleic acid linked to an azo chromophore, an azo-metal complexation chromophore or an anthraquinone chromophore via a bridge group of amide or ester bond. The dye is useful for dyeing and printing leather, protein fiber, cellulose fiber and synthetic fiber.
US09040631B1	Padding The present invention provides padding which is suitable as bedding and clothing items having both exothermic property upon moisture absorption and bulkiness in high levels and being able to give comfortable environment to human body. The present invention relates to a padding containing 25 to 85% by weight of polyester fiber, characterized in that the padding contains 15 to 75% by weight of a cross-linked polyacrylate fiber of a magnesium salt type and/or a calcium salt type.
US09040625B2	Water/oil repellent composition, method for its production and article To provide a water/oil repellent composition which can impart sufficient post-air-drying water/oil repellency to the surface of an article, and which presents a low environmental impact, and an article having its surface treated with the water/oil repellent composition. A water/oil repellent composition comprising a copolymer (A) having structural units based on a monomer (a), structural units based on a monomer (b), structural units based on a monomer (c) and/or structural units based on a monomer (d); and an aqueous medium (B) containing water, and a film-forming assistant (x) and/or a film-forming assistant (y). Monomer (a): a monomer having a C1-6 polyfluoroalkyl group, monomer (b): vinylidene chloride, monomer (c): a monomer, the homopolymer of which has a glass transition temperature of at least 20° C., monomer (d): a monomer having a crosslinkable functional group, film-forming assistant (x): a specific amide solvent, and film-forming assistant (y): a specific glycol solvent.
US09040624B2	Low VOC colorants with non tip drying A colorant composition for tinting or coloring surface coverings or paint is. provided that has a low volatile organic compound (VOC) concentration, alkylphenoi ethoxylate surfactants (APE) free and hazardous air pollutants (HAPS) free. Additionally, the colorant composition has performance properties substantially equal to or better than tinters possessing high VOC concentrations. The colorant composition includes a colorant component, a dispersant including a polyamide, a surface active agent, water, and optional additives, The polyamide is a high molecular weight polyamide.having at least two anchoring amines, and the surface active agent includes phosphoric acid, phosphate esters, or salts thereof.
US09040621B2	Aqueous dispersions of microgel encapsulated particles utilizing hyperbranched acrylic polymers An aqueous dispersion includes particles at least partially encapsulated in a microgel where the microgel is prepared from a hyperbranched acrylic polymer. In addition, a method for making an aqueous dispersion includes: (1) mixing in an aqueous medium: (a) particles, (b) at least one ethylenically unsaturated monomer, and (c) a water-dispersible hyperbranched acrylic polymer having ethylenic unsaturation; and (2) polymerizing the at least one ethylenically unsaturated monomer and water-dispersible hyperbranched acrylic polymer having ethylenic unsaturation to at least partially encapsulate the particles in a microgel.
US09040616B2	Bleed resistant, oil-extended olefin block copolymer composition with microcrystalline wax Disclosed are oil-extended olefin block copolymer compositions with microcrystalline wax. The microcrystalline wax reduces oil-bleed while maintaining composition softness.
US09040615B2	Compositions of polyesters and fibrous clays Compositions of thermoplastic polyesters containing dispersed nanoparticles of fibrous clay are made by polymerizing the polyester precursors in the presence of exfoliated fibrous clay that has not been organically modified. The compositions have good physical properties and can be melt molded into various articles. Many of these articles may be coated (painted) and are especially useful for appearance parts such as visible exterior automotive body parts.
US09040610B2	Self priming spackling compound A self-priming spackling compound includes between about 35% by weight and about 65% by weight acrylic latex resin, between about 20% by weight and about 50% by weight filler material, and between about 1% by weight and about 20% by weight water. In certain aspects, the latex resin may have an average latex particle size of less than about 0.18 microns, a minimum film formation temperature of less than about 15 degrees Celsius, and/or a glass transition temperature (Tg) of less than about 25 degrees Celsius. To further enhance the self-priming performance of the spackling compound, the formulation may further comprise a colorant such as titanium dioxide.
US09040601B2	Crosslinked compositions, method of making them, and articles comprising them The present invention relates to a composition comprising at least one propylene-based polymer comprising less than 0.1 wt. % diene-derived units based on the weight of the propylene-based polymer, an antioxidant, and a co-agent. The composition can be at least partially crosslinked by electron beam irradiation in a dose of less than 200 kGy, and may be further formed into articles including fibers, yarns, films, and nonwovens, among others. The propylene-based polymer of the present invention may be a polymer blend formed by forming a reactor blend from of two or more polymers produced in two or more reactors.
US09040599B2	Polypropylene resin expanded particles and polypropylene resin in-mold foaming molded body Polypropylene resin expanded particles include polypropylene resin as base material resin having at least two melting peaks on a DSC curve, the at least two melting peaks including (i) a lowest-temperature melting peak of 100° C. or more but 130° C. or less and (ii) a highest-temperature melting peak of 140° C. or more but 160° C. or less, so that the expanded particles: produce an in-mold foaming molded product at a very low mold heating steam pressure; exhibit low distortion, low shrinkage, and a wide range of heating condition for molding, even if the mold heating steam pressure is increased; have satisfactory moldability when the expanded particles are molded by using a mold having a complicated shape or a large mold; and maintain properties such as compressive strength, substantially unimpaired, when the expanded particles make the in-mold foaming molded product.
US09040597B2	Conversion of corn gluten meal into a solid article through the use of a non-toxic additive Disclosed are fast-curing, inexpensive corn-gluten resin compositions, methods for making them, methods for forming them into solid articles. In some embodiments, the resin composition includes corn meal gluten and a non-toxic organic acid.
US09040596B2	Organo-copper reagents for attaching perfluorosulfonic acid groups to polyolefins An ion conducting membrane for fuel cells involves coupling a compound having a sulfonic acid group with a polymeric backbone. Each of the compounds having a sulfonic acid group and the polymeric backbone are first functionalized with a halogen.
US09040589B2	Continuous administration of dopa decarboxylase inhibitors and compositions for same Disclosed herein are compositions that include for example the arginine salt of carbidopa, and methods for treating neurological or movement diseases or disorders such as restless leg syndrome, Parkinson's disease, secondary parkinsonism, Huntington's disease, Parkinson's like syndrome, PSP, MSA, ALS, Shy-Drager syndrome and conditions resulting from brain injury including carbon monoxide or manganese intoxication, using substantially continuous administration of carbidopa or salt thereof together with administration of levodopa.
US09040588B2	Acetamide stereoisomer The compound of formula (I) is a water-stable, long acting β2-selective adrenoceptor agonist useful as a bronchodilator in the treatment of bronchoconstriction associated with reversible obstructive airways diseases and the like. Processes for making the compound of formula (I), as well as related intermediates, are disclosed.
US09040586B2	Veterinary compositions for controlling ecto- and endoparasites in bovines, use of these compositions, use of IGR substances associated with microminerals, method for controlling ecto- and endoparasites in bovines and kit Veterinary compositions are described for controlling ecto- and endo-parasites in animals, such as bovine. The compositions contain an IGR compound(s) or a benzoyl substituted urea(s) along with a mineral mix and at least one carrier.
US09040585B2	Small molecule antagonists of phosphatidylinositol-3,4,5-triphosphate (PIP3) and uses thereof Disclosed are new members of a class of non-lipid small molecule inhibitors which interfere with the interaction between phosphoinositol-3,4,5-triphosphate (PIP3) and pleckstrin homology (PH) domains. These molecules target a broad range of PIP3-dependent signaling events in vitro and exert significant anti-tumor activity in vivo, with improved activity and selectivity toward particular PH domains. The small molecule inhibitors of the invention can be used alone or together with tumor necrosis factor (TNF)-related apoptosis-inducing ligand (TRAIL) or other cancer medicament to treat cancer. Small molecule inhibitors of the invention act synergistically in combination with TRAIL and with other Akt inhibitors in treating cancer. Pharmaceutical compositions and methods for treating cancer are provided.
US09040584B2	Compositions for topical delivery of prostaglandins to subcutaneous fat Described herein are compositions comprising a prostaglandin FP receptor agonist (PFPRA) compound and a fatty acid ester (e.g., isopropyl myristate), optionally comprising an ointment base such as a hydrocarbon base (e.g., petroleum jelly) and/or an organic alcohol (e.g., propylene glycol), that, when topically applied to the skin, locally delivers a therapeutically effective amount of the PFPRA compound to subcutaneous fat under the skin, and methods of preparation. The therapeutic effect is, for example, reduction of the subcutaneous fat under the skin. Further provided are methods of reducing body fat in a subject comprising topically administering the composition to the subject.
US09040583B2	Treatment of disorders associated with G protein-coupled receptor 35 (GPR35) Compounds are provided having agonistic activity against G protein-coupled receptor 35 (GPR35). The compounds are useful for providing antinociception, providing neuroprotection in case of stroke or ischemia, or treating gastric inflammation.
US09040581B1	Methods of treatment using D-serine Methods of treatment using D-serine to target brain cells expressing GluN3 subunit-containing triheteromeric NMDARs are disclosed. The methods include inhibiting calcium ion uptake by brain cells, treating epilepsy, and treating seizures by artificially administering D-serine.
US09040577B2	Continuous administration of L-dopa, dopa decarboxylase inhibitors, catechol-O-methyl transferase inhibitors and compositions for same Provided herein, in part, is a method of treating a neurological or movement disorder in a patient in need thereof, comprising subcutaneously administering to said patient a pharmaceutically acceptable composition comprising levodopa and optionally carbidopa and optionally entacapone or tolcapone, or pharmaceutically acceptable salts thereof, wherein said composition is administered substantially continuously, and compositions that can be used in the disclosed methods.
US09040573B2	Anti-fungal agent An antifungal agent against a fungus of the genus Scytalidium (Scytalidium—dimidiatum, Scytalidium—hyalinum etc.), preferably an antifungal agent for superficial mycosis caused by a fungus of the genus Scytalidium as a pathogenic fungus, which contains luliconazole or a pharmaceutically acceptable salt thereof and/or lanoconazole or a pharmaceutically acceptable salt thereof as active ingredient(s).
US09040570B2	Compounds for anti-fungal treatment Provided are methods of treating or preventing a fungal infection in a subject. The methods comprise selecting a subject with or at risk of developing a fungal infection and administering to the subject a therapeutically effective amount of toremifene and fluconazole or derivatives thereof.
US09040569B2	Compositions and methods for treating or preventing pneumovirus infection and associated diseases The present invention provides novel crystalline polymorphic forms of MDT-637, in particular, crystalline polymorphic forms with physicochemical properties specifically suited for drug production, amorphous formation, composite form, and methods of preparation thereof. The novel polymorphs described herein are useful for the treatment of respiratory disease, such as disease caused by respiratory syncytial virus.
US09040568B2	Pharmaceutical compositions for the treatment of pain This invention discloses a method of treatment of osteoarthritis pain by administration of a composition containing a nicotinic acetylcholine receptor ligand and a nicotinic acetylcholine receptor subtype α4β2 allosteric modulator. The present application also relates to compositions comprising such compounds for use in treating pain and related disorders mediated by controlling neurotransmitter release in a subject.
US09040567B2	BAX agonist, compositions, and methods related thereto The disclosure relates to BAX activators and therapeutic uses relates thereto. In certain embodiments, the disclosure relates to methods of treating or preventing cancer, such as lung cancer, comprising administering a therapeutically effective amount of a pharmaceutical composition comprising a compound disclosed herein or pharmaceutically acceptable salt to a subject in need thereof.
US09040566B2	Adenosine A1 agonists for the treatment of glaucoma and ocular hypertension The present invention relates to the use of selective adenosine A1 agonists, in particular the dicyanopyridines of formula (I), for the treatment and/or prophylaxis of glaucoma and ocular hypertension as well as the their use for the production of a medicament for the treatment and/or prophylaxis of glaucoma and ocular hypertension.
US09040565B2	1H-benzimidazole-5-carboxamides as anti-inflammatory agents There are provided compounds of formula (I), wherein R1, R6, R8, Q2, Q3, Q3a, Q4, L and A have meanings given in the description, and pharmaceutically-acceptable salts thereof, which compounds are useful in the treatment of diseases in which inhibition of the activity of a member of the MAPEG family is desired and/or required, and particularly in the treatment of inflammation and/or cancer.
US09040564B2	Stabilized composition It is intended to provide a pharmaceutical composition which contains a proton pump inhibitor and is stable even if it is stored for a long time. It is also intended to provide a pharmaceutical composition which contains a proton pump inhibitor susceptible to acid, and does not dissolve in the stomach but dissolves in the intestine to release a primary drug product promptly. The object could be achieved by the pharmaceutical composition characterized in that a layer containing a proton pump inhibitor and ethyl cellulose, a layer containing an enteric polymer, and if necessary an intermediate layer composed of one or more layers are formed on a pharmacologically inactive core substance. The intermediate layer is composed of a water-insoluble polymer, a water-soluble polymer, a lubricant and the like.
US09040559B2	BETA2-adrenoceptor agonists Compounds of formula in free or salt or solvate form, where Ar is a group of formula Y is carbon or nitrogen and R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, X, n, p, q and r are as defined in the specification, their preparation and their use as pharmaceuticals, particularly for the treatment of obstructive or inflammatory airways diseases.
US09040558B2	Substituted benzylamino quinolines as cholesterol ester-transfer protein inhibitors The invention is directed to novel substituted benzylamino quinolines, compounds comprising substituted benzylamino quinolines, methods of making substituted benzylamino quinolines, the use of substituted benzylamino quinolines for treating or preventing a variety of conditions or diseases associated with lipoprotein metabolism, and the use of substituted benzylamino quinolines as cholesterol ester-transfer protein inhibitors.
US09040551B2	Small molecule inhibitors of polynucleotide kinase/phosphatase, poly(ADP-ribose) polymerase and uses thereof The present invention generally relates to use of compounds and compositions as a chemosensitizers and/or radiosensitizers and/or inhibitors of PNKP phosphatase activity. The present invention provides pharmaceutical combinations and/or a pharmaceutically acceptable salt thereof, kits containing such compounds and/composition and methods of using such compounds and/or compositions.
US09040550B2	2,4-pyrimidinediamine compounds and their uses The present invention provides 2,4-pyrimidinediamine compounds that inhibit the IgE and/or IgG receptor signaling cascades that lead to the release of chemical mediators, intermediates and methods of synthesizing the compounds and methods of using the compounds in a variety of contexts, including in the treatment and prevention of diseases characterized by, caused by or associated with the release of chemical mediators via degranulation and other processes effected by activation of the IgE and/or IgG receptor signaling cascades.
US09040548B2	Quinazoline derivatives as VEGF inhibitors The invention relates to quinazoline derivatives of formula (I), wherein m is an integer from 1 to 3; R1 represents halogeno or C1-3alkyl; X1 represents —O—; R2 is selected from one of the following three groups: 1) C1-5alkylR3, wherein R3 is piperidinyl-4-yl which may bear one or two substituents selected from hydroxy, halogeno, C1-4alkyl, C1-4hydroxyalkyl and C1-4alkoxy; 2) C2-5alkenylR3, wherein R3 is as defined herein; 3) C2-5alkynylR3, wherein R3 is as defined herein; and wherein any alkyl, alkenyl or alkynyl group may bear one or more substituents selected from hydroxy, halogeno and amino; and salts thereof; processes for their preparation; pharmaceutical compositions containing a compound of formula (I) or a pharmaceutically acceptable salt thereof as an active ingredient.
US09040541B2	4,6-disubstituted pyrimidines useful as kinase inhibitors The present invention provides 4,6-disubstituted pyrimidine compounds useful as kinase inhibitors, pharmaceutically acceptable compositions thereof, and methods of using the same.
US09040538B2	Pyrimidines as novel therapeutic agents The present invention features compounds having the Formula (Ia) and (Ib) (e.g., a compound of any of Formulas ((Ia-2)-(Ia-21)), including other tautomers, stereoisomers, E/Z stereoisomers, prodrugs, pharmaceutically acceptable salts, and compositions thereof. The invention also features methods for treating or preventing pain (e.g., neuropathic pain), inflammation, or epilepsy in a patient by administering an effective amount of a compound of Formula (Ia) or (Ib). The invention also features a method for treating or preventing pain (e.g., neuropathic pain), inflammation, or epilepsy in a patient that includes administering to a patient in need thereof an effective amount of a compound of Formula (IIa) or (IIb) (e.g., a compound of any of Formulas ((IIa-2)-(IIa-6)). The compounds described herein (e.g., a compound of Formulas (Ia), (Ib), (IIa), or (IIb)) can also be used as anticonvulsants.
US09040536B2	Substituted pyrrolo[1,2-a]quinoxalines as PDE9 inhibitors The invention discloses quinoxaline derivatives or salts thereof having PDE9-inhibiting activity and being useful as treating agent of dysuria and the like, which are represented by the formula (I) in the formula, R1 and R2 each independently stands for hydrogen, halogen, alkyl, alkoxy, acyl, amino and the like, R3 stands for alkyl, aryl, saturated carbocyclic group, saturated heterocyclic group, acyl and the like, R4 stands for hydrogen, hydroxy, alkyl or amino, R5 and R8 each independently stands for hydrogen, halogen, alkyl, alkenyl, alkoxy, cyano or nitro, R6 and R7 each independently stands for hydrogen, halogen, alkyl, alkenyl, alkynyl, alkoxy, cyano, amino, carbocyclic group, heterocyclic group, COR9 or SO2R9, R9 stands for hydrogen, hydroxy, alkyl, amino, pyrrolidin-1-yl, piperidin-1-yl, pyperazin-1-yl or the like, X stands for S or O, and A1, A2 and A3 each independently stands for N or C.
US09040535B2	Crystalline molecular comlpexes of tadalafil Crystalline molecular complexes of tadalafil are disclosed. The crystalline molecular complexes include those of tadalafil and oxalic acid, tadalafil and 4-hydroxybenzoic acid, tadalafil and 3-phenylpropanoic acid, tadalafil and malonic acid, tadalafil and methylparaben, and tadalafil and propylparaben. Pharmaceutical compositions containing the crystalline molecular complexes are also disclosed.
US09040534B2	[1,2,4]triazolo[4,3-a]pyrazines as P2X7 modulators The present invention is directed to a compound of Formula (I) and to pharmaceutical compositions comprising compounds of Formula (I). Methods of making and using the compounds of Formula (I) are also within the scope of the invention.
US09040533B2	Oxime-substituted-quinoxaline-type piperidine compounds as ORL-1 modulators The present disclosure relates to Oxime-Substituted Quinoxaline-Type Piperidine Compounds, such as those of Formula (I): and the pharmaceutically acceptable salts and solvates thereof, wherein R1, R2, R3, R4, R20, R21, Q, Y1, Z, A, B, and a are as defined herein; compositions comprising an effective amount of an Oxime-Substituted Quinoxaline-Type Piperidine Compound, and methods to treat or prevent a condition, such as pain, comprising administering to an animal in need thereof an effective amount of an Oxime-Substituted Quinoxaline-Type Piperidine Compound.
US09040525B2	Cyclic amide derivative [Problem]To provide a GPR40 activating agent having, as an active ingredient, a novel compound having a GPR40 agonist action, a salt of the compound, a solvate of the salt or the compound, or the like, particularly, an insulin secretagogues and a prophylactic and/or therapeutic agent against diabetes, obesity, or other diseases.[Means of Solving the Problem]A compound of Formula (1): (where n is 0 to 2; p is 0 to 4; h is 0 to 3; j is 0 to 3; k is 0 to 2; a ring B is an aryl group or a heteroaryl group; X is O, S, or —NR7—; J1 is —CR11aR11b— or —NR11c—; J2 is —CR12aR12b— or —NR12c—; and R1 to R12c are specific groups), a salt of the compound, or a solvate of the salt or the compound.
US09040524B2	Antifungal 5,6-dihydro-4H-pyrrolo[1,2-a][1,4]-benzodiazepines and 6H-pyrrolo[1,2-a][1,4]benzodiazepines substituted with bicycle benzene derivatives The present invention is concerned with novel antifungal 5,6-dihydro-4H-pyrrolo-[1,2-a][1,4]benzodiazepines and 6H-pyrrolo[1,2-a][1,4]benzodiazepines substituted with bicyclic benzene derivatives of Formula (I) wherein R1, R2, R3, R4, R5, R6 and R7 have the meaning defined in the claims. The compounds according to the present invention are active mainly against dermatophytes and systemic fungal infections. The invention further relates to processes for preparing such novel compounds, pharmaceutical compositions comprising said compounds as an active ingredient as well as the use of said compounds as a medicament.
US09040523B2	Antifungal 5,6-dihydro-4H-pyrrolo[1,2-α][1,4]-benzodiazepines and 6H-pyrrolo[1,2-α][1,4]benzodiazepines substituted with benzene derivatives The present invention is concerned with novel antifungal 5,6-dihydro-4H-pyrrolo-[1,2-a][1,4]benzodiazepines and 6H-pyrrolo[1,2-a][1,4]benzodiazepines of Formula (I) wherein R1, R2, R3, R4, R5 and R6 have the meaning defined in the claims. The compounds according to the present invention are active mainly against dermatophytes and systemic fungal infections. The invention further relates to processes for preparing such novel compounds, pharmaceutical compositions comprising said compounds as an active ingredient as well as the use of said compounds as a medicament.
US09040522B2	6-(5-hydroxy-1H-pyrazol-1-yl)nicotinamide inhibitors of PHD The present invention provides compounds of the formula: which are useful as inhibitors of PHD and pharmaceutical compositions thereof.
US09040520B2	Noribogaine salt ansolvates Stable noribogaine salt ansolvates are useful for preparing pharmaceutical compositions and for alleviating nociceptive pain in a patient. Such ansolvates can be prepared by slurrying solvated forms, preferably MeOH solvated noribogaine hydrochloride in EtOH/water.
US09040517B2	Compounds as diacylglycerol acyltransferase inhibitors This invention relates to novel compounds which are inhibitors of acyl coenzymeA: diacylglycerol acyltransferase 1 (DGAT-1), to pharmaceutical compositions containing them, to processes for their preparation, and to their use in therapy for the prevention or treatment of diseases related to DGAT-1 dysfunction or where modulation of DGAT-1 activity may have therapeutic benefit including but not limited to obesity, obesity related disorders, hypertriglyceridemia, hyperlipoproteinemia, chylomicronemia, dyslipidemia, non-alcoholic steatohepatitis, diabetes, insulin resistance, metabolic syndrome, hepatitis C virus infection and acne or other skin disorders.
US09040516B2	Uracil derivative and use thereof for medical purposes The present invention provides: an uracil derivative represented by general formula (I) or a physiologically acceptable salt thereof (in the formula, R1 represents a hydrogen atom, a C1-10 alkyl group, a C2-6 alkene group or a 3- to 6-membered saturated or 4- to 6-membered unsaturated aliphatic ring group which may contain 1 to 2 hetero atoms independently selected from the group consisting of N, O and S; R2 represents a hydrogen atom, a halogen atom, a cyano group, —NRcRd, —N═CHN(CH3)2, or an C1-3 alkyl group; Ar1 and Ar2 independently represent a 5- to 6-membered aromatic ring group which may contain 1 to 3 hetero atoms independently selected from the group consisting of N, O and S; and L represents a 6-membered aromatic ring group which may contain 1 to 4 nitrogen atoms, a pyrazole group, a triazole group, or an imidazole group); and a therapeutic agent or prophylactic agent for various inflammatory diseases associated with elastase, comprises the compound or the like as an active ingredient.
US09040515B2	Aryl and heteroaryl fused lactams This invention relates to compounds of general formula (I) in which R1, R2, U, V, L, M, R5, m, X, Y and Z are as defined herein, and the pharmaceutically acceptable salts thereof, to pharmaceutical compositions comprising such compounds and salts, and to methods of using such compounds, salts and compositions for the treatment of abnormal cell growth, including cancer.
US09040514B2	Chlorobis copper (I) complex compositions and methods of manufacture and use A method of manufacturing an anhydrous copper complex of formula C12H10CICuN2O4 and methods of treating neuromuscular and other diseases, including but not limited to fibromyalgia, multiple sclerosis, muscular dystrophy, rheumatoid arthritis, pain, fatigue, sleeplessness, loss of fine motor control, speech loss, inflexibility, Alzheimer's, dementia, amyotrophic lateral sclerosis, depression, lyme disease, lyme disease co-infection, gastroparesis (GP), myopathy, chronic inflammation and/or incontinence. The anhydrous copper complex preferably is administered in a pharmaceutical and/or dietary supplement composition of the invention.
US09040513B2	Process for preparing platinum-carbene complexes Described is a process for preparing platinum-carbene complexes.
US09040512B2	Phosphorus-containing metal complexes The present invention relates, inter alia, to metal complexes having improved solubility, to processes for the preparaion of the metal complexes, to devices comprising these metal complexes and to the use of the metal complexes.
US09040506B2	7,11-methanocycloocta [B] quinoline derivative as highly functionalizable acetylcholinesterase inhibitors New highly functionalizable Huprine derivatives of formula I: and a method for preparing such compounds and their use for treating neurological diseases in which the level of acetylcholine is affected such as Alzheimer's disease.
US09040505B2	Benzoquinone derivative E3330 in combination with chemotherapeutic agents for the treatment of cancer and angiogenesis Disclosed are novel methods for the therapeutic treatment of cancer and angiogenesis. The enzyme Ape1/Ref-1, via its redox function, enhances the DNA binding activity of transcription factors that are associated with the progression of cancer. The present invention describes the use of agents to selectively inhibit the redox function of Ape1/Ref-1 and thereby reduce tumor cell growth, survival, migration and metastasis. In addition, Ape1/Ref-1 inhibitory activity is shown to augment the therapeutic effects of other therapeutics and protect normal cells against toxicity. Further, Ape1/Ref-1 inhibition is shown to decrease angiogenesis, for use in the treatment of cancer as well other pathologic conditions of which altered angiogenesis is a component.
US09040494B2	RNAi-mediated inhibition of frizzled related protein-1 for treatment of glaucoma RNA interference is provided for inhibition of Frizzled Related Protein-1 mRNA expression, in particular, for treating patients having glaucoma or at risk of developing glaucoma.
US09040491B2	Compositions, methods and kits based on small nuclear RNAs The present invention includes methods for modulating the expression of a gene or mRNA in a cell using small nuclear RNAs comprising specific sequence and structural features and further comprising a nucleic acid cargo.
US09040487B2	Cyclosporine emulsion The present invention relates to a cyclosporine emulsion containing: i) a cyclosporine ii) a natural oil (long chain triglyceride) iii) a phosphatidylcholine, iv) glycerol, v) a pharmaceutically tolerable alkali salt of a free fatty acid, vi) a medium chain triglyceride-oil vii) optionally, hydrochloric acid or sodium hydroxide for pH adjustment viii) water.
US09040482B2	Octapeptide compounds and therapeutic use thereof The present invention relates to novel octapeptide compounds of general formula (I), R-AA1-cyclo(AA2-Tyr3-D-Trp4-AA5-Val6-Cys7)-Thr8-NH2 (I) As these products have a good affinity for certain sub-types of somatostatin receptors, they are particularly useful for treating the pathological states or diseases in which one (or more) of the somatostatin receptors is (are) involved. The invention also relates to pharmaceutical compositions containing said products and their use for the preparation of a medicament.
US09040481B2	Methods for treating steatotic disease Methods for treating fatty liver disease, e.g., hepatic steatosis, using peptide fragments of the C-terminal end of glucagon-like peptide-1 (GLP-1), e.g., GLP-1(28-36).
US09040478B2	Derivatisation of granulocyte colony-stimulating factor The present invention relates to a compound which is a polysaccharide derivative of GCSF, or of a GCSF like protein, wherein the polysaccharide is anionic and comprises between 2 and 200 saccharide units. The present invention also relates to pharmaceutical compositions comprising the novel compounds, and methods for making the novel compounds.
US09040470B2	Lubricating oil composition for sliding section comprising aluminum material, and lubricating method Provided are a lubricant composition capable of reducing friction between sliding parts at least one of which contains an aluminum-based material in a lubrication section, and a method for lubricating an aluminum-based member with the composition. The lubricant composition is for use in a lubrication section having sliding parts at least one of which contains an aluminum-based material, and contains a lubricant base oil and at least one of a phosphorus-containing carboxylic compound and a metal salt thereof (component (A)) at 0.001 to 1 mass % of the composition in terms of phosphorus. The composition may suitably be used as lubricant such as drive train lubricant for automatic or manual transmissions, grease, wet brake oil, hydraulic actuation oil, turbine oil, compressor oil, bearing oil, refrigerant oil, and the like used in apparatus having the sliding parts.
US09040468B2	Hydrolyzable particle compositions, treatment fluids and methods A composition, treatment fluid and method using hydrolyzable fines. A treatment fluid, which may optionally include a high solids content fluid (HSCF) and/or an Apollonianistic solids mixture, includes a fluid loss control agent comprising a dispersion of hydrolyzable fines, optionally with one or more of a surfactant, plasticizer, dispersant, degradable particles, reactive particles and/or submicron particles selected from silicates, γ-alumina, MgO, γ-Fe2O3, TiO2, and combinations thereof.
US09040457B2	Phenylamidines having a high fungicidal activity and use thereof New phenylamidines are described, having general formula (I): and their use for the control of phytopathogenic fungi.
US09040455B2	Method for controlling pests To provide a method which shows excellent effects in controlling pests in a field of soybean, corn or cotton.A method for controlling weeds in a field of soybean, corn or cotton, wherein the field of soybean, corn or cotton is treated with at least one PPO-inhibiting compound selected from the group consisting of flumioxazin, sulfentrazone, saflufenacil, oxyfluorfen, fomesafen-sodium, and the compound of the formula (I): before, at or after seeding with a seed of soybean, corn or cotton treated with one or more fungicidal compounds selected from the group consisting of tolclophos-methyl, thiram, captan, carbendazim, thiophanate-methyl, and (RS)-2-methoxy-N-methyl-2-[alpha-(2,5-xylyloxy)-o-tolyl]ace tamide.
US09040448B2	Method of manufacturing spherical mesoporous silica containing dispersed silver nanoparticles, and spherical mesoporous silica manufactured by said method The present invention relates to a method of preparing a spherical mesoporous silica structure containing silver nanoparticles dispersed therein by adding a silver nitrate solution to an aqueous surfactant solution and performing a sol-gel process and to spherical mesoporous silica prepared thereby. The spherical mesoporous silica is cost-effective compared to a conventional method that uses silver nanoparticles as a raw material, because the silver nitrate solution that is inexpensive compared to silver nanoparticles is used. Also, the spherical mesoporous silica can be with high productivity in large amounts, and thus is easily commercialized. Moreover, because silver nanoparticles are incorporated into the pores of the mesoporous silica, the silver nanoparticles are used stably and do not change color and odor. In addition, the spherical mesoporous silica exhibits various additional effects, including far-infrared ray emission and deodorization, attributable to silica.
US09040447B2	Hydroprocessing catalysts and methods for making thereof A process for making an improved slurry catalyst for the upgrade of heavy oil feedstock is provided. In the process, a metal precursor solution comprising at least a water-soluble molybdenum compound and a water-soluble metal zinc compound is mixed under high shear mixing conditions to generate an emulsion. The emulsion is subsequently sulfided with a sulfiding agent ex-situ, or in-situ in a heavy oil feedstock to form the slurry catalyst. The in-situ sulfidation in heavy oil is under sufficient condition for the heavy oil feedstock to generate the sulfiding source needed for the sulfidation.
US09040446B2	Hydroprocessing catalysts and methods for making thereof A method for preparing an improved slurry catalyst for the upgrade of heavy oil feedstock is provided. In one embodiment, the process comprises: sulfiding at least a metal precursor solution with at least a sulfiding agent forming a sulfided Group VIB catalyst precursor, the metal precursor solution having a pH of at least 4 and a concentration of less than 10 wt. % of Primary metal in solution; and mixing the catalyst precursor with a hydrocarbon diluent to form the slurry catalyst composition. The slurry catalyst prepared therefrom has a BET total surface area of at least 100 m2/g, a total pore volume of at least 0.5 cc/g and a polymodal pore distribution with at least 80% of pore sizes in the range of 5 to 2,000 Angstroms in diameter.
US09040445B2	Catalyst system The present invention provides a catalyst system capable of catalyzing the carbonylation of an ethylenically unsaturated compound, which system is obtainable by combining: a) a metal of Group VIB or Group VIIIB or a compound thereof, b) a bidentate phosphine, arsine or stibine ligand, and c) an acid, wherein said ligand is present in at least a 2:1 molar excess compared to said metal or said metal in said metal compound, and that said acid is present in at least a 2:1 molar excess compared to said ligand, a process for the carbonylation of an ethylenically unsaturated compound, a reaction medium, and use of the system.
US09040444B2	Semi continuous process for the synthesis of a catalyst for use in the manufacture of polyolefins A semi-continuous process and system thereof, for the synthesis of a narrow particle size distribution Zeigler Natta procatalyst for use in the manufacture of polyolefins. The process comprises: (a) mixing a reaction mixture containing a titanium compound; (b) charging a first reactor with said reaction mixture; (c) removing excess reactants from said first reactor as a filtrate; (d) feeding said filtrate to at least one further reactor; and continuously removing excess reactants from said at least further reactor.
US09040442B2	Shaped or unshaped refractory or kiln furniture composition The present description relates to a refractory composition including 70 weight percent to 98 weight percent particulate refractory material and 2 weight percent to 30 weight percent of a binder phase including reactive filler and a binder, the binder phase substantially includes solely reactive andalusite as reactive filler.
US09040441B2	Oxide sintered body and sputtering target Provided are an oxide sintered body and a sputtering target that are ideal for the production of an oxide semiconductor film for a display device. The oxide sintered body and sputtering target that are provided have both high conductivity and high relative density, are capable of forming an oxide semiconductor film having a high carrier mobility, and in particular, have excellent direct-current discharge stability in that long-term, stable discharge is possible, even when used by the direct-current sputtering method. The oxide sintered body of the invention is an oxide sintered body obtained by mixing and sintering zinc oxide, tin oxide, and an oxide of at least one metal (M metal) selected from the group consisting of Al, Hf, Ni, Si, Ga, In, and Ta. When the in-plane specific resistance and the specific resistance in the direction of depth are approximated by Gaussian distribution, the distribution coefficient σ of the specific resistance is 0.02 or less.
US09040437B2	Elastic laminate An elastic laminate has a coextruded film having an outer film layer formed of an elastic and sticky styrene-block copolymer and an inner film layer of lesser elasticity than the outer layer, an outer fleece or nonwoven web or overlay, an outer adhesive layer between the outer fleece web and the outer film layer adhering the outer fleece web to the outer film layer, an inner fleece or nonwoven web or overlay, and an inner adhesive layer between the inner fleece web and the inner film layer adhering the inner fleece web to the inner film layer. The inner adhesive layer forming between the inner fleece web and the inner film layer a bond that is weaker than a bond formed by the outer adhesive layer between the outer fleece web and the outer film layer such that on stretching the inner fleece layer separates locally from the inner film layer.
US09040436B2	Lightweight, durable apparel and laminates for making the same Laminates are described having a durable outer film surface for use in making lightweight liquidproof articles, including articles of apparel, such as outerwear garments. A method of making the laminate and a lightweight outerwear garment having an abrasion resistant exterior film surface is described.
US09040435B2	Superhydrophobic aerogel that does not require per-fluoro compounds or contain any fluorine Provided are superhydrophobic coatings, devices and articles including superhydrophobic coatings, and methods for preparing the superhydrophobic coatings. The exemplary superhydrophobic device can include a substrate component and one or more superhydrophobic coatings disposed over the substrate component, wherein at least one of the one or more superhydrophobic coatings has a water contact angle of at least about 150° and a contact angle hysteresis of less than about 1°. The one or more superhydrophobic coatings can include an ultra high water content acid catalyzed polysilicate gel, the polysilicate gel including a three dimensional network of silica particles having surface functional groups derivatized with a silylating agent and a plurality of pores.
US09040433B2	Photo resist trimmed line end space One or more techniques or systems for forming a line end space structure are provided herein. In some embodiments, a first patterned second hard mask (HM) region is formed above a first HM region. Additionally, at least some of the first patterned second HM region is removed. In some embodiments, a first sacrificial HM region and a second sacrificial HM region are formed above at least one of the first patterned second HM region or the first HM region. Photo resist (PR) is patterned above the second sacrificial HM region, and a spacer region is deposited above the patterned PR and second sacrificial HM region. In some embodiments, at least some of at least one of the spacer region, the PR, or the respective sacrificial HMs is removed. In this way, a line end space structure associated with an end-to-end space is formed.
US09040432B2	Method for facilitating crack initiation during controlled substrate spalling A method is provided in which a substrate including various materials of different fracture toughness (KIc) can be spalled in a controlled manner. In particular, a surface step region is formed within a surface portion of the substrate prior to formation of a stressor layer. The presence of the surface step region within the surface portion of the substrate controls the depth and ease at which crack initiation occurs within the substrate.
US09040431B2	Method for processing silicon wafer A method for processing a silicon wafer is provided. The method includes allowing an etchant to flow along a surface of the silicon wafer to form a line in which a plurality of apertures are arranged in a flow direction of the etchant from an upstream side to a downstream side. The apertures arranged in the line include a first aperture formed on the most upstream side and a second aperture formed downstream of the first aperture in the flow direction of the etchant. The first aperture and the second aperture are subjected to different processes after being formed.
US09040429B2	Pattern formation method A pattern formation method comprises a process of forming a resist pattern with an opening that exposes a first region of a glass film arranged on a substrate through a base film; a process of forming a neutralization film above the glass film; a process of forming a directed self-assembly material layer containing a first segment and a second segment above the glass film; a process of microphase separating the directed self-assembly material layer to form a directed self-assembly pattern containing a first part that includes the first segment and a second part that includes the second segment; and a process of removing either the first part or the second part and using the other as a mask to process the base film.
US09040428B2	Formation of metal nanospheres and microspheres Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications.
US09040427B2	Method of plasma etching A method of plasma etching a silicon carbide workpiece includes forming a mask on a surface of the silicon carbide workpiece, performing an initial plasma etch on the masked surface using a first set of process conditions, wherein the plasma is produced using an etchant gas mixture which includes i) oxygen and ii) at least one fluorine rich gas which is present in the etchant gas mixture at a volume ratio of less than 50%, and subsequently performing a bulk plasma etch process using a second set of process conditions which differ from the first set of process conditions.
US09040423B2	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device is provided. A substrate having a first area with a first poly layer and a second area with a second poly layer is provided. A nitride HM film is then deposited above the first poly layer of a first device in the first area and above the second poly layer in the second area. Afterwards, a first patterned passivation is formed on the nitride HM film in the first area to cover the nitride HM film and the first device, and a second patterned passivation is formed above the second poly layer in the second area. The second poly layer in the second area is defined by the second patterned passivation.
US09040419B2	Semiconductor package and method for manufacturing the same A semiconductor package includes a semiconductor chip having a front surface and a back surface facing away from the front surface; a through electrode formed in the semiconductor chip and passing through the front surface and the back surface; and a contamination preventing layer formed in the semiconductor chip, the through electrode passing through the contamination preventing layer.
US09040418B2	Enhanced capture pads for through semiconductor vias Method of forming a capture pad on a semiconductor substrate. The method includes providing a semiconductor substrate having an active side and an inactive side and having a plurality of unfilled TSVs extending between the active side and the inactive side; filling the TSVs with a metal; defining capture pad areas on at least one of the active side and the inactive side adjacent to the TSVs, the defined capture pad areas comprising insulator islands and open areas; filling the open areas with the same metal to form a capture pad in direct contact with each of the TSVs, each of the capture pads having an all metal portion that follows an outline of each of the TSVs.
US09040416B2	Manufacturing method of metal wire and thin transistor array panel A manufacturing method of a wire including: forming a lower layer on a substrate; forming a middle layer on the lower layer; forming an upper layer on the middle layer; forming, exposing, and developing a photoresist layer on the upper layer to form a photoresist pattern; and etching the upper layer, the middle layer, and the lower layer by using the photoresist pattern as a mask to form a wire such that the upper layer covers an end of the middle layer.
US09040414B2	Semiconductor devices and methods of manufacturing the same A semiconductor device and methods directed toward preventing a leakage current between a contact plug and a line adjacent to the contact plug, and minimizing capacitance between adjacent lines.
US09040413B2	Using saturated and unsaturated ALD processes to deposit oxides as ReRAM switching layer A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and lifetime by custom tailoring the average concentration of defects in the resistive switching film and methods of forming the same. The nonvolatile memory element includes a first electrode layer, a second electrode layer, and a resistive switching layer disposed between the first electrode layer and the second electrode layer. The resistive switching layer comprises a first sub-layer and a second sub-layer, wherein the first sub-layer has more defects than the first sub-layer. A method includes forming a first sub-layer on the first electrode layer by a first ALD process and forming a second sub-layer on the first sub-layer by a second ALD process, where the first sub-layer has a different amount of defects than the second sub-layer.
US09040409B2	Methods of forming solar cells and solar cell modules Embodiments of the present invention are directed to processes for making solar cells by simultaneously co-firing metal layers disposed both on a first and a second surface of a bifacial solar cell substrate. Embodiments of the invention may also provide a method forming a solar cell structure that utilize a reduced amount of a silver paste on a front surface of the solar cell substrate and a patterned aluminum metallization paste on a rear surface of the solar cell substrate to form a rear surface contact structure. Embodiments can be used to form passivated emitter and rear cells (PERC), passivated emitter rear locally diffused solar cells (PERL), passivated emitter, rear totally-diffused (PERT), “iPERC,” Crystalline Reduced-cost Aluminum Fire-Through (CRAFT), pCRAFT, nCRAFT or other high efficiency cell concepts.
US09040408B1	Techniques for wafer-level processing of QFN packages Semiconductor package devices, such as wafer-level package semiconductor devices, are described that have pillars for providing electrical interconnectivity. In an implementation, the wafer-level package devices include an integrated circuit chip having at least one pillar formed over the integrated circuit chip. The pillar is configured to provide electrical interconnectivity with the integrated circuit chip. The wafer-level package device also includes an encapsulation structure configured to support the pillar.
US09040407B2	Sidewalls of electroplated copper interconnects A method including depositing an alloying layer along a sidewall of an opening and in direct contact with a seed layer, the alloying layer includes a crystalline structure that cannot serve as a seed for plating a conductive material, exposing the opening to an electroplating solution including the conductive material, the conductive material is not present in the alloying layer, applying an electrical potential to a cathode causing the conductive material to deposit from the electroplating solution onto the cathode exposed at the bottom of the opening and causing the opening to fill with the conductive material, the cathode includes an exposed portion of the seed layer and excludes the alloying layer, and forming a first intermetallic compound along an intersection between the alloying layer and the conductive material, the first intermetallic compound is formed as a precipitate within a solid solution of the alloying layer and the conductive material.
US09040406B2	Semiconductor chip with power gating through silicon vias A semiconductor chip includes a substrate having a frontside and a backside coupled to a ground. The chip includes a circuit in the substrate at the frontside. A through silicon via (TSV) having a front-end, a back-end, and a lateral surface is included. The back-end and lateral surface of the TSV are in the substrate, and the front-end of the TSV is substantially parallel to the frontside of the substrate. The chip also includes an antifuse material deposited between the back-end and lateral surface of the TSV and the substrate. The antifuse material insulates the TSV from the substrate. The chip includes a ground layer insulated from the substrate and coupled with the TSV and the circuit. The ground layer conducts a program voltage to the TSV to cause a portion of the antifuse material to migrate away from the TSV, thereby connecting the circuit to the ground.
US09040399B2	Threshold voltage adjustment for thin body MOSFETs A structure includes a substrate; a transistor disposed over the substrate, the transistor comprising a fin comprised of Silicon that is implanted with Carbon; and a gate dielectric layer and gate metal layer overlying a portion of the fin that defines a channel of the transistor. In the structure a concentration of Carbon within the fin is selected to establish a desired voltage threshold of the transistor. Methods to fabricate a FinFET transistor are also disclosed. Also disclosed is a planar transistor having a Carbon-implanted well where the concentration of the Carbon within the well is selected to establish a desired voltage threshold of the transistor.
US09040398B2	Method of fabricating seminconductor devices including self aligned refractory contacts Methods of forming semiconductor devices are provided by forming a semiconductor layer on a semiconductor substrate. A mask is formed on the semiconductor layer. Ions having a first conductivity type are implanted into the semiconductor layer according to the mask to form implanted regions on the semiconductor layer. Metal layers are formed on the implanted regions according to the mask. The implanted regions and the metal layers are annealed in a single step to respectively activate the implanted ions in the implanted regions and provide ohmic contacts on the implanted regions. Related devices are also provided.
US09040397B2	Method of making graphene layers, and articles made thereby There is provided a method for forming a graphene layer. The method includes forming an article that comprises a carbon-containing self-assembled monolayer (SAM). A layer of nickel is deposited on the SAM. The article is heated in a reducing atmosphere and coolded. The heating and cooling steps are carried out so as to convert the SAM to a graphene layer.
US09040396B2	Manufacturing method of semiconductor device An object is to provide a technique by which a semiconductor device including a high-performance and high-reliable transistor is manufactured. A protective conductive film which protects an oxide semiconductor layer when a wiring layer is formed from a conductive layer is formed between the oxide semiconductor layer and the conductive layer, and an etching process having two steps is performed. In a first etching step, an etching is performed under conditions that the protective conductive film is less etched than the conductive layer and the etching selectivity of the conductive layer to the protective conductive film is high. In a second etching step, etching is performed under conditions that the protective conductive film is more easily etched than the oxide semiconductor layer and the etching selectivity of the protective conductive film to the oxide semiconductor layer is high.
US09040395B2	Apparatus pertaining to solar cells having nanowire titanium oxide cores and graphene exteriors and the co-generation conversion of light into electricity using such solar cells An apparatus comprising a plurality of solar cells that each comprise a nanowire titanium oxide core having graphene disposed thereon. By one approach this plurality of solar cells can comprise, at least in part, a titanium foil having the plurality of solar cells disposed thereon wherein at least a majority of the solar cells are aligned substantially parallel to one another and substantially perpendicular to the titanium foil. Such a plurality of solar cells can be disposed between a source of light and another modality of solar energy conversion such that both the solar cells and the another modality of solar energy conversion generate electricity using a same source of light.
US09040391B2	Process for producing localised GeOI structures, obtained by germanium condensation The invention relates to a process for making at least one GeOI structure by germanium condensation of a SiGe layer supported by a layer of silicon oxide. The layer of silicon oxide is doped with germanium, the concentration of germanium in the layer of silicon oxide being such that it lowers the flow temperature of the layer of silicon oxide below the oxidation temperature allowing germanium condensation of the SiGe layer.
US09040390B2	Releasable buried layer for 3-D fabrication and methods of manufacturing A releasable buried layer for 3-D fabrication and methods of manufacturing is disclosed. The method includes forming an interposer structure which includes forming a carbon rich dielectric releasable layer over a wafer. The method further includes forming back end of the line (BEOL) layers over the carbon rich dielectric layer, including wiring layers and solder bumps. The method further includes bonding the solder bumps to a substrate using flip chip processes. The flip chip processes comprises reflowing the solder bumps and rapidly cooling down the solder bumps which releases the carbon rich dielectric releasable layer from the wafer.
US09040388B2	Chip assembly with a coreless substrate employing a patterned adhesive layer A patterned adhesive layer including holes is employed to attach a coreless substrate layer to a stiffener. The patterned adhesive layer is confined to kerf regions, which are subsequently removed during singulation. Each hole in the patterned adhesive layer has an area that is greater than the area of a bottomside interconnect footprint of the coreless substrate. The patterned adhesive layer may include a permanent adhesive that is thermally curable or ultraviolet-curable. The composition of the stiffener can be tailored so that the thermal coefficient of expansion of the stiffener provides tensile stress to the coreless substrate layer at room temperature and at the bonding temperature. The tensile stress applied to the coreless substrate layer prevents or reduces warpage of the coreless substrate layer during bonding. Upon dicing, bonded stacks of a semiconductor chip and a coreless substrate can be provided without adhesive thereupon.
US09040387B2	Stacked microelectronic packages having patterned sidewall conductors and methods for the fabrication thereof Embodiments of a method for fabricating stacked microelectronic packages are provided, as are embodiments of a stacked microelectronic package. In one embodiment, the method includes arranging microelectronic device panels in a panel stack. Each microelectronic device panel includes a plurality of microelectronic devices and a plurality of package edge conductors extending therefrom. Trenches are formed in the panel stack exposing the plurality of package edge conductors. An electrically-conductive material is deposited into the trenches and contacts the plurality of package edge conductors exposed therethrough. The panel stack is then separated into partially-completed stacked microelectronic packages. For at least one of the partially-completed stacked microelectronic packages, selected portions of the electrically-conductive material are removed to define a plurality of patterned sidewall conductors interconnecting the microelectronic devices included within the stacked microelectronic package.
US09040385B2	Mechanisms for cleaning substrate surface for hybrid bonding Embodiments of mechanisms for cleaning a surface of a semiconductor wafer for a hybrid bonding are provided. The method for cleaning a surface of a semiconductor wafer for a hybrid bonding includes providing a semiconductor wafer, and the semiconductor wafer has a conductive pad embedded in an insulating layer. The method also includes performing a plasma process to a surface of the semiconductor wafer, and metal oxide is formed on a surface of the conductive structure. The method further includes performing a cleaning process using a cleaning solution to perform a reduction reaction with the metal oxide, such that metal-hydrogen bonds are formed on the surface of the conductive structure. The method further includes transferring the semiconductor wafer to a bonding chamber under vacuum for hybrid bonding. Embodiments of mechanisms for a hybrid bonding and a integrated system are also provided.
US09040382B2	Selective epitaxial growth of semiconductor materials with reduced defects A semiconductor device includes a substrate formed of a first semiconductor material; two insulators on the substrate; and a semiconductor region having a portion between the two insulators and over the substrate. The semiconductor region has a bottom surface contacting the substrate and having sloped sidewalls. The semiconductor region is formed of a second semiconductor material different from the first semiconductor material.
US09040379B2	Semiconductor constructions and methods of forming semiconductor constructions Some embodiments include methods in which first insulative material is formed across a memory region and a peripheral region of a substrate. An etch stop structure is formed to have a higher portion over the memory region than over the peripheral region. A second insulative material is formed to protect the lower portion of the etch stop structure, and the higher portion is removed. Subsequently, at least some of the first and second insulative materials are removed. Some embodiments include semiconductor constructions having a first region with first features, and a second region with second features. The first features are closer spaced than the second features. A first insulative material is over the second region and an insulative structure is over the first insulative material. The structure has a stem joined to a bench. The bench has an upper surface, and the stem extends to above the upper surface.
US09040377B2	Low loss SiC MOSFET A Vertical Multiple Implanted Silicon Carbide Power MOSFET (VMIMOSFET) includes a first conductivity semiconductor substrate, a first conductivity semiconductor drift layer on the top of the substrate, a multitude of second conductivity layers implanted in the drift layer. The body layer is where the channel is formed. A first conductivity source layer is interspaced appropriately inside of the second conductivity layers. A gate oxide of a certain thickness and another oxide of a different thickness, a greater thickness than the gate oxide, placed in between the body layers but in such way that its shape does not distort the gate oxide in the channel. A charge compensated body layer of the second conductivity formed outside of the channel region and only at specific high electric field locations in the structure. The device and the manufacturing method deliver a power SiC MOSFET with increased frequency of operation and reduced switching losses.
US09040375B2	Method for processing a carrier, method for fabricating a charge storage memory cell, method for processing a chip, and method for electrically contacting a spacer structure A method for processing a carrier accordance with various embodiments may include: forming a structure over the carrier, the structure including at least two adjacent structure elements arranged at a first distance between the same; depositing a spacer layer over the structure, wherein the spacer layer may be deposited having a thickness greater than half of the first distance, wherein the spacer layer may include electrically conductive spacer material; removing a portion of the spacer layer, wherein spacer material of the spacer layer may remain in a region between the at least two adjacent structure elements; and electrically contacting the remaining spacer material.
US09040371B2	Integration of dense and variable pitch fin structures Semiconductor devices and method for forming the same. Methods for forming fin structures include forming a protective layer over a set of mandrels in a variable fin pitch region; forming first sidewalls around a set of mandrels in a uniform fin pitch region; removing the set of mandrels in the uniform fin pitch region; removing the protective layer; forming second sidewalls around the first sidewalls in the uniform fin pitch region and the mandrels in the variable fin pitch region; removing the first sidewalls and the mandrels; and etching an underlying layer around the second sidewalls.
US09040370B2	Anti-fuses on semiconductor fins A device includes a substrate, isolation regions at a surface of the substrate, and a semiconductor region over a top surface of the isolation regions. A conductive feature is disposed over the top surface of the isolation regions, wherein the conductive feature is adjacent to the semiconductor region. A dielectric material is disposed between the conductive feature and the semiconductor region. The dielectric material, the conductive feature, and the semiconductor region form an anti-fuse.
US09040365B2	Method for fabricating thin film transistor array substrate A method of fabricating a thin film transistor array substrate is disclosed. The method includes: sequentially forming a first passivation layer, a photo acryl layer and a first transparent metal layer on the substrate provided with the source/drain electrodes and so on; forming a common electrode, which is disposed in the pixel region, and first through third contact holes, which are positioned in regions of the drain electrode, the gate pad and the data pad, respectively, using one of a half-tone mask and a diffractive mask; forming a second passivation layer on the substrate provided with the first through third contact holes; exposing the drain electrode, the gate pad and the data pad by removing the first and second passivation layers from the drain electrode region, the gate pad region and data pad region; and forming a pixel electrode on the second passivation layer opposite to the common electrode by forming a second transparent metal layer on the substrate and performing a third mask procedure for the second transparent metal layer.
US09040363B2	FinFET with reduced capacitance An improved finFET structure, and method forming the same, including a plurality of fins etched from a semiconductor substrate, a plurality of gates above and perpendicular to the plurality of fins, each comprising a pair of spacers on opposing sides of the gates, and a gap fill material above the semiconductor substrate, below the gate, and between the plurality of fins, wherein the gate separates the gap fill material from each of the plurality of fins.
US09040360B1	Methods of manufacture of bottom port multi-part surface mount MEMS microphones Methods for manufacturing multiple bottom port, surface mount microphones, each containing a micro-electro-mechanical system (MEMS) microphone die, are disclosed. Each surface mount microphone features a substrate with metal pads for surface mounting the package to a device's printed circuit board and for making electrical connections between the microphone package and the device's circuit board. The surface mount microphones are manufactured from panels of substrates, sidewall spacers, and lids. Each MEMS microphone die is substrate-mounted and acoustically coupled to the acoustic port disposed in the substrate. The panels are joined together, and each individual substrate, sidewall spacer, and lid cooperate to form an acoustic chamber for its respective MEMS microphone die. The joined panels are then singulated to form individual MEMS microphones.
US09040353B2	Method for manufacturing semiconductor light emitting device A method for manufacturing a semiconductor light emitting device comprises a sealing step of sealing a semiconductor chip fixed on a lead frame with a sealing member, a removal step of removing the sealing member until a surface of the semiconductor chip becomes exposed, an irregularity formation step of forming fine irregularities on a bond surface formed in the removal step, and a bonding step of bonding a wavelength conversion member to the bond surface.
US09040349B2	Method and system for a semiconductor device package with a die to interposer wafer first bond Methods and systems for a semiconductor device package with a die to interposer wafer first bond are disclosed and may include bonding a plurality of semiconductor die comprising electronic devices to an interposer wafer, and applying an underfill material between the die and the interposer wafer. A mold material may be applied to encapsulate the die. The interposer wafer may be thinned to expose through-silicon-vias (TSVs) and metal contacts may be applied to the exposed TSVs. The interposer wafer may be singulated to generate assemblies comprising the semiconductor die and an interposer die. The die may be placed on the interposer wafer utilizing an adhesive film. The interposer wafer may be singulated utilizing one or more of: a laser cutting process, reactive ion etching, a sawing technique, and a plasma etching process. The die may be bonded to the interposer wafer utilizing a mass reflow or a thermal compression process.
US09040348B2	Electronic assembly apparatus and associated methods A method of fabricating an electronic assembly includes fabricating first and second interconnects. The first interconnect is adapted to interconnect a first die to a substrate. The second interconnect is adapted to interconnect the first die to a second die. The method further includes assembling the first die, the second die, and the substrate together such that the first die is disposed above the substrate, and the second die is disposed below the first die.
US09040346B2	Semiconductor package and methods of formation thereof In one embodiment, a semiconductor package includes a semiconductor chip having a first contact region on a first major surface and a second contact region on an opposite second major surface. The semiconductor chip is configured to regulate flow of a current from the first contact region to the second contact region. An encapsulant is disposed at the semiconductor chip. A first contact plug is disposed within the encapsulant and coupled to the first contact region. A second side conductive layer is disposed under the second major surface and coupled to the second contact region. A through via is disposed within the encapsulant and coupled to the second side conductive layer. The first contact plug and the through via form terminals above the first major surface for contacting the semiconductor package.
US09040345B2	Laser ablation technique for electrical contact to buried electrically conducting layers in diamond A method of laser ablation for electrical contact to a buried electrically conducting layer in diamond comprising polishing a single crystal diamond substrate having a first carbon surface, implanting the diamond with a beam of 180 KeV followed by 150 KeV C+ ions at fluencies of 4×1015 ions/cm2 and 5×1015 ions/cm2 respectively, forming an electrically conducting carbon layer beneath the first carbon surface, and ablating the single crystal diamond which lies between the electrically conducting layer and the first carbon surface.
US09040340B2	Temperature grading for band gap engineering of photovoltaic devices A method for fabricating a photovoltaic device includes depositing a p-type layer at a first temperature and depositing an intrinsic layer while gradually increasing a deposition temperature to a final temperature. The intrinsic layer deposition is completed at the final temperature. An n-type layer is formed on the intrinsic layer.
US09040339B2	Practical method of producing an aerogel composite continuous thin film thermoelectric semiconductor material A method is disclosed of constructing a composite material structure, comprised of an aerogel precursor foundation, which is then overlaid throughout its interior with an even and continuous thin layer film of doped thermoelectric semiconductor such that electrical current is transmitted as a quantum surface phenomena, while the cross-section for thermal conductivity is kept low, with the aerogel itself dissipating that thermal conductivity. In one preferred embodiment this is achieved using a modified successive ionic layer adsorption and reaction in the liquid phase.
US09040338B2	Power semiconductor module with method for manufacturing a sintered power semiconductor module Method of manufacturing sinterable electrical components for jointly sintering with active components, the components in planar shape being provided with at least one planar lower face meant for sintering, and an electrical contact area on the face opposite to the sintering face being available in the form of a metallic contact face, whose upper side is contactable by means of a commonly known method of the group: wire bonding or soldering or sintering or pressure contacting, the component being a temperature sensor, whose lower face is provided with a sinterable metallization on a ceramic body, said ceramic body having two electrical contact faces for continued electrical connection.
US09040335B2	Side vented pressure sensor device A semiconductor sensor device has a pressure sensing die and at least one other die mounted on a substrate, and electrical interconnections that interconnect the pressure sensing die and the at least one other die. An active region of the pressure sensing die is covered with a pressure sensitive gel material, and a cap having a cavity is mounted over the pressure sensing die such that the pressure sensing die is positioned within the cavity. The cap has a side vent hole that exposes the gel covered active region of the pressure sensing die to ambient atmospheric pressure outside the sensor device. Molding compound on an upper surface of the substrate encapsulates the at least one other die and at least a portion of the cap.
US09040333B2	Method for fabricating power-generating module with solar cell The invention discloses a method for fabricating power-generating module with solar cell. The method includes the steps of providing a flexible substrate; forming a solar cell unit on the flexible substrate by using a high density plasma at a temperature lower than about 150° C.; and forming a circuit unit on the flexible substrate; wherein the solar cell unit is coupled to the circuit unit, so as to provide the power needed for the operation of the circuit unit.
US09040330B2	Method of manufacturing organic light-emitting display apparatus A deposition apparatus includes (i) a sheet including a slit area, first and second dummy slit areas, and a binding area; and (ii) a frame. The slit area has a plurality of patterning slits that are extended along a first direction and arranged along a second direction crossing the first direction. The first and second dummy slit areas are outside the slit area along the second direction and along the opposite direction to the second direction respectively and have a plurality of dummy slits. The binding area surrounds the slit area and the first and second dummy slit areas. The frame is attached to the binding area of the sheet and shields at least some of the plurality of dummy slits of the first and second dummy slit areas.
US09040327B2	Al(x)Ga(1-x)N-cladding-free nonpolar III-nitride based laser diodes and light emitting diodes A method for fabricating AlxGa1-xN-cladding-free nonpolar III-nitride based laser diodes or light emitting diodes. Due to the absence of polarization fields in the nonpolar crystal planes, these nonpolar devices have thick quantum wells that function as an optical waveguide to effectively confine the optical mode to the active region and eliminate the need for Al-containing waveguide cladding layers.
US09040321B2	Method for manufacturing light emitting diode packages A method for manufacturing LED packages includes steps: providing a lead frame including many pairs of first and second electrodes, and first and second tie bars, the first electrodes and second electrodes each including a main body and an extension electrode protruding outward from the main body; forming many molded bodies to engage with the pairs of the first and second electrodes, the first and second main bodies being embedded into the molded bodies, and the first and second extension electrodes being exposed out from a corresponding molded body; preforming many first grooves at a bottom of each molded body; disposing LED dies in the corresponding receiving cavities; and cutting the molded bodies along edges thereof defining the first grooves in a first direction and then along a second direction perpendicular to the first direction to obtain many individual LED packages.
US09040320B2	Manufacturing method of organic light emitting display device A manufacturing method of an organic light emitting display device is disclosed which includes: forming a thin film transistor on each sub-pixel region which is defined in a substrate; forming a passivation layer on the substrate provided with the thin film transistor; forming a first electrode of an organic light emitting diode in each sub-pixel region of the passivation layer; forming a bank pattern in boundaries of the sub-pixel region of the passivation layer; forming a photoresist pattern, which exposes a first sub-pixel region, on the bank pattern; forming an organic light emission layer on the first electrode within the first sub-pixel region and an organic material layer on the photoresist pattern by depositing an organic material on the entire surface of the substrate provided with the photoresist pattern; and removing the photoresist pattern and the organic material pattern using a detachment film.
US09040312B2	Method for producing ferroelectric thin film It is possible to produce a ferroelectric thin film controlled to have the preferential crystal orientation in the (100) plane with a simple process without providing a seed layer or a buffer layer. A ferroelectric thin film is produced on a lower electrode by irradiating a surface of the lower electrode of a substrate having the lower electrode where the crystal plane is oriented in a (111) axis direction, with an atmospheric pressure plasma, coating a composition for forming a ferroelectric thin film on the lower electrode, and heating and crystallizing the coated composition.
US09040310B2	Antibody-nanoparticle conjugates and methods for making and using such conjugates Disclosed herein are antibody-nanoparticle conjugates that include two or more nanoparticles (such as gold, palladium, platinum, silver, copper, nickel, cobalt, iridium, or an alloy of two or more thereof) directly linked to an antibody or fragment thereof through a metal-thiol bond. Methods of making the antibody-nanoparticle conjugates disclosed herein include reacting an arylphosphine-nanoparticle composite with a reduced antibody to produce an antibody-nanoparticle conjugate. Also disclosed herein are methods for detecting a target molecule in a sample that include using an antibody-nanoparticle conjugate (such as the antibody-nanoparticle conjugates described herein) and kits for detecting target molecules utilizing the methods disclosed herein.
US09040308B1	Sample collection and analysis Management of the health status of an animal colony using a plurality of blood collection cards and the analysis of dried blood from members of the colony that has been collected on the cards. Members of the colony may be removed from the colony as a result of the analysis.
US09040307B2	Fluorescent pH detector system and related methods Fluorescent pH detector and methods for measuring pH using the fluorescent pH detector.
US09040305B2	Method of analysis for determining a specific protein in blood samples using fluorescence spectrometry The invention encompasses analyzers and analyzer systems that include a single particle analyzer, methods of using the analyzers and analyzers systems to analyze samples, either for single particles, e.g., protein molecules, or for multiple particles (multiplexing), methods of doing business based on the use of the analyzers or analyzer systems of the system, and electronic media for storing parameters useful in the analyzers and analyzer systems of the invention.
US09040303B2	Apparatus for measuring volume of a fluid An apparatus for measuring a volume of fluid includes at least one emitter configured to project a signal toward a predetermined position of a sample container, at least one receiver configured to receive the signal after the signal interacts with the sample container and a fluid transfer device in communication with the receiver and sample container. A change in the signal received by the receiver indicates when the fluid has dropped below the predetermined position. The apparatus determines a volume of fluid that the fluid transfer device has removed from the sample container when the receiver detects that the fluid has dropped below the predetermined position.
US09040302B2	Genetically modified Streptococcus thermophilus bacterium Methods and compositions for targeted delivery of biotherapeutics are provided. The compositions comprise bile-sensitive St. thermophilus bacteria modified to release a biotherapeutic agent following bile exposure. Biotherapeutic agents released by the St. thermophilus bacteria disclosed herein include AQ and AQR rich peptides. Methods of the invention comprise administering to a subject a St. thermophilus bacterium modified to release a biotherapeutic agent following bile exposure. Administration of the St. thermophilus bacterium promotes a desired therapeutic response. The bacterium may be modified to express and release AQ or AQR rich peptides which subsequently inhibit cellular apoptosis or reduce mucosal damage. Thus, methods of the invention find use in treating or preventing a variety of gastrointestinal disorders including C. difficile infection and antibiotic-associated diarrhea.
US09040301B2	Separator device, deposition device and system for handling of somatic plant embryos Methods and devices for separating fluid-suspended plant somatic embryos and embryogenic tissue based on differences in their fluid drag properties are disclosed. Deposition method and device for depositing plant somatic embryos into embryo receiver comprising growth substrate by means of a fluid jet is disclosed. An automated system for processing plant somatic embryos from the bioreactor to the growth substrate is also disclosed.
US09040299B2	Generating a mucin-producing cell from an umbilical cord amniotic membrane epithelial stem cell The present invention relates to the generation of a mucin-producing cell using stem/progenitor cells obtained from the amniotic membrane of umbilical cord and therapeutic uses of such mucin-producing cells.
US09040298B2	Method of selecting stem cells having high chondrogenic differentiation capability Thrombospondin 1 (TSP-1), TSP-2, interleukin 17B receptor (IL-17BR) and heparin-binding epidermal growth factor-like growth factor (HB-EGF) associated with stem cell activity and use thereof.
US09040292B2	Constant-temperature equipment Provided is constant-temperature equipment wherein maintenance is facilitated with the least failure, and highly reliable culturing and testing can be carried out. Mechanical and electrical structures are eliminated from the inside of a temperature-controlled chamber (15) by using a non-contact magnetic arrangement as a drive transmission for a sample table (5) and a sample table drive (6), thus reducing failure and enhancing maintainability. In addition, a conveyor (11) is provided with a pass box to minimize change in atmosphere during conveying. The sample table drive (6) and the conveyor (11) can be attached removably to the temperature-controlled chamber (15) to permit sterilization at high temperature.
US09040291B2	Constant-temperature equipment Constant-temperature equipment wherein mechanical and electrical structures are eliminated from the inside of a temperature-controlled chamber (15) by using a non-contact magnetic arrangement as a drive transmission for a sample table (5) and a sample table drive mechanism (6), thus reducing failure and enhancing maintainability. In addition, a conveyance mechanism (11) is provided with a pass box adjacent which sliding shielding plates (9) are stacked vertically, and the shielding plates (9) are linked with the conveyance mechanism (11) by an engaging mechanism provided in the conveyance mechanism (11) to allow the plates to be opened and closed by a travel mechanism (12), thus simplifying the structure and minimizing change in atmosphere during conveying. The sample table drive mechanism (6) and the conveyance mechanism (11) can be attached removably to the temperature-controlled chamber (15) to permit sterilization at high temperature.
US09040289B2	Gravity assisted compost reactor A composting system is provided that uses gravity and natural thermal convection to yield a compact, modular, plug-flow compost reactor requiring minimal aeration and agitation energy. The compost reaction takes place in a self-supporting containment unit which is mounted at an angle with respect to its supporting base pad such that minimal external energy is required to mix and transport the composting material during its residence time within the container. The system uses natural convection to supplement external energy in the introduction of air into and through the material. Furthermore, the configuration of the containment unit and its supporting structures allow rapid deployment of compost facilities with minimal permanent civil work and minimal space requirements in a manner that enables subsequent relocation of the equipment.
US09040286B2	Diagnosis and treatment of cancer Provided herein are methods for diagnosing cancer by determining the level of expression of SETDB1 in a biological sample. Also provided herein are methods for treating cancer by administering an inhibitor of SETDB1 to a subject in need thereof.
US09040285B2	Sensing device for sensing a fluid A sensing device including an inlet port for receiving a fluid, a measurement chamber for sensing the fluid, a fluid channel coupling the inlet port and the measurement chamber for transporting the fluid from the inlet port to the measurement chamber, and a fluid stop unit for stopping and controllably releasing the flow of fluid between the inlet port and the measurement chamber.
US09040282B2	Producing dicarboxylic acids using polyketide synthases The present invention provides for a polyketide synthase (PKS) capable of synthesizing a dicarboxylic acid (diacid). Such diacids include diketide-diacids and triketide-diacids. The invention includes recombinant nucleic acid encoding the PKS, and host cells comprising the PKS. The invention also includes methods for producing the diacids.
US09040280B2	Protease variants The present invention relates to proteases having at least 75% identity to a protease derived from Thermoascus aurantiacus and comprises at least one modification in the amino acid sequence thereof. These protease variants have improved thermostability. The invention also relates to DNA encoding these proteases, methods of their production, as well as the use thereof.
US09040276B2	DNA binding protein-polymerase chimeras The invention relates to compositions and methods directed to chimeric DNA polymerases, which comprise a mutated DNA binding polypeptide domain and a mutated or wild-type DNA polymerase polypeptide domain.
US09040274B2	Method for increasing protein thermal stability The invention provides a simple and effective method for increasing thermal stability of a wide range of proteins, comprising fusing a self-assembling amphipathic peptide to the C- or N-terminal of target proteins. The fusion protein can have a half life up to 26 times longer than that of the wild type protein.
US09040271B2	Method for producing renewable fuels According to the present invention, organic material is converted to biogas through anaerobic digestion and the biogas is purified to yield a combustible fluid feedstock comprising methane. A fuel production facility utilizes or arranges to utilize combustible fluid feedstock to generate renewable hydrogen that is used to hydrogenate crude oil derived hydrocarbons in a process to make transportation or heating fuel. The renewable hydrogen is combined with crude oil derived hydrocarbons that have been desulfurized under conditions to hydrogenate the liquid hydrocarbon with the renewable hydrogen. The present invention enables a party to receive a renewable fuel credit for the transportation or heating fuel.
US09040270B2	De-fatted soy production process and value added by-products from de-fatted soy flour An improved process for producing de-fatted soy utilizing a de-fatted soy flour and for producing value added by-products from de-fatted soy flour wherein soybeans are de-hulled and the de-hulled stream ground to a flour consistency. The ground soy flour is mixed with water and other additives to produce a vitamin and mineral enriched stream that is then filtered to various value added by-products. In a preferred embodiment the vitamin and mineral enriched stream is filtered through a 0.1-1.0 micron membrane to produce a de-fatted soy product stream and a fatted soy product stream. The fatted soy product stream can be dried to produce dry, less than 12% water by weight, product B for use in cosmetics and pharmaceutical products. The de-fatted soy product can be filtered through reverse osmosis (RO) filtration unit to obtain a vitamin and mineral enriched product stream that can be dried to powder form and used as a food supplement additive I. If desired the full fatted soy flour or the de-fatted soy product stream can be combined with whole stillage from an ethanol process and used in producing various other value added products.
US09040269B2	Metabolically engineered cells for the production of resveratrol or an oligomeric or glycosidically-bound derivative thereof A recombinant micro-organism producing resveratrol by a pathway in which phenylalanine ammonia lyase (PAL) produces trans-cinnamic acid from phenylalanine, cinnamate 4-hydroxylase (C4H) produces 4-coumaric acid from said trans-cinnamic acid, 4-coumarate-CoA ligase (4CL) produces 4-coumaroyl CoA from said 4-coumaric acid, and resveratrol synthase (VST) produces said resveratrol from said 4-coumaroyl CoA, or in which L-phenylalanine- or tyrosine-ammonia lyase (PAL/TAL) produces 4-coumaric acid, 4-coumarate-CoA ligase (4CL) produces 4-coumaroyl CoA from said 4-coumaric acid, and resveratrol synthase (VST) produces said resveratrol from said 4-coumaroyl CoA. The micro-organism may be a yeast, fungus or bacterium including Saccharomyces cerevisiae, E. coli, Lactococcus lactis, Aspergillus niger, or Aspergillus oryzae.
US09040267B2	Polyhydroxyalkanoate production method Provided are processes for the production and high efficiency processing of polyhydroxyalkanoates (PHA) from carbon sources comprising carbon-containing gases or materials.
US09040264B2	Recombinant cyanobacterium expressing a transcription factor domain protein The invention provides microorganisms such as cyanobacteria genetically engineered to express proteins that include transcription factor domains for upregulation of lipid biosynthetic pathways. In addition to expression a gene encoding a transcription factor domain protein, the recombinant microorganisms can express at least one exogenous gene that encodes a polypeptide for the production of a fatty acid, fatty acid derivative, or triglyceride. Also included are methods of producing a fatty acid, fatty acid derivative, or triglyceride using the engineered microorganisms described herein as well as nucleic acid molecules encoding novel transcription factor domain proteins.
US09040259B2	Production of polyketides and other natural products The present invention relates to production of polyketides and other natural products and to libraries of compounds and individual novel compounds. One important area is the isolation and potential use of novel FKBP-ligand analogs and host cells that produce these compounds. The invention is particularly concerned with methods for the efficient transformation of strains that produce FKBP analogs and recombinant cells in which cloned genes or gene cassettes are expressed to generate novel compounds such as polyketide (especially rapamycin) FKBP-ligand analogs, and to processes for their preparation, and to means employed therein (e.g. nucleic acids, vectors, gene cassettes and genetically modified strains).
US09040257B2	Basidiomycetous yeast mutant The present invention provides a host for genetic recombination useful in the production of heterologous proteins in a large scale, by suppressing the production of extracellular polysaccharides in the basidiomycetous yeasts. Cryptococcus sp. S-2 D11 strain (FERM BP-11482) which is characterized in that the production of extracellular polysaccharides is suppressed as compared with the parent strain.
US09040250B2	Binding interaction of proanthocyanidins with bacteria and bacterial components A composition having proanthocyanidin compounds having an average degree of polymerization of at least about 6. A method of administering to an immunosuppressed patient or a patient diagnosed with sepsis or septic shock a composition having a proanthocyanidin. A method of administering to a patient diagnosed with a gram negative bacterial infection a composition having proanthocyanidin compounds having an average degree of polymerization of at least about 6.
US09040248B2	Kits for detecting and monitoring endocrine disrupting chemicals (EDCs) Described herein are compositions, a system, and kits for detection of endocrine disruptor chemicals (EDCs) in environmental samples, such as samples of water including but not limited to waste water treatment plant effluent, using a live-cell fluorescence-based nuclear translocation reporter system. Upon binding of a ligand to a fluorescent-labeled reporter protein, the protein (and therefore the fluorescence) is translocated in a ligand level-dependent manner from the cytoplasm to the nucleus of live mammalian cells; this translocation is detectable as diffuse (cytoplasmic) fluorescence converting to localized, brightly fluorescent nuclei. The described kits can be used to reliably detect very low levels of EDC contamination, including in high throughput analysis systems as described.

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