| Document | Document Title |
|---|---|
| US08947495B2 |
Telepresence apparatus for immersion of a human image in a physical environment
A telepresence device allows a remote meeting participant to establish a telepresence at a remote meeting location. The telepresence device provides a video image of the remote meeting participant on a video display screen at a meeting location To enhance the visual sensation that the remote person is present at the meeting location, the telepresence device may display the silhouette image of the remote meeting participant without the image of the background scene of the remote participant's location (e.g., office, home or home office). Further, the telepresence device may be equipped with a rear-facing camera that captures a video image of the background scene behind the telepresence device at the meeting location. The silhouette image of the remote meeting participant may be superimposed on the video image of the background scene at the meeting location, which is captured by the rear-facing camera. |
| US08947492B2 |
Combining multiple bit rate and scalable video coding
Video streams are generated using a combination of Multiple Bit Rate (MBR) encoding and Scalable Video Coding (SVC). Capabilities and requests of the clients are used in determining the video streams to generate as well as what video streams to deliver to the clients. The clients are placed into groups based on a resolution capability of the client. For each resolution grouping, MBR is used for generating spatial streams and SVC is used for generating temporal and quality streams. |
| US08947489B2 |
Video call service
A videophone apparatus includes a communication interface for communicating with a system server and a peer; at least one processor; and at least one memory including computer program code; the at least one memory and the computer program code cause the videophone apparatus to connect the videophone apparatus via a first wireless connection to the system server; transmit authentication information from the videophone apparatus to the system server via the first wireless connection for initiating account generation for at least one video call service; and receive client information from the system server. The videophone apparatus further determines a client application based on the received client information; establishes a peer-to-peer connection between the videophone apparatus and the peer over a second wireless connection; and triggers a video call service over the peer-to-peer connection utilizing the determined client application and the account generated by the system server. |
| US08947488B2 |
Display apparatus and display method thereof
A display method is provided, which includes displaying content on a screen; and if a user motion having directivity is recognized, dividing the screen into plural screens according to the directions of the user motion. |
| US08947485B2 |
Drawing control device, laser-light emitting system, drawing method, and computer program product
A drawing control device includes: a fill-stroke generating unit that generates a fill stroke that includes a plurality of strokes that fill a drawing area; a shape-stroke generating unit that generates a shape stroke which is a stroke of a shape to be formed on the drawing area; a first detecting unit that detects an overlap portion where the fill stroke and the shape stroke overlap with each other; a modifying unit that removes the overlap portion from the fill stroke to modify the fill stroke to obtain a drawing stroke; a drawing-instruction generating unit that generates a drawing instruction for drawing each stroke in the drawing stroke; and a drawing control unit that controls a drawing device by using the drawing instruction to cause the drawing device to draw the drawing stroke on an object. |
| US08947481B2 |
Printer, printing control program, and printing method
The disclosure discloses a printer comprises a print object receiving portion, a first, a second, and a third increment mode receiving portion, a first and a second image generating portion. The print object receiving portion receives an input operation of the print object comprising a print identifier. The first increment mode receiving portion receives a setup operation of the print identifier, an increment interval, and an increment execution count. The first image generating portion generates first printed matter images using a plurality of different types of increment patterns. The second increment mode receiving portion receives a selection operation of the plurality of types of increment patterns. The second image generating portion generates second printed matter images using a plurality of different types of assignment patterns. The third increment mode receiving portion receives a selection operation of any one of the plurality of types of assignment patterns. |
| US08947472B2 |
Pixel array
A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different. |
| US08947470B2 |
Method of controlling backlight device and display apparatus using the same
In a display apparatus, a display panel is divided into dimming areas and a backlight device includes light source blocks providing light to the dimming areas. Average gray-scale values and maximum gray-scale values respectively corresponding to the dimming areas are generated based on image signals provided to the dimming areas. Whether the average gray-scale values and the maximum gray-scale values are respectively within first and second reference ranges are checked. One of at least two parameters is selected according to a checked result, and representative brightness values respectively corresponding to the dimming areas are determined using the selected parameter. Duty ratios of the light source blocks are controlled based on the representative brightness values. As a result, power consumption is reduced when applying a dimming device to the display apparatus. |
| US08947469B2 |
Display device and display control device
A display device includes a display panel on which images are displayed and which includes a plurality of display regions; a plurality of driving units that display the images in the plurality of display regions; a displayable region detecting unit that detects a displayable region at a time of abnormality of the display panel; an abnormality-time display image generating unit that generates an abnormality-time display image according to the displayable region detected by the displayable region detecting unit; and an abnormality-time display control unit that displays the abnormality-time display image generated by the abnormality-time display image generating unit in a displayable region while causing a driving unit of the plurality of driving units of which a corresponding display region is the displayable region to display an image in the corresponding display region. |
| US08947466B2 |
Display panel, method for driving the display panel, and display apparatus for performing the method
A display panel includes first and second substrates. The first substrate includes a light blocking layer having an opening through the light blocking layer. The opening is arranged in a pixel area. The second substrate includes first and second transistors, first and second driving electrodes, and a shutter. The first transistor is turned on in response to a low level control voltage. The second transistor is electrically connected to the first transistor and is turned on in response to receiving a low level voltage from the first transistor. The first driving electrode is electrically connected to the first transistor, and the second driving electrode is electrically connected to the second transistor. The shutter exposes or covers the opening by moving to the first driving electrode or the second driving electrode according to the relative levels of voltages applied to the first and second driving electrodes. |
| US08947462B2 |
Apparatus and method for changing user interface of portable terminal
An apparatus for changing a user interface of a portable terminal, by which a user interface and an operating system are automatically changed according to folding of a folding display unit of the portable terminal, and a method for changing a user interface of a portable terminal. The apparatus includes a folding display unit and a controller for performing a control operation for changing a user interface according to a screen size of the display unit, the screen size of the display unit being varied through folding of the display unit. |
| US08947457B2 |
Method for providing information on object which is not included in visual field of terminal device, terminal device and computer readable recording medium
The present invention relates to a method for providing information on an object excluded in a visual field of a terminal in a form of augmented reality (AR) by using an image inputted to the terminal and information related thereto. The method includes the steps of: (a) specifying the visual field of the terminal corresponding to the inputted image by referring to at least one piece of information on a location, a displacement and a viewing angle of the terminal; (b) searching an object(s) excluded in the visual field of the terminal; and (c) displaying guiding information on the searched object(s) with the inputted image in a form of the augmented reality; wherein the visual field is specified by a viewing frustum whose vertex corresponds to the terminal. |
| US08947456B2 |
Augmented reality process for sorting materials
Systems and methods for processing materials for a recycling workstream are disclosed. The system may include one or more sorting surfaces on which sortable items may be placed. Illumination sources may be provided to illuminate both the items and the sorting surface(s). A variety of sensor systems may also be provided. The outputs of the sensor systems may be supplied to a computing system for determining the composition of the items and their location on the sorting surface(s). The computing system may also control the surface(s), illumination sources, and sensor systems. Additionally, the system may include one or more augmented reality interface devices used by sorters at the sorting facility. The computing system may communicate data streams to the augmented reality interfaces to provide the users augmented reality sensations. The sensations may give the users information and instructions regarding how to sort the items into one or more sorting bins. |
| US08947454B2 |
Display device for vehicle
In a display device for a vehicle displays information on a second layer of a first display screen when a display state is changed, the display device displays, on the second layer of the second display screen, an icon corresponding to the information, the display device displays a predetermined image so that the predetermined image displayed on the first layer of the first display screen is different from the predetermined image displayed on the first layer of the second display screen, thereafter, the display device gradually changes the image displayed on the first layer of the first display screen so that a part of or the entirety of the predetermined image displayed on the first layer of the first display screen is the same as the predetermined image displayed on the first layer of the second display screen. |
| US08947452B1 |
Mechanism for displaying visual clues to stacking order during a drag and drop operation
Disclosed are various approaches for displaying graphical objects. In one approach, first and second graphical objects are displayed in a first state. In the first state a portion of the second graphical object that is overlapped by a portion of the first graphical object is completely obstructed from view by the portion of the first graphical object. When in a second state, the first and second graphical objects are displayed in a manner different from the first state. In the second state the portion of the second graphical object that is overlapped by the portion of the first graphical object is represented as being visible along with the portion of the first object and with muted visibility relative to a portion of the second graphical object that is not overlapped by a portion of the first graphical object. |
| US08947449B1 |
Color space conversion between semi-planar YUV and planar YUV formats
A system and techniques for converting a source image frame in a particular YUV format to another YUV format is presented. The system can include a texture component, a luminance component, and a chrominance component. The texture component can be configured to generate luminance input pixels and chrominance input pixels from the source image. The luminance input pixels can each include a luma component and the chrominance input pixels can each include a first chroma component and a second chroma component. The luminance component can be configured to generate luminance output pixels, where the luminance output pixels can each include a group of luminance input pixels. The chrominance component can be configured to generate chrominance output pixels, where the chrominance output pixels can each include a group of first chroma components or a group of second chroma components. |
| US08947448B2 |
Image processing device, image data generation device, image processing method, image data generation method, and data structure of image file
A parallax representation unit in a displayed image processing unit uses a height map containing information on a height of an object for each pixel to represent different views caused by the height of the object. A color representation unit uses, for example, texture coordinate values derived by the parallax representation unit to render the image, shifting the pixel defined in the color map. The color representation unit uses the normal map that maintains normals to the surface of the object for each pixel to change the way that light impinges on the surface and represent the roughness accordingly. A shadow representation unit uses a horizon map, which maintains information for each pixel to indicate whether a shadow is cast depending on the angle relative to the light source, so as to shadow the image rendered by the color representation unit. |
| US08947443B2 |
Information processing apparatus and information processing method
Disclosed herein is an information processing apparatus including: a first drawing processing block configured to generate a video signal by executing predetermined signal processing on entered image data; a second drawing processing block having a higher drawing processing power than the first drawing processing block and being configured to generate a video signal by executing predetermined signal processing on entered image data; a workload measuring block configured to measure at least one of a workload in the first drawing processing block and a workload in the second drawing processing block; a storage block configured to store an application; and a control block configured to select the first drawing processing block or the second drawing processing block to execute the application read from the storage block, on the basis of at least one of the measured workload in the first drawing processing block and the second drawing processing block. |
| US08947438B2 |
Reducing font instructions
One or more techniques and/or systems are disclosed for reducing font execution instructions for a font, and thereby a file size for the font. The font execution instructions can be scanned (e.g., by examining tables) to identify one or more common instruction sets in the font execution instructions. A function can be defined for a common instruction set, and the instances or appearances of the common instruction set in the font execution instructions can be replaced with a call to the function. Because the call is generally smaller (e.g., comprises fewer lines of code) than the common instruction set it replaces, the number of execution instructions for the font is reduced. |
| US08947437B2 |
Interactive navigation environment for building performance visualization
A tool for providing a visualization of a system may reveal an interactive navigation environment for building performance observation and assessment. The tool may be associated with a processor. The environment may incorporate a treemap, a graph pane, a treemap filter, a graph pane selector, a selected units box and a date/time control mechanism. A visualization of the environment, among other things, may be presented on a display. The treemap may exhibit a building geometry and/or equipment units hierarchically, along with some data information. Units may be interactively selected from the treemap and placed in the box for analysis. The graph pane may show a configuration and display of unit analysis. Selection of detailed views for units in the box may be provided by the graph pane selector. Date and time intervals for analysis may be selected by the control mechanism. |
| US08947435B2 |
Host apparatus connected to image forming apparatus and information displaying method thereof
Disclosed are a host apparatus connected to an image forming apparatus and an information displaying method thereof. An information displaying method of a host apparatus which receives a data of at least one image forming apparatus including: receiving a data of the image forming apparatus; displaying a User Interface (UI) screen including a data area displaying the data by item and a graphic area displaying a graph of the data in the data area; adding a data of an item in the data area to the graphic area; determining whether the data of the item added is graphicalizable; and graphicalizing and displaying the data of the item added in the graphic area according to the determination result. With this, the host apparatus provides a user with convenience in facilitating graph reprocessing and data expansion as the user needs with regard to a web solution or an application to control information of the image forming apparatus. |
| US08947433B2 |
Spatiotemporal visualization of sensor data
An apparatus for visualizing data includes memory for storing sensor data and a processor. The processor is configured to generate a map of a geographic area, and to display at a first location on the map at least one icon graphically representing a measurement of the sensor at the first location over a period of time and graphically representing the period of time. |
| US08947430B1 |
System and method for rendering a particle-based fluid surface
A method for rendering a particle-based fluid surface includes generating a depth image of a plurality of particles which form a fluid surface, and smoothing the depth image to generate a smoothed depth image. From the smoothed depth image, a smoothed surface position and a smoothed surface normal for each of a plurality of pixels included within the smoothed depth image is determined, and a shaded surface of the fluid is rendered as a function of the smoothed surface positions and the smoothed surface normals. |
| US08947429B2 |
Gestures and tools for creating and editing solid models
A modeling tool is activated in a 3D modeling application executing on a multi-touch device. A visual representation of a grid system tool is displayed in an active modeling plane and has three separate regions that determine the type of operation to be performed. An existing 3D form is displayed on the tool. A starting touch event of a gesture is received over the existing 3D form within one of the regions. As the gesture is received in the computer, the 3D form may be dynamically extended by adding 3D geometry to the 3D form (thereby adding faces to the 3D form). Alternatively, the 3D form may be scaled (i.e., if the starting touch event occurs over a visual scale grip. Alternatively, if the gesture consists of two taps, a bridge may be created joining the two tapped locations. |
| US08947428B2 |
Method and system for displaying stereoscopic detail-in-context presentations
A method for generating a stereoscopic presentation of a region-of-interest in a monoscopic information representation. The method includes the steps of: (a) selecting first and second viewpoints for the region-of-interest; (b) creating a lens surface having a predetermined lens surface shape for the region-of-interest, the lens surface having a plurality of polygonal surfaces constructed from a plurality of points sampled from the lens surface shape; (c) creating first and second transformed presentations by overlaying the representation on the lens surface and perspectively projecting the lens surface with the overlaid representation onto a plane spaced from the first and second viewpoints, respectively; and, (d) displaying the first and second transformed presentations on a display screen to generate the stereoscopic presentation. |
| US08947427B2 |
Systems and methods of object processing in virtual worlds
Systems and methods of virtual world interaction, operation, implementation, instantiation, creation, and other functions related to virtual worlds (note that where the term “virtual world” is used herein, it is to be understood as referring to virtual world systems, virtual environments reflecting real, simulated, fantasy, or other structures, and includes information systems that utilize interaction within a 3D environment). Various embodiments facilitate interoperation between and within virtual worlds, and may provide consistent structures for operating virtual worlds. The disclosed embodiments may further enable individuals to build new virtual worlds within a framework, and allow third party users to better interact with those worlds. |
| US08947421B2 |
Method and server computer for generating map images for creating virtual spaces representing the real world
A method and server computer for generating map images and providing the map images to users through the Internet are described. Web sites are automatically and recursively visited and downloaded through hyperlinks. Content items containing address and establishment information are retrieved from the information as downloaded from the visited web sites. The content retrieved items are indexed to associate the address information items contained therein with the establishment information items contained therein about establishments which are located in the addresses associated therewith respectively. A visual indication indicative of the establishment corresponding to an establishment information item is superimposed on a map image in a position corresponding to the address of this establishment with reference to the indexed content items. The map image is transmitted to a user through the Internet in response to a request message from the user. |
| US08947419B2 |
Display controller, display device, display system, and method for controlling display device
In one embodiment of the present application, a display controller is capable of changing a refresh rate, indicative of how often a screen displayed on a display device having a plurality of pixels is switched, between a low refresh rate of 40 Hz and a normal refresh rate of 60 Hz and generates (i) a dot clock (reference clock) serving as a timing signal indicative of a timing of operation in the display device, (ii) video data indicative of an image to be displayed on the screen, (iii) Hsync for defining a horizontal period of a display on the screen, and (vi) Vsync for defining a vertical period of the display on the screen, so as to supply the dot clock, the video data, Hsync, and Vsync to the display device, wherein the display controller includes a dot clock generation circuit for generating the reference clock whose frequency is constant without depending on a change of the refresh rate. This makes it possible to provide the display controller which can suppress occurrence of noise also in switching the refresh rate and which does not allow any screen derangement which is caused by the noise. |
| US08947412B2 |
Display driving system using transmission of single-level embedded with clock signal
A display driving system includes a timing control section having an LVDS receiving unit for receiving data signals, a data processing unit for temporarily storing the data signals, processing the data signals and outputting processed data signals, a timing generation unit for generating clock signals and timing control signals, and a transmission unit for transmitting the data signals; and a panel driving section having row driving units for sequentially emitting gate signals toward a display panel and column driving units for receiving the signals transmitted through signal lines from the transmission unit and supplying the received signals to the display panel. In the timing control section, the transmission unit has driving parts which embed the clock signals between the data signals at the same level and generate and output single level transmission data. |
| US08947410B2 |
Power calibration of multiple light sources in a display screen
A display device with multiple light sources includes a first detector for detecting a brightness of one or more different portions of the image formed on the display device, a second detector that measures output intensities of the light sources, and a controller that records correlation values that correlate input power settings of the light sources with the detected brightness and the measured output intensities. During operation of the display device, the controller applies the correlation values to determine the proper input power settings of the light sources so that brightness uniformity among the multiple light sources can be achieved. |
| US08947409B2 |
Display panel
A display panel has an amorphous silicon gate driver. A variable capacitor is formed at one end of a gate line to prevent the deterioration of display quality due to high temperature noise. A predetermined level of capacitance is provided to the variable capacitor to the reduce ripple of gate voltage and eliminate the high temperature noise. |
| US08947408B2 |
Source driver and method for updating a gamma curve
A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data from the timing controller via a data bus, converts the first pixel data to a first drive voltage according to a first reference voltage group, and drives a display panel by the first drive voltage. The voltage controller receives a voltage command from the timing controller, generates and changes a first reference voltage configuration data according to the voltage command. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data to generate and adjust the first reference voltage group for applying to the first drive channel circuit. Furthermore, a method for updating a new gamma curve by the source driver is also provided. |
| US08947407B2 |
Low cost LED driver with integral dimming capability
A distributed system for driving strings of series-connected LEDs for backlighting, display and lighting applications includes multiple intelligent satellite LED driver ICs connected to a an interface IC via serial bus. The interface IC translates information obtained from a host microcontroller into instructions for the satellite LED driver ICs pertaining to such parameters as duty factor, current levels, phase delay and fault settings. Fault conditions in the LED driver ICs can be transmitted back to the interface IC. An analog current sense feedback system which also links the LED driver ICs determines the supply voltage for the LED strings. |
| US08947402B2 |
Touch sensitive image display
We describe a touch sensitive image display device for projecting a touch sensitive displayed image at an acute angle onto a surface on which the device is placed. The device comprises: light sources to project two-dimensional first and second light distributions in respective first and second planes; and a multi-pixel sensor system to remotely detect touch of an area of said surface within or adjacent to the displayed image by detecting light from the first distribution to provide a detected touch signal. The multi-pixel sensor system also remotely detects presence of an object within the second light distribution to provide a detected presence signal. The device is configured to multiplex projection of the first light and second distributions. A controller has an input to receive the detected touch and detected presence signals and is configured to control the device responsive to these signals. |
| US08947397B2 |
Electronic apparatus and drawing method
According to one embodiment, an apparatus includes a display detects a position of a first contact in which an area of contact with an object is equal to or smaller than a first threshold value, and a position of a second contact in which an area of contact with an object is equal to or larger than a second threshold value, a corrector corrects the position in which the first contact is sensed, and a drawing module draws at least one of a locus of a position corrected by the correction module, and a locus of the position of the first contact. The corrector corrects the position in which the first contact is sensed, by using at least one of whether the second contact is sensed, and a positional relationship between the first contact and the second contact. |
| US08947395B2 |
Control circuit for sensing capacitive changes of a touch panel and a method thereof
The present invention relates to a control circuit and control method for detecting the capacitance of a touch panel. The control circuit comprises: a signal-detecting circuit for charging a sensing wire of the touch panel to obtain an intensity signal of the sensing wire; an intensity/frequency conversion unit for converting the intensity signal into a frequency signal, the frequency of which corresponds to the level of the intensity signal; and a frequency-analyzing unit for analyzing the frequency signal to obtain a signal amount of the corresponding sensing wire. The control circuit for the capacitive touch panel has a good SNR, which will not be affected or lowered by noise signals in the circuit environment, and is constituted of simple components to reduce the occupied area on the chip and lower the cost. |
| US08947392B2 |
Multi-driver touch panel
A novel capacitive touch system includes a first controller having a plurality of channels, a first sensor row having a first discrete sensor element and a second discrete sensor element, a second sensor row having a first discrete sensor element and a second discrete sensor element, a first sensor column, a second sensor column, and a first signal line electrically coupling one of the plurality of channels of the controller to both the first and second discrete sensor elements of the first sensor row. In a particular embodiment, the first controller includes a second channel electrically connected to both the first and second discrete sensor elements of the second sensor row. In another particular embodiment, the capacitive touch system includes a second controller having a plurality of channels, the first sensor column includes a first discrete sensor element and a second discrete sensor element, and a first channel of the second controller is electrically coupled to both the first and second discrete sensor elements of the first sensor column. |
| US08947383B2 |
User interface system and method
The user interface system of the preferred embodiments includes a sheet that defines a surface on one side and at least partially defines a cavity on an opposite side; a volume of a fluid contained within the cavity; a displacement device that modifies the volume of the fluid to expand the cavity, thereby outwardly deforming a particular region of the surface; and a sensor that detects a force applied by a user that inwardly deforms the particular region of the surface. The user interface system has been specifically designed to be used as the user interface for an electronic device, more preferably in an electronic device that benefits from an adaptive user interface, but may alternatively be used in any suitable application. |
| US08947382B2 |
Wearable display device, corresponding systems, and method for presenting output on the same
An electronic device can include detectors for altering the presentation of data on one or more displays. In a wearable electronic device, a flexible housing can be configured to enfold about an appendage of a user, such as a user's wrist. A display can disposed along a major face of the flexible housing. A control circuit can be operable with the display. A gaze detector can be included to detect a gaze direction, and optionally a gaze cone. An orientation detector can be configured to detect an orientation of the electronic device relative to the user. The control circuit can alter a presentation of data on the display in response to a detected gaze direction, in response to detected orientation of the wearable electronic device relative to the user, in response to touch or gesture input, or combinations thereof. Secondary displays can be hingedly coupled to the electronic device. |
| US08947381B2 |
Display device
A display device according to an embodiment includes a touch panel, a plurality of detecting units, a blocking unit, and a calculating unit. The display device is incorporated in a vehicle, and the touch panel receives a pressing operation. The plurality of detecting units detect a pressure value on the touch panel. |
| US08947379B2 |
Inductive charging for active stylus
In one embodiment, a stylus includes one or more electrodes and one or more computer-readable non-transitory storage media embodying logic for transmitting signals wirelessly to a device through a touch sensor of the device. The stylus also includes inductive-charging components in or on the stylus for charging or powering the stylus with electromagnetic radiation from inductive-charging components in or on the device. The inductive-charging components in or on the stylus may also charge or power the device by transmitting electromagnetic radiation to the inductive-charging components in or on the device. |
| US08947376B2 |
Desktop reveal expansion
A dual-screen user device and methods for revealing a combination of desktops on single and multiple screens are disclosed. Specifically, a determined number of desktops is displayed to at least one of the screens of the device conditioned upon input received and the state of the device. Where a screen of the device is determined to be inactive, the desktop is not displayed to the screen, but is stored in a virtually displayed state by the device. Upon receiving input that the inactive screen is active, the device can actually display the desktop to the screen. |
| US08947374B2 |
Electronic medical system touch phrase technology
Electronic medical system touch phrase technology includes a method comprising initializing a touch phrase button by a processor such that the initializing associates a first text with the touch phrase button; receiving an input associated with the touch phrase button; updating a state of the touch phrase button based upon the input including associating a second text with the touch phrase button; and communicating the state of the touch phrase button to a memory device. |
| US08947373B2 |
Method and apparatus for reducing coupled noise influence in touch screen controllers
A method and apparatus for reducing influence of noise for touch screen controllers employing noise listening synchronization, delay lines, filtering and sensing selected touch screen electrodes. |
| US08947370B2 |
Touch panel and method for manufacturing the same
A touch panel includes a plurality of first electrode patterns being serially connected by a plurality of first connection patterns; a plurality of second electode patterns being serially connected by a plurality of second connection patterns; and a plurality of routing lines; wherein at least two of the plurality of first electrode patterns are connected to at least one of the plurality of routing lines. |
| US08947368B2 |
Touch screen panel
A touch screen panel includes a transparent substrate; a plurality of first sensing patterns at a first side of the transparent substrate and coupled to each other along a first direction; a plurality of second sensing patterns at the first side of the transparent substrate and coupled to each other along a second direction, the second sensing patterns being alternately arranged with the first sensing patterns not to overlap with the first sensing patterns; and a phase difference compensating layer at the first side of the transparent substrate and adapted to compensate for a birefringence phase difference of a liquid crystal layer in a liquid crystal display panel at a second side of the transparent substrate. |
| US08947363B2 |
Adjustable keyboard and electronic device employing adjustable keyboard
A keyboard includes an upper frame, a main body, a lower frame, and an adjustment mechanism. The two frames cooperate with each other to sandwich the main body. The lower frame includes a bottom plate defining a though hole. The adjustment mechanism is configured to adjust an inclined angle of the keyboard, and includes an adjustment member, a supporting member, a driving member and a position stopper. The adjustment member is operated by a user. The supporting member protrudes from the bottom plate via the through hole to support the keyboard on a supporting surface. The driving member drives the supporting member to move along a central axis of the through hole to adjust a protruding distance of the supporting member when the adjustment member is operated. The position stopper resists the supporting member to secure the supporting member when the adjustment member is free. |
| US08947360B2 |
Set of handheld adjustable panels of ergonomic keys and mouse
A set of handheld, adjustable panels including a plurality of ergonomic keys which function as a keyboard and mouse to allow a user to easily input data to an electronic device. The handheld keyboard and mouse includes two handheld components. Each component comprises a base that fits into the user's palm, a plurality of adjustable finger panels, and an adjustable thumb portion adjacent to the finger panels. The finger panels include a plurality of keys so as to function as a keyboard, and the thumb portion also includes a plurality of keys and acts like a mouse. Each component may also include clips or straps for securing the component to the user's hand, as well as a stand for supporting the component when it is not in use. In addition, at least one of the components may include a display means. |
| US08947357B2 |
Position detecting device, information processing device, position detection method, information processing method, and computer readable medium
A position detecting device includes a device specifying unit, a motion obtaining unit, and a relative position detecting unit. The device specifying unit specifies plural information processing devices that have been brought into contact with one another. The motion obtaining unit obtains information about a motion of any one of the plural information processing devices. The relative position detecting unit detects, on the basis of a motion produced when the any one of the plural information processing devices specified by the device specifying unit is brought into contact with another of the plural information processing devices, relative positions of the plural information processing devices specified by the device specifying unit. |
| US08947340B2 |
Backlight unit and display apparatus having the same
A backlight unit includes a plurality of light sources, a boost circuit, a plurality of balance circuits, and a plurality of first resistors. The boost circuit boosts an input alternating current voltage and applies a driving alternating current voltage to the light sources. Each of the balance circuits includes a first capacitor and is disposed between an output terminal of the boost circuit and the light sources. Each of the first resistors connects two balance circuits among the balance circuits. |
| US08947337B2 |
Display device
An object is to provide a display device that performs accurate display. A circuit is formed using a transistor that includes an oxide semiconductor and has a low off-state current. A precharge circuit or an inspection circuit is formed in addition to a pixel circuit. The off-state current is low because the oxide semiconductor is used. Thus, it is not likely that a signal or voltage is leaked in the precharge circuit or the inspection circuit to cause defective display. As a result, a display device that performs accurate display can be provided. |
| US08947334B2 |
Liquid crystal display device including drive section for controlling timing of pixel switching elements, driving method of the same and electronic equipment
The present disclosure provides a liquid crystal display device including: for each pixel, a first switching element provided in common for a plurality of subpixels making up a pixel, the first switching element having its one end connected to a signal line; for each pixel, a plurality of second switching elements one provided for each subpixel, each of the plurality of second switching elements being connected between the pixel electrode of one of the plurality of subpixels and the other end of the first switching element; and a drive section adapted to turn ON and OFF the plurality of second switching elements in sequence during the ON period of the first switching element and turn OFF the second switching element that turns ON last in sequence first, and then turn OFF the first switching element. |
| US08947329B2 |
OLED display wherein the storage capacitor is charged by a second power source according to inverted emission control signals
An organic light emitting display includes a scan driver for driving scan lines and emission control lines, a data driver for driving data lines, a display unit including pixels at crossing regions of scan lines and data lines, first power source lines coupled to a first power source configured to supply a first voltage and coupled to pixels in columns, horizontal power source lines extending in a direction parallel with scan lines and coupled to pixels in rows, and a second power source line coupled to the horizontal power source lines and to a second power source configured to supply the same voltage as the first power source, each of the pixels being configured to store a voltage corresponding to voltages of the second power source and a data signal and to control an amount of current that flows from the first power source in accordance with the stored voltage. |
| US08947327B2 |
Display apparatus, driving method thereof, and electronic system
A display apparatus includes: a pixel array section including a row of scanning lines, a column of signal lines, and pixels in a matrix, each of the pixels disposed at an intersection of both of the lines; and a drive section. The drive section performs line progressive scanning on the pixels. The pixel includes a light emitting device, a sampling transistor, a driving transistor, a switching transistor, and a holding capacitor. The sampling transistor samples a video signal in the holding capacitor, the driving transistor changes the device to a luminous state, the switching transistor becomes ON in advance of the sampling of the video signal to change the light emitting device to a non-luminous state, and the sampling transistor takes in the OFF voltage from the signal line to the driving transistor, thereby preventing a penetration current from flowing from the power source toward the fixed potential. |
| US08947323B1 |
Content display methods
Methods and systems involving a graphic display in a head mounted display (HMD) are disclosed herein. An exemplary system may be configured to: (1) at a computing system associated with a head-mountable display, receive head-movement data indicative of head movement; (2) use one or more context signals to determine a first activity associated with the head-mountable device; (3) determine a head-movement interpretation scheme corresponding to the first activity; (4) apply the determined head-movement interpretation scheme to determine input data corresponding to the received head-movement data; and (5) provide the determined input data for at least one function of the head-mountable display. |
| US08947320B2 |
Method for indicating location and direction of a graphical user interface element
In a particular embodiment, a method includes receiving a user input at a first display surface of an electronic device to move a graphical user interface element displayed at the first display surface. The electronic device includes a second display surface separated from the first display surface by a gap. The method also includes determining that at least a portion of the graphical user interface element is to be moved beyond an edge of the first display surface into the gap such that the at least a portion of the graphical user element will not be displayed at the first display surface. The method further includes displaying the at least a portion of the graphical user interface element at the second display surface based on a location and a direction of movement of the graphical user interface element at the first display surface. |
| US08947318B2 |
Antenna apparatus
An antenna apparatus that includes a first antenna having a first feed point, a second antenna having a second feed point, and a first non-feed element grounded at a first ground point disposed at a first predetermined distance from the first feed point and the second feed point. |
| US08947307B2 |
Shark fin type car antenna assembly
A car antenna assembly includes an outer cover, an antenna unit, a fixing seat, a locking bar, a control board, and a base. The antenna unit is made of a metallic strip which is bent freely to form a plurality of antenna elements which are connected successively. The outer cover covers the antenna unit and the fixing seat. Thus, the height of the antenna elements is increased gradually from the front end toward the rear end of the antenna unit, while the antenna elements have a constant spacing so that the bandwidth of the antenna elements is increased so as to increase the receiving effect of the AM and FM signals. The car antenna assembly has a shark fin shape to reduce the air drag and air shear noise. |
| US08947302B2 |
Antenna system with antenna swapping and antenna tuning
Electronic devices may be provided that contain wireless communications circuitry. The wireless communications circuitry may include radio-frequency transceiver circuitry and first and second antennas. An electronic device may include a housing. The first antenna may be located at an upper end of the housing and the second antenna may be located at a lower end of the housing. A peripheral conductive member may run around the edges of the housing and may be used in forming the first and second antennas. The radio-frequency transceiver circuitry may have a transmit-receive port and a receive port. Switching circuitry may connect the first antenna to the transmit-receive port and the second antenna to the receiver port or may connect the first antenna to the receive port and the second antenna to the transmit-receive port. |
| US08947301B2 |
Multi-band loaded antenna
A planar antenna for wireless information transfer can include a planar loading portion electrically coupled to a driven node of a wireless communication circuit, and a folded conductive strip portion coupled to the planar loading portion, the folded conductive strip portion comprising at least two segments laterally offset from each other and at least partially laterally overlapping with each other. The planar loading portion can be configured to establish a specified bandwidth of a second operating frequency range, leaving a first specified operating frequency range substantially unchanged. |
| US08947298B2 |
GNSS receiver and positioning method
A GNSS receiver includes: a first correlation peak detecting unit (1102) that detects a peak of a correlation value between a positioning signal and a C/A code replica signal; a second correlation peak detecting unit (1104) that detects a peak of the correlation value through a multipath error reduction technique; a signal intensity detecting unit (110, 112) that detects a signal intensity of the positioning signal; a switching unit (108) that inputs the positioning signal to the second correlation peak detecting unit (1104) when the signal intensity is higher than or equal to a threshold, and inputs the positioning signal to the first correlation peak detecting unit (1102) when the signal intensity is lower than the threshold; a pseudo-range calculation unit (114) that calculates a pseudo-range based on the detected correlation peak; and a positioning calculation unit (116) that calculates a location of the GNSS receiver based on the pseudo-range. |
| US08947295B2 |
Low clutter method for bistatic RCS measurements
A bistatic radar measurement system is provided having a radar source configured to produce a radio frequency signal. A transmitting antenna is configured to transmit the radio frequency signal toward a target. A receiving antenna is configured to receive a reflected radio frequency signal from the target. A support system is configured to support the receiving antenna. The support system includes a plurality of low scattering dielectric strings configured to orient the receiving antenna. |
| US08947293B2 |
Radar apparatus
Provided is a radar apparatus that can detect the failure of the transmission switch. The radar apparatus includes: a plurality of transmission antennas; transmission switches that select a transmission antenna for transmitting an electromagnetic wave from among the plurality of transmission antennas; a plurality of reception antennas that receive a reflected wave which is the electromagnetic wave reflected from a target as a reception signal; a signal processing unit that detects the target based on a sampling signal obtained by sampling the reception signal; and a failure judgment unit that compares first reception signals transmitted from one of the plurality of transmission antennas and received by the plurality of reception antennas, with second reception signals transmitted from another of the plurality of transmission antennas and received by the plurality of reception antennas, and judges whether or not any one of the transmission switches has failed based on a comparison result. |
| US08947290B2 |
Successive approximation AD converter
A higher-order DAC and a lower-order DAC each have a plurality of capacitive elements having capacitance values weighted with a binary ratio and are configured so that a first terminal of each of the capacitive elements is connected to a common node and a second terminal thereof is connected to either a first or second voltage selectively. The higher-order DAC and the lower-order DAC are coupled by a coupling capacitor. A higher-order DAC control circuit outputs either a correction control signal or a digital signal output from a successive approximation circuit selectively to the higher-order DAC. The lower-order DAC has at least one variable capacitive element of which a first terminal is connected to the common node and a second terminal is connected to either the first or second voltage selectively depending on a higher-order bit of the digital signal output from the successive approximation circuit to the higher-order DAC. |
| US08947286B2 |
Analog/digital converter
An analog/digital converter includes: a first analog/digital conversion unit that performs digital conversion on received first analog input voltage in a first time period; a second analog/digital conversion unit that performs digital conversion on received second analog input voltage in a second time period that is different from the first time period; and a first coupling capacitor that connects the first analog/digital conversion unit and the second analog/digital conversion unit, and wherein the second analog/digital conversion unit receives, through the first coupling capacitor, first residual voltage that is remaining voltage of the first analog input voltage on which digital conversion is performed in the first analog/digital conversion unit, as the second analog input voltage. |
| US08947282B1 |
Method and apparatus for a current control
A current controller includes impedance elements coupled to form at least one impedance ladder circuit which exhibits a fixed impedance at an input and current divider steps each differing in a current magnitude by a multiple of three with respect to the current magnitude in an adjacent less significant step. Single pole triple throw (SPTT) switchably couple an associated step in the impedance ladder circuit to one of three outputs. Three discrete current sources or sinks are each coupled to a corresponding one of the outputs of each of the SPTT switches. The digital driver is coupled to each control input of each SPTT switch to additively deliver selected ones of the stepped currents from each step of the impedance ladder circuit to a corresponding selected one of the current sources or sinks. |
| US08947277B2 |
Multi-channel sample-and-hold circuit and analog-to-digital converter using the same
A sample-and-hold circuit including an operational amplifier configured to output a result signal to the ADC; a feedback capacitor connected between an input terminal and an output terminal of the operational amplifier to form a feedback path; a plurality of sampling capacitor blocks each connected to one of a plurality of channels and configured to sample and hold an analog signal input to each of the channels; a plurality of controllers each connected between one of the sampling capacitor blocks and the operational amplifier; and a reset unit connected between a reference voltage source and the input terminal of the operational amplifier to reset the operational amplifier when the operational amplifier does not perform a holding operation. The plurality of controllers configured to switch the sampled signal so that held signals for the respective channels are sequentially input to the operational amplifier. |
| US08947270B2 |
Apparatus and method to accelerate compression and decompression operations
A processor is described that includes an instruction execution pipeline having an instruction fetch unit to fetch and decode an instruction. The processor also has an execution unit to execute the instruction. The execution unit has a state machine and content addressable memory (CAM) circuitry. The state machine is to receive a pointer to a stream of DEFLATE encoded information, fetch a section of the DEFLATE encoded information and apply the section of the DEFLATE encoded information to the CAM to obtain decoded DEFLATE information. |
| US08947269B2 |
Key input unit and key input method
A digital processor having a key input unit and a key input method are disclosed. The key unit includes: a base that is fixed at the central position of the key unit; a slider that horizontally moves in parallel to the horizontal plane of the base by the user's operation; a frame that supports the slider so as to horizontally move; and a restoration unit that gives a resistive force against the horizontal movement of the slider and restores the horizontally-moved slider to an original position. Accordingly, it is possible to reduce the number of keys by increasing the number of information to be input by the use of a single key. |
| US08947265B2 |
Signal timing coordination system for crosswalk beacons
A signal or lighting system synchronizes the flashing of multiple signal or lighting assemblies. When one of the assemblies is triggered, it broadcasts a temporally staggered sequence of signals, each signal instructing the receiving assemblies to initiate flashing of their beacons a given countdown time after that particular signal is transmitted. The countdown times of the various signals all count down to the same flashing start time so that the originating and receiving beacons all being flashing at the same time. The temporal diversity of the signals enhances the ability to overcome potential interference as at least one of the signals in the sequence is likely to be received by the destination assemblies. |
| US08947258B2 |
Reliable, long-haul data communications over power lines for meter reading and other communications services
A system, method and computer program product provides for power line communications (PLC) over electric power lines includes a device mountable near an electrical distribution transformer (DT) to provide a high speed interface and communicates with one or multiple access devices, which provide low speed interfaces for analog signals or digital signals over RS 232, RS 485, optical, wireless and Ethernet. The device transmits data to/from these access devices over the electric lines to other repeaters over one or more wires of an electrical line or over multiple lines, and serves to strengthen and improve signal quality. Upon detecting a wire or line is having problems carrying data, the data is sent over other wires, and upon power line failures, wireless backup to mobile/GSM and WiMax networks is utilized. The device permits utilities and others to read electric meters, monitor the power quality of the distribution grid and detect power losses/failures/outages, and permits telecom service providers and others to provide a communications link to cell phone towers, WiFi Access Points and enable broadband Internet and telephony in rural, remote or sparely populated areas. |
| US08947255B2 |
Method and apparatus for generating a predetermined type of ambient lighting
A predetermined type of ambient lighting is generated in which the influence of each of a plurality of luminaries on a predetermined type of ambient lighting is determined (203) and illumination of each of the plurality of luminaries is controlled (209) to generate said predetermined type of ambient light based on the determined influence of each of the plurality o f luminaries. |
| US08947247B2 |
System and method for detecting and preventing cable theft in electric vehicle supply equipment
A system and method is provided for preventing cable theft in electric vehicle supply equipment (EVSE). A sensor may be configured to sense a short between at least two components of a cable in the EVSE. A processor may be configured to determine that the cable is being cut in response to the sensing. The processor may be further configured to generate an alert in response to a determination that the cable is being cut. |
| US08947242B2 |
Gas valve with valve leakage test
This disclosure relates generally to valves, and more particularly, to gas valve assemblies. In one example, a valve leakage test may be performed on a valve assembly including a valve body with a first valve and a second valve, where the valves may be positioned across a fluid path in the valve body with an intermediate volume between the valves. A pressure sensor may be in fluid communication with the intermediate volume and may sense a measure that is related to the pressure in the intermediate volume. The pressure sensor may communicate with a controller to determine a measure that is related to a pressure change in the intermediate volume and compare the measure that is related to a pressure change to a first and/or second threshold value. The controller may output a signal if the measure meets and/or exceeds the first and/or second threshold value. |
| US08947238B2 |
System and method for multi-media experience capture and data transfer
A system and method for multi-media experience capture and data transfer includes a system for transferring data including a first wireless communication system located on a moveable amusement attraction, a second wireless communication system located on the moveable amusement attraction, and logic to operate the first wireless communication system and the second wireless communication system based on a changeable parameter of the moveable amusement attraction. |
| US08947236B2 |
Sensing properties of a material loading a UHF RFID tag by analysis of the complex reflection backscatter at different frequencies and power levels
An RFID device for sensing the properties of a material in proximity to a UHF tag. The RFID device includes a microchip, an antenna operatively coupled to the microchip, and an impedance transforming section operatively coupled to the microchip and to the antenna. Changing an electrical characteristic of at least one component of the RFID device results in a complex reflected signal at a reader device representing a sensed state of a material in proximity to the RFID device. |
| US08947233B2 |
Methods and systems of a multiple radio frequency network node RFID tag
In embodiments of the present invention improved capabilities are described for a Radio Frequency ID (RFID) tag that contains multiple Radio Frequency (RF) network nodes that may include memory storage for the RFID tag, the memory storage may include one time programmable (OTP) memory and many time programmable (MTP) memory and the storage of the information may be within the OTP and MTP memory. |
| US08947229B1 |
Method and apparatus to control operations of a device based on detection of a predetermined chemical substance
In an embodiment, an apparatus includes a removable portion having a material and a chemical detection system coupled with the removable portion. The chemical detection system can obtain an amount of the material from the removable portion and determine whether the amount of material obtained from the removable portion includes a predetermined substance. In response to determining that the amount of the material obtained from the removable portion includes the predetermined substance, the chemical detection system can provide a first signal to initiate a first operation of the apparatus. Additionally, in response to determining that the amount of material obtained from the removable portion does not include the predetermined substance, the chemical detection system can generate a second signal to display an alert that indicates the material is not approved by at least one of a manufacturer of the apparatus or a supplier of the apparatus. |
| US08947223B2 |
Warning and scene lighting system
A lighting system for use with an emergency vehicle comprises at least one elongated lighting bar mounted to an exterior surface of the emergency vehicle, the lighting bar comprises a plurality of lighting elements operable to emit light, the at least one lighting bar operable to be placed in a first substantially horizontal lowered position and a second substantially vertical raised position, and a controller electrically coupled to the at least one lighting bar and configured to receive user input and controllably place the at least one lighting bar in one of a raised and lowered positions in response to the user input, the controller further configurable to operate the plurality of lighting elements in a predetermined repeating on/off sequence involving increasing number of lit lighting elements and increasing light intensity over time. |
| US08947222B2 |
Methods and apparatus to detect mobile devices
Example methods and apparatus to detect mobile devices are disclosed. A disclosed example apparatus includes a processor and a memory in communication with the processor having instructions stored thereon that, when executed, cause the processor to determine whether a first wireless transceiver is in communication range of a vehicle. The first wireless transceiver is to provide an identifier associated with a person. When the first wireless transceiver is not in communication range of the vehicle, a second wireless transceiver in the vehicle is transitioned from a first power transmission mode to a relatively lower power transmission mode. |
| US08947220B2 |
Speech recognition functionality in a vehicle through an extrinsic device
Speech recognition in a vehicle through an extrinsic device includes detecting, via the vehicle, a presence of a mobile communications device that is configured with a speech recognition component. A vehicle processor encodes data lists stored in the vehicle and transmits the data lists and a vehicle identifier to the mobile communications device. In response to receiving a request to initiate a voice recognition session, the vehicle transmits the request and the vehicle identifier to the mobile communications device that causes activation of the speech recognition component. The mobile communications device retrieves the data lists via the identifier. In response to a voice command received by the speech recognition component, the speech recognition component interprets the voice command, determines an action by evaluating the voice command in view of the data lists, and transmits an instruction to the vehicle processor directing the vehicle to implement the action. |
| US08947217B2 |
Human machine interface for an automotive vehicle
A human machine interface (HMI) for an automotive vehicle comprises an instrument cluster and at least one head-up display for displaying information. The HMI includes at least one picture generation unit, each of which includes a laser for generating a modulated laser beam and a micro-electromechanical scanning minor arranged in the optical path of the laser beam for sweeping the laser beam over a diffuser in a two-dimensional Lissajous pattern. The HMI further comprises a central control unit that may be interfaced with a vehicle's on-board computer and/or another on-board device. A processor of the central control unit is configured to determine the pictures to be generated by the at least two picture generation units and to calculate, for each picture generation unit, the two-dimensional Lissajous pattern and the modulation of the at least one laser beam, the combination of which results in the respective picture to be displayed. |
| US08947214B2 |
Anti-identity theft and information security system
The anti-identity theft and information security system process includes storing secure information in association with an electronic device having a communication circuit for sending and receiving data. Biometric information is read with a scanner so that the identity of a user can be authenticating in connection with the supplied biometric information. Once approved, a data communication line is established with a remote device and access to the secure information is unlocked. Thereafter, the secure information may be transmitted between the electronic device and the remote device. |
| US08947212B2 |
Active electronic tag and signal modulation method thereof
An active electronic tag and a signal modulation method are provided herein. The active electronic tag includes an antenna, a first amplifier, an automatic gain control circuit, a phase synchronization locking circuit, a control unit, a tag unit and a second amplifier. The antenna receives a detecting signal transmitted from a reader, in which the detecting signal is carried on a first carrier. The phase synchronization locking circuit generates a second carrier. The control unit generates a response signal, in which the response signal is carried on the second carrier. By utilizing a phase difference of the first carrier and the second carrier, the response signal cancels the first carrier on the reader so as to transmit the information stored in the active electronic tag. |
| US08947211B2 |
Communication data protection method based on symmetric key encryption in RFID system, and apparatus for enabling the method
A communication data protection method based on symmetric key encryption, and an apparatus for enabling the method are provided. A communication data protection method using a Radio Frequency Identification (RFID) reader, the method including: receiving, from a tag, tag information including security parameter information and an encrypted Unique Item Identifier (UII); extracting the UII based on the security parameter information; transmitting, to the tag, a request message including a challenge value for replay prevention; and performing a tag authentication by receiving, from the tag, a response message including a handle and the challenge value. |
| US08947208B2 |
IC tag searching apparatus
An IC tag searching apparatus capable of changing the shape of its searching board in a simple manner in accordance with the situations of a location to be searched, said location includes wide to narrow areas and areas in the corners, at the time of searching the positions of wireless IC tags those which are embedded in a concrete construction and the like, efficiently detecting the positions of the embedded wireless IC tags and performing reading and writing of information from/to the wireless IC tags is provided.The IC tag searching apparatus 10 according to the present invention comprises a plurality of plate members 2, 3 each having an antenna built-in, said plate members may be joined with each other in a direction of those flat surfaces, respectively, a joining means provided to the plate members having an antenna built-in and information transmission/reception section 11 for performing data transmission/reception between the plate member having an antenna built-in and the R/W main body 9. |
| US08947203B2 |
Aftermarket sound activated wireless vehicle door unlocker
An aftermarket, sound activated, wireless, vehicle door unlocking device comprising a sound sensor, processor, memory, and an RF transmitter, transponder, or transceiver capable of generating an unlocking signal, and method of using the device. The device may be easily installed by unskilled users without modifying the vehicle wires or structure. The operator of the device will program the device with an unlocking sound sequence, and the RF unlocking codes needed to unlock the vehicle door. The device continually monitors the sensor for unlocking sounds, and delivers a door unlocking signal when this sound is detected. Various embodiments, including embedded RF key embodiments, solar powered embodiments, and alternative ways of programming the device are also discussed. |
| US08947199B2 |
Method and apparatus for enabling communication between a first device and at least one further device
A controller node for an entertainment control network, comprises controller logic arranged to be paired with at least one controlled device over a wireless interface. The controller logic is further arranged to provide pairing information for the at lease one controlled device with which it is paired to a further node within the entertainment control network. |
| US08947193B2 |
Resistance component and method for producing a resistance component
A resistance component includes a stack of ceramic layers and inner electrodes. Inner electrodes of a first type are electrically conductively connected to a first external contact and inner electrodes of a second type are electrically conductively connected to a second external contact. The inner electrodes of the first type are arranged such that there is no overlap with the inner electrodes of the second type. An inner electrode of a third type, which is electrically conductively connected neither to the first external contact nor to the second external contact, at least partially overlaps the inner electrodes of the first type and the inner electrodes of the second type. |
| US08947191B2 |
Reactor
A small reactor capable of appropriately measuring the temperature of a coil is provided. The reactor includes a coil 2 including a pair of coil elements 2a and 2b and a magnetic core including a pair of inner core portions 31 disposed in the respective coil elements 2a and 2b and outer core portions that connect the inner core portions 31 to form a closed magnetic circuit. Each of the coil elements 2a and 2b has an end face shape having a rounded corner portion 21, which is a corner portion of a rectangle that is rounded. A temperature sensor 7 is disposed in a trapezoidal space between the rounded corner portions 21 of the coil elements 2a and 2b that face each other. The temperature sensor 7 is pressed so as to contact the rounded corner portions 21 by the sensor holder portion 54 provided on an insulator, and is capable of appropriately measuring the temperature of the coil 2. When the temperature sensor 7 is disposed in a region in which the inner core portions 31 are not disposed in the respective coil elements 2a and 2b, the coil elements 2a and 2b can be positioned near each other and the size of the reactor can be reduced. |
| US08947190B2 |
Planar transformer
The present invention relates to a planar transformer, the transformer including a core provided to induce formation of a magnetic field, a bobbin coupled to a core, at least one primary winding interposed between the core and the bobbin to supply a power signal, a first insulation unit provided to the at least one primary winding to insulate the at least one primary winding, at least one secondary winding provided to the first insulation unit and insulated by the first insulation unit to transform the power signal, and a second insulation unit provided to the at least one secondary winding to insulate the at least one secondary winding. |
| US08947187B2 |
Inductor apparatus and method of manufacture thereof
The invention comprises an electrical apparatus and method of manufacture. The apparatus includes a substantially annular inductor comprising an inductor core composed of at least a distributed gap material. The distributed gap material includes particles of alternating layers of magnetic and non-magnetic materials separated by a gap material. The particles comprise an average layer thickness of less than about one hundred micrometers, where a majority of said layered particles comprise an average cross sectional size of less than about one millimeter. The inductor is cooled using at least one of: a thermally conductive potting material, a liquid coolant in direct contact with the inductor, a cooling line through the potting material or liquid coolant, and a chill coil in a container about the potting material and/or the liquid coolant. |
| US08947186B2 |
Wireless energy transfer resonator thermal management
Described herein are improved configurations for a wireless power transfer. Described are methods and designs to reduce and manage heating and heat dissipation in resonator structures. Configuration and orientation of magnetic material as well as heat sinking material with respect to the dipole moment of the resonator is used to reduce and control thermal properties of the resonator structure and reduce the effects of heating on the performance of wireless power transfer. |
| US08947184B2 |
Compact superconducting cyclotron
The present disclosure relates to a cyclotron. Embodiments of the present disclosure may include an upper and lower magnet pole, an upper and lower superconducting coil arranged around each of the magnetic poles, a ring-shaped magnetic return yoke, a beam chamber between the upper and lower magnetic poles having one or more electrodes configured to accelerate ions moving substantially in the median plane, and a cryostat. The ring-shaped magnetic return yoke and the coils may form a cold mass contained within the cryostat. Further, the cryostat may not contain the upper and lower poles. |
| US08947182B2 |
Release for an electrical switching arrangement
A selective release with a moving element is disclosed. The moving element is here mounted such that the moving element, in addition to the motion about its swivel axis, is guided in its motion by way of a brace. As a result of this, the moving element is mounted such that the trajectory of the blocking element essentially runs in a plane which extends transversely to the direction of flow of the flow channel. |
| US08947180B2 |
Signal transmission device, electronic device, and signal transmission method
A signal transmission device includes: a transmitting device that transmits a transmission subject signal through a first waveguide as a wireless signal; and a receiving device that receives the wireless signal of the transmission subject signal transmitted from the transmitting device through a second waveguide, wherein the wireless signal is transmitted between the transmitting device and the receiving device in a state where the first waveguide faces the second waveguide. |
| US08947178B1 |
Dielectric core tunable filters
A dielectric core tunable filter for microwave frequencies of 0.5-30 GHz. The filter includes a low loss machined dielectric having multiple channels a portion of which are terminated in micro-electromechanical variable capacitors to realize coupled resonators. The machined dielectric is metalized with a material, such as copper, silver, or gold, and then patterned to provide ring shaped recesses at the ends of preselected channels. |
| US08947176B2 |
Electromechanical resonator with resonant anchor
An electromechanical resonator produced on a substrate, and a method of producing thereof, including: a suspended structure produced at least partly from the substrate, configured to have a vibration imparted to it such that it resonates at least one natural resonance frequency of the suspended structure; an anchor structure to anchor the suspended structure, by at least one area of its periphery, to the remainder of the substrate, and dimensioned to resonate at the resonance frequency; a mechanism to excite the suspended structure, to cause it to vibrate at the resonance frequency; and a mechanism to detect the vibration frequency of the suspended structure. |
| US08947175B2 |
Low-pass filter
A low pass filter includes a laminate including a plurality of insulating layers stacked in a z-axis direction and a mounting surface on a negative side in the z-axis direction. An external electrode is disposed on a lower surface of the laminate and is grounded. The laminate houses a substantially spiral coil having a central axis extending in the z-axis direction. Via-hole conductors extend from the end on the positive side in the z-axis direction of the coil toward the negative side in the z-axis direction. The external electrode and the end on the positive side in the z-axis direction of the coil are electrically coupled to each other through the via-hole conductors. |
| US08947170B2 |
Spin-torque oscillator
According to one embodiment, a spin-torque oscillator includes a non-magnetic unit, one or more first magnetic unit, and a second magnetic unit. The non-magnetic unit is formed of a non-magnetic body. The one or more first magnetic unit is connected to the non-magnetic unit and generates a pure spin current indicating the flow of the electron spin that does not accompany an electric charge current. The second magnetic unit is connected to the non-magnetic unit in a manner such that a distance between the second magnetic unit and the first magnetic unit is shorter than a spin diffusion length indicating a distance that an electronic spin polarization is maintained in the non-magnetic unit. The second magnetic unit oscillates by the pure spin current. |
| US08947169B2 |
Oscillating device and electronic apparatus
An oscillating device includes an atomic oscillator, an oven controlled crystal oscillator, a correcting unit configured to correct an output signal of the oven controlled crystal oscillator on the basis of an output signal of the atomic oscillator, a housing configured to house the atomic oscillator and the oven controlled crystal oscillator, and a temperature adjusting unit configured to adjust the temperature in the housing to a predetermined temperature. |
| US08947159B2 |
Reference voltage generation circuit
Provided is a reference voltage generation circuit that has a flat temperature characteristic even when there are fluctuations in manufacturing step. After a semiconductor manufacturing process is finished, electrical characteristics of a semiconductor device are evaluated. Temperature characteristic of each reference voltage (VREF) of three unit reference voltage generation circuits (10) is evaluated. Then only a unit reference voltage generation circuit (10) having the most flat temperature characteristics is selected from among the three unit reference voltage generation circuits (10). Only fuses (13, 14) of the selected unit reference voltage generation circuit (10) are not cut, but other fuses (13, 14) are cut. Accordingly only the selected unit reference voltage generation circuit (10) operates, and the other unit reference voltage generation circuits (10) do not operate. |
| US08947158B2 |
Semiconductor device and electronic device
To reduce a variation in the electrical characteristics of a transistor. A potential generated by a voltage converter circuit is applied to a back gate of a transistor included in a voltage conversion block. Since the back gate of the transistor is not in a floating state, a current flowing through the back channel can be controlled so as to reduce a variation in the electrical characteristics of the transistor. Further, a transistor with low off-state current is used as the transistor included in the voltage conversion block, whereby storage of the output potential is controlled. |
| US08947157B2 |
Voltage multiplier charge pump buck
DC to DC converter circuitry includes a dual phase charge pump and at least one pair of multiplier phase circuits. The dual phase charge pump is coupled to each one of the at least one pair of multiplier circuits and adapted to receive a DC input voltage and only four control signals, and produce a stepped-up output voltage. Each one of the at least one pair of multiplier phase circuits are adapted to receive the stepped-up output voltage, a cross-coupled control signal from the other multiplier phase circuit in the pair of multiplier phase circuits, and a different one of the control signals and further multiply the stepped-up output voltage to produce a multiplied stepped-up output voltage with a magnitude that is approximately three times that of the DC input voltage or greater. |
| US08947156B2 |
High-voltage bulk driver using bypass circuit
This application discusses, among other things, apparatus and methods for driving the bulk of a high-voltage transistor using transistors having gates with low-voltage ratings. In an example, a bulk driver can include an output configured to couple to bulk of a high-voltage transistor, a pick circuit configured to couple the output to an input voltage at an input terminal of the high-voltage transistor or an output voltage at the output terminal of the high-voltage transistor when the high-voltage transistor is in a high impedance state, and a bypass circuit configured to couple the output of the bulk driver to the output voltage when the high-voltage transistor is in a low impedance state. |
| US08947153B2 |
Electronic circuit comprising thin-film transistors
An object is to provide a semiconductor device that can realize a function of a thyristor without complication of the process. A semiconductor device including a memory circuit that stores a predetermined potential by reset operation and initialization operation is provided with a circuit that rewrite data in the memory circuit in accordance with supply of a trigger signal. The semiconductor device has a structure in which a current flowing through the semiconductor device is supplied to a load by rewriting data in the memory circuit, and thus can function as a thyristor. |
| US08947152B2 |
Multi-chip package
A multi-chip package having a plurality of slice chips coupled through a through-via, at least one slice chip may include an input unit suitable for receiving a slice activation signal, and outputting the slice activation signal to the through-via in response to a slice identification corresponding to the slice chip, a first output unit suitable for outputting the activation signal transferred through the through-via to an internal circuit of the slice chip in response to the corresponding slice identification, and a second output unit suitable for selectively outputting the activation signal transferred through the through-via to the internal circuit of the slice chip in a predetermined activation mode for the multi-chip package. |
| US08947151B2 |
Frequency mixing circuit and method for suppressing local oscillation leakage in frequency mixing circuit
Embodiments of the present invention disclose a frequency mixing circuit and a method for suppressing local oscillation leakage in the frequency mixing circuit, where a mixed input signal and a local oscillation signal are involved, and local oscillation leakage can be effectively reduced by using a frequency mixing circuit whose structure is simpler and is easier to be implemented. The frequency mixing circuit includes a direct current bias circuit, where the direct current bias circuit includes a direct current bias voltage source used for reducing a local oscillation current. The frequency mixing circuit is mainly applied to frequency mixing, and especially to a case where an intermediate frequency signal is mixed with a local oscillation signal to output a radio frequency signal. |
| US08947149B1 |
Stacked clock distribution for low power devices
Embodiments of a clock distribution device and a method of clock distribution are described. In one embodiment, a clock distribution device includes a stacked clock driver circuit configured to perform clock signal charge recycling on input clock signals that swing between different voltage ranges and a load circuit. The stacked clock driver circuit includes stacked driver circuits configured to generate output clock signals that swing between the different voltage ranges. The load circuit includes load networks of different semiconductor types. Each of the load networks are configured to be driven by one of the output clock signals. Other embodiments are also described. |
| US08947147B1 |
Apparatus for high rotation rate low I/O count phase interpolator
Methods and apparatuses for high rotation rate low I/O count phase interpolation are disclosed, including techniques to reduce redundant phase interpolation coding and method steps by modifying phase mapping and generation with pluralities of amplifiers. I/O reduction count is achieved while maintaining resolution and allowing scalability in phase interpolation. Control circuits include techniques to interpolate phases at a high rotation rate while reducing discontinuities and risk for logic hazards. |
| US08947146B2 |
Pulse-based flip flop
A pulse-based flip-flop that latches a data input signal to convert the data input signal into a data output signal in response to a first clock signal and the second clock signal. The pulse-based flip-flop includes a pulse generator and a data latch. The pulse generator includes a first inverter and a signal delay circuit to receive the first clock signal and generate the second clock signal; the data latch includes a delivery circuit, a latch circuit and a control circuit. The data latch is used to latch the data input signal and output the data output signal in response to the first and the second clock signals. |
| US08947145B2 |
PWM signal generation circuit and processor system
A PWM signal generation circuit according to the present invention includes a duty setting unit (10) configured to generate a duty control signal designating a duty ratio corresponding to each period of a PWM signal on the basis of an initial duty setting signal, a target duty setting signal, a slope setting signal, and a clock signal, a period setting unit (20) configured to output a period setting value, and an output control unit (30) configured to generate the PWM signal having a period corresponding to the period setting value and having a duty ratio corresponding to a value of the duty control signal. The duty setting unit (10) increases the value of the initial duty ratio to the value of the target duty ratio each time the number of a clock pulse of the clock signal reaches the period setting value reaches the slope setting value. |
| US08947144B2 |
Apparatuses and methods for duty cycle adjustment
Apparatuses and methods for duty cycle adjustment are disclosed herein. An example apparatus may include a node, a phase mixer, and a duty cycle adjuster circuit. The phase mixer may have a first step duty cycle response and may be configured to provide a first output signal to the node in accordance with the first step duty cycle response. The duty cycle adjuster circuit may have a second step duty cycle response complementary to the first step duty cycle response and may be configured to provide a second signal to the node in accordance with the second step duty cycle response. |
| US08947143B2 |
Duty cycle corrector
The duty cycle corrector for correcting a system clock signal comprises a duty cycle detector and a duty cycle adjuster. The duty cycle detector is configured for detecting a system duty cycle of the system clock signal and generating the first control signal and the second control signal, wherein the first control signal and the second control signal are complementary to each other. The duty cycle adjuster comprises an inverter and the duty cycle adjuster is configured for delaying a change in an input status of the inverter and adjusting of the inverter in accordance with the first control signal and the second control signal. |
| US08947140B2 |
Continuous adaptive training for data interface timing calibration
Circuits and methods for implementing a continuously adaptive timing calibration training function in an integrated circuit interface are disclosed. A mission data path is established where a data bit is sampled by a strobe. A similar reference data path is established for calibration purposes only. At an initialization time both paths are calibrated and a delta value between them is established. During operation of the mission path, the calibration path continuously performs calibration operations to determine if its optimal delay has changed by more than a threshold value. If so, the new delay setting for the reference path is used to change the delay setting for the mission path after adjustment by the delta value. Circuits and methods are also disclosed for performing multiple parallel calibrations for the reference path to speed up the training process. |
| US08947138B2 |
Phase adjustment circuit and interface circuit
In a phase adjustment circuit, a first phase adjuster has a plurality of parallel-connected first inverters that receives an input signal to be phase-adjusted, wherein a first inverter to be activated is selected by a first control signal. A second phase adjuster has a plurality of parallel-connected second inverters that receives the input signal with a predetermined delay time, wherein a second inverter to be activated is selected by a second control signal. An output circuit receives output signals of the first and second phase adjusters and outputs a signal whose phase is adjusted within a range of the delay time. The second phase adjuster further includes transistors connected to the second inverters. During the delay time, these transistors block a current path between the first and second phase adjusters, under the control of the input signal. |
| US08947137B2 |
Core voltage reset systems and methods with wide noise margin
Presented systems and methods facilitate efficient reset operation. In one embodiment, a system comprises a core domain portion an I/O domain portion and a core reset I/O by-pass component. The core domain portion is configured to operate at a nominal core domain voltage level. The I/O domain portion configured to operate at a nominal I/O domain voltage level. The core reset I/O by-pass component configured to forward a reset indication to the core domain independent of the I/O domain. In one exemplary implementation the core reset I/O by-pass component is operable to receive an input reset indication at a high domain voltage level and to convert the input reset indication to a core reset signal that is less than or substantially equal to the nominal core domain voltage, wherein the high domain is voltage higher than the core domain voltage level. |
| US08947136B2 |
Systems and methods of signal synchronization for driving light emitting diodes
System and method for signal synchronization. The system includes a first selection component, a first signal generator, a second signal generator and a first gate drive component. The first selection component is configured to receive a first mode signal and generate a first selection signal based on at least information associated with the first mode signal. The first signal generator is configured to, if the first selection signal satisfies one or more first conditions, receive a first input signal and generate at least a first clock signal based on at least information associated with the first input signal. Furthermore, the first gate drive component is configured to, if the first selection signal satisfies the one or more first conditions, receive at least the first clock signal and output a first drive signal to a first switch. |
| US08947134B2 |
Decoupling circuit and semiconductor integrated circuit
A decoupling circuit includes an inverter. The inverter includes i (i is an integer of 1 or more) PMOS transistors each having a first gate electrode, and j (j is an integer of 0 or more) PMOS transistors each having a second gate electrode. The inverter includes m (m is an integer of 1 or more) NMOS transistors each having a third gate electrode, and n (n is an integer of 0 or more) NMOS transistors each having a fourth gate electrode. The first to fourth gate electrodes are coupled to an input end of the inverter. A total area of the first and second gate electrodes is different from a total area of the third and fourth gate electrodes. |
| US08947133B2 |
Systems and methods for multi-level termination calibration for voltage mode drivers
A voltage mode driver system includes a plurality of VMD cells, a plurality of auxiliary cells, a control logic and an output node. The plurality of VMD cells are configured to generate a first output. The plurality of VMD cells are configured to generate a calibrated effective resistance at different signal levels according to a calibration signal. The plurality of auxiliary cells are configured to generate a second output. The output node combines the first output and the second output into a driver output. The control logic is configured to control the plurality of auxiliary cells and the second output according to a selected level. The plurality of VMD cells may be configured to generate a calibrated effective resistance at different signal levels according to a calibration signal. A calibration component is configured to determine a voltage dependence effect and to generate a calibration signal according to the determined voltage dependence effect. |
| US08947132B2 |
Semiconductor device and semiconductor system including the same
A semiconductor device includes a normal code generation unit capable of generating a normal code, a test code output unit capable of storing a plurality of preliminary test codes to output a test code in response to a test control signal, and a reference voltage generation unit capable of generating a normal reference voltage in a normal operation mode and generating a test reference voltage in a test operation mode in response to the normal code and the test code. |
| US08947128B2 |
Semiconductor device having input receiver circuit that operates in response to strobe signal
Disclosed herein is a device that includes an input receiver circuit activated by a strobe signal to generate an output signal by comparing a potential of an input signal with a reference potential, and a noise canceller cancelling noise superimposed on the reference potential due to a change in the strobe signal. |
| US08947127B2 |
Discharge path circuit of an input terminal for driver IC
Disclosed is a discharge path circuit of input terminal for a driver IC (Integrated Chip), the circuit providing a discharge path to the input terminal of the driver IC including a power input port connected to a first input and an operation mode selection port connected to a second input, the discharge path circuit including an LC (Inductance Capacitance) filter interconnected between the first input and the power input port to filter noise on a power source, and a resistance element interconnected between the first input and a ground terminal, wherein the resistance element provides a discharge path for discharging power charged by the input terminal of the driver IC. |
| US08947126B2 |
System, drivers for switches and methods for synchronizing measurements of analog-to-digital converters
A driver for a switch includes a primary side having a trigger input and a secondary side comprising an analog-to-digital converter (ADC). The primary side and the secondary side are separated by a galvanic isolation barrier and communicate via a communication circuit. The primary side is configured to receive a trigger signal at the trigger input and forward the trigger signal to the ADC of the secondary side of the driver via the communication circuit. The ADC is configured to start a measurement upon receiving the trigger signal. |
| US08947122B2 |
Non-volatile latch structures with small area for FPGA
A latch circuit and method includes providing a first tri-gate non-volatile device, providing a second tri-gate non-volatile device, coupling the first tri-gate non-volatile device to the second tri-gate non-volatile device, erasing the first tri-gate non-volatile device, programming the second tri-gate non-volatile device, and latching an output node of the latch device to a logic state determined by respective thresholds of the first and second tri-gate non-volatile devices. Coupling the first tri-gate non-volatile device to the second tri-gate non-volatile device can include direct coupling, or indirect coupling through a cross-coupled circuit. |
| US08947121B2 |
Programmable logic device
A programmable logic device that verifies whether configuration data is stored correctly is provided. The programmable logic device includes a configuration memory storing configuration data input to a first wiring and a switch controlling conduction or non-conduction between a second wiring and a third wiring in accordance with the configuration data stored in the configuration memory. Further, whether the configuration data input to the first wiring agrees with configuration data actually stored in the configuration memory is verified by comparing the potential of the second wiring with the configuration data input to the first wiring. |
| US08947120B2 |
Latch array utilizing through device connectivity
A circuit for implementing latch array functions on an integrated circuit. Portions of the logic devices included in the implementation of the latch array functions that are controlled by a common signal, may be arranged in a particular alignment. A single layer uni-directionally conductive material may connect the common signal to the logic devices. |
| US08947108B2 |
Precision target methods and apparatus
A method for determining and retrieving positional information includes forming a grid by locating a plurality of first conductive elements on a surface and a plurality of second conductive elements on the surface. A second grid is coupled to the surface and electrically isolated from the grid. The surface is penetrated with a projectile and a first location of a first penetration of the surface is electronically determined based on a first change in a first electrical measurement. A plurality of third and fourth electrical measurements are performed in a second plurality of locations of the second grid and the location impact is electronically determined. |
| US08947101B2 |
Method and system for measuring the resistance of a resistive structure
Method and system for measuring the resistance of a resistive structure having at least three nodes. A first calibration signal is determined by measuring a voltage at an output of the resistance structure when no calibration current is injected into a third node between the first and second nodes of the structure. A calibration current is then injected into the third node and a second calibration signal is determined. The absolute value of the difference between the first calibration signal and the second calibration signal is determined, the absolute value being proportional to a product of the resistance of the resistive structure and the calibration current. |
| US08947100B2 |
Electronic device, and open circuit detecting system, detecting method thereof
An open circuit detecting system configured to connect to an object circuit for getting an electrical signal through a virtual ground induced by characteristic impedance of a parasitic capacitor and determining whether the object circuit is open according to the electrical signal. |
| US08947099B2 |
Equivalent power method of reducing the affects of voltage variation during active material actuation
An equivalent power method for reducing the effects of voltage variation during at least one active material actuation event, includes determining an applied real output based on the ideal voltage of a voltage source, the corresponding ideal output of a controller, and a measured real voltage, and for providing voltage out of bounds compensation, by further determining a difference based on the maximum available power output of the controller during said at least one event, and applying the difference to determine the applied real output during subsequent event(s). |
| US08947096B1 |
Trailer light tester
A new portable, self-contained device for testing the full cycle of trailer light modes without additional manual actuation by the user and for identifying where and what type of specific error occurred, if any are detected. The inventive device generally comprises a compact portable housing with a fixedly attached handle and a removable housing top. Within the compact portable housing is a self-contained, rechargeable 12 volt power source to power all functionality over a sustained period of time. Also within the compact portable housing is a light mode control means that allows the device to cycle through multiple light modes for testing, and an error detection analysis means that indicates where and what type of fault is detected. The outside surface of the compact portable housing contains an on/off switch means, a light mode selector switch to select from individual light modes or a cycle mode that rotates through all light modes at a predetermined interval, and fault detection indicators to indicate when, where, and what type of fault has been detected. Attached to a side of the housing is a connection port for connecting the device to a trailer light wiring harness. |
| US08947093B2 |
Electromagnetic survey using naturally occurring electromagnetic fields as a source
Methods and related systems are described for measuring naturally occurring electromagnetic fields both at the earth's surface as well as downhole. These fields originate from currents in the ionosphere above the earth, and are the same fields as employed by known magnetotelluric geophysical methods based on surface measurements. Some embodiments are especially useful in horizontal wells that are uncased at depth, although some embodiments are also useful in normal vertical wells that are both uncased or cased with a conductive liner. The method includes receiving downhole electromagnetic survey data of the naturally occurring electromagnetic fields obtained using a downhole receiver deployed at a first location in a borehole. A second set of electromagnetic survey data of the naturally occurring electromagnetic fields is also received that has been obtained using a receiver deployed at a second location. A transfer function is estimated between the first and second locations for portions of the electromagnetic fields based on the two sets of electromagnetic survey data. |
| US08947089B2 |
Magnetic field shimming adjustment: reducing magnetic distribution errors by obtaining current potential distributions of MRI apparatus
A measured error magnetic field distribution is divided into eigen-mode components obtained by a singular decomposition and iron piece arrangements corresponding to respective modes are combined and arranged on a shim-tray. An eigen-mode to be corrected is selected in accordance with an attainable magnetic field accuracy (homogeneity) and appropriateness of arranged volume of the iron pieces. Because the adjustment can be made with the attainable magnetic field accuracy (homogeneity) being known, an erroneous adjustment can also be known, and the adjustment is automatically done during repeated adjustments. As a result, an apparatus with a high accuracy can be provided. In addition, there is an advantageous effect of being able to detect a poor magnet earlier by checking the attainable homogeneity. |
| US08947088B2 |
MR slide coil
The present embodiments relate to a method and a local coil for a magnetic resonance tomography system. The local coil has an upper part and a lower part. The upper part and the lower part each have an inclined guide. When the upper part is positioned on the lower part, the upper part and the lower part may be displaced relative to each other along the inclined guides using an adjustment of a distance of the upper part from the lower part. |
| US08947084B2 |
Antenna device and magnetic resonance imaging device
Manufacture cost and maintenance cost of RF coils of MRI devices are reduced without any limitation concerning size of the coils. By constituting an antenna device for magnetic resonance imaging devices with a cylindrical outer conductor, a looped ribbon-shaped conductor disposed inside the cylindrical outer conductor along the cylindrical surface, and a feed point for transmission and/or reception between the cylindrical conductor and the ribbon-shaped conductor, and disposing the ribbon-shaped conductor so that length thereof can be readily adjusted, there is provided an antenna device for magnetic resonance imaging devices that generates a magnetic field component perpendicular to the central axis of the cylinder at a desired resonance frequency and shows sensitivity without using capacitors and without being imposed any limitation concerning size in the diametral direction of the cylinder. |
| US08947077B2 |
Rotary position sensor
A rotary position sensor having a transmitter coil excited by a high frequency signal source. A first and second receiver coil, each having at least two oppositely wound loops, are rotatably positioned electrically 90 degrees relative to each other. The receiver coils are positioned so as to be inductively coupled with the transmitter coil while a coupler constructed of an electrically conductive material is rotatably positioned over and inductively coupled with the first and second receiver coils. The outputs from the first and second receiver coils are coupled through a high pass filter and a low pass filter, respectively, thus creating a 90° phase shift in the resultant signals. These signals are summed together and coupled as an input signal to a PWM circuit together with a signal from the transmitter coil. |
| US08947071B2 |
Noise reduction system and method
A system and method for measuring frequency which reduces the impact of noise. The system and method includes the steps of sampling a signal train over a first signal portion of the signal train, determining a first average period for the first signal portion (t1) of the signal train, sampling the signal train over a second signal portion (t2) of the signal train, wherein, the second portion of the signal train overlaps with the first signal portion, determining a second average period for the second signal portion (t2) of the output signal train, and then determining the average of the determined average periods. |
| US08947067B1 |
Automatic bandgap voltage calibration
Disclosed is bandgap voltage reference generator having a programmable resistor. The programmable resistor can be programmed to provide a proper ratio between the PTAT current and the CTAT current to reduce the effect of process variations on the bandgap voltage. The bandgap voltage reference generator includes a calibration circuit that programs the programmable resistor. |
| US08947063B2 |
Power converter with the function of digital error correction
An output voltage regulator of step-down switching power converters is described, with the regulator provided with digitally adjusted output voltage. It solves the problem of low regulation due to low error amplifier (EA) gain. This invention includes a power converter with the function of Digitally Error Correction, having Logic Control, EA, PWM comparator, Driver, power devices and passive components. A Digital Calibration Circuit whose input terminal is connected to the output voltage and output terminal is connected to the error signal. When the output voltage exceeds the tolerance range, this Digital Calibration Circuit will increase or decrease the error signal step by step, keeping the output voltage in the tolerance range. The Digital Calibration Circuit can be applied not only in nanometer scale process, but also in traditional process. For those power converters in traditional process, it is also quite promising in applications. |
| US08947060B2 |
Regulator over-voltage protection circuit with reduced standby current
An embodiment of the invention relates to a power converter formed with an error amplifier and a related method. In an embodiment, a first switch is coupled in series with an error amplifier compensation capacitor. Upon detection of a current level greater than a threshold level, the compensation capacitor is decoupled from the error amplifier by opening the first switch. In an embodiment, a second switch is coupled in parallel with the compensation capacitor, and the current-sensing circuit enables conductivity of the second switch to discharge the compensation capacitor upon detection of the current level greater than the threshold level. The second switch is opened upon detection of the current level less than the threshold level. In an embodiment, the current-sensing circuit controls an output current of the power converter at a current-limit level upon detection of the internal current level greater than the threshold level. |
| US08947059B2 |
Symmetrical output switch-mode power supply
The invention relates to a switched-mode power supply delivering a first (VPOS) and a second (VNEG) voltage which are symmetrical. It comprises a power stage (30) comprising an inductor (L), and switches (A, B, C, D, E) controlled by control signals. It also comprises a control circuit (34), coupled to the power stage (30), that is able to produce error signals (Verr1, Verr2) as a function of the difference between a reference voltage (Vref) and the first (VPOS) and second (VNEG) voltages. The power supply comprises a synchronization circuit (38), coupled to the power stage (30) and to the control circuit (34), for generating the control signals in a manner that applies a control strategy adapted to minimize error signals, maintain a non-zero amount of energy in the inductor (L), and maintain the absolute value of the first (VPOS) and second (VNEG) voltages at substantially equal values. |
| US08947057B2 |
Inverting buck-boost using single-inductor boost and charge pump with a grounded switch
The disclosed methodology for buck-boost inverted voltage conversion uses a boost stage coupled to a charge pump stage at a switch node controlled by a transistor switch coupled between the switch node and ground. The boost stage includes a boost inductor coupled between an input supply voltage and the switch node, and the charge pump stage includes a charge pump capacitor coupled between the switch node and a pump node which is coupled to the load and an output capacitor in parallel with the load. The regulated inverted output voltage is supplied to the output capacitor and the load by: (a) in a first phase, switching the transistor switch to conducting to couple the switch node to ground, and thereby (i) transferring energy from a source of input voltage source to the boost inductor, and (ii) transferring energy from a charge pump capacitor to the output node, and (b) in the second phase, switching the transistor switch to non-conducting and clamping the charge pump capacitor at a positive reference voltage, and thereby transferring energy from the boost inductor to the charge pump capacitor. In one embodiment, the positive reference voltage is the input voltage (i.e., during the second phase, the charge pump capacitor is clamped to the input voltage). |
| US08947056B2 |
Control circuit for step-up switching regulator
A switching transistor is arranged between a switching (SW) terminal and the ground terminal. An error amplifier amplifies the difference between the feedback voltage VFB that corresponds to the output voltage VOUT with a predetermined reference voltage VREF so as to generate an error voltage VERR. A pulse modulator generates a pulse signal SP having a duty ratio that is adjusted according to the error voltage VERR. A driver drives a switching transistor according to the pulse signal SP. An overvoltage detection circuit generates an overvoltage protection (OVP) signal which is asserted when the voltage at the switching (SW) terminal becomes higher than a predetermined threshold voltage. When the OVP signal is asserted, a control circuit performs a predetermined protection operation. |
| US08947050B2 |
Charging of vehicle battery based on indicators of impedance and health
A method for charging a battery may include determining a degradation condition of the battery based on impedance parameters of the battery, altering a default charge profile for the battery based on the degradation condition, and charging the battery with the altered charge profile. |
| US08947048B2 |
Power supply system with charge balancing
A power supply system includes a first charge storage. A series circuit with a plurality of n charge storage modules is connected between load terminals. A second charge storage includes load terminals. A charge transfer arrangement includes at least one charge transfer unit coupled between one of the charge storage modules and the load terminals of the second charge storage. The charge transfer arrangement is configured to transfer upon request electrical charge from the one charge storage module to the second charge storage. |
| US08947044B2 |
Wireless charging system and related method for transmitting data
The invention discloses a wireless charging system for transmitting data. The wireless charging system includes a charging device for wirelessly transmitting a source signal and adjusting a current corresponding to the source signal according to a transmitted datum, and a receiving device which includes a first coil for receiving the source signal according to the electromagnetic effect and generating a corresponding AC current signal, and an output module for obtaining the transmitted datum according to the AC current signal. |
| US08947043B2 |
Light with integrated inductive charger base station
A light comprises a lamp and an integrated inductive charger for coupling to a device having an inductive charger receiver connected thereto. The inductive charger receiver receives an electrical charge to charge a battery in the device. The lamp of the light provides illumination. The integrated inductive charger and the lamp are both electrically connected to a power supply. The integrated inductive charger can charge the battery in the device when the lamp is turned off. The lamp can be turned on without the integrated inductive charger providing an electrical charge. Alternatively, the integrated inductive charger can charge the battery in the device while the lamp is also turned on. |
| US08947040B2 |
Universal Charger
A universal charger includes a portable charger housing, an universal charging arrangement, and an energy input device. The universal charging arrangement includes a charging circuitry for managing electricity charging of the rechargeable battery, and a plurality of charging terminals movably provided in the battery compartment of the portable charging housing, wherein the charging terminals are adapted to move in the battery compartment to accurately and adjustably align with the battery terminals of the rechargeable battery. The energy input device is electrically connected with the charging circuitry, which is capable of charging a wide variety of electronic devices by acquiring power through a convention USB port. |
| US08947037B2 |
Method for estimating a torque of a three-phase drive motor for a vehicle
A method for estimating a torque of a three-phase motor for a vehicle includes measuring a respective current strength in at least two of three phase lines, wherein the three-phase motor is supplied with power by a converter, and wherein the three phase lines lead from the converter to the three-phase motor of the vehicle, measuring a respective voltage at each of the three phase lines, determining a rotating field frequency as a function of the measured current strengths or the measured voltages; and determining an estimated value for the torque as a function of the measured current strengths, the measured voltages and the determined rotating field frequency. |
| US08947032B2 |
System and method for estimating the position of a wound rotor synchronous machine
A system for estimating a rotor position may include a synchronous machine, including at least one stator winding pair configured to create a magnetic field when an input voltage is applied and a rotor having a field winding and configured to rotate within the magnetic field created by the at least one stator winding pair. The system may include a phase detector configured to determine a phase difference between the input voltage and a field voltage induced in the field winding of the rotor. The system may also include a processor configured to receive a signal from the phase detector indicative of the phase difference between the input voltage and the field voltage, and to estimate the rotor position based on the phase difference. |
| US08947024B2 |
Battery operated electric motor in a work apparatus
An electric motor includes an arrangement of windings provided for driving the rotor, with the windings being connected to an energy source to develop torque which drives the rotor. The electric circuits of corresponding ones of the windings each have a potential point, the voltage (UL, UG) of which is supplied to an evaluation unit via an adaptation device. The adaptation device can be operated in two switchable adaptation stages and is connected to a drive circuit that operates in dependence upon the rotational position of the rotor. The drive circuit switches the adaptation device into the first stage having a high sensitivity or into the second stage having a low sensitivity in dependence upon the rotational position of the rotor of the motor, such that the number of required analog inputs at a microprocessor in the evaluation unit can be kept low. |
| US08947021B2 |
Accelerator and cyclotron
An accelerator includes an inflector through which a beam entering from an ion source passes and which introduces the beam to an acceleration orbit. The inflector includes a beam convergence unit that converges the beam passing through the inflector. A cyclotron, which accelerates a beam in a convoluted acceleration orbit, includes magnetic poles, D-electrodes, and an inflector. The magnetic poles generate a magnetic field in a direction perpendicular to the acceleration orbit. The D-electrodes generate a potential difference, which accelerates the beam, in the acceleration orbit. A beam, which enters in an incident direction perpendicular to the acceleration orbit, passes through the inflector, and the inflector bends the beam so as to introduce the beam to the acceleration orbit. The inflector includes a beam convergence unit that converges the beam passing through the inflector. |
| US08947020B1 |
End of life control for parallel lamp ballast
A light fixture includes a ballast and a plurality of lamps connected to the ballast in parallel. The ballast provides an output signal to the plurality of lamps as a function of a 1st steady state condition. When the ballast senses an end-of-life condition for a lamp of the plurality of lamps, the ballast increases the frequency of the output signal provided to the plurality of lamps until the lamp ceases to conduct current. When the lamp ceases to conduct current, the ballast decreases the frequency of the output signal to a frequency determined as a function of a 2nd steady state condition different from the 1st steady state condition. A total current of the 2nd steady state condition is proportional to a total current of the 1st steady state condition as a function of the number of lamps exhibiting an end-of-life condition. |
| US08947016B2 |
Transformer-isolated LED lighting circuit with secondary-side dimming control
A transformer isolated LED lighting circuit supplies current from a secondary-side storage capacitor to one or more LED strings in conformity with one or more dimming values. The dimming values are communicated through the transformer by patterns or codes provided in pulses of a power converter circuit that charges the storage capacitor from the primary side of the transformer, or alternatively by a special modulated signal provided in addition to the switching pulses. |
| US08947014B2 |
LED switch circuitry for varying input voltage source
An LED array switching apparatus, comprises: a plurality of LED arrays arranged in a serial path; a voltage supply coupled to the plurality of LED arrays; a plurality of current sources selectively coupled to the LED arrays, each of the current sources being switchable between a current regulating state and an open state; and a controller that outputs at least one control signal. The controller, the at least one switch and current sources cooperate together such that: when the voltage of the voltage source is below the at least one reference voltage, and/or when a predetermined level of current passes through the one or more current sources, at least one switch is closed and one or more associated current sources are controlled so as to break the serial path into one or more parallel paths each including less than all of the LED arrays. |
| US08947013B2 |
LED-based lamp with user-selectable color temperature
A lamp including a first set of light emitting diodes configured to generate first light, a second set of light emitting diodes configured to generate second light, and a third set of light emitting diodes configured to generate third light. The first light, the second light, and the third light combine to produce white light. A first switch is located at a base portion of the lamp. The state of the first switch corresponds to a color temperature of the white light. A color temperature adjustment module is configured to vary outputs of the first, second, and third sets of light emitting diodes in accordance with the color temperature of the white light selected by a user using the first switch. |
| US08947012B2 |
Systems and methods for current matching of LED strings
Systems and methods are provided for regulating a string current flowing through a string of one or more light emitting diodes. A system controller includes a first controller terminal, a second controller terminal and a third controller terminal. The first controller terminal is coupled to a base terminal of a bipolar junction transistor, the bipolar junction transistor further including an emitter terminal and a collector terminal, the collector terminal being connected to the string of one or more light emitting diodes. The second controller terminal is coupled to the emitter terminal of the bipolar junction transistor and to a first resistor terminal of a resistor associated with a resistance. The third controller terminal is coupled to a second resistor terminal of the resistor. In addition, the system controller is configured to receive a reference voltage, receive an emitter voltage, and output a base current. |
| US08947011B2 |
Circuit for retro-lighting a display
There is described a circuit for retro-lighting a display, comprising a group of white light-emitting diodes connected in series between a first node and a second node and a circuit for driving said group of series-coupled light-emitting diodes comprising: a power supply providing a positive voltage supplied to the first node; and a charge pump converter providing a negative voltage obtained from the positive voltage, said negative voltage being supplied to the second node. |
| US08947009B2 |
Electronic ballast circuit for lamps
An electronic ballast circuit includes a power factor correction circuit, a control and amplifier circuit, a ballast controller circuit and a ballast driver circuit. The ballast driver circuit includes a resonant circuit that connects to a lamp and a strike voltage limiter circuit that regulates the behavior of the resonant circuit. An overcurrent sensor circuit may be included to indirectly the control the ballast controller circuit via the control and amplifier circuit. The strike voltage limiter circuit uses varistors to change the resonant frequency of the resonant circuit to limit the voltage to the lamp. |
| US08947008B2 |
Driver circuit and related error detection circuit and method
A low output voltage driver circuit for a light-emitting device is provided according to exemplary embodiments of the present invention. Also, an offset voltage cancellation and/or level shifter is incorporated into the driver circuit to increase the accuracy of the driving current. In addition, an error detection circuit and method are employed in order to adaptively detect the minimum output voltage of the inventive driver circuit. |
| US08947004B2 |
Electronic device
An electronic device is provided. The electronic device includes a plurality of load units, a plurality of serial-parallel switch units and a control module. The control module switches the serial-parallel switch units to a first state or a second state according to a level variation of an input voltage. Connection relations of the load units are correspondingly changed according to the level variation of the input voltage. In this way, the electronic device can be driven by an alternating-current voltage. |
| US08947002B2 |
LED bulb with color-shift dimming
A light-emitting diode (LED) bulb comprises a base and a shell connected to the base. A first set of LEDs is disposed within the shell and is configured to emit light at a first color corresponding to a first black-body color temperature. A second set of LEDs is also disposed within the shell and is configured to emit light at a second color corresponding to a second black-body color temperature that is different from the first black-body color temperature. A control circuit is configured to provide a transitional-power state to the first and second sets of LEDs to transition between an initial-power state and a reduced-power state by producing a shifting color output that corresponds to a predetermined light-output curve. |
| US08946999B2 |
Light emitting device
A light emitting device including a light emitting diode having a semiconductor body that generates electromagnetic radiation; a converter element downstream of the first light emitting diode which converts at least part of the electromagnetic radiation into first color light; a second light emitting diode having a semiconductor body that generates light of the first color; a radiation exit area from which the first color light emerges; and a drive circuit operating the second light emitting diode, wherein the converter element contains at least one luminescence conversion material that emits the first color light, as the operating duration of the first light emitting diode increases, intensity of the first color light emitted by the converter element decreases, the drive circuit controls the second light emitting diode dependent on at least one of measurement values: intensity of the first color light emitted by the converter element, temperature of the converter element, operating duration of the first light emitting diode, and color locus of the light emerging from the radiation exit area. |
| US08946996B2 |
Light and light sensor
An LED-based light tube for use in a conventional fluorescent fixture includes a housing including a light transmitting portion, at least one electrical connector attached to the housing and configured for engagement with the conventional fluorescent fixture, at least one LED arranged to produce light in a direction toward the light transmitting portion, a sensor operable to detect a brightness level and output a signal corresponding to the detected brightness level, and a controller in electrical communication with the at least one electrical connector, operable to: compare the signal to a predetermined value corresponding to a desired brightness level and control an amount of power provided to the at least one LED in response to the signal to adjust the light produced by the at least one LED to achieve the desired brightness level. |
| US08946990B1 |
Vehicle headlight detection system
A vehicle headlight detection system includes a vehicle sensor, a light sensor, and a controller. The vehicle sensor is configured to detect a remote vehicle approaching the vehicle sensor. The light sensor is configured to detect a light output of the remote vehicle. The controller is programmed to determine, based on the light output detected by the light sensor, whether the light output of the remote vehicle meets a predetermined minimum condition when the vehicle sensor detects the remote vehicle, and programmed to communicate with an indicator to notify a driver of the remote vehicle when the light output of the remote vehicle does not meet the predetermined minimum condition. |
| US08946988B2 |
Display device and method for manufacturing the same
It is an object of the present invention to provide a display device preventing the external invasion of water and/or oxygen and preventing the deterioration of a luminous element due to these invading substances and to provide a production method including simple production steps for producing the display device. The invention provides a display device having a sealing material on the rim of an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Further, the invention provides a display device having a barrier body on an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Furthermore, the application of droplet discharge technique in production steps for producing the display device can eliminate a photolithography step such as exposing and developing. Thus, a method of producing a display device having an improved yield is provided. |
| US08946986B2 |
Organic lighting device and lighting equipment
An organic luminous means and an illumination device comprising such a luminous means are specified. An optical display apparatus, emergency lighting, motor vehicle interior lighting, an item of furniture, a construction material, a glazing and a display comprising such a luminous means and, respectively, comprising an illumination device having such a luminous means are furthermore specified. |
| US08946985B2 |
Flexible touch screen panel and flexible display device with the same
A flexible touch screen panel includes a substrate having flexibility, sensing electrodes on at least one surface of the substrate, and implemented using an opaque conductive metal, and a polarizing plate on the substrate having the sensing electrodes formed thereon. The sensing electrodes may be implemented in a mesh shape having a plurality of openings. |
| US08946984B2 |
Electroluminescent device
Disclosed are electroluminescent devices that comprise organic layers that contain dibenzofuran compounds. The compounds are suitable components of, for example, blue-emitting, durable, organo-electroluminescent layers. The electroluminescent devices may be employed for full color display panels in, for example, mobile phones, televisions and personal computer screens. |
| US08946982B2 |
Coated phosphor particles with refractive index adaption
The invention relates to coated phosphor particles comprising luminescent particles and at least one, preferably substantially transparent, metal, transition-metal or semimetal oxide coating, and to a process for the production thereof. |
| US08946980B2 |
Method for assembling a socket for a discharge lamp and discharge lamp
A method for fitting a base for a discharge lamp is provided. The method may include providing a discharge lamp with an end region, on which an option is provided for making contact with an electrode located in the interior of the discharge vessel; applying material to the end region; positioning a base sleeve onto the end region with the material; and positioning a clamping ring onto the base sleeve; wherein the clamping ring is of the kind that has at least one bead. |
| US08946978B2 |
Lighting device with omnidirectional light distribution
A lighting device (2) comprises a light source (210) having a main forward emission direction (20), and an envelope (220) in which the light source (210) is arranged. The envelope (220) comprises an upper portion (225) having scattering properties and being arranged to reflect a part of the light from the light source (210) laterally and backwardly relative to the main forward emission direction (20) and transmit a part of the light from the light source (210). The light intensity distribution of the lighting device (2) is more uniform, as backward and lateral light intensity is increased while the light in the main forward emission direction (20) is still admitted. |
| US08946977B2 |
Spark plug having fusion zone
A spark plug includes a center electrode, a ground electrode, and a tip joined to the center electrode and forming a spark discharge gap with the ground electrode. The tip is joined to the center electrode via a fusion zone, which has an exposed surface exposed to the external environment. In a section containing an axis and the center of the exposed surface, C−B≧0.02 is satisfied, where C (mm) is the distance on the side surface of the tip between the fusion zone and the distal end of the tip, and B (mm) is the distance between a distal end surface of the tip and a portion of the fusion zone located closer to the axis than the side surface of the tip and located closest in the fusion zone to the distal end surface of the tip. |
| US08946975B2 |
Piezoelectric vibrating piece and piezoelectric device
A piezoelectric vibrating piece includes an excitation unit in a rectangular shape, a framing portion, and a connecting portion. The excitation unit includes two principal surfaces, a pair of excitation electrodes on the principal surfaces, a first side extending in a first direction, and a second side extending in a second direction. The second side is longer than the first side, and is perpendicular to the first direction. The framing portion surrounds the excitation unit. The connecting portion connects the excitation unit to the framing portion. The connecting portion has a third side which is connected to the first side and extends in the first direction and a fourth side which is connected to the framing portion and extends in the first direction. A thickness of the connecting portion is thinner than that of the framing portion. The third side has a different length from that of the fourth side. |
| US08946968B2 |
Squirrel-cage rotor of an asynchronous machine and method for producing such a rotor
A squirrel-cage rotor of an asynchronous machine includes a laminated core having grooves and positioned in fixed rotative engagement on a shaft, and a squirrel cage including short-circuit rods which are received in the grooves and have opposite front faces, and short-circuit rings which connect the short-circuit rods on the front faces. Shrink rings respectively surround the short-circuit rings at least radially outside and rest on the shaft. A pressure-resistant hardenable plastic is provided in a gap between the short-circuit rings and the shrink rings. |
| US08946967B2 |
Electric rotating machine
A tooth portion of a stator is divided into first and second tooth portions and in a relatively movable manner between a first position in which a magnetic resistance between the tooth portions is small and a second position in which the magnetic resistance is relatively larger than in the first position. When the second tooth portion is in the first position, the following equation is satisfied: (total magnetic resistance of main magnetic circuit C1)<(total magnetic resistance of magnetic short-circuit C2)≦(total magnetic resistance of magnetic circuit between permanent magnets C3). When the second tooth portion is in the second position, it is satisfied: (total magnetic resistance of the magnetic short-circuit C2)<(total magnetic resistance of the main magnetic circuit C1), and (total magnetic resistance of the magnetic short-circuit C2)≦(total magnetic resistance of the magnetic circuit between permanent magnetics C3). |
| US08946966B2 |
Electric rotating machine
An electric rotating machine is provided. A tooth portion of a stator is divided into a first tooth portion and a second tooth portion that are movable relative to each other between a first position, in which a magnetic resistance between the first and second tooth portions is small, and a second position, in which the magnetic resistance is relatively large. In a state in which the second tooth portion is in the second position, a region from a stator yoke portion side end of a current-carrying winding disposed around the tooth portion to a rotor side end of a winding arrangeable region is divided into a first region and a second region. A current-carrying winding space factor in the first region is set to be relatively smaller than in the second region. |
| US08946964B1 |
Modular windings for an electric machine
The invention incorporates a modular winding system for an electrical machine that includes a plurality of readily assembled modular windings for engaging a plurality of stator teeth of the machine. Windings comprise a pair of opposed legs terminating in upper and lower flanges, and are readily secured together to make consistent electrical contact between adjacent windings. |
| US08946957B2 |
Cable arrangement system
A cable arrangement system for one or more sets of cables to an electric machine is provided. The cable arrangement system includes a terminal box, a compression plate, multiple glands, and a multipoint connector. The terminal box is disposed on a housing of the electric machine and includes a first side having a first set of openings. The compression plate is releasably engaged with the first side and defines a second set of openings axially aligned with the first set of openings. The glands are configured to receive the first set of cables. Each of the glands includes a first and a second portion received in the first and the second set of openings respectively. The multipoint connector is disposed within the terminal box and includes a first and a second set of terminals configured to engage with lugs associated with the first and a second set of cables. |
| US08946953B2 |
Base assembly for motor and spindle motor including the same
There is provided a base assembly for a motor, the base assembly including: a base supporting rotation of a rotating member of the motor; and a pulling plate provided to the base to thereby prevent excessive floating of the rotating member, wherein the pulling plate includes a body part not in contact with the base and an extension part extended from the body part to thereby contact the base. |
| US08946952B2 |
Low profile spindle motor
A low profile spindle motor for supporting and rotating media disk or disks of a hard disk drive includes a plurality of stator teeth, a winding layer which may be formed by printed circuit board or the like, and a rotor. The plurality of stator teeth are disposed in an annular region surrounding an axis of rotation of the motor, and have projected ends for increasing the tooth area facing a magnet ring of the rotor. The winding layer has a plurality of windings disposed surrounding the axis of rotation. Each winding is coupled to one of the plurality of stator teeth. The magnet ring is positioned radially spaced apart and coplanar with the annular region. The magnet ring has magnetic poles annularly distributed to generate magnetic fluxes along radial direction. Spindle motor formed according to the invention has a low profile, improved performance and manufacturability. |
| US08946949B2 |
Electric power tool with an electronic cooling
An electric power tool for processing a substrate is disclosed. The electric power tool includes a tool which is designed to be rotatable around a rotational axis, a motor assembly having at least one motor which rotates the tool around the rotational axis, a motor housing having at least one receiving area for the at least one motor, a cooling element for cooling the at least one motor, and an electronic assembly having at least one electronic component to be cooled. The cooling of the at least one electronic component to be cooled is carried out via the motor housing. |
| US08946945B2 |
Low powered activation arrangement and method thereof
A fabric product with a low powered activation device and a conductive arrangement, which includes a body having an outer covering which is soft and flexible to providing an outer skin surface and an inner skin surface, and defines a body receiving cavity. The low powered activation device is an electronic unit received inside the body receiving cavity which comprises a casing, a power source, an activation circuit, and an operator which is activated through the activation circuit. The conductive arrangement electrically connects between the electronic unit and the outer skin surface, which includes one or more conductive threads affixed on the inner skin surface, each having one end portion defining an activation control which penetrates through the inner skin surface to the outer skin surface, thereby when the activation control is contacted by a user, the activation circuit is activated to activate the operator of the electronic unit. |
| US08946943B2 |
High side switch
A semiconductor chip includes at least one power semiconductor switch configured to activate and deactivate current conduction from a first supply terminal, which is connected to a first supply line that provides an unstabilized first supply voltage, to the at least one output terminal in accordance with a respective control signal. In operation, the unstabilized first supply voltage is monitored and an under-voltage is signaled when the unstabilized first supply voltage falls below a first threshold value. The first supply terminal is short circuited with a third terminal when the an under-voltage is signaled. |
| US08946938B2 |
Safety systems for wireless energy transfer in vehicle applications
A vehicle powering wireless receiver for use with a first electromagnetic resonator coupled to a power supply. The wireless receiver including a load configured to power the drive system of a vehicle using electrical power, a second electromagnetic resonator adapted to be housed upon the vehicle and configured to be coupled to the load, a safety system for to provide protection with respect to an object that may become hot during operation of the first electromagnetic resonator. The safety system including a detection subsystem configured to detect the presence of the object in substantial proximity to at least one of the resonators, and a notification subsystem operatively coupled to the detection subsystem and configured to provide an indication of the object, wherein the second resonator is configured to be wirelessly coupled to the first resonator to provide resonant, non-radiative wireless power to the second resonator from the first resonator. |
| US08946936B2 |
Electromagnetic coupling device, and door handle and vehicle door having electromagnetic coupling device
An electromagnetic coupling device electromagnetically connects a door handle side circuit of a door handle with a door main body side circuit of a door main body. This electromagnetic coupling device includes a door handle side coupling unit, a door main body side coupling unit, a door handle side coupling unit, a handle side support unit that supports the door handle, and a connector body that supports the door main body side coupling unit in a vehicle door main body. The door handle side coupling unit is electromagnetically coupled with the door main body side coupling unit without making contact therewith. At least one of the handle side support unit and the connector body restricts the relative movement, caused by rotation of the door handle, of the door handle side coupling unit and the door main body side coupling unit. |
| US08946935B2 |
Method for reducing electromagnetic interference radiated from a power supply arrangement
A method for reducing electromagnetic interference radiated from a power supply arrangement. A plurality of switching mode power supply units are connected to an external device. Each switching mode power supply unit includes a ground point. The radiated electromagnetic interference is reduced by synchronizing a switching frequency of each switching mode power supply unit, such that all of the synchronized switching mode power supply units have an identical switching frequency, thereby reducing the difference in electric potential between the ground points. A corresponding power supply arrangement. |
| US08946930B2 |
Uninterruptible power supply having an integrated transformer
An interruptible power supply (UPS) has a surge cancellation and electromagnetic interference (EMI) prevention device, a charger, a battery set and a power converter. The power converter has multiple power switches, an integrated transformer and a controller. An input terminal of the surge cancellation and EMI prevention device is connected with the AC mains, and an output terminal is connected with the integrated transformer. The charger is connected with the battery set. The battery set is connected with the power switches. The integrated transformer has a primary side having a first winding and a second winding serially connected. The first and second windings respectively have multiple sub-windings. The first winding is connected with the power switches. The second winding is connected with a power output terminal and shares a part of the first winding, thereby decreasing turns of the windings and reducing the size and cost of the UPS. |
| US08946927B2 |
Control device for lighting LED and detecting breakage thereof
A control device includes a plurality of LED arrays connected to a ground and connected in parallel to one another, each of the plurality of LED arrays including one or more LEDs connected in series and a resistance element connected in series to the LEDs, a first switching circuit disposed between each of the plurality of LED arrays and a power source, a second switching circuit disposed between each of the plurality of LED arrays and the power source, a capacitor having one end connected to the first switching circuit and another end connected to the plurality of LED arrays, a voltage detection circuit having an end connected to the other end of the capacitor, and a control circuit that controls switching of conduction states of each of the first and second switching circuits, and reads a voltage from the voltage detection circuit. |
| US08946923B2 |
Wind-tracking twin-turbine system
A turbine system for wind and/or water power is characterized in that two radial turbines (1, 2) aligned next to each other and in parallel are arranged having a vertical axis of rotation, said radial turbines being connected to each other and being pivotable about a pivot axis (3) parallel to the turbine axes (18), wherein the pivot axis and a V-shaped wind distributor (3) are located outside the connecting line between the turbine axes and both on the same side of the connecting line. |
| US08946909B2 |
Semiconductor package having gap-filler injection-friendly structure
A semiconductor package may include a base substrate, a solder resist layer on the base substrate, a first semiconductor chip mounted on the base substrate, and a second semiconductor chip stacked on the first semiconductor chip. The second semiconductor chip may include at least one end portion protruding from the first semiconductor chip. The solder resist layer may include and a recess portion. The recess portion may be formed in the solder resist layer at a position corresponding to the at least one end portion of the second semiconductor chip. |
| US08946905B2 |
Via structure for integrated circuits
An integrated circuit (IC) having a concentric arrangement of stacked vias is disclosed. The IC includes first and second pluralities of signal lines on first and second metal layers, respectively. The second metal layer is arranged between the first metal layer and a silicon layer. The IC also includes a via structure implemented in a predefined area, and connects each of the first and second pluralities of signal lines to circuitry in the silicon layer through respective first and second pluralities of vias. Each via of the first and second pluralities has a center point that extends along a vertical axis from its respective metal layer to the silicon layer. Centers of each of the second plurality of vias are closer to a perimeter of the predefined area than respective centers of any of the first plurality of vias. |
| US08946899B2 |
Via in substrate with deposited layer
An opening such as a small-diameter via is formed in a semiconductor substrate such as a monocrystalline silicon chip or wafer by a high etch rate process which leaves the opening with a rough interior surface. A smoothing layer such as a polysilicon layer is applied over the interior surfaces of the openings. The smoothing layer presents a surface smoother than the original interior surface. An insulating layer is formed over the smoothing layer or formed from the smoothing layer, and a conductive element such as a metal is formed in the opening. In a variant, a glass-forming material such as BPSG is applied in the opening. The glass-forming material is reflowed to form a glassy insulating layer which presents a smooth surface. The interface between the metal conductive element and the insulating or glassy layer is smooth, which improves mechanical and electrical properties. |
| US08946895B2 |
Semiconductor device, manufacturing method of semiconductor device, semiconductor manufacturing and inspecting apparatus, and inspecting apparatus
A semiconductor device having Cu wiring including a basic crystal structure which can reduce surface voids, and an inspecting technique for the semiconductor device. In the semiconductor device, surface voids can be reduced down to 1/10 or less of a current practical level by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 27 or less to all crystal grain boundaries of a Cu wiring to 60% or higher. Alternatively, a similar effect of surface void reduction can be obtained by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 3 to all crystal grain boundaries of a Cu wiring to 40% or higher. |
| US08946892B2 |
Semiconductor package
A semiconductor package includes a package substrate including a first wiring embedded in the package substrate, a second wiring embedded in the package substrate, the second wiring electrically insulated from the first wiring, and a capacitor embedded in the package substrate, the capacitor including a first electrode electrically connected to the first wiring and a second electrode electrically connected to the second wiring. At least a first semiconductor chip is disposed on the package substrate. A plurality of connection terminals are disposed between the package substrate and the first semiconductor chip and contact the package substrate, and form at least a first group of at least two connection terminals formed continuously adjacent to each other and electrically connected to the first wiring, and at least a second group of at least two connection terminals formed continuously adjacent to each other and electrically connected to the second wiring. |
| US08946891B1 |
Mushroom shaped bump on repassivation
Systems, methods and/or techniques for mushroom shaped bump on repassivation are described. A method of forming a chip scale package may include applying a first photoresist layer over a semiconductor wafer, developing away a portion of the first photoresist layer to define a cylindrically shaped template with substantially vertical side walls, and plating metal at least partially within the template to form a bump. The bump may include a first cylindrical base portion, a cap, and a lip formed by a portion of the cap that extends horizontally outward beyond the first cylindrical base portion. The cap and lip may be formed such that a vertical distance exists between the lip and the semiconductor wafer, defining an intrusion area. The method may include removing excess portions of the first photoresist layer, including portions residing in the intrusion area, to isolate the bump. |
| US08946889B2 |
Semiconductor module with cooling mechanism and production method thereof
A semiconductor module is provided which includes a semiconductor unit which is made by a resin mold. The resin mold has formed therein a coolant path through which a coolant flows to cool a semiconductor chip embedded in the resin mold. The resin mold also includes heat spreaders, and electric terminals embedded therein. Each of the heat spreaders has a fin heat sink exposed to the flow of the coolant. The fin heat sink is welded to a surface of each of the heat spreaders through an insulator, thus minimizing an electrical leakage from the heat spreader to the coolant. |
| US08946878B2 |
Integrated circuit package-in-package system housing a plurality of stacked and offset integrated circuits and method of manufacture therefor
An integrated circuit package-in-package system is provided including mounting first integrated circuits stacked in a first offset configuration over a die-attach paddle having a first edge and a second edge, opposing the first edge; connecting the first integrated circuits and a second edge lead adjacent the second edge; mounting second integrated circuits stacked in a second offset configuration, below and to the die-attach paddle; connecting the second integrated circuits and a first edge lead adjacent to the first edge; and encapsulating the first integrated circuits, second integrated circuits, and the die-attach paddle, with the first edge lead and the second edge lead partially exposed. |
| US08946877B2 |
Semiconductor package including cap
A semiconductor package comprises: a substrate comprising a semiconductor device; a cap comprising a seal ring disposed over a surface of the cap; and a gap between the substrate and the surface of the cap. The seal ring comprises a tread comprising at least two columns. |
| US08946864B2 |
Systems and methods for preparing films comprising metal using sequential ion implantation, and films formed using same
Systems and methods for preparing films comprising metal using sequential ion implantation, and films formed using same, are provided herein. A structure prepared using ion implantation may include a substrate; an embedded structure having pre-selected characteristics; and a film within or adjacent to the embedded structure. The film comprises a metal having a perturbed arrangement arising from the presence of the embedded structure. The perturbed arrangement may include metal ions that coalesce into a substantially continuous, electrically conductive metal layer, or that undergo covalent bonding, whereas in the absence of the embedded structure the metal ions instead may be free to diffuse through the substrate. The embedded structure may control the diffusion of the metal through the substrate and/or the reaction of the metal within the substrate. |
| US08946862B2 |
Methods for forming bipolar transistors
Methods are provided for forming a device that includes merged vertical and lateral transistors with collector regions of a first conductivity type between upper and lower base regions of opposite conductivity type that are Ohmically coupled via intermediate regions of the same conductivity type and to the base contact. The emitter is provided in the upper base region and the collector contact is provided in outlying sinker regions extending to the thin collector regions and an underlying buried layer. As the collector voltage increases part of the thin collector regions become depleted of carriers from the top by the upper and from the bottom by the lower base regions. This clamps the collector regions' voltage well below the breakdown voltage of the PN junction formed between the buried layer and the lower base region. The gain and Early Voltage are increased and decoupled and a higher breakdown voltage is obtained. |
| US08946860B2 |
Semiconductor device and related fabrication methods
Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a collector region of semiconductor material having a first conductivity type, a base region of semiconductor material within the collector region, the base region having a second conductivity type opposite the first conductivity type, and a doped region of semiconductor material having the second conductivity type, wherein the doped region is electrically connected to the base region and the collector region resides between the base region and the doped region. In exemplary embodiments, the dopant concentration of the doped region is greater than a dopant concentration of the collector region to deplete the collector region as the electrical potential of the base region exceeds that of the collector region. |
| US08946859B2 |
Device for detecting an attack in an integrated circuit chip
An integrated circuit chip including a plurality of parallel wells of alternated conductivity types formed in the upper portion of a semiconductor substrate of a first conductivity type, and a device of protection against attacks including: between the wells, trenches with insulated walls filled with a conductive material, said trenches extending from the upper surface of the wells to the substrate; and a circuit capable of detecting a modification of the stray capacitance formed between said conductive material and a region of the chip. |
| US08946851B1 |
Integrated MOS power transistor with thin gate oxide and low gate charge
A split gate power transistor includes a laterally configured power MOSFET including a doped silicon substrate having a first doped region and a second doped region of an opposite type as the first doped region, a gate oxide layer formed on a surface of the substrate, and a split polysilicon layer formed over the gate oxide layer. The polysilicon layer is cut into two electrically isolated portions, a first portion forming a polysilicon gate positioned over a channel region and a transition region of the substrate, and a second portion forming a polysilicon field plate formed entirely over a field oxide filled trench formed in the second doped region. The two polysilicon portions are separated by a gap. A lightly doped region is implanted in the substrate below the gap and adjacent to the trench, thereby forming a fill region having the same doping type as the first doped region. |
| US08946847B2 |
Backside illuminated image sensors and method of making the same
A backside illuminated image sensor includes a substrate with a substrate depth, where the substrate includes a pixel region and a peripheral region. The substrate further includes a front surface and a back surface. The backside illuminated image sensor includes a first isolation structure formed in the pixel region of the substrate, where a bottom of the first isolation structure is exposed at the back surface of the substrate. The backside illuminated image sensor includes a second isolation structure formed in the peripheral region of the substrate, where the second isolation structure has a depth less than a depth of the first isolation structure. The backside illuminated image sensor includes an implant region adjacent to at least a portion of sidewalls of each isolation structure in the pixel region. |
| US08946843B2 |
Solid-state image sensing device
A solid-state image sensing device includes light-receiving regions and a color filter which transmits red light, a color filter which transmits blue light, and a color filter which transmits green light is provided. The color filters are arranged on a one-to-one basis above the light-receiving regions. Above the light-receiving region where the color filter which transmits red or blue light is arranged, a light-transmitting film, an antireflection film, a light-transmitting film, an antireflection film, and a light-transmitting film are arranged, in this order from the light-receiving region, between the light-receiving region and the color filter. Above the light-receiving region where the color filter which transmits green light is arranged, a light-transmitting film, an antireflection film, and a light-transmitting film are arranged, in this order from the light-receiving region, between the light-receiving region and the color filter. The antireflection films are higher in refractive index than the light-transmitting films. |
| US08946842B2 |
Method for manufacturing optical waveguide receiver and optical waveguide receiver
A method for manufacturing an optical waveguide receiver includes the steps of growing first and second stacked semiconductor layer sections, the second stacked semiconductor layer section including a core layer and a cladding layer; forming a first mask including first and second portions; etching the first and second stacked semiconductor layer sections by using the first mask, the first and second stacked semiconductor layer sections covered with the first portion being etched in a mesa structure, the second stacked semiconductor layer section covered with the second portion being etched in a terrace-shaped structure; removing the second portion from the first mask with the first portion left; selectively etching the cladding layer until exposing a surface of the core layer; and sequentially forming a first metal layer, an insulating film, and a second metal layer on the core layer exposed in the step of selectively etching the cladding layer. |
| US08946841B2 |
Solid-state imaging element and electronic device including a pixel separating section
Disclosed herein is a solid-state imaging element including: a semiconductor layer; a plurality of photoelectric conversion sections arranged within the semiconductor layer; and a pixel separating section disposed in a shape of a same width from a light receiving surface of the semiconductor layer to an opposite surface of the semiconductor layer from the light receiving surface in a position of separating the photoelectric conversion sections from each other for each pixel, the pixel separating section being formed by a material including an impurity. |
| US08946838B2 |
Radiation converter comprising a directly converting semiconductor layer and method for producing such a radiation converter
A radiation converter includes a directly converting semiconductor layer having grains whose interfaces predominantly run parallel to a drift direction—constrained by an electric field—of electrons liberated in the semiconductor layer. Charge carriers liberated by incident radiation quanta are accelerated in the electric field in the direction of the radiation incidence direction and on account of the columnar or pillar-like texture of the semiconductor layer, in comparison with the known radiation detectors, cross significantly fewer interfaces of the grains that are occupied by defect sites. This increases the charge carrier lifetime/mobility product in the direction of charge carrier transport. Consequently, it is possible to realize significantly thicker semiconductor layers for the counting and/or energy-selective detection of radiation quanta. This increases the absorptivity of the radiation converter which in turn makes it possible to reduce a radiation dose applied to the patient. |
| US08946837B2 |
Semiconductor storage device with magnetoresistive element
According to one embodiment, a semiconductor storage device is disclosed. The device includes first magnetic layer, second magnetic layer, first nonmagnetic layer between them. The first magnetic layer includes a structure in which first magnetic material film, second magnetic material film, and nonmagnetic material film between the first and second magnetic material films are stacked. The first magnetic material film is nearest to the first nonmagnetic layer in the first magnetic layer. The nonmagnetic material film includes at least one of Ta, Zr, Nb, Mo, Ru, Ti, V, Cr, W, Hf. The second magnetic material film includes stacked materials, including first magnetic material nearest to the first nonmagnetic layer among the stacked materials, and second magnetic material which is same magnetic material as the first magnetic material and has smaller thickness than the first magnetic material. |
| US08946836B2 |
Magnetic memory and method of fabrication
In one embodiment a magnetic memory includes a memory device base and a plurality of memory cells disposed on the memory cell base, where each memory cell includes a layer stack comprising a plurality of magnetic and electrically conductive layers arranged in a stack of layers common to each other memory cell. The magnetic memory further includes an implanted matrix disposed between the memory cells and surrounding each memory cell, where the implanted matrix includes component material of the layer stack of each memory cell inter mixed with implanted species, where the implanted matrix comprises a non-conducting material and a non-magnetic material, wherein each memory cell is electrically and magnetically isolated from each other memory cell. |
| US08946835B2 |
Magnetic device with different planarization areas
A planarization process may planarize a media disk that has data trenches between data features and larger servo trenches between servo features. A filler material layer is deposited on the media disk and provides step coverage of the trenches. The filler material has data recesses over the data trenches and servo recesses over the servo trenches that must be removed to produce a planar media surface. A first planarization process is used to remove the data recesses and a second planarization process is used to remove the servo recesses. |
| US08946831B2 |
Low frequency response microphone diaphragm structures and methods for producing the same
A microphone system includes a diaphragm suspended by springs and including a sealing layer that seals passageways which, if left open, would degrade the microphone's frequency response by allowing air to pass from one side of the diaphragm to the other when the diaphragm is responding to an incident acoustic signal. In some embodiments, the sealing layer may include an equalization aperture to allow pressure to equalize on both sides of the diaphragm. |
| US08946829B2 |
Selective fin-shaping process using plasma doping and etching for 3-dimensional transistor applications
A semiconductor apparatus includes fin field-effect transistor (FinFETs) having shaped fins and regular fins. Shaped fins have top portions that may be smaller, larger, thinner, or shorter than top portions of regular fins. The bottom portions of shaped fins and regular fins are the same. FinFETs may have only one or more shaped fins, one or more regular fins, or a mixture of shaped fins and regular fins. A semiconductor manufacturing process to shape one fin includes forming a photolithographic opening of one fin, optionally doping a portion of the fin, and etching a portion of the fin. |
| US08946828B2 |
Semiconductor device having elevated structure and method of manufacturing the same
A semiconductor device includes a semiconductor substrate; a gate stack overlying the substrate, a spacer formed on sidewalls of the gate stack, and a protection layer overlying the gate stack for filling at least a portion of a space surrounded by the spacer and the top surface of the gate stack. A top surface of the spacer is higher than a top surface of the gate stack. |
| US08946818B2 |
Dark current reduction in back-illuminated imaging sensors
A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The device includes an insulator layer; a semiconductor substrate, having an interface with the insulator layer; an epitaxial layer grown on the semiconductor substrate by epitaxial growth; and one or more imaging components in the epitaxial layer in proximity to a face of the epitaxial layer, the face being opposite the interface of the semiconductor substrate and the insulator layer, the imaging components comprising junctions within the epitaxial layer; wherein the semiconductor substrate and the epitaxial layer exhibit a net doping concentration having a maximum value at a predetermined distance from the interface of the insulating layer and the semiconductor substrate and which decreases monotonically on both sides of the profile from the maximum value within a portion of the semiconductor substrate and the epitaxial layer. The doping profile between the interface with the insulation layer and the peak of the doping profile functions as a “dead band” to prevent dark current carriers from penetrating to the front side of the device. |
| US08946817B2 |
Semiconductor device with compensation regions
A semiconductor device includes a semiconductor body including an inner region, and an edge region, a first doped device region of a first doping type in the inner region and the edge region and coupled to a first terminal, and at least one second doped device region of a second doping type complementary to the first doping type in the inner region and coupled to a second terminal. Further, the semiconductor device includes a minority carrier converter structure in the edge region. The minority carrier converter structure includes a first trap region of the second doping type adjoining the first doped device region, and a conductor electrically coupling the first trap region to the first doped device region. |
| US08946816B2 |
High frequency switching MOSFETs with low output capacitance using a depletable P-shield
Aspects of the present disclosure describe a high density trench-based power MOSFETs with self-aligned source contacts and methods for making such devices. The source contacts are self-aligned with spacers and the active devices may have a two-step gate oxide. A lower portion may have a thickness that is larger than the thickness of an upper portion of the gate oxide. The MOSFETS also may include a depletable shield in a lower portion of the substrate. The depletable shield may be configured such that during a high drain bias the shield substantially depletes. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. |
| US08946814B2 |
Superjunction devices having narrow surface layout of terminal structures, buried contact regions and trench gates
Superjunction semiconductor devices having narrow surface layout of terminal structures and methods of manufacturing the devices are provided. The narrow surface layout of terminal structures is achieved, in part, by connecting a source electrode to a body contact region within a semiconductor substrate at a body contact interface comprising at least a first side of the body contact region other than a portion of a first main surface of the semiconductor substrate. |
| US08946812B2 |
Semiconductor device and manufacturing method thereof
To provide a miniaturized semiconductor device with stable electric characteristics in which a short-channel effect is suppressed. Further, to provide a manufacturing method of the semiconductor device. The semiconductor device (transistor) including a trench formed in an oxide insulating layer, an oxide semiconductor film formed along the trench, a source electrode and a drain electrode which are in contact with the oxide semiconductor film, a gate insulating layer over the oxide semiconductor film, a gate electrode over the gate insulating layer is provided. The lower corner portions of the trench are curved, and the side portions of the trench have side surfaces substantially perpendicular to the top surface of the oxide insulating layer. Further, the width between the upper ends of the trench is greater than or equal to 1 time and less than or equal to 1.5 times the width between the side surfaces of the trench. |
| US08946809B2 |
Method for manufacturing semiconductor memory device and semiconductor memory device
According to one embodiment, a method is disclosed for manufacturing a semiconductor memory device. The method includes forming a first stopper film forming a lower gate layer, making a recess in the lower gate layer, filling a sacrificial film into the recess, forming a second stopper film, making an opening in the second stopper film, forming a stacked body. The stacked body includes electrode films and insulating films. The method includes, making a slit in the stacked body, making a hole in the stacked body, removing the sacrificial film via the hole, forming a memory film including a charge storage film. The method includes forming a channel body on a side wall of the memory film. An etching rate of the first stopper film and the second stopper film is lower than an etching rate of the electrode films and the insulating films. |
| US08946806B2 |
Memory cell with decoupled channels
A device having a substrate prepared with a memory cell region having a memory cell is disclosed. The memory cell includes an access transistor and a storage transistor. The access transistor includes first and second source/drain (S/D) regions and the storage transistor includes first and second storage S/D regions. The access and storage transistors are coupled in series and the second S/D regions being a common S/D region. An erase gate is disposed over the common S/D region. A program gate is disposed over the first storage S/D region. Such an arrangement of the memory cell decouples a program channel and an erase channel. |
| US08946805B2 |
Reduced area single poly EEPROM
A single poly EEPROM cell in which the read transistor is integrated in either the control gate well or the erase gate well. The lateral separation of the control gate well from erase gate well may be reduced to the width of depletion regions encountered during program and erase operations. A method of forming a single poly EEPROM cell where the read transistor is integrated in either the control gate well or the erase gate well. |
| US08946804B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device, and a method of fabrication the same, include selection gate patterns extending in a first direction on a substrate, cell gate patterns extending in parallel in the first direction between the selection gate patterns adjacent to each other, and contact pads connected to first end parts of the cell gate patterns, respectively. An insulating layer covers the selection gate patterns, the cell gate patterns, and the contact pads. The insulating layer includes a void or seam between the contact pads. A filling insulating layer fills the void or seam in the insulating layer. |
| US08946803B2 |
Method of forming a floating gate with a wide base and a narrow stem
Floating gates of a floating gate memory array have an inverted-T shape in both the bit line direction and the word line direction. Floating gates are formed using an etch stop layer that separates two polysilicon layers that form floating gates. Word lines extend over floating gates in one example, and word lines extend between floating gates in another example. |
| US08946802B2 |
Method of eDRAM DT strap formation in FinFET device structure
The specification and drawings present a new method, device and computer/software related product (e.g., a computer readable memory) are presented for realizing eDRAM strap formation in Fin FET device structures. Semiconductor on insulator (SOI) substrate comprising at least an insulator layer between a first semiconductor layer and a second semiconductor layer is provided. The (metal) strap formation is accomplished by depositing conductive layer on fins portion of the second semiconductor layer (Si) and a semiconductor material (polysilicon) in each DT capacitor extending to the second semiconductor layer. The metal strap is sealed by a nitride spacer to prevent the shorts between PWL and DT capacitors. |
| US08946799B2 |
Silicon controlled rectifier with stress-enhanced adjustable trigger voltage
Device structures, fabrication methods, operating methods, and design structures for a silicon controlled rectifier. The method includes applying a mechanical stress to a region of a silicon controlled rectifier (SCR) at a level sufficient to modulate a trigger current of the SCR. The device and design structures include a SCR with an anode, a cathode, a first region, and a second region of opposite conductivity type to the first region. The first and second regions of the SCR are disposed in a current-carrying path between the anode and cathode of the SCR. A layer is positioned on a top surface of a semiconductor substrate relative to the first region and configured to cause a mechanical stress in the first region of the SCR at a level sufficient to modulate a trigger current of the SCR. |
| US08946798B2 |
Solid-state imaging device and electronic equipment
A backside illumination type solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer, a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit, and a first shield wire which shields adjacent connection wires in one direction therebetween. |
| US08946797B2 |
Solid-state imaging device, method of manufacturing solid-state imaging device, apparatus for manufacturing semiconductor device, method of manufacturing semiconductor device, and electronic device
There is provided a solid-state imaging device including a sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion section is provided and a sensor-side wiring layer provided on an opposite surface side from a light receiving surface of the sensor-side semiconductor layer, a circuit substrate having a circuit-side semiconductor layer and a circuit-side wiring layer and provided on a side of the sensor-side wiring layer of the sensor substrate, a connection unit region in which a connection section is provided, the connection section having a first through electrode, a second through electrode, and a connection electrode connecting the first through electrode and the second through electrode, and an insulating layer having a step portion which has the connection electrode embedded therein and has a film thickness that gradually decreases from the connection unit region to the pixel region. |
| US08946796B2 |
Image sensor
An image sensor may include at least one device isolation layer that passes through an epitaxial layer in a semiconductor substrate to isolate pixel regions, a light-receiving element in each pixel region, and a transistor in the active region of the semiconductor substrate partitioned by the device isolation layer. |
| US08946794B2 |
Image sensor
An image sensor includes a first device isolation layer separating a plurality of pixels from one another, and a second device isolation layer disposed along inner side surfaces of parts of the first device isolation layer that extend around the pixels. The second device isolation layer delimits an active region of the semiconductor substrate. Each pixel includes a photoelectric converter, a floating diffusion region, a ground region, and a gate of a transfer transistor. The gate extends into the active region of the semiconductor substrate. The ground region is electrically connected to a ground voltage terminal. |
| US08946793B2 |
Integrated circuits having replacement gate structures and methods for fabricating the same
A method of fabricating an integrated circuit includes forming an interlayer dielectric (ILD) layer over a dummy gate stack. The dummy gate stack includes a dummy gate structure, a hardmask layer, and sidewall spacers formed over a semiconductor substrate. The method further includes removing at least an upper portion of the dummy gate stack to form a first opening within the ILD layer, extending the first opening to form a first extended opening by completely removing the dummy gate structure of the dummy gate stack, and depositing at least one workfunction material layer within the first opening and within the first extended opening. Still further, the method includes removing portions of the workfunction material within the first opening and depositing a low-resistance material over remaining portions of the workfunction material thereby forming a replacement metal gate structure that includes the remaining portion of the workfunction material and the low-resistance material. |
| US08946792B2 |
Dummy fin formation by gas cluster ion beam
FinFET structures with dielectric fins and methods of fabrication are disclosed. A gas cluster ion beam (GCIB) tool is used to apply an ion beam to exposed fins, which converts the fins from a semiconductor material such as silicon, to a dielectric such as silicon nitride or silicon oxide. Unlike some prior art techniques, where some fins are removed prior to fin merging, in embodiments of the present invention, fins are not removed. Instead, semiconductor (silicon) fins are converted to dielectric (nitride/oxide) fins where it is desirable to have isolation between groups of fins that comprise various finFET devices on an integrated circuit (IC). |
| US08946790B2 |
Semiconductor device and method of manufacturing the same
A transistor which includes an oxide semiconductor and is capable of high-speed operation and a method of manufacturing the transistor. In addition, a highly reliable semiconductor device including the transistor and a method of manufacturing the semiconductor device. The semiconductor device includes an oxide semiconductor layer including a channel formation region, and a source and drain regions which are provided so that the channel formation region is interposed therebetween and have lower resistance than the channel formation region. The channel formation region and the source and drain regions each include a crystalline region. |
| US08946789B2 |
Semiconductor device, method of manufacturing the same, and electronic device including the semiconductor device
An example embodiment relates to a transistor including a channel layer. A channel layer of the transistor may include a plurality of unit layers spaced apart from each other in a vertical direction. Each of the unit layers may include a plurality of unit channels spaced apart from each other in a horizontal direction. The unit channels in each unit layer may form a stripe pattern. Each of the unit channels may include a plurality of nanostructures. Each nanostructure may have a nanotube or nanowire structure, for example a carbon nanotube (CNT). |
| US08946788B2 |
Method and system for doping control in gallium nitride based devices
A method of growing a III-nitride-based epitaxial structure includes providing a substrate in an epitaxial growth reactor and heating the substrate to a predetermined temperature. The method also includes flowing a gallium-containing gas into the epitaxial growth reactor and flowing a nitrogen-containing gas into the epitaxial growth reactor. The method further includes flowing a gettering gas into the epitaxial growth reactor. The predetermined temperature is greater than 1000° C. |
| US08946786B2 |
Semiconductor device and method for manufacturing same
A semiconductor substrate of a semiconductor device has a sensor region and an integrated circuit region, and a cavity is formed immediately under a surface layer portion of the sensor region. A capacitive acceleration sensor is formed on the sensor region by working a surface layer portion of the semiconductor substrate opposed to the cavity. The capacitive acceleration sensor includes an interdigital fixed electrode and an interdigital movable electrode. A CMIS transistor is formed on the integrated circuit region. The CMIS transistor includes a P-type well region and an N-type well region formed on the surface layer portion of the semiconductor substrate. A gate electrode is opposed to the respective ones of the P-type well region and the N-type well region through a gate insulating film formed on a surface of the semiconductor substrate. |
| US08946785B2 |
Ionic field effect transistor having heterogeneous triangular nanochannel and method of manufacturing the same
An ionic field effect transistor includes: a substrate; a polymer layer that is formed on the substrate and in which a first flow path and a second flow path that is separately disposed from the first flow path are formed; and a gate electrode that is formed between the substrate and the polymer layer and that contacts the first flow path and the second flow path, wherein a heterogeneous triangular nanochannel that connects the first flow path and the second flow path is formed between the gate electrode and the polymer layer. |
| US08946783B2 |
Image sensors having reduced dark level differences
An image sensor including a semiconductor layer including a plurality of unit pixels each including a photoelectric conversion device and read devices; and an insulating layer including a light-shielding pattern defining a light-receiving region and a light-shielding region of the semiconductor layer, the insulating layer covering one surface of the semiconductor layer. The semiconductor layer further includes a potential drain region formed adjacent to an interface between the semiconductor layer and an insulating layer in the light-shielding region, wherein electrons generated due to defects occurring at the interface are accumulated in the potential drain region. At least one of the unit pixels in the light-shielding region provides a drain path for draining the electrons accumulated in the potential drain region. |
| US08946782B2 |
Method for keyhole repair in replacement metal gate integration through the use of a printable dielectric
A method of fabricating a FET device is provided that includes the following steps. A wafer is provided. At least one active area is formed in the wafer. A plurality of dummy gates is formed over the active area. Spaces between the dummy gates are filled with a dielectric gap fill material such that one or more keyholes are formed in the dielectric gap fill material between the dummy gates. The dummy gates are removed to reveal a plurality of gate canyons in the dielectric gap fill material. A mask is formed that divides at least one of the gate canyons, blocks off one or more of the keyholes and leaves one or more of the keyholes un-blocked. At least one gate stack material is deposited onto the wafer filling the gate canyons and the un-blocked keyholes. A FET device is also provided. |
| US08946781B2 |
Integrated circuit including gate electrode conductive structures with different extension distances beyond contact
An integrated circuit includes four parallel positioned linear-shaped structures each including a gate electrode portion and an extension portion. Gate electrode portions of two of the four linear-shaped structures respectively form gate electrodes of first and second transistors of a first transistor type. Gate electrode portions of two of the four linear-shaped structures respectively form a gate electrodes of first and second transistors of a second transistor type. Four contacting structures are respectively connected to the extension portions of the four linear-shaped structures such that each extension portion has a respective contact-to-end distance. At least two of the contact-to-end distances are different. A fifth linear-shaped structure forms gate electrodes of transistors respectively positioned next to the first transistors of the first and second transistor types. A sixth linear-shaped structure forms gate electrodes of transistors respectively positioned next to the second transistors of the first and second transistor types. |
| US08946780B2 |
Ohmic contact schemes for group III-V devices having a two-dimensional electron gas layer
A semiconductor device includes a first layer and a second layer over the first layer. The first and second layers are configured to form an electron gas layer at an interface of the first and second layers. The semiconductor device also includes an Ohmic contact and multiple conductive vias through the second layer. The conductive vias are configured to electrically couple the Ohmic contact to the electron gas layer. The conductive vias could have substantially vertical sidewalls or substantially sloped sidewalls, or the conductive vias could form a nano-textured surface on the Ohmic contact. The first layer could include Group III-nitride nucleation, buffer, and channel layers, and the second layer could include a Group III-nitride barrier layer. |
| US08946779B2 |
MISHFET and Schottky device integration
A semiconductor device includes a substrate comprising a heterostructure configured to support formation of a channel during operation, first and second dielectric layers supported by the substrate, the second dielectric layer being disposed between the first dielectric layer and the substrate, a gate supported by the substrate, disposed in a first opening in the first dielectric layer, and to which a bias voltage is applied during operation to control current flow through the channel, the second dielectric layer being disposed between the gate and the substrate, and an electrode supported by the substrate, disposed in a second opening in the first and second dielectric layers, and configured to establish a Schottky junction with the substrate. |
| US08946778B2 |
Active area shaping of III-nitride devices utilizing steps of source-side and drain-side field plates
In an exemplary implementation, a III-nitride semiconductor device includes a III-nitride heterojunction including a first III-nitride body situated over a second III-nitride body to form a two-dimensional electron gas. The III-nitride semiconductor device further includes a gate well formed in a dielectric body, the dielectric body situated over the III-nitride heterojunction. A gate arrangement is situated in the gate well and includes a gate electrode, a source-side field plate, and a drain-side field plate. The source-side field plate and the drain-side field plate each include one or more steps, where the drain-side field plate has a different number of the one or more steps than the source-side field plate. |
| US08946777B2 |
Nitride-based transistors having laterally grown active region and methods of fabricating same
High electron mobility transistors and/or methods of fabricating high electron mobility transistors that include a first Group III-nitride layer having vertically grown regions, laterally grown regions and a coalescence region are provided. A Group III-nitride channel layer is provided on the first Group III-nitride layer and a Group III-nitride barrier layer is provided on the Group III-nitride channel layer. A drain contact, a source contact and a gate contact are provided on the barrier layer. The gate contact is disposed on a portion of the barrier layer on a laterally grown region of the first Group III-nitride layer and at least a portion of one of the source contact and/or the drain contact is disposed on a portion of the barrier layer on a vertically grown region of the first Group III-nitride layer. |
| US08946775B2 |
Nitride semiconductor structure
A nitride semiconductor structure is provided. The nitride semiconductor structure at least includes a silicon substrate, a AlN layer, a AlGaN layer and a GaN layer formed on the AlGaN layer. The silicon substrate has a surface tilted at 0 |
| US08946774B2 |
Gallium nitride semiconductor substrate
A method of fabricating a single crystal gallium nitride substrate the step of cutting an ingot of single crystal gallium nitride along predetermined planes to make one or more single crystal gallium nitride substrates. The ingot of single crystal gallium nitride is grown by vapor phase epitaxy in a direction of a predetermined axis. Each predetermined plane is inclined to the predetermined axis. Each substrate has a mirror polished primary surface. The primary surface has a first area and a second area. The first area is between an edge of the substrate and a line 3 millimeter away from the edge. The first area surrounds the second area. An axis perpendicular to the primary surface forms an off-angle with c-axis of the substrate. The off-angle takes a minimum value at a first position in the first area of the primary surface. |
| US08946773B2 |
Multi-layer semiconductor buffer structure, semiconductor device and method of manufacturing the semiconductor device using the multi-layer semiconductor buffer structure
A semiconductor buffer structure may include a silicon substrate and a buffer layer that is formed on the silicon substrate. The buffer layer may include a first layer, a second layer formed on the first layer, and a third layer formed on the second layer. The first layer may include AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, 0≦x+y≦1) and have a lattice constant LP1 that is smaller than a lattice constant LP0 of the silicon substrate. The second layer may include AlxInyGa1-x-yN (0≦x<1, 0≦y<1, 0≦x+y<1) and have a lattice constant LP2 that is greater than the lattice constant LP1 and smaller than the lattice constant LP0. The third layer may include AlxInyGa1-x-yN (0≦x<1, 0≦y<1, 0≦x+y<1) and have a lattice constant LP3 that is greater than the lattice constant LP1 and smaller than the lattice constant LP2. |
| US08946772B2 |
Substrate for epitaxial growth, process for manufacturing GaN-based semiconductor film, GaN-based semiconductor film, process for manufacturing GaN-based semiconductor light emitting element and GaN-based semiconductor light emitting element
A substrate for epitaxial growth of the present invention comprises: a single crystal part comprising a material different from a GaN-based semiconductor at least in a surface layer part; and an uneven surface, as a surface for epitaxial growth, comprising a plurality of convex portions arranged so that each of the convex portions has three other closest convex portions in directions different from each other by 120 degrees and a plurality of growth spaces, each of which is surrounded by six of the convex portions, wherein the single crystal part is exposed at least on the growth space, which enables a c-axis-oriented GaN-based semiconductor crystal to grow from the growth space. |
| US08946771B2 |
Gallium nitride semiconductor devices and method making thereof
The present disclosure relates to an enhancement mode gallium nitride (GaN) transistor device. The GaN transistor device has an electron supply layer located on top of a GaN layer. An etch stop layer (e.g., AlN) is disposed above the electron supply layer. A gate structure is formed on top of the etch stop layer, such that the bottom surface of the gate structure is located vertically above the etch stop layer. The position of etch stop layer in the GaN transistor device stack allows it to both enhance gate definition during processing (e.g., selective etching of the gate structure located on top of the AlN layer) and to act as a gate insulator that reduces gate leakage of the GaN transistor device. |
| US08946764B2 |
Gallium nitride-based semiconductor element, optical device using the same, and image display apparatus using optical device
A GaN-based semiconductor element which can suppress a leakage current generated during reverse bias application, an optical device using the same, and an image display apparatus using the optical device are provided. The GaN-based semiconductor element has a first GaN-based compound layer including an n-type conductive layer; a second GaN-based compound layer including a p-type conductive layer; and an active layer provided between the first GaN-based compound layer and the second GaN-based compound layer. In this GaN-based semiconductor element, the first GaN-based compound layer includes an underlayer having an n-type impurity concentration in the range of 3×1018 to 3×1019/cm3, and when a reverse bias of 5 V is applied, a leakage current density, which is the density of a current flowing per unit area of the active layer, is 2×10−5 A/cm2 or less. |
| US08946759B2 |
Organic light emitting display device with improved sealing property
Disclosed is an organic light emitting display device which prevents or inhibits external gas, such as, oxygen or moisture, from penetrating into a display unit and reinforces a mechanical strength by providing a first sealant and a second sealant. The organic light emitting display device may include: a first substrate; a display unit on the first substrate; a second substrate covering the display unit; a first sealant adhering the first substrate to the second substrate; and a second sealant around the first sealant, the second sealant sealing the first substrate and the second substrate. A filler may be included in the second sealant, and a particle size of the filler may be larger than a gap between the first substrate and the second substrate. |
| US08946758B2 |
Organic light emitting display device and method of manufacturing organic light emitting display device
An organic light emitting display device includes a substrate having a luminescent region and a non-luminescent region, an insulation layer on the substrate, a first electrode on the insulation layer, at least one light emitting structure on the first electrode, a second electrode on the light emitting structure, and at least one reflecting structure at one of the first electrode or the second electrode around the at least one light emitting structure. The reflecting structure may be configured to reflect light back toward the luminescent region. |
| US08946757B2 |
Heat spreading substrate with embedded interconnects
Heat spreading substrate with embedded interconnects. In an embodiment in accordance with the present invention, an apparatus includes a metal parallelepiped comprising a plurality of wires inside the metal parallelepiped. The plurality of wires have a different grain structure than the metal parallelepiped. The plurality of wires are electrically isolated from the metal parallelepiped. The plurality of wires may be electrically isolated from one another. |
| US08946752B2 |
Semiconductor light emitting device
The semiconductor device includes a substrate, a semiconductor layer which is formed on the substrate and includes a light emitting layer, and a diffraction/scattering film for diffracting or scattering light generated at the light emitting layer. The diffraction/scattering film is formed between the light emitting layer and the substrate, has a side surface slanted with respect to a film thickness direction thereof, and has a composition gradient in the film thickness direction. |
| US08946750B2 |
Semiconductor light emitting device
A semiconductor light emitting device includes a light emitting unit, a first and second conductive pillar, a sealing unit, a translucent layer, and a wavelength conversion layer. The light emitting unit includes a first and second semiconductor layer and a light emitting layer. The first semiconductor layer has a first and second major surface. The first major surface has a first and second portion. The second major surface is opposed the first major surface and has a third and fourth portion. The light emitting layer is provided on the first portion. The second semiconductor layer is provided on the light emitting layer. The first conductive pillar is provided on the second portion. The second conductive pillar is provided on the second semiconductor layer. The translucent layer is provided on the fourth portion. The wavelength conversion layer is provided on the third portion and on the translucent layer. |
| US08946747B2 |
Lighting device including multiple encapsulant material layers
A lighting device includes an electrically activated emitter, a first layer that contains a first encapsulant material, and a second layer that contains a second encapsulant material, with a textured interface between the first layer and the second layer. Additional layers including further encapsulant materials and/or lumiphoric materials may be provided. Multiple textured interfaces may be provided. Textured interfaces may be arranged as lenses, including Fresnel lenses. |
| US08946745B2 |
Supporting substrate for manufacturing vertically-structured semiconductor light-emitting device and semiconductor light-emitting device using the supporting substrate
The present invention is related to a supporting substrate for manufacturing vertically-structured semiconductor light emitting device and a vertically-structured semiconductor light emitting device using the same, which minimize damage and breaking of a multi-layered light-emitting structure thin film separated from a sapphire substrate during the manufacturing process, thereby improving the whole performance of the semiconductor light emitting device.The supporting substrate for manufacturing the vertically-structured semiconductor light emitting device of the present invention comprises: a selected supporting substrate formed of a material having a difference of thermal expansion coefficient of 5 ppm or less from a sapphire substrate on which a multi-layered light-emitting structure thin film comprising a Group III-V nitride-based semiconductor is laminated; a sacrificial layer formed on the selected supporting substrate; a thick metal film formed on an upper part of the sacrificial layer; and a bonding layer formed on an upper part of the thick metal layer and formed of a soldering or brazing alloy material. |
| US08946744B2 |
Light emitting diode
The present invention provides a light emitting diode including a lower semiconductor layer formed on a substrate; an upper semiconductor layer disposed above the lower semiconductor layer, exposing an edge region of the lower semiconductor layer; a first electrode formed on the upper semiconductor layer; an insulation layer interposed between the first electrode and the upper semiconductor layer, to supply electric current to the lower semiconductor layer; a second electrode formed on another region of the upper semiconductor layer, to supply electric current to the upper semiconductor layer. The first electrode includes an electrode pad disposed on the upper semiconductor layer and an extension extending from the electrode pad to the exposed lower semiconductor layer. The insulation layer may have a distributed Bragg reflector structure. |
| US08946734B2 |
Method for packaging light emitting diodes and light emitting module having LED packages formed by the method
A method for making a light emitting module includes: a. providing a flexible substrate; b. forming a plurality of rigid portions in the flexible substrate; c. forming an electrically conductive layer on the rigid portions, the electrically conductive layer having several electrodes apart from each other; d. arranging a plurality of LED dies on the electrically conductive layer with each LED die striding over and electrically connected to two neighboring electrodes; e. forming an encapsulating layer to cover the LED dies; and f. cutting through the flexible substrate. At least one of above steps b, c, d, e is performed by a roll applying process. |
| US08946731B2 |
OLED display with spalled semiconductor driving circuitry and other integrated functions
Spalling is employed to generate a single crystalline semiconductor layer. Complementary metal oxide semiconductor (CMOS) logic and memory devices are formed on a single crystalline semiconductor substrate prior to spalling. Organic light emitting diode (OLED) driving circuitry, solar cells, sensors, batteries and the like can be formed prior to, or after, spalling. The spalled single crystalline semiconductor layer can be transferred to a substrate. OLED displays can be formed into the spalled single crystalline semiconductor layer to achieve a structure including an OLED display with semiconductor driving circuitry and other functions integrated on the single crystalline semiconductor layer. |
| US08946729B2 |
Light emitting diode
A light emitting diode includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode, and a second electrode. The first semiconductor layer, the active layer, and the second semiconductor layer are orderly stacked on the substrate. The second semiconductor layer is covered with stepped three-dimensional nano-structures in a particular shape, which act to reabsorb wide-angle incident light and re-emit the light at narrower angles of incidence, to increase the light-giving properties of the light emitting diode. |
| US08946728B2 |
Semiconductor light emitting device
A semiconductor light emitting device includes: a light emission structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; and a wavelength conversion layer formed on at least a portion of a light emission surface of the light emission structure, made of a light-transmissive material including phosphor particles, and having a void therein. A semiconductor light emitting device includes: a light emission structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; and a wavelength conversion layer formed on at least a portion of a light emission surface of the light emission structure, made of a light-transmissive material including phosphor particles or quantum dots, and having a void therein. |
| US08946727B2 |
Zinc oxide based compound semiconductor device
There is provided a zinc oxide based compound semiconductor device in which drive voltage is not raised, property of crystal is satisfactory and device characteristics is excellent, even when the semiconductor device is formed by forming a lamination portion having a hetero junction of the ZnO based compound semiconductor layers. The zinc oxide based compound semiconductor device includes a substrate (1) made of MgxZn1-xO (0≦x≦0.5), the principal plane of which is a plane A (11-20) or a plane M (10-10), and single crystal layers (2) to (6) made of zinc oxide based compound semiconductor, which are epitaxially grown on the principal plane of the substrate (1) in such orientation that a plane parallel to the principal plane is a plane {11-20} or a plane {10-10} and a plane perpendicular to the principal plane is a plane {0001}. |
| US08946725B2 |
Vertical gallium nitride JFET with gate and source electrodes on regrown gate
A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure. |
| US08946724B1 |
Monolithically integrated self-aligned GaN-HEMTs and Schottky diodes and method of fabricating the same
Monolithic integration of high-frequency GaN-HEMTs and GaN-Schottky diodes. The integrated HEMTs/Schottky diodes are realized using an epitaxial structure and a fabrication process which reduces fabrication cost. Since the disclosed process preferably uses self-aligned technology, both devices show extremely high-frequency performance by minimizing device parasitic resistances and capacitances. Furthermore, since the Schottky contact of diodes is formed by making a direct contact of an anode metal to the 2DEG channel the resulting structure minimizes an intrinsic junction capacitance due to the very thin contact area size. The low resistance of high-mobility 2DEG channel and a low contact resistance realized by a n+GaN ohmic regrowth layer reduce a series resistance of diodes as well as access resistance of the HEMT. |
| US08946721B2 |
Structure and method for using high-K material as an etch stop layer in dual stress layer process
A method is provided that includes forming a high-k dielectric etch stop layer over at least a first conductivity type semiconductor device on a first portion of a substrate and at least a second conductivity type semiconductor device on a second portion of the semiconductor device. A first stress-inducing layer is deposited over the first conductivity type semiconductor device and the second conductivity type semiconductor device. The portion of the first stress-inducing layer that is formed over the second conductivity type semiconductor device is then removed with an etch that is selective to the high-k dielectric etch stop layer to provide an exposed surface of second portion of the substrates that includes at least the second conductivity type semiconductor device. A second stress-inducing layer is then formed over the second conductivity type semiconductor device. |
| US08946720B2 |
Organic light emitting diode display device and method of manufacturing the same
An organic light emitting diode display device and a method of manufacturing the same are disclosed. The organic light emitting diode display device includes a substrate having an emission section and a non-emission section, a semiconductor layer located on the substrate, a gate dielectric layer located over an entire front surface of the substrate, a gate electrode located in correspondence to the semiconductor layer, a dielectric layer located over the entire front surface of the substrate, source and drain electrodes and a first electrode located on the dielectric layer and electrically connected to the semiconductor layer, a pixel definition layer exposing a part of the first electrode, a spacer located on the pixel definition layer and located on the non-emission section of the substrate, an organic film layer located on the first electrode, and a second electrode located over the entire front surface of the substrate. |
| US08946716B2 |
Capacitor structure of gate driver in panel
A capacitor structure of gate driver in panel (GIP) includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a first and second transparent capacitor electrode layers. The first dielectric layer covers the first metal layer. The second metal layer is disposed on the first dielectric layer and coupled to the first metal layer. The second dielectric layer covers the second metal layer. The first transparent capacitor electrode layer is disposed on the first dielectric layer and connected to the second metal layer. The second transparent capacitor electrode layer is disposed on the second dielectric layer and coupled to the first metal layer, in which the second and first transparent capacitor electrode layers are arranged to be stacked in a thickness direction and mutually opposed across the second dielectric layer therebetween. |
| US08946715B2 |
Information device
Problems exist in areas such as image visibility, endurance of the device, precision, miniaturization, and electric power consumption in an information device having a conventional resistive film method or optical method pen input function. Both EL elements and photoelectric conversion elements are arranged in each pixel of a display device in an information device of the present invention having a pen input function. Information input is performed by the input of light to the photoelectric conversion elements in accordance with a pen that reflects light by a pen tip. An information device with a pen input function, capable of displaying a clear image without loss of brightness in the displayed image, having superior endurance, capable of being miniaturized, and having good precision can thus be obtained. |
| US08946714B2 |
Semiconductor device and electronic apparatus including multilayer insulation film
A semiconductor device includes: a transistor including an oxide semiconductor film; a first insulating film covering the oxide semiconductor film and including a first resin material; and a second insulating film including a second resin material that has polarity different from polarity of the first resin material, the second insulating film being laminated on the first insulating film. |
| US08946707B2 |
Tunneling magnetoresistance (TMR) read sensor with an integrated auxilliary ferromagnetic shield
The invention provides a tunneling magnetoresistance (TMR) read sensor with an integrated auxiliary shield comprising buffer, parallel-coupling, shielding and decoupling layers for high-resolution magnetic recording. The buffer layer, preferably formed of an amorphous ferromagnetic Co—X (where X is Hf, Y, Zr, etc.) film, creates microstructural discontinuity between a lower ferromagnetic shield and the TMR read sensor. The parallel-coupling layer, preferably formed of a polycrystalline nonmagnetic Ru film, causes parallel coupling between the buffer and shielding layers. The shielding layer, preferably formed of a polycrystalline ferromagnetic Ni—Fe film exactly identical to that used as the lower ferromagnetic shield, shields magnetic fluxes stemming from a recording medium into the lower edge of the TMR read sensor. The decoupling layer, preferably formed of another polycrystalline nonmagnetic Ru film, causes decoupling between the shielding layer and a pinning layer preferably formed of a polycrystalline antiferromagnetic Ir—Mn film. |
| US08946706B2 |
Test pattern of semiconductor device, method of manufacturing test pattern and method of testing semiconductor device by using test pattern
A test pattern of a semiconductor device includes a plurality of active regions defined in a semiconductor substrate and arranged in parallel with each other, a plurality of gate patterns formed over the plurality of active regions, a plurality of gate contacts formed over the plurality of gate patterns, first junction contacts formed over respective end portions of odd-numbered active regions among the plurality of active regions, second junction contacts formed over respective end portions of even-numbered active regions among the plurality of active regions, and a contact pad configured to couple the first junction contacts and the plurality of gate contacts. |
| US08946705B2 |
Semiconductor device
A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad. |
| US08946702B2 |
Semiconductor device
A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor. |
| US08946698B2 |
Light emitting element with layers having complementary colors for absorbing light
It is an object of the present invention to provide a light emitting element that realizes a high contrast. It is another object of the present invention to provide a light emitting device that realizes a high contrast by using the light emitting element with an excellent contrast. The light emitting element has a layer containing a light emitting substance interposed between a first electrode and a second electrode, and the layer containing the light emitting substance includes a light emitting layer, a layer containing a first organic compound, and a layer containing a second organic compound. The first electrode has a light-transmitting property, and the layer containing the first organic compound and the layer containing the second organic compound are interposed between the second electrode and the light emitting layer. Furthermore, color of the first organic compound and color of the second organic compound are complementary. |
| US08946693B2 |
Organic EL element, display device, and light-emitting device
An organic EL element comprising: an anode; a cathode; banks; a functional layer between the anode and the cathode, the functional layer including one or more sublayers including a light-emitting sublayer, the light-emitting sublayer defined by the banks and containing an organic material; and a hole injection layer between the anode and the functional layer, wherein the hole injection layer comprises tungsten oxide. An Ultraviolet Photoelectron Spectroscopy (UPS) spectrum, obtained from a UPS measurement, has a protrusion appearing near a Fermi surface and within a region corresponding to a binding energy range lower than a top of a valence band. The tungsten oxide contained in the hole injection layer satisfies a condition, determined from an X-ray Photoelectron Spectroscopy (XPS) measurement, that a ratio in a number density of atoms other than tungsten atoms and oxygen atoms to the tungsten atoms does not exceed approximately 0.83. |
| US08946690B2 |
Touch screen integrated organic light emitting display device and method for fabricating the same
Disclosed are a touch screen integrated organic light emitting display device which has a thin profile and is implemented in a flexible type and a method for fabricating the same. The touch screen integrated organic light emitting display device includes a film substrate, a first etch stopper layer and a first buffer layer sequentially formed on the film substrate, a thin film transistor array including thin film transistors formed on the first buffer layer, organic light emitting diodes connected to the thin film transistors, a passivation layer covering the thin film transistor array and the organic light emitting diodes, a touch electrode layer contacting the passivation layer, a second buffer layer and a second etch stopper layer sequentially formed on the touch electrode layer, and a polarizing plate formed on the second etch stopper layer. |
| US08946685B2 |
Method of making an organic thin film transistor
A method of forming an organic thin film transistor the method comprising: seeding a surface outside a channel region with one or more crystallization sites prior to deposition of the organic semiconductor; depositing a solution of the organic semiconductor onto the seeded surface and over the channel region whereby the organic semiconductor begins forming a crystal domain at the or each of the crystallization sites, the or each crystal domain growing from its crystallization site across the channel region in a direction determined by an advancing surface evaporation front; and applying energy to control the direction and rate of movement of the surface evaporation front thereby controlling the direction and rate of growth of the or each crystal domain across the channel region from the one or more crystallization sites outside the channel region. |
| US08946683B2 |
Medium scale carbon nanotube thin film integrated circuits on flexible plastic substrates
The present invention provides device components geometries and fabrication strategies for enhancing the electronic performance of electronic devices based on thin films of randomly oriented or partially aligned semiconducting nanotubes. In certain aspects, devices and methods of the present invention incorporate a patterned layer of randomly oriented or partially aligned carbon nanotubes, such as one or more interconnected SWNT networks, providing a semiconductor channel exhibiting improved electronic properties relative to conventional nanotubes-based electronic systems. |
| US08946681B2 |
Organic el device with color filter, and organic EL display
An organic EL device includes an organic EL emitter that emits blue light and a blue color filter through which the light emitted from the organic EL emitter passes. The blue color filter contains a coloring material selected from the group consisting of a methine dye, a copper-phthalocyanine pigment, and a mixture of a copper-phthalocyanine pigment and a dioxazine pigment. The chromaticity of the light, the light that has passed through the blue color filter after emitted from the organic EL emitter, is in the range defined by lines connecting three chromaticity coordinates (0.140, 0.080), (0.136, 0.040), and (0.118, 0.070) on the CIE chromaticity diagram. |
| US08946680B2 |
TFET with nanowire source
A tunnel field effect transistor (TFET) includes a source region, the source region comprising a first portion of a nanowire; a channel region, the channel region comprising a second portion of the nanowire; a drain region, the drain region comprising a portion of a silicon pad, the silicon pad being located adjacent to the channel region; and a gate configured such that the gate surrounds the channel region and at least a portion of the source region. |
| US08946677B2 |
Semiconductor light emitting device and method of manufacturing the same
Provided are a semiconductor light emitting device and a method of manufacturing the same. The semiconductor light emitting device comprises a first conductive type semiconductor layer, an active layer, a first thin insulating layer, and a second conductive type semiconductor layer. The active layer is formed on the first conductive type semiconductor layer. The first thin insulating layer is formed on the active layer. The second conductive type semiconductor layer is formed on the thin insulating layer. |
| US08946671B2 |
Mask read only memory containing diodes and method of manufacturing the same
A mask read only memory containing diodes and method of manufacturing the same. The mask read only memory is a high-density three dimensional array formed by stacking a plurality of diode layers and the logic “0” or “1” is defined by whether there is a dielectric layer on the diode. |
| US08946669B1 |
Resistive memory device and fabrication methods
A method for forming a resistive memory device includes providing a substrate comprising a first metal material, forming a conductive silicon-bearing layer on top of the first metal material, wherein the conductive silicon-bearing layer comprises an upper region and a lower region, and wherein the lower region is adjacent to the first metal material, forming an amorphous layer from the upper region of the conductive silicon-bearing layer, and disposing an active metal material above the amorphous layer. |
| US08946668B2 |
Semiconductor device and method of manufacturing the same
Disclosed is a semiconductor device including a resistive change element between a first wiring and a second wiring, which are arranged in a vertical direction so as to be adjacent to each other, with an interlayer insulation film being interposed on a semiconductor substrate. The resistive change element includes a lower electrode, a resistive change element film made of a metal oxide and an upper electrode. Since the upper electrode on the resistive change element film is formed as part of a plug for the second wiring, a structure in which a side surface of the upper electrode is not in direct contact with the side surface of the metal oxide or the lower electrode is provided so that it is possible to realize excellent device characteristics, even when a byproduct is adhered to the side wall of the metal oxide or the lower electrode in the etching thereof. |
| US08946663B2 |
Soft error resistant circuitry
An assembly includes an integrated circuit, a film layer disposed over the integrated circuit and having a thickness of at least 50 microns, and a thermal neutron absorber layer comprising at least 0.5% thermal neutron absorber. The thermal neutron absorber layer can be a glass layer or can include a molding compound. |
| US08946662B2 |
Excimer light source
A light source, with electrodes of alternating polarity attached to a substrate in an excimer ultraviolet (UV) lamp, for generating a plasma discharge between each of the electrodes. The shape of the substrate can shape and control the plasma discharge to reduce exposure of materials susceptible to attack by the halogens. The electrodes can be located such that the plasma discharge occurs in a region where it produces less contact of the halogens with the vulnerable areas of the lamp enclosure. The materials, such as the electrodes, substrate, and envelope, can be selected to withstand corrosive materials. In another embodiment, a plurality of sealed tubes, at least some of which contain an excimer gas are positioned between two electrodes. |
| US08946661B2 |
Radiation source, lithographic apparatus and device manufacturing method
A radiation source is configured to produce extreme ultraviolet radiation. The radiation source includes a chamber in which, in use, a plasma is generated, and an evaporation surface configured to evaporate a material formed as a by-product from the plasma and that is emitted to the evaporation surface. A method for removing a by-product material in or from a plasma radiation source of a lithographic apparatus includes evaporating a material which, in use, is emitted to that surface from the plasma. |
| US08946654B2 |
Method and apparatus for reading out image information stored in a storage phosphor of a storage medium
A method for reading out image information stored in a storage phosphor of a storage medium includes moving a light beam over the storage medium. A luminescence signal is generated by the photostimulation of the storage phosphor. In first time intervals a respective output value is determined from the luminescence signal, and a respective pixel value of an image pixel of a digital image is determined from the output value. The output value is thereby determined by addition of a plurality of measurement values of the luminescence signal which are detected in second time intervals lying within the first time interval. A corresponding apparatus for carrying out the method is described as well. |
| US08946650B2 |
Particle beam device and method for analyzing and/or treating an object
A particle beam device and a method for analyzing and/or treating an object is disclosed. According to the described system, the position of a crossover on an optical axis of a particle beam device can be freely adjusted, even in the case of a fixed extractor potential and a fixed high voltage. The particle beam device has a first electrode unit with three electrode apparatuses, a second electrode unit with three electrode apparatuses, and an acceleration unit. The method according to the system described herein uses the particle beam device. |
| US08946649B2 |
Charged particle beam device having an energy filter
Provided is a charged particle beam device to improve energy solution of its energy filter. In one embodiment, a charged particle beam device includes a deflector to deflect charged particles emitted from a sample to an energy filter, and a change in brightness value with the change of voltage applied to the energy filter is found for each of a plurality of deflection conditions for the deflector, and a deflection condition such that a change in the brightness value satisfies a predetermined condition is set as the deflection condition for the deflector. |
| US08946646B2 |
System, method, and apparatus for detecting neutrons
A neutron detector is disclosed that includes a generally elongate sealed housing. A scintillator based neutron detection assembly is positioned within the elongate housing. The scintillator based neutron detection assembly includes a reflective portion, a plurality of optical fibers, and a scintillator portion. A fiber guide is connected with an end of said scintillator based neutron detection assembly and an end of the at least one bundle of fibers from the plurality of optical fibers is positioned in an output port in the fiber guide. A sensor assembly is included and is connected with the end of the bundle of fibers. An output connector is located on a front end of the generally elongate sealed housing for transmitting an output voltage in response to a neutron event. |
| US08946644B2 |
Radiation detector, method of manufacturing radiation detector, and radiographic image capturing apparatus incorporating radiation detector
A radiographic image capturing apparatus includes a housing and a radiation detector accommodated in the housing. The radiation detector includes a scintillator for converting radiation into visible light and photodiodes for converting the visible light into electric charges. If it is assumed that a temperature-dependent rate of change in sensitivity of the scintillator with respect to the radiation is represented by A [%/K] and a temperature-dependent rate of change in sensitivity of the photodiodes with respect to visible light is represented by B [%/K], a scintillator and photodiodes are selected having temperature-dependent rates of change A and B that satisfy the following inequality (1): −0.35 [%/K] |
| US08946641B2 |
Method for identifying materials using dielectric properties through active millimeter wave illumination
Described herein is a method by which active millimeter wave radiation may be used to detect and identify the composition of concealed metallic, concealed non-metallic, concealed opaque or concealed semi-transparent materials based on their optical properties. By actively radiating a semi-transparent target anomaly with multiple millimeter wave radiation frequencies, the dielectric properties of the target anomaly can be identified. The dielectric properties of the target anomaly may then be compared to a library of dielectric properties attributed to semi-transparent materials of interest. This method will allow active millimeter wave radiation technology to identify the likely composition of targeted semi-transparent materials through absorption and illumination measurements attributed to the dielectric properties of the targeted composition. |
| US08946640B2 |
Unit cells with avalanche photodiode detectors
Various techniques are disclosed for providing reference signals to image detectors in accordance with one or more embodiments of the invention. For example, in one or more embodiments, switched capacitors may be used to provide bias voltages to individual unit cells of a focal plane array such that the bias voltages are held by the unit cells over one or more integration periods while the unit cells are decoupled from an input line. As a result, the bias voltages may be free from noise incident on the input line and thus may more accurately bias the individual unit cells. |
| US08946638B2 |
Subpixel resolution by interpolation of crosstalk from adjacent pixels
A pixel interconnect circuit that can be added to a focal plane array to enable subpixel location capability (subpixel sensing) for an imaged point source, facilitating very high frame rate operation. The pixel interconnect is typically added as a circuit component within the readout integrated circuit. The interconnect function can be turned on or off flexibly. It allows very low pixel count arrays, such as 128×128 pixels, to achieve the positional accuracy of multi-megapixel arrays. In turn, these small arrays can be clocked at very fast frame rates for enhanced threat and fast event detection. Existing systems can be upgraded by adding the pixel interconnect, which will greatly improve tracking and position accuracy without increasing data processing requirements. By modifying the focal plane while leaving other components unchanged, the pixel interconnect provides an economical upgrade for threat warning and tactical sensor systems. |
| US08946636B2 |
Method and apparatus for generating an infrared illumination beam with a variable illumination pattern
A method for generating an infrared (IR) beam for illuminating a scene to be imaged comprises providing at least two IR emitters, including a first IR emitter operable to emit a wide beam component of the IR beam, and a second IR emitter operable to emit a narrow beam component of the IR beam, wherein the wide beam component has a linear profile that has a lower standard deviation than a linear profile of the narrow beam component. The method also comprises selecting a desired linear profile for the IR beam, and selecting a power ratio of power directed to the first IR emitter and power directed to the second IR emitter that produces the IR beam with the desired linear profile when the narrow beam component and wide beam component are combined; and directing power to the first and second IR emitters at the selected power ratio to generate the wide and narrow beam components, and combining the generated wide and narrow beam components to produce the IR beam. |
| US08946634B2 |
Radiographic image capture device
A radiographic image capture device of the present invention includes: a radiation detection panel including a photoelectric conversion element that converts radiation into an electrical signal; a signal processing board that is disposed facing towards the radiation detection panel and that performs signal processing on electrical signals obtained by the radiation detection panel; a flexible substrate that includes wiring lines disposed on a base film provided between the radiation detection panel and the signal processing board and including a low wiring density region and a high wiring density region, and electronic component(s) that are electrically connected to the wiring lines; a reinforcement member that is provided at a low wiring density region and that raises the mechanical strength of the wiring lines. |
| US08946633B2 |
Terahertz wave detection device, terahertz wavelength filter, imaging device, and measurement device
A terahertz wave detection device includes a wavelength filter transmitting terahertz waves having a predetermined wavelength, and a detection portion detecting the terahertz waves having the predetermined wavelength that have passed through the wavelength filter by converting the terahertz waves into heat, wherein the wavelength filter includes a metal layer having a plurality of holes communicating with an incident surface onto which the terahertz waves are incident and an emission surface from which the terahertz waves having the predetermined wavelength are emitted, and a dielectric portion filling in the plurality of holes and made of a dielectric, wherein the plurality of holes are formed with a predetermined pitch along a direction that is perpendicular to a normal line of the incident surface. |
| US08946630B2 |
Automatic filtering of SEM images
A method, system, and computer program product to automatically evaluate a scanning electron microscope (SEM) image are described. The method includes obtaining a source image and the SEM image taken of the source image. The method also includes evaluating the SEM image based on comparing source contours extracted from the source image and SEM contours extracted from the SEM image to determine whether the SEM image passes or fails. |
| US08946621B2 |
Side cured light-transmissive display system
An invisible, light-transmissive display system with a light resistant material is provided. The light resistant material has a first side and a second side. Substantially invisible holes penetrate between the first surface and the second surface in a predetermined light-transmissive display pattern. The second surface is exposed to a side curing light that is substantially parallel to the second surface at the invisible holes thereadjacent. A light-conducting curable filler is applied into the invisible holes from the first surface. Surfaces of the light-conducting curable filler are cured in the invisible holes at the second surface with the side curing light. The remaining curable filler in the invisible holes is cured. |
| US08946620B2 |
Proximity sensor device with internal channeling section
A proximity sensor device, which may detect the presence of external objects at close proximity is disclosed. The proximity sensor device may comprise an emitter, a detector, a separation wall and an internal channeling section. In one embodiment, the internal channeling section may be configured to direct light from the emitter to the detector when the external object is present at close proximity. In other embodiments, a proximity sensor assembly, an optical structure and an electronic device having similar internal channeling section are disclosed. |
| US08946618B2 |
System for detecting one or more predetermined optically derivable characteristics of a sample
A field use optical grain characterizing system (101) includes a generally rectangular prismatic composite body (102) that defines a component cavity (103). A substantially vertical elongate channel (104) extends within cavity (103) for housing a grain sample (not shown). An electromagnetic radiation source, in the form of a 12 Volt halogen lamp (105), is disposed within cavity (103.) for directing NIR light into channel (104). An optical detection system (107) is disposed within cavity (103) for sensing selected light emerging from channel (104) and for providing a sensor signal. A processor, which is included within detection system (107), is also disposed within cavity (103) and is responsive to the sensor signal for providing data indicative of a characteristic parameter of the grain sample. A display device, in the form of a 5.7-inch touch screen LCD display (108), is connected with body (102) for selectively presenting the data. |
| US08946614B2 |
Image sensor with wide dynamic range and method of operating the same including one or more first and second column groups of pixels alternatively arranged
An image sensor in accordance with an embodiment of the present invention includes a pixel array configured to include a plurality of pixels corresponding to a plurality of rows and a plurality of columns that include one or more first column groups and one or more second column groups and are disposed in a direction crossing the plurality of rows and a data sampling unit configured to sample pixel data of a first column group of a first row and to sample pixel data of a second column group of a second row, wherein the first column group and the second column group are alternatively arranged. |
| US08946612B2 |
Image sensor with controllable vertically integrated photodetectors
An image sensor includes front-side and backside photodetectors of a first conductivity type disposed in a substrate layer of the first conductivity type. A front-side pinning layer of a second conductivity type is connected to a first contact. The first contact receives a predetermined potential. A backside pinning layer of the second conductivity type is connected to a second contact. The second contact receives an adjustable and programmable potential. |
| US08946603B2 |
Drain/fill fitting
An aircraft drain/fill fitting includes a housing adapted for being fitted into an opening between an aircraft interior and an aircraft exterior. The housing has an interior housing segment fluidly coaxially communicating with an exterior housing segment to define a liquid flow path therethrough, and a heater for applying heat to the interior housing segment. A hollow insert element is positioned in the interior housing segment in heat transfer contact with an inner wall of the interior housing segment. An elongate heat transfer probe is positioned in heat transfer contact with the hollow insert element and extends into the exterior housing segment to reduce the incidence of freezing of liquid in the exterior housing segment. |
| US08946601B2 |
Exposed structure heating apparatus and methods of making and use
An apparatus for heating structure or areas adjacent such structure, such as a roof on a building for example, exposed to varying weather conditions and methods of making and use of the apparatus. The heating apparatus can include a heating element and heat supplying components. In one embodiment, the heating apparatus also includes a heatable cover panel and fasteners or other fastening components or materials for securing the heating element and cover panel to the structure. The heat supplying components may include one or more heater cable or heater cable sections penetrating one or more heater cable channels in the heating element. The apparatus may also utilize various insulating and other materials, including paint on exposed surfaces of the apparatus. |
| US08946597B2 |
Method for obtaining a heated glazing
The subject of the invention is a method of obtaining a heated window, comprising depositing a continuous thin film of a transparent electronically conductive oxide, having a sheet resistance that is uniform over the entire area of the film, on a glass sheet; and subjecting the thin film to a plasma treatment in which a device that emits excited species of an oxygen plasma is placed facing a region of the thin film, and then a relative movement is created between the thin film and the device in order to treat differentially the various regions of the thin film, so that after the thin film has been treated it has regions with different sheet resistances. |
| US08946593B2 |
Laser patterning process
In a laser irradiation device, a patterning method and a method of fabricating an Organic Light Emitting Display (OLED) using the same. The laser irradiation device includes a light source, a mask, a projection lens, and a Fresnel lens formed at a predetermined portion of the mask to change an optical path. When an organic layer pattern is formed using the laser irradiation device, laser radiation is irradiated onto a region of an organic layer, which is to be cut, and the laser radiation is appropriately irradiated onto a region of the organic layer, which is to be separated from a donor substrate. The laser radiation irradiated onto an edge of the organic layer pattern has a laser energy density greater than that of the laser radiation irradiated onto other portions of the organic layer pattern. As a result, it is possible to form a uniform organic layer pattern and reduce damage of the organic layer. |
| US08946592B2 |
Laser processing method and laser processing apparatus
A laser beam machining method and a laser beam machining device capable of cutting a work without producing a fusing and a cracking out of a predetermined cutting line on the surface of the work, wherein a pulse laser beam is radiated on the predetermined cutting line on the surface of the work to cause multiple photon absorption and with a condensed point located inside of the work, and a modified area is formed inside the work along the predetermined determined cutting line by moving the condensed point along the predetermined cut line, whereby the work is cut with a small force by cracking the work along the predetermined cutting line starting from the modified area and, because the pulse laser beam is hardly absorbed onto the surface. |
| US08946591B2 |
Method of manufacturing a semiconductor device formed using a substrate cutting method
A laser beam machining method and a laser beam machining device capable of cutting a work without producing a fusing and a cracking out of a predetermined cutting line on the surface of the work, wherein a pulse laser beam is radiated on the predetermined cutting line on the surface of the work to cause multiple photon absorption and with a condensed point located inside of the work, and a modified area is formed inside the work along the predetermined determined cutting line by moving the condensed point along the predetermined cut line, whereby the work is cut with a small force by cracking the work along the predetermined cutting line starting from the modified area and, because the pulse laser beam is hardly absorbed onto the surface. |
| US08946587B2 |
Laser machining apparatus
A laser machining apparatus is provided with: a workpiece support unit; a machining head; and a machining head moving unit. The workpiece support unit includes: an end support part that supports a width end of a workpiece; and an inside support part that supports an inside portion of the workpiece in a width direction. The end support part is movable in a longitudinal direction independently from the inside support part in response to a movement of the machining head. |
| US08946586B2 |
Device and method for laser processing
A device for laser processing, in which the device includes: a laser including a resonator, the resonator being configured to generate a laser beam with a predetermined caustic during operation of the device; and an optical element to transform a laser beam generated by the resonator into a transformed laser beam having an annular intensity distribution in a plane perpendicular to a propagation direction of the transformed laser beam during operation of the device, in which the annular intensity distribution extends along the propagation direction of the transformed laser beam, and has, at a minimum diameter of a caustic of the transformed laser beam, a beam radius and a ring width corresponding to 50% of a maximum beam intensity in a radial direction of the transformed laser beam, and a ratio of the ring width to the beam radius is less than 0.6. |
| US08946580B2 |
Contact bridge with blow magnets
The present invention relates to contactors for unidirectional DC operation with permanent magnetic arc extinguishing. In addition to the blow magnets, the contactors are equipped with compensatory permanent magnets for compensating the magnetic field in the vicinity of the contact bridge in order to prevent contact levitation, i.e., an uncontrolled opening of the contacts that is due to a magnetic force generated by a strong current flowing through the contact bridge. To this end, the compensatory permanent magnets are arranged in the vicinity of the contact bridge and polarized in the opposite direction of the blow magnets. The magnetic field of the compensatory magnets and the current flowing through the contact bridge are generating a magnetic force that acts on the contact bridge and tends to keep the electrical contacts closed. |
| US08946576B2 |
Quiet electromechanical switch device
The present invention is directed to a switch device that includes a first switch portion that is configured to rotate a first angular amount in a first direction about a first fixed axis of rotation and has a first pivot arm length. The first and second switch are coupled to the interface portion. The second switch portion rotates a second angular amount in a second direction and has a second pivot arm length. The second angular amount is greater than the first angular amount and a function of the first pivot arm length and the second pivot arm length. A set of switch contacts includes at least one fixed contact and a movable contact separated by a predetermined minimum distance that is a function of the first pivot arm length and the second pivot arm length. |
| US08946574B2 |
Two-layer sensor stack
In one embodiment, an method apparatus includes an optically clear adhesive (OCA) layer between a cover sheet and a substrate. The substrate has drive or sense electrodes of a touch sensor disposed on a first surface and a second surface of the substrate. The first surface is opposite the second surface and the drive or sense electrodes are made of a conductive mesh of conductive material including metal. |
| US08946573B2 |
Key assembly, rotary input device using the key assembly, and electronic device using the rotary input device
A key assembly including a base; a central button portion disposed on the base to move between a remote position and an adjacent position with respect to the base, and including a protrusion that protrudes outward along an edge of the central button portion; and a rotary button portion combined with the base, including a hole for externally exposing at least a portion of a side of the central button portion, rotatably disposed on outer side of the central button portion, and including a suppressing portion that is formed on an inner side of the hole to correspond to the protrusion to suppress movement of the central button portion in a direction away from the base. A rotary input device including the key assembly, and an electronic device including the rotary input device. |
| US08946571B2 |
Digital multimeter having improved rotary switch assembly
A multimeter includes a case having a rotary selector knob for selecting a multimeter function. A circuit board defining multiple switching terminals thereon is located in the case. A rotary switch assembly is operatively coupled to the selector knob. The rotary switch assembly has a plurality of contact pairs which selectively complete a galvanic connection across predetermined pairs of switching terminals. The rotary switch assembly further includes first and second switch members located in opposition on respective sides of the circuit board. Each of the switch members has at least one of the contact pair. |
| US08946569B2 |
Multi-directional button assembly and electronic device
A multi-directional button assembly includes a first switch, a second switch, a support piece, a pressing slice, a center button body, and a directional button body. The first switch and the second switch respectively provide a first trigger point and a second trigger point to be pressed to generate a first trigger signal and a second trigger signal. The support piece is disposed above the first switch and includes an aperture corresponding to the first trigger point. The pressing slice extends from the support piece to a position above the second switch. The center button body includes an extension post and is pressed for driving the extension post to press the first trigger point via the aperture. The directional button body is disposed above the pressing slice and is pressed to bias the pressing slice to press the second trigger point without pressing the first trigger point. |
| US08946566B2 |
Heterogeneous encapsulation
An improved method for producing a PCB assembly requiring at least two different encapsulants is disclosed. The PCB assembly may have two or more separate regions in which electronic devices are attached. In each region, a unique encapsulant with different mechanical, electrical, physical and or chemical properties is used according to the particular requirements of the electronic devices in that region. |
| US08946562B2 |
Printed circuit boards including strip-line circuitry and methods of manufacturing same
A printed circuit board includes a first layer stack and a second layer stack coupled to the first layer stack. The first layer stack includes a first electrically-insulating layer, a first electrically-conductive layer, and a cut-out area defining a void that extends therethrough. The first electrically-insulating layer includes a first surface and an opposite second surface. The first electrically-conductive layer is disposed on the first surface of the first electrically-insulating layer. The second layer stack includes a second electrically-insulating layer. The second electrically-insulating layer includes a first surface and an opposite second surface. One or more electrically-conductive traces are disposed on the first surface of the second electrically-insulating layer. The printed circuit board further includes a device at least partially disposed within the cut-out area. The device is electrically-coupled to one or more of the one or more electrically-conductive traces disposed on the first surface of the second electrically-insulating layer. |
| US08946561B2 |
Flexible circuitry with heat and pressure spreading layers
A flexible printed circuit may be provided with an integrated heat and pressure spreading layer. The heat and pressure spreading layer may be configured to uniformly spread heat and pressure from a bonding tool across a portion of the flexible printed circuit during bonding of the flexible printed circuit to additional circuitry. During manufacturing of the flexible printed circuit, a sheet of heat and pressure spreading material may be attached to a sheet of flexible printed circuitry and the heat and pressure spreading material and the sheet of flexible printed circuitry may be die cut to form multiple flexible printed circuits each with a heat and pressure spreading layer. An electronic device may be provided with a flexible printed circuit with a heat and pressure spreading layer coupled to a component such as a display. |
| US08946560B2 |
Electric wire and coil
A electric wire includes a central conductor 1 made of aluminum or an aluminum alloy, a cover layer 2 made of copper and covering the central conductor 1, and a ferromagnetic layer 3 covering the cover layer 2 and blocking the external magnetic field. The thickness of the ferromagnetic layer 3 is in a range from 0.04 μm to 14 μm, the total diameter of the central conductor 1 and the cover layer 2 is in a range from 0.05 mm to 0.4 mm, and the cross-sectional area of the central conductor 1 is in a range from 85% to 95% of the total cross-sectional area of the central conductor 1 and the cover layer 2. |
| US08946559B2 |
Insulation-coated electric conductor
A multilayer insulation-coated electric conductor for a coil constituting a circuit by forming a welded portion in the coil, wherein at least one layer of the multilayer insulation-coating layers of the coated metal conductor is composed of at least one resin selected from the group consisting of a polyimide resin, a polyesterimide resin, and an H-class polyester resin. |
| US08946553B2 |
Shield wire, method for processing terminal treatment of braid of the same and apparatus for processing terminal treatment of braid of that
A shield wire including a cylindrical braid defining a central passage, the cylindrical braid having an end portion folded into the central passage against itself to form an overlap portion. An electric wire extends through the central passage with an inner ring between the electric wire and the overlap portion. An outer ring surrounds the overlap portion and clamps to the inner ring to secure the overlap portion therebetween. |
| US08946548B2 |
Nautilus self pressurizing equipment enclosure system, apparatus and methods
The present invention relates to prohibiting water ingress in enclosures designed to protect electronics or other stored objects from damage that would occur if the protected stored objects were submerged in water or other liquids. More particularly the present invention, a water ingress prevention enclosure eliminates the need for watertight doors and other sealing gaskets by utilizing an opening in the lowest portion of the enclosure to allow rising water to pressurize the ambient gas trapped in the enclosure thus forming a pressurized chamber to which liquid cannot rise. Embodiments of the invention include a system, apparatus, method and computer implemented code to enable monitoring and storage of one or more stored objects in a liquid-free environment. |
| US08946547B2 |
Backplane reinforcement and interconnects for solar cells
Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects. |
| US08946545B2 |
Photovoltaic device including flexible substrate or inflexible substrate and method for manufacturing the same
Disclosed is a photovoltaic device. The photovoltaic device includes: a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode. |
| US08946544B2 |
Photovoltaic devices including cover elements, and photovoltaic systems, arrays, roofs and methods using them
The present invention provides a photovoltaic device having an active face, an active area on the active face and an operating wavelength range; and a cover element attached to the photovoltaic device and disposed over the active area of the active face of the photovoltaic element, the cover element having an opacity of at least about 25%. The present invention also provides photovoltaic systems, arrays, roofs and methods using such photovoltaic devices. In one embodiment of the invention, the photovoltaic device is a photovoltaic roofing element in which a photovoltaic element is integrated with a roofing substrate. |
| US08946541B2 |
Device and method for solar power generation
A photovoltaic device comprising an array of elongate reflector elements mounted substantially parallel to one another and transversely spaced in series, at least one of the reflector elements having an elongate concave reflective surface to reflect incident solar radiation towards a forward adjacent reflector element in the array. The at least one reflector element includes a photovoltaic receptor mounted on the reflector element by a mounting arrangement to receive reflected solar radiation from a rearward adjacent reflector element. The reflector element also includes a heat sink in heat transfer relationship with the photovoltaic receptor, thermally isolating the photovoltaic receptor, at least partially, from the reflector element. |
| US08946537B2 |
Electromagnetic transducer for stringed instrument
Devices and methods for transducing vibrations of a ferromagnetic string in a musical stringed instrument are provided. Specifically, including those for modulating the timbre of a stringed musical instrument with an electromagnetic pickup independent of loudness, sensitivity and dynamic range. |
| US08946534B2 |
Accompaniment data generating apparatus
An accompaniment data generating apparatus has a storage device 15 for storing a set of phrase waveform data having a plurality of constituent notes which form a chord, and a CPU 9. The CPU 9 carries out a process for separating the set of phrase waveform data having a plurality of constituent notes which form a chord into a plurality of sets of phrase waveform data each having different one of the chord constituent notes, an obtaining process for obtaining chord information by which a chord type and a chord root are identified, and a chord note phrase generating process for pitch-shifting one or more of the separated phrase waveform data sets in accordance with chord type and combining the separated phrase waveform data sets including the pitch-shifted phrase waveform data to generate waveform data indicative of a chord note phrase as accompaniment data. |
| US08946533B2 |
Musical performance training device, musical performance training method and storage medium
In the present invention, a CPU acquires an achievement level based on the difficulty level of a song by evaluating the playing skills of the user based on a comparison of a plurality musical notation data expressing each note composing the song and music playing data generated in response to the song being played and inputted by the user; updates state variables (achievement level rank “achieve” and achievement level rank change “change”) in a value function table “value” based on the acquired achievement level; and gives advice of a type specified by the most effective (maximum value) advice type “action” retrieved from the value function table “value” [achieve][change][action] based on the updated state variables to the user playing and inputting the song. |
| US08946532B2 |
Musical instrument protection
A protective apron that protects a soft-metal musical instrument, where in the apron may have one, two, or more layers. The outer layer prevents the soft-metal musical instrument from being scratched, dented, or tarnished while said instrument is being played. An inner layer may be used to inhibit moisture from the player from reaching the soft-metal musical instrument. |
| US08946527B2 |
Variety corn line FF6788
The present invention provides an inbred corn line designated FF6788, methods for producing a corn plant by crossing plants of the inbred line FF6788 with plants of another corn plant. The invention further encompasses all parts of inbred corn line FF6788, including culturable cells. Additionally provided herein are methods for introducing transgenes into inbred corn line FF6788, and plants produced according to these methods. |
| US08946524B2 |
Tomato line FDS 15-2118
The invention provides seed and plants of tomato line FDS 15-2118. The invention thus relates to the plants, seeds and tissue cultures of tomato line FDS 15-2118, and to methods for producing a tomato plant produced by crossing such plants with themselves or with another tomato plant, such as a plant of another genotype. The invention further relates to seeds and plants produced by such crossing. The invention further relates to parts of such plants, including the fruit and gametes of such plants. |
| US08946523B2 |
Soybean variety XB31AG13
A novel soybean variety, designated XB31AG13 is provided. Also provided are the seeds of soybean variety XB31AG13, cells from soybean variety XB31AG13, plants of soybean XB31AG13, and plant parts of soybean variety XB31AG13. Methods provided include producing a soybean plant by crossing soybean variety XB31AG13 with another soybean plant, methods for introgressing a transgenic trait, a mutant trait, and/or a native trait into soybean variety XB31AG13, methods for producing other soybean varieties or plant parts derived from soybean variety XB31AG13, and methods of characterizing soybean variety XB31AG13. Soybean seed, cells, plants, germplasm, breeding lines, varieties, and plant parts produced by these methods and/or derived from soybean variety XB31AG13 are further provided. |
| US08946520B1 |
Soybean variety XBP27010
A novel soybean variety, designated XBP27010 is provided. Also provided are the seeds of soybean variety XBP27010, cells from soybean variety XBP27010, plants of soybean XBP27010, and plant parts of soybean variety XBP27010. Methods provided include producing a soybean plant by crossing soybean variety XBP27010 with another soybean plant, methods for introgressing a transgenic trait, a mutant trait, and/or a native trait into soybean variety XBP27010, methods for producing other soybean varieties or plant parts derived from soybean variety XBP27010, and methods of characterizing soybean variety XBP27010. Soybean seed, cells, plants, germplasm, breeding lines, varieties, and plant parts produced by these methods and/or derived from soybean variety XBP27010 are further provided. |
| US08946517B1 |
Soybean variety XBP49013
A novel soybean variety, designated XBP49013 is provided. Also provided are the seeds of soybean variety XBP49013, cells from soybean variety XBP49013, plants of soybean XBP49013, and plant parts of soybean variety XBP49013. Methods provided include producing a soybean plant by crossing soybean variety XBP49013 with another soybean plant, methods for introgressing a transgenic trait, a mutant trait, and/or a native trait into soybean variety XBP49013, methods for producing other soybean varieties or plant parts derived from soybean variety XBP49013, and methods of characterizing soybean variety XBP49013. Soybean seed, cells, plants, germplasm, breeding lines, varieties, and plant parts produced by these methods and/or derived from soybean variety XBP49013 are further provided. |
| US08946516B2 |
Soybean variety A1037473
The invention relates to the soybean variety designated A1037473. Provided by the invention are the seeds, plants and derivatives of the soybean variety A1037473. Also provided by the invention are tissue cultures of the soybean variety A1037473 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety A1037473 with itself or another soybean variety and plants produced by such methods. |
| US08946515B2 |
Broccoli line BRM-53-5943SI
The invention provides seed and plants of broccoli hybrid RX 05990035 and the parent lines thereof. The invention thus relates to the plants, seeds and tissue cultures of broccoli hybrid RX 05990035 and the parent lines thereof, and to methods for producing a broccoli plant produced by crossing such plants with themselves or with another broccoli plant, such as a plant of another genotype. The invention further relates to seeds and plants produced by such crossing. The invention further relates to parts of such plants. |
| US08946508B1 |
Maize hybrid X05C050
A novel maize variety designated X050050 and seed, plants and plant parts thereof, produced by crossing Pioneer Hi-Bred International, Inc. proprietary inbred maize varieties. Methods for producing a maize plant that comprises crossing hybrid maize variety X050050 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into X050050 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. This invention relates to the maize variety X050050, the seed, the plant produced from the seed, and variants, mutants, and minor modifications of maize variety X050050. This invention further relates to methods for producing maize varieties derived from maize variety X050050. |
| US08946498B2 |
Apparatus and method for the granulation of radioactive waste, and vitrification method thereof
An apparatus and method for the granulation of radioactive waste in which a preprocessing method for the vitrification of radioactive waste is simplified to conform to onsite conditions of a nuclear power plant, additives are improved, and pellets suitable for vitrification are manufactured. The apparatus for the granulation of radioactive waste includes: a body frame having an inlet and an outlet; a hopper supplying the radioactive waste to be transferred and fed through the inlet; a feeder transferring/supplying the radioactive waste supplied to a specific position and in a certain quantity; a stirrer pulverizing/mixing lumps of the radioactive waste supplied; an additive supply part supplying a lubricant to the radioactive waste fed into the stirrer; and a pellet press pressing the radioactive waste fed through the feeder into a pellet shape and discharging the pellet through the outlet. |
| US08946495B2 |
Process for alkylation of toluene to form styrene and ethylbenzene
A process is disclosed for making styrene and/or ethylbenzene by reacting toluene with a C1 source over a catalyst in at least one radial reactor to form a product stream comprising styrene and/or ethylbenzene. |
| US08946494B2 |
Method for processing biomass
A method for processing biomass to produce biofuel includes decomposing lignocellulosic material into byproduct polymers that include lignin, decomposing the lignin into targeted chemical fragments, and chemically converting the targeted chemical fragments into a biofuel. |
| US08946487B2 |
Process for preparing divinyl ethers
Process for preparing divinyl ethers by reacting compounds having two hydroxyl groups (hereinafter referred to as diols) with acetylene, wherein the hydroxyl groups are incompletely reacted with acetylene and the resulting product mixture therefore comprises the monovinyl ether in addition to the divinyl ether and the monovinyl ether is separated off from the product mixture by extractive distillation in the presence of an extractant. |
| US08946483B2 |
Precursor compounds and methods for making same
The present invention relates to a method of obtaining radiopharmaceutical precursors, and in particular precursors to protected amino acid derivatives, which are used as precursors for production of radiolabelled amino acids for use in in vivo imaging procedures, such as positron emission tomography (PET). |
| US08946482B2 |
Salts of rasagiline and pharmaceutical preparations thereof
The present invention relates to salts of rasagiline and pharmaceutical preparations thereof. The invention further provides a method of preparing the salts of rasagiline. |
| US08946481B2 |
Process for preparing biaryl substituted 4-amino butyric acid or derivatives thereof and their use in the production of NEP inhibitors
The invention relates to a process for producing a compound according to formula (i) or salt thereof, wherein R1 and R1′ are independently hydrogen or an amine protecting group and R2 is a carboxyl group or an ester group, comprising reacting a compound according to formula (ii) or salt thereof, wherein R1, R1′ and R2 are defined as above, with hydrogen in the presence of a transition metal catalyst and a chiral ligand, wherein the transition metal is selected from group 7, 8 or 9 of the periodic table. Furthermore, the invention relates to products obtainable by said process and to their use in the production of NEP inhibitors. Moreover, the invention relates to the use of transition metal catalyst in the preparation of NEP inhibitors or prodrugs thereof. |
| US08946480B2 |
Liquid crystalline compound and electrolyte material
A liquid crystalline compound and an electrolyte material in which the conductivity switches between ion conductivity and non-ion conductivity depending on changes in temperature, and thus a switching function can be obtained are proposed. The liquid crystalline compound has a columnar liquid crystal phase in which an ammonium group is linked with an alkoxyphenyl group. A structural change thereof occurs depending on changes in temperature, and the conductivity switches between ion-conducting and non-ion-conducting, and thus the switching function can be obtained. |
| US08946478B2 |
Benzamide derivative with anticancer activity and preparation method and use thereof
Provided are a benzamide derivative as shown in formula (I) or a pharmaceutically acceptable salt thereof, and the preparation method and use thereof for preparing a medicine for treating cancer, wherein the group definitions of formula (I) are as set out in the description. |
| US08946473B2 |
Methods of making L-ornithine phenyl acetate
Disclosed herein are processes for making L-ornithine phenyl acetate. The process may include, for example, inter-mixing a halide salt of L-ornithine with silver phenyl acetate. The process may also include forming a phenyl acetate salt in situ. The present application also relates to various compositions obtained from these processes, including crystalline forms. |
| US08946472B2 |
Bio-based terephthalate polyesters
Bio-based terephthalic acid (bio-TPA), bio-based dimethyl terephthalate (bio-DMT), and bio-based polyesters, which are produced from a biomass containing a terpene or terpenoid, such as limonene are described, as well as the process of making these products. The bio-based polyesters include poly(alkylene terephthalate)s such as bio-based poly(ethylene terephthalate) (bio-PET), bio-based poly(trimethylene terephthalate) (bio-PTT), bio-based poly(butylene terephthalate) (bio-PBT), and bio-based poly(cyclohexylene dimethyl terephthalate) (bio-PCT). |
| US08946471B2 |
Process for oxidizing an alkyl-aromatic compound
Processes for oxidizing an alkyl-aromatic compound are described. The processes include contacting an alkyl-aromatic compound, a solvent, a bromine source, a catalyst, and an oxidizing agent to produce a product comprising at least one of an aromatic alcohol, an aromatic aldehyde, an aromatic ketone, and an aromatic carboxylic acid. The composition of the solvent is controlled to reduce the impurities in the product. |
| US08946466B2 |
Method for producing polyether carbonate polyols
The present invention relates to a process for the preparation of polyether carbonate polyols from one or more H-functional starter substances, one or more alkylene oxides and carbon dioxide in the presence of at least one double metal cyanide catalyst, wherein the cyanide-free metal salt, the metal cyanide salt or both the mentioned salts used for the preparation of the double metal cyanide catalyst contain(s) from 0.3 to 1.8 mol base equivalents (based on 1 mol of the metal cyanide salt used for the synthesis of the catalyst) of alkaline metal hydroxide, metal carbonate and/or metal oxide. |
| US08946465B2 |
Preparation of oligomers and co-oligomers of highly fluorinated sulfinic acids and salts thereof
There is provided a method for preparing oligomers and co-oligomers of highly fluorinated sulfuric acids and salts thereof. |
| US08946464B2 |
Hydrosilylation method, method for producing organosilicon compound, and organosilicon compound
A hydrosilylation method is provided. In this hydrosilylation method, silylation of the carbon atom other than the terminal carbon atom and generation of the by-product isomer by internal migration of the double bond are suppressed without sacrificing the hydrosilylation reactivity, even if an olefin compound having tertiary amine atom which can be a catalyst poison was used. In the hydrosilylation, an olefin compound having carbon-carbon unsaturated bond, and a compound having hydrogensilyl group are reacted in the presence of an acid amide compound, a nitrile compound and an aromatic hydroxyl compound, or an organoamine salt compound, by using catalytic action of platinum and/or its complex compound. |
| US08946460B2 |
Process for producing polyunsaturated fatty acids in an esterified form
The present invention relates to a process for producing ethyl esters of polyunsaturated fatty acids, comprising transesterifying triacylglycerols in extracted plant lipid. |
| US08946457B2 |
Flavone derivatives and their preparative method and medical use
Flavone derivatives, preparative method of the derivatives and use thereof as medicaments for treating diabetes. The structure of the derivatives is presented by formula 1: In the structure, R1 and R2, which are identical or not, represent hydrogen atom, halogen, cyano, hydroxyl, trifluoromethyl, thio-methyl, benzyloxy. C1-C8 linear chain or branch chain alkyl, C1-C8 linear chain or branch chain alkoxy. The pharmacological test indicates that the flavone derivatives can significantly increase the glucose consumption of Hep-G2 cell with insulin resistance activity, promote translocation of glucose transporter 4 of skeletal muscle cells (L6GLUT4myc) at different level, and significantly increase glucose intake and utilization by cells. The test proves the fact for the first time that the flavone derivatives can significantly promote translocation of glucose transporter 4 of skeletal muscle cells, and one of the mechanisms for treating diabetes is activating the cell AMPK phosphorylation and phosphorylating the downstream ACC. |
| US08946452B2 |
Crystalline, completely soluble lithium bis(oxalato)borate (LiBOB)
A crystalline, completely soluble lithium bis(oxalato)horate (LiBOB), to a method for producing the same and to the use of the lithium bis(oxalato)borate. |
| US08946451B2 |
Lipoic acid acylated salicylate derivatives and their uses
The invention relates to lipoic acid acylated salicylate derivatives; compositions comprising an effective amount of a lipoic acid acylated salicylate derivative; and methods for treating or preventing an metabolic disease comprising the administration of an effective amount of a lipoic acid acylated salicylate derivative. |
| US08946450B2 |
Composition, synthesis, and use of new substituted pyran and pterin compounds
The present invention relates to substituted pterin compounds, their synthesis and use. In particular, the present invention relates to a new precursor compound and its analogs for synthesizing a new substituted pterin compound and its analogs. These new compounds are particularly suitable for treating molybdenum cofactor deficiency. |
| US08946448B2 |
Organic semiconductors
A semiconducting compound with the structure: where X1 and X2 are independently S, Se, SiR1R2, O, CR3R4, C2R5R6, N, NR7, where R1 to R7 independently comprise hydrogen, straight, branched or cyclic alkyl, akenyl or alkynyl groups, alkoxy, aryl, silyl or amino; where each of Ar1 to Ar4 is optional and independently comprises, if present, an aryl or heteroaryl group; and where Y1 to Y4 independently comprise hydrogen, reactive groups, optionally substituted straight, branched or cyclic alkyl, alkoxy, akenyl, alkynyl, amido or amino groups, optionally substituted aryl or heteroaryl where at least one of Y1 to Y4 does not comprise hydrogen; and methods and devices related thereto. |
| US08946441B2 |
Polymorphs of an active pharmaceutical ingredient
The present invention relates to crystalline form I of Febuxostat as well as to pharmaceutical compositions comprising crystalline form I as an active pharmaceutical ingredient. Furthermore the present invention relates to a further polymorphic form of Febuxostat designated as form II and to a novel solvate of Febuxostat. The present invention also relates to methods of making crystalline form I, form II and the novel solvate of Febuxostat. |
| US08946440B2 |
Cyclopentylacrylamide derivative
A compound having a hypoglycemic effect is provided. The compound and a pharmaceutically acceptable salt thereof are useful for the treatment or prevention of diabetes, obesity, and the like. The compound is represented by the general formula (1): (wherein R1 and R2 are each independently a hydrogen atom, a halogen atom, an amino group, a hydroxyl group, a hydroxyamino group, a nitro group, a cyano group, a sulfamoyl group, a C1 to C6 alkyl group, a C1 to C6 alkoxy group, a C1 to C6 alkylsulfanyl group, a C1 to C6 alkylsulfinyl group, a C1 to C6 alkylsulfonyl group, or a C1 to C6 alkoxy-C1 to C6 alkylsulfonyl group, and A is a substituted or unsubstituted heteroaryl group). |
| US08946437B2 |
4-(methylaminophenoxy)pyrdin-3-yl-benzamide derivatives for treating cancer
The present invention provides a novel compound having an excellent antitumor effect, stability and metabolic stability. The compound of the present invention is represented by the following general formula (1) wherein R1 represents a halogen atom, an aryl group, an aryloxy group or a lower alkyl group optionally substituted with one or more halogen atoms; R2 represents hydrogen atom, a halogen atom, a lower alkyl group or a lower alkoxy group; and; m represents an integer of 1 to 3; provided that when m represents 2 or 3, R1s are the same or different. |
| US08946434B2 |
Dihydropyridin-2(1H)-one compound as S-nirtosoglutathione reductase inhibitors and neurokinin-3 receptor antagonists
The present invention is directed to novel dihydropyridin-2(1H)-one compounds useful as S-nitrosoglutathione reductase (GSNOR) inhibitors and/or Neurokinin-3 (NK3) receptor antagonists, pharmaceutical compositions comprising such compounds, and methods of making and using the same. |
| US08946431B2 |
2-(substituted ethynyl)quinoline derivatives as mGLUr5 antagonists
Provided is a 2-(substituted ethynyl)quinoline derivative having an mGluR5 antagonistic activity and pharmaceutically acceptable salts thereof. The compound of the present invention can be useful as a medicament for treating and preventing mGluR5 receptor-mediated diseases such as Alzheimer's disease, senile dementia, Parkinson's disease, L-DOPA-induced dyskinesia, Huntington's chorea, amyotrophic lateral sclerosis, multiple sclerosis, schizophrenia, anxiety disorder, depression, neuropathic pain, drug dependence, fragile X syndrome, autism, migraine and gastroesophageal reflux disease (GERD). |
| US08946416B2 |
Process for the synthesis of 5-(methyl-1H-imidazol-1-yl)-3-(trifluoromethyl)-benzeneamine
The present invention provides a new method of making compounds of formula (I): wherein R1 is mono- or polysubstituted aryl; R2 is hydrogen, lower alkyl or aryl; and R4 is hydrogen, lower alkyl or halogen. |
| US08946413B2 |
3-aminocyclopentanecarboxamides as chemokine receptor agonists
There is provided a compound of Formula I(a) or I(b): or a pharmaceutically acceptable salt thereof, wherein the various substitutents are defined herein. |
| US08946411B2 |
Production of caprolactam from adipic acid
Processes are disclosed for the conversion of adipic acid to caprolactam employing a chemocatalytic reaction in which an adipic acid substrate is reacted with ammonia and hydrogen, in the presence of particular heterogeneous catalysts and employing unique solvents. The present invention also enables the conversion of other adipic acid substrates, such as mono-esters of adipic acid, di-esters of adipic acid, mono-amides of adipic acid, di-amides of adipic acid, and salts thereof to caprolactam. Solvents useful in the process that do not react with ammonia are also disclosed. Catalyst supports are disclosed which catalyze the reaction of the substrate with ammonia in the absence of added metal. Metals on the catalyst supports comprise ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), and/or platinum (Pt). Heterogeneous catalysts comprising ruthenium (Ru) and rhenium (Re) on titania and/or zirconia supports are also disclosed. Further, disclosed are products produced by such processes, as well as products producible from such products. |
| US08946407B2 |
Fructosylated mangiferin and preparation method therefor and use thereof
Provided are a fructosylated mangiferin, a preparation method therefor and a use thereof, wherein the fructosylated mangiferin has a structural formula represented by the following formula (I), the method for preparing the fructosylated mangiferin includes adding a substance with fructosylating enzymatic activity to a transformed liquid containing mangiferin for biotransformation reaction, so as to convert the mangiferin into the fructosylated mangiferin, wherein the transformed liquid contains the mangiferin and a glycosyl donor; as well as a use of the fructosylated mangiferin in preparation of a medicament for treatment of tumor-related diseases. |
| US08946392B2 |
Gemcitabine immunoassay
The present invention comprises novel conjugates and immunogens derived from gemcitabine and unique antibodies generated by using gemcitabine linked immunogens, which conjugates immunogens and antibodies, are useful in immunoassays for the quantification and monitoring of gemcitabine in biological fluids. |
| US08946389B2 |
Compositions and methods for multiplex biomarker profiling
Provided herein are compositions and methods for identifying or quantitating one or more analytes in sample. The composition can comprise an affinity molecule reversibly conjugated to a label moiety via a double-stranded nucleic acid linker or via an adaptor molecule. The affinity molecule and the label moiety can be linked to different strands of the double-stranded nucleic acid linker. Compositions can be used in any biological assays for detection, identification and/or quantification of target molecules or analytes, including multiplex staining for molecular profiling of individual cells or cellular populations. For example, the compositions can be adapted for use in immunofluorescence, fluorescence in situ hybridization, immunohistochemistry, western blot, and the like. |
| US08946381B2 |
Compositions and uses thereof for the treatment of wounds
The present invention provides a topical composition comprising (i) an amount of an AP-1 signaling inhibitor sufficient to reduce, delay or prevent apoptosis and/or necrosis induced by dermal wounding and/or to induce and/or enhance proliferation of a cell; and (ii) a suitable carrier or excipient e.g., a topical carrier or excipient or other carrier or excipient for dermal application. For example, the AP-1 signaling inhibitor is a peptide analog comprising the sequence set forth in SEQ ID NO: 104. The present invention also provides a method of treating a dermal wound comprising topically administering said topical composition to a subject suffering from a dermal wound. |
| US08946380B2 |
Liposome allowing liposome-entrapped substance to escape from endosome
With the aim of providing a liposome, having a hydrophilic polymer introduced into the outer surface of the liposome membrane, which is a liposome capable of allowing the liposome-entrapped substance to escape from the endosome and be released into the cytoplasm, a liposome membrane component bound to the peptide shown by (a) or (b) below and a liposome membrane component bound to one end of a hydrophilic polymer the other end of which is bound to the peptide shown by (a) or (b) below are included in the liposome: (a) a peptide comprising the amino acid sequence of SEQ ID NO:1; (b) a peptide comprising the amino acid sequence of SEQ ID NO:1 with 1 or more amino acids deleted, replaced or added therein, and capable of fusing lipid membranes with one another under acidic conditions. |
| US08946374B2 |
Polyether ester composition, polyurethane resin composition, and optical material using the same
A polyurethane resin composition for optical applications can contain, as essential components, a polyisocyanate and a polyester-ether polyol obtained by polycondensation of a glycol component containing an alkylene oxide adduct of a bisphenol and an aromatic carboxylic acid component and particularly preferably having a glass transition temperature of 50° C. or lower. An optical material using the composition is also provided for. |
| US08946372B2 |
Use of tin catalysts for the production of polyurethane coatings
The present invention relates to the use of specific inorganic Sn(IV) for the production of polyisocyanate polyaddition products from a) at least one aliphatic, cycloaliphatic, araliphatic and/or aromatic polyisocyanate, b) at least one NCO-reactive compound, c) at least one thermolatent inorganic tin-containing catalyst, d) optionally further catalysts and/or activators other than c), e) optionally fillers, pigments, additives, thickeners, antifoams and/or other auxiliary substances and additives, wherein the ratio of the weight of the tin from component c) and the weight of component a) is less than 3000 ppm when component a) is an aliphatic polyisocyanate and less than 95 ppm when component a) is an aromatic polyisocyanate, wherein as thermolatent catalysts cyclic tin compounds of formula I, II or III: wherein n>1, are used. |
| US08946371B2 |
Photo-patternable dielectric materials curable to porous dielectric materials, formulations, precursors and methods of use thereof
Silsesquioxane polymers that cure to porous silsesquioxane polymers, silsesquioxane polymers that cure to porous silsesquioxane polymers in negative tone photo-patternable dielectric formulations, methods of forming structures using negative tone photo-patternable dielectric formulations containing silsesquioxane polymers that cure to porous silsesquioxane polymers, structures containing porous silsesquioxane polymers and monomers and method of preparing monomers for silsesquioxane polymers that cure to porous silsesquioxane polymers. |
| US08946370B2 |
Polymer composition, method for applying such composition and use of such composition in railway track structures
A polymer composition comprises a) a component 1 comprising a silane-terminated prepolymer; and b) a component 2 comprising water; and c) a component 3 comprising a silanol condensation catalyst. The composition is packaged in at least two separate packages prior to application, wherein no package contains all three components 1 and 2 and 3. In the composition water is present in an amount of 0.01 to 10 pbw per 100 pbw of prepolymer present in the composition, and the apparent viscosities of each of the packages is at most 95 Pa·s (Brookfield viscosity (A/6/10)) according to ISO 2555 at 23° C. The composition may suitably applied to railway track structures for the dampening of noise and vibrations of rails. |
| US08946369B2 |
Branched polysiloxanes and use of these
Branched polysiloxanes of formula (I) Ma1MHa2MVia3Db1DHb2DVib3Tc1THc2TVic3Qd (I) wherein M=[R2R12SiO1/2], MH=[R12HSiO1/2], MVi=[R3R12SiO1/2], D=[R12SiO2/2], DH=[R1HSiO2/2], DVi=[R1R3SiO2/2], T=[R4SiO3/2], TH=[HSiO3/2], TVi=[R3SiO3/2], Q=[SiO4/2], R1 is mutually independently identical or different, linear or branched, saturated or unsaturated hydrocarbon moieties, R2 is mutually independently the same as R1, an alkoxy moiety or a hydroxy group, R3 is mutually independently identical or different, linear or branched, olefinically unsaturated hydrocarbon moieties, R4 is mutually independently R1 or identical or different linear, branched and/or cyclic, saturated or unsaturated hydrocarbon moieties comprising heteroatoms, a1=from 0 to 50, a2=from 1 to 50, a3=from 1 to 50, b1=from 10 to 5000, b2=from 0 to 30, b3=from 0 to 30, c1=from 0 to 50, c2=from 0 to 50 c3=from 0 to 50, d=from 0 to 50, with the proviso that the sum c1+c2+c3+d is greater than or equal to 1, are provided. |
| US08946368B2 |
Catalytic systems made of a complex of rare earths for stereospecific polymerisation of conjugated dienes
The present invention relates to a multi-component catalytic system that can be used for the cis-1,4 stereospecific polymerization of conjugated dienes. The system is based on: (i) a rare-earth complex of Formula (II) Ln(A)3(B)n, Ln being a rare-earth metal, A a ligand, B a Lewis base or a solvent molecule and n a number from 0 to 3; (ii) an alkylating agent; (iii) a compound based on an aromatic ring and having at least two heteroatoms chosen from the elements O, N, S, P, and corresponding to the Formula (III): in which the R groups each denote hydrogen, an alkyl radical optionally comprising one or more heteroatoms (N, O, P, S, Si) or one or more halogen atoms, a halogen atom, a group based on one or more heteroatoms (N, O, P, S, Si); x and y are integers from 0 to 6; D is a group having a chemical function, one of the atoms of which has a non-bonding pair; L being an atom from column 1 of the Periodic Table. |
| US08946362B2 |
Process for preparation of olefin polymers
The present invention relates to a preparation method of olefin polymers using a catalyst composition containing a transition metal compound. In detail, the present invention provides a preparation method of olefin polymer using a catalyst composition comprising a transition metal compound, wherein the preparation method comprises introducing a scavenger to a continuous solution polymerization reactor in a specific range of amount to give the olefin polymer with good productivity. |
| US08946359B2 |
Process for preparing polyolefins
The present invention relates to a process of preparing a polyolefin in a loop reactor by introducing anti-fouling agent through a sleeve provided around at least part of the shaft of the pump. Also, the invention relates to the use of anti-fouling agent to prevent or reduce fouling by feeding the anti-fouling agent against the impeller of the pump upon introduction to the loop reactor. |
| US08946358B2 |
Cure acceleration of polymeric structures
A method for accelerating the curing of a polyarylene sulfide. The polyarylene sulfide is blended with a cure accelerator to form a mixture where the weight percentage of accelerator is between 0.2% and 15.0% of the total weight of the blend. The mixture is cured at 320° C. or above for at least 20 minutes. The cure accelerator is a compound selected from the group consisting of ionomers, hindered phenols, polyhydric alcohols, polycarboxylates, and mixtures of the foregoing. |
| US08946352B2 |
Melt processable poly (vinyl alcohol) blends and poly (vinyl alcohol) based membranes
Technologies and implementations for providing melt processable poly(vinyl alcohol) blends and poly(vinyl alcohol) based membranes are generally disclosed. |
| US08946351B2 |
Environmental friendly poly(ether-fattyamide) resin composition
An environmental friendly poly(ether-fattyamide) coating composition for mild steel plates or the like comprises and/or consists of a condensation polymerization product of a fatty diol and an aromatic/cyclic diol and wherein the fattyamide diol is synthesized using rapeseed oil and further cured with an aminoplast resin and a catalyst. The rapeseed oil is combined with a crosslinker such as hexa methoxy melamine formaldehyde, butylated melamine formaldehyde, urea formaldehyde of hydroxyl values of 220-240 mg KOH/gm of resin and curing catalysts. The curing catalyst may be para toluene sulphonic acids, dodecyl sulphonic acids, orthro phosphoric acid in a solvent such as xylene, ethyl methyl ketone, ethylene glycol mono methyl ether and aromatic hydrocarbons. Additional agents such as surfactants, stabilizers, wetting agents, flow modifiers, dispersing agents, adhesion promoters and UV absorbers may be added. |
| US08946347B2 |
Conjugated diene based polymer, and polymer composition containing the polymer
The present invention related to a conjugated diene based polymer comprising a monomer unit derived from a noncyclic conjugated diene and a monomer unit derived from an alicyclic hydrocarbon compound having a non-conjugated carbon-carbon double bond. |
| US08946343B2 |
Adhesive composition for semiconductors, adhesive film prepared using the same, and semiconductor device including the film
An adhesive composition for semiconductors, an adhesive film prepared using the adhesive composition, and a semiconductor device including the adhesive film, the adhesive composition exhibiting two exothermic peaks at temperatures ranging from 65° C. to 350° C., wherein a first exothermic peak appears at a lower temperature than a second exothermic peak, and the adhesive composition has a curing rate of about 70% to 100% in a first exothermic peak zone, as calculated by Equation 1: Curing rate=[(Heating value upon 0 cycle−Heating value after 1 cycle)/Heating value upon 0 cycle]×100. |
| US08946340B2 |
Glass flake filler, and resin composition including the same
A glass flake filler of the present invention is composed of glass flakes. The average thickness of the glass flakes is at least 0.1 μm but less than 0.5 μm, and the glass flakes include glass flakes having a thickness of at least 0.01 μm but not more than 2.0 μm in an amount of at least 90% by mass. A resin composition of the present invention is a resin composition including a thermoplastic resin and a glass flake filler. This glass flake filler is composed of glass flakes, the average thickness of the glass flakes is at least 0.1 μm but less than 0.5 μm, and the glass flakes include glass flakes having a thickness of at least 0.01 μm but not more than 2.0 μm in an amount of at least 90% by mass. |
| US08946338B2 |
Aqueous silicon dioxide dispersions for sealant and adhesive formulations
The invention relates to aqueous dispersions, characterized in that they comprise (c) at least one aqueous silicon dioxide dispersion with a mean particle diameter of the SiO2-particles of 1 to 400 nm and (d) at least one water-soluble hydroxyl-containing organic compound, to a process for their preparation and to their use in adhesive and coating formulations. |
| US08946336B2 |
Hydrotalcite-type particles, heat retaining agent for agriculture films, master batch for agricultural films, and agricultural film
The present invention relates to a heat retaining agent for agricultural films comprising hydrotalcite-type particles which can satisfy all of a transparency required for heat retaining agents for agricultural films, dispersibility in resins, and handling property at a high level. According to the present invention, there are provided hydrotalcite-type particles having an oil absorption of not more than 35 mL/100 g and a ratio of an oil absorption to a plate surface diameter (oil absorption/plate surface diameter) of 140 to 190; a heat retaining agent for agricultural films comprising the hydrotalcite-type particles; and an agricultural film comprising the heat retaining agent for agricultural films. |
| US08946330B2 |
Extrusion blown molded bottles with high stiffness and transparency
A polypropylene composition comprising a random propylene copolymer, a high melt strength polypropylene having a branching index g′ of 0.9 or less and a clarifier, wherein the polypropylene composition has a MFR2 (230° C.) of at least 2.0 g/10 min. |
| US08946327B2 |
Method for producing synthetic amylospheroid
Provided is a method for producing synthetic amylospheroids efficiently, the method including agitating a liquid containing amyloid β-peptides in the presence of a plasticizer. Amylospheroid refers to an assembly of amyloid β-peptides that selectively can induce cell death of functionally mature neurons. Amylospheroid is considered to play a central role in the development of Alzheimer's disease and dementia with Lewy bodies. |
| US08946325B2 |
Tire member and method for manufacturing the same
A method for manufacturing a tire member, containing a step (A) for producing a mixture containing a diene rubber component, an inorganic filler, a peptizer and a thiosulfuric acid compound containing an amino group, and a step (B) for mixing the mixture, a sulfur component and a vulcanization accelerator, wherein a tire member having improved abrasion resistance, tear strength and flex fatigue resistance is obtained, and the tire member are provided. A premix containing 100 parts by mass of the diene rubber component, from 0.1 to 0.5 parts by mass of the peptizer and 0.2 parts by mass or more of the thiosulfuric acid compound containing an amino group, obtained under a condition in which a temperature during mixing is maintained within a range of from 145 to 170° C. for 20 seconds or more and a temperature at completion of the mixing is 170° C. or lower. |
| US08946321B2 |
Polymeric compositions containing microspheres
Disclosed herein is a composition having a thermoset polymer and a plurality of hollow microsphere homogenously dispersed in the composition. The polymer is a cyanate ester thermoset, a phthalonitrile thermoset, a crosslinked acetylene thermoset, or a hydrosilation thermoset. Also disclosed herein is a method of: providing a thermosetting compound; adding microspheres to the thermosetting compound; and mixing the thermosetting compound while initiating crosslinking of the thermosetting compound. |
| US08946316B2 |
Polymer having polycyclic groups and coating compositions thereof
A polymer and coating composition containing the polymer are provided that are useful in coating applications such as, for example, food or beverage packaging containers. The polymer preferably includes a backbone having one or more polycyclic groups. In one embodiment, the polymer is a polyester and, more preferably, a polyester-urethane polymer. In one embodiment, the one or more polycyclic groups is a tricyclic or higher group. |
| US08946315B2 |
Hydrophilic aliphatic polyurethane foams
The invention relates to hydrophilic, aliphatic polyurethane foams, which are accessible by reacting hydrophilic polyisocyanates in the presence of water. Due to the absorption properties thereof, the polyurethane foams are in particular suited for producing wound dressings, cosmetic articles or incontinence products. |
| US08946308B2 |
Process for increasing the carbon monoxide content of a syngas mixture
The invention relates to a process for increasing the carbon monoxide content of a feed gas mixture comprising carbon dioxide, hydrogen and carbon monoxide via a catalytic reversed water gas shift reaction, comprising the steps of (1) heating the feed gas mixture having an initial feed temperature of at most 350° C. in a first zone to a temperature within a reaction temperature range in the presence of a first catalyst; and (2) contacting the heated feed gas in a second zone within the reaction temperature range with a second catalyst. This process shows relatively high conversion of carbon dioxide, and virtually no methane or coke is being formed, allowing stable operation. |
| US08946306B2 |
Process for the treatment of a hydrophobic surface by an aqueous phase
The invention relates to process for the treatment of a hydrophobic surface by a liquid film comprising an aqueous phase comprising the coating of said surface by the liquid whose aqueous phase comprises an effective amount of an agent of modification of the properties of surface and an active agent. |
| US08946305B2 |
Method for crosslinking a colloid, and crosslinked colloid therefrom
The disclosure provides a method for crosslinking a colloid, including: (a) providing a colloid solution; (b) adding a crosslinking agent and solid particles to the colloid solution, wherein the amount of solid particles added is enough to convert the colloid solution into a solid mixture, and wherein a crosslinking reaction proceeds in the solid mixture; and (c) removing the solid particles from the solid mixture. |
| US08946301B2 |
Targeting of T-lymphocytes to treat amyotrophic lateral sclerosis
Methods and therapeutic compositions are disclosed for treating neurodegenerative disorders and, in particular Amyotrophic Lateral Sclerosis, using sphingosine1-phosphate receptor modulators, such as fingolimod or a pharmaceutically acceptable salt, hydrate, or solvate thereof. |
| US08946299B2 |
Use of calixarenes associated with an antibiotic in the treatment of bacterial infections
A product comprising a calixarene for its use in the treatment of pathologies involving at least one bacterial strain having a resistance to at least one defined antibiotic, on patients undergoing simultaneous or sequential treatment with a given antibiotic to which said bacterial strain optionally has a resistance. |
| US08946296B2 |
Substituted heteroaryl- and aryl-cyclopropylamine acetamides and their use
The invention relates to compounds of Formula (I): (A′)x-(A)-(B)—(Z)-(L)-C(═O)NH2 or pharmaceutically acceptable salts or solvates thereof, wherein: (A) is heteroaryl or aryl; each (A′), if present, is indepedently chosen from aryl, arylalkoxy, arylalkyl, heterocyclyl, aryloxy, halo, alkoxy, haloalkyl, cycloalkyl, haloalkoxy, and cyano, wherein each (A′) is substituted with 0, 1, 2 or 3 substituents independently chosen from halo, haloalkyl, aryl, arylalkoxy, alkyl, alkoxy, cyano, sulfonyl, sulfinyl, and carboxamide; X is 0, 1, 2, or 3; (B) is a cyclopropyl ring, wherein (A) and (Z) are covalently bonded to different carbon atoms of (B); (Z) is —NH—; and (L) is —(CH2)mCR1,R2—, wherein m is 0, 1, 2, 3, 4, 5, or 6, and wherein R1 and R2 are each independently hydrogen or C1-C6 alkyl; provided that, if (L) is —CH2— or —CH(CH3)—, then X is not 0. The compounds of the invention are useful in the treatment of diseases such as cancer and neurodegenerative diseases. |
| US08946293B2 |
Methods of intravenous administration of glyburide and other drugs
Methods of administering glyburide, or other drug, are disclosed. The novel methods disclosed herein include intravenous methods of administering glyburide, or other drug, over periods of more than an hour, preferably over periods of about 72 hours. The novel methods include administering a bolus of glyburide, or other drug, followed by a first continuous infusion administration of glyburide, or other drug; and optionally a second or further bolus administration of glyburide, or other drug, and/or a second or further continuous infusion administration of glyburide, or other drug. These methods are effective to rapidly achieve a desired level of glyburide, or other drug, and to provide a substantially steady level of glyburide, or other drug, over a desired period of time. The methods disclosed herein may be useful for treating a subject in need of treatment for, e.g., acute stroke (ischemic and hemorrhagic), traumatic brain injury (TBI), spinal cord injury (SCI), myocardial infarction (MI), shock (including hemorrhagic shock), organ ischemia, and ventricular arrhythmias. These methods provide for the rapid achievement and maintenance of therapeutic glyburide, or other drug, plasma levels over an extended period of time, and further avoid excessive levels of drug and so avoid possible drug side-effects. |
| US08946287B2 |
Chemotherapeutic flavonoids, and syntheses thereof
Substituted flavonoid compounds, and pharmaceutical formulations of flavonoid compounds are described. Also described are processes for preparing flavonid compounds, as are methods for treating cancer in mammals using the described flavonoid compounds or pharmaceutical formulations thereof. |
| US08946286B2 |
Organic amine salts of aminobenzoic acid derivatives and method for producing same
A novel organic amine salt or salt with quaternary ammonium ion of 3-{[((2E)-2-{1-[5-(4-t-butylphenyl)-4-hydroxy-3-thienyl]ethylidene}hydrazino)carbonothioyl]amino}benzoic acid having useful properties as a drug is provided.A novel organic amine or salt with quaternary ammonium ion of 3-{[((2E)-2-{1-[5-(4-t-butylphenyl)-4-hydroxy-3-thienyl]ethylidene}hydrazino)carbonothioyl]amino}benzoic acid, a method for producing the organic amine salt or the salt with quaternary ammonium ion and a platelet increasing agent. |
| US08946280B2 |
Plant growth regulating compounds
The present invention relates to novel strigolactam derivatives of formula (I) to processes and intermediates for preparing them, to plant growth regulator compositions comprising them and to methods of using them for controlling the growth of plants and/or promoting the germination of seeds. |
| US08946278B2 |
Inhibitors of AkT activity
Invented are novel heterocyclic carboxamide compounds, the use of such compounds as inhibitors of protein kinase B activity and in the treatment of cancer and arthritis. |
| US08946276B2 |
High dosage mucoadhesive metronidazole aqueous-based gel formulations and their use to treat bacterial vaginosis
The present disclosure provides mucoadhesive aqueous-based gel formulations of metronidazole useful for a variety of purposes, including intravaginal application as a therapeutic approach towards the treatment of individuals suffering from and/or diagnosed with bacterial vaginosis. |
| US08946272B2 |
Plymorphic forms of deferasirox (ICL670A)
The invention relates to crystalline forms of 4-[3,5-bis(2-hydroxyphenyl)-[1,2,4]triazol-1-yl]benzoic acid and to its amorphous form, to processes for the preparation thereof, to compositions containing the same and their uses for the manufacture of a medicament for the treatment of the human body. |
| US08946271B2 |
Water soluble furoxan derivatives having antitumor activity
Water soluble compounds having a furoxan structure which are capable of inhibiting metabolic pathways involved in the development of the tumours are provided. The use of such compounds as a medicament in the therapy of the tumours and as an adjuvant in the immunotherapy protocols against neoplasms is also described. |
| US08946270B2 |
Amido-pyridyl ether compounds and compositions and their use against parasites
The subject matter disclosed herein is directed to amido-pyridyl ether compounds of formula I: wherein, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, Ra, a, b and d are as described herein, compositions comprising the compounds of formula I, methods for their preparation and methods for their uses against parasites. |
| US08946269B2 |
Crystalline forms of a factor Xa inhibitor
Provided herein are crystalline forms of a maleate salt of betrixaban, compositions and methods of preparation or use thereof. |
| US08946268B2 |
Modulators of HEC1 activity and methods therefor
Compounds, compositions, and methods for modulation of Hec1/Nek2 interaction are provided. Especially preferred compounds disrupt Nek2/Hec1 binding and are therefore useful as chemotherapeutic agent for neoplastic diseases. |
| US08946260B2 |
17α-hydroxylase/C17,20-lyase inhibitors
The present invention provides compounds of Formula (I), or a pharmaceutically acceptable salt thereof, where R1, R2, R3, R4, R5, R6, A and n are as defined herein. A deuteriated derivative of the compound of Formula (I) is also provided. |
| US08946259B2 |
Benzazole derivatives, compositions, and methods of use as beta-secretase inhibitors
The present invention is directed to benzazole compounds that inhibit β-site amyloid precursor protein-cleaving enzyme (BACE) and that may be useful in the treatment or prevention of diseases in which BACE is involved, such as Alzheimer's disease. The invention is also directed to pharmaceutical compositions comprising these compounds and the use of these compounds and compositions in the prevention or treatment of such diseases in which BACE is involved. |
| US08946251B2 |
Method of treating thermoregulatory dysfunction with paroxetine
The present invention relates to a method for treating a patient suffering from a thermoregulatory dysfunction, especially hot flashes and flushes associated with hormonal changes due to naturally occurring menopause (whether male or female) or due to chemically or surgically induced menopause. The method is also applicable to treating the hot flashes, hot flushes, or night sweats associated with disease states that disrupt normal hormonal regulation of body temperature. |
| US08946250B2 |
3,4-diarylpyrazoles as protein kinase inhibitors
3,4-diarylpyrazole derivatives of formula (I) as defined in the specification, and pharmaceutically acceptable salts thereof, process for their preparation and pharmaceutical compositions comprising them are disclosed; the compounds of the invention may be useful, in therapy, in the treatment of diseases associated with a disregulated protein kinase activity, like cancer. |
| US08946247B2 |
Quinazoline carboxamide azetidines
The invention provides novel quinazoline carboxamide azetidine compounds according to Formula (I) and use for the treatment of hyperproliferative diseases, such as cancer. |
| US08946246B2 |
Synthetic rigidin analogues as anticancer agents, salts, solvates and prodrugs thereof, and method of producing same
A compound having the Formula I as follows: wherein R1 and R2 are selected from hydrogen, aryl, fused aryl, heteroaryl, saturated carbocylclic, partially saturated carbocyclic, saturated heterocyclic, partially saturated heterocyclic, C1-10 alkyl, haloalkyl, alkenyl, alkynyl, arylalkyl, arylalkenyl, arylalkynyl, heteroarylalkyl, heteroarylalkenyl, carbocycloalkyl, heterocycloalkyl, hydroxyalkyl, aminoalkyl, carboxyalkyl, nitroalkyl, cyanoalkyl, acetamidoalkyl, and acyloxyalkyl. A process for the preparation thereof is also provided. |
| US08946245B2 |
Heteroaryl substituted pyrrolo[2,3-b]pyridines and pyrrolo[2,3-b]pyrimidines as Janus kinase inhibitors
The present invention provides heteroaryl substituted pyrrolo[2,3-b]pyridines and heteroaryl substituted pyrrolo[2,3-b]pyrimidines that modulate the activity of Janus kinases and are useful in the treatment of diseases related to activity of Janus kinases including, for example, immune-related diseases, skin disorders, myeloid proliferative disorders, cancer, and other diseases. |
| US08946239B2 |
Substituted pyrrolo, -furano, and cyclopentylpyrimidines having antimitotic and/or antitumor activity and methods of use thereof
The present invention provides substituted pyrrolo-, furano-, and cyclopentylpyrimidine bicyclic compounds of formula III, and 5,6-saturated and unsaturated and pharmaceutically acceptable salts, prodrugs, solvates, and hydrates thereof, having antimitotic activity, anti-multidrug resistance activity, such as for example P-glycoprotein inhibition, and antitumor activity, and which inhibit paclitaxel sensitive and resistant tumor cells. Also provided are methods of utilizing these compounds for treating tumor cells and inhibiting mitosis of cancerous cells. |
| US08946236B2 |
Anthranilic acid diamide derivative with hetero-aromatic and hetero-cyclic substituents
The present invention relates to new insecticides of the formula (I) in which R1, R2, R3, R4, R5, R6, A, Q and n can have the definitions stated in the description, to a number of processes for preparing them and to their use as active compounds, more particularly to their use as pest control compositions. |
| US08946231B2 |
P2X3, receptor antagonists for treatment of pain
The subject invention relates to novel P2X3 receptor antagonists that play a critical role in treating disease states associated with pain, in particular peripheral pain, inflammatory pain, or tissue injury pain that can be treated using a P2X3 receptor subunit modulator. |
| US08946227B2 |
Piperazine derivatives and methods of use
The invention provides 2-carboxamide piperazine compounds, and methods of treatment and pharmaceutical compositions that utilize or comprise one or more such compounds. Compounds of the invention are useful for the treatment of mammalian infertility. |
| US08946223B2 |
Substituted hydroxamic acids and uses thereof
This invention provides compounds of formula (I): wherein X1, X2, R1a, R1b, R1c, R1d, n, and G have values as described in the specification, useful as inhibitors of HDAC6. The invention also provides pharmaceutical compositions comprising the compounds of the invention and methods of using the compositions in the treatment of proliferative, inflammatory, infectious, neurological or cardiovascular diseases or disorders. |
| US08946222B2 |
Phenoxymethyl heterocyclic compounds
Phenoxymethyl compounds that inhibit at least one phosphodiesterase 10 are described as are pharmaceutical compositions containing such compounds an methods for treating various CNS disorders by administering such compounds to a patient in need thereof. |
| US08946220B2 |
Compositions and uses thereof to ameliorate pain
Hydrazinopyridazines, fused hydrazinopyridazines, phenylethylhydrazines, or combinations thereof, compositions comprising hydrazinopyridazines, fused hydrazinopyridazines, phenylethylhydrazines, or combinations thereof, and methods for using them for the treatment of pain are described. |
| US08946219B2 |
Combination therapy with a compound acting as a platelet ADP receptor inhibitor
The present invention is directed to pharmaceutical compositions and methods of using combination therapies containing [4-(6-fluoro-7-methylamino-2,4-dioxo-1,4-dihydro-2H-quinazolin-3-yl)-phenyl]-5-chloro-thiophen-2-yl-sulfonylurea, or a pharmaceutically acceptable salt thereof, for the treatment of thrombosis diseases. |
| US08946218B2 |
CCR2 receptor antagonists, method for producing the same, and use thereof as medicaments
The present invention relates to novel antagonists for CCR2 (CC chemokine receptor 2) and their use for providing medicaments for treating conditions and diseases, especially pulmonary diseases like asthma and COPD and pain diseases. |
| US08946216B2 |
Indazole derivatives useful as ERK inhibitors
The present invention provides a compound of the Formula I: Formula I or a pharmaceutically acceptable salt, solvate or ester thereof, wherein R, R1, R2, R3, R4, X, m and n are as defined herein. The compounds are ERK inhibitors. Also disclosed are pharmaceutical compositions comprising the above compounds and methods of treating cancer using the same. |
| US08946213B2 |
Alkylated piperazine compounds
Alkylated piperazine compounds of Formula I are provided, including stereoisomers, tautomers, and pharmaceutically acceptable salts thereof, useful for inhibiting Btk kinase, and for treating cancer mediated by Btk kinase. Methods of using compounds of Formula I for in vitro, in situ, and in vivo diagnosis, and treatment of cancer in mammalian cells, or associated pathological conditions, are disclosed. |
| US08946211B2 |
Fused aminodihydrothiazine derivatives
A compound represented by the general formula: or a pharmaceutically acceptable salt thereof or a solvate thereof, wherein Ring A is a C6-14 aryl group or the like, L is —NReCO— or the like (wherein Re is a hydrogen atom or the like), Ring B is a C6-14 aryl group or the like, X is a C1-3 alkylene group or the like, Y is a single bond or the like, Z is a C1-3 alkylene group or the like, R1 and R2 are each independently a hydrogen atom or the like, and R3, R4, R5 and R6 are independently a hydrogen atom, a halogen atom or the like, has an Aβ production inhibitory effect or a BACE1 inhibitory effect and is useful as a prophylactic or therapeutic agent for a neurodegenerative disease caused by Aβ and typified by Alzheimer-type dementia. |
| US08946205B2 |
1,2,4-triazolo[4,3-a]pyridine derivatives and their use as positive allosteric modulators of mGluR2 receptors
The present invention relates to novel triazolo[4,3-a]pyridine derivatives of Formula (I) wherein all radicals are as defined in the claims. The compounds according to the invention are positive allosteric modulators of the metabotropic glutamate receptor subtype 2 (“mGluR2”), which are useful for the treatment or prevention of neurological and psychiatric disorders associated with glutamate dysfunction and diseases in which the mGluR2 subtype of metabotropic receptors is involved. The invention is also directed to pharmaceutical compositions comprising such compounds, to processes to prepare such compounds and compositions, and to the use of such compounds for the prevention or treatment of neurological and psychiatric disorders and diseases in which mGluR2 is involved. |
| US08946197B2 |
Transglutaminase TG2 inhibitors, pharmaceutical compositions, and methods of use thereof
Certain compounds and pharmaceutically acceptable salts are provided herein. Also provided are pharmaceutical compositions comprising at least one compound or pharmaceutically acceptable salt therein and one or more pharmaceutically acceptable vehicle. Methods of treating patients suffering from certain disease states responsive to the inhibition of transglutaminase TG2 activity are described. These disease states include neurodegenerative disorders such as Huntington's disease. Also described are methods of treatment include administering at least one compound or pharmaceutically acceptable salt thereof as a single active agent or administering at least one compound or pharmaceutically acceptable salt thereof in combination with one or more other therapeutic agents. |
| US08946196B2 |
Methods for synthesizing and purifying aminoalkyl tetracycline compounds
Methods for the synthesis and purification of 9-amino alkyl tetracycline compounds are described. |
| US08946192B2 |
Heat stable hyaluronic acid compositions for dermatological use
The disclosure provides hyaluronic acid (HA) gel formulations and methods for treating the appearance of the skin. The formulations hyaluronic acid and at least one additional ingredient. Methods for treating lines, wrinkles, fibroblast depletions, and scars with the disclosed composition are provided as well. |
| US08946191B2 |
Imidated biopolymer adhesive and hydrogel
Biologically compatible polymers carry an imide and can be used as an adhesive, a hydrogel or both. A second biologically compatible polymer reactive with the imidated polymer can be used therewith to seal openings. |
| US08946188B2 |
Anti-microbial agents and uses thereof
Many pathogens, including Mycobacterium tuberculosis and Yersinia pestis, rely on an iron acquisition system based on siderophores, secreted iron-chelating compounds with extremely high Fe(III) affinity. The compounds of the invention are inhibitors of domain salicylation enzymes, which catalyze the salicylation of an aroyl carrier protein (ArCP) domain to form a salicyl-ArCP domain thioester intermediate via a two-step reaction. The compounds include the intermediate mimic 5′-O—[N-(salicyl)sulfamoyl]-adenosine (salicyl-AMS) and analogs thereof. These compounds are inhibitors of the salicylate activity of MbtA, YbtE, PchD, and other domain salicylation enzymes involved in the biosynthesis of siderophores. Therefore, these compounds may be used in the treatment of infection caused by microorganisms which rely on siderphore-based iron acquisition systems. Pharmaceutical composition and methods of using these compounds to treat or prevent infection are also provided as well as methods of preparing the inventive compounds. |
| US08946187B2 |
Materials and methods related to microRNA-21, mismatch repair, and colorectal cancer
The present invention discloses the discovery that miR-21 targets and down-regulates the core mismatch repair (MMR) recognition protein complex hMSH2 and hMSH6. Anti-sense miR-21 is therefore proven as therapeutic herein. Therefore, compositions, kits, therapies and other methods, including methods of treatment/amelioration of symptoms, are disclosed in the present invention. |
| US08946184B2 |
Aptamer therapeutics useful in the treatment of complement-related disorders
The invention provides nucleic acid therapeutics and methods for using these nucleic acid therapeutics in the treatment of complement-related disorders. |
| US08946182B2 |
Treatment of RNASE H1 related diseases by inhibition of natural antisense transcript to RNASE H1
The present invention relates to antisense oligonucleotides that modulate the expression of and/or function of RNase H1, in particular, by targeting natural antisense polynucleotides of RNase H1. The invention also relates to the identification of these antisense oligonucleotides and their use in treating diseases and disorders associated with the expression of RNASE H1. |
| US08946181B2 |
Treatment of interferon regulatory factor 8 (IRF8) related diseases by inhibition of natural antisense transcript to IRF8
The present invention relates to antisense oligonucleotides that modulate the expression of and/or function of Interferon Regulatory Factor 8 (IRF8), in particular, by targeting natural antisense polynucleotides of Interferon Regulatory Factor 8 (IRF8). The invention also relates to the identification of these antisense oligonucleotides and their use in treating diseases and disorders associated with the expression of IRF8. |
| US08946177B2 |
Methods and compositions involving miRNA and miRNA inhibitor molecules
The present invention concerns methods and compositions for introducing miRNA activity or function into cells using synthetic nucleic acid molecules. Moreover, the present invention concerns methods and compositions for identifying miRNAs with specific cellular functions that are relevant to therapeutic, diagnostic, and prognostic applications wherein synthetic miRNAs and/or miRNA inhibitors are used in library screening assays. |
| US08946173B2 |
Cancer cell death inducing agent having effects of potentiating anticancer drug against anticancer-drug-resistant cancer
The present invention provides a drug capable of causing cancer cells to restore anticancer drug sensitivity in cases in which cancer has acquired resistance to an anticancer drug and inducing cell death in cancer cells. The present invention specifically provides a cancer cell death inducing agent comprising REIC/Dkk-3 DNA as an active ingredient and having effects of potentiating an anticancer drug for cancer cells having anticancer drug resistance. |
| US08946157B2 |
Innovative discovery of therapeutic, diagnostic, and antibody compositions related to protein fragments of seryl-tRNA synthetases
Provided are compositions comprising newly identified protein fragments of aminoacyl-tRNA synthetases, polynucleotides that encode them and complements thereof, related agents, and methods of use thereof in diagnostic, drug discovery, research, and therapeutic applications. |
| US08946156B2 |
Albumin Fusion Proteins
The present invention encompasses albumin fusion proteins. Nucleic acid molecules encoding the albumin fusion proteins are also encompassed by the invention, as are vectors containing these nucleic acids, host cells transformed with these nucleic acid vectors, and methods of making the albumin fusion proteins of the invention and using these nucleic acids, vectors, and/or host cells. Additionally the present invention encompasses pharmaceutical compositions comprising albumin fusion proteins and methods of treating, preventing, or ameliorating diseases, disorders or conditions using albumin fusion proteins of the invention. |
| US08946154B2 |
Peptide ligands of somatostatin receptors
Peptide derivatives, their stereoisomers, mixtures thereof and/or their pharmaceutically acceptable salts, a method of obtaining them, pharmaceutical compositions containing them and the use thereof for the treatment, prevention and/or diagnosis of those conditions, disorders and/or pathologies in which the sstr1, sstr2, sstr3, sstr4 and/or sstr5 somatostatin receptors are expressed. |
| US08946151B2 |
Method of treating Parkinson's disease in humans by convection-enhanced infusion of glial cell-line derived neurotrophic factor to the putamen
A method of treating Parkinson's disease in humans is disclosed, wherein glial cell-line derive neurotrophic factor (GDNF) is chronically administered directly to one or both putamen of a human in need of treatment thereof via convection-enhanced infusion using at least one implantable pump and at least one catheter. In one aspect of the present invention the GDNF is infused directly into one or both putamen through one or more indwelling intraparenchymal multiport brain catheters connected to one or more implantable pumps wherein the flow rate is pulsed. |
| US08946147B2 |
Amide-based insulin prodrugs
Prodrug formulations of insulin and insulin analogs are provided wherein the insulin peptide has been modified by an amide bond linkage of a dipeptide prodrug element. The prodrugs disclosed herein have extended half lives of at least 10 hours, and more typically greater than 2 hours, 20 hours and less than 70 hours, and are converted to the active form at physiological conditions through a non-enzymatic reaction driven by chemical instability. |
| US08946145B2 |
Modified compstatin with peptide backbone and C-terminal modifications
Compounds comprising peptides capable of binding C3 protein and inhibiting complement activation are disclosed. These compounds display greatly improved complement activation-inhibitory activity as compared with currently available compounds. The compounds comprise compstatin analogs having a constrained backbone at position 8 (glycine) and, optionally, specific substitutions for threonine at position 13. |
| US08946141B2 |
Compositions, systems and method for in situ generation of alkalinity
The invention discloses compositions, methods and systems for generating alkalinity in situ. The compositions, methods and systems relate to the use of a manganese decomposition agent to catalyze the decomposition of a dilute peroxygen source providing highly alkaline cleaning compositions in situ. Methods of cleaning are also disclosed. |
| US08946140B2 |
Compositions, systems and method for in situ generation of alkalinity
The invention discloses compositions, methods and systems for generating alkalinity in situ. The compositions, methods and systems relate to the use of a silver decomposition agent to catalyze the decomposition of a dilute peroxygen source providing highly alkaline cleaning compositions in situ. Methods of cleaning are also disclosed. |
| US08946133B2 |
Method and composition for curing lost circulation
A composition made of fibers and a material able to exhibit reverse solubility has utility for treating subterranean wells. The composition may used to cure lost circulation. The composition may be added to drilling fluids, spacer fluids or cement slurries. As the fluid temperature increases in a well, the reverse solubility material may precipitate and migrate to the fibers, causing the fibers to stick to each other and form a network, thereby forming a barrier that reduces further egress of treatment fluid from the wellbore. |
| US08946132B2 |
Controlled release of surfactants for enhanced oil recovery
A controlled release composition comprising an aqueous sulfonate solution; an anionic surfactant; and a salt selected from aluminum nitrate nanohydrate, calcium chloride dehydrate, magnesium chloride hexahydrate, cobalt chloride hexahydrate, and other metal salts. Methods of delivering a controlled release of surfactants composition, the method comprising the steps of: delivering a solution into a reservoir, the solution comprising an aqueous sulfonate solution; an anionic surfactant; and a salt selected from aluminum nitrate nanohydrate, calcium chloride dehydrate, magnesium chloride hexahydrate, cobalt chloride hexahydrate, and other metal salts; and delivering water to the reservoir. |
| US08946127B2 |
Nucleic acid probe-based diagnostic assays for prokaryotic and eukaryotic organisms
Use of the ssrA gene or tmRNA, an RNA transcript of the ssrA gene, or fragments thereof as target regions in a nucleic acid probe assay for the detection and identification of prokaryotic and/or eukaryotic organisms is described. Nucleotide sequence alignment of tmRNA sequences from various organisms can be used to identify regions of homology and non-homology within the sequences which in turn can be used to design both genus specific and species specific oligonucleotide probes. These newly identified regions of homology and non-homology provide the basis of identifying and detecting organisms at the molecular level. Oligonucleotide probes identified in this way can be used to detect tmRNA in samples thereby giving an indication of the viability of non-viral organisms present in various sample types. |
| US08946124B2 |
Substituted 3-(biphenyl-3-yl)-8,8-difluoro-4-hydroxy-1-azaspiro[4.5]dec-3-en-2-ones for therapy and halogen-substituted spirocyclic ketoenols
The invention relates to novel compounds of the formula (I) in which W, X, Y, Z, A, B, D and G have the meanings given above, to a plurality of processes and intermediates for their preparation, and to their use as pesticides and/or herbicides and/or fungicides. The invention also relates to selective herbicidal compositions comprising, firstly, the halogen-substituted spirocyclic ketoenols and, secondly, a crop plant compatibility-improving compound.The present invention furthermore relates to the boosting of the action of crop protection compositions comprising, in particular, halogen-substituted spirocyclic ketoenols, through the addition of ammonium salts or phosphonium salts and optionally penetrants, to the corresponding compositions, to processes for producing them and to their application in crop protection as pesticides and/or fungicides and/or for preventing unwanted plant growth.The invention also relates to substituted 3-(biphenyl-3-yl)-8,8-difluoro-4-hydroxy-1-azaspiro[4.5]dec-3-en-2-ones of the formula (Ia) for therapeutic purposes, to pharmaceutical compositions and to their use in therapy, in particular for the prophylaxis and therapy of tumor disorders. |
| US08946121B2 |
Antifungal compositions
The present invention relates to new antifungal compositions and their use in the treatment of agricultural products. |
| US08946120B2 |
Method for preparing boron fertilizer
A method for preparing a boron fertilizer, including: (1) heating boric acid to a temperature of 180-200° C., maintaining the temperature for 20-30 min for dehydration of the boric acid to yield pyroboric acid; and (2) cooling down the pyroboric acid to a temperature of 40-60° C., crushing, and screening to yield a powdered, weakly acidic, high-content boron fertilizer. The method is energy-saving, environmentally friendly, and low in cost. The resulting boron fertilizer is weakly acidic, fast in dissolution rate, and has excellent in compounding performance |
| US08946108B2 |
Slurry bed Fischer-Tropsch catalysts with silica/alumina structural promoters
A structurally promoted, precipitated, Fischer-Tropsch catalyst that exhibits an RCAI-10 of 0-2.8 and/or produces less than 6 wt % fines after 5 hours ASTM Air Jet Attrition testing, due to formation via: preparing a nitrate solution by forming at least one metal slurry and combining the at least one metal slurry with a nitric acid solution; combining the nitrate solution with a basic solution to form a precipitate; structurally promoting the precipitate with at least one source of silicon to form a promoted mixture, wherein promoting comprises combining the precipitate with (a) silicic acid and one or more component selected from the group consisting of non-crystalline silicas, crystalline silicas, and sources of kaolin or (b) a component selected from the group consisting of non-crystalline silicas and sources of kaolin, in the absence of silicic acid; and spray drying the promoted mixture to produce catalyst having a desired particle size. |
| US08946097B2 |
Semiconductor device and manufacturing method thereof
A manufacturing method of a semiconductor device, which includes the steps of forming a gate electrode layer over a substrate having an insulating surface, forming a gate insulating layer over the gate electrode layer, forming an oxide semiconductor layer over the gate insulating layer, forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer, forming an insulating layer including oxygen over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and after formation of an insulating layer including hydrogen over the insulating layer including oxygen, performing heat treatment so that hydrogen in the insulating layer including hydrogen is supplied to at least the oxide semiconductor layer. |
| US08946096B2 |
Group IV-B organometallic compound, and method for preparing same
The present invention relates to novel 4B group metalorganic compounds represented by following formula I and the preparation thereof. Specifically, the present invention relates to a thermally and chemically stable 4B group organo-metallic compound utilized in chemical vapor deposition (CVD) or atomic layer deposition (ALD), and the preparation thereof. A 4B group metalorganic compound prepared according to the present invention volatiles easily and is stable at high temperature, and can be used effectively in manufacturing 4B group metal oxide thin films. wherein M represents Ti, Zr or Hf, R1 represents C1˜C4 alkyl, R2 and R3 represent independently C1˜C6 alkyl. |
| US08946094B2 |
Method of fabricating a graphene electronic device
A method of fabricating a graphene electronic device includes (a) forming a first electrode and a second electrode spaced apart from each other, on a substrate; (b) forming supporting patterns on the first electrode and the second electrode; (c) coating the supporting patterns with graphene-oxide-containing solution to form composite patterns; and (d) separating the supporting patterns from the composite patterns. The step of forming supporting patterns may expose end portions of the first and second electrodes and the substrate between the end portions and be accomplished by providing a mask on the first and second electrodes; and electrospinning a polymer solution on the first and second electrodes with the mask. The supporting patterns may be composed of polymer fibers. |
| US08946092B2 |
Method of manufacturing semiconductor device, method of processing substrate and substrate processing apparatus
An insulating film having features such as a low dielectric constant, a low etching rate and a high insulating property is formed. An oxycarbonitride film is formed on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) supplying a gas containing an element to the substrate; (b) supplying a carbon-containing gas to the substrate; (c) supplying a nitrogen-containing gas to the substrate; and (d) supplying an oxygen-containing gas to the substrate. |
| US08946088B2 |
Method of metal deposition
A method of forming a metal layer on an electrically insulating substrate comprises depositing a photocatalyst layer onto the substrate and depositing a mask layer comprising voids on the substrate, such as a layer of latex microparticles with voids between them, to give an open pore structure to the mask. An electroless plating solution is then provided on the photocatalyst layer, and the photocatalyst layer and electroless plating solution are illuminated with actinic radiation whereby deposition of metal from the electroless plating solution to form a metal layer on the photocatalyst layer is initiated whereby the metal deposits in the voids of the mask layer. The mask layer is subsequently removed to leave a porous metal layer on the substrate. The method allows for deposition of porous metal films with controlled thickness and excellent adhesion onto electrically insulating substrates. The method is suitable for providing metal layers with controlled, regular porosity. |
| US08946082B2 |
Methods for forming semiconductor devices
Embodiments of methods for forming a semiconductor device are provided. The method includes forming a metal layer overlying a dielectric material. A thickness of the metal layer is reduced including oxidizing an exposed outer portion of the metal layer to form a metal oxide portion overlying a remaining portion of the metal layer and removing the metal oxide portion. |
| US08946077B2 |
Method of manufacturing a semiconductor device
A method of manufacturing a semiconductor device includes forming a plurality of conductive lines separated from one another in a first direction via a slender hole and extending in a second direction perpendicular to the first direction, forming a first insulation layer filling the slender hole between the plurality of conductive lines, forming a plurality of first isolated holes separated from one another between the plurality of conductive lines in the first direction and the second direction by patterning the first insulation layer, forming a liner layer in the first isolated holes, filling a second insulation layer having an etching selectivity with respect to the first insulation layer, in the first isolated holes on the liner layer and forming a plurality of second isolated holes between the conductive lines by removing the first insulation layer using the etching selectivity between the second insulation layer and the first insulation layer. |
| US08946076B2 |
Methods of fabricating integrated structures, and methods of forming vertically-stacked memory cells
Some embodiments include methods of forming vertically-stacked memory cells. An opening is formed to extend partially through a stack of alternating electrically insulative levels and electrically conductive levels. A liner is formed along sidewalls of the opening, and then the stack is etched to extend the opening. The liner is at least partially consumed during the etch and forms passivation material. Three zones occur during the etch, with one of the zones being an upper zone of the opening protected by the liner, another of the zones being an intermediate zone of the opening protected by passivation material but not the liner, and another of the zones being a lower zone of the opening which is not protected by either passivation material or the liner. Cavities are formed to extend into the electrically conductive levels along sidewalls of the opening. Charge blocking dielectric and charge-storage structures are formed within the cavities. |
| US08946075B2 |
Methods of forming semiconductor device with self-aligned contact elements and the resulting devices
One method includes performing a first etching process to form a contact opening in a layer of insulating material that exposes a portion of a gate structure of the transistor, performing a second etching process on the exposed portion of the gate structure to thereby define a gate recess, selectively forming an oxidizable material in the gate recess, converting the oxidizable material to an oxide material, and forming a conductive contact in the contact opening that is conductively coupled to a source/drain region. A device includes an oxide material that is positioned at least partially in a recess formed in a gate structure, wherein the oxide material contacts a conductive contact and contacts a portion, but not all, of the exterior surface of the gate structure. |
| US08946073B2 |
Phase change memory cell with large electrode contact area
A phase change memory cell and a method for fabricating the phase change memory cell. The phase change memory cell includes a bottom electrode and a first non-conductive layer. The first non-conductive layer defines a first well, a first electrically conductive liner lines the first well, and the first well is filled with a phase change material in the phase change memory cell. |
| US08946071B2 |
Method for manufacturing semiconductor device
The present invention discloses a method for manufacturing a semiconductor device, comprising: forming a gate stacked structure on a substrate; forming a source/drain region and a gate sidewall spacer at both sides of the gate stacked structure; depositing a Nickel-based metal layer at least in the source/drain region; performing a first annealing so that the silicon in the source/drain region reacts with the Nickel-based metal layer to form a Ni-rich phase of metal silicide; performing an ion implantation by implanting doping ions into the Ni-rich phase of metal silicide; performing a second annealing so that the Ni-rich phase metal silicide is transformed into a Nickel-based metal silicide, and meanwhile, forming a segregation region of the doping ions at an interface between the Nickel-based metal silicide and the source/drain region. The method according to the present invention performs the annealing after implanting the doping ions into the Ni-rich phase of metal silicide, thereby improving the solid solubility of the doping ions and forming a segregation region of highly concentrated doping ions, thus the SBH of the metal-semiconductor contact between the Nickel-based metal silica and the source/drain region is effectively reduced, the contact resistance is decreased, and the driving capability of the device is improved. |
| US08946065B2 |
Method of forming seed layer and method of forming silicon-containing thin film
Provided is a method of forming a seed layer for forming a thin film, which is capable of further improving a thickness uniformity of the thin film. The method of forming a seed layer that is a seed of the thin film on a base includes adsorbing at least silicon included in an aminosilane-based gas on the base, by using the aminosilane-based gas; and depositing at least silicon included in a higher-order silane-based gas having an order that is equal to or higher than disilane on the base, on which at least the silicon included in the aminosilane-based gas is adsorbed, by using the higher-order silane-based gas having an order that is equal to or higher than the disilane. |
| US08946064B2 |
Transistor with buried silicon germanium for improved proximity control and optimized recess shape
A method of forming a semiconductor device that includes providing a substrate including a semiconductor layer on a germanium-containing silicon layer and forming a gate structure on a surface of a channel portion of the semiconductor layer. Well trenches are etched into the semiconductor layer on opposing sides of the gate structure. The etch process for forming the well trenches forms an undercut region extending under the gate structure and is selective to the germanium-containing silicon layer. Stress inducing semiconductor material is epitaxially grown to fill at least a portion of the well trench to provide at least one of a stress inducing source region and a stress inducing drain region having a planar base. |
| US08946063B2 |
Semiconductor device having SSOI substrate with relaxed tensile stress
A method comprises: forming a tensile SSOI layer on a buried oxide layer on a bulk substrate; forming a plurality of fins in the SSOI layer; removing a portion of the fins; annealing remaining portions of the fins to relax a tensile strain of the fins; and merging the remaining portions of the fins. |
| US08946060B2 |
Methods of manufacturing strained semiconductor devices with facets
A method for fabricating a semiconductor device, the method includes forming a gate stack over a major surface of a substrate. The method further includes recessing the substrate to form source and drain recess cavities adjacent to the gate stack in the substrate. The method further includes selectively growing a strained material in the source and drain recess cavities in the substrate using an LPCVD process, wherein the LPCVD process is performed at a temperature of about 660 to 700° C. and under a pressure of about 13 to 50 Torr, using SiH2Cl2, HCl, GeH4, B2H6, and H2 as reaction gases. |
| US08946056B2 |
Splitting method for optical device wafer
In a splitting method for an optical device wafer, the wafer having optical devices formed individually in regions partitioned by a plurality of crossing scheduled splitting lines provided on a front surface and having a reflective film formed on a reverse surface, a focal point of a laser beam is positioned to the inside of the optical device wafer and the laser beam is irradiated along the scheduled splitting lines from the reverse surface side of the wafer to form modification layers in the inside of the wafer. An external force is applied to the wafer to split the wafer along the scheduled splitting lines and form a plurality of optical device chips. The laser beam has a wavelength that produces transmittance through the reflective film equal to or higher than 80%. |
| US08946053B2 |
Method for reducing irregularities at the surface of a layer transferred from a source substrate to a glass-based support substrate
A method for reducing irregularities at a surface of a layer transferred from a source substrate to a glass-based support substrate, by generating a weakening zone in the source substrate; contacting the source substrate and the glass-based support substrate; and splitting the source substrate at the weakening zone; wherein the glass-based substrate has a thickness of between 300 μm and 600 μm. |
| US08946044B2 |
Semiconductor device and method of manufacturing semiconductor device
A lower electrode includes a metal-containing oxide layer having a thickness of 2 nm or less on the surface layer. A metal-containing oxide layer is formed by oxidizing the surface of the lower electrode. A dielectric film includes a first phase appearing at room temperature in the bulk state and a second phase appearing at a higher temperature than that in the first phase in the bulk state. The second phase has a higher relative permittivity than that of the first phase. |
| US08946043B2 |
Methods of forming capacitors
A method of forming capacitors includes forming support material over a substrate. A first capacitor electrode is formed within individual openings in the support material. A first etching is conducted only partially into the support material using a liquid etching fluid to expose an elevationally outer portion of sidewalls of individual of the first capacitor electrodes. A second etching is conducted into the support material using a dry etching fluid to expose an elevationally inner portion of the sidewalls of the individual first capacitor electrodes. A capacitor dielectric is formed over the outer and inner portions of the sidewalls of the first capacitor electrodes. A second capacitor electrode is formed over the capacitor dielectric. |
| US08946042B2 |
Bipolar transistor manufacturing method, bipolar transistor and integrated circuit
Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14′), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed. |
| US08946038B2 |
Diode structures using fin field effect transistor processing and method of forming the same
A method of forming one or more diodes in a fin field-effect transistor (FinFET) device includes forming a hardmask layer having a fin pattern, said fin pattern including an isolated fin area, a fin array area, and a FinFET area. The method further includes etching a plurality of fins into a semiconductor substrate using the fin pattern, and depositing a dielectric material over the semiconductor substrate to fill spaces between the plurality of fins. The method further includes planarizing the semiconductor substrate to expose the hardmask layer. The method further includes implanting a p-type dopant into the fin array area and portions of the FinFET area, and implanting an n-type dopant into the isolated fin area, a portion of the of fin array area surrounding the p-well and portions of the FinFET area. The method further includes annealing the semiconductor substrate. |
| US08946036B2 |
Method of forming dielectric films using a plurality of oxidation gases
A method for forming a dielectric film is disclosed. The method includes (a) exposing a substrate to a first gas pulse having a first oxygen-containing gas in a chamber; (b) exposing the substrate to multiple consecutive second gas pulses having a second oxygen-containing gas in the chamber, wherein the first oxygen-containing gas is different from the second oxygen-containing gas; and (c) sequentially after (a) and (b), exposing the substrate to a third gas pulse having a metal-containing gas in the chamber. Steps (a), (b), and (c) may be repeated any number of times to form the dielectric film with a predetermined thickness. |
| US08946035B2 |
Replacement channels for semiconductor devices and methods for forming the same using dopant concentration boost
A replacement channel and a method for forming the same in a semiconductor device are provided. A channel area is defined in a substrate which is a surface of a semiconductor wafer or a structure such as a fin formed over the wafer. Portions of the channel region are removed and are replaced with a replacement channel material formed by an epitaxial growth/deposition process to include a first dopant concentration level less than a first dopant concentration level. A subsequent doping operation or operations is then used to boost the average dopant concentration to a level greater than the first dopant concentration level. The replacement channel material is formed to include a gradient in which the upper portion of the replacement channel material has a greater dopant concentration than the lower portion of replacement channel material. |
| US08946034B2 |
Strained semiconductor device and method of making the same
In a method for forming a semiconductor device, a gate electrode is formed over a semiconductor body (e.g., bulk silicon substrate or SOI layer). The gate electrode is electrically insulated from the semiconductor body. A first sidewall spacer is formed along a sidewall of the gate electrode. A sacrificial sidewall spacer is formed adjacent the first sidewall spacer. The sacrificial sidewall spacer and the first sidewall spacer overlying the semiconductor body. A planarization layer is formed over the semiconductor body such that a portion of the planarization layer is adjacent the sacrificial sidewall spacer. The sacrificial sidewall spacer can then be removed and a recess etched in the semiconductor body. The recess is substantially aligned between the first sidewall spacer and the portion of the planarization layer. A semiconductor material (e.g., SiGe or SiC) can then be formed in the recess. |
| US08946033B2 |
Merged fin finFET with (100) sidewall surfaces and method of making same
A merged fin finFET and method of fabrication. The finFET includes: two or more single-crystal semiconductor fins on a top surface of an insulating layer on semiconductor substrate, each fin of the two or more fins having a central region between and abutting first and second end regions and opposite sides, top surfaces and sidewalls of the two or more fins are (100) surfaces and the longitudinal axes of the two or more fins aligned with a [100] direction; a gate dielectric layer on each fin of the two or more fins; an electrically conductive gate over the gate dielectric layer over the central region of each fin of the of two or more fins; and a merged source/drain comprising an a continuous layer of epitaxial semiconductor material on ends of each fin of the two or more fins, the ends on a same side of the conductive gate. |
| US08946030B2 |
Method for forming dummy gate
Disclosed is a method of forming a dummy gate in manufacturing a field effect transistor. The method includes a first process of exposing a workpiece having a polycrystalline silicon layer to plasma of HBr gas, and a second process of further exposing the workpiece to the plasma of HBr gas after the first process. The first process includes etching the polycrystalline silicon layer to form a dummy semiconductor part having a pair of side surfaces from the polycrystalline silicon layer, and forming a protection film based on a by-product of etching on the pair of side surfaces in such a manner that the thickness of the protection film becomes smaller toward a lower end of the dummy semiconductor part. |
| US08946027B2 |
Replacement-gate FinFET structure and process
A fin field effect transistor (FinFET) structure and method of making the FinFET including a silicon fin that includes a channel region and source/drain (S/D) regions, formed on each end of the channel region, where an entire bottom surface of the channel region contacts a top surface of a lower insulator and bottom surfaces of the S/D regions contact first portions of top surfaces of a lower silicon germanium (SiGe) layer. The FinFET structure also includes extrinsic S/D regions that contact a top surface and both side surfaces of each of the S/D regions and second portions of top surfaces of the lower SiGe layer. The FinFET structure further includes a replacement gate or gate stack that contacts a conformal dielectric, formed over a top surface and both side surfaces of the channel region. |
| US08946024B2 |
Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device includes a floating gate formed over a semiconductor substrate, an insulator formed on a first sidewall of the floating gate, a dielectric layer formed on a second sidewall and an upper surface of the floating gate, and a control gate formed over the dielectric layer. |
| US08946023B2 |
Method of making a vertical NAND device using sequential etching of multilayer stacks
A method of making a vertical NAND device includes forming a lower portion of a memory stack over a substrate, forming a lower portion of memory openings in the lower portion of the memory stack, and at least partially filling the lower portion of the memory openings with a sacrificial material. The method also includes forming an upper portion of the memory stack over the lower portion of the memory stack and over the sacrificial material, forming an upper portion of the memory openings in the upper portion of the memory stack to expose the sacrificial material in the lower portion of the memory openings, removing the sacrificial material to connect the lower portion of the memory openings with a respective upper portion of the memory openings to form continuous memory openings, and forming a semiconductor channel in each continuous memory opening. |
| US08946018B2 |
Methods of forming memory arrays and semiconductor constructions
Some embodiments include methods of forming semiconductor constructions. A heavily-doped region is formed within a first semiconductor material, and a second semiconductor material is epitaxially grown over the first semiconductor material. The second semiconductor material is patterned to form circuit components, and the heavily-doped region is patterned to form spaced-apart buried lines electrically coupling pluralities of the circuit components to one another. At least some of the patterning of the heavily-doped region occurs simultaneously with at least some of the patterning of the second semiconductor material. |
| US08946015B2 |
Aqua regia and hydrogen peroxide HCI combination to remove Ni and NiPt residues
A method for cleaning residues from a semiconductor substrate during a nickel platinum silicidation process is disclosed, including a multi-step residue cleaning, including exposing the substrate to an aqua regia solution, followed by an exposure to a solution having hydrochloric acid and hydrogen peroxide. The SC2 solution can further react with remaining platinum residues, rendering it more soluble in an aqueous solution and thereby dissolving it from the surface of the substrate. |
| US08946013B2 |
Lateral diffusion field effect transistor with drain region self-aligned to gate electrode
A disposable structure displaced from an edge of a gate electrode and a drain region aligned to the disposable structure is formed. Thus, the drain region is self-aligned to the edge of the gate electrode. The disposable structure may be a disposable spacer, or alternately, the disposable structure may be formed simultaneously with, and comprise the same material as, a gate electrode. After formation of the drain regions, the disposable structure is removed. The self-alignment of the drain region to the edge of the gate electrode provides a substantially constant drift distance that is independent of any overlay variation of lithographic processes. |
| US08946011B2 |
Semiconductor device and manufacturing method thereof
A manufacturing method of a semiconductor device having a stacked structure in which a lower layer is exposed is provided without increasing the number of masks. A source electrode layer and a drain electrode layer are formed by forming a conductive film to have a two-layer structure, forming an etching mask thereover, etching the conductive film using the etching mask, and performing side-etching on an upper layer of the conductive film in a state where the etching mask is left so that part of a lower layer is exposed. The thus formed source and drain electrode layers and a pixel electrode layer are connected in a portion of the exposed lower layer. In the conductive film, the lower layer and the upper layer may be a Ti layer and an Al layer, respectively. The plurality of openings may be provided in the etching mask. |
| US08946005B2 |
Thin-film transistor, array substrate having the thin-film transistor and method of manufacturing the array substrate
A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced. |
| US08945999B2 |
SRAM cell with different crystal orientation than associated logic
An integrated circuit containing logic transistors and an array of SRAM cells in which the logic transistors are formed in semiconductor material with one crystal orientation and the SRAM cells are formed in a second semiconductor layer with another crystal orientation. A process of forming an integrated circuit containing logic transistors and an array of SRAM cells in which the logic transistors are formed in a top semiconductor layer with one crystal orientation and the SRAM cells are formed in an epitaxial semiconductor layer with another crystal orientation. A process of forming an integrated circuit containing logic transistors and an array of SRAM cells in which the SRAM cells are formed in a top semiconductor layer with one crystal orientation and the logic transistors are formed in an epitaxial semiconductor layer with another crystal orientation. |
| US08945998B2 |
Programmable semiconductor interposer for electronic package and method of forming
Various structures of a programmable semiconductor interposer for electronic packaging are described. An array of semiconductor devices having various values is formed in the interposer. A user can program the interposer and form a “virtual” device having a desired value by selectively connecting various one of the array of devices to contact pads formed on the surface of the interposer. An inventive electronic package structure includes a standard interposer having an array of unconnected devices of various values and a device selection unit, which selectively connects various one of the array of devices in the standard interposer to an integrated circuit die encapsulated in the electronic package. Methods of forming the programmable semiconductor interposer and the electronic package are also illustrated. |
| US08945997B2 |
Integrated circuits having improved split-gate nonvolatile memory devices and methods for fabrication of same
Integrated circuits and methods for fabricating integrated circuits are provided. An exemplary method for fabricating an integrated circuit having a split-gate nonvolatile memory device includes forming a charge storage structure overlying a semiconductor substrate and having a first sidewall and a second sidewall and forming an interior cavity. The method forms a control gate in the interior cavity. Further, the method forms a first select gate overlying the semiconductor substrate and adjacent the first sidewall. A first memory cell is formed by the control gate and the first select gate. The method also forms a second select gate overlying the semiconductor substrate and adjacent the second sidewall. A second memory cell is formed by the control gate and the second select gate. |