最新美国发明专利第2014-08-12期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US08804465B2	Electronic timepiece with internal antenna A small electronic timepiece with an internal antenna can maintain high GPS reception performance and affords greater freedom developing different models. The timepiece has a cylindrical outside case 80 of which at least part is made from a non-conductive material, a dial 11 that displays the time inside the case 80, a drive mechanism 30 that drives displaying the time on the dial 11 inside the case 80, and a C-shaped antenna 40 disposed around the drive mechanism 30 inside the case 80. A crystal 84 covers one of the two openings to the case 80, and a circuit board 25 with a GPS reception unit 26 for radio communication is disposed inside the case 80. The antenna 40 is disposed closer to the crystal 84 than the circuit board 25, and the GPS reception unit 26 is disposed on the back cover 85 side of the circuit board 25.
US08804463B2	Seismic source/receiver probe for shallow seismic surveying Systems and methods are implemented for evaluating underground structures and objects, particularly relatively shallow underground structures and objects, using a seismic or acoustic source signal and a resulting seismic or acoustic wave. A discrete or unitary apparatus incorporates both a seismic source transducer and a receiver transducer within a common housing or frame. A unitary seismic probe includes a ground engaging member and a seismic source mechanically coupled to the ground engaging member. The probe further includes a sensor assembly mechanically coupled to the ground engaging member and configured to sense ground vibrations resulting from an impact to the ground engaging member by the seismic source.
US08804462B2	Marine vibrator with improved seal A marine vibrator with improved seal is described. The marine vibrator includes a housing and piston within the housing for generating vibratory signals. The improved seal is comprised of a two-stage seal having a first seal disposed adjacent the water interface and a second seal disposed away from the water interface, thus improving the reliability of the marine vibrator.
US08804454B2	Word line selection circuit and row decoder A first exemplary aspect of the present invention is a word line selection circuit where address decode signals composed of a power supply voltage and a first voltage lower than a ground voltage are input, and that a word line selection signal composed of the first voltage and a second voltage higher than the power supply voltage is output not via a level shift circuit according to the address decode signals.
US08804450B2	Memory circuits having a diode-connected transistor with back-biased control A memory circuit including at least one memory array and at least one sleep transistor connected to the at least one memory array and connected to a first power line for providing a first power voltage. The memory circuit further includes at least one diode-connected transistor directly connected to the at least one memory array and directly connected to the first power line and a back-bias circuit electrically coupled with a bulk of the at least one diode-connected transistor.
US08804446B2	Semiconductor device having equalizing circuit equalizing pair of bit lines A semiconductor device includes: a sense amplifier including an equalizing circuit that equalizes a pair of bit lines; an equalizing control circuit that converts the amplitude of an equalizing signal into a VDD level, and a word driver that controls a sub word line based on a timing signal. The word driver includes a level shift circuit for changing the operation timing of the sub word line in accordance with the VDD level, allowing a timing to complete the equalizing operation and a timing to reset the sub word line to synchronize even when the level of the VDD level is changed.
US08804439B2	Power circuit, flash memory system provided with the power circuit, and power supply method A power circuit configured to supply an operating voltage to a memory controller configured to control a flash memory and an access to the flash memory, comprises an input side charging unit that is a charging unit configured to be charged by an input voltage that is supplied from the outside, a voltage regulation unit configured to regulate any higher one of the input voltage and a charging voltage of the input side charging unit to be the operating voltage and to output the voltage, an output side charging unit that is a charging unit configured to be charged by the operating voltage, and a discharging unit configured to discharge electricity that has been charged to the output side charging unit in the case in which any higher one of the input voltage and the charging voltage becomes lower than the setting value.
US08804437B2	Column select multiplexer and method for static random-access memory and computer memory subsystem employing the same A column select multiplexer, a method of reading data from a random-access memory and a memory subsystem incorporating the multiplexer or the method. In one embodiment, the column select multiplexer includes: (1) a first field-effect transistor having a gate coupled via an inverter to a bitline of a static random-access memory array, (2) a second field-effect transistor coupled in series with the first field-effect transistor and having a gate coupled to a column select bus of the static random-access memory array and (3) a latch having an input coupled to the first and second field-effect transistors.
US08804436B1	Method of partial refresh during erase operation A method of erasing a target erase area of a non-volatile memory is provided, wherein the non-volatile memory is divided into an target erase area and an unselected area, and the method includes the steps in an erase cycle of: conditioning the target erase area of the non-volatile memory, wherein the unselected area is an area, excluding the target erase area, in the non-volatile memory; erasing target cells of the target erase area, wherein the threshold of the target cells is not greater than an erase verify voltage; soft-programming the target cells, wherein the threshold of the target cells is not less than a soft program verify voltage, wherein the soft program verify voltage is less than the erase verify voltage; and refreshing a predefined portion of the unselected area, wherein the predefined portion in the erase cycle is less than the unselected area.
US08804435B2	Non-volatile semiconductor storage device According to one embodiment, there is provided a non-volatile semiconductor storage device including a non-volatile memory, a monitoring section, a determining section, and a notification processing section. The non-volatile memory includes a plurality of memory cells driven by word lines and a voltage generating section that generates a read voltage to be applied to the word lines. The monitoring section monitors a change in a threshold distribution of the plurality of memory cells upon performing a read processing to read data from the plurality of memory cells by applying the read voltage to the word lines. The determining section determines a degree of deterioration of the non-volatile memory in accordance with a monitoring result by the monitoring section. The notification processing section notifies a life of the non-volatile memory in accordance with a determining result by the determining section.
US08804432B2	Sensing for all bit line architecture in a memory device Methods for sensing, memory devices, and memory systems are disclosed. One such method for sensing includes charging bit lines of an all bit line architecture to a precharge voltage, selecting a word line, and performing a sense operation on the bit lines. After the sense operation on the memory cells of the first selected word line is complete, the precharge voltage is maintained on the bit lines while a second word line is selected.
US08804430B2	Selected word line dependent select gate diffusion region voltage during programming Methods and devices for operating non-volatile storage are disclosed. One or more programming conditions depend on the location of the word line that is selected for programming. Applying a selected word line dependent program condition may reduce or eliminate program disturb. The voltage applied to a common source line may depend on the location of the word line that is selected for programming. This may prevent or reduce punch-through conduction, which may prevent or reduce program disturb. The voltage applied to bit lines of unselected NAND strings may depend on the location of the word line that is selected for programming. This may prevent or reduce punch-through conduction.
US08804429B2	Non-volatile memory device and a method of programming such device A non-volatile memory device has a charge pump for providing a programming current and an array of non-volatile memory cells. Each memory cell of the array is programmed by the programming current from the charge pump. The array of non-volatile memory cells is partitioned into a plurality of units, with each unit comprising a plurality of memory cells. An indicator memory cell is associated with each unit of non-volatile memory cells. A programming circuit programs the memory cells of each unit using the programming current, when fifty percent or less of the memory cells of each unit is to be programmed, and programs the inverse of the memory cells of each unit and the indicator memory cell associated with each unit, using the programming current, when more than fifty percent of the memory cells of each unit is to be programmed.
US08804424B2	Memory with three transistor memory cell device Memory, memory devices, and a method for a backup sequence are disclosed. In one such memory device, sense circuitry and page buffers are coupled between a three transistor memory cell device and a non-volatile memory device. Enable/disable gates enable selective access to the sense circuitry and page buffers by either the three transistor memory cell device or the non-volatile memory device.
US08804423B2	Multi-bit-per-cell flash memory device with non-bijective mapping To store a plurality of input bits, the bits are mapped to a corresponding programmed state of one or more memory cells and the cell(s) is/are programmed to that corresponding programmed state. The mapping may be many-to-one or may be an “into” generalized Gray mapping. The cell(s) is/are read to provide a read state value that is transformed into a plurality of output bits, for example by maximum likelihood decoding or by mapping the read state value into a plurality of soft bits and then decoding the soft bits.
US08804422B2	Nonvolatile memory device and related method of operation A method of programming selected memory cells to a plurality of target states comprises applying a first verification voltage to the selected memory cells to perform a verification read operation on memory cells programmed to at least one target state, applying a program voltage to the selected memory cells, and applying a second verification voltage lower than the first verification voltage to the selected memory cells to perform a verification read operation on memory cells programmed to the at least one target state, wherein the second verification voltage is provided in a specified program loop and subsequent program loops. The second verification voltage is set such that a number of slow bits in the at least one target state is different from the number of slow bits in another target state.
US08804420B2	Semiconductor memory device At least one of a plurality of columns is an LM column for storing LM flag data indicating a progression state of a write operation. Each of column control circuits performs an LM address scan operation for confirming whether the LM column exists in a corresponding memory core or not. Each of the column control circuits stores a result of that LM address scan operation in a register. In various kinds of operations after the LM address scan operation, each of the column control circuits executes an operation of reading the LM flag data from the LM column in the corresponding one of the memory cores when data retained in the register is first data, and omits executing an operation of reading the LM flag data from the LM column in the corresponding one of the memory cores when data retained in the register is second data.
US08804419B2	Memory kink checking This disclosure concerns memory kink checking. One embodiment includes selectively applying one of a plurality of voltages to a first data line according to a programming status of a first memory cell, wherein the first memory cell is coupled to the first data line and to a selected access line. An effect on a second data line is determined, due at least in part to the voltage applied to the first data line and a capacitive coupling between at least the first data line and the second data line, wherein the second data line is coupled to a second memory cell, the second memory cell is adjacent to the first memory cell, and the second memory cell is coupled to the selected access line. A kink correction is applied to the second data line, responsive to the determined effect, during a subsequent programming pulse applied to the second memory cell.
US08804417B2	Nonvolatile memory device including dummy memory cell and program method thereof A nonvolatile memory device including a dummy memory cell and a method of programming the same, wherein the nonvolatile memory device includes a dummy memory cell, and a plurality of memory cells serially connected to the dummy memory cell. The nonvolatile memory device sets a voltage provided to the dummy memory cell according to a distance between a selected memory cell among the plurality of memory cells and the dummy memory cell when a program operation is performed.
US08804416B2	Memory devices having select gates with p type bodies, memory strings having separate source lines and methods Memory devices and methods of operating memory devices are shown. Configurations described include a memory cell string having an elongated n type body region and having select gates with p type bodies. Configurations and methods shown can provide a reliable bias to a body region for memory operations such as erasing.
US08804412B2	Semiconductor memory apparatus A semiconductor memory apparatus includes a resistive memory cell; a data sensing unit configured to sense an output voltage, formed by a sensing current supplied to the resistive memory cell, based on a reference voltage, and output data having a value corresponding to the sensing result; and a reference voltage generation unit comprising a dummy memory cell including first and second resistors having first and second resistance values, respectively, and configured to output a voltage formed by the sensing current supplied to the dummy memory cell as the reference voltage.
US08804410B2	Stacked MRAM device and memory system having the same Provided is a stacked magnetic random access memory (MRAM) in which memory cell arrays having various characteristics or functions are included in memory cell layers. The stacked MRAM device includes a semiconductor substrate and at least one memory cell layers. The semiconductor substrate includes a first memory cell array. Each of the memory cell layers includes a memory cell array having a different function from the first memory cell array and is stacked on the first memory cell array. As a result, the stacked MRAM device has high density, high performance, and high reliability.
US08804404B2	Memory device and manufacturing method the same A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element.
US08804403B2	Semiconductor memory device According to one embodiment, there is provided a semiconductor memory device including a memory cell. The memory cell includes a first driving transistor, a first load transistor, a first read transfer transistor, a first write transfer transistor, a second driving transistor, a second load transistor, a second read transfer transistor, a second write transfer transistor, and one or more variable resistance elements. The one or more variable resistance elements has resistance that changes depending on a direction of a bias applied to both terminals. The one or more variable resistance elements are arranged in at least one of a portion between a first storage node and a first write transfer transistor and a portion between a second storage node and a second write transfer transistor.
US08804402B2	Nonvolatile semiconductor memory device A nonvolatile semiconductor memory device according to an embodiment comprises: a memory cell array including a plurality of memory cells provided at each of intersections of a plurality of first lines and a plurality of second lines; and a control circuit applying a selected first line voltage to a selected first line, an adjacent unselected first line voltage which is larger than the selected first line voltage to an adjacent unselected first line, and an unselected first line voltage which is larger than the adjacent unselected first line voltage to an unselected first line, and applying a selected second line voltage which is larger than the selected first line voltage to a selected second line and an unselected second line voltage which is smaller than the selected second line voltage to an unselected second line.
US08804400B2	Variable resistance memory device and method of fabricating the same According to an example embodiment, a variable resistance memory device includes a lower electrode that includes a spacer-shaped first sub lower electrode and a second sub lower electrode covering a curved sidewall of the first sub lower electrode. The second sub lower electrode extends upward to protrude above the top of the first sub lower electrode. The lower electrode includes an upward-tapered shape.
US08804398B2	Reversible resistive memory using diodes formed in CMOS processes as program selectors Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for reversible resistive memory cells that can be programmed based on magnitude, duration, voltage-limit, or current-limit of a supply voltage or current. These cells are PCM, RRAM, CBRAM, or other memory cells that have a reversible resistive element coupled to a diode. The diode can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diode. The memory cells can be used to construct a two-dimensional memory array with the N terminals of the diodes in a row connected as a wordline and the reversible resistive elements in a column connected as a bitline. By applying a voltage or a current to a selected bitline and to a selected wordline to turn on the diode, a selected cell can be programmed into different states reversibly based on magnitude, duration, voltage-limit, or current-limit. The data in the reversible resistive memory can also be read by turning on a selected wordline to couple a selected bitline to a sense amplifier. The wordlines may have high-resistivity local wordlines coupled to low-resistive global wordlines through conductive contact(s) or via(s).
US08804390B2	Connecting an inverter in a solar power plant with shifted potential center point The invention relates to a process of connecting an AC output of a transformerless inverter of a solar power plant to an internal AC power grid at an input side of a galvanic isolation, while an offset voltage for shifting a potential center point of a photovoltaic generator connected to the inverter is applied. The process includes: (i) synchronizing the inverter with the power grid; (ii) essentially matching a potential center point of the current-carrying lines of the AC output and a potential center point of the power grid, while only one of the potential center points of the current-carrying lines and the power grid is yet shifted by the offset voltage; and (iii) galvanically connecting all current-carrying lines of the AC output with the power grid only after the steps of synchronizing and essentially matching.
US08804383B2	Starter of grid-connected inverter and control method thereof A starter of the grid-connected inverter and a control method thereof are disclosed. The starter comprises a controller, and a first switch and a first resistor connected in parallel. The controller includes an input end, and first and second output ends. The input end inspects the DC voltage signal from the inverter. When the DC voltage exceeds a predetermined voltage threshold, the first output end sends a first control signal to turn on the first switch, and the second output end sends a second control signal to make the grid-connected inverter enter into a chopping mode. There is a delay period between the send time of the first control signal and that of the second control signal.
US08804380B2	Zero standby switching power supply solution A switching mode power supply (SMPS) includes a power transistor coupled to the primary winding of transformer and a resistor coupled between the input power source and a control terminal of the power transistor for triggering a primary current flow through the power transistor for providing startup power. A primary side control circuit is configured to regulate the output of the SMPS. A secondary side control circuit is coupled to the secondary winding and being configured to provide a first electrical signal to the secondary winding when an output voltage of the SMPS is less than a first reference voltage, whereupon an awakening signal is induced in the auxiliary winding and causes the primary side control circuit to provide a turn-on signal to the power transistor. The primary side control circuit is configured to enter a standby mode or a normal operating mode in response to the awakening signal.
US08804379B2	Flyback converter system and feedback controlling apparatus and method for the same A flyback converter system and feedback controlling apparatus and method of operating the same are disclosed. The feedback controlling apparatus for the flyback converter system includes a primary feedback loop unit for generating a primary feedback signal, and a secondary feedback loop unit for generating a secondary feedback signal, a loop selector. In light-load conditions, the loop selector supplies the primary feedback signal to a PWM controller for feedback control, and the secondary feedback loop unit is disabled by a power monitor to save electrical energy.
US08804377B2	Charge-mode control device for a resonant converter A control device for a resonant converter, the control device including a first circuit to integrate at least one signal indicating a half wave of a current circulating in a primary winding of a transformer; the first circuit is structured to generate at least a control signal of the switching circuit depending on the integrated signal. The control device includes a second circuit to impose the equality of a switching-on time period of the first and second switches.
US08804376B2	DC/DC converter with selectable coupling ratio and power inverter using the same The DC/DC converter has a full bridge circuit, a transformer and a rectifying unit. The full bridge circuit is connected to a source DC voltage. The transformer is connected to full bridge circuit and receives the source DC. The transformer has a stationary winding and at least one selectable winding connected in series. If the source DC voltage is lower than a threshold value, the switch is turned on to increase the coupling ratio of the transformer. Therefore, the transformer converts the source DC to a DC voltage in a required voltage level.
US08804372B2	Electrical disconnect apparatus An improved electrical disconnect apparatus includes a set of spaced apart conductors and a removable conductive element that is structured to extend between the conductors and to complete at least a portion of an electrical circuit that includes the conductors. The electrical disconnect apparatus is situated between an electrical network and a network protector. The conductors and the conductive element which extends therebetween are situated within the interior of a support that is sealed in order to permit the electrical disconnect apparatus to be in a submerged environment during use. The conductive element is retained by a key interlock wherein the key that enables removal of the conductive element is stored on the network protector and is only made available to the technician when the network protector has been switched to an OFF condition.
US08804364B2	Footprint on PCB for leadframe-based packages A footprint of a printed circuit board (PCB) for a leadframe-based package includes a plurality of pads arranged within a central region on a main surface of the PCB; and an array of signal pads disposed within a peripheral region surrounding the central region.
US08804360B2	System-in packages System-in packages, or multichip modules, are described which can include multi-layer chips and multi-layer dummy substrates over a carrier, multiple through vias blindly or completely through the multi-layer chips and completely through the multi-layer dummy substrates, multiple metal plugs in the through vias, and multiple metal interconnects, connected to the metal plugs, between the multi-layer chips. The multi-layer chips can be connected to each other or to an external circuit or structure, such as mother board, ball grid array (BGA) substrate, printed circuit board, metal substrate, glass substrate, or ceramic substrate, through the metal plugs and the metal interconnects.
US08804358B1	Method of forming an electronic multichip module A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
US08804355B2	Connector bracket Brackets may be mated with or coupled to an opening of an electronic device enclosure or housing for receiving plug connectors to reinforce the receptacle connector and/or device housing and potentially reduce damage/breakage. For example, a bracket can have a front face with a curvature. A back face of the bracket can include a first opening that communicates with a cavity. The cavity can be defined at least in part by upper and lower opposing inner surfaces, the lower inner surface including a portion that extends parallel to a portion of the bracket front face. The bracket can also include a hollow protrusion extending from the bracket front face in a front direction. The hollow protrusion can include an opening that communicates with the opening of the back face and extends through the hollow protrusion. Methods for manufacturing the connector bracket are also provided.
US08804354B2	Load sharing device and I/O architecture against imparted abuse loads A bracket configured to be interposed between the housing of a mobile electronic device and an electrical receptacle that is disposed in the mobile electronic device. The bracket includes a bracket body, an elongated opening through the bracket and a sheath surrounding portions of the bracket body. The bracket body includes an elongated protrusion extending in a front direction from the front face of the bracket body and a pair of fastener accommodations extending through the bracket body, each fastener accommodation disposed on opposite sides of the elongated protrusion. The sheath includes a first portion surrounding a portion of the bracket body elongated protrusion and a second portion including a pair of fastener openings.
US08804352B2	Circuit board assembly A circuit board assembly includes a motherboard, a first daughterboard, and a first metal bar. Two ends of the first metal bar are respectively fastened to the motherboard and the first daughterboard, and are electrically connected between the motherboard and the first daughterboard. The first metal bar is supported between the motherboard and the first daughterboard, so as to position the first daughterboard separately over the motherboard and enable the first daughterboard to be substantially perpendicular to the motherboard.
US08804351B2	Electronic device The chassis of an electronic device includes a circuit board and a power supply, a base, and a first side plate. An accommodating space, with an opening thereinto, is defined in the base. The circuit board is attached to the base, and a first connector is attached to a back surface of the circuit board. A second connector is attached to the power supply and electronically connected to the first connector. The power supply may be slid into the accommodating space via the opening. The sliding direction of the power supply as it is inserted is substantially parallel to the circuit board, and the first side plate is attached to the base to cover the opening.
US08804350B2	Control device for use in woven article Disclosed is a control device for use in woven article, which includes a conductive fabric that includes conductive warps, conductive wefts, and insulation warps, which are arranged so as to form a plurality of conduction sites; a first woven flat cable, which includes a plurality of conductor lines, the first woven flat cable being set to overlap the conductive fabric, two of the conductor lines being electrically and respectively connected to the conductive warp and the conductive weft of one of the conduction sites; and a processor unit, to which the conductor lines of the first woven flat cable is electrically connected.
US08804349B2	Foldable display device A foldable display device including a case that stably supports a flexible display panel for improving user convenience is disclosed. In one aspect, the foldable display device includes a flexible display panel including a foldable area between lateral plane areas thereof and a pair of front cases surrounding a front perimeter of the flexible display panel. The device also includes a pair of bottom cases coupled with the pair of front cases to house the flexible display panel and a biaxial hinge member mounted to the bottom case in the foldable area to connect the pair of front cases to respective rotation points.
US08804344B2	Injection molded control panel with in-molded decorated plastic film Provided are systems and methods for a control assembly including: a first film that is in-molded that includes decorative graphics, a front surface and a rear surface; and a second film molded to the rear surface of the first film having a printed circuit that includes sensors, control circuits and interconnects and a front and rear surface.
US08804343B2	Mounting apparatus for expansion card A mounting apparatus for expansion cards includes a cage of a chassis, a bracket secured to the cage, a positioning member, and a circuit board. The cage includes an installation plate. The installation plate is adapted to secure a first end of a first expansion card. The positioning member is removably mounted to the cage and includes a top wall. The top wall is adapted to secure a third end of a second expansion card with a height smaller than the first expansion card. The circuit board is secured to the bracket and is adapted to secure a second end of the first expansion card and a forth end of the second expansion card. A distance between the installation plate and the top wall is substantially equal to an altitude difference between the first expansion card and the second expansion card.
US08804340B2	Power semiconductor package with double-sided cooling According to an exemplary embodiment, a power semiconductor package includes a power module having a plurality of power devices. Each of the plurality of power devices can be a power switch. The power semiconductor package also includes a double-sided heat sink with a top side in contact with a plurality of power device top surfaces and a bottom side in contact with a bottom surface of the power module. The power semiconductor package can include at least one fastening clamp pressing the top side and the bottom side of the double-sided heat sink into the power module. The double-sided heat sink can also include a water-cooling element.
US08804338B2	Heat pipe docking system To provide electronic equipment having a heat discharging function capable of achieving the maximum in the signal processing capability of a portable terminal by preventing the functional restriction of the portable terminal by effectively discharging exothermic heat from the portable terminal at the time of coupling the portable terminal whose function is restricted by heat generation to an external device, as well as a heat discharging system and a heat discharging method.
US08804337B2	Structural assembly for cold plate cooling A device including a structural member having a heat spreader and an electronic device mounted directly to a first surface of the heat spreader of the structural member. The device also includes a cold plate mounted directly to the first surface of the heat spreader of the structural member.
US08804336B2	Heat disspating apparatus and electronic device A heat dissipating apparatus includes a centrifugal fan, a heat sink and a heat pipe. The centrifugal fan includes a frame and an air outlet defined on the frame. The heat sink is arranged adjacent to the air outlet of the centrifugal fan. The heat pipe includes an evaporation section and a condensation section extending from the evaporation section. The condensation section is connected to the heat sink. The evaporation section is for absorbing heat from a first and second heat generating component. The frame includes an elastic plate abutting to the evaporation section of the heat pipe and applying a force to the evaporation section of the heat pipe. An electronic device equipped with the heat dissipating apparatus is also provided.
US08804333B2	Data frame hot/cold aisle baffle system A data room air circulation system has adjacent racks located side by side. The racks have a front, a rear, and a first and second side. A computer system component is mounted in at least one of the racks. A cold aisle, containing cold air, is located at the front of the racks. As the cold air passes through the component, hot air is formed and discharged to a hot aisle located at the rear of the racks. A baffle, having a front end, a rear end, and a hot air side is located between the racks. The front baffle end is attached to the front of one of the racks, and the rear end is attached to the rear of the other of the racks. The baffle separates the cold aisle from the hot aisle for at least the height of the baffle.
US08804331B2	Portable computing device with thermal management Various computing devices and methods of thermally managing the same are disclosed. In one aspect, a method of thermally managing a computing device is provided where the computing device includes a housing that has a wall adapted to contact a body part of a user, a circuit board in the housing, and a semiconductor chip coupled to the circuit board. The method includes placing a first heat spreader in thermal contact with the semiconductor chip and the circuit board but separated from the wall by a gap.
US08804326B2	Device support system and support device An example terminal device includes a housing, and a first terminal (e.g., a charging terminal). The housing is generally plate-shaped and includes an engagement hole formed therein. The first terminal is provided on a surface (e.g., a bottom surface) of the housing on which the engagement hole is formed. A stand, which is a support device, includes a support member, a second terminal (e.g., a charging terminal), and guide members which are rotating members. The second terminal can be connected to the first terminal of the terminal device. The support member supports a predetermined surface (e.g., a back surface) of the housing when the first terminal and the second terminal are connected to each other. Each of the guide members can rotate in a predetermined direction and is provided at such a position that it is received into the engagement hole when the first terminal and the second terminal are connected to each other.
US08804323B2	Electronic device An electronic device includes a casing defining a first opening and a through hole, a first antenna, a first cover, and a camera module. The first antenna is mounted in the casing and whose position corresponds to the position of the first opening. The first cover is detachably fixed in the first opening and covering the first antenna. The camera module is mounted in the casing and includes a lens module received in the through hole for converging light incident thereon. The first antenna and the camera module are arranged in a first line, the first cover being fixed in the first opening is separated from the camera module by a first predetermined distance in a first direction parallel with the first line.
US08804322B2	Display apparatus A display device includes a display panel including a front substrate and a back substrate, a back cover disposed in the rear of the display panel, and a transparent cover including a portion disposed in the front of the front substrate of the display panel. The transparent cover contains a resin material having transmission capable of transmitting light. The transparent cover is separated from a front surface of the front substrate by a predetermined distance, and an air layer is formed between the transparent cover and the front surface of the front substrate.
US08804313B2	Enclosure power distribution architectures Computational enclosures may be designed to distribute power from power supplies to load units (e.g., processors, storage devices, or network routers). The architecture may affect the efficiency, cost, modularity, accessibility, and space utilization of the components within the enclosure. Presented herein are power distribution architectures involving a distribution board oriented along a first (e.g., vertical) axis within the enclosure, comprising a power interconnect configured to distribute power among a set of load boards oriented along a second (e.g., lateral) axis and respectively connecting with a set of load units oriented along a third (e.g., sagittal) axis, and a set of power supplies also oriented along the third axis. This orientation may compactly and proximately position the loads near the power supplies in the distribution system, and result in a comparatively low local current that enables the use of printed circuit boards for the distribution board and load boards.
US08804307B2	Highly dielectric film having high withstanding voltage The present invention relates to a highly dielectric film formed by using (A) a fluorine-containing resin comprising vinylidene fluoride unit and tetrafluoroethylene unit in a total amount of not less than 95% by mole, and provides a film for a film capacitor which has high dielectric property and high withstanding voltage and can be made thin.
US08804305B2	Multilayer ceramic condenser and method for manufacturing the same Disclosed are a multilayer ceramic condenser and a method for manufacturing the same. There is provided a multilayer ceramic condenser including: a multilayer main body in which a plurality of dielectric layers including a first side, a second side, a third side, and a fourth side are stacked; a first cover layer and a second cover layer forming the plurality of dielectric layers; a first dielectric layer disposed between the first cover layer and the second cover layer and printed with a first inner electrode pattern drawn to the first side; a second dielectric layer alternately stacked with the first dielectric layer and printed with a second inner electrode pattern drawn to the third side; and a first side portion and a second side portion each formed on the second side and the fourth side opposite to each other.
US08804300B2	Method of forming a cooling device for an integrated circuit A pump having: a cavity formed inside an insulating substrate, the upper part of the substrate being situated near the cavity having an edge; a conductive layer covering the inside of the cavity up to the edge and optionally covering the edge itself; a flexible membrane made of a conductive material placed above the cavity and resting against the edge; a dielectric layer covering the conductive layer or the membrane whereby insulating the portions of the conductive layer and of the membrane that are near one another; at least one aeration line formed in the insulating substrate that opens into the cavity via an opening in the conductive layer, and; terminals for applying a voltage between the conductive layer and the membrane.
US08804299B2	Electrostatic chuck and a method for supporting a wafer An electrostatic chuck includes an isolating substrate that surrounds at least one electrode; multiple protrusions having upper portions arranged to contact a wafer; and at least one discharging element positioned between the at least one electrode and the upper portions of the multiple protrusions; which discharging element, once coupled to a discharging circuit, is arranged to discharge charge accumulated in the isolating substrate.
US08804298B2	Gas insulated bus and particle removal method for gas insulated bus The present invention is provided to satisfy insulation and conductivity performance requirements, to reduce the size of a gas insulated bus, and also to make conditioning for a particle more reliable. In a gas insulated bus having a conductor supported in a cylindrical metal container via an insulator, insulating gas being contained in the metal container, the metal container has an expanded diameter part formed over a given range in an area of the metal container in which the insulator is positioned and a reduced diameter part formed over the entire area of the metal container except for the expanded diameter part. Thus, when the temperature of the insulator increases during conduction, heat from the insulator is transferred to the metal container via a large space in the expanded diameter part and released to the air through a large outer surface of the expanded diameter part of the metal container.
US08804297B2	Optimized electrostatic pinning and/or charging Electrostatic charging performance may be improved by determining a satiation charging current for objects/products passing through a charging system and then applying the determined satiation charging current the objects/products. Charging performance may be improved in either or both of discontinuous product train applications or continuous web applications.
US08804294B2	Active material actuation utilizing tunable magnetic overload protection A system for and method of providing overload protection for an active material actuator and composing assembly, including a magnetically functioning mechanism comprising one or more permanent magnet, electromagnet, and/or magnetorheological fluid reservoir cooperatively configured to produce a tunable holding force.
US08804292B2	Protective circuitry controls power supply enablement A protective circuit compares at least two different signals and asserts a control node toward respective logic states accordingly. At least one of the signals is derived from a voltage on a power rail within a computer or other device. A switching element passes or isolates an enable signal based on the logic state of the control node, enabling or preventing operation of a power supply, accordingly. Central processing units (CPUs) or other elements are protected against electrically caused damage in the event that a fault is detected by the protective circuit.
US08804290B2	Electrostatic discharge protection circuit having buffer stage FET with thicker gate oxide than common-source FET An active-FET ESD cell (300) for protecting an I/O pad (301) includes a first MOS transistor (310) with a gate oxide (315) of a first thickness and a second MOS transistor (320) with a gate oxide (325) of a second thickness greater than the first thickness at least by the amount required to handle the source-follower threshold voltage, the first transistor having its drain (313) tied to the I/O pad, its source (311) tied to ground, and its gate (312) tied to the source (321) of the second transistor and resistively connected to ground (340), and the second transistor having its drain (323) tied to the I/O pad and its gate tied to a capacitor (330) connected to the I/O pad and to a resistor (331) connected to ground.
US08804287B2	Material for use in a TMR read gap without adversely affecting the TMR effect Structures and methods for fabrication servo and data heads of tape modules are provided. The servo head may have two shield layers spaced apart by a plurality of gap layers and a sensor. Similarly, the data head may have two shield layers spaced apart by a plurality of gap layers and a sensor. The distance between the shield layers of the servo head may be greater than the distance between the shield layers of the data head. The material of the gap layers may include tantalum or an alloy of nickel and chromium. The material for the gap layers permits deposition of gap layers with sufficiently small surface roughness to prevent distortion of the tape module and increase the stability of the tape module operation.
US08804285B2	Magnetic recording medium and magnetic storage apparatus A magnetic recording medium may include an orientation control layer, a lower recording layer, an intermediate layer, and an upper recording layer that are stacked. The lower recording layer may have a coercivity higher than that of the upper recording layer, and the intermediate layer may include a layer including a magnetic material and having a saturation magnetization of 50 emu/cc or higher. The upper recording layer may include columnar crystals continuous with crystal particles forming the intermediate layer in a direction in which the layers are stacked.
US08804280B2	Actively synchronizing magnetic responses of a shield and a write pole In an example, a method of manufacturing a transducer head comprises configuring a control circuit to actively synchronize magnetic responses of a shield and a write pole during operation. The method also comprises configuring the control circuit to energize at least one coil wire during operation with a current direction opposite to current flow in a main transducer head coil. In another example, a method comprises actively synchronizing magnetic responses of a shield and a write pole. In another example, a transducer head comprises a write pole and a shield, and a control circuit actively synchronizes magnetic responses of the shield and the write pole.
US08804277B2	Humidity and temperature controlled tape drive cleaning In one embodiment, a method includes receiving at least one of temperature information and humidity information about an environment in which a tape drive resides, performing an analysis of the at least one of temperature information and humidity information, making a determination whether to modify a cleaning cycle based on the analysis of the at least one of temperature information and humidity information, and making a selection and/or modification of a timing of a cleaning operation of the tape drive based on the determination.
US08804276B2	Continuous biasing and servowriting of magnetic storage media having perpendicular anisotropy Magnetic storage tape and techniques for erasing and writing to magnetic storage tape having a perpendicular squareness greater than 50 percent and a longitudinal squareness less than 50 percent are described. In general, the magnetic tape may be biased with a remanence magnetization, or magnetic orientation, in any direction. One or two head systems may use various magnetic field patterns to create the desired remanence magnetization. Servo marks may have a remanence magnetization in an opposite magnetic orientation than that of the remaining bias on the servo track, e.g., substantially perpendicular to the magnetic tape. In some examples, a write head may alternate the direction of the magnetic field to continuously bias and write servo patterns to the magnetic tape. In addition, a symmetrical servo mark may be created in the magnetic tape with a write head having a gap width approximately equal to the length of the servo mark.
US08804275B1	System and method for determining head-disk contact in a magnetic recording disk drive having a fly-height actuator In a magnetic recording disk drive, a disk with equally angularly spaced regions that have topography different from the other regions of the disk is used to detect head-disk contact. In one embodiment of a bit-patterned media (BPM) disk, equally angularly spaced servo sectors have topography different from the data regions of the disk. A head-disk spacing sensor detects the topography of the servo sectors as the servo sectors pass the sensor during rotation of the disk. This results in the head-disk spacing sensor generating an output signal with a fundamental frequency f0=NX/60 Hz, where N is the number of servo sectors and X is the disk rotation rate in RPM. A second or higher harmonic or harmonics of the fundamental frequency f0 are filtered from the output of the head-disk spacing sensor and used to identify the initiation of head-disk contact.
US08804274B1	Disk storage apparatus and servo control method According to one embodiment, a disk storage apparatus includes a read controller and a servo controller. The read controller contains a combined position generator including a state observer and a combined position calculator. The servo controller controls a seek operation of the head based on the combined position. The servo controller stores the servo information in a memory and determines an occurrence of a state offset as an error between an actual position of the head and the combined position. The servo controller corrects the predicted position by the state observer based on the servo information stored in the memory and the combined position when the occurrence of the state offset is detected.
US08804273B1	Head fly height testing and compensation Testing and compensating for fly height of a head in a storage device during settling time using a head for use on a storage medium and a processor to idle the head for an idle time, unload the head from idle, and compensate for any unsettled fly height of the head using the idle time and at least a pre-determined clearance settling function over time from idle.
US08804271B2	Information processing apparatus and head evacuation processing method therefor An information processing apparatus includes a hard disk drive, an acceleration detection portion, and a controller. The hard disk drive has a protective function for moving a head from a recording area of a disk to an evacuation position. The acceleration detection portion is configured to detect, as a detection target acceleration, an acceleration in one of a vertical direction and an almost-vertical direction with respect to a gravity direction. The controller is configured to detect a movement based on the acceleration detected as the detection target acceleration and determine whether to activate the protective function of the hard disk drive based on the detected movement.
US08804268B1	DC-control for post processor Systems and techniques relating to interpreting signals on a noisy channel. A direct current (DC) correction can be applied to an input of a post processor outside of a main read path that supplies data detector output to the post processor. A signal processing apparatus can include a data detector, a post processor responsive to an output of the data detector, and one or more DC control units configured and arranged to apply a first DC correction to an input of the data detector and a second DC correction to an input of the post processor, wherein the second DC correction is different from the first DC correction.
US08804267B2	Disk drive predicting spindle motor failure by evaluating current draw relative to temperature A disk drive is disclosed comprising a head actuated over a disk, and a spindle motor operable to rotate the disk. A baseline relationship is generated between a baseline current draw of the spindle motor over a temperature range. An operating current draw of the spindle motor is measured and a corresponding operating temperature is measured. Failure of the spindle motor is predicted based on the operating current draw, the operating temperature, and the baseline relationship.
US08804265B2	Calibration of a resonance frequency filter Calibrating a frequency filter includes applying a series of input electrical signals at different frequencies to a shock sensor, using circuitry to identify a particular one of the frequencies as a resonance frequency of the shock sensor based on responses of the shock sensor to the series of input signals, and setting a center frequency of the notch filter equal to the particular frequency identified as the resonance frequency of the shock sensor.
US08804263B1	DC-offset adjustment for balanced embedded contact sensor Embedded contact sensor controls for use in arm electronics (AE) in a disk drive are described that provide for removing undesirable offsets between the measured voltage across the ECS resistor in the slider and the balance resistor in ECS amplifier in the arm electronics (AE), which allows increased amplification of the resulting adjusted signal without saturation. Embodiments include a Zero-Offset Circuit, which can be activated periodically or on demand to sample and hold the present DC offset voltage in the ECS amplifier signal and subtract the DC offset voltage from ECS amplifier signal. The adjusted signal can then be further amplified without saturation.
US08804259B1	Systems and methods for revising data in a signal read from a storage medium according to a calculated gain A system including an analog front end module, an equalizer module, a detector module, and a gain module. The analog front end module is configured to sample a signal read from a storage medium, convert the sampled signal into a digital signal, and output the digital signal. The equalizer module is configured to equalize the digital signal and output a data vector that corresponds to the equalized digital signal. The data vector represents data in the signal read from the storage medium. The detector module is configured to output a decision vector that corresponds to a noise-free ideal output vector of the decoded data vector. The gain module is configured to calculate a gain value based on the decision vector and the data vector, apply the gain value to the data vector, and output a revised data vector based on the data vector and the applied gain value.
US08804246B2	High brightness diode output methods and devices Devices and methods for maintaining the brightness of laser emitter bar outputs having multiple emitters for coupling and other applications. In some embodiments, at least one brightness enhancement optic may be used in combination with a beam reformatting optic.
US08804227B2	Electrophoretic display device and method for fabricating the same Disclosed is an electrophoretic display device and a fabrication method thereof, and the electrophoretic display device may include a thin-film transistor formed on a lower substrate, a pixel electrode connected to the thin-film transistor, side electrodes formed at periphery of the pixel electrode, a partition wall formed on the side electrode, fluid including an electrophoretic particles formed between the partition walls, and an upper substrate adhered on the lower substrate and formed with a common electrode on the rear surface thereof.
US08804225B2	Signal shaping circuit and light transmitting device A signal shaping circuit includes an operational circuit that provides weights to a first signal input to a first input element and a second signal input to a second input element, adds or subtracts the second signal to or from the first signal, and outputs a signal obtained by adding or subtracting the second signal to or from the first signal; a divider that divides the signal output from the operational circuit into signals, causes one of the divided signal to be input to the second input element, and outputs the other of the divided signal; a delay element that delays the signal output from the operational circuit and to be input to the divider or the signal output from the divider and to be input to the second input element; and an adjuster that adjusts at least one of the weights provided to the first and second signals.
US08804223B2	Light beam scanning device with a silicon mirror on a metal substrate An optical scanning device, having: a substrate main body; two cantilever beams protruded from the respective side portion of one side of the substrate main body; a mirror supported by torsion bars from the respective side, between the cantilever beams; a drive source to causes the substrate main body to vibrate; and a light source to project light onto the mirror, wherein a fixed end of the substrate main body is fixed to a supporting member, on the opposite side from the mirror side, and wherein the mirror resonantly vibrates according to vibration applied to the substrate by the drive source, thereby to change a direction of reflection light of the light projected onto the mirror from the light source according to the vibration of the mirror, characterized in that a Si mirror is attached to and fixed on the mirror.
US08804217B2	Image forming apparatus which performs calibration for maintaining image quality A reader unit A reads a pattern image formed on a first printing medium to obtain a first luminance value. A color processing unit converts into a density value using first conversion information. CPU creates an image processing condition LUTa based on the density value. A photo sensor reads a pattern image formed on an image carrier. CPU corrects LUTa based on a density value of the pattern image read by photo sensor. A printer unit forms a pattern image on a second printing medium different using the corrected LUTa. CPU determines second conversion information for the second printing medium based on a second luminance value from the pattern image on the second printing medium, the first luminance value and the first conversion information.
US08804203B2	Coded image processing system and method for controlling the same A system capable of processing an coded image stores first information including information indicating output time when an image has been output from an output apparatus and information indicating a user who has instructed the output apparatus to output the image in association with second information including information indicating an original output apparatus has output a source image of the image, information indicating output time when the source image has been output from the output apparatus, and information indicating a user who has instructed the original output apparatus to output the source image. The system searches for a coded image to acquire first information, and then displays the second information.
US08804194B2	Image forming apparatus and image forming method An image forming apparatus includes an image forming unit, a storage unit, an image processing unit and a control unit. The image processing unit (i) calculates a summed height of a color toner image formed on a sheet by summing up a height of the color toner image on the basis of input image data, (ii) calculates, on the basis of a target value for glossiness stored in the storage unit, a target total height of the color toner image and a clear toner image to realize the target value for glossiness, and (iii) calculates a height of the clear toner image by subtracting the summed height from the target total height. On the basis of the calculated height of the clear toner image, the control unit adjusts the height of the clear toner image formed on the sheet.
US08804193B2	Color conversion device, image-forming device, storing medium storing color conversion program and image-forming program and color conversion table A color conversion program including a grid point arranging part which arranges, between an input device represented by three values of RGB and four values of CMYK, grid points as correspondence of the RGB value of the input device and the CMYK value of the output device in a radial direction from a prescribed achromatic color axis to generate a radial color conversion table; and a color conversion table restructuring processing part which stacks, in the order of hue, a hue layer consisting of a surface of a hue and a surface of its complementary hue of the radial color conversion table to generate an orthogonal grid color conversion table in which the grids form an orthogonal grid.
US08804192B2	Image processing apparatus using threshold matrix of resolution higher than resolution of input image Disclosed is an image processing apparatus which uses a threshold matrix of a resolution higher than a resolution of an input image, the image processing apparatus including: a screen processing section which performs screen processing on an input image which is input; a matrix storage section which stores a threshold matrix of a resolution higher than a resolution of the input image; a threshold obtaining section which obtains a new threshold corresponding to each pixel of the input image based on a threshold of each cell composing the threshold matrix, wherein the screen processing section compares the pixel value of each pixel of the input image with the new threshold corresponding to each pixel of the input image obtained by the threshold obtaining section and generates a multivalue output image.
US08804191B2	Image processing apparatus and image processing program for selecting and displaying image data An image processing apparatus includes: a key operation unit including a plurality of keys; a display screen; a first storage unit that stores an image data; and a processor that performs a processing. The processing performed by the processor includes displaying a first image corresponding to the image data on the display screen; setting an upper end and a lower end in the first image displayed on the display screen based on a key input from the key operation unit to designate a range between the upper end and the lower end in the first image; selecting image data corresponding to the designated range in the first image; and displaying a second image corresponding to the selected image data on the display screen.
US08804190B2	Image processing method, image processing program, and information processing apparatus A method including the steps of obtaining an original image, generating a converted image by converting a gradation of a pixel of the original image into a prescribed gradations for an image forming apparatus to express, outputting a dot pattern image through a nozzle based on a predetermined dot pattern signal, generating nozzle characteristic information of the nozzle based on the dot pattern image, generating simulation information based on the converted image and the nozzle characteristic information, generating converted simulation information by converting the simulation information to the same gradation as that of the pixel of the original image, comparing the converted simulation information with the original image, and calculating an error between the original image and the converted simulation information.
US08804188B2	Computer-readable storage device storing page-layout program and information processing device A technique is presented for making effective use of sheets when the total number of pages to be printed on a sheet is changed after the number of pages per sheet was originally specified. In one aspect, the technique is implemented on an apparatus that accepts a specified number of pages per sheet, obtains a page group having a number of pages, determines whether the number of pages in the page group has changed, changes the specified number of pages per sheet when the number of pages in the page group has changed, and generates output data of the pages with the specified number of pages when the number of pages in the page group has not been changed, and generates the changed number of pages when the number has been changed.
US08804187B2	Image processing to superimpose code on a document image An image processing apparatus includes a composite image generator and a print controller. The composite image generator generates a composite image by superimposing, on a document image of a document represented by document data, two-dimensional code images individually corresponding to multiple document elements included in the document. The print controller causes a printer to print the composite image. The composite image generator determines positions of the two-dimensional code images corresponding to the document elements so that the positions do not overlap images of the document elements.
US08804180B2	Image forming apparatus In an image forming apparatus, a first deviation detection portion detects an amount of deviation of a sheet of paper in relation to a reference position of an edge of the sheet of paper. A control portion determines whether or not an amount of deviation detected by the first deviation detection portion exists within a moving adjustment range of a pair of registration rollers in the second control and performs a first control to correct the reference position of the edge of the sheet of gaper before the image is formed when the amount of deviation exceeds the moving adjustment range of the pair of registration rollers. A second deviation detection portion detects an amount of deviation of the sheet of paper just before the image is formed in relation to a reference position of the edge of the corrected sheet of paper.
US08804173B2	Apparatus management device and method for merging additional information identifiers into information acquisition requests An information processing apparatus includes a storing unit, a determining unit, and a merging unit. The storing unit stores control data including apparatus identifiers identifying communication apparatuses and requested information identifiers identifying information items specified in information acquisition requests for the communication apparatuses. The determining unit determines whether a specified communication apparatus specified in a newly-received information acquisition request is already registered in the control data. If the specified communication apparatus is already registered in the control data, the merging unit determines whether a requested information identifier specified in the newly-received information acquisition request is recorded in the control data for the specified communication apparatus. If the requested information identifier is not recorded in the control data, the merging unit adds the requested information identifier to a list of requested information identifiers associated with an information acquisition job for the specified communication apparatus.
US08804172B2	Non-transitory computer readable recording medium stored with printer driver updating program and printer driver updating method The printer driver updating program according to the invention causes a computer to execute a process comprising steps of confirming printer drivers for various different operating systems existing in the computer, acquiring versions of the printer drivers whose existences are confirmed, selecting an appropriate updating method corresponding to the acquired versions, and updating the printer driver according to the selected updating method.
US08804170B2	Printing system, print data generating device, multi-function device, and non-transitory recording medium In a printing system, a print data generating unit generates first print data of an original image that includes a bar code storing a disposing position and a particular sub-image. The particular sub-image is disposed at the disposing position when the original image is read and processed. A first printing unit prints the original image on a first recording medium based on the first print data. A controller controls a reading unit to read the original image printed on the first recording medium and to retrieve the disposing position and the particular sub-image from the bar code. The controller generates second print data of a processed image in which the retrieved particular sub-image is disposed at the retrieved disposing position. The controller controls the second printing unit to print the processed image on a second recording medium based on the second print data.
US08804169B2	Printing method, image forming apparatus, and web server A printing method includes a printing program causing: a web server to integrate a plurality of contents with each other to thereby generate a web page, and to transmit the generated web page to a client terminal via a network; the client terminal to transmit a request for printing the web page from a browser screen to the web server; the web server to call a print service of an image forming apparatus in response to the request; the image forming apparatus to transmit to the web server a request for generating a print page corresponding to the web page by the print service; the web server to integrate the plurality of contents with each other to thereby generate the print page and to transmit the generated print page; and the image forming apparatus to receive and to print the print page by the print service.
US08804168B2	System, server, image forming apparatus, system control method, and storage medium The present invention provides a server which distributes firmware to an image forming apparatus, the server including a determination unit configured to determine whether the firmware distributed to the image forming apparatus is released now, and a transmission unit configured to, when the firmware determined by the determination unit not to be released now has not been applied to the image forming apparatus, transmit instruction information containing an instruction to prevent application of the firmware to the image forming apparatus, and when the firmware determined by the determination unit not to be released now has been applied to the image forming apparatus, transmit instruction information containing an instruction to obtain either of alternative firmware and downgrade firmware to the firmware and apply the obtained firmware.
US08804166B2	Image processing apparatus and method for controlling image processing system The present invention can provide an image processing system in which a job setting screen is displayed on a local apparatus in consideration of the capabilities of the local apparatus and a remote apparatus when a plurality of image processing apparatuses cooperatively execute a job. To accomplish this, in the present image processing system, the local apparatus acquires function information on the remote apparatus when the plurality of image processing apparatuses executes one job in cooperation. Furthermore, the local apparatus controls the display contents of a setting screen used when an operator sets a job setting in order to restrict a job function based on the acquired function information and function information on the local apparatus itself.
US08804162B2	Information processing apparatus, printing system, monitoring method, program, and storage medium A printing device monitoring method includes sequentially registering, in a monitored device queue, printing devices to which print jobs are to be output, monitoring the printing devices in accordance with the order of registration in the monitored device queue, determining if predetermined conditions are satisfied (S1803), interrupting monitoring of a printing device on the basis of the determination (S1806), and re-registering, in the monitored device queue, the printing device whose monitoring was interrupted.
US08804159B2	Apparatus, system, and method of image processing, and recording medium storing image processing program An image input apparatus determines whether an image input apparatus that has sent image data is an authorized sender when storing of the image data to a specific storage area is detected. According to a determination result indicating that the image input apparatus is the authorized sender, the image input apparatus applying one or more processes to the image data.
US08804155B2	Print job information managing device, print job information managing method, and recording medium A print job information managing device of the present invention has: an authentication request instruction adding section that adds, to a print job, an authentication request instruction that expresses whether or not authentication is needed at a time of printing; a transmitting section that transmits the print job to a printer; and a notification section that, when the authentication request instruction has been added to the print job transmitted by the transmitting section, notifies a printing recipient that the print job has been transmitted.
US08804153B2	Method for printing on an imaging device A method for printing a print ready file transmitted by a print client on an imaging device includes creating a print data file associated with the print ready file, where the print data file includes information pertaining to the print ready file and the imaging device. In the method, the print data file is encrypted and transmitted to the imaging device. In addition, the print data file is authenticated in the imaging device and printing of the print ready file is enabled if the print data file is determined to be authentic and the print ready file is invalidated if the print data file is determined to be inauthentic. Also disclosed is an imaging device configured to perform the aforementioned method.
US08804152B2	Image forming apparatus with copy restriction function A method for an image forming apparatus includes scanning a document containing a copy-forgery-inhibited pattern having a latent-image part to be highlighted when the copy-forgery-inhibited pattern is copied and copy restriction information for restricting the number of times of copying, decoding the copy restriction information contained in the document image scanned, removing the copy-forgery-inhibited pattern from the document image scanned, updating the decoded copy restriction information, and forming, on a sheet, the updated copy restriction information with the image which the copy-forgery-inhibited pattern has been removed from the document image.
US08804149B2	Image forming apparatus with plurality of optical scanning devices An image forming apparatus includes a plurality of optical scanning devices, a mode receiver, a temperature condition judger and a temperature adjuster. In the case of forming an image using one optical scanning device, the temperature adjuster drives motors of unused optical scanning devices at a first rotation speed if a predetermined temperature condition is satisfied and drives the motors of the unused optical scanning devices at a second rotation speed slower than the first rotation speed if image formation is finished during the drive at the first rotation speed.
US08804146B2	Device, control device, control system, and non-transitory computer readable medium A device includes a first receiving unit that receives a supply voltage supplied from a control device, a second receiving unit that receives from the control device a control signal for executing a predetermined operation in each functional unit, a setting unit that sets the predetermined operation in a setting section when the second receiving unit receives the control signal indicating the predetermined operation to be executed in each functional unit when the supply voltage is in an OFF state, and a controller that performs control to execute the predetermined operation, which is set in the setting unit, in each functional unit when the supply voltage received by the first receiving unit is in an OFF state.
US08804145B2	Image processing apparatus, image processing method, and storage medium for realizing high-speed rendering processing A method for image processing executed by an image processing apparatus includes sequentially receiving PDL data and transferring a figure included in the PDL data to processing in a subsequent stage, assigning edge extraction processing as a unit of processing for extracting edge information for each transferred figure, merging the edge information extracted from each figure, spooling the merged data in a tile format as intermediate data, and reading out the intermediate data in the tile format from spooling process and performing processing on each tile to generate a pixel from the intermediate data.
US08804143B2	Devices and methods for performing operations on image data stored in an external storage device A technique of directly and simply operating image data stored in an external storage device using a camera is provided. To accomplish this, an image processing device connectable to a network, comprises a connection unit configured to connect to an imaging device, an acquisition unit configured to acquire image data captured by the imaging device from an external device on the network, in accordance with a user operation on the imaging device, and a display control unit configured to display the image data acquired by the acquisition unit and image data stored in the imaging device in accordance with a display unit of the imaging device.
US08804142B2	Method, device, and computer-readable medium for determining and implementing changes in the machine settings of a print processing machine A method, a device, and a computer readable medium may be provided for operating a print processing machine. The print processing machine may have a gross capacity (BP), a net capacity (NP), and/or a number (N) of devices in communication with the print processing machine. The net capacity (NP) may be computed as a function of the gross capacity (BP), the number (N) of devices, a stop rate (SR), a time interval for each stop (TN) and an error rate (FR) according to NP=[1−(BP·SR·N·TN)]·BP−(BP·FR·N). Limit values for errors contained in the stop rate (SR) and/or the error rate (FR) may be received. A maximum value may be determined for the net capacity (NP) by varying the gross capacity (BP) and/or the number (N) of devices without exceeding the limit values. The gross capacity (BP) of the print processing machine and the number (N) of devices may be adjusted to achieve the previously determined maximum value for the net capacity (NP).
US08804141B2	Character output device, character output method and computer readable medium A character output device includes: a character direction specification unit that specifies a drawing direction of characters for each processing-target region of a processing-target page; a character rotation determination unit that determines as to whether the processing-target page rotates or not based on a relation between the specified drawing direction and a direction of an output medium; and an output unit that performs an output processing based on the determination by the character rotation determination unit.
US08804138B2	Coating dimension measuring apparatus A coating dimension measuring apparatus may include: a camera that is positioned at a prescribed position distanced from a sheet to capture an image of a coating dimension of the sheet; a roller configured to transport the sheet; a scale that is disposed along a lengthwise direction of the roller to perform numerical calibration of the coating dimension; a scale holding unit configured to hold the scale over the roller, the scale holding unit being disposed so as to enable free insertion and removal of the scale.
US08804133B2	Method and system of adjusting a field of view of an interferometric imaging device A method of imaging at least a part of an object. The method comprises splitting electro-magnetic radiation to first and second portions, propagating the first and second portions, spectrally dispersing the first portion toward the part and the second portion toward a reference element, combining between reflections of the spectrally dispersed first and second portions to produce an interference signal, capturing an image of the part from the interference, and adjusting at least one of a tilt of said image plane and a curvature of the image by changing a deviation between the phase of at least one spectral component of the first portion and the phase of at least one spectral component of the second portion.
US08804132B1	Shearography from a moving platform A shearography system that operates while moving at significant speeds over a surface is disclosed. Two lasers are utilized and the distance between the two lasers is adjusted based on the altitude of the aircraft on which the shearography equipment is located, the speed of the aircraft, the distance between two lasers in the shearography equipment lasers, and the time difference between the laser pulses from each of the two lasers. The adjustment of the distance between the two lasers causes the angles of incidence and reflection to be the same for two sequential images and permits the moving shearography to work.
US08804131B2	Optical angle-measuring device with combined radial-circular grating In an optical angle-measuring device for ascertaining the relative movement between at least one scanning grating and a graduated disk having at least one measuring graduation, the scanning grating is in the form of a linear scanning grating, and the graduated disk includes a first and a second combined radial-circular grating as measuring graduation, and has a mirror. An incident beam of rays is initially split at the scanning grating into two partial beams of rays that then propagate in the direction of the first combined radial-circular grating and are diffracted there, then propagate in the direction of the mirror and are reflected there in the direction of the second combined radial-circular grating, subsequently propagate in the direction of the second combined radial-circular grating and are diffracted there, and then propagate in the direction of the scanning grating, where a superposition of the partial beams of rays results.
US08804129B2	Method and apparatus for performing film thickness measurements using white light scanning interferometry The invention relates to a method and an apparatus for measuring the thickness of a transparent film by broad band interferometry, comprising the steps of preparing a correlogram of the film by an interferometer, applying a Fourier transformation to said correlogram to obtain a Fourier phase function, removing a linear component thereof, applying a second integral transformation to the remaining non-linear component to obtain an integral amplitude function of said non-linear component, identifying the peak location of said integral amplitude function and determining the thickness of the film as the double value of the abscissa at said peak location considering a refractive index of a film which is dependent on wavelength. The last two steps may be replaced by identifying the peak locations of said integral amplitude function and determining the thickness of the films as the double values of the abscissas at the peak locations.
US08804128B2	Interferometer with a space-variant polarization converter to produce radially and azimuthally polarized beams An interferometer includes an optical assembly for directing an input optical field, a space-variant polarization converter, and an analyzer. The optical assembly is configured and operable to produce first and second spatially separated optical fields of incident coherent radiation of substantially the same intensity and different polarizations and to define first and second spatially separated optical paths for propagation of said first and second optical fields thereby allowing interaction between the first optical field and an element affecting a phase thereof in said first optical path. The space-variant polarization converter is accommodated in said combined path and being configured and operable to simultaneously apply space-variant polarization conversion to two beams corresponding to combined first and second optical fields having different polarizations and produce radially and azimuthally polarized beams respectively. The analyzer is located downstream of said polarization converter.
US08804124B1	Method and apparatus for measuring protein quality An array of light sources (lasers) is positioned so that each of the light sources emits a beam that is directed through a sedimenting column of ground grain. Photodetectors (photodiodes) positioned opposite the light sources receive the light beams emerging from the sedimenting column and convert the beams into electronic signals. A computer processor processes the electronic signals and generates values for protein quality.
US08804118B2	Spectral module A spectral module 1 comprises a substrate 2 for transmitting light L1 incident thereon from a front face 2a, a lens unit 3 for transmitting the light L1 incident on the substrate 2, a spectroscopic unit 4 for reflecting and spectrally resolving the light L1 incident on the lens unit 3, and a photodetector 5 for detecting light L2 reflected by the spectroscopic unit 4. The substrate 2 is provided with a recess 19 having a predetermined positional relationship with alignment marks 12a, 12b and the like serving as a reference unit for positioning the photodetector 5, while the lens unit 3 is mated with the recess 19. The spectral module 1 achieves passive alignment between the spectroscopic unit 4 and photodetector 5 when the lens unit 3 is simply mated with the recess 19.
US08804114B2	Optical cup The present invention relates to a system for conducting the identification and quantification of micro-organisms, e.g., bacteria in biological samples. More particularly, the invention relates to a system comprising a disposable cartridge and an optical cup or cuvette having a tapered surface; wherein the walls are angled to allow for better coating and better striations of the light, an optics system including an optical reader and a thermal controller; an optical analyzer; a cooling system; and an improved spectrometer. The system may utilize the disposable cartridge in the sample processor and the optical cup or cuvette in the optical analyzer.
US08804108B2	Inspection method and inspection apparatus This application relates to an inspection apparatus including: a stage which holds a specimen; an illumination optical system which illuminates a surface of the specimen held on the stage, with illumination light; a dark-field optical system which detects scattered light generated by the illumination light with which the specimen is illuminated; a photoelectric converter which converts the scattered light detected by the dark-field optical system, into an electric signal; an A/D converter which converts the electric signal obtained by conversion by the photoelectric converter, into a digital signal; a judgement unit which determines the dimension of a foreign substance on the surface of the specimen on the basis of a magnitude of the scattered light from the foreign substance; and a signal processor which determines an inspection condition by use of information on the scattered light from the specimen surface.
US08804103B2	Velocity measuring system A laser Doppler velocimeter uses self-mixing amplification of backreflections from scatterers below the surface of a flow. A time domain signal is divided into segments that are roughly equal to a transit time of particles through a focus of a laser beam. The segments are connected to a frequency domain through the use of an FFT algorithm to produce frequency domain data segments. Signal-to-noise ratio is enhanced through signal processing techniques using the segments to produce a final enhanced signal spectrum.
US08804097B2	Lithographic apparatus and device manufacturing method A lithographic projection apparatus is disclosed for use with an immersion liquid positioned between the projection system and a substrate. Several methods and mechanism are disclosed to protect components of the projection system, substrate table and a liquid confinement system. These include providing a protective coating on a final element of the projection system as well as providing one or more sacrificial bodies upstream of the components. A two component final optical element of CaF2 is also disclosed.
US08804092B2	Modulation element comprising a mesogenic modulation medium having a cybotactic nematic phase that shows two distinct electro-optical transitions at one single temperature The present invention relates to modulation elements for electromagnetic radiation and to modulation devices and systems comprising these devices, such as e.g. television screens and computer monitors, as well as to micrometer wave components. The modulation elements according to the invention comprise a mesogenic modulation medium with a dielectric anisotropy, which shows two or more distinct transitions upon application of an electric field. The mesogenic modulation media used in the modulation elements for electromagnetic radiation are also a subject of the present invention.
US08804090B2	Methods for creating a minimally visible seal along the edge of a flat panel display Methods are provided for sealing edges of resized electronic displays to minimize the size of the seal area as viewed from the front of the display. A target portion of a display is separated from an excess portion, creating an exposing edge. The exposed edge is sealed using a ribbon-like material with adhesive attached across the ends of the plates of the target portion to maintain and seal the gap between the two substrates. It may be desirable to allow two similarly prepared displays to have the resealed edge abutted against each other a minimal mullion between them. The size of the mullion is further minimized by providing pixels to the edge of the substrate being sealed, e.g., such that the active area of the display extends all the way to the edge(s) being abutted together.
US08804089B2	Method of manufacturing a display device comprising a step of simultaneously polishing a second substrate and a semiconductor chip to have the same thickness as each other A display device including: a first substrate with a pixel switch and drivers mounted thereon; a second substrate disposed in facing relation to the first substrate; a material layer held between the first substrate and the second substrate and having peripheral edges sealed by a seal member, the material layer having an electrooptical effect; and a semiconductor chip mounted as a COG component on the first substrate, the semiconductor chip having a control system configured to control the drivers; wherein the semiconductor chip having a thickness equal to the total thickness of the seal member and the second substrate or larger than the thickness of the seal member and smaller than the total thickness.
US08804088B2	Backlight unit and liquid crystal display device having the same A backlight unit is provided. The backlight unit includes: a mold frame having a predetermined receiving space formed therein; a light guide plate disposed in the receiving space of the mold frame, and having an inclined surface formed on one side of the top surface so as to be inclined toward the inner side; a light source disposed between the light guide plate and the mold frame to emit light to the light guide plate; and a flexible printed circuit board, on which the light source is mounted, and which is supported in contact with the top surface of the light guide plate, wherein a stepped portion is formed on one end of the light guide plate, including a flat adhesion surface positioned at a height lower than one end face of the light guide plate.
US08804087B2	Liquid crystal display device with relationship of a width of conductive thermocompression bonding tape to a width of a bonding thereof to an external conductive film and to an earth pad An object of the present invention is to reliably ground an external conductive film formed on an opposed substrate to secure a stable shield effect in an IPS-type liquid crystal display device. An external conductive film formed on an opposed substrate is connected to an earth pad formed on a TFT substrate through a conductive thermocompression bonding tape. The conductive thermocompression bonding tape is connected by a thermocompression bonding head to form a conductive area. The width of the conductive area on the opposed substrate is made larger than the width of the conductive area on the TFT substrate to prevent the conductive thermocompression bonding tape from peeling off from the opposed substrate. Accordingly, the external conductive film of the opposed substrate is reliably grounded.
US08804084B2	Liquid crystal display panel A liquid crystal display panel is provides and includes a pair of substrates arranged face to face so as to sandwich a liquid crystal layer. The liquid crystal device includes on one of the pair of substrates: a lower electrode; an upper electrode formed on a surface of the lower substrate through an insulating layer, in which plural slits are formed in each sub-pixel; and an alignment film formed so as to cover a surface of the upper electrode and the insulating layer. The plural slits have different widths at both ends of slits in a longitudinal direction.
US08804080B2	Liquid crystal display device and method of fabricating thereof Disclosed is a liquid crystal display (LCD) device capable of enhancing an aperture ratio and a transmittance ratio. The LCD device includes a first substrate and a second substrate; a plurality of gate lines formed on the first substrate, each gate line having a first region and a second region with the width less than that of the first region; a plurality of data lines disposed so as to be perpendicular to the gate lines to define a plurality of pixel regions; a thin film transistor (TFT) formed on the first region of the gate line; a common electrode and a pixel electrode formed on the first substrate, and forming an electric field; a black matrix and a color filter layer formed on the second substrate; and a liquid crystal (LC) layer formed between the first substrate and the second substrate, wherein the first regions and the second regions of the gate lines are alternately disposed in an extending direction of the gate lines and in an extending direction of the data lines, and wherein two TFTs are formed on the first region of the gate line corresponding to the pixel region, two TFTS being respectively connected to pixel electrodes of two pixel regions adjacent to each other based on the gate line.
US08804079B2	Liquid crystal display device A liquid crystal display device including a first and second substrates and a liquid crystal layer. The first substrate includes a plurality of picture elements, and at least one of the plurality of picture elements includes: a switching element; a plurality of gate bus lines extending in a first direction and electrically connected to the switching element; a plurality of data bus lines extending in a second direction and electrically connected to the switching element; a first sub picture element electrode and a second sub picture element electrode disposed adjacent to the first sub picture element electrode with a gap therebetween, and a control electrode overlapping both the first and second sub picture element electrodes. The control electrode extends in the second direction. Each of the first and second sub picture element electrodes includes a cross-shaped connecting electrode part and microelectrode parts extending from the connecting electrode part.
US08804075B2	Color filter and color filter manufacturing method A color filter having excellent display quality is provided by a continuous exposure method using a compact photomask. The color filter includes: a substrate; a black matrix formed on the substrate, for dividing the substrate into rectangular display regions in which the plurality of pixels are arrayed, and non-display regions surrounding the display regions; a stripe pattern; a plurality of columnar spacers disposed in the display regions; and a plurality of dummy columnar spacers. The stripe pattern includes a plurality of colored layers extending in one direction. Each colored layer intersects with a pair of sides of the display region in a direction perpendicular to the direction in which the colored layers extend. The thickness of both end portions of each colored layer disposed on the non-display region is not uniform. The dummy columnar spacers are disposed in portions of the non-display regions, where the colored layers are absent.
US08804074B2	Liquid crystal display device A liquid crystal display device including: a liquid crystal display element that includes a liquid crystal layer, and an upper substrate and a lower substrate opposed to each other via the liquid crystal layer, a plurality of liquid crystal display elements being stacked; wherein a condensing direction of a reflected light by directional control in at least one of the liquid crystal display elements is different from a condensing direction of a reflected light by directional control in at least one of another liquid crystal display elements.
US08804071B2	Liquid crystal display device A light source section provided in a backlight unit has a smaller width in a direction perpendicular to a length direction of the light source section than a width in the same direction of the liquid crystal panel. A plurality of LED modules are arranged along the length direction of the light source section. The LED modules are respectively assigned to areas of the liquid crystal panel, which are extended in the width direction of the light source section. Lenses are respectively disposed over the LED modules and expand light toward the areas. A control device controls each of the plurality of light sources separately or each of groups into which the plurality of light sources are divided, separately. Accordingly, it is possible to improve a contrast of a display screen, while reducing the number of light sources.
US08804068B2	Liquid crystal display device In order to fix lenses of light emitting diodes stably without impairing heat dissipation performance in a liquid crystal display device, the liquid crystal display device includes: a liquid crystal panel; and a light emitting diode substrate (7), which is disposed on a rear surface side of the liquid crystal panel and includes: a plurality of light emitting diode elements (22) disposed along a longitudinal direction; lenses (20) each including a plurality of legs (21), the lenses being disposed on the liquid crystal panel side of the light emitting diode elements (22); and electrodes (23) which are formed on a surface of the light emitting diode substrate (7) and are electrically connected to the light emitting diode elements (22), and all the legs (21) for fixing the lenses (20) to the light emitting diode substrate (7) are disposed directly above the electrodes (23).
US08804062B2	Thin film transistor substrate, display apparatus utilizing same, and related manufacturing methods A thin film transistor and a display apparatus include: a substrate; a plurality of first conductive lines formed on the substrate, each including a main body and a curved portion connected to the main body; a plurality of second conductive lines crossing the curved portions of the first conductive lines; and a plurality of pixel electrodes formed adjacent to the first conductive lines. The plurality of pixel electrodes includes a first pixel electrode disposed toward a side of one first conductive line, and a second pixel electrode disposed toward the other side of the one first conductive line. The display apparatus also includes an intermediate layer connected to the pixel electrodes for displaying images and an opposite electrode formed thereon.
US08804058B2	Display device including compensation capacitors with different capacitance values An exemplary display device providing touch function includes scanning lines and data lines thereby defining lots of sub-pixel units. Each sub-pixel unit includes a pixel electrode, a storage capacitor, a compensation capacitor connected between the pixel electrode and a corresponding scanning line. In each pixel unit defined by n number adjacent sub-pixel units, both of a ratio of capacitance values between the storage capacitors formed in the corresponding sub-pixel units and a ratio of capacitance values between the corresponding compensation capacitors are respectively substantially equal to a ratio of areas between the corresponding pixel electrodes.
US08804057B2	3D display panel and 3D display system The present invention provides a 3D display panel and a 3D display system. The system comprises the 3D display panel and polarizer glasses. A first optical retardation value of a quarter wave (λ/4) retarder film of the 3D display panel can be designed according to a second optical retardation value of the polarizer glasses. The present invention can improve a narrow viewing angle problem existing in the conventional 3D display.
US08804054B2	Image processing apparatus, image processing method, and projector A projector that acquires evaluation values representing how well projection light is brought into focus on a screen, outputs the acquired evaluation values and a maximum value of the acquired evaluation values, and updates the maximum value to a new value at a predetermined timing.
US08804053B2	Display apparatus, display system, and method for displaying image thereof A display apparatus, display system, and method for displaying images thereof are provided. The display apparatus includes an image receiving unit which is configured to receive an image signal; an image processing unit which is configured to divide the image signal into a main image signal and an additional image signal and to process the main image signal and the additional image signal; a display unit which is configured to display the processed image signals; an image projection unit which is configured to project the processed image signals; and a control unit which controls to provide the processed main image signal to the display unit and the processed additional image signal to the image projection unit.
US08804052B2	System and method for filtering a television channel list based on channel characteristics A system and method for automatically managing television channel lists is disclosed. Pixel resolutions characteristics of a plurality of televisions channels are analyzed. One or more high definition television (HDTV) channels having HD pixel resolutions from the plurality of available television channels are selected. The one or more selected HDTV channels are stored in a HD channel list.
US08804049B2	Wireless communication receiver, a wireless communication receiving method and a television receiver The present invention relates to a wireless communication receiver, wireless communication receiving method and television receiver. The wireless communication receiver has signal processing circuits including a first signal processing circuit and a second signal processing circuit, a data storage module, and a deinterleaver. The first signal processing circuit receives a wireless communication signal and then performs a first signal processing to generate a first output data according to the wireless communication signal. The deinterleaver stores the first output data into the data storage module, and retrieves a deinterleaved data corresponding to the first output signal from the data storage module. The second signal processing circuit performs a second signal processing to generate a second output data according to the deinterleaved data. The data storage module is shared by the deinterleaver and at least one of the signal processing circuits for data storage, thereby effectively reducing the production cost.
US08804048B2	Motion-adaptive alternate gamma drive for LCD Systems and methods are provided for reducing motion blur in a video display. A system for reducing motion blur in a video display may include a motion detection circuit and a luminance control circuit. The motion detection circuit may be used to compare a plurality of frames in a video signal to generate a motion detection output signal that indicates whether the video signal includes an image that is in motion or a still image. The luminance control circuit may be used to vary luminance levels between two or more consecutive frames of the video signal when the motion detection output signal indicates that the video signal includes an image that is in motion. The luminance control circuit further may also be used to discontinue varying the luminance levels of the video signal when the motion detection output signal indicates that the video signal includes a still image.
US08804047B2	Method and apparatus for enabling the display of a text service upon audio muting A method for controlling two devices, separated from each other, during an audio muting mode operation. A control device causes an audio device to become muted during the audio muting mode. The control device also causes a video device to output a text service during the duration of the audio muting mode. Preferably, the text service corresponds to the audio portion of a media service.
US08804046B1	Methods and systems for detection of chroma dropouts in video Systems and methods for detecting chroma dropout errors in one or more fields associated with various video frames are provided. Pixels associated with a current field are divided into a set of pixel pairs. Co-occurrences matrices are calculated for previous and subsequent fields. A first pixel pair associated with the current field is selected. First and second set of entries are selected from the co-occurrence matrices corresponding to the previous and subsequent fields. The first pixel pair is searched in the first and second set of entries. An absence of the first pixel pair in the first and second set of entries satisfies a first criterion of chroma dropout error. Other criteria in addition to the first criterion are evaluated to label the first pixel pair as erroneous.
US08804042B2	Preemptive preloading of television program data Digital television channels are preemptively cached based on a modeling of a user to reduce delays while switching channels. A current television channel is selected using a first tuner. A future television channel selection of the user is then predicted based on a modeling of the user. The recorded content of the predicted future television channel is preemptively cached using a second tuner. A buffer of the recorded content of the predicted future television channel is displayed when the user switches from the current television channel to the predicted future television channel. The modeling of the user is updated and stored in storage.
US08804040B2	Shared memory multi video channel display apparatus and methods The invention includes a system and the associated method for decoding multiple video signals. The video signals may be component video, composite video or s-video signals each having multiple portions using a multimode video decoder. A selection stage may combine the multiple video signals and select some of their video signal portions for processing. The selection stage may time-multiplex some of the video signal portions. An analog to digital conversion stage may be shared by the time-multiplexing of the video signals. A decoder stage may decode the various signal portions and provide decoded output video signals. These feature may reduce the overall cost of the system. Various clock signals may be used to operate various stages of a multimode video decoder. Some of the clock signals may run at different frequencies and others may operate at a different phase.
US08804034B2	Apparatus and method for converting image in an image processing system A method and apparatus for converting an image in an image processing system are provided, in which if a plurality of low-definition video frames are used for converting a low-definition picture to a high-definition picture, a weight is determined for each of the plurality of low-definition video frames, and one of two image fields that form a high-definition video frame is generated using the plurality of low-definition video frames according to the weights of the plurality of low-definition video frames.
US08804033B2	Preservation/degradation of video/audio aspects of a data stream In one aspect, a method related to data management. In addition, other method, system, and program product aspects are described in the claims, drawings, and/or text forming a part of the present application.
US08804032B2	Wafer level camera module with snap-in latch An apparatus includes an image sensor module with a lens stack disposed on the image sensor module. A protective tube is disposed on the image sensor module and encloses the lens stack. The protective tube includes an outer wall having a snap-in latch element disposed thereon. A metal housing encloses the protective tube. The metal housing includes a housing foot and inner wall having an opposite snap-in latch element disposed thereon. The image sensor module is adapted to be secured between the housing foot of the metal housing and the protective tube when the opposite snap-in latch element of the metal housing is engaged with the snap-in latch element of the protective tube.
US08804026B1	Mobile device and method for controlling the same A portable device and a method for controlling the same are disclosed, which senses an image including a pattern code. The mobile device includes a camera unit configured to sense an image; a display unit configured to display the image; a sensor unit configured to detect an input signal and transmit the detected input signal to a processor; and the processor configured to control the display unit, the camera unit and the sensor unit, wherein the processor further configured to: provide an image capturing interface, wherein the image capturing interface displays the image sensed by the camera unit and an image capturing trigger for storing the image, simultaneously display a pattern code trigger for storing information of a pattern code in the image capturing interface only when the pattern code is recognized from the image.
US08804025B2	Signal processing device and imaging device According to one embodiment, a signal processing device includes a high spatial frequency range component evaluation unit configured to evaluate a high spatial frequency range component of each of basic colors for each of divided regions for an image picked up by an image pickup device, the divided regions being obtained by dividing an imaging surface of the image pickup device into a plurality of regions, a subject distance estimation unit configured to estimate a subject distance for each of the divided regions on the basis of the high spatial frequency range component, a filter coefficient generating unit configured to generate a filter coefficient for each of the divided regions on the basis of the subject distance, and a filter operation unit configured to perform a filter operation on the high spatial frequency range component by use of the filter coefficient.
US08804021B2	Method, apparatus and system for providing improved full well capacity in an image sensor pixel Techniques and mechanisms for improving full well capacity for pixel structures in an image sensor. In an embodiment, a first pixel structure of the image sensor includes an implant region, where a skew of the implant region corresponds to an implant angle, and a second pixel structure of the image sensor includes a transfer gate. In another embodiment, an offset of the implant region of the first pixel structure from the transfer gate of the second pixel structure corresponds to the implant angle.
US08804018B2	Solid-state image pickup apparatus for receiving signals from odd-numbered and even-number columns A solid-state image pickup apparatus includes a storage, first and second common lines, a first block line that is disposed between the storage and the first common line and receives a signal from an odd-numbered column, a second block line that is disposed between the storage and the second common line and receives a signal from an even-numbered column, first switches for controlling connections between the storage and the first block line, second switches for controlling connections between the storage and the second block line, first control lines for the first switches, second control lines for the second switches, a first lead line for transmitting a signal from the first block line to the first common line, a second lead line for transmitting a signal from the second block line to the second common line, and a scanning unit for supplying pulses to the first and second control lines.
US08804015B2	Color imaging device A color filter array includes a basic array pattern constituted by a square array pattern that corresponds to 5×5 pixels, and the basic array pattern is repeatedly arranged in horizontal and vertical directions. In the basic array pattern, the G filters that are brightness system pixels are arranged on at least the both diagonal lines. As a result, the G filter is arranged in each line of horizontal, vertical, and diagonal directions of the color filter array, and the R and B filters are arranged in each line of the horizontal and vertical directions of the color filter array. In addition, a ratio of the number of G pixels that help most to obtain a brightness signal of the basic array pattern is greater than each ratio of the number of R pixels and the number of B pixels that correspond to the other colors, thereby executing demosaic processing effectively.
US08804014B2	Imaging device for reducing color moire An imaging device includes an imagine lens, an imaging sensor having a color filter array with color filters of a plurality of colors having a plurality of pixels which are arranged on a light-receiving surface, a computing section obtaining a pixel value of an objective pixel by adding pixel values of a plurality of adjacent pixels which are adjacent to the objective pixel and which have one of the color filters of same color as the objective pixel among pixel values output from the imaging sensor, and a control section making the computing section compute, while shifting the objective pixel one by one in one direction, a pixel row formed of pixel values of the objective pixel in the one direction with respect to each predetermined pixel width in other direction, and generating an image thinned out at the predetermined pixel width in the other direction.
US08804012B2	Image processing apparatus, image processing method, and program for executing sensitivity difference correction processing Provided are an apparatus and method for executing sensitivity difference correction processing of an image signal, which is generated by a single plate-type image sensor through a color filter. The sensitivity difference correction is executed for Gr and Gb signals included the image signal, for example, an RGB signal, which is generated by the single plate-type image sensor through the color filter. A pixel value of a color filter unit which has the same color as a correction target pixel and is present in surroundings of the correction target pixel is acquired. An additional value is calculated by adding a difference between weighted mean pixel values “a” and “b” of two kinds of pixel groups “A” and “B” classified according to positions of pixels to the pixel value of the correction target pixel in which the weighted mean values correspond to distances of the pixel groups from the correction target pixel. A mean value of the pixel value of the correction target pixel and the additional value is calculated as a corrected pixel value of the correction target pixel.
US08804010B2	Image processing apparatus, imaging apparatus, image processing method and storage medium storing image processing program An image processing apparatus for displaying a live view image obtained by implementing special effect processing on an image data on a monitor comprises an image processing unit that implements a plurality of types of special effect processing on the image data to generate a plurality of sets of special effect image data corresponding respectively to the plurality of types of special effect processing, and a control unit that displays the plurality of sets of special effect image data on the monitor while switching the plurality of sets of special effect image data automatically in time series.
US08804008B2	Data processing apparatus and method of controlling same In a data processing apparatus having a plurality of card slots in which memory cards are removably inserted, it is determined, with regard to each of the plurality of card slots, whether a memory card that has been inserted into the slot is a wireless card having a wireless communication function. In a case where it is determined that a memory card that has been inserted into a first card slot among the plurality of card slots is the wireless card, the wireless communication function of the wireless card is enabled. In a case where it is determined that a memory card that has been inserted into a card slot other than the first card slot is the wireless card, the wireless communication function of the wireless card is disabled.
US08804007B2	Information processing apparatus and control method therefor There is provided an information processing apparatus comprising: a storage unit configured to store log data, which indicate locations along a path of movement, and image data, wherein the log data contains a plurality of pairs of position information and time information and wherein the image data contains time information and position information indicating a position where an image is captured; and a generation unit configured to generate interpolated log data which contains the plurality of pairs contained in the log data and the pair of position information and time information contained in the image data.
US08804004B2	Imaging apparatus, image control method, and storage medium storing program A setting unit selects and sets one of a plurality of commercial power frequencies. A frame rate setting unit sets a frame rate corresponding to the commercial power frequency set by the setting unit. A control unit controls an imaging unit such that imaging is carried out at the frame rate set by the frame rate setting unit to thereby acquire image data successively. A detection unit detects a scanning line part at which luminance changes to differ between image data items successively acquired by the control unit. A changing unit changes the commercial power frequency set by the setting unit in accordance with a detection result obtained by the detection unit.
US08804002B2	Display control device A display control device includes an image data generating section and a control section. The image data generating section is configured to perform generation processing for generating image data in a predetermined processing sequence for each of a plurality of predetermined data units of the image data. The control section is configured to control a display unit to execute display processing based on the image data in the processing sequence for each of the predetermined data units. The control section is configured to control the display unit so that the longer a first time relating to the generation processing for one of the predetermined data units of the image data is, the longer a second time until the display processing starts for the one of the predetermined data units of the image data is.
US08803998B2	Image optimization system and method for optimizing images In a system and method for optimizing images, a digital image of an object is captured by an image capturing device, and a standard image of the object is obtained from a storage system of a computing device. The system calculates an image average energy density (IAED) value of the digital image based on RGB (red, green, blue) channels of the digital image, and calculates an IAED value of the standard image based on RGB channels of the standard image. The system is further calculates a difference between the IAED value of the digital image and the IAED value of the standard image, and applies any difference to optimize every pixel point of the digital image to generate optimized pixel points. The system integrates all the optimized pixel points or original pixel points to generate an optimized image for display.
US08803997B2	Method and device for controlling remote capturing of an image based on detection of a predetermined change in the image A portable telephone is provided with a camera module (13) for outputting a captured image as image information, a memory (105) for storing the image information, a face registration unit (504) for holding information relating to a face image, a face extraction unit (501), a face parameter extraction unit (502), and a matching determination unit (505) which serve as the configuration for detecting the face image held in the face registration unit (504) from the captured image, and an image-capturing control unit (506) for executing control processing for image capturing. The image-capturing control unit (506) stores the image information in the memory (105) on the basis of the fact that after the face image held in the face registration unit (504) is detected, the face image becomes undetected, and the face image is then detected again.
US08803996B2	Image pickup apparatus for preventing unnatural motion of a motion image Whether a user of a video camera can discern an unnatural motion or the discernable unnatural motion is permissible is evaluated based on an taken image so as to make a change between mixing of still image shooting driving and maintaining of motion image shooting driving.
US08803993B2	Solid-state imaging device and camera system with a reset-level variation correction function A solid-state imaging device including: a pixel section formed by a matrix-like array of a plurality of pixels performing photoelectric conversion; and a pixel signal readout section reading out a pixel signal from the pixel section in units for reading each formed by a plurality of pixels, wherein the pixel signal readout section includes a column-parallel type ADC group formed by a plurality of analog-digital converters (ADCs) for performing A-D conversion of a pixel reset level, and a signal processing system, the signal processing system obtaining only an average value of results of A-D conversion of pixel reset levels for a plurality of pixels and automatically adjusting an input offset value for the conversion range of the ADCs such that the average value of pixel reset levels will be adequately positioned with respect to the A-D conversion range.
US08803992B2	Augmented reality navigation for repeat photography and difference extraction Systems and methods for repeat photography and difference extraction that help users take pictures from the same position and camera angle as earlier photos. The system automatically extracts differences between the photos. Camera poses are estimated and then indicators are rendered to show the desired camera angle, which guide the user to the same camera angle for repeat photography. Using 3D rendering techniques, photos are virtually projected onto a 3D model to adjust them and improve the match between the photos, and the difference between the two photos are detected and highlighted. Highlighting the detected differences helps users to notice the differences.
US08803988B2	Computing device and method of controlling image capturing device In a method of controlling an image capturing device using a computing device, sounds coming from a monitored area are detected in real-time using sound receivers that are electronically connected to the computing device. The detected sounds are analyzed using an acoustic source localization (ASL) device of the computing device to determine the direction of the apparent origin of the detected sounds in the monitored area. A command is sent to the image capturing device to view or focus on the origin of the sounds in the monitored area. The computing device controls a lens of the image capturing device to capture images of the source of the sounds in the monitored area.
US08803987B2	Focus position estimation A method, apparatus and computer-readable storage medium computer-implemented method for lens position estimation. A drive current value may be received from a lens driver. An orientation of an electronic device may be detected using a motion sensor. A gravity vector may be determined by a processor based upon the orientation. A drive current offset may be determined based upon the gravity vector. The drive current value may be combined with the calculated drive current offset to create a normalized drive current. A lens position value associated with a camera lens of the electronic device may be computed based upon the normalized drive current.
US08803983B2	Image stabilization apparatus, control method therefor, optical apparatus and image capturing apparatus An image stabilization apparatus comprises: an image stabilization unit that reduces image blur due to a shake by moving a driven unit; a calculation unit that estimates the shake based on a position of the driven unit and a driving force applied to the driven unit and that calculates a translational shake correction amount based on the estimated shake; and a driving unit that drives the driven unit of the image stabilization unit based on the translational shake correction amount. When the driven unit is at a position away from a center of a range of movement of the driven unit, the calculation unit sets the translational shake correction amount to be smaller than that when the driven unit is at the center of the range of movement.
US08803978B2	Computer vision-based object tracking system A computer-implemented method for utilizing a camera device to track an object is presented. As part of the method, a region of interest is determined within an overall image sensing area. A point light source is then tracked within the region of interest. In a particular arrangement, the camera device incorporates CMOS image sensor technology and the point light source is an IR LED. Other embodiments pertain to manipulations of the region of interest to accommodate changes to the status of the point light source.
US08803974B2	Horse body information provision system, horse body still image data extraction method, horse body still image data extraction program and computer-readable recording medium There are provided an information providing system, an information providing method and an information providing program capable of providing information for enabling conditions of a horse entered in a race to be rapidly confirmed.A system control unit 15 according to the present application acquires moving image data in which horses are captured, extracts a plurality of items of still image data of the horses from the acquired moving image data, generates a horse list displaying the horse names for which a link to acquire and display the still image data by a user terminal 3-k is set, and distributes it to the user terminal 3-k.
US08803969B2	Event monitoring report and display system A feature extracting unit obtains sensor data from a plurality of sensors to calculate each feature. When an event determining unit determines the occurrence of an event based on each feature, a display data constructor generates remote-controller display data for displaying the event. When an infrared sensor detects an abnormality, a microwave sensor whose power consumption is small after the infrared sensor is turned ON. When the microwave sensor detects an abnormality, a video camera and a microphone are turned ON, and the microwave sensor is turned OFF. A communication unit wirelessly transmits an image signal captured by the video camera and an audio signal processed by the microphone. Then, if the infrared sensor does not detect an abnormality, the video camera and the microphone are turned OFF.
US08803963B2	Vein pattern recognition based biometric system and methods thereof Individual authentication techniques are disclosed, which relate to a vein recognition based to biometric authentication system. Systems and methods to capture the subcutaneous vein pattern at the back of the palm and use it as the biometric identity of an individual are also disclosed.
US08803956B2	Computer vision-based valve control system and method The computer vision-based valve control system and method includes a camera mounted on a pneumatic control valve in such a way that the camera periodically observes positioning of the valve stem. An image processor is applied to the output of the camera to determine percentage opening of the valve. The valve opening percentage of the image processor is fed to a PID controller that uses the valve opening percentage in its process control calculations.
US08803953B2	Stereoscopic image display device and driving method thereof A stereoscopic image display device comprises a display panel; a panel driving unit configured to address left eye image data in all pixels of the display panel during a data addressing period set in an N-th (where N is a natural number) frame period and adjust voltages of all the pixels of the display panel to a black grayscale voltage during a black grayscale inserting period set in the N-th frame period, address right eye image data in all the pixels of the display panel during a data addressing period set in a (N+1)-th frame period and adjust voltages of all the pixel of the display panel to the black grayscale voltage during a black grayscale inserting period set in the (N+1)-th frame period; and a controller configured to supply the left eye image data, and the right eye image data to the panel driving unit and control operation timings of the panel driving unit.
US08803951B2	Video capture system control using virtual cameras for augmented reality There is provided a system and method for integrating a virtual rendering system and a video capture system using flexible camera control to provide an augmented reality. There is provided a method for integrating a virtual rendering system and a video capture system for outputting a composite render to a display, the method comprising obtaining, from the virtual rendering system, a virtual camera configuration of a virtual camera in a virtual environment, programming the video capture system using the virtual camera configuration to correspondingly control a robotic camera in a real environment, capturing a video capture feed using the robotic camera, obtaining a virtually rendered feed using the virtual camera, rendering the composite render by processing the feeds, and outputting the composite render to the display.
US08803950B2	Three-dimensional face capturing apparatus and method and computer-readable medium thereof Disclosed is a 3D face capturing apparatus, method and computer-readable medium. As an example, the 3D face capturing method includes obtaining a face color image, obtaining a face depth image, aligning, by a computer, the face color image and the face depth image, obtaining, by the computer, a 3D face model by 2D modeling of the face color image and covering a modeled 2D face area on an image output by an image alignment module, removing by the computer, depth noise of the 3D face model, and obtaining, by the computer, an accurate 3D face model by aligning the 3D face model and a 3D face template, and removing residual noise based on a registration between the 3D face model and the 3D face template.
US08803949B2	Reproducing apparatus and reproducing method A reproducing apparatus to reproduce a captured moving image includes a filter circuit that obtains a capturing condition (shutter speed information “s”) of frames constituting the moving image. The filter circuit smoothes pixel information of the frames by using a parameter (directional smoothing filter kernel) according to the obtained shutter speed.
US08803947B2	Apparatus and method for generating extrapolated view A view extrapolation apparatus and a view extrapolation method to generate images at a plurality of virtual points uses a relatively small number of input images. The view extrapolation apparatus and the view extrapolation method output a view at a reference point, the view at the reference point being formed of frames generated chronologically, integrate a plurality of successive frames of the view at the reference point to generate an integrated frame, and generate an extrapolated view at a virtual point using the integrated frame.
US08803946B2	Image signal processing device, method and projecting device for stereoscopic images An image projecting device includes an image display unit that simultaneously displays left and right eye images in a line on a display panel and a projection optical system that projects the left and right eye images displayed on the display panel onto a screen in a superposed state. The display unit performs a transforming process for rotating the left eye image on a left eye image signal used to display the left eye image and for rotating the right eye image on a right eye image signal used to display the right eye image. The transformed left eye image signal and the transformed right eye image signal are synthesized to obtain an image signal for display use.
US08803941B2	Method and apparatus for hands-free control of a far end camera One embodiment of the present invention sets forth a method for intuitively controlling a far-end camera via physical movements. The method includes the steps of receiving an image captured by a first camera and including a digital representation of at least a portion of a user of the first camera, analyzing the digital representation to identify a position of the user relative to the first camera, computing a value associated with a first property of a second camera based on the position of the user, and transmitting the value to the second camera, wherein, in response to receiving the value, a perspective of the second camera is modified based on the value.
US08803928B2	Image display device, control method therefor, and image display system Included are a backlight having a plurality of light emitting blocks, a display panel, a calibration unit which carries out calibration of the display panel based on a result of measurement of the brightness and chromaticity of the display panel, a first measuring unit which measures individual temperatures of the plurality of light emitting blocks, a setting unit which sets a patch image display area in a region of the display panel corresponding to a light emitting block of which the magnitude of a change in temperature within a predetermined period of time is smaller than a threshold value, and a generation unit which generates a patch image to be displayed in the patch image display area, wherein the calibration unit carries out the calibration based on the result of measurement by the first measuring unit in cases where the patch image is displayed in the patch image display area.
US08803926B2	Display drive device, display device, driving control method, and electronic device storing correction data for correcting image data and displaying the corrected image data in one of various display modes A display drive device includes a correction data memory circuit, a data reading control circuit, and an image data correction circuit. The correction data memory circuit stores a plurality of pieces of correction data according to characteristics of pixels in association with positions where the pixels are arranged in a display panel. The data reading control circuit sets a reading order of the plurality of pieces of correction data to an order corresponding to a display form and reads the correction data in the set reading order. The image data correction circuit associates the image data with each of the plurality of pieces of correction data and generates corrected image data obtained by correcting the image data using the corresponding correction data.
US08803924B2	Display device A display device includes a plurality of pixels respectively including, a light emitting element, a driving transistor configured to control driving current to the light emitting element, and a storage capacitor configured to be written voltage corresponding to a gradation value on and hold the voltage and configured to apply display voltage depending on the voltage corresponding to the gradation value between a gate and a source of the driving transistor. The display device further includes a stress voltage application unit configured to apply a stress voltage having a voltage value outside a range of a value capable of taking the display voltage between the gate and the source of the driving transistor.
US08803923B2	Display apparatus and display method A display apparatus includes: an acceptance unit that accepts a first input image and a second input image; a light control unit that outputs a display image; a plurality of light sources that irradiate the light control unit; a light emitting amount computation unit that computes a first light emitting amount based on a luminance of the first input image and computes a tentative light emitting amount based on a luminance of the second input image, on a basis of a comparison result between the first light emitting amount and the tentative light emitting amount, imposes a limit on a change range from the first light emitting amount to a second light emitting amount, and decide the second light emitting amount; and a light source control unit that controls each of the plurality of light sources based on the second light emitting amount.
US08803915B2	Information display device, integrated circuit for display control, display control program, and display control method An information display device improves readability even in cases of an unstable reception condition when information is superimposed on taken images by means of optical space transmission and displayed on the taken images. An imaging section time-sequentially takes images. An information processing section extracts, from regions whose brightness changes with time in images taken, communication information containing information for display of each region based on changes in brightness of the region. The information processing section also generates stability information representing a degree of stability of a communication state of the communication information. A display control section superimposes the extracted information for display contained in the communication information of each region on the taken images, in a mode determined in accordance with the corresponding generated stability information, and displays the information for display superimposed on the images on a display device.
US08803911B2	User interface and viewing workflow for mammography workstation This invention provides a simple user interface and sequencing viewing method for a mammography interpretation workstation. In particular, the invention includes the method and apparatus that moves the source images and the associated data using two-level of pre-fetching and caching mechanism, sequences the reading workflow (including worklist, hanging protocol, viewing sequencing), draws markup using electronic grease pan, and automatically generates the recall forms and screening reports. The user interface operates on single button and mouse wheel style to maximize the radiologists' efficiency.
US08803910B2	System and method of contouring a target area A two-dimensional contouring tool that allows a user to maintain a minimum distance away (in 3D) from other structures. The contouring tool allows the user to rapidly define a series of contours that conform to the shape of one or more existing contours (or targets) with user-specified margin limits between the new contour and the existing contours (or targets).
US08803908B2	Digital image transitions Among other things, methods, systems and computer program products are disclosed for displaying a sequence of multiple images to provide an appearance of a three-dimensional (3D) effect. A data processing device or system can identify multiple images to be displayed. The data processing device or system can divide a two-dimensional (2D) display area into multiple display portions. The data processing device or system can display a sequence of the identified images on the display portions so as to provide an appearance of a three-dimensional (3D) effect.
US08803907B2	Map information processor and data structure of map information A map information processor includes a map information storage unit 13 for storing map display information including a set of pieces of mesh-by-mesh map information managed on a mesh-by-mesh basis and including road information, background information, and in-mesh image information, an image processing unit 15 for generating a map image on a basis of image data included in the road information, the background information, and the in-mesh image information included in the mesh-by-mesh map information read from the map information storage unit, and a display device 5 for displaying the map image generated by the image processing unit.
US08803905B2	Display control device and display layer combination program A display control device includes: a transparent color information storage unit that stores transparent color information; a run-length counter that calculates a run-length specifying the number of consecutive pixels having the same color information; a combination calculation unit that combines the image data for the plurality of display layers; and a combined image display unit that outputs the combined image data to a display device. If the color information for a total of run-length pixels calculated by the run-length counter is a transparent color, the combination calculation unit performs combination by ignoring the image data for the total number run-length of consecutive pixels.
US08803904B2	Image processing method The invention relates to a method for processing a video image for a display device. In order to reduce the visibility of transition regions in the processed image, the method comprises a step of application of a third video pattern to at least one part of the image, the third video pattern resulting from the spatial interleaving of a first video pattern and at least one second video pattern according to a determined model.
US08803900B2	Synchronization with semaphores in a multi-engine GPU A method for performing an operation using more than one resource may include several steps: requesting an operation performed by a resource; populating a ring frame with an indirect buffer command packet corresponding to the operation using a method that may include for the resource requested to perform the operation, creating a semaphore object with a resource identifier and timestamp, in the event that the resource is found to be unavailable; inserting a command packet (wait) into the ring frame, wherein the command packet (wait) corresponds to the semaphore object; and submitting the ring frame to the graphics engine.
US08803899B2	Image processing system and image processing method An image processing system includes a memory, a data slicer and an image processor. The data slicer divides each of current image data and adjacent image data into a first portion and a second portion to be stored into the memory. The image processor reads from the memory the first portion and the second portion of the current image data and the first portion of the adjacent image data for image processing.
US08803898B2	Forming a windowing display in a frame buffer A windowing display using deferred drawing commands operates by processing the drawing commands that write to a tile 22 of a frame buffer 30 to form one or more new pixel values are stored within a tile memory 40. Dirty pixel data indicative of which pixels within the tile memory are dirty pixels storing new pixel values and which pixels within the tile memory are clean pixels not storing new pixel values is also formed. In dependence upon the dirty pixel data, the new pixel value stored within the tile memory are written to the frame buffer memory. Pixels stored within the frame buffer memory corresponding to clean pixels within the tile memory remain unaltered as they are not written.
US08803895B2	Display device and image display method An image display device of the present invention comprises a first determination section for monitoring information respectively appended to a plurality of images, and detecting information that has been appended to the most images among the plurality of images as first information, a second determination section for detecting information other than the first information, among the information that has been respectively appended to the plurality of images, as auxiliary information, and a third determination section for detecting an image to which the first information has been appended, and which is an image having the auxiliary information, as a priority image.
US08803893B2	Image data processing apparatus An image data processing apparatus includes: a plurality of operational processing circuits each of which is configured to have a variable circuit configuration and to execute operational processing on image data; and a control section that controls each of the operational processing circuits such that each of the operational processing circuits executes one of a plurality of types of operational processing performed on image data in a predetermined order. The control section controls each of the operational processing circuits so that when image data to be newly given to one of the operational processing circuits is interrupted, said one of the operational processing circuits and another one of the operational processing circuits execute operational processing by taking partial charge of the operational processing.
US08803892B2	Allocation of GPU resources across multiple clients Methods, apparatuses and systems directed to hosting, on a computer system, a plurality of application instances, each application instance corresponding to a remote client application; maintaining a network connection to each of the remote client applications for which an application instance is hosted; allocating resources of a graphics processing unit of the computer system between at least two of the remote client applications; concurrently rendering, utilizing the resources of the graphics processing unit of the computer system, the graphical output of the application instances corresponding to the at least two of the remote client applications; and transmitting the rendered graphical output to the at least two of the remote client applications over the respective network connections.
US08803886B2	Face image display, face image display method, and face image display program The present invention provides a facial image display apparatus that can display moving images concentrated on the face when images of people's faces are displayed. A facial image display apparatus is provided wherein a facial area detecting unit (21) detects facial areas in which faces are displayed from within a target image for displaying a plurality of faces; a dynamic extraction area creating unit (22) creates, based on the facial areas detected by the facial area detecting means, a dynamic extraction area of which at least one of position and surface area varies over time in the target image; and a moving image output unit (27) sequentially extracts images in the dynamic extraction area and outputs the extracted images as a moving image.
US08803884B2	Event data visualization tool A method for visually depicting complex events. Software agents are preferably employed to assist the human operator by collecting, enriching, selecting, aggregating, and analyzing data so that patterns of interest can be visually flagged or otherwise emphasized in the visual display. Events are depicted as an “event flow” from a source surface to a destination surface. Intervening surfaces may also be defined. The point of origin on the source surface reveals some information about the event flow, as does the point of impact on the destination surface. The event flow may be mapped to one or more intervening surfaces in order to visually depict other characteristics of the event. The entire depiction is rendered in a simulated three-dimensional view. The user is preferably given the ability to pan, zoom, and reorient the vantage point from which the user “views” the depiction on the computer display.
US08803879B1	Omnidirectional shadow texture mapping An invention is provided for rendering using an omnidirectional light. A shadow cube texture map having six cube faces centered by a light source is generated. Each cube face comprises a shadow texture having depth data from a perspective of the light source. In addition, each cube face is associated with an axis of a three-dimensional coordinate system. For each object fragment rendered from the camera's perspective a light-to-surface vector is defined from the light source to the object fragment, and particular texels within particular cube faces are selected based on the light-to-surface vector. The texel values are tested against a depth value computed from the light to surface vector. The object fragment is textured as in light or shadow according to the outcome of the test.
US08803876B2	Hardware accelerated graphics for network enabled applications A method and system are provided for providing hardware accelerated graphics for network enabled applications. The method includes providing a network enabled application on a host, the application requiring hardware accelerated graphics not provided on the host; providing a 3D library wrapper at the host for connection to a broker of 3D graphics rendering resources. The broker receives a request for 3D graphics rendering resources, and evaluates available rendering resources and allocates a selected 3D graphics rendering resource to the 3D library wrapper, in order to return final 2D rendered images to a client. The network enabled application may execute on a virtual machine on the host or on a terminal services session on the host and is accessed by a remote client.
US08803873B2	Image display apparatus and image display method thereof An image display apparatus and an image display method where the image display apparatus according to an embodiment displays a main screen and a sub-screen having a different depth or slope from the main screen so as to create the illusion of depth and distance.
US08803872B2	Computer graphics processor and method for rendering a three-dimensional image on a display screen A computer graphics processor (20,50) and a method for rendering a three-dimensional image on a display screen. The computer graphics processor (20,50) comprises a rasterizer (23,53) configured to perform pixel traversal of a primitive after projection of the primitive. Furthermore, the rasterizer (23,53) is configured to perform the pixel traversal of a first primitive for a plurality of views prior to performing pixel traversal of a next primitive for one or several views.
US08803868B2	Power conservation for mobile device displays Power conservation for mobile device displays. An embodiment of a method includes generating display images for a display screen of a mobile device, and transitioning the mobile device to a reduced power consumption state. The reduced power consumption state includes reducing one or more illumination factors for the display screen; and reducing one or more animation factors for the display screen.
US08803867B2	Electro-optical device and electronic apparatus A liquid crystal device includes a scanning line driving circuit, a data line driving circuit, a first VDD power supply wiring line that supplies power to the data line driving circuit, a second VDD power supply wiring line that supplies power to the scanning line driving circuit, and a common wiring line that electrically connects the first VDD power supply wiring line and the second VDD power supply wiring line to each other in an integrated manner. The common wiring line includes electrical conductors, a wiring line, and contact holes.
US08803856B2	Electric optical apparatus, driving method thereof and electronic device An electric optical apparatus including a display section in which an electric optical material is pinched between a pair of substrates and a plurality of pixels is arranged, wherein the display section is provided with a scanning line, a data line and a power-supply line that are connected to each of the pixels, and each of the pixels is provided with a pixel electrode, a driving transistor that is connected between the pixel electrode and the power-supply line, a capacitance for modulation that is connected between a gate of the driving transistor and the data line, a maintenance capacitance that connects one side electrode to the gate of the driving transistor, and a transistor for correction that is connected to a diode and in which one side terminal thereof is connected to the gate of the driving transistor.
US08803852B2	Touch input device and electronic device A touch input device includes a touch pad and a switch. The touch pad has a floating side. The switch is positioned on the touch pad. The floating side is permitted to move down to enable the switch to generate input commands when a pressure is exerted on the floating side.
US08803851B2	Stylus pen A stylus pen includes a pen body, an electromagnetic touch pen module which includes an electromagnetic pen head disposed in a top end of the pen body and a first circuit board connecting with the electromagnetic pen head, a camera module which includes a second circuit board, a camera lens embedded in a cavity of the top end of the pen body and a power button, a rechargeable battery pack disposed in the pen body to supply power for the electromagnetic touch pen module and the camera module, and a function button connected to the first and the second circuit boards to act as a right mouse button and a shutter button. The stylus pen switches working modes between the camera module and the electromagnetic touch pen module through powering on and off the power button.
US08803845B2	Optical touch input system and method of establishing reference in the same A method of establishing a reference in an optical touch input system and a corresponding display panel, includes emitting light by emitters located at respective first, second, and third corners of the display panel, and receiving direct light by a detector located at a fourth corner of the display panel, the detector at the fourth corner detecting respective first, second, and third impulse signals generated by the direct light of the emitters located at the respective first, second, and third corners, the respective first, second, and third impulse signals corresponding to pixel positions of the detectors located at the fourth corner and correlating the respective pixel positions of the respective first, second, and third impulse signals with respective predetermined first, second, and third reference angles of the display panel.
US08803834B2	Interface environment for accessing applications A home key of a mobile device is utilized to activate a map object displayed in a virtual template area of the mobile device. The virtual template area is available on a display of the mobile device. The home key is utilized to set the home key as an object home for a user-defined starting place on the map object. Upon the object home being activated, the object home returns to the user-defined starting place on the map object.
US08803829B2	Touch panel The present invention relates to a touch panel. The touch panel includes a sensor, an optically clear adhesive layer, and a cover lens. The sensor has a surface. The optically clear adhesive layer is located on the surface of the sensor. The cover lens is located on a surface of the optically clear adhesive layer. The touch panel defines two areas: a touch-view area and a trace area. A space is defined between the sensor and cover lens in the trace area. The space is filled with dielectric material with a permittivity less than a permittivity of the optically clear adhesive layer.
US08803824B2	Methods for allowing applications to filter out or opt into tablet input Methods and systems for enabling a tablet input object is described. A tablet input object can take various inputs from touch, a mouse, and a pen and send their information to an application.
US08803822B2	Time-reversal-based impact-localization and haptic-feedback method for touch panels The present invention provides a time-reversal-based impact-localization and haptic-feedback method for touch panels. Firstly, a plate model for an elastic plate and the impulse responses thereof are constructed according a plate theory. Next, a mathematical model is established according to the impulse responses and a time-reversal approach. When an impact force hits the elastic plate, the touched point on the elastic plate generates a touch signal, and the touch signal is received by at least a sensor at the corner of the elastic plate. The touch signal is converted into a time-reversal signal according to the mathematical model by a simulator. The time-reversal signal is reversed to the touched point for simulating reversal vibration waves of the time-reversal signal on the elastic plate, and locating the touched point.
US08803819B2	Apparatus and method for inputting characters in a terminal A method and apparatus for easily selecting a character in a terminal including a touch screen, wherein a touch keypad is divided into a central layout including keys, and a sub layout including extended keys. According to an inclined angle and an inclined direction of a terminal, the sub layout opposite to the inclined direction based on the central layout is combined with the central layout, displaying a combined keypad including the central layout and the sub layout, on the display.
US08803818B2	Input apparatus, input determining method, and storage medium storing input program An input apparatus includes, a display unit that causes a plurality of display screens on which images are to be displayed to display the images, a input detecting unit that detects a first input on a first display screen, a second input on the first display screen, and a third input on a second display screen, a position acquiring unit that acquires a first position, a second position and a third position, a start-position estimating unit that estimates a start position of an associated operation on the second display screen, and a continuity determining unit that determines whether the third input is the associated operation based upon the third position and the start position.
US08803814B2	Surface scanning with a capacitive touch screen A scanning capability for capacitive touch screen devices is disclosed. Images, such as text, barcodes, or the like are printed on printed objects, such as business cards, information cards, and the like using electrically conductive ink that has had electrical properties imparted thereon such that, when the printed object comes in contact with the touch screen of a capacitive touch screen device, the imparted electrical properties are sufficient to cause variances in capacitance to the touch screen that are detectable by the device. Using these detected touches, the scanning system analyzes any patterns created by the detected touches to determine information represented by those patterns and corresponding to the information represented by the images printed on the printed object.
US08803812B2	Apparatus and method for input of ideographic Korean syllables from reduced keyboard A method is for input of text symbols into an electronic device having a reduced keyboard. The reduced keyboard has keys representing a plurality of characters. The method includes receiving character inputs from the reduced keyboard and identifying symbol variants based on the received character inputs. A list of symbol variants is displayed. An input symbol from the list of symbol variants is selected, wherein the input symbol is a Korean Hangul syllable. At least one Chinese Hanzi syllable is designated, to correspond to at least one Korean Hangul syllable. The Korean Hangul syllable is replaced with a Chinese Hanzi syllable.
US08803807B2	Keyboard with thumb operated spacebar curser controller A keyboard with a thumb-controlled curser. In a preferred embodiment a circular aperture about one centimeter in diameter is provided in the spacebar of the keyboard. A keyboard user controls the position of the computer curser by moving a portion of his thumb across the port. A light source illuminates an exposed surface of the user's thumb as it moves across the port. Light patterns reflected from the user's thumb are focused on a sensor. The output from the sensor is transmitted to the computer processor where the thumb movements monitored by the sensor are turned into control signals for controlling the position of the curser on a computer monitor.
US08803804B2	Mouse structure with adjustable clicking force function The invention discloses a mouse structure with click force adjustable function, which comprises a shell, a circuit board module, and at least one adjustable mechanism. The adjustable mechanism is setting inside the shell, and comprises a supporting body, an adjustable plate and an adjustable component. The adjustable mechanism is adjusted via the adjustable component, so that the place the free-end of the adjustable plate touching the key portion is changed, and the force the adjustable plate clicking the switch module is accordingly changed, which provides function that the user can adjust the click force finely to a suitable one.
US08803803B2	Operation member provided in electronic device, and electronic device An operation member and an electronic device capable of maintaining operability while enhancing cushioning properties provided in the outer surface of an operation member are provided. An operation stick has a cushion portion and a base portion on which the cushion portion is placed. The base portion is supported to be movable. The base portion has a frame portion surrounding the outer periphery of the cushion portion. The base portion and the frame portion are formed of a material having a higher rigidity than that of the material of the cushion portion.
US08803800B2	User interface control based on head orientation Embodiments distinguish among user interface elements based on head orientation. Coordinates representing a set of at least three reference points in an image of a subject gazing on the user interface elements are received by a computing device. The set includes a first reference point and a second reference point located on opposite sides of a third reference point. A first distance between the first reference point and the third reference point is determined. A second distance between the second reference point and the third reference point is determined. The computing device compares the first distance to the second distance to calculate a head orientation value. The computing device selects at least one of the user interface elements based on the head orientation value. In some embodiments, the head orientation value enables the user to navigate a user interface menu or control a character in a game.
US08803796B2	Products and processes for providing haptic feedback in a user interface The present invention provides an apparatus and system for providing haptic feedback in a user interface. In one embodiment, the apparatus includes a manipulandum, a resistive actuator, and a biasing element disposed between the manipulandum and the resistive actuator. Further, the biasing element is coupled to one of the manipulandum or the resistive actuator and releasably coupled to the housing, the manipulandum or the resistive actuator.
US08803792B2	Color liquid crystal display device and image display method thereof A color liquid crystal display device capable of displaying color images comprises an input pen for use in determining the individual position for color display on the screen of a liquid crystal display panel, a coordinate detector for recognizing the position as designated by the input pen to output the position as the corresponding coordinate data, a color designator circuit for designating a color as presently selected for color display to output the color as a color data, a memory device for storing the color data representative of the color designated, a memory controller responsive to receipt of an address issued from the selected coordinate data for controlling the color data to be written into and read out of the memory, and an output controller which allows the color data read from the memory to be supplied to the liquid crystal display panel as video data.
US08803790B2	Dynamic dimming LED backlight Disclosed herein is a system for controlling the interactions of light between adjacent subsections of a dynamic LED backlight. Preferred embodiments contain a dividing wall positioned between each adjacent subsection of the LED backlight. The dividing wall may be in contact with the LED backlight and extend away from the LED backlight. The dividing wall may prohibit light from a first subsection from entering an adjacent second subsection at its full luminance. The luminance for each adjacent subsection may be approximately half of the full luminance of each subsection, when measured at the location of the dividing wall.
US08803786B2	Backlight unit and liquid crystal display using the same This invention relates to a backlight unit that is adaptive for reducing light loss caused by an intermediate light guide panel and reducing sag of the intermediate light guide panel. A backlight unit may include a bottom cover where a reflection plate is formed, a plurality of light emitting diodes installed inside the bottom cover, a plurality of intermediate light guide panels installed on the light emitting diodes and separated from each other, a diffusion plate for diffusing the light from the intermediate light guide panels and the reflection plate, and a plurality of optical sheets placed on the diffusion plate.
US08803782B2	Bidirectional shift register and image display device using the same A bidirectional shift register outputs pulses from a plurality of cascaded unit register circuits in a shift order which is one of a forward direction and a reverse direction. A λth stage of unit register circuit (38) has two set terminals connected to respective outputs of (λ−1)th and (λ+1)th stages and two reset terminals connected to respective outputs of (λ+2)th and (λ−2)th stages. The unit register circuit (38) sets, when a pulse is input to any one of the set terminals, a reference point N1 to an H level, and, when a pulse is input to any one of the reset terminals, N1 to an L level. The order of phase change of clock signals is reversed according to the direction of a shift, and whether a start trigger signal is applied to a top stage or a bottom stage is switched.
US08803780B2	Liquid crystal display having a function of selecting dot inversion and method of selecting dot inversion thereof A liquid crystal display includes: a liquid crystal display panel including data lines and gate lines crossing each other; a timing controller that maps data of an input image to polarity patterns of 1-dot inversion and 2-dot inversion, counts the number of positive data and the number of negative data, determines whether any one of the positive data and negative data becomes dominant or not based on a difference between the counted numbers, and selects either one of the 1-dot and 2-dot inversions; a data driving circuit that converts the data of the input image into data voltages to be supplied to the data lines and inverts the polarity of the data voltages by the selected dot inversion; and a gate driving circuit that sequentially supplies gate pulses synchronized with the data voltages to the gate lines.
US08803778B2	Liquid crystal display device capable of reducing number of output channels of data driving circuit A liquid crystal display device comprises: a display panel having a pixel array comprising a first group of cells and a second group of cells and configured to share data lines with cells of the first group adjacent in extension direction of the gate lines; a data driving circuit comprising a latch array, wherein the latch array temporally separates first group data to be applied to the liquid crystal cells of the first group and second group data to be applied to the liquid crystal cells of the second group according to data rendering control signals, and outputs the first group data earlier by about ½ horizontal period than the second group data.
US08803776B2	Liquid crystal display device A liquid crystal display device that is used in a small portable device includes a driver circuit which is freely mounted because the mounting area is small. The liquid crystal display device includes a liquid crystal display element and the liquid crystal driver circuit. The liquid crystal driver circuit is mounted along one side of a liquid crystal display panel. The liquid crystal display panel is connected to a flexible printed circuit board mounted with a rewritable memory element. The memory element stores transition commands for various modes of the driver circuit. The driver circuit reads a transition command from the memory element using a simple command and executes a transition of any of the various modes to another one.
US08803775B2	Motion image data sequence, a method for generating the sequence, and a display apparatus using the sequence A motion image data sequence, a method for generating the sequence, and a display device using the sequence are provided. The display device includes an image data input device and an image data processor. The image data input device transmits an initial image data to the image data processor. The image data processor inserts a mask frame between a first timing image frame and a third timing image frame to generate an output image data sequence. The mask frame includes a plurality of mask units and a plurality of image units. The mask units and the image units are disposed in an array form.
US08803769B2	DC-DC converter and organic light emitting display using the same A DC-DC converter generates a first power and a second power for driving pixels in an organic light emitting display, such that the voltages of the first power and the second power are substantially independent of the voltage from a power supply or a battery. A voltage detector detects the voltage from the power supply, and a booster circuit and an inverter circuit respectively boost and invert the voltage from the power supply to generate and output the first and the second powers, respectively, for the pixels. A PWM controller controls the booster circuit and the inverter circuit to control voltages of the first power and the second power. The booster circuit is adapted to reduce the voltage from the power supply to be lower than the voltage of the first power when the voltage from the power supply detected by the voltage detector is higher than a reference voltage.
US08803768B2	Electronic device, display device, and semiconductor device and method for driving the same A pixel having a transistor which controls a current value supplied to a load, a first storage capacitor, a second storage capacitor, and first to fourth switches is included. After the threshold voltage of the transistor is held in the second storage capacitor, a potential in accordance with a video signal is input to the pixel. Voltage obtained by adding a potential in which the potential in accordance with the video signal and the first storage capacitor are capacitively divided to the threshold voltage is held in the second storage capacitor in this manner, so that variation of a current value caused by variations in the threshold voltage of the transistor is suppressed. Thus, desired current can be supplied to the load such as a light-emitting element. In addition, a display device with little deviation from luminance specified by the video signal can be provided.
US08803762B2	System for automatically adjusting electronic display settings Described are systems for automatically adjusting a set of display settings. At least one image sample is displayed at a first display according to display settings of the first display. Electromagnetic radiation generated from the first display is collected. The electromagnetic radiation includes first image data related to the at least one image sample at the first display. An image sample is displayed at a second display according to display settings of the second display. Electromagnetic radiation generated from the second display is collected. The electromagnetic radiation includes second image data related to the image sample at the second display. A margin of error is determined between the first image data and the second image data. The display settings of the second display are adjusted to reduce the margin of error.
US08803758B2	Antenna device and wireless communication apparatus An antenna device of an embodiment includes: an antenna having a feeding point and an end portion apart from the feeding point, the end portion being an open end; a variable impedance matching circuit connected to the antenna at the feeding point; a probe placed in such a position that the distance from the end portion to a tip of the probe is equal to or shorter than one eighth of the wavelength corresponding to the maximum radio frequency used in the antenna device; and a controller that is connected to the probe, and controls the variable impedance matching circuit, based on an electrical signal measured with the probe.
US08803754B2	Antenna and wireless device having same An antenna includes an antenna element to transmit or receive electromagnetic signals, and a ground conductor to be grounded. The antenna element includes two conductors arranged substantially parallel to each other, a power feed portion provided between one conductor of the two conductors and the ground conductor, and connected to a feed system, a shorting portion for electrically connecting an other conductor of the two conductors and the ground conductor, and a conductor connecting portion for electrically connecting the two conductors together. The distance between the two conductors is not more than 1/100 a wavelength equivalent to a minimum frequency of operating frequencies of the antenna.
US08803753B2	Antenna arrangement The invention relates to data transmission in radio communication networks, the object of the invention multiband directional antenna comprising a multidimensional array structure and having more than one director working in active or passive mode according to the working frequency.
US08803744B2	Cover for electronic device An electronic device cover includes a base body, a first antenna and a second antenna. The first antenna is at least partially made by laser direct structuring. Both the first antenna and the second antenna are located in the base body by insert-molding.
US08803739B2	Multi-functional CRLH antenna device This application relates to a multi-functional Composite Right and Left Handed CRLH antenna device. A conductive element of a wireless device is incorporated into the antenna structure for reuse. In one embodiment a peripheral feature, such as a key dome, is incorporated into the antenna device. In this way, the antenna structure includes portions which are multi-functional.
US08803738B2	Planar gradient-index artificial dielectric lens and method for manufacture A gradient index lens for electromagnetic radiation includes a dielectric substrate, a plurality of conducting patches supported by the dielectric substrate, the conducting patches preferably being generally square shaped and having an edge length, the edge length of the conducting patches varying with position on the dielectric substrate so as to provide a gradient index for the electromagnetic radiation. Examples include gradient index lenses for millimeter wave radiation, and use with antenna systems.
US08803735B2	Portable base station network for local differential GNSS corrections A DGNSS-based guidance system, wherein a rover receiver first utilizes data from a master base station transceiver, a DGNSS reference network, or some other differential source to compute a differentially corrected location to establish a reference DGNSS relationship. Using this location and data observed only at the rover, the rover computes an internal set of differential corrections, which set is stored in computer memory, updated as necessary, and applied in future times to correct observations taken by the rover. As the rover enters into areas of other base station receiver reference networks, the rover transceiver will send positional information it receives from the master base station to the new, secondary base station. The secondary base station then calibrates its own reference information using information sent from the original master base station.
US08803733B2	Terminal axial ratio optimization A method of optimizing an antenna system can include determining a desired angle to rotate an antenna based on an axial ratio of electromagnetic waves exiting a radome that surrounds the antenna. The desired angle can be determined by a computing device based on a set of axial ratio values.
US08803729B2	Multibeam radar sensor apparatus and method for determining a distance In a multibeam radar sensor apparatus having at least two transmission/reception channels, whose signal paths each include an antenna and a mixer, at least one first mixer is configured bidirectionally as a transfer mixer, and at least one second mixer is switchable from a first into a second operating state; in the first operating state, the mixer is bidirectionally configured as a transfer mixer, and in the second operating state, the mixer being configured in an at least approximately isolating manner as a receiving mixer. In addition, in a method for determining a distance and/or a speed of a target, a radar signal is transmitted in a direction of the target and a reflected radar echo is received, for which at least two transmission/reception channels are used whose signal paths each include an antenna and a mixer; at least one mixture is switched over from a first into a second operating state, in order to use the mixer, in the first operating state, bidirectionally as a transfer mixture, and, in the second operating state, in an at least approximately isolating manner as a receiving mixer.
US08803720B2	RF-DAC cell and method for providing an RF output signal An RF-DAC cell is configured to generate an RF output signal based on a baseband signal, a first signal and a second signal. The first signal has a first duty cycle and toggles between first predefined amplitude values, and the second signal has a second duty cycle smaller than the first duty cycle and toggles between second predefined amplitude values.
US08803719B2	Sample and hold circuit with toggle control and method thereof A sample and hold circuit and the method thereof are disclosed. The sample and hold circuit may be applied in voltage regulators or other circuits. The sample and hold circuit comprises: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a control circuit configured to receive the input signal and the output signal, and wherein based on the input signal and the output signal, the control circuit generates a digital signal, and wherein the digital signal increases when the output signal is lower than the input signal, and maintains when the output signal is larger than or equal to the input signal; a digital-to-analog converter (DAC) configured to convert the digital signal to the output signal.
US08803718B2	Glitch free dynamic element matching scheme A dynamic element matching (DEM) scheme is implemented in a crawling code generator for converting a b-bit binary input code into a (2b−1)-bit digital output code. A random generator determines for every conversion step a direction. A decimal difference between the current and previous binary input is calculated. The new crawling output code is determined based on the previous crawling output code, the direction and the decimal difference. The DEM scheme is used in a digital-to-analog converter such that the crawling output code switches digital-to-analog converting elements that output analog signals that are then summed to be the final analog signal.
US08803715B2	Sigma delta modulator including digital to analog coverter (DAC) calibration Mechanisms to calibrate a digital to analog converter (DAC) of an SDM (sigma delta modulator) are disclosed. An extra DAC element in addition to the DAC is used to function in place of a DAC element under calibration. A signal (e.g., a random sequence of −1 and +1) is injected to the DAC element under calibration, and the estimated error and compensation are acquired.
US08803714B2	Transmitting device and receiving device A transmitting device includes a parallel data generation unit and a transmitting unit. The parallel data generation unit generates first serial data and second serial data from a data packet, converts the first serial data and second serial data respectively into first parallel data and second parallel data, transmits the first parallel data and second parallel data respectively through first and second parallel transmission paths, and performs the transmission of the first parallel data and the transmission of the second parallel data in parallel. The transmitting unit receives the first parallel data and second parallel data respectively through the first and second parallel transmission paths, re-converts the first parallel data and second parallel data respectively into the first serial data and second serial data, and transmits the first serial data and second serial data to a receiving device respectively through first and second serial transmission paths.
US08803709B2	Method for presenting spatial attitude and heading information of a vehicle A method of presenting attitude and heading information of a vehicle on a display to a viewer inside the given vehicle, comprising the steps of: using a 2D display, using data provided by an inertial reference system, using a computer and graphical software for treating the data and defining graphical elements, depicting the graphical elements in 3D on the 2D display, and presenting the attitude and heading information on the 2D display by associating them to at least one graphical element.
US08803707B2	Parking assistance system and parking assistance method A parking assistance system for a vehicle includes multiple on-board cameras (11, 12, 13, 14) each configured to capture an image of a surrounding area of the vehicle, overhead image generating means (21) for joining the captured multiple images and generating an overhead image viewed from above the vehicle, and display means (22) for displaying the generated overhead image and a steering wheel turning frame corresponding to a steering wheel turning position at which steering wheel turning is performed on the way of reverse movement of the vehicle to a predetermined target parking position.
US08803705B2	Traffic management system A traffic management system includes a data processing unit which communicates with a road leading unit and a vehicle management unit. The road leading unit comprises a plurality of grooves and isolation railings, the grooves are formed on a road, and the isolation railings are received in the grooves and can be opened to divide the road. The data processing unit can receive vehicle identification information and driving direction information from the vehicle management unit. The data processing unit comprises a data analysis module and a control module. The data analysis module is operable to estimate road condition information and count a total traffic demand index for each road according to the vehicle identification information and the driving direction information. The control module is operable to control the isolation railings to open or retract according to the total traffic demand index.
US08803703B2	Electronic circuitry for high-temperature environments A circuitry adapted to operate in a high-temperature environment of a turbine engine is provided. A relatively high-gain differential amplifier (102) may have an input terminal coupled to receive a voltage indicative of a sensed parameter of a component (20) of the turbine engine. A hybrid load circuitry may be coupled to the differential amplifier. A voltage regulator circuitry (244) may be coupled to power the differential amplifier. The differential amplifier, the hybrid load circuitry and the voltage regulator circuitry may each be disposed in the high-temperature environment of the turbine engine.
US08803701B2	Portable electronic device having holster and including a plurality of position sensors A portable electronic device includes a lower housing slidably coupled to an upper housing, the lower and upper housings being movable between a closed position and an open position, and a holster sized and shaped for holding the device in a holster position. The device also includes a first position sensor to detect proximity of at least one positioning object and output a first sensor output signal indicative of the proximity of the at least one positioning object to the first position sensor, a second position sensor to detect proximity of the at least one positioning object and output a second sensor output signal indicative of the proximity of the at least one positioning object to the second position sensor. The first and second sensor output signals cooperate to indicate whether the portable electronic device is in one of the open position, the closed position and the holster position.
US08803698B1	Removable stand alone vibration monitor with automatically configured alarm thresholds A user provides relevant information about the parameters of a machine to be monitored to a vibration diagnostic instrument. The user also specifies a location of the machine to be monitored, an alarm level to be set, and the type of alarm to be sent. The instrument then automatically generates appropriate alarm thresholds and transmits the information to a removable stand-alone monitor. The stand-alone monitor acquires vibration data about the machine and sends the appropriate alerts when an alarm threshold has been reached.
US08803691B2	Attention assistance device and method An attention assistance device for providing attention assistance including various features that help maintain a user's focus on a given task. The attention assistance device may include an activity sensor that generates an activity output in response to detection of a user generated activity. The attention assistance device may also have a timer that increments a counter at regular time intervals, resets the counter in response to the activity output, and generates a timer output when the counter reaches a threshold. Further, the attention assistance device may include a stimulation unit that alerts a user in response to the timer output.
US08803690B2	Context dependent application/event activation for people with various cognitive ability levels The system includes a computer-readable memory having a data structure configured to store information about a time-based event for a patient having reduced cognitive abilities, and optionally also electronic data reflecting the patient's cognitive ability. A networked computer system coupled to the computer-readable memory provides an information communicating interface to the patient. The computer system is programmed to monitor context information relevant to the patient and to dynamically adjust the presentation of the stored information based on the context, and optionally also based upon the patient's cognitive ability.
US08803689B2	Over-the-door pressure sensor anti-ligature and alarm system Apparatus for counteracting a suicide attempt of a person trying to hang himself from a cord extended over the top edge of a door which door has an inside upper surface facing the interior of the room, the apparatus including an elongated pressure sensor mountable on that inside upper surface of the door, the sensor having an exposed surface facing away from the inside surface of the door, that exposed surface being responsive to a force applied thereagainst by a segment of a cord when it is draped over the top of the door and hanging downward adjacent the inside surface, and the apparatus being adapted to forward an alarm signal indicating the sensing of the force by the cord, and an electrical controller to forward an alarm signal indicating that the sensor has sensed the downward force.
US08803688B2	System and method responsive to an event detected at a glucose monitoring device Embodiments include an apparatus responsive to an event detected at a glucose monitoring device. The apparatus includes circuitry to select an action to occur remote to the glucose monitoring device in response to the event. Embodiments include a response center responsive to an event at a glucose monitoring device to contact a person in response to the event.
US08803683B2	System, method, and device for measuring and reporting changing levels of liquids in storage tanks A system for measuring and reporting changing levels of liquids in a storage tank includes a sensing device having a fluid level sensor, an accelerometer, a wireless transceiver, and a microcontroller for detecting the volume of liquid in the storage tank in response to determining that the storage tank is not moving and sending an alert message if the volume of liquid in the storage tank has changed from a previous volume by a threshold amount. The system also includes a central tracking computer having a tracking database and being interfaced to the Internet, and a master control unit attached to the storage tank. The master control unit is for: receiving the alert message from the sensing device; obtaining the location of the storage tank; and communicating the alert message and the location of the storage tank to the central tracking computer for storage in the tracking database.
US08803682B2	Sleep-posture sensing and monitoring system In a system for protecting a user from injury sustained during sleep, a sensing device is operated to automatically monitor orientation or posture of a user during sleep of the user. A signal is transmitted from the sensing device to a control unit, which is operated to activate an appliance so that the appliance generates an alert signal upon detection by the sensing device and control unit of an undesirable orientation or posture of the user.
US08803676B2	Graphic display apparatus A graphic display apparatus within an automotive vehicle wherein the display apparatus includes at least two display units operable to display graphics and/or video, a wire connector connecting the at least two display units together, and a control system connected to the wire connector wherein the control system is operable to play video or graphics on the at least two display units. A method is provided to all the system to be universal for both audio and navigation systems wherein each system calls for a predetermined delay of the animation. The display units are in communication with one another providing for a coordinated or synchronized display of graphics. If, by way of example, a firework explodes on the main display screen, the remnants of that single firework will be exploded onto the secondary display screens.
US08803671B2	Active vibrations Active vibration techniques are described. In implementations, a selection of a type of writing surface or a type of writing implement is received, the selection made through interaction with a user interface. The selected type of writing surface or type of writing implement is simulated using vibrations of a stylus or surface of a computing device that is configured to receive one or more inputs from the stylus.
US08803667B2	Systems and methods for notifying multiple hosts from an industrial controller The subject invention facilitates alert notification in an industrial environment. The systems and methods enable subscribing devices, such as hosts, to receive events and/or alarms associated with industrial controllers. In addition, a subscribed component can unsubscribe, refresh notification related information, and/or acknowledge a notification. The foregoing can be achieved through a set of objects (e.g., notify objects) that implement a notification and dynamic subscription process. A host system can instantiate an associated notify object, subscribe to an event, and be notified about the event. The invention enables multiple hosts to subscribe to the same event, allows each host to select events of interest, and enables the events to be queued if the events occur faster than can be sent. In one aspect of the invention, the systems and methods can be utilized with an event and alarm infrastructure that is applicable on a Control and Information Protocol (CIP).
US08803666B2	Universal access device Systems, methods, and computer-readable and executable instructions are provided for providing a universal access device. Providing a universal access device can include storing access data for each of a number RFID readers, wherein each of the RFID readers accepts a particular RFID protocol. Providing a universal access device can also include selecting a particular RFID protocol for one of the number of RFID readers while the universal access device is within an activation zone of the RFID reader. Furthermore, providing a universal access device can include providing the access data for the particular RFID reader via the particular RFID protocol.
US08803664B2	Radio wave control apparatus, radio wave control system, and radio wave control method A radio wave control apparatus includes a detecting unit that detects an object, other than a communication target device, in a radiation range to which a radio wave radiating unit radiates predetermined radio waves in each of a plurality of radiation directions; and a radiation range determining unit that determines a radiation range in each of the radiation directions such that the predetermined radio waves are radiated over a predetermined communication range, in which the communication target device is communicable using the predetermined radio waves, and no no-communication area that is caused when the predetermined radio waves reflected on the object is caused in the communication range.
US08803656B2	Card-type electronic key A card-type electronic key having a high level of portability and including an emergency mechanical key that is difficult to duplicate. The electronic key is used with a communication controller arranged in a vehicle. The electronic key includes a communication circuit unit which transmits a wireless signal including an authentication code. The communication circuit unit is allowed to control an external device arranged on the subject when the communication controller receiving the wireless signal determines that the verification code is authentic. A key card unit includes a verification code pattern formed by through holes. A concealment film is removably adhered to the key card unit and conceals the through holes so that the through holes cannot be seen.
US08803653B2	Over-current protection device An over-current protection device is of an approximately quadrilateral structure with upper and lower surfaces, first and second side surfaces, in which the second side surface contains a bevel. The device comprises first and second electrodes, a first PTC material layer, and first and second conductive connecting members. The first electrode is formed on the upper or lower surface. The second electrode is formed on the lower surface and is insulated from the first electrode. The first PTC material layer extends along the upper surface, and has a first surface electrically coupled to the first electrode, and a second surface electrically coupled to the second electrode. The first conductive connecting member is formed on the first side surface and is electrically coupled to the first electrode. The second conductive connecting member is formed on the second side surface and extends along the bevel to electrically couple to the second electrode.
US08803652B2	Protection element A protection element is provided which is capable of stably retaining a flux on a soluble conductor at a predetermined position, enabling a speedy and precise blowout of the soluble conductor in the event of an abnormality. This protection element includes: a soluble conductor 13 which is disposed on an insulation baseboard 11 and is connected to a power supply path of a device targeted to be protected, to cause a blowout by means of a predetermined abnormal electric power; a flux 19 which is coated onto a surface of the soluble conductor 13; and an insulation cover 14 which is mounted on the baseboard 11 with the soluble conductor 13 being covered therewith. In addition, the protection element is provided with a protrusive stripe portion 20 which is formed on an interior face of the insulation cover 14 in opposite to the soluble conductor 13 and in which a stepped portion 20a for retaining the flux 19 is formed at a predetermined position while in contact with the flux 19. The soluble conductor 13 has a hole portion 13a at which the flux 19 is retained.
US08803643B2	Control of magnetically actuated tools in any position using a rotating magnetic source Systems and methods utilize a rotating magnetic field to drive a magnetically actuated device where the source of the rotating magnetic field is not constrained to a particular orientation with respect to the device. In one embodiment a rotating permanent magnet is utilized to actuate a magnetically actuated device where the magnet is not constrained to any position relative to the magnetically actuated device, such as the radial or axial position. Accordingly, the rotating permanent magnet may be directed in a manner to avoid collisions or other obstacles in a workspace while still effectively driving the magnetically actuated device.
US08803640B2	Remote operated circuit breaker A circuit breaker having a movable contact arm for opening and closing the circuit which is controlled separately by a circuit breaker mechanism for circuit protection and by a switch lever mechanism which does not require actuation of the circuit breaker mechanism to function. The switch lever may be activated by a solenoid or other suitable means, and various interlocking mechanical states exist among the elements that provide added safety features.
US08803638B2	Waveguides and transmission lines in gaps between parallel conducting surfaces A microwave device having a narrow gap between two parallel surfaces of conducting material by using a texture or multilayer structure on one of the surfaces. The fields are mainly present inside the gap, and not in the texture or layer structure itself, so the losses are small. The microwave device further comprises one or more conducting elements, such as a metal ridge or a groove in one of the two surfaces, or a metal strip located in a multilayer structure between the two surfaces. The waves propagate along the conducting elements. At least one of the surfaces is provided with means to prohibit the waves from propagating in other directions between them than along the ridge, groove or strip. At very high frequency the gap waveguides and gap lines may be realized inside an IC package or inside the chip itself.
US08803637B1	Terahertz metamaterials Terahertz metamaterials comprise a periodic array of resonator elements disposed on a dielectric substrate or thin membrane, wherein the resonator elements have a structure that provides a tunable magnetic permeability or a tunable electric permittivity for incident electromagnetic radiation at a frequency greater than about 100 GHz and the periodic array has a lattice constant that is smaller than the wavelength of the incident electromagnetic radiation. Microfabricated metamaterials exhibit lower losses and can be assembled into three-dimensional structures that enable full coupling of incident electromagnetic terahertz radiation in two or three orthogonal directions. Furthermore, polarization sensitive and insensitive metamaterials at terahertz frequencies can enable new devices and applications.
US08803636B2	Apparatus and associated methods A voltage-tunable phase shifter comprising a conducting line and a ground electrode separated by a layer of dielectric material, the phase shifter configured to generate an electric field when a potential difference is applied between the conducting line and ground electrode, the electric field configured to change the phase of an electromagnetic signal propagating along the conducting line, wherein the ground electrode comprises graphene, and wherein the change in phase is dependent upon the strength of electric field and can be controlled by varying the potential difference between the conducting line and the ground electrode.
US08803634B2	Branching device In a branching device, an LPF includes a first inductor arranged such that some conductor layers from among conductor layers are wound in a clockwise direction, and a second inductor arranged such that a conductor layer from among the conductor layers is wound in an counterclockwise direction. In addition, an HPF includes a third inductor arranged such that conductor layers are wound in the same clockwise direction as the first inductor. Therefore, when a high-frequency signal passes through the LPF, a winding direction is reversed. In addition, when a high-frequency signal passes through the HPF, a winding direction is reversed.
US08803630B2	Miniaturized wide-band baluns for RF applications A wide-band balun device includes a first metallization deposited over a substrate and oriented in a first coil. The first coil extends horizontally across the substrate while maintaining a substantially flat vertical profile. A second metallization is deposited over the substrate and oriented in a second coil. The second coil is magnetically coupled to the first coil and a portion of the second coil oriented interiorly of the first coil. A third metallization is deposited over the substrate and oriented in a third coil. The third coil is magnetically coupled to the first and second coils. A first portion of the third coil is oriented interiorly of the second coil. The third coil has a balanced port connected to the third coil between second and third portions of the third coil.
US08803619B1	Relaxation oscillator with self-biased comparator A relaxation oscillator for generating an output clock signal includes an RC circuit, a self-biased comparator stage, and a logic circuit. The RC circuit generates first and second comparator input signals that are provided to the self-biased comparator stage. The self-biased comparator stage includes first and second input stages and a voltage reference circuit. Each of the first and second input stages in conjunction with the voltage reference circuit forms a comparator, i.e., first and second comparators corresponding to the first and second input stages, respectively. The self-biased comparator stage generates first and second comparator output signals, based on the first and second comparator input signals. The first and second comparator output signals are provided to the logic circuit that generates the output clock signal.
US08803616B2	Temperature compensation and coarse tune bank switches in a low phase noise VCO The LC tank of a VCO includes a main varactor circuit and temperature compensation varactor circuit coupled in parallel with the main varactor circuit. The main varactor is used for fine tuning. The temperature compensation varactor circuit has a capacitance-voltage characteristic that differs from a capacitance-voltage characteristic of the main varactor circuit such that the effects of common mode noise across the two varactor circuits are minimized. The LC tank also has a plurality of switchable capacitor circuits provided for coarse tuning. To prevent breakdown of the main thin oxide switch in each of the switchable capacitor circuits, each switchable capacitor circuit has a capacitive voltage divider circuit that reduces the voltage across the main thin oxide switch when the main switch is off.
US08803614B2	Current reuse electronic device based on magnetic coupling components A current reuse device including a first stage provided with a first input for a first input signal and a first output for a first output signal; a second stage comprising a second input for a second input signal and a direct current terminal operating as a ground terminal for alternate signals; a first inductor connected to a first output and to the direct current terminal so that the first and second stages share a direct current; a second inductor reciprocally coupled to the first inductor and connected to the second input in order to generate the second input signal as a function of the first output signal.
US08803613B2	Power amplification apparatus According to one embodiment, a power amplification apparatus includes an field effect transistor (FET), a first decoupling element, a power supply circuit, a second decoupling element, and a third decoupling element. The FET is arranged within a package having an input terminal and an output terminal, and power-amplify an input signal from the input terminal to a transmission signal. The first decoupling element decreases an inductance component of the transmission signal output from the FET. The power supply circuit supplies a driving power to the FET. The second decoupling element cut an RF component. The third decoupling element decreases an impedance of a drain bias circuit over a wide band.
US08803608B2	Apparatus for amplifying an input-signal Embodiments of the present invention provide an apparatus for amplifying an input-signal. The apparatus includes a switch-mode amplifier for amplifying a digital input-signal. The apparatus is characterized by a generator for generating the digital input-signal based on the input-signal, wherein the generator is configured to generate the digital input-signal such that the digital input-signal is located at a predefined frequency band and such that distortions are located at a frequency higher than the predefined frequency band.
US08803607B2	Power amplifier There is provided a power amplifier capable of increasing linear output power and efficiency without sacrificing an overall gain by employing a vector modulation function in a driving stage, with no separate vector modulator. The power amplifier includes a driving stage performing vector-modulation on an input RF signal to provide an I channel signal and a Q channel signal having different phases and amplifying the I channel signal and the Q channel signal to set gains; and a power stage amplifying power levels of the signals amplified by the driving stage.
US08803605B2	Integrated circuit, wireless communication unit and method for providing a power supply An integrated circuit is described for providing a power supply to a radio frequency (RF) power amplifier (PA). The integrated circuit includes a low-frequency power supply path including a switching regulator and a high-frequency power supply path arranged to regulate an output voltage of a combined power supply at an output port of the integrated circuit for coupling to a load. The combined power supply is provided by the low-frequency power supply path and high-frequency power supply path. The high-frequency power supply path includes: an amplifier including a voltage feedback and arranged to drive a power supply signal on the high-frequency power supply path; and a capacitor operably coupled to the output of the amplifier and arranged to perform dc level shifting of the power supply signal.
US08803603B2	Envelope tracking system for MIMO There is disclosed an amplifier arrangement comprising a plurality of amplifiers each arranged to amplify one of a plurality of different input signals, the arrangement comprising an envelope tracking modulator for generating a common power supply voltage for the power amplifiers, and further comprising an envelope selector adapted to receive a plurality of signals representing the envelopes of the plurality of input signals, and adapted to generate an output envelope signal representing the one of the plurality of envelopes having the highest level at a particular time instant as the input signal for the envelope tracking modulator.
US08803600B2	Output buffer circuit capable of enhancing stability An output buffer circuit capable of enhancing stability includes an operational amplifier, a capacitive load and an output control unit. The operational amplifier has a positive input terminal, a negative input terminal and an output terminal, and generates an output voltage to the output terminal according to an input voltage received by the positive input terminal. The output control unit is coupled between the output terminal of the operational amplifier and the capacitive load, and is utilized for controlling electrical connection between the output terminal of the operational amplifier and the capacitive load to form a signal output path and for adjusting impedance of the signal output path when the signal output path is formed. The output control unit comprises a plurality of output switches for individually turning on or off the electrical connection between the output terminal and the capacitive load of the operational amplifier.
US08803597B2	Semiconductor integraged circuit having compatible mode selection circuit A semiconductor integrated circuit includes a semiconductor chip or a plurality of semiconductor chip stacked therein, wherein each semiconductor chip includes, a compatible mode selection unit configured to select a chip allocation signal allocated to the semiconductor chip, among a plurality of chip allocation signals inputted through a plurality of pads, in response to a stack package information, and an internal circuit configured to perform a given operation in response to the chip allocation signal selected by the compatible mode selection unit.
US08803595B2	Common mode noise cancellation circuit for unbalanced signals This invention provides a common mode noise cancellation circuit for the unbalanced signals. The unbalanced signals come from a signal source with a first signal terminal and a second signal terminal having a first grounding potential. The common mode noise cancellation circuit comprises a grounding terminal and a subtractor. The grounding terminal with a second grounding potential is electrically coupled to the second signal terminal of the signal source through an impedance unit. The subtractor comprises a first receiving terminal, a second receiving terminal and a signal output terminal. The first receiving terminal and the second receiving terminal are electrically coupled to the first signal terminal and the second signal terminal respectively for receiving the unbalanced signals. The subtractor subtracts the noise coming from the first receiving terminal and the noise coming from the second receiving terminal to reduce the output noise of the signal output terminal.
US08803593B2	Voltage discharge optimization One embodiment of an apparatus to control and sense a voltage through a single node can include a comparator to monitor single node voltage, a transistor to discharge voltage through the single node and control logic. The control logic can have at least two operational phases when actively controlling the voltage through the single node. In a first phase, the control logic can configure the comparator to determine if the single node voltage is greater than a reference voltage. In a second phase, the control logic can configure the transistor to discharge voltage through the single node when the comparator has previously indicated that the single node voltage is greater than a reference voltage. The control logic can alternatively execute first and second phases to discharge the voltage to a predetermined level.
US08803589B2	Analog circuit and semiconductor device An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.
US08803584B1	Level shifter for noise and leakage suppression A level shifter circuit is disclosed that gates at least one of a plurality of input terminals of a level shifter to at least one of a plurality of supply voltages that are associated with respective supply voltage domains when the at least one of the plurality of supply voltages is powered down. The level shifter is therefore insensitive to noise on the input terminals and also reduces leakage current associated with noise induced crowbar currents.
US08803583B2	Polyphase clock generator A polyphase clock generator for use in clock data recovery (CDR) includes a phase selector and a four-to-eight phase converter further including a plurality of delay paths, switches, and phase interpolators. The switches switch over the delay paths so as to select a group of delay paths suited to a clock frequency which is determined in advance. A plurality of reference clock signals with a predetermined phase difference (e.g. 90°) therebetween is selectively delayed while passing through the selected group of delay paths. The phase interpolators interpolate the delayed reference clock signals, passing through the selected group of delay paths, into the reference clock signals, thus generating a plurality of clock signals. The phase selector selectively combines the clock signals with a mixing ratio according to clock data recovery, thus generating a plurality of recovery clock signals with a precise phase difference (e.g.) 45°) therebetween.
US08803580B2	Power-on-reset (POR) circuit with zero steady-state current consumption and stable pull-up voltage The present invention discloses a Power-On-Reset (POR) circuit with zero steady-state current consumption and stable pull-up voltage. The POR circuit achieves zero steady-state current consumption during steady operation after the POR process by cutting off a power supply to a band-gap comparator circuit and a current comparator circuit after the POR process. The present invention has high reliability and stable pull-up voltage, is less susceptible to the impact of power-on rate of power supply, temperature, and process variation, has very low steady-state power consumption, and can be integrated in a SOC chip in low-power consumption applications.
US08803576B2	Semiconductor device having duty-cycle correction circuit Disclosed herein is a semiconductor device that includes: an input node; an output node; a plurality of variable delay circuits connected in series between the input node and the output node; a control circuit that commonly controls delay amounts of the variable delay circuits based on phases of a first clock signal supplied to the input node and a second clock signal output from the output node; and a mixer circuit that generates a third clock signal based on any one of input clock signals respectively input to the variable delay circuits and any one of output clock signals respectively output from the variable delay circuits.
US08803574B2	Generating a tuned frequency output from a signal generator A method of tuning the frequency of a generated signal to form an output signal including: forming the generated signal at a signal generator; comparing a feedback signal with a reference signal and generating a control signal in dependence on that comparison, wherein the feedback signal is generated using the output signal; and generating the output signal by performing a frequency-dividing operation in dependence on the generated signal and a dividing factor, wherein the dividing factor is determined in dependence on the control signal.
US08803570B2	Multiphase electrical power assignment at minimal loss In a multiphase electrical power assignment, a processor: receives instructions to connect a bi-directional power device to a multiphase premise power source; determines that the power device is to be coupled to a target phase's phase connection; confirms that the power device is not coupled to any phase connections; and couples the power device to the phase connection, where the power device's power signal is synchronized with the phase connection's power signal. When the power device is in a connected state, the processor: issues a command to place each phase connection switch in an open state; in response to confirming that the phase connection switches are in the open state, issues commands to the power device so that a power signal of the power device will be synchronized with the target phase; and closes the phase connection switch corresponding to the target phase.
US08803567B2	Frequency multiplier system and method of multiplying frequency A frequency multiplier system, for outputting a single phase clock of N multiplied frequency after processing an inputted clock, N≧2, includes a frequency divider receiving the inputted clock, an interpolator connected with the frequency divider, a phase equalizer connected with the interpolator, and a combinational logic circuit connected with the phase equalizer, wherein the frequency divider outputs an orthogonal clock having a two-phases frequency that is a half of the inputted clock to the interpolator, the interpolator outputs a 2N-phases clock to the phase equalizer, the phase equalizer homogenizes a phase skew of the 2N-phases clock, the combinational logic circuit synthesizes the homogenized 2N-phases clock into a single phase clock of N multiplied frequency. And a method of multiplying frequency is provided. The present invention does not need feedback circuits, and therefore is stable and fast-speed, saves area, and reduces energy consumption.
US08803566B2	Output driver circuit An output driver circuit includes a driving control signal generation block configured to compare a power supply voltage and a reference voltage and generate first and second driving control signals and first and second inverted driving control signals; a preliminary driving block configured to drive a pull-up driving signal and a pull-down driving signal with driving strengths set according to the first and second driving control signals and the first and second inverted driving control signals; and a driving block configured to drive output data in response to the pull-up driving signal and the pull-down driving signal.
US08803565B2	Driving circuits, power devices and electronic devices including the same A power device includes a switching device having a control terminal and an output terminal; and a driving circuit configured to provide a driving voltage to the control terminal such that a voltage between the control terminal and the output terminal remains less than or equal to a critical voltage. A rise time required for the driving voltage to reach a target level is determined according to current-voltage characteristics of the switching device. And, when the voltage between the control terminal and the output terminal exceeds the critical voltage, leakage current is generated between the control terminal and the output terminal.
US08803561B2	Semiconductor circuit and semiconductor device A semiconductor circuit of the present invention comprises a capacitor for charging ON driven electric charges in response to an ON driving signal, a capacitor for charging OFF driven electric charges in response to an OFF driving signal, a signal generating circuit for generating a first trigger signal in response to the ON driving signal, a signal generating circuit for generating a second trigger signal in response to the OFF driving signal, a discharging circuit for discharging the ON driven electric charges in response to the second trigger signal, and a discharging circuit for discharging the OFF driven electric charges in response to the first trigger signal. With this configuration, it is possible to provide a semiconductor circuit and a semiconductor device both of which have a general-purpose malfunction prevention function by which a malfunction due to dV/dt can be prevented without being affected by any external factor.
US08803557B2	Comparator circuit and signal comparison method A comparator circuit includes a first comparator configured to store an offset during a first period, and to compare first and second input signals while compensating for the stored offset to generate a first comparison signal during a second period, a second comparator configured to compare the first and second input signals while compensating for an offset to generate a second comparison signal, and a compensation amount controller configured to control an offset compensation amount of the second comparator when the first and second comparison signals have different values.
US08803556B1	Method and apparatus for comparing signals Some of the embodiments of the present disclosure provide a method comprising receiving a first signal and a second signal; generating a first digital count corresponding to a characteristic of the first signal; subsequent to generating the first digital count, generating a second digital count corresponding to a characteristic of the second signal; and comparing the first digital count with the second digital count. Other embodiments are also described and claimed.
US08803552B2	Reconfigurable sequencer structure A cell element field for data processing, having function cell means for execution of algebraic and/or logic functions and memory cell means for receiving, storing and/or outputting information is described. Function cell-memory cell combinations are formed in which a control connection leads from the function cell means to the memory cell means.
US08803548B2	Apparatus and methods for a tamper resistant bus for secure lock bit transfer A tamper-resistant bus architecture for secure lock bit transfer in an integrated circuit includes a nonvolatile memory having an n-bit storage region for storing encoded lock bits, A plurality of read access circuits are coupled to the nonvolatile memory. An n-bit tamper-resistant bus is coupled to the read access circuits. A decoder is coupled to the tamper-resistant bus. A k-bit decoded lock signal bus is coupled to the decoder. A controller is coupled to the k-bit decoded lock signal bus.
US08803544B2	Integrated circuit chip and testing method capable of detecting connection error An integrated circuit chip is provided. The integrated circuit chip includes a pad, a first resistor, a second resistor, a first switch, a second switch and a controller. The first resistor and the first switch are serially connected between the pad and a first reference voltage terminal. The second resistor and the second switch are serially connected between the pad and a second reference voltage terminal. The controller selectively turns on and off the first and second switches according to an error determining mechanism. The error determining mechanism determines whether an error condition associated with the pad is present.
US08803540B2	Galvanically isolated functional test for components A method and a circuit functionally test a semiconductor component. The functional test is performed with galvanic isolation by using a transformer. The test itself is based on determining the frequency-dependent impedance of a series circuit of capacitors and inductors using the semiconductor component itself. The impedance is strongly influenced by the conduction state of the semiconductor component, in other words, by the instantaneous conductivity or blocking capability of the semiconductor component.
US08803538B2	Contactless measuring system for near field measurement of a signal waveguide A contactless measuring system having at least one test probe forming part of a coupling structure for the contactless decoupling of a signal running on a signal waveguide, wherein the signal waveguide is designed as a conductor of the electric circuit on a circuit board and as part of an electric circuit. To this end, at least one contact structure is configured and disposed on the circuit board such that said contact structure is galvanically separated from the signal waveguide, forms part of the coupling structure, is displaced completely within the near field of the signal waveguide, and has at least one contact point, which may be electrically contacted by a contact of the test probe.
US08803535B2	Impedance mismatch detection circuit A comparison circuit for detecting impedance mismatch between pull-up and pull-down devices in a circuit to be monitored includes a comparator operative to receive first and second signals and to generate, as an output, a third signal indicative of a difference between the first and second signals. A first signal generator is operative to generate the first signal indicative of a difference between reference pull-up and pull-down currents that is scaled by a prescribed amount. The reference pull-up current is indicative of a current flowing through at least one corresponding pull-up transistor device in the circuit to be monitored. The pull-down reference current is indicative of a current flowing through at least one corresponding pull-down transistor device in the circuit to be monitored. A second signal generator connected with the second input of the comparator is operative to generate the second signal as a reference voltage defining a prescribed impedance mismatch threshold associated with the circuit to be monitored.
US08803534B2	Circuit and method for sensing a differential capacitance A circuit for sensing a differential capacitance includes a charge-storing circuit to generate a first output voltage and a second output voltage related to capacitances at two terminals of the differential capacitance, respectively, an operational amplifier to amplify the difference between the first and second output voltages to generate a sensing value, a first sampling capacitor having one terminal connected to the negative input terminal and the other terminal receiving the first or second output voltage, and a second sampling capacitor having one terminal connected to the negative input terminal and the other terminal switched to the output terminal of the operational amplifier. The second sampling capacitor stores a non-ideal error value to offset the non-ideal effect of the operational amplifier imparted on the sensing value.
US08803530B2	Electrical fault location determination A method of determining the location of a fault in a cable at an underwater fluid extraction facility is provided. The method comprises: providing a time domain reflectometry unit at the facility, the unit being connected to at least one wire within the cable; causing the unit to transmit a current pulse to the wire; detecting a reflected pulse received at the unit; determining the time duration between the pulse transmission and the reflected pulse reception and using the duration to calculate a distance between the fault and the unit; and determining the location of a fault on the wire using the calculated distance.
US08803528B2	Apparatus and method for measuring current and voltage of secondary battery pack in synchronization manner Provided is an apparatus for measuring current and voltage of a secondary battery pack in synchronization manner, comprising a voltage measurement circuit for periodically measuring and outputting the level of a charging voltage of each of a plurality of battery cells contained in a battery pack; a current measurement circuit for periodically measuring and outputting the level of current flowing into or out of the battery pack; and a control unit for synchronizing a time difference between a current measurement time point of the battery pack and a voltage measurement time point of each battery cell with a reference delay time.
US08803527B2	Use of electrodes and multi-frequency focusing to correct eccentricity and misalignment effects on transversal induction measurements A multicomponent induction logging tool uses a nonconducting mandrel. A central conducting member including wires that electrically connect at least one of the antennas to another of the antennas. Electrodes disposed about the transmitter antenna form a conductive path through a borehole fluid to the central conducting member.
US08803525B2	Local coil for a magnetic resonance device A local coil for a magnetic resonance device includes a connector apparatus for establishing a connection to a plug-in station on a patient couch and at least one storage facility. The storage facility may be used to read out by way of the connection and may store at least one non-modifiable data item describing a property of the local coil. The storage facility may include at least one detection facility for acquiring measurement values describing the state of the local coil and at least one evaluation facility configured to modify the readout address of the storage facility as a function of the measurement values.
US08803516B2	Eddy current testing method and apparatus for inspecting an object for flaws In an eddy current testing method which involves using a rotatable eddy current testing probe in which a detection coil is arranged within an exciting coil, a change in detection sensitivity (a deviation of detection sensitivity) which changes depending on the rotational position of the detection coil is reduced. The eddy current testing probe includes an exciting coil EC1, a detection coil DC1, an exciting coil EC2 and a detection coil DC2, which are mounted on a disk DS. The eddy current testing probe is placed so as to face a circumferential surface of an object to be inspected T, which is in the shape of a circular cylinder, and the disk DS is rotated. Then, the distance (liftoff) between the detection coils DC1 and DC2 and an inspection surface changes. Therefore, also the detection sensitivity to a flaw signal changes. To reduce the change in detection sensitivity, the detection sensitivity is adjusted by detecting the rotational position (rotational angle) of the detection coils DC1 and DC2.
US08803514B2	Linear position sensor A sensor used to sense the position of an attached movable object. The sensor can be mounted to a pneumatic actuator. The sensor includes a housing that has a pair of cavities or pockets separated by a wall. A magnet carrier is positioned within one of the cavities and a magnet is coupled to the magnet carrier. The magnet carrier is coupled to the moveable object. A magnetic sensor is positioned in the other of the cavities. The magnetic sensor generates an electrical signal that is indicative of a position of the movable object.
US08803507B2	Digital multimeters including a remote display A digital multimeter includes a body having a function selector and a first coupler and includes a head having a display and a second coupler. The function selector selects a parameter to be measured, and the display displays a measurement corresponding to the parameter to be measured. The first and second couplers are engaged in a first arrangement joining the body and the head, and the first and second couplers are disengaged in a second arrangement separating the body and the head.
US08803504B2	Method and device for diagnosing signal status in measurement, drive, or control, and transformer used in the device A device for diagnosing signal status includes a transformer, a signal generating unit, a device-to-be-driven, a current measuring unit, and an intermediate tap. The transformer includes a primary coil and a secondary coil. The signal generating unit is arranged for generating an alternating voltage and is connected to the primary coil. The device-to-be-driven is arranged for performing measurement, drive, or control and is connected to the secondary coil. The current measuring unit is arranged for measuring change in the current of the primary coil caused by electric power consumed for an action of the device-to-be-driven. In at least one embodiment, diagnosis of signal status in the measurement, drive, or control by the device-to-be-driven is performed based on the measurement result of said change in current. The intermediate tap is provided to the primary coil and configured to be connected to the current measuring means.
US08803502B2	Voltage regulator A voltage regulator includes a voltage generation unit, a first resistor section, and a second resistor section. The voltage generation unit compares a reference voltage level with a voltage level of a first node and generates an output voltage. The first resistor section includes a first sub-resistor and a second sub-resistor between the first node and a ground voltage node, and controls a connection between the first sub-resistor and the second sub-resistor to change a resistance value of the resistors. The second resistor section includes a reference resistor, a plurality of unit resistors, and a plurality of step resistors, and controls connections of the unit resistors and the step resistors to change a resistance value of the resistors.
US08803497B2	Current detector of inductive load A current detector of an inductive load includes: an inductive load 100; a switching element 101 connected in series with the inductive load and controls an electric current to be carried through this inductive load by ON/OFF operation; a current circulating diode 102 connected in parallel with the inductive load and circulates an electric current of the inductive load when the switching element is OFF; current detecting device 103 making a sampling in a cycle of a predetermined sampling period to detect an electric current to be carried through the switching element 101; and current correction device 104 making a correction with respect to an electric current value having been detected at the current detector, and in which the current correction device 104 changes the correction rate based on DUTY of a pulse with which the switching element is brought in ON/OFF operation.
US08803493B2	Voltage regulator with differentiating and amplifier circuitry The invention relates to a voltage regulator having a differentiating circuit and an amplifier, the differentiating circuit being designed to detect a voltage at the voltage regulator connection and to provide it as a differentiated signal at its differentiating output, and the amplifier being designed to inject a compensation signal dependent on the differentiated signal into an input connection of an output circuit of the voltage regulator.
US08803489B2	Adaptive on-time control for power factor correction stage light load efficiency Light load efficiency of a power factor correction circuit is improved by adaptive on-time control and providing for selection between a continuous conduction mode and a discontinuous conduction mode wherein the discontinuous conduction mode increases time between switching pulses controlling connection of a cyclically varying voltage to a filter/inductor that delivers a desired DC voltage and thus can greatly reduce the switching frequency at light loads where switching frequency related losses dominate efficiency. The mode for controlling switching is preferably selected for each switching pulse within a half cycle of the cyclically varying input voltage. A multi-phase embodiment allows cancellation of EMI noise at harmonics of the switching frequency and adaptive change of phase angle allows for cancellation of dominant higher order harmonics as switching frequency is reduced.
US08803485B2	High efficiency adaptive power conversion system and method of operation thereof A power conversion system is disclosed. The system comprises a plurality of power conversion modules and a controller that turns on/off each power conversion module separately based on changing load conditions, and manages to keep each power conversion module running at its peak efficient state.
US08803484B2	Wireless energy transfer antennas and energy charging systems A resonant wireless energy transfer system comprises first and second antennas made up of dual parallel wire helixes wherein the wires are terminated by short wires. Voltage controlled variable capacitors are connected into the antennas to permit progressive variation between folded dipole and normal dipole operating modes such that optimum energy transfer can be achieved between the antennas over a wide range of antenna separation distances. A vehicle battery charging system using the above-described antennas is provided including an installation which allows purchase of battery charging power by members of the general public. In-vehicle energy transfer for sensors, computers, cell phones and the like is also described.
US08803482B2	Nonaqueous electrolyte type secondary battery system and vehicle A purpose is to provide a nonaqueous electrolyte type lithium ion secondary battery system, a control method, and a vehicle using the system, arranged to prevent unevenness of a salt concentration distribution in an electrolyte, avoiding an increase in internal resistance, thus improving endurance of the nonaqueous electrolyte type lithium ion secondary battery. For a measuring time (S101 to S104), a charge threshold current Ic and a discharge threshold current Id are read out (S102) and a charge hysteresis value Cc and a discharge hysteresis value Cd are calculated (S103). The charge hysteresis value Cc and the discharge hysteresis value Cd are compared (S105). If the charge hysteresis value Cc is larger than the discharge hysteresis value Cd (S105: Yes), a current value on a charge side is limited (S106). To the contrary, if the charge hysteresis value Cc is equal to or smaller than the discharge hysteresis value Cd (S105: No), a current value on a discharge side is limited (S107).
US08803480B2	Charge/discharge control apparatus and charge/discharge control method Included are a power-generation amount calculating section calculating an expected amount of power-generation being an amount of power generated by a power generating section in the future, for each predetermined period, a power-consumption amount calculating section calculating an expected amount of power-consumption being an amount of power consumed by a power load, for the predetermined period, an excess power period determining section determining an excess power period, an excess power amount calculating section calculating an expected excess power amount, and a charge/discharge control section controlling charge/discharge of a battery so that a remaining amount of the battery at the beginning of the excess power period becomes an amount resulting from subtracting the expected excess power amount from a pre-set charge amount.
US08803474B2	Optimization of wireless power devices Exemplary embodiments are directed to wireless power. A chargeable device may comprise receive circuitry for coupling to a receive antenna. The receive circuitry may comprise at least one sensor to sense one or more parameters associated with the chargeable device. Further, the receive circuitry may comprise a tuning controller operably coupled to the at least one sensor to generate one or more tuning values in response to the one or more sensed parameters. Additionally, the receive circuitry may comprise a matching circuit operably coupled to the tuning controller for tuning the receive antenna according to the one or more tuning values.
US08803471B2	Electric vehicle extended range hybrid battery pack system A power source comprised of a first battery pack (e.g., a non-metal-air battery pack) and a second battery pack (e.g., a metal-air battery pack) is provided, wherein the second battery pack is only used as required by the state-of-charge (SOC) of the first battery pack or as a result of the user selecting an extended range mode of operation. Minimizing use of the second battery pack prevents it from undergoing unnecessary, and potentially lifetime limiting, charge cycles. The second battery pack may be used to charge the first battery pack or used in combination with the first battery pack to supply operational power to the electric vehicle.
US08803468B2	System and method for fast discharge of a ring motor field High-power synchronous motors are commonly used in mining operations, for example, in gearless draglines, gearless conveyor drives, and gearless mill drives. Substantial electromagnetic energy is stored in the inductive field windings. In the event of a system fault, such as a short in the direct current power source exciting the field windings, the electromagnetic energy needs to be discharged from the field windings. This electromagnetic energy is typically dissipated as waste heat through a resistor. Disclosed is a field discharge system in which the electromagnetic energy is captured and stored as electrical energy in a capacitor. If an ultracapacitor bank is used for storage, the charged ultracapacitor bank can be used as a backup or auxiliary power source for mining operations. The discharge time is sufficiently small that high speed circuit breakers are not needed to disconnect stator windings from the alternating current power source when a fault occurs.
US08803466B2	Motor control apparatus A motor control apparatus includes a position detector to detect a position of a motor. A speed operator calculates a first speed of the motor. A position controller outputs a first speed command. A speed controller acquires a difference between the first speed command and a second speed of the motor to output a first torque/thrust command. A phase compensator includes a lowpass filter to advance a phase of the second speed, and acquires the first speed and the first torque/thrust command to output the second speed. An inertia variation inhibitor includes a disturbance observer estimating a disturbance torque/thrust. The inertia variation inhibitor acquires the first speed and a second torque/thrust command, and adds the disturbance torque/thrust to the first torque/thrust command to output the second torque/thrust command. A torque/thrust controller acquires the second torque/thrust command to control a motor torque/thrust.
US08803465B1	Frequency-selective command profile motion control A motion command is constructed based on an optimized acceleration pulse designed to control the spectral content of the commanded acceleration. By way of judicious design of the pulse shape, the majority of the energy in the command is contained in a narrow baseband and rolls off rapidly in frequencies outside that band. Additionally, the command can be constructed to suppress selected frequency content in one or more attenuation bands outside the baseband. The resulting motion command permits rapid motion control, while avoiding the excitation of unwanted resonant response in the system while remaining tolerant of system uncertainty.
US08803464B2	Fan speed control circuit A fan speed control circuit is provided. The circuit includes a control chip. The control chip stores a relationship table recording a number of duty cycle intervals and a number of rotational speeds of a fan. Each duty cycle interval corresponds to one rotational speed of the fan. The control chip obtains a preset number of PWM signals outputted by a processing chip; determines the average value according to the duty cycle of the obtained preset number of PWM signals; determines which duty cycle interval the average value is in, according to the relationship table; determines the rotational speed of the fan corresponding to the determined duty cycle interval according to the relationship table; and controls the fan to rotate according to the determined rotational speed.
US08803457B2	AC motor drive control device An AC motor drive control device including: an inverter, having a plurality of switching elements subjected to on-off control, for converting a DC voltage to an AC voltage with a desired frequency to drive an AC motor; a motor opening contactor connected between the inverter and the AC motor; a switching operation beforehand detection unit for detecting a switching operation of the motor opening contactor prior to the contact or detach of main contacts and outputting a switching operation beforehand detection signal; and a control unit having an inverter control unit for performing the on-off control for the plurality of switching elements and switching control for the motor opening contactor, and controlling the inverter based on the switching operation beforehand detection signal.
US08803456B2	Motor drive control device A motor drive control device is provided in which if any abnormality occurs in a drive control circuit, drive command signals the drive control circuit generates are interrupted at once, so that an AC motor can be stopped in safety. A monitor control circuit and drive command signal interruption circuit are provided to the drive control circuit that takes variable-speed control of the AC motor supplied with power from a DC drive power source via a semiconductor bridge circuit. If any abnormality occurs in the drive control circuit, the drive command signals the drive control circuit generates are interrupted at once. When starting operation, the drive control circuit and monitor control circuit cooperate with each other to conduct preliminary check as to whether or not the drive command signal interruption circuit operates normally, base on a predetermined time schedule, and stop the AC motor without fail if any abnormality occurs during operation.
US08803455B2	Motor controlling apparatus and electric power steering apparatus using the same [Problem]An object of the present invention is to provide a motor controlling apparatus that comprises a single current sensor and obtains a maximal duty range that current becomes detectable with realizing size reduction, weight saving and cost reduction and an electric power steering apparatus using the same.[Means for solving the problem]A motor controlling apparatus that calculates each phase duty command value for controlling a motor current by means of control calculation, forms PWM waveforms corresponding to each phase duty command value and drives the motor based on the PWM waveforms by an inverter, comprising: a duty shift function that uniformly either increases or decreases each phase duty command value with keeping differences in each phase duty command value; and a PWM output position changing function that decides output positions of each phase PWM signal, and wherein a single current detector is connected to power supply input side or power supply output side of the inverter, timing that a PWM signal of only one phase becomes ON state or PWM signals of two phases become ON state simultaneously is generated at fixed positions of PWM periods, and the motor current is detected.
US08803452B2	High intensity light source A light source comprises a heat-sink having a mounting region, and heat-dissipating fins, a base housing having an inner cavity and coupled to the heat-sink, and an integrated lighting module including: a printed circuit board; an LED on a substrate coupled to the printed circuit board within a first lateral region of the printed circuit board, and an electronic driving circuit for providing power to the LED and coupled to the printed circuit board within a second lateral region of the printed circuit board, wherein a bottom surface of the substrate is thermally coupled to the mounting region of the heat-sink, and wherein the second lateral region of the integrated lighting module is located within the inner cavity of the base housing.
US08803451B2	Multiplexer circuit for dual thermistor operation using a single line coupling A time-multiplexed thermal sensing circuit is provided for control and sensing of two thermistors over a single line electrical coupling. The circuit may include a first diode that selectively couples or isolates a first thermistor from a sense node based on the polarity of an applied voltage to the sense node. The circuit may further include a second diode that selectively couples or isolates a second thermistor from the sense node based on the polarity of the applied voltage to the sense node such that only of the thermistors is coupled to the sense node at any time.
US08803450B2	Digital control circuit of an operating device for lamps The invention relates to an integrated digital control circuit for an operating device for lamps, comprising: an output for the pulsing of switches of a half-bridge circuit having an adjustable frequency, wherein a load circuit comprising the lighting devices may be connected to the half-bridge circuit, an input, to which a signal may be selectively supplied, said signal reflecting the current through the half-bridge or the current through the lamp. The input is internally branched into two analysis branches, the outputs of which are combined using a logic member, the output of which is connected in turn to a controller for adjusting the frequency of the half-bridge actuating signal.
US08803448B2	Constant current output sink or source A constant current output sink or source eliminates a current limiting series resistor for a light emitting diode (LED) and maintains a constant light intensity from the LED for all operating and manufacturing variables of a digital device since the current through the LED is maintained at a constant value. The constant current output sink or source may be programmable for selection of a constant current value from a plurality of constant current values available.
US08803446B2	Lighting apparatus The lighting apparatus in accordance with the present invention includes a dimming control unit configured to control, in accordance with a dimming ratio, a light source including a plurality of light emitting elements designed to emit light in response to DC power. The dimming control unit is configured to, when the dimming ratio falls within a first dimming range, vary supply power to the light source in accordance with the dimming ratio. The dimming control unit is configured to, when the dimming ratio falls within a second dimming range different from the first dimming range, vary, in accordance with the dimming ratio, a lighting number defined as the number of the light emitting elements to be lit.
US08803444B2	Method and system of controlling illumination characteristics of a plurality of lighting segments The invention provides a method and system of controlling illumination characteristics of a plurality of lighting segments. According to the invention, there is provided an illumination system, comprising: a plurality of lighting segments; a detecting subsystem configured to detect an illumination intensity and/or color of lights emitted from each lighting segment; a controller configured to receive the detecting subsystem's output signals representing illumination intensity and/or color of lights emitted from each lighting segment and to generate sets of driving signals to respectively adjust the driving currents of each lighting segment in response to the output signals, so as to adjust the illumination intensity and/or color of the lights emitted from each lighting segment in accordance with a predetermined illumination setting, wherein each set of driving signals has a unique period feature which is distinguished from that of other sets of driving signals corresponding to other lighting segments.
US08803443B2	Current regulator for multimode operation of solid state lighting A representative apparatus embodiment provides a plurality of operating modes for solid state lighting, such as a flash mode and a constant or background lighting mode for use with devices such as cameras. A representative apparatus comprises a memory adapted to store a plurality of average current parameters; and a controller adapted to modulate an energizing cycle time period (“T”) for providing power to the solid state lighting as proportional to the product of the selected average current parameter (“a”) and a reset time period (“TR”) for an inductor current to return to a substantially zero level from a predetermined peak level (T∝a·TR). The average current parameter is predetermined as substantially proportional to a ratio of a peak inductor current level (“IP”) to an average output D.C. current level (“IO”) ( a ∝ I P I O ) .
US08803442B2	Illuminating device To a constant-current power supply whose output current can be variably set, light emitting modules can be connected in parallel. A control unit recognizes connection information outputted from an information output unit provided in each of the light emitting modules and varies the output current of the constant-current power supply. Drive can be controlled in response to a state of the connected light emitting modules such as the connecting number of light emitting modules.
US08803433B2	Lighting power source and luminaire A lighting power source according to an embodiment includes a rectifying circuit, a smoothing capacitor, a reference voltage generating circuit, and a DC-DC converter. The rectifying circuit rectifies an AD voltage input thereto. The smoothing capacitor smoothes an output from the rectifying circuit. The reference voltage generating circuit generates a reference voltage on the basis of at least any one of an output voltage of the rectifying circuit and a voltage from the smoothing capacitor. The DC-DC converter includes an output element and a constant current element, and converts the voltage of the smoothing capacitor. The output element receives a supply of a voltage of the smoothing capacitor, oscillates by performing a switching operation which repeats an ON state and an OFF state when the reference voltage is relatively high, and continues the ON state when the reference voltage is relatively low.
US08803431B2	Light emitting diode luminance system having clamping device A light emitting diode luminance system includes a first power source, a voltage divider, a first switch, a clamping device, a plurality of current sources and a feedback circuit. The voltage divider is coupled to the first voltage source. The first switch is coupled to the voltage divider and a ground. The clamping device includes a plurality of transistors each coupled to a respective set of light emitting diodes and the voltage divider. The plurality of current sources is coupled to the plurality of transistors respectively. The feedback circuit is coupled to the plurality of transistors and the plurality sets of light emitting diodes.
US08803430B2	Light source module, method of driving the light source module and display apparatus having the light source module A light source module includes a LED array, a switch and a control part. The LED array includes a plurality of LED rows and a bridge light emitting part connecting the LED rows with each other. Each of the LED rows has a first direction light emitting part and a second direction light emitting part which are alternately disposed with each other. The switch adjusts an intensity of a current applied to the LED array. The control part determines an output status of the LED array and provides a control signal to the switch.
US08803429B2	Structure of LED light color mixing circuit The present invention provides a structure of color mixing circuit of LED light. The LED light includes two input terminals and two output terminals. The two input terminals are respectively an input terminal of reverse parallel connection of any two light-emitting chips of three primary-color light-emitting chips of R, G, B and an anode input terminal of the remaining light-emitting chip and the two output terminals are respectively an output terminal of reverse parallel connection of any two light-emitting chips of the three primary-color light-emitting chips of R, G, B and a cathode output terminal of the remaining light-emitting chip. The structure is simple and the purposes of reducing the number of IC control chips and synchronous color change of light-emitting chips are achieved with modification only made on electrical connection among the three primary-color light-emitting chips in realizing operation of a group of LED lights connected in series.
US08803428B2	Current-limiting device and light-emitting diode apparatus containing the same An LED apparatus includes an LED component and a current-limiting device. The LED component includes at least one LED having a corresponding current-limiting resistance value. The current-limiting device includes a plurality of PTC devices connected in series. The plurality of PTC devices are capable of effectively sensing the temperature of the LED and are electrically coupled to the LED component. The resistance value of the current-limiting device increases with the increment of sensed temperature. The current-limiting device has a resistance close to or equal to the current-limiting resistance value at a temperature at which the LED operates normally. When the temperature of the LED gradually increases to an abnormal temperature, current allowable to be flowed through the current-limiting device gradually decreases to be lower than LED operating current.
US08803426B2	Modular LED lighting system According to various embodiments of the invention, an LED lighting system is providing having a replaceable driver module. In some embodiments, the replaceable driver module comprises a component that is physically attachable to an LED illumination module, whereby the attached components have a combined physical profile dimensioned for installation in a pre-existing light fixture. In further embodiments, the combined system's dimensions allow it to be installed in pre-existing fluorescent fixtures without requiring rewiring of the fixtures. In some embodiments, the LED driver module may be configured to condition power received from a fluorescent light ballast to drive the LEDs such that a pre-existing fluorescent ballast does not need to be removed. In other embodiments, the LED driver may be configured to condition main power such that a pre-existing fluorescent ballast may be removed.
US08803425B2	Device for generating plasma and for directing an flow of electrons towards a target Various embodiments include a device for generating plasma and for directing an flow of electrons towards a specific target; the device comprises a hollow cathode; a main electrode at least partially placed inside the cathode; a resistor, electrically earthing the main electrode; a substantially dielectric tubular element extending through a wall of the cathode; a ring-shaped anode placed around the tubular element and earthed; and an activation group which is electrically connected to the cathode and is able to reduce the electric potential of the cathode of at least 8 kV in about 10 ns.
US08803421B2	Display with organic light emitting elements Disclosed herein is a display including an acceptor substrate having thereon a red light-emitting element column, a green light-emitting element column, and a blue light-emitting element column that are arranged along a row direction and are each obtained by arranging rectangular organic light-emitting elements for generating light of one of red, green, and blue along a longitudinal direction of the organic light-emitting elements.
US08803419B2	Light-emitting element, light-emitting device, and electronic device It is an object of the present invention to provide a light-emitting element with high light emission efficiency and with a long lifetime. A light-emitting device comprises a first electrode, a second electrode, a light-emitting layer, a first layer, and a second layer, wherein the first layer is provided between the light-emitting layer and the first electrode, the second layer is provided between the light-emitting layer and the second electrode, the first layer is a layer for controlling the hole transport, the second layer is a layer for controlling the electron transport, and light emission from the light-emitting layer is obtained when voltage is applied to the first electrode and the second electrode so that potential of the first electrode is higher than potential of the second electrode.
US08803411B2	Charged particle beam radiation apparatus In an accelerating tube which uses a conductive insulator, there is a possibility that the dopant concentration on a surface of the conductive insulator becomes non-uniform so that the surface resistance of the conductive insulator becomes non-uniform. Accordingly, a circumferential groove is formed on the inner surface of the conductive insulator accelerating tube in plural stages, and metal is metalized along inner portions of the grooves. When the resistance of a specific portion on the surface of the accelerating tube differs from the resistance of an area around the specific portion, the potential of the metalized region on the inner surface of the accelerating tube becomes a fixed value and hence, the potential distribution on the inner surface of the accelerating tube in the vertical direction can be maintained substantially equal without regard to the circumferential direction.
US08803408B2	Light source device [Object] To provide a light source device which allows the lighting starting properties of a high-pressure discharge lamp to be reliably improved without increasing the entire length of the light source device and exposing an auxiliary lamp to the outside.[Solution] A light source device 10 includes: a high-pressure discharge lamp 12; a bowl-shaped reflector 16 having an insertion hole 44 which is formed in a bottom portion 16a and in which a sealing portion 24 is inserted, an inner space 46, and a reflection surface 48 formed on an inner surface thereof; an auxiliary lamp 14 which emits ultraviolet rays UV; and a base 18 having formed therein an accommodation space 52 in which the auxiliary lamp 14 is accommodated between the base 18 and the outer side of the bottom portion 16a. The object can be achieved by setting a thickness t of the bottom portion 16a to be small such that an outer end portion 24a of the sealing portion 24 inserted in the insertion hole 44 projects into the accommodation space 52 of the base 18 and such that the entirety of an ultraviolet ray emitting space 36 of the auxiliary lamp 14 located along the side surface of the sealing portion 24 faces the sealing portion 24 in the accommodation space 52.
US08803407B2	Piezoelectric device with asymmetrically mounted tuning-fork type piezoelectric vibrating piece The piezoelectric device comprises a piezoelectric vibrating piece having a base portion, a pair of vibrating arms extending in a specified direction from the base portion, and a pair of connection portions disposed on the pair of the supporting arms; a package having a bottom surface which accommodates the piezoelectric vibrating piece and side faces surrounding the bottom surface, in which a pair of electrode pads corresponding to the connection portions are formed on the bottom surface; and adhesive for bonding the pair of the electrode pads with the pair of connection portions. One electrode pad and the other electrode pad, with adhesive applied to the electrode pads, are shifted with respect to each other in a predetermined direction.
US08803406B2	Flexible nanocomposite generator and method for manufacturing the same There are provided a flexible nanocomposite generator and a method of manufacturing the same. A flexible nanocomposite generator according to the present invention includes a piezoelectric layer formed of a flexible matrix containing piezoelectric nanoparticles and carbon nanostructures; and electrode layers disposed on the upper and lower surfaces of both sides of the piezoelectric layer, in which according to a method for manufacturing a flexible nanocomposite generator according to the present invention and a flexible nanogenerator, it is possible to manufacture a flexible nanogenerator with a large area and a small thickness. Therefore, the nanogenerator may be used as a portion of a fiber or cloth. Accordingly, the nanogenerator according to the present invention generates power in accordance with bending of attached cloth, such that it is possible to continuously generate power in accordance with movement of a human body.
US08803404B2	Ultrasound probe and manufacturing method thereof An ultrasound probe and a method for manufacturing the same are provided. More particularly, a one-dimensional or two-dimensional ultrasound probe having a multi-element-type piezoelectric material is easily manufactured by inserting a flat wire in a backing material, wherein the flat wire is used as a signal cable to supply electrical signals, enabling easy and simple arrangement of piezoelectric units as well as the signal cable.
US08803399B2	Rotor with reinforced squirrel-cage conductive body and manufacturing method thereof A rotor including a cylindrical iron core having a through hole for receiving a rotational shaft, and a squirrel-cage conductive body including a plurality of conductive bars and a pair of annular conductive end rings provided at both ends of the plurality of conductive bars is provided. The conductive bars extend along a direction in which the rotational shaft is received and are arranged at an outer circumference of the iron core at certain intervals. The rotor further includes a conductive reinforcing layer extends on at least a part of an outer surface of the conductive end ring. The conductive reinforcing layer is formed by spraying conductive particles in a solid phase onto the outer surface of the conductive end ring.
US08803394B2	Rotor for rotary electric machine having a magnetic flux-restraining hole In a rotor for a rotary electric machine, a plurality of magnetic poles are provided in a radially outer portion of the rotor iron core, at intervals in the circumferential direction. Each magnetic pole includes a pair of permanent magnets disposed apart from each other in the circumferential direction, and a magnetic flux-restraining hole that is formed and extended radially inwardly between radially inner end portions of the permanent magnets and that restrains flow of magnetic flux. The magnetic flux-restraining hole is extended so as to project beyond a position of the radially inner end portions to a radially outer side, between the pair of permanent magnets.
US08803393B2	Multi-phase stator device Disclosed is a stator device adapted to be arranged in an electrical machine, where the electrical machine further includes a moving device, where the stator device is a multi-phase stator device, where the phases are arranged side-by-side in a direction perpendicular to direction of motion of the moving device, and where each phase comprises a first stator core section having a set of teeth, a second stator core section having a set of teeth, and a coil, and where the teeth are arranged to protrude towards the moving device; and wherein at least two neighboring phases share a stator core section, so that the first stator core section of a first phase and a second stator core section of a second phase is formed as a single unit.
US08803391B2	Spindle motor There is provided a spindle motor including: a sleeve supporting a shaft; and a rotor hub coupled to an upper portion of the shaft to thereby form a bearing clearance with the sleeve, wherein the sleeve and the rotor hub are provided with a plurality of sealing parts for preventing a leakage of a lubricating fluid.
US08803384B2	Stators with reconfigurable coil paths A device includes a rotor and a stator with coils arranged to form a phase element. The phase element includes a first coil group including a first coil and a second coil and a second coil group including a third coil and a fourth coil, where the rotor is positioned between the first coil group and the second coil group. The device also includes one or more switches that enable reconfiguration of the phase element by switching an electrical configuration of the coils. In a first mode, the coils are arranged with the first coil in a first coil path and the second coil in a second coil path that is coupled in parallel with the first coil path. The coils are arranged such that a voltage generated across the first coil path is substantially equal to a voltage generated across the second coil path.
US08803381B2	Electric machine with cooling pipe coiled around stator assembly Some embodiments of the invention provide an electric machine module include a housing. In some embodiments, the housing can include at least one end cap coupled to a central member. The housing can include a first axial end and a second axial end. The central member can include at least a portion of a coolant pipe, which can include end portions extending at least partially through the end cap. In some embodiments, an electric machine, which can include a stator assembly, can be positioned within the housing so that the coolant pipe is substantially coiled around at least a portion of an outer perimeter of the stator assembly.
US08803379B2	Cooling device for an electric machine arrangement A cooling device (1) is provided for an electric machine arrangement (M) that has two electric machines (m1, m2). The cooling device (1) has cooling ducts that run helically around the electric machine arrangement (M). Two openings (7, 9) are arranged at one end (11) of the cooling device (1) and permit an entry and exit of a stream of cooling medium. As a result, the cooling device (1) is particular effective with respect to temperature distribution.
US08803376B2	AC motor and control apparatus for the same An AC motor is provided. In the AC motor, there are M pieces (M is an integer of 3 or more) of stator pole groups SPG are arranged in a rotor axis direction, where each of the stator poles groups is composed of a plurality of stator poles which are for the same phase and arranged in a circumferential direction of the motor. Between the stator pole groups SPG, “M−1” pieces of annular windings WR are arranged which allow one-way current to flow therethrough. The windings WR are arranged such that the directions of current passing therethrough are reversed in turn in the rotor axis direction. The stator pole groups SPG are excited to generate magnetic fluxes φG directed in a one way. The excited directions of the magnetic fluxes φG are reversed in turn in the rotor axis direction.
US08803374B2	Molded motor A molded motor includes a stator, a resin casing, a rotor, a pair of bearings, a pair of bearing retainers, a resin bracket cover, and a control board. The rotor includes a shaft. The bearings are arranged to rotatably support the shaft. The bearing retainers are made of an elastic electrically insulating body. The bearing retainers are arranged to cover the bearings at radial outer sides of the bearings and to hold the bearings in place. The bracket cover is arranged to cover the open side of the casing. One of the bearings is attached to the bracket cover through one of the bearing retainers. The other bearing is attached to a bottom wall portion of the casing through the other bearing retainer.
US08803373B2	Linear vibration motor Disclosed herein is a linear vibration motor including: a stator part including a magnet; a vibrator part including a coil facing the magnet to generate electromagnetic force and a printed circuit board having one end coupled to the stator part and the other end coupled to the coil; and an elastic member connecting the stator part and the vibrator part to each other, wherein the stator part further includes a damper facing the vibrator part. The damper is made of a rubber material having lower density in order to alleviate and absorb impact at the time of contact with the vibrator part, thereby making is possible to prevent vibration noise due to residual vibration generated at the time of contact between the vibrator part and the stator part.
US08803367B2	Sub sampling electrical power conversion The present invention relates to a solution for electrical power conversion using a first gate (202, 302) for starting an electrical wave in a wave propagating medium (205, 306) acting as a transmission delay where an electrical wave propagates and due to reflections in the propagating medium a resulting wave builds up and is transferred to an output for delivering a power amplifier, DC/DC converter or similar function and the output is controlled using a second gate (204, 304).
US08803361B2	Apparatus and method for providing uninterruptible power Systems and methods of controlling an uninterruptible power supply are provided. The uninterruptible power supply includes an input to receive input power, and an output to provide power to a load. The uninterruptible power supply also includes an inverter, a bypass switch, and a controller. The inverter is coupled with the input and with the output, and the bypass switch can provide the input power at the output in a bypass mode of operation. The controller is coupled with the inverter and the bypass switch. The controller can activate the bypass switch in a first configuration to provide the input power at the output during a first half of a cycle of an input voltage waveform, and can activate the bypass switch in a second configuration to provide the input power at the output during a second half of the cycle. With the inverter active during bypass operation, the inverter can more quickly provide output power upon the loss of bypass power, and can provide near unity power factor correction and harmonic distortion correction.
US08803360B2	Boot-strap regulator for gate driver Techniques are disclosed relating to supplying a power supply voltage to a gate driver. In one embodiment, an apparatus is disclosed that includes a first transistor configured to raise a voltage at a node and a second transistor configured to lower the voltage at the node. The apparatus further includes a first driver configured to receive a first power supply voltage, and to use the first power supply voltage to control a gate voltage of the first transistor. The apparatus further includes a second driver configured to receive a second power supply voltage, and to use the second power supply voltage to control a gate voltage of the second transistor. In such an embodiment, the apparatus includes a first regulator coupled to the first driver and configured to generate the first power supply voltage based on the second power supply voltage.
US08803356B2	Controller for AC electric train In a controller for an AC electric train capable of power running and regenerative running, and capable of detecting a power failure in an AC overhead wire for supplying AC electric power, a power failure in the AC overhead wire is swiftly and reliably detected. A power failure detector provided in an electric-train control unit includes a specific-frequency-signal calculating unit that extracts a current component corresponding to a specific-frequency set value from a main-transformer output-current detection signal and outputs an extracted signal as a specific-frequency current signal, a subtracter that subtracts the main-transformer output-current detection signal from the specific-frequency current signal and outputs a result of the subtraction as a current deviation, and a power-failure detecting unit that compares the current deviation with a predetermined power-failure-detection set value, and outputs a power-failure detection signal when the current deviation is greater than the power-failure-detection set value.
US08803353B2	Turbine-generator driven by compressed air and magnet motor A turbine assembly, which may be part of a turbine generator assembly, includes a turbine flywheel assembly and a magnet motor within a turbine casing. The turbine flywheel assembly comprises a turbine flywheel rotatably coupled to a shaft, turbine blade assemblies mounted thereon and a magnet motor rotor assembly coupled to the shaft. The magnet motor rotor assembly includes rotor permanent magnets arranged in a ring around the shaft. The same pole of each includes rotor permanent magnet faces outward away from the shaft. A magnet motor stator assembly comprises stator magnet assemblies, each comprising a stator electromagnet and a stator permanent magnet, arranged in a ring around the magnet motor rotor assembly to exert replusive force on the nearest rotor permanent magnet. Selectably controllable nozzles inject compressed air onto the turbine blades. Electromagnet controller(s) individually and selectably activate, deactivate and polarity-switch the stator electromagnets.
US08803352B1	Wind turbines and methods for controlling wind turbine loading Wind turbines and methods for controlling wind turbine loading are provided. In one embodiment, a method includes the steps of determining a current wind speed. The method further includes determining a tip speed ratio and a pitch angle that maximize a power coefficient under at least one of the following conditions: a thrust value is less than or equal to a pre-established maximum thrust, a generator speed value is less than or equal to a pre-established maximum generator speed, or a generator torque is less than or equal to a pre-established maximum generator torque. The method further includes calculating a desired generator speed value based on the current wind speed and a tip speed ratio. The method further includes calculating a desired generator power value based on the desired generator speed value.
US08803345B2	Inverter generator An inverter generator includes a motor, an electric generator and an ECU generating a pulse at each predetermined rotation angle of the motor. Estimating means estimates an initial electrical angle of alternating voltage produced by the generator from the pulse and calculates a phase shift angle to estimate continuous electrical angle of the alternating voltage. A converter converts the alternating current electric power into direct current electric power under d-q control based on the phase shift angle. An inverter converts the direct current electric power into alternating current output electric power.
US08803339B1	Bump out for differential signals An IC chip includes a matrix of solder bumps aligned in lines of a first axis and lines of a second axis. Adjacent solder bumps aligned in the first axis have a minimum distance and adjacent solder bumps aligned in the second axis have the minimum distance. The matrix includes a first pair of solder bumps aligned in a first line of the first axis and configured to transmit a first pair of differential signals, and a second pair of solder bumps aligned in a second line of the first axis next to the first line and configured to transmit a second pair of differential signals. The second pair of solder bumps are staggered from the first pair of the solder bumps to avoid in alignment with the first pair of solder bumps in the second axis.
US08803336B2	Semiconductor package A semiconductor package includes a substrate; a driving chip having first bumps on a first surface and bump pads on a second surface facing away from the first surface, and mounted to the substrate by the medium of the first bumps; a support member disposed on the substrate substantially horizontally with respect to the driving chip; and a plurality of memory chips substantially horizontally disposed on the driving chip and the support member such that one corner portions of the memory chips are positioned on the driving chip while being centered about the driving chip, wherein the respective memory chips have second bumps which are electrically connected with the respective bump pads of the driving chip, on one surfaces of the one corner portions of the memory chips which face the driving chip.
US08803333B2	Three-dimensional chip stack and method of forming the same A three dimensional (3D) chip stack includes a first chip bonded to a second chip. The first chip includes a first bump structure overlying the first substrate, and the second chip includes a second bump structure overlying the second substrate. The first bump structure is attached to the second bump structure, and a joining region is formed between the first bump structure and the second bump structure. The joining region is a solderless region which includes a noble metal.
US08803330B2	Integrated circuit package system with mounting structure An integrated circuit package system includes: providing a mountable structure having a contact pad and an inner pad; mounting an integrated circuit device having a linear through channel over the mountable structure with the linear through channel traversing between an integrated circuit device first side and an integrated circuit device second side; and connecting the linear through channel exposed on the integrated circuit device second side to the inner pad.
US08803329B2	Semiconductor package and stacked semiconductor package A semiconductor package includes a printed wiring board and a semiconductor chip that has a first signal terminal and a second signal terminal and is mounted on the printed wiring board. The printed wiring board has a first land and a second land for solder joining, which are formed on a surface layer thereof. Further, the printed wiring board has a first wiring for electrically connecting the first signal terminal of the semiconductor chip and the first land, and a second wiring for electrically connecting the second signal terminal of the semiconductor chip and the second land. The second wiring is formed so that the wiring length thereof is larger than that of the first wiring. The second land is formed so that the surface area thereof is larger than that of the first land. This reduces difference in transmission line characteristics due to the difference in wiring length.
US08803328B1	Random coded integrated circuit structures and methods of making random coded integrated circuit structures Randomized coded arrays and method of forming a randomized coded array. The methods include: forming a dielectric layer on a semiconductor substrate; forming an array of openings extending through the dielectric layer; introducing particles into a random set of less than all of the openings; and forming a conductive material in each opening of the array of openings, thereby creating the randomized coded array, wherein a first resistance of a pathway through the conductive material in openings containing the particles is different from a second resistance of a path through openings not containing the particles. Also, a physically unclonable function embodied in a circuit.
US08803323B2	Package structures and methods for forming the same A device includes a first package component and the second package component. The first package component includes a first plurality of connectors at a top surface of the first package component, and a second plurality of connectors at the top surface. The second package component is over and bonded to the first plurality of connectors, wherein the second plurality of connectors is not bonded to the second package component. A solder resist is on the top surface of the first package component. A trench is disposed in the solder resist, wherein a portion of the trench spaces the second plurality of connectors apart from the first plurality of connectors.
US08803322B2	Through substrate via structures and methods of forming the same The embodiments of forming a through substrate via (TSV) structure described enable reducing risk of damaging gate structures due to over polishing of an inter-level dielectric layer (ILD) layer. The TSV structure with a wider opening near one end also enables better gapfill.
US08803320B2	Integrated circuits and fabrication methods thereof An integrated circuit includes a signal line routed in a first direction. A first shielding pattern is disposed substantially parallel with the signal line. The first shielding pattern has a first edge having a first dimension and a second edge having a second dimension. The first edge is substantially parallel with the signal line. The first dimension is larger than the second dimension. A second shielding pattern is disposed substantially parallel with the signal line. The second shielding pattern has a third edge having a third dimension and a fourth edge having a fourth dimension. The third edge is substantially parallel with the signal line. The third dimension is larger than the fourth dimension. The fourth edge faces the second edge. A first space is between the second and fourth edges.
US08803319B2	Pillar structure having a non-planar surface for semiconductor devices A conductive pillar for a semiconductor device is provided. The conductive pillar is formed such that a top surface is non-planar. In embodiments, the top surface may be concave, convex, or wave shaped. An optional capping layer may be formed over the conductive pillar to allow for a stronger inter-metallic compound (IMC) layer. The IMC layer is a layer formed between solder material and an underlying layer, such as the conductive pillar or the optional capping layer.
US08803318B2	Semiconductor chips including passivation layer trench structure An integrated circuit including an active region a passive region and a cut line in the passive region includes a passivation layer that includes an outer nitride layer over an oxide layer. The integrated circuit also includes a crack stop below the passivation layer and in the passive region, and a solder ball in the active region. The passivation layer has a trench formed therein in a location that is further from the active region than the crack stop and closer to the active region than the cut line, the trench passing completely through the outer nitride layer and a least a portion of the way through the oxide layer.
US08803317B2	Structures for improving current carrying capability of interconnects and methods of fabricating the same Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.
US08803313B2	Group III nitride based flip-chip integrated circuit and method for fabricating A circuit substrate has one or more active components and a plurality of passive circuit elements on a first surface. An active semiconductor device has a substrate with layers of material and a plurality of terminals. The active semiconductor device is flip-chip mounted on the circuit substrate and at least one of the terminals of the device is electrically connected to an active component on the circuit substrate. The active components on the substrate and the flip-chip mounted active semiconductor device, in combination with passive circuit elements, form preamplifiers and an output amplifier respectively. In a power switching configuration, the circuit substrate has logic control circuits on a first surface. A semiconductor transistor flip-chip mounted on the circuit substrate is electrically connected to the control circuits on the first surface to thereby control the on and off switching of the flip-chip mounted device.
US08803312B2	Method for manufacturing semiconductor devices having a glass substrate A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is bonded to the first surface of the semiconductor wafer such that the metal pads are arranged within respective cavities or openings of the first glass substrate. The second surface of the semiconductor wafer is machined. At least one metallization region is formed on the machined second surface of the semiconductor wafer.
US08803311B2	Wiring boards and semiconductor packages including the same A wiring board and a semiconductor package are provided. The wiring board includes: a metal core including a first surface and a second surface opposite the first surface; a first buildup portion and a second buildup portion including an insulating layer and a pad pattern sequentially stacked, the first and second buildup portions being provided on the first surface and the second surface, respectively; a mask pattern including an opening exposing the pad pattern, the mask pattern being provided on the second buildup portion; and a barrier pattern in an area in which a region of the metal core which overlaps with the pad pattern of the second buildup portion is removed, wherein a minimum width of an outer circumference of the barrier pattern is greater than a maximum width of the pad pattern of the second buildup portion.
US08803305B2	Hybrid package construction with wire bond and through silicon vias A hybrid interconnect includes a through silicon via and a wire bond. Hybrid interconnects enable better layout of a stacked IC by combining benefits from both interconnect technologies. In one hybrid interconnect, wire bonds couples a second tier die mounted on a first tier die to a redistribution layer in the first tier die. Through silicon vias in the first tier die are coupled to the wire bonds to provide communication. In another hybrid interconnect, a wire bond couples a redistribution layer on a first tier die to a packaging substrate on which the first tier die is mounted. The redistribution layer couples to a second tier die mounted on the first tier die to provide a power supply to the second tier die. Through silicon vias in the first tier die couple to the second tier die to provide communication from the packaging substrate to the second tier die.
US08803294B2	Semiconductor device and method for manufacturing same A substrate has a surface made of a semiconductor having a hexagonal single-crystal structure of polytype 4H. The surface of the substrate is constructed by alternately providing a first plane having a plane orientation of (0-33-8), and a second plane connected to the first plane and having a plane orientation different from the plane orientation of the first plane. A gate insulating film is provided on the surface of the substrate. A gate electrode is provided on the gate insulating film.
US08803292B2	Through-substrate vias and methods for forming the same A device includes a semiconductor substrate and a Metal-Oxide-Semiconductor (MOS) transistor. The MOS transistor includes a gate electrode over the semiconductor substrate, and a source/drain region on a side of the gate electrode. A source/drain contact plug includes a lower portion and an upper portion over the lower portion, wherein the source/drain contact plug is disposed over and electrically connected to the source/drain region. A gate contact plug is disposed over and electrically connected to the gate electrode, wherein a top surface of the gate contact plug is level with a top surface of the top portion of the source/drain contact plug. A Through-Substrate Via (TSV) extends into the semiconductor substrate. A top surface of the TSV is substantially level with an interface between the gate contact plug and the gate electrode.
US08803288B1	Analog transcap device A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage avoiding distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a quasi linear dependence of the capacitance value with respect to the voltage of its control terminal.
US08803284B2	Thick on-chip high-performance wiring structures Methods for fabricating a back-end-of-line (BEOL) wiring structure, BEOL wiring structures, and design structures for a BEOL wiring structure. The BEOL wiring may be fabricated by forming a first wire in a dielectric layer and annealing the first wire in an oxygen-free atmosphere. After the first wire is annealed, a second wire is formed in vertical alignment with the first wire. A final passivation layer, which is comprised of an organic material such as polyimide, is formed that covers an entirety of a sidewall of the second wire.
US08803283B2	Vertical meander inductor for small core voltage regulators Vertical meander inductors for small core voltage regulators and approaches to fabricating vertical meander inductors for small core voltage regulators are described. For example, a semiconductor die includes a substrate. An integrated circuit is disposed on an active surface of the substrate. An inductor is coupled to the integrated circuit. The inductor is disposed conformal with an insulating layer disposed on an essentially planar surface of the substrate. The insulating layer has an undulating topography.
US08803282B2	Electronic device including a nonvolatile memory structure having an antifuse component An electronic device can include a nonvolatile memory cell, wherein the nonvolatile memory cell can include an access transistor, a read transistor, and an antifuse component coupled to the access transistor and the read transistor. In an embodiment, the read transistor can include a gate electrode, and the antifuse component can include a first electrode and a second electrode overlying the first electrode. The gate electrode and the first electrode can be parts of the same gate member. In another embodiment, the access transistor can include a gate electrode, and the antifuse component can include a first electrode, an antifuse dielectric layer, and a second electrode. The electronic device can further include a conductive member overlying the antifuse dielectric layer and the gate electrode of the access transistor, wherein the conductive member is configured to electrically float. Processes for making the same are also disclosed.
US08803281B2	Semiconductor device A semiconductor device has a field insulating film provided on a semiconductor substrate, and a fuse provided on the field insulating film and having a fuse trimming laser irradiation portion and fuse terminals. The semiconductor device further includes an intermediate insulating film covering the fuse, a first TEOS layer on the intermediate insulating film, an SOG layer for planarizing the first TEOS layer, a second TEOS layer on the SOG layer and on the first TEOS layer, a protective film on the second TEOS layer, and an opening portion above the fuse trimming laser irradiation portion in a region from the protective film to the first TEOS layer. A seal ring is provided on the intermediate insulating film so as to surround the opening portion. The seal ring is disposed over the fuse so as to overlap each of the fuse terminals in plan view.
US08803278B2	Semiconductor device A semiconductor device includes a semiconductor substrate, a surface electrode formed on the semiconductor substrate, an ineffective region formed to surround the surface electrode, and an ID-indicating portion made of a different material than the surface electrode and formed on the surface electrode to indicate an ID. The area of the ineffective region is smaller than the area of the surface electrode.
US08803275B2	Semiconductor device including power semiconductor element, branch line, and thermoelectric conversion element, and electrically powered vehicle A Peltier element is provided so that an electrically conductive plate forming a heat absorbing portion is in close proximity to an insulating layer and an electrically conductive plate forming a heat radiating portion is provided in close proximity to an insulating layer. The Peltier element has one end connected to a branch line branched from a power line, and has the other end electrically connected to an electrode plate. Further, the Peltier element receives from the branch line a portion of electric power supplied to a power transistor, and outputs it to the electrode plate. In other words, the Peltier element uses the portion of the electric power supplied to the power transistor, to absorb heat generated by the power transistor and radiate it toward a heat radiating plate.
US08803274B2	Nitride-based semiconductor light-emitting element A nitride-based semiconductor light-emitting element LE1 or LD1 has: a gallium nitride substrate 11 having a principal surface 11a which makes an angle α, in the range 40° to 50° or in the range more than 90° to 130°, with the reference plane Sc perpendicular to the reference axis Cx extending in the c axis direction; an n-type gallium nitride-based semiconductor layer 13; a second gallium nitride-based semiconductor layer 17; and a light-emitting layer 15 including a plurality of well layers of InGaN and a plurality of barrier layers 23 of a GaN-based semiconductor, wherein the direction of piezoelectric polarization of the plurality of well layers 21 is the direction from the n-type gallium nitride-based semiconductor layer 13 toward the second gallium nitride-based semiconductor layer 17.
US08803271B2	Structures for grounding metal shields in backside illumination image sensor chips A device includes a semiconductor substrate having a front side and a backside. A photo-sensitive device is disposed on the front side of the semiconductor substrate. A dielectric layer is disposed on the backside of the semiconductor substrate, wherein the dielectric layer is over a back surface of the semiconductor substrate. A metal shield is over the dielectric layer and overlapping the photo-sensitive device. A metal plug penetrates through the dielectric layer, wherein the metal plug electrically couples the metal shield to the semiconductor substrate.
US08803264B1	Room-temperature magnetoelectric multiferroic thin films and applications thereof The invention provides a novel class of room-temperature, single-phase, magnetoelectric multiferroic (PbFe0.67W0.33O3)x (PbZr0.53Ti0.47O3)1-x (0.2≦x≦0.8) (PFWx−PZT1-x) thin films that exhibit high dielectric constants, high polarization, weak saturation magnetization, broad dielectric temperature peak, high-frequency dispersion, low dielectric loss and low leakage current. These properties render them to be suitable candidates for room-temperature multiferroic devices. Methods of preparation are also provided.
US08803257B2	Capacitive vibration sensor A hollow part is formed in a silicon substrate through the front and the back. A vibration electrode plate is arranged on an upper surface of the silicon substrate to cover the opening on the upper surface. A fixed electrode plate covers the upper side of the vibration electrode plate while maintaining a microscopic gap with the vibration electrode plate, where the peripheral part is fixed to the upper surface of the silicon substrate. The fixed electrode plate has the portion facing the upper surface of the silicon substrate through a space supported by a side wall portion arranged on an inner edge of the portion fixed to the upper surface of the silicon substrate without interposing a space. The outer surface of the side wall portion of the fixed electrode plate is covered by a reinforcement film made of metal such as Au, Cr, and Pt.
US08803254B2	Methods of forming replacement gate structures for NFET semiconductor devices and devices having such gate structures One illustrative gate structure for an NFET device includes a gate insulation layer formed above a semiconducting substrate, a first metal layer comprised of titanium nitride (TiN) positioned above the gate insulation layer, a second metal layer comprised of tantalum nitride (TaN) positioned above the first metal layer, a third metal layer comprised of titanium aluminum (TiAl) positioned above the second metal layer, a fourth metal layer comprised of an aluminum-containing material positioned above the third metal layer, a fifth metal layer comprised of titanium positioned above the fourth metal layer, and a layer of aluminum positioned above the fifth metal layer.
US08803251B2	Termination of high voltage (HV) devices with new configurations and methods This invention discloses a semiconductor power device disposed in a semiconductor substrate comprising a heavily doped region formed on a lightly doped region and having an active cell area and an edge termination area. The edge termination area comprises a plurality of termination trenches formed in the heavily doped region with the termination trenches lined with a dielectric layer and filled with a conductive material therein. The edge termination further includes a plurality of buried guard rings formed as doped regions in the lightly doped region of the semiconductor substrate immediately adjacent to the termination trenches.
US08803243B2	Complementary metal oxide semiconductor (CMOS) device having gate structures connected by a metal gate conductor A complementary metal oxide semiconductor (CMOS) device including a substrate including a first active region and a second active region, wherein each of the first active region and second active region of the substrate are separated by from one another by an isolation region. A n-type semiconductor device is present on the first active region of the substrate, in which the n-type semiconductor device includes a first portion of a gate structure. A p-type semiconductor device is present on the second active region of the substrate, in which the p-type semiconductor device includes a second portion of the gate structure. A connecting gate portion provides electrical connectivity between the first portion of the gate structure and the second portion of the gate structure. Electrical contact to the connecting gate portion is over the isolation region, and is not over the first active region and/or the second active region.
US08803242B2	High mobility enhancement mode FET A novel semiconductor transistor is presented. The semiconductor structure has a MOSFET like structure, with the difference that the device channel is formed in an intrinsic region, so as to effectively decrease the impurity and surface scattering phenomena deriving from a high doping profile typical of conventional MOS devices. Due to the presence of the un-doped channel region, the proposed structure greatly reduces Random Doping Fluctuation (RDF) phenomena decreasing the threshold voltage variation between different devices. In order to control the threshold voltage of the device, a heavily doped poly-silicon or metallic gate is used. However, differently from standard CMOS devices, a high work-function metallic material, or a heavily p-doped poly-silicon layer, is used for a n-channel device and a low work-function metallic material, or heavily n-doped poly-silicon layer, is used for a p-channel FET.
US08803234B1	High voltage semiconductor device and method for fabricating the same A high voltage (HV) semiconductor device includes: a semiconductor substrate having a first conductivity type; a gate structure disposed over a portion of the semiconductor substrate; a pair of spacers respectively disposed over a sidewall of the gate structure, wherein one of the spacers is a composite spacer comprising a first insulating spacer contacting the gate structure, a dummy gate structure, and a second insulating spacer; a first drift region disposed in a portion of the semiconductor, underlying a portion of the gate structure and one of the pair of spacers, having a second conductivity type opposite to the first conductivity type; and a pair of doping regions, respectively disposed in a portion of the semiconductor substrate on opposite sides of the gate structure, wherein the pair of doping regions include the second conductivity type and one of the doping regions is disposed in the first drift region.
US08803232B2	High voltage and ultra-high voltage semiconductor devices with increased breakdown voltages A lateral DMOS transistor is provided with a source region, a drain region, and a conductive gate. The drain region is laterally separated from the conductive gate by a field oxide that encroaches beneath the conductive gate. The lateral DMOS transistor may be formed in a racetrack-like configuration with the conductive gate including a rectilinear portion and a curved portion and surrounded by the source region. Disposed between the conductive gate and the trapped drain is one or more levels of interlevel dielectric material. One or more groups of isolated conductor leads are formed in or on the dielectric layers and may be disposed at multiple device levels. The isolated conductive leads increase the breakdown voltage of the lateral DMOS transistor particularly in the curved regions where electric field crowding can otherwise degrade breakdown voltages.
US08803230B2	Semiconductor transistor having trench contacts and method for forming therefor Embodiments described herein relate to semiconductor transistors having trench contacts, in particular to semiconductor transistors having a field electrode below a gate electrode, and to related methods for producing semiconductor transistors having trench contacts.
US08803228B2	Memory arrays with rows of memory cells coupled to opposite sides of a control gate A memory array includes a control gate, where every memory cell coupled to a first side of the control gate is within a first row of memory cells and every memory cell coupled to a second side of the control gate is within a second row of memory cells, and where the first row of memory cells is successively adjacent to the second row of memory cells. The memory array also includes alternating first and second bit lines, where each of the memory cells of the first row of memory cells is coupled to a respective one of the first bit lines, where each of the memory cells of the second row of memory cells is coupled to a respective one of the second bit lines, and wherein the first bit lines are different from the second bit lines.
US08803226B2	Semiconductor device and method for manufacturing the same A trench gate type MISFET and a diode are formed in a semiconductor substrate. First and second trenches are formed in the semiconductor substrate. A gate electrode is formed in the first trench through a gate insulating film. A dummy gate electrode is formed in the second trench through a dummy gate insulating film. A cathode n+-type semiconductor region and an anode p-type semiconductor region are formed in the semiconductor substrate and the second trench is formed so as to surround the n+-type semiconductor region in a planar view. A part of the anode p-type semiconductor region is formed directly below the n+-type semiconductor region, so that a PN junction is formed between the part of the anode p-type semiconductor region and the n+-type semiconductor region. Thereby a diode is formed. The dummy gate electrode is electrically coupled to one of an anode and a cathode.
US08803224B2	MOS transistor suppressing short channel effect and method of fabricating the same A MOS transistor suppressing a short channel effect includes a substrate, a first diffusion region and a second diffusion region separated from each other by a channel region in an upper portion of the substrate, a gate insulating layer including a first gate insulating layer disposed on a surface of the substrate in the channel region and a second gate insulating layer having a specified depth from the surface of the substrate to be disposed between the first diffusion region and the channel region, and a gate electrode disposed on the first gate insulating layer.
US08803223B2	SONOS device and method for fabricating the same An improved semiconductor device is provided whereby the semiconductor device is defined by a layered structure comprising a first dielectric layer, a data storage material disposed on the first dielectric layer, and a second dielectric layer disposed on the data storage material, the layered structured substantially forming the outer later of the semiconductor device. For example, the semiconductor device may be a SONOS structure having an oxide-nitride-oxide (ONO) film that substantially surrounds the SONOS structure. The invention also provides methods for fabricating the semiconductor device and the SONOS structure of the invention.
US08803222B2	Three-dimensional semiconductor memory devices using direct strapping line connections Memory devices include a plurality of elongate gate stacks extending in parallel on a substrate and at least one insulation region disposed in a trench between adjacent ones of the gate stacks. The at least one insulation region has linear first portions having a first width and widened second portions having a second width greater than the first width. A common source region is disposed in the substrate underlying the at least one insulation region. The devices further include respective conductive plugs passing through respective ones of the widened second portions of the at least one insulation region and electrically connected to the common source region and at least one strapping line disposed on the conductive plugs between the adjacent ones of the gate stacks and in direct contact with the conductive plugs.
US08803215B2	Semiconductor device and method of manufacturing the same A semiconductor device includes a bit line and a common source line formed on a cell array region of a substrate, a first channel layer coupled to the common source line and extending higher than the common source line, a second channel layer coupled to the bit line and extending higher than the bit line, and a coupling pattern coupling a top of the first channel layer opposite to the common source line and a top of the second channel layer opposite to the bit line.
US08803214B2	Three dimensional memory and methods of forming the same Some embodiments include a memory device and methods of forming the memory device. One such memory device includes a first group of memory cells, each of the memory cells of the first group being formed in a cavity of a first control gate located in one device level of the memory device. The memory device also includes a second group of memory cells, each of the memory cells of the second group being formed in a cavity of a second control gate located in another device level of the memory device. Additional apparatus and methods are described.
US08803212B2	Three-dimensional crossbar array A three-dimensional crossbar array may include a metal layer, and an insulator layer disposed adjacent the metal layer. A trench may be formed in the metal layer to create sections in the metal layer, and a portion of the trench may include an insulator. A hole may be formed in the trench and contact a section of the metal layer. The hole may define a via. A contact region between the via and the section of the metal layer may define a crossbar array.
US08803207B2	Shielded gate field effect transistors In one general aspect, an apparatus can include a trench disposed in a semiconductor region, a shield dielectric layer lining a lower portion of a sidewall of the trench and a bottom surface of the trench, and a gate dielectric lining a upper portion of the sidewall of the trench. The apparatus can also include a shield electrode disposed in a lower portion of the trench and insulated from the semiconductor region by the shield dielectric layer, and an inter-electrode dielectric (IED) disposed in the trench over the shield electrode where the shield electrode has a curved top surface.
US08803203B2	Transistor including reentrant profile A transistor includes a substrate, an electrically conductive material layer, and an electrically insulating material layer. At least a portion of one or more of the substrate, the electrically conductive material layer, and the electrically insulating material layer define a reentrant profile.
US08803202B2	Layout methods of integrated circuits having unit MOS devices A semiconductor structure includes an array of unit metal-oxide-semiconductor (MOS) devices arranged in a plurality of rows and a plurality of columns is provided. Each of the unit MOS devices includes an active region laid out in a row direction and a gate electrode laid out in a column direction. The semiconductor structure further includes a first unit MOS device in the array and a second unit MOS device in the array, wherein active regions of the first and the second unit MOS devices have different conductivity types.
US08803201B2	Solid state lighting component package with reflective layer A solid state lighting package is provided. The package comprising at least one LED element positioned on a top surface of a substrate or a submount capable of absorbing light emitted by the at least one LED element; and a reflective layer, the reflective layer covering at least a portion of the top surface of the substrate or the submount, whereby at least of portion of the light emitted by the LED element is reflected by the reflective layer. A method of manufacturing a solid state lighting package comprising the reflective layer, and a method of increasing the luminous flux thereof, is also provided.
US08803200B2	Access transistor with a buried gate A magnetic memory cell is formed including a magneto tunnel junction (MTJ) and an access transistor, which is used to access the MTJ in operation. The access transistor, which is formed on a silicon substrate, includes a gate, drain and source with the gate position substantially perpendicular to the plane of the silicon substrate thereby burying the gate and allowing more surface area on the silicon substrate for formation of additional memory cells.
US08803191B2	Systems, devices, and methods with integrable FET-controlled lateral thyristors Methods and systems for lateral switched-emitter thyristors in a single-layer implementation. Lateral operation is advantageously achieved by using an embedded gate. Embedded gate plugs are used to controllably invert a portion of the P-base region, so that the electron population at the portion of the inversion layer which is closest to the anode will provide a virtual emitter, and will provide sufficient gain so that the combination of bipolar devices will go into latchup.
US08803188B2	Method for manufacturing light-emitting element, light-emitting element, Light-emitting device, lighting device, and electronic appliance One object is to provide a light-emitting element which overcomes the problems of electrical characteristics and a light reflectivity have been solved. The light-emitting element is manufactured by forming a first electrode including aluminum and nickel over a substrate; by forming a layer including a composite material in which a metal oxide is contained in an organic compound so as to be in contact with the first electrode after heat treatment is performed with respect to the first electrode; by forming a light-emitting layer over the layer including a composite material; and by forming a second electrode which has a light-transmitting property over the light-emitting layer. Further, the first electrode is preferably formed to include the nickel equal to or greater than 0.1 atomic % and equal to or less than 4.0 atomic %.
US08803181B2	Semiconductor light emitting device and fabrication method of the semiconductor light emitting device A semiconductor light emitting device which can control of current density and can optimize current density and in which a rise in luminosity is possible, and a fabrication method of the semiconductor light emitting device are provided. The semiconductor light emitting device including: a semiconductor substrate structure including a semiconductor substrate, a first metal layer placed on a first surface of the semiconductor substrate, and a second metal layer placed on a second surface of the semiconductor substrate; and a light emitting diode structure including a third metal layer placed on the semiconductor substrate structure, a current control layer placed on the third metal layer and composed of a transparent insulating film and a current control electrode, an epitaxial growth layer placed on the current control layer, and a surface electrode placed on the epitaxial growth layer, wherein the semiconductor substrate structure and the light emitting diode structure are bonded by using the first metal layer and the third metal layer.
US08803179B2	Semiconductor light emitting device A semiconductor light emitting device is provided that includes a support substrate, a first metal layer formed on the support substrate, a transparent conductive layer formed on the first metal layer, a second metal layer embedded in the transparent conductive layer, and a semiconductor light emitting layer formed on the transparent conductive layer. A reflectance of the second metal layer to light emitted by the semiconductor light emitting layer is higher than a reflectance of the first metal layer to light emitted by the semiconductor light emitting layer.
US08803178B2	Light emitting diode A light emitting diode includes a substrate, a source layer, a metallic plasma generating layer, a first optical symmetric layer, a second optical symmetric layer, a first electrode, and a second electrode. The source layer includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked on a surface of the substrate in series. The first electrode is electrically connected with the first semiconductor layer. The second electrode is electrically connected with the second semiconductor layer. The metallic plasma generating layer is disposed on a surface of the source layer away from the substrate. The first optical symmetric layer is disposed on a surface of the metallic plasma generating layer away from the substrate. The second optical symmetric layer is disposed on a surface of the first optical symmetric layer away from the substrate.
US08803174B2	Light emitting device, light emitting device package Disclosed is a method of manufacturing a light emitting device. The light emitting device includes a nitride semiconductor layer, an electrode on the nitride semiconductor layer, a light emitting structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer under the nitride semiconductor layer, and a conductive layer under the light emitting structure. The nitride semiconductor layer has band gap energy lower than band gap energy of the first conductive type semiconductor layer.
US08803167B2	Organic light emitting diode display An organic light emitting diode (OLED) display according to an exemplary embodiment includes a display substrate on which a plurality of organic light emitting diodes are formed; a conducting material layer contacting one of electrodes included in the organic light emitting diode; an encapsulation substrate facing the display substrate; and an anti-reflective light transmission layer that is formed on a surface of the encapsulation substrate and is connected to the conducting material layer.
US08803165B2	Nitride semiconductor light emitting device and method for manufacturing nitride semiconductor light emitting device A nitride semiconductor light emitting device includes an n-type GaN substrate (101) that is a nitride semiconductor substrate, a nitride semiconductor layer including a p-type nitride semiconductor layer formed on the n-type GaN substrate (101). The p-type nitride semiconductor layer includes a p-type AlGaInN contact layer (108), a p-type AlGaInN cladding layer (107) under the p-type AlGaInN contact layer (108), and a p-type AlGaInN layer (106). A protection film (113) made of a silicon nitride film is formed above a current injection region formed in the p-type nitride semiconductor layer.
US08803162B2	Organic light emitting display of mother substrate unit and method of fabricating the same A mother substrate unit organic light emitting display in which grooves are formed on the internal surface where a scribing line is formed to scribe a mother substrate on which a plurality of display panels are formed into unit display panels so that a scribing process is easily performed and a method of fabricating the same are disclosed. The mother substrate unit organic light emitting display includes a first substrate including a plurality of display panels and a scribing line defined between the display panels such that each display panel includes a pixel region in which an organic light emitting diode (OLED) including a first electrode, an organic layer, and a second electrode is formed and a non-pixel region, a second substrate that is arranged on the first substrate to overlap the first substrate and on which grooves are formed to correspond to the scribing line, and a plurality of frits provided between the first substrate and the second substrate and formed along the circumference of the pixel regions. The first substrate and the second substrate are attached to each other by the plurality of frits.
US08803161B2	Semiconductor device and solid state relay using same A semiconductor device includes one or more unipolar compound semiconductor element; and bypass semiconductor elements externally connected to the respective compound semiconductor elements in parallel. A turn-on voltage of the bypass semiconductor elements is smaller than a turn-on voltage of the compound semiconductor elements in the direction from the source to the drain.
US08803159B2	Light-emitting device and method for manufacturing same Disclosed is a light-emitting device comprising a light-emitting element (10) composed of a gallium nitride compound semiconductor having an emission peak wavelength of not less than 430 nm; a molded body (40) provided with a recessed portion having a bottom surface on which the light-emitting element (10) is mounted and a lateral surface; and a sealing member (50) containing an epoxy resin including a triazine derivative epoxy resin, or a silicon-containing resin. The molded body (40) is obtained by using a cured product of a thermosetting epoxy resin composition essentially containing an epoxy resin including a triazine derivative epoxy resin, and has a reflectance of not less than 70% at the wavelengths of not less than 430 nm.
US08803157B2	Display device and manufacturing method thereof A display device is provided, which includes a transparent substrate, an active device array, a solar cell structure and an electrophoretic display film. The transparent substrate has an upper surface and a lower surface opposite to each other. The active device array has a plurality of pixel structures, in which the pixel structures are disposed on the upper surface of the transparent substrate. The solar cell structure is directly disposed on the lower surface of the transparent substrate. The electrophoretic display film is disposed over the transparent substrate and includes a transparent protection film, an electrode layer and a plurality of display media, in which the electrode layer is disposed between the transparent protection film and the display media and the display media are located between the electrode layer and the active device array.
US08803154B2	Display device and method for manufacturing the same A conductive layer to be a gate electrode, an insulating layer to be a gate insulating layer, a semiconductor layer, and an insulating layer to be a channel protective layer, which are each included in a transistor, are successively formed without exposure to the air. A gate electrode (including another electrode or a wiring which is formed in the same layer) and an island-like semiconductor layer are formed through one photolithography step. A display device is manufactured through four photolithography steps including the photolithography step, a photolithography step of forming a contact hole, a photolithography step of forming a source electrode and a drain electrode (including another electrode or a wiring which is formed in the same layer), and a photolithography step of forming a pixel electrode (including another electrode or a wiring which are formed in the same layer).
US08803152B2	Luminescent device and process of manufacturing the same In the case where a material containing an alkaline-earth metal in a cathode, is used, there is a fear of the diffusion of an impurity ion (such as alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT. Therefore, as the insulating film provided between TFT and EL element, a film containing a material for not only blocking the diffusion of an impurity ion such as an alkaline-earth metal ion but also aggressively absorbing an impurity ion such as an alkaline-earth metal ion is used.
US08803150B2	Display device and manufacturing process of display device Provided a display device including a thin film transistor. The thin film transistor includes a gate electrode, a gate insulating layer which covers the gate electrode, an oxide semiconductor film above the gate insulating layer, a source electrode and a drain electrode which are respectively provided in contact with a first region and a second region, which are provided in the upper surface of the oxide semiconductor film, and a channel protective film which is provided in contact with a third region between the first region and the second region. In plan view, a region of the oxide semiconductor film, which overlaps with the gate electrode, is smaller than the third region, and a portion of the oxide semiconductor film except for a portion which overlaps with the gate electrode has a resistance lower than the portion.
US08803149B2	Thin-film transistor device including a hydrogen barrier layer selectively formed over an oxide semiconductor layer A hydrogen barrier layer is selectively provided over an oxide semiconductor layer including hydrogen and hydrogen is selectively desorbed from a given region in the oxide semiconductor layer by conducting oxidation treatment, so that regions with different conductivities are formed in the oxide semiconductor layer. After that, a channel formation region, a source region, and a drain region can be formed with the use of the regions with different conductivities formed in the oxide semiconductor layer.
US08803145B2	Bond pad monitoring structure and related method of detecting significant alterations A passive bond pad condition sense structure may be configured to be electrically stimulated and tested for detecting an anomalous or altered electrical characteristic caused by stress or aging of the bond pad capacitively coupled to it. The related bond pad condition testing or monitoring system may include relatively simple stimulating and sensing circuits that may be wholly embedded in the integrated circuit device.
US08803142B2	Semiconductor device An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
US08803139B2	Bottom and top gate organic transistors with fluropolymer banked crystallization well A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.
US08803136B2	Light-emitting module, light-emitting device, method of manufacturing the light-emitting module, and method of manufacturing the light-emitting device A highly reliable light-emitting module including an organic EL element or a light-emitting device using a highly reliable light-emitting module including an organic EL element is provided. Alternatively, a method of manufacturing a highly reliable light-emitting module including an organic EL element, or a method of manufacturing a light-emitting device using a highly reliable light-emitting module including an organic EL element is provided. The light-emitting module has a structure in which a light-emitting element formed over a first substrate and a viscous material layer are sealed in a space between the first substrate and a second substrate which face each other, with a sealing material surrounding the light-emitting element. The viscous material layer is provided between the light-emitting element and the second substrate and includes a non-solid material and a drying agent which reacts with or adsorbs an impurity.
US08803133B2	Organic light emitting diode device An organic light emitting diode device includes a first electrode, a second electrode, and an emission layer disposed between the first and second electrodes. The first electrode includes a first layer and a second layer. The first layer includes ytterbium (Yb), samarium (Sm), lanthanum (La), yttrium (Y), calcium (Ca), strontium (Sr), cesium (Cs), ruthenium (Ru), barium (Ba), or a combination thereof and having a thickness ranging from about 40 to 200 Å. The second layer includes silver (Ag), aluminum (Al), copper (Cu), chromium (Cr), or a combination thereof and having a thickness ranging from about 100 to 250 Å.
US08803130B2	Graphene transistors with self-aligned gates Graphene transistor devices and methods of their fabrication are disclosed. One such graphene transistor device includes source and drain electrodes and a gate structure including a dielectric sidewall spacer that is disposed between the source and drain electrodes. The device further includes a graphene layer that is adjacent to at least one of the source and drain electrodes, where an interface between the source/drain electrode(s) and the graphene layer maintains a consistent degree of electrical conductivity throughout the interface.
US08803129B2	Patterning contacts in carbon nanotube devices A structure includes a substrate having a carbon nanotube (CNT) disposed over a surface. The CNT is partially disposed within a protective electrically insulating layer. The structure further includes a gate stack disposed over the substrate. A first portion of a length of the CNT not covered by the protective electrically insulating layer passes through the gate stack. Source and drain contacts are disposed adjacent to the gate stack, where second and third portions of the length of CNT not covered by the protective electrically insulating layer are conductively electrically coupled to the source and drain contacts. The gate stack and the source and drain contacts are contained within the protective electrically insulating layer and within an electrically insulating organic planarization layer that is disposed over the protective electrically insulating layer. A method to fabricate a CNT-based transistor is also described.
US08803128B2	Photodetectors and photovoltaics based on semiconductor nanocrystals A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons.
US08803125B2	Cross-point memory utilizing Ru/Si diode Memory devices utilizing memory cells including a resistive element and a diode coupled in series between two conductors. The diodes include a ruthenium material and a silicon material. The diodes further include an interface on the silicon material of ruthenium or ruthenium silicide. A ruthenium silicide interface may be a polycrystalline ruthenium silicide.
US08803123B2	Resistance change memory According to one embodiment, a resistance change memory includes resistance change elements arrayed with a first space in a first direction and with a second space wider than the first space in a second direction orthogonal to the first direction, second conductive layers disposed on sidewalls of the resistance change elements, each of the second conductive layers having a width greater than or equal to a half of the first space in the first direction and having a width less than a half of the second space in the second direction, the second conductive layers functioning as a first bit line extending in the first direction, a second insulating layer disposed on a sidewall of the first bit line, and not filling the second space, and a third conductive layer functioning as a second bit line extending in the first direction by filling the second space.
US08803120B2	Diode and resistive memory device structures In an electronic device, a diode and a resistive memory device are connected in series. The diode may take a variety of forms, including oxide or silicon layers, and one of the layers of the diode may make up a layer of the resistive memory device which is in series with that diode.
US08803119B2	Semiconductor memory device and manufacturing method of the same A technique capable of improving performances of a semiconductor memory device provided with a recording film having a super lattice structure is provided. The semiconductor memory device records information by changing an electric resistance of a recording film by use of a change in an atomic arrangement of the recording film. Moreover, the recording film is provided with a stacked layer portion in which a first crystal layer and a second crystal layer made of chalcogen compounds having respectively different compositions are stacked, an orientation layer that enhances an orientation of the stacked layer portion, and an adhesive layer that improves the flatness of the orientation layer.
US08803118B2	Semiconductor constructions and memory arrays Some embodiments include semiconductor constructions having an electrically conductive interconnect with an upper surface, and having an electrically conductive structure over the interconnect. The structure includes a horizontal first portion along the upper surface and a non-horizontal second portion joined to the first portion at a corner. The second portion has an upper edge. The upper edge is offset relative to the upper surface of the interconnect so that the upper edge is not directly over said upper surface. Some embodiments include memory arrays.
US08803116B2	Receiving circuit having a switch for changing the generated reference voltage to one of a first and a second threshold value According to a receiving circuit includes a light receiving element, a signal voltage generation portion, a comparator, a reference voltage generation portion and a switch. The light receiving element receives a light signal and outputs a light current corresponding to the light signal. The signal voltage generation portion converts the light current into a signal voltage and outputs the signal voltage. The comparator compares the signal voltage with a first threshold value or a second threshold value. The reference voltage generation portion outputs a reference voltage input to the comparator. The switch changes the reference voltage to one of the first threshold value and the second threshold value based on an output of the comparator.
US08803111B2	Sample preparation apparatus and sample preparation method Provided is an apparatus for preparing a sample including: a sample stage that supports a sample; a focused ion beam column that applies a focused ion beam to the same sample and processes the sample; and an irradiation area setting unit that sets a focused-ion-beam irradiation area including a first irradiation area used to form an observation field irradiated with an electron beam in order to detect backscattered electrons and a second irradiation area used to form a tilted surface tilted with respect to the normal line of the observation field with an angle of 67.5° or more and less than 90°.
US08803110B2	Methods for beam current modulation by ion source parameter modulation Beam current is adjusted during ion implantation by adjusting one or more parameters of an ion source. The ion beam is generated or provided by a non-arc discharge based ion source, such as an electron gun driven ion source or an RF driven ion source. A beam current adjustment amount is determined. Then, one or more parameters of the ion source are adjusted according to the determined beam current adjustment amount. The beam current is provided having a modulated beam current.
US08803109B1	Energy efficient multi-spectrum screen exposure system A multi-spectrum screen exposure system for curing printing emulsions, including an enclosure with a platen that is transmissive to at least some ultraviolet wavelengths of light, a cover shiftable between an open orientation wherein the platen is accessible to an operator and a closed orientation wherein the platen is covered and inaccessible to the operator, a light emitting diode illumination (LED) light source assembly supported within the enclosure and oriented to direct illumination toward the platen, the light emitting diode illumination light source assembly emitting at least some light in the ultraviolet wavelengths, and a control unit operably coupled to the light emitting diode illumination light source assembly by which the light emitting diode illumination light source assembly can be operated in a controlled fashion.
US08803107B2	Material absorbing electromagnetic waves The invention relates to a material that absorbs electromagnetic waves, characterized in that it includes at least one textile layer printed using at least one conductive ink in accordance with at least one pattern including printed areas and non-printed areas in an arrangement suitable for a corresponding range of absorption frequencies.
US08803105B2	Optical field enhancement device An optical field enhancement device which includes a transparent substrate having a transparent fine uneven structure on a surface and a metal film formed on a surface of the fine uneven structure on the surface of the substrate and allows projection of excitation light and detection of detection light either from a front surface side of the metal film or from a back surface side of the transparent substrate.
US08803101B2	Radiological image detection apparatus and radiation imaging apparatus An adiological image detection apparatus 3 includes a phosphor 60 that contains a fluorescent material which emits fluorescence by radiation exposure, and a sensor panel 61 which is provided to be in close contact with the phosphor, and detects the fluorescence emitted from the phosphor. The phosphor includes a columnar section that is formed by a group of columnar crystals 82 formed by growing crystals of the fluorescent material in a columnar shape, a radiation incident plane is provided in the sensor panel at a side opposite to the phosphor, and the sensor panel has flexibility and is curved to locate a curvature center at the radiation incident plane side.
US08803099B2	Compound, scintillator, and radiation detector There is provided a compound represented by the general formula Cs3Cu2[I1-xClx]5, wherein x is 0.71 or more and 0.79 or less. Also, there is provided a method for producing a compound, comprising mixing cesium iodide, cesium chloride, and copper chloride together in such a manner that the molar ratio of cesium to copper to iodine to chlorine is 3:2:5(1-x):5x (wherein 0.71≦x≦0.79), melting the resulting mixture, and solidifying the resulting molten material to give a compound.
US08803094B2	Carbon nanotube compositions and methods of making and using same Carbon nanotube compositions suitable for printing, methods of making carbon nanotube compositions, and substrates having a print thereon containing carbon nanotube compositions, and uses thereof. The carbon nanotubes of the compositions are individualized. The carbon nanotube compositions can be used in applications, such as document security.
US08803091B2	Detection circuit, sensor device, and electronic instrument A detection circuit includes a current mirror circuit, a pyroelectric element, a capacitor element and a charging circuit. The pyroelectric element is disposed between a first power supply node and a first node connected to the current mirror circuit. The capacitor element is disposed between the first power supply node and a second node connected to the current mirror circuit. The charging circuit is connected to the current mirror circuit to charge the pyroelectric element and the capacitor element though the current mirror circuit.
US08803090B2	Citrate detector for blood processing system A citrate detector is provided for use in combination with a blood processing system and replacement fluid tubing or conduit of a disposable set. The citrate detector comprises a light source and a light detector. The light source is configured to emit a light having a wavelength absorbed by citrate, but at least partially transmitted by the replacement fluid conduit of the disposable set. The light detector is configured to receive at least a portion of the light from the light source and generate a signal indicative of the presence or absence of citrate in the replacement fluid conduit based, at least in part, on the amount of light received from the light source. A blood processing system incorporating such a citrate detector may include a flow detector for determining whether fluid is present in the conduit prior to checking for the presence of citrate.
US08803083B2	Time of flight mass spectrometer A method of determining the mass-to-charge ratios of ions in a sample is disclosed. The method includes determining a data acquisition time, where the data acquisition time is a predetermined fraction of the greatest time of flight. The method also includes providing ions from a continuous beam of a sample to a time-of-flight mass analyzer at pulse intervals having a duration equal to the predetermined fraction of the greatest flight time. The method also includes measuring a peak width and a flight time value for each of the ion species in the sample after summing the data acquired during several pulse intervals and correcting the measured flight time values according to a correlation of measured peak width values with calibration data of peak width versus flight time.
US08803080B2	Self calibration approach for mass spectrometry Methods for analyzing mass spectral data, include acquiring profile mode mass spectral data containing at least on ion of interest whose elemental composition is determined; obtaining a correct peak shape function based on the actually measured peak shape of at least one of the isotypes of the same ion of interest; generating at least one possible elemental composition for the ion of interest; calculating a theoretical isotope distribution for the elemental composition and a theoretical isotope cluster by applying correct peak shape function to the theoretical isotope distribution; comparing quantiatively the corresponding parts of the theoretical isotope cluster to that from acquired profile mode mass spectral data to obtain at least one of elemental composition determination, classification, or quantitation for the ion. A computer for and a computer readable medium having computer readable code thereon for performing the methods. A mass spectrometer having an associated computer for performing the methods.
US08803079B2	Apparatus and method for elemental analysis of particles by mass spectrometry An apparatus for elemental analysis of particles such as single cells or single beads by mass spectrometry is described. The apparatus includes means for particle introduction; means to vaporize, atomize and ionize elements associated with a particle; means to separate the ions according to their mass-to-charge ratio; means to detect the separated ions, means to digitize the output of the means to detect the ions; means to transfer and/or to process and/or record the data output of the means to digitize, having means to detect the presence of a particle in a mass spectrometer; and means to synchronize one of the means for ion detection, data digitization, transfer, processing and recording with the means to detect the presence of a particle. Methods and computer readable code implementing aspects of the apparatus, and for reducing the rates of data generation, digitization, transfer, processing and recording are also described.
US08803073B2	Method and device for calibrating an irradiation device The present invention relates to a method and a device for calibrating an irradiation device of an apparatus for generatively manufacturing a three-dimensional object. The calibration includes steps of arranging an image converter plate (12) in or in parallel to a working plane of the apparatus, wherein the image converter plate (12) outputs detectable light (13), when the irradiation device irradiates predetermined positions of the image converter plate (12) with energetic radiation; of scanning the image converter plate (12) by the irradiation device; of detecting the detectable light (13) by a light detector (15); of determining coordinates of the irradiation device, when the detected light (13) is detected; of comparing the determined coordinates with predetermined reference coordinates; and of calibrating the irradiation device on the basis of a deviation between the determined coordinates and the reference coordinates.
US08803062B2	Photoelectric conversion device having a light-shielding film A photoelectric conversion device includes a photoelectric conversion unit which is arranged in a semiconductor substrate, a charge holding portion which is arranged in the semiconductor substrate and temporarily holds a charge generated by the photoelectric conversion unit, a first transfer electrode which is arranged at a position above the semiconductor substrate to transfer a charge generated by the photoelectric conversion unit to the charge holding portion, a charge-voltage converter which is arranged in the semiconductor substrate and converts a charge into a voltage, and a second transfer electrode which is arranged at a position above the semiconductor substrate to transfer a charge held by the charge holding portion to the charge-voltage converter, and the first transfer electrode is arranged to cover the charge holding portion, and not to overlap the second transfer electrode when viewed from a direction perpendicular to the upper surface of the semiconductor substrate.
US08803061B2	Circuitry and method for collecting image array data with separate addressing and dynamic clamping of pixels to allow for faster pixel data readout and full removal of pixel charges Circuitry and method for collecting image array data in which pixels are addressed and dynamically clamped separately. In accordance with one embodiment, pixels are addressed and clamped during different time intervals, thereby allowing faster pixel data readout while still allowing sufficient time to remove all pixel charges.
US08803059B2	Sensor for determination of the incidence angle of radiation and method for measurement the incidence angle using such a sensor A sensor and a corresponding method for the determination of the incidence angle of a radiation source are provided. The sensor has a diode assembly of avalanche photodiodes in a semiconductor layer and an application specific integrated circuit, a distance layer, an aperture structure located on the distance layer, and contacts for electrically connecting the sensor. The layers and structures are positioned directly on top of each other and match in their shape, size or thickness.
US08803058B2	Multiple clocking modes for a CCD imager A CCD image sensor includes vertical CCD shift registers and gate electrodes disposed over the vertical CCD shift registers. The gate electrodes are divided into distinct groups of gate electrodes. The CCD image sensor is adapted to operate in an accumulation mode and a charge transfer mode, an accumulation mode and a charge shifting mode, or an accumulation mode, a charge transfer mode, and a charge shifting mode. The charge transfer mode has an initial charge transfer phase and a final charge transfer phase. The charge shifting mode has an initial charge shifting phase and a final charge shifting phase.
US08803055B2	Volumetric error compensation system with laser tracker and active target A volumetric error compensation measurement system and method are disclosed wherein a laser tracker tracks an active target as the reference point. The active target has an optical retroreflector mounted at the center of two motorized gimbals to provide full 360 degree azimuth rotation of the retroreflector. A position sensitive detector is placed behind an aperture provided at the apex of the retroreflector to detect the relative orientation between the tracker laser beam and the retroreflector by measuring a small portion of the laser beam transmitted through the aperture. The detector's output is used as the feedback for the servo motors to drive the gimbals to maintain the retroreflector facing the tracker laser beam at all times. The gimbals are designed and the position of the retroreflector controlled such that the laser tracker always tracks to a pre-defined single point in the active target, which does not move in space when the gimbals and/or the retroreflector makes pure rotations. Special mechanism and alignment algorithm are used in the gimbal design and retroreflector centering alignment to achieve accurate rotational axis alignment and repeatability.
US08803054B2	Apparatus, focus detection apparatus, and image pickup system In a photoelectric conversion apparatus, an error can occur due to a voltage drop through a MOS transistor. In the photoelectric conversion apparatus, to reduce the error, a circuit block disposed between a unit pixel and an output line includes a differential amplifier circuit and a switch that is disposed in a feedback path of the differential amplifier circuit.
US08803053B2	Beam power with multipoint reception A beam power source transmits a signal indicating power availability, receives a request for power in response, and beams power in response to the request.
US08803049B2	Container with microwave interactive web A container includes a microwave interactive web at least partially overlying and joined to a three-dimensional support, wherein the three-dimensional support may be formed prior to having the microwave interactive web mounted thereto. The three-dimensional support may be a preformed container that is sufficiently rigid and dimensionally stable for use in containing food.
US08803046B2	Inductor assembly for transverse flux electric induction heat treatment of electrically conductive thin strip material with low electrical resistivity Apparatus and method are provided for electric induction heat treatment of electrically conductive thin strip material. Multiple series-connected coil loops, each having a pole pair, are provided in each of a top and bottom induction coil, which are positioned mirror image to each other. The top and bottom induction coils form a transverse flux induction heat treatment apparatus. A separate flux concentrator is provided over and on the side of each pole. The thin strip material passes between the poles of the top and bottom induction coils and the flux concentrators associated with each of the poles.
US08803044B2	Dialysis fluid heating systems A dialysis fluid heating system includes a plurality of conductive tubes; first and second end caps located at first and second ends of the tubes, respectively, the first end cap including a dialysis fluid inlet and a dialysis fluid outlet, the end caps and the tubes configured such that dialysis fluid can flow from the fluid inlet of the first end cap, through at least one first tube to the second end cap, and through at least one second tube back to the first end cap; a conductive wire wound around an outside of the conductive tubes; and electronics configured to supply power to the conductive wire, the wire forming a primary coil of a transformer, the tubes forming a secondary coil of the transformer.
US08803042B2	Thermal protection device and method A solenoid valve for use in a hazardous environment requiring a surface temperature of the valve to not exceed a cutoff temperature, the valve comprising coil configured to physically move an armature using an field generated by the coil; a thermal cutoff device having a fusing temperature above the cutoff temperature; and a heating resistor sized and configured to raise thermal cutoff device's temperature to the fusing temperature before the surface temperature exceeds the cutoff temperature. A method of constructing a solenoid valve for use in a hazardous environment requiring a surface temperature of the valve to not exceed a cutoff temperature, the method comprising the steps of: selecting a thermal cutoff device having a fusing temperature above the cutoff temperature; and selecting and configuring a heating resistor to raise thermal cutoff device's temperature to the fusing temperature before the surface temperature exceeds the cutoff temperature.
US08803040B2	Load shedding for surface heating units on electromechanically controlled cooking appliances According to one aspect, a system for reducing peak power usage of an electromechanically controlled cooking appliance is provided. The system includes at least one infinite switch, one or more heating units, at least one of which comprising at least two separately controllable resistive heating elements, a control operatively coupled to the one or more heating units, the control being configured to receive and process a utility state signal indicative of the current state of an associated utility, wherein the one or more heating units include at least one relay switch configured to selectively enable and disable energization of one of the elements in response to the utility state signal.
US08803038B2	Apparatus for image formation An apparatus for image formation comprises a fixing unit, first to fourth switching units, a DC power supply unit, an accumulating unit, a charging unit, and a switching control unit. The first switching unit switches the state of connection between the fixing unit and a commercial power source. The DC power supply unit supplies another electric load of the apparatus than the fixing unit with DC power. The second switching unit switches the state of connection between the DC power supply unit and the commercial power source. The third switching unit switches the state of connection between the charging unit and the commercial power source. The fourth switching unit switches the state of connection between the accumulating unit and the electric load. Based on the state of conduction of the first switching unit, the switching control unit switches the states of conduction of the other three switching units.
US08803035B2	Equalizing mechanism of welding apparatus An equalizing mechanism of a welding apparatus connects an apparatus body and a fixed bracket, and includes a fixed member on the fixed bracket, and a pressure shaft on an apparatus body close to a bottom face of the fixed member. A cutout is at a position facing the fixed member A movable member on the apparatus body accommodates the fixed member. A restrictive member located by side faces of the fixed member and the movable member restricts relative movement thereof to a direction parallel to the pressure shaft. A driven lever is supported by a front portion of the fixed member to abut on an inner front face of the movable member at one end and abut on the pressure shaft at an other end. A spring between a back portion of the fixed member and an inner back face of the movable member presses the two members to move away from each other.
US08803034B2	Systems and methods to feed wire within a welder The subject embodiments relate to a wire feed system that is used with a welder. The wire feed system includes a pair of counter-rotating discs disposed along a common longitudinal axis that are spaced apart a first width. A first disc rotates in a first direction and a second disc rotates in a second direction which is opposite the first direction. A drive roll is disposed between the first disc and the second disc within the first width. An engaging member moves the drive roll adjacent to either the first disc or the second disc based on a predetermined condition to advance or retract wire relative to a workpiece within the welding system.
US08803030B1	Devices for slag removal A system for removal of slag during laser cutting of a hypotube by a laser cutting system may include a cooling system and a cooling fluid inlet regulator. The cooling system may be configured to be coupled to a laser nozzle of a laser cutting system. The cooling system may include a supply of gas and a gas inflow valve configured to regulate the gas that flows into the laser nozzle from the supply of gas. The cooling fluid inlet regulator may be configured to inject cooling fluid into an inner lumen of a hypotube during laser cutting by the laser cutting system at a velocity configured to facilitate removal of slag generated during the laser cutting of the hypotube. The cooling fluid inlet regulator may be configured to cool the hypotube during the laser cutting.
US08803022B2	Welding head The invention relates to a welding head for a welding device for welding components which are not rotationally symmetrical onto workpieces such as for example metal sheets, with a head attachment, the head attachment having a holding device for the component and being designed for carrying a welding current to the component, wherein the holding device is mechanically connected by means of a connecting device to an interface device, via which the welding current can be supplied, the connecting device being subdivided into a first connection piece and a second connection piece, which are electrically insulated from each other.
US08803017B2	Push button switch A push-button switch comprises a lower housing, an upper housing, four terminals, a spring, a driven wheel, and a driving wheel. The terminals are integrally molded with the upper housing and only the contact portions thereof are exposed, such that the movable contacts of an annular conductive plate face upward and remain hovering for the annular conductive plate rotating smoothly before the annular conductive plate contacts with the terminals in order to avoid a deformation and an impact damage between the terminals and the tactics contacts.
US08803016B2	Dome sheet structure including light guide film and mobile communication terminal including the dome sheet structure A dome sheet structure of a mobile communication terminal may include: a metal dome covering a contact point printed on a printed circuit board; and a light guide film disposed on the metal dome. The light guide film may be bonded with the metal dome in a bonding area, and the bonding area may be an area between two concentric circles having different diameters and centered at a center of the metal dome.
US08803015B2	Button lighting structure and electronic device Provided is a button lighting structure that includes: a plurality of button members (5) arranged in a matrix with intervals; and light-emitting element (6) disposed in the interval of the plurality of button members (5). The button lighting structure includes button cover member (7) including plate-like portion (11) having a plurality of openings (14) into which the plurality of button members (5) is inserted, translucent guide (12) that guides the movement of button members (5) pushed into openings (14), and peripheral wall portion (13) formed along the outer periphery of plate-like portion (11), and configured to irregularly reflect, by plate-like portion (11) and peripheral wall portion (13), light from light-emitting element (6) disposed to face plate-like portion (11). Button member (5) includes translucent sidewall portion (5b) into which the light, that is emitted from light-emitting element (6) and that has passed through guide (12), enters.
US08803013B2	Anti-tamper cam system The present invention relates to an anti-tamper cam system 2 used to selectively operate a safety interlock switch 6. The cam system 2 comprising a cam 12 selectively rotatable between two positions in order to activate the switch 6. The cam 12 has a locking system 20, 22; 32a, 32b to lock the cam 12 in one of its positions. The locking system 20, 22; 32a, 32b comprises a separate mechanical locks 20, 22; 32a, 32b on each side of the cam 12, each of which must be unlocked using a dedicated key actuator 8 before the cam 12 can be rotated to its other position.
US08803012B2	High-voltage assembly A high-voltage assembly contains a switching device. The switching device contains a gear having two coupling rods that can be pivoted in a predetermined pivot plane and that displace an electric contact element during pivoting, whereby the switching position of the switching device can be varied. In a first switching position, the switching device connects a first connection to a second connection, and in a second switching position, it connects the first connection to a third connection, and in a third switching position, the three connections remain unconnected. A drive axis of a drive is arranged perpendicular to a pivot plane of the coupling rods, and the coupling rods are mounted such that at least one of them can pivot through the drive axis region in which the drive axis of the drive penetrates the pivot plane of both coupling rods when adjusting the switching position of the switching device.
US08803011B2	Sequential switching device with surrounding distinctive joint points structure The present invention is an innovation about a sequential switching device with surrounding heterogeneous joint points structure, in which the exterior of a middle conductive joint point is surrounded by a heterogeneous external joint point structure, so that a time delay is generated between the two joint points during the sequential OF/OFF operations, so the service life of joint points of a mechanical joint point switch can be prolonged, and the voltage drop and thermal loss of joint point are reduced, especially characterized in that the engagement and stability of joint points are enhanced.
US08803007B2	Cassu-guard The Cassu-guard is electrical safety apparatus that is created to prevent electrical shortage, shock & movement of broken wires and eliminate the use of electrical tape in insulating socket outlets and light switches when installing these devices in metallic boxes.
US08803006B2	Electrical wire holding device An electrical wire holding device includes a seal retention member having an insertion hole configured to allow an electrical wire to be inserted therethrough, and housed in a mounting hole formed in a mounted member, an outer periphery seal member retained on an outer peripheral surface of the seal retention member, and sealing a gap between an inner surface of the mounting hole and seal retention member, and an electrical wire holding member juxtaposed with the seal retention member along the electrical wire, and having a fixing part configured to retain the electrical wire and fixing the electrical wire to the mounted member. The seal retention member is configured to be relatively movable to the electrical wire holding member.
US08803005B2	Electromagnetic interference blocking cabinet with integrated input/output panel Certain embodiments herein are described to protect electronic equipment from electromagnetic interference (EMI). A cabinet and one or more associated input/output panels may be configured to block EMI from entering the interior of the cabinet where electronic equipment may be stored. The input/output panel may include a printed circuit board, an input/output header, and an input/output connector that may be configured to pass electronic signals transmitted via cables, for example, from one side of the input/output panel to another without accompanying EMI. Certain materials and components included on the printed circuit board may assist in deflecting or absorbing EMI so that it does not enter the cabinet. For example, one or more filters may also be mounted onto the printed circuit board to further filter out unwanted EMI.
US08803001B2	Bonding area design for transient liquid phase bonding process Devices, methods and systems are disclosed herein to describe the wettability characteristics of the material forming a bonding area, a non-bonding area, and a melted bonding material. The melted bonding material may have a high degree of cohesion and may result in a very high contact angle (e.g., between 90°- 180°) in the non-bonding area thereby preventing or limiting the flow of a melted material into the non-bonding area, which often results when the melted bonding material forms a low contact angle (e.g., between 0°-90°) in the bonding area. In other words, by choosing a material for the non-bonding area to have low wettability characteristics when compared to the melted materials of the bonding area or by treating the material forming the non-bonding area to have much lower wettability characteristics, the melted materials of the bonding area may be prevented from flowing into the non-bonding area.
US08802999B2	Embedded printed circuit board and manufacturing method thereof An embedded printed circuit board (PCB) includes: a copper foil laminate; an internal electronic component inserted into the copper foil laminate; a first circuit pattern formed on a surface of the internal electronic component; and a second circuit pattern formed on the copper foil laminate.
US08802998B2	Ceramic multilayer substrate and method for producing the same A ceramic multilayer substrate incorporating a chip-type ceramic component, in which, even if the chip-type ceramic component is mounted on the surface of the ceramic multilayer substrate, bonding strength between the chip-type ceramic component and an internal conductor or a surface electrode of the ceramic multilayer substrate is greatly improved and increased. The ceramic multilayer substrate includes a ceramic laminate in which a plurality of ceramic layers are stacked, an internal conductor disposed in the ceramic laminate, a surface electrode disposed on the upper surface of the ceramic laminate, and a chip-type ceramic component bonded to the internal conductor or the surface electrode through an external electrode. The internal conductor or the surface electrode is bonded to the external electrode through a connecting electrode, and the connecting electrode forms a solid solution with any of the internal conductor, the surface electrode, and the external electrode.
US08802994B2	Printed circuit board and method of manufacturing the same An insulating layer is formed on a support substrate having a conductive property. Write wiring traces, read wiring traces, and first and second electrode pad pairs are formed on the insulating layer. The first electrode pad pair is connected to the write wiring traces. The second electrode pad pair is connected to the read wiring traces. Parts of regions of the support substrate, which overlap the electrode pads, are removed. Thus, openings are formed in the regions of the support substrate, which overlap the electrode pads.
US08802993B2	High voltage bushing A high voltage bushing including a metal part provided with a resistive layer.
US08802986B2	Wire harness installation structure A purpose of the invention is to improve a bending durability of a slip-like plate spring arranged along a wire harness by preventing the slip-like plate spring from being corroded, and to provide a wire harness installation structure in which a conductor in electric wires is not liable to be broken. The wire harness installation structure includes the electric wires 19 that have one ends electrically connected to an electric component provided on a stationary-side structural body and the other ends electrically connected to an electric component provided on a movable-side structural body, the slip-like plate spring 17 that is made of metal and has one end fixed to the stationary-side structural body and the other end fixed to the movable-side structural body, and a binding member 21 that is adapted to bind the electric wires 19 to the slip-like plate spring 17. In the wire harness installation structure, the electric wires 19 are bound by the binding member 21 to the slip-like plate spring 17 at a portion other than a portion of the slip-like plate spring 17 to which an extremely large load is applied when the slip-type plate spring 17 is bent and deformed in accordance with the movement of the movable structural body.
US08802980B2	Mounting plate having faceplate grounding means A mounting plate for a control device is adapted to be coupled to an electrical wallbox and is made of a non-conductive material. The mounting plate comprises at least one faceplate screw opening for receiving a faceplate screw such that a faceplate may be coupled to the mounting plate during installation. The mounting plate further comprises a ground wire. The ground wire is adapted to be coupled to earth ground and is also positioned to overlap a portion of the faceplate screw opening. During the installation of the faceplate, as the faceplate screw is inserted into the faceplate screw opening of the yoke, the faceplate screw contacts the ground wire as well as the faceplate. In the event that the faceplate is made of metal, the faceplate will be coupled to the ground wire, and thus, safely grounded.
US08802979B2	Tamper-resistant self-contained receptacle A tamper-resistant self-contained receptacle (TRSCR) provides two sets of contacts for connecting two separate cables in a daisy-chain configuration. A TRSCR is configured for insertion into a single bore hole and is compatible with both metal-clad (MC) and non-metal sheath (NMS) cable. A base providing two sets of contacts, each having hot, neutral and ground contacts, can couple to two doors so that each set is covered. A ground contact can include an extended clip for connection to the metal clad of an MC cable. A door can be configured to receive an MC cable or a NMS cable; or a universal door can be provided. Thus, a TRSCR is configured to provide a separate entry and a separate strain relief for each connected cable. A TRSCR can be coupled to a floor ring when installed in flooring, or an adapter collar when installed in a stone surface.
US08802978B2	Network cabinet A network cabinet is provided includes a base member, two pairs of vertical frame rail members connected to the base member, and a top cover supported by at least one of the vertical frame rail members. The base member defines an opening and another opening is defined in the top cover. The vertical frame rail members are positioned spaced apart from four sidewalls from four corners of the cabinet formed by the four sidewalls, where each sidewall includes a panel or a door. The two pairs of vertical frame rail members and the four sidewalls define at least one cable management pathway and at least a portion of the cable management pathway is vertically aligned with at least a portion of the opening of the base member and the opening of the top cover.
US08802976B2	Dye-sensitized solar cell The present invention is a dye-sensitized solar cell including a working electrode having a conductive substrate that is capable of transmitting light, and a porous oxide semiconductor layer that is provided on the conductive substrate; a counter electrode that is provided to face the porous oxide semiconductor layer of the working electrode; a photosensitizing dye that is supported in the porous oxide semiconductor layer of the working electrode; and an electrolyte that is disposed between the working electrode and the counter electrode, in which solar cell the average particle size of the entirety of the semiconductor particles that constitute the porous oxide semiconductor layer is 100 nm or less, the electrolyte contains inorganic particles and is gelled by the inorganic particles, and the reflectance of the electrolyte is higher than the reflectance of the porous oxide semiconductor layer.
US08802974B2	Solar cell A solar cell includes a p-n junction formed by joining a p-type semiconductor and an n-type semiconductor. The p-type semiconductor is a chalcopyrite compound semiconductor with a band gap of 1.5 eV or more within which an intermediate level exists with a half bandwidth of 0.05 eV or more. The intermediate level is different from an impurity level. The chalcopyrite compound semiconductor includes a first element having first electronegativity of 1.9 or more in Pauling units, the first element occupying a lattice site of the semiconductor. A portion of the first element is substituted with a second element having second electronegativity different from the first electronegativity, the second element being a congeneric element of the first element. The intermediate level is created by substituting the first element with the second element.

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