首页 / 专利分类库 / 测时学 / 电动机械钟或表 / 由母钟带动的时钟的驱动机构 / Remote time clock system with standby power means

Remote time clock system with standby power means

申请号 US31556872 申请日 1972-12-15 公开(公告)号 US3861134A 公开(公告)日 1975-01-21
申请人 JOHNSON SERVICE CO; 发明人 CHACON MANUEL FRANK; WOLTERS FREDERICK J;
摘要 A remote time clock unit is connected as a part of one remote station of several in a data communication system having a controller to generate message frames for reading and resetting of the clock. The clock unit is a digital type having individual day, hour, minute and second counters, with binary coded decimal paralleled input and outputs connected for direct transfer of the input setting to the outputs. The clock outputs, through the loop controller, actuate time operated loads at loop remotes in response to programs at the loop controller. The clock unit is connected to the system by a module address decoder and a command decoder to read the message frames and provide for setting of the day, hour and minute counters. The clock unit is read by message frames with a pair of succeeding frames reading the three BCD bits for the day while simultaneously reading the hour data and the minutes or seconds data. The system is automatically updated each minute or second by an interrupt signal device connected to the input of the minute and second counters. The interrupt device normally connects the minute selection to control updating, but is connected to the system for response to a message frame signal to select the second interrupt interval.
权利要求
1. A data communication apparatus having a data communication loop cable means connecting a loop controller means to a plurality of remote stations, at least one of said remote stations including a real time clock controlled load means, said controller means establishing message frames for communicating with the remote stations, the improvement comprising a real time clock control apparatus at said remote stations comprising an address decoding means having an input means for connection to said loop controller and operable to establish an enable signal, a command decoding means having an input means for connection to said address decoding means for establishing a plurality of outputs including a Write command output and a read output, a real time clock means having a time set input means and a time readout means, said write command output being connected to actuate the set input means, said read output being connected to activate the readout means, and said enable signal being coupled to the clock means and said set input means and said readout means being adapted for connection to said communication loop cable means in response to said enable signal for selectively receiving time information and for transmitting time information via said message frames.
2. The data communication apparatus of claim 1 wherein said time clock means includes a plurality of multiple bit digital coded counter stages for establishing the different time units, each of said message frames including a plurality of parallel information bits for directly setting a counter stage, said command decoding means including means to activate said counter stages in a predetermined sequence, and said command decoding means establishing a plurality of different read outputs connected to said counter stages and selectively connecting said stages to said cable means for simultaneously transmitting time information in digital form from a plurality of said stages.
3. The data communication apparatus of claim 2 wherein said counter stages include a day-of-week stage, an hour stage, a minute stage and a second stage, said different read outputs being connected to selectively and simultaneously actuate said day-of-week stage with said hour stage and with said minute stage.
4. The data communication apparatus of claim 1 wherein said real time clock means is a digital means having a day counter, an hour counter, a minute counter and a second counter connected in serial fashion to a ''''seconds'''' pulse input means, each of said counters having a parallel set input means and parallel readout means, said command decoding establishing a plurality of write command outputs including an initiate output and first write output and another write output, a sequence means connected to said first write output and to said initiate output and to said other write output and connected to actuate the day counter to set the day time in response to a signal from the initiate output and the minute counter in response to the first write output and the hour counter in response to the other write output, said sequence means also being reset by said initiate output.
5. The data communication apparatus of claim 4 wherein said read outputs include a first output to activate a first day bit and minute counters, a second read output connected to activate the second and third day bits of the day counter and the hour counters, and the third read output being connected to activate the seconds counters.
6. The data communication apparatus of claim 4 wherein said sequence means is a counting means responsive to the initiate and write output to establish a signal at a first output line and responsive to successive signals at the write output to sequentially establish a signal at second and third output lines, said output lines being connected to said corresponding counters.
7. The data communication apparatus of claim 1 wherein the real time clock means is a digital means having a plurality of interconnected counters for tracking different units of time, and each of said counters directly setting the output means in accordance with the binary logic signals at the input means in response to the outputs of the command decoding means.
8. The data communication apparatus of claim 1 wherein said loop controller includes a programmer for establishing said message frames, said real time clock means includes interrupt signal means to establish periodic output interrupt signals corresponding to selected division of time, and interrupt means connected to said clock means and to said cable means to establish a frame request for updating of the loop controller programer.
9. The data communication apparatus of claim 8 wherein said interrupT means establishes and includes means to respond at different rates to said interrupt signals.
10. The data communication apparatus of claim 8 wherein said interrupt signal means includes a minute interrupt line and a second interrupt line, said interrupt means being a switch means selectively responsive to said interrupt lines, and said interrupt means being connected to said cable means and responsive to a signal controlling the selection of the interrupt means.
11. The data communication apparatus of claim 1 wherein said loop controller includes a programmer for establishing said message frames, said real time clock means is a digital means having a day counter, an hour counter, a minute counter and a second counter connected in serial fashion to a second pulse input means, interrupt means including a minute interrupt line connected to the minute counter and a second interrupt line connected to the second counter, said interrupt means selectively coupling the signal of said interrupt lines to a message request line, and said interrupt means having said request line connected to said cable means and having means responsive to a message frame signal to control the connection of the interrupt lines to the cable means, said interrupt means thereby periodically being operatively coupled to the cable means to request and obtain a message frame and thereby initiate the updating of the loop controller programer by successive message frames from the controller means.
12. The data communication apparatus of claim 11 wherein said interrupt means includes an interrupt latch connected to the cable means, and an interrupt select means having an input means connected to said interrupt lines and an output connected to the interrupt latch, said select means having a normal condition connecting one of said interrupt lines and disconnecting the other of said interrupt lines to the interrupt latch and responsive to said message frame signal to reverse the connection.
13. The data communication apparatus of claim 1 for connection to an A.C. power supply, a clock pulse source including an A.C. supply coupling and synchronizing means for receiving corresponding alternating current power of a fixed frequency from said power supply and establishing a continuous series of time spaced related clock driving pulse signals of a repetition rate, an auxiliary standby self-powered oscillator adapted to establish a corresponding series of pulse signals of a corresponding repetition rate, a steering gate means having a first input connected to the output of the clock pulse source and a second input connected to said standby oscillator, said steering gate means being selectively operable to couple one of said two inputs to said clock means, and a power failure detection means connected to the source and responsive to failure of the source to generate a selected number of pulse signals within a selected time period and automatically operating said gates to connect said standby oscillator as the input to said clock means.
14. The data communication apparatus of claim 13 wherein said auxiliary oscillator is battery driven, and having a rechargeable battery connected to drive said oscillator, and a battery charging circuit connected to said battery and having an input means for connection to said power supply.
15. The data communication apparatus of claim 13 wherein said supply coupling and synchronizing means includes a triggerable timing means and having a pulse output connected to the gate means, a half-wave rectifying means connected to said power supply and to the timing means to pulse said timing means, a retriggerable timing means connected to be driven from said triggerable timing means and having an output means connected to selectively actuate said steering gate means.
16. The apparatus of claim 15 wherein said triggerable timing means is a one-shot circuit and having a clock synchronization pulse output and a control output, said retriggerable timing meanS is a second one-shot circuit connected to be driven from said control output of said first one-shot circuit and having a steering output means connected to actuate said steering gate means to connect the auxiliary oscillator to said clock means.
17. The apparatus of claim 15 wherein said gate means have a normal standby position connecting the auxiliary oscillator to the clock means, and responsive to the output of the second timing means to reverse said connection and connect the first timing means to the clock means.
18. In the data communication apparatus of claim 15 wherein said oscillator includes a C/MOS integrated circuit which is driven continuously to establish said pulses at said gate means.
19. The apparatus of claim 1 including logic circuit means for selectively transferring data to and from said real time clock means, a logic power supply means for said logic circuit means, and on-off power means for sensing the power supply means to inhibit the transfer of data during the turn-on of power and the turn-off of power.
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