Automatic frequency control for differentially coherent phase detection
阅读：819发布：2021-11-24
专利汇可以提供Automatic frequency control for differentially coherent phase detection专利检索，专利查询，专利分析的服务。并且Automatic frequency control apparatus is provided for controlling the carrier frequency of a differentially coherent phase-shift keyed (DC-PSK) carrier signal. More particularly, the binary signal carried via the DC-PSK carrier signal, after recovery therefrom, is multiplied by the output signal from a quadrature differential phase detector to generate a product signal which, when averaged, has polarities which are indicative of whether the carrier frequency has increase or decreased from a preselected value. The generated product signal thus can be used as an error control signal for maintaining the carrier frequency at such preselected value.，下面是Automatic frequency control for differentially coherent phase detection专利的具体信息内容。
1. Apparatus for use in a receiver which receives a DC-PSK signal, said signal comprising a carrier at a frequency wc which provides a means for carrying first and second states of a transmitted binary signal via first and second phase differences, respectively, between the oscillations of said carrier occurring during successive T second intervals comprising oscillator means for generating an oscillating signal at a frequency wo; down converter means for mixing said DC-PSK signal and said oscillating signal to produce a down converted DC-PSK signal at an intermediate difference frequency wif; differential phase detector means responsive to said down converted signal for recovering therefrom a recovered binary signal which corresponds to said transmitted binary signal, said recovered binary signal comprising opposing polarity pulses which correspond, respectively, to said first and second states of said transmitted binary signal; quadrature differential phase detector means also responsive to said down converted signal for generating an output signal having a polarity during a substantial portion of the duration of each of said pulses which is the same as or opposite to the polarity of such pulse depending upon whether said frequency wif is above or below a preselected frequency wif ; means for multiplying said recovered binary signal with said output signal, thereby developing an error control signal having substantially one polarity when said frequency wif is above wif and substantially the opposite polarity when said frequency wif is below wif ; and means for applying said error control signal to said local oscillator to control said frequency wo such that said frequency wif is maintained at wif .
2. Apparatus in accordance with claim 1 in which: each of said pulses is associated with a particular one of the T second intervals of said carrier, and each pulse is of one polarity if the phase difference between the carrier oscillations of its associated interval and the carrIer oscillations of the immediately preceding interval is equal to said first phase difference and each is of a polarity opposite to said one polarity if the phase difference between the carrier oscillations of its associated interval and carrier oscillations of the immediately preceding interval is equal to said second phase difference; and said output signal has a polarity during a substantial portion of each of said intervals which is the same as or opposite to polarity of the pulse associated with such interval, depending upon whether said frequency wif is above or below said frequency wif .
3. Apparatus in accordance with claim 1 in which said means for applying includes means for averaging said error control signal.
4. Apparatus in accordance with claim 1 in which said differential phase detector means comprises: delay means responsive to said down converted signal for producing a delayed signal which is a replica of said down converted signal and which is delayed by T seconds relative thereto; and comparator means for comparing the phases of said delayed signal and said down converted signal.
5. Apparatus in accordance with claim 1 in which said first and second phase differences are 0* and 180*, respectively.
6. Apparatus in accordance with claim 1 in which said quadrature detector means comrpises: a delay means responsive to said down converted signal for generating a quadrature delayed signal which is a replica of said down-converted signal and which is delayed by T seconds plus 90* relative thereto; and means for comparing the phases of said quadrature delayed signal and said down converted signal.
7. Apparatus in accordance with claim 1 in which said quadrature detector comprises: first and second hybrid couplers, each having first, second, third, and fourth ports, said first port of said first coupler being responsive to said down converted signal and said second port of said first coupler being connected to said first port of said second coupler; a delay means for providing a T second plus 90* delay to signals passing therethrough, said delay means being connected between said third port of said first coupler and fourth port of said second coupler; a difference circuit whose output comprises said output signal, said difference circuit having first and second input ports; a first envelope detector connected between said second port of said second coupler and said first input port; and a second envelope detector connected between said third port of said second coupler and said second input port.
8. Apparatus in accordance with claim 7 in which each of said couplers is a 3db hybrid coupler.
9. Apparatus in accordance with claim 7 in which a signal applied to the first port of each of said couplers is equally divided between said second and third ports thereof, with the portion of the signal appearing at the second port receiving a 0* relative phase shift and the portion appearing at the third port a 90* relative phase-shift; and a signal applied to the fourth port of each of said couplers is equally divided between said second and third ports thereof, with the portion of the signal appearing at the third port receiving a 0* relative phase shift and the portion appearing at the second port a 180* relative phase-shift.
10. Apparatus in accordance with claim 1 in which said output signal is of substantially the opposite polarity to said binary signal when wif is above wif and is of substantially the same polarity as said binary signal when wif is below wif .
11. Apparatus in accordance with claim 8 in which said error control signal is of substantially a negative polarity when wif is above wif and said error control signal is of substantially a positive polarity when wif is below Wif .
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