Pulse-phase comparators专利检索-固定模式噪声信号处理专利检索查询-专利查询网

Pulse-phase comparators

阅读：508发布：2021-12-22

专利汇可以提供Pulse-phase comparators专利检索，专利查询，专利分析的服务。并且The device disclosed herein is a pulse-phase comparator of a digital nature possessing a high degree of noise immunity due to the complete absence of triggerable elements such as binaries or one-shoe multivibrators, and featuring a mode of operation wherein a null output is defined by a corresponding in-phase condition of the compared input signals by virtue of the insertion of additional and externally-generated pulse signals whose fundamental-frequency and phasing character bears a fixed relationship to that of one of the compared signals.，下面是Pulse-phase comparators专利的具体信息内容。

权利要求

1. A noise-free pulse-phase comparator comprising a first logic gating means responsive to a first input signal of variable phase and a second signal of reference phase for producing a series of output pulses whose pulse widths represent the phase difference between said first and second inputs; first and second complementary, externally-generated trains of pulses having a fundamental frequency a fixed integral multiple to said second input signal and a phase a fixed relation to said second input signal; second logic gating means connected and responsive to said series of output pulses and said first and second trains for producing first and second outputs representing the time coincidence of said output pulse series and respectively said first and second trains of pulses whereby the phase difference and the phase difference polarity of said first and second inputs are provided; and circuit means connected and responsive to said first and second outputs for producing a single output indicative of said phase difference and its said polarity.

2. A pulse-phase comparator as defined in claim 1 wherein said circuit means includes a bi-directional counter.

3. A pulse-phase comparator as defined in claim 1 wherein said first logic gating means comprises an EXCLUSIVE-OR gate and said second logic gating means comprises two NAND gates, said NAND gates connected and responsive to said series of output pulses, first of said NAND gates further connected and responsive to said first train, said first train comprising pulses whose positive-going edges coincide periodically with the positive-going edges of said second input signal, and second of said NAND gates further connected and responsive to said second train, said second train comprising pulses whose negative-going edges coincide periodically with the positive-going edges of said second input signal.

4. A pulse-phase comparator as defined in claim 1 wherein said first logic gating means comprises an EXCLUSIVE-NOR gate and said second logic gating means comprises two AND gates, said AND gates connected and responsive to said series of output pulses, first of said AND gates further connected and responsive to said first train, said first train comprising pulses whose positive-going edges coincide periodically with the positive-going edges of said second input signal, and second of said AND gates further connected and responsive to said second train, said second train comprising pulses whose negative-going edges coincide periodically with the positive-going edges of said second input signal.

5. A pulse-phase comparator as defined in claim 1 wherein said circuit means includes a differential amplifier.

6. A pulse-phase comparator as defined in claim 1 wherein said circuit means includes filtering means.

7. In the pulse-phase comparator of claim 3, the addition of inverting means connected and responsive to said first and second outputs from said NAND gates.

8. In the pulse-phase comparator of claim 4, the addition of inverting means connected and responsive to said first and second outputs from said AND gates.

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