Compensation for a scanning system专利检索-电荷积分器传感器与探测器专利检索查询-专利查询网

Compensation for a scanning system

阅读：745发布：2021-06-29

专利汇可以提供Compensation for a scanning system专利检索，专利查询，专利分析的服务。并且A sensitivity profile of photodiodes forming a self-scanned photodiode array operating in the charge storage mode is obtained as the array scans a standard background or white level while in a non-operational or write mode. The serial output of the photodiode array is integrated and a predetermined grey level is subtracted to limit the resultant signal to the range affected by photodiode sensitivity variations and illumination nonuniformities. The resultant signal is digitized and stored under control of a write control signal. Compensation then takes place in an operational mode. The stored digital signals are converted to an analog signal and the grey level is added thereto. This resultant signal is then applied as a compensation signal to a differential amplifier and to a divider circuit. The serial uncorrected video information signal from the integrator is also applied to the differential amplifier whose output is applied to the divider circuit where the photodiode sensitivity and illumination variations are removed to provide a corrected video information signal.，下面是Compensation for a scanning system专利的具体信息内容。

权利要求

1. A sensitivity compensation circuit for a self-scanned photodiode array having a serial video information output comprising: generating means for generating a photodiode sensitivity profile signal for the photodiodes in said array, storage means for storing said sensitivity profile signal during a predetermined mode of operation of said photodiode array, means for entering said sensitivity profile signal into said storage means, means for retrieving said sensitivity profile signal from said storage means as said photodiode array produces a serial video information output, and corrections means responsive to said sensitivity profile signal retrieved from said storage means and said serial video information output for generating a corrected serial video information signal.

2. The sensitivity compensation circuit of claim 1 wherein said generating means comprises an integrator for generating a signal by integrating said serial video information output of said photodiode array as said photodiode array scans a standard reflectance level, and means for digitizing said signal generated by said integrator.

3. The sensitivity compensation circuit of claim 2 wherein said generating means further comprises means for subtracting a predetermined signal level from said signal generated by said integrator.

4. The sensitivity compensation circuit of claim 1 wherein said means for entering said sensitivity profile into said storage means is selectively operable.

5. The sensitivity compensation circuit of claim 4 wherein said means for selectively entering said sensitivity profile into said storage means comprises a plurality of AND circuits connected between said means for digitizing said signal generated by said integrator and said storage means, and means for selectively conditioning said AND circuits.

6. The sensitivity compensation circuit of claim 1 wherein said storage means is digital.

7. The sensitivity compensation circuit of claim 1 wherein said correction means comprises subtraction means for subtracting said uncorrected serial video information output from said sensitivity profile signal, and dividing means for dividing the output of said subtraction means by said sensitivity profile signal.

8. The sensitivity compensation circuit of claim 7 wherein said subtraction means is a differential amplifier.

9. The sensitivity compensation circuit of claim 1 wherein said storage means is an alterable storage means.

10. The sensitivity compensation circuit of claim 9 further comprising means for dynamically updating the contents of said alterable storage means.

11. The sensitivity compensation circuit of claim 1 wherein said generating means periodically generates a photodiode sensitivity profile signal for the photodiodes in said array during a predetermined mode of operation of said photodiode array.

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