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Gate array provided with ram

阅读:1发布:2023-09-10

专利汇可以提供Gate array provided with ram专利检索,专利查询,专利分析的服务。并且PURPOSE: To enhance the speed of a circuit and to reduce the variation of input and output level by shortening channel wirings and reducing a stray capacity and a wiring resistance by dividing the RAM part and arranging the channel regions on the boundaries of them.
CONSTITUTION: Between the X-decoder 15, X-driver 16 and an Y-decoder 17 arranged in the center and the cell regions 9A and 9B, Y-drivers 12A and 12B, sense light amplifiers 11A and 11B of the RAMs respectively arranged on the left and right sides, spaces are arranged and channel regions 7A and 7B are formed there. The wiring which connects the cell regions 9A and 9B with the X-driver region 16 while crossing the channel regions 7A and 7B is only a Ward line W and the wiring of only one layer is possible. Also, the wirings which connect the Y-decoder 17 with the Y-drivers 12A and 12B can be made a one-layer wiring. Except that, there is no wiring which needs to cross the channel regions 7A and 7B so that the wirings crossing the channel regions are bundled into the wiring of the first layer, for example, and the second layer wiring can be ensured for the channel regions 7A and 7B.
COPYRIGHT: (C)1986,JPO&Japio,下面是Gate array provided with ram专利的具体信息内容。

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