Data error detecting circuit
专利汇可以提供Data error detecting circuit专利检索，专利查询，专利分析的服务。并且PURPOSE: To decrease the number of components while simplifying circuit consti tution by reading a symbol from a RAM and using a timing signal calculating a syndrome and a timing signal applying prescribed arithmetic processing so as to detect an error.
CONSTITUTION: Syndrome calculation means 3∼6 obtain a syndrome from a symbol of a RAM 1 and obtain S'
0 , S'
1 ∼S'
3 by dividing the result by roots of the 8-th order primitive polynomial, 1, α∼α
3 repetitively. Adder means 7∼9 obtain the sum S'
0 +S'
1 ∼S'
2 +S'
3 and input the result to a single and a double error detection means 11, 12. The number of times of divisions is counted and stored by a counter means 15. When the means 11 detect S'
0 +S'
1 =...=S'
2 +S'
3 =0, the presence of single data error is detected and the error location (j) is discriminated by the content of the means 15. The means 12 detects the presence of two data errors in case of S'
0 +S'
1 =(S'
1 +S'
2 )/α
a =(S'
2 +S '
3 )/α
2a to obtain (i) and sends location error difference a=i-j to a ROM of an error detection means 31. The error component is obtained by a means 31 via a selection circuit.
COPYRIGHT: (C)1988,JPO&Japio，下面是Data error detecting circuit专利的具体信息内容。
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