Demand automated computer
阅读：181发布：2023-10-02
专利汇可以提供Demand automated computer专利检索，专利查询，专利分析的服务。并且A computer and controls system which monitors the application of power or other quantities subject to demand in which increased costs results due to periodic periods of high demand and controls loads on the system so that the cost is minimized while maintaining the desired service. This invention also allows continuous demand monitoring on industrial processes which are necessary for a specific application.，下面是Demand automated computer专利的具体信息内容。
1. A demand computer for continuously accumulating a quantity over a fixed time interval and said interval being divided into a fixed number of lesser time intervals designated delta T increments and said fixed time interval having starting and ending delta T increments which are continuously changing as the fixed time interval moves through time, comprising: a pulse generator means receiving a variable voltage indicative of the quantity and converting it into pulses whose frequency is indicative of the rate of usage of said quantity; a time base generator means for converting 60 cycle timing signals into short term timing intervals designated delta T increments; means for counting said delta T increments to define a demand period as a fixed number of delta T increments receiving an input from said time base generator; an accumulator means for storing the integral of said quantity which can be continuously altered by removing pulses representative of the rate of usage of said quantity during an update timing period or acquire pulses representative of the rate of usage of said quantity during an alternate compute timing period, said accumulator having contents at any moment in time equal to the sum of all pulses generated by the pulse generator over the demand period from the present delta T increment through the past fixed number of delta T increments defining the demand period; a current rate register means for storing the number of pulses developed by the pulse generator in one delta T increment and capable of holding the maximum expected number of pulses until a new delta T increment begins; a memory element composed of solid state memory devices divided into discrete storage addresses, each address of which is capable of storing the maximum value that can be acquired by the current rate register; means for entering into the enabled address of the memory element on a write command the data stored in the current rate register and means for removing from the memory element on a read command the data stored in said memory element from the address which is enabled and means for storing said data removed from said memory element in an update register; a storage address counter means for counting the delta T increments such that a full count is equal to the fixed number of delta T increments in a demand period and means for decoding the count in the storage address counter for enabling one discrete address in the memory element for each count value in the storage address counter; an update register means for receiving data stored in the memory element equal to the amount acquired in one delta T increment and having been stored in the memory element for the length of one demand period minus one delta T increment and having means to decode a full state and generate a control gate to control pulses to the accumulator register; a trigger control and gating means receiving the output of said pulse generator and supplying an input to said accumulator, said current rate register and said update register, and including means for generating read and write commands to control said memory element and further including means for generating timing cycles for compute and update functions as required to maintain a continuous integral in said accumulator register; a programming decoder means monitoring the contents of said accumulator and initiating a control command when said contents exceed a preset limit and also containing means for presetting an offset value lower than the preset limit which will initiate a pickup control command when the contents of said accumulator drop below the preset limit minus the offset value; and a load controller means connected to said programming decoder for receiving pickup and drop commands from said programming decoder and sequentiallY transferring said commands into open or closed relay contacts to control peripheral equipment.
2. A demand computer according to claim 1 wherein said accumulator means includes decoding means for continuously decoding the binary contents of said accumulator to provide a decimal output.
3. A demand computer according to claim 1 further including a variable rate comparator receiving inputs from said pulse generator, said memory element and said time base generator, and supplying an output to said trigger control and gating means.
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