Vertical channel junction field-effect transistors and method of manufacture专利检索-各向异性扩散图形技术专利检索查询-专利查询网

Vertical channel junction field-effect transistors and method of manufacture

阅读：337发布：2022-03-01

专利汇可以提供Vertical channel junction field-effect transistors and method of manufacture专利检索，专利查询，专利分析的服务。并且The disclosed junction field-effect transistor (FET) has a precisely controlled gate configuration which enables either high power operation or high frequency operation or both. The FET is manufactured by steps including the growing of a first epitaxial layer having a predetermined crystallographic orientation on a substrate to form a drain. Next, a first anisotropic etch of the epitaxial layer provides ''''U''''-shaped grooves with flat bottoms, therein through which a gate is diffused having internal side walls of uniform depth that define the source-to-drain channel. A second epitaxial layer is then grown on the surfaces of the first epitaxial layer and of the gate to provide a source. A second anisotropic etch exposes a portion of the gate, which also forms an etch stop, to facilitate electrical contact thereto. Current flowing through the channel is controlled in response to an input signal applied between the gate and source which adjusts the thickness of a depletion region extending into the channel.，下面是Vertical channel junction field-effect transistors and method of manufacture专利的具体信息内容。

权利要求

1. A field effect transistor having controlled pinch-off characteristics and which is suitable for high frequency operation, including in combination: first electrode means comprised of semiconductor material of a first conductivity type and having a first surface; gate means comprised of semiconductor material of the second conductivity type which is integral with said first surface of said first electrode means and which has a plurality of integral portions each having a U-shaped cross-section, each of said gate portions having a horizonal segment and a plurality of straight, vertical segments which are substantially perpendicular to said horizontal segment; source-to-drain channel portions defined by adjacent ones of said vertical gate segments and having substantially straight, vertical side walls; secOnd electrode means comprised of semiconductor material of the first conductivity type which is integral with said gate means and said source-to-drain channel portions; and said semiconductor materials of said first electrode means and said second electrode means surrounding said gate means.

2. The field effect transistor of claim 1 wherein: said source-to-drain channel portions have rectangular top and side cross-sections and connect said first and second electrode means together; and said gate portions surround each of said rectangular channel portions.

3. The field effect transistor of claim 1 wherein: said first and second electrode means and said gate means are formed from a semiconductor material having a predetermined substantially uniform crystallographic orientation.

4. The field effect transistor of claim 3 wherein said predetermined substantially uniform crystallographic orientation is of the (110) variety.

5. The field effect transistor of claim 1 wherein: said first electrode means forms a drain electrode; and said second electrode means forms a source electrode.

6. The field effect transistor of claim 1 wherein each of said vertical gate segments defining said source-to-drain channel portions has substantially uniform thickness and a substantially uniform surface impurity concentration to effectuate the controlled pinch-off.

7. The field effect transistor of claim 1 further including: a conductive path to said gate means; one of said electrode means includes an opening extending in a direction perpendicular to an outwardly facing surface thereof, and said opening extending toward and terminating at said conductive path; and the field effect transistor further including a metallization layer within said opening to provide conductive contact through said conductive path to said gate means.

8. The field-effect transistor of claim 1 wherein said gate portions are integral with each other and have generally rectangular top sections arranged in a ladder like configuration which provides a long gate width per unit area of die to facilitate high power operation.

9. The field effect transistor of claim 8 further including: a conductive path to said gate means; one of said electrode means includes an opening extending in a direction perpendicular to an outwardly facing surface thereof and said opening extending toward and terminating at said conductive path; and the field effect transistor further including a metallization layer within said opening to provide conductive contact through said conductive path to said gate means.

10. The field effect transistor of claim 9 wherein: said first electrode means forms a drain electrode; and said second electrode means forms a source electrode.

11. The field effect transistor of claim 10 wherein: said first and second electrode means and said gate means are formed from a semiconductor material having a predetermined substantially uniform crystallographic orientation.

12. The field effect transistor of claim 3 wherein: said predetermined substantially uniform crystallographic orientation is of the (110) variety.

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