DYNAMIC PHASE LOGIC GATE

申请号 PCT/CA0100293 申请日 2001-03-07 公开(公告)号 WO0167607B1 公开(公告)日 2002-07-18
申请人 ROMANIUK CHARLES C; 发明人 ROMANIUK CHARLES C;
摘要 A logic device for use with data signals having a continuously or semi-continuously varying waveform of substantially fixed frequency. The device provides a logical output from at least one of the data inputs and comprising a first pair of inputs each to receive a data signal having one of a predetermined set of values representing analog, discrete, or digital states. A combiner stage is used to combine the inputs and produce a signal therefrom. A filter stage is utilized to receive the signal and produce a conditioned signal representative of one of a pair of binary states. The conditioned signal is combined with a second control input. The resultant signal is passed to an output.
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