Fuze actuating system |
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| 申请号 | US3777665D | 申请日 | 1972-08-03 | 公开(公告)号 | US3777665A | 公开(公告)日 | 1973-12-11 |
| 申请人 | GEN ELECTRIC; | 发明人 | ZIEMBA R; | ||||
| 摘要 | An electronic, digital, time fuze, has a time base which is introduced over a radar command link at a rate which is inversely proportional to the desired projectile flight time. A target following ranging device, such as a ranging laser, provides target range information to a pulsed radar transmitter. The range signal from the ranging device controls a variable pulse rate control unit which in turn adjusts the transmitter pulse rate to a value inversely proportional to the target range. The transmitter is fixed to the weapon system and radiates in the direction of the projectile flight path. Each projectile includes a fuze actuating circuit consisting of an antenna, an r.f. detector, a fixed-set counter and a firing circuit. At launch, the fuze actuating circuit within each projectile becomes actuated a short distance after departure from the gun muzzle. As the projectile travels towards its target it receives a series of r.f. pulses at a rate which will just fill the counter when the projectile is at the proper range. The counter within the fuze counts the pulses received during its flight to target. When the fixed-set number has been accumulated, the firing circuit detonates the payload. | ||||||
| 权利要求 | 1. A weapon system comprising: a projectile having a fuze; said fuze including a receiving antenna for receiving pulses, an r.f. detector having an input terminal coupled to said receiving antenna and an output terminal, a fixed-set counter having a plurality of multi-state stages, an input terminal coupled to said detector output terminal for accumulating pulses therefrom and an output terminal for presenting a full-count signal when a preset count of pulses has been accumulated; a firing circuit having an input terminal coupled to said counter output terminal for detonating said fuze when said full-count signal is presented by said counter; and reset means for automatically forcing each of said stages of said counter to a predetermined one of said states. |
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