| Document | Document Title |
|---|---|
| US12301321B2 |
Reporting configuration for cross link interference based channel state information
Methods, systems, and devices for wireless communications are described. A user equipment (UE) may transmit channel state information (CSI) that is based on a precoded cross link interference (CLI) channel at the UE. For example, a network entity may transmit a control message to a first UE that indicates a reporting configuration for indicating CSI associated with a channel between the first UE and the network entity. The first UE may generate the CSI based on a precoded CLI channel at the first UE associated with at least one uplink transmission associated with a second UE, where the precoded CLI channel is generated using at least one estimated CLI channel associated with the at least one uplink transmission and at least one candidate precoding matrix associated with the second UE. In accordance with the reporting configuration, the first UE may transmit the CSI to the network entity. |
| US12301316B2 |
Channel estimation method and apparatus
Embodiments of this application disclose a channel estimation method and apparatus, and relate to the field of communications technologies, to help reduce indication overheads. The method may include: generating and sending indication information, where the indication information is used to indicate M N-dimensional precoding vectors, each precoding vector is applied to one of M frequency bands, the M N-dimensional precoding vectors form a space-frequency matrix, and the space-frequency matrix is generated by performing weighted combination on a plurality of space-frequency component matrices, where the space-frequency matrix is an M×N-dimensional space-frequency vector or an X×Y space-frequency matrix, X and Y are one and the other of M and N, M≥1, N24 2, and both M and N are integers. |
| US12301314B2 |
Apparatus, system and method of communicating a single-user (SU) multiple-input-multiple-output (MIMO) transmission
Some demonstrative embodiments include apparatuses, systems and/or methods of communicating a Single-User (SU) Multiple-Input-Multiple-Output (MIMO) transmission. For example, a first wireless communication station may be configured to transmit a Request to Send (RTS) to a second wireless communication station via a plurality of SU MIMO Transmit (Tx) sectors of the first wireless communication station, the RTS to establish a Transmit Opportunity (TXOP) to transmit an SU-MIMO transmission to the second wireless communication station, a control trailer of the RTS including an indication of an intent to transmit the SU-MIMO transmission to the second wireless communication station; and to transmit the SU-MIMO transmission to the second wireless communication station, upon receipt of a Clear to Send (CTS) from the second wireless communication station indicating that the second wireless communication station is ready to receive the SU-MIMO transmission. |
| US12301311B2 |
Panel prioritization for multi panel user equipment
A method including: receiving, by a multi-panel user equipment from a serving network entity, information indicative of predicted transmissions of reference signals by a serving network entity or target network entity; and applying a panel prioritization strategy for the multi-panel user equipment based on the received information indicative of predicted transmissions of reference signals. |
| US12301307B2 |
Communication device, communication method, and storage medium
A communication device communicates a physical (PHY) frame including a preamble and a data field. The preamble includes a Legacy Short Training Field (L-STF), a Legacy Long Training Field (L-LTF), a Legacy Signal Field (L-SIG), an EHT Signal Field (EHT-SIG-A), an EHT Short Training Field (EHT-STF), and an EHT Long Training Field (EHT-LTF), and the EHT-SIG-A includes a subfield indicating the number of spatial streams which are formed by the communication device and not less than one communication device different from the communication device. |
| US12301306B2 |
Beam specific pre-compensation for wireless devices in a high speed single frequency network
Methods, systems, and devices for wireless communications are described. A wireless node (e.g., a vehicle mounted integrated access and backhaul (IAB) node) may aid in wireless communication between one or more wireless devices operating in a high-speed environment (e.g., on a high-speed train (HST)) and one or more network entities. The wireless node may transmit one or more reference signals associated with a Doppler estimation procedure to the one or more network entities. The network entities may use the one or more reference signals to generate a set of Doppler compensation parameters to use while communicating with the wireless node and the one or more wireless devices. In some examples, the wireless node may receive control information or data from the one or more wireless devices, aggregate the information, and transmit the aggregated information to the one or more network entities on behalf of the wireless devices. |
| US12301296B2 |
Phase calibration method and apparatus for phased array antenna
A phase calibration method for a phased array antenna is provided. The method includes: sequentially calibrating M×N antenna units based on a pre-obtained test voltage set including first test voltages; sequentially loading the first test voltages to the antenna unit in the ith row and the jth column, and acquiring phase and amplitude information of a microwave signal radiated by the antenna unit every time one first test voltage is loaded; acquiring first array vectors through analysis based on the phase and amplitude information of the acquired microwave signals of the antenna unit under different first test voltages; obtaining a calibration response vector of the antenna unit under each first test voltage in the test voltage set through a first preset algorithm based on the first array vector, and determining a target voltage-phase curve corresponding to the antenna unit in the ith row and the jth column. |
| US12301295B2 |
Communication system and method for controlling communication system
In order to avoid the phenomenon of communication being impeded and signals transmitted by the plurality of slave devices overlapping, a communication system according to the present invention has the first master device transmits a first pulsed light to the first transmission path and receives a return light of the first pulsed light from the second transmission path; each of the slave devices modulates the first pulsed light, and outputs the modulated first pulsed light as the return light of the first pulsed light; and the width of the first pulsed light is narrower than double the shortest distance from among the transmission distance between the slave device outputting the return light and the transmission distance between the first master device and the slave device outputting the return light. |
| US12301291B2 |
Systems for detecting gestures
A monitoring device system includes a tunable VCSEL laser 10 with one or more active regions having quantum wells and barriers. The active regions are surrounded by one or more p-n junctions. The one or more active regions can include a selected shape structure each with a tunnel junction (TJ). One or more apertures are provided with the selected shape structure. One or more buried tunnel junctions (BTJ) or oxide confine the apertures, additional TJ's, planar structures and or additional BTJ's created during a regrowth process that is independent of a first growth process. A VCSEL output is determined in response to a monitoring application of the VCSEL The VCSEL includes an HCG grating and a bottom DBR. A user monitoring device includes the VCSEL laser. A motion detection apparatus detects a user's movement information. The motion detection apparatus and the monitoring system assist to determine one or more of a person's: gestures; sleep information and sleep behavior information, or user respiration information. A cloud based system is in communication with the monitoring device and the motion detection apparatus. |
| US12301286B2 |
System and method for powering re-generation and re-transmission of millimeter waves for building penetration
A system for enabling signal penetration into a building includes a transceiver located on an exterior of the building for receiving signals at a first frequency transmitted from a source outside of the building. An optical bridge receives the signals at the first frequency that experiences losses when penetrating an exterior surface of the building, converts the received signals at the first frequency into a first format that overcome losses caused by penetrating an exterior surface of the building and transmits the signals through the exterior surface of the building. A WiFi transceiver located on the interior of the building and connected to the optical bridge converts between the signals in the first format and WiFi signals and for transmitting the WiFi signals to the interior of the building and receiving the WiFi signals from the interior of the building. |
| US12301282B2 |
Optical signal transmission
A method of configuring an optical network comprising a switching system, a first node, a second node, and an optical link between the first node and the second node. The optical link includes a first optical connection and a second optical connection. The method includes changing a state of the switching system from a first state to a second state. In the first state, the optical network is configured to use the first and second optical connection to transmit first and second optical signals in first and second directions, respectively. In the second state the optical network is configured to use the second and first optical connections to transmit the first and second optical signals in the first and second directions, respectively. |
| US12301281B2 |
Method and apparatus for registering new terminal using chromatic dispersion distance estimation
Provided are a method and apparatus for registering a new terminal using chromatic dispersion distance estimation. The method of registering a new terminal, performed by a transport unit (TU), includes performing frame synchronization through a downstream packet received from a transport node (TN), identifying a position of a frequency of a spectral null and a number of frequencies of spectral nulls through analysis on a frequency spectrum of the received downstream packet, estimating a transmission distance of an optical fiber to the TN, based on the identified position of the frequency of the spectral null and the identified number of frequencies of spectral nulls, and determining a timing of transmitting a registration request message, based on the estimated transmission distance, where the discovery information message is received from the TN. |
| US12301277B2 |
Parameter based adaption of a transmission scheme on a radio resource
A user device, UE, and a base station, BS, for a wireless communication system is described. Each is using a transmission scheme on a radio resource, and is to determine one or more parameters of a radio channel associated with the radio resource, and to adapt the transmission scheme by selecting an additional radio resource on the basis of the determined one or more parameters. Further a wireless communication system, comprising two or more of the above devices, corresponding methods and a computer program product are described. |
| US12301271B2 |
Beam sweep adjustment for a maximum permissible exposure condition
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may determine whether an uplink communication that is scheduled to be transmitted by a plurality of physical uplink repetitions in multiple slots on a plurality of beams is subject to a maximum permissible exposure (MPE) condition. The UE may determine a transmission adjustment for the plurality of physical uplink repetitions on the plurality of beams, based at least in part on a determination that the uplink communication is subject to the MPE condition, and transmit the uplink communication based at least in part on the transmission adjustment. |
| US12301269B2 |
Self-tuning RF link
RF receivers having self-tuning capabilities. An example can provide self-tuning by detecting a first envelope of a first demodulated output signal and a second envelope of a second demodulated output signal. A difference between the detected envelopes can be filtered to generate a control signal. The control signal can be applied to a voltage-controlled crystal oscillator. In-phase and quadrature outputs of the voltage-controlled crystal oscillator can be used to demodulate a received signal to demodulate in-phase and quadrature signals. Loop gain dependency on input signal amplitude can be reduced by using logarithmic amplifiers after the envelope detectors, or by replacing the envelope detectors and logarithmic amplifiers with demodulating logarithmic amplifiers. |
| US12301267B2 |
Apparatuses and methods for facilitating joint precoding and probabilistic constellation shaping
Aspects of the subject disclosure may include, for example, identifying a modulation scheme for transmitting data from a transmitter to a receiver, identifying a plurality of symbols associated with the modulation scheme, determining that a transfer function of a filter that is applied at the transmitter imposes an interdependence amongst at least two symbols of the plurality of symbols, determining, based on the transfer function, a joint probability distribution of the plurality of symbols that reduces a signal power of at least one signal that is used to transmit the data subject to a constraint that an information rate associated with the at least one signal is greater than a threshold, and causing the data to be transmitted via the at least one signal from the transmitter to the receiver in accordance with the joint probability distribution. Other aspects are disclosed. |
| US12301266B2 |
Interference mitigation in wireless communication using artificial interference signal
Methods, devices, and system related to wireless communications are disclosed. In one example aspect, a device for wireless communication includes a processor that is configured to determine an estimation of an interference signal for a connection between the device and a receiving device in a wireless communication system, construct an interference elimination signal based on the estimation of the interference signal, and perform a data transmission to the receiving device with the interference elimination signal to enable the receiving device to eliminate the interference signal in the data transmission. The estimation of the interference signal is determined by building a probabilistic model of the interference signal using at least an interference template associate with a characteristic of the device or one or more measurements of a channel condition collected within a predefined observation window. |
| US12301265B2 |
Radio-frequency chip
A radio-frequency chip is provided, and relates to the field of chip technologies, to reduce a component loss caused by redundant components in the radio-frequency chip. The radio-frequency chip includes a phased array, the phased array includes a plurality of branches, and each of the plurality of branches includes a transmitting path, a receiving path, a common path, and a phase shifter. The phase shifter includes a first phase shift unit, a second phase shift unit, and a third phase shift unit. The first phase shift unit is located on the transmitting path, the second phase shift unit is located on the receiving path, and the third phase shift unit is located on the common path. |
| US12301264B2 |
Intermodulation distortion suppresion circuit and method
Described herein are related to a device for communication. In one aspect, the device includes a first circuit configured to generate a first signal and a second signal at a first frequency, according to a third signal at a second frequency higher than the first frequency. The first signal and the second signal may have opposite phases with each other. In one aspect, the device includes a second circuit configured to provide a difference between the first signal and the second signal as a fourth signal. In one aspect, the device includes a third circuit configured to provide the first signal to the second circuit, and resonate at a third frequency between the first frequency and the second frequency. In one aspect, the device includes a fourth circuit configured to provide the second signal to the second circuit, and resonate at the third frequency. |
| US12301263B2 |
Self-controlled radio frequency (RF) filtering unit
A self-controlled radio frequency (RF) filtering unit that may include (i) a frequency bank that comprises first till fourth band pass filters (BPFs) having first till fourth frequency bands respectively; wherein at least one harmonic of at least one fundamental frequency within the first frequency band pass an interference risk for at least one other frequency band; (ii) a measurement circuit configured to measure the input power received in two or more frequency bands and to provide a power measurement result; (ii) an input RF switch comprising a first RF switch input port, a first RF switch output port, and a second RF switch output port; wherein input RF switch is configured to select a selected RF switch output port, based at least in part on the power measurement result, out of the first and second RF switch output ports; wherein the first RF switch output port is RF coupled to an input of the second BPF; wherein the second RF switch output port is RF coupled to inputs of the first BPF, the third BPF and the fourth BPF; and (ii) an output RF switch comprising a second RF switch input port, a third RF switch input port, and a third RF switch output port; wherein output RF switch is configured to select, based at least in part on the power measurement result, a selected RF switch input port out of the second and third RF switch input ports; wherein the second RF switch input port is RF coupled to outputs of the first BPF and the second BPF; and wherein the third RF switch input port is RF coupled to outputs of the third BPF and the fourth BPF. |
| US12301259B2 |
Decoding apparatus, decoding method and program
A decoding device includes a memory and a processor configured to execute inputting a code word encoded by a polar code from an original message; decoding the original message from the code word based on a conditional probability expressed by a symmetric parameterization and having observation information as a condition; and outputting the decoded original message. |
| US12301258B2 |
System and method for hybrid-ARQ
Systems and methods are disclosed for providing H-ARQ transmissions in respect of a set of horizontal code blocks are combined in a code. Retransmissions contain vertical parity check blocks which are determined from verticals from the set of horizontal code blocks. Once all the vertical parity check blocks have been transmitted, a new set may be determined after performing interleaving upon either the content of the horizontal code blocks, in the case of non-systematic horizontal code blocks, or over the content of encoder input bits in the place of systematic horizontal code blocks. The interleaving may be bitwise or bit subset-wise. The retransmissions do not contain any of the original bits. In the decoder, soft decisions are produced, and nothing needs to be discarded; decoding will typically improve with each retransmission. |
| US12301253B2 |
Check node data compression in memory systems
This application is directed to compressing check node data for an electronic device. The electronic device identifies a check node corresponding to a subset of codeword symbols in a block of data and determines check node data that indicates a likelihood of the subset of codeword symbols being erroneous. A set of data bits are determined based on a value combination of data items of the check node data to uniquely identify the value combination among a set of selected value combinations according to a predefined relationship. The electronic device stores, in a memory block, the set of data bits representing the data items of the check node data of the check node. Each data item requires more data bits to represent all possible values of the respective data item than data bits of the set of data bits. |
| US12301251B2 |
Scalable surface code decoders with parallelization in time
Scalable, parallelizable quantum error correction on surface codes can be performed using a decoder graph. Overlapping decoder graph windows can be generated using the decoder graph. First corrections can be independently determined for each of the overlapping decoder graph windows. First core corrections can be retained for core regions of each of the overlapping decoder graph windows. Non-overlapping decoder graph windows can be generated using the decoder graph. The temporal boundaries of the non-overlapping decoder graph windows can be the temporal boundaries of the corrected core regions of the overlapping decoder graph windows. Second corrections can be independently determined for each of the non-overlapping decoder graph windows based on the temporal boundaries of the corrected core regions. The first core corrections and the second corrections can be combined to form a complete set of corrections for the decoder graph. |
| US12301249B2 |
Operating an analog-to-digital converter device
There is described an analog-to-digital converter, ADC, device (100), comprising: i) a first converter stage (110), comprising a first digital-to-analog converter, DAC, (115), comprising at least two first unit elements (116, 117, 118) each with a first unit element value (U11, U12, U13); ii) a second converter stage (120), comprising a second DAC (125), comprising at least two second unit elements each with a second unit element value (U21, U22, U23); and iii) a control device (180), coupled to the first DAC (115) and the second DAC and configured to: swap at least one of the first unit element values (U1) with at least one of the second unit element values (U2) to obtain corresponding third unit element values (U3) and forth unit element values (U4). |
| US12301247B2 |
Driver circuitry
The present disclosure relates to circuitry comprising: digital circuitry configured to generate a digital output signal; and monitoring circuitry configured to monitor a supply voltage to the digital circuitry and to output a control signal for controlling operation of the digital circuitry, wherein the control signal is based on the supply voltage. |
| US12301245B2 |
Iterative ADC and DAC calibration
A circuit and method for calibrating ADCs and DACs generates a calibration signal by a DAC; filters spurs from the calibration signal from the DAC to generate a filtered calibration signal; calculates ADC interleave calibration factors to improve performance metrics of the ADC, responsive to the filtered calibration signal; receives the calibration signal from the DAC and calculates DAC interleave calibration factors; generates a calibration signal with improved performance metrics, responsive to the DAC interleave calibration factors received from the ADC; and repeats the process until the performance of the ADC and DAC are within a predetermined range. |
| US12301240B2 |
Clock generator circuit, corresponding device and method
In an embodiment, a circuit includes cascaded delay units arranged in a chain, each delay unit having an input-to-output delay time, wherein a first delay unit in the chain is configured to receive an input signal for propagating along the delay units in the chain, logic circuitry coupled to delay units in the chain, the logic circuitry configured to generate a clock signal as a logic combination of signals input to and output from the delay units in the chain and feedback circuitry configured to supply to the first delay unit in the chain a feedback signal, the feedback circuitry including a first feedback signal path from a last delay unit in the chain to the first delay unit in the chain and a second feedback signal path from an intermediate delay unit in the chain to the first delay unit in the chain, the intermediate delay unit arranged between the first delay unit in the chain and the last delay unit in the chain. |
| US12301237B2 |
Voltage conversion circuit and memory
A voltage conversion circuit and a memory are provided. The voltage conversion circuit includes a driving circuit and a receiving circuit. The driving circuit is powered by a first voltage, and outputs a first signal at an output end, a voltage of a high level of the first signal being less than the first voltage. The receiving circuit is powered by the first voltage, receives the first signal at a first input end, and receives a sampling signal at a second input end. The receiving circuit is configured to output a second signal according to the sampling signal, and a voltage of a high level of the second signal is equal to the first voltage. |
| US12301236B2 |
Equalizer for removing inter symbol interference of data signal by increasing pulse widths of logic low level and logic high level of data signal
An equalizer includes a first pulse width controller that is configured to generate a first signal by increasing a first pulse width of a first data signal having a first logic level, the first data signal corresponding to a current data bit, a second pulse width controller that is configured to generate a second signal by increasing a second pulse width of the first data signal having a second logic level, a first sampler that is configured to generate a first sampled signal by sampling the first signal, a second sampler that is configured to generate a second sampled signal by sampling the second signal, and a multiplexer that is configured to output the first sampled signal or the second sampled signal based on a value of a previous data bit. |
| US12301222B2 |
Semiconductor switch controller
A circuit arrangement for driving a semiconductor switch includes an undervoltage detection circuit to indicate an undervoltage state when a supply voltage falls below a voltage threshold value. A temperature detection circuit indicates that a temperature of a semiconductor switch exceeds a temperature threshold value. A control circuit for driving the semiconductor switch deactivates the semiconductor switch when the undervoltage detection circuit indicates an undervoltage state, and to reactivate the semiconductor switch when the undervoltage detection circuit no longer indicates an undervoltage state. In this case, the reactivation is delayed by a defined delay time when the semiconductor switch was previously deactivated due to an undervoltage state and the temperature detection circuit indicates that the temperature of the semiconductor switch exceeds the temperature threshold value. |
| US12301221B2 |
Overcurrent protection circuit for protecting semiconductor device from overcurrent at high speed, and switching circuit provided with the overcurrent protection circuit
The overcurrent protection circuit includes: a first transistor having an emitter connected to a control voltage; and a second transistor having a base connected to a collector of the first transistor, a collector connected to a base of the first transistor and pulled up to a voltage, and a grounded emitter. When the control voltage exceeds a first threshold voltage, the first and second transistors are turned on, the control voltage decreases as a result of decrease in the pull-up voltage, and a protection operation to turn a switching element off is started, and the overcurrent protection circuit includes a first diode connected between the control voltage and the emitter of the first transistor, and an element circuit connected between the emitter and the base thereof. The element circuit includes any of a second diode, a first resistor, and a parallel circuit including the second diode and the first resistor. |
| US12301219B2 |
Overdrive I/O ESD protection network
Systems and methods are provided for an electronic device that comprises a core logic circuit coupled to a supply voltage rail and an operating voltage rail. During a standard operation, the supply voltage rail has a supply voltage, the operating voltage rail has an operating voltage, and a post driver voltage rail has an overdrive voltage that is greater than the operating voltage. The electronic device further comprises a first power clamp circuit coupled to the supply voltage rail and the post driver voltage rail, a low-side logic-high voltage rail coupled to the first end of the core logic circuit, and a first power-to-power clamp circuit coupled to the low-side logic-high voltage rail and the post driver voltage rail. The first power-to-power clamp circuit is configured to receive electrostatic discharge (ESD) current between the post driver voltage rail and the low-side logic-high voltage rail. |
| US12301217B2 |
Common gate drive circuit for switching high voltage device
Semiconductor devices for driving transistors in a power device are described. A semiconductor device can include a voltage source configured to provide a fixed bias voltage to a first device implemented as a common gate device. The semiconductor device can further include a second device connected in series with the first device. The current output of the second device can be connected to a source terminal of the first device. The semiconductor device can further include a driver configured to drive the second device to perform current control on the first device. |
| US12301210B2 |
Method of making stacked acoustic wave resonator package with laser-drilled vias
A packaged acoustic wave component is disclosed. The packaged acoustic wave component can include a first acoustic wave resonator that includes a first interdigital transducer electrode that is positioned over a first piezoelectric layer. The packaged acoustic wave component can also include a second acoustic wave resonator including a second interdigital transducer electrode positioned over a second piezoelectric layer. The second piezoelectric layer is bonded to the first piezoelectric layer. The packaged acoustic wave component can further include a stopper structure that is positioned over the first piezoelectric layer. The first stopper structure is positioned above a via and extends through the first piezoelectric layer. The stopper structure is in electrical communication with the first interdigital transducer electrode and includes a material which reflects at least fifty percent of light having a wavelength of 355 nanometers. |
| US12301207B1 |
Techniques for adding compensating material(s) in semiconductor devices
A resonant member of a MEMS resonator oscillates in a mechanical resonance mode that produces non-uniform regional stresses such that a first level of mechanical stress in a first region of the resonant member is higher than a second level of mechanical stress in a second region of the resonant member. A plurality of openings within a surface of the resonant member are disposed more densely within the first region than the second region and at least partly filled with a compensating material that reduces temperature dependence of the resonant frequency corresponding to the mechanical resonance mode. |
| US12301205B2 |
Bulk acoustic wave (BAW) reflector and resonator structures, devices and systems
Techniques for improving Bulk Acoustic Wave (BAW) reflector and resonator structures are disclosed, including filters, oscillators and systems that may include such devices. First and second layers of piezoelectric material may be acoustically coupled with one another to have a piezoelectrically excitable resonance mode. The first layer of piezoelectric material may have a first piezoelectric axis orientation, and the second layer of piezoelectric material may have a second piezoelectric axis orientation that substantially opposes the first piezoelectric axis orientation of the first layer of piezoelectric material. A top acoustic reflector electrode may include a first pair of top metal electrode layers electrically and acoustically coupled with the first and second layer of piezoelectric material to excite the piezoelectrically excitable resonance mode at a resonant frequency of the BAW resonator. The resonant frequency of the BAW resonator may be in a super high frequency band or an extremely high frequency band. |
| US12301202B2 |
Bulk acoustic wave resonator with slit
Provided is a bulk acoustic wave resonator. The bulk acoustic wave resonator includes a first electrode, a piezoelectric layer and a second electrode, where the piezoelectric layer is disposed between the first electrode and the second electrode, the piezoelectric layer is provided with at least one slit, and along a direction pointing from the first electrode to the second electrode, the at least one slit penetrates through at least the piezoelectric layer. |
| US12301201B2 |
Acoustic wave element having high acoustic velocity layer
An acoustic wave element is disclosed. The acoustic wave element can include a piezoelectric layer that includes aluminum nitride. The acoustic wave element can also include a diamond like carbon layer. The acoustic wave element can further include an interdigital transducer electrode that is positioned on the piezoelectric layer. The piezoelectric layer is positioned between the interdigital transducer electrode and the diamond like carbon layer. The acoustic wave element is configured to generate a Lamb wave having a wavelength of λ. |
| US12301200B2 |
Balun having asymmetric inductors and adjustable impedance transformation ratio
A balun circuit includes a first transformer comprising a first inductor and a second inductor, the first inductor having an electrical value different than the second inductor, a second transformer comprising a third inductor and a fourth inductor, the third inductor having an electrical value different than the fourth inductor, the first inductor connected to a positive terminal of a balanced port, the third inductor connected to a negative terminal of the balanced port, the second inductor connected to an unbalanced port and the fourth inductor connected to a node. |
| US12301199B2 |
Impedance tuning utility of vector space defined by transmission line quantities
Embodiments disclosed herein include a method of impedance tuning in a semiconductor processing tool. In an embodiment, the method comprises measuring a voltage and a current of a transmission line, converting an analog voltage signal and an analog current signal into a digital voltage signal and a digital current signal, calculating a u-vector from the digital voltage signal and the digital current signal, calculating a C1 position of a first capacitor with real components of the u-vector, and calculating a C2 position of a second capacitor with imaginary components of the u-vector. |
| US12301196B2 |
Filter device and radio-frequency front end circuit including the same
A filter device includes a dielectric substrate, first and second ground electrodes connected to a ground terminal, and resonators between the ground electrodes and electromagnetically coupled to each other. The ground electrodes are at different positions in a normal direction of the dielectric substrate. Each of the resonators includes a first capacitor electrode partially overlapping with the first ground electrode in plan view of the dielectric substrate, a second capacitor electrode partially overlapping with the second ground electrode in plan view of the dielectric substrate, and a via connecting the capacitor electrodes. The resonators include a first resonator connected to an input terminal, a second resonator connected to an output terminal, and a third resonator between the first and second resonators. Shunt electrodes are connected to the via and the ground terminal in the first and second resonators, respectively. |
| US12301193B2 |
Pulse filter
A pulse filter circuit is configured to eliminate pulses that are less than a specified duration and pass those that are greater than the specified duration. A buffer receives a signal and applies the buffered signal to a resistance-capacitance charging-discharging circuit (e.g., RC filter). When the output of the RC filter has, in response to the buffered signal, charged or discharged, as appropriate, to cause the output of a slicer to change, logic circuitry controls switching circuitry to pull the output of the RC filter to be fully charged or discharged, respectively. In this manner, pulses that are too short to charge/discharge the RC filter enough to cross the threshold of the slicer do not reach the slicer circuit output, but pulses that are long enough to cross the slicer threshold are transmitted by the slicer. |
| US12301192B2 |
Digital variable gain adjustment on baseband chip
Embodiments of apparatus and method for digital variable gain adjustment (DVGA) are disclosed. In an example, a baseband chip includes an unpacking module, a symbol recording module operatively coupled to the unpacking module, and a first variable gain adjusting (VGA) module operatively coupled to the symbol recording module. The unpacking module is configured to unpack a plurality of symbols from a first representation of pseudo floating-point numbers to a second representation of fixed-point numbers. The symbol recording module is configured to obtain a symbol parameter based on the unpacking. The first VGA module is configured to dynamically adjust gains of the plurality of symbols having the second representation based on the symbol parameter. |
| US12301189B2 |
Audio control using auditory event detection
In some embodiments, a method for processing an audio signal in an audio processing apparatus is disclosed. The method includes receiving an audio signal and a parameter, the parameter indicating a location of an auditory event boundary. An audio portion between consecutive auditory event boundaries constitutes an auditory event. The method further includes applying a modification to the audio signal based in part on an occurrence of the auditory event. The parameter may be generated by monitoring a characteristic of the audio signal and identifying a change in the characteristic. |
| US12301184B2 |
Average power tracking power management circuit
An average power tracking (APT) power management circuit is provided. The APT power management circuit is configured to generate a first APT voltage(s) for a first power amplifier(s) and a second APT voltage(s) for a second power amplifier(s). The APT power management circuit further includes a pair of switcher circuits that can generate a pair of reference voltages. Depending on various operating scenarios of the APT power management circuit, it is possible to selectively output any of the reference voltages as any one or more of the first APT voltage(s) and the second APT voltage(s). As such, it is possible to flexibly configure the APT power management circuit to support the various operating scenarios based on a minimum possible number of the switcher circuits, thus helping to reduce footprint and cost of the APT power management circuit. |
| US12301181B2 |
Digital audio power amplifier and power amplifier loop
Disclosed are a digital audio power amplifier and a power amplifier loop. The power amplifier loop comprises an operational amplifier U1, a capacitor C1, a power amplifier output stage, a resistor R1, a resistor R2 and a noise control unit, wherein an inverting input end of the operational amplifier U1 is respectively connected to one end of the capacitor C1, one end of the noise control unit and an output end of a preceding DAC current source; an output end of the operational amplifier U1 is respectively connected to a control end of the power amplifier output stage and the other end of the capacitor C1; an output end of the power amplifier output stage is successively grounded by means of the resistors R1, R2; the other end of the noise control unit is connected to a connection point between the resistors R1, R2; the resistance values of the resistors R1, R2 are set to satisfy R1/R2=(N−2)/2, where N>2; the reference voltage of the operational amplifier U1 is equal to PVDD/N, with PVDD being a power supply voltage of the power amplifier output stage; and the noise control unit is a resistor module. The present application ensures the normal operation of the digital audio power amplifier. |
| US12301179B2 |
High frequency amplifier
An amplifier (T1) amplifies an input signal. A harmonic matching circuit (3) is connected to an output end of the amplifier (T1) via a first wire (W1). The harmonic matching circuit (3) includes a first inductor (L1) connected to the first wire (W1), a first capacitor (C1) connected in series to the first inductor (L1), a second inductor (L2) connected in parallel with the first inductor (L1), and a second capacitor (C2) connected in series to the second inductor (L2). The first inductor (L1) and the second inductor (L2) form a subtractive-polarity coupler which presents mutual inductance having subtractive polarity. |
| US12301176B2 |
Low loss travelling wave parametric devices using planar capacitors
A method of manufacturing a travelling wave parametric amplifier (TWPA) includes forming a superconducting junction on a substrate. Trenches are etched away through a metal surface and into a layer of dielectric material. The trenches define a plurality of fingers positioned in an interdigitated arrangement of capacitors defined by a metal and a dielectric material that remains from the etched away metal surface and the layer of dielectric material. |
| US12301169B2 |
Power amplifiers with supply capacitor switching
Power amplifiers with supply capacitor switching are provided herein. In certain embodiments, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, a supply capacitor having a first end connected to the supply voltage, and a bulk n-type field-effect transistor (NFET) switch. The power management circuit is operable in multiple supply control modes (for example, an average power tracking mode and an envelope tracking mode). Additionally, the bulk NFET switch is controlled based on the supply control mode of the power management circuit. The bulk NFET switch includes a ground NFET in series with a second end of the supply capacitor and a ground voltage, and a discharge NFET connected between the second end of the supply capacitor and the supply voltage. |
| US12301168B2 |
Frequency control in a multi-mode VCO
A Voltage-Controlled Oscillator (VCO) includes a cross-coupled transconductance cell. A transformer comprising a primary coil and at least one secondary coil, wherein the primary coil is connected to the cross-coupled transconductance cell. A primary coil varactor is connected to the cross-coupled transconductance cell in parallel to the primary coil. A variable inductive tuning component connected to the at least one secondary coil. A mode switch connected to the at least one secondary coil and configured to select a frequency mode of operation of the VCO by engaging or disengaging the variable inductive tuning component from operation with the primary coil varactor to generate oscillation at a center frequency of the VCO. |
| US12301167B2 |
Solar panel performance modeling and monitoring
A monitoring system that is configured to monitor a property is disclosed. The monitoring system includes a sensor that is configured to generate sensor data that reflects an attribute of the property; a solar panel that is configured to generate and output power; and a monitor control unit. The monitor control unit is configured to: monitor the power outputted by the solar panel; determine that the power outputted by the solar panel has deviated from an expected power range; based on determining that the power outputted by the solar panel has deviated from the expected power range, access the sensor data; based on the power outputted by the solar panel and the sensor data, determine a likely cause of the deviation from the expected power range; and determine an action to perform to remediate the likely cause of the deviation from the expected power range. |
| US12301166B1 |
Plant-shaped solar energy collector
A plant-shaped solar energy collector including a tree assembly and a solar cell assembly. The tree assembly includes a plurality of trunk members, a plurality of branch members, and a plurality of twig members. Each trunk member of the plurality of trunk members are electrically and removably connected one to each other. The plurality of branch members are electrically and removably connected to the plurality of trunk members. The plurality of twig members are electrically and removably connected to said plurality of branch members. The plurality of leaf members has solar cells embedded therein. The plurality of leaf members are removably connected to the plurality of twig members. |
| US12301165B2 |
Array backtracking angle adjusting method and apparatus, and storage medium
Disclosed in the present application are an array backtracking angle adjusting method and apparatus, and a storage medium. The method comprises: acquiring an initial backtracking angle group of a horizontal single-axis tracker, the initial backtracking angle group comprising initial backtracking angles of a plurality of arrays of the horizontal single-axis tracker; according to a preset deviation angle, adjusting the initial backtracking angle group to determine a plurality of candidate backtracking angle groups, the plurality of candidate backtracking angle groups comprising adjusted backtracking angles of the plurality of arrays; and, on the basis of the degree of dispersion of the adjusted backtracking angles of the plurality of arrays in each candidate backtracking angle group, determining a target backtracking angle group from the plurality of candidate backtracking angle groups, the target backtracking angle group comprising target backtracking angles of the plurality of arrays. |
| US12301162B2 |
System for mounting one or more solar panels
A system for mounting one or more solar panels, the system comprising: a third sub-assembly comprising: angled posts arranged transverse to each other, each angled post including a penetrating end arranged to penetrate and engage a post-mounting surface; an engagement bracket arranged to engage the angled posts in use; and a second sub-assembly comprising: an elongated member adapted to be mounted to the engagement bracket at a distance from the post-mounting surface and to extend in a direction substantially perpendicular to the longitudinal direction of the post, the elongated member including at least one male portion that is elongated along a longitudinal axis of the elongated member; and a solar panel support member arranged to slidably receive an edge of a solar panel and including a female portion adapted to receive the at least one male portion of the elongated member, the solar panel support member adapted for pivotal movement about the longitudinal axis of the elongated member to provide a corresponding pivotal movement of the solar panel mounted thereto. |
| US12301158B2 |
De-exciting system for inductive circuits
A de-exciting system for dissipating energy from an inductive circuit that comprises at least one coil adapted to be attached to said inductive circuit and comprising a series connection of a discharge resistor and a unidirectional discharge switching element; a unidirectional bypass switching element that is connected in parallel to the discharge resistor such that, when the de-exciting system is attached to the inductive circuit and both the discharge switching element and the bypass switching element are in a conducting state, a closed conducting path comprising the coil, the discharge switching element, and the bypass switching element is formed; and a control device configured to, in a first de-excitation phase, switch both the discharge switching element and the bypass switching element into a conducting state, and in a second de-excitation phase, switch the bypass switching element into a non-conducting state, while keeping the discharge switching element in the conducting state. |
| US12301155B2 |
Motor driver, motor drive system, and method of driving motor
The present disclosure relates to a motor driver capable of precisely detecting a zero-crossing point of a phase current by sensing the phase current, and the motor driver according to one embodiment may include a current sensor connected to a switching circuit for driving a specific coil among three-phase coils and configured to sense a phase current flowing through the specific coil and a zero detector for detecting a time point when a first peak value is generated and a time point when a second peak value is generated from an output of the current sensor and detect a zero-crossing point of the phase current using the time points when the first and second peak values are generated. |
| US12301154B2 |
Intelligent synchronous rectification system of electronic speed controller, and control method for intelligent synchronous rectification system
The present application relates to an intelligent synchronous rectification system of an electronic speed controller, and a control method for the intelligent synchronous rectification system. The system comprises: a Hall sensor, a second control module, a three-phase inverter, a first control module, a freewheeling measurement module, and a power source module. By means of the present application, the effects of decreasing a rectification loss and ensuring operation smoothness are both achieved. |
| US12301150B2 |
Digital power converter arrangement of electric vehicle
A digital power converter arrangement of an electric vehicle includes a CPU circuit and a function selection circuit. The CPU circuit is configured to execute and perform analog and digital conversion, pulse-width modulation and communication, including a CPU outputting one or more PWM signals by changing a time ratio of a turn-on/turn-off of square wave pulse width modulation signals. The function selection circuit includes a function selector switch configured to switch between an external battery charging function mode, an AC power supply output function mode, and an external motor driver function mode, and a motor selector switch configured to function a motor hall mode when the function selector switch is switched to the external motor driver function mode, wherein the CPU detects the function selector switch and motor selector switch to switch states to run corresponding functions. |
| US12301147B2 |
Gate drive grounding scheme in motor drive systems for wide input DC link voltage
A motor drive system includes a direct current (DC) bus that provides a DC link voltage across a DC link capacitor, and a split DC link mid-point circuit connected in parallel with the DC link capacitor. The split DC link mid-point circuit establishes a mid-point reference based on the DC link voltage. A power inverter is in signal communication with the DC bus. The power inverter includes one or more gate driver units configured to drive one or more corresponding switches. Each gate driver unit includes a mid-point ground connection that is connected to the mid-point reference. The split DC link mid-point circuit can define a voltage divide that establishes the mid-point reference and can be used to monitor the DC link voltage. |
| US12301146B2 |
Producing a motor voltage for a switch drive
A method for producing a voltage for an electric motor of a drive of an electrical switch includes producing a DC link direct voltage from a supply voltage and producing the motor voltage by pulse-width modulation of the direct voltage. A tolerance range for changing the direct voltage is specified, and an actual value of the direct voltage is continually measured. After first measuring the actual value, it is stored in a voltage variable. After each additional measurement, it is checked whether the deviation of the actual from the stored value lies within the tolerance range. The actual value is stored if the deviation from the stored value lies outside of the tolerance range. After each storage, a duty cycle of the pulse-width modulation dependent on the actual value is calculated, and the pulse-width modulation occurs with the duty cycle. A power converter is also provided. |
| US12301145B2 |
Two-phase motor assembly
The present disclosure relates to a motor assembly, and more particularly, to a motor having a two-phase input power source and a power conversion device for driving a two-phase motor. The present disclosure relates to the motor assembly for driving the two-phase motor, the motor assembly configured to comprise: a motor including a first winding and a second winding having an electrically insulated parallel structure; a DC-link circuit for supplying a direct-current voltage; and an inverter connected to the DC-link circuit to convert the direct-current voltage into an alternating-current voltage to drive the motor, and including a first switching element set connected to the first winding and a second switching element set connected to the second winding. |
| US12301143B2 |
Hardware based data management interface
A method includes capturing a first sample data signal, the first sample data signal being associated with a first time domain and storing a first value associated with the first sample data signal in a first element position of a first memory buffer. The method also includes generating, in response to a completion of a sampling window and in response to a request from a data consumer, a snapshot of values stored in the first memory buffer and storing the snapshot of values in a data consumer memory. The method also includes extracting, by the data consumer in a second time domain, at least one value from the snapshot of values and calculating, by the data consumer, at least one of a motor position of a motor and a motor velocity of the motor using the at least one value from the snapshot of values. |
| US12301142B2 |
Determinations of static load torque at standstill
Examples include a method for determining a static load torque at standstill applied to a salient pole synchronous motor. The method comprises fixing a first non-zero torque-producing current component and controlling motor speed using a speed loop regulation of a first regulated component to reach a first zero motor speed steady state corresponding to the fixed first non-zero current component, the motor being subjected to the specific static load torque. The method further comprises controlling motor speed using a speed loop regulation of a second regulated component to reach a second zero motor speed steady state corresponding to a fixed second non-zero torque-producing current component, the motor being subjected to the specific static load torque, the first non-zero current component and the second non-zero current component corresponding to different values. The load torque is estimated as a function of components of the first and second zero motor speed steady states. |
| US12301126B2 |
Systems and methods for detection and control related to charging
Controller and method for charging one or more loads. For example, the controller for charging one or more loads includes: a controller terminal configured to be biased at a first voltage related to a second voltage of a secondary winding of a power converter, the power converter further including a primary winding coupled to the secondary winding, the power converter being configured to, if the power converter is not unplugged from a voltage supply for an AC input voltage, receive the AC input voltage represented by the second voltage and output an output power to the one or more loads; and a voltage detector configured to: process information associated with the first voltage; and determine whether the AC input voltage is in a first voltage state or in a second voltage state based at least in part on the first voltage. |
| US12301125B2 |
Power converter topology
A power converter topology, comprising: a cascade connection of a first converter stage and a second converter stage; wherein the first converter stage comprises a current mode controlled pulse width modulation (PWM) converter having one or more pairs of switches forming a first switching bridge and an inductor connected to the output of the first switching bridge, the switching bridge generating a voltage Vlink; and wherein the second converter stage is a resonant converter having a switching stage having one or more pairs of switches forming a second switching bridge across the voltage Vlink generated by the first converter stage and a resonant tank connected to the output of the second switching bridge, to generate a resonator output voltage; the topology further comprising a transformer to transform the resonator output voltage to a transformed output voltage and a rectifier to rectify the transformed output voltage to an output voltage Vout, and wherein the duty cycle of the first switching bridge is varied according to a voltage derived from the value of the output voltage Vout, and wherein the duty cycle of the second switching bridge is fixed at 50:50. |
| US12301122B2 |
Isolated gate driver
An isolated gate driver includes a transformer including primary and secondary windings, a synchronous rectifier connected between the secondary winding and an output terminal of the isolated gate driver, a first switch including a first terminal connected to a supply voltage, a second switch including a first terminal connected to the supply voltage, a first damping resistance connected between a first terminal of the secondary winding and a second terminal of the first switch, a second damping resistance connected between a second terminal of the secondary winding and a second terminal of the second switch, a first inverter including an input connected to the first terminal of the secondary winding and an output connected to a gate terminal of the first switch, and a second inverter including an input connected to the second terminal of the secondary winding and an output connected to a gate terminal of the second switch. |
| US12301116B2 |
Voltage regulator with dynamic voltage and frequency tracking
A voltage regulator with dynamic voltage and frequency tracking is shown. The voltage regulator has power switches converting an input voltage into an output voltage, a control loop, a voltage comparator, and a target voltage generator. The control loop is coupled to the power switches to control the power switches to perform voltage regulation. The voltage comparator compares the output voltage to the target voltage to generate a first control signal to control the control loop. The target voltage generator generates the target voltage for the voltage comparator based on the frequency difference between the target frequency and the critical-path-related frequency, wherein the critical-path-related frequency depends on the output voltage. The power efficiency and response time are improved. |
| US12301109B2 |
Method for performing a charge-sharing operation and a charge pump circuit therefor
The present disclosure relates to a charge pump circuit with a six-phase clock. The charge pump circuit comprises a six-phase clock circuit and a gate boosting charge pump configured to receive a plurality of clock signals from the six-phase clock circuit. The six-phase clock circuit includes provides a first clock signal, a second clock signal, a third clock signal, a fourth clock signal, a fifth clock signal, and a sixth clock signal. The gate boosting charge pump is configured to enable a charge-sharing operation to share the stored amount of charges between a plurality of parasitic capacitors. The six-phase clock circuit is configured to provide a dead time between each of the first, second, third, fourth, fifth and sixth clock. |
| US12301104B2 |
ORing FET control circuit and method
An ORing FET control circuit and method are provided. The circuit includes an ORing FET, a comparator, first, second and third resistors, a first capacitor, a diode and a driving unit. The positive and negative input terminals of the comparator are electrically connected to the input and output voltages. The first resistor, the second resistor, the first capacitor, and the third resistor are electrically connected in series between a reference voltage and a ground terminal sequentially. The reference voltage is lower than a voltage at the positive input terminal. When the input voltage is lower than the output voltage, if a voltage across the ORing FET is larger than a threshold, the comparator outputs a driving signal at low level, and correspondingly the driving unit turns off the ORing FET. The threshold depends on resistances of the first and second resistors. |
| US12301103B2 |
Charging power supply circuit and control method of same
The present invention discloses a charging power supply circuit and a control method thereof, the charging power supply circuit includes a PFC circuit, a driver module, and a high-voltage output circuit and a low-voltage output circuit both connected to said PFC circuit, wherein the PFC circuit is connected to AC mains, and the drive module is used to set the operation range of said PFC circuit to the range near the zero point of AC input voltage. Using the technical solution of the present invention can achieve keeping the topology on the demand for isolation and reduce the volume and cost of PFC circuits. |
| US12301099B2 |
RC snubber network
The present disclosure relates to a switching device including a RC snubber network. The present disclosure further relates to a RC snubber network for a switching device. A switching device is provided that includes a trench transistor and an RC snubber network connected in between a first terminal and a second terminal of the trench transistor. The RC snubber network includes at least one current concentrating segment that is configured to locally force a major part of the snubber current passing through the trench capacitors to flow through a reduced number of trench capacitors to thereby increase the Ohmic losses associated with the snubber current. |
| US12301097B2 |
Fault prediction method and apparatus for power conversion device, and power conversion system
Disclosed are a fault prediction method and apparatus for a power conversion device, and a power conversion system. The method includes: acquiring multiple output voltages of a detecting coil in a preset time period, wherein an electromagnetic induction is generated between the detecting coil and a switching-on circuit of a switching transistor in the power conversion device; extracting each output frequency corresponding to each output voltage of the detecting coil; predicting time when the power conversion device fails according to a change trend of each output frequency. The apparatus includes a detecting coil and a data processing device; the detecting coil is connected to the data processing device and is a closed coil; the data processing device is configured to: acquire an output voltage of the detecting coil, extract corresponding output frequency, and predict time when the power conversion device fails according to a change trend of each output frequency. |
| US12301092B2 |
Systems and methods for resistance adjustment related to switch-mode power converters
Controller and method for a power converter. For example, a controller for a power converter includes: a feedback detector configured to receive a feedback voltage, sample the feedback voltage, and generate a sampled voltage based at least in part on the feedback voltage, the sampled voltage being associated with one or more fluctuations in magnitude; a resistor selector configured to receive the sampled voltage and generate one or more control signals based at least in part on the one or more fluctuations associated with the sampled voltage; a variable resistor network configured to receive the one or more control signals, determine a network resistance based at least in part on the one or more control signals, and output a compensation voltage based at least in part on the network resistance; and a voltage generator connected to the variable resistor network and configured to receive the compensation voltage. |
| US12301087B2 |
Power tool
A power tool includes a brushless motor having a stator and a rotor. The stator includes a stator core having teeth, first and second insulators fixed to the stator core, and coils respectively wound around the teeth, all of the coils being wound around the first and second insulators. The rotor includes a rotor core disposed in the interior of the stator, a rotary shaft fixed to the rotor core, and one or more permanent magnets fixed to the rotor core. Power supply lines are configured to respectively supply current to the coils. Fusing terminals are fixed to the first insulator members. The fusing members respectively pinch the power supply lines and are thereby respectively electrically connected to the power supply lines. |
| US12301084B2 |
Busbar assembly for motor
The present invention may provide a motor including a housing, a stator disposed in the housing, a rotor disposed in the stator, a busbar disposed on the stator, a plate disposed on the busbar, and a terminal part including a body part in contact with the plate and a protruding part protruding from the body part and disposed on the plate, wherein a part of the body part is disposed between the housing and the plate in a radial direction. |
| US12301080B2 |
Motor system
A motor system of the present disclosure includes a permanent magnet motor including a stator having N-phase windings and a rotor having a permanent magnet, N being a natural number greater than or equal to three, an inverter that supplies N-phase drive currents for generating a rotating magnetic field to the stator, and a zero-phase current supply unit that supplies a zero-phase current to the N-phase windings of the stator. The motor system applies the zero-phase current to the N-phase windings in response to an inter-terminal voltage of the permanent magnet motor reaching a predetermined value of the inter-terminal voltage. |
| US12301079B2 |
Electric generator having plural stators
An electric power generator comprises a rotor and a plurality of stators arranged coaxially and concentrically about a central axis. A first stator is provided concentrically around and adjacent to the rotor, the rotor and the first stator being separated by a rotor-stator airgap and a second stator is provided concentrically around and adjacent to the first stator, the first and second stators being separated by a stator-stator airgap. The rotor includes a plurality of magnetic pole structures configured to provide or generate a plurality of magnetic poles and a radially outer surface of each of the magnetic pole structures is curved with an average radius of curvature which is less than an average distance between the outer surface and the central axis. The rotor-stator airgap thus varies circumferentially in distance, with a shortest distance being at a circumferential centre of each of the magnetic pole structures and longest distance being at circumferential ends of each of the magnetic pole structures. The stator-stator airgap is of uniform thickness. |
| US12301074B2 |
Conductive wire, welding method, and method for manufacturing rotating electrical machine
A conductive wire includes an angled protrusion having a tapered shape being integrated with a wire-shaped main body and configured to generate an arc between itself and an arc welding electrode. At least one of the pair of conductive members comprises an angled protrusion having a tapered shape. Welding of the conductive members is performed by melting the angled protrusion by generating an arc between the angled protrusion and an electrode. |
| US12301071B2 |
Motor control device, mechatronic unit, power generation system, boost converter system, and electric vehicle system
A motor control device of the present invention is connected to a power converter for converting power from direct current power to alternating current power, and controls the drive of an alternating current motor that is driven using said alternating current power, and the motor control device is provided with: a carrier wave generator; a carrier wave frequency adjuster that adjusts the frequency of the carrier wave; and a gate signal generator that uses the carrier wave to pulse width modulate a voltage command according to a torque command, and generates a gate signal for controlling operation of the power converter, wherein the carrier wave frequency adjuster adjusts the voltage command and carrier wave phase difference to reduce eddy current loss generated in rotor magnets of the alternating current motor according to a d-axis current flowing to the alternating current motor and the rotational speed of the alternating current motor. |
| US12301066B2 |
Motor encoder assembly providing optimized sensor alignment
An electric motor includes a stator, a rotor rotatable relative to the stator, a housing, and an encoder assembly. The housing defines a motor chamber in which the stator and rotor are at least partly housed. The housing includes an endshield that defines in part the motor chamber. The encoder assembly is configured to sense an operational parameter of the motor and includes an encoder and an encoder cover. The encoder is adjustably positioned within an axially recessed channel of the endshield. The encoder cover is secured relative to the endshield to at least partially overlie the encoder. |
| US12301061B2 |
Rotor of rotating electrical machine and electrical drive system
An object of the present invention is to provide a structure capable of stably holding a bonded magnet into a magnet insertion part of a rotor core. A rotor of a rotating electrical machine includes a bonded magnet 112, an elastic member 113 having a bent part 113a, and a rotor core provided with a magnet storage part storing the bonded magnet 112 and the elastic member 113. The elastic member 113 is embedded in the bonded magnet 112 in a state where at least a part of the bent part 113a is exposed from the bonded magnet 112, and an exposed part 113c of the bent part 113a from the bonded magnet 112 comes into contact with an inner wall of the magnet storage part 114 and elastically deforms. |
| US12301058B2 |
Rotor having end magnet fixed by fixing member
A rotor includes a rotor core having magnet-receiving holes formed therein, permanent magnets embedded respectively in the magnet-receiving holes of the rotor core, and an annular end magnet. The rotor is configured to generate both magnet torque by the permanent magnets and reluctance torque by outer core portions located on a radially outer side of the permanent magnets in the rotor core. The end magnet is provided at a position facing axial end faces of the outer core portions. Magnetic poles of the end magnet are arranged so as to respectively repel the outer core portions. |
| US12301057B2 |
Motor with casing axially guided by pillars
A stator of a motor includes a plurality of magnetic bodies stacked in a direction of a central axis (X), a case configured to hold the plurality of magnetic bodies, a cover configured to cover the case, and a pillar including a guiding part configured to guide the plurality of magnetic bodies in the direction of the central axis (X). The plurality of magnetic bodies include a guided part guided by the pillar. The pillar includes an outer peripheral surface including positioning parts. The positioning parts determine relative positions of the case and the cover in an axial direction. |
| US12301055B2 |
Core piece, stator core, stator, and rotary electric machine
A core piece that is circularly arranged to construct a stator core of an axial gap type rotary electric machine includes: a first member in a column form extending in an axial direction of the stator core; a second member in a plate form disposed on a first end side of the axial direction in the first member; and a third member in a plate form disposed on a second end side of the axial direction in the first member, the first member has a peripheral surface connecting with the second member and the third member, the second member has a protruding portion projecting outwardly from the peripheral surface of the first member, the third member has a protruding portion projecting outwardly from the peripheral surface of the first member, and the first member, the second member, and the third member are configured by an integrally molded green compact. |
| US12301052B2 |
Reversed power and grid support with a modular approach
Aspects of the disclosure include a power supply system is provided comprising first and second inputs, an output, a first group of power modules coupled to the inputs and the output, a second group of power modules coupled to the inputs, and at least one controller configured to control, in a reverse mode, the first group of power modules to provide power derived from the second input to the output, wherein a majority of power provided by each power module of the first group of power modules in the reverse mode is provided to the output, and control, in the reverse mode, the second group of power modules to provide power derived from the second input to the first input, wherein a majority of power provided by each power module of the second group of power modules in the reverse mode is provided to the first input. |
| US12301044B2 |
DOC setting apparatus and method
A Depth of Charge (DOC) setting apparatus includes a charging and discharging unit for completely charging a battery to a set target voltage and discharging the completely-charged battery; a profile obtaining unit for obtaining a voltage profile for capacity and voltage of the battery while the battery is charged and discharged and obtaining a differential profile for capacity and differential voltage of the battery from the obtained voltage profile; and a processor for sequentially selecting any one of a plurality of preset voltages and setting the selected preset voltage as the target voltage and for obtaining a feature value for a target peak in each of a plurality of differential profiles and setting a DOC for the battery based on the plurality of obtained feature values. |
| US12301043B2 |
Substation including energy storage system, method for assessment of capacity of the same and apparatus therefor
Provided are a substation system including an energy storage device, a method of calculating capacity of the energy storage device, and a control apparatus for the same. The control apparatus may include a charge and discharge determination unit configured to determine a charge or discharge operation of an energy storage device based on whether a measured output value is within an output operation range; a forecast error determination unit configured to determine a ratio of a period in which the measured output value is out of the output operation range with respect to a total period; and a capacity determination unit configured to determine capacity of the energy storage device based on the ratio. |
| US12301040B2 |
Method of charging plurality of battery cells and controller for performing the method
A battery charging circuit for charging batteries includes a first switch connected in series between a first pole of a power supply and a first pole of the first battery cell, a second switch connected in parallel between the first pole of the first battery cell and a second pole of the first battery cell configured to adjust a size of a current applied to the first battery cell, a third switch connected in parallel between a first pole of the second battery cell and a second pole of the second battery cell, the third switch being configured to adjust a size of a current applied to the second battery cell, and a fourth switch connected in series between the second pole of the first battery cell and the first pole of the second battery cell. |
| US12301037B2 |
Intelligent battery cell
Systems, devices, computer-implemented methods, and/or computer program products that can facilitate an intelligent battery cell are addressed. In one example, a device can comprise: active battery cell material; and an internal circuit coupled to the active battery cell material and comprising: a circuit board; two alternating current (AC) power points; two isolated direct current (DC) power points; and a controller that can operate one or more switches on an H-bridge circuit to disconnect the device from a main battery in a bypass mode. In another example, a smart cell modulator can comprise: a set of smart battery cells; and a controller that can operate to selectively engage a subset of the smart battery cells to enable load sharing, distributed feedback control, circulate load across one or more smart battery cells of the set of smart battery cells to increase torque, and to enable speed requests. |
| US12301033B2 |
Case body and charging pile
A case body and charging pile. The case body includes a shell, a partition, electrical components and a heat dissipation assembly. The partition is arranged in the shell so as to divide the shell into a first cavity of sealed cavity and a second cavity, and the shell is provided with an air inlet and an air outlet in communication with the second cavity; the electrical component is arranged in the first cavity; the heat dissipation assembly is arranged in the second cavity and used for dissipating heat to the electrical component. With the shell being divided into a first cavity and a second cavity, the heat dissipation assembly is separated from the electrical components. Therefore, cleaning water may be directly flushed into the second cavity through the air inlet and/or the air outlet to clean the heat dissipation assembly. |
| US12301031B1 |
Large-format battery management systems with gateway PCBA
A battery system with a large-format Li-ion battery pack powers attached equipment by discharging battery cells distributed among a plurality of battery packs. A limp home notification is generated from a smart lithium-ion battery pack to one or more application devices using an analog signal. The battery pack may provide broadcast messages over electronic communication lines, that includes state of charge (SoC), fault status, etc. which can be read by one or more application devices to enter limp home mode. In another example, a “fully charged” notification is generated from the smart lithium-ion battery pack to one or more application devices using an analog signal. The end device powered by the battery pack system receives and reacts to the outputted fully charged signal by modifying the state of the circuitry on the end device. |
| US12301030B2 |
Energy storage system
An energy storage system, to improve operating efficiency and system reliability that exist when a component in the energy storage system is faulty, and avoid a waste of resources. The energy storage system includes a plurality of energy storage branches, at least one switch unit, and a control circuit. Each of the energy storage branches includes a first bus, a string-level converter, and a battery string that are sequentially connected in series, a plurality of balancing converters, and a shared bus. The battery string includes a plurality of battery units connected in series, and each of the battery units includes one battery pack. The battery pack is connected to an input side of one corresponding balancing converter, and output sides of the plurality of balancing converters are separately connected to the shared bus. |
| US12301029B2 |
Power supply system and control device
A control device classifies a plurality of batteries included in a battery string into a first battery (e.g., Ni-MH) and a second battery (e.g., LiB). When a predetermined first condition is satisfied, the control device connects, to a power supply circuit, only the first battery among the batteries included in the battery string. When a predetermined second condition is satisfied, the control device connects, to the power supply circuit, only the second battery among the batteries included in the battery string. |
| US12301028B2 |
Battery system and control method
A battery system includes: a charging apparatus; a plurality of battery modules to connectable in parallel with the charging apparatus; and a controller, in which each of the plurality of battery modules has a battery, and the controller obtains, when a charging command is received, a voltage value of the battery of each of the plurality of battery modules, identifies a first battery having a lowest voltage value and a second battery having a second lowest voltage value, starts charging of the first battery, and after starting the charging of the first battery, starts charging of the second battery when a difference value between a voltage value of a first battery module and the voltage value of the second battery becomes equal to or less than a first threshold value. |
| US12301018B2 |
Power transmission apparatus and wireless power transmission system
A power transmission apparatus includes a first switching element having a first and a second terminal, a first capacitor connected between the first terminal and the second terminal of the first switching element, and a power transmission inductor connected to the first switching element on a direct-current (DC) basis and configured to wirelessly transmit alternating-current (AC) power. |
| US12301017B2 |
System and method for providing inductive power at multiple power levels
A system and method for inductively providing electrical power at a plurality of power levels to electrical devices. The system may include an inductive power outlet unit conductively coupled to a power supply and an inductive power receiver unit associated with the electrical device. The inductive power outlet unit includes a driver device operable to generate power at a plurality of power levels and electrical power is transferred to the electrical device at a power level selected from the plurality of power levels, in accordance with electrical power requirements of the electrical device. The power receiver may be operable in a plurality of modes having a secondary inductor configured to operate selectively with a plurality of inductance values. |
| US12301015B2 |
Real-time approximation method and apparatus of mutual inductance between transmitters and receivers for determining optimal operating condition in multiple-receiver wireless power transfer systems
The embodiments relate to a real-time approximation method and apparatus of a mutual inductance between transmitters and receivers for determining an optimal operating condition in a multiple-receiver wireless power transfer system, and it may be configured to approximate a mutual inductance in the multiple-receiver wireless power transfer system according to a configuration status of the receivers, and determine an operating condition of the multiple-receiver wireless power transfer system based on the mutual inductance. According to the various example embodiments, the inductance may comprise a mutual inductance between the transmitter and the receivers, and a mutual inductance between the receivers. |
| US12301009B2 |
Circuit device and real-time clock device
A circuit device includes a battery power supply terminal, an energy harvest power supply terminal, a storage power supply terminal, a power supply switch circuit, and a control circuit that controls the power supply switch circuit. In a first state, the power supply switch circuit outputs a storage power supply voltage to a supply node while charging the battery by supplying an energy harvest power supply voltage to the battery power supply terminal. In a second state, the power supply switch circuit outputs the storage power supply voltage and the energy harvest power supply voltage to the supply node while charging a storage capacitor by supplying the energy harvest power supply voltage to the storage power supply terminal. |
| US12301008B2 |
Grid-tie system for AC generators
An exemplary renewable-energy system including a back end system coupled to an isolated DC power source and a generator powered by a renewable energy source and including first circuitry configured to convert first AC power from the generator to DC power and to provide the DC power to a DC power bus, the first circuitry further configured to initiate operation using power from the isolated DC power source. The example system further includes a front end system comprising an inverter coupled to an isolated DC power source generator. The inverter includes a ground isolation monitor interrupter (IMI) circuit coupled to the DC power bus and configured to receive the DC power and convert the DC power to second AC power for provision to a power grid. The isolated power source generator ground-isolates third AC power of the power grid for conversion to DC power for the isolated DC power source. |
| US12301007B2 |
Photovoltaic assembly shutoff device, inverter, and photovoltaic quick shutoff system and starting method therefor
A shutdown device for a photovoltaic module, an inverter, a rapid shutdown system, and a method for starting the rapid shutdown system are provided. The method is applied to the rapid shutdown system after each shutdown device in the rapid shutdown system initially starts. The shutdown device is switched into a mode of unlimited output in response to its success in initially starting. The shutdown device, in response to its failure to initially start or when being switched off, samples an electrical parameter at its output terminal in real time, determines whether the electrical parameter meets a preset starting condition, and switches itself on and operates in the mode of unlimited output when the electrical parameter already meets the preset starting condition. |
| US12300989B2 |
Universal mount cover plate for electrical boxes
A cover plate that is connectable to an electrical box includes a body configured to mount to a stud, a brace assembly, or in a gang application on opposite sides of the stud. |
| US12300988B2 |
Junction box with flashing for a tile surface of a roof
A junction box that includes a flashing configured to cover tiles of a roof of a structure and a housing box. The flashing includes a raised portion that includes a top edge and raised portion defines an opening. The housing box includes a recess portion, an expose portion extending from the recess portion, and a junction lip extending from the recess portion in a direction away from the expose portion. A recess between the junction lip and the recess portion defines a junction recess. At least a portion of the recess portion is configured to pass through the opening until at least a portion of the top edge extends into the junction recess. |
| US12300987B1 |
Electric junction box assembly with removable cover
An electric junction box to facilitate the supply of power from a battery to an electric device, including an outer case having an open bottom opposite of an open top. A pair of terminals are fixed within the outer case and spaced apart from each other. A top cover is configured to close the open top and a bottom cover is configured to close the open bottom. A fuse cover assembly is disposed within the outer case, the fuse cover assembly including a base having a top surface and a bottom surface opposite of the top surface, a tower disposed on the top surface and configured to hold a spring, and an activation tab disposed on the bottom surface. The bottom cover is configured to engage the activation tab so as to position the spring between the pair of terminals, completing the electrical connection and allowing the flow of power through the electric junction box. |
| US12300980B2 |
Insulating-stripping tool designed as a hand tool, cutting part for an insulation-stripping tool and method for stripping a cable
An insulation-stripping tool designed as a hand tool for stripping insulation from a cable has a first insulation-stripping cutter for stripping the insulation transversely to a longitudinal direction of the cable and a second insulation-stripping cutter for stripping the insulation in the longitudinal direction of the cable. |
| US12300979B2 |
Clip module for positioning a clip at a predefined assembly position of a cable run, and assembly head comprising such a clip module
A clip module is used for automatically positioning a clip at any angular position on a cable run. The clip module has a gripper having gripping elements for gripping the clip. These gripping elements can be adjusted between an open position and a gripping position by a control mechanism. Furthermore, a delivery unit is provided by which the gripper can be moved in a longitudinal direction and in a vertical direction. The gripper is rotatable and the gripping elements can be actuated in any angular position of the gripper. |
| US12300976B2 |
Wind pressure type shutter for outdoor switchboard
A wind pressure type shutter includes first and second rotation shafts, and first and second flaps. The first flap rotatably hung on the first rotation shaft closes a flow path in a vertical position and opens the flow path in a position rotated from the vertical position. The second flap rotatably attached to the second rotation shaft closes the flow path and prevents the rotation of the first flap by an upstream-side end portion of the second flap in a horizontal position, and opens the flow path in a position rotated from the horizontal position. When a negative pressure is generated downstream of the second flap, the second flap rotates to open the flow path and the upstream-side end portion is disengaged from the first flap, so that the first flap rotates toward a downstream side to open the flow path. |
| US12300973B2 |
Integrated photonic device and photonic integrated circuit using the same
An integrated photonic device having an array of two or more semiconductor optical amplifiers includes a first semiconductor optical amplifier, which has a first gain region and a second gain region connected by a first connecting waveguide, and a second semiconductor optical amplifier, which is provided in parallel with the first semiconductor optical amplifier and has a third gain region and a fourth gain region connected by a second connecting waveguide. The first gain region and the second gain region are provided on an outer side of the third gain region and the fourth gain region. The first connecting waveguide is configured to connect the first gain region and the second gain region on the outer side of the second connecting waveguide. |
| US12300972B2 |
Light emitting device
A light emitting device includes: a base having a mounting face including a disposition region, a plurality of first wirings, and a plurality of second wirings; a plurality of light emitting elements, including one or more first light emitting elements, one or more second light emitting elements, and one or more third light emitting elements, disposed in two rows and N columns (N≥2) in the disposition region; one or more relay members, including one or more first relay members disposed in the region between the two rows of the light emitting elements; a plurality of first light emitting element wirings for electrically serially connecting the one or more first light emitting elements; a plurality of second light emitting element wirings for electrically serially connecting the one or more second light emitting elements; and a plurality of third light emitting element wirings for electrically serially connecting the one or more third light emitting elements. The first light emitting element wirings include wirings that are connected with the one or more first relay members. |
| US12300970B2 |
Digital camera with VCSELs
An apparatus is provided to receive a three dimensional (3D) map of at least a part of a body of a user. A light emitting device is included with tunable VCSEL laser with one or more active regions having quantum wells and barriers. The active regions are surrounded by one or more p-n junctions. The one or more active regions can include a selected shape structure. One or more tunnel junctions (TJ) 2 are provided. One or more apertures are provided with the selected shape structure. One or more buried tunnel junctions (BTJ) or oxide confine the apertures, additional TJ's, planar structures and or additional BTJ's created during a regrowth process that is independent of a first growth process. A VCSEL output is determined in response to an application of the VCSEL laser. The VCSEL laser includes an HCG grating and a bottom DBR. A user monitoring device includes the VCSEL laser. A camera has an interior including the VCSEL An image sensor is coupled to the camera and has a plurality of sensor pixels for capturing a digital image. An imaging lens for forming an image of a scene onto an image plane, the imaging lens having an imaging lens aperture. |
| US12300967B2 |
Method and system for controlling laser modulation
Systems and methods for controlling laser modulation in burst communications. In a start-up phase, a drive circuitry sequentially applies first and second drive currents to a laser diode such that it produces a first and second optical output, respectively. A compensating current source coupled to the laser diode provides a current related to the first and second drive currents to maintain a combined current flowing through an impedance connected to the laser diode at a substantially constant level during the start-up phase. An optical sensor measures the first and second optical outputs, and a controller uses values of the first and second drive currents, the outputs from the optical sensor, and at least one supplied input value to provide control values for the drive circuitry for controlling operating current of the laser diode during a subsequent operating phase, wherein information is transmitted in at least one burst. |
| US12300962B2 |
Laser device and electronic device manufacturing method
A laser device includes a first actuator configured to adjust an oscillation wavelength of pulse laser light; a second actuator configured to adjust a spectral line width of the pulse laser light; and a processor configured to determine a target spectral line width by reading data specifying a number of irradiation pulses of the pulse laser light with which one location of an irradiation receiving object is irradiated and a difference between a shortest wavelength and a longest wavelength, control the second actuator based on the target spectral line width, and control the first actuator so that the oscillation wavelength periodically changes every number of the irradiation pulses between the shortest wavelength and the longest wavelength. |
| US12300958B2 |
Irrigation controller with vertically offset terminal connectors rows
An irrigation control device is provided that includes adjacent terminal connector rows having a ridge portion between the rows, where the ridge portion is configured to support and guide wires to the terminal connectors of one row, and to support these wires above wires retained in another row of terminal connectors. In some embodiments, one of the terminal connector rows includes a plurality of risers coupled to the terminal connectors positioned in that row. The risers provide a vertical offset between the adjacent terminal connector rows, as well as a secure electrical and mechanical connection point for the wires to connect to the circuit board directly, or alternatively to the corresponding electrical pads coupled to the circuit board. The housing may include divider walls that each provide an additional barrier or isolation between side-by-side electrical connection pads, terminal connectors and their associated wires. |
| US12300953B2 |
Spring loaded ground clamp
A grounding clamp uses a spring driving a piston mounted movable jaw as a safety lockout. The movable jaw and a fixed jaw, which may include teeth, form a conductor clamp. The ground clamp mounts on the end of a hot stick to provide for electrically insulated remote operation of the ground clamp by a lineman holding the hot stick and pulling on, or releasing, a lever arm on the hot stick. The system provides increased safety for the lineman as the spring providing the spring loading of the clamp has a high spring force to overcome, thus providing the lockout. The lever arm on the hot stick tool provides mechanical advantage to overcome the spring force and thus release the lockout. The lineman cannot usefully operate the ground clamp manually without the hot stick due to spring force lockout. |
| US12300951B2 |
Wire clip electrical connector
A wire clip electrical connector, comprising a connector body, an elastic clip piece and an elastic conductive piece disposed in the connector body, and a push rod slidingly matched with the connector body. A wire insertion hole is formed in the connector body, and an elastic clip piece and an elastic conductive piece are located on two sides of the wire insertion hole, and the push rod is provided with a spring piece pressing structure and a stopping structure. According to the above design, the wire is inserted into the wire insertion hole, and the push rod slides relative to the connector body, and the elastic pressing structure on the elastic bar acts on the wire elastic piece, and the wire elastic piece presses the wire on the elastic conductive piece, and the stopping structure restricts the decoupling to achieve a stable connection between the electrical connector and the wire. |
| US12300945B2 |
Separable loadbreak design with enhanced ratings
A new and improved separable loadbreak connector system capable of providing higher switching and fault close ratings by various means of dividing the arc energy within the connector system. |
| US12300938B2 |
Connector and electronic apparatus
A connector (1) includes: a first connector (10) including a first contact (30a) attached to a first insulator (20); a second connector (50) including a second contact (70a) attached to a second insulator (60); and a shield member attached to the first insulator (20) and the second insulator (60). The shield member includes a first base portion (41), and a first extending portion (42) that extends from the first base portion (41) along a fitting direction and that is disposed on each of two sides in a first direction with respect to a contact part between the first contact (30a) and the second contact (70a) in a fitted state, the first direction being perpendicular to the fitting direction. |
| US12300937B2 |
High speed electrical connector
A connector for use with high-speed signals. The connector may include a row of conductive elements comprising signal conductors and ground conductors. A signal conductor may include a mating end, a mounting end opposite the mating end, and an intermediate portion extending therebetween. A ground conductor may include a shell at least partially encircling intermediate portions of a group of signal conductors, with openings that expose contact surfaces of the signal conductors at the ends. The ground conductors may include contact members aligned with the mating contact surfaces of the signal conductors. Each shell may be coupled to a ground mounting location on each side of a respective group of signal conductors, with adjacent shells sharing a ground mounting location. Such a configuration may meet signal integrity requirements in connectors designed for 64 Gbps and beyond, while conforming to a standard that constrains mating and mounting interfaces. |
| US12300936B2 |
High speed connector
An interconnection system with lossy material of a first connector adjacent a ground conductor of a second connector. The lossy material may damp resonances at a mating interface of the first and second connectors. In some embodiments, the lossy material may be attached to a ground conductor of the first connector. In some embodiments, the lossy material may be shaped as horns that extend along a cavity configured to receive a ground conductor of a mating connector. |
| US12300935B2 |
Fool-proofing device, electrical connection assembly comprising said improved fool-proofing device and associated assembly method
An improved poka-yoke device for an electrical connection assembly having a first part (3) and a second part (4) which can be removably coupled via a mechanical link along a main axis (X). The first part (3) having a first poka-yoke member (31) and the second part (4) having a second poka-yoke member (41). The first part (3) having interlocking securing devices for interlockingly securing the first connector (1) to the panel (P) that accommodates it. The second part (4) having first interlocking fixing device that are arranged so as to fix the second part (4) to the second connector (2), The first part (3) and the second part (4) each having second complementary mechanical fixing devices that are intended to interact with one another by interlocking when the first connector (1) and the second connector (2) are coupled. |
| US12300931B2 |
Dual in-line memory module (DIMM) socket that prevents improper DIMM release
An apparatus is described. The apparatus includes a dual-in line memory module (DIMM) socket having a first latch and a second latch. One of the first latch and the second latch having a feature for a user to apply force to release a DIMM from the DIMM socket. The other of the first latch and the second latch not having a feature for the user to apply force so that one end of the DIMM releases before an opposite end of the DIMM during release of the DIMM from the DIMM socket. |
| US12300926B2 |
Nut seal connector assembly
An assembly for a coaxial connector is described. The assembly, in one embodiment, includes a coupler, a grip ring and a seal. |
| US12300922B2 |
Connector with a reinforcing member
A connector includes a housing extending in a predetermined direction intersecting the fitting direction, a plurality of contacts held by the housing and arrayed along the predetermined direction, and a reinforcing member held at an end portion of the housing in the predetermined direction and made of a metal material, the reinforcing member having a first member and a second member, the first member including a first reinforcing portion extending in a U-shape along the end portion of the housing when viewed in the fitting direction, and a connecting portion connected to the first reinforcing portion and electrically connected to a counter reinforcing member of the counter connector, the second member being formed as a separate component from the first member and including a second reinforcing member extending in a U-shape along the first reinforcing portion when viewed in the fitting direction. |
| US12300921B2 |
Male terminal fitting and connector
A male terminal fitting is provided with a base wall extending in a front-rear direction, and a plate-like tab portion extending forward from a front end part of the base wall. The tab portion includes a first wall portion extending forward from the front end part of the base wall, a second wall portion facing the first wall portion, a coupling wall portion coupling side edges on one side, out of both left and right sides, of the first and second wall portions, and a contact wall portion extending from a side edge on the other side, out of the both left and right sides, of the first wall portion toward the second wall portion and abutting on the second wall portion. |
| US12300919B2 |
Connector and connecting method
A connector includes a contact retained in a housing selectively in one of a first posture and a second posture inverted 180 degrees around a fitting direction, the contact including a contact portion to be contacted with a contact of a counter connector and a connection portion to be connected to a flexible conductor of a connection object, between a case where the contact is retained in the housing in the first posture and a case where the contact is retained in the housing in the second posture, the contact portion is situated at a same position with respect to the housing and the connection portion is situated at a different position with respect to the housing, the contact being retained in the housing in, of the first posture and the second posture, a posture corresponding to an orientation of a flexible conductor exposed surface of the connection object. |
| US12300910B2 |
Antenna device
An antenna device disposed on a side frame of a metal case. The antenna device includes a first slot, a dielectric substrate, a feeding metal portion, a ground portion, and a feeding source. The first slot is on the side frame, so that a part of the side frame surrounded by the first slot serves as a radiating metal portion. The dielectric substrate includes a first surface and a second surface and is disposed on the radiating metal portion through the first surface. The feeding metal portion is on the second surface of the dielectric substrate, so that a vertical projection of the feeding metal portion overlaps with the radiating metal portion. The ground portion is on the second surface of the dielectric substrate and connected to the metal case. The feeding source is on the second surface and connected to the feeding metal portion and the ground portion. |
| US12300908B2 |
Multi-band antenna system and base station
This application describes multi-band antenna systems and base stations. An example multi-band antenna system includes: a plurality of radiating element arrays, feeding networks separately corresponding to the plurality of radiating element arrays, at least one layer of a frequency selective surface (FSS), and a reflection panel. The plurality of radiating element arrays are located above the reflection panel. All or some of the plurality of radiating element arrays are stacked. The at least one layer of the FSS is located between the stacked radiating element arrays. A feeding network corresponding to at least one radiating element array in the stacked radiating element arrays is electrically connected to the at least one layer of the FSS, or the feeding network corresponding to the at least one radiating element array is integrated on the at least one layer of the FSS. |
| US12300904B2 |
Liquid crystal metasurface antenna apparatus and communication apparatus
This application provides a liquid crystal metasurface antenna apparatus and a communication apparatus. The liquid crystal metasurface antenna apparatus includes a liquid crystal metasurface reflection plate and a feed source, where the liquid crystal metasurface reflection plate includes a plurality of liquid crystal antenna units; the liquid crystal antenna unit at least includes a plurality of oscillators and two layers of dielectric plates; the plurality of oscillators are disposed between the two layers of dielectric plates; the plurality of oscillators include a horizontal oscillator pair and/or a vertical oscillator pair; and each oscillator includes a left arm, a right arm, and a capacitor, the left arm and the right arm are connected through the capacitor, and a liquid crystal material is filled in a space enclosed by the left arm, the right arm, and the capacitor. |
| US12300902B2 |
Widely scalable, modular phase control of optical channels
A plurality of digital processors may be used to adjust phases in a plurality of phase modulators. The plurality of digital processors may receive a periodic pulse, or heartbeat signal, from a synchronization controller in order to control the digital processors. The synchronization controller may output an additional signal used to determine and to control the phase of the signals output from the plurality of phase modulators. |
| US12300897B2 |
Antenna arrangement having unequally many physical antenna elements for transmission and reception
There is provided an antenna arrangement having unequally many physical antenna elements for transmission and reception. The antenna arrangement comprises physical antenna elements. All physical antenna elements are configured for signal reception but less than all of the physical antenna elements are configured for both signal transmission and signal reception. A first portion of those physical antenna elements configured for both signal transmission and signal reception and a second portion of those physical antenna elements configured for both signal transmission and signal reception are in the antenna arrangement placed to, during operation of the antenna arrangement, be vertically separated by physical antenna elements configured for only signal reception. |
| US12300894B2 |
Planar tightly coupled arrays and antenna elements thereof
Ultra-wideband (UWB) arrays that are fully planar are provided. Fully-planar inverted-L element (FILE) arrays that are tightly coupled arrays (TCAs) can realize UWB tightly coupled apertures in the W and higher millimeter wave (mmWave) bands. The unit cell architecture of the FILE array, (which can have any desired size, can be comprised of an inverted-L shaped antenna and a capacitively coupled via-fence. |
| US12300892B2 |
Integrated structure, two radar modular assembly (RMA) stackable radar
A radar array assembly is provided, comprising a first chassis and a first vertical stiffener. The first chassis is configured to house a first set of array electronics and a second set of array electronics. The first vertical stiffener is disposed within and operably coupled to the first chassis to enable the first chassis to be resistant to buckling and to define a first cavity in which the first set of array electronics is disposed and a second cavity in which the second set of array electronics is disposed, wherein the first vertical stiffener is configured to be embedded within the first set of array electronics and the second set of array electronics, wherein the first vertical stiffener comprises a first integrated cooling manifold configured to cool both the first set of array electronics and the second set of array electronics. |
| US12300890B2 |
High-gain, hemi-spherical coverage, multi-sided flattened Luneburg lens antenna
A multiple flat sided modified Luneburg Lens antenna to provide a broadband and hemi-spherical coverage. The Modified Luneburg Lens antenna has a flat surface at the bottom and quadrilateral/hexagonal/octagonal/decagon/dodecagon flat surfaces at the sides (e.g., “cupcake shaped”) to manipulate the signal directivity of a radio frequency transmission or reception of interest in a plurality of octaves of bandwidth. The antenna may be configured with a Planar Ultra-Wideband Modular Array (PUMA) Antenna array structure with a broadband anti-reflective layer added between the two devices. The anti-reflective layer marries the two devices (lens and PUMA) and creates a broadband impedance matching between the new modified Luneburg lens antenna and dipoles of the PUMA array while maintaining the capability of the system to transmit and receive signals in a plurality of octaves of bandwidth. |
| US12300887B2 |
Reflector antennas and related methods
Reflector antennas and related methods are disclosed. An example antenna includes a base; a first rib and a second rib, the first rib and the second rib moveable relative to the base; a reflective material carried by the first rib and the second rib, the first rib, the second rib, and the reflective material to define a reflector portion of the antenna; and a gold-plated clip to couple a portion of the reflective material to the first rib. |
| US12300885B2 |
Small cell base station integrated with storefront sign
An assembly includes: a housing comprising a floor, a ceiling, a rear wall, a front wall, and opposed side walls that define a cavity, wherein the side walls include illuminable informational markings; an antenna; a radio residing in the cavity of the housing connected with the antenna; and a power source attached to the radio; wherein the power source is employed to illuminate the informational markings. |
| US12300883B2 |
Electronic device including multiband antenna
An electronic device is provided. The electronic device includes an outer housing that comprises a first surface facing a first direction, a second surface facing a second direction opposite to the first direction, and a side surface surrounding a space between the first surface and the second surface, a display adapted to expose at least a portion of the display through the first surface of the outer housing, a PCB arranged between the second surface and the display in an interior of the outer housing, a communication circuit arranged on or over the PCB, a first conductive structure formed of at least one of the first surface or at least a portion of the side surface is electrically connected to the communication circuit, and a second conductive structure formed of the portion of the display electrically connected to the first conductive structure. |
| US12300881B2 |
Radar device
A radar device comprises an antenna portion, a radome, and a housing. The antenna portion includes an antenna surface provided with one or more antennas, the antenna emitting a radio wave. The radome is made of a material allowing passage of the radio wave emitted by the antenna portion, and is disposed to face the antenna surface. The housing forms, together with the radome, a space for accommodating the antenna portion. The housing includes a peripheral edge which surrounds the antenna surface and is in contact with the radome, at least part of the peripheral edge includes a barrier part which protrudes outward from the radome along the antenna surface. |
| US12300878B2 |
Slot antenna in a wearable device
Methods, systems, and devices for operating a wearable device are described. A wearable device may include one or more slot antennas configured to transmit and receive electromagnetic fields for wireless communications. |
| US12300873B2 |
Antenna modules employing a package substrate with a vertically-integrated patch antenna(s), and related fabrication methods
Antenna modules employing a package substrate with a vertically-integrated patch antenna(s), and related fabrication methods. The antenna module includes a radio-frequency (RF) IC (RFIC) package that includes one or more RFICs for supporting RF communications and a package substrate that includes one or more metallization layers with formed metal interconnects for routing of signals between the RFICs and an antenna(s) in the package substrate. The package substrate includes one or more patch antennas that are planar-shaped and vertically integrated in a plurality of metallization layers in the package substrate, behaving electromagnetically as a patch antenna. In this manner, the patch antenna(s) can be formed as a vertically-integrated structure in the package substrate with fabrication methods used for fabricating metal interconnects and vias (e.g., a micro via fabrication process) in package substrates. |
| US12300872B2 |
Signal boosting antenna-isolation adapter
A system includes an isolation board. An insulator is configured to encapsulate the isolation board. The isolation board is tuned to deliver maximum power from a radio and present a fifty-ohm load to the radio. The isolation board is set at a distance from an antenna to protect a coaxial cable from reflected power from the antenna. The antenna is positioned next to the isolation board, wherein the antenna receives the maximum power delivered from the isolation board. |
| US12300871B2 |
Antenna mounting system
An antenna mounting system that includes abase member, a plurality of spaced retaining attachment section and retaining members is provided. The base member has a central passage that is configured to receive an antenna shaft. The plurality of spaced retaining attachment sections are coupled to the base member. A retaining member is coupled to each retaining attachment section. Each retaining member has an engagement portion that is configured to engage an upper surface of a ceiling and a biasing portion that is configured to provide a bias force on the engagement portion to engage the upper surface of the ceiling. |
| US12300869B2 |
Directional coupler comprising a first linear conductor coupled to a second winding conductor, such that the first conductor has a length less than one-quarter wavelength
A signal coupling system may include a directional coupler that includes a first conductor and a second conductor. The first conductor may include a first end and a second end and may be generally arranged along a first plane. The second conductor may include a third end and a fourth end and may generally be arranged as a plurality of windings along a second plane. The signal coupling system may also include a transceiver, electrically conductively conducted to the first end; and an antenna, electrically conductively conducted to the second end. The second conductor may be configured to generate a coupling with the first conductor when the first conductor conducts an electric signal, such that the coupler conducts a first electrical signal from the first end to the second end at a second power, and conducts the electrical signal via the coupling to the third end at a third power. |
| US12300868B2 |
Hot HF component with HF cavity
A hot HF component equipped with an HF cavity which is delimited by a jacket includes at least one internal protrusion, the jacket comprising at least one internal canal following the contour of its internal surface to allow the flow of a heat transport fluid intended to remove heat energy originating from the cavity. |
| US12300867B2 |
Dielectric filter
Disclosed is a dielectric filter. The dielectric filter includes a body; at least one dual mode resonant unit and at least one single mode resonant unit arranged in the body; and a groove structure formed in the body and configured to partially separate the at least one single mode resonant unit and the at least one dual mode resonant unit adjacent thereto. Each dual mode resonant unit at least has a first frequency resonant hole and a second frequency resonant hole. Each single mode resonant unit has a third frequency resonant hole. The first frequency resonant hole has a first longitudinal extension line perpendicular to a second longitudinal extension line of the second frequency resonant hole. The third frequency resonant hole has a third longitudinal extension line parallel to the first longitudinal extension line. |
| US12300862B2 |
Batch systems and methods for hydrogen gas extraction from a liquid hydrogen carrier
A system for extracting hydrogen gas from a liquid hydrogen carrier may include a hydrogen gas reactor, a catalyst for facilitating extraction of the hydrogen gas from the liquid hydrogen carrier, and a reservoir for containing the liquid hydrogen carrier and a spend liquid hydrogen carrier. The system may be configured to regulate a flow of liquid hydrogen carrier in and out of the hydrogen gas reactor, to move a catalyst relative to a volume of the liquid hydrogen carrier, and to provide a continuous flow of the hydrogen gas, in response to a demand for the hydrogen gas. |
| US12300860B2 |
Separator unit for fuel cell and unit cell for fuel cell including same
A separator unit for a fuel cell includes a separator including a reaction region, a plurality of manifolds formed on each side of the reaction region, and a reaction surface and a cooling surface formed on each surface thereof, a reaction surface internal gasket forming a reaction surface internal airtight line, and a reaction surface external gasket forming a reaction surface external airtight line, wherein at least one cut portion formed by removing the reaction surface external gasket is formed in the reaction surface external airtight line surrounding at least one of the plurality of manifolds. |
| US12300859B2 |
Energy storage device
A method comprising providing a first electrode layer on a first portion of a substrate, providing an electrolyte layer on the first electrode layer, and providing a second electrode layer on the electrolyte layer. At least part of a current collector layer is provided on a second portion of the substrate. An electrically insulating material is deposited on an exposed surface of the first electrode layer and an exposed surface of the electrolyte layer. An electrically conductive material is deposited on the electrically insulating material to connect the second electrode layer to the at least part of the current collector layer. |
| US12300856B2 |
Terminal, secondary battery including same, and manufacturing method thereof
According to the present disclosure, a terminal with improved conduction reliability is provided. The terminal disclosed herein includes a first conductive member that has a plate shape, a second conductive member electrically connected to the first conductive member, and a first fastening portion and a second fastening portion that mechanically fix the first conductive member and a flange portion of the second conductive member. The second fastening portion is provided further toward a center side of the flange portion than the first fastening portion when seen in a plan view. |
| US12300855B2 |
Battery cell, battery, electric apparatus, and manufacturing method and system of battery cell
Embodiments provide a battery cell, a battery, an electric apparatus, and a manufacturing method and system of battery cell. In some embodiments, the battery cell includes a housing, an electrode assembly, and an end cover assembly. The housing provides an opening. The electrode assembly is disposed in the housing. The electrode assembly includes a body portion, a tab, and an isolation portion. The tab extends from an end of the body portion to the opening. The isolation portion is disposed on a periphery of the tab. The end cover assembly is configured to cover the opening. The end cover assembly includes an end cover and a first insulator. The end cover is configured to cover the opening and is connected to the housing. The first insulator is disposed on a side of the end cover proximate to an inside of the housing. The first insulator has a concave portion. |
| US12300854B1 |
Overmolded current collector assembly
A current collector assembly (CCA) with an insulative structure is provided. A battery system can include the current collector assembly formed from the insulative structure. The current collector assembly can include a conductor layer at least partially encapsulated by the insulative structure. The current collector assembly can include a conductor array cut from the conductor layer. A first portion of the conductor array can contact a positive terminal of a first group of battery cells, and a second portion of the conductor array can contact a negative terminal of a second group of battery cells. The rib can be formed from the insulative structure of the current collector assembly. |
| US12300852B2 |
Battery separator, battery including the separator, and method and system for forming same
Microporous sheet product suitable for use as a battery separator and method of forming the same. According to one embodiment, the method involves forming an extrusion mixture of one or more thermoplastic polymers and a fluid having a high vapor pressure. Next, the mixture is extruded through a die head, cooled and shaped in a first vapor zone under an above-UEL condition to form a solid sheet material. Next, the sheet material is subjected to a two-step process in a second vapor zone under a below-LEL condition, the first step involving a first stretching/fluid vaporization at a higher temperature, the second step involving a second stretching/fluid vaporization at a lower temperature. The resultant sheet is then annealed, and the remainder of fluid is removed to form a sheet product having a thickness characterized by a structure of smaller and larger pore strata across its thickness. |
| US12300850B2 |
Separator, secondary battery comprising same and related battery module, battery pack and device
The present application relates to a separator, comprising a substrate and a coating formed on at least one surface of the substrate, wherein the coating comprises inorganic particles and first organic particles embedded in the inorganic particles and forming protrusions on the surface of the coating, and the first organic particles have a primary particle morphology and a number-average particle size of ≥2 μm. The present application also relates to a secondary battery comprising the separator, a device comprising the secondary battery and a method for preparing the separator. |
| US12300846B2 |
Pressure relief mechanism, battery box, battery cell, battery, preparation method and apparatus
The present application discloses a pressure relief mechanism, a battery cell and a battery. The pressure relief mechanism includes: a connecting mechanism including an aperture and a first boss, the first boss being connected to an inner wall of the aperture and extending toward an axis of the aperture; a pressure relief sheet for being actuated to release an internal pressure of the battery box when the internal pressure reaches a threshold and being arranged on a side of the first boss; a first protective sheet used to protect the pressure relief sheet and arranged on the other side of the first boss away from the pressure relief sheet; a compression ring arranged on a side of the first protective sheet away from the first boss; and a pressing structure connected to the connecting mechanism and being capable of being pressed toward the axis of the aperture. |
| US12300839B2 |
Battery pack with housing for electric powersport vehicles
One example provides a chassis for an electric snowmobile including a battery pack. The battery pack includes a battery pack housing defining an enclosure for housing a number of battery modules for powering an electric motor of the electric snowmobile, the battery pack housing having a length extending in a longitudinal direction of the snowmobile, the battery pack housing including a bottom surface. A pair of opposing side panels extends downwardly from and along at least a portion of the length of the battery pack housing, the opposing panels and at least portions of the bottom surface of the battery pack housing together forming a rear structure extending in the longitudinal direction of the electric snowmobile. |
| US12300834B2 |
Wearable mobile electronic system
A mobile electronic system including a left battery section coupled with a left flexible section, a right battery section coupled with a right flexible section, an electronic section coupled with the left flexible section opposite the left battery section, and coupled with the right flexible section opposite the right battery section. The mobile electronic system further including a circuit board located within the electronic section, a first battery located within the left battery section, and a left electrical wire assembly located within the left flexible section. The left electrical wire assembly electrically connecting the first battery with the circuit board. The right and left flexible sections comprise a flexible material operable to retain a flexed position. |
| US12300833B2 |
Battery pack
A battery pack (2; 402; 602) includes an outer case (12; 412; 612), which comprises an upper-part case (14; 414) and a lower-part case (15; 415) fixed to the upper-part case (14; 414), and a cell case (80; 480; 780; 980), which is housed in the outer case (12; 412; 612). An engaging part (30) is provided on one of the upper-part case (14; 414) and the cell case (80; 480; 780; 980). An engaged part (110), with which the engaging part (30) engages, is provided on or in the other of the upper-part case (14; 414) and the cell case (80; 480; 780; 980). |
| US12300831B2 |
Bracket, battery assembly, electric apparatus, and preparation method and device of battery assembly
The present application provides a bracket, a battery assembly, an electric apparatus, and a preparation method and device of the battery assembly, and relates to the field of batteries. The bracket is configured to be connected to a battery and an electric apparatus body; the battery includes a first connector for outputting electric energy; and the bracket includes a bracket body and a second connector. The bracket body is configured to fix the battery. The second connector is mounted on the bracket body; and a connecting end of the second connector faces towards a gravity direction, so that the first connector can be butted with the second connector along the opposite direction of the gravity direction, thereby realizing electric connection between the first connector and the second connector. Such a structure will not damage the first connector and/or the second connector due to the gravity of the battery. |
| US12300830B2 |
Frame structural part and battery housing with a frame structure composed of such frame structural parts
A frame structure part for forming a frame structure for a battery housing of an electric motor vehicle with at least two hollow chamber profiles, which are connected to one another at an angle and each have at least two chambers and a mounting surface extending in the x-y plane and located on the upper side of the profiles in a common plane. A sealing fillet following the longitudinal extension of the profiles is introduced into the mounting surface for receiving a seal, wherein the ends of both profiles are mitered in a first profile section extending from the mounting surface over the entire extension of the uppermost chamber in the z-direction, and the miter joints are connected to one another, so that the joint-end mouths of the fillets of the two profiles adjoin one another. The first profile, in a second profile section located in the z-direction below the first profile section adjoining the same, bears with its end face against a side face of the second profile and is connected thereto. Also described is a battery housing with a frame structure having a plurality of such frame structure parts. |
| US12300827B2 |
Solid-state battery
A battery that includes a substrate, a solid-state battery on the substrate, and a circuit for the solid-state battery on the substrate. |
| US12300826B2 |
Power storage device packaging material, method for producing the same, and power storage device
A power storage device packaging material including a heat-sealable resin layer containing polypropylene and polyethylene, in which whitening and a decrease in the insulation properties due to molding are prevented. A laminate with at least a base material layer, a barrier layer, and a heat-sealable resin layer in this order from an outer side toward an inner side, wherein the heat-sealable resin layer contains polypropylene and polyethylene; a cross section of the heat-sealable resin layer in a thickness direction parallel to TD, a sea-island structure is observed in a cross-sectional image obtained with scanning electron microscope; the cross-sectional image is such that when the total thickness of a layer positioned closer to inner side than the barrier layer is taken as 100%, the cross-sectional image is obtained within a range of thicknesses of up to 12.5% from a surface opposite to the barrier layer side of the heat-sealable resin layer. |
| US12300822B2 |
Cathode stabilization method using electrochemical oxidative additives in aqueous alkali-ion batteries
The present invention is directed to aqueous solid state electrolytes that comprises an oxidative additive to stabilize the interface between the cathode and aqueous electrolyte. The present invention is also directed to methods of making the solid state electrolyte materials and methods of using the solid state electrolyte materials in batteries and other electrochemical technologies. |
| US12300821B2 |
Anode binder for lithium rechargeable battery, anode binder including cured compound of the same anode binder
There is provided an anode binder materials that can be converted into an anode binder having heat resistance, chemical resistance, excellent binding force and durability, and the like, as prerequisites for improving the performances of lithium rechargeable batteries, wherein the anode binder material comprises a vulcanization accelerator comprising a metal-organic framework (MOF); a styrene-butadiene-based copolymer; and sulfur molecule (S8). |
| US12300817B2 |
Anode for lithium secondary battery and lithium secondary battery including the same
An anode for a lithium secondary battery according to exemplary embodiments may include an anode current collector and an active material layer formed on at least one surface of the anode current collector and having a value of pore resistance to density within a predetermined range. Accordingly, it is possible to secure both high-capacity characteristics and high speed charging stability, thus to further improve capacity and efficiency of the lithium secondary battery. |
| US12300815B2 |
Positive electrode active material for nonaqueous electrolyte secondary batteries, and nonaqueous electrolyte secondary battery
This positive electrode active material for nonaqueous electrolyte secondary batteries is a positive electrode active material that comprises a lithium transition metal composite oxide containing at least 80 mol % Ni with reference to the total number of moles of metal elements excluding Li, and that has B present on the particle surface of at least this composite oxide. Assuming that a particle having a particle diameter larger than the 70% volume-based particle diameter (D70) is denoted as a first particle and a particle having a particle diameter smaller than the 30% volume-based particle diameter (D30) is denoted as a second particle, the mole fraction of B, with reference to the total number of moles of metal elements excluding Li, in the first particle is larger than the mole fraction of B, with reference to the total number of moles of metal elements excluding Li, in the second particle. |
| US12300814B2 |
Lithium ion secondary battery
This application relates to a lithium ion secondary battery comprising a battery core and an electrolyte, wherein the battery core comprises a lithium-manganese-based positive electrode active material; the electrolyte comprises a solvent, a lithium salt and an additive comprising vinylene carbonate; and wherein the weight percentage q of the electrolyte based on the total weight of the positive electrode active material layer in the battery core, the weight percentage r of vinylene carbonate present in the electrolyte, the compaction density s of the negative electrode active material layer in the battery core and the weight percentage p of manganese element present in the positive electrode active material satisfies 0.05≤q·r·s/p≤6, wherein the units of q, r, and p are wt %, and the unit of s is g/cm3. The lithium ion secondary battery in this application has relatively high safety performance, cycle performance and storage performance. |
| US12300809B2 |
Nickel metal hydride secondary battery
A nickel metal hydride secondary battery comprises an outer can and an electrode assembly housed in the outer can together with an alkaline electrolytic solution, wherein the electrode assembly is such that a positive electrode including a positive electrode mixture and a negative electrode including a negative electrode mixture are superimposed with a separator interposed therebetween, the positive electrode mixture includes nickel hydroxide forming a solid solution with zinc as a positive electrode active material and zinc oxide as a positive electrode additive, the negative electrode mixture includes hydrogen absorbing alloy particles and a negative electrode additive, the negative electrode additive is a composite in which yttrium fluoride is supported on carbon black, and a surface of the hydrogen absorbing alloy particles is partially coated with the composite. |
| US12300807B2 |
Positive active material for rechargeable lithium battery, preparing method thereof and rechargeable lithium battery including the same
Disclosed are a positive active material for a rechargeable lithium battery, a method of preparing the same, and a rechargeable lithium battery including the same. The positive active material includes a first positive active material in a form of secondary particles including a plurality of primary particles that are aggregated together, and a second positive active material having a single crystal form, wherein both of the first positive active material and the second positive active material are nickel-based positive active materials, each of the first positive active material and the second positive active material is coated with cobalt, and a maximum roughness of a surface of the second positive active material is greater than or equal to about 15 nm. |
| US12300805B2 |
Compositions and methods for energy storage devices including salts and/or foams
An energy storage device can include a cathode, an anode, and a separator between the cathode and the anode. At least one of the electrodes can include an electrode film prepared by a dry process. The electrode film, the electrode and/or the separator can comprise a salt, improved porosity, increased density, be prelithiated, and/or a foam. An energy storage device can include a dry composite solid polymer electrolyte (SPE) film. Process and apparatuses used for fabricating the composite solid polymer electrolyte film, electrode and/or electrode film are also described. |
| US12300800B2 |
Method for producing negative electrode
Provided is a new method for producing a negative electrode, which is capable of enhancing compressibility of a negative electrode active material layer. A method for producing a negative electrode disclosed herein includes: applying slurry including a negative electrode active material, a first binder, a second binder, water, and dimethyl sulfoxide, onto a negative electrode current collector; and drying the applied slurry to form a negative electrode active material layer. The first binder is at least one of carboxymethyl cellulose and a metal salt of carboxymethyl cellulose. The second binder is at least one of styrene-butadiene rubber and a derivative of styrene-butadiene rubber. An amount of the dimethyl sulfoxide is 2.5 mass % or more and 10.0 mass % or less with respect to the negative electrode active material. |
| US12300798B2 |
Multilayer sheet for preventing thermal runaway
A thermally insulating multilayer sheet includes a compressible layer, and a thermal insulation layer, a flame retardant layer, or a combination thereof disposed on the compressible layer. |
| US12300797B2 |
Battery module, method for manufacturing the same and battery pack
A battery module according to one embodiment of the present disclosure includes: a battery cell stack in which a plurality of battery cells are stacked, a first frame member that houses the battery cell stack and has an open upper part, a second frame member that covers the battery cell stack at the open upper part of the first frame member, and a thermally conductive resin layer that is located between the first frame member and the battery cell stack, wherein the thermally conductive resin layer includes a plurality of coating lines each extending in a direction in which the plurality of battery cells are stacked. |
| US12300794B2 |
Electric power charge and discharge system
An electric power charge and discharge system for an electronic device having a battery, by which the electronic device can be used for a long period of time. In a wireless communication device including a wireless driving portion including a first battery and a wireless charging portion including a second battery, the first battery is charged by electric power from a fixed power supply and the second battery is charged by using electromagnetic waves existing in an external space. Further, the first battery and the second battery are discharged alternately, and during a period in which the first battery is discharged, the second battery is charged. |
| US12300793B1 |
1.5V lithium battery and manufacturing method thereof
The present application relates to a 1.5V lithium battery and a manufacturing method thereof; the 1.5V lithium battery includes a circuit assembly, a plastic middle frame, a wound battery core assembly, a metal housing and an insulating sheath, wherein the circuit assembly, the plastic middle frame and the wound battery core assembly are sequentially arranged in the metal housing from top to bottom; a rolling groove is inwardly provided in an upper portion of the metal housing, a spun edge is inwardly provided at a top of the metal housing, the wound battery core assembly is limited at a bottom of the metal housing by the rolling groove, the plastic middle frame is limited between the rolling groove and the spun edge to realize sealing between the plastic middle frame and the metal housing, and the circuit assembly is arranged on the plastic middle frame. |
| US12300792B2 |
Battery module having improved assemblability and battery pack including the same
A battery module includes: a cell assembly including a plurality of battery cells and a cell housing in which the plurality of battery cells are accommodated; and a battery management system (BMS) assembly including a BMS circuit board, a BMS cover accommodating the BMS circuit board, and at least one temperature sensor module connected to the BMS circuit board and fixedly mounted on a rear surface of the BMS cover, the BMS assembly being mountably and detachably provided on a side surface of the cell housing, and the temperature sensor module contacts one of the plurality of battery cells. |
| US12300790B2 |
All-solid-state battery with improved lifetime by applying expansion layer and operating method thereof
The present disclosure relates to an all-solid-state battery with improved lifetime and an operating method thereof. Specifically, the all-solid-state battery includes a laminate including a unit cell provided with an anode, a cathode, and a solid electrolyte layer interposed between the anode and the cathode, and an expansion layer positioned on at least one surface of the laminate, and expanded by at least any one change in voltage and temperature. |
| US12300788B2 |
Pressing jig comprising magnet and battery module comprising the same
The present invention discloses a pressing jig for pressing a battery cell, and a battery module including a module case in which a plurality of battery cells are included while installed in the pressing jig, wherein the pressing jig includes a presser including a plurality of pressing plates provided on outermost portions of a plurality of battery cells and among them and separating a space for receiving a plurality of battery cells, and performing pressing on a plurality of battery cells, and pressing frames connecting the pressing plates on upper portions and lower portions of the pressing plates, wherein all the pressing plates or the pressing plates excluding one pressing plate provided on an outermost portion on one side may move in a horizontal direction as the pressing direction, while connected to the pressing frames. |
| US12300787B2 |
Electrolyte and electrochemical device including the same
An electrolyte includes a fluorinated cyclic carbonate, and a multi-nitrilemulti-nitrile compound having an ether bond. Based on a total weight of the electrolyte, a weight percentage (Cf) of the fluorinated cyclic carbonate is greater than a weight percentage (Cn) of the multi-nitrilemulti-nitrile compound having an ether bond, and about 3 |
| US12300786B1 |
Electrolyte including electrolyte solvent, fluoroether, and bis(fluorosulfonyl) imide salt, and lithium metal electrochemical cells including the same
Systems, devices, and methods described herein relate to electrolyte formulations and the incorporation thereof into batteries. In some aspects, an electrolyte composition can comprise between about 10 wt % and about 42 wt % of an electrolyte solvent, between about 13 wt % and about 59 wt % of a fluoroether. In some embodiments, the electrolyte solvent can make up between about 26 wt % and about 39 wt % of the composition. In some embodiments, the fluoroether can make up between about 18 wt % and about 36 wt % of the composition. In some embodiments, the composition can include between about 0.5 wt % and about 1.5 wt % of a first additive. In some embodiments, the composition can include between about 0.5 wt % and about 5 wt % of a second additive. |
| US12300784B2 |
Lithium ion secondary battery
A lithium ion secondary battery includes a positive electrode, a negative electrode, and an electrolyte disposed between the positive electrode and the negative electrode. The electrolyte includes a polymeric electrolyte. The polymeric electrolyte is composed of a polymer and a lithium salt of a fluorosulfonyl-group-containing compound, and the polymer is a polymer of a vinylene carbonate species. The lithium salt of a fluorosulfonyl-group-containing compound includes lithium bis(fluorosulfonyl)imide. |
| US12300782B2 |
Solid state batteries, SSE batteries, lithium metal batteries with solid state electrolytes, HSSE, separators, and/or coatings, and/or related methods
The problems or issues faced by typical larger SSE batteries are solved by providing an interface or interfacial layer at least between the anode, which comprises Li or Na, and the solid state electrolyte (SSE). In some other embodiments, an interfacial layer may be provided between the anode, which comprises Li or Na, and the SSE, and an interface or interfacial layer may also be provided between the cathode and the SSE. In at least selected embodiments, aspects or objects, the interfacial layer may act as a shock absorber between a SSE (e.g., a sulfide glass SSE) and an anode material that is soft compared to the SSE (e.g., Li metal). In other embodiments, the interfacial layer may act as a shock absorber between the SSE and a cathode material that is softer than the SSE. In at least certain embodiments, the interfacial layer may improve ionic conductance between the anode and the SSE and/or the SSE and the cathode. In at least certain selected embodiments, the interfacial layer may prevent or deter lithium deposition and dendrite growth at the interface between the anode and the SSE. Interface defects at the interface between the anode and the SSE may allow lithium deposition and dendrite growth. The dendrites may continue to grow through cracks in the SSE causing a short, which is a safety issue. The inventive interfacial layer between the anode and the SSE may prevent or deter this. In at least some embodiments, the interfacial layer may be a porous polymer layer filled with liquid electrolyte and may improve ionic conductance between the anode and the SSE and/or the SSE and the cathode. In certain embodiments, the anode interface or interfacial layer may be a porous polymer layer filled with liquid electrolyte. In some embodiments, the cathode interface or interfacial layer may be a porous polymer layer filled with liquid, gel or polymer electrolyte. |
| US12300781B2 |
Fluoride ion secondary battery
The present invention provides a fluoride ion secondary battery which has high initial charge/discharge efficiency, while starting with a charged state and having a high voltage. According to the present invention, a composite body is formed using, as negative electrode active materials, nanometer-sized aluminum particles and modified aluminum fluoride together with the other constituents of a negative electrode mixture, said modified aluminum fluoride having voids that are formed by deintercalation of fluoride ions; and a fluoride ion secondary battery is configured by combining a negative electrode, which uses this composite body, with a positive electrode that contains a specific substance as a positive electrode active material. |
| US12300780B2 |
Electrode for power storage device, and power storage device
To enhance lithium ion conductivity in an electrode for a power storage device, and at the interface between the electrode and another member. The power storage device electrode includes an oxide-based lithium ion conductive solid electrolyte, an active material, and an ionic liquid. |
| US12300778B2 |
Positive electrode active material, positive electrode, battery, battery pack, electronic device, electric vehicle, power storage device, and power system
A battery includes a positive electrode including powder of a positive electrode active material; a negative electrode; and an electrolyte. The powder of the positive electrode active material includes particles, which have a grain boundary and in which c axes of two regions sandwiching the grain boundary are in reflective symmetry, and the particles in the powder of the positive electrode active material have a content percentage of 50% or less. |
| US12300775B2 |
Display substrate and method for manufacturing the same, and display apparatus
A display substrate includes a substrate, light-emitting devices disposed on a side of the substrate, a first light dimming layer disposed on the side of the substrate, and a first fixing layer disposed on a side of the light-emitting devices and the first light dimming layer away from the substrate. The light-emitting devices are arranged at intervals from each other and divided into a plurality of groups of light-emitting devices, and each group of light-emitting devices includes at least one light-emitting device. The first light dimming layer includes portions each located between two adjacent groups of light-emitting devices, and a gap exists between a portion of the first light dimming layer and at least one side face of at least one light-emitting device adjacent thereto. A portion of the first fixing layer is located in the gap. The first fixing layer is a light-transmitting film. |
| US12300772B2 |
Light-emitting device, manufacturing method thereof and display module using the same
A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2-150. |
| US12300770B2 |
Flip-chip mounted monolithic micro LED display element including a plurality of light-emitting parts arranged in a matrix
The present invention provides a flip-chip mounted monolithic micro LED having improved contrast. The light-emitting device includes a substrate, an n-type layer, a light-emitting layer, a p-type layer, a transparent electrode, a p-electrode, an n-electrode, a protective film, an absorbing structure, and a side wall insulating film. The absorbing structure is a layered body in which a dielectric film and a metal film are alternately deposited, and the top layer is a dielectric film. Reflected light of light emitted from the light-emitting layer or reflected light of light from the outside, or transmitted light from the backside of the substrate can be absorbed by the absorbing structure, thereby improving contrast. |
| US12300769B2 |
Light emitting element, manufacturing method of same, and display device
A light emitting element includes: a first semiconductor layer and a second semiconductor layer; an active layer between the first semiconductor layer and the second semiconductor layer; an insulating film around side surfaces of at least the active layer; and a wavelength conversion material on at least a portion of the insulating film, wherein light emitted to the outside and light emitted from the active layer have different central wavelength bands. |
| US12300768B2 |
Light emitting element, display device including the same, and manufacturing method of light emitting element
A light emitting element includes a first semiconductor layer; an emission layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the emission layer; an electrode layer disposed on the second semiconductor layer; and an insulating film surrounding side surfaces of the first semiconductor layer, the emission layer, and the second semiconductor layer and surrounding a portion of the electrode layer at an end portion of the light emitting element on which the electrode layer is disposed. The electrode layer includes a first surface adjacent to the second semiconductor layer; a second surface facing the first surface and having a width less than a width of the first surface; and a side surface that connects the first surface and the second surface and has a slope in a range of about 75° to about 90° with respect to the first surface of the electrode layer. |
| US12300765B2 |
Epitaxial formation support structures and associated methods
Epitaxial formation support structures and associated methods of manufacturing epitaxial formation support structures and solid state lighting devices are disclosed herein. In several embodiments, a method of manufacturing an epitaxial formation support substrate can include forming an uncured support substrate that has a first side, a second side opposite the first side, and coefficient of thermal expansion substantially similar to N-type gallium nitride. The method can further include positioning the first side of the uncured support substrate on a first surface of a first reference plate and positioning a second surface of a second reference plate on the second side to form a stack. The first and second surfaces can include uniformly flat portions. The method can also include firing the stack to sinter the uncured support substrate. At least side of the support substrate can form a planar surface that is substantially uniformly flat. |
| US12300759B2 |
Method of manufacturing a hybrid device
A method of manufacturing a micro-light-emitting diode display includes processing a wafer to form a plurality of functional chips integral with the wafer. A plurality of wafer tiles is defined in the wafer, wherein each wafer tile is composed of a cluster of functional chips. The wafer tiles are singulated by wafer dicing. A plurality of separate wafer tiles is bonded to a semiconductor wafer by hybrid bonding. The functional chips are singulated together with chips of the semiconductor wafer by dicing the bonded-together wafer tiles and semiconductor wafer. |
| US12300757B2 |
High-sensitivity avalanche photodetectors
Disclosed herein are avalanche photodiodes (APDs) particularly useful for high-sensitivity Geiger-mode APDs formed using an array of micro-cells. The photodetector is formed on a semiconductor substrate of indium phosphide (InP) having epitaxial layers, including indium gallium arsenide (InGaAs) as the photodetecting layer, with n-doped InP to one side, and layers of InP incorporating p-doped regions on the opposite side. The p-doped regions may serve to define an array of micro-cells, which may be arranged in a hexagonal pattern. A well may be etched through the epitaxial structures, allowing an electrode that contacts the n-doped InP layer and another that contacts the p-doped InP regions to be patterned on the same side of the detector. Flip-chip bonding techniques can then attach the semiconductor wafer to a stronger support substrate, which may additionally be configured with electronic circuitry positioned to electrically contact the electrodes on the semiconductor wafer surface. |
| US12300750B2 |
Method of manufacturing a semiconductor device and a semiconductor device
In a method of manufacturing a semiconductor device, an upper fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked is formed over a lower fin structure, a sacrificial gate structure is formed over the upper fin structure, a source/drain region of the upper fin structure, which is not covered by the sacrificial gate structure, is etched thereby forming a source/drain space, the first semiconductor layers are laterally etched through the source/drain space, an inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers, and a source/drain epitaxial layer is formed in the source/drain space to cover the inner spacer. In etching the source/drain region, a part of the lower fin structure is also etched to form a recess, in which a (111) surface is exposed. |
| US12300745B2 |
Compound semiconductor device and method of manufacturing compound semiconductor device
Provided is a compound semiconductor device that can suppress the deterioration of the element characteristics and a method of manufacturing a compound semiconductor device. The compound semiconductor device includes a laminated body constituted of a compound semiconductor and including a channel layer in which a first conductivity type carrier runs; a gate electrode provided on an upper surface side of the laminated body; a source electrode provided on the upper surface side of the laminated body; and a drain electrode provided on the upper surface side of the laminated body. The laminated body includes a second conductivity type first low resistance layer that is provided at a position facing the gate electrode and is in contact with the gate electrode, a first electric-field relaxation layer extended from the first low resistance layer toward a side of one of the source electrode and the drain electrode and configured to relax electric field concentration to the first low resistance layer, and a first amorphous layer covering a first side surface that is a side surface of the first electric-field relaxation layer and faces one of the source electrode and the drain electrode. |
| US12300738B2 |
Semiconductor device and manufacturing method for the semiconductor device
The present disclosure provides a semiconductor device and a method for forming a semiconductor device. The semiconductor device includes a substrate, and a first gate dielectric stack over the substrate, wherein the first gate dielectric stack includes a first ferroelectric layer, and a first dielectric layer coupled to the first ferroelectric layer, wherein the first ferroelectric layer includes a first portion made of a ferroelectric material in orthorhombic phase, a second portion made of the ferroelectric material in monoclinic phase, and a third portion made of the ferroelectric material in tetragonal phase, wherein a total volume of the second portion is greater than a total volume of the first portion, and the total volume of the first portion is greater than a total volume of the third portion. |
| US12300736B2 |
Transistors and memory arrays
Some embodiments include integrated memory having an array of access transistors. Each access transistor includes an active region which has a first source/drain region, a second source/drain region and a channel region. The active regions of the access transistors include semiconductor material having elements selected from Groups 13 and 16 of the periodic table. First conductive structures extend along rows of the array and have gating segments adjacent the channel regions of the access transistors. Heterogenous insulative regions are between the gating segments and the channel regions. Second conductive structures extend along columns of the array, and are electrically coupled with the first source/drain regions. Storage-elements are electrically coupled with the second source/drain regions. Some embodiments include a transistor having a semiconductor oxide channel material. A conductive gate material is adjacent to the channel material. A heterogenous insulative region is between the gate material and the channel material. |
| US12300735B2 |
Air gap in inner spacers and methods of fabricating the same in field-effect transistors
A semiconductor structure includes a stack of semiconductor layers disposed over a substrate, a metal gate stack having a top portion disposed over the stack of semiconductor layers and a bottom portion interleaved with the stack of semiconductor layers, an inner spacer disposed on sidewalls of the bottom portion of the metal gate stack, an air gap extending in the inner spacer, and an epitaxial source/drain (S/D) feature disposed over the inner spacer and adjacent to the metal gate stack. |
| US12300734B2 |
Semiconductor device having air gap and method of fabricating thereof
Methods and devices that provide for a fin structure and a dielectric fin structure. A gate structure is formed over the fin structure and the hybrid fin structure. A plurality of dielectric layers is adjacent the gate structure and over the hybrid fin structure between the gate structure and a contact element over the dielectric fin structure. The plurality of dielectric layers includes an air gap, formed by removal of a dummy spacer layer. |
| US12300732B2 |
Gate all around transistor with dual inner spacers
A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer. |
| US12300724B2 |
Method of manufacturing silicon carbide semiconductor devices
A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body, the trench structure having a gate electrode that is dielectrically insulated from the semiconductor body, a shielding region adjoining a bottom of the trench structure and forming a first pn junction with a drift structure of the semiconductor body, a body region forming a second pn junction with the drift structure, a source zone arranged between the first surface and the body region and forming a third pn junction with the source zone, wherein a contact portion of the body region extends to the first surface, wherein the source zone surrounds the contact portion of the body region at the first surface, and wherein the trench structure forms an enclosed loop at the first surface that surrounds the source zone and the contact portion of the body region at the first surface. |
| US12300723B2 |
Transistor including downward extending silicide
An integrated circuit includes a transistor having a plurality of semiconductor nanostructures arranged in a stack and corresponding to channel regions of the transistor. The transistor includes a source/drain region in contact with the channel regions. The transistor includes a silicide that extends downward along a side of the source/drain region. |
| US12300722B2 |
Selective liner on backside via and method thereof
A semiconductor structure includes a source/drain (S/D) feature; one or more channel semiconductor layers connected to the S/D feature; a gate structure engaging the one or more channel semiconductor layers; a first silicide feature at a frontside of the S/D feature; a second silicide feature at a backside of the S/D feature; and a dielectric liner layer at the backside of the S/D feature, below the second silicide feature, and spaced away from the second silicide feature by a first gap. A backside power rail is included. |
| US12300713B2 |
Image sensor having lens layer over optical sensing area and manufacturing method thereof
A method includes at least the following steps. A material layer is formed over an image capture chip. A patterned mask layer is formed on the material layer, wherein a pattern density of the patterned mask layer varies from a central region of the patterned mask layer to a periphery region of the patterned mask layer. The material layer is polished by using the patterned mask layer as a mask to form a lens layer including a single lens portion on the image capture chip. |
| US12300711B2 |
Integrated sensor for lifetime characterization
Aspects of the technology described herein relate to improved semiconductor-based image sensor designs. In some embodiments, an integrated circuit may comprise a photodetection region and a drain region electrically coupled to the photodetection region, and the photodetection region may be configured to induce an intrinsic electric field in a direction from the photodetection region to the drain region(s). In some embodiments, a charge storage region and the drain region may be positioned on a same side of the photodetection region. In some embodiments, at least one drain layer may be configured to receive incident photons and/or charge carriers via the photodetection region. In some embodiments, an integrated circuit may comprise a plurality of pixels and a control circuit configured to control a transfer of charge carriers in the plurality of pixels. |
| US12300709B2 |
Image sensing device
An image sensing device may include: a variable color filter configured to vary the wavelength range of light transmitted thereby; and a pixel array comprising a plurality of unit pixels each configured to generate a pixel signal corresponding to the intensity of light having penetrated the variable color filter. |
| US12300707B2 |
Image sensing device
An image sensing device includes a substrate including a front side and a back side that are opposite to each other, wherein the image sensing device is structured to operate by receiving incident light through the back side of the substrate; a depletion region disposed in the substrate to be in contact with the back side of the substrate; an epitaxial layer disposed in the substrate to be in contact with or near the front side of the substrate; and a plurality of detection structures disposed in the epitaxial layer, each configured to capture photocharge generated by incident light and move by a current flowing in the epitaxial layer. |
| US12300702B2 |
Semiconductor device including storage capacitor having pixel electrode, directly stacked conductive layer, and insulating layer interposed between them, wherein the stacked conductive layers extending towards the gate and source wirings/lines
An object is to provide a semiconductor device with high aperture ratio or a manufacturing method thereof. Another object is to provide semiconductor device with low power consumption or a manufacturing method thereof. A light-transmitting conductive layer which functions as a gate electrode, a gate insulating film formed over the light-transmitting conductive layer, a semiconductor layer formed over the light-transmitting conductive layer which functions as the gate electrode with the gate insulating film interposed therebetween, and a light-transmitting conductive layer which is electrically connected to the semiconductor layer and functions as source and drain electrodes are included. |
| US12300701B2 |
Array substrate and display panel
An array substrate and a display panel are provided. The array substrate includes a substrate, an array layer, an inorganic insulation layer, a conductive electrode, a passivation layer, and a pixel electrode disposed in sequence. The array layer includes a source electrode and a drain electrode. A first via hole is defined in the array substrate. The first via hole penetrates the passivation layer and the inorganic insulation layer and exposes the drain electrode. The pixel electrode is connected to the drain electrode in the first via hole. |
| US12300696B2 |
Semiconductor devices having fins and multiple isolation regions
A semiconductor device and method includes: forming a first fin and a second fin on a substrate; forming a dummy gate material over the first fin and the second fin; forming a recess in the dummy gate material between the first fin and the second fin; forming a sacrificial oxide on sidewalls of the dummy gate material in the recess; filling an insulation material between the sacrificial oxide on the sidewalls of the dummy gate material in the recess; removing the dummy gate material and the sacrificial oxide; and forming a first replacement gate over the first fin and a second replacement gate over the second fin. |
| US12300694B2 |
Semiconductor device and semiconductor module
The semiconductor device of the present invention includes a semiconductor substrate, a switching element which is defined on the semiconductor substrate, and a temperature sense element which is provided on the surface of the semiconductor substrate independently from the switching element and characterized by being dependent on a temperature. |
| US12300692B2 |
Semiconductor device with ESD protection and methods of operating and configuring the same
An electro-static discharge (ESD) protection network for an input/output (I/O) pad includes a driver stack including an upper branch and a lower branch, the upper branch being electrically connected between a first node that has a first reference voltage and the I/O pad, and the lower branch being electrically connected between the I/O pad and a second node that has a second reference voltage; a first ESD device electrically connected between the I/O pad and a third node that has a third reference voltage; and a power clamp between the third node and the second node. |
| US12300691B2 |
Display device comprising pixel portion and non-linear element including oxide semiconductor layer
A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved. |
| US12300690B2 |
Static random access memory device
A semiconductor device including a static random access memory (SRAM) device includes a first SRAM array including a first plurality of bit cells arranged in a matrix; a second SRAM array including a second plurality of bit cells arranged in a matrix; and a plurality of abutting dummy cells disposed between the first SRAM array and the second SRAM array. Each of the plurality of abutting dummy cells includes a plurality of dummy gate electrode layers and a plurality of dummy contacts. The semiconductor device further includes a first-type well continuously extending from the first SRAM array to the second SRAM array. The first-type well is in direct contact with portions of the plurality of dummy contacts. |
| US12300689B2 |
Dual cool power module with stress buffer layer
Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material. |
| US12300684B2 |
Semiconductor packages
A semiconductor package includes a first integrated circuit and a first waveguide. The first integrated circuit includes an optical coupler. The first waveguide is optically coupled to the optical coupler. In some embodiments, the first waveguide protrudes beyond the optical coupler. In some embodiments, the first waveguide is partially overlapped with the optical coupler. |
| US12300683B2 |
Display device with stacked wiring and display device with translucent region
A display device includes a substrate, a first light-emitting diode (LED) element and a second LED element provided to the substrate and configured to output light, a first signal line provided between the first LED element and the second LED element and electrically coupled to the first LED element, a second signal line provided between the first LED element and the second LED element and electrically coupled to the second LED element, gate wiring intersecting the first signal line and the second signal line, and anode wiring overlapping the gate wiring and electrically coupled to the first LED element and the second LED element. The anode wiring extends parallel to the gate wiring. |
| US12300682B2 |
Semiconductor package
A semiconductor package includes a PDA chip, a MOS chip, and a wiring plate including a first principal surface and a second principal surface, the first principal surface being provided with a first rigid plate that is non-conductive and a second rigid plate that is conductive, the PDA chip being fixed to the first rigid plate by using a non-conductive bonding agent, a lower surface terminal of the MOS chip being soldered to the second rigid plate, the second principal surface being provided with an input terminal and an output terminal, the input terminal being electrically connected to the PDA chip, the output terminal being electrically connected to the second rigid plate. |
| US12300681B2 |
Electronic package and electronic device
The present disclosure provides an electronic package. The electronic package includes a substrate, a first component disposed on the substrate and configured to detect an external signal, and an encapsulant disposed on the substrate. The electronic package also includes a protection element disposed on the substrate and physically separating the first device from the encapsulant and exposing the first device. The present disclosure also provides an electronic device. |
| US12300678B2 |
Package for power semiconductor devices
In a described example, an apparatus includes: a first mold compound partially covering a thermal pad that extends through a pre-molded package substrate formed of a first mold compound, a portion of the thermal pad exposed on a die side surface of the pre-molded package substrate, the pre-molded package substrate having a recess on the die side surface, with an exposed portion of the thermal pad and a portion of the first mold compound in a die mounting area in the recess; a semiconductor die mounted to the thermal pad and another semiconductor die mounted to the mold compound in the die mounting area; wire bonds coupling bond pads on the semiconductor dies to traces on the pre-molded package substrate; and a second mold compound over the die side surface of the pre-molded package substrate and covering the wire bonds, the semiconductor dies, the recess, and a portion of the traces. |
| US12300676B2 |
Fingerprint recognition module and electronic device comprising same
A fingerprint recognition module according to an embodiment includes a substrate; a conductive pattern portion disposed on the substrate; a protective layer partially disposed on the substrate and the conductive pattern portion; a first connection portion disposed on a conductive pattern portion exposed through a first open region of the protective layer; and a first chip disposed on the first connection portion; wherein the first connection portion includes an anisotropic conductive adhesive disposed on the conductive pattern portion exposed through the first open region and having a closed loop shape and including conductive particles. |
| US12300675B2 |
Semiconductor package
Provided is a semiconductor package including a redistribution substrate, a semiconductor chip on a top surface of the redistribution substrate, a first passive device and a second passive device on a bottom surface of the redistribution substrate and spaced apart, connection terminals on the bottom surface of the redistribution substrate, and an underfill layer between the first passive device and the redistribution substrate and between the second passive device and the redistribution substrate, the underfill layer intersecting a region between the first passive device and the second passive device and extending in the first direction, wherein the bottom surface of the redistribution substrate is exposed between the first passive device and a first connection terminal closest to the first passive device in the first direction, and between the second passive device and a second connection terminal closest to the second passive device in an opposite direction to the first direction. |
| US12300671B2 |
Semiconductor packages and methods of manufacturing the semiconductor packages
A semiconductor package includes first to fourth semiconductor chips sequentially stacked on one another. A backside of a third substrate of the third semiconductor chip may be arranged to face a backside surface of a second substrate of the second semiconductor chip such that the third substrate and a second backside insulation layer provided on the backside surface of the second substrate are bonded directly to each other, or the backside of the third substrate may be arranged to face a front surface of the second substrate such that the third substrate and a second front insulation layer provided on the front surface of the second substrate are bonded directly to each other. |
| US12300670B2 |
Hybrid bond pad structure
In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a first integrated chip (IC) tier and a second IC tier. The second IC tier comprises a second plurality of conductors within a second insulating structure disposed on the second semiconductor body. A conductive pad is electrically coupled to the second plurality of conductors and has a conductive surface available to a side of the second semiconductor body facing away from the first semiconductor body. The IC first tier contacts the second IC tier along a bonding interface including one or more conductive regions and one or more insulating regions. The one or more conductive regions laterally outside of a bottom surface of the conductive pad. |
| US12300667B2 |
Semiconductor package and method of fabricating the same
Provided is a semiconductor package, including a lower semiconductor chip, a plurality of semiconductor chips that are disposed on the lower semiconductor chip in a first direction perpendicular to a top surface of the lower semiconductor chip, a plurality of nonconductive layers disposed between the plurality of semiconductor chips, a nonconductive pattern that extends from the nonconductive layers and is disposed on lateral surfaces of at least one of the plurality of semiconductor chips, a first mold layer disposed a top surface of the nonconductive pattern, and a second mold layer disposed a lateral surface of the nonconductive pattern and a lateral surface of the first mold layer, wherein the nonconductive pattern and the first mold layer are disposed between the second mold layer and lateral surfaces of the plurality of semiconductor chips. |
| US12300662B2 |
DBI to SI bonding for simplified handle wafer
Devices and techniques include process steps for preparing various microelectronic components for bonding, such as for direct bonding without adhesive. The processes include providing a first bonding surface on a first surface of the microelectronic components, bonding a handle to the prepared first bonding surface, and processing a second surface of the microelectronic components while the microelectronic components are gripped at the handle. In some embodiments, the processes include removing the handle from the first bonding surface, and directly bonding the microelectronic components at the first bonding surface to other microelectronic components. |
| US12300659B2 |
Aligning bumps in fan-out packaging process
A method includes placing a first package component and a second package component over a carrier. The first conductive pillars of the first package component and second conductive pillars of the second package component face the carrier. The method further includes encapsulating the first package component and the second package component in an encapsulating material, de-bonding the first package component and the second package component from the carrier, planarizing the first conductive pillars, the second conductive pillars, and the encapsulating material, and forming redistribution lines to electrically couple to the first conductive pillars and the second conductive pillars. |
| US12300654B2 |
Semiconductor device with metal silicide layer
A semiconductor device and a method of manufacturing a semiconductor are provided. In an embodiment, a method of manufacturing a semiconductor device is provided. A first surface of a metal silicide layer may be treated with an oxidizing agent to oxidize metal silicide protrusions on the first surface of the metal silicide layer. After treating the first surface with the oxidizing agent, the first surface may be treated with a cleaning agent to remove oxide over the metal silicide protrusions, wherein a size of a metal silicide protrusion of the metal silicide protrusions after treating the first surface with the cleaning agent is smaller than a size of the metal silicide protrusion prior to treating the first surface with the oxidizing agent. |
| US12300649B2 |
Semiconductor package
A semiconductor package is provided. The semiconductor package includes: a first stack including a first semiconductor substrate; a through via that penetrates the first semiconductor substrate in a first direction; a second stack that includes a second face facing a first face of the first stack, on the first stack; a first pad that is in contact with the through via, on the first face of the first stack; a second pad including a concave inner side face that defines an insertion recess, the second pad located on the second face of the second stack; and a bump that connects the first pad and the second pad, wherein the bump includes a first upper bump on the first pad, and a first lower bump between the first upper bump and the first pad. |
| US12300648B2 |
Three-dimensional memory devices and methods for forming the same
In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first and the second semiconductor structures. The first semiconductor structure includes an array of NAND memory strings, a first peripheral circuit of the array of NAND memory strings including a first transistor, a polysilicon layer between the array of NAND memory strings and the first peripheral circuit, and a first semiconductor layer in contact with the first transistor. The polysilicon layer is in contact with sources of the array of NAND memory strings. The second semiconductor structure includes a second peripheral circuit of the array of NAND memory strings including a second transistor, and a second semiconductor layer in contact with the second transistor. The second semiconductor layer is between the bonding interface and the second peripheral circuit. The first semiconductor layer is between the polysilicon layer and the second semiconductor layer. |
| US12300645B2 |
Connector and method for forming the same
A method includes forming a first connector and a second connector over a first wafer and a second wafer, respectively, in which each of the first and second connectors are formed by forming an opening in a dielectric layer; depositing a first metal layer in the opening, in which the first metal layer has a nano-twinned structure with (111) orientation; and depositing a second metal layer over the first metal layer, the second metal layer and the first metal layer being made of different materials, in which the second metal layer has a nano-twinned structure with (111) orientation; attaching the first wafer to the second wafer, such that that the second metal layer of the first connector on the first wafer is in contact with the second metal layer of the second connector on the second wafer; and performing a thermo-compression process to bond the first and second wafers. |
| US12300640B2 |
Semiconductor device and method of manufacturing thereof
In a method of manufacturing a semiconductor device, an opening is formed in a first dielectric layer so that a part of a lower conductive layer is exposed at a bottom of the opening, one or more liner conductive layers are formed over the part of the lower conductive layer, an inner sidewall of the opening and an upper surface of the first dielectric layer, a main conductive layer is formed over the one or more liner conductive layers, a patterned conductive layer is formed by patterning the main conductive layer and the one or more liner conductive layers, and a cover conductive layer is formed over the patterned conductive layer. The main conductive layer which is patterned is wrapped around by the cover conductive layer and one of the one or more liner conductive layers. |
| US12300637B2 |
Semiconductor apparatus
A semiconductor device (100) according to the present disclosure comprises a semiconductor chip (130) in which are formed a protruding terminal (14) that electrically connects to a transistor (13) and that has a greater cross-sectional area than a bonding wire (4) and a short circuit prevention side wall (15) that is insulating and that covers side surfaces that face the surroundings of the protruding terminal (14). The semiconductor chip (130) is bonded to the upper surface (3) of a metal plate (2) by a conductive bonding material 6. A conductor pattern (34a) that is formed in a circuit board (30) bonded to the upper surface (3) of the metal plate (2) is connected via the bonding wire (4) to the projection-direction end of the protruding terminal (14). |
| US12300636B2 |
Seal ring structure and method of fabricating the same
The present disclosure provides a semiconductor structure that includes dielectric layers disposed over a semiconductor substrate; and a seal ring structure formed in the dielectric layers and distributed in multiple metal layers. The seal ring structure further includes first metal lines of a metal layer disposed in a first area and longitudinally oriented along a first direction; second metal lines of the metal layer disposed in a second area and longitudinally oriented along the first direction; and metal bars of the metal layer disposed in the first area and longitudinally oriented along a second direction, the metal bars connecting the first metal lines. |
| US12300634B2 |
Protective semiconductor elements for bonded structures
A bonded structure with protective semiconductor elements including a semiconductor element with active circuitry and a protective element including an obstructive layer and/or a protective circuitry layer. The obstructive layer is configured to inhibit external access to at least a portion of the active circuitry. The protective circuitry layer is configured to detect or disrupt external access to the protective element and/or the active circuitry of the semiconductor element. The semiconductor element and the protective element are directly bonded without an adhesive along a bonding interface. |
| US12300632B2 |
Chip package with lid
A chip package includes a substrate, a semiconductor chip, and a thermal conductive structure. The chip package includes a first and a second support structures below the thermal conductive structure. The first and the second support structures connect the substrate and corners of the thermal conductive structure. The thermal conductive structure has a side edge connecting the first and the second support structures. The first and the second support structures and the side edge together define of an opening exposing a space surrounding the semiconductor chip. The first and the second support structures are disposed along a side of the substrate. The first support structure is laterally separated from the side of the substrate by a first lateral distance. The side edge of the thermal conductive structure is laterally separated from the side of the substrate by a second lateral distance different than the first lateral distance. |
| US12300629B2 |
Semiconductor package and method of fabricating the same
A semiconductor package is disclosed. The semiconductor package may include a substrate, a first semiconductor chip on the substrate, an inner mold layer provided on the substrate to at least partially enclose the first semiconductor chip, an inner shielding layer provided on the substrate to at least partially enclose the inner mold layer, a second semiconductor chip stack on the inner shielding layer, an outer mold layer provided on the substrate to at least partially enclose the inner shielding layer and the second semiconductor chip stack, and an outer shielding layer at least partially enclosing the outer mold layer. Each of the inner and outer shielding layers may include a conductive material, and the inner shielding layer may be electrically connected to a ground pad of the substrate. |
| US12300628B2 |
Module and method for manufacturing same
A module includes a substrate including a first surface, a first component mounted on first surface, and a first sealing resin sealing first component. First sealing resin contains a filler. An upper surface of first sealing resin includes a first region and a second region. A ratio of an area where the filler is exposed from first sealing resin in the second region is smaller than a ratio of an area where the filler is exposed from first sealing resin in the first region, at least the first region and side surfaces of the first sealing resin are covered with a shield film, and the second region is not covered with shield film. |
| US12300626B2 |
Microelectronic assemblies
Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a first die comprising a first face and a second face; and a second die, the second die comprising a first face and a second face, wherein the second die further comprises a plurality of first conductive contacts at the first face and a plurality of second conductive contacts at the second face, and the second die is between first-level interconnect contacts of the microelectronic assembly and the first die. |
| US12300625B2 |
Semiconductor package including outer conductive plate
A semiconductor package includes a substrate; and a first semiconductor device and a second semiconductor device that are provided on the substrate. The substrate includes a first dielectric layer and a second dielectric layer provided on the first dielectric layer, a plurality of signal lines provided between the first dielectric layer and the second dielectric layer and connecting the first semiconductor device to the second semiconductor device, and a conductive pad and a conductive plate provided on the second dielectric layer. The conductive pad overlaps the first semiconductor device or the second semiconductor device. The conductive plate overlaps the signal lines. |
| US12300624B2 |
Electronic device
The disclosure provides an electronic device which includes a substrate structure, a driving component, and a conductive pattern. The driving component and the conductive pattern are formed on the substrate structure, and the thickness of the conductive pattern is greater than or equal to 0.5 μm and less than or equal to 15 μm. |
| US12300623B2 |
Integrated circuit
An integrated circuit includes a first conductive structure including a root portion of the first conductive structure, tine portions that are arranged in a first semiconductor layer, a neck portion surrounded by a film structure. The integrated circuit further includes a second conductive structure having first and second portions that are stacked along a first direction. The first portion of the second conductive structure is surrounded by the film structure and the second portion of the second conductive structure is in the first semiconductor layer. A third conductive structure in the integrated circuit has horizontal and vertical structures. The horizontal structure extends in a second semiconductor layer and the vertical structure passes through the second semiconductor layer and the film structure to contact a first conductive rail. The first conductive rail and the tine portions are apart from the horizontal structure along the first direction by a same distance. |
| US12300622B2 |
Device packages including redistribution layers with carbon-based conductive elements, and methods of fabrication
Semiconductor device packages include a redistribution layer (RDL) with carbon-based conductive elements. The carbon-based material of the RDL may have low electrical resistivity and may be thin (e.g., less than about 0.2 μm). Adjacent passivation material may also be thin (e.g., less than about 0.2 μm). Methods for forming the semiconductor device packages include forming the carbon-based material (e.g., at high temperatures (e.g., at least about 550° C.)) on an initial support wafer with a sacrificial substrate. Later or separately, components of a device region of the package may be formed and then joined to the initial support wafer before the sacrificial substrate is removed to leave the carbon-based material joined to the device region. |
| US12300614B2 |
Semiconductor device with multilayer insulating layer in recess and method of manufacturing the same
A semiconductor device includes: a stacking part in which the plurality of conductor layers are separately stacked in a z direction; a stair part that is arranged alongside the stacking part in a y direction and in which the plurality of conductor layers are extended in the y direction in a stair shape; a first insulating film covering at least part of the stair part; a second insulating film covering at least part of the first insulating film and different from the first insulating film; and a contact connected with one of the plurality of conductor layers and penetrating through the first insulating film and the second insulating film. The linear expansion coefficient of the second insulating film is larger than the linear expansion coefficient of the first insulating film. |
| US12300612B2 |
Semiconductor structure including conductive layers contacting trench
A semiconductor structure includes a substrate, a trench, a first conductive layer, a second conductive layer, a third conductive layer, a source region and a drain region, a bit line contact, and a storage node contact. The trench is disposed in the substrate. The first conductive layer is disposed in the trench. The second conductive layer is disposed on a top surface of the first conductive layer. The third conductive layer is disposed on the top surface of the first conductive layer and is electrically connected to the second conductive layer. The source region and the drain region are disposed in the substrate and disposed on opposite sides of the first conductive layer. The bit line contact is disposed on one of the source region and the drain region, and the storage node contact is disposed on the other of the source region and the drain region. |
| US12300611B2 |
Interconnect conductive structure comprising two conductive materials
In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate, a second interconnect dielectric layer arranged over the first interconnect dielectric layer, and an interconnect conductive structure arranged within the second interconnect dielectric layer. The interconnect conductive structure includes an outer portion that includes a first conductive material. Further, the interconnect conductive structure includes a central portion having outermost sidewalls surrounding by the outer portion of the interconnect conductive structure. The central portion includes a second conductive material different than the first conductive material. |
| US12300610B2 |
Method and apparatus for electromigration reduction
A semiconductor circuit configured to reduce electromigration. The circuit comprises a power rail and ground rail located on a first layer. A power finger and a ground finger are located on a second layer. Cells are located on the second layer, such that the one or more cells are electrically connected to a power finger and a ground finger. The circuit also includes one or more power vias electrically connecting the power rail to the power finger. The one or more power vias extend from the first layer to the second layer. One or more ground vias electrically connecting the ground rail to the ground finger, such that the one or more ground vias extend from the first layer to the second layer. The placement of the fingers on a different level than the rails establishing the fingers as non-contiguous sections thereby reducing electromigration and overcoming design analysis errors. |
| US12300600B2 |
Semiconductor device with self-aligned conductive features
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a conductive line over the semiconductor substrate. The conductive line has a barrier region surrounding an inner portion of the conductive line, and the barrier region has a greater dopant concentration than the inner portion. The semiconductor device structure also includes a conductive via on the conductive line. The semiconductor device structure further includes a dielectric layer over the semiconductor substrate. The dielectric layer surrounds the conductive line and the conductive via. |
| US12300597B2 |
Apparatuses including ball grid arrays and associated systems
Systems may include a central processing unit (CPU), a graphics processing unit (GPU), or a field programmable gate array (FPGA), or any combination thereof. At least one memory device may be connected to the CPU, the GPU, or the FPGA. The memory device(s) may include a device substrate including a microelectronic device and bond pads coupled with an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on the package substrate. Each ball of the ball grid array positioned and configured to carry one of a high-bandwidth data signal or a high-frequency clock signal may be located only diagonally adjacent to any other balls of the ball grid array configured to carry another of a high-bandwidth data signal or a high-frequency clock signal. |
| US12300596B2 |
Display device having connection unit
Embodiments of display devices improve the attachment between the connection unit on which a driving integrated circuit is mounted and a substrate of a display panel, and substantially prevent detachment of the connection unit. For example, dummy lines may be provided in the connection unit to enhance the spreading of an adhesive film to securely attach the connection unit to the substrate of the display. |
| US12300592B2 |
Fan-out package with controllable standoff
A method includes forming an interposer, which includes forming a rigid dielectric layer, and removing portions of the rigid dielectric layer. The method further includes bonding a package component to an interconnect structure, and bonding the interposer to the interconnect structure. A spacer in the interposer has a bottom surface contacting a top surface of the package component, and the spacer includes a feature selected from the group consisting of a metal feature, the rigid dielectric layer, and combinations thereof. A die-saw is performed on the interconnect structure. |
| US12300591B2 |
Devices with conductive or magnetic nanowires for localized heating and connection
A device includes a porous substrate that include a plurality of pores and a plurality of nanodevices dispersed in at least a portion of the plurality of pores. Each of the plurality of nanodevices includes a magnetic nanowire and a solder nanoparticle. The magnetic nanowires are configured to generate heat in response to an alternating magnetic field. The solder nanoparticles are configured to receive a portion of the heat and reflow to connect to one or more devices or surfaces. |
| US12300590B2 |
Package structure and method for forming same
The present invention discloses a package structure and a method for forming the same. The package structure includes a substrate, a chip, a first plastic package layer and a support block, wherein the substrate includes a first surface and a second surface; the chip is disposed on the first surface; the first plastic package layer is disposed on the first surface and packages the chip; the support block is disposed on the second surface; and in a thickness direction of the substrate, an overlapping region exists between the chip and the support block, and a thermal expansion coefficient of the chip is equal to a thermal expansion coefficient of the support block. The support block can counteract part of stress to avoid problems such as warping or twisting. Due to the overlapping region, a counteraction function of the support block on the stress exerted on the chip can be improved. |
| US12300586B2 |
Leadless semiconductor package with internal gull wing lead structures
A leadless semiconductor package includes a plurality of internal gull wing leads forming a concave region and an IC die disposed in the concave region and having a plurality of conductive bumps at a first surface connected to corresponding proximal sections of the internal gull wing leads. Distal ends of the internal gull wing leads form surface mount pads at a mounting surface of the leadless semiconductor package for mounting the package to a circuit board. Packaging encapsulant extends between the mounting surface and an opposing surface of the package and encapsulates the first surface of the IC die and the proximal ends of the internal gull wing lead structures. In some implementations, the mounting surface further includes a second surface of the IC die opposite the first surface and thus a thermally conductive material may be disposed between the second surface of the IC die and the circuit board. |
| US12300583B2 |
Concealed gate terminal semiconductor packages and related methods
Semiconductor packages may include a lead frame, one or more semiconductor die coupled with the lead frame, and an interposer coupled with the lead frame and with at least one of the one or more semiconductor die. The interposer in implementations includes an electrically conductive material coupled with an electrically insulative material. The interposer may be coupled with the lead frame through the electrically insulative material such that the electrically conductive material is electrically isolated from the lead frame. The interposer may facilitate a gate node of the package being fully encapsulated within the package without being exposed through an encapsulant of the package. Fully encapsulating the gate node within the package may allow a contact pad of another node to have a larger area exposed through the encapsulant to provide greater heat transfer to a printed circuit board (PCB). |
| US12300582B2 |
Method of forming a packaged semiconductor device having enhanced wettable flank and structure
A packaged electronic device includes a substrate having a lead. The lead includes an outward facing side surface having a first height, and an inward facing side surface having a second height that is less than the first height. An electronic device is electrically connected to the lead. A package body encapsulates the electronic device and portions of the lead. The outward facing side surface is exposed through a side surface of the package body, and the inward facing side surface is encapsulated by the package body. A conductive layer is disposed on the outward facing side surface to provide the packaged electronic device with an enhanced wettable flank. In one embodiment, the electronic device is electrically connected to a thick terminal portion having the outward facing side surface. In another embodiment, the electronic device is electrically connected to a thin terminal portion having the inward facing side surface. |
| US12300580B2 |
Semiconductor device and method
Some devices included a substrate; and a through via, including a plurality of scallops adjacent the through via in a first region and a plurality of scallops adjacent the through via in a second region, the plurality of scallops having a first depth, the scallops having a greater depth. Some devices include an opening extending into a substrate, including a first region and a second region. Sidewalls of the opening include a stack of first concave portions extending a first distance into the first substrate, and a stack of second concave portions extending a second distance, greater than and parallel to the first distance, into the first substrate. A conductor partially fills the first concave portions and at least partially fills the respective second concave portions. |
| US12300579B2 |
Liquid cooled interposer for integrated circuit stack
An integrated circuit (IC) package may be fabricated having an interposer, one or more microfluidic channels through the interposer, a first IC chip attached to a first side of the interposer, and a second IC chip attached to a second side of the interposer, where the first side of the interposer includes first bond pads coupled to first bond pads of the first IC chip, and the second side of the interposer includes second bond pads coupled to first bond pads of the second IC chip. In an embodiment of the present description, a liquid cooled three-dimensional IC (3DIC) package may be formed with the IC package, where at least two IC devices may be stacked with a liquid cooled interposer. In a further embodiment, the liquid cooled 3DIC package may be electrically attached to an electronic board. Other embodiments are disclosed and claimed. |
| US12300576B2 |
Cyclic cooling embedded packaging substrate and manufacturing method thereof
A cyclic cooling embedded packaging substrate and a manufacturing method thereof are disclosed. The packaging substrate includes a dielectric material body, a chip, a first metal face, a second metal face and a first trace. The dielectric material body is provided with a packaging cavity, the chip is packaged in the packaging cavity, the first metal face is embedded in the dielectric material body, covers and is connected to a heat dissipation face of the chip. The second metal face is embedded in the dielectric material body, connected to a surface of the first metal face, and is provided with a first cooling channel pattern for forming a cooling channel. The first trace is arranged on a surface of the dielectric material body or embedded therein, and is connected with a corresponding terminal on an active face of the chip through a first conductive structure. |
| US12300575B2 |
Semiconductor package and method
A device includes a first semiconductor device including a first bonding layer; a second semiconductor device bonded to the first bonding layer of the first semiconductor device; thermal structures disposed beside the second semiconductor device and on the first bonding layer, wherein the thermal structures include a conductive material, wherein the thermal structures are electrically isolated from the first semiconductor device and from the second semiconductor device; an encapsulant disposed on the first bonding layer, wherein the encapsulant surrounds the second semiconductor device and surrounds the thermal structures; and a second bonding layer disposed over the encapsulant, the thermal structures, and the second semiconductor device. |
| US12300574B2 |
Adhesive and thermal interface material on a plurality of dies covered by a lid
Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM. |
| US12300573B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate, an electronic component, a cover and a liquid metal. The electronic component is disposed on the substrate. The cover is disposed on the substrate and covers the electronic component. The liquid metal is formed between the cover and the electronic component. |
| US12300569B2 |
Semiconductor device
A first principal electrode and a first control electrode pad are formed on a first principal surface of the semiconductor chip. A second principal electrode and a second control electrode pad are formed on a second principal surface of the semiconductor chip. The second principal electrode and the second control electrode pad are respectively bonded to first and second metal patterns of an insulating substrate. Bonding sections of first and second wires overlap a bonding section of the second principal electrode or the second control electrode pad in plan view. Thickness of the first and second metal patterns is 0.2 mm or less. |
| US12300559B2 |
Semiconductor packages and methods for manufacturing thereof
A package includes a dielectric carrier, an electronic component mounted on the dielectric carrier, and an encapsulant encapsulating at least part of the dielectric carrier and the electronic component. Corresponding methods of manufacturing the package are also described. |
| US12300558B2 |
Substrates and related methods
Implementations of a substrate may include an electrically insulative layer having a first largest planar side and a second largest planar side opposing the first largest planar side; a first electrically conductive layer coupled to the first largest planar side and including a first scalloped edge having a first pattern; and a second electrically conductive layer coupled to the second largest planar side and including a second scalloped edge having a second pattern. The first pattern and the second pattern may alternate along at least one edge of the first largest planar side and at least one edge of the second largest planar side, respectively. |
| US12300553B2 |
Method for evaluating semiconductor wafer, method for selecting semiconductor wafer and method for fabricating device
An evaluation method including steps of: acquiring profile measurement data on an entire surface in a thickness direction of a mirror-polished wafer; identifying a slice-cutting direction by performing first-order or second-order differentiation on diameter-direction profile measurement data on the wafer to acquire differential profiles at predetermined rotation angles and pitches, and comparing the acquired differential profiles; acquiring x-y grid data by performing first-order or second-order differentiation on profile measurement data at a predetermined pitch in a y-direction at a predetermined interval in an x-direction perpendicular to the y-direction, which is the identified slice-cutting direction; acquiring, from the x-y grid data, a maximum derivative value in an intermediate region including the wafer center in the y-direction and a maximum derivative value in upper-end-side and lower-end-side regions located outside the intermediate region; and judging failure incidence possibility in a device fabrication process based on the maximum derivative values. |
| US12300552B2 |
Process control system including process condition determination using attribute-relative process condition
The present disclosure generally relates to determining a process condition in a semiconductor process using attribute-relative process conditions. An example is a method of forming an integrated circuit (IC). First and second historical process conditions are obtained. The first historical process conditions are of previous semiconductor processing corresponding to a target value of a process attribute for forming the IC, and the second historical process conditions are of previous semiconductor processing corresponding to variable values of the process attribute. Attribute-relative process conditions are calculated. Each attribute-relative process condition is based on the first historical process conditions and the second historical process conditions that correspond to a respective given value of the variable values. An average process condition is determined from a subset of the attribute-relative process conditions. A process condition of a subsequent semiconductor process is set based on the average process condition. |
| US12300550B2 |
Complementary MOS FETS vertically arranged and including multiple dielectric layers surrounding the MOS FETS
A fin including a bottom portion, a first sacrificial layer disposed over the bottom portion, a first semiconductor layer disposed over the first sacrificial layer, a second sacrificial layer disposed over the first semiconductor layer and a second semiconductor layer disposed over the second sacrificial layer, is formed. The second semiconductor layer protrudes from a first insulating layer. A dummy gate is formed over the second semiconductor layer. A sidewall spacer layer is formed on side faces of the dummy gate. A first dielectric layer is formed over the dummy gate and the sidewall spacer layer. The dummy gate is removed, thereby forming a gate space. The first insulating layer is etched in the gate space, thereby exposing the first semiconductor layer and the first and second sacrificial layers. The first and second sacrificial layers are removed. A gate dielectric layer and a gate electrode layer are formed. |
| US12300549B2 |
Gate stack treatment
The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere. |
| US12300546B2 |
Wafer dividing method
A wafer dividing method of dividing a wafer along each of a plurality of projected dicing lines set in a grid pattern on a front surface of the wafer includes forming a division initiating point serving as an initiating point of division of the wafer along each of the dicing lines, adhering a protective film made of an olefin-based resin and having one surface with no adhesive used therein to the wafer in such a manner that the one surface is brought into intimate contact with the front surface of the wafer, supporting the wafer by a support table in such a manner that the front surface of the wafer and the support table face each other, and applying an external force to the wafer from a back surface side of the wafer to thereby divide the wafer at the division initiating points. |
| US12300543B2 |
Method for manufacturing a semiconductor device having a dummy section
A semiconductor device includes a semiconductor substrate, active elements, first insulating film, an electrode pad, and a Through Silicon VIA electrode. The semiconductor substrate has an obverse surface and a reverse surface. The active elements define an element-absence area free of any of the active elements. The element-absence area includes a second insulating film, a ring-shaped dummy portion, and island-shaped dummy portions. The ring-shaped dummy portion and the island-shaped dummy portions are made of the same material as the semiconductor substrate. The ring-shaped dummy portion and the island-shaped dummy portions have top surfaces coplanar with a top surface of the second insulating film. The Through Silicon VIA electrode penetrates between an inner edge and an outer edge of the ring-shaped dummy portion from the reverse surface to the obverse surface. Some island-shaped dummy portions are disposed inside of the inner edge of the ring-shaped dummy portion. |
| US12300542B2 |
Semiconductor device pre-cleaning
An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process. |
| US12300534B2 |
Method of forming protective layer utilized in silicon remove process
A method of forming a protective layer utilized in a silicon remove process includes bonding a first wafer to a second wafer, wherein the first wafer comprises a first silicon substrate with a first device structure disposed thereon and the second wafer comprises a second silicon substrate with a second device structure disposed thereon. After that, a first trim process is performed to thin laterally an edge of the first wafer and an edge of the second device structure. After the first trim process, a protective layer is formed to cover a back side of the second silicon substrate. After forming the protective layer, a silicon remove process is performed to remove only the first silicon substrate. |
| US12300517B2 |
Apparatus for treating substrate and temperature control method
The inventive concept provides a temperature controlling method. The temperature controlling method for controlling a temperature of a tank storing a treating fluid transferred to the chamber, comprises supplying the treating fluid to the inner space of the tank, heating the treating fluid at the inner space, and transferring the heated treating fluid to the chamber, wherein the temperature of the inner space is controlled based on a measured pressure of the inner space. |
| US12300511B1 |
Fabrication method for package structure
In a fabrication method for a package structure, a copper foil is provided, electroplating is performed on the copper foil to form a cavity sacrificial post, a dielectric material is laminated to form a dielectric layer, wherein an end face of the cavity sacrificial post is exposed to the dielectric layer, a wiring layer is formed on the dielectric layer, the cavity sacrificial post is removed by etching to form a through cavity, a bonding pad is formed on the wiring layer, a reverse side of a device is mounted on the copper foil in the through cavity, and a terminal of the device is wire-bonded with the bonding pad. |
| US12300510B2 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device includes the following steps. A channel layer and a barrier layer are sequentially formed on a substrate by an epitaxial process to form a semiconductor device. The channel layer includes a first III-V compound and the barrier layer includes a second III-V compound. The semiconductor device is disposed within a cavity. A high-pressure fluid is introduced into the cavity to perform a passivation treatment on defects of the semiconductor device with the high-pressure fluid. The high-pressure fluid is doped with a compound composed of at least one of nitrogen, oxygen, and fluorine. |
| US12300500B2 |
Etching of polycrystalline semiconductors
A method of processing a substrate that includes: performing a cyclic plasma etch process including a plurality of cycles, each of the plurality of cycles including: etching a patterning layer including a polycrystalline semiconductor material to form or extend a recess by exposing the substrate to a first plasma, the substrate including an oxide layer, the patterning layer formed over the oxide layer, exposing the substrate to a second plasma, the second plasma including dihydrogen, and extending the recess by exposing the substrate to a third plasma, the second plasma being different from the first plasma and the third plasma. |
| US12300499B2 |
Polishing solution, polishing apparatus, and polishing method
A polishing solution according to an embodiment includes an exothermic agent that generates heat through application of an alternating magnetic field thereto, and a viscosity modifier that undergoes a reversible phase transition between a gel state and a sol state depending on temperature. |
| US12300496B2 |
Deposition window enlargement
The present disclosure provides a method to enlarge the process window for forming a source/drain contact. The method may include receiving a workpiece that includes a source/drain feature exposed in a source/drain opening defined between two gate structures, conformally depositing a dielectric layer over sidewalls of the source/drain opening and a top surface of the source/drain feature, anisotropically etching the dielectric layer to expose the source/drain feature, performing an implantation process to the dielectric layer, and after the performing of the implantation process, performing a pre-clean process to the workpiece. The implantation process includes a non-zero tilt angle. |
| US12300494B2 |
Ion implantation process to form punch through stopper
Approaches herein provide devices and methods for forming optimized gate-all-around transistors. One method may include forming a well by directing a first ion species into a substrate of a device, forming a plurality of alternating first and second layers over the well, and forming a dummy gate and a spacer over the plurality of alternating first and second layers. The method may further include removing a portion of the plurality of alternating first and second layers to expose an upper surface of the well, forming a punch through stopper in the well by directing a second ion species into the exposed upper surface of the well, etching the plurality of nanosheets to laterally recess the second layers relative to the first layers, and forming an inner spacer along the first and second layers. |
| US12300490B2 |
Method of manufacturing integrated circuit device
A method of manufacturing an integrated circuit (IC) device, the method including forming an underlayer on a feature layer such that the underlayer includes an acid generator; forming an acid-containing underlayer by generating a first acid from the acid generator; forming a photoresist film on the acid-containing underlayer; generating a second acid in a first area of the photoresist film by exposing the first area of the photoresist film; diffusing the first acid from the acid-containing underlayer into the first area of the photoresist film; and forming a photoresist pattern by developing the photoresist film. |
| US12300487B2 |
Photoresist composition and method of forming photoresist pattern
A method of forming a photoresist pattern includes forming an upper layer including a floating additive polymer over a photoresist layer formed on a substrate. The photoresist layer is selectively exposed to actinic radiation. The photoresist layer is developed to form a pattern in the photoresist layer, and the upper layer is removed. The floating additive polymer is a siloxane polymer. |
| US12300485B2 |
Enhanced perovskite materials for photovoltaic devices
A perovskite material that has a perovskite crystal lattice having a formula of CxMyXz, and alkyl polyammonium cations disposed within or at a surface of the perovskite crystal lattice; wherein x, y, and z, are real numbers; C comprises one or more cations selected from the group consisting of Group 1 metals, Group 2 metals, ammonium, formamidinium, guanidinium, and ethene tetramine; M comprises one or more metals each selected from the group consisting of Be, Mg, Ca, Sr, Ba, Fe, Cd, Co, Ni, Cu, Ag, Au, Hg, Sn, Ge, Ga, Pb, In, Tl, Sb, Bi, Ti, Zn, Cd, Hg, and Zr, and combinations thereof; and X comprises one or more anions each selected from the group consisting of halides, pseudohalides, chalcogenides, and combinations thereof. |
| US12300484B2 |
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first oxide, an insulator over the first oxide, a first conductor over the insulator, a second conductor electrically connected to the first oxide, and a second oxide provided between the first oxide and the second conductor, and the contact area between the second oxide and the second conductor is larger than the contact area between the second oxide and the first oxide. |
| US12300483B2 |
Substrate treating apparatus
An apparatus for treating a substrate using a treating fluid in a supercritical state is provided. In a pressure increasing step of increasing a pressure in the treating space from a pressure lower than a critical pressure of the treating fluid to a treating pressure higher than the critical pressure, the apparatus controls a supply amount of the treating fluid supplied from a first supply port to control flow of the treating fluid supplied from the first supply port and then exhausted through an exhaust port. |
| US12300480B2 |
Shaped-channel scanning nozzle for scanning of a material surface
Systems and methods are described for introducing one or more fluid streams from a nozzle having one or more shaped channels to one or more material surfaces and removing the fluid streams for scanning for chemical species of interest. A nozzle embodiment includes, but is not limited to, a nozzle body configured to couple to a positionable nozzle arm support for positioning the nozzle with respect to a material surface, the nozzle body defining at least one fluid port to receive a fluid; and a nozzle hood coupled to the nozzle body, the nozzle hood defining an elongated shaped channel having a first fluid channel and a second fluid channel extending from the at least one fluid port, the first fluid channel and the second fluid channel configured to direct fluid along the material surface within at least a portion of each of the fluid channels. |
| US12300478B2 |
Simplification of method or system using scout MRM
Each sample of a series of samples is ejected at an ejection time and according to a sample order. Each ejected sample of the series is ionized, producing ion beam. A list of different sets of MRM transitions is received. Each set of the list corresponds to a different sample. A group of one or more different sets is selected from the list. Initially, each set selected for the group corresponds to a different sample of one or more first samples of the series. A mass spectrometer is instructed to execute each transition of each set of the group on the ion beam until a transition of a set of the group is detected, upon which, one or more next sets are selected from the list to be monitored using the set of the detected transition and the sample order. |
| US12300477B2 |
Autonomous operation of plasma processing tool
A method of operating a plasma tool includes executing a plasma process on a wafer. Data associated with the plasma process are measured using a plurality of sensors while the plasma process is executed on the wafer. The plasma process is terminated at an endpoint time. A post-process fault detection is executed by determining whether a post-process wafer state is within a target range. When the post-process wafer state is outside the target range so that a fault is detected, the fault is corrected using the data associated with the plasma process. |
| US12300476B2 |
Wafer placement table
A wafer placement table includes a ceramic base, an electrode (FR attraction electrode), a bonding terminal (power supply terminal), and an electrode lead-out portion. The ceramic base has an upper surface serving as a wafer placement surface. The FR attraction electrode is embedded in the ceramic base. The power supply terminal is inserted into the ceramic base from a lower surface of the ceramic base and penetrates a through-hole formed in the FR attraction electrode. The electrode lead-out portion is provided at each of two or more positions at intervals along a peripheral edge of the through-hole to be thicker than the FR attraction electrode and has an inner peripheral surface bonded to a side surface of the power supply terminal. |
| US12300475B2 |
Substrate support and substrate processing apparatus
There is provided a substrate support comprising: a base; a first flow path that opens on a bottom surface of the base at a central portion of the base; a second flow path that surrounds the first flow path and opens on the bottom surface of the base; at least one third flow path communicating with the first flow path and arranged from the central portion toward an outer peripheral portion of the base; and at least one fourth flow path communicating with the second flow path, arranged from the central portion toward the outer peripheral portion of the base, and communicating with the at least one third flow path at the outer peripheral portion of the base. |
| US12300474B2 |
Semiconductor substrate support power transmission components
Exemplary support assemblies may include an electrostatic chuck body defining a substrate support surface. The assemblies may include a support stem coupled with the electrostatic chuck body. The assemblies may include a heater embedded within the electrostatic chuck body. The assemblies may include an electrode embedded within the electrostatic chuck body between the heater and the substrate support surface. The assemblies may include a power transmission rod coupled with the electrode. The power transmission rod may include a material characterized by a coefficient of thermal expansion of less than or about 10×10−6/° C. |
| US12300472B2 |
Plasma processing apparatus and method
A plasma processing apparatus for semiconductor processing includes an injector holder configured to removably mate with a structure defining an interior chamber of a plasma processing apparatus. The injector holder defines a first opening. A sleeve is configured to be received within the first opening, and the sleeve defines a second opening. A gas injector is configured to be received within the second opening of the sleeve. |
| US12300465B2 |
Plasma processing apparatus
A plasma processing apparatus includes a plasma processing chamber, a substrate support including a bias electrode, an RF power source configured to generate RF power to generate plasma in the plasma processing chamber, an edge ring disposed to surround a substrate on the substrate support, a ring electrode disposed to surround the edge ring, a first bias RF power source and a second bias RF power source. The first bias RF power source is configured to supply a first bias RF power to the bias electrode, the first bias RF power having a first frequency and a first power level. The second bias RF power source is configured to supply a second bias RF power to the ring electrode, the second bias RF power having the first frequency and a second power level and the second bias RF power being synchronized with the first bias RF power. |
| US12300464B2 |
Robust tensorized shaped setpoint waveform streaming control
Various illustrative aspects are directed to a system. The system comprises a setpoint waveform streaming progenitor module, configured to receive inputs indicative of a desired setpoint waveform, and to output a data package based at least in part on the inputs indicative of the desired setpoint waveform, wherein the data package comprises a plurality of points, an interpolation method, and one or more interpolation parameters. The system further comprises a setpoint waveform streaming processing module, configured to receive the data package from the setpoint waveform streaming progenitor module, and to output a streaming setpoint waveform based at least in part on the data package. |
| US12300460B2 |
Power adjustment method of upper electrode power supply and semiconductor process apparatus
The present disclosure provides a power adjustment method of an upper electrode power supply of a semiconductor process apparatus. The method includes obtaining a processing load of an upper electrode power supply of a reference process chamber and a processing load of an upper electrode power supply of a current process chamber corresponding to semiconductor process step, when starting to perform a semiconductor process step, determining a power compensation coefficient for the current process chamber relative to the reference process chamber based on the processing load of the current process chamber and the processing load the reference process chamber, and controlling the upper electrode power supply to output compensation power. The compensation power is a product of the set power of the upper electrode power supply of the current process chamber corresponding to the semiconductor process step and the corresponding power compensation coefficient. |
| US12300458B2 |
Objective lens system for fast scanning large FOV
The device includes a beam source for generating an electron beam, a beam guiding tube passed through an objective lens, an objective lens for generating a magnetic field in the vicinity of the specimen to focus the particles of the particle beam on the specimen, a control electrode having a potential for providing a retarding field to the particle beam near the specimen to reduce the energy of the particle beam when the beam collides with the specimen, a deflection system including a plurality of deflection units situated along the optical axis for deflecting the particle beam to allow scanning on the specimen with large area, at least one of the deflection units located in the retarding field of the beam, the remainder of the deflection units located within the central bore of the objective lens, and a detection unit to capture secondary electron (SE) and backscattered electrons (BSE). |
| US12300456B2 |
Switching devices incorporating rupture disk
Electrical switching devices are disclosed that have pressure relief mechanisms to allow for the release of internal pressure within the switching device housing. The pressure within the housing can be caused by different events with one such event being internal arcing within the housing caused during operation of the housing's internal components. Is some cases the arcing can be caused during separation of the switching device contacts. The pressure relief mechanism allows for the high pressure to pass from the housing in a more controlled matter to minimize or prevent high pressure breach or rupture of the switching device housing. The pressure relief mechanisms are particularly applicable to switching devices with hermetically sealed housings. Many different pressure relief mechanisms can be used including rupture disks or engineered weak points in the switching device housing. |
| US12300451B2 |
Electronic switching device and system
The present invention is directed to an electronic switch device, the device including a housing assembly including a front cover assembly having a user accessible surface, a back body assembly, terminals configured to be coupled to an AC power source and the load; an antenna assembly including an antenna substrate disposed inside the housing assembly adjacent a portion of the front cover assembly, an antenna being disposed on the antenna substrate having a conductive grid structure; and a circuit assembly disposed inside the housing assembly coupled to the terminals, the circuit assembly comprising a printed circuit board, the printed circuit board including a ground plane, the circuit assembly being electrically connected to the antenna assembly via a conductor, the printed circuit board being separated from the antenna assembly by a predetermined distance, the circuit assembly including a relay switch having at least one solenoid winding connected to the circuit assembly and a set of contacts. |
| US12300447B2 |
Remote switch-off mechanism and rotary switch
A remote switch-off mechanism and a rotary switch relates to the field of electrical technologies. A housing, an energy storage component, and a tripping component are provided. The energy storage component includes a latch, an energy storage spring, a rotating shaft, and an energy storage panel connected to the rotating shaft, an abutting portion is disposed on the energy storage panel, a first end of the energy storage spring is clamped to the housing, and a second end of the energy storage spring abuts against the abutting portion. The latch includes a hinged portion hinged to the housing, a limiting portion for limiting the second end of the energy storage spring, and a tripping portion that cooperates with the tripping component, and an elastic member is disposed between the latch and the housing, so that the tripping portion has a trend of moving toward the tripping component. |
| US12300445B2 |
Electrolytic capacitor
An electrolytic capacitor includes a capacitor element and a liquid component, wherein the capacitor element includes an anode body having a dielectric layer on a surface thereof, and a conductive polymer compound covering at least a portion of the dielectric layer. The liquid component includes an acid component, a base component, a solvent, and an antioxidant. The solvent includes water and a polyol compound. The acid component includes a coordination compound including a central atom, and an organic molecule having a plurality of coordination atoms bonded to the central atom, and at least one of the plurality of coordination atoms is an oxygen atom bonded to a carbonyl group. |
| US12300444B2 |
Stable electrolyte material and solvent material containing same
A composition of matter having the following chemical structure: [ H x O ( x - 1 ) 2 ] Z y wherein x is an odd integer ≥3; y is an integer between 1 and 20; and Z is one of a monoatomic ion from Groups 14 through 17 having a charge value between −1 and −3 or a polyatomic ion having a charge between −1 and −3. |
| US12300441B2 |
Multilayer ceramic electronic component with glass grains in side margin
A ceramic electronic component includes a multilayer body in which internal electrodes are stacked in a first axis direction, the multilayer body having side faces perpendicular to a second axis direction that is orthogonal to the first axis direction, ends of the internal electrodes being positioned at the side faces and aligned within a range of 0.5 μm in the second axis direction; and side margin portions covering the side faces, respectively, the side margin portions including a ceramic polycrystal as a main component and glass grains dispersed in the polycrystal, a total volume ratio of the glass grains with respect to the polycrystal being 1% or more and 20% or less, a median diameter of the glass grains is 0.20 μm or more and less than 0.75 μm, and is 90% or more of a median diameter of crystal grains constituting the polycrystal. |
| US12300439B2 |
Multi-terminal multilayer capacitor
A multi-terminal multilayer capacitor includes first vias and second vias extending in first and second internal electrodes in a stacking direction, a first slit extending between the first via and a first insulating portion that insulates the second via and the first internal electrode from each other, and a second slit extending between the second via and a second insulating portion that insulates the first via and the second internal electrode from each other. The first via electrically connects regions of the first internal electrode split by the first slit, and the second via electrically connects regions of the second internal electrode divided by the second slit. |
| US12300437B2 |
Ceramic electronic device and manufacturing method of the same
A ceramic electronic device includes a multilayer chip in which dielectric layers and internal electrode layers are alternately stacked. The internal electrode layers include a main component element and a sub-element. The dielectric layers include a plurality of crystal grains. A segregation portion, in which the sub-element is segregated in shell portions and a grain boundary of the plurality of crystal grains and a sub-element concentration is 1.5 times or more as that in an entire of each of the dielectric layers, is formed. near an interface between each of the internal electrode layers and each of the dielectric layers, each of the internal electrode layers has a high concentration layer, in which the sub-element concentration is 1.5 times or more as that in an entire of each of the internal electrode layers. |
| US12300435B2 |
Capacitor module, power conversion device, and motor assembly including same
The present disclosure provides a capacitor module including: a capacitor; a first housing having a hexahedron shape and having an inner space in which the capacitor is disposed, the first housing including a pair of cooling parts recessed inwards from a pair of parallel surfaces among outer side surfaces thereof such that a refrigerant flows, a pair of cooling channels disposed inside opposite side surfaces perpendicular to the surfaces of the pair of cooling parts such that the pair of cooling parts communicate with each other, and a through-hole configured to connect each of the cooling channels to the outside such that the refrigerant is introduced or discharged therethrough; and a cooling plate coupled to the first housing so as to seal the cooling parts. |
| US12300428B2 |
Dual mode wireless power system designs
Electronic devices according to embodiments of the present technology may include a battery. The devices may include a nanocrystalline foil. The devices may include a wireless charging coil seated on the nanocrystalline foil. The devices may also include an integrated circuit configured to operate the wireless charging coil in a wireless charging transmission mode. |
| US12300427B2 |
System-on-chip with a plurality of chips communicating wirelessly using horizontal inductive coupling
An information processing device is provided that can more flexibly adapt to changes in shape and mounting configuration. The information processing device has a plurality of chips that are integrated in the horizontal direction. A transmission coil and reception coil pair is formed in each of the plurality of chips, and each of the plurality of chips uses horizontal inductive coupling to achieve wireless connection between the chips. |
| US12300426B1 |
Systems and methods for amplifying power
Systems and methods for amplifying power, voltage, and current are provided. A system can include one or more inductors, each inductor including a magnetic core, a primary winding, and a secondary winding. The secondary winding can include two secondary winding wires, and the secondary winding wires can be connected to each other by a connection wire. |
| US12300424B2 |
Stacked electronic structure
A stacked electronic structure, including a substrate, wherein electronic devices are disposed on the substrate, and a molding body encapsulates the electronic devices, wherein a first thermal conductive layer is disposed on a first electronic device, and a second thermal conductive layer is disposed on a second electronic device, wherein a magnetic device comprising a magnetic body is disposed over a top surface of the molding body, wherein at least one third thermal conductive layer is disposed on the magnetic body, and the first thermal conductive layer and the second thermal conductive layer are respectively connected with the at least one third thermal conductive layer for dissipating heat. |
| US12300419B2 |
Split winding assembly for a transformer
A split winding assembly for a transformer is configured to extend along a main limb of a transformer core between a first end and a second end. The split winding assembly includes a first split winding section extending from the first end toward a midpoint of the split winding assembly and a second split winding section extending from the second end toward the midpoint of the split winding assembly along the main limb of a transformer core. The first split winding section includes a first inner winding section configured to surround the main limb of the transformer core and a first outer winding section surrounding the first inner winding section. The second split winding section includes a second inner winding section configured to surround the main limb of the transformer core and a second outer winding section surrounding the second inner winding section. |
| US12300417B2 |
Electronic component and information reading method
An element body includes a metal-particle-dispersed body in which metal particles are dispersed, the metal-particle-dispersed body includes a display region on a surface, and the display region includes a display pattern in which a resin exposed portion where a resin appears on a surface and a metal exposed portion where the metal particles appear on the surface are alternately repeated. |
| US12300415B2 |
Coil component
Disclosed herein is a coil component that includes a substrate having a first surface, and a first coil pattern formed on the first surface of the substrate. The first coil pattern includes a plurality of turns having an innermost turn and an outermost turn. Each of the innermost and outermost turns is radially divided into a plurality of lines. The innermost turn is greater in a number of lines than the outermost turn. |
| US12300414B2 |
Coil component
A coil component includes a drum-shaped core that includes a flange portion, a metal terminal that is mounted on the flange portion and that is formed from a metal plate, and an adhesive layer that contacts both a rising portion of the metal terminal and a rising surface of the flange portion. The adhesive layer includes a thick-walled portion and a thin-walled portion having different thicknesses. |
| US12300406B2 |
Wiring member
A wiring member includes: a flat wiring member including a plurality of terminal parts; and a plurality of identification parts provided to correspond to some of the plurality of terminal parts, wherein the plurality of identification parts are made to each provide a piece of identification information different from each other, the flat wiring member can change a form between a folding form of being folded and a developed form of extending larger than the folding form, and the plurality of identification parts are provided in the flat wiring member so that a distribution region of the plurality of identification parts in the folding form is smaller than a distribution region of the plurality of identification parts in the developed form. |
| US12300405B2 |
Electronic functional member and strain sensor
[Problem] To provide an electronic functional member having high stretch-resistance. [Solution] An electronic functional member provided with: fibers formed in web-like shape and configuring a fiber web; a coating film coating the fibers and having a Young's modulus smaller than that of the fibers; and an electrically conductive film formed on the surface of the coating film. |
| US12300403B2 |
Method of manufacturing electrical cable, and resulting product, with reduced required installation pulling force
Disclosed are cable types, including a type THHN cable, the cable types having a reduced surface coefficient of friction, and the method of manufacture thereof, in which the central conductor core and insulating layer are surrounded by a material containing nylon or thermosetting resin. A silicone based pulling lubricant for said cable, or alternatively, erucamide or stearyl erucamide for small cable gauge wire, is incorporated, by alternate methods, with the resin material from which the outer sheath is extruded, and is effective to reduce the required pulling force between the formed cable and a conduit during installation. |
| US12300401B1 |
Metal-clad multi-circuit electrical cable assembly
An electrical cable assembly comprising a first electrical circuit comprising at least two insulated conductors, a second electrical circuit, and a conductive metallic armor encasing the first and second electrical circuits, wherein the conductive metallic armor provides a return ground path. The second electrical circuit comprising at least two control insulated conductors, a jacket surrounding the control insulated conductors, and a wrap surrounding the jacket which is surrounding the control insulated conductors. |
| US12300395B2 |
Servicing a nuclear reactor module
A system for servicing a nuclear reactor module comprises a crane operable to attach to the nuclear reactor module, wherein the crane includes provisions for routing signals from one or more sensors of the nuclear reactor module to one or more sensor receivers. |
| US12300392B2 |
Determining a next-best action across medical conditions
A computational evidence platform extracts clinical concepts from medical evidence sources and creates a database of elemental diagnostic factors and elemental investigations links to medical conditions. Input from a person groups factors and investigations makes corrections and adds a ranking Elemental factors and investigations do not include information specific to their associated conditions but include synonyms and a link to a medical ontology. A patient state is determined by extracting patient known diagnostic factors and investigation results from the patient chart. These known factors and results are matched to the database and a ranking of likely conditions are output. Next-best actions per condition are output by determining factors not yet known and investigations not yet performed. Next-best actions across conditions are determined by performing a recursive tree search of the database and assuming that unknown factors are now known to generate a score for each assumption. |
| US12300391B2 |
Selecting a treatment for a patient
Methods and systems for selecting a treatment for a patient. The system extracts an incidental finding from a record associated with a patient and an associated follow-up recommendation. The system then determines whether any inconsistencies exist between the follow-up recommendation from the report and a follow-up recommendation prescribed by institutional or administrative guidelines. Any inconsistencies may then be resolved to guarantee an appropriate workflow for patient care. |
| US12300390B1 |
Combining structured data records generated using an extraction neural network to generate textual outputs
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for filtering a collection of structured data records generated by an extraction neural network to enable generation of a response to a query. According to one aspect, there is provided a method that includes receiving a request to generate an article directed to a topic, where the request includes a target text string for a semantic category, standardizing the target text string for the semantic category, filtering the collection of structured data records based on the standardized target text string to identify a subset of structured data records that are relevant to the topic, and processing the subset of structured data records to generate the article directed to the topic. |
| US12300389B2 |
Digital twin manager
A method, a structure, and a computer system for digital twin management. The exemplary embodiments may include gathering data corresponding to one or more bodily tissues and generating one or more digital twin versions of the one or more bodily tissues. In addition, the exemplary embodiments may further include identifying a most appropriate digital twin version of the one or more digital twin versions based on a health and a compatibility of the one or more digital twin versions, and distributing the most appropriate digital twin version. |
| US12300377B2 |
Systems and methods for transmitting electronic data across networks
Systems and methods are disclosed for preserving patient privacy while allowing health data to be analyzed, managed, and stored in different geographical areas. One method for managing cross-border health data while preserving patient privacy includes: receiving a DICOM object from a hospital computing device for analysis; generating a unique case identifier for the DICOM object; validating the received DICOM object; if, based on the validation, the received DICOM object is valid, anonymizing the received DICOM object; updating the anonymous DICOM object to include the unique case identifier; compressing the updated DICOM object; and sending the compressed DICOM object to at least one data analysis web service(s). |
| US12300376B2 |
Characterizing soft tissue stress for ameliorating injury in performing a process
Techniques for obtaining materials science properties of soft tissue for use in a damage model for ameliorating injuries in an individual performing a process are presented. The techniques can include obtaining physical parameters characterizing the soft tissue of the individual under each of a plurality of loading conditions, fitting a soft tissue damage model based on the parameters, and ameliorating injury in performing the process by implementing guidelines based on the soft tissue damage model. |
| US12300375B2 |
Early meal detection and calorie intake detection
Disclosed are examples of a device, a system, methods and computer-readable medium products operable to implement functionality to determine and respond to a purpose of a meal. An algorithm or application may receive data that may include data related to a meal purpose from data sources and determine whether any of the data received from the plurality of data sources was received from a direct data source or an indirect data source. The data may be evaluated to determine a purpose of the meal. Based on the results of the evaluation, instructions may be generated to provide an appropriate response based on the determined purpose of the meal. The generated instructions to provide the appropriate response based on the determined purpose of the meal may be output. |
| US12300374B2 |
Operation profile systems and methods for a computer-assisted surgical system
An operation profile system may collect surgical session data representative of surgical procedure operations performed during a surgical session and may access operation pattern data representative of multiple historical patterns of surgical procedure operations. The system may identify, based on the operation pattern data and the surgical session data, a first historical pattern included in the multiple historical patterns of surgical procedure operations and that matches a first collected pattern from the surgical procedure operations. The system may provide, for use during the surgical session, a first operation profile associated with the first historical pattern that matches the first collected pattern. |
| US12300373B2 |
Patient care unit order confirmation
The disclosed systems and methods provide patient care unit (PCU) order confirmation. A method may include authorizing a user to operate a medication delivery device. The method may also include retrieving, in response to the authorizing, a user history associated with the user, wherein the user history includes one or more dispensing records for pending medications. The method may also include determining, based on a context that includes the user history, one or more medication order candidates for present administration. The method may also include presenting a user interface for confirming a medication order from the one or more medication order candidates. The method may also include configuring at least one parameter of the medication delivery device based on the confirmed medication order received from the user interface. |
| US12300371B1 |
Decentralized identity authentication framework for distributed data
Disclosed is a method for authenticating requestors and granting access to a permissioned blockchain network shared among enterprise entities. A decentralized registry of credentialled users, in which credentialled users guard their own access information by keeping a private key of a public-private keypair enables systems to avoid keeping information of a large number of users in large, vulnerable containers. A further method removes authenticated users seeking to be forgotten from the registry of users and deletes any personally identifiable information of the withdrawing users. |
| US12300369B2 |
System and method for reporting on medical images
The invention relates to a system, a corresponding method and a corresponding computer program product for reporting on medical images. The system comprises: means (1) for receiving one or more medical images (3), means (5) for receiving and/or creating a machine-readable structured report (7), an image display (9) configured to display the received one or more medical images (3), a report display (13) configured to display the received and/or created machine-readable structured report (7), means (17) for providing a floating user-interface (UI) window (19), and means (23) for updating and/or filling structured-report elements (25) of the received and/or created machine-readable structured report (7). The system is configured to identify and follow the focus of a user of the system and, based on the identified focus, to assign a section of the image display (9) as an active image-display section (27). The means for providing a floating UI window (17) are configured to position the floating UI window (19) in proximity of the active image-display section (27). The means for providing a floating UI window (17) are further configured to (i) display context-dependent content (33) within the floating UI window (17) and/or (ii) to allow the user to select via the floating UI window (17) one or more next steps within a workflow of reporting on the received one or more medical images. The means for updating and/or filling structured-report elements (23) are adapted such that the structured report elements (25) are automatically updated and/or filled based on the one or more workflow steps selected by the user. |
| US12300367B2 |
Medical information lookup patch and method therefor
A medical lookup patch, for application to a medical device, includes a substrate having a front, a back, and a perimeter edge defined therebetween. The patch includes an engagement element of a hook-and-loop engagement system on the back of the substrate, for engaging with a complemental engagement element on the medical device. The front of the substrate includes first, second, and third information areas. Brand information is displayed in the first information area, and instructive information is displayed in the second information area. Lookup information is displayed in the third information area and defines a machine-readable code which, when processed by a machine, directs the machine to display human-readable information different from the lookup information. |
| US12300366B2 |
Multi-services application gateway and system employing the same
An intelligent gateway device provided at a premise (home or business) for providing and managing application services associated with use and support of a plurality of digital endpoint devices associated with the premises. The device includes a communications and processing infrastructure integrated with a peer and presence messaging based communications protocol for enabling communications between the device and an external support network and between the device and connected digital endpoint devices. A services framework at the gateway device implements the communications and processing infrastructure for enabling service management, service configuration, and authentication of user of services at the intelligent gateway. The framework provides a storage and execution environment for supporting and executing received service logic modules relating to use, management, and support of the digital endpoint devices. Thus, the gateway device provides a network-based services point of presence for a plurality of digital endpoint devices at the premises. |
| US12300354B2 |
Wordline driver circuit and memory
Embodiments relate to the field of semiconductors and provide a wordline driver circuit and a memory. The wordline driver circuit may at least include a plurality of wordline drivers. Each of the plurality of wordline drivers includes a corresponding PMOS transistor and an NMOS transistor, the plurality of PMOS transistors included in the plurality of wordline drivers are arranged side by side, and the plurality of NMOS transistors included in the plurality of wordline drivers are arranged side by side. In an arrangement direction of the plurality of PMOS transistors, the plurality of PMOS transistors are positioned on the same sides of the plurality of NMOS transistors. |
| US12300348B2 |
Method for signal transmission, circuit and memory
A circuit for signal transmission, memory, and method for signal transmission are provided. The circuit includes: a signal processing circuit, configured to receive an input first signal, obtain a second signal by processing the first signal in a preset processing manner, and take the second signal as an output signal of the signal processing circuit; and a selection circuit, configured to receive the input first signal, the second signal and a control signal, and take the first signal or the second signal as an output signal of the selection circuit according to the control signal. |
| US12300347B2 |
Reconfigurable memory module designed to implement computing operations
The present description concerns a memory module (100) adapted to implementing computing operations, the module comprising a plurality of elementary blocks (110) arranged in an array according to rows and columns, wherein: each elementary block (110) comprises a memory circuit (111) adapted to implementing computing operations, and a configurable transfer circuit (113); each configurable transfer circuit (113) is parameterizable to transmit data originating from a first transmit elementary block to a receive elementary block of a same column of elementary blocks via at least one link bus; an internal control circuit (120) is connected to an input-output port (123) of the module; and the internal control circuit (120) is configured to read at least one instruction signal from the input-output port (123) of the module and accordingly parameterize the configuration of the configurable transfer circuits (113), and define the size of the operand vectors of the computing operations. |
| US12300346B2 |
High-bandwidth memory module architecture
A high-bandwidth dual-inline memory module (HB-DIMM) includes a plurality of memory chips, a plurality of data buffer chips, and a register clock driver (RCD) circuit. The data buffer chips are coupled to respective sets of the memory chips and transmit data from the memory chips over a host bus at a data rate twice that of the memory chips. The RCD circuit includes a host bus interface and a memory interface coupled to the plurality of memory chips. The RCD circuit implements commands received over the host bus by routing command/address (C/A) signals to the memory chips for providing at least two independently addressable pseudo-channels, the RCD circuit addressing each respective pseudo-channel based on a chip identifier (CID) bit derived from the C/A signals. |
| US12300345B2 |
Area-efficient, width-adjustable signaling interface
A lateral transfer path within an adjustable-width signaling interface of an integrated circuit component is formed by a chain of logic segments that may be intercoupled in different groups to effect the lateral data transfer required in different interface width configurations, avoiding the need for a dedicated transfer path per width configuration and thereby substantially reducing number of interconnects (and thus the area) required to implement the lateral transfer structure. |
| US12300344B2 |
Memory device, memory device test method, and test system
A memory device according to an embodiment includes a memory cell array; a timing circuit configured to generate a first clock signal and a second clock signal, the second clock signal having a frequency that is i-times the frequency of the first clock signal; a command decoder configured to receive On-The-Fly (OTF) data including a plurality of OTF bits; a receiver configured to receive input data, sample the input data based on the first clock signal, and generate a first signal based on the sampled input data; a deserializer configured to generate a first deserialized signal from the first signal based on the second clock signal; a data pattern generator configured to generate a pattern signal based on the first deserialized signal and the OTF data based on the second clock signal; and a decoder configured to transmit the pattern signal to the memory cell array. |
| US12300339B2 |
Performing memory testing using error correction code values
A system includes a memory component and a processing device operatively coupled with the memory component. The processing device performs a test of the memory component by generating an error correction code (ECC) value for an initial operation of the test based on an address in the memory component on which the initial operation of the test is performed, generating ECC values for subsequent operations of the test, and reporting the ECC value generated for the last of the subsequent operations of the test in an event log. The ECC value for each respective subsequent operation of the test is generated based on an address in the memory component on which that respective subsequent operation of the test is performed, and the ECC value generated for the operation of the test that was performed immediately before that respective subsequent operation. |
| US12300333B2 |
Semiconductor memory device capable of shortening erase time
In a memory cell array, a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines are arranged in a matrix. A control circuit controls the potentials of said plurality of word lines and said plurality of bit lines. In an erase operation, the control circuit erases an n number of memory cells (n is a natural number equal to or larger than 2) of said plurality of memory cells at the same time using a first erase voltage, carries out a verify operation using a first verify level, finds the number of cells k (k≤n) exceeding the first verify level, determines a second erase voltage according to the number k, and carries out an erase operation again using the second erase voltage. |
| US12300324B2 |
Super short channel nor flash cell array and programming method thereof
A Super Short Channel NOR-type (SSC NOR) flash array is disclosed. Upon the new Channel Induced Ternary Electron programming scheme for resolving the punch-through issue caused by the gate short channel of NVM cell devices, the gate length of NVM cell devices can be further shrunk below 100 nm for NOR flash array. The cell device of SSC NOR flash can be then scaled down to achieve the minimum cell sizes between 4F2 to 5F2, where F is the minimum feature size of a process technology node below 100 nm. In comparison with conventional NOR flash, the SSC NOR flash improves memory density resulting in cost reduction per bit storage. While on the benefit of increasing memory density and storage cost reduction, the invention preserves the typical NOR-type flash advantages over NAND flash on fast nanosecond-range access time, low operating voltages, and high reliability. |
| US12300322B2 |
Selective increase and decrease to pass voltages for programming a memory device
A memory device comprising a memory array and control logic operatively coupled with the memory array. The control logic is to: detect a program operation directed at a selected wordline of multiple wordlines of the memory array; determine, during an initial phase of the program operation, whether a program voltage being applied to the selected wordline satisfies a threshold program voltage; add, in response to the program voltage not satisfying the threshold program voltage, a base offset voltage to an initial pass voltage to generate a higher pass voltage, the initial pass voltage being a percentage of an initial program voltage; and cause the higher pass voltage to be applied to a remainder of the multiple wordlines other than the selected wordline. |
| US12300321B2 |
Tracking operations performed at a memory device
A system includes a memory device and a processing device coupled to the memory device. The processing device is to perform operations including determining whether one or more memory access operations performed on a range of consecutive wordlines of a memory device satisfy one or more criteria. The operations further include, responsive to determining that the one or more memory access operations satisfy the one or more criteria, causing a memory management operation to be performed at each wordline of the range of consecutive wordlines of the memory device. |
| US12300320B2 |
Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes a control circuit configured to control a soft program operation of setting nonvolatile memory cells to a first threshold voltage distribution state of the nonvolatile memory cells. When a characteristic of the nonvolatile memory cells is in a first state, the control circuit executes the soft program operation by applying a first voltage for setting the nonvolatile memory cells to the first threshold voltage distribution state to first word lines, and applying a second voltage higher than the first voltage to a second word line. When the characteristic of the nonvolatile memory cells is in a second state, the control circuit executes the soft program operation by applying a third voltage equal to or lower than the first voltage to the first word lines and applying a fourth voltage lower than the second voltage to the second word line. |
| US12300316B2 |
Cascoded sense amplifiers for self-selecting memory
Systems and methods for operating a memory include a sensing circuitry connected to a memory cell through an address decoder, a precharge circuitry configured to be connected to the sensing circuitry during a precharge stage and at least partially disconnected from the sensing circuitry during a sensing stage immediately following the precharge stage, and a reference voltage provided to the precharge circuitry, wherein the reference voltage is mirrored to the memory cell by mirroring a current flowing from the precharge circuitry with a current flowing from the sensing circuitry during the precharge stage. |
| US12300312B2 |
Pre-charging bit lines through charge-sharing
In one embodiment, a static random access memory (SRAM) device is provided. The SRAM device includes a memory cell, a bit line couple to the memory cell, a voltage supply line coupled to the memory cell, a control circuitry. The control circuitry is configured to charge a voltage supply line while the voltage supply line is electrically isolated from a bit line. A portion of the charge is transferred from the voltage supply line to the bit line. The voltage supply line is recharged while the voltage supply line is electrically isolated from the bit line storing the transferred portion of the charge. The memory cell is accessed using the recharge on the voltage supply line. |
| US12300311B1 |
Multipurpose wordline underdrive circuits, devices, and systems
A multipurpose wordline underdrive circuit includes a wordline driver and a pulldown network. The pulldown network includes a first current-carrying terminal electrically coupled to the wordline driver and a second current-carrying terminal electrically coupled to a control signal. The pulldown network also includes a current-regulation terminal electrically coupled to an additional control signal. Various other devices, systems, and methods are also disclosed. |
| US12300307B2 |
Memory systems and methods for improved power management
A memory module with multiple memory devices includes a buffer system that manages communication between a memory controller and the memory devices. Each memory device supports an access mode and a low-power mode, the latter used to save power for devices that are not immediately needed. The module provides granular power management using a chip-select decoder that decodes chip-select signals from the memory controller into power-state signals that determine which of the memory devices are in which of the modes. Devices can thus be brought out of the low-power mode in relatively small numbers, as needed, to limit power consumption. |
| US12300303B2 |
Signal skew in source-synchronous system
A memory controller integrated circuit includes a clock signal generator circuit configured to generate a plurality of strobe signals. The memory controller integrated circuit further includes a memory interface circuit coupled to the clock signal generator circuit, the memory interface circuit configured to transmit the plurality of strobe signals to a memory module, wherein each of the plurality of strobe signals is offset with respect to an adjacent strobe signal, and transmit a plurality of data signals to the memory module, wherein a first subset of the plurality of data signals comprises a first nibble and is phase aligned with a first strobe signal of the plurality of strobe signals, and wherein a second subset of the plurality of data signals comprises a second nibble and is phase aligned with a second strobe signal of the plurality of strobe signals. |
| US12300300B2 |
Bank-level self-refresh
Described apparatuses and methods relate to a bank-level self-refresh for a memory system. A memory device can include logic that implements self-refresh operations in the memory device. The logic may perform self-refresh operations on a set of banks of the memory device that is less than all banks within the memory device. The set of banks of the memory device may be determined such that the peak current in a power distribution network of the memory device is bounded when the self-refresh operation is performed. Accordingly, bank-level self-refresh can reduce a cost of the memory device of a memory system by enabling use of a less complicated power distribution network. The bank-level self-refresh may also be implemented with different types of refresh operations. Amongst other scenarios, bank-level self-refresh can be deployed in memory-expansion environments. |
| US12300299B2 |
Ferroelectric memory reference generation
A FRAM memory device can include a plurality of FRAM memory cells, each FRAM memory cell including one transistor and one capacitor electrically coupled to the at least one transistor. The capacitor can be configured to store a bit of data. The memory device can also include a local bit-line configured to carry data to be read from or written to the plurality of memory cells. The memory device can further include a global bit-line configured to communicate with the local bit-line to carry the data to be read or written to the plurality of memory cells. The memory device can additionally include a local sense amplifier configured to amplify a signal in the local bit-line and transfer the amplified signal to the global bit-line based on a reference signal. The memory device can also include an amplifier or a buffer configured to provide the reference signal to drive a plurality of local sense amplifiers including the local sense amplifier. |
| US12300297B1 |
Memory array with buried or backside word-line
A memory is described having a plurality of bit-cells organized in a row or column. An individual bit-cell of the plurality of bit-cells includes an access transistor and a plurality of capacitors. A word-line is positioned under the access transistor, wherein the access transistor is controllable by the word-line, whereas the plurality of capacitors is positioned above the access transistor. The individual bit-cell has an individual boundary which substantially abuts a neighboring bit-cell in the row or column such that there is no dummy bit-cell between individual bit-cell and the neighboring bit-cell. |
| US12300293B2 |
Method for writing to magnetic random access memory
A method of manufacturing an array of magnetic random access memory cells includes writing to a magnetic random access memory cell. The writing to a memory cell includes determining an optimum write current for the array of memory cells, and applying the optimum write current to a first memory cell in the array. A first read current is applied to the first memory cell to determine whether a magnetic orientation of the first memory cell has changed in response to applying the optimum write current. A second write current is applied to the first memory cell when the magnetic orientation of the first memory cell has not changed. The second write current is different from the optimum write current. A second read current is applied to the first memory cell to determine whether the magnetic orientation of the first memory cell changed in response to applying the second write current. |
| US12300292B2 |
Magnetic random access memory structure
A magnetic random access memory (MRAM) structure is provided. The MRAM structure includes a first write electrode, a first magnetic tunnel junction (MTJ) stack, a voltage control electrode, a second MTJ stack, and a second write electrode. The first MTJ stack includes a first free layer disposed on the first write electrode, a first tunnel barrier layer disposed on the first free layer, and a first fixed layer disposed on the first tunnel barrier layer. The voltage control electrode is disposed on the first MTJ stack. The second MTJ stack includes a second fixed layer disposed on the voltage control electrode, a second tunnel barrier layer disposed on the second fixed layer, and a second free layer disposed on the second tunnel barrier layer. The second write electrode is disposed on the second MTJ stack. |
| US12300290B2 |
Optical data transfer
In an optical data transfer system, a beam modulator is configured to embed a set of data in an input beam. A multimode optical waveguide network has an in-coupling region for receiving the input beam. The multimode optical waveguide network is configured to guide the input beam to an out-coupling region of the multimode optical waveguide network. A spatial coherent detector is configured to measure a phase and an amplitude of an output optical field at multiple locations. The output optical field is at least partially defined by the input beam and thus exhibiting distortion effects caused by the passage of the beam through the multimode waveguide network. Signal processing is applied to an output of the spatial coherent detector, in order to compensate for the distortion effects, and thereby recover, from the output of the spatial coherent detector, the set of data embedded in the input beam. |
| US12300284B1 |
Single data band data storage
Provided are a computer program product, device, system, and method for single data band data storage. In one embodiment, a tape head module has an array of four servo transducer elements for each servo band of a tape and an array of reader/writer transducer elements extending over most of the width of the tape. In another embodiment, a data storage tape has a top servo band positioned adjacent a top edge guard band of the tape, a bottom servo band positioned adjacent a bottom edge guard band of the tape, and a single data band positioned between the top and bottom servo bands and configured to receive tracks of data written by a tape head wherein the single data band width extends over most of the tape width. |
| US12300281B2 |
Hard disk drive gimbal design with high torsion frequencies
A trace gimbal is described herein. In some embodiments, the trace gimbal includes outer struts including a front outrigger at a distal end of the trace gimbal and a rear outrigger at a proximal end of the trace gimbal. The front outrigger includes a distal front outrigger and a proximal front outrigger, and the rear outrigger includes a distal rear outrigger and a proximal rear outrigger. The trace gimbal further includes a middle strut extending in a width direction of the trace gimbal and adjoining the proximal front outrigger to the rear outrigger, and an inner strut connecting the middle strut to a slider tongue. The inner strut and the middle strut adjoin the outer gimbal struts to the slider tongue. |
| US12300278B2 |
Magnetic disk device and write method
According to one embodiment, a magnetic disk device configured to record data in a shingled-recording manner, wherein the device performs sequential write in a shingled-recording area on a magnetic disk such that data to be written in a write target track and data located in a one-forward track of the write target track are received on a volatile memory and then write with respect to the write target track is performed, and upon occurrence of an unexpected power cut, the device stores data unwritten in the shingled-recording area out of the data received on the volatile memory in a nonvolatile memory. |
| US12300276B2 |
Magnetic tape having characterized magnetic layer, magnetic tape cartridge, and magnetic tape apparatus
Provided is a magnetic tape, in which, in an environment of a temperature of 23° C. and a relative humidity of 50%, an AlFeSil abrasion value45° of a magnetic layer surface measured at a tilt angle of 45° of an AlFeSil square bar is 20 μm or more and 50 μm or less, standard deviation of an AlFeSil abrasion value of the magnetic layer surface measured at each of tilt angles of 0°, 15°, 30°, and 45° of the AlFeSil square bar is 30 μm or less. The tilt angle of the AlFeSil square bar is an angle formed by a longitudinal direction of the AlFeSil square bar and a width direction of the magnetic tape. A magnetic tape cartridge and a magnetic tape apparatus include the magnetic tape. |
| US12300275B2 |
Editing video captured by electronic devices
Example systems, computer readable medium and methods include receiving a video taken from a drone where the drone followed a flight path based on a flight plan. A user interface is presented that provides options for the user to select video editing effects to be performed on the video where the options are based on the flight plan or flight path that was used to take the video. Additionally, after the video effects are applied to the video, a user interface is presented to the user to further edit the video where the user interface is customized in accordance with the video effects used to modify the video. Moreover, the user is presented with options for adding AR effects to the video where 2D body tracking and segmentation are used adding the AR effects. |
| US12300270B2 |
Magnetic disk drive and data control method
According to one embodiment, a magnetic disk drive of shingled magnetic recording (SMR), wherein user data is written to a disk with a header such as a preamble attached thereto, for each data frame including a plurality of blocks, which is a data area in a track of the disk to which the user data is written. |
| US12300269B2 |
Notification system, notification method, and non-transitory computer readable medium storing program
A notification system includes: detection means (110) for detecting an acoustic event from voice data transmitted from a communication terminal held by a target person; and notification means (120) for sending a predetermined notification when the detection means (110) has detected the acoustic event. Accordingly, it is possible to determine the state of a target person regardless of the state of this person. Further, when the difference between an acoustic pattern of the voice data transmitted from the communication terminal and acoustic patterns registered in advance is outside a predetermined range, a management server (101) does not send a notification, whereby it is possible to prevent communication traffic from being increased based on unnecessary notifications. |
| US12300268B2 |
Method and system for categorizing musical sound according to emotions
A computer implemented method for analysing sounds, such as audio tracks, and automatically classifying the sounds in a space in which arousal is one axis and valence is another axis. The location of a sound or track in that arousal-valence space is automatically determined using a computer implemented system that analyses, measures or infers values for each of the following base feature parameters: harmonicity, turbulence, rhythmicity, sharpness, volume and linear harmonic cost, or any combination of two or more of those parameters. |
| US12300267B2 |
Method of matching sound source for each object included in video, and computing device for performing the same
A method of matching a voice for each object included in a video, includes: separating a plurality of voices in a video; determining a dissimilarity between the plurality of voices; selecting a partial duration in an entire duration of the video as a matching duration, based on the dissimilarity between the plurality of voices; matching, within the matching duration, the plurality of voices with a plurality of objects in the video respectively, based on mouth movements of the plurality of objects; and matching the plurality of voices with the plurality of objects respectively in the entire duration of the video, based on results of the matching between the plurality of voices and the plurality of objects within the matching duration. |
| US12300265B2 |
Sound processing method using DJ transform
Provided is a sound processing method performed by a computer, the method comprising generating a DJ transform spectrogram indicating estimated pure-tone amplitudes for respective frequencies corresponding to natural frequencies of a plurality of springs and a plurality of time points by modeling an oscillation motion of the plurality of springs having different natural frequencies, with respect to an input sound, and calculating the estimated pure-tone amplitudes for the respective natural frequencies; calculating degrees of fundamental frequency suitability based on a moving average of the estimated pure-tone amplitudes or a moving standard deviation of the estimated pure-tone amplitudes with respect to each natural frequency of the DJ transform spectrogram; and extracting the fundamental frequency based on local maximum values of the degrees of fundamental frequency suitability for the respective natural frequencies at each of the plurality of time points. |
| US12300261B1 |
Neural sidelobe canceller for target speech separation
A system configured to perform neural sidelobe cancelling to achieve enhanced target speech separation. A device improves target speech separation by combining a fixed directional beamformer with a deep neural network (DNN) configured to (i) selectively enhance speech in one target direction, (ii) cancel speech from non-target directions, and (iii) cancel non-speech interference from all directions. By combining the directional output from the beamformer with raw microphone signals as input signals to the DNN, the DNN is given a directional cue with which to select the target speech. The DNN generates mask data representing the target speech using a combination of temporal convolutional blocks and causal self-attention blocks. For example, the DNN achieves low latency by processing a large number of short frames, while the causal self-attention blocks smooth the output and reinforce local consistency of speech. |
| US12300259B2 |
Automatic classification of audio content as either primarily speech or primarily non-speech, to facilitate dynamic application of dialogue enhancement
A method for dynamically controlling enhancement of an audio stream is provided, where the audio stream defines a sequence of audio segments over time. Each audio segment defines a waveform having a plurality of waveform attributes. For each audio segment of the sequence of audio segments, the method includes: (i) determining a set of waveform-attribute values of the audio segment's waveform attributes, (ii) computing a first distance between the determined set of waveform-attribute values and a first predefined set of waveform-attribute values representative of speech, and computing a second distance between the determined set of waveform-attribute values and a second predefined set of waveform-attribute values representative of music, (iii) using the computed first and second distances as a basis to classify the audio segment as primarily speech or rather primarily music, and (iv) controlling, based on the classifying, whether or not to enhance the audio segment for output. |
| US12300258B2 |
Integration of high frequency reconstruction techniques with reduced post-processing delay
A method for decoding an encoded audio bitstream is disclosed. The method includes receiving the encoded audio bitstream and decoding the audio data to generate a decoded lowband audio signal. The method further includes extracting high frequency reconstruction metadata and filtering the decoded lowband audio signal with an analysis filterbank to generate a filtered lowband audio signal. The method also includes extracting a flag indicating whether either spectral translation or harmonic transposition is to be performed on the audio data and regenerating a highband portion of the audio signal using the filtered lowband audio signal and the high frequency reconstruction metadata in accordance with the flag. The high frequency regeneration is performed as a post-processing operation with a delay of 3010 samples per audio channel. |
| US12300257B2 |
Method and apparatus for processing of auxiliary media streams embedded in a MPEGH 3D audio stream
The disclosure relates to methods, apparatus and systems for side load processing of packetized media streams. In an embodiment, the apparatus comprises: a receiver for receiving a bitstream, and a splitter for identifying a packet type in the bitstream and splitting, based on the identification of a value of the packet type in the bit stream into a main stream and an auxiliary stream. |
| US12300253B2 |
Phase reconstruction in a speech decoder
Innovations in phase quantization during speech encoding and phase reconstruction during speech decoding are described. For example, to encode a set of phase values, a speech encoder omits higher-frequency phase values and/or represents at least some of the phase values as a weighted sum of basis functions. Or, as another example, to decode a set of phase values, a speech decoder reconstructs at least some of the phase values using a weighted sum of basis functions and/or reconstructs lower-frequency phase values then uses at least some of the lower-frequency phase values to synthesize higher-frequency phase values. In many cases, the innovations improve the performance of a speech codec in low bitrate scenarios, even when encoded data is delivered over a network that suffers from insufficient bandwidth or transmission quality problems. |
| US12300252B2 |
Controlling access to historical call data
An electronic processor that may be configured to perform a first voiceprint analysis of first audio data of a first call from a first caller to determine a first voiceprint of the first caller, and determine that the first voiceprint matches a first previously-stored voiceprint. The first previously-stored voiceprint may identify and be associated with first previously-stored information regarding a previous call from the first caller that is anonymized so as not to include a name of the first caller or a phone number of the first caller. The electronic processor may also receive a permission command based on a user input from the first caller to indicate that a call taker handling the first call is allowed to have access to the first previously-stored information. The electronic processor may output the first previously-stored information on a call taker device in response to receiving the permission command. |
| US12300250B2 |
User-assigned custom assistant responses to queries being submitted by another user
Implementations set forth herein relate to an automated assistant that can be customized by a user to provide custom assistant responses to certain assistant queries, which may originate from other users. The user can establish certain custom assistant responses by providing an assistant response request to the automated assistant and/or responding to a request from the automated assistant to establish a particular custom assistant response. In some instances, a user can elect to establish a custom assistant response when the user determines or acknowledges that certain common queries are being submitted to the automated assistant—but the automated assistant is unable to resolve the common query. Establishing such custom assistant responses can therefore condense interactions between other users and the automated assistant. Furthermore, as such interactions are more immediately resolved, the automated assistant can avoid wasteful consumption of computational resources that may otherwise occur during prolonged assistant interactions. |
| US12300249B2 |
Rapid event and trauma documentation using voice capture
Methods, systems, and computer-readable media for rapid event voice documentation are provided herein. The rapid event voice documentation system captures verbalized orders and actions and translates that unstructured voice data to structured, usable data for documentation. The voice data captured is tagged with metadata including the name and role of the speaker, a time stamp indicating a time the data was spoken, and a clinical concept identified in the data captured. The system automatically identifies orders (e.g., medications, labs and procedures, etc.), treatments, and assessments/findings that were verbalized during the rapid event to create structured data that is usable by a health information system and ready for documentation directly into an EHR. The system provides all of the captured data including orders, assessment documentation, vital signs and measurements, performed procedures, and treatments, and who performed each, available for viewing and interaction in real time. |
| US12300248B2 |
Audio signal processing for automatic transcription using ear-wearable device
A system and method of automatic transcription using a visual display device and an ear-wearable device. The system is configured to process an input audio signal at the display device to identify a first voice signal and a second voice signal from the input audio signal. A representation of the first voice signal and the second voice signal can be displayed on the display device and input can be received comprising the user selecting one of the first voice signal and the second voice signal as a selected voice signal. The system is configured to convert the selected voice signal to text data and display a transcript on the display device. The system can further generate an output signal sound at the first transducer of the ear-wearable device based on the input audio signal. |
| US12300245B1 |
Systems, methods, and storage media for providing presence of modifications in user dictation
System and method for providing presence of modifications in user dictation are disclosed. Exemplary implementations may: obtain primary audio information representing sound, including speech from a recording user, captured by a client computing platform; perform speech recognition on the primary audio information to generate a textual transcript; effectuate presentation of the transcript to the recording user; receive user input from the recording user; alter, based on the received user input from the recording user, a portion of the transcript to generate an altered transcript; effectuate presentation of the altered transcript in conjunction with audio playback of at least some of the primary audio information in a reviewing interface on a client computing platform; receive user input from the reviewing user; alter, based on the received user input from the reviewing user, portions of the altered transcript to generate a reviewed transcript; and store the reviewed transcript in electronic storage. |
| US12300243B2 |
System and method for multi-modal podcast summarization
In one aspect, a method includes receiving podcast content, generating a transcript of at least a portion of the podcast content, and parsing the podcast content to (i) identify audio segments within the podcast content, (ii) determine classifications for the audio segments, (iii) identify audio segment offsets, and (iv) identify sentence offsets. The method also includes based on the audio segments, the classifications, the audio segment offsets, and the sentence offsets, dividing the generated transcript into text sentences and, from among the text sentences of the divided transcript, selecting a group of text sentences for use in generating an audio summary of the podcast content. The method also includes based on timestamps at which the group of text sentences begin in the podcast content, combining portions of audio in the podcast content that correspond to the group of text sentences to generate an audio file representing the audio summary. |
| US12300239B1 |
Voice-enabled communication configurations
Systems and methods for voice-enabled configurations for audio-output devices are disclosed. User accounts may be associated with one or more voice-enabled devices. Those voice-enabled devices may include audio-output functionality, while other voice-enabled devices do not include audio-output functionality. For devices without audio-output functionality, sending and/or receiving calls and/or messages may depend on whether the device is connected to an auxiliary device with audio-output functionality, via wired and/or wireless connection. Notifications of whether calling and/or messaging is enabled may be sent to the sending and/or receiving devices. |
| US12300238B2 |
System and method for controlling jobsite products
An electronic device with a microphone, a speaker, a processor, and a power tool battery pack connectable to and powering the speaker and the processor. The electronic device has software that can cause the processor to perform operations which can cause the electronic device to operate in first and second modes. While the electronic device is operating in the first mode, the device can generate first audio data representing user speech captured by the microphone which can be analyzed by the electronic device or a remote server. The electronic device can switch from operating in the first mode to operating in a second mode, where the electronic device can receive, second audio data from another electronic device. The electronic device can then output, using the speaker, audible content represented by the second audio data. |
| US12300235B2 |
Information processing system, information processing method, and storage medium
Provided is an information processing system including: a voice information acquisition unit that acquires voice information including an utterance made by a person; a status acquisition unit that acquires status information related to status of the person; and a support information generation unit that generates support information used for supporting operation of the person based on the voice information and the status information. |
| US12300232B2 |
Guide robot and operation method thereof
A guide robot can include a travel part to move the guide robot, a touch screen and a camera, a sensor to detect an approach of a user, and a voice reception part to receive a voice. The guide robot further includes a controller to display at least one digital signage while the guide robot is traveling, in response to detecting the approach of the user, stop the traveling of the guide robot and transition the camera from a deactivated state to an activated state, and detect a face and a face angle of the user. Also, in response to determining that the user intends to use the guide robot, the controller can trigger a voice conversation mode by activating the voice reception part, stopping the display of the at least one digital signage and outputting usage guide information for the voice conversation mode. |
| US12300231B2 |
Enabling machine-to-machine communication for digital assistants
Enabling machine-to-machine communication for digital assistants can include initiating a call with a called device, generating audio stream data having a first instance of audio and a first spoken command, which can be provided to the called device. A second instance of audio stream data can be received from the called device, can include a second spoken command, and can be analyzed to determine if it includes assistant signature data. If the second instance of audio stream data includes the assistant signature data, the devices can switch to machine-to-machine communications. |
| US12300225B2 |
Automatic speech recognition correction
Systems, methods, and computer-readable media for correcting transcriptions created through automatic speech recognition. A transcription of speech created using an automatic speech recognition system can be received. One or more domain-specific contexts associated with the speech can be identified and a text span that includes a mistranscribed entry can be recognized from the speech based on the one or more domain-specific contexts. Additionally, features can be extracted from the mistranscribed entry and the extracted features can be matched against an index of domain-specific entries to identify a correct entry of the mistranscribed entry. Subsequently, the transcription can be corrected by replacing with the mistranscribed entry with the correct entry. |
| US12300221B2 |
Methods for examining game context for determining a user's voice commands
A method for executing a session of a video game is provided, including the following operations: recording speech of a player engaged in gameplay of the session of the video game; analyzing a game state generated by the execution of the session of the video game, wherein analyzing the game state identifies a context of the gameplay; analyzing the recorded speech using the identified context of the gameplay and a speech recognition model, to identify textual content of the recorded speech; applying the identified textual content as a gameplay input for the session of the video game. |
| US12300220B1 |
Pitch-based speech conversion model training method and speech conversion system
The present disclosure provides a pitch-based speech conversion model training method and a speech conversion system, wherein an audio feature code is output by a priori encoder, and a pitch feature is extracted by a pitch extraction module. A linear spectrum corresponding to the reference speech is input into the posteriori encoder to obtain an audio latent variable. In addition, the audio feature code, a speech concatenation feature obtained by concatenation of the audio feature code and the pitch feature, and the audio latent variable are input into a temporal alignment module to obtain a converted speech code, and the converted speech code is decoded by a decoder to obtain a converted speech. The training loss of the converted speech is then calculated to determine the degree of convergence of the speech conversion model. |
| US12300218B2 |
Method and apparatus for training acoustic network model, and electronic device
Disclosed are a method and apparatus for training an acoustic network model, and an electronic device, a readable storage medium, a computer program product and a program, wherein same belong to the technical field of data processing. The method comprises: acquiring a training sample for training of an acoustic network model, wherein the training sample includes one or more speech files (S101); performing peak detection on speech included in the speech file by using a BLSTM network, so as to divide letters included in the speech file on the basis of a detected peak, thereby forming segmented speech (S102); performing semantic prediction on the segmented speech on the basis of a preset CTC segmentation network to obtain a text prediction result (S103); and after the prediction result meets a preset performance requirement, stopping the training of the acoustic network model so as to perform text prediction on input speech by using the acoustic network model (S104). The method can improve the training efficiency of an acoustic network model. |
| US12300216B2 |
End-to-end speech conversion
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for end to end speech conversion are disclosed. In one aspect, a method includes the actions of receiving first audio data of a first utterance of one or more first terms spoken by a user. The actions further include providing the first audio data as an input to a model that is configured to receive first given audio data in a first voice and output second given audio data in a synthesized voice without performing speech recognition on the first given audio data. The actions further include receiving second audio data of a second utterance of the one or more first terms spoken in the synthesized voice. The actions further include providing, for output, the second audio data of the second utterance of the one or more first terms spoken in the synthesized voice. |
| US12300214B2 |
Assemblies for generation of sound
The invention provides assemblies for production of sound using a plurality of configurations, including in one embodiment, surfaces that may be fixed or moveable relative to each other. These surfaces may be electromagnetic, electrostatic, piezoelectric, transducer implemented, thermally activated, permanently magnetized, or activated by any other means, including but not limited to mechanical activation. The surfaces may in a variety of configurations be free floating, constrained, levitated or combinations thereof. The surfaces themselves may be foldable, rollable, expandable, specialized or any combinations thereof. |
| US12300212B2 |
Active noise cancellation integrated circuit for stacking at least one anti-noise signal and at least one non-anti-noise signal, associated method, and active noise cancellation headphone using the same
The present invention relates to an active noise cancellation integrated circuit for stacking at least one anti-noise signal and at least one non-anti-noise signal, an associated method, and an active noise cancellation headphone using the same. The method is applicable to an audio playback device with at least one ANC filtering unit and at least one non-ANC filtering unit. The method includes: acquiring a non-anti-noise signal from a non-ANC filtering unit; generating a decoupled signal by processing the non-anti-noise signal with the transfer function of a physical channel and operations of an ANC filtering unit; performing a signal superposition, wherein an anti-noise signal from the ANC filtering unit is superposed with the decoupled signal; and performing an audio playback based on the superposed signal and an audio signal such that noise is eliminated. |
| US12300206B2 |
Keyboard apparatus and proximity sensor
A keyboard apparatus according to an embodiment includes a keyboard and a mutual capacitance proximity sensor. The keyboard includes a first key and a second key arranged in an array direction with respect to the first key. The proximity sensor includes a first electrode having a portion extending from at least a first area below the first key to a second area below the second key, a second electrode arranged in the first area, and a third electrode arranged in the second area. The proximity sensor is a mutual capacitance type sensor and is configured to use a change in capacitance between the first electrode and the second electrode and a change in capacitance between the first electrode and the third electrode. |
| US12300203B2 |
Apparatus, method, and computer-readable medium for generating musical pieces
An apparatus, method, and computer-readable storage medium that generate a harmonized musical piece. The method includes receiving a chord selection including a musical key and a scale selection, generating, within a digital audio work session, a chord progression sequence based on the received chord selection, in response to a detected chord selection change, modifying the chord progression sequence to include a chord progression corresponding to the chord selection change, setting the chord progression sequence as a master sequence, in response to detecting a second progression sequence within the digital audio work session, transmitting an identifier to the second progression sequence setting it as a slave sequence, and establishing a synchronized communication link between the master and the slave sequences such that changes made in the master sequence are automatically effectuated in the slave sequence, and combining the master sequence and the slave sequence to form a composed musical piece. |
| US12300201B2 |
Machine-control of a device based on machine-detected transitions
Apparatus, methods, and systems that operate to provide interactive streaming content identification and processing are disclosed. An example apparatus includes a classifier to determine an audio characteristic value representative of an audio characteristic in audio; a transition detector to detect a transition between a first category and a second category by comparing the audio characteristic value to a threshold value among a set of threshold values, the set of threshold values corresponding to the first category and the second category; and a context manager to control a device to switch from a first fingerprinting algorithm to a second fingerprinting algorithm different than the first fingerprinting algorithm, responsive to the detected transition between the first category and the second category. |
| US12300198B2 |
Electronic musical instruments and systems
This disclosure relates generally to electronic musical instruments, systems, and methods. More particularly, this disclosure relates to electronic percussion instruments such as tom toms, snare drums, bass drums, cymbals, and hi-hats, and assemblies of instruments (e.g., percussion instruments), such as drum sets. Even more particularly, this disclosure relates to wireless electronic percussion instruments, and percussion instruments with interchangeable and/or removable components to change the instrument between a traditional percussion instrument (that relies on resonance and/or vibration to produce sound) and an electronic percussion instrument. The present disclosure also relates to electronic cymbal instruments, such as cymbal assemblies and hi-hat assemblies, that can be used in conjunction with a traditional acoustic metal cymbal. |
| US12300192B2 |
Semiconductor device including gate driver
It is an object to provide a display device which can favorably display a image without delayed or distorted signals. The display device includes a first gate driver and a second gate driver. The first gate driver and the second gate driver each include a plurality of flip flop circuits and a plurality of transfer signal generation circuits. Both the flip flop circuit and the transfer signal generation circuit are circuits which output a signal inputted to a first input terminal with a half clock cycle delay. In addition, an output terminal of the transfer signal generation circuit is directly connected to a first input terminal of the flip flop circuit in the next stage. Therefore, delay and distortion of the signal which is inputted from the transfer signal generation circuit to the flip flop circuit can be reduced. |
| US12300191B2 |
Display device and display method with distortion suppression
A display device includes a display panel, an optical element configured to collect light emitted from the display panel to user's eyes, and a drive circuit configured to drive the display panel based on an image signal having information on an image. The drive circuit generates a corrected image obtained by applying correction to the image to cause distortion, based on distortion caused by the optical element, and displays the corrected image on the display panel. |
| US12300185B2 |
Liquid crystal display driving method, electronic device, and driver chip
A liquid crystal display (LCD) driving method includes: determining drive voltages of pixel units in a plurality of screen regions of an LCD based on an image frame to be displayed; outputting, for one of the plurality of screen regions, a first drive signal to a pixel unit in the screen region based on the determined drive voltage corresponding to the pixel unit, the first drive signal being used for controlling a liquid crystal molecule corresponding to the pixel unit in the screen region to rotate at the drive voltage; and outputting a second drive signal to a backlight source of the LCD when the first drive signal is output to the pixel unit in the screen region and a target duration is reached, the second drive signal being used for controlling a part of the backlight source corresponding to the screen region to be turned on. |
| US12300179B2 |
Display substrate and preparation method thereof, display panel, and display device
A display substrate, a preparation method thereof, a display panel, and a display device are provided. The display substrate includes a base substrate and a repeating unit, the repeating unit includes a plurality of sub-pixels including a first sub-pixel and a second sub-pixel, a color of light emitted by a light-emitting element of the first sub-pixel is identical to a color of light emitted by a light-emitting element of the second sub-pixel, a shape of a first light-emitting voltage application electrode of the light-emitting element of the first sub-pixel is different from a shape of a first light-emitting voltage application electrode of the light-emitting element of the second sub-pixel. |
| US12300175B2 |
Light emitting apparatus, and display apparatus and electronic device including same
A light emitting apparatus having a first light emitting region and a second light emitting region, the second light emitting region including the first light emitting region and having a larger area than that of the first light emitting region, a first light emitting element being included in the first light emitting region, a second light emitting element being not included in the first light emitting region but included in the second light emitting region, the light emitting apparatus having a first emission mode where only the first light emitting region emits light and a second emission mode where the second light emitting region emits light, the light emitting apparatus includes a control unit configured to, in the second emission mode, control a difference between an amount of light emitted by the first light emitting element and an amount of light emitted by the second light emitting element. |
| US12300174B2 |
Correction method of display apparatus including pixel and plurality of circuits
A novel correction method of a display apparatus is provided. One embodiment of the present invention is a correction method of a display apparatus. The correction method includes processing in which a voltage correcting a threshold voltage of the transistor is obtained and the voltage is held in the capacitor; processing in which current flowing through the pixel is measured and a second signal based on the current is generated in the first circuit; processing in which the first signal correcting image data using the second signal is generated in the second circuit; and processing in which the first signal is supplied to the pixel. |
| US12300172B2 |
Pixel circuit and driving method therefor and display panel
A pixel circuit and a driving method therefor and a display panel are provided. The pixel circuit includes a driving circuit, a data writing circuit, a storage circuit, and a first reset circuit; the driving circuit includes a control terminal, a first terminal, and a second terminal, and is configured to control a driving current flowing through the first terminal and the second terminal for driving a light-emitting element to emit light; the data write circuit is configured to write a data signal into the control terminal of the driving circuit; the storage circuit is configured to store the data signal; the first reset circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit; the driving circuit and the data write circuit each include an N-type thin film transistor; and the first reset circuit includes an N-type oxide thin film transistor. |
| US12300167B2 |
Pixel driving circuit, pixel driving method and display panel
The present disclosure provides a pixel driving circuit, a pixel driving method and a display panel, relating to a field of display technology. The pixel driving circuit includes a driving transistor; a storage capacitor connecting a first node and a second node; a data writing unit configured to output a data voltage to the second node in response to a first scan signal; a light emitting control unit configured to electrically communicate a third node and a fourth node in response to a light emitting control signal; a first reset unit configured to output a reference voltage to the second node in response to the light emitting control signal or a first reset signal; a second reset unit configured to output an initialization voltage to the first node in response to a second reset signal. |
| US12300161B2 |
Optical crosstalk compensation for foveated display
Systems and methods are provided for using an optical crosstalk compensation (OXTC) block to compensate for optical crosstalk resulted from a combination of viewing angle change across field of view (FoV), color filter (CF) crosstalk, and the OLED various angle color shift (VACS) of a foveated electronic display. One or more two-dimensional (2D) OXTC factor maps are used to determine OXTC factors for input image data of the OXTC block, and the OXTC factors are updated on a per frame basis. Offset values are determined using a parallel architecture and used to determine the OXTC factors. Compensation weights are used to determine weighted OXTC factors to improve processing efficiency. Output image data are obtained by applying the weighted OXTC factors to the input image data. |
| US12300154B2 |
Display apparatus and electronic device
A display panel includes a substrate, a photoelectric detector, and a display surface. The photoelectric detector is located on a side that is of the substrate and that is close to the display surface. The photoelectric detector includes a PN junction or a PIN junction. The photoelectric detector is configured to be reverse biased or zero biased when the display apparatus works in an ambient light detection stage to generate a photo-generated current under illumination of ambient light and detect ambient light information. The photoelectric detector is disposed above the substrate, and ambient light needs to penetrate only a part of a film layer structure of the display panel to be received by the photoelectric detector. |
| US12300153B2 |
Display device and driving method thereof
A display device includes a display panel including a pixel which receives a luminance control voltage, a driving controller which receives an input image signal and a control signal and provides an output image signal to the display panel, and a voltage generator which generates the luminance control voltage in response to a voltage control signal from the driving controller. The driving controller determines a current operating frequency based on the control signal, and outputs the voltage control signal based on a difference value between the current operating frequency and a previous operating frequency and an operating time of the previous operating frequency when the current operating frequency is different from the previous operating frequency, where the luminance control voltage is changed from a first voltage level to a second voltage level based on the voltage control signal. |
| US12300148B2 |
Electronic device including display driver circuit adaptively storing image
An example electronic device includes a display panel; a display driver circuit operably coupled to the display panel and including a memory; and a processor operably coupled to the display driver circuit. The processor may be configured to identify a refresh rate; provide, to the display driver circuit, a first signal that indicates storing in the memory one or more images to be provided from the processor for a display on the display panel according to the refresh rate, or provide, to the display driver circuit, a second signal that indicates bypassing to store the one or more images in the memory. |
| US12300147B2 |
Display device performing a dummy scan operation
A display device includes a data driver providing a data voltage to each of multiple pixels, a scan driver providing first and second scan signals to each of the pixels, and a controller to control the data driver and the scan driver. The scan driver performs a first active scan operation that sequentially provides the first and second scan signals to the pixels in an active period of a first frame period, and initiates a dummy scan operation that sequentially provides the second scan signal to the pixels in a blank period of the first frame period. When a second frame period starts before the dummy scan operation for the pixel in a last row, the data driver changes a level of the data voltage in an overlap period in which the dummy scan operation and a second active scan operation in the second frame period are simultaneously performed. |
| US12300140B2 |
Data processing device, data driving device for setting a high transmission rate environment
The present disclosure relates to a data driving device, a data processing device, and a system for driving a display device and, more particularly, it relates to a data driving device, a data processing device, and a system for smoothly performing a low-speed communication through a communication line including an alternating current coupling capacitor. |
| US12300139B1 |
Foveated driving for power saving
In an embodiment, an electronic display includes an active area including a plurality of pixels arranged in columns and a plurality of source drivers driving image data to columns of pixels. The electronic display also includes a first plurality of switches selectively coupling respective source drivers of the plurality of source drivers to one or more columns. Selective coupling enables the respective source drivers to, at different times, drive the image data to: a single column; and multiple columns. In another embodiment, an electronic display includes a display panel configured to operate using a reference voltage received via a resistive path having a routing resistance, a reference voltage source outputting the reference voltage, and a feedback circuit sensing an electrical parameter of the resistive path and producing a compensation voltage that, when added to the reference voltage, causes the reference voltage to remain substantially constant at the display panel. |
| US12300138B2 |
Drive circuit and display apparatus
A drive circuit disclosed by the present application includes: a first terminal; a plurality of second terminals; a first circuit module electrically connected to the first terminal and the plurality of second terminals, where the first circuit module is configured to reduce alternating current power generated when a drive signal accessed by the first terminal is transmitted to the plurality of second terminals; and a plurality of second circuit modules, where the plurality of second circuit modules are one-to-one electrically connected to the plurality of second terminals, and the second circuit modules each are configured to output a data signal based on the drive signal. |
| US12300137B2 |
Method for displaying dynamic wallpaper and related device
A method includes: displaying a user interface on a first screen, displaying at least one frame of continuous image of the dynamic wallpaper on the first screen, switching to a second screen for displaying the user interface, and displaying at least one frame of continuous image of the dynamic wallpaper on the second screen. Because a first frame of image displayed on the second screen is a last frame of image displayed on the first screen or a frame after a last frame of image displayed on the first screen, the at least one frame of continuous image of the dynamic wallpaper displayed on the first screen is continuous with the at least one frame of continuous image of the dynamic wallpaper displayed on the second screen. |
| US12300133B2 |
Display panel and display device
The display panel includes an active area and a border-frame area located at a periphery of the active area, the active area includes a plurality of sub-pixels and a plurality of data lines connected to the sub-pixels, and the border-frame area includes a testing area and a bonding area; the testing area includes a plurality of testing units that are arranged periodically in a first direction, each of the testing units includes one or more switching transistors, a first electrode of each of the switching transistors is connected to a testing-signal lead wire, and a second electrode is connected to one of the data lines; the bonding area includes a plurality of bonding units that are arranged periodically in the first direction, each of the bonding units includes one or more bonding pads, and each of the bonding pads is connected to one of the data lines. |
| US12300129B2 |
Tiled display device
A tiled display device includes: a plurality of display devices; and a thermally variable member between the plurality of display devices. The thermally variable member includes a material whose light transmittance is different depending on a temperature. |
| US12300125B2 |
Hybrid semi-dynamic animated logo lamp, vehicle component and vehicle
A logo lamp assembly to be mounted on a vehicle, comprising, at least one first logo lamp having a fixed image output as light projection configured to be turned on or off; characterized by at least one second logo lamp having an at least partially animated image output as light projection, and being configured to be turned on or off dependent on the fixed image output or an external signal from a control unit, such that the logo lamp assembly is a hybrid semi-dynamic animated logo lamp assembly. Further a vehicle component and a vehicle comprising said logo lamp assembly are provided. |
| US12300120B2 |
Hysterectomy model
A surgical simulator for surgical training is provided. The simulator includes a frame defining an enclosure and a simulated tissue model located inside the frame. The simulated tissue model is adapted for practicing a number of surgical procedures including but not limited to transanal excisions and transvaginal hysterectomies. Portions of the frame comprises a material adhesively compatible with the material of portions of the simulated tissue model to secure and suspend the simulated tissue model within the frame. The simulated tissue model may also include simulated vasculature configured to loop through apertures in the frame to secure and suspend the simulated tissue model within the frame. |
| US12300118B2 |
Wearable wound treatment simulation devices
A wound treatment simulation device and method of operating thereof are disclosed. The device includes a housing, a simulated wound structure, a pump, a power supply, a sensor, a feedback device, and a microprocessor. The housing is configured to be secured to the live subject and to cover at least a portion of a body of the subject. The wound structure is configured to simulate a structure associated with the type of simulated wound treatment. The at least one feedback device is configured to provide a feedback signal to the live subject. The microprocessor is connected to the sensor and the feedback device. The microprocessor is programmed to operate the feedback device to provide haptic feedback based upon input (e.g. force or pressure) generated from interaction between a treatment provider and the simulated wound structure. The disclosed device may be used to simulate a variety of wound care and treatments. |
| US12300117B1 |
Auto-injector demonstration device
An auto-injector demonstration device for simulating the delivery of medication has an elongated body encompassing a needle guard member with locking slots circumscribing a transparent window member having stop elements. A plunger, electronically controlled by a transmission motor, has bump-out elements. In use, the needle guard member is pressed against the injection site to actuate the transmission motor. This moves the plunger through the window member to simulate the medication delivery. When the plunger reaches its terminal position, the bump-out elements compel the stop elements on the window member outward. When the user allows the needle guard member to ease back into the original extended position, the stop elements will engage with the locking slots through the needle guard member to lock and prevent the needle guard from retracting into the window member. |
| US12300116B1 |
Brine dispenser for brine dispensing experiments utilizing multi-plunging liquid jet reactors
A Confined Plunging Liquid Jet Reactor (CPLJR) is used for determining the effect of discharge of an effluent into seawater. A tank is provided and a plurality of water injectors supply sample effluents into the tank at multiple locations, using a pump to provide the supplied effluents. A water movement generator is used to simulate environmental movement of water in the tank, and soap bubble measurement meters/sensors are used to measure bubbles in the supplied effluents supplied by at least a subset of the water injectors, with respective ones of the bubble measurement sensors sensing bubbles associated with individual ones of the subset of water injectors. Dye injection and bubble sensors are used to observe and measure flow of injected effluent. A plurality of oxygen sensors are used for measuring oxygenation at different locations or levels in the tank. |
| US12300115B1 |
Computer-implemented task completion platform for visually impaired students
An ordered interaction task is initiated in a graphical user interface. A main region of the graphical user interface is segmented into a plurality of discrete sub-regions, each sub-region including content of the ordered interaction task. The user is then prompted to begin the ordered interaction task through a non-visual prompt that is provided concurrently with the graphical user interface. In response to a first user-initiated command received in the graphical user interface, a non-visual presentation of at least a portion of the content of at least one sub-region is provided concurrently with the graphical user interface. |
| US12300113B2 |
Determining abnormal traffic conditions from a broadcast of telematics data originating from another vehicle
A computer-implemented method of using telematics data at a destination device is provided. The destination device may be a mobile device associated with a driver, or a smart vehicle controller of a destination vehicle. The telematics data is generated by an originating mobile device (i) having a Telematics Application (or “App”), and (ii) associated with a second driver/vehicle, the telematics data including acceleration, braking, speed, heading, and location data associated with an originating vehicle. The telematics data may be broadcast from the originating mobile device to the destination device that (a) analyzes the telematics data received, (b) determines that an abnormal travel condition exists, and (c) automatically take corrective action that alleviates a negative impact of the abnormal travel condition on the destination vehicle to facilitate safer travel. A usage-based or other insurance discount may be provided based upon insured usage of the telematics data-based risk mitigation or prevention functionality. |
| US12300112B2 |
Pre-departure sequencing using multi-agent reinforcement learning
A system and method for optimizing pre-departure sequencing instantiates independent agent processes for each aircraft. Each independent agent is trained via multi-agent reinforcement machine learning with an existing set of data to maximize that agent's individual reward within established bounds and while cooperating with each other agent. The interaction of the independent agents produces an optimized pre-departure sequence. The individual reward is defined with respect to a change between the current timestamp and the newly suggested timestamp. A lower delta results in a higher reward. |
| US12300110B2 |
Comprehensive flight planning tool for a mobile device
A mobile application is disclosed for providing a flight planning tool on a client device. The mobile application may include a data input module configured to receive, via interface hardware on the client device, a selection of one of a plurality of selectable tools. The mobile application may further include a graphics module configured to display, via the interface hardware, a user interface associated with the selection. The mobile application may further include a flight planning communication module configured transmit a request for information associated with the selection, via an API, to a flight planning system, and receive, from the flight planning system via the API, responsive information that fulfills the request, wherein the responsive information was generated by the flight planning system based on information from a third-party device. |
| US12300107B2 |
Reporting device, vehicle, and reporting control method
A reporting device mounted on a vehicle, comprises: a recognition processing unit configured to recognize an obstacle existing in front of the vehicle on the basis of information detected by a front detection unit and a risk target existing at least diagonally behind the vehicle on the basis of information detected by a rear detection unit; a sight line monitoring unit configured to determine whether or not a driver recognizes the obstacle or the risk target on the basis of an overlap between a sight line of the driver acquired on the basis of a captured image of the driver and the obstacle or the risk target; and a reporting control unit configured to report the existence of the obstacle or the risk target. |
| US12300106B2 |
Machine learning solutions for matching of vehicle exit to unmatched entry events
An edge device generates an exit event for a vehicle exiting a parking facility. The edge device determines whether the exit event matches with an entry event. Responsive to determining that the exit event does not match to an entry event, the edge device inputs images of the vehicle into a supervised machine learning model and receives, as output from the model, an exit feature vector. The edge device retrieves entry feature vectors corresponding to hanging entry events. A hanging entry event is an entry event for a vehicle with an unknown vehicle identifier. Edge device inputs the exit feature vector and the entry feature vectors into an unsupervised machine learning model and receives, as output from the model, matching scores for each entry feature vector. Edge device matches the exit event to one of the hanging entry events based on the matching scores. |
| US12300101B2 |
Apparatus and system for detecting road surface condition and method for detecting road surface condition by using same
The present invention relates to: an apparatus and system for detecting a road surface condition, wherein the road surface condition is determined through a sound signal; and a method for detecting a road surface condition by using same. The apparatus for detecting a road surface condition according to the present invention comprises: a sensor unit which is installed on a road and measures a sound signal generated according to a moving of a moving object on the road; and a control unit which distinguishes the sound signal measured by the sensor unit into normality or abnormality and determines, in case of the abnormality, the road surface condition including at least one of rainfall (wet), frozenness (icy), slush, and snow cover (snowy) so that a quick and accurate action corresponding to the road surface condition of a specific section can be made from a distanced place. |
| US12300100B2 |
System and method for providing a digital intersection
There is provided a digital intersection system. The system can include at least one safety-critical device corresponding to a device controlling allowable movements into or through the intersection. The system can also include a local control unit configured to generate and output an intersection state plan, and a safety control unit configured to accept the intersection state plan from the local control unit, validate the state plan, and provide the state plan to any interested device in the intersection, the any interested device comprising the at least one safety-critical device. The system can optionally include at least one sensor corresponding to a device or data source capable of collecting information related to the intersection or local area surrounding the intersection, or impacting traffic patterns at an intersection, wherein the local control unit is further configured to accept inputs from the at least one sensor. |
| US12300098B2 |
Methods and systems for ambient system control
Provided are methods and systems for ambient system control, comprising multiple detection devices with varying levels of detection capability. The methods and systems contemplate the use of both voice and gesture commands, as well as other inputs, for system control. |
| US12300093B2 |
Visual feedback system and display assembly
A display assembly having a perimeter, a housing surrounding the perimeter and a set of controllable light sources at least partially disposed in the housing and arranged to surround the display panel. |
| US12300092B2 |
Doorbell communication systems and methods
A doorbell system may project an illumination on a surface. The doorbell may include a housing, a button, a camera, a microphone, a speaker, a motion detector, and a light source. In some embodiments, the doorbell includes at least one lens coupled to a bottom surface of the housing adjacent the light source. The at least one lens may be configured to allow light from the light source to pass through the at least one lens such that when the electronic doorbell is attached to a building the light source projects an illumination onto a ground surface in front of the doorbell. |
| US12300086B2 |
System and methods for persistent passive monitoring
Systems and methods for monitoring of personal belongings and other devices. A mobile application may transmit a first message towards an embedded device, and the first message may include an instruction for the embedded device to transition to a passive state to monitor for a movement update of the embedded device. The mobile application may receive a second message from the embedded device, and the second message may include an indication that the embedded device has detected a movement update. The mobile application may publish an alert on a user interface relating to the experienced movement update. The embedded device may receive the first message from the mobile application, detect that the embedded device has experienced the movement update; and transmit the second message to the mobile application. |
| US12300084B2 |
Method, system, and device for protecting vehicle occupants
A system, method, and device for protecting a vehicle occupant over a computerized network. There is an electronic seat pad with an occupant sensor, a driver sensor control module that detects proximity a driver's portable electronic computing device relative to the vehicle; and a key-location sensor that detects proximity of a vehicle key to the vehicle. There is a system management module that determines alert statuses and sends alert and safety notifications to a remote notification device, which automatically registers an alert if a threshold level of safety notifications are not received. There may be pressure, temperature, signal strength, CO2, IR, and other sensors. There is a state library that may be updated to identify additional dangerous states based on sensor readings. |
| US12300081B2 |
Intelligent doorbell for a security system
A smart doorbell, for a security system, which is capable of performing functions including, person detection, facial recognition, motion detection, detection of baby or pet running away, weapon detection, fire detection, detection of parcel left at porch, parcel theft, dog poop detection, vehicle detection, animal detection, eavesdropper detection, a person jumping from backyard wall, and intruder detection. The functions are detected through a camera of the doorbell and, subsequently, AI-based alerts are generated. |
| US12300057B2 |
Paper sheet processing system, paper sheet processing method, and program
To provide a paper sheet processing system that can prevent theft of paper sheets. This paper sheet processing system comprises: a paper sheet processing device that counts number of paper sheets; and a paper sheet management device that is communicable with the paper sheet processing device, wherein the paper sheet processing device includes an acquiring unit that acquires paper sheet identification information uniquely identifying the paper sheets from corresponding paper sheets, and a transmission unit that transmits the acquired paper sheet identification information to the paper sheet management device, and the paper sheet management device includes a reception unit that receives the paper sheet identification information, a specifying unit that specifies the paper sheet identification information of lost ones among the paper sheets, and a notification unit that notifies the paper sheet identification information specified by the specifying unit to an external device. |
| US12300055B2 |
Systems and methods for short-range communication between devices
The present disclosure relates to systems and methods for communicating between devices using short-range communication links. More specifically, the present disclosure relates to systems and methods for communicating access-right data between devices for verification or transfer. |
| US12300054B2 |
Entry management system
An artificial intelligence (AI) entry management (EM) security system includes a camera, a microphone, a motion detector, a speaker, and a software platform. Geofences are utilized to create boundaries around physical areas, such as locations for package delivery or property boundaries. The EM device and other devices connected to the software platform are configured to monitor the geofences and detect a presence of an activity, an event, an object, or a device. At least one license plate reader is utilized to read license plate characters. Voice recognition and voice identification are used to grant or deny permissions for individuals on a property. |
| US12300053B2 |
Missing property access tool detection in lock box
A method of monitoring a storage area within a lock box including: detecting, using at least one of: a load cell sensor or an object shape detection sensor, a physical property of a property access tool within the storage area prior to a showing of a property, the physical property of the property access tool including at least one of a weight of the property access tool or a shape of the property access tool; saving the physical property of the property access tool; detecting an end of the showing of the property; detecting, after the end of the showing, that the property access tool is not present in the storage area; and activating, using a controller, an alert in response to detecting that the property access tool is not present in the storage area. |
| US12300047B2 |
High-security access and alarm system with electronic deadbolt locking device
An electronic access control system comprising an electronic access control device that is communicably engaged with a local or remote alarm system via a networked communications interface. In accordance with certain embodiments, the electronic access control device may be operably engaged with the local or remote alarm system to send and receive one or more communication and execute one or more operations to (1) authenticate/authorize an access request from an authorized user, (2) suppress/disable a door intrusion alarm and (3) actuate the electronic access control device to unlock a door. In accordance with certain aspects of the present disclosure, the electronic access control system may be communicably engaged with one or more remote server, back-end data system, remote alarm system and/or electronic access control system to enable/enforce the interface between the electronic access control device and the local or remote alarm system. |
| US12300046B2 |
Post-work-shift driver to vehicle event association for controlling vehicle functions based on monitored driver performance
Each of a plurality of on-vehicle event detection systems generate vehicle event datasets characterizing detected vehicle events, while each of one or more off-vehicle driver log-in/log-out devices generate at least one of: a driver log-in event dataset characterizing a detected driver log-in event, and a driver log-out event dataset characterizing a detected driver log-out event, wherein each driver log-in and driver log-out event is for a respective driver. A database stores the event datasets for retrieval by a linking module. The linking module analyzes two or more of the event datasets, and associates one or more vehicle events with one or more of the respective drivers based on the retrieved event datasets. A vehicle control module generates and transmits a control signal for controlling a vehicle system based on the association. |
| US12300045B2 |
Systems and methods for sending vehicle information and health data over a wireless network
Systems and methods are disclosed for sending vehicle information and health data over a wireless network. An example method may include receiving, from an on-board diagnostic (OBD) device associated with a vehicle and over a LoRaWAN network, a first message including first data, wherein the first data is a first category of data received by the OBD device from the vehicle. The example method may also include receiving, from the OBD device and over the LoRaWAN network, a second message including second data, wherein the second data is a second category of data received by the OBD device from the vehicle. |
| US12300044B2 |
Management system for working machine
An operation system of a working machine mounted on the working machine, including a first control device to control the working machine, and a first command device to output a command to the first control device wirelessly, the command relating to control of the first control device. The first command device includes a first obtaining part to obtain an expiration date of the working machine from outside, a first time calculating part to obtain time, a third processing part to judge whether the time obtained by the first time calculating part meets the expiration date, and a sixth communication part to output a first command when the time meets the expiration date, the first command restricting control of the first control device, and to output a second command when the time does not meet the expiration date, the second command allowing the first control device to be controlled without restriction. |
| US12300043B1 |
Roadside assistance detection
Systems and methods in accordance with embodiments of the invention can proactively determine if a vehicle has stopped during a trip and calculate a likelihood that the vehicle is in need of roadside assistance. Information can be collected from a variety of devices, such as mobile phones, including the vehicle's location, the type of road, passing vehicles, and/or ambient noise. The likelihood of needing roadside assistance can be determined based on a configurable probability that the vehicle is experiencing a roadside event. The arrangements described herein provide for receiving and processing data in real-time to efficiently and accurately detect stopped vehicles, determine whether the vehicle is stopped for an urgent or non-urgent situation reason, and provide assistance accordingly. |
| US12300042B2 |
Method and system for accident detection using contextual data
A system for reporting accident data includes: a mobile device having a plurality of sensors; a memory; and a processor coupled to the memory. The processor is configured to perform operations including: operating the plurality of sensors to collect driving data; receiving the driving data collected over a plurality of time intervals from at least one of the plurality of sensors in the mobile device of a user during a trip in a vehicle, assigning the driving data to the trip; receiving input indicating the trip is associated with an accident, wherein the input includes additional data associated with the accident; transmitting the driving data assigned to the trip associated with the accident; and transmitting the additional data associated with the accident. |
| US12300041B2 |
Vehicle data stream subscription system
A vehicle data streaming service provides a curated catalog of vehicle attributes and allows a vehicle data stream source to register to the vehicle data streaming system and associate its data stream to a vehicle attribute of the attribute catalog. The vehicle data streaming service also allows vehicle data stream destinations to subscribe to the vehicle attribute in the vehicle catalog, receives streamed vehicle data from the data stream source, and sends streamed vehicle data conforming to registration requirements to the data stream destinations. Additionally, the vehicle data streaming service may allow management of the vehicle attribute catalog and may further manage the registration one or more sources and the subscriptions of one or more destinations. |
| US12300040B2 |
Computer readable instructions for return flight baggage check-in
The disclosure includes a non-transitory computer readable medium containing instructions, when executed by a processor, that operate to check in baggage of a passenger. The operations include electronically acquiring, by at least one electronic acquiring device, an originating hardcopy bag tag identifier (OP-BTI) associated with or printed on a printed bag tag from an originating airline travel carrier that is on a luggage item of a passenger. This creates a digital BTI data record linked to the airline travel carrier. The operations include utilizing, by at least one processor, the OP-BTI as a unique identifier to query a database to retrieve return flight data of the passenger. Operations further include checking in, by the at least one processor, each luggage item for the passenger for the return flight with a return flight travel carrier identified in the retrieved return flight data. |
| US12300039B2 |
Electronic device guiding user touch input and method for controlling the same
Provided is an electronic device. The electronic device may include a display, a fingerprint sensor provided in an area of the display, and at least one processor. The at least one processor may receive a user input for fingerprint registration, based on the user input, control the display to display a first user interface displaying information to guide a position for a touch input based on a position of the fingerprint sensor at a first position on the display, and based on receiving a first touch on the first user interface, control the display to display a second user interface indicating a degree of a fingerprint recognition related to the first touch. |
| US12300038B2 |
Method and apparatus with liveness detection
A processor-implemented method with liveness detection includes: receiving a plurality of phase images of different phases; generating a plurality of preprocessed phase images by performing preprocessing, including edge enhancement processing, on the plurality of phase images of different phases; generating a plurality of differential images based on the preprocessed phase images; generating a plurality of low-resolution differential images having lower resolutions than the differential images, based on the differential images; generating a minimum map image based on the low-resolution differential images; and performing a liveness detection on an object in the phase images based on the minimum map image. |
| US12300037B2 |
Determination system, determination method, computer program, and authentication system
A determination system includes: a projection control unit that controls a projection unit to project a random marker within an angle of view of an imaging unit; an acquisition unit that obtains an image of a target person including the marker from the imaging unit; and a determination unit that determines whether or not the target person imaged by the imaging unit is a living body on the basis of a state of the marker included in the image. According to such a determination system, it is possible to accurately determine whether or not the target person is a living body. Therefore, for example, it is possible to avoid a breakthrough of biometric authentication by an illegal method, or the like. |
| US12300034B2 |
Physical activity measurement and analysis
A method of physical activity measurement and analysis, the method comprising computer-executed steps of: receiving at least one value extracted from measurements of a physical activity of a first user, and detecting a deviation of the physical activity of the first user from at least one previous physical activity using the received at least one value and at least one reference value calculated over at least one value extracted from measurements of the at least one previous physical activity. |
| US12300032B2 |
Information processing device, information processing method, and recording medium
The information processing device determines whether or not an inputted iris image is an iris image of a color contact lens. In the information processing device, the acquisition means (71) acquires the target iris image which is the iris image of processing target. The search means (72) searches one or more similar registered iris images that are similar to the target iris images, from the registered iris images. The iris image determination means (73) determines that the target iris image and the similar registered iris image are iris images of the color contact lens when the person corresponding to the target iris image and the person corresponding to the similar registered iris image are different persons. |
| US12300023B2 |
Training method of facial expression embedding model, facial expression embedding method and facial expression embedding device
The present disclosure provides a training method of a facial expression embedding model, a facial expression embedding method, and a facial expression embedding device. The method includes: determining a sample set, wherein each sample in the sample set includes three images and a sample label; and training the to-be-trained facial expression embedding model with the sample set, to obtain the trained facial expression embedding model, wherein the to-be-trained facial expression embedding model includes a to-be-trained full face embedding sub-model and a trained identity embedding sub-model, the trained facial expression embedding model includes a trained full face embedding sub-model and the trained identity embedding sub-model, and an output of the trained facial expression embedding model is determined by a difference between an output of the trained full face embedding sub-model and an output of the trained identity embedding sub-model. |
| US12300020B1 |
System to assess biometric input data
A user performs an enrollment process to utilize a biometric identification system. This includes acquisition of biometric input data. Accuracy of subsequent identification is improved by utilizing high quality input data during enrollment. Input data is processed using a plurality of embedding models to determine a plurality of embedding vectors. These embedding vectors are translated into a common embedding space. Input quality may be determined based on analysis of these embedding vectors. For example, if a mean distance of the translated embedding vectors is less than a threshold value, the input data may be deemed to be of sufficient quality for use to complete an enrollment process. This analysis may also be used for post-enrollment operation, such as during an identification process to determine query input data that is of insufficient quality. |
| US12300019B2 |
Detection device
A detection device includes a plurality of optical sensors arranged in a detection area, a light source configured to emit light that is emitted to an object to be detected and is detected by the optical sensors, and a processor configured to perform processing based on outputs from the optical sensors. The processor is configured to determine, based on the outputs of the respective optical sensors obtained at a cycle of a predetermined period, an optical sensor an output of which is to be employed from among the optical sensors. |
| US12300018B2 |
Biometric detection using photodetector array
A computing device, such as a wearable device, may include a light source and a photodetector array. The photodetector array may be used to determine a touch event of a user that occurs during a time interval. A subset of the plurality of photodetectors associated with the touch event may provide detection signals at each of a plurality of times within the time interval, which may be aggregated to obtain a time series of aggregated detection signals. Biometric data of the user may be generated, based on the time series of aggregated detection signals. |
| US12300015B2 |
Image processing apparatus, image processing method, and non-transitory computer readable medium storing image processing program
An image processing apparatus (10) according to the present disclosure includes: a skeleton detection unit (11) configured to detect two-dimensional skeleton structures of a plurality of persons based on an acquired two-dimensional image; a feature calculation unit (12) configured to calculate features of the plurality of two-dimensional skeleton structures that have been detected by the skeleton detection unit (11); and a recognition unit (13) configured to perform processing of recognizing states of the plurality of persons based on a degree of similarity among the plurality of features that have been calculated by the feature calculation unit (12). |
| US12300013B2 |
Systems and methods for extracting and processing data using optical character recognition in real-time environments
Methods and systems for extracting and processing data using optical character recognition in real-time environments. For example, the methods and systems provide novel techniques during extracting data using OCR and for a mechanism to process that data. These methods and systems are particularly relevant in real-time environments as the methods and system limit the need for manual review. |
| US12300012B2 |
Method and device for training, based on crossmodal information, document reading comprehension model
A method for training a document reading comprehension model includes: acquiring a question sample and a rich-text document sample, in which the rich-text document sample includes a real answer of the question sample; acquiring text information and layout information of the rich-text document sample by performing OCR processing on image information of the rich-text document sample; acquiring a predicted answer of the question sample by inputting the text information, the layout information and the image information of the rich-text document sample into a preset reading comprehension model; and training the reading comprehension model based on the real answer and the predicted answer. The method may enhance comprehension ability of the reading comprehension model to the long rich-text document, and save labor cost. |
| US12300008B1 |
Sensitive pattern recognition of images, numbers and text
Some implementations of the disclosure describe a method, comprising: obtaining, at a computing device, a document image file; generating, at the computing device, using a first trained model, a first prediction including a first location of a sensitive information pattern within the document image file that contains a sensitive element and an identification of the sensitive element; generating, at the computing device, using a second trained model, a second prediction including a second location of a first sensitive sequence of characters within the document image file; determining, at the computing device, that the second location is within the first location; and after determining that the second location is within the first location, generating, at the computing device, an output including the second location or a redaction of the first sensitive sequence of characters within the document image file. |
| US12300005B2 |
Methods and systems for determining accuracy of sport-related information extracted from digital video frames
A computing system determines accuracy of sport-related information extracted from a time sequence of digital video frames that represent a sport event, the extracted sport-related information including an attribute that changes over the time sequence. The computing system (a) detects, based on the extracted sport-related information, a pattern of change of the attribute over the time sequence and (b) makes a determination of whether the detected pattern is an expected pattern of change associated with the sport event. If the determination is that the detected pattern is the expected pattern, then, responsive to making the determination, the computing system takes a first action that corresponds to the sport-related information being accurate. Whereas, if the determination is that the detected pattern is not the expected pattern, then, responsive to making the determination, the computing system takes a second action that corresponds to the sport-related information being inaccurate. |
| US12300004B2 |
Vehicle path restoration system through sequential image analysis and vehicle path restoration method using the same
Disclosed are a vehicle path restoration system through sequential image analysis which includes: an image capturing unit that acquires sequential images from the front camera installed in the subject vehicle; an image analysis unit for generating multiple lanes that can be recognized from the sequential images of the video file acquired by the image capturing unit and multi-paths calculated using the geometric characteristics of the lanes recognized at the current time and the speed of the subject vehicle, that restores the path of the subject vehicle and restores the path of the front vehicle driving in front of the subject vehicle; a memory for storing path data of the subject vehicle and the front vehicle restored by the image analysis unit; and a display unit that expresses the path data of the subject vehicle and the front vehicle stored in the memory in the form of a top view. |
| US12299999B2 |
Image processing method and device for providing image for artificial intelligence and information provision system for artificial intelligence vehicle
The present disclosure provides an image processing device capable of outputting both an image for humans and an image for artificial intelligence, comprising: a display; a memory for storing at least one image frame for artificial intelligence and multiple basic image frames to be outputted as an image through the display; and a processor which controls the display to, while outputting the basic image frames as an image, output the image frame for artificial intelligence as an image in compliance with a configuration condition, wherein the outputted image includes at least one image frame for artificial intelligence inserted between the basic image frames. In accordance with to the present disclosure, a single display can provide both an image for humans and an image which can be recognized by artificial intelligence, whereby the display can be utilized as a platform for communication with artificial intelligence as well as humans. |
| US12299997B1 |
Multi-attention machine learning for object detection and classification
Techniques for detecting, locating, and/or classifying objects based on multiple sensor data inputs received from different sensor modalities. The techniques may include receiving sensor data generated by different sensor modalities of a vehicle, the sensor data including at least first sensor data generated by a first sensor modality and second sensor data generated by a second sensor modality. In some examples, the sensor data may be input into a machine-learning pipeline. The machine-learning pipeline may be configured to determine locations of objects in an environment surrounding the vehicle based at least in part on a correlation, by the multi-attention component, of the first sensor data and the second sensor data. The techniques may also include receiving, from the machine-learning pipeline, an output indicating a location of an object in the environment. |
| US12299996B2 |
Information processing apparatus, control method, and program
An information processing apparatus of the present invention detects a queue (20) of objects from video data (12). Further, the information processing apparatus of the present invention generates element information using a video frame (14) in which the queue (20) of objects is detected. The element information is information in which an object area (24) in the video frame (14) occupied by the object (22) included in the queue (20) of objects is associated with an attribute of the object (22). Furthermore, the information processing apparatus of the present invention detects a change in the queue (20) of objects based on the element information and the detection result of the object to video frame (14) generated after the video frame (14) in which the element information is generated. Then, the information processing apparatus of the present invention generates element information for the queue (20) of objects in which a change is detected to update the element information used later. |
| US12299994B2 |
Information processing apparatus, control method, and program
An information processing apparatus of the present invention detects a queue (20) of objects from video data (12). Further, the information processing apparatus of the present invention generates element information using a video frame (14) in which the queue (20) of objects is detected. The element information is information in which an object area (24) in the video frame (14) occupied by the object (22) included in the queue (20) of objects is associated with an attribute of the object (22). Furthermore, the information processing apparatus of the present invention detects a change in the queue (20) of objects based on the element information and the detection result of the object to video frame (14) generated after the video frame (14) in which the element information is generated. Then, the information processing apparatus of the present invention generates element information for the queue (20) of objects in which a change is detected to update the element information used later. |
| US12299993B2 |
Information processing apparatus, information processing method, and program
An information processing apparatus (10) includes a time and space information acquisition unit (110) that acquires high-risk time and space information indicating a spatial region with an increased possibility of an accident occurring or of a crime being committed and a corresponding time slot, a possible surveillance target acquisition unit (120) that identifies a video to be analyzed from among a plurality of videos generated by capturing an image of each of a plurality of places, on the basis of the high-risk time and space information, and analyzes the identified video to acquire information of a possible surveillance target, and a target time and space identification unit (130) that identifies at least one of a spatial region where surveillance is to be conducted which is at least a portion of the spatial region or a time slot when surveillance is to be conducted, from among the spatial region and the time slot indicated by the high-risk time and space information, on the basis of the information of the possible surveillance target. |
| US12299992B2 |
Information acquisition support apparatus, information acquisition support method, and recording medium storing information acquisition support program
An information acquisition support apparatus includes: an acquisition unit that acquires a plurality of notifications related to an event; an analysis unit that analyzes the plurality of notifications on the basis of an analysis criterion; and an event state generation unit that generates event state information obtained by integrating information indicated by the plurality of notifications on the basis of an analysis result of the plurality of notifications and an information integration criterion, and thereby, the information acquisition support apparatus supports rapid and accurate grasping of a state of a site where an event is occurring. |
| US12299990B2 |
Processing an input media feed
According to a first aspect, it is provided a method for processing an input media feed for monitoring a person. The method is performed by a media processing device comprising a media capturing device. The method comprises the steps of: obtaining an input media feed using the media capturing device; providing the input media feed to a local artificial, AI, intelligence engine, to extract at least one feature of the input media feed; and transmitting intermediate results comprising the extracted at least one feature to train a central AI model, while refraining from transmitting the input media feed. The local AI engine forms part of the media processing device. The intermediate results comprise a label of the extracted at least one feature. The label is obtained from an end result of another local AI engine. |
| US12299985B2 |
Peak label object detection system and method of using
A peak label object detection system (PLODS) includes an object size database configured to store information related to object size for a plurality of objects. The PLODS further includes a three-dimensional (3D) sensor database configured to store information related to parameters of a 3D sensor. The PLODS further includes an annotation database configured to store ground truth annotation information for images. The PLODS further includes a peak shape parameter calculator configured to determine a peak label size based on object size from the object size database and the parameters of the 3D sensor. The PLODS further includes a label generator configured to generate a peak labels map based on label size and the ground truth annotation information. |
| US12299981B2 |
Systems and methods for recording portion of sports game
Systems and methods are provided herein for recording a portion of content of a sports game. A request to record the portion of the content, which specifies game clock time criteria, is received by user equipment. During transmission of the content, frames of the content including a game progress graphic are analyzed to determine time values representing progress points of the sports game. In response to determining that a first time value representing a first progress point of the sports game matches the game clock time criteria of the request, the user equipment begins to record the portion of the content. In response to determining that a second time value does not match the game clock time criteria of the request, the user equipment stops the recording of the portion of the content and stores the recorded portion of the content. |
| US12299977B2 |
System and methods for content and contention-aware approximate object detection
System and methods for content- and contention-aware object detection are provided. A system may receive video information and perform object detection and object tracking based on an execution configuration. The system may approximate an optimized execution configuration. To approximate the optimized execution configuration, the system may identify, based on the video information, a plurality of content features. The system may further measure a contention level of a computer resource or multiple resources. The system may approximate, based on the content features and the utilization metric, latency metrics, for a plurality of execution configuration sets, respectively. The system may also approximate, based on the content features, accuracy metrics for the execution configuration sets, respectively. The system may select the optimized execution configuration set in response to satisfaction of a performance criterion. The system may perform object detection and object tracking based on the optimized execution configuration set. |
| US12299976B1 |
Suggesting behavioral adjustments based on physiological responses to stimuli on electronic devices
Introduced here are health management platforms able to monitor changes in the health state of a subject based on the context of digital activities performed by, or involving, the subject. Initially, a health management platform can identify a physiological response by examining physiological data associated with a subject. Then, the health management platform can identify a stimulus presented by an electronic device that provoked the physiological response by examining contextual data associated with the subject. The contextual data may be in the form of a screenshot of a computer program in use by the subject during the physiological response. In some embodiments, the health management platform prompts the subject to specify whether the physiological response is a positive physiological response that resulted in an upward shift in health or a negative physiological response that resulted in a downward shift in health. |
| US12299975B2 |
Systems and methods for mapping project sites using ground and aerial imagery
The systems and methods described herein provide improvements to mapping project sites by using ground and/or aerial imagery. A system can receive one or more ground images of site locations within a site area and metadata associated with each of the one or more ground images. The metadata can include GPS coordinates that correspond to the one or more ground images. The system can determine that aerial imagery represents at least the one or more site locations and determine a relative position of each of the one or more site locations within the aerial imagery. Such a determination may be based on the metadata (e.g., on the GPS coordinates). The system can then generate data to display on a user interface one or more features, such as a map, an indication of the site area, and one or more indicators. |
| US12299974B2 |
Transmission line defect identification method based on saliency map and semantic-embedded feature pyramid
The present disclosure provides a transmission line defect identification method based on a saliency map and a semantic-embedded feature pyramid, including the following steps: step 1: cleaning and classifying a dataset; step 2: generating a super-resolution image for a small target of a transmission line by using an Electric Line-Enhanced Super-Resolution Generative Adversarial Network (EL-ESRGAN) model; step 3: performing image saliency detection on the dataset by constructing a U2-Net; step 4: performing data augmentation on the dataset by using GridMask and random cutout algorithms based on a saliency map, and generating a classified dataset; and step 5: performing image classification on a normal set and a defect set by using a ResNet34 classification algorithm and a deep semantic embedding (DSE)-based feature pyramid classification network. |
| US12299971B2 |
Field determination for obstacle detection
Apparatuses, systems, and methods for determining a field in a path of travel of a vehicle for detection of objects in the path of travel. An apparatus includes a path identifier configured to identify a path of travel for a vehicle. At least one camera is disposed on the vehicle and is configured to capture image data of an area including the path of travel. A region of interest selector is configured to select a region of interest within the image data. A horizon identifier is configured to identify a horizon in the image data. A field determiner is configured to project the horizon onto the region of interest to isolate a field specified by the path of travel and the horizon, the field being evaluatable for the presence of objects in the path of travel of the vehicle. |
| US12299970B2 |
Apparatus, system, and method for supporting setting for cell image analysis
The apparatus includes a processor that selects parameter-setting candidate information by referring to a database about a parameter setting history of image analysis that analyzes a cell image, and an output unit that outputs the selected parameter-setting candidate information. The database includes setting history information that is a collection of pieces of combination information indicating combinations of parameters having been set in previously-performed image analysis, and is a collection of pieces of combination information including a recognition parameter that specifies an object of image recognition and an analysis parameter that specifies what feature of the object of image recognition is focused on in performing image analysis. The processor, in response to selection of a first parameter as a recognition parameter, selects the parameter-setting candidate information based on combination information including the first parameter in the setting history information. |
| US12299968B2 |
Cascaded neural network-based attention detection method, computer device, and computer-readable storage medium
The present invention provides an attention detection method based on a cascade neural network, a computer apparatus, and a computer-readable storage medium. The method includes: obtaining video data, recognizing a plurality of image frames, and extracting a face region of the plurality of image frames; recognizing the face region by using a first convolutional neural network to judge whether a first situation of inattention occurs; and recognizing, if it is confirmed that no first situation of inattention occurs, the face region by using a second convolutional neural network to judge whether a second situation of inattention occurs, where computational complexity of the first convolutional neural network is less than computational complexity of the second convolutional neural network. The present invention further provides the computer apparatus for implementing the foregoing method and the computer-readable storage medium. |
| US12299965B2 |
Machine learning training dataset optimization
A method comprising: receiving a dataset comprising a plurality of data instances; extracting a feature vector representation of each of the data instances in the dataset; choosing a first data instance for adding to a subset of the dataset, wherein the first data instance is removed from the dataset; performing an iterative process comprising: (i) identifying one of the data instances in the dataset which represents a maximal information addition to the subset, based, at least in part, on measuring an information difference parameter between the feature vector representation of the identified data instance and the feature vector representations of all of the data instances in the subset, and (ii) adding the identified data instance to the subset and removing the identified data instance from the dataset, until the information difference parameter is lower than a predetermined threshold; and outputting the subset as a representative subset of the dataset. |
| US12299964B2 |
Method for generating training data for a trainable method
A method for generating training data for a trainable method for a system including sensor(s) for detecting at least one subarea of the surroundings around the system. The method includes: a) obtaining first and second detections having at least one known relative ratio between the detections and/or the sensors that carried out the detections; b) determining a portion of the particular content of the detections, and assigning a piece of information concerning the determined content to the detection in question, c) projecting assigned piece of information from one of the detections and/or from a content representation associated with same into at least one other of the detections and/or into a content representation associated with the other detection, d) checking a subarea of at least one of the detections and/or of at least one of the content representations for possible inconsistencies in the detection content. |
| US12299963B2 |
Image processing method and apparatus, computer device, storage medium, and computer program product
An image processing method includes performing additional image feature extraction on a training source face image to obtain a source additional image feature, performing identity feature extraction on the training source face image to obtain a source identity feature, inputting a training template face image into an encoder in a to-be-trained face swapping model to obtain a face attribute feature, inputting the source additional image feature, the source identity feature, and the face attribute feature into a decoder in the face swapping model for decoding to obtain a decoded face image, obtaining a target model loss value based on an additional image difference between the decoded face image and a comparative face image, and adjusting the model parameters of the encoder and the decoder based on the target model loss value to obtain the trained face swapping model. |
| US12299961B2 |
Systems and methods for unified vision-language understanding and generation
Embodiments described herein provide systems, methods, and devices for pre-training a multimodal encoder-decoder (MED) model for vision-language tasks. A method may include encoding, by an image encoder of the MED, an image into an image representation; encoding, by a text encoder of the MED, a text into a text representation; generating, by an image-grounded text encoder of the MED, a multimodal representation based on the image representation and the text; generating, by an image-grounded text decoder of the MED, a predicted text based on the image representation and the text; generating, through an image-text matching (ITM) head, a binary classification indicating whether the image and the text are a match; computing a first loss, ITM loss, and third loss based on the image representation, text representation, binary classification, predicted text and text; jointly updating the MED based on the first loss, the second loss and the third loss. |
| US12299958B2 |
Angle-aware object classification
A computer-implemented method of classifying objects in an image, the method comprising: receiving image data associated with the image; receiving incidence angle data, wherein the incidence angle data is indicative of an incidence angle from which the image data is collected by a detector; and using a machine learning model to classify one or more objects within the image as belonging to one of one or more categories, wherein classifying the one or more objects within the image is based on: the incidence angle data, and respective values of one or more parameters of the image data. |
| US12299956B2 |
Calculating a distance between a vehicle and objects
A method for calculating a distance between a vehicle camera and an object, the method may include: (a) obtaining an image that was acquired by the vehicle camera of a vehicle; the image captures the horizon, the object, and road lane boundaries; (b) determining an initial row-location horizon estimate and a row-location contact point estimate, the contact point is between the object and a road on which the vehicle is positioned; (c) determining a vehicle camera roll angle correction that once applied will cause the lanes boundaries to be parallel to each other in the real world; (d) calculating a new row-location horizon estimate, wherein the calculating comprises updating the row-location horizon estimate based on the vehicle camera roll angle correction; and (e) calculating the distance between the vehicle camera based on a difference between the new row-location horizon estimate and the row-location contact point estimate. |
| US12299946B2 |
Highly efficient active illumination imaging systems and methods
Sensor methods and systems incorporating an integrated illumination or light source are provided. The sensor can include a plurality of pixels and the integrated light source. The sensor can additionally include or be associated with imaging optics. The light source operates to generate illumination light that is passed through the imaging optics towards a scene within a field of view of the sensor system. Objects within the field of view reflect light that is collected by the imaging optics and passed to at least some of the pixels. In at least some configurations, an output of the light source is located adjacent the pixels, and provides the illumination light to the imaging optics by reflecting the illumination light from at least some of the pixels. In other configurations, the light source excites pixel elements, which then produce illumination light that is provided to the imaging optics. |
| US12299945B2 |
Predictive coding of lenslet images
Systems, methods and apparatuses are described herein for accessing image data, generated at least in part using a device comprising a lenslet array, determining a plurality of reference pixel blocks of the image data, and determining a prediction block in a vicinity of the reference pixel blocks. Implementing any of the technique(s) described herein, the system or systems may determine, based on the plurality of reference pixel blocks, a first component representing average pixel values of the prediction block, a second component representing low frequency pixel values of the prediction block, and a third component representing high frequency pixel values of the prediction block. The system(s) may determine predicted pixel values of the prediction block based on the first component, the second component and the third component, and encode the image data based at least in part on the predicted pixel values of the prediction block. |
| US12299943B2 |
Point cloud data transmission method, point cloud data transmission device, point cloud data reception method, and point cloud data reception device
A point cloud data transmission method according to embodiments may comprise the steps of: encoding point cloud data; and transmitting a bitstream including the point cloud data. In addition, a point cloud data transmission device according to embodiments may comprise: an encoder which encodes point cloud data; and a transmitter which transmits a bitstream including the point cloud data. In addition, a point cloud data reception method may comprise the steps of: receiving a bitstream including point cloud data; and decoding the point cloud data. In addition, a point cloud data reception device may comprise: a reception unit which receives a bitstream including point cloud data; and a decoder which decodes the point cloud data. |
| US12299941B2 |
Vertex reordering for mesh compression
Aspects of the disclosure provide methods and apparatuses for mesh coding (e.g., compression and decompression). In some examples, an apparatus for mesh coding includes processing circuitry. The processing circuitry decodes an array of attributes from a bitstream carrying a three dimensional (3D) mesh frame that includes a plurality of patches. The array of attributes corresponds to vertices of the 3D mesh frame. The vertices of the 3D mesh frame are ordered into subsets respectively belonging to the plurality of patches. The processing circuitry determines a first portion of the array of attributes corresponding to a first subset of the vertices of the 3D mesh frame. The first subset belongs to a first patch in the plurality of patches. The processing circuitry determines first connectivity information of the first subset of the vertices, and reconstructs the first patch of the 3D mesh frame based on the first portion of the array of attributes and the first connectivity information. |
| US12299940B2 |
Interleaving of variable bitrate streams for GPU implementations
Interleaving of variable bitrate streams for GPU implementations is described. An example of an apparatus includes one or more processors including a graphic processor, the graphics processor including a super-compression encoder pipeline to provide variable width interleaved coding; and memory for storage of data, wherein the graphics processor is to perform parallel dictionary encoding on a bitstream of symbols one of multiple workgroups, the workgroup to employ a plurality of encoders to generate a plurality of token-streams of variable lengths; create a histogram including at least tokens from the plurality of token-streams for the workgroup to generate an optimized entropy code; entropy code each of the plurality of token-streams for the workgroup into an encoded bitstream; and variably interleave the encoded bitstreams to generate an interleaved bitstream and bookkeep a size of the interleaved bitstream. |
| US12299938B2 |
Apparatus and method for processing point cloud data
A method for processing point cloud data, according to embodiments, can encode and transmit point cloud data. A method for processing point cloud data, according to embodiments, can receive and decode point cloud data. |
| US12299937B2 |
Image data compression
A method and compression unit for compressing a block of image data to satisfy a target level of compression, wherein the block of image data comprises a plurality of image element values, each image element value comprising one or more data values relating to a respective channel. For each of the channels: (i) an origin value for the channel for the block is determined, (ii) difference values are determined representing differences between the data values and the determined origin value for the channel for the block, and (iii) a first number of bits for losslessly representing a maximum difference value of the difference values for the channel for the block is determined. The determined first number of bits for each of the channels is used to determine a respective second number of bits for each of the channels, the second number of bits being determined such that representing each of the difference values for the channels with the respective second number of bits satisfies the target level of compression for compressing the block of image data. Compressed data is formed, having for each of the one or more channels an indication of the determined origin value for the channel, an indication of the determined first number of bits for the channel, and representations of the determined difference values for the channel, wherein each of the representations of the determined difference values for the channel uses the determined second number of bits for the channel, such that the target level of compression is satisfied. |
| US12299936B2 |
Low-bitrate encoding of high dynamic range content
Low bitrate encoding of HDR-coded content with codecs that achieve compression by lowering the precision of encoding can result in significant loss of color fidelity. The problem stems from the logarithmic nature of the HDR encoding and consequent excessive quantization of color components of HDR-coded material. The loss is ameliorated by applying a saturation emphasis function that boosts color values of the HDR-coded material prior to compression. In various implementations the saturation emphasis function is a monotonically increasing function that preferentially boosts lower color values. Following compression and subsequent decompression, the color boost is reversed. In video post-production workflows proxies may be compressed to very low bitrates. For such workflows, the described methods significantly reduce codec-induced color artifacts in the decompressed proxy, thus restoring the ability of editors to make valid technical decisions based on the proxy during post-production. |
| US12299935B2 |
Image processing method, and electronic device
An image processing method, and electronic device are provided. The image processing method includes: obtaining a raw RGBW image by an RGBW sensor; processing the raw RGBW image by a pre-processor to obtain a raw RGB image; processing the raw RGB image by an image signal processor to obtain a target image. By adopting the image processing method of the present disclosure, conventional image processing modules are compatible with RGBW sensors without modification, and thus do not need to be replaced in practical applications, which saves hardware costs and facilitates product upgrades. |
| US12299929B2 |
Multi-view multi-target action recognition
Implementations generally perform robust multi-view multi-target action recognition using reconstructed 3-dimensional (3D) poses. In some implementations, a method includes obtaining a plurality of videos of a plurality of subjects in an environment, where at least one target subject of the plurality of subjects performs one or more actions in the environment. The method further includes tracking the at least one target subject across at least two cameras. The method further includes reconstructing a 3-dimensional (3D) model of the at least one target subject based on the plurality of videos and the tracking of the at least one target subject. The method further includes recognizing the one or more actions of the at least one target subject based on the reconstructing of the 3D model. |
| US12299926B2 |
Tracking with reference to a world coordinate system
Examples described herein provide a method that includes capturing data about an environment. The method further includes generating a database of two-dimensional (2D) features and associated three-dimensional (3D) coordinates based at least in part on the data about the environment. The method further includes determining a position (x, y, z) and an orientation (pitch, roll, yaw) of a device within the environment based at least in part on the database of 2D features and associated 3D coordinates. The method further includes causing the device to display, on a display of the device, an augmented reality element at a predetermined location based at least in part on the position and the orientation of the device. |
| US12299924B2 |
Image processing apparatus, image processing method, and storage medium
An image processing apparatus includes: a first obtainment unit configured to obtain a plurality of captured images of an object captured under a plurality of image capture conditions; a second obtainment unit configured to obtain information on a material of the object; and an estimation unit configured to estimate a distribution of normals of the object based on the plurality of captured images and the information on the material. |
| US12299919B2 |
Object recognition device and object recognition method based on angle and distance resolution of a sensor
Provided is an object recognition device including a temporary setting unit and an update processing unit. The temporary setting unit sets, based on specifications of an external information sensor that has detected an object, a position of at least one candidate point on the object. The update processing unit corrects a position of a detection point with respect to the external information sensor at a time when the external information sensor has detected the object based on the position of the candidate point on the object, and updates track data indicating a track of the object based on a position of the detection point with respect to the external information sensor after the correction. |
| US12299917B2 |
Methods and systems for slide imaging calibration
Various examples of systems and methods are provided for imaging calibration for slide processing. In one example, among others, a system for processing microscope slides includes a light source; an imaging device comprising a lens; and a slide positioner that can position the ground-glass portion of a slide between the light source and lens. Processing circuitry of the system can acquire an image of at least a section of the ground-glass portion at an initial position; analyze contrast of adjacent pixels with respect to a defined contrast characteristic; iteratively advance the lens and acquire additional images based upon analysis of contrast of adjacent pixels with respect to the defined contrast characteristic; and identify an optimal focal location of the lens based upon the defined contrast characteristic. Subsequent image acquisition via the lens can be based at least in part upon the optimal focal location. |
| US12299915B2 |
X-ray digital image correlation
A method of X-ray digital image correlation is provided. The method comprises aligning cameras of an X-ray imaging system, wherein the X-ray imaging system comprises two X-ray sources pointed at a target area at a stereo angle and two corresponding X-ray detectors behind the target area. The X-ray imaging system is tuned to determine power levels of the X-ray sources that maximize image contrast and signal-to-noise ratio. The system is calibrated to determine intrinsic and extrinsic stereoscopic imaging parameters. A specimen with a random contrast pattern comprising an X-ray attenuating material is placed in the target area. Stereoscopic X-ray images are taken of the specimen and processed according to the power levels of the X-ray sources to maximize image contrast and signal-to-noise ratio and remove background objects. Kinematic quantities are determined according to changes in the contrast pattern over a number of successive images. |
| US12299913B2 |
Image processing framework for performing object depth estimation
Disclosed are techniques for processing image data. In some aspects, a three-dimensional model can be determined corresponding to an object in an input image. Based on the three-dimensional model, an estimated focal length can be determined that corresponds to the input image. An estimated depth associated with the object in the input image can be calculated based on the estimated focal length and an input image focal length. |
| US12299909B2 |
Method and apparatus for high resolution measurement of a workpiece
Methods and systems are described herein for inspection of a workpiece, such as a honeycomb body. The methods and systems include collecting a plurality of images of the honeycomb body, extracting measurement data from each of the plurality of images, converting the measurement data extracted from each image into a common frame of reference, and combining the measurement data together. |
| US12299906B2 |
Estimating the movement of an image position
The invention relates to a computer-implemented method for estimating the movement of an image position of an image feature between a first image and a second image. The method includes: Determining a set of image windows in the first image, each image window having the image feature; Identifying at least a portion of the set of image windows in the second image; For the portion of the set of image windows, evaluating the quality of an assignment of each image window in the first image to the given image window in the second image, and selecting one of the image windows on the basis of the evaluation; and estimating the movement of the image position of the image feature using the selected image window. |
| US12299894B2 |
Image processing apparatus, image processing method, and image processing program
An image processing apparatus including a processor is provided. The processor is configured to acquire a segmentation image obtained by segmenting a target image into a regions, accept position information indicating a position specified by a user on the segmentation image, acquire image information according to the position information, and perform control to display on a display, the regions as candidates for a region to be assigned to the position on the segmentation image indicated by the position information so as to allow selection of the region to be assigned from the candidates, on the basis of the image information. |
| US12299892B2 |
Intersection region detection and classification for autonomous machine applications
In various examples, live perception from sensors of a vehicle may be leveraged to detect and classify intersection contention areas in an environment of a vehicle in real-time or near real-time. For example, a deep neural network (DNN) may be trained to compute outputs—such as signed distance functions—that may correspond to locations of boundaries delineating intersection contention areas. The signed distance functions may be decoded and/or post-processed to determine instance segmentation masks representing locations and classifications of intersection areas or regions. The locations of the intersections areas or regions may be generated in image-space and converted to world-space coordinates to aid an autonomous or semi-autonomous vehicle in navigating intersections according to rules of the road, traffic priority considerations, and/or the like. |
| US12299891B2 |
Method and system for automatically propagating segmentation in a medical image
Disclosed herein is a method and system for automatically propagating segmentation in a medical image. In an embodiment, the method uses a segmented reference Region of Interest (RoI) in a reference image to determine segmentation parameters and a plurality of reference points. Further, method generates a plurality of translated points on a current image, in which a target RoI must be segmented, by translating the plurality of reference points onto the current image. Subsequently, relevant seeds among from the translated points are automatically selected based on the segmentation parameters. Finally, a multi-seed segmentation of the selected relevant seeds is performed for estimating and segmenting the target RoI in the current image, such that the target RoI is the propagated segmentation of the segmented RoI in the reference image. |
| US12299886B2 |
Systems and methods for detecting potential malignancies
One or more machine learning techniques can be used to identify locations of potential malignancies within images (e.g., video images) captured during a medical procedure, such as an endoscopic procedure. The images can be displayed, in real-time, on a display unit. The images can be displayed with a graphical overlay that isolates the identified locations of potential malignancies. |
| US12299885B2 |
Systems, devices, and methods for non-invasive image-based plaque analysis and risk determination
Systems and methods of facilitating determination of risk of coronary artery disease (CAD) based at least in part on one or more measurements derived from non-invasive medical image analysis. The methods can include accessing a non-invasive generated medical image, identifying one or more arteries, identifying, regions of plaque within an artery, analyzing the regions of plaque to identify low density non-calcified plaque, non-calcified plaque, or calcified plaque based at least in part on density, determining a distance from identified regions of low density non-calcified plaque to one or more of a lumen wall or vessel wall, determining embeddedness of the regions of low density non-calcified plaque by one or more of non-calcified plaque or calcified plaque, determining a shape of the more regions of low density non-calcified plaque, and generating a display of the analysis to facilitate determination of one or more of a risk of CAD of the subject. |
| US12299884B2 |
Machine-learning-enabled predictive biomarker discovery and patient stratification using standard-of-care data
The present disclosure relates generally to biomarker discovery and patient stratification, and more specifically to machine learning techniques for discovering relevant biomarkers using data collected as part of the standard-of-care (SoC), which can be used to identify a relevant patient population for a therapeutic with a known mechanism of action (MoA). An exemplary method for predicting activity of a molecular analyte of a patient comprises: training a first module of a machine learning model based on a plurality of medical images of a first cohort; training a second module of the machine learning model based on one or more molecular analyte data sets obtained from a second cohort; receiving a medical image from the patient; and predicting, using the trained first and second modules of the machine learning model, the activity of the molecular analyte from the medical image of the patient. |