| Document | Document Title |
|---|---|
| US12212917B2 |
Earphone positioning and retention
Earphone positioning and retention mechanisms are disclosed. One earphone described includes a speaker driver, a flexible eartip comprising a first oval shaped contact surface at an opening forming a hole through the eartip, the first oval shaped contact surface configured to contact an outer surface of a user's ear canal when worn, a body portion comprising a second contact surface configured to position behind an anti-tragus portion of the user's ear, and, a retaining member formed of a compliant material, comprising a third contact surface configured to conform to a cymba conch portion of the user's ear, where the body portion and the retaining member are shaped in a way that the second contact surface contacts the anti-tragus portion and the third contact surface contacts the cymba conch portion at the same time, when the first contact surface is already in contact with the outer surface of the ear canal. |
| US12212915B2 |
Haptic sensing device, electronic device, earphone, and watch
A haptic sensing device, including a light source, an optical waveguide, a photoelectric sensor, and a housing. The optical waveguide includes a waveguide layer and a cladding, the cladding encloses the waveguide layer, and a refractive index of the waveguide layer is greater than a refractive index of the cladding. The waveguide layer includes a plurality of paths, the light source is disposed at an input end of each path, and the photoelectric sensor is disposed at an output end of each path. The light source, the optical waveguide, and the photoelectric sensor are accommodated in the housing. A plurality of contacts are distributed on the housing. When a contact is pressed, the contact is in contact with one path, and the path is deformed. When any two contacts are pressed, the two contacts are in contact with different paths. |
| US12212912B2 |
Wearable audio device placement detection
An earbud with an electro-acoustic transducer for producing sound, a proximity sensor that is configured to detect when the earbud is close to a user's skin, an orientation sensor that is configured to detect an orientation of the earbud, and a processor that is configured to estimate, based on the proximity sensor and the orientation sensor, whether the earbud has been inserted into the user's ear canal. |
| US12212902B2 |
Cable manager
A system includes a rigid housing and flexible tubes. The rigid housing includes cable receptacles. Each cable receptacle has a distal end and a longitudinal opening configured to accept a cable. The flexible tubes are configured to accept cables and orient the cables in a customizable, organized manner. Each flexible tube is secured to a respective cable receptacle at the distal end and has a longitudinal opening oriented to align with the longitudinal opening of the respective cable receptacle. Another system includes a vertical stand structure configured to maneuver about a floor and a deformable trough secured to the vertical stand structure. The deformable trough is configured to initially bend in a customizable manner to form a customized configuration and subsequently maintain the customized configuration to facilitate placement of the cables within the deformable trough and provide for mobility of the vertical stand structure. |
| US12212901B2 |
Apparatus, monitoring system, method, and computer-readable medium
Provided is an apparatus comprising: an image acquisition unit configured to acquire a captured image; a compression unit configured to compress a captured image to generate compressed data; a reproduction unit configured to generate, from the compressed data, a reproduced image that reproduces the captured image; an evaluation acquisition unit configured to acquire an evaluation corresponding to a degree of approximation between the reproduced image and the captured image; and a learning processing unit configured to perform learning processing of a model configured to output, in response to an input of a new captured image, a compression parameter value to be applied in compression of the captured image, by using learning data including the evaluation, a captured image corresponding to the evaluation, and a compression parameter value applied in compression of the captured image. |
| US12212900B2 |
Automated projector image optimization system, vehicle including the same, and associated method
An automated projector image optimization (APIO) system for a vehicle having a control system is provided. The APIO system includes a projector configured to display an image, a processor configured to be electrically connected to the control system, and a memory having instructions that, when executed by the processor, cause the processor to perform operations including receiving a user input corresponding to a display surface, determining a preferred orientation of the projector relative to the display surface, and employing the control system to move the vehicle so that the projector is in the preferred orientation. |
| US12212897B1 |
Multi-screen projection system
A projection video display apparatus includes a video input unit, a light source, a display element, a projection optical system, and a variable light adjusting function which changes the amount of light incident on the display element. Display modes using the variable light adjusting function are prepared, and one display mode of the display modes can be selected from a menu screen. Further, the display modes of the display video using the variable light adjusting function includes: a first display mode where the input video is displayed while changing a light adjusting amount in accordance with light adjusting control information, which is input from external equipment and is capable of controlling the variable light adjusting function in unit of frame of a projected video; and a second display mode where the input video is displayed while changing a light adjusting amount in accordance with the input video. |
| US12212893B2 |
Secure networking techniques for acquisition and transmission of images
A method for remote identification of security threats in an imaged object including transmitting an initialization signal to a first threat detection scanner over a communication network, the first threat detection scanner being located at a separate physical location, receiving a ready-to-send signal from the first threat detection scanner, the ready-to-send signal including a storage location of a scan image generated by the first threat detection scanner for security inspection, receiving the scan image from the first threat detection scanner, transmitting, after receiving the scan image from the first threat detection scanner, a second initialization signal to a second threat detection scanner at the separate physical location, generating a threat detection report based on a rendering of the scan image, and transmitting the threat detection report to the first threat detection scanner. |
| US12212892B2 |
Camera listing based on comparison of imaging range coverage information to event-related data generated based on captured image
Event-related data based on an image that has been captured is generated. Coverage information relating to imaging range is compared to the event-related data. The cameras that can capture an image of the event, based on a comparing result, are listed so that an operator can select one of the listed cameras. |
| US12212889B2 |
Dynamic context-sensitive virtual backgrounds for video conferences
One example device for dynamic context-sensitive virtual backgrounds for video conferences includes a communications interface; a non-transitory computer-readable medium; and one or more processors configured to execute processor-executable instructions stored in the non-transitory computer-readable medium to join a video conference hosted by a video conference provider; select a virtual background from a plurality of virtual backgrounds based on a characteristic of the virtual background and at least one of a characteristic of the video conference or a characteristic of a user of the client device; receive, from a camera, a video stream, the video stream including video images of the user; generate a video feed comprising the video images of the user superimposed over the selected virtual background; and provide the video feed to the video conference provider. |
| US12212888B2 |
Computer system for preprocessing video stream at requested video data rate parameter
A computing system is provided, including a camera configured to capture a series of images in a video stream, processing circuitry, and an image processing pipeline including a preprocessing module and an encoder, in which the preprocessing module is configured to receive the video stream from the camera at a camera-native video data rate parameter. The processing circuitry is configured to communicate with a server to establish a joint video communication session with remote client devices and receive a requested video data rate parameter from the server for the video stream captured by the camera. The processing circuitry is further configured to send a command to the preprocessing module to adjust the camera-native video data rate parameter of the video stream to the requested video data rate parameter and preprocess the video stream at the requested video data rate parameter and pass the preprocessed video stream to the encoder. |
| US12212886B2 |
Replicating a digital environment
Apparatus, methods, and computer program products that can replicate a digital environment are disclosed. One apparatus includes a processor and a memory that stores code executable by the processor to generate a digital record of a digital environment occurring at an original time in which the digital record includes a set of happenings that occurred in the digital environment at the original time. The code is further executable by the processor to store the digital record for replication of the digital environment. Methods and computer program products that include and/or perform the operations and/or functions of the apparatus are also disclosed. |
| US12212880B2 |
Image processing apparatus, observation system, and observation method
An image processing apparatus includes a processor including hardware, the processor being configured to: determine whether or not an overlapping portion is present in imaging areas included in a plurality of images captured by a plurality of imagers, respectively, the plurality of imagers being are inserted into a subject to capture images of an observation target at different positions from each other; determine whether or not each of the plurality of imagers is inserted to a focal point position at which the observation target is in focus; and generate a composite image that is composed of the plurality of images when it is determined that each of the plurality of imagers is inserted to the focal point position and that the overlapping portion is present in the imaging areas. |
| US12212879B2 |
Image processing device and image processing method
An image processing device performs a combining process of disposing a second image in a first image captured by a first imaging device, the second image being an image of the imaging field of view of a second imaging device capable of imaging a partial field of view in the imaging field of view of the first imaging device. |
| US12212862B2 |
Display system
According to one embodiment, a display system includes a display device, a rolling shutter camera, a shutter and a control device. The display device includes a display area and a light emitting element. The rolling shutter camera is arranged behind the display device. The shutter is arranged between the display device and the camera. The control device controls the operation of the shutter to block light traveling toward the camera during a first sub-frame period during which the light emitting element is turned on and an image is displayed on the display area, and to transmit light traveling toward the camera during a second sub-frame period during which the light emitting elements is not turned on and the display area is made transparent. |
| US12212861B2 |
Pixelated programmable neutral density filter array
In some aspects, a device may receive, from a pixel array of a camera, a first image. The device may configure, based at least in part on the first image, a setting of a filter. The filter may be included within a filter array that is arranged within the camera in association with the pixel array. The device may cause the pixel array to capture a second image. Numerous other aspects are described. |
| US12212860B2 |
Image sensor circuit and image sensor device
Provided is an image sensor circuit, including a pixel array and a plurality of different control circuits. The pixel array comprises a plurality of pixel circuit groups arranged in an array. Each pixel circuit group comprises a plurality of pixel circuits that generate corresponding sensitivity values over exposure duration. The pixel circuits include a first quantity of first pixel circuits, and a second quantity of second pixel circuits. The plurality of different control circuits are respectively coupled to different pixel circuits to control the exposure duration thereof with different transmission signals. The different control circuits are also set to control different pixel circuits to output photo-sensed values at different frame rates. The image sensor circuit periodically generates the pixel value of each pixel circuit group according to first and second exposure durations, first and second frame rates, and first and second light sensitivity values of each pixel circuit group. |
| US12212858B2 |
Object reconstruction with neuromorphic sensors
Systems and methods are provided for performing image processing. An exemplary method includes: receiving neuromorphic camera data from at least one neuromorphic camera; producing, using the neuromorphic camera data, a plurality of unaligned event data, where the unaligned event data are unaligned in time; aligning the unaligned event data in time producing aligned event data; generating, using a model and the aligned event data, a plurality of aligned event volumes; and aggregating the aligned event volumes to produce an image. |
| US12212854B2 |
Image data encoding/decoding method and apparatus
A method of decoding an image, includes obtaining at least one offset for a picture, deriving a variable for scaling for the picture based on the at least one offset, and performing inter prediction based on the variable for scaling for the picture. The at least one offset is defined with a direction of scaling. |
| US12212845B2 |
Passive autofocus systems, articles and methods
Passive autofocusing is used in image acquisition devices (e.g., machine-readable symbol readers, cameras), and can be employed with shutter and/or event-based image sensors. An aimer pointer is easily detected in images, and one or more characteristics characterized at various focus positions of the optics. A size of a characteristic dimension and/or shape of the aimer pointer and/or a measure of sharpness of the aimer pointer is used to determine which image, and hence focus position, results in an optimized or even optimum (i.e., best) focus. The image acquisition system is then configured accordingly. Measuring aimer pointer size is typically less computationally intensive than conventional approaches. Use of a laser beam to produce the aimer pointer usually requires lower exposure time than other approaches. Image data can advantageously be windowed using a relatively small region of interest (ROI) based on a known aimer pointer position. |
| US12212844B2 |
Electronic apparatus to which an accessory is detachably attached and its control method, and accessory detachably attached to an electronic apparatus and its control method
An electronic apparatus to which an accessory is detachably attached includes a first processing unit communicable with the accessory by a first communication method, and a second processing unit communicable with the accessory by a second communication method. The first processing unit receives accessory information from the accessory by the first communication method. The second processing unit communicates with the accessory by the second communication method based on the accessory information. The electronic apparatus has a first power state and a second power state in which power is lower than that of the first power state. The first processing unit communicates with the accessory by the first communication method in the first power state and the second power state. The second processing unit communicates with the accessory by the second communication method in the first power state, but does not in the second power state. |
| US12212841B2 |
Information processing device, information processing method, and information processing program for head-related transfer functions in photography
Proposed is an information processing device, an information processing method, and an information processing program capable of improving convenience of a user regarding photographing performed for calculating a head-related transfer function. An information processing device according to the present disclosure includes: a determination unit that determines whether or not the size of an area occupied by a side face of a user in a photographing area is within a threshold value; a photographing unit that photographs the side face of the user in a case where it is determined that the size of the area occupied by the side face of the user is within the threshold value; and a photographing control unit that presents a function of manually photographing to the user in a case where the side face of the user has not been photographed within a predetermined period. |
| US12212838B2 |
Camera, setting method of camera, and setting program of camera
Provided are a camera capable of preventing an erroneous operation with a compact configuration and has high operability, a setting method of the camera, and a setting program of the camera. A change in a setting value by the operation dial is switched between valid and invalid, and an operation by the operation dial becomes possible only in a case where the change in the setting value is valid. A setting value of an item to be set by the operation dial is displayed on a dial display provided on the operation dial. |
| US12212833B2 |
Information handling system camera shutter with external fail safe
A portable information handling system camera module has a single shutter that slides in response to a single shutter mechanism to manage access for a field of view of both a visual camera and an infrared camera by sliding only between first and second positions, the first position aligning an opening of the shutter with a visual camera and a shield visual camera opening, the second position blocking the opening of the shutter and extending an end of the shutter over infrared camera. An external shutter actuator rests on the information handling system at the camera module and magnetically engages with the shutter to selectively block and expose the camera fields of view with an external manual input. |
| US12212831B2 |
Electrical connectivity between detachable components
In one aspect of the present disclosure, a digital image capturing device (DICD) is disclosed that includes a device body with a printed circuit board (PCB), and an integrated sensor-lens assembly (ISLA) that is configured for releasable connection to the device body. The PCB defines a plurality of openings that extend therethrough and includes a plurality of connector pins that are fixedly positioned within the openings. The ISLA includes at least one connective surface that is configured for contact with the connector pins to establish electrical communication between the device body and the ISLA. |
| US12212830B2 |
Information handling system peripheral camera with magnetic coupling and spindle stand
An information handling system having a display magnetically couples a peripheral camera to the display with a magnet included in the camera housing. A stand having a spindle raised over a desktop surface includes ferromagnetic material in the spindle to magnetically couple the peripheral camera. The spindle rotates about a vertical axis so that an end user can quickly adjust the camera field of view and show captured visual images at a display vertically aligned. |
| US12212828B2 |
Electrical charge discharging pattern and electronic device including the same
An electronic device includes an electro-optical module which outputs or receives a signal from, an electronic panel including an inner surface defining a panel hole which corresponds to the electro-optical module and has a center, a window on the electronic panel and including a covering member extended across the panel hole, and a flow-blocking layer between the covering member and the electronic panel and overlapping the inner surface of the electronic panel, the flow-blocking layer defining a base part extended from the covering member and toward the electronic panel and defining a first lower surface, and a flow-blocking pattern between the center and the inner surface, the flow-blocking pattern defining a second lower surface forming a step with the first lower surface, and an electrical charge-discharging pattern overlapping the flow-blocking pattern and extending along the inner surface of the electronic panel. |
| US12212823B2 |
Auto exposure for spherical images
Auto exposure processing for spherical images improves image quality by reducing visible exposure level variation along a stitch line within a spherical image. An average global luminance value is determined based on luminance values determined for first and second images, which are based on auto exposure configurations of first and second image sensors used to obtain those first and second images. Delta luminance values are determined for the first and second images using the average global luminance value. The first and second images are then updated using the delta luminance values, and the updated first and second images are used to produce a spherical image. |
| US12212813B2 |
Systems and methods for characterizing joint attention during real world interaction
Systems, devices, and methods are disclosed for characterizing joint attention. A method includes dynamically obtaining video streams of participants; dynamically obtaining gaze streams; dynamically providing a cue to the participants to view the object; dynamically detecting a joint gaze based on the gaze streams focusing on the object over a time interval; and dynamically providing feedback based on detecting the joint gaze. |
| US12212811B2 |
Methods and apparatus for dynamic media insertion based on streaming meter data
Methods, apparatus, systems, and articles of manufacture are disclosed to perform dynamic media insertion based on streaming meter data. An example apparatus includes meter data management circuitry to obtain, via a network, streaming meter data from a plurality of streaming meter devices, the streaming meter data including streaming sessions detected by the plurality of streaming meter devices, meter data processor circuitry to identify active streaming sessions based on the streaming meter data, trend analyzer circuitry to generate a viewing trend indicator based on the active streaming sessions, and trend reporter circuitry to transmit the viewing trend indicator via a network. |
| US12212810B2 |
Method for audio and video just-in-time transcoding with command frames
A method includes: ingesting a video; initializing a timed command stream synchronized to the video; emulating transcoding of the video to derive a sequence of video characteristics of the video; populating the timed command stream with the sequence of video characteristics; segmenting the video into a series of mezzanine segments. The method further includes: for each mezzanine segment, in the series of mezzanine segments: retrieving instream video characteristics, in the sequence of video characteristics, contained within a first segment of the timed command stream corresponding to the mezzanine segment; retrieving upstream video characteristics, in the sequence of video characteristics, preceding the first segment of the timed command stream and informing transcoding of the mezzanine segment; transforming the instream video characteristics and the upstream video characteristics into a set of transcode commands; storing the set of transcode commands in command frames; and inserting the command frames into the mezzanine segment. |
| US12212807B2 |
Transmission apparatus, communication method and program
A transmission device used on a receiver side in a communication system for communication between a talker and a receiver includes a processing unit that processes voice data obtained from speech of the talker to generate information data corresponding to the voice data, a pseudo video generation unit that generates pseudo video data having a playback time length corresponding to a length of a delay time caused by the processing unit, and a transmission unit that transmits the pseudo video data to the receiver side and then transmits video data during the speech of the talker and the information data to the receiver side. |
| US12212804B2 |
Providing visual content editing functions
A method of adjusting visual content. The method comprises selecting, on a client terminal, visual content, extracting visual content data pertaining to the visual content, forwarding a request which includes the visual content data to a network node via a network, receiving, in response to the request, a list of a plurality of visual content editing functions from the network node, presenting, on the client terminal, the plurality of visual content editing functions to a user, receiving a selection of at least one member of the list from the user, adjusting the visual content using the at least one member, and outputting the adjusted visual content. |
| US12212794B2 |
Biometric authentication of streaming content
A computer-implemented method, a computer system and a computer program product control access to streaming media content. The method includes identifying the streaming media content on a content server for transmission to a user. The method also includes acquiring a biometric marker from the user using a computer vision system. The method further includes obtaining a profile for the user from a server, where the profile of the user includes a biometric signature and permissible content. In addition, the method includes determining that the biometric marker matches the biometric signature in the profile for the user. The method also includes determining that the streaming media content matches the permissible content in the profile for the user. Lastly, the method includes transmitting the streaming media content to a device, where the device is associated with the user. |
| US12212788B2 |
Semi-decoupled partitioning for video coding
A method, computer program, and computer system is provided for encoding or decoding video data. Video data including a chroma component and a luma component is received. A first coding tree structure associated with the luma component and a second coding tree structure associated with the chroma component are determined, wherein the first coding tree structure and the second coding tree structure share a same top level coding tree structure. The video data is decoded based on the first coding tree structure and the second coding tree structure. |
| US12212782B2 |
Method for signaling rectangular slice partitioning in coded video stream
A method, computer program, and computer system is provided for coding video data. Video data including one or more subpictures is received. A number of the subpictures and a delta value between the number of subpictures and a number of rectangular slices are signaled. The number of rectangular slices is derived based on the number of subpictures and the delta value. |
| US12212779B2 |
Method of processing immersive video and method of producing immersive video
A method of processing an immersive video includes classifying view images into a basic image and an additional image, performing pruning with respect to view images by referring to a result of classification, generating atlases based on a result of pruning, generating a merged atlas by merging the atlases into one atlas, and generating configuration information of the merged atlas. |
| US12212777B2 |
Optical flow based video inter prediction
In some embodiments, a video encoder or a video decoder obtains a pair of motion vectors for a current coding block of a video signal with respect to two reference frames. Predictions of the current block are generated using the pair of motion vectors from respective reference frames. The video encoder or video decoder further determine an optical flow for the current coding block based on samples values in the predictions. One component of the optical flow is determined based on the other component of the optical flow. Bi-predictive optical flow (BPOF) can be performed on the current coding block using the determined optical flow. |
| US12212776B2 |
Systems and methods for low resolution motion estimation searches
A video encoding system encodes source image data corresponding with an image includes a low resolution pipeline that receives the source image data corresponding with a first coding block in the image. The low resolution pipeline includes a low resolution motion estimation block programmed to generate a first downscaled coding block by downscaling resolution of the source image data corresponding with the first coding block. The first downscaled coding block comprises a first downscaled prediction block corresponding with a first prediction block in the first coding block. The low resolution pipeline may also perform several low resolution motion estimation searches to generate motion vector candidates. The video encoding system also includes a main pipeline that receives the source image data and determines encoding parameters to be used to encode the first coding block based at least partially on the motion vector candidates. |
| US12212775B2 |
Moving picture decoding device, moving picture decoding method, and moving picture decoding program
A motion vector decoding unit derives a motion vector of a prediction block subject to decoding on the basis of a motion vector of a candidate block included in candidate blocks selected from neighboring blocks. The motion compensation prediction unit performs motion compensation prediction using the derived motion vector. In case a motion vector number of a first block and a motion vector number of a second block are identical with each other, the motion vector decoding unit determines whether or not to set the second block as a candidate block in accordance with whether or not a reference index indicating a reference picture that the motion vector of the first block refers to and a reference index indicating a reference picture that the motion vector of the second block refers to are identical with each other. |
| US12212774B2 |
Combined motion vector and reference index prediction for video coding
A system and method for improving the coding efficiency of motion vector information in video coding. According to various embodiments, a list of motion vector predictor candidates is arranged according to predefined rules. Each motion vector also has a reference index associated with it. One of the motion vector candidates is then selected as a predictor based on predefined rules, or the selection is explicitly signaled in the bitstream. The reference index associated with the selected motion vector is used as a reference index for the current block. The reference index is predicted along with the motion vector. Such embodiments can improve the compression efficiency of modern video codecs. |
| US12212773B2 |
Sub-block motion derivation and decoder-side motion vector refinement for merge mode
Systems, methods, and instrumentalities for sub-block motion derivation and motion vector refinement for merge mode may be disclosed herein. Video data may be coded (e.g., encoded and/or decoded). A collocated picture for a current slice of the video data may be identified. The current slice may include one or more coding units (CUs). One or more neighboring CUs may be identified for a current CU. A neighboring CU (e.g., each neighboring CU) may correspond to a reference picture. A (e.g., one) neighboring CU may be selected to be a candidate neighboring CU based on the reference pictures and the collocated picture. A motion vector (MV) (e.g., collocated MV) may be identified from the collocated picture based on an MV (e.g., a reference MV) of the candidate neighboring CU. The current CU may be coded (e.g., encoded and/or decoded) using the collocated MV. |
| US12212771B2 |
Illumination compensation flag in frame rate up-conversion with template matching
Inferring an illumination compensation flag during encoding or decoding of a video image signal using frame rate up conversion can save one bit and eliminate complexity. The illumination compensation flag can be derived from the corresponding flags of at least one bi-predictive or bi-directional prediction candidates. The flag can also be derived from some function of the flags from those candidates. Alternatively, several flags can be used for respective coding or decoding of blocks if there are more than one prediction candidate using illumination compensation. |
| US12212770B2 |
Reference picture handling
A reference picture marking process and a reference picture list management process is handled in a unified reference picture marking and reference picture list management process. A new idle reference picture list may be used for handling reference pictures that are not used for reference in the current picture. Differential coding of picture order count may be used to increase coding efficiency. The reference picture management syntax structure may be sent in the picture parameter set for improved coding efficiency e.g. in regular GOP (group of pictures) arrangements. |
| US12212768B2 |
Method and device for encoding and decoding image involving gradual refresh technique
A method is provided for decoding a sequence of pictures using a gradual refresh technique. In particular, all areas in one picture are gradually encoded or decoded over a plurality of pictures associated with the picture. |
| US12212761B2 |
Encoder and associated signal processing method
The present invention provides an encoder including a quantization circuit, a control circuit and an encoding circuit is disclosed. The quantization circuit is configured to generate quantized data corresponding to a CTU according to image data, wherein the CTU comprises at least one TU. The control circuit is configured to determine a number of allocated bits for each TU in the CTU, where the number of allocated bits for each TU is determined based on a sum of remaining bits of the TUs that have been encoded. The encoding circuit is configured to encode each TU to obtain encoded data according to the number of allocated bits of the TU in the CTU. |
| US12212760B2 |
Encoder, a decoder and corresponding methods related to intra prediction mode
A method of coding implemented by a decoding device or an encoding device, comprising obtaining indication information for a luma position (cbWidth/2, cbHeight/2) of a current coding block, relative to a top-left luma sample position (xCb, yCb) of the current coding block; setting a value of a luma intra prediction mode associated with the current coding block to a first default value, when the indication information indicates that an Intra Block Copy (IBC) mode or palette mode is applied for the luma component at the luma position (cbWidth/2, cbHeight/2), relative to the top-left luma sample position (xCb, yCb) of the current coding block; and obtaining a value of a chroma intra prediction mode based on the value of the luma intra prediction mode of the current coding block. |
| US12212757B2 |
Quantization parameter coding
An apparatus for processing a video may receive a quantization parameter (QP) adjustment value associated with a syntax level at the syntax level. In examples, the apparatus may obtain the QP adjustment value associated with the syntax level, for example, via signalling at the syntax level. The apparatus may apply the QP adjustment value to a QP associated with the syntax level to obtain an adjusted QP associated with the syntax level. The syntax level may include a coding block level or a transform unit (TU) level. In examples, if the syntax level is a TU level, the decoder may receive the QP adjustment value for a first CU (for example, a current TU) and obtain a QP for the second TU that precedes the first CU in a coding order based on a QP predictor, for example, instead of the QP adjustment value for the first TU. |
| US12212755B2 |
Moving image decoding method using chrominance format and intra-frame prediction mode
A moving image decoding method is provided for generating a prediction image using an intra-frame prediction mode. The moving image decoding method includes deriving a first parameter and a second parameter by using a sampled luminance value down-sampled according to a chrominance format and the intra-frame prediction mode; and deriving the prediction image by using the first parameter and the second parameter, wherein: the first parameter is derived by: deriving a logarithmic value of a luminance difference value, deriving a first value by right-shifting a second value related to the luminance difference value by the logarithmic value, and using a third value acquired by multiplying a fourth value by a chrominance difference value, wherein the fourth value is determined from a reference table by using the first value, and the second parameter is derived by using the first parameter. |
| US12212751B1 |
Video quality improvements system and method for virtual reality
A system and method for improving the quality of video for virtual reality systems uses several different techniques to improve the quality of the video. The different techniques may include quantization parameter maps, gradient scaling, using analytics to identify most view scenes and encode the most viewed scenes with better quality and adaptively shaping the field of view. |
| US12212744B2 |
Deblocking filter device, decoding device and program
A deblocking filter device according to a first feature includes: a deblocking filter configured to perform a filter process on a boundary between a first reconstructed block and a second reconstructed block adjacent to the first reconstructed block; and a filter controller configured to control boundary filtering strength of the deblocking filter based on whether or not at least one of the first reconstructed block and the second reconstructed block is encoded using JCCR (Joint coding of chroma residual) in which one joint prediction residual is generated from prediction residuals of a Cb chrominance component and a Cr chrominance component. |
| US12212740B2 |
Method and apparatus for setting reference picture index of temporal merging candidate
The present invention relates to a method and apparatus for setting a reference picture index of a temporal merging candidate. An inter-picture prediction method using a temporal merging candidate can include the steps of: determining a reference picture index for a current block; and inducing a temporal merging candidate block of the current block and calculating a temporal merging candidate from the temporal merging candidate block, wherein the reference picture index of the temporal merging candidate can be calculated regardless of whether a block other than the current block is decoded. Accordingly, a video processing speed can be increased and video processing complexity can be reduced. |
| US12212737B2 |
Moving image encoding device, moving image encoding method, moving image encoding program, moving image decoding device, moving image decoding method, and moving image decoding program
In order to provide low-load, efficient coding technology, a moving-picture decoding device includes a spatial motion information candidate derivation unit configured to derive a spatial motion information candidate from motion information of a block neighboring a decoding target block in a space domain and a history-based motion information candidate derivation unit configured to derive a history-based motion information candidate from a memory where motion information of a decoded block is retained, wherein the history-based motion information candidate derivation unit preferentially derives old motion information without making a comparison of the motion information with the spatial motion information candidate. |
| US12212735B2 |
Display control apparatus, display control method, and non-transitory computer-readable storage medium
An information display apparatus 400 obtains information about a plurality of apparatuses for obtaining a plurality of images captured from a plurality of directions for use in generating a virtual viewpoint image corresponding to a specified viewpoint. Furthermore, the information display apparatus 400 identifies an apparatus in an abnormal state among the plurality of apparatuses based on the obtained information. The information display apparatus 400 then causes the display unit 404 to display information indicating one or a plurality of apparatuses, among the plurality of apparatuses, that are in a predetermined relationship with the apparatus in the abnormal state. |
| US12212732B2 |
Image processing apparatus, image processing method, and storage medium
There is provided an image processing apparatus comprising. An obtainment unit obtains a first circular fisheye image accompanied by a first missing region in which no pixel value is present. A generation unit generates a first equidistant cylindrical projection image by performing first equidistant cylindrical transformation processing based on the first circular fisheye image. The generation unit generates the first equidistant cylindrical projection image such that a first corresponding region corresponding to the first missing region has a pixel value in the first equidistant cylindrical projection image. |
| US12212729B2 |
Transmission and consumption of multiple image subframes via superframe
In one embodiment, a system includes a first device rendering image data, a second device storing the image data, and a display panel that displays the image data stored in the memory. The first device renders multiple frames of the image data, compresses the multiple frames into a single superframe, and transports the single superframe. The second device receives the single superframe, decompresses the single superframe into the multiple frames of image data, and stores the image data on a memory of the second device. |
| US12212728B2 |
Devices and methods for high dynamic range video
Systems and methods of the invention merge information from multiple image sensors to provide a high dynamic range (HDR) video. The present invention provides for real-time HDR video production using multiple sensors and pipeline processing techniques. According to the invention, multiple sensors with different exposures each produces an ordered stream of frame-independent pixel values. The pixel values are streamed through a pipeline on a processing device. The pipeline includes a kernel operation that identifies saturated ones of the pixel values. The streams of pixel values are merged to produce an HDR video. |
| US12212725B2 |
Secure document certification and execution system
Methods and systems for secure media processing may be used to execute and certify a digital media asset by verifying that the digital media asset is authentic and has not been altered since capture. In some cases, these secure media processing techniques may be used in the mobile certification and execution application and a corresponding server system. The mobile application and the corresponding server system may automatically generate finalized documents upon receiving certified digital media and the corresponding metadata from the users. The digital media and other information from the users may be received while the user is in communication with other users. A biometric and artificial intelligent feature recognition system may be utilized to receive biometric data and verify identity. Data transferred to a secure server are accessible by various parties involved in the certification and execution process to provide transparency. |
| US12212724B2 |
Information processing system that executes command corresponding to utterance, image processing apparatus, control method for information processing system, and storage medium storing control program for information processing system
An information processing system that a user easily masters a relation between an execution process and an utterance instruction. The information processing system includes a display device, a microphone, an output unit, a display control unit, and an execution unit. The display device can display information. The microphone can obtain voice. The output unit outputs word information based on voice in natural language obtained with the microphone. The display control unit additionally displays utterance examples in association with touch objects included in a screen that is currently displayed on the display device. The execution unit executes a predetermined process linked to a touch object based on words included in a corresponding utterance example and the output word information at least. |
| US12212720B2 |
Image processing apparatus and control method of the image processing apparatus
A reservation scan control unit of an MFP including a storage device and a scanner unit has a confirmation unit that confirms whether or not a file including an image generated by scan processing executed by the scanner unit can be transmitted to a transmission destination specified by a client terminal, a notification unit that provides a notification about a confirmation result to the client terminal in response to a confirmation that transmission to a transmission destination is not possible, which is a confirmation result, and a storage unit that stores a job including a setting of the scan processing and the transmission destination of a file including an image generated by the scan processing in the storage device, and the reservation scan control unit provides a notification about identification information corresponding to the job to the client terminal based on a confirmation that transmission to the transmission destination is possible, which is a confirmation result. |
| US12212719B2 |
Image forming apparatus, control method for image forming apparatus, and storage medium
By an image forming apparatus comprising a reading unit configured to read a sheet on which a chart image is printed, the chart image including a first print pattern using a first color ink and a second print pattern using a second color ink whose color is different from the first color, containing at least part of the first print pattern, and having a predetermined density and a detection unit configured to detect deformation of the sheet in an area of the sheet based on a difference between a moisture amount in a portion corresponding to an area in which the chart image in the read image obtained by the reading unit is printed and a moisture amount in a portion corresponding to a non-printing area, determination of cockling is performed with a high accuracy. |
| US12212713B2 |
Method and system for managing an incident call
A system and method are provided for managing an incident call between a public safety responder and a target. Once an incident call is established, the system and method perform audio analytics on the call to determine a trusted side of the call and a target side of the call. The method and system determine, based on the audio analytics of the call, that the trusted side of the call should be modified to create a suitable call environment perception for the target side of the call. Modifications are then made at the trusted side of the call by injecting background audio to create the suitable call environment to be heard at the target side of the call. |
| US12212712B2 |
Call review tool for intelligent voice interface
A method for facilitating reviews of caller interactions with an intelligent voice interface may include receiving raw voice data representing dialog between one or more callers and the intelligent voice interface during one or more respective voice calls, determining, by processing text translation of the raw voice data using one or more natural language processing models, one or more intents of the one or more callers during the one or more voice calls, generating one or more event labels indicative of one or more events associated with the one or more voice calls, and causing a user interface to be presented on a display device. The user interface may enable a user to (i) listen to the raw voice data, (ii) view the one or more intents, and/or (iii) view the one or more event labels. |
| US12212711B1 |
Non-associative telephony and SMS messaging
Systems and methods for managing non-associative communications between devices is provided. A first call chain that indicates a routing between phone numbers is stored. A first phone call or a first SMS text is received from a first session initiation protocol (SIP) provider. Based on information provided by the first SIP provider, (i) a sender identity of the first phone call or the first SMS text; (ii) a receiver identity of the first phone call or the first SMS text; and (iii) an access mode of the call chain are determined. If the receiver identity corresponds to a first phone number in the first call chain, a second phone call or a second SMS text is initiated via a second SIP provider, from a second phone number in the first call chain, based on the sender identity and the access mode. |
| US12212709B2 |
Call authentication at the call center using a mobile device
Embodiments described herein provide for automatically authenticating telephone calls to an enterprise call center. The system disclosed herein builds on the trust of a data channel for the telephony channel. Certain types of authentication information can be received through the telephony channel, as well. But the mobile application associated with the call center system may provide additional or alternative forms of data through the data channel. The system may send requests to a mobile application of a device to provide information that can reliably be assumed to be coming from that particular device, such as a state of the device and/or a user's response to push notifications. In some cases, the authentication processes may be based on quantity and quality of matches between certain metadata or attributes expected to be received from a given device as compared to the metadata or attributes received. |
| US12212708B2 |
Ringing suppression circuit
A ringing suppression circuit applicable to a transmitter module in a controller area network is provided, which includes a CANH driver circuit, a CANL driver circuit, a first operable circuit transmitting a CAN high signal, a second operable circuit transmitting a CAN low signal, and a termination component connected between the first operable circuit and the second operable circuit. By sequentially turning on a first, second, and third transistor of the CANH driver circuit and sequentially turning on a fourth, fifth, and sixth transistor of the CANL driver circuit, conventional ringing phenomenon is effectively suppressed. A plurality of transistors may also be configured for implementing the CANH driver circuit or the CANL driver circuit for further reducing a glitch. The transmitter module employing the proposed ringing suppression circuit is able to pull the bus to a recessive state and meanwhile suppress the ringing and improve the maximum data rate. |
| US12212692B2 |
Tampering verification system and method for financial institution certificates, based on blockchain
A tampering verification system and method for financial institution certificates are based on blockchain and verify whether one of the financial institution certificates has been tampered with by comparing the contents of the financial institution certificate at the point of first being generated by a financial institution and at the point of client issue. |
| US12212690B2 |
Authentication method and system
A method for authenticating an object, comprising determining a physical dispersion pattern of a set of elements, determining a physical characteristic of the set of elements which is distinct from a physical characteristic producible by a transfer printing technology, determining a digital code associated with the object defining the physical dispersion pattern, and authenticating the object by verifying a correspondence of the digital code with the physical dispersion pattern, and verifying the physical characteristic. |
| US12212670B2 |
Circuit, apparatus and method for calculating multiplicative inverse
Disclosed herein are an apparatus and method for calculating a multiplicative inverse. The apparatus for calculating a multiplicative inverse includes a data input unit for receiving input data, a multiplicative inverse calculation unit for dividing an input degree-8 finite field corresponding to the input data into two first degree-4 finite fields so as to perform Advanced Encryption Standard (AES) encryption on the input data, and for performing a multiplicative inverse calculation on the first degree-4 finite fields in consideration of a circuit depth value (T-Depth) and qubit consumption of quantum gates in a quantum circuit, and a data output unit for outputting result data obtained by performing the multiplicative inverse calculation. |
| US12212668B2 |
Mobile edge network cryptographic key delivery using quantum cryptography
A first key management entity (KME) in a mobile edge network engages in quantum key distribution (QKD) with a second KME in a far network to generate a secret cryptographic key that is shared between the first KME and the second KME. The first KME determines a key identifier (ID) for associating with the cryptographic key, and sends the key ID to the second KME for association with the secret cryptographic key at the second KME. The first KME receives a session request from a first session endpoint for a session across at least one of the mobile edge network or the far network. The first KME sends the key ID and the cryptographic key to the first session endpoint for establishing an encrypted session across the at least one of the mobile edge network or the far network. |
| US12212667B2 |
Deleting stale or unused keys to guarantee zero packet loss
A first network device may install a new receive key on a data plane of the first network device, and may provide, to a second network device, a first request to install the new receive key. The first network device may receive a first indication that the new receive key is installed by the second network device, and may install a new transmit key on the data plane of the first network device based on the first indication. The first network device may provide, to the second network device, a second request to install the new transmit key, and may receive a second indication that the new transmit key is installed and that an old receive key is deleted by the second network device. The first network device may delete the old receive key from the data plane of the first network device based on the second indication. |
| US12212660B2 |
Method and device for challenge-response authentication
A method is provided for challenge-response authentication between a verifier and a prover. In the method, a challenge is received from the verifier, the challenge for verifying an identity of the prover. The challenge is computed using a first verifier key. The prover computes a response to the challenge using a first prover key. The prover also computes a delay time for delaying transmission of the response to the verifier using a second prover key and a delay computation function. The response is transmitted by the prover to the verifier at the computed delay time. The response is verifiable by the verifier using the first verifier key. An arrival time of the response is verifiable by the verifier using a second verifier key. In another embodiment, a device for providing a delayed response is provided. |
| US12212659B2 |
Private key cloud storage
A system (1) for asymmetrical cryptography, comprising a device (10) and a network storage (30), wherein the device is communicatively connected to the network storage, wherein the network storage is configured to store a private key, wherein the device is configured to retrieve the private key from the network storage to perform a cryptographic operation using the private key in a secure execution environment (12) of the device, and wherein the secure execution environment is configured to only temporarily store the private key for the cryptographic operation. |
| US12212657B2 |
Confidential computing in heterogeneous compute environment including network-connected hardware accelerator
An apparatus to facilitate confidential computing in a heterogeneous compute environment including a network-connected hardware accelerator is disclosed. The apparatus includes a processor to provide a first trusted execution environment (TEE) to run an application, and to send, via the application to a user mode driver (UMD) hosted in first the TEE, a command to transfer data of the application to a hardware accelerator device that is connected via network to the application; encrypt and integrity-protect, via the UMD, the data using shared secret data keys and a destination buffer address of the hardware accelerator device to generate encrypted and integrity-protected data, the shared secret data keys established with a remote service in a second TEE operating on an accelerator platform connected to the application; and interface, via the UMD with a local network interface card (NIC), to cause a copy over the network of the encrypted and integrity-protected data. |
| US12212655B2 |
Processor with a hash cryptographic algorithm and data processing thereof
A processor with a Hash cryptographic algorithm and a data processing method are shown. In response to one single Hash cryptographic instruction of an instruction set architecture, the processor reads a first storage space within a system memory to obtain an input message of a limited length, and processes the input message in accordance with the Hash cryptographic algorithm to generate a final Hash value of a specific length. |
| US12212654B2 |
Systems, methods, and apparatuses for information isolation using a distributed ledger accessible by a cloud based computing environment
Systems, methods, and apparatuses for isolating information from a cloud services provider hosting an enterprise application software, using a distributed ledger. For example, according to one embodiment there is a system having at least a processor and a memory therein executing within a host organization to host an enterprise application software for an enterprise, receive information input from a customer of the enterprise at a user interface for the enterprise application software, transfer the customer-provided information to a distributed ledger accessible to the system, receive information input from the enterprise at an enterprise interface for the enterprise application software, transfer the enterprise-provided information to the distributed ledger accessible to the system, but maintain no copy of the customer-provided information nor copy of the enterprise-provided information in a permanent store accessible to the system and the host organization. |
| US12212652B2 |
Privacy preserving column binding implementation
Methods and systems for improving homomorphic encryption include: receiving, by a computing device, a data set from at least two or more computing devices, each data set comprising: a plurality of encrypted identifiers, and a number indicating the number of the plurality of encrypted identifiers; creating, by the computing device, a single data set including each of the received data sets; creating, by the computing device, a common identifier vector that indicates each encrypted identifier in the single data set that has underlying unencrypted data that is the same in more than one of the received data sets; and transmitting, by the computing device, the common identifier vector to each of the at least two or more computing devices. |
| US12212650B2 |
Dual fallback hardened VoIP system with signal quality measurement
A system is presented that includes secure push-to-talk voice functionality. Using encryption, authentication, user filtering, and integration with new and existing LMR systems, a secure voice platform ensures malicious software, unauthorized access and brute force security attacks will not compromise the voice communications of the system. The VoIP system is engineered to ensure graceful system degradation in the event of maintenance activities, natural disasters and failure modes. The hardened VoIP system offers the functions a LMR trunking system while utilizing broadband connections. Private calls, group calls, Emergency Alarms with covert monitoring capability, scanning and priority scanning may be incorporated into the system. The system includes a VoIP-controller that serves as a trunking controller, manages available VoIP-based conference bridges, and assigns them as needed to the parties involved in each voice call. The system includes multiple fallback methods that may be prioritized based on pre-failure analytics. |
| US12212649B2 |
Trigger signaling through a clock signal in cascading radar systems
A radar monolithic microwave integrated circuit (MMIC) includes a trigger encoder configured to receive a clock signal comprising a plurality of clock pulses having a fixed amplitude and a trigger signal configured to indicate trigger events. The trigger encoder is configured to encode the trigger signal into the clock signal to generate a distributed clock signal by skipping at least one clock pulse of the plurality of clock pulses to indicate a trigger event. The radar MMIC is configured to output the distributed clock signal having the at least one clock pulse skipped to indicate the trigger event. The radar MMIC is configured to receive the distributed clock signal as a received distributed clock signal. The radar MMIC further includes a radar operation controller configured to detect the trigger event based on the received distributed clock signal and initiate a radar operation based on detecting the trigger event. |
| US12212646B2 |
Power efficient circuits and methods for phase alignment
A timing-calibration circuit uses an active phase interpolator to calibrate clock delays through a number of passive fractional delay elements. The timing-calibration circuit minimizes system-wide power consumption by limiting the number and usage of active phase interpolators for delay adjustment in favor of the passive fractional delay elements. |
| US12212644B2 |
Vehicle control system, control method, electronic device, and recording medium
Provided is a vehicle control system that includes a first electronic device and a second electronic device. The first electronic device includes: a first timer unit; a generation unit that generates time information indicating time counted by the first timer unit; and a first transmission unit that transmits the time information to the second electronic device, and also transmits, to the second electronic device, elapsed time information indicating elapsed time from the start of generation of the time information till transmission of the time information generated. The second electronic device includes: a second timer unit; a reception unit; and an adjustment unit that adjusts time counted by the second timer unit based on the time information and the elapsed time information received by the reception unit. |
| US12212643B2 |
Methods and systems for providing a distributed clock as a service
Tenants in data centers may want access to high precision clocks without having to run their own PTP stacks or reference clocks. Furthermore, different tenants may want their workloads synchronized to their own secured clock domain. PTP, the currently dominant synchronization protocol, allows for only 256 clock domains (CDs). Virtual CDs (vCDs) virtualize the concept of clock domains by maintaining a hardware clock within a host computer, receiving a network clock domain packet that includes a clock domain identifier and an origin timestamp produced by a reference clock, using the network clock domain packet to synchronize the hardware clock to the reference clock, and using the hardware clock to provide a hardware timestamp value to a virtual machine (VM) running on the host computer or to a process running on the host computer, wherein the hardware clock is secured from manipulation by the VM or by the process. |
| US12212640B2 |
Techniques for providing a generic multipath system by a flexible selection of network protocols
A compatibility layer, in particular a shim layer, is configured to provide flexible choice of network protocols in a multi-path environment. The compatibility layer includes a first set of communication interfaces that is associated to a first communication link, a second set of communication interfaces that is associated to a second communication link, an access unit configured to get access to a library of network protocols, and a converting unit. The converting unit is configured to convert data packets received from a network entity via the first communication link and/or the second communication link to at least one of the network protocols; and/or the converting unit is configured to convert data packets received from a communication network via the first communication link and/or the second communication link to one standard network protocol. |
| US12212637B2 |
Delivery pacing systems and methods
Embodiments provide a delivery pacing solution to keep customers from affecting other customers. The delivery pacing solution need not be predefined or pre-configured for any customer or any particular job or job type and can be implemented in various ways, for instance, in a queue manager or a dynamic ticketing server. In some embodiments, an agent may obtain from a queue an item specifying a destination and determine whether the item has a concurrency parameter for a group associated with the destination. If so, the agent delivers the item to the destination. If not, the agent dynamically determines a concurrency parameter and returns the item to the queue with the concurrency parameter which controls a maximum number of items in the group that can be concurrently processed for delivery to the destination. A queue manager applies a concurrency rule to the item based on the concurrency parameter. |
| US12212633B2 |
String processing of clickstream data
A method includes assigning unique symbols to pages of a website, respectively. The method includes obtaining page symbol sequences of browsing sessions, respectively. Each browsing session corresponds to a visitor of the website. For each browsing session, the page symbol sequence of the browsing session is a sequence of symbols that corresponds, respectively, to a sequence of pages of the website visited during the browsing session by the corresponding visitor. The method includes generating a master string including the page symbol sequences, generating a suffix array corresponding to the master string, and generating a longest common prefix (LCP) array corresponding to the suffix array. The method includes, based on the suffix array and LCP array, determining one or more most common n-step subsequences of pages (n is an integer greater than 1). |
| US12212631B2 |
Subscription management and web-based activity tracking in a computing environment
A subscriber management system and method are described, according to various implementations. In an implementation, the method and system generate a unique user device identifier that is stored and accessed in storage on a user device. The user device identifier is passed in network requests when visiting a website having an installation of a module of the subscriber management system. |
| US12212629B2 |
Application-layer connection redistribution among service instances
The technology disclosed herein enables redistribution of connections between service instances by determining a subset of the connections and terminating the subset. In a particular example, a method includes determining connection information about connections established with service instances operating in an active-active configuration. The connection information identifies directions of connection initiation for the connections and identifies peers for the connections. Based on the connection information, the method includes determining a subset of the connections for reestablishment on a per-peer basis using direction-dependent criteria and terminating the subset of the connections. |
| US12212623B2 |
Recovering a data chunk from a portion of a set of encoded data slices
A method for execution by a computing device of a storage network includes obtaining at least a “T” number of encoded data slices of a set of encoded data slices, where a plurality of data chunks are all-or-nothing encoded in accordance with distributed data storage parameters to produce the set of encoded data slices. The method further includes decoding a first section of the at least the “T” number of encoded data slices to recover a first data chunk of a plurality of data chunks. The method further includes decoding a second section of the at least the “T” number of encoded data slices to recover a second data chunk of the plurality of data chunks. |
| US12212621B2 |
Manipulation of content transmissions
Disclosed are methods and systems for providing content. An example method can comprise receiving, at a content provider, a request for a content transmission from a first device and determining a parameter related to the first content transmission and comparing the parameter to a threshold. An example method can comprise determining, by the content provider, a second content transmission based on the comparison to the threshold and providing the second content transmission to the first in response to the request. |
| US12212619B2 |
Terminal device interaction method and apparatus
A terminal device interaction method and apparatus are disclosed. In the method, a first terminal device receives a first sharing operation for a first common application APP (S11), the first terminal device transmits a first sharing instruction based on the first sharing operation (S12), and the first terminal device receives and displays information about first data transmitted by a second terminal device (S13); the first terminal device transmits a second sharing instruction (S14); and the first terminal device receives first target data that is transmitted by the second terminal device based on the second sharing instruction (S15). |
| US12212617B2 |
Data publication and distribution
Provided are methods and systems for data distribution over a network. A device can capture content. The device can be configured to publish the content so that other devices in a network can access the content. The publishing device can indicate to other devices on the network that the content is available for use. In response, the publishing device can receive requests for the content from the other devices. When sending a request, a requesting device can include viewing parameters that indicate capabilities of the requesting device. The publishing device can create one or more data layers that comprise the content based on the viewing parameters of requesting devices. The publishing device can also determine a transmission path to the various requesting devices and transmit the one or more data layers along the transmission path. |
| US12212616B2 |
Using messaging associated with adaptive bitrate streaming to perform media monitoring for mobile platforms
Methods, apparatus, systems, storage media, etc., to perform media monitoring for mobile platforms using messaging associated with adaptive bitrate streaming are disclosed. An example media platform disclosed herein is to detect an outgoing message to be sent by the mobile platform to stream media in accordance with an online streaming protocol, and associate resource identifier information included in the outgoing message with a time value. The disclosed example media platform is also to transmit the outgoing message to a first server to cause the media to be streamed to the mobile platform, and transmit the resource identifier information and the time value to a second server different from the first server to cause a media impression associated with the mobile platform to be monitored. |
| US12212611B2 |
Enabling breakout rooms in webinars
One example method includes transmitting a message to a first client device indicating a transition to a first sub-meeting of a webinar, the first client device connected to a main meeting of the webinar and associated with a first participant, receiving, from the first client device, a request for access information to join the first sub-meeting; transmitting the access information for the first sub-meeting to the first client device, receiving, from the first client device, a request to join the first sub-meeting, the request based on the access information for the first sub-meeting, and joining the first client device to the first sub-meeting. |
| US12212610B2 |
Last known state across a plurality of dispersed geographic sensors synchronized to a common clock
A system to coordinate event data from a plurality of smart sensor devices that are coupled to streetlight fixtures to generate a last known state across the plurality of smart sensor devises. The plurality of smart sensor devices receive a distributed clock that is common among the smart sensor devices. A local clock of each smart sensor device is synchronized to the distributed clock. Each smart sensor device monitors and stores event data in an incident buffer. The stored event data is correlated to the distributed clock. The stored correlated event data is transmitted to a remote server. The remote server aggregates the correlated event data from the plurality of smart sensor devices based on the distributed clock to generate a last known state across the plurality of smart sensor devices. |
| US12212609B2 |
Voice over internet protocol multimedia subsystem
This disclosure describes a user equipment device (UE). The UE includes one or more antennas; one or more radios, where each of the radios is configured to perform cellular communication using a plurality of radio access technologies (RATs) that support voice over an Internet protocol (IP) multimedia subsystem (IMS); one or more processors coupled to the one or more radios, where the one or more processors are configured to cause the UE to perform operations including: sending, via a first RAT, a first request for IMS registration to an IMS server; receiving, from the IMS server, an IMS rejection message indicating failure of the IMS registration; determining, based on the IMS rejection message, that the IMS registration failure is temporary; responsively re-attempting IMS registration with the IMS server; and determining to camp on the first RAT in response to receiving an IMS acceptance message from the IMS server. |
| US12212608B1 |
Messaging system capable of converting electronic messages on a telecommunications network
A system receives an electronic message over the internet at a WebRTC gateway (WRG) of a telecommunications network. The system forwards the electronic message to a call session control function (CSCF) using session initiation protocol (SIP). The system detects a failed delivery of the electronic message at a rich communication service configured to deliver and monitor delivery of the electronic message and report failed deliveries. The system generates a failed delivery notification indicating that the electronic message was not delivered. The system receives the failed delivery notification at the WRG and at the WRG converts the electronic message to either a short messaging service (SMS) or multimedia messaging service (MMS) message. The system sends the SMS or MMS message from the WRG to the CSCF using SIP. The system forwards the SMS or MMS message to a short message service center (SMSC), which delivers the SMS or MMS message. |
| US12212606B1 |
Trusted-code generated requests
Custom policies are definable for use in a system that enforces policies. A user, for example, may author a policy using a policy language and transmit the system through an application programming interface call. The custom policies may specify conditions for computing environment attestations that are provided with requests to the system. When a custom policy applies to a request, the system may determine whether information in the attestation is sufficient for the request to be fulfilled. |
| US12212605B2 |
Cloud control management system including a distributed system for tracking development workflow
Disclosed herein are system, method, and computer program product embodiments for managing and tracking the deployment of a cloud control within a cloud network where creation of the cloud control may be distributed between different user devices in the cloud network. A cloud control is implemented using a control policy which is composed of one or more components that provide functions for executing a functionality of the cloud control. A component workflow manager delegates control of the one or more components to different user devices and tracks the development workflow of the components as they progress through workflow states until they are ready for deployment within the cloud network. |
| US12212599B2 |
Method and computer program product for hacking detection
The present invention discloses a hacking detection method, including: deploying a plurality of trap IP addresses in a trap IP address list; collecting access logs from a plurality of network devices to create a connection record list, wherein the connection record list includes a plurality of connection records; and comparing the trap IP address list and the connection record list to obtain a suspicious source list. The suspicious source list includes a plurality of suspicious source IP addresses. The suspicious source IP addresses match a portion of the trap IP addresses in the trap IP address list. |
| US12212595B2 |
Techniques for protecting applications from unsecure network exposure
A method and system for protecting an application from unsecure network exposure. The method includes identifying an at-risk application, wherein identifying the at-risk application further comprises determining that the application is configured incorrectly; identifying at least one port through which the at-risk application is accessible when the at-risk application is determined to be configured incorrectly; and determining, based on the identified at least one port through which the at-risk application is accessible, whether an exposure vulnerability exists, wherein the exposure vulnerability is an unapproved exposure of at least one of the at least one port to external resources. |
| US12212594B1 |
Assessing vulnerability to denial-of-service attacks
This disclosure describes techniques that include evaluating websites and web services to identify those that are at risk for a denial-of-service attack or a distributed denial-of-service attack. In one example, this disclosure describes a method that includes interacting, by an assessment computing system, with a target computing system, wherein interacting includes issuing a plurality of requests to the target computing system and receiving a plurality of responses to the plurality of requests; identifying, by the assessment computing system and based on the plurality of responses, a plurality of latency values that are attributable to processing performed by the target computing system; and determining, by the assessment computing system and based on the plurality of latency values, whether the target computing system is vulnerable to a denial-of-service attack. |
| US12212590B2 |
Information processing apparatus, threat information evaluation system, information processing method, and non-transitory computer readable medium
An information processing apparatus includes: an acquisition unit configured to acquire learning data containing a plurality of items, the learning data being assigned a first level and a second level whose threat level is higher than the first level; a first feature value detection unit configured to detect a first feature value of a specific character string from learning data belonging to the first level; a second feature value detection unit configured to detect a second feature value of the specific character string from learning data belonging to the second level; a difference detection unit configured to detect a difference between the first and second feature values; and a selection unit configured to select, when there is the difference, learning data of an item to which the specific character string belongs. |
| US12212580B2 |
Systems, methods and computer program products for ingress email security
An ingress server is operable to perform, through a multi-list evaluator, two different validations: one utilizes a sender network address of a sender's server to determine whether to trust, accept, or reject a connection and one utilizes a domain of a sender email address from an envelope to determine whether to accept or reject a message. The multi-list evaluator may perform the validations in two phases. If a connection can be trusted, the connection is accepted and any message over the connection (in a single session) is accepted and no further validation is necessary. Further, in both phases, the multi-list evaluator can utilize a whitelist maintained by the ingress server to override a blacklist provided by a blacklist supplier. This override can reduce false-positives and drastically reduce delays usually associated with correcting false-positives and improve system throughput. |
| US12212579B2 |
Securely transmitting data in a data stream
In overview, a computer-implemented method of transmitting data in a data stream from a first device to a second device is disclosed. The data stream is encrypted before transmission from the first device to the second device, and a location of the data in the data stream is indicated to the second device. The location may be a pre-shared location between the first and second devices, or the first device may transmit the location of the data to the second device. The second device decrypts the encrypted data stream, identifies the data in the data stream based on the location, and encrypts the identified data in the data stream. |
| US12212578B2 |
Partial payload encryption with integrity protection
Various aspects of the subject technology relate to systems, methods, and machine-readable media for providing encryption of data with data separation. Various aspects may include performing determining a request payload for a communication from a client device. Aspects may also include creating a first reference data object for a first subset of data fields of the request payload. Aspects may also include creating a second reference data object for a second subset of data fields. Aspects may also include replacing a first value of the first subset with a first reference value. Aspects may include replacing a second value of the second subset with a second reference value. Aspects may include encrypting a response payload with the first reference data object and the second reference data object in an encrypted text-based structured data file format with a cryptographic key. |
| US12212574B2 |
Management of a smart home automation community
Methods, systems, and devices for property manager are described. A device may transmit a request to access information from a control panel of a property associated with a smart home automation community. The request may include credentials specific to a property management personnel. In response to the transmitted request, the device may retrieve the information from the control panel of the property based in part on an authentication of the credentials. The authentication of the credentials may include receiving, from an additional device of an occupant of the property, an acknowledgement message to the request. Once the information is retrieved from the control panel, the device may generate an account associated with the control panel of the property based in part on the information, where the account grants a level of access to the property management personnel. |
| US12212567B2 |
Systems and methods for online third-party authentication of credentials
Systems and methods are disclosed for online authentication of online attributes. One method includes receiving an authentication request from a rely party, the authentication request including identity information to be authenticated and credential information to be authenticated; determining whether a user account is associated with the received identity information by accessing an internal database; accessing user data of the user account determined to be associated with received identity information; determining authentication data to obtained from a user associated with the user account based on the user data of the user account and the credential information to be authenticated; transmitting a request for authentication data; receiving authentication data associated with the user; transmitting authentication data associated with the user; and receiving an authentication result from the verification data source server for the user associated with authentication data. |
| US12212566B2 |
Secure execution of microservices
Methods, apparatus, and processor-readable storage media for securely executing microservices are described herein. An example computer-implemented method includes: generating a session identifier for a request associated with executing one or more microservices in a microservice architecture; identifying an execution plan for the request based at least in part on a plan identifier specified for a first one of the microservices, wherein the execution plan indicates a specified order for executing the microservices for the request; maintaining a set of chained data structures to track an execution order of the microservices based on the session identifier; detecting, based at least in part on the set of chained data structures, that the execution order of the identified execution plan does not match the specified order for at least a given one of the of the one or more microservices; and in response to the detecting, preventing at least the given microservice from being executed. |
| US12212565B2 |
User impersonation system
A first user of a first account associated with a service platform is authenticated based on one or more credentials. Whether the first account of the authenticated first user is authorized to operate in an impersonation mode that enables the first account to impersonate a second account's access to the service platform is determined. Subsequent to authorizing the first account to operate in the impersonation mode a subset of function calls to be called by the first account when impersonating the second account is identified among a plurality of function calls that are permitted to be called by the second account. Information identifying the subset of function calls to be called by the first account when impersonating the second account is providing to a client device associated with the first account. |
| US12212562B2 |
Systems and methods of authentication using vehicle data
Multi-factor authentication systems and methods are provided that include receiving a request to authenticate a user of a mobile device. The request for authentication may include credential information associated with the user and vehicle data. A determination may be made regarding whether the vehicle data was obtained from a vehicle via the mobile device. The received vehicle data and received credential information may be compared to stored data. When there is a match between the received vehicle data and received credential information and corresponding stored data, a notification may be provided to the user device indicating that the user has been authenticated. |
| US12212560B2 |
Method for authorizing a secure access from a local device to a remote server computer
A method for authorizing a secure access from a local device to a remote server computer is disclosed. At the local device having a unique identifier (UID), processor, and memory, a security software obtains a personal identification number (PIN) of a user, and the UID of the local device. Authenticity of the PIN and the UID is verified without communication over a network, using a credential code generated using the PIN, the UID and the security software. Upon verifying the authenticity of the PIN and the UID, access credentials to the remote server computer are retrieved, and the secure access to the remote server computer is authorized using the retrieved access credentials. The remote server computer has a copy of the security software, the PIN, the UID and the credential code. |
| US12212559B2 |
Security defending method, coprocessor, and processing apparatus
A security defending method, a coprocessor, and a processing apparatus are disclosed. The security defending method is applicable in a coprocessor, including: receiving a jump destination encryption request for the operation task; using mask configuration to perform first mask processing on the first jump destination address value to obtain a first intermediate jump destination address value; performing an authentication operation based on the first jump destination storage address, a key reference value corresponding to the operation task and the first intermediate jump destination address value, to obtain a first encryption result value; using the mask configuration to perform second mask processing on the first encryption result value to obtain a first intermediate encryption result value; performing an authentication operation on the first intermediate encryption result value and the first jump destination address value to obtain a first encryption jump destination address value. |
| US12212556B2 |
Efficient transmission of compressed certificates in a low bandwidth mesh environment
Various embodiments set forth a method comprising receiving, at a server node from a client node, a client compression dictionary that includes one or more first mappings between one or more first index values and one or more data entries included in a certificate cache of the client node; identifying, in response to receiving the client compression dictionary and based on the client compression dictionary, one or more certificates that should be transmitted to the client node; and transmitting, from the server node to the client node, the one or more identified certificates. |
| US12212555B2 |
Conversation merging for electronic devices
Aspects of subject technology provide systems and methods for generation and distribution of a stable identifier associated with multiple aliases of a user account. The stable identifier may be provided to various electronic devices by a server, responsive to requests associated with communications to those devices from one of the associated aliases. In this way, messaging applications can utilize the stable identifier to merge conversations from a single user having multiple aliases, and secure access to a secure device can be provided to an authorized user, even if the authorized user attempts access from an unauthorized account alias. |
| US12212553B2 |
Multifunction wireless device
A communication device and system are disclosed for providing communication and data services to residents of a controlled facility. The device can be restricted to communicating only using an internet protocol so as to restrict the device communication to an internal intranet. Wireless access points may be disposed throughout the environment to route calls and data between the device and a central processing center. By converting a protocol of the communications received from the device to a protocol used by the central processing center, minimal modifications to the central processing center are needed to support a wireless communication infrastructure. Many restrictions and safeguards may be implemented within the phone and system in order to prevent improper use. |
| US12212552B2 |
Disposable browsers and authentication techniques for a secure online user environment
Disclosed herein are systems and methods that allow for secure access to websites and web-based applications. Also described are systems and methods for secure use and retention of user credentials, as well as methods for dynamic authentication of users and integrity checking of service providers in online environments. Thus, described in the present specification are systems and methods for constructing and destroying private, secure, browsing environments (a secure disposable browser), insulating the user from the threats associated with being online for the purposes of providing secure, policy-based interaction with online services. |
| US12212551B2 |
System and methods for PUF-based authentication
Authentication that leverages a Physical Unclonable Function (PUF) to generate bitstrings, session keys and long-lived keys (LLK). |
| US12212548B2 |
Core network, user equipment, and communication control method for device to device communication
A communications system is provided. A network device controls the setting up of a device to device communication link, as sent between a device in the core network and the base station(s) servicing the relevant mobile devices, including disclosure of the common security information for two mobile devices to communicate securely over the direct device to device communications link. |
| US12212544B2 |
Security group resolution at ingress across virtual networks
Techniques and architecture are described for providing a service, e.g., a security service such as a firewall, across different virtual networks/VRFs/VPN IDs. The techniques and architecture provide modifications in enterprise computing fabrics by modifying pull-based overlay protocols such as, for example, locator/identifier separation protocol (LISP), border gateway protocol ethernet virtual private network (BGP EVPN), etc. A map request carries additional information to instruct a map-server that even though mapping (destination prefix and firewall service RLOC for the destination) is known within the map-server's own virtual network/VRF for firewall service insertion, the map-server still should do a lookup across virtual networks/VRFs and discover the final destination's DGT (destination group tag) and include that in the map reply. |
| US12212541B2 |
Device address rotation authorization and verification
An authorization device obtains a registration request associated with an end device, the registration request including a new randomized media access control (MAC) address associated with the end device; determines whether the end device is authorized to use the new randomized MAC address; transmits a message to the end device with a first randomly generated number when it is determined that the end device is authorized to use the new randomized MAC address; obtains integrity information associated with the end device, the first integrity information being computed based on the first randomly generated number; transmits a request to a validation system to validate the end device based on the first integrity information; obtains an indication that the end device is validated; determines policies associated with the end device when it is determined that the end device is validated; and applies the policies to the end device. |
| US12212536B2 |
Maintaining a message thread with opt-in permanence for entries
A server has a processor and a memory storing a message thread module with instructions executed by the processor to maintain a message thread between users of client devices. The message thread module serves a message thread with a new text entry to a client device in response to a request for the message thread from a user. Message thread state change is collected from the client device, where the message thread state change represents an indication to automatically delete the new text entry of the message thread after the duration of a transitory display period on the client device unless an indication of a gesture applied to a display screen presenting the new text entry of the message thread is received from the client device during the transitory display period. The message thread state change is queued at the server along with additional message thread state changes associated with the collecting operation performed for additional users associated with the message thread. The message thread is revised based upon the message thread state change and the additional message thread state changes to form shared message thread state. The shared message thread state is stored. The shared message thread state is supplied in response to a request for the message thread from a user. |
| US12212534B2 |
Communication method and communication device
A communication method includes: determining a first message frame, the first message frame including target wake-up time (TWT) information, and the TWT information indicating time information of sending a periodic service or an aperiodic service by a station device; and sending the first message frame. |
| US12212528B2 |
Base station, terminal, and communication method
A communication apparatus includes circuitry that determines a number of resource blocks forming a resource block group, which is a unit used to allocate a resource to the communication apparatus, in a first band or in a second band that is an expanded band to which the first band is expanded, and a subcarrier spacing for the second band is same or different from a subcarrier spacing for the first band; and a transceiver that is coupled to the circuitry and that communicates with a base station using the resource. One of the number of resource blocks set for the first band and the number of resource blocks set for the second band is an integer multiple of the other, and the number of resource blocks set for the first band and the number of resource blocks set for the second band are values that are a power of two. |
| US12212526B2 |
Reducing an interference between channels enabling communication between a satellite and a wireless telecommunication network
The system monitors multiple communication channels between a first communicator and a second communicator. At least a portion of the multiple channels spatially overlap. The overlapping channels carry different communications. The system determines whether a first set of two or more channels among the multiple channels are interfering with each other. Upon detecting interference, the system obtains a first multiplicity of physical resource blocks associated with a first channel and a second multiplicity of physical resource blocks associated with a second channel, where a physical resource block comprises a frequency band of predetermined size. The system allocates a first subset of the first multiplicity of physical resource blocks to the first channel, and a second subset of the second multiplicity of physical resource blocks to the second channel, where the first subset and the second subset do not overlap. |
| US12212520B2 |
Methods for energy-efficient unicast and multicast transmission in a wireless communication system
A method for time multiplexing subframes on a serving cell to a user equipment, wherein one set of subframes operate with the legacy LTE transmission format and one set of subframes operate with an evolved transmission format comprising reduced density CRS transmission without a PDCCH control region. |
| US12212517B2 |
Method and device for supporting repetitive CSI-RS resource transmission in mobile communication system
The disclosure relates to a communication technique for convergence of a 5G communication system for supporting a higher data transmission rate beyond a 4G system with an IoT technology, and a system therefor. The disclosure may be applied to an intelligent service (e.g., smart home, smart building, smart city, smart car or connected car, health care, digital education, retail business, security- and safety-related service, etc.) on the basis of a 5G communication technology and an IoT-related technology. A is provided for a base station in a communication system, which includes transmitting, to a terminal, a configuration for a CSI-RS resource set, wherein the configuration for the CSI-RS resource set includes information for at least one CSI-RS resource and repetition information, and wherein the at least one CSI-RS resource is associated with a same beam in case that the repetition information is set as on; and receiving, from the terminal, CSI based on the configuration for the CSI-RS resource set. |
| US12212512B2 |
Techniques for sidelink reference signal transmission
Methods, systems, and devices for wireless communications are described. A first user equipment (UE) may communicate with a second UE using a shared radio frequency spectrum band. The first UE may perform a listen before talk (LBT) and may transmit a first positioning reference signal (PRS) based on a result of the LBT. The first UE may transmit the first PRS using a first time resource that is based on a duration of the first PRS. In response to detecting the first PRS, the second UE may transmit a second PRS using a second time resource that is based on the duration of the first PRS. The second UE may transmit the second PRS based on performing an LBT without a random back-off, which may enable the second UE to transmit the second PRS with reduced latency and improved reliability. |
| US12212511B2 |
Determining an applicable time for a pathloss reference signal
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive an activation command for a pathloss reference signal (PLRS). The UE may estimate a pathloss using the PLRS based at least in part on an applicable time for the PLRS that indicates a time at which the PLRS is to be ready for use in estimating the pathloss. Numerous other aspects are provided. |
| US12212505B2 |
Numerology dependent signal transmission
Methods, systems, and devices for wireless communication are described. The methods, systems, and devices provide for identifying tone spacing for transmission or reception of signals. The identified tone spacing may vary depending on the transmission or reception spectrum band or signal type. Using the identified tone spacing, a number of repetitions or a number of symbols for transmission or receiver algorithm of a signal may be determined. |
| US12212504B2 |
Techniques to use descriptors for packet transmit scheduling
Techniques to use descriptors for packet transmit scheduling include grouping a plurality of data descriptors associated with blocks of data with a single descriptor. The single descriptor to include information related to the plurality of data descriptors. The single descriptor to be used to schedule transmission of the blocks of data from a computing platform. |
| US12212503B2 |
Method for scheduling TSN flows, communication system, and central network configuration entity
The disclosure relates to a method for scheduling TSN flows in a communication system within a time-sensitive network.The method is implemented at a central network configuration entity.Assistance information relating to a time granularity of transmission opportunities within a radio frame is obtained from at least one TSN bridge.Based on the obtained assistance information, a plurality of TSN flows is scheduled by computing time sequences of said TSN flows down to said time granularity.The disclosure further relates to a corresponding communication system and a corresponding central network configuration entity. |
| US12212501B2 |
Round-trip time measurement in a packet-switched communication network
A method for transmitting a bidirectional packet flow between two nodes of a communication network. One of the nodes transmits to the other node one initial single marked packet of the bidirectional packet flow. Each one of the nodes transmits to the other node unmarked packets, until one single marked packet is received from the other node. In response thereto, each node transmits to the other node one single marked packet of the bidirectional packet flow. This mechanism is continuously performed by the nodes, thereby causing the nodes to cyclically exchange single marked packets of the bidirectional packet flow. A measurement point placed on the path of the bidirectional packet flow may then detect the single marked packets transmitted in a certain direction and provide RTT measurements based on differences between their detection times. |
| US12212499B2 |
Management of traffic over a communication channel
A method for managing traffic processed by a target network function of a communication network is disclosed. The target network function transmits and receives traffic over a communication channel that carries traffic between network functions and application functions. The method, performed by a Data Analytics Function (DAF) of a communication network, comprises receiving information about traffic flows over the communication channel, establishing a priority amongst traffic flows over the communication channel, based on the received information, generating a recommendation for traffic processing on the basis of the established priority, and sending the generated recommendation to a function in the network that has a management responsibility for the target network function. |
| US12212497B2 |
Embedding an artificially intelligent neuron capable of packet inspection and system optimization in IPV6 enabled WLAN networks
Responsive to matching a site prefix to IPv6 network traffic from clients, the traffic as intended, and responsive to not matching the site prefix, classifying the corresponding traffic as unintended. An initial rate of packet occurrence and predict load caused by intended traffic and predicting load caused by unintended traffic is calculated, based on an initial rate of packet occurrence. The predicted traffic loads are fed back by configuring behavior of network modules according to the predictions of intended traffic load and unintended traffic load. Packet processing traffic at the network modules is based on traffic classification from the outcome of the AI-neuron. |
| US12212493B2 |
Inducing delay from a peer node to quantify latency-based behavior
Techniques and architecture are described for inducing precise delays in a network device (network node) that has the capability to act on packets/traffic flows based on policy configurations of the network device and delays experienced by traffic in the network device. This capability may be used for testing and verification of the network device to verify that the network device meets the configured policies. Additionally, this capability may be utilized in an operational network to selectively induce delays and measure its impact for purposes such as, for example, planning, stress testing, resiliency, etc. |
| US12212492B2 |
Systems, apparatuses and methods for network packet management
Methods and systems are provided for latency-oriented router. An incoming packet is received on a first interface. The type of the incoming packet is determined. Upon the detection that the incoming packet belongs to latency-critical traffic, the incoming packet is duplicated into one or more copies. Subsequently, the duplicated copies are sent to a second interface in a delayed fashion where the duplicated copies are spread over a time period. The duplicated copies are received and processed at the second interface. |
| US12212488B2 |
Discovering a reverse path for initiating bidirectional forwarding detection (BFD)
Systems and methods at a reflector node include steps of receiving a request from an initiator node in the network, the request having been sent in a forward direction from the initiator node to the reflector node to discover a reverse path in a reverse direction from the reflector node to the initiator node, and transmitting a reply to the initiator node with one or more reverse Segment Routing (SR) policies that meet one or more path constraint parameters in the request. The reply can include associated Segment Identifiers (SIDs) for the one or more reverse SR policies. The steps can further include implementing one of Bidirectional Forwarding Detection (BFD) or a Multi-Protocol Label Switching (MPLS) Ping procedure with the initiator node, sent over one of the one or more reverse SR policies. |
| US12212487B2 |
LAN system, method and unit supporting dynamic self-adaptive network configuration
The present invention discloses a LAN system, method and unit supporting dynamic self-adaptive network configuration. Through the integration of self-adaptive dynamic routing protocol with various nodes of network, the source node broadcasts and sends a message containing destination node information, and the intermediate node searches the destination node information in its connection state sheet and returns to the source node or adds its node information into the message and sends to other intermediate nodes based on the searching results, the intermediate node will modify its routing list and open the routing transfer function. The source node and the destination node will configure their routing lists respectively with the gateway and corresponding network interfaces through which the network segment of other node is reached to establish a routing connection. The system can automatically configure the network, and greatly decrease its dependence on the central node, increasing stability and reliability. |
| US12212482B2 |
Global-scale connectivity using scalable virtual traffic hubs
Network pathways are identified to transfer packets between a pair of regional virtual traffic hubs of a provider network. At a first hub of the pair, a first action is performed, resulting in a transmission of a packet received from a first isolated network to the second hub along a pathway selected using dynamic routing parameters. At the second hub, a second action is performed, resulting in the transmission of the packet to a destination within a second isolated network. |
| US12212479B2 |
Estimation of network latency based on aggregated performance data
Estimation of network latency based on aggregated performance data is disclosed. End-to-end latency between endpoints can comprise protocol-induced latency, access network-induced, core-network latency, and network-distance-based latency. Network latency, e.g., network-distance-based latency, also referred to as topological latency, can correspond to communication path length between endpoints. Crowdsourcing of communication path performance information can enable estimation of topological latency, and derivatives thereof, such as topological distance. Crowdsourcing can be the practice of obtaining information or input into a task or project by enlisting the services of a large number of people, either paid or unpaid, e.g., collection of performance information. The disclosure illustrates estimation of protocol-induced latency, access network-induced, and core-network latency, such that they can be compensated for in end-to-end latency information, thereby enabling estimation of topological latency that can be employed in determining, initiating, etc., a network response operation that can affect change in a network. |
| US12212470B2 |
Telecommunications network usage anomaly detection with simulated user interactions systems and methods
Systems and methods for using a user simulation model to facilitate detection of usage anomalies is disclosed. Usage data is received for a session between a user device and an application or service. The usage data is monitored to detect a usage anomaly, such as unusual or suspicious transactions, unexpected user or device attributes, or abnormal usage patterns. In response to detecting a request to terminate the session, the session is instead handed off to a user simulation model that simulates interactions of a user in the session. The user simulation model can be a machine learning model that is trained, using a training dataset, to simulate user interactions. When the user logs into the application or service, the session can be handed off from the user simulation model to the user, such that the session is perpetual or substantially perpetual. |
| US12212469B2 |
Offline test mode SDN validation
Various examples of systems and methods are described herein in which multiple intelligent electronic devices (IEDs) are connected in a network. A software-defined network (SDN) controller may include a rule subsystem, a test mode subsystem, a packet inspection subsystem, and a validation subsystem. The rule subsystem may define a plurality of flow rules. A test mode subsystem may operate the SDN in a testing mode. A packet insertion subsystem may insert test packets within the SDN while the SDN is in the testing mode. The validation subsystem may validate or fail each flow rule depending on how the various test packets are handled. |
| US12212468B2 |
System and method for managing network topology for metaverse services
Systems, methods, and processing nodes for managing network topology perform and/or comprise: receiving user metrics associated with a community of interest; obtaining network-associated requirements for each of a plurality of services deployed on a network, at least a portion of the plurality of services being metaverse services; obtaining computing-system-associated requirements for each of the plurality of services; and based on the user metrics, the network-associated requirements, and the computing-system-associated requirements, generating a network-site implementation plan recommendation that minimizes one or more cost functions. |
| US12212467B2 |
Configuration schemes for secondary cell, bandwidth part and physical resource block indexing
The disclosure describes configuration schemes for secondary cell (SCell), bandwidth part (BWP) and physical resource block (PRB) indexing. An apparatus of user equipment (UE) for BWP activation and deactivation operation is disclosed. The apparatus includes baseband circuitry that includes a radio frequency (RF) interface, and one or more processors. The one or more processors are to receive radio resource control (RRC) data via the RF interface, configure a timer for a BWP according to the RRC data, and trigger the timer for the BWP in response to detection of an event associated with an access node after the BWP has been activated. |
| US12212466B2 |
Split decision trees on client and server
Systems, devices, media, and methods are presented for splitting decision trees between server and client. The client of the systems and methods sends a configuration query. The server of the system and method receives the configuration query. The server retrieves Config rule(s) according to the configuration query. Each of the Config rule(s) can be represented by decision tree(s). The server evaluates the decision tree(s). If a definitive True or False cannot be derived from the evaluation using server knowledge, the server prunes the decision tree(s) and returns them to client side for further evaluation. |
| US12212463B2 |
Network topology backup
A method is described that determines that a replacement node device has been connected to a mesh network, the replacement node device corresponding to an original node that has been removed from the mesh network. In response to determining that the replacement node device has been connected to the mesh network, network topology data is accessed that specifies one or more data routing configurations that are each associated with a node device included in the mesh network. From among the one or more data routing configurations specified by the network topology data, a particular data routing configuration is identified that is associated with the original node device that has been removed from the mesh network. Data that specifies the particular data routing configuration that is associated with the original node device that has been removed from the mesh network is provided to the replacement node device. |
| US12212461B2 |
Configuration change control for computing environments
Solutions for balancing speed and risk by managing configuration changes include: receiving a second configuration item for displacement, in an exposure group, of a first configuration item; receiving an exposure state, wherein the exposure state indicates an exposure tree comprising a first configuration item branch and a second configuration item branch; determining, based at least on the exposure state: a first portion of the exposure group to continue with the first configuration item, and a second portion of the exposure group to receive the second configuration item; deploying the second configuration item to the second portion of the exposure group, in accordance with the exposure state; receiving, from the central orchestrator, an updated exposure state; and deploying the second configuration item in accordance with the updated exposure state. In some examples, the exposure tree is a hierarchical binary tree. An exemplary configuration item includes a software application version. |
| US12212455B2 |
Network control
Systems and methods for managing a network are disclosed. For example, systems and methods are disclosed for selectively disabling and/or otherwise configuring devices to avoid interference, overlapping service, and/or the like. Signal information for nearby devices can be detected and analyzed to determine device configuration settings. |
| US12212450B2 |
Distributed diagnostics for network wide route policy analyzer and other use cases
Presented herein are techniques to perform call failure diagnostics. A method includes receiving, at a network device, an indication of calls-of-interest, detecting, at the network device, a failure of one of the calls-of-interest, triggering, in response to the detecting, at the network device, diagnostics data analysis of data associated with the failure of one of the calls-of-interest, determining, based on the diagnostics data analysis, a cause of the failure of the one of the calls-of-interest, and notifying, by the network device, a management system of the cause of the failure of the one of the calls-of-interest and of recent configuration changes on the network device that are related to the cause of the failure of the one of the calls-of-interest. |
| US12212445B2 |
Modified demodulation reference signal patterns for orthogonal frequency-division multiplexing
Methods, systems, and devices for wireless communications are described. A user equipment (UE) may receive first control signaling identifying a demodulation reference signal (DMRS) pattern that may be uniformly distributed in a time domain and a frequency domain. The DMRS pattern may include a first set of resource elements for the DMRS, a second set of resource elements for guard tones adjacent to and greater in frequency than the first set of resource elements, and a third set of resource elements for guard tones adjacent to and lower in frequency than the first set of resource elements. The UE may receive second control signaling that schedules a data signal to be communicated between the UE and a network node in a set of time-frequency resources. The UE may communicate the data signal according to the second control signaling and the DMRS according to the DMRS pattern. |
| US12212443B2 |
Method and device for transmitting/receiving signal in wireless communication system
A method of operating a terminal and a base station in a wireless communication system and an apparatus supporting the same are disclosed. As an example, a method of operating a terminal in a wireless communication system comprises receiving information related to a configuration for a unique word (UW) from a base station, receiving UW-orthogonal frequency division multiplexing (OFDM) symbols including data from the base station, and processing the UW-OFDM symbols based on the information related to the configuration for the UW. |
| US12212442B2 |
GNB-controlled radio frequency (RF) sensing
Certain aspects of the present disclosure provide techniques for radio frequency (RF) sensing. A method that may be performed by a UE generally includes receiving, from a base station (BS), a configuration for the UE to perform RF sensing. The method generally includes transmitting an RF sensing signal based on the configuration. The method generally includes performing one or more measurements of one or more reflections of the RF sensing signal. Certain aspects of the subject matter described in this disclosure can be implemented in a method for wireless communication by a BS. The method generally includes receiving a RF sensing capabilities message from a UE. The method generally includes transmitting, to the UE, a configuration for the UE to perform RF sensing based on the RF sensing capabilities message. |
| US12212440B2 |
Systems and methods for signal isolation in power converters
A circuit is disclosed. The circuit includes a transmitter having an input terminal arranged to receive input data and a transmission node arranged to transmit intermediate data corresponding to the input data, and a receiver having a receive node arranged to receive the intermediate data and an output terminal arranged to produce output data corresponding to the input data, the receiver further including a dV/dt detector circuit coupled to the receive node and arranged to stop the production of the output data at the output terminal when the dV/dt detector circuit detects a rate of change of voltage with respect to time greater than a predetermined threshold. |
| US12212438B2 |
PPDU transmission method and related apparatus
Disclosed are a physical layer (PHY) protocol data unit (PPDU) transmission method and a related apparatus. The method includes: generating a PPDU, where the PPDU includes a universal signal field (U-SIG), and the U-SIG includes a subfield indicating that the PPDU is a null data packet (NDP); and sending the PPDU. In this way, a beamformee (Bfee) that receives the NDP can identify the NDP earlier. This helps improve efficiency of reading the NDP by the Bfee. The PPDU is an NDP used for a standard after 802.11ax. In a scenario in which wireless communication is performed by using the standard (for example, 802.11be) after 802.11ax, the Bfee can perform channel estimation based on the NDP. |
| US12212434B2 |
Method and system for managing network-to-network interconnection
This disclosure describes methods and systems to externally manage network-to-network interconnect configuration data in conjunction with a centralized database subsystem. An example of the methods includes receiving and storing, in the centralized database subsystem, data indicative of user intent to interconnect at least a first network and a second network. The example method further includes, based at least in part on the data indicative of user intent, determining and storing, in the centralized database subsystem, a network intent that corresponds to the user intent. The example method further includes providing data indicative of the network intent from the centralized database subsystem to a first data plane adaptor, associated with the first network, and a second data plane adaptor, associated with the second network. |
| US12212428B2 |
Network system having a network appliance
Systems, components, and methods for use in a commercial kitchen intelligence system. A network appliance and a plurality of kitchen components are coupled to a data communication network. The network appliance establishes a VPN connection with a portal remote to the commercial kitchen. The network appliance establishes communication with a point-of-sale (POS) system for receipt of POS data. The network appliance facilitates communication among the kitchen components on the data communications network independent of different protocols by which the kitchen components are configured to communicate. |
| US12212421B2 |
HARQ-ACK transmission on unlicensed spectrum
Methods and apparatuses for HARQ-ACK code book transmission on unlicensed spectrum are disclosed. A remote unit comprising: a receiver that receives, from a base unit, one or multiple downlink transmissions within a channel occupancy time initiated by the base unit, a first message indicating a first candidate opportunity for transmission of a Hybrid Automatic Repeat Request-Acknowledgement (HARQ-ACK) code book corresponding to the one or multiple downlink transmissions and a second message indicating a number of allowed opportunities for transmission of the HARQ-ACK codebook; a processor that determines the HARQ-ACK codebook and a number of total candidate opportunities for transmission of the HARQ-ACK codebook; and a transmitter that, in response to a channel access for the first candidate opportunity being successful, transmits the HARQ-ACK codebook in the first candidate opportunity, and, in response to the channel access for the first candidate opportunity being failed and the number of the total candidate opportunities being larger than one, attempts to transmit the HARQ-ACK codebook in a second candidate opportunity. |
| US12212417B2 |
Reliable HARQ-ACK transmission in unlicensed spectrum
Methods and apparatuses are described herein for selective one-shot hybrid automatic repeat request (HARQ) feedback by priority level. For example, a wireless transmit/receive unit (WTRU) may determine a priority associated with each transport block (TB). The each TB may correspond to respective HARQ processes associated with downlink transmissions from a base station (BS). The WTRU may receive, from the BS, a request for the one-shot HARQ feedback with an indication of a priority selected for the one-shot HARQ feedback. The WTRU may generate a HARQ codebook for transmission of the one-shot feedback. The HARQ codebook may comprise one or more information bits corresponding to one or more TBs determined based on the indicated priority. The WTRU may determine, based on a number of the one or more information bits, a transmission power and transmit, at the transmission power, the one-shot feedback comprising the generated HARQ codebook. |
| US12212414B2 |
Method and device for setting 1X EHT-STF sequence for broadband in wireless LAN system
Proposed is a method and device for receiving a PPDU in a wireless LAN system. Specifically, a receiving STA receives the PPDU from a transmitting STA through a broadband and decodes the PPDU. The PPDU includes an STF signal. The STF signal is generated on the basis of a first STF sequence for the broadband. The first STF sequence is obtained on the basis of a first preamble puncturing pattern of the broadband. When the broadband is a 320 MHz band, the first preamble puncturing pattern includes a pattern in which a 40 MHz or 80 MHz band is punctured in the broadband. The first STF sequence is a sequence including an M sequence and is defined as {M 1 −M 0 −M 1 −M 0 M 1 −M 0 −M 1 −M 0 −M −1 M 0 M −1 M 0 −M −1 M 0 M −1 M}*(1+j)/sqrt(2). |
| US12212412B2 |
Network coding to mitigate blockage with spatial division multiplexing beams
Methods, systems, and devices for wireless communications are described. A user equipment (UE) may receive control signaling indicating a network coding configuration for a set of transmit beams, each transmit beam in the set of transmit beams being spatial division multiplexed with respect to the other transmit beams of the set. The UE may identify based at least in part on the control signaling, a first set of one or more transmit beams of the set of transmit beams carrying parity information for a second set of one or more transmit beams in the set of transmit beams. The UE may perform beamformed communications over the set of transmit beams in accordance with the network coding configuration and the parity information. |
| US12212409B2 |
Data transmission method, data transmission apparatus and storage medium
A data transmission method, a data transmission device and a storage medium are provided. The data transmission method includes: obtaining a first parameter, in which the first parameter is used for indicating a modulation and coding scheme (MCS) index; determining a transport block size (TBS) index according to a mapping relationship table of MCS indexes and TBS indexes, in which the mapping relationship table includes a first number of TBS indexes, and a number of TBS indexes with values smaller than a preset TBS index value in the first number of TBS indexes is less than a second number; and determining a TBS according to the determined TBS index. |
| US12212407B2 |
Network switch and circuit board where precision time protocol module is used
A network switch can include a precision time protocol (PTP) module and a circuit board. The PTP module can provide a first clock signal and include a predetermined interface. The circuit board can include a socket, an oscillator and a selection unit. The socket can be inserted by the predetermined interface to receive the first clock signal. The oscillator can provide a second clock signal. The selection unit can include a first terminal, a second terminal, an output terminal and a selection terminal. The first terminal can receive the first clock signal when the predetermined interface is inserted into the socket. The second terminal can receive the second clock signal. The output terminal can output one of the first clock signal and the second clock signal. The selection terminal can receive a selection signal to control the output terminal to output the first clock signal or the second clock signal. |
| US12212406B2 |
Deterministic dynamic network traffic shaping
Systems, methods, and computer-readable media for deterministic dynamic shaping of traffic of a communication network are provided. |
| US12212405B2 |
Transmission device management device, transmission device management system, transmission device management method and program
A transmitter management device includes: a reception unit that receives a virtual switch configuration request from an upper management system; a determination unit that determines a plurality of paths including transfer processing by different optical transmitters on the basis of the configuration request received by the reception unit; and a setting unit that performs a setting for a plurality of the optical transmitters in such a way that a virtual switch that executes transfer processing on the basis of the paths determined by the determination unit is configured for each one of a plurality of the paths. |
| US12212404B2 |
Multi-hop wireless relay support
Methods, devices, and systems are disclosed for multi-hop relays that may be implemented by advertising first relaying capabilities and a first number of hops to reach a remote wireless transmit/receive unit (WTRU), receiving second relaying capabilities and a second number of hops to reach the remote WTRU from a selected relay WTRU, updating a relay capabilities table based on the second relaying capabilities and the second number of hops, receiving a packet comprising a payload, the packet having a traffic type and further comprising a maximum number of hops, selecting the selected relay WTRU based on the traffic type, the maximum number of hops, and the relay capabilities table, generating a first updated packet comprising the payload, the traffic type and a first updated number of hops that is one less than the maximum number of hops, and transmitting the first updated packet to the selected relay WTRU. |
| US12212400B2 |
Method and system for hybrid software defined networking in a terrestrial plus mobile network node network
A method and system for simplifying interactions of a Software Defined Network (SDN) controller including: receiving a network program to traverse a mobile node network including mobile nodes and ground nodes, wherein the ground nodes include an ingress node and an egress node; forecasting links, based on a temporal line-of-sight topology, of the mobile node network between the mobile nodes and the ground nodes; determining network program subfunctions that reflect an availability of the links for a time period; selecting, for the time period, a viable path including one or more of the network program subfunctions to traverse from the ingress node to the egress node; and communicating network traffic from the ingress node to the egress node using the viable path during the time period, wherein a portion of the viable path traverses one or more of the mobile nodes and the mobile nodes move along deterministic paths. |
| US12212394B2 |
Information transmission method and apparatus and terminal device
In an information transmission process, a terminal device determines a first antenna unit to be assisted and uses a reconfigurable intelligent surface (RIS) module to assist the first antenna unit in transmitting target information by the RIS module generating an additional transmit beam or receive beam. |
| US12212391B2 |
Electronic devices and communication methods
Disclosed are electronic devices and communication methods. An electronic device comprises a processing circuit, the processing circuit being configured to: receive an RRC signaling and/or a MAC CE signaling from a control-side electronic device; determine, based on a first beam indication information of control channel in the RRC signaling and/or the MAC CE signaling, an activated beam for performing a transmission in the physical control channel with the control-side electronic device; rewrite the activated beam based on a second beam indication information of control channel included in a downlink control information (DCI) carried by a physical downlink control channel (PDCCH); and use the rewritten activated beam to perform the transmission in the physical control channel with the control-side electronic device. |
| US12212390B2 |
Joint precoding across multiple beams
One innovative aspect of the subject matter described in this disclosure can be implemented in a method for wireless communication. The method includes determining a configuration of reference signal (RS) resources to be used by a user-equipment (UE) to perform beam measurements, transmitting, to the UE, an indication of the configuration of the RS resources, and receiving, from the UE, a report indicating a plurality of RS resource indicators based on the beam measurements, each of the RS resource indicators being associated with one of the RS resources. In some aspects, the BS selects a subset of the RS resources based on the report from the UE, transmits, to the UE, an indication to provide channel measurement information for the subset of the RS resources, and receives a report including the channel measurement information from the UE. The BS may also perform joint precoding of signals for transmission via the RS resources based on the channel measurement information. |
| US12212389B2 |
Radio link monitoring in networks with beam-specific bandwidth parts
The present application relates to devices and components including apparatus, systems, and methods for radio-link monitoring operations in radio networks that include beam-specific bandwidth parts. |
| US12212388B2 |
Sensing based dynamic beams
Example implementations include a method, apparatus and computer-readable medium for wireless communication configured for estimating a channel using a set of predefined sensing beams to measure reference signals. Estimating the channel may include generating an N×N channel correlation matrix, where N is a number of antenna elements in the antenna array. The implementations further include generating a set of dynamic beam weights to maximize a reference signal received power (RSRP) based on the estimated channel. The set of dynamic beam weights may be based on an eigenvector of the channel correlation matrix. Additionally, the implementations further include applying the set of dynamic beam weights to an antenna array. |
| US12212384B2 |
Channel state information feedback in wireless communication
Methods, systems, and devices for reducing channel state information feedback channel overhead by compressing coefficients of precoding vectors and reporting a subset of the compressed coefficients based on several parameters including network-signaled parameters. Some embodiments may be used in wireless communication embodiments in which channel state information from many layers and many frequency domain units need to be reported. |
| US12212383B2 |
Communication path presuming method and wireless communication device
An accompanying matrix adjH(z, t) of a transfer function matrix H(z, t) established between a transmission station and a reception station is defined as a transmission weight WT(z). An M sequence part is divided into two blocks to obtain an M sequence first half part and an M sequence second half part. A training symbol #1 having the M sequence second half part and the M sequence first half part in that order and a training symbol #2 having the M sequence first half part and the M sequence second half part in that order are processed by the transmission weight WT(z). In the receiving station, a virtual training signal block having the M sequence part S and the M sequence first half part is generated. A communication path response R(m) is calculated by a slide correlation method for the virtual training signal block. |
| US12212380B2 |
Low power passive MIMO surface using aperture type radiators
Designs and control techniques for passive Multiple-Input Multiple-Output (pMIMO) surfaces are provided. An example array of reconfigurable reflective elements includes a plurality of unit cells each comprising a cross-slot radiating element, a first varactor diode disposed across a first end of the cross-slot radiating element and configured to control polarization in a first plane, and a second varactor diode disposed across a second end of the cross-slot radiating element and configured to control polarization in a second plane, and a controller coupled to the first varactor diode and the second varactor diode and configured to provide control signals to the first varactor diode and the second varactor diode to vary a direction of a reflected signal. |
| US12212379B2 |
System for reducing power losses in communications cabling
An example system for reducing power loss in telecommunications cabling is provided. The system includes a power supply, at least one powered device, and a cabling system electrically and communicatively connecting the power supply to the at least one powered device. The cabling system includes a first positive polarity wire pair and a first negative polarity wire pair. The system includes a corrective circuit module connected to the cabling system. The corrective circuit module includes a second positive polarity wire pair, a second negative polarity wire pair, wiring connecting the first positive polarity wire pair with the second positive polarity wire pair, and wiring connecting the first negative polarity wire pair with the second negative polarity wire pair. |
| US12212378B2 |
Generating an interference model via crowdsourcing operations
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a device may receive serving beam information associated with a plurality of wireless communication devices. The device may generate an interference model based at least in part on the serving beam information associated with the plurality of wireless communication devices, the interference model indicating locations of one or more clusters in a channel environment. The device may obtain, using the interference model, information associated with an interference prediction for a transmitting wireless communication device. The device may transmit the information associated with the interference prediction to the transmitting wireless communication device. Numerous other aspects are provided. |
| US12212374B2 |
Radio frequency branch calibration of a radio transceiver device
Mechanisms for calibrating radio frequency branches of a radio transceiver device in a radio access network node. The method includes co-scheduling downlink time/frequency resources for terminal devices in accordance with a set of terminal device identifiers. One of the terminal device identifiers is not of any terminal device served by the radio access network node. The downlink time/frequency resources for this terminal device identifier define time/frequency resources for calibrating the radio frequency branches. The method includes determining a difference in amplitude/phase between the radio frequency branches by analysing a signal as received via an internal coupler unit in the radio transceiver device. The signal represents the time/frequency resources as transmitted over at least some of the radio frequency branches. The method includes calibrating the radio frequency branches by adjusting an amplitude/phase setting of at least one of the radio frequency branches according to the determined difference. |
| US12212373B2 |
Intermodulation measurement method, intermodulation measuring apparatus and computer program for ascertaining an intermodulation source in a transmission link
A method for ascertaining an Intermodulation source by measuring intermodulation in a transmission link having the steps of simultaneously supplying a first and second test signals to the transmission link; measuring an output signal from the transmission link in response to the supplied test signals and analyzing the output signal in a discrete frequency spectrum to determine an intermodulation signal level (PPIM) at a discrete intermodulation frequency (fPIM), the measurement frequency range of the frequency spectrum having at least the signal level (P0 . . . n) associated with a further discrete measurement frequency (f0 . . . n). |
| US12212371B2 |
Method and system for sharing quantum entanglement between distant nodes without quantum memories
A method of entangling photons in a distributed quantum-based communication system is disclosed which includes generating sets of entangled photon pairs between a plurality of remote nodes (Nodes Ai and Nodes Bi) and a central entangling node (Node C), wherein Nodes Ai and Bi are in both quantum communication and classical communication with Node C, wherein one photon of a first entangled photon pair set is transmitted Node Ai and one photon of a second entangled photon pair set is transmitted to Node Bi, each over the associated quantum channels, and performing Bell-state measurements between the other photon of the first entangled photon pair and the other photon of the second entangled photon pair, such that if the photons arrive at about same time having about same frequency, then the photon pairs are marked as being entangled. |
| US12212370B2 |
Light receiving device and communication device
A light receiving device that includes a lens that collects a spatial light signal, a sensor array including a plurality of light receivers that receives the spatial light signal collected by the lens, and a reception unit that integrates an electric signal derived from the spatial light signal received by each of the plurality of light receivers and selects a light receiver that receives the spatial light signal. according to a voltage value of the integrated electric signal. |
| US12212361B2 |
Broadband network slicing selection and control
Disclosed are an SDBANS controller and associated orchestration system configured to implement scalable transport network slicing in an XGS-PON. Accordingly, the orchestration system configures the SDBANS controller for different regions and maps TN NSSI ID information to an OLT port of an SD-CPON OLT. The OLT port is allocated by the SDBANS controller. |
| US12212356B2 |
Modulation partitioning and transmission via multiple antennas for enhanced transmit power capability
Apparatus and methods for modulation partition and transmission via multiple antennas for enhanced transmit power capability are provided herein. In certain embodiments, an RF communication system includes a transceiver that generates a first RF signal and a second RF signal corresponding to partitions of a modulated RF signal. For example, the first RF signal and the second RF signal can be associated with different RB allocations of one or more channels of a frequency band. The RF communication system further includes a first transmit chain that processes the first RF signal to generate a first RF output signal for transmission on a first antenna, and a second transmit chain that processes the second RF signal to generate a second RF output signal for transmission on a second antenna. |
| US12212348B2 |
Controlling impedance matching circuitry
A system for controlling an impedance matching circuitry can include an antenna, a receiving or transmitting circuitry, an impedance matching circuitry, a circuitry, and a controller. The impedance matching circuitry can be coupled between the antenna and the receiving or transmitting circuitry. The circuitry can be configured to set a value of an impedance of the impedance matching circuitry. The controller can be configured to determine, based on a state of an electronic device, that the electronic device is configured to perform one or more functions with one or more of a satellite radio navigation signal at a first or a second frequency, a wireless local area network signal at a third or a fourth frequency, or a personal area network signal at a fifth or a sixth frequency. The controller can be configured to control, in response to a determination of the state of the electronic device, the circuitry. |
| US12212346B2 |
Packet preamble detection using doppler signature pattern
A ground station computing system for communicating with a satellite is provided, including a processor and associated memory storing instructions that cause the processor to execute a software-defined radio (SDR) program. The SDR program is configured to receive signals from a plurality of satellites and determine a doppler shift signature pattern of one of the satellites. The SDR program is further configured to detect, within the received signals from the plurality of satellites, packet preambles from the one of the plurality of satellites, based on correlations between portions of the received signals and the doppler shift signature pattern. |
| US12212345B2 |
Application of orbital angular momentum to fiber, FSO and RF
A communications system has a transmitter circuit for transmitting a communications signal. The transmitter receives a plurality of input data streams and applies an orthogonal function to each of the plurality of input data streams. The transmitter groups the input streams having the orthogonal function applied thereto into a plurality of groups. The orthogonal functions applied to the plurality of input data streams do not repeat within the plurality of groups to limit interference between the input data streams within the group. The transmitter applies a different wavelength to each of the plurality of groups input data streams. The different wavelengths limit interference between the plurality of groups of input data streams. The transmitter applies a positive polarization and a negative polarization to each of the plurality of groups of input data having a different wavelength applied thereto. The positive and the negative polarizations are applied to a pair of groups having a same wavelength applied thereto limit interference between the pair of groups. The transmitter transmits the plurality of input of data streams over a plurality of channels on a communications link as the communications signal. Each of the plurality of channels has a unique combination of orthogonal function, wavelength and polarization associated therewith. |
| US12212344B2 |
Information processing apparatus and preset dictionary generating method
According to one embodiment, an information processing apparatus includes a processor. The processor divides teacher data into character strings, calculates a score of each of the character strings based on at least an appearance frequency of each character string in the character strings, an appearance position of each of the character string in the character strings, and a length of each of the character strings, and determines a position of each of the character strings in a preset dictionary based on the score. |
| US12212343B2 |
Efficient codec for electrical signals
A method for compressing a signal, the method comprising: acquiring, via a signal recording module, a primary signal; modelling, via a processor, a model signal of the primary signal by: acquiring, via the processor, a sampled signal; acquiring, via the processor, a windowed signal; and extracting, via the processor: a fundamental frequency waveform having a fundamental magnitude and a fundamental phase; and at least one harmonic frequency waveform having a harmonic magnitude and a harmonic phase; wherein the model signal comprises the fundamental frequency waveform and the at least one harmonic frequency waveform; calculating, via the processor, an error signal between a reconstructed signal and the primary signal; determining, via the processor, an optimal gain from at least; an averaging step providing an average value, a predefined threshold, and a scaled signal. |
| US12212339B2 |
Error correction circuit, memory system, and error correction method
An error correction circuit, including an error correction code (ECC) encoder configured to generate parity data corresponding to main data based on a parity generation matrix, and to output a codeword including the main data and the parity data to a plurality of memory devices; and an ECC decoder configured to: read the codeword from the plurality of memory devices, generate a syndrome corresponding to the codeword based on a parity check matrix, detect an error pattern based on the syndrome, generate a plurality of estimation syndromes corresponding to the error pattern using a plurality of partial sub-matrices included in the parity check matrix, and correct an error included in the read codeword based on a result of a comparison between the syndrome and the plurality of estimation syndromes. |
| US12212331B2 |
Analog-to-digital convertors positioned on a single semiconductor die
Methods for operating two or more analog-to-digital converters (ADCs) are presented herein. The method may be implemented in an integrated circuit. The integrated circuit may include a first ADC and a second ADC disposed on a single semiconductor die. The integrated circuit may also include logic circuitry operably coupled to the first and second ADCs. For a digital value obtained by conversion, by the first ADC, of a first analog signal sampled by the first ADC during a period of time overlapping with another period of time during which a second analog signal is being converted by the second ADC, the logic circuitry may be configured to cause the digital value to be marked as noisy. |
| US12212330B2 |
Power supply and setpoint voltage generation
Digital-to-analog converter circuitry includes sequence of multiple current drive modules. The sequence may include a first current drive module and a second current drive module of a digital-to-analog converter. The first current drive module is switchable between: i) a first mode of producing a first reference current that is mirrored by a second current drive module coupled to the first current drive module; and ii) a second mode of mirroring a second reference current that is produced by the second current drive module or a third current drive module coupled to the first current drive module. |
| US12212328B2 |
Phase detectors with extrapolation of timing events
Apparatus and methods for clock synchronization and frequency translation are provided herein. Clock synchronization and frequency translation integrated circuits (ICs) generate one or more output clock signals having a controlled timing relationship with respect to one or more reference signals. The teachings herein provide a number of improvements to clock synchronization and frequency translation ICs, including, but not limited to, reduction of system clock error, reduced variation in clock propagation delay, lower latency monitoring of reference signals, precision timing distribution and recovery, extrapolation of timing events for enhanced phase-locked loop (PLL) update rate, fast PLL locking, improved reference signal phase shift detection, enhanced phase offset detection between reference signals, and/or alignment to phase information lost in decimation. |
| US12212312B1 |
Half-bridge circuit driving chip
A half-bridge circuit driving chip includes a control module, a level shift unit, a programming module, and a driving unit. The control module is configured to receive an enabling signal and an input signal, and output a set signal and a reset signal. The level shift unit is configured to receive the set signal and the reset signal, and output a relative set signal and a relative reset signal. When the enabling signal is at a low level, the half-bridge circuit driving chip is in a programming mode, and the programming module performs decoding according to the relative set signal and the relative reset signal, and outputs a circuit parameter. When the enabling signal is at a high level, the half-bridge circuit driving chip is in a working mode, and the driving unit generates an output signal according to the relative set signal and the relative reset signal. |
| US12212307B2 |
Reconfigurable filter
An apparatus is disclosed for a reconfigurable filter. In example aspects, the apparatus includes a filter circuit that has a first filter port and a second filter port. The filter circuit includes a filter network, an acoustic resonator, and a switch circuit. The filter network includes one or more acoustic resonators coupled between the first filter port and the second filter port. The acoustic resonator is coupled to the filter network and coupled between the first filter port and the second filter port. The switch circuit is coupled between the acoustic resonator and the second filter port, and the switch circuit is configured to connect the acoustic resonator into a parallel acoustic resonator arrangement in a first state and connect the acoustic resonator into a serial acoustic resonator arrangement in a second state. |
| US12212304B1 |
Resonator electrode shields
A microelectromechanical system (MEMS) resonator includes a resonant semiconductor structure, drive electrode, sense electrode and electrically conductive shielding structure. The first drive electrode generates a time-varying electrostatic force that causes the resonant semiconductor structure to resonate mechanically, and the first sense electrode generates a timing signal in response to the mechanical resonance of the resonant semiconductor structure. The electrically conductive shielding structure is disposed between the first drive electrode and the first sense electrode to shield the first sense electrode from electric field lines emanating from the first drive electrode. |
| US12212302B2 |
Surface acoustic wave resonator device and method for manufacturing the same and filter
A surface acoustic wave resonator device and method for manufacturing the same and filter, the surface acoustic wave resonator device includes: a piezoelectric substrate; an interdigital transducer, disposed on the piezoelectric substrate and comprising a first interdigital electrode structure and a second interdigital electrode structure, wherein each interdigital electrode structure comprises an interdigital electrode and an interdigital electrode lead-out part connected with each other; and a first temperature compensation layer, disposed on the piezoelectric substrate and comprising a body part and a protruding part, wherein the body part covers the interdigital transducer, the protruding part is protruded from the body part towards the piezoelectric substrate in a third direction perpendicular to a main surface of the piezoelectric substrate, and is surrounded by the piezoelectric substrate in a direction parallel to the main surface of the piezoelectric substrate. |
| US12212301B2 |
Composite substrate and surface acoustic wave element
A composite substrate includes: a piezoelectric layer; and a reflective layer arranged on a rear surface side of the piezoelectric layer, wherein the reflective layer includes a high-impedance layer and a low-impedance layer containing silicon oxide, and wherein a ratio of a region of first structures in the high-impedance layer is more than 70%. |
| US12212294B2 |
Low noise amplifiers with gain steps provided by bypass stage and current steering
Low noise amplifiers (LNAs) are disclosed herein. In certain embodiments, an LNA includes an input balun configured to convert a single-ended radio frequency (RF) receive signal to a differential RF receive signal, an amplifier chain configured to amplify the differential RF receive signal to generate a differential amplified RF receive signal, and an output balun configured to convert the differential amplified RF receive signal into a single-ended amplified RF receive signal. The LNA's amplifier chain is operable in multiple gain modes, and includes a first differential amplification stage, a second differential amplification stage, and a third differential amplification stage. |
| US12212293B2 |
Amplifier circuits and method for operating amplifier circuits
The present disclosure relates to chopper amplifier circuits with inherent chopper ripple suppression. Example implementations can realize a doubly utilized chopper amplifier circuit that is a current-saving circuit with a wake-up function that is capable of providing a self-wake signal in order to change into a fast, low-jitter/low-latency mode, and to provide a wake-up signal for a sleeping microprocessor or a system in response to signal changes. |
| US12212288B2 |
Harmonic processing circuit and amplification device
A harmonic processing circuit includes a first inductor having a first end connected to a connection line connected between an amplifier and an impedance matching circuit, and a second end connected to a first node, a first transmission line having a third end connected to the first node and a fourth end connected to a second node, and a parallel resonant circuit having a fifth end connected to the second node and a sixth end connected to a reference potential, wherein a second inductor and a first capacitor are connected in parallel between the fifth end and the sixth end, wherein when the first inductor is viewed from the connection line, an impedance at a frequency of a fundamental wave amplified by the amplifier is larger than an impedance at a frequency of a second harmonic having twice the frequency of the fundamental wave. |
| US12212286B2 |
Complementary envelope detector
A complementary envelope detector contemplates using two pair of mirrored transistors to provide a differential output envelope signal to an associated envelope tracking integrated circuit (ETIC) that supplies control voltages to an array of power amplifiers. While bipolar junction transistors (BJTs) may be used, other exemplary aspects use field effect transistors (FETs). In an exemplary aspect, a first pair are negative channel FETs (nFETs) and a second pair are positive channel FETs (pFETs). |
| US12212284B2 |
Saturation detection of power amplifiers
Apparatus and methods for saturation detection of power amplifiers are provided. In certain embodiments, a power amplifier system includes a carrier amplifier including a first capacitor and a first gain bipolar transistor having a base configured to receive a radio frequency signal through the first capacitor. The power amplifier system further includes a saturation detector including a resistor and a detection bipolar transistor that is located within 20 μm of the first gain bipolar transistor. The detection bipolar transistor has a base connected to the base of the first gain bipolar transistor through the resistor and a collector that generates a saturation detection current indicating a saturation of the first gain bipolar transistor. |
| US12212282B2 |
Oscillator
An oscillator includes: a resonator element; an oscillation circuit configured to oscillate the resonator element and generate a clock signal; a first temperature sensor; a digital control circuit configured to operate based on the clock signal and output a control signal based on a temperature detected by the first temperature sensor; a temperature control circuit configured to output a control voltage based on the control signal; a temperature control element configured to control a temperature of the resonator element based on the control voltage; a second temperature sensor; and a second temperature sensor monitoring circuit including an analog circuit and configured to monitor a temperature detected by the second temperature sensor. The temperature control circuit stops a supply of the control voltage to the temperature control element when an abnormality in the temperatures of the first temperature sensor and the second temperature sensor is detected. |
| US12212280B2 |
Multifunction spacer-wire clips for solar panels and related methods
Multifunction spacer-wire clips provide spacing and protection during the shipping of solar panels. A multifunction spacer-wire clip can be subsequently used for wire management during installation and solar panel operation. One example of a spacer-wire clip includes a flange overhang portion, a main body portion. a frame arm portion, and a wire retainer extending from the main body portion sized and configured to selectively retain at least one wire within at least one wire cavity. |
| US12212279B1 |
Solar panel washing device
The solar panel washing device is a mechanical device. The solar panel washing device incorporates a cleaning structure, a photovoltaic cell, and a water source. The cleaning structure forms a fluidic connection with the water source. The cleaning structure cleans the photovoltaic cell. The cleaning structure discharges water received from the water source onto the photovoltaic cell. The solar panel washing device removes dirt and detritus from the photovoltaic cell. |
| US12212276B2 |
Energy harvesting and electrical power generation
An apparatus for harvesting energy, such as solar, wind, wave, thermal, and the like, including a solar panel and a duct supporting the solar panel at an operational angle. The duct comprises a bottom shroud and side shrouds, therein forming a large aperture, a small aperture, and an oblique frustum shaped cavity. The oblique frustum shaped cavity is configured to direct a flow of fluid from the large aperture to the small aperture. A flow energy generator, such as a turbine, located at the small aperture is configured to collect flow energy. Temperature differences between the solar panel and the environment may be used to harvest thermal energy with a thermoelectric generator. Fluid flow under the solar panel may decrease the panel temperature and increase the efficiency. Generators may be operated in reverse to lower the solar panel temperature and increase efficiency. |
| US12212271B2 |
System and method for providing grid-forming control for a double-fed wind turbine generator
A method for providing grid-forming control of a double-fed generator of a wind turbine includes receiving, via a stator voltage regulator of a converter controller, one or more voltage commands from an external controller. Further, the method includes determining, via the stator voltage regulator, one or more rotor current commands as a function of a magnetizing current command and a stator current feedback signal of the double-fed generator. Thus, the method includes controlling a rotor voltage of the double-fed generator using the one or more rotor current commands to achieve the one or more voltage commands. |
| US12212268B2 |
Motor control device
A motor control device drives first and second motors for outputting torque in braking or non-braking direction in a vehicle brake device, includes: an electric power converter that includes first to third legs having positive and negative switch elements; and a control unit. When the control unit energizes from the positive switch element of the first or third leg to the negative switch element of the second leg, the first and second motors output the torque in a same direction. When an absolute value of current flowing or estimated to flow in at least one of the first motor and the second motor exceeds a current threshold, the control unit drives the positive and negative switch elements of the second leg. |
| US12212263B2 |
Motor driving apparatus and method
The present disclosure relates to a motor driving apparatus and a method. More specifically, a motor driving apparatus according to the present disclosure includes: an electric motor; an inverter that drives the electric motor using a plurality of high-side switching elements and low-side switching elements; a rotary switch that connects the electric motor and the inverter to each other; and a controller that identifies a switching element in which a malfunction has occurred in a case where a malfunction has occurred in the inverter connected to the electric motor and performs control of the rotary switch such that connection with the identified switching element is cut out, and a switching element not connected to the electric motor is connected. |
| US12212260B2 |
Control circuit for an electric motor and controlling method thereof
A control circuit for an electric motor includes low and high voltage subcircuits, and an isolation barrier therebetween. The low voltage subcircuit comprises a current controller configured to generate a driving signal, and a feedback loop. The high voltage subcircuit comprises a power bridge configured to output a current that drives the motor, a current sensor configured to measure the current, an analog front-end and an analog-to-digital converter (ADC). The analog front-end is configured to apply as a function of the measured current. The isolation barrier comprises an isolator having: first and second channels to pass respectively a clock signal and a control signal from the low to high voltage subcircuit to select the gain; and third and fourth channels to pass respectively an output signal of the ADC and a replica of the clock signal from the high to low voltage subcircuit. |
| US12212259B2 |
Oscillating-resonant-module controller
The current document is directed to various types of oscillating resonant modules (“ORMs”), including linear-resonant vibration modules, that can be incorporated in a wide variety of appliances, devices, and systems to provide vibrational forces. The vibrational forces are produced ley back-and-forth oscillation of a weight or member along a path, generally a segment of a space curve. A controller controls each of one or more ORMs to produce driving oscillations according to a control curve or control pattern for the ORM that specifies the frequency of the driving oscillations with respect to time. The driving oscillations, in turn, elicit a desired vibration response in the device, appliance, or system in which the one or more ORMs are included. The desired vibration response is achieved by selecting and scaling control patterns in view of known resonance frequencies of the device, appliance, or system. |
| US12212258B2 |
Controller for rotary electric machine and electric power steering apparatus
To provide a controller for rotary electric machine and an electric power steering apparatus which can increases decreases an increase amount of the current of d-axis in the negative direction appropriately, and can perform the weakening magnetic flux appropriately, irrespective of increase and decrease in the rotational angle speed, without using the information on the inductance and the interlinkage flux of the rotor. A controller for rotary electric machine, in a case where the current command value of q-axis is a positive value, changes the current command value of d-axis, based on a deviation between an offset q-axis current command value obtained by subtracting the q-axis offset value of the positive value from the current command value of q-axis, and the current detection value of q-axis. |
| US12212257B2 |
Permanent magnet synchronous motor (PMSM) integrated position sensing
A Permanent Magnet Synchronous Motor (PMSM) includes a hollow cylindrical stator with stator windings and a magnetic rotor having M pole pairs arranged to rotate around a rotational axis in the stator by a rotor shaft. The stator windings are energized to generate a magnetic rotational field in dependence upon the rotational position of the magnetic rotor. Two or more analog magnetic flux sensors are positioned within the hollow cylindrical stator and arranged concentrically with respect to the rotational axis around the stator at a constant mechanical angle equal to a constant electrical angle divided by M relative to each other. The magnetic flux sensors are spaced directly from the magnetic rotor by a radial gap (X) in such a way that the magnetic flux of the magnetic rotor impinges on the analog magnetic flux sensors without obstruction to output two or more sinusoidal signals with phases separated by the constant electrical angle that can be evaluated to determine the rotational position of the magnetic rotor. Sensor integration eliminates the additional sense magnet, Hall sensors and CCA positioned external to the motor housing to provide a smaller motor package at lower cost. Integration also facilitates the use of the PMSM in high-temperature or high-shock (high g) environments such as gun-launched guided projectiles or hypersonic missiles. |
| US12212255B2 |
Electric motor control device, vehicle, and electric motor control method
Provided are an electric motor control device and an electric motor control method with high reliability capable of performing noise reduction control (or sensorless control) by superimposing a radio-frequency voltage and capable of performing compensation of a dead time of an inverter with a minimum necessary configuration. The electric motor control device includes: a radio-frequency voltage superimposing unit that adds a radio-frequency voltage command value to a fundamental wave voltage command value and outputs a voltage command value; a radio-frequency current estimation value calculation unit that estimates a radio-frequency current value from the radio-frequency voltage command value; a dead time compensation current estimation value calculation unit that adds a radio-frequency current estimation value estimated by the radio-frequency current estimation value calculation unit to a fundamental wave current command value; and a dead time compensation voltage calculation unit that compensates an output voltage of an inverter according to a dead time compensation current estimation value calculated by the dead time compensation current estimation value calculation unit. |
| US12212252B2 |
Electrostatic motor
An example system including an electrostatic machine including a rotor plate comprising a plurality of rotor electrodes, and rotatably fixed to a shaft configured to rotate about an axis; a stator plate comprising a plurality of stator electrodes, and rotatably fixed to a housing defining the rotor plate, the stator plate, and at least a portion of the shaft; an excitation circuit electrically; a controller, comprising: a rotor feedback circuit structured to interpret a voltage response value; a rotor position characterizing circuit structured to determine a voltage injection value; and a rotor position circuit structured to determine a calibrated rotor position value in response to the rotor position value; and wherein the excitation circuit is responsive to the voltage injection value to inject a voltage on at least one of the plurality of rotor electrodes or stator electrodes. |
| US12212251B2 |
Power conversion device having converter cells connected in series in a multiplexed manner and each including an energy storage element
A power conversion device includes: a power converter including, for respective phases of AC, leg circuits each including a pair of arms connected in series, the arms including a plurality of converter cells which are connected in series and each of which has an energy storage element and a plurality of semiconductor elements, the leg circuits being connected in parallel between positive and negative DC terminals, the power converter being configured to perform power conversion between multiphase AC and DC; and a control unit. The control unit corrects an AC voltage command value for controlling AC voltage of the power converter, by a zero-phase-sequence voltage command value having a set amplitude and a set phase, and performs adjustment control for adjusting at least either the amplitude or the phase of the zero-phase-sequence voltage command value on the basis of electric energy variation in the arm. |
| US12212249B1 |
Two-step inverter for wireless power applications
A switched capacitor converter can include a switched capacitor stage comprising a flying capacitor and a ladder of three switching devices. A first switching device can be connected between a DC input of the switched capacitor converter and an AC bus. A second switching device is connected between the DC input and a third switching device. The third switching device can be connected between the second switching device and ground. The flying capacitor can be connected between the AC bus and a junction of the second switching device and the third switching device. The switched capacitor converter can further include an inverter stage having an input coupled to the AC bus and an output that delivers an AC voltage. |
| US12212247B2 |
Three-phase LLC converters with integrated magnetics
Three-phase interleaved resonant converters with integrated magnetics are described. In various examples, transformers are integrated into a transformer core of a converter. A primary side circuit includes a set of circuit segments corresponding to phases of the three-phase interleaved converter. Each of the circuit segments include an integrated winding component that provides a transformer primary winding and a resonant inductor connected in series. |
| US12212234B2 |
Switching regulator implementing negative current protection
A controller for a switching regulator incorporates a protection circuit to limit the negative current to a negative current threshold while operating the switching regulator to sink current from the load without damage to the power switches. In some embodiments, in response to the negative current reaching the negative current threshold, the protection circuit turns off the low-side power switch and turns on the high-side power switch for a maximum time period. In the event the negative current has not recovered, the high-side power switch and the low-side power switch are both turned off while the high-side power switch conducts the negative current through the high-side power switch body diode. When the negative current recovers to a recovery level, the low-side power switch can then be turned on. The protection circuit repeats the process each time the negative current is detected to have reached the negative current threshold. |
| US12212231B2 |
Pump capacitor configuration for switched capacitor circuits
A cascade multiplier includes a switch network having switching elements, a phase pump, and a network of pump capacitors coupled with the phase pump and to the switch network. The network of pump capacitors includes first and second capacitors, both of which have one terminal DC coupled with the phase pump, and a third capacitor coupled with the phase pump through the first capacitor. |
| US12212230B2 |
Devices, systems, and methods for reducing leakage current in power converters
Devices, systems, and methods are disclosed for reducing leakage current in power converters, such as for HVAC systems, to facilitate compatibility with GFCI devices. In various embodiments, the power converter may include components to filter and/or reduce common mode noise, such as by removing high frequency components of the common mode noise, while maintaining leakage current below a trip threshold of a GFCI device. |
| US12212226B2 |
Conversion circuit
A conversion circuit includes a voltage supply circuit, a storage circuit, and a gate terminal. The storage circuit includes a first terminal and a source terminal. The voltage supply circuit is configured to provide a bias voltage according to a power supply voltage. The first terminal is configured to receive a low voltage. The source terminal is configured to output a source voltage according to a storage voltage and the low voltage, wherein the storage circuit is configured to storage the storage voltage according to the bias voltage and the low voltage. The gate terminal is configured to output a gate voltage, wherein during a first period, the gate terminal is coupled to the first terminal, and the gate-source voltage can form a negative voltage. |
| US12212224B2 |
Driving apparatus
Provided is a driving apparatus that drives a switching device, the driving apparatus including a reference potential line, a first switching control unit configured to switch whether to connect a control terminal of the switching device to the reference potential line, a first resistor element arranged in series to the first switching control unit in a path from the control terminal of the switching device to the reference potential line, a first capacitor provided in parallel with the first resistor element in the path from the control terminal of the switching device to the reference potential line, and a discharge control unit configured to control whether to discharge the first capacitor. |
| US12212218B2 |
Power transmission device
A device includes a rotary electric machine, a liquid supply member configured to supply liquid to the rotary electric machine, and a facing member facing the rotary electric machine in an axial direction with the liquid supply member interposed therebetween. The liquid is supplied to the liquid supply member via the facing member. |
| US12212216B2 |
Motor cooling apparatus
An embodiment motor cooling apparatus includes a stator core including a plurality of metal plates made in a predetermined shape by lamination, an inlet channel formed from one side of the stator core and extending therethrough to a predetermined depth therein, a plurality of cooling channels branched from an internal end of the inlet channel and extending therefrom to either an upper side or a lower side of the stator core, and a cooling fluid supply apparatus configured to circulate cooling fluid from the inlet channel to the plurality of cooling channels. |
| US12212208B2 |
Haptic actuator including a field member having an opening receiving a stator therein and related methods
A haptic actuator may include a housing, and a stator fixed to a medial interior portion of the housing. The haptic actuator may also include a field member having an opening receiving the stator therein. The field member may include a frame and at least one permanent magnet carried by the frame. The haptic actuator may also include at least one flexure coupled between an end of the frame and adjacent interior portions of the housing to permit reciprocal movement of the field member within the housing responsive to the stator. |
| US12212206B2 |
Busbar module for rotating electric machine
A busbar module is provided with busbars arranged at intervals from each other in a first direction and arranged side by side in a second direction, and a holding member configured to cover the busbars. Each of the busbars includes a first connecting portion extending in the first direction, a second connecting portion extending in the third direction and an intermediate portion extending in the second direction between the first connecting portion and the second connecting portion. The holding member includes a first holding portion configured to cover the first and second busbars and interposed between the first and second busbars and a second holding portion configured to cover the first holding portion the third busbar. The third busbar is in contact with the first holding portion. |
| US12212205B2 |
Stator comprising an interconnector
A stator for a rotary electric machine includes a stator body having an axis (X), and a winding including at least one overhang projecting axially from the stator body and winding ends extending axially beyond the overhang from the stator body. Also included is an interconnector mounted on the overhang of the winding, including an insulating body and at least one track having track ends. At least two winding ends are each assembled with one of the corresponding track ends, and the track ends are symmetrical relative to a plane containing the axis and relative to a plane transverse to the axis. |
| US12212202B2 |
Rotary electrical machine
The invention relates to a rotary electric machine, in particular for a motor vehicle, including: a stator (100) comprising a stator body (110) and an electrical coil, said electrical coil including a plurality of phase windings (120) forming a bundle (125) that protrudes from an axial end face of the stator body, each phase winding including an end forming a coil connection point (122); and at least one electrical connection member (150) positioned in continuation of the stator (100) and comprising at least one electrically conductive element (155) which is overmolded with an electrically insulating material (126) and extends radially out of the electrically insulating material to form at least two connection outputs (153, 154) to which the connection points are connected. |
| US12212199B2 |
Stator with pins for an electric machine
A stator for an electric machine having a plurality of pins, which are arranged on concentric circles at different distances from a stator center point in slots in the stator, and each concentric circle forms a layer, where four pins in different layers are connected to one another in series and form a winding. A first pin of the winding is located in a first slot in the 4n-3 layer, wherein n is a natural number, a second pin of the winding is located in a second slot in the 4n-2 layer, wherein the second slot is at a first radial distance from the first slot in a first circumferential direction of the stator, a third pin of the winding is located in the first slot in the 4n layer, and a fourth pin of the winding is located in the second slot in the 4n-3 layer. |
| US12212196B2 |
Reduction rate and voltage multiple for parallel circuit
This disclosure provides systems, methods, and apparatuses, for producing an electrical apparatus. In one aspect of the disclosure, a method includes identifying a first electrical apparatus including a first winding configured to receive a first voltage, the first winding including a first electrical coil and a second coil coupled in series. The method also includes determining, based on a reduction rate, one or more characteristics of a second electrical apparatus including a second winding configured to receive the first voltage, the second winding including a third electrical coil and a fourth coil coupled in parallel. Each of the first coil and the second coil including a first number of turns and each of the third coil and the fourth coil including a second number of turns. The reduction rate is associated with a ratio based on a reducing number of turns and the first number of turns. |
| US12212193B2 |
Electrical machine
An electrical machine includes an open-loop or closed-loop control unit and a fluidic actuator, wherein the open-loop or closed-loop control unit is established for open-loop or closed-loop control of the actuator, where the open-loop or closed-loop control unit has a carrier plate cast in a thermally conductive casting compound, and where the open-loop or closed-loop control unit makes contact with a fluid-filled chamber of the actuator in the region of the casting compound such that it becomes possible to dispense with separate cooling devices in the open-loop or closed-loop control unit. |
| US12212189B2 |
Rotating electrical machine
There are provided: a rotor including a rotating shaft and a rotor core; a stator including a stator core and stator windings; bearings; a casing fixed to the stator core and connected to the bearings, which houses the rotor and the stator; and an electrostatic shield connected to the casing. The electrostatic shield has a plurality of opening holes by which a space in which the stator is disposed is communicated with a space in which the rotor is disposed. |
| US12212187B2 |
Electric drive motor, wet-rotor pump, and household appliance
An electric drive motor has a permanent magnet rotor with a motor shaft on which a permanent magnet carrier is fastened. A first axial end portion of the motor shaft has a seat for an impeller and the permanent magnet carrier carries at least one permanent magnet at a second axial end portion of the motor shaft. The permanent magnet carrier is pot-shaped with a pot base portion, fastened to the second axial end portion and extending radially to the motor shaft, and a circular cylinder wall portion directly adjoining the outer periphery of the pot base portion and coaxially surrounding the motor shaft. The pot base portion and the circular cylinder wall portion have an at least approximately identical or exactly identical wall thickness. There is also described a wet-rotor pump and a household appliance with such an electric drive motor. |
| US12212183B2 |
Stator for an electric motor
A stator for an electric motor, wherein the stator has a laminated stator core which is formed from a multitude of individual teeth that can be arranged in a ring around an axis of rotation of the electric motor and interconnected in the circumferential direction, wherein each individual tooth of the plurality of individual teeth is flanked on both sides along the circumferential direction by a further individual tooth from among the plurality of individual teeth and has a connection portion for mechanically fixing the individual tooth to the individual teeth by which it is flanked, and wherein at least some of the individual teeth each have a pressing portion for elastic and/or plastic deformation and establishment of a press-fit connection between the laminated stator core and a radially inner axle, so that, upon joining of the stator to the axle, the stator can be fixed to the axle through the deformation of the pressing portions and a force acting on the axle as a result of the deformation between laminated stator core and axle. |
| US12212180B2 |
Method and system for charging battery using fuel cell
Provided are a method and system for charging a battery using a fuel cell. The method includes: running the fuel cell; setting a voltage input from the fuel cell as a preset first input adapting voltage (1st IAV), when the input power from the fuel cell is lower than the output power to the battery; detecting whether an output current to the battery reaches a first low detect current (1st LDC) while the battery is being charged based on the first input adapting voltage; and resetting the first input adapting voltage based on a detection result. |
| US12212177B2 |
Method and system for adjusting double-sided LCC compensation network of wireless charging system
A method and a system for adjusting a double-sided LCC compensation network of a wireless charging system are provided. The method includes: obtaining a standard coupling coefficient, a rated operating frequency, and rated parameter values of compensation elements in the wireless charging system; determining change rates of output performance of the wireless charging system; determining an adjustable compensation element; obtaining a real-time coupling coefficient between the primary-side transmitting coil and the secondary-side receiving coil; determining whether the real-time coupling coefficient is less than a coupling coefficient threshold; and adjusting an operating frequency of the wireless charging system when the real-time coupling coefficient is not less than the coupling coefficient threshold; or adjusting both an operating frequency of the wireless charging system and the adjustable compensation element when the real-time coupling coefficient is less than the coupling coefficient threshold. |
| US12212175B2 |
Charging control method and apparatus, electronic device and storage medium
A charging control method includes: obtaining a battery electric quantity of the terminal device and current state information of the terminal device; determining a target charging strategy according to the battery electric quantity and/or the current state information; and controlling the terminal device to be charged according to the target charging strategy. |
| US12212174B1 |
Recycling of electrochemical devices
Recycling of an electrochemical energy storage device is provided. A remaining charge on the electrochemical energy storage device is determined. An impedance profile of the electrochemical energy storage device is determined for the remaining charge. The impedance profile includes an internal impedance of the electrochemical energy storage device at different charge levels from the remaining charge to a complete discharge. A variable discharge load is applied on the electrochemical energy storage device until the complete discharge. The variable discharge load varies with the internal impedance of the electrochemical energy storage device at the different charge levels. |
| US12212171B1 |
Charging receptacle integrated in a trim ring
An integrated charging receptacle including a ring body having an inner ring wall and an outer ring wall, a groove between the inner ring wall and outer ring wall for securing a wire or cable and a USB receptacle having a receptacle jack. The USB receptacle is disposed on a portion of the ring body and faces outward from the outer wall of the ring body. The ring body may be secured around a cup holder mountable in a surface or around an instrument gauge in a surface. The ring body may be secured around a dashboard instrument. The integrated charging receptacle may include a second USB receptacle having a second receptacle jack. The USB receptacle may be powered through an electrical wire passing through a portion of the body groove. The integrated charging receptacle may include at least two additional USB receptacles. The ring body may be substantially translucent. |
| US12212166B2 |
Method for controlling a battery allowing control of a homogenous current to the cells of a power line
The present invention relates to a method for controlling a battery with integrated inverters comprising n basic cell modules (MEk) which supply a basic voltage Vcell and allow the application of a homogenous current to all the cells. More specifically, the method comprises a step of controlling the control signals (uik) from the basic modules (MEk) so as to provide the voltage waveform (VM1) on the basis of a selection of a group of q basic modules (MEk) according to a reference voltage setpoint Vref, where Vref=qVcell, determining a classification of the n basic modules, processing the classification of the plurality n according to a circular permutation of the positions of the basic modules (MEk) such that each basic module (MEk) of the plurality n is involved in producing the voltage waveform over a period that is the same for each module. The invention is applicable in the fields of electromobility and stationary energy storage. |
| US12212165B2 |
Arrangement comprising energy storage units and a related method
An arrangement is disclosed, comprising a series connection of a plurality of energy storage units, a plurality of bypass circuits, each bypass circuit being configured to bypass a respective one of the energy storage units in the series connection, and a plurality of control modules, wherein each control module corresponds to a respective one of the bypass circuits. Each control module is configured to control operation of the corresponding bypass circuit and at least one other bypass circuit of the plurality of bypass circuits to selectively bypass the corresponding energy storage units in the series connection in such a way that operation of each bypass circuit of the plurality of bypass circuits to selectively bypass the corresponding energy storage unit in the series connection is controllable by means of at least two of the control modules. A related method is also disclosed. |
| US12212164B2 |
Method of battery cell activation using activation tray
A secondary battery charging method includes a step for introducing a plurality of battery cells onto an activation tray and CC-charging the battery cells; and a step for connecting the plurality of battery cells in parallel. The charging method shortens the time typically required for CV-charging by connecting battery cells in parallel after CC-charging, thus having the effect of replacing CV-charging. |
| US12212163B2 |
Battery system
In a control unit for a battery system, the control unit includes: an input node configured to receive a sensor signal indicating a state of at least one of a plurality of battery cells of the battery system; a first microcontroller configured to generate a first control signal based on the state of the at least one battery cell; a first communication interface configured to receive a second state signal indicating an operation state of a second microcontroller; and a switch control circuit configured to: receive the first control signal; generate a second control signal based on the state of the at least one battery cell; and transmit one of the first and second control signal to a power switch of the battery system based on at least one received state signal indicating an operation state of the first microcontroller and of an operation state of the second microcontroller. |
| US12212156B2 |
Reconfigurable wireless power transmitter for computer peripherals
A reconfigurable wireless power transfer system includes a first wireless transmission system, one or more secondary wireless transmission systems, and at least one wireless receiver system. The first wireless transmission system is configured to receive input power from an input power source, generate wireless power signals, and couple with one or more other antennas. Each secondary wireless transmission systems is configured to couple with one or more of another secondary transmission antenna, the first transmission antenna, and/or one or more receiver antennas. The secondary wireless transmission systems receive the AC wireless signals from the first wireless transmission system and repeat the AC wireless signals to one or more secondary transmission antennas, receiver antennas, or combinations thereof. The one or more receiver antennas are configured to receive the AC wireless signals to provide electrical power to a load operatively associated with a computer peripheral. |
| US12212153B2 |
Wireless power for a variable load
This disclosure provides systems, methods and apparatuses for wireless power transmission and reception. A wireless power transmission apparatus may include a primary coil that transmits power to a corresponding secondary coil in a wireless power reception apparatus. The wireless power transmission apparatus may configure characteristics of the wireless power transmission based on a load setting of a wireless power reception apparatus. The wireless power transmission apparatus may take into account a coupling factor and power transfer characteristics of the wireless power reception apparatus in determining a configuration of the wireless power transmission from the wireless power transmission apparatus to the wireless power reception apparatus. In some implementations, a change in wireless power transmission may occur based on a corresponding change in the load. For example, the change in wireless power transmission and the corresponding change in the load may occur in relation to a synchronization event. |
| US12212148B2 |
Robot device and wireless connector
A wireless connector includes: a first unit attached detachably from the outside of a first object; and a second unit attached detachably from the outside of a second object. The first unit includes a first housing to which a first transmission/reception part and a first connector part are secured, the first connector part being attached to the first object and transmitting a to-be-transmitted target between the first connector part and the first object. The second unit includes a second housing to which a second transmission/reception part and a second connector part are secured, the second connector part being attached to the second object and transmitting a to-be-transmitted target between the second connector part and the second object. The first transmission/reception part and the second transmission/reception part are arranged so as to be separated from each other and opposed to each other to wirelessly transmit the to-be-transmitted target. |
| US12212144B2 |
Multi-port subsea high-voltage power modulation and stored energy distribution system
A system includes multiple electrical nodes connected in series to a primary power source via transmission lines. Each node includes a power converter that can receive first power from the primary power source or another upstream node. The power converter can change a voltage level and/or a frequency of the first power. Each node also includes a high-speed synchronous rotating machine (HSRM), which includes an inertial storage flywheel, a rotating excitation assembly, stator windings, and a synchronous motor coupled to an induction generator. The HSRM can boost a voltage level between an input and output to compensate for a voltage drop of the first power. At least one of the nodes further includes an inductive power coupler to electrically couple the node to a mobile power source that provides second power to the node and receives a portion of the first power from the node using contactless inductive power transfer. The system includes a combination of AC and DC power transmission techniques and associated bidirectional power converters. |
| US12212140B2 |
System and method for determining a local conservative voltage reduction CVR factor
A system and method for determining a local CVR factor using grid edge devices (GEDs) comprises: receiving, from each of the GEDs, respective voltage change values and power change values; identifying, using the processor, voltage events within at least one control zone, each of the GEDs being associated with a zone of the at least one control zone, the voltage events being identified based on the GEDs in the groups meeting one or more event parameters; identifying a plurality of CVR values for each GED, each CVR value being based on one of the voltage change values and one of the power change values associated with each identified voltage event; generating, using the processor and based on the plurality of CVR values, a local CVR factor for each GED; and, controlling one or more devices based on the local CVR factor. |
| US12212138B2 |
Solar power distribution and control system for movable storage containers
A movable storage container includes: a plurality of walls defining an enclosure for storing items; a solar power generation array affixed to an outer surface of at least one of the walls; an energy storage device configured to receive power from the solar power generation array; a switch assembly configured to: selectively receive power from a source selected from (i) the energy storage device, (ii) an auxiliary generator, and (iii) an electrical grid input, and direct the received power to a refrigeration unit; a polyphase inverter assembly connected between the energy storage device and the switch assembly, and a controller connected with the switch and configured to transmit source selection commands to the switch. |
| US12212135B2 |
Using waveform data to identify an inspection zone for a resource distribution system
Temporary outages or degradation of a resource, such as electric power, may be detected by identifying anomalies in waveform data collected by collection points. The collection points may be distributed throughout a resource distribution system and configured to communicate data to a headend system. The headend system processes the data to identify anomalies and to correlate waveform data collected by different collection points. The geographic locations of the collection points with correlated data are used to identify a geographic region. An unmanned aerial vehicle may be used to conduct an inspection of the geographic region and to collect inspection data. The inspection data may be communicated to the headend system. The waveform data and the inspection data may be used to determine the correct resources to deploy to address the cause of the anomaly. |
| US12212131B2 |
Power supply device for motor protector and power supplying method thereof
The disclosure relates to a power supply device for a motor protector and a power supplying method thereof. The motor protector receives power. The power supply device comprises: a first power supplying unit, configured to receive and store the power and supply power to a tripping device of the motor protector; a second power supplying unit, configured to receive the power and supply power to a calculation and control device of the motor protector; a third power supplying unit, configured to receive and store the power and supply power to a reclosing device of the motor protector; and a control unit, configured to control an order in which the first power supplying unit, the second power supplying unit and the third power supplying unit receive the power. |
| US12212126B2 |
Ignition suppression circuiting technology
A cable system is provided which is configured with both electric wires and a fluid conduit running through the axial passage of a surrounding flexible sheath of the cable. The system allows for communication of electricity over the wires for electrical circuits and concurrent communication of a fire ignition suppressant fluid or gas through the fluid conduit, to all points in an electric circuit using the cable. One or both of a dye or scent can be included in the ignition suppressant fluid. |
| US12212121B2 |
Bottom emitting VCSEL
A VCSEL can include: a substrate that passes light therethrough; a phase matching layer over a top mirror stack; a first metal layer over the phase matching layer; and an end metal region over the first metal layer. The phase matching layer and first metal layer have a cooperative thickness to provide reflectivity of at least a predetermined reflectivity threshold for the emission wavelength. A method of making a VCSEL can include: providing a substrate; forming a first mirror stack above the substrate; forming an active region above the first mirror stack; and forming a reflective end above the active region, the reflective end having a phase matching layer and a first metal layer. The phase matching layer and first metal layer have a combined thickness for the reflective end to have a reflectivity of at least a predetermined reflectivity threshold for an emission wavelength of the VCSEL. |
| US12212120B2 |
Tunable Vernier effect laser emission device
A wavelength-tunable laser emission device includes a cavity delimited by a first and a second Sagnac mirror. The cavity has an amplifying medium and a tunable spectral filter using the Vernier effect. The filter includes at least three resonant rings arranged in cascade, each resonant ring integrating a loop mirror with wavelength tunable reflectivity. |
| US12212118B2 |
Light source system
The present disclosure relates to a light source system suitable for use in a time of flight camera. The light source system includes a light source, such as a laser, and a driver arranged to supply a drive current to the light source to turn the light source on to emit light. The driver includes or is coupled to a capacitor to store energy and then discharge to generate the drive current. The driver can be integrated into a semiconductor die on which the light source is mounted. Thus, the driver can include within it the source of energy for the drive current and the light source and driver can be very close together. Therefore, the light source may be turned on and off very quickly, such as with a relatively large drive current, such as to output a high optical power, short duration light pulse. |
| US12212117B2 |
Power monitor for silicon-photonics-based laser
A laser device based on silicon photonics with in-cavity power monitor includes a gain chip, a reflector, and a photodiode. The gain chip is mounted on a silicon photonics substrate and is configured to emit light from an active region bounded between a frontend facet and a backend facet. The reflector is configured to reflect the light in a cavity formed between the reflector and the frontend facet through which a laser light is output. The photodiode is coupled to one or more waveguides in the cavity by a splitter disposed directly in an optical path between the reflector and a component positioned in the cavity. The photodiode is configured to measure power of light propagating through the cavity between the reflector and the component. |
| US12212115B2 |
Semiconductor light-emitting apparatus and method of fabricating semiconductor light-emitting apparatus
Semiconductor light-emitting apparatus includes substrate, submount above substrate, and semiconductor laser above submount. Semiconductor laser and submount are bonded to each other with first bonding material. Substrate and submount are bonded to each other with second bonding material. Submount has first region and second region near substrate, first region being a region on which spacer is disposed, and second region being a region without spacer. Submount is bonded to substrate by covering at least a portion of second region with second bonding material. |
| US12212112B2 |
Dual optical frequency comb light-emitting device
A dual optical frequency comb light-emitting device includes a first optical-frequency-comb laser source that includes a first laser resonator having a first optical path length, a second optical-frequency-comb laser source that includes a second laser resonator having a second optical path length different from the first optical path length, and an optical coupler that causes a first portion of first optical-frequency-comb laser light emitted from the first laser resonator to enter the second laser resonator. The first optical-frequency-comb laser source outputs a second portion of the first optical-frequency-comb laser light to an outside. The second optical-frequency-comb laser source outputs second optical-frequency-comb laser light emitted from the second laser resonator to the outside. |
| US12212109B2 |
Measurement and positioning methods and arrangements for assembling an electrical cable
A measurement method for producing an electrical cable wherein an end-side end of a supporting sleeve that is secured to the electrical cable is brought into contact with a reference stop of a reference device. An axial distance between the end-side end of the supporting sleeve and an inner conductor part secured to an inner conductor of the electrical cable and the reference stop is detected, and a connection distance (y) between the front end of the inner conductor part and the end-side end of the supporting sleeve, facing the inner conductor part, is derived from the axial distance. |
| US12212104B1 |
Conversion and conduction structure for power converter
The present utility model discloses a conversion and conduction structure for a power converter, comprising the power converter including an upper cover of a main body, a lower cover of the main body, a bracket, a UK-standard pin assembly, a US-standard pin assembly, a hybrid plug assembly of the type CEE7/7, a CN-standard or an AU-standard pin assembly; Plugs in different countries are correspondingly connected in conduction with pins of different national specifications, especially ground wires in plugs in different countries are connected in conduction with pins of ground wires of different national specifications, thereby improving the safety of the power converter. |
| US12212102B2 |
Electrical connector
An electrical connector includes at least one terminal assembly. The terminal assembly includes: a first signal terminal and a second signal terminal being narrow-edge coupled; and an insulating block fixing the first signal terminal and the second signal terminal. A length of the first signal terminal is greater than a length of the second signal terminal. A first connecting portion of the first signal terminal is provided with at least one exposing area, which is exposed to the insulating block and exposed in air medium. The first connecting portion has at least one widening portion and at least one narrow portion connected to each other along a length direction thereof. A width of the widening portion is greater than a width of the narrow portion. The exposing area is provided at the widening portion. A second connecting portion of the second signal terminal is completely wrapped in the insulating block. |
| US12212101B2 |
Mating terminal module, mating backplane connector, and backplane connector assembly with improved impedance stabilization
A mating terminal module includes a number of mating conductive terminals. Each mating conductive terminal includes a mating portion. The mating conductive terminals include a first mating signal terminal and a second mating signal terminal. The first mating signal terminal further includes a first connecting portion. The second mating signal terminal further includes a second connecting portion. The first connecting portion extends in a direction toward the second connecting portion, and the second connecting portion extends in a direction toward the first connecting portion. The present disclosure also discloses a mating backplane connector and a backplane connector assembly having the mating terminal module. Compared with the prior art, the present disclosure can achieve a better effect of impedance stabilization. |
| US12212098B2 |
Connector with easy-to-unlock groove structure
A connector and a connector assembly are provided. The connector includes a housing and a locking/unlocking mechanism arranged on the housing that is configured to lock and unlock a connection between the connector and a mating connector. The locking/unlocking mechanism includes a cantilever structure arranged on a top surface of the housing and having a fixed end and a free end, with a pressing portion for unlocking being located adjacent to the free end and an unlocking prevention mechanism including a protection beam and a pair of protection walls. The protection beam spans over the cantilever. The pair of protection walls are arranged on both sides of the pressing portion of the cantilever. Each protection wall is provided with a first groove at a location close to the protection beam. |
| US12212096B2 |
Connector plug, abutting structure of the same, and electrical connection mechanism having the same
A connector plug, abutting structure of the same, and electrical connection mechanism having the same are provided. The connector plug includes a connection body and an outer casing member. The outer casing member is disposed outside the connection body and includes an inner casing and an outer casing enclosing the inner casing. At least one engaging arm is disposed on the inner casing and has a pressing portion protruding from the outer casing and an engaging portion extending forward from the pressing portion and hanging on the sidewall of an insertion port of the connection body. At least one engaging hole is defined on a receptacle. When a plug is plugged into the receptacle, the engaging portion becomes engaged with the engaging hole to achieve connection. |
| US12212095B2 |
Apparatus and methods for insulating terminals of an electrical device
Apparatus for opposed terminals of an electrical device includes magnetic material carried by a cover formed of an electrically insulative material and concurrently covering the terminals, and a magnetic attraction between the magnetic material and the terminals magnetically coupling the cover to the terminals. In another embodiment, the apparatus includes covers formed of an electrically insulative material and connected by hinges to the electrical device for movement between open positions away from the terminals and closed positions covering the respective terminals. |
| US12212087B2 |
Topside air cooling of electronic packages
The semiconductor chip includes a semiconductor substrate having a surface, a circuit formed on the surface, and a plurality of pillars coupled to the surface adjacent to the circuit. The plurality of pillars is thermally conductive and is thermally coupled to the circuit so as to dissipate heat generated by the circuit. The semiconductor substrate, circuit, and plurality of pillars are integral parts of the integrated semiconductor chip. A method of fabricating the integrated semiconductor chip includes providing a semiconductor substrate having a surface. The method includes forming a circuit on the surface, and forming a plurality of pillars thermally coupled to the surface adjacent to the circuit. |
| US12212085B2 |
Connector device having case and board connector
It is aimed to prevent the damage of terminal fittings. A connector device (A) is provided with a case formed with an opening portion in a front surface and having an open lower surface, and a board connector including L-shaped terminal fittings and a housing to be mounted into the opening portion. The terminal fitting includes a penetrating portion extending in a front-rear direction and a board connecting portion extending downward from a rear end of the penetrating portion and to be accommodated into the case. The housing includes a terminal holding member for holding the penetrating portions penetrating therethrough, the terminal holding member being mounted into the opening portion from behind, and a protecting member separate from the terminal holding member, the protecting member surrounding front end parts of the penetrating portions by being mounted into the opening portion from front. |
| US12212083B2 |
Compressible electrical assemblies with divaricated-cut sections
Various configurations of compressible electrical assemblies are disclosed herein. Each variation of the compressible electrical assemblies includes at least one dielectric, an inner conductor and an outer conductor. Each inner and outer conductor may be configured as a compressible contact. One embodiment of a compressible electrical assembly includes an inner compressible contact, and outer compressible contact and a dielectric disposed at least partially between the inner compressible contact and the outer compressible contact. Each compressible contact also has a divaricated-cut section with a plurality of cuts defined by at least one cut angle measured between a pair of opposing inner surfaces. |
| US12212081B2 |
Mutual inductance tuning coil for use with information handling systems
A mutual inductance tuning coil component which includes a substrate; and, a loop antenna mounted on the substrate, the loop antenna being positioned proximate to a Near Field Communication (NFC) radiating component of an information handling system, the loop antenna compensating for the radiated energy generated by the NFC radiating component. |
| US12212079B2 |
System and method for a digitally beamformed phased array feed
Systems and methods are provided for a digital beamformed phased array feed. The system may include a radome configured to allow electromagnetic waves to propagate; a multi-band software defined antenna array tile; a power and clock management subsystem configured to manage power and time of operation; a thermal management subsystem configured to dissipate heat generated by the multi-band software defined antenna array tile; and an enclosure assembly. The multi-band software defined antenna array tile may include a plurality of coupled dipole array antenna elements; a plurality of frequency converters; and a plurality of digital beamformers. |
| US12212077B2 |
Method for determining user intent to access a secure area
The present disclosure relates to a reader, such as a reader for a physical access control system. The reader can include first and second antennas, each designed or configured for receiving ultra-wide band (UWB) signals. The reader can also include a mounting plane configured for mounting the reader to a surface. An axis aligning the first and second antennas can be arranged substantially perpendicular relative the mounting plane. A material can be provided between the first and second antennas. The material can have a thickness that defines a distance between the first and second antennas of less than a half wavelength of the UWB signal through air (λA/2), the material configured to slow down electromagnetic waves passing therethrough such that the thickness of the material provides an effective separation distance of the first and second antennas of at least a half wavelength of the UWB signal through air (λA/2). |
| US12212076B2 |
Phased array antenna
A phased array antenna comprises an array of reflective cells, each cell being defined by a wall positioned within the array the wall arranged to define a waveguide, and having a moveable reflector positioned within the wall. Each reflector is arranged such that it is not in electrical contact with its respective wall and such that, in use it can be moved to tune the antenna. A feed and subreflector are positioned within the array and arranged to transmit and/or receive electromagnetic signals to and/or from the array. |
| US12212075B2 |
Electronic device
The disclosure provides an electronic device. The electronic device includes a plurality of units. Each of the units includes an integrated substrate. The integrated substrate includes a first dielectric layer, a first conductive layer, a second dielectric layer, and a second conductive layer. The first dielectric layer has a first side and a second side opposite to the first side. The first conductive layer is disposed on the first side. The second dielectric layer has a third side facing the second side and a fourth side opposite to the third side. The second conductive layer is disposed on the fourth side. A loss tangent of at least one of the first dielectric layer and the second dielectric layer is less than or equal to 0.1 and greater than 0. The electronic device of an embodiment of the disclosure may improve product yield. |
| US12212071B2 |
Patch antenna with reconfigurable size for frequency control
Reconfigurable patch antenna systems are provided herein. In certain embodiments, a mobile device includes a patch antenna configured to handle a radio frequency signal at a signal feed. The patch antenna includes a plurality of antenna segments. The front-end system further includes a plurality of switches each configured to control connection of a respective one of the first plurality of antenna segments to the first signal feed, and a control circuit configured to control the plurality of switches to provide a frequency adjustment to the patch antenna. |
| US12212069B2 |
Antenna for a wireless communication device and such a device
An antenna for a wireless communication device, such as a Wi-Fi access point is provided. The antenna includes an electrically conductive radiation structure including a plurality of radially extending radiation slots, each of which has an open outer end at a perimeter of the electrically conductive radiation structure and defines a respective radiation portion of the electrically conductive radiation structure. The antenna includes a feeding network configured to feed an RF signal to the electrically conductive radiation structure, the feeding network includes a plurality of feeding arms configured to feed the RF signal into each radiation portion of the electrically conductive radiation structure for exciting each radiation portion to emit electromagnetic waves. The antenna includes a grounding structure including an electrically conductive grounding surface, which is spaced from and faces each radiation portion of the electrically conductive radiation structure for guiding the electromagnetic waves emitted by each radiation portion. |
| US12212064B2 |
Methods and apparatus for implementing antenna assemblies and/or combining antenna assemblies to form arrays
Methods and apparatus for implementing an arrangement of antennas in an apparatus are described. The combining of antennas and related components using Ball Grid Array (BGA) technology and various spacing/heat routing techniques allows for a group of antennas and related ICs to be implemented as a printed circuit board mountable package. Multiple antenna packages can be mounted on a printed circuit board to allow for different numbers of antennas to be included in a device depending on communications needs. The antenna package is well suited for mm-wave applications. |
| US12212060B2 |
Electronic device and antenna module
An electronic device and an antenna module are provided. The electronic device includes a metal housing with a slot having an open end and a first upper edge portion located at an upper edge of the slot. The antenna module is arranged in the metal housing and includes a carrier board, a feeding element, a radiating element with a feeding portion connected to the feeding element, and a first parasitic radiating element arranged on the carrier board and connected or coupled to the first upper edge portion. A vertical projection of the radiating element on the metal housing at least partially overlaps the slot. One side of the first parasitic radiating element is near an edge of the open end. The radiating element is fed with a signal through the feeding element to generate a resonant mode and is coupled to the slot to excite another resonant mode. |
| US12212059B2 |
System and method for operating a partitioned antenna at a vent formed in a bottom metal chassis
An information handling system to wirelessly transmit and receive data at an antenna may include a processor; a memory; a power management unit; a bottom metal chassis of a base housing containing components of the information handling system; a vent formed into the bottom metal chassis; a slot formed between the vent and a terminal edge of the bottom metal chassis; and an antenna located within the bottom metal chassis and behind the vent to, upon execution of the processor, create radiating radio frequency (RF) bands along an edge of the vent. |
| US12212054B2 |
Radio frequency enabled thematic interface systems and methods
An interface in accordance with present embodiments includes a base and a theme portion disposed on the base. A first layer is disposed on the base and includes a mixture with metallic powder suspended within a translucent medium. A second layer is disposed on the base over the first layer and over the theme portion, and includes the mixture. A third layer is disposed on the base and on the theme portion over only portions of the second layer. The third layer includes paint and paint thinner. A fourth layer is disposed on the theme portion over the third layer and exposed portions of the second layer. The fourth layer also includes the mixture. |
| US12212046B2 |
Wearable device antenna system
An antenna system comprises a driven antenna element connected to a printed circuit board (PCB), and a plurality of PCB extenders provided by electrical conductors connected to a PCB ground plane for cooperation with the driven antenna element in signal communication. In an eyewear device that incorporates the antenna system, the plurality of PCB extenders are provided by conductive structural elements incorporated in an eyewear frame. |
| US12212044B2 |
Electronic device equipped with antenna module
Provided is an electronic device having a multilayer substrate according to an embodiment. The electronic device may include a multilayer substrate on which an antenna is disposed and which includes a front layer, a back layer, a plurality of middle layers, and a plurality of ground layers. The antenna may include a lower patch that is disposed on a layer different from an upper ground among the plurality of ground layers and is electrically connected to the upper ground at a plurality of offset points; and an upper patch disposed spaced apart from the lower patch by a predetermined distance. |
| US12212043B2 |
Electronic device
Disclosed is an electronic device that includes a window, a display panel that is disposed under the window and that has a display area and a non-display area defined therein, a lower member that is disposed under the display panel and that includes a lower conductive layer, a transmission line disposed between the display panel and the lower member, a conductive partition wall spaced apart from the transmission line and disposed to overlap the display area, and a housing coupled with the window to define a receiving space in which the display panel, the lower member, and the transmission line are disposed. |
| US12212031B2 |
Cavity filter
Disclosed is a cavity filter including a housing, and a first sheet-shaped resonant rod, a second sheet-shaped resonant rod, and a third sheet-shaped resonant rod disposed in the housing. The first sheet-shaped resonant rod includes a first upright section and a first extension section extending from one side of the first upright section. The second sheet-shaped resonant rod includes a second upright section and a second extension section extending from one side of the second upright section. The second upright section, the first upright section, and the third sheet-shaped resonant rod are connected to the housing, and the first extension section and the second extension section extend toward each other. Capacitive coupling is formed between the first and second sheet-shaped resonant rods. Capacitive coupling or inductive coupling is formed between the second and third sheet-shaped resonant rods and between the first and third sheet-shaped resonant rods. |
| US12212028B2 |
Manufacturing arrangement for a fuel cell stack and method for manufacturing a fuel cell stack
A manufacturing arrangement for a fuel cell stack includes at least a first alignment station having a first alignment structure for receiving a bipolar plate and a second alignment structure for arranging a membrane electrode assembly at one side of the bipolar plate, preferably on top of the bipolar plate, in a predefined orientation for aligning the bipolar plate and the membrane electrode assembly, whereby a pre-assembled fuel cell unit is provided; a fastening station for fastening the membrane electrode assembly to the bipolar plate, whereby an assembled fuel cell unit is provided; and a second alignment station having at least one third alignment structure for aligning the assembled fuel cell units for providing a fuel cell stack, as well as a method for manufacturing a fuel cell stack, and a fuel cell stack having been manufactured by such an arrangement and/or method. |
| US12212025B2 |
Aircraft electrical power supply system and method of supplying electrical power in an aircraft
An aircraft electrical power supply system includes a fuel cell auxiliary power unit (APU) that supplies auxiliary electrical power to an aircraft, a fuel cell power plant that supplies primary electrical power to the aircraft, and a hydrogen storage unit that supplies hydrogen to the fuel cell APU and the fuel cell power plant. |
| US12212023B2 |
Cell stack device, module, module housing device, and metal member
A cell stack device includes a cell stack and an end current collector. The cell stack includes a plurality of cells arrayed therein. The end current collector is located in an end portion of the cell stack in an array direction of the plurality of cells. The end current collector includes a surface exposed to an oxidizing atmosphere covered with a covering material including manganese and a surface exposed to a reducing atmosphere covered with a film different from the covering material. |
| US12212020B2 |
Cell module assembly and method of manufacturing the same
A cell module assembly includes a plurality of battery cells, each of the battery cells having electrode leads, a case configured to receive the battery cells, a cover plate located at an open upper surface of the case so as to be coupled to the case, and a busbar unit located at the front and the rear of the case, from which the electrode leads of the received battery cells protrude. The case is configured to have a U shape in which a base plate defining a bottom surface of the case and side plates defining opposite side surfaces of the case are coupled to each other, and the busbar unit includes a busbar frame, one side of which is bent, whereby a process of manufacturing the cell module assembly is simplified and the battery cells are easily received in the case. |
| US12212019B2 |
Multiple-direction wedge wire bonding
In a general aspect, an electrical device assembly (e.g., a battery module) can include first, second and third electrical contact surface. The first and second electrical contact surfaces can be spaced from the third electrical contact surface in a common direction. The assembly can include a ribbon wire electrically coupling the first electrical contact surface with each of the second electrical contact surface and the third electrical contact surface. A first end of the ribbon wire can be wedge bonded to the first electrical contact surface with a first wedge wire bond, a second end of the ribbon wire can be wedge bonded to the second electrical contact surface with a second wedge wire bond, and a portion of the ribbon wire that is intermediate between the first and second ends can be wedge bonded to the third electrical contact surface with a third wedge wire bond. |
| US12212018B2 |
Battery module, power battery pack and vehicle
A battery module, a power battery pack and a vehicle are provided. The battery module comprises n cells. At least two surfaces of the cell are respectively provided with a first positive terminal and a first negative terminal, and a second positive terminal and a second negative terminal. The n cells are arranged side by side in series. The cell (100) has a length L and a width H, where L meets 600 mm |
| US12212013B2 |
Battery, electric apparatus, and method and apparatus for manufacturing battery
A battery may include a box; and at least two groups of battery cells accommodated in the box, where each group of battery cells may include a plurality of battery cells arranged along a first direction, the first direction being parallel to an upper cover or a bottom wall of the box, and the at least two groups of battery cells may be stacked along a second direction, the second direction being perpendicular to the first direction. The battery cell may be a polyhedral structure and include a first wall and a second wall that may be connected to each other, where the first wall may be parallel to the first direction, the second wall may be oblique to the first wall, and a cross section of the battery cell on a plane perpendicular to the first wall and the second wall may be a parallelogram. |
| US12212009B2 |
Battery
A battery includes a battery element, housing body, and valve device. The housing body includes at least one laminate and an interior space wherein the battery element is housed, a first housing portion covers the interior space from a first side in a thickness direction, and a second housing portion that covers the interior space from a second side opposite to the first side in the thickness direction. The valve device attaches to the housing body and makes the interior space communicate with an external space. A joined edge portion is formed in the housing body by the first and second housing portion being fused along respective peripheral edges. The valve device is between the first and second housing portion in the joined edge portion, and an inner end of the valve device protrudes from an inner edge of the joined edge portion toward the interior space. |
| US12212008B2 |
Battery
A battery includes a battery can which includes a cylindrical portion having an opening edge portion at one end portion and a bottom portion closing the other end portion of the cylindrical portion, an electrode assembly which is housed in the cylindrical portion, and an opening sealing body which seals an opening formed in the opening edge portion. The opening sealing body includes a terminal portion and a gasket interposed in a compressed state between the terminal portion and the opening edge portion. The opening edge portion includes at least a base portion extending in an axial direction of the cylindrical portion and a tongue portion protruding from the base portion, and the tongue portion extends inward in a radial direction of the cylindrical portion so as to cover an upper surface of the gasket. |
| US12212006B2 |
Electrode plate, electrochemical device, and apparatus
This application relates to the battery field, and specifically, to an electrode plate, an electrochemical device, and an apparatus. The electrode plate of this application includes a current collector and an electrode active material layer disposed on at least one surface of the current collector, where the current collector includes a support layer and a conductive layer disposed on at least one surface of the support layer, a single-sided thickness D2 of the conductive layer satisfies 30 nm≤D2≤3 μm, the support layer is made of a polymer material or a polymer composite material, and a thickness D1 of the support layer satisfies 1 μm≤D1≤30 μm; and the electrode active material layer includes an electrode active material, a binder, and a conductive agent. |
| US12211999B2 |
Cost effective synthesis of oxide materials for lithium ion batteries
Methods for synthesizing single crystalline Ni-rich cathode materials are disclosed. The Ni-rich cathode material may have a formula LiNiXMnyMzCol1-x-y-zO2, where M represents one or more dopant metals, x≥0.6, 0.01≤y<0.2, 0≤z≤0.05, and x+y+z≤1.0. The methods are cost-effective, and include methods for solid-state, molten-salt, and flash-sintering syntheses. |
| US12211998B2 |
Method and system for aromatic macrocyclic compounds (phthalocyanines) as cathode additives for inhibition of transition metal dissolution and stable solid electrolyte interphase formation
Systems and methods for aromatic macrocyclic compounds (Phthalocyanines) as cathode additives for inhibition of transition metal dissolution and stable solid electrolyte interphase formation may include an anode, an electrolyte, and a cathode, where the cathode comprises an active material and a phthalocyanine additive, the additive being coordinated with different metal cationic center and functional groups. The active material may comprise one or more of: nickel cobalt aluminum oxide, nickel cobalt manganese oxide, lithium iron phosphate, lithium cobalt oxide, and lithium manganese oxide, Ni-rich layered oxides LiNi1-xMxO2 where M=Co, Mn, or Al, Li-rich xLi2MnO3(1-x)LiNiaCobMncO2, Li-rich layered oxides LiNi1+xM1−xO2 where M=Co, Mn, or Ni, and spinel oxides LiNi0.5Mn1.5O4. The phthalocyanine additive may include one or more of: cobalt hexadecafluoro phthalocyanine (Co-Pc-F), dilithium phthalocyanine (Li-Pc), cobalt(II) phthalocyanine, nickel(II) phthalocyanine-tetrasulfonic acid tetrasodium salt, titanium(IV) phthalocyanine dichloride, manganese(II) phthalocyanine, zinc phthalocyanine, aluminum phthalocyanine chloride, Iron(II) phthalocyanine, and silicon phthalocyanine dichloride. |
| US12211995B2 |
Negative electrode active material and lithium secondary battery comprising the same
A negative electrode active material for a secondary battery, including lithium titanium-based composite particles comprising: a lithium titanium oxide represented by LixTiyOz, wherein x, y and z satisfy 0.1≤x≤4, 1≤y≤5 and 2≤z≤12; Zr doped into the lithium titanium oxide; and an aluminum and sulfur containing compound coated on a surface of the lithium titanium oxide. The lithium titanium-based composite particles include at least one of primary particles or secondary particles formed by agglomeration of the primary particles, and an average particle size of the primary particles of the lithium titanium-based composite particles is in a range of 550 nm to 1.1 μm. |
| US12211994B2 |
Electrode and lithium secondary battery comprising same
Provided an electrode for secondary batteries, the electrode including: a substrate; and a plurality of active material layers arranged on the substrate and each including an active material, wherein at least one of the plurality of active material layers includes a binder, and a content of the binder is about 1.0 part by weight to about 1.7 parts by weight based on 100 parts by weight of a total weight of the plurality of active material layers. |
| US12211992B2 |
Positive electrode for lithium ion battery
A positive electrode composition for a rechargeable battery, the composition comprising a first and a second powderous lithium metal oxide, the first lithium metal oxide comprising either one or more of Ni, Mn and Co, the second lithium metal oxide powder having either: the formula LixWM′yOz, M′ being a metal having a valence state of +2 or +3, with 0 |
| US12211991B2 |
Negative electrode for all-solid-state battery and method for manufacturing same
The present disclosure relates to a method for manufacturing a negative electrode for an all solid state secondary battery, including the steps of: (S1) preparing a preliminary negative electrode including: a current collector; and a negative electrode active material layer formed on at least one surface of the current collector, and containing a plurality of negative electrode active material particles and a solid electrolyte; (S2) disposing a lithium layer on the negative electrode active material layer; (S3) dipping the preliminary negative electrode having the lithium layer disposed thereon in an organic solvent; and (S4) removing the lithium layer. The present disclosure also relates to a negative electrode for an all solid state secondary battery obtained by the method. The negative electrode for an all solid state secondary battery provides improved initial efficiency and cycle characteristics. |
| US12211990B2 |
Electrolytic copper foil and electrode and lithium-ion cell comprising the same
Provided are an electrolytic copper foil, an electrode and a lithium-ion cell comprising the same. The electrolytic copper foil has a first surface and a second surface, which are analyzed by grazing incidence X-ray diffraction (GIXRD), and each have an intensity of a characteristic peak of (111) plane denoted by I1, an intensity of a characteristic peak of (200) plane denoted by I2, an intensity of a characteristic peak of (220) plane denoted by I3, an FWHM of the characteristic peak of (111) plane denoted by W1, and an FWHM of the characteristic peak of (200) plane denoted by W2. The first and second surfaces each have a ratio of (I1+I2)/(I1+I2+I3) of 0.83 or more and a value of (W1+W2) of 0.80° or less. By controlling the features, it can improve the corrosion resistance of the electrolytic copper foil and further increase the safety of the lithium-ion cell. |
| US12211987B2 |
Wet mixture, coated lithium-containing positive electrode active material particles, and method of producing lithium ion secondary battery, and wet mixture, coated lithium-containing positive electrode active material particles, and lithium ion secondary battery
A method of producing a wet mixture includes a stirring and mixing process in which lithium-containing positive electrode active material particles having surplus lithium compounds on the surface and crystalline ferroelectric ceramic particles are dried, stirred and mixed to obtain a mixed powder; and a solution mixing process in which a lithium conductor forming solution is mixed with the mixed powder to obtain a wet mixture containing coated lithium-containing positive electrode active material particles having a coating which is made of an amorphous lithium conductor and in which the ferroelectric ceramic particles are dispersed on the surface of the lithium-containing positive electrode active material particles. |
| US12211985B2 |
Temperature control assembly and battery pack
The present application provides a temperature control assembly and a battery pack. The temperature control assembly includes a first side plate, a second side plate, and an elastic thermal pad. The elastic thermal pad has a main body that includes: a first plate section close to the first side plate in a longitudinal direction and extending in a vertical direction; a second plate section close to the second side plate in the longitudinal direction and extending in the vertical direction; and a connection section extending obliquely from the first side plate toward the second side plate and connected to the first and second plate sections. Due to elastic and structural characteristics of the elastic thermal pad, the main body of the elastic thermal pad is deformed under the action of extrusion to absorb the expansion forces of the batteries in time, thus greatly improving the service life of the batteries. |
| US12211984B2 |
Thermal device for heating and cooling battery modules
A thermal device comprises a first layer of a non-metallic material that is a good conductor of heat and electricity, that includes a first terminal and a second terminal, and that has a first surface and a second surface; a metallic material disposed on the first surface of the first layer; a first plastic layer disposed on the metallic material; and a second plastic layer disposed on the second surface of the first layer. The first plastic layer and the second plastic layer include a plastic material that is a good conductor of heat. |
| US12211980B2 |
Electric storage cell module and battery comprising a plurality of modules
A module (10) for a battery comprises accumulators (20), a first flange (22C) including first through openings, the accumulators being secured with no gluing in the first openings, first electrically-conductive plates (24C), each first plate being connected to the accumulators of a first accumulator assembly, a second flange (22D) including second through openings, the accumulators being secured with no gluing in the second openings, second electrically-conductive plates, each second plate being connected to the accumulators of a second accumulator assembly, and a package (12) delimiting, with the first and second flanges, first, second, and third chambers containing a dielectric liquid, the first flange including first passages (38C) for the dielectric liquid between the first and second chambers and the second flange including second passages (38D) for the dielectric liquid between the second and third chambers. |
| US12211977B2 |
Battery management system and battery pack
Disclosed is a battery management system and a battery pack and the battery management system includes: a pack voltage sampling unit for periodically sampling a pack voltage of a battery pack; a pack current sampling unit for sampling a pack current of the battery pack; and a control unit for, when the pack voltage sampling of the battery pack is completed, recording a time from a sampling start time of the pack voltage to a sampling completion time of the pack voltage as a first time, and transmitting a voltage sampling synchronization signal for measuring a cell voltage of a battery cell to a plurality of lower-level battery management systems. |
| US12211971B2 |
Amorphous nitrogen-rich solid state lithium electrolyte
A lithium ion conductor includes a compound of Formula 1: Li7−a*α−(b−4)*β−xMaαLa3Zr2−βMbβO12−x−δXxNδ Formula 1 wherein in Formula 1, Ma is a cationic element having a valence of a, Mb is a cationic element having a valence of b, and X is an anion having a valence of −1, wherein, when Ma comprises H, 0≤α≤5, otherwise 0≤α≤0.75, and wherein 0≤β≤1.5, 0≤x≤1.5, (a*α+(b−4)β+x)>0, and 0<δ≤6. |
| US12211968B2 |
Display device
There is provided a display device including a display panel including first panel pads arranged along a plurality of rows, each of the rows extending in a first direction in a plan view, wires extending in a second direction crossing the first direction, each of the wires including a first bonding portion attached to a corresponding one of the first panel pads, and a first circuit board including first pads connected to the wires. The first panel pads in a first row of the plurality of rows in a plan view are exposed in the second direction crossing the first direction between the first panel pads in a second row neighboring to the first row of the plurality of rows. |
| US12211967B2 |
Light-emitting display device and method of manufacturing the same
A light-emitting display device includes at least a transparent substrate, a first patterned conductive layer and a second patterned conductive layer respectively disposed on top of the opposite first and second surfaces of the transparent substrate, and a plurality of inorganic electroluminescent objects disposed in form of an array on top of the first surface of the transparent substrate with the inorganic electroluminescent objects being spaced from one another in a distance of at least 2 mm. Each of the inorganic electroluminescent objects has one power pin and light signal pins for red light, green light, and blue light. The transparent substrate has a plurality of through holes between the first surface and the second surface. The first patterned conductive layer has a plurality of soldering pad regions respectively in connection with the power pin and the light signal pins. At least one of the soldering regions is in electrical connection with the second patterned conductive layer by means of one of the through holes. |
| US12211964B2 |
Radiation emitting device and method of manufacturing a radiation emitting device
In an embodiment a radiation emitting device includes a semiconductor chip configured to emit electromagnetic radiation of a first wavelength range from a radiation exit surface and a potting comprising a matrix material and a plurality of nanoparticles, wherein a concentration of the nanoparticles in the matrix material decreases starting from the radiation exit surface of the semiconductor chip so that a refractive index of the potting decreases starting from the radiation exit surface of the semiconductor chip, and wherein the nanoparticles are coated with a shell. |
| US12211963B2 |
Light emitting device having a dam surrounding a light emitting region and a barrier surrounding the dam
A light emitting device includes: a base substrate; a plurality of unit regions provided on the base substrate; a barrier disposed at a boundary of the unit regions to surround each of the unit regions; a dam disposed in each of the unit regions to be spaced apart from the barrier; a first electrode provided in each of unit light emitting regions surrounded by the dam; a second electrode disposed in each of the unit light emitting regions, the second electrode of which at least one region is provided opposite to the first electrode; and one or more LEDs provided in each of the unit light emitting regions, the one or more LEDs being electrically connected between the first electrode and the second electrode. |
| US12211962B2 |
Barrier film, wavelength conversion sheet using barrier film, and display device using wavelength conversion sheet
A barrier film for a wavelength conversion sheet, which can effectively suppress adhering of a light guide plate to the wavelength conversion sheet and suppresses damaging of a wavelength conversion sheet, a light guide plate, a diffusion plate, etc. A barrier film includes at least a barrier layer and base material layers. The barrier film has stacked on one surface thereof a mat layer including a resin and fillers which at least partially project from the mat layer. In a plan view, the proportion of the projecting fillers from the mat layer that are viewed as having a particle size at least twice the thickness of the mat layer is 20-80% of the total fillers projecting from the mat layer, and the total number of fillers in a square of 1 mm2 in the plan view of the mat layer is 1800 or more. |
| US12211955B2 |
Method to control the relaxation of thick films on lattice-mismatched substrates
A substrate comprising a III-N base layer comprising a first portion and a second portion, the first portion of the III-N base layer having a first natural lattice constant and a first dislocation density; and a first III-N layer having a second natural lattice constant and a second dislocation density on the III-N base layer, the first III-N layer having a thickness greater than 10 nm. An indium fractional composition of the first III-N layer is greater than 0.1; the second natural lattice constant is at least 1% greater than the first natural lattice constant; a strain-induced lattice constant of the first III-N layer is greater than 1.0055 times the first natural lattice constant; and the second dislocation density is less than 1.5 times the first dislocation density. |
| US12211952B2 |
Micro-LED structure and micro-LED chip including same
A micro-LED structure includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer extrudes along a horizontal level away from a top edge of the first type conductive layer and a bottom edge of the second type conductive layer, such that an edge of the light emitting layer does not contact the top edge of the first type conductive layer and the bottom edge of the second type conductive layer. A profile of the second type conductive layer perpendicularly projected on a top surface of the first type conductive layer is surrounded by the top edge of the first type conductive layer. |
| US12211951B2 |
Assembly chamber for self-assembly of semiconductor light-emitting diodes
Discussed is an assembly chamber containing a fluid. The assembly chamber includes a bottom portion, a side wall portion formed at a predetermined height on the bottom portion and disposed to surround the bottom portion, and a partition wall part formed on the bottom portion and extending from one inner surface of a plurality of inner surfaces provided in the side wall portion to another inner surface facing the one inner surface. The vertical height of at least a portion of the partition wall part is variable with respect to the bottom portion. |
| US12211948B1 |
Multijunction solar cells
A method of fabricating multijunction solar cell including an upper solar subcell and having an emitter of p conductivity type with a first band gap, and a base of n conductivity type with a second band gap greater than the first band gap; a lower solar subcell disposed below the upper solar subcell having an emitter of p conductivity type with a third band gap, and a base of n conductivity type with a fourth band gap greater than the third band gap; and an intermediate grading interlayer disposed between the upper and lower solar subcells and having a graded lattice constant that matches the upper first subcell on a first side and the second solar subcell on the second side opposite the first side, and having a fifth band gap that is greater than the second band gap of the upper solar subcell. |
| US12211946B2 |
Modular photovoltaic system
A modular photovoltaic system adapted for collecting light rays from a solar light source to generate electrical current, the system having a light-tracking solar collector adapted to collect the light rays, an edge-lit photovoltaic array, and a transport conduit adapted to transport the light rays to the edge-lit photovoltaic array. The edge-lit photovoltaic array has a plurality of edge-lit photovoltaic panels, each having a transparent diffusing pane positioned between two backing panels with inwardly directed photovoltaic surfaces. Each edge-lit photovoltaic panel perpendicularly contacts a lateral light distributor attached to the transport conduit, causing the transparent diffusing pane to illuminate the photovoltaic surfaces to generate electrical current. The light-tracking solar collector is adapted to rotate to remain oriented toward the solar light source. |
| US12211945B2 |
Power diode and method of manufacturing a power diode
A power diode includes a semiconductor body having an anode region and a drift region, the semiconductor body being coupled to an anode metallization of the power diode and to a cathode metallization of the power diode, and an anode contact zone and an anode damage zone, both implemented in the anode region, the anode contact zone being arranged in contact with the anode metallization, and the anode damage zone being arranged in contact with and below the anode contact zone, wherein fluorine is included within each of the anode contact zone and the anode damage zone at a fluorine concentration of at least 1016 atoms*cm-3. |
| US12211942B2 |
Semiconductor devices
A semiconductor device includes a first source/drain, a second source/drain isolated from direct contact with the first source/drain in a horizontal direction, a channel extending between the first source/drain and the second source/drain, a gate surrounding the channel, an upper inner spacer between the gate and the first source/drain and above the channel, and a lower inner spacer between the gate and the first source/drain and under the channel, in which the channel includes a base portion extending between the first source/drain and the second source/drain, an upper protrusion portion protruding upward from a top surface of the base portion, and a lower protrusion portion protruding downward from a bottom surface of the base portion, and a direction in which a top end of the upper protrusion portion is isolated from direct contact with a bottom end of the lower protrusion portion is oblique with respect to a vertical direction. |
| US12211937B2 |
Field effect transistor device with air gap spacer in source/drain contact
A semiconductor device and method of manufacture are provided which help to support contacts while material is removed to form air gaps. In embodiments a contact is formed with an enlarged base to help support overlying portions of the contact. In other embodiments a scaffold material may also be placed prior to the formation of the air gaps in order to provide additional support. |
| US12211934B2 |
Semiconductor structure and method for manufacturing the same
A semiconductor structure includes a substrate assembly and a semiconductor device. The semiconductor device is formed on the substrate assembly, and includes a body region, two active regions, and a butted body. The active regions are disposed at two opposite sides of the body region, and both have a first type conductivity. The body region and the active regions together occupy on a surface region of the substrate assembly. The butted body has a second type conductivity different from the first type conductivity, and is located on the surface region of the substrate assembly so as to permit the body region to be tied to one of the active regions through the butted body. |
| US12211933B2 |
Semiconductor device
A semiconductor device according to an embodiment includes first to third semiconductor regions, a structure body, a gate electrode, and a high resistance part. The structure body includes an insulating part and a conductive part. The insulating part is arranged with the third semiconductor region, the second semiconductor region, and a portion of the first semiconductor region. The conductive part is located in the insulating part. The conductive part includes a portion facing the first semiconductor region. The high resistance part is located in the first semiconductor region and has a higher electrical resistance than the first semiconductor region. A plurality of the structure bodies includes first to third structure bodies. The second and third structure bodies are next to the first structure body. The high resistance part overlaps a circle center of an imaginary circle passing through centers of the first to third structure bodies. |
| US12211928B2 |
Monolithic qubit integrated circuits
Described is a monolithic integrated circuit for use in quantum computing based on single and multiple coupled quantum dot electron- and hole-spin qubits monolithically integrated with the mm-wave spin manipulation and readout circuitry in commercial complementary metal-oxide-semiconductor (CMOS) technology. The integrated circuit includes a plurality of n-channel or p-channel metal-oxide-semiconductor field-effect transistor (MOSFET) cascodes each including a single-spin qubit or two coupled quantum dot qubits formed in an undoped semiconductor film adjacent at least one top gate. There is also a back gate formed in a silicon substrate adjacent a buried oxide layer or the at least one top gate, where the back gate controls the electron or hole entanglement and exchange interaction between the two coupled quantum dot qubits. The monolithic integrated circuits described may be used for monolithically integrated semiconductor quantum processors for quantum information processing. |
| US12211926B2 |
Method and related apparatus for reducing gate-induced drain leakage in semiconductor devices
In some embodiments, a semiconductor device is provided. The semiconductor device includes a pair of source/drain regions disposed in a semiconductor substrate, where the source/drain regions are laterally spaced. A gate electrode is disposed over the semiconductor substrate between the source/drain regions. Sidewall spacers are disposed over the semiconductor substrate on opposite sides of the gate electrode. A silicide blocking structure is disposed over the sidewalls spacers, where respective sides of the source/drain regions facing the gate electrode are spaced apart from outer sides of the sidewall spacers and are substantially aligned with outer sidewalls of the silicide blocking structure. |
| US12211924B2 |
Semiconductor device and method of forming the same
A method of forming a semiconductor device includes forming a dummy gate structure across a fin protruding from a substrate, forming gate spacers on opposite sidewalls of the dummy gate structure, forming source/drain epitaxial structures on opposite sides of the dummy gate structure, forming a first interlayer dielectric (ILD) layer on the source/drain epitaxial structures and outer sidewalls of the gate spacers, replacing the dummy gate structure with a replacement gate structure, etching back the replacement gate structure to form a recess between the gate spacers, performing a first non-conformal deposition process to fill the recess with a first gate cap material, and planarizing the first gate cap material to remove a portion of the first gate cap material outside the recess. |
| US12211923B2 |
Semiconductor structure and forming method thereof
The present disclosure provides a semiconductor structure and a forming method thereof. The semiconductor structure includes: a substrate and an epitaxial layer disposed on the substrate. At least a part of the epitaxial layer is doped with metal atoms, and the doping concentration of the metal atoms at the bottom surface of the epitaxial layer near the substrate is larger than 1×1017 atoms/cm3. |
| US12211922B2 |
Gate air spacer for fin-like field effect transistor
Gates having air gaps therein, and methods of fabrication thereof, are disclosed herein. An exemplary gate includes a gate electrode and a gate dielectric. A first air gap is between and/or separates a first sidewall of the gate electrode from the gate dielectric, and a second air gap is between and/or separates a second sidewall of the gate electrode from the gate dielectric. A dielectric cap may be disposed over the gate electrode, and the dielectric cap may wrap a top of the gate electrode. The dielectric cap may fill a top portion of the first air gap and a top portion of the second air gap. The gate may be disposed between a first epitaxial source/drain and a second epitaxial source/drain, and a width of the gate is about the same as a distance between the first epitaxial source/drain and the second epitaxial source/drain. |
| US12211915B2 |
Semiconductor device including gate oxide layer
A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion. |
| US12211913B2 |
Semiconductor storage device with improved cutoff characteristics
A semiconductor storage device includes a first stacked body including first insulating films and first conductive films that are alternately stacked in a first direction. A first columnar body and a second columnar body extend within the first stacked body in the first direction. A second conductive film is provided above the first stacked body, and extends in a third direction intersecting the first direction and the second direction. A third insulator is adjacent to the second conductive film and extends in the third direction. A third conductive film is adjacent to the third insulator and extends in the third direction. A third columnar body is provided on the first columnar body. A fourth columnar body is provided on the second columnar body. A thickness of a third semiconductor portion in the first direction is greater than a thickness of the second conductive film in the first direction. |
| US12211911B2 |
Recessed contact structures and methods
An exemplary method of forming a semiconductor device includes forming, in a substrate, an active region protruding vertically from a major surface of the substrate, the active region including a semiconductor source-drain (S/D) region and a first 3-D channel structure, the S/D region physically contacting the first 3-D channel structure, and forming an opening extending into the S/D region, the opening having a depth greater than half of a height of the first 3-D channel structure; and forming a metallic plug in the opening, the metallic plug making electrical contact with the S/D region. |
| US12211910B2 |
Bipolar junction transistor (BJT) and fabricating method thereof
Bipolar junction transistor (BJT) structures are provided. A BJT structure includes a semiconductor substrate, a collector region formed in the semiconductor substrate, a base region formed over the collector region, an emitter region formed over the collector region, a ring-shaped shallow trench isolation (STI) region formed in the collector region, and a base dielectric layer formed over the collector region and on opposite sides of the base region. The base dielectric layer is surrounded by an inner side wall of the ring-shaped STI region. |
| US12211905B2 |
Method for preparing recessed gate structure with protection layer
A method for preparing a recessed gate structure includes forming a recessed structure, wherein the recessed structure comprises a substrate with the recess extending into the substrate from a topmost surface of the substrate; forming a first functional layer to at least cover a sidewall of a recess of the recessed structure; forming a second functional layer to cover the first functional layer; performing a rapid thermal treatment to form an interfacial layer extending along an interface between the first functional layer and the second functional layer; and forming a conductive feature to fill up the recess. |
| US12211903B2 |
Semiconductor device and method for designing thereof
A semiconductor device with an active transistor cell comprising a p-doped first and second base layers, surrounding an n type source region, the device further comprising a plurality of first gate electrodes embedded in trench recesses, has additional fortifying p-doped layers embedding the opposite ends of the trench recesses. The additional fortifying layers do not affect the active cell design in terms of cell pitch i.e., the design rules for transistor cell spacing, or hole drainage between the transistor cells, but reduce the gate-collector parasitic capacitance of the semiconductor, hence leading to optimum low conduction and switching losses. To further reduce the gate-collector capacitance, the trench recesses embedding the first gate electrodes can be formed with thicker insulating layers in regions that do not abut the first base layers, so as not to negatively impact the value of the threshold voltage. |
| US12211902B2 |
Silicon carbide semiconductor device and method for manufacturing the same
In a semiconductor device, a source region is made of an epitaxial layer so as to reduce variation in thickness of a base region and variation in a threshold value. Outside of a cell part, a side surface of a gate trench is inclined relative to a normal direction to a main surface of a substrate, as compared with a side surface of a gate trench in the cell part that is provided by the epitaxial layer of the source region being in contact with the base region. |
| US12211898B2 |
Device contact sizing in integrated circuit structures
Discussed herein is device contact sizing in integrated circuit (IC) structures. In some embodiments, an IC structure may include: a first source/drain (S/D) contact in contact with a first S/D region, and a second S/D contact in contact with a second S/D region, wherein the first S/D region and the second S/D region have a same length, and the first S/D contact and the second S/D contact have different lengths. |
| US12211897B2 |
Gate-all-around transistor with strained channels
The present disclosure provides a semiconductor device with a plurality of semiconductor channel layers. The semiconductor channel layers include a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer. A strain in the second semiconductor layer is different from a strain in the first semiconductor layer. A gate is disposed over the plurality of semiconductor channel layers. |
| US12211896B2 |
High voltage device with gate extensions
The present disclosure relates to an integrated chip. The integrated chip includes a source region disposed within a substrate, and a drain region disposed within the substrate and separated from the source region. A plurality of separate isolation structures are disposed within the substrate. The plurality of separate isolation structures have outermost sidewalls that face one another and that are separated from one another. A gate electrode is disposed within the substrate. The gate electrode includes a base region disposed between the source region and the plurality of separate isolation structures and a plurality of gate extensions extending outward from a sidewall of the base region to over the plurality of separate isolation structures. |
| US12211894B2 |
Ultra-high voltage resistor with voltage sense
A semiconductor device includes an active region, a LOCOS region formed within the active region and that extends vertically above a top surface of the active region, a gate region formed above the top surface of the active region, and a polysilicon resistor having a bottom surface that is offset vertically and physically isolated from a top surface of the LOCOS region. The active region includes a source region laterally disposed from the gate region, a drain region laterally disposed from the gate region, and a drift region laterally disposed between the gate region and the drain region. The polysilicon resistor is formed above the drift region. The active region further includes a first charge balance region formed in the active region below the drift region. |
| US12211892B2 |
Semiconductor device having supporter pattern
A method of manufacturing a semiconductor device includes sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and supporter layer, forming a plurality of lower electrodes filling the capacitor holes, forming a supporter mask pattern having a plurality of mask holes on the supporter layer and the lower electrodes, and forming a plurality of supporter holes by patterning the supporter layer. Each of the plurality of lower electrodes has a pillar shape, and each of the mask holes is between four adjacent lower electrodes and has a circular shape. |
| US12211890B2 |
Barrier layer for metal insulator metal capacitors
The present disclosure is directed to a method for the fabrication of MiM capacitor structures with metallic electrodes having nitrogen-rich metal nitride layers. The method includes depositing a first electrode bilayer on a first interconnect disposed on a substrate, where the first electrode includes a first layer and a second layer with a different nitrogen concentration. The method also includes depositing a dielectric layer on the first electrode bilayer and depositing a second electrode bilayer on the first interconnect where the second electrode includes a third layer and a fourth layer with a different nitrogen concentration. The method further includes patterning the first electrode bilayer, the dielectric layer, and the second electrode bilayer to form a capacitor structure on the first interconnect layer. |
| US12211887B2 |
Semiconductor devices having a resistor structure with more refined coupling effect for improved linearity of resistance
A semiconductor device includes a first terminal, a second terminal positioned away from the first terminal, a first resistive segment coupled between the first terminal and the second terminal, a third terminal positioned away from the first terminal and the second terminal, a second resistive segment coupled between the second terminal and third terminal, a first floating plate disposed physically proximate the first resistive segment and including a first end coupled to one of the first terminal and the second terminal, and a second floating plate disposed physically proximate the second resistive segment and including a first end coupled to one of the second terminal and the third terminal. |
| US12211877B2 |
Back-side deep trench isolation structure for image sensor
The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type. A BDTI structure is disposed between adjacent pixel regions and extending from the back-side of the image sensor die to a position within the photodiode doping layer. The BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer. The doped liner lines a sidewall surface of the dielectric fill layer. |
| US12211875B2 |
Imaging element having p-type and n-type solid phase diffusion layers formed in a side wall of an interpixel light shielding wall
The present technology relates to an imaging element that can increase the degree of freedom of element arrangement. A photoelectric conversion unit, a through trench penetrating a semiconductor substrate in a depth direction and formed between pixels each including the photoelectric conversion unit, and a PN junction region in a side wall of the trench are included, and the through trench has an opening portion, and a P-type region is formed in the opening portion. A photoelectric conversion unit, a holding unit, a through trench formed between the photoelectric conversion unit and the holding unit, and a PN junction region in a side wall of the through trench are included, and the through trench has an opening portion and a readout gate for reading the charge from the photoelectric conversion unit is formed in the opening portion. The present technology can be applied to, for example, an imaging element. |
| US12211870B2 |
Fingerprint sensor, method for manufacturing fingerprint sensor, and display device including fingerprint sensor
A fingerprint sensor includes: a light sensing layer including a light sensing element; and an optical layer including a plurality of light transmitting areas, a light blocking area, a light transmitting member disposed in the plurality of light transmitting areas, a light blocking member disposed in the light blocking area, and a planarization member disposed on the light blocking member, wherein the light blocking area surrounds the plurality of light transmitting areas, wherein the light transmitting member includes a first organic material, wherein the light blocking member includes a second organic material, and wherein the planarization member includes a third organic material and a positive-type photosensitive material. |
| US12211869B2 |
Optical blocking structures for black level correction pixels in an image sensor
An image sensor includes an array of image pixels and black level correction (BLC) pixels. Each BLC pixel includes a BLC pixel photodetector, a BLC pixel sensing circuit, and a BLC pixel optics assembly configured to block light that impinges onto the BLC pixel photodetector. Each BLC pixel optics assembly may include a first portion of a layer stack including a vertically alternating sequence of first material layers having a first refractive index and second material layers having a second refractive index. Additionally or alternatively, each BLC pixel optics assembly may include a first portion of a layer stack including at least two metal layers, each having a respective wavelength sub-range having a greater reflectivity than another metal layer. Alternatively or additionally, each BLC pixel optics assembly may include an infrared blocking material layer that provides a higher absorption coefficient than color filter materials within image pixel optics assemblies. |
| US12211865B2 |
Edge seals for semiconductor packages
Implementations of semiconductor packages may include: a digital signal processor having a first side and a second side and an image sensor array, having a first side and a second side. The first side of the image sensor array may be coupled to the second side of the digital signal processor through a plurality of hybrid bond interconnect (HBI) bond pads and an edge seal. One or more openings may extend from the second side of the image sensor array into the second side of the digital signal processor to an etch stop layer in the second side of the digital signal processor. The one or more openings may form a second edge seal between the plurality of HBI bond pads and the edge of the digital signal processor. |
| US12211858B2 |
Display substrate and display device
The display substrate includes: a display area and a bezel area, the display area including a first display area and a second display area; first light emitting devices in the first display area and second light emitting devices in the second display area; first pixel drive circuits in the bezel area and second pixel drive circuits in the second display area, the first pixel drive circuits are connected to the first light emitting devices, and the second pixel drive circuits are connected to the second light emitting devices; and shift registers in the bezel area, one shift register is connected with the first pixel driving circuits connected with one row of the first light emitting devices and the second pixel driving circuits connected with one row of the second light emitting devices. |
| US12211855B2 |
Display substrate and display device
The display substrate includes a substrate, multiple sub-pixels, multiple data lines, multiple power lines, multiple data signal input lines, multiple selector switches, a first power bus located in a peripheral area and on a side, facing away from the display area, of the multiple selector switches, and multiple power connection cables located in the peripheral area and between the first power bus and the multiple power lines. The multiple power connection cables are electrically connected with the first power bus and the multiple power lines. |
| US12211852B2 |
Semiconductor structure with a second isolation dam and manufacturing method thereof
A semiconductor structure includes a semiconductor substrate, a first isolation dam, a plurality of switching transistors and a second isolation dam. The semiconductor substrate includes a trench, an isolation region formed by a region where the trench is located, a plurality of active regions defined by the isolation region, and an electrical isolation layer, the electrical isolation layer being located on one side, away from an opening of the trench, of the trench; the first isolation dam fills the trench; the switching transistor is at least partially embedded in the active region of the semiconductor substrate; and the second isolation dam is at least partially located between the first isolation dam and the electrical isolation layer. |
| US12211848B2 |
Field effect transistors comprising a matrix of gate-all-around channels
Provided is a semiconductor structure with shared gated devices. The semiconductor structure comprises a substrate and a bottom dielectric isolation (BDI) layer on top of the substrate. The structure further comprises a pFET region that includes a p-doped Source-Drain epitaxy material and a first nanowire matrix above the BDI layer. The structure further comprises an nFET region that includes a n-doped Source-Drain epitaxy material and a second nanowire matrix above the BDI layer. The structure further comprises a conductive gate material on top of a portion of the first nanowire matrix and the second nanowire matrix. The structure further comprises a vertical dielectric pillar separating the pFET region and the nFET region. The vertical dielectric pillar extends downward through the BDI layer into the substrate. The vertical dielectric pillar further extends upward through the conductive gate material to a dielectric located above the gate region. |
| US12211847B2 |
Integrated circuit devices having highly integrated NMOS and PMOS transistors therein and methods of fabricating the same
A semiconductor device may include a substrate including first and second active regions and a field region therebetween, first and second active patterns respectively provided on the first and second active regions, first and second source/drain patterns respectively provided on the first and second active patterns, a first channel pattern between the first source/drain patterns and a second channel pattern between the second source/drain patterns, and a gate electrode extended from the first channel pattern to the second channel pattern to cross the field region. Each of the first and second channel patterns may include semiconductor patterns, which are stacked to be spaced apart from each other. A width of a lower portion of the gate electrode on the field region may decrease with decreasing distance from a top surface of the substrate. |
| US12211846B2 |
Semiconductor device
A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film. |
| US12211845B2 |
Semiconductor device and a method for fabricating the same
In a method of manufacturing a semiconductor device, first and second gate structures are formed. The first (second) gate structure includes a first (second) gate electrode layer and first (second) sidewall spacers disposed on both side faces of the first (second) gate electrode layer. The first and second gate electrode layers are recessed and the first and second sidewall spacers are recessed, thereby forming a first space and a second space over the recessed first and second gate electrode layers and first and second sidewall spacers, respectively. First and second protective layers are formed in the first and second spaces, respectively. First and second etch-stop layers are formed on the first and second protective layers, respectively. A first depth of the first space above the first sidewall spacers is different from a second depth of the first space above the first gate electrode layer. |
| US12211844B2 |
Semiconductor structure
A semiconductor structure is provided. The semiconductor structure includes a first gate-all-around FET over a substrate, and the first gate-all-around FET includes first nanostructures and a first gate stack surrounding the first nanostructures. The semiconductor structure also includes a first FinFET adjacent to the first gate-all-around FET, and the first FinFET includes a first fin structure and a second gate stack over the first fin structure. The semiconductor structure also includes a gate-cut feature interposing the first gate stack of the first gate-all-around FET and the second gate stack of the first FinFET. |
| US12211843B2 |
Manufacturing method of fin-type field effect transistor structure
A fin-type field effect transistor comprising a substrate, at least one gate stack and epitaxy material portions is described. The substrate has fins and insulators located between the fins, and the fins include channel portions and flank portions beside the channel portions. The at least one gate stack is disposed over the insulators and over the channel portions of the fins. The epitaxy material portions are disposed over the flank portions of the fins and at two opposite sides of the at least one gate stack. The epitaxy material portions disposed on the flank portions of the fins are separate from one another. |
| US12211841B2 |
Quantum dot devices
Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous rows extending in a first direction, and the plurality of second gates are arranged in electrically continuous rows extending in a second direction perpendicular to the first direction. |
| US12211840B2 |
Metal oxide semiconductor device
A metal oxide semiconductor, MOS, device (405) is described that includes a gate terminal, at least one source terminal and at least one drain terminal, wherein at least one source terminal and at least one drain terminal are formed of metal and are connected to a number of respective contact vias. A plurality of local interconnect layers, LIL, (470) are connected respectively to the least one source terminal and at least one drain terminal through the number of respective contact vias, wherein the at least one source terminal and the at least one drain terminal respectively connected to the plurality of LIL (470) are configured such that: the at least one source terminal and the at least one drain terminal do not overlap in a first direction (602) and a second direction (604) that is orthogonal to the first direction (602); and the at least one source terminal and the at least one drain terminal do not overlap or only a proportion of the at least one source terminal and the at least one drain terminal overlap in a third direction (606), where the third direction (606) is orthogonal to both the first direction (602) and the second direction (604). |
| US12211837B1 |
Semiconductor device including gate contact structure formed from gate structure
Provided is a semiconductor device which may include: a channel structure; a gate structure on the channel structure; and a gate contact structure on the gate structure, the gate contact structure configured to receive a gate input signal, wherein the gate contact structure is a portion of the gate structure itself, and no connection surface, interface or boundary is formed between the gate contact structure and the gate structure. |
| US12211835B2 |
Group III-V IC with different sheet resistance 2-DEG resistors
An integrated circuit (IC) includes a lower group III-N layer having a first composition over a substrate, and an upper group III-N layer having a different second composition over the lower group III-N layer. A gate electrode of a High Electron Mobility Transistor (HEMT) is located over the upper group III-N layer. First and second resistor contacts make a conductive connection to the lower group III-N layer. An unbiased group III-N cover layer is located on the upper group III-N layer in a resistor area including a high Rs 2-DEG resistor, where the unbiased group III-N cover layer is positioned between the first and second contacts. |
| US12211833B2 |
Electrostatic discharge protection structure
An electrostatic discharge protection structure includes a semiconductor substrate, a gate structure disposed on the semiconductor substrate, a first well region of a first conductivity type disposed in the semiconductor substrate, a first doped region of the first conductivity type, a second doped region of a second conductivity type, a third doped region of the first conductivity type, and a fourth doped region of the second conductivity type. The first and second doped regions are disposed in the first well region and connected with each other. The second doped region is an emitter of a first bipolar junction transistor. The third and fourth doped regions are disposed in the semiconductor substrate and connected with each other. The third and second doped regions are located at two opposite sides of the gate structure in a first horizontal direction. The third doped region is an emitter of a second bipolar junction transistor. |
| US12211831B2 |
Semiconductor device with redistribution structure
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first chip including: a first inter-dielectric layer positioned on a first substrate; a plug structure positioned in the first inter-dielectric layer and electrically coupled to a functional unit of the first chip; a first redistribution layer positioned on the first inter-dielectric layer and distant from the plug structure; a first lower bonding pad positioned on the first redistribution layer; and a second lower bonding pad positioned on the plug structure; and a second chip positioned on the first chip and including: a first upper bonding pad positioned on the first lower bonding pad; a second upper bonding pad positioned on the second lower bonding pad; and a plurality of storage units electrically coupled to the first upper bonding pad and the second upper bonding pad. |
| US12211830B2 |
Integrated circuit device
An integrated circuit device includes a memory including a memory cell insulation surrounding a memory stack and a memory cell interconnection unit, a peripheral circuit including a peripheral circuit region formed on a peripheral circuit board, and a peripheral circuit interconnection between the peripheral circuit region and the memory structure, a plurality of conductive bonding structures on a boundary between the memory cell interconnection and the peripheral circuit interconnection in a first region, the first region overlapping the memory stack in a vertical direction, and a through electrode penetrating one of the memory cell insulation and the peripheral circuit board and extended to a lower conductive pattern included in the peripheral circuit interconnection in a second region, the second region overlapping the memory cell insulation in the vertical direction. |
| US12211828B2 |
Light emitting diode device containing a positive photoresist insulating spacer and a conductive sidewall contact and method of making the same
A light emitting device includes a backplane, an array of light emitting diodes attached to a frontside of the backplane, a positive tone, imageable dielectric material layer, such as a positive photoresist layer, located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, such that sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile, and at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes. |
| US12211823B2 |
Semiconductor package with shared barrier layer in redistribution and via and method of manufacturing the same
A package structure includes first and second dies, an insulation structure, a through via, a dielectric layer and a redistribution layer. The second die electrically bonded to the first die includes a through substrate via. The insulation structure is disposed on the first die and laterally surrounds the second die. The through via penetrates through the insulation structure to electrically connect to the first die. The dielectric layer is disposed on the second die and the insulation structure. The redistribution layer is embedded in the dielectric layer and electrically connected to the through via. The redistribution layer includes a first barrier layer and a conductive layer on the first barrier layer. The through substrate via is electrically connected to the redistribution layer, and the conductive layer is in contact with a conductive post of the through via and separated from the through substrate via by the first barrier layer therebetween. |
| US12211822B2 |
Stacked semiconductor die assemblies with substrate heat sinks and associated systems and methods
Stacked semiconductor die assemblies with heat sinks and associated methods and systems are disclosed. In some embodiments, a controller carrying one or more memory dies may be attached to a front side of a substrate. The substrate may include a heat sink formed on its back side such that the heat sink can establish a thermal contact with the controller. Further, the heat sink may be coupled to a thermally conductive pad of a printed circuit board (PCB) that carries the substrate. In this manner, the controller may be provided with a heat path toward the PCB to dissipate thermal energy generated during operation. In some cases, the substrate may include a set of thermal vias extending from the heat sink toward the controller to enhance the thermal contact between the controller and the heat sink. |
| US12211820B2 |
Wafer bonding apparatus and method
Wafer bonding apparatus and method are provided. A method includes performing a first plasma activation process on a first surface of a first wafer. The first plasma activation process forms a first high-activation region and a first low-activation region on the first surface of the first wafer. A first cleaning process is performed on the first surface of the first wafer. The first cleaning process forms a first plurality of silanol groups in the first high-activation region and the first low-activation region. The first high-activation region includes more silanol groups than the first low-activation region. The first wafer is bonded to a second wafer. |
| US12211819B2 |
Method of manufacturing semiconductor device and semiconductor device
Electrical connection between electrodes provided respectively at facing positions in joint surfaces of substrates to be joined by chip lamination technology is conducted more securely. A method of manufacturing a semiconductor device includes: a first step of embedding electrodes in insulating layers exposed to the joint surfaces of a first substrate and a second substrate; a second step of subjecting the joint surfaces of the first substrate and the second substrate to chemical mechanical polishing, to form the electrodes into recesses recessed as compared to the insulating layers; a third step of laminating insulating films of a uniform thickness over the entire joint surfaces; a fourth step of forming an opening by etching in at least part of the insulating films covering the electrodes of the first substrate and the second substrate; a fifth step of causing the corresponding electrodes to face each other and joining the joint surfaces of the first substrate and the second substrate to each other; and a sixth step of heating the first substrate and the second substrate joined to each other, causing the electrode material to expand and project through the openings, and joining the corresponding electrodes to each other. |
| US12211818B2 |
Manufacturing method of semiconductor package using jig
A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate. |
| US12211816B2 |
Printed circuit board and electronic component package including the same
A printed circuit board includes: a first insulating layer; a first cavity disposed in one surface of the first insulating layer; a plurality of protrusion portions spaced apart from each other in the first cavity; and a first wiring layer embedded in the one surface of the first insulating layer. |
| US12211813B2 |
Semiconductor structure and manufacturing method thereof
The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first chip and a second chip, where a first conductive connection wire of the first chip is connected to a first conductive contact pad, a second conductive connection wire of the second chip is connected to a second conductive contact pad, the first conductive contact pad includes a first conductor group and a first connection group, and the second conductive contact pad includes a second conductor group and a second connection group. |
| US12211809B2 |
Structure with conductive feature and method of forming same
An element is disclosed. The element can include a non-conductive structure having a non-conductive bonding surface, a cavity at least partially extending through a portion of a thickness of the non-conductive structure from the non-conductive bonding surface, and a conductive pad disposed in the cavity. The cavity has a bottom side and a sidewall. The conductive pad has a bonding surface and a back side opposite the bonding surface. An average size of the grains at the bonding surface is smaller than an average size of the grains adjacent the bottom side of the cavity. The conductive pad can include a crystal structure with grains oriented along a 111 crystal plane. The element can be bonded to another element to form a bonded structure. The element and the other element can be directly bonded to one another without an intervening adhesive. |
| US12211808B2 |
Semiconductor device and method of forming discrete antenna modules
A semiconductor device has an electrical component assembly, and a plurality of discrete antenna modules disposed over the electrical component assembly. Each discrete antenna module is capable of providing RF communication for the electrical component assembly. RF communication can be enabled for a first one of the discrete antenna modules, while RF communication is disabled for a second one of the discrete antenna modules. Alternatively, RF communication is enabled for the second one of the discrete antenna modules, while RF communication is disabled for the first one of the discrete antenna modules. A bump is formed over the discrete antenna modules. An encapsulant is deposited around the discrete antenna modules. A shielding layer is formed over the electrical components assembly. A stud or core ball can be formed internal to a bump connecting the discrete antenna modules to the electrical component assembly. |
| US12211806B2 |
Semiconductor package with dummy pattern not electrically connected to circuit pattern
A semiconductor package includes a first substrate including a circuit pattern and a dummy pattern on an upper face of the first substrate, a solder ball, a second substrate on the first substrate, and an underfill material layer between the first and second substrates. The underfill material layer wraps around the solder ball. The dummy pattern is not electrically connected to the circuit pattern. The first substrate includes a solder resist layer on the circuit pattern and the dummy pattern. The solder resist layer includes a first opening for exposing at least a part of the circuit pattern. The solder ball is in the first opening and electrically insulated from the dummy pattern by the solder resist layer. The second substrate is electrically connected to the first substrate by the solder ball. The second substrate is electrically insulated from the dummy pattern by the solder resist layer. |
| US12211805B2 |
Trench structure for reduced wafer cracking
A semiconductor device includes a first wafer comprising a first portion of a seal ring structure within a body of the first wafer. The semiconductor device includes a second wafer comprising a second portion of the seal ring structure within a body of the second wafer. The second wafer is affixed to the first wafer such that the second portion of the seal ring structure is on the first portion of the seal ring structure. The semiconductor device includes a trench structure comprising a first trench in the first wafer and a second trench in the second wafer, where the first trench and the second trench are on a same side of the seal ring structure. |
| US12211802B2 |
Package structure and method of fabricating the same
A package structure includes a plurality of semiconductor die, an insulating encapsulant and a redistribution layer. Each of the plurality of semiconductor dies includes a semiconductor substrate, conductive pads disposed on the semiconductor substrate, conductive posts disposed on the conductive pads, and at least one alignment mark located on the semiconductor substrate. The insulating encapsulant is encapsulating the plurality of semiconductor dies. The redistribution layer is disposed on the insulating encapsulant and electrically connected to the plurality of semiconductor dies. |
| US12211793B2 |
Standard-cell layout structure with horn power and smart metal cut
The present disclosure, in some embodiments, relates to an integrated circuit. The integrated circuit includes first and second source/drain regions on or within a substrate. A first gate is arranged over the substrate between the first source/drain region and the second source/drain region. A first middle-end-of-the-line (MEOL) structure is arranged over the second source/drain region and a second MEOL structure is arranged over a third source/drain region. A conductive structure contacts the first MEOL structure and the second MEOL structure. A second gate is separated from the first gate by the second source/drain region. The conductive structure vertically and physically contacts a top surface of the second gate that is coupled to outermost sidewalls of the second gate. A plurality of conductive contacts are configured to electrically couple an interconnect wire and the first MEOL structure along one or more conductive paths extending through the conductive structure. |
| US12211792B2 |
Semiconductor memory device and method of manufacturing semiconductor memory device
Provided herein may be a semiconductor memory device and a method of manufacturing the semiconductor memory device. The semiconductor memory device includes a source structure, a stacked conductive layer that overlaps with the source structure, a first select conductive layer and a second select conductive layer disposed between the source structure and the stacked conductive layer, a stacked insulating layer disposed between the first and second select conductive layers and the stacked conductive layer, and a separation insulating structure provided between the first select conductive layer and the second select conductive layer. |
| US12211791B2 |
Semiconductor device including deep vias
A semiconductor device includes a transistor layer, a first via layer over the transistor layer, a first metallization layer over the first via layer, the first metallization layer including first conductors having long axes extending substantially in a first direction, a second via layer over the first metallization layer, and a conductive deep via extending in the second via layer, the first metallization layer, and the first via layer. The first conductors represent a majority of conductive material in the first metallization layer, and a size of the deep via in the first direction in the first metallization layer is substantially less than a minimum length of the first conductors in the first metallization layer. |
| US12211787B2 |
Interconnect structures and methods of fabrication thereof
A semiconductor structure and the manufacturing method thereof are disclosed. An exemplary semiconductor structure includes a first source/drain contact and a second source/drain contact spaced apart by a gate structure, an etch stop layer (ESL) over the first source/drain contact and the second source/drain contact, a conductive feature disposed in the etch stop layer and in direct contact with the first source/drain contact and the second source/drain contact, a dielectric layer over the etch stop layer, and a contact via extending through the dielectric layer and electrically connected to the conductive feature. By providing the conductive feature, a number of metal lines in an interconnect structure of the semiconductor structure may be advantageously reduced. |
| US12211780B2 |
Electronic package structure
An electronic package structure is provided. The electronic package structure includes a first carrier, a first electronic component, a first optical channel, and a second electronic component. The first electronic component is disposed on or within the first carrier. The first optical channel is disposed within the first carrier. The first optical channel is configured to provide optical communication between the first electronic component and the second electronic component. The first carrier is configured to electrically connect the first electronic component. |
| US12211778B2 |
Semiconductor device and method of forming bump pad array on substrate for ground connection for heat sink/shielding structure
A semiconductor device has a substrate and plurality of first bumps formed over the substrate in an array. An array of second bumps is formed over the substrate on at least two sides of the first bumps. An electrical component is disposed over the first bumps. A package structure is disposed over the substrate and electrical component. The package structure has a horizontal member and legs extending from the horizontal member to form a cavity. The package structure is coupled to the array of second bumps. The package structure includes a material to operate as a heat sink or shielding layer. The shielding layer makes ground connection through the array of second bumps. The first bumps and second bumps have a similar height and width to form in the same manufacturing step. A protective layer, such as conductive epoxy, is disposed over the array of second bumps. |
| US12211777B2 |
Semiconductor package including a dummy pattern
A semiconductor package including: a first substrate and a semiconductor device on the first substrate, wherein the first substrate includes: a first dielectric layer including a first hole; a second dielectric layer on the first dielectric layer and including a second hole that overlaps the first hole, the second hole being wider than the first hole; an under bump disposed in the first hole and the second hole, the under bump covering a portion of the second dielectric layer; and a connection member bonded to the under bump. |
| US12211776B2 |
Electronic package and manufacturing method thereof
Provided is an electronic package, in which a conductive structure and an encapsulation layer covering the conductive structure are arranged on one side of a carrier structure having a circuit layer, and an electronic component is arranged on the other side of the carrier structure. The rigidity of the carrier structure is increased by the encapsulation layer, and problems such as warpage or wavy deformations caused by increasing the volume of the electronic package due to functional requirements can be eliminated. |
| US12211775B2 |
Multiple substrate package systems and related methods
Implementations of a semiconductor package may include a first substrate including a first group of leads physically coupled thereto and a second group of leads physically coupled thereto; a second substrate coupled over the first substrate and physically coupled to the first group of leads and the second group of leads; and one or more semiconductor die coupled between the first substrate and the second substrate. The second group of leads may be electrically isolated from the first substrate. |
| US12211773B2 |
Integrated antenna-in-package structure
A semiconductor device includes a first substrate. An electrical component is disposed over the first substrate. A board-to-board connector is disposed over the first substrate. An encapsulant is deposited over the first substrate and electrical component to form a subpackage. The board-to-board connector remains exposed from the encapsulant. A contact pad is formed on a side surface of the subpackage. The subpackage is mounted to an antenna through the contact pad. |
| US12211771B2 |
Power module and related methods
Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die. |
| US12211766B2 |
Highly protective wafer edge sidewall protection layer
A method includes bonding a first wafer to a second wafer, performing a trimming process on the first wafer, and depositing a sidewall protection layer contacting a sidewall of the first wafer. The depositing the sidewall protection layer includes depositing a high-density material in contact with the sidewall of the first wafer. The sidewall protection layer has a density higher than a density of silicon oxide. The method further includes removing a horizontal portion of the sidewall protection layer that overlaps the first wafer, and forming an interconnect structure over the first wafer. The interconnect structure is electrically connected to integrated circuit devices in the first wafer. |
| US12211765B2 |
Semiconductor device package
The present disclosure provides a semiconductor device package including a first device, a second device, and a spacer. The first device includes a substrate having a first dielectric constant. The second device includes a dielectric element, an antenna, and a reinforcing element. The dielectric element has a second dielectric constant less than the first dielectric constant. The antenna is at least partially within the dielectric element. The reinforcing element is disposed on the dielectric element, and the reinforcing element has a third dielectric constant greater than the first dielectric constant. The spacer is disposed between the first device and the second device and configured to define a distance between the first device and the second device. |
| US12211763B2 |
Enhanced thermal dissipation in flip-chip semiconductor devices using laser direct structuring (LDS) technology
A method of manufacturing semiconductor devices, such as QFN/BGA flip-chip type packages, arranging on a leadframe one or more semiconductor chips or dice having a first side facing towards the leadframe and electrically coupled therewith and a second side facing away from the leadframe. The method also includes molding an encapsulation on the semiconductor chip(s) arranged on the leadframe, where the encapsulation has an outer surface opposite the leadframe and comprises laser direct structuring (LDS) material. Laser direct structuring processing is applied to the LDS material of the encapsulation to provide metal vias between the outer surface of the encapsulation and the second side of the semiconductor chip(s) and as well as a metal pad at the outer surface of the encapsulation. |
| US12211756B2 |
Deposition system and method
A deposition system is provided capable of measuring at least one of the film characteristics (e.g., thickness, resistance, and composition) in the deposition system. The deposition system in accordance with the present disclosure includes a substrate process chamber. The deposition system in accordance with the present disclosure includes a substrate pedestal in the substrate process chamber, the substrate pedestal configured to support a substrate, and a target enclosing the substrate process chamber. A shutter disk including an in-situ measuring device is provided. |
| US12211753B2 |
Semiconductor device
A semiconductor device includes a first set of nanostructures stacked over a substrate in a vertical direction, and each of the first set of nanostructures includes a first end portion and a second end portion, and a first middle portion laterally between the first end portion and the second end portion. The first end portion and the second end portion are thicker than the first middle portion. The semiconductor device also includes a first plurality of semiconductor capping layers around the first middle portions of the first set of nanostructures, and a gate structure around the first plurality of semiconductor capping layers. |
| US12211745B2 |
Methods of fabricating semiconductor devices
A method of fabricating a semiconductor device includes forming a dielectric layer on a lower structure. The method includes forming an opening to penetrate through the dielectric layer. The method includes alternately repeating a first operation, in which a first sputtering deposition process is performed to form a first metal pattern in the opening, and a second operation, in which a second sputtering deposition process is performed to form a second metal pattern in the opening, two or more times to form a first metal layer. The method includes forming a second metal layer on the first metal layer in an electroplating manner, and planarizing the first and second metal layers. Moreover, first and second process times, during which the first sputtering deposition process and the second sputtering deposition process, respectively, are performed, are each about five seconds or less. |
| US12211744B2 |
Method of forming nanocrystalline graphene
A method of forming nanocrystalline graphene according to an embodiment may include: arranging a substrate having a pattern in a reaction chamber; injecting a reaction gas into the reaction chamber, where the reaction gas includes a carbon source gas, an inert gas, and a hydrogen gas that are mixed; generating a plasma of the reaction gas in the reaction chamber; and directly growing the nanocrystalline graphene on a surface of the pattern using the plasma of the reaction gas at a process temperature. The pattern may include a first material and the substrate may include a second material different from the first material. |
| US12211743B2 |
Method of forming a metal liner for interconnect structures
Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A self-assembled monolayer (SAM) is formed on the bottom of the gap, and a barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer. |
| US12211741B2 |
Multi-wafer capping layer for metal arcing protection
The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process. |
| US12211739B2 |
Method for manufacturing semiconductor device comprising contact void surrounding bit line
A method for manufacturing a semiconductor device includes: forming an isolation member defining an active region in a substrate; forming a first insulating layer having a bit line contact over the substrate; forming a second insulating layer having a bit line opening on the first insulating layer; forming a bit line structure in the bit line opening, the bit line structure being electrically connecting to the bit line contact, and a contact void being formed surrounding the bit line structure and exposing a portion of the bit line contact; conformally forming a nitride spacer layer over the bit line structure, the second insulating layer, and the conductive contact; conformally forming a plasma oxide layer over the nitride spacer layer; and performing a wet cleaning process by using an aqueous solution containing negatively charged ions. |
| US12211736B2 |
Flowable chemical vapor deposition of metal oxides
Exemplary deposition methods may include introducing a vapor of a metal alkoxide into a processing volume of a semiconductor processing chamber. A substrate defining a trench may be housed in the processing volume. The methods may include condensing the vapor into a liquid metal alkoxide within the trench on the substrate. The methods may include forming a plasma external to the processing volume of the semiconductor processing chamber. The methods may include introducing plasma-generated species into the processing volume. The methods may include exposing the liquid metal alkoxide in the trench to the plasma-generated species. The methods may also include forming a metal oxide film in the trench through a reaction between the liquid metal alkoxide and the plasma-generated species. |
| US12211735B2 |
Load lock device
A load lock device includes a load lock chamber, and a substrate holding structure configured to hold a substrate in the load lock chamber, wherein the substrate holding structure includes a facing surface facing the substrate, and is configured to allow a gas to flow through a space between the substrate and the facing surface, and in a state in which the substrate is held by the substrate holding structure, a distance between the substrate and a portion located inside an outer edge of the facing surface is larger than a distance between the substrate and the outer edge of the facing surface. |
| US12211734B2 |
Lift pin mechanism
Methods and apparatus for a lift pin mechanism for substrate processing chambers are provided herein. In some embodiments, the lift pin mechanism includes a lift pin comprising a shaft with a top end, a bottom end, and a coupling end at the bottom end; a bellows assembly disposed about the shaft. The bellows assembly includes an upper bellows flange having an opening for axial movement of the shaft; a bellows having a first end coupled to a lower surface of the upper bellows flange such that the shaft extends into a central volume surrounded by the bellows; and a bellows guide assembly coupled to a second end of the bellows to seal the central volume. The shaft is coupled to the bellows guide assembly at the coupling end. The bellows guide assembly is axially movable to move the lift pin with respect to the upper bellows flange. |
| US12211733B2 |
Substrate processing apparatus and substrate processing method
A substrate processing apparatus includes a table, a pad holder, an elevating mechanism, and at least three centering mechanisms. The table is for supporting a substrate. The pad holder is for holding a polishing pad for polishing the substrate supported by the table. The elevating mechanism is for elevating the pad holder with respect to the substrate. The at least three centering mechanisms are for pushing the substrate supported by the table in a center direction of the table to position the substrate. The at least three centering mechanisms each include a rotation shaft arranged in a peripheral area of the table and a centering member mounted to the rotation shaft. |
| US12211731B2 |
Wafer processing method
A wafer processing method includes a wafer accommodating step of accommodating a wafer in a vacuum chamber, a protective sheet disposing step of disposing a protective sheet on a front surface of the wafer, a decompression step of decompressing the inside of the vacuum chamber, after the wafer accommodating step and the protective sheet disposing step, a press-fitting step of pressing the protective sheet against a peripheral marginal area of the wafer in the vacuum chamber to press-fit the protective sheet to the peripheral marginal area, after the decompression step, and a conveying-out step of opening the vacuum chamber to atmosphere to bring the protective sheet into close contact with the front surface of the wafer by atmospheric pressure and conveying out the wafer, after the press-fitting step. |
| US12211730B2 |
Dynamic release tapes for assembly of discrete components
A method includes positioning a discrete component assembly on a support fixture of a component transfer system, the discrete component assembly including a dynamic release tape including a flexible support layer, and a dynamic release structure disposed on the flexible support layer, and a discrete component adhered to the dynamic release tape. The method includes irradiating the dynamic release structure to release the discrete component from the dynamic release tape. |
| US12211728B2 |
Electrostatic chuck design with improved chucking and arcing performance
Aspects of the present disclosure relate to one or more implementations of a substrate support for a processing chamber. In one implementation, a substrate support includes a body having a center, and a support surface on the body configured to at least partially support a substrate. The substrate support includes a first angled wall that extends upward and radially outward from the support surface, and a first upper surface disposed above the support surface. The substrate support also includes a second angled wall that extends upward and radially outward from the first upper surface, the first upper surface extending between the first angled wall and the second angled wall. The substrate support also includes a second upper surface extending from the second angled wall. The second upper surface is disposed above the first upper surface. |
| US12211727B2 |
Simultaneous bonding approach for high quality wafer stacking
In some embodiments, the present disclosure relates to a method that includes aligned a first wafer with a second wafer. The second wafer is spaced apart from the first wafer. The first wafer is arranged on a first electrostatic chuck (ESC). The first ESC has electrostatic contacts that are configured to attract the first wafer to the first ESC. Further, the second wafer is brought toward the first wafer to directly contact the first wafer at an inter-wafer interface. The inter-wafer interface is localized to a center of the first wafer. The second wafer is deformed to gradually expand the inter-wafer interface from the center of the first wafer toward an edge of the first wafer. The electrostatic contacts of the first ESC are turned OFF such that the first and second wafers are bonded to one another by the inter-wafer interface. |
| US12211725B2 |
Electrostatic chuck assembly
There is provided an electrostatic chuck assembly including: an electrode-embedded ceramic plate; a cooling plate that supports a bottom surface of the ceramic plate and has an internal space of an annular or arcuate shape; an internal fixation member of an annular or arcuate shape accommodated in the internal space so as to be rotatable about a central axis of the cooling plate; female threads in a multiple of n, which is an integer of 2 or more, spaced apart from each other in the internal fixation member; and n insertion holes for insertion of bolts for being fixed to a chamber, the insertion holes each being provided at the bottom of the cooling plate such that one set of n female threads is exposed. Each of the female threads is disposed such that another set of n female threads is exposed in the insertion holes when rotated. |
| US12211719B2 |
Method of controlling substrate transfer system and the substrate transfer system
A method of controlling a substrate transfer system including a transfer mechanism having a holder, and a measurement part that detects an outer periphery of the substrate to measure a center position of the substrate, thereby transferring the substrate to a target position, includes: correcting the target position based on an amount of positional deviation between a reference position of the holder and the center position of the substrate, a first amount of thermal displacement of the reference position of the holder by thermal expansion of the transfer mechanism at a measurement position where the outer periphery of the substrate is detected, and a second amount of thermal displacement of the reference position of the holder by the thermal expansion of the transfer mechanism at the target position; and controlling the transfer mechanism such that the reference position of the holder becomes the corrected target position. |
| US12211712B2 |
Apparatus for manufacturing display device
An apparatus for manufacturing a display device includes a chamber, a heating member disposed inside the chamber to provide a thermal atmosphere inside the chamber, where the heating member includes a first heater and a second heater facing each other, a height adjustment member including an end disposed between the first heater and the second heater, and a driving unit which drives the end of the height adjustment member to move up or down such that the end of the height adjustment member is located at one of a first height and a second height which are different heights between the first heater and the second heater. Each of the first height and the second height is different from a height of a top surface of the first heater, and different from a height of a bottom surface of the second heater facing the top surface of the first heater. |
| US12211707B2 |
Integrated circuit package and method of forming thereof
A method of forming an integrated circuit package includes attaching a first die to an interposer. The interposer includes a first die connector and a second die connector on the interposer and a first dielectric layer covering at least one sidewall of the first die connector and at least one sidewall of the second die connector. The first die is coupled to the first die connector and to the first dielectric layer and the second die connector is exposed by the first die. The method further includes recessing the first dielectric layer to expose at least one sidewall of the second die connector and attaching a second die to the interposer, the second die being coupled to the second die connector. |
| US12211705B2 |
Stiffener package and method of fabricating stiffener package
A wafer level fan out package includes a semiconductor die having a first surface, a second surface, and a third surface. A stiffener is disposed on the third surface of the semiconductor die. A conductive via passes through the stiffener. First and second electrically conductive patterns electrically connected to the conductive via are disposed on the first and second surfaces of the semiconductor die and stiffener. Solder balls are electrically connected to the first or second electrically conductive patterns. |
| US12211699B2 |
Method of removing step height on gate structure
A method of removing a step height on a gate structure includes providing a substrate. A gate structure is disposed on the substrate. A dielectric layer covers the gate structure and the substrate. Then, a composite material layer is formed to cover the dielectric layer. Later, part of the composite material layer is removed to form a step height disposed directly on the gate structure. Subsequently, a wet etching is performed to remove the step height. After the step height is removed, the dielectric layer is etched to form a first contact hole to expose the gate structure. |
| US12211691B2 |
Dry development of resists
Dry development of resists can be useful, for example, to form a patterning mask in the context of high-resolution patterning. Dry development may be advantageously accomplished by a method of processing a semiconductor substrate including providing in a process chamber a photopatterned resist on a substrate layer on a semiconductor substrate, and dry developing the photopatterned resist by removing either an exposed portion or an unexposed portion of the resist by a dry development process comprising exposure to a chemical compound to form a resist mask. The resist may be an EUV-sensitive organo-metal oxide or organo-metal-containing thin film EUV resist. |
| US12211690B1 |
Group IIIA nitride growth system and method
A system and method for growing a gallium nitride (GaN) structure that includes providing a template; and growing at least a first GaN layer on the template using a first sputtering process, wherein the first sputtering process includes: controlling a temperature of a sputtering target, and modulating between a gallium-rich condition and a gallium-lean condition, wherein the gallium-rich condition includes a gallium-to-nitrogen ratio having a first value that is greater than 1, and wherein the gallium-lean condition includes the gallium-to-nitrogen ratio having a second value that is less than the first value. Some embodiments include a load lock configured to load a substrate wafer into the system and remove the GaN structure from the system; and a plurality of deposition chambers, wherein the plurality of deposition chambers includes a GaN-deposition chamber configured to grow at least the first GaN layer on a template that includes the substrate wafer. |
| US12211678B2 |
Recipe updating method
A recipe updating method of a plasma processing apparatus includes: performing a plasma processing on a substrate mounted on a stage using a first recipe including an application timing of a radio-frequency power for plasma generation; measuring a reference timing at which a temperature of the stage drops to a minimum value and a first maximum value of the temperature of the stage in association with the first recipe; performing the plasma processing on the substrate using a second recipe obtained by changing the application timing of the first recipe to the reference timing; measuring a second maximum value of the temperature of the stage in association with the second recipe; and updating the first recipe to the second recipe when the second maximum value is smaller than the first maximum value. |
| US12211676B2 |
Measurement system, measurement method, and plasma processing device
A measurement system including an imaging device and a plasma processing device having a plasma generator configured to generate plasma from a gas supplied into a processing chamber and a controller. The imaging device is configured to generate optical information of the plasma from image data of imaged plasma in the processing chamber, and the controller is configured to convert the generated optical information of the plasma into a plasma parameter that determines physical characteristics of the plasma with reference to a storage that stores correlation information between the optical information of the plasma and measurement results of the plasma parameter. |
| US12211672B2 |
Apparatus and method for plasma etching
An apparatus for plasma etching having an electrostatic chuck including a base layer, a bonding layer, an adsorption layer including a plurality of protrusions on the bonding layer and contacting a lower surface of a substrate, and an edge ring spaced apart from and surrounding a lateral surface of the substrate; a plurality of coolant suppliers injecting a coolant between the plurality of protrusions; a plurality of pipes supplying the coolant to the plurality of coolant suppliers to circulate the coolant in a predetermined direction; a cooling device in which the plasma etching process includes first and second operations, wherein the coolant is injected to cause the electrostatic chuck to reach a first temperature during the first operation, and reach a second temperature during the second operation; and a controller controlling a valve connected to the plurality of pipes to determine a circulation direction of the coolant. |
| US12211670B2 |
Performing radio frequency matching control using a model-based digital twin
A method includes receiving, from one or more sensors, sensor data associated with manufacturing equipment and updating one or more values of a digital replica associated with the manufacturing equipment based on the sensor data. The digital replica comprises a model reflecting a virtual representation of physical elements and dynamics of how the manufacturing equipment operates. One or more outputs indicative of predictive data is obtained from the digital replica and, based on the predictive data, performance of one or more corrective actions associated with the manufacturing equipment is caused. |
| US12211666B2 |
Data acquisition and processing techniques for three-dimensional reconstruction
Apparatuses and processes for generating data for three-dimensional reconstruction are disclosed herein. An example method at least includes exposing a subsequent surface of a sample, acquiring an image of the subsequent surface, comparing the image of the subsequent surface to an image of a reference surface, based on the comparison exceeding a threshold, acquiring a compositional or crystalline map of the subsequent surface, and based on the comparison not exceeding the threshold, exposing a next surface. |
| US12211664B2 |
Electron microscope imaging adaptor
The disclosure describes assemblies and systems for use in reel-to-reel imaging of ultrathin samples. The assemblies and the systems disclosed herein are adapted for use with a plurality of detectors and are configured for use in a variety of electron microscopes. Also, methods of using such assemblies and systems are disclosed. |
| US12211657B2 |
Keycap
The present invention provides a keycap, which includes a lower plate and an upper cover. The lower plate has two openings respectively through two opposite sides of the lower plate to respectively define two elastic arms. The upper cover is configured to be detachably assembled on the lower plate, in which the upper cover has two abutting portions and a protrusion, and the two abutting portions are respectively disposed on two opposite inner sides of the upper cover and respectively correspond to the two elastic arms, and each of the two abutting portions is configured to abut against a portion of the corresponding elastic arm, and the protrusion is disposed on an inner top surface of the upper cover and corresponds to one of the two openings. |
| US12211651B2 |
Ceramic electronic component and manufacturing method of the same
A ceramic electronic component includes a multilayer structure having a substantially rectangular parallelepiped shape and including dielectric layers and internal electrode layers that are alternately stacked, the dielectric layers being mainly composed of ceramic, the internal electrode layers being formed so as to be alternately exposed to two edge faces opposite to each other of the multilayer structure, and cover layers respectively disposed on top and bottom faces of the multilayer structure in a stack direction, the cover layers being mainly composed of ceramic, wherein at least one of a Sn concentration with respect to a main component ceramic in the cover layer or a Sn concentration with respect to a main component ceramic in a side margin section is higher than a Sn concentration with respect to a main component ceramic in a capacity section. |
| US12211649B2 |
Multilayer capacitor and board having the same embedded therein
A multilayer capacitor includes: a body including a capacitance region in which at least one first internal electrode and at least one second internal electrode are alternately laminated in a first direction with at least one dielectric layer interposed therebetween; and first and second external electrodes spaced apart from each other and respectively disposed on first and second surfaces of the body, the first and second surfaces opposing each other. The body further includes a first via electrode, connecting the at least one first internal electrode and the first external electrode to each other in the first direction, and a second via electrode connecting the at least one second internal electrode and the second external electrode to each other in the first direction. |
| US12211648B2 |
Ultracapacitor assembly
An ultracapacitor assembly is provided. The ultracapacitor assembly includes a plurality of ultracapacitors. The ultracapacitor assembly further includes a first bus bar and a second bus bar. The second bus bar is spaced apart from the first bus bar. The ultracapacitor assembly includes a discharge resistor coupled between the first bus bar and the second bus bar. The ultracapacitor assembly further includes a first plurality of switching devices and a second plurality of switching devices. Each switching device in the first plurality of switching devices is coupled between the first bus bar and a corresponding ultracapacitor of the plurality of ultracapacitors to selectively couple the corresponding ultracapacitor the discharge resistor via the first bus bar. Each switching device in the second plurality of switching devices is coupled between the second bus bar and a corresponding ultracapacitor to selectively couple the corresponding ultracapacitor the discharge resistor via the second bus bar. |
| US12211642B2 |
Superconducting coil, method for producing same, and superconducting rectangular wire for superconducting coil
The superconducting coil includes: a winding frame; and at least two superconducting rectangular wire layers provided in such a manner that a superconducting rectangular wire is spirally wound on an outer surface of the frame such that wires adjacent to each other in an axial direction of the frame are arranged side by side and separated, the wire including an NbTi-based or Nb3Sn-based wire having a surface coated with copper or copper alloy, in which at least a thermoplastic fusible resin is provided in a separated section between the adjacent wires, and when viewed in a cross section including an axis of the frame, at least one of voids that are partitionable on outer surfaces of a total of three wires and a total of four wires located on the two adjacent layers and adjacent to each other are 4% or less in terms of a void ratio (V1). |
| US12211640B2 |
Multi-phase transformer
A multi-phase transformer includes a centrally-disposed first core, a plurality of second cores each provided outside the first core so as to constitute a loop-shaped magnetic path with respect to the first core, and a primary winding and a secondary winding wound on each of the second cores. |
| US12211638B2 |
Magnetic-inductance component
A magnetic-inductance component is a multi-turn closed coil connected head to tail and wound around a magnetic circuit. A magnetic-inductance value of the magnetic-inductance component is adjusted by selecting metal conductors with different numbers of turns, materials, cross-sectional areas, and lengths to change an amplitude and phase of a magnetic flux of the magnetic circuit. The present invention changes the operating state and operating trajectory of a vector in the magnetic circuit by adding the magnetic-inductance component to the magnetic circuit or removing the magnetic-inductance component from the magnetic circuit, to make a state of a magnetic flux vector in the magnetic circuit to be consistent with a target magnetic flux vector state. A magnetic circuit vector model built by using the magnetic-inductance component as a core is more consistent with the actual physical situation, which is beneficial to the improvement of the accuracy of magnetic circuit analysis and calculation. |
| US12211629B2 |
Contact system having reliable insulation
A contact system includes a support body, a heat sink configured to contact the support body in an electrically insulated and/or heat-conducting manner, and an electrically insulating layer arranged between the heat sink and the support body. The heat sink has a first surface which is embodied substantially as a flat area and formed with a recess in a region intended for contacting a periphery of a contact area of the support body. The recess forms an unbroken track on the first surface of the heat sink. The contact area of the support body is located on the heat sink in such a way that the recess extends completely along the periphery of the contact area. The insulating layer between the heat sink and the support body is configured to cover the recess in such a way that a closed channel is formed by the recess and the insulating layer. |
| US12211626B2 |
Medical intelligence system and method
A method, computer program product, and computing system for: monitoring a meeting between a patient and a medical entity during a medical encounter; gathering information during the medical encounter, thus generating gathered encounter information; generating medical encounter topical information via artificial intelligence, wherein the medical encounter topical information is based at least in part upon the gathered encounter information and is configured to provide guidance to the medical entity concerning one or more topics to be discussed during the medical encounter; and providing the medical encounter topical information to the medical entity. |
| US12211623B2 |
Method and system for assessing drug efficacy using multiple graph kernel fusion
Embodiments of the present systems and methods may provide techniques to predict the success or failure of a drug used for disease treatment. For example, a method of determining drug efficacy may include, for a plurality of patients, generating a directed acyclic graph from health related information of each patient comprising nodes representing a medical event of the patient, at least one first edge connecting the first node to an additional node, each additional edge connecting nodes representing two consecutive medical events, the edge having a weight based on a time difference between the two consecutive medical events, capturing a plurality of features from each directed acyclic graph, generating a binary graph classification model on captured features of each directed acyclic graph, determining a probability that a drug or treatment will be effective using the binary graph classification model, and determining a drug to be prescribed to a patient based on the determined probability. |
| US12211622B2 |
Conversational services for artificial intelligence health support
A system provides artificial intelligence health support for people. The system renders specific, targeted treatments for people by using a flow engine and a conversational service to call one or more conversational modules. The treatments for the people may be tracked. The flow engine and/or one or more of the modules may include different instructions to perform for different programs and/or goals that have been configured. The flow engine and/or one or more of the conversational modules may also include instructions to perform when certain features are active (which may be activated when certain programs and/or goals are configured), when data regarding activity for people are received, and so on. Other modules may be dedicated to particular programs and/or goals. Some modules may determine whether or not to perform various instructions repetitiously, and/or may determine to do so when a priority of a previous instruction is below a threshold. |
| US12211614B2 |
Wireless medical room control arrangement for control of a plurality of medical devices
A wireless medical room control arrangement includes a wireless controller having a wireless router. A room identifier and a device identifier are stored in the controller. A communication interface sends commands to and receives commands from the wireless controller. In response to commands from the interface, the wireless controller sends wireless control signals to operate medical devices in the room. A room monitor adjacent a doorway provides room identifiers to medical devices and wireless controllers entering the room and provides dummy identifiers to medical devices and controllers exiting the room. The room monitors may connect to a global network processor that determines the location of the medical devices in a medical facility. |
| US12211612B2 |
System for identifying and tracking tools, instruments and consumable placed on worksurfaces
A system comprises a plurality of sensors adapted to identify and track items, e.g., tools, instruments and consumables, placed on worksurfaces. Each worksurface may contain one or more of these items and is used in an operating room. It is first determined if all the necessary items are available for a task at hand, then as items are removed, added or consumed a tally is updated to ensure that each is accounted for. When the task ends all items have to be accounted for by having the sensors review the content of the worksurfaces and identifying any discrepancy. In one embodiment, the system learns a process, e.g., a surgical process, such that in future cases it provides alerts of missing items before and after the task, provide instructions to equipment such as robots to assist in the task performance, and the like. |
| US12211611B2 |
Surgery visualization theatre
An augmented/extended reality (AXR) headset for use with a surgery visualization system is described herein. The AXR headset includes a wearable support frame, one or more forward-facing cameras pivotably mounted to the wearable support frame, an imaging system mounted to the wearable support frame, and a control logic processor coupled to the one or more front facing cameras and the image generator, and programmed to execute an algorithm including the steps of receiving image data from the one or more forward-facing cameras and operating the image generator to display the received image data onto the curved mirror. |
| US12211610B2 |
Systems and methods of automatically processing electronic images across regions
Systems and methods are disclosed for using an integrated computing platform to view and transfer digital pathology slides using artificial intelligence, the method including receiving at least one whole slide image in a cloud computing environment located in a first geographic region, the whole slide image depicting a medical sample associated with a patient, the patient being located in the first geographic region; storing the received whole slide image in a first encrypted bucket; applying artificial intelligence to perform a classification of the at least one whole slide image, the classification comprising steps to determine whether portions of the medical sample depicted in the whole slide image are healthy or diseased; based on the classification of the at least one whole slide image, generating metadata associated with the whole slide image; and storing the metadata in a second encrypted bucket. |
| US12211608B2 |
System and method for navigating a tomosynthesis stack including automatic focusing
A system and method for reviewing a tomosynthesis image data set comprising volumetric image data of a breast, the method comprising, in one embodiment, causing an image or a series of images from the data set to be displayed on a display monitor and selecting or indicating through a user interface an object or region of interest in a presently displayed image of the data set, thereby causing an image from the data set having a best focus measure of the user selected or indicated object or region of interest to be automatically displayed on the display monitor. |
| US12211601B2 |
Methods and system for the reconstruction of drug response and disease networks and uses thereof
Methods comprising an integrated, multiscale artificial intelligence-based system that reconstructs drug-specific pharmacogenomic networks and their constituent functional sub-networks are described. The system uses features of the functional topology of the three-dimensional architecture of drug-modulated spatial contacts in chromatin space. Discovery of a drug pharmacogenomic network is made through the selection of candidate SNPs by imputation, determination of the predicted causality of the SNPs using machine learning and deep learning, use of the causal SNPs to probe the spatial genome as determined by chromosome conformation capture analysis, combining targeted genes controlled by the same cell and tissue-specific enhancers, and reconstruction of the pharmacogenomic network using diverse data sources and metrics based on the results of genome-wide association studies. Knowledge-based segmentation methods are used to deconstruct the pharmacogenomic network into its constituent efficacy and adverse event sub-networks for applications in clinical decision support, drug re-purposing, and in silico drug discovery. |
| US12211600B2 |
Information processing apparatus, information processing method, and information processing program
An information processing apparatus comprising at least one processor, wherein the at least one processor is configured to: derive, for each of predetermined property items, property information indicating a property of the property item from at least one image; receive, for each of the property items, a description regarding the property item to be selectable as to whether the description is necessary, unnecessary, or optional in a document; and generate a plurality of character string candidates including the description based on the property information regarding the property items that have been selected as the descriptions being necessary and optional by changing a combination of property items selected from among the property items that have been selected as the description being optional. |
| US12211598B1 |
Configuring a generative machine learning model using a syntactic interface
Described herein are a system, method, and device for configuring a generative machine learning model using a syntactic interface. A system may include a user interface, a memory, and a processor configured to, using a syntactic interface displayed using the user interface, receive a syntactic interface input from a user; identify an electronic medical record (EMR) by generating an EMR database query as a function of the syntactic interface input, querying an EMR database using the EMR database query, and receiving, from the EMR database, an EMR database response; generate a prompt as a function of the syntactic interface input; generate a first generative model output as a function of the prompt and the EMR using a trained generative machine learning model; and using a conversational interface displayed using the user interface, display the first generative model output to the user. |
| US12211596B2 |
Mobile data management system
A data management arrangement that comprises system(s) enabling monitoring and interconnectivity system resources and configuration parameters to be dynamically adapted to ensure re-defined data prioritization and associated essential minimal data interconnectivity is maintained during high-dependence or critical data applications with arrangement includes the capability to combine and adapt/adjust online network application services connectivity parameters and configurations, mobile or remote monitoring and/or information and communication technology in accordance to required monitoring criteria, monitoring and interconnectivity conditions, status of monitored individual or object, and/or available resources and conditions associated with said NAS connectivity and/or mobile or remote monitoring and/or ICT systems, in accordance to the application and applicable risk mitigation and high-dependence connectivity monitoring aspect and associated requirements, and the capability to combine mobile monitoring or computing location details with current and/or forecast and/or normal conditions in order to determine travel, health, and other alerts, advice and recommendations. |
| US12211594B1 |
Machine learning to predict patient engagement and retention in clinical trials and increase compliance with study aims
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for conditional monitoring using different groups of remote devices. In some implementations, a system accesses data indicating characteristics for a monitoring program that involves data collection from a plurality of remote devices over a communication network. The system identifies a group of candidates for the monitoring program and, based on outcomes of other monitoring programs, the system generates a prediction for a level of compliance of the group with the requirements of the monitoring program. The system generates one or more scores indicative of whether the monitoring program will satisfy one or more predetermined conditions needed for successful completion of the monitoring program. Based on the generated one or more scores, the system provides a notification over the communication network that is indicative of whether the monitoring program will satisfy one or more predetermined conditions. |
| US12211590B2 |
Graphical user interface displaying relatedness based on shared DNA
A user may select one or more potential common ancestors with a DNA match to view the target individual's relationship with them. The process may include identifying, from a first genealogical profile of the target individual. A first individual has a first linkage that connects the target individual towards the selected potential common ancestor. The process may also include identifying, from a second genealogical profile of the DNA match, a second individual who has a second linkage that connects the DNA match towards the selected potential common ancestor. The process may further include connecting the first linkage and the second linkage with the selected potential common ancestor by adding one or more individuals whose profiles are retrieved from other searchable genealogical profiles stored in the online system. With the nodes and connections available, the process may generate a map of visual connections between the target individual and the DNA match. |
| US12211589B2 |
Method for identifying base in nucleic acid and system
A method for identifying a base in nucleic acid, a computer-readable storage medium, a computer program product, and a system. The method for identifying a base in nucleic acid comprises: mapping a coordinate of each bright spot in a bright spot set corresponding to a template onto an image to be inspected, and determining the position of a corresponding coordinate on said image (S11); determining the intensity of a signal at the position of the corresponding coordinate on said image, the intensity being a corrected intensity (S21); and comparing the intensity of the signal at the position of the corresponding coordinate on said image with the size of a first preset value, and determining a base type corresponding to the position on the basis of the comparison result, so as to achieve base calling (S31). The method may quickly and accurately identify a base, and achieve the determination of an order of nucleotides/bases of at least part of a sequence of a template. |
| US12211583B2 |
Data-buffer controller/control-signal redriver
In a memory system having multiple memory sockets for removable insertion of memory modules therein, off-module data buffers are disposed in a data signaling data path between a memory control component and the memory sockets, and an off-module buffer controller is disposed in a control signaling path between the memory control component and the memory sockets. The off-module buffer controller receives control signals transmitted by the memory control component and re-drives/re-transmits the control signals to the memory sockets. The off-module buffer controller generates buffer-control signals in response to the control signals and outputs the buffer-control signals to the off-module data buffers to multiplex host-control-component access to the memory sockets. |
| US12211580B2 |
Termination for pulse amplitude modulation
This document describes apparatuses and techniques for termination of a pulse amplitude modulation signal of a memory circuit. In various aspects, a memory circuit is implemented with a termination circuit that includes a power rail, a resistor, and a switch to couple the resistor between the power rail and a signal line of a memory interconnect. The power rail may be configured to provide power at a termination voltage that is nominally half of a voltage of another power rail from which a corresponding transmission circuit operates. This may be effective to enable termination of pulse amplitude modulation signals to the termination voltage instead of a higher voltage that corresponds to the power rail of the transmission circuit or a ground-referenced node. By so doing, use of the termination circuit may reduce power consumption and/or improve signal integrity of the memory circuit. |
| US12211576B2 |
Determination circuit and memory device and peripheral circuit thereof
A peripheral circuit of a memory device includes a compensation circuit, a determination circuit, and a plurality of page buffers. The compensation circuit defines a leakage current. The determination circuit is coupled to the compensation circuit, and is operated according to the leakage current. The determination circuit includes a current source, a first current mirror, a second current mirror, a potentially-qualified-bit quantity control unit, a determination circuit enable control unit, a hysteresis circuit, and a first logic unit. The page buffers include an unselected page buffer and a selected page buffer. The unselected page buffer is coupled to the compensation circuit. The selected page buffer is coupled to the determination circuit. |
| US12211572B2 |
Semiconductor device and memory system
A semiconductor device includes a multilevel receiver including a signal determiner receiving a plurality of multilevel signals and outputting a result of mutual comparison of the plurality of multilevel signals as an N-bit signal, where N is a natural number equal to or greater than 2. A decoder restores a valid signal among the N-bit signals from the signal determiner to an M-bit data signal, where M is a natural number less than N. A clock generator receives a reference clock signal, generates an input clock signal using the reference clock signal, inputs the input clock signal to the signal determiner, and determines a phase of the input clock signal based on an occurrence probability of an invalid signal not restored to the M-bit data signal among the N-bit signals. |
| US12211569B2 |
Semiconductor device and electronic device
A semiconductor device or the like with a novel structure that can change the orientation of the display is provided. A semiconductor device or the like with a novel structure, in which a degradation in transistor characteristics can be suppressed, is provided. A semiconductor device or the like with a novel structure, in which operation speed can be increased, is provided. A semiconductor device or the like with a novel structure, in which a dielectric breakdown of a transistor can be suppressed, is provided. The semiconductor device or the like has a circuit configuration capable of switching between a first operation and a second operation by changing the potentials of wirings. By switching between these two operations, the scan direction is easily changed. The semiconductor device is configured to change the scan direction. |
| US12211567B2 |
Memory system with verify operations of odd and even word lines
A memory system according to an embodiment includes a first bit line, a source line, a first word line, a second word line, a first memory pillar and a control circuit. The control circuit performs a first verify operation to first and second memory cells, a second verify operation to the first memory cell, a third verify operation to the second memory cell and a write operation or a read operation with a lower voltage in accordance with a request from an external device. |
| US12211566B2 |
Double program debug method for NAND memory using self-verification by internal firmware
The present disclosure provides a method for programing flash memory devices. The method may include programming a selected page of the NAND flash memory device according to programming data. The selected page may include memory cells corresponding to a word line. The programming of the selected page may include programming operations with programming voltages applied on the word line and a read operation performed on the selected page. |
| US12211565B2 |
Storage device and read recovery method thereof
Provided is an operation method of a memory controller which includes obtaining first read data from a second external device based on a first read command received from a first external device and performing error correction and decoding on the first read data to determine whether reading is successful or unsuccessful, performing a hard decoding-based read recovery operation and a soft decoding-based read recovery operation when a read failure occurs as a result of the first read operation, determining whether there is a second read command queued when the hard decoding-based read recovery has failed, temporarily stopping the read recovery operation for the first read data when there is the second read command queued and obtaining second read data by reading data from the second external device based on the second read command and performing error correction and decoding on the second read data. |
| US12211564B2 |
Memory device, method for programming memory device, program verification method and memory system
A memory device, a method for programming the memory device, a program verification method, and a memory system are provided. In the program verification method, an ith verification result of an ith program verification operation is obtained, where programming states verified by the ith program verification operation range from an nth state to an (n+k)th state, i and n are positive integers, k is a natural number, and the (n+k)th state is less than or equal to a highest programming state of the memory device; a range of programming states to be verified by an (i+1)th program verification operation is determined according to a verification sub-result for the nth state and a verification sub-result for the (n+k)th state in the ith verification result; and the (i+1)th program verification operation is executed according to the determined range of the programming states to be verified by the (i+1)th program verification operation. |
| US12211563B2 |
Dynamic gate steps for last-level programming to improve write performance
Systems, apparatuses and methods may provide for technology that conducts a pulse-verify loop sequence from a first program level in targeted NAND memory cells to a next-to-last program level in the memory cells, wherein the pulse-verify loop sequence includes an issuance of a program pulse and one or more verify pulses to the memory cells on a per program level basis, and wherein successive program pulses differ from one another by a gate step voltage amount. The technology may also issue a last level program pulse to the memory cells at a last program level, issue a single verify pulse to the memory cells after the last level program pulse, and issue a gate step pulse to the memory cells at a variable program level, wherein the variable program level differs from the last program level by an amount that is greater than the gate step voltage amount. |
| US12211562B2 |
Data erasure verification for three-dimensional non-volatile memory
A three-dimensional non-volatile memory includes memory blocks including layers. A data method for erasure verification of the three-dimensional non-volatile memory includes selecting a first layer from the layers on which an erase operation has been performed. The method also includes applying a first local verification voltage to a word line corresponding to the first layer to verify the erase operation on the first layer. When a full block erasure verification is performed on the memory blocks corresponding to the first layer, a voltage applied to the word line corresponding to the memory blocks is a global verification voltage, and the first local verification voltage is lower than the global verification voltage. |
| US12211561B2 |
Semiconductor storage device acquiring voltage from dummy pillars
A semiconductor storage device includes a plurality of word line layers stacked above one another in a first direction, a memory pillar having a columnar body penetrating the plurality of the word line layers, wherein each portion of the memory pillar intersecting the word line layers functions as a memory cell transistor, a source line layer to which an end of the memory pillar is connected, an acquisition circuit configured to acquire a voltage of the source line layer, and a first adjustment circuit configured to adjust the voltage of the source line layer to a predetermined target voltage based on the acquired voltage. The acquisition circuit includes a dummy pillar having a columnar body penetrating the plurality of word line layers and having an end connected to the source line layer, wherein each portion of the dummy pillar intersecting the word line layers functions as a dummy transistor. |
| US12211555B2 |
Memory device, memory system, and program method thereof
Disclosure includes systems, methods and devices to program a memory device, involving a first and a second programming operations on a memory cell of the memory device. In the first programming operation, the memory cell is programmed into an intermediate state. In the second programming operation, the memory cell is programmed from the intermediate state into a target state. The first programming operation includes providing a bias voltage to a bit line coupled to the memory cell and providing a programming voltage to a word line coupled to the memory cell. An amplitude of the bias voltage provided to the bit line depends on the intermediate state or the target state the memory cell to be programmed into. Accordingly, no verification operation need to be performed on the memory cell in the first programming operation. |
| US12211553B2 |
Storage system and operating method of storage controller
A storage system includes a non-volatile memory (NVM) device, having a memory cell array, and a storage controller. The storage controller receives a write command and data from a host and controls the NVM device to write the data in the memory cell array. Additionally, the storage controller determines a memory region of the memory cell array in which the data will be written, clusters a plurality of word lines into a plurality of groups on the basis of feature information of the plurality of word lines, rearranges an access order in units of groups according to the feature information, and accesses the word lines in the rearranged order to write the data in the memory region. |
| US12211552B2 |
Concurrent slow-fast memory cell programming
Described are systems and methods for concurrent slow-fast memory cell programming. An example memory device comprises: a memory array comprising a plurality of memory cells electrically coupled to a plurality of wordlines and a plurality of bitlines; and a controller coupled to the memory array, the controller to perform operations comprising: identifying a set of memory cells for performing a memory programming operation, wherein the set of memory cells are electrically coupled to a target wordline and one or more target bitlines; causing a first programming pulse to be performed by applying a first programming voltage to the target wordline; classifying, by a processing device, the set of memory cells into a first subset of memory cells and a second subset of memory cells based on their respective threshold voltages; causing a first bias voltage to be applied to a first target bitline connected to the first subset of memory cells; causing a second bias voltage to be applied to a second target bitline connected to the second subset of memory cells; and causing a second programing voltage to be applied to the target wordline, wherein the second programming voltage exceeds the first programing voltage. |
| US12211545B2 |
Input buffer bias current control
Devices and methods include generating biases for input buffers of a semiconductor device. In some embodiments, the semiconductor device includes an input buffer that buffer datas and biasing generation and distribution circuitry that generates and distributes a bias current to the input buffer based at least in part on a reference voltage. The biasing generation and distribution circuitry includes dynamic voltage bias circuitry that adjusts the bias current and reference voltage tracking circuitry that controls operation of the dynamic voltage bias circuitry based on the reference voltage. |
| US12211535B2 |
Magnetoresistive memory device and method of operating same using ferroelectric-controlled exchange coupling
A magnetoresistive memory cell includes a magnetoresistive layer stack containing a reference layer, a nonmagnetic spacer layer, and a free layer. A ferroelectric material layer having two stable ferroelectric states is coupled to a strain-modulated ferromagnetic layer to alter a sign of magnetic exchange coupling between the strain-modulated ferromagnetic layer and the free layer. The strain-modulated ferromagnetic layer may be the reference layer or a perpendicular magnetic anisotropy layer that is located proximate to the ferroelectric material layer. The magnetoresistive memory cell may be configured as a three-terminal device or as a two-terminal device, and may be configured as a tunneling magnetoresistance (TMR) device or as a giant magnetoresistance (GMR) device. |
| US12211534B2 |
Semiconductor device
An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer. |
| US12211532B2 |
Disk device
According to one embodiment, a disk device includes a disk-shaped recording medium, a magnetic head including a write head, a read head, and a heater, and a controller including a reference signal generator outputting a reference signal having a constant voltage amplitude at the same frequency as a high-frequency component of a gap measurement signal recorded in the recording medium, a measurer measuring a component amplitude of a reproduced signal of the gap measurement signal and an amplitude of the reference signal, and a heater controller controlling a power value of heater power supplied to the heater based on the measured values of the component amplitude and the amplitude of the reference signal. |
| US12211531B2 |
Magnetic recording and reproducing device
A magnetic recording and reproducing device includes a magnetic recording medium including a protective layer that is exposed to an enclosed interior volume of the magnetic recording and reproducing device, which contains oxygen and helium, a magnetic head including a heat assist element that is also exposed to the enclosed interior volume, the magnetic head configured to record data onto the magnetic recording medium, and an oxygen amount measurement unit configured to measure an oxygen amount in the enclosed interior volume. |
| US12211529B1 |
Fast characterization of media-noise-induced repeatable runout
A computer-implemented method for preparing a disk for a disk drive for operation includes: writing first and second servo information in a first portion of a servo sector for a track of the disk; writing third and fourth servo information in a second portion of the servo sector; in a single revolution of the disk, reading a first signal associated with the first servo information, a second signal associated with the second servo information, a third signal associated with the third servo information, and a fourth signal associated with the fourth servo information; based on the first signal, the second signal, the third signal, and the fourth signal, determining a repeatable runout value for the servo sector; and storing the repeatable runout value for the servo sector in a location that is accessed during operation and used during the operation as a repeatable runout correction factor for the track. |
| US12211528B2 |
Disk device
According to one embodiment, a disk device includes a magnetic disk, a magnetic head, a flexure, a piezoelectric element, a first bonding material, a second bonding material, and a protrusion. The flexure includes a first outer surface, a first pad, and a second pad. The first pad and the second pad are on the first outer surface. The piezoelectric element includes a second outer surface, a first electrode, and a second outer surface. The first electrode and the second electrode are on the second outer surface. The first bonding material, which is conductive, bonds the first pad and the first electrode. The second bonding material, which is conductive, bonds the second pad and the second electrode. The protrusion is provided on the flexure, is located at least partially between the first bonding material and the second bonding material, and protrudes from the first outer surface. |
| US12211527B2 |
Hard disk drive multiple disk pack stacking structure
A multi-disk pack hard disk drive includes first and second spindle motor assemblies mounted one over the other on a base post. Each motor assembly may include a compact axial flux motor. The motor wiring for each may be routed within a structural cutout feature of the base post to an electrical connector at the base. A compact threaded disk clamp and motor hub interface may be implemented to further reduce the vertical height of the multi-disk pack assembly. |
| US12211522B2 |
Systems and methods for confirming accuracy of video edits
Video frames of a video may be marked with visual patterns to identify individual video frames. The video may be changed by applying one or more effects to the video. The accuracy with which the changes were made to the video by the effect(s) may be determined using the visual patterns marked on the video frames. |
| US12211519B2 |
Magnetic disk device
According to one embodiment, a magnetic disk device includes a read control system that extracts scrambled data from media data read from a medium and inspection data associated with a seed value at the time of write, generates inspection data for data extracted from the media data, obtains from the inspection data and inspection data extracted from the media data, a seed value associated with both, compares this seed value with the seed value expected by the controller, and evaluates, when the comparison result is a mismatch, the data as an error, whereas when match, descrambles the data extracted from the media data using the seed value. |
| US12211518B2 |
Measurement device, measurement method, recording medium, and phonograph record
A playback device (measurement device) in a record playback system including a record player and the playback device measures a frequency characteristic of each of a plurality of input signals which are input from the record player to the playback device when a plurality of test signals for measuring a characteristic of the record playback system are played back by the record player, the plurality of test signals being recorded on a phonograph record, the plurality of input signals corresponding to the plurality of test signals recorded; calculates a measurement error between the frequency characteristic of each of the plurality of input signals measured and a predetermined frequency characteristic; selects a frequency characteristic of which the measurement error is smallest from among the frequency characteristics of the plurality of input signals, as a measurement result of the record playback system; and outputs the measurement result selected. |
| US12211513B2 |
Integration of high frequency audio reconstruction techniques
A method for decoding an encoded audio bitstream is disclosed. The method includes receiving the encoded audio bitstream and decoding the audio data to generate a decoded lowband audio signal. The method further includes extracting high frequency reconstruction metadata and filtering the decoded lowband audio signal with an analysis filterbank to generate a filtered lowband audio signal. The method also includes extracting a flag indicating whether either spectral translation or harmonic transposition is to be performed on the audio data and regenerating a highband portion of the audio signal using the filtered lowband audio signal and the high frequency reconstruction metadata in accordance with the flag. The high frequency regeneration is performed as a post-processing operation with a delay of 3010 samples per audio channel. |
| US12211512B2 |
Noise reduction using specific disturbance models
An example apparatus for reducing to reduce noise in audio includes a preprocessor to receive audio input from a microphone and preprocess the audio input to generate preprocessed audio. The apparatus also includes an acoustic event detector to detect an acoustic event corresponding to a disturbance in the preprocessed audio. The apparatus further includes a noise reduction model selector to select a specific disturbance model based on the detected acoustic event. The apparatus further includes a noise suppressor to attenuate components related to the disturbance in the preprocessed audio using the selected specific disturbance model to generate enhanced audio with suppressed noise. |
| US12211511B1 |
System that conducts and evaluates oral question-and-answer sessions using artificial intelligence
An artificial intelligence system that conducts an oral question-and-answer session with a single respondent to achieve an educational outcome, such as reviewing material to reinforce ideas or to prepare the respondent for future tests or events, or evaluating the respondent's knowledge or communication skills. The system may use an artificial intelligence engine that can understand and generate natural language, such as a large-language model like ChatGPT™. Text-to-speech and speech-to-text converters may be coupled to the AI engine to enable the system to communicate directly with the respondent using spoken language. The system may provide an interface for entry of session information such as background information on topics and the type of questioning that should be used during the session. The respondent may be given multiple attempts to answer a question and to select the best response, and the system may provide an evaluation and feedback after each response. |
| US12211510B2 |
Electronic device and control method thereof
An electronic device is provided. The electronic device includes a memory storing recording data including a content of a conversation and at least one instruction, and a processor configured, by executing the at least one instruction, to input first data corresponding to a first voice in the content of the conversation into a first neural network model and acquire category information of the first data, and acquire category information of second data corresponding to a second voice in the content of the conversation. The processor is configured to, based on the category information of the first data and the category information of the second data being different, train the first neural network model based on the category information of the second data and the first data. |
| US12211503B2 |
Hearing device system and method for operating same
A method operates a hearing device system which has a hearing aid and a peripheral device which provides a voice-controlled digital assistant. A microphone signal from the hearing aid is examined for own voice components of the wearer of the hearing aid. If own voice components are detected by the hearing aid the microphone signal is examined for a pre-defined activation command for the digital assistant. If the activation command is recognized, a portion of the microphone signal representing the activation command and a subsequent speech sequence is processed by the hearing aid for a speech recognizer of the digital assistant using an algorithm. The processed portion of the microphone signal is transmitted to the peripheral device. |
| US12211501B2 |
Methods and systems for correcting, based on speech, input generated using automatic speech recognition
Methods and systems for correcting, based on subsequent second speech, an error in an input generated from first speech using automatic speech recognition, without an explicit indication in the second speech that a user intended to correct the input with the second speech, include determining that a time difference between when search results in response to the input were displayed and when the second speech was received is less than a threshold time, and based on the determination, correcting the input based on the second speech. The methods and systems also include determining that a difference in acceleration of a user input device, used to input the first speech and second speech, between when the search results in response to the input were displayed and when the second speech was received is less than a threshold acceleration, and based on the determination, correcting the input based on the second speech. |
| US12211500B2 |
Electronic device and method for processing user input
An electronic device and method are disclosed herein. The electronic device includes a communication circuit, a processor, and a memory. The processor implements the method, including: receiving, from each of one or more external devices receiving a voice signal of a user, via the communication circuit, a first probability value based on usage frequency, and a second probability value based on signal-to-noise (SNR) magnitude, calculating final probability values for each of the one or more external devices, based on respective first and second probability values of each of the one or more external devices, and selecting an external device from among the one or more external devices having a highest final probability value from among the calculated final probability values. |
| US12211496B2 |
Method and apparatus with utterance time estimation
A processor-implemented utterance time estimation method includes: determining a plurality of attention weight matrices using an attention-based sequence-to-sequence model; selecting an attention weight matrix from the plurality of attention weight matrices; and estimating an utterance time corresponding to an output sequence based on the selected attention weight matrix. |
| US12211494B2 |
System and method for automated processing of speech using machine learning
Automated systems and methods are provided for processing speech, comprising obtaining a digitally-encoded speech representation corresponding to a telecommunication interaction, wherein the digitally-encoded speech representation includes at least one of a voice recording or a transcript derived from audio of the telecommunication interaction; obtaining a digitally-encoded data set corresponding to at least one structured feature of the telecommunication interaction; obtaining a reference set, wherein the reference set includes a set of binary-classified existing satisfaction classifications; obtaining a trained machine learning algorithm, wherein the machine learning algorithm has been trained using a first plurality of reference telecommunication interactions which include user-provided satisfaction scores; extracting a feature set from the digitally-encoded speech representation; and by the machine learning algorithm and based on at least one structured feature and the feature set, generating a predicted satisfaction classification for the telecommunication interaction. |
| US12211493B2 |
Early invocation for contextual data processing
A speech processing system uses contextual data to determine the specific domains, subdomains, and applications appropriate for taking action in response to spoken commands and other utterances. The system can use signals and other contextual data associated with an utterance, such as location signals, content catalog data, data regarding historical usage patterns, data regarding content visually presented on a display screen of a computing device when an utterance was made, other data, or some combination thereof. |
| US12211488B2 |
Adaptive visual speech recognition
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for processing video data using an adaptive visual speech recognition model. One of the methods includes receiving a video that includes a plurality of video frames that depict a first speaker: obtaining a first embedding characterizing the first speaker; and processing a first input comprising (i) the video and (ii) the first embedding using a visual speech recognition neural network having a plurality of parameters, wherein the visual speech recognition neural network is configured to process the video and the first embedding in accordance with trained values of the parameters to generate a speech recognition output that defines a sequence of one or more words being spoken by the first speaker in the video. |
| US12211486B2 |
Apparatus and method for compositional spoken language understanding
A method includes identifying multiple tokens contained in an input utterance. The method also includes generating slot labels for at least some of the tokens contained in the input utterance using a trained machine learning model. The method further includes determining at least one action to be performed in response to the input utterance based on at least one of the slot labels. The trained machine learning model is trained to use attention distributions generated such that (i) the attention distributions associated with tokens having dissimilar slot labels are forced to be different and (ii) the attention distribution associated with each token is forced to not focus primarily on that token itself. |
| US12211483B2 |
Robot, and speech generation program
The present application provides a robot that a user feels more strongly to be a living being. A robot includes a speech generating unit that generates speech and a speech output unit that outputs the generated speech. The robot outputs speech generated by the robot rather than outputting speech prepared in advance. Because of this, speech that is in accordance with sensor information can be generated and output, or speech unique to the robot can be generated and output. |
| US12211482B1 |
Configuring applications for speech processing
A system that determines which applications operating on a device are capable of processing speech processing results. As applications are added or removed, the device may update its own registry information as well as registry information for a remote system, thus ensuring continuity between a local speech processing pipeline and a remote speech processing pipeline. When speech processing is performed, the system can send the results to a corresponding application operating on a local device for further operation, execution, or the like. |
| US12211476B2 |
Vibration damping and sound insulating device
A vibration damping and sound insulating device installed on an installation object, includes: vibrators disposed at a prescribed spacing. Each of the vibrators includes: a cylindrical tubular member on the installation object; an elastic body supported by the cylindrical tubular member such that the elastic body traverses a hollow portion of the cylindrical tubular member along a direction orthogonal to an axis of the cylindrical tubular member; and a weight on the elastic body. |
| US12211475B2 |
Elongated sound isolation devices and systems
Systems and devices are disclosed herein for absorbing unwanted target sounds. In one example, an acoustic scatterer for absorbing a target sound includes a housing defining a plurality of channels having an open end and a terminal end. The terminal ends of the plurality of channels are separate from each other and extend along a length of the housing. The acoustic scatterer also includes one or more spacers subdividing the plurality of channels along the length of the housing. In another example, a system for absorbing a target sound includes a plurality of acoustic scatterers, each having a housing that defines a plurality of channels having an open end and a terminal end. The terminal ends of the plurality of channels are separate from each other and extend along a length of the housing. The plurality of acoustic scatterers are stacked on top of each other in a lengthwise direction. |
| US12211474B2 |
Wheel for reducing resonance noise in vehicle
A wheel for reducing a resonance noise in a vehicle may include a cylindrical-shaped rim on which a tire is mounted, and waveguides mounted on the rim, disposed in a cavity which is a space between the rim and the tire, having a ‘U’-shaped internal passage through which a sound wave generated in the cavity enters, and configured to reflect the sound wave entering the internal passage to generate a sound wave having an inverse phase, wherein a center portion of the internal passage extends in an axial direction of the rim, and first and second end portions of the internal passage are connected to a center portion of the internal passage to allow the sound wave to propagate and extend in a circumferential direction of the rim. |
| US12211473B2 |
Outdoor musical instruments
The present disclosure is directed to a musical instrument comprising a plurality of chimes, each of which has a fork portion comprising first and second prongs, or tines, and a resonator portion. Each chime is configured to produce a note of a predetermined pitch and frequency when one of the tines is struck by a mallet. The instrument may also be configured so that the note produced by striking one of the tines with a mallet has a desirable sustain. Embodiments of the musical instrument may be configured for installation in an outdoor environment, such as a playground or other recreational area, and thus to withstand the stresses associated with such an installation. |
| US12211471B2 |
DC power control devices with electrically isolated outputs
Power control devices are provided with electrically isolated outputs. One exemplary power control device comprises control electronics configured to: (i) receive a power signal from a DC power source, wherein the control electronics comprise an input ground for the DC power source; and (ii) provide multiple outputs, wherein the multiple outputs is supplied power from the DC power source; wherein the multiple outputs comprise at least one output that is electrically isolated from at least one other output of the multiple outputs that each provide power to one or more of a plurality of loads, wherein the electrical isolation is based on the at least one output having a first output ground that is isolated from a second output ground of the at least one other output, and wherein the input ground, the first output ground, and the second output ground are electrically isolated from each other. |
| US12211467B2 |
Electronic ink display for smart ring
A system for displaying information indicative of driving conditions, to a driver, using a smart ring are disclosed. An exemplary system includes a smart ring with a ring band having a plurality of surfaces including an inner surface, an outer surface, a first side surface, and a second side surface. The system further includes a processor, configured to obtain data from a communication module within the ring band, or from one or more sensors disposed within the ring band. The obtained data are representative of information indicative of one or more driving conditions to be displayed to the driver. The smart ring also includes an electronic ink (e-ink) display disposed on at least one of the plurality of surfaces, and configured to present information indicative of the one or more driving conditions. |
| US12211466B2 |
Displaying images of different dynamic ranges
Methods and apparatus for graphics processing, such as producing a smooth transition between images of different dynamic ranges (e.g., Standard Dynamic Range (SDR) images and High Dynamic Range (HDR) images). An example method generally includes using a high frame rate during a transition period to allow properties of images to incrementally vary. The properties may include brightness (i.e., luminance), color gamut, tone mapping, among others. For example, during the transition period, a subset of HDR images are displayed at a second frame rate (e.g., 120 Hz) higher than a frame rate based on the HDR images (e.g., 30 Hz). Simultaneously, a brightness level (as well as other aspects) of the display panel is adjusted incrementally from an SDR brightness level to an HDR brightness level during the transition time period over the subset of the HDR images. |
| US12211464B2 |
Display device
A display device includes a first display area including a plurality of first pixel areas, a second display area including a plurality of second pixel areas and a plurality of transmission areas, a plurality of pixels arranged in a matrix form in the first and second display areas, and a first signal line and a second signal line disposed to correspond to each pixel column in the plurality of pixels. In each pixel column, one of the first and second signal lines may extend over the first and second display areas, and a remaining one of the first and second signal lines may not be disposed in the second display area. |
| US12211459B2 |
Apparatus and driving method, backlight driving unit, microchip, and data transmission method
A driving method for a liquid crystal display apparatus includes generating and sending, by a system unit according to image data, respective ones of dimming data groups sequentially; and responding, by a backlight driver, to respective ones of the dimming data groups sequentially; where responding, by the backlight driver, to any one of the dimming data groups comprises: receiving the dimming data group, and sending driving configuration information to each of the signal channels according to the dimming data group. The driving configuration information of any one of the signal channels includes driving data and address related information of a selected microchip in the signal channel, and the selected microchip is the microchip that controls the light emitting zone corresponding to the dimming data in the dimming data group. The method further includes acquiring, by the selected microchip, the driving data according to the driving configuration information. |
| US12211455B2 |
Display device having a photodetector for detecting ambient light to adjust brightness of image
A display device, including a display module, a photodetector, a processor, and an optical structure layer, is provided. The display module is used for displaying an image. The photodetector is electrically connected to the display module and is used for detecting brightness of an ambient light and outputting a sensing signal. The processor is electrically connected to the display module and the photodetector, and is used for receiving the sensing signal and outputting a command signal to the display module according to the sensing signal, so that the display module adjusts brightness of the image according to the command signal. The optical structure layer is disposed on the display module. A glossiness of the optical structure layer is between 4 GU and 35 GU, and a reflectivity of specular component included (SCI) of the optical structure layer is between 3% and 6%. |
| US12211452B2 |
Display substrate and display device
The display substrate includes a shift register arranged on a base substrate, and the shift register includes a plurality of stages of driving circuits; a plurality of stages of the driving circuit are provided in the driving circuit area of the base substrate; a stage of driving circuit area includes a first area and a second area, and the first area is provided with a first type of transistor included in the driving circuit, a second type of transistor included in the driving circuit is provided in the second area; one side of the first area is a side of the power line away from the second area, and the other side of the first area is a side close to the second area of an active layer of the first type of transistor close to the second area. |
| US12211447B2 |
Shift register circuit and driving method thereof, gate driving circuit, and display device
A shift register circuit includes a first control sub-circuit and a first output sub-circuit. The first control sub-circuit is configured to: adjust a voltage of a first node to a turn-on voltage due to an influence of a first direct current voltage signal from a first clock signal terminal, an initial voltage signal from an initial signal terminal and a second direct current voltage signal from a second clock signal terminal; and maintain the voltage of the first node at the turn-on voltage due to an influence of a first clock signal from the first clock signal terminal and a second clock signal from the second clock signal terminal. The first output sub-circuit is configured to be turned on under a control of the turn-on voltage of the first node to transmit a first voltage signal from a first voltage terminal to a signal output terminal. |
| US12211446B2 |
Gate driver and display device including the same
A gate driver includes a stage configured to output a gate signal, the stage including an input part configured to control a voltage of a first node and a voltage of a second node based on signals supplied to a first input terminal and a second input terminal, an output part configured to supply a voltage of a first power source or a voltage of a second power source as the gate signal to an output terminal based on a voltage of a third node and a voltage of a fourth node, a first signal processing part configured to supply the voltage of the second power source to the fourth node based on the voltage of the first node, or to electrically connect the second node and the fourth node through a fifth node based on a signal supplied to a third input terminal, and a second signal processing part including a first transistor connected between the third node and a sixth node to control the voltage of the third node based on an operation of the first transistor. |
| US12211445B2 |
Driving device and a display device including the same
A driving device includes: an output unit configured to supply a first voltage, or a second voltage lower than the first voltage, to an output terminal in response to a voltage of a first node and a voltage of a second node; a first driver configured to control the voltage of the second node in response to a signal of a first input terminal and a signal of a second input terminal; a second driver configured to control the voltage of the first node in response to a voltage of a third input terminal and the voltage of the second node; and a first transistor configured to apply a third voltage lower than the first voltage to the first node or the second node. |
| US12211443B2 |
Pixel driving circuit and driving method thereof, display substrate and display device
A pixel driving circuit includes: a data writing circuit, a compensation control circuit, a light emission control circuit, a voltage regulation circuit, a driving transistor, the compensation control circuit is connected with the driving transistor at a first node, the compensation control circuit is connected with the data writing circuit at a second node, the compensation control circuit, the light emission control circuit, the voltage regulation circuit are connected with the driving transistor at a third node; the compensation control circuit obtains a threshold voltage of the driving transistor, writes a third voltage into the second node, and writes a light emission voltage into the first node according to a variation in a voltage at the second node and the threshold voltage; the voltage regulation circuit maintains a voltage at the third node stable during the compensation control circuit writing the light emission voltage into the first node. |
| US12211436B2 |
Display panel and display apparatus
A display panel and a display apparatus, the display panel includes a first display area and a second display area, and a light transmittance of the first display area is greater than a light transmittance of the second display area. The display panel includes sub-pixel units located in the first display area and pixel driving units located in the second display area. Each of the sub-pixel units includes first sub-pixels, the pixel driving units are electrically connected with the first sub-pixels, and each of the pixel driving units includes a plurality of first pixel driving circuits connected in parallel. |
| US12211429B2 |
Display device including display panel including plurality of display areas and method for controlling the same
A display device includes a display panel including a plurality of display areas; a driving circuit to control the display panel; a timing controller to control the driving circuit to display an image on the display panel; a storage medium to store a plurality of weight tables respectively corresponding to the plurality of display areas; and a load value generator to generate a first load value corresponding to a first data unit of input image data, and to apply a weight to the first load value based on a first weight table corresponding to a display area in which the first data unit is to be displayed, among the plurality of weight tables. The timing controller controls the driving circuit with reference to a weighted first load value. |
| US12211422B2 |
Display device capable of reducing the number of readout wires for receiving a biometric sensing signal
A display device includes: a display layer and a sensor layer, which senses an external input. The display layer includes: a plurality of pixels and a plurality of sensors, each of which includes a sensing element and a sensor driving circuit connected to the sensing element. The sensor driving circuit includes: a reset transistor, an output transistor, and a switch transistor including a first electrode connected to the sub-readout line, a second electrode connected to a readout line, and a third electrode for receiving a switch signal generated based on the external input. |
| US12211419B1 |
Driving method for display panel, driving chip, and display device
A driving method for a display panel, a driving chip, and a display device are provided. By driving sub-pixels for display across multiple frames, and ensuring each sub-pixel in every frame possesses either a high or low grayscale data compensation state, and either a positive or negative polarity, it's ensured that within the same frame, among the sub-pixels with the same display color and in the high grayscale data compensation state in two neighboring sub-pixel columns, at least one sub-pixel has a different polarity from the others. Under the Tri-Gate driving architecture, pixel polarities flip at intervals of an odd number of sub-pixels in each pixel column. This reduces polarity differences between the sub-pixels with the same display color and in the high grayscale data compensation state in four adjacent sub-pixel columns. This improves the perception of brightness changes when head movement occurs and reduces the risk of nodding lines. |
| US12211414B2 |
Display correction scheme using an under-display camera
Embodiments of the disclosed subject matter provide a device that includes a full color display. A camera may be disposed below the full color display. A controller may modify a video signal applied to one or more sub-pixels of the full color display based on a predicted degradation of the one or more sub-pixels, such that the modification is updated by the controller based on luminance data for the one or more subpixels acquired by the camera. |