Document Document Title
US11438190B2 Remote management apparatus and remote management system
A remote management apparatus remotely manages one or more devices. After establishing communication with a communication device incorporated in or connected to each of the one or more devices via a network, the remote management apparatus identifies a model of each of the one or more devices based on information received from the communication device.
US11438189B2 Environmental control for HVAC system
A system for controlling energy consumption in a building having a heating, ventilation and air-conditioning (HVAC) which includes using an external application to perform HVAC energy consumption optimization algorithms and other external energy control functions and transmit application control data to a building automation system (BAS), which in turn provides hardware level equipment control for the HVAC system. The external application evaluates equipment data received from the HVAC system by way of the BAS and processes these equipment data to provide application control data back to the BAS. The application control data are calculated to achieve a desired operating efficiency for the HVAC system.
US11438188B2 Multicast packets for a wireless local area network
Methods and apparatus for transmission of data streams using a multicast packet format based on group identifiers (Group IDs) to deliver data to multiple recipient stations (STAs). Using Group IDs, an access point (AP) assigns multiple STAs to one or more groups, and uniquely assigns each STA to a particular position within the group, such that it can receive a requested data stream. A Group ID management action frame provided by the AP to an individual STA indicates to which group (or groups) the STA is assigned and the STA's position within the group, with which information the STA can determine whether a packet is intended for the STA and which portion of the packet to decode in order to receive requested data streams.
US11438185B2 Proactive provision of new content to group chat participants
Techniques are described herein for automated assistants that proactively provide content to participant(s) of multi-participant message exchange threads (e.g., group chats, audio and/or video calls in which oral messages are transcribed for analysis, etc.) based on signals such as individual participant profiles associated with participant(s). In various implementations, automated assistant(s) that may not be explicitly invoked may analyze content of a message exchange thread involving multiple human participants and/or document(s) associated with the message exchange thread. Based on the analyzing, the automated assistant(s) may identify topic(s) pertinent to the message exchange thread. Based on individual participant profiles associated with the participants, the automated assistant(s) may identify shared interest(s) of the participants. The automated assistant(s) may then select new content based both on the pertinent topic(s) and the shared interest(s) of the participants and proactively provide the new content to one or more of the participants.
US11438184B2 Conference system, video conference apparatus, and video image processing method
A video conference apparatus includes a relay unit that is configured to transmit video image data acquired at a site of a first conference system to a second terminal provided in a second conference system and transmit video image data of the second conference system to a first terminal provided in the first conference system. The relay unit is configured to transmit only a combined video image of video images at respective sites of the first conference system to the second terminal as first video image data, and transmit a video image sent from the second terminal to the first terminal as second video image data.
US11438183B2 Power adapter for power supply unit
In one embodiment, an apparatus includes a power adapter configured for direct connection to a Power Supply Unit (PSU) installed in a network device, the power adapter comprising a power input port for receiving power on an Ethernet cable, a power converter module for converting the power received at the power input port to a PSU input power, and a power output connector for connection with a PSU power input connector.
US11438182B2 Human- and machine-readable cryptographic keys from dice
The systems and methods herein provide for human- and machine-readable cryptographic keys from dice. In one embodiment, the system places a number of dice into an arrangement to fill a dice grid. The number of dice each contains a number of faces, and each of the faces of the dice includes an image. The system then captures, via a client device, an image of the arrangement. The system generates a cryptographic key from the captured image. This cryptographic key is a human-readable and machine-readable representation of the arrangement in a canonical sequence.
US11438181B1 Method for distributed and secure timekeeping
One variation of a method for secure and distributed timekeeping includes: at a node in a set of nodes in a network, at a first time, sampling two time sources and calculating a minor consensus time between the two time sources; in response to designation of the node as a leader node, accessing a second minor consensus time generated by a second node, accessing a third minor consensus time generated by a third node, calculating a first major consensus time between the first, second, and third minor consensus times, and distributing a request to validate the first major consensus time; and, based on validation of the request from a threshold quantity of nodes, cryptographically hashing a hash of a previous block and the major consensus time to generate a first block and distributing the first block to each node in the set of nodes.
US11438178B2 Secure session capability using public-key cryptography without access to the private key
A server establishes a secure session with a client device where a private key used in the handshake when establishing the secure session is stored in a different server. During the handshake procedure, the server receives a premaster secret that has been encrypted using a public key bound with a domain for which the client device is attempting to establish a secure session with. The server transmits the encrypted premaster secret to the different server for decryption along with other information necessary to compute a master secret. The different server decrypts the encrypted premaster secret, generates the master secret, and transmits the master secret to the server. The server receives the master secret and continues with the handshake procedure including generating one or more session keys that are used in the secure session for encrypting and decrypting communication between the client device and the server.
US11438175B2 Systems and methods for correlating cryptographic addresses between blockchain networks
Embodiments include systems and methods for determining cryptographic address for a same entity across a plurality of distributed blockchain networks that use a same elliptic curve. In some embodiments the method includes computing a cryptographic address hash of the first cryptographic address using the cryptographic public key of the first cryptographic address, the cryptographic address hash being a common representation of the first entity on the first distributed blockchain network and the cryptographic address hash being derived via a cryptographic one-way hash function, the cryptographic one-way hash function following a protocol of performing a function on the cryptographic public key, the cryptographic public key being used on the first distributed blockchain network and a second distributed blockchain network, the first distributed blockchain network and the second distributed blockchain network using the same elliptic curve.
US11438172B2 Robust state synchronization for stateful hash-based signatures
In one example an apparatus comprises a computer readable memory, a signing facility comprising a plurality of hardware security modules, and a state synchronization manager comprising processing circuitry to select, from the plurality of hardware security modules, a set of hardware security modules to be assigned to a digital signature process, the set of hardware security modules comprising at least a first hardware security module and a second hardware module, and assign a set of unique state synchronization counter sequences to the respective set of hardware security modules, the set of state synchronization counter sequences comprising at least a first state synchronization counter sequence and a second state synchronization counter sequence. Other examples may be described.
US11438171B2 Virtualized authentication device
Methods, systems, and devices for virtualized authentication device are described. A virtual device (such as a virtual machine) may be permitted to access secured data within a memory device by an authentication process. The memory device may generate cryptographic keys in portions of the memory device and assign the cryptographic keys to the virtual machines. The virtual machine may use an authentication process using the cryptographic keys to access the secure data in the memory device. The authentication process may include authenticating the identity of the virtual machine and the code operating on the virtual machine based upon comparing cryptographic keys received from the virtual machines to the assigned cryptographic keys in the partitions of the memory device. Once both the identity of the virtual machine is authenticated, the virtual machine may be permitted to access the secure data in the memory device.
US11438170B2 Interstitial 3D scene information in video streams
There is disclosed in one example a digital video camera, including: an analog picture element; an analog-to-digital converter (ADC) to digitize input from the analog picture element; a three-dimensional (3D) scanner; compiling logic to compile the digitized input into a video stream; and insertion logic to insert interstitial 3D scene data into the video stream.
US11438169B2 Time-bound secure access
Described herein is a system and remote server that may enable a user device to gain access to a secure physical area or physical resource. The remote server may generate, store, and send a first access token to a user device in response to a request to access the physical area or physical resource. The remote server can receive an authentication request from a universal access control device at the location of the physical area or physical resource. The authentication request can contain a second access token and location information of the user device. The remote server can verify the second access token by comparing it to the stored first access token and location information about the access control device. Upon authentication and verification, the user device may gain entry to the secure area.
US11438168B2 Authentication token request with referred application instance public key
A server application may request an authentication token from an authentication token provider on behalf of a client application instance. An application instance public key of a client application instance may be received at the server application, in which the application instance public key belongs to an application instance public-private key pair of the client application instance. An authentication token request is generated at the server application, in which the request includes the application instance public key of the client application instance and is signed with a server application private key of a server application public-private key pair that belongs to the server application. The authentication token request is sent by the server application to an authentication token provider to request an authentication token for use by the client application instance.
US11438167B2 Method and server for providing notary service for file and verifying file recorded by notary service
According to one aspect of the present disclosure, provided is a method for providing a notary service for a file, the method comprising the steps in which: (a) when a notary service request for a specific file is obtained, a server generates, by using a hash function, or supports the generation of, a message digest of the specific file; and (b) if a predetermined condition is satisfied, the server registers, in a database, or supports the registration of, a representative hash value or a value obtained by processing the representative hash value, the representative hash value being generated by calculating at least one neighboring hash value that matches a specific hash value, wherein the specific hash value is a hash value of the result of encrypting the message digest with a private key of a first user, a private key of a second user and a private key of the server.
US11438162B2 Network device authentication
A method for authenticating an origin of a network device. The method includes reading one or more encrypted parameters from a memory of the network device, decoding the one or more encrypted parameters, and determining whether one or more of the decoded parameters match parameters obtained from a trusted platform module (TPM) installed in the network device and/or a read only memory (ROM) of the network device. In response to a mismatch between the decoded parameters and the parameters obtained from the TPM or the ROM, at least one of suspending operation of the device or transmitting a report of an authentication failure across a network on which the device is operating.
US11438155B2 Key vault enclave
Techniques for implementing a key vault as an enclave are presented. The techniques include securely storing, in a key vault enclave, a key for an encryption system according to a key use policy; sending an vault attestation report of a key vault enclave to a vault client; and performing an operation in the key vault enclave with the key. Some embodiments further include receiving, at the key vault enclave, a client attestation report of the vault client wherein the vault client and key vault enclave are hosted on different native enclave platforms.
US11438153B2 Method and device for transmitting data
A method for transmitting data includes: obtaining original data to be encrypted on a network device; determining a decryption geographic location of the original data to be encrypted, and selecting a hotspot within a range of the decryption geographic location; afterwards, using attribute information of the selected hotspot as an encryption key to encrypt the original data to be encrypted, and obtaining ciphertext data and sending the ciphertext data to user equipment. The attribute information is available to the user equipment by the user equipment scanning the hotspot within the range of the decryption geographic location. The present disclosure realizes encryption of the original data based on an actual decryption geographic location which is used as the encryption key of the original data to be encrypted.
US11438152B2 Distributed symmetric encryption
Systems and methods for improved distributed symmetric cryptography are disclosed. A client computer may communicate with a number of cryptographic devices in order to encrypt or decrypt data. Each cryptographic device may possess a secret share and a verification share, which may be used in the process of encrypting or decrypting data. The client computer may generate a commitment and transmit the commitment to the cryptographic devices. Each cryptographic device may generate a partial computation based on the commitment and their respective secret share, and likewise generate a partial signature based on the commitment and their respective verification share. The partial computations and partial signatures may be transmitted to the client computer. The client computer may use the partial computations and partial signatures to generate a cryptographic key and verification signature respectively. The client computer may use the cryptographic key to encrypt or decrypt a message.
US11438150B2 Constrained key derivation in linear space
The technology disclosed herein provides an enhanced cryptographic access control mechanism that uses a cryptographic keys that are based on proximity data. An example method may include: determining proximity data of a computing device; transforming the proximity data in view of conversion data associated with the computing device, wherein the conversion data causes a set of alternate proximity data values to transform to a specific cryptographic value; creating, by a processing device, a cryptographic key in view of the transformed proximity data; and using the cryptographic key to enable access to a protected resource.
US11438147B2 Technologies for multiple device authentication in a heterogeneous network
Technologies for providing multiple device authentication in a heterogeneous network include a gateway node. The gateway node includes a network communicator to receive a request from a terminal node to authenticate a user of a set of heterogeneous nodes connected to the gateway node and broadcast a credential request to the nodes. Additionally, the gateway node includes a response combiner to combine responses from the set of nodes to generate a combined authentication message. The network communicator is further to send the combined authentication message to the terminal node for authentication. Other embodiments are described and claimed.
US11438143B2 Method and system for optimization of blockchain data storage
A method for reducing file size of a blockchain through hash truncation includes: receiving a plurality of blockchain transactions; generating a first Merkle root of a first Merkle tree comprised of a first hash of each of the plurality of blockchain transactions; generating a second Merkle root of a second Merkle tree comprised of a second hash of each of the plurality of blockchain transactions, where the second hash is a truncation of the first hash for the respective blockchain transaction; generating a new block comprised of a block header and the first hash of each of the plurality of blockchain transactions, the block header including at least a timestamp, the first Merkle root, the second Merkle root, and a block reference value associated with a prior block in a blockchain; and transmitting the generated new block to a plurality of additional nodes in the blockchain network.
US11438141B2 Method and system for managing consent and utilization of information using blockchain
An information management method and system for managing consent for and use of information using a blockchain are provided. The information management method comprises: receiving a request to store a user agreement to the processing of the user's information from a service provider providing a service to the user; recording the user agreement on a blockchain; providing the service provider a response to the request to store the user agreement; receiving a third-party certification request for the provision of information from the user, regarding the information provided to the service provider; and providing a third-party certification for the provision of information to the user.
US11438132B2 Systems and methods for the design and implementation of input and output ports for circuit design
Systems and methods for providing input and output ports to connect to channels are provided. Input and output ports are the basic building blocks to create more complex data routing IP blocks. By aggregating these modular ports in different ways, different implementations of crossbar or Network on Chip (NoC) can be implemented, allowing flexible routing structure while maintaining all the benefits of channels such as robustness against delay variation, data compression and simplified timing assumptions.
US11438128B2 Systems/methods of improving vehicular safety
Systems and/or methods are disclosed of improving vehicular safety by acquiring data from a transceiver responsive to one or more signals that are received at the transceiver from one or more devices. The transceiver may be in a motor vehicle, and the one or more devices may include a base station and/or another transceiver of another motor vehicle. In some embodiments, the transceiver may transmit a signal responsive to having received a first signal from a first device, and the signal that is transmitted by the transceiver may cause a second device to transmit a second signal. Moreover, the transceiver may transmit data responsive to having received the second signal that is transmitted by the second device. In some embodiments, the transceiver may receive a signal from a first device, receive a signal from a second device, and transmit data responsive to having received both of the signals.
US11438125B2 Method and device in UE and base station used for wireless communication
The present disclosure discloses a method and a device in a User Equipment (UE) and a base station used for wireless communication. In one embodiment, the UE monitors a first-type signaling and a second-type signaling in first time-frequency sub-resources and second time-frequency sub-resources respectively; and transmits a first information group; wherein a first signaling is received in first time-frequency sub-resources, and the first signaling is a first-type signaling; a transmitter of the first-type signaling and a transmitter of the second-type signaling are a same serving cell; the first information group is used for indicating whether scheduling of the first signaling is correctly received; the first signaling comprises a first field. The present disclosure can support the dynamic scheduling from multiple TRPs with non-ideal backhaul to a UE, so as to improve transmission efficiency.
US11438124B2 Coordination notifications in wireless backhaul systems
Methods, systems, and devices for wireless communications are described to coordinate information across a wireless network. One or more access nodes of a wireless network may configure a time resource container for receiving, amplifying, and forwarding a signal, such as a notification signal, in an operating mode. A notification signal may include an indication of coordination information and may be transmitted or received in the time resource container, such as in a first subset of a set of time resources of the time resource container. An access node may first receive a signal from a second access node, amplify and forward the signal in the time resource container to a third access node, and then decode the received signal and determine whether the signal includes coordination information for the access node. If the signal includes coordination information for the access node, the access node may perform one or more actions.
US11438121B2 Sounding reference signal power control in new radio
Embodiments provide methods, network nodes, and wireless devices for sounding reference signal (SRS) power control in New Radio (NR). According to one aspect, a wireless device (WD) is configured to receive signaling from the network node that identifies a first sounding reference signal, SRS, configuration defining an SRS resource set comprising one or more SRS resources. The WD is further configured to determine a first transmission power intended for SRS transmission, the determining being based at least in part on the first SRS configuration. The WD is also configured to determine a second transmission power for at least one antenna port related to the SRS resource set based on the first transmission power and according to a rule dependent on the first SRS configuration. The WD is also configured to transmit SRS on the at least one antenna port with the second transmission power.
US11438117B2 Method for receiving reference signal by terminal in wireless communication system, and terminal using same method
Proposed is a method for receiving a reference signal by a terminal in a wireless communication system. The method comprises: receiving a control resource set (CORESET) and information on a reference signal mapped to a resource included in the CORESET; and receiving the reference signal on the basis of the information, wherein, when the CORESET overlaps a synchronization signal/physical broadcast channel block (SSB), the reference signal is mapped to a remaining resource region except for an overlapping resource region in which the CORESET overlaps the SSB in the CORESET.
US11438116B2 Floating-band CSI-RS
Certain aspects of the present disclosure provide techniques for floating-band channel state information (CSI) reference signals (RS). A method that may be performed by an apparatus includes determining a floating band for transmitting one or more CSI-RSs to a wireless device based on a previously scheduled data transmission by the apparatus. The apparatus transmits the one or more CSI-RSs to the wireless device on the floating band. In some aspects, a wireless device receives, from an apparatus, one or more floating-band CSI-RSs. The wireless device generates one or more CSI reports based on the one or more CSI-RSs and transmits the one or more CSI reports.
US11438108B2 Method for transmitting feedback response information and related product
A method for transmitting feedback response information and a related product are provided. The method includes: receiving, by a terminal, configuration information from a network device; determining, by the terminal, a largest number of pieces of feedback response information corresponding to one physical shared channel according to the configuration information; determining, by the terminal, a bit length of a first information field according to the largest number of pieces of the feedback response information; determining, by the terminal, a feedback response information sequence in a target time unit according to the first information field; and sending, by the terminal, the feedback response information sequence in the target time unit.
US11438107B2 Systems and methods for allocation of uplink control channel resources in unlicensed spectrum
Wireless communication between a user equipment (UE) and a base station may occur on unlicensed spectrum. When wirelessly communicating on unlicensed spectrum, there is an expectation that there may be interference from others devices also transmitting on the same resources in the unlicensed spectrum. Systems and methods are therefore disclosed that aim to facilitate wireless communication in unlicensed spectrum. In some embodiments, systems and method are disclosed that are primarily directed to the uplink transmission of hybrid automatic repeat request (HARQ) feedback corresponding to a downlink data transmission, and the downlink data transmission and the HARQ feedback are both sent on unlicensed spectrum.
US11438106B2 Method for transmitting and receiving HARQ-ACK signal and device therefor
The present disclosure provides a method for transmitting an HARQ-ACK signal by a UE in a wireless communication system. More particularly, the method is characterized by receiving control information for distinguishing first information and second information, receiving the first information and second information by means of at least one transmission block (TB), respectively decoding the first information and second information on the basis of the control information, and transmitting an HARQ-ACK signal on the basis of a decoding result with respect to the first information and a decoding result with respect to the second information. The reliability requirement of the first information is higher than the reliability requirement of the second information.
US11438105B2 Information transmission on a control channel
Example information transmission methods and apparatus are described. One example method includes receiving higher layer signaling and downlink control information. A time-frequency resource corresponding to scheduling request (SR) information and a time-frequency resource corresponding to hybrid automatic repeat request (HARQ) information are respectively determined based on the higher layer signaling and the downlink control information; The SR information is sent by using a first time-frequency resource, and the HARQ information is sent by using a second time-frequency resource. The first time-frequency resource is a part of the time-frequency resource corresponding to the SR information and does not overlap the second time-frequency resource in time domain, and the second time-frequency resource is the time-frequency resource corresponding to the HARQ information. Alternatively, the HARQ information is sent by using the time-frequency resource corresponding to the HARQ information, where the SR information is not sent.
US11438103B2 Receiver capability aware implementation of HARQ feedback
Certain aspects of the present disclosure provide techniques for sending a retransmission of codewords of a data packet to a receiver node, that were not previously successfully received by the receiver node, in a manner compatible with a receive capability constraint of the receiver node.
US11438100B2 Rate-matching techniques for polar codes
Methods, systems, and devices for wireless communication are described for polar coding with rate matching. A transmitter may construct input channels into a polar encoder to provide an information bit vector that does not include punctured or shortened bits. One or more transmission capacity factors may be used in identifying the information bit vector, which may be mapped to one or more of a codeword length of the polar code or a number of transmitted bits in each codeword. A number of different rate matching schemes may be available for transmissions, and may be selected based on one or more polar coding parameters. In some cases, mapping techniques may be used in two or more different rate matching schemes.
US11438097B2 Media content-based adaptive method, device and system for forward error correction (FEC) coding and decoding of systematic code, and medium
A media content-based adaptive method, device and system for Forward Error Correction (FEC) coding and decoding of a systematic code, and a medium are provided. The method includes: dividing, according to the importance of media content, source data into N types of source data packets according to priorities; generating N types of intermediate codes according to the N types of source data packets and the priorities thereof; setting, according to the N types of intermediate codes, recovery data of N types of source data according to a channel condition, and generating coded symbols of N types of systematic codes; receiving the coded symbols, and arranging and sorting the coded symbols according to decoding requirements; and decoding, according to the number of received coded symbols, intermediate codewords according to different situations, and recovering the corresponding source data packets according to the intermediate codewords.
US11438095B2 Apparatus and method for communication in broadcast system
The present disclosure relates to a communication apparatus and method for supporting a forward error correction scheme in a communication system. To this end, by means of a generation mode among a plurality of generation modes (ssbg_mode #0, #1, #2), a source symbol block having a plurality of source symbols is generated by using a source packet block having a plurality of source packets, and a repair symbol block for the generated source symbol block is generated by means of a forward error correction (FEC) scheme among a plurality of FEC schemes (FEC payload ID mode 0, FEC payload ID mode 1). A first FEC scheme (FEC payload ID mode 1) is applied to generate the repair symbol block, and in response to an occurrence of a discontinuity in packet sequence numbers, a repair packet may be generated to include length repair data and a repair FEC payload identifier (ID).
US11438093B2 Quality of service and streaming attributes for a data storage device
A host/device interface coupled between a host and a storage device, and including a data interface and a Quality of Service (QoS) and configured to communicate a QoS signal with the host. The QoS interface cooperates with the data interface to selectively manage a storage QoS on the storage device. A method is provided for storing data on a data medium including receiving a Quality of Service (QoS) command; selecting a portion of the data medium on which to store a data stream; forming a stream chunk from a portion of the data stream; configuring a transducer to store the stream chunk on the data medium in response to the QoS command; and storing the data on the data medium, such that the storing conforms to a QoS command value.
US11438091B2 Method and apparatus for processing bit block stream, method and apparatus for rate matching of bit block stream, and method and apparatus for switching bit block stream
Example methods and apparatus for processing a bit block stream are described. One example method includes obtaining a first to-be-processed bit block stream and mapping the first to-be-processed bit block stream into at least two slot bit block streams. The at least two slot bit block streams include a first slot bit block stream and a second slot bit block stream. The first slot bit block stream includes a first boundary bit block and a second boundary bit block. The second slot bit block stream includes a third boundary bit block and a fourth boundary bit block. N first bit blocks exist between the first boundary bit block and the second boundary bit block. N first bit blocks exist between the third boundary bit block and the fourth boundary bit block. The first bit block is a non-idle bit block.
US11438089B2 System and method for phase manipulation attack protection and detection in AoA and AoD
Systems and methods for detecting and protecting against phase manipulation during AoA or AoD operations are disclosed. For AoA operations, the network device receiving the constant tone extension (CTE) generates an antenna switching pattern, which may be randomly generated. The network device then receives the CTE using a plurality of antenna elements. In one embodiment, the network device compares the phase of portions of the CTE signal received that utilize the same antenna element. If the phase of these portions differs by more than a threshold, the network device detects a malicious attack and acts accordingly. In another embodiment, if the AoA algorithm cannot determine the angle of arrival, the network device detects a malicious attack and acts accordingly. For angle of departure operations, the network device that transmits the CTE signal generates the antenna switching pattern and transmits it to the position engine, which performs the comparisons described above.
US11438087B2 Optical branching/coupling device and optical branching/coupling method
An optical branching/coupling device includes: a first optical branching unit that splits first light with a first and a second wavelength, and outputs second light and third light; a wavelength selector that receives the second light, receives fourth light with a third wavelength, output fifth and sixth light, one of the fifth light and the sixth light including an optical signal of the first wavelength of the second light and including the fourth light, and the other including an optical signal of the second wavelength; a first light switch that receives the fifth light and the sixth light, output one of the fifth light and the sixth light as seventh light, and output the other as eighth light; and a second light switch that receives the third light, receives the eighth light, and outputs the third or the eighth light that have been input as ninth light.
US11438085B2 Method for allocating wireless resources based on sensitivity to inter-cell interference and apparatus thereof
A method for allocating wireless resources based on sensitivity to interference provides a base station controller which, within an area of overlap of adjacent wireless cells, determines a set of neighboring cell pairs from a plurality of cells. The base station controller sorts the set of neighboring cell pairs according to the number of inner-pair interfered user equipment devices of each neighboring cell pair where inner-pair interfered user equipment devices are user equipment devices located in coverage areas of the neighboring cell pair and allocates resource blocks for each neighboring cell pair sequentially based on the sorted set. An apparatus employing the method is also disclosed.
US11438083B2 Signal generation device
A signal generating device includes a digital signal processing unit, M sub DACs of which an analog bandwidth is fB, M being an integer equal to or greater than 2, a broadband analog signal generating unit configured to generate a broadband analog signal that includes a component of a frequency of (M-1)fB or more by using M analog signals output from the M sub DACs. The digital signal processing unit includes components for generating M original divided signals that correspond to signals obtained by dividing a desired output signal into M portions on a frequency axis and down-converting the portions to the baseband, components for generating M folded divided signals by folding back the M original divided signals on the frequency axis, and a 2M×M filter that takes the original divided signals and the folded divided signals as inputs and outputs M composite signals to be transmitted to the M sub DACs. The 2M×M filter can set a response function independently for each of 2M2 combinations of input and output.
US11438078B2 Controlling vibration output from a computing device
Systems, apparatuses, and methods are described for controlling vibrations output by one or more computing devices. A plurality of computing devices may form an ad hoc group using vibration signals. A computing device may suspend generation of a tactile vibration and/or sound as a notification of a received communication or other event.
US11438077B2 Submarine optical transmission apparatus and submarine optical communication system
An object to provide a submarine optical transmission apparatus capable of efficiently housing optical components and electric components. A submarine optical transmission apparatus includes a case, an electric component housing unit, and an optical component housing unit. The electric component housing unit and the optical component housing unit can house either or both of an optical component and an electric component and are stacked in a Z-direction. The case can house the electric component housing unit and the optical component housing unit that are stacked, and a longitudinal direction thereof is an X-direction.
US11438076B2 Optical quantum networks with rare-earth ions
Systems and methods for providing optical quantum communication networks based on rare-earth ion quantum bits (qubits) entrapped in solids are presented. According to one aspect a qubit is provided by an 171Yb3+ ion doped into a YVO crystal structure. A nanophotonic cavity fabricated in the doped crystal structure provides a zero-field energy level structure of the ion with optical transitions between ground and excited states at a wavelength longer than 980 nm. A subspace of the qubit is provided by two lower energy levels at the ground states separated by a microwave frequency of about 675 MHz. Addressing of the optical transitions is via first and second lasers and addressing of microwave transitions at the ground and excited states are via respective microwave sources. A single-shot readout sequence of the qubit based on two consecutive readout sequences on the optical transitions separated by a microwave pumping of the ground states is presented. Assignment of a readout state is conditionally based on combined states detected in the two consecutive readout sequences.
US11438073B2 Optical transceiver monitoring system
An optical transceiver monitoring system includes an optical transceiver device that includes a non-volatile memory system, and a computing device that includes a computing device port that is coupled to the optical transceiver device. The computing device monitors the computing device port and, in response, detects one or more interactions between the optical transceiver device and the computing device. The computing device determines that the one or more interactions satisfy an event condition, and in response to the one or more interactions satisfying the event condition, provides first event information that corresponds to the one or more interactions to the optical transceiver device for storage in the non-volatile memory system.
US11438070B2 Methods, systems, and devices for integrating wireless technology into a fiber optic network
The present disclosure relates to a fiber optic network configuration having an optical network terminal located at a subscriber location. The fiber optic network configuration also includes a drop terminal located outside the subscriber location and a wireless transceiver located outside the subscriber location. The fiber optic network further includes a cabling arrangement including a first signal line that extends from the drop terminal to the optical network terminal, a second signal line that extends from the optical network terminal to the wireless transceiver, and a power line that extends from the optical network terminal to the wireless transceiver.
US11438069B2 Data transmission method and apparatus
This application provides data transmission methods and apparatuses. One method includes: processing, by a network device, a first optical data unit (ODU) to obtain a second ODU, wherein a bit rate of the second ODU is lower than a bit rate of the first ODU; and sending, by the network device, the second ODU.
US11438062B2 Optical and radio frequency terminal for space-to-ground communications
Disclosed are systems for transmitting and receiving a radio frequency (RF) signal and an optical signal. One system may include a communication terminal comprising a primary concave reflector providing a first focal length to a focal point, and a secondary concave reflector providing a second focal length to the focal point. The communication terminal may further comprise an optical transceiver facing the secondary concave reflector, and one or more RF transceivers facing the primary concave reflector. The optical transceiver may be configured to transmit and receive the optical signal via the primary and secondary concave reflectors through the focal point, and the one or more RF transceivers may be configured to transmit and receive the RF signal via the primary concave reflector. The one or more RF transceivers may be positioned adjacent to the focal point and offset from a path of the optical signal.
US11438061B2 Method and corresponding apparatus for reducing backlight crosstalk impact of optical assembly
A method and corresponding apparatus for reducing a backlight crosstalk impact of an optical assembly. The method comprises: sequentially presetting two drive currents of a laser corresponding to a target wavelength channel as a first and second drive currents, respectively collecting backlight crosstalk data of the target wavelength channel to other wavelength channels, and generating a first and second crosstalk data matrix; carrying out fitting on the first and second crosstalk data matrix to acquire a crosstalk data calibration matrix; and calculating target backlight data of the target wavelength channel according to the crosstalk data calibration matrix, to calculate front light transmitting power of the target wavelength channel according to the target backlight data, thereby monitoring the optical assembly according to the front light transmitting power. The crosstalk impact can be reduced without an additional optical element, thereby improving accuracy of backlight detection and saving costs.
US11438057B2 Position information assisted beamforming
A beamforming control module including processing circuitry may be configured to receive fixed position information indicative of a fixed geographic location of a base station, receive dynamic position information indicative of a three dimensional position of at least one mobile communication station, determine an expected relative position of a first network node relative to a second network node based on the fixed position information and the dynamic position information, and provide instructions to direct formation of a steerable beam from an antenna array of the second network node based on the expected relative position.
US11438055B2 Method and device for performing bidirectional communication using mobile relay in wireless communication system
Provided is a method where mobile relay performs bidirectional inter-terminal communication in wireless communication system. The method includes determining optimal values of predetermined variables for maximizing a transmission ratio for the bidirectional inter-terminal communication during a predetermined time segment using pieces of basic information of at least one of the mobile relay, a first terminal, or a second terminal, transmitting setting information on the optimal values to at least one of the first terminal and the second terminal, and performing the bidirectional inter-terminal communication on the basis of the optimal values. The predetermined variables include at least one of a position of the mobile relay, a speed of the mobile relay, acceleration of the mobile relay, a downlink transmission power of the mobile relay, an uplink transmission power of the first terminal, an uplink transmission power of the second terminal, or a transmission resource allocation ratio for uplink and downlink.
US11438051B2 Preconfigured antenna beamforming
System and techniques are provided for preconfigured antenna beamforming. A device having a first antenna system for communicating over a first wireless link and a second antenna system for communicating over a second wireless link may be provided. For different transmit power levels of the first and/or second wireless links, an antenna coupling factor between the first antenna system and the second antenna system may be measured for different beamforming configurations of the first antenna system, a received signal strength indicator (RSSI) of the first and/or second wireless link may be measured for the different beamforming configurations of the first antenna system, and a beamforming configuration at each of the different transmit power levels with the measured antenna coupling factor and the measured RSSI may be stored in a memory as a predefined beamforming configuration.
US11438050B2 Wireless communication system
A wireless communication system includes a first wireless communication device and a server communicably connected to the first wireless communication device. The server accumulates a plurality of optimized beam table, and selects therefrom an optimized beam table to be used by the first wireless communication device, and, the first wireless communication device obtains the optimized beam table selected by the server by communicating with the server, and performs a wireless communication using the obtained optimized beam table.
US11438048B2 Methods and apparatus for new beam information reporting
A UE detects a beam failure on a first CC. The UE determines whether to transmit a BFRQ to a base station on the first CC or a second CC. The UE determines whether to include a NBI report in the BFRQ. The UE transmits the BFRQ to the base station on the first CC or the second CC. The base station receives a BFRQ from a UE on a first CC or a second CC. The base station determines a new beam for the first CC, where the determination of the new beam is based on a RACH procedure when the BFRQ is received on the first CC or a NBI report in the BFRQ when the BFRQ is received on the second CC. The base station initiates a BFR procedure with the UE for the first CC based on the BFRQ and the new beam determination.
US11438042B2 Transmission of data by multiple users over shared resources
A transmitter for transmitting data to a receiver of a wireless communication network, the transmitter includes at least one antenna, a codebook, an encoder, and a transceiver coupled to the encoder and to the at least one antenna. The codebook includes a plurality of codewords, each codeword being a vector including a plurality of symbols, each symbol to be transmitted over resources of the wireless communication network. The encoder is configured to receive an information message to be transmitted to a receiver of the wireless communication network, to select from the codebook the codeword associated with the received information message, and to divide the selected codeword into a plurality of sub-codewords. The transceiver is configured to transmit via the at least one antenna a first sub-codeword, and to transmit via the at least one antenna a second sub-codeword responsive to an indication that the encoded information message was not successfully decoded at the receiver on the basis of the received first sub-codeword.
US11438036B2 Client grouping for point to multipoint communications
A communication system for point to multipoint communications by grouping client devices based on associated modes is provided. In one example implementation, point to multipoint communication improvements are achieved by grouping a plurality of client devices by their optimal modes for communication. For example, the communication system can determine, based on channel quality indicators (CQIs) that two client devices of a plurality of client devices are associated with an optimal first mode of a modal antenna. The system can group the two client devices into a first group, the first group associated with communication using the first mode of the modal antenna. The modal antenna can communicate with the first group using the first mode of a modal antenna during a single frame of communication.
US11438034B2 Apparatuses and methods for a physical random access channel (PRACH) retransmission
A method for a Physical Random Access Channel (PRACH) retransmission, executed by a UE wirelessly transmitting and receiving to and from a cellular station, operates by performing a first PRACH transmission or retransmission using a first spatial domain transmission filter on first PRACH resources which are associated with a first downlink reference signal. After the first PRACH transmission or retransmission, the method performs a second PRACH retransmission using a second spatial domain transmission filter on second PRACH resources which are associated with a second downlink reference signal. Finally, method operates without incrementing a power ramping counter in response to the UE selecting the second spatial domain transmission filter different from the first spatial domain transmission filter, or incrementing the power ramping counter in response to the UE selecting the second downlink reference signal different from the first downlink reference signal.
US11438032B2 OAM reception apparatus, OAM reception method, and OAM transmission system
An OAM reception apparatus (30) includes an OAM reception unit (34) and an interference compensation unit (35C) that are independent of each other. The OAM reception unit (34) and the interference compensation unit (35C) execute “OAM reception processing” and “interference compensation processing”, respectively, based on a plurality of vertical component signals and a plurality of horizontal component signals obtained by performing polarization separating and down-conversion on a plurality of reception radio signals received by a plurality of reception antenna elements (31-1 to 31-4).
US11438031B2 Wireless power transfer system with mode switching using selective quality factor alteration
A wireless power transmission system includes a transmitter antenna, a transmission controller, an amplifier, and a variable resistor. The transmission controller is configured to (i) provide a driving signal for driving the transmitter antenna based on an operating frequency for the wireless power transfer system and (ii) perform one or more of encoding the wireless data signals, decoding the wireless data signals, receiving the wireless data signals, or transmitting the wireless data signals. The variable resistor is in electrical connection with the transmitter antenna and configured to alter a quality factor (Q) of the transmitter antenna, wherein alterations in the Q by the variable resistor change an operating mode of the wireless power transmission system.
US11438030B2 Wireless power transmitter for high fidelity communications at high power transfer
Wireless power transfer systems, disclosed, include one or more circuits to facilitate high power transfer at high frequencies. Such wireless power transfer systems include a damping circuit, configured to dampen a wireless power signal such that communications fidelity is upheld at high power. The damping circuit includes at least a damping transistor that is configured to receive, from the transmitter controller, a damping signal for switching the transistor to control damping during transmission of the wireless data signals. Utilizing such systems enables wireless power transfer at high frequency, such as 13.56 MHz, at voltages over 1 Watt, while maintaining fidelity of in-band communications associated with the higher power wireless power signal.
US11438029B2 Screen transmission method, vehicle mount, and storage medium
A screen delivery method, a vehicle bracket and a storage medium are provided. In the method, at least one mobile terminal around the vehicle bracket is detected; a target mobile terminal is determined from the at least one mobile terminal based on a change in intensity of a magnetic field between the at least one mobile terminal and the vehicle bracket; and screen delivery is performed between the vehicle bracket and the target mobile terminal based on a communicational connection between the vehicle bracket and the target mobile terminal in a case that it is determined that the target mobile terminal is fixed on the vehicle bracket. Therefore, with the method, the user's different application requirements for the vehicle bracket are met, and the user experience is improved.
US11438026B2 Power generation system and communications apparatus used in power generation system
An inverter in a power generation system converts a direct current that is input from a direct-current-side device into an alternating current for power supply. The inverter includes a control apparatus and a communications apparatus. The control apparatus controls the inverter to convert the direct current that is input from the direct-current-side device into an alternating current for power supply. The communications apparatus is coupled to the control apparatus, and sends a networking information request signal used to request networking information to the direct-current-side device in the power generation system through a direct-current power line, where a frequency of the networking information request signal is within a first frequency band. The communications apparatus also receives the networking information from the direct-current-side device; and sends a control signal to the direct-current-side device, where a frequency of the control signal is within a second frequency band.
US11438023B1 Electronic devices with hierarchical management of radio-frequency exposure
An electronic device may include a first set of radios subject to a specific absorption rate (SAR) limit and a second set of radios subject to a maximum permissible exposure (MPE) limit over an averaging period. Control circuitry may dynamically adjust radio-frequency (RF) exposure metric budgets provided to the radios over the averaging period, based on feedback reports from the radios identifying the amount of SAR and MPE consumed by the radios during different subperiods of the averaging period. The control circuitry may distribute and adjust SAR budgets and MPE budgets across the radios based on the feedback reports, distribution policies, radio statuses, transmit activity factors, and/or usage ratios associated with the radios. This may provide efficient utilization of the total available SAR and MPE budget, thereby leading to increased uplink coverage and throughput relative to scenarios where the SAR and MPE budgets remain static.
US11438020B2 Signal processing apparatus and method, and access network device
Example signal processing methods and apparatus are described. The signal processing apparatus includes a first power amplifier, a second power amplifier, a first filter, a second filter, and a combiner. The first filter filters a second signal obtained by the first power amplifier to obtain a first sub-signal belonging to a first frequency band and a second sub-signal belonging to a second frequency band. The second filter filters a fourth signal obtained by the second power amplifier to obtain n sub-signals including at least a third sub-signal belonging to a third frequency band. The combiner combines the first sub-signal and i sub-signals in the n sub-signals based on a preset condition to obtain a first combined signal. The communication module sends the first combined signal by using a first port, and sends the second sub-signal by using a second port.
US11438017B2 Method and apparatus for providing a joint error correction code for a combined data frame comprising first data of a first data channel and second data of a second data channel and sensor system
An apparatus (100) for providing an joint error correction code (140) for a combined data frame (254) comprising first data (112) of a first data channel and second data (122) of a second data channel comprises a first error code generator (110) configured to provide, based on a linear code, information on a first error correction code (114a, 114b) using the first data (112). The apparatus further comprises a second error code generator (120) configured to provide, based on the linear code, information on a second error correction code (124) using the second data (122). The apparatus is configured to provide the joint error correction code (140) using the information on the first error correction code (114a, 114b) and the information on the second error correction code (124).
US11438014B2 Deep neural network a posteriori probability detectors and media noise predictors for one- and two-dimensional magnetic recording
A deep neural network (DNN) media noise predictor configured for one-dimensional-magnetic (1DMR) recording or two-dimensional-magnetic (TDMR) is introduced. Such architectures are often combined with a trellis-based intersymbol interference (ISI) detection component in a turbo architecture to avoid the state explosion problem by separating the inter-symbol interference (ISI) detection and media noise estimation into two separate detectors and uses the turbo-principle to exchange information between them so as to address the modeling problem by way of training a DNN-based media noise estimators. Thus, beneficial aspects include a reduced bit-error rate (BER), an increased areal density, and a reduction in computational complexity and computational time.
US11438010B2 System and method for increasing logical space for native backup appliance
One embodiment provides a computer implemented method of data compression including segmenting user data into data segments; deduplicating the data segments to form deduped data segments; compressing the deduped data segments into compression units using a hardware accelerator; packing the compression units into compression regions; and packing the compression regions into one or more containers.
US11438009B2 Encoding apparatus, decoding apparatus, data structure of code sequence, encoding method, decoding method, encoding program, and decoding program
Provided is an encoding/decoding technique according to which it is possible to perform encoding with a small average bit count, even for a series of integer values with a distribution that is significantly biased to a small value, including small values that are not zero values. The present invention includes an integer encoding unit that, for an input series of non-negative values xn, n∈{1, 2, . . . , N} (hereinafter referred to as “integer series”), obtains a one-bit code with a bit value of “x” as a code corresponding to L consecutive integer values 0 included in the integer series, L being an integer that is 2 or more, and obtains a K×xn-bit or a K×xn+1-bit code that includes at least one bit value “x” and at least one bit value “y” in the first bit to the K-th bit and in which the bit values of the K×(xn−1) bits from the end are “y”, as a code corresponding to a set composed of 0 to L−1 consecutive integer values 0 included in the integer series and one integer value xn other than 0.
US11438007B2 Analog to digital converter with VCO-based and pipelined quantizers
An analog-to-digital converter (“ADC”) includes an input terminal configured to receive an analog input signal. A first ADC circuit is coupled to the input terminal and includes a VCO. The first ADC circuit is configured to output a first digital signal in a frequency domain based on the analog input signal. The first digital signal includes an error component. A first DAC is configured to convert the first digital signal to an analog output signal. A first summation circuit is configured to receive the analog output signal, the analog input signal, and a loop filtered version of the analog input signal and extract the error component, and output a negative of the error component. A second ADC circuit is configured to convert the negative of the error component to a digital error signal. A second summation circuit is configured to receive the first digital signal and the digital error signal, and to output a digital output signal corresponding to the analog input at an output terminal.
US11438004B2 Analog to digital converter with inverter based amplifier
An analog-to-digital converter (“ADC”) includes an input terminal configured to receive an analog input voltage signal. A first ADC stage is coupled to the input terminal and is configured to output a first digital value corresponding to the analog input voltage signal and a first analog residue signal corresponding to a difference between the first digital value and the analog input signal. An inverter based residue amplifier is configured to receive the first analog residue signal, amplify the first analog residue signal, and output an amplified residue signal. The amplified residue signal is converted to a second digital value, and the first and second digital values are combined to create a digital output signal corresponding to the analog input voltage signal.
US11438001B2 Gain mismatch correction for voltage-to-delay preamplifier array
A method of using an analog-to-digital converter system includes receiving a sampled voltage corresponding to one of an input voltage and a known voltage, causing preamplifiers to generate output signals based on the sampled voltage, generating first and second signals based on the output signals, causing a delay-resolving delay-to-digital backend to generate a single-bit digital signal representing an order of receipt of the first and second signals, and adjusting one or more of the preamplifiers based on the digital signal. The disclosure also relates to a system which includes a voltage-to-delay frontend and a delay-resolving backend, and to a method which includes causing a delay comparator to generate a single-bit digital signal representing an order of receipt of input signals, causing the comparator to transmit a residue delay signal to a succeeding comparator, and transmitting a signal to adjust one or more of the preamplifiers based on the digital signal.
US11437998B2 Integrated circuit including back side conductive lines for clock signals
An integrated circuit is disclosed, including a first latch circuit, a second latch circuit, and a clock circuit. The first latch circuit transmits multiple data signals to the second latch circuit through multiple first conductive lines disposed on a front side of the integrated circuit. The clock circuit transmits a first clock signal and a second clock signal to the first latch circuit and the second latch circuit through multiple second conductive lines disposed on a backside, opposite of the front side, of the integrated circuit.
US11437996B2 Dynamic control conversion circuit
The present disclosure relates to a dynamic control conversion circuit, which includes: a dynamic control unit configured to generate a dynamic control signal according to a received input signal; a first semiconductor switch, a control terminal of the first semiconductor switch is connected with a first signal output terminal of the dynamic control unit, and a first terminal of the first semiconductor switch is connected with a first voltage terminal; a second semiconductor switch, a control terminal of the second semiconductor switch is connected with a second signal output terminal of the dynamic control unit; and a circuit output unit having a first control terminal connected with a second terminal of the first semiconductor switch and a first terminal of the second semiconductor switch, and a second control terminal connected with a second terminal of the second semiconductor switch and a third signal output terminal of the dynamic control unit.
US11437990B2 Generating high dynamic voltage boost
Devices, systems, and methods are provided for generating a high, dynamic voltage boost. An integrated circuit (IC) includes a driving circuit having a first stage and a second stage. The driving circuit is configured to provide an overdrive voltage. The IC also includes a charge pump circuit coupled between the first stage and the second stage. The charge pump circuit is configured generate a dynamic voltage greater than the overdrive voltage. The IC also includes a bootstrap circuit coupled to the charge pump circuit, configured to further dynamically boost the overdrive voltage of the driving circuit.
US11437986B2 Gate voltage magnitude compensation equalization method and circuit for series operation of power switch transistors
A gate voltage magnitude compensation equalization method and circuit for series operation of power switch transistors are provided. A dynamic voltage equalization of series-connected power switch transistors is implemented by using sampling principles where voltages of the power switch transistors are controlled by gate voltage magnitude and unbalanced voltage differentials are converted into unbalanced current differentials of buffer currents. The gate voltage magnitude compensation equalization method and circuit relates to differential control and works in a dynamic voltage change process of the series-connected power switch transistors, without having a negative effect on operation of the power switch transistors under normal operating conditions. Only adopting passive devices, the gate voltage magnitude compensation equalization circuit has a simple structure, is easy to integrate on a device drive board, implements response tracking of unbalanced voltage and voltage equalization of the series-connected power switch transistors, and improve speedability and stability of voltage equalization control.
US11437985B1 Duty cycle correction circuit
A duty cycle correction circuit (DCCC) for a multi-modulus frequency divider, the DCCC comprising: a corrector chain comprising a plurality of flip-flops each configured to receive one of the internal signals; and at least one delay selection logic element, each configured to receive an output signal from different ones of the flip-flops and the output of each delay selection logic element is based on the received output signal and the division factor; the DCCC is configured such that: a first state change in its output signal is defined by a transition to a first logic state of one of the internal signals; and a second state change in its output signal is based on a transition to a second logic state of one of the internal signals after a delay period, wherein the duty cycle of the output signal is based on the delay period.
US11437984B2 Delay circuit
Delay circuit includes: first to fourth transistors; capacitor; constant current source; and resistor. The first transistor has a gate connected to an input terminal, a source connected to the first power supply terminal, and a drain. The second transistor has a gate connected to an input terminal and the gate of the first transistor, a drain connected to the drain of the first transistor and the second terminal of the capacitor, and a source. The third transistor has a gate connected to a node between the drain of the first transistor, the drain of the second transistor, and the second terminal of the capacitor, a source connected to the second power supply terminal, and a drain. The fourth transistor has a gate connected to the node and the gate of the third transistor, a drain connected to the drain of the third transistor and an output terminal, and a source.
US11437983B2 Circuit for suppressing electromagnetic interference
A circuit for suppressing electromagnetic interference signal on power lines. The circuit includes a first sensing circuit, a first amplifier, and a first controlled signal source. The first sensing circuit is arranged to sense a first electromagnetic interference signal. The first amplifier is arranged to be powered by a power source. The first amplifier provides a first amplification factor and being operably connected with the first sensing circuit to amplify a signal sensed by the first sensing circuit. The first controlled signal source provides a second amplification factor and is operably connected with the first amplifier to regulate or further amplify the amplified signal to provide a first suppression signal that reduces the first electromagnetic interference signal. Multiple such circuits can be cascaded to form a mufti-stage electromagnetic interference suppression circuit.
US11437981B1 Temperature compensated auto tunable frequency locked loop oscillator
A temperature compensated, auto tunable, frequency locked loop oscillator includes, in one embodiment, an oscillator configured to generate a clock-signal with a frequency fclk based on a control voltage vc, and a frequency-to-voltage (f/v) converter coupled to the oscillator, which is configured to generate a first voltage vfb with a magnitude based on frequency fclk. A controller is also included and coupled between the oscillator and the f/v converter. The controller is configured to control the magnitude of the control voltage vc based on the first voltage vfb.
US11437980B2 Frequency to digital converter, asynchronous phase sampler and digitally controlled oscillator methods
A ΔΣ frequency to digital converter includes digital feedback to an accumulator in a ring phase calculator that provides the converter output, which reduces implantation complexity. Digital gain correction is applicable to dual mode ring oscillator converters and charge pump converters, provides compensation for forward path gain error and eliminates the need to include analog gain correction in feedback. Asynchronous sampling includes correction logic to compensate for arbitrary initial conditions. A digitally-controlled oscillator (DCO) control technique causes the DCO frequency to increase or decrease by changing the state of one its frequency control elements at a time.
US11437978B2 Multiplexer, high-frequency front-end circuit, and communication device
A multiplexer includes a common terminal, a first acoustic wave filter having a first frequency band as a pass band, and having a first input/output terminal connected to the common terminal, a second acoustic wave filter having a second frequency band higher than the first frequency band as a pass band, and having a second input/output terminal connected to the common terminal, an inductance element, and a first capacitance element. The first acoustic wave filter has a parallel resonator of which one end is connected to the first input/output terminal and another end is connected to a ground electrode, and the first input/output terminal is connected to the common terminal via the inductance element, and the first capacitance element is connected between a signal path between the one end of the parallel resonator and the inductance element, and a ground electrode.
US11437972B2 Ultra-broad bandwidth matching technique
A multicomponent network may be added to a transmission line in a high-frequency circuit to transform a first impedance of a downstream circuit element to second impedance that better matches the impedance of an upstream circuit element. The multicomponent network may be added at a distance more than one-quarter wavelength from the downstream circuit element, and can tighten a frequency response of the impedance-transforming circuit to maintain low Q values and low VSWR values over a broad range of frequencies.
US11437971B2 Wideband reconfigurable impedance matching network
Embodiments relate to a transformer-based impedance matching network that may dynamically change its characteristic impedance by engaging different inductor branches on a primary side and optionally, on the secondary side. A primary side transformer circuit includes a primary inductor (311) and secondary inductor (321) configured to provide impedance matching over a first frequency band. One or more additional inductor branches (314A, 314B, are switchably coupled to either or both of the primary and secondary inductors to modify the impedance matching characteristics over additional operating frequencies. One or more LC filter branches (321, 322, 326, 327, 336, 330) can be included at the output of the secondary side to filter harmonic frequencies in each of the operating frequency bands.
US11437968B2 Guitar amplifier and control method of guitar amplifier
A guitar amplifier and a control method of a guitar amplifier in which a setting of a performance mode can be easily changed without an interruption to a sound is provided. The guitar amplifier, which performs musical sound processing on an input musical sound and outputs it, includes a storage device which stores a plurality of information sets including a set value for each of one or two or more types of musical sound processing used in a performance mode, and a control device which changes the setting of the one or two or more types of musical sound processing to a setting according to a set value of a selected information set when information indicating ON of the performance mode, to which the selected information set from the plurality of information sets has been applied, is input.
US11437967B2 Information handling system dynamic speaker volume
An information handling system housing forms an audio chamber within which a speaker generates audible noise based upon audible information. An adaptive material, such as an electroactive polymer, is disposed at an opening formed in the audio chamber to selectively expand to increase the audio chamber size and contract to decrease the audio chamber size. An increased audio chamber volume enhances audible noise, such as music or audio associated with audiovisual content. A decrease audio chamber can improve airflow within the housing, such as during times of thermal stress.
US11437964B2 Transceiver module
A transceiver module according to an embodiment of the present disclosure includes a power amplifier, a first transformer, a low-noise amplifier, and a second transformer. The power amplifier amplifies a transmission signal for outputting to an antenna terminal. The first transformer includes a first winding and a second winding. The first winding is connected to the antenna terminal, and the second winding is connected to an output side of the power amplifier. The low-noise amplifier amplifies a reception signal inputted through the antenna terminal. The second transformer includes the first winding and a third winding connected to an input side of the low-noise amplifier.
US11437961B2 Programmable chopping architecture to reduce offset in an analog front end
An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.
US11437960B2 Average power tracking power amplifier apparatus
An average power tracking (APT) power amplifier apparatus is provided. In a non-limiting example, the APT power amplifier apparatus includes multiple sets of power amplifier circuits configured to amplify a radio frequency (RF) signal(s) for transmission in different polarizations (e.g., vertical and horizontal). In examples disclosed herein, the APT power amplifier apparatus can be configured to employ a single power management integrated circuit (PMIC) to provide an APT voltage to all of the power amplifier circuits for amplifying the RF signal(s). By employing a single PMIC in the APT power amplifier apparatus, it is possible to reduce footprint, power consumption, and costs of the APT power amplifier apparatus.
US11437954B2 Press and a construction comprising a press
Disclosed is a press including a press part, at least two upper levers and at least two lower levers and a telescopic arm arranged to be moved between a shortened and an extended position by way of an actuator. The upper levers and the lower levers have ends arranged to rotate around a point of rotation. Also disclosed is a construction.
US11437952B2 Composition roof accessory mount
A mount for use over a roof flashing on a composition roof. The mount includes a central aperture for a fastener, a top surface with a horizontal platform extending laterally from the top surface, and a conical inner surface to cooperate with a conical protrusion on the roof flashing.
US11437948B2 Modular sustainable power generation unit
Apparatus and methods for generating electricity and maintaining data are described. A unit has multiple solar panels and a set of hinges into which additional hardware may be added. Rotatable hinges allow rotatable solar panels to move between open, partial open and closed configurations of the unit. For a closed configuration, each rotatable hinge holds each solar panel relative to one another in the approximate cubic shape. A set of hinges may be a set of removeable rods and sleeves. In a further feature, electronics positioned within a solar unit are protected and electromagnetically shielded. A switch controls a security state of the solar unit that varies depending on whether the solar unit is in an open, partial open or closed configuration. The security state may include the type of external communication and access permitted. Skate or skateboard assemblies provide greater mobility.
US11437946B2 Motor output stabilizing circuit and method
A motor output stabilizing circuit and a method are provided. A sensor senses a positive voltage and a negative voltage that are generated with a change in magnetic field strength of a motor of which a rotor is rotating. A comparator compares the positive voltage with the negative voltage to output a Hall signal. An average counter records a first time during which the positive voltage is higher than the negative voltage and a second time during which the negative voltage is higher than the positive voltage, according to the Hall signal. The average counter then averages the first time and the second time to output an averaged time signal. A motor controller circuit controls a motor driver circuit to drive the motor according to the averaged time signal, such that the motor outputs a constant current.
US11437944B2 Power conversion device
A power conversion device includes a harmonic voltage generation unit that superimposes dc-axis and qc-axis harmonic voltages on dc-axis and qc-axis voltage commands in accordance with a switching signal; and an inductance estimation unit that estimates dc-axis inductance and qc-axis inductance on a basis of dc-axis and qc-axis harmonic currents, amplitude values of the harmonic voltages, and the switching signal.
US11437943B2 Method and circuit assembly for the resonance damping of stepper motors
A method and a circuit arrangement for damping stepper motor resonances during operation of a stepper motor, in particular in the medium and high speed range, is described, wherein the coils of the stepper motor are each connected into a bridge circuit comprising semiconductor switches, in order to impress into the coils a predetermined target coil current. The resonance damping is achieved by activating a passive FD-phase in the zero crossing of the target coil current, during which all semiconductor switches are opened or switched blocking, in order to thereby feed a coil current flowing in the related motor coil back into the supply voltage source either via inverse or body diodes and/or via diodes connected in parallel to the semiconductor switches in the reverse direction between the positive supply voltage and ground potential.
US11437939B2 Control of electric motors
A control system for a multiphase electric motor comprises processing means arranged to determine a pattern of PWM voltage waveforms to be applied to respective phases of the motor, the processing means assigning different PWM patterns for use with different motor positions. In use for a given rotational position of the motor the processing means is normally adapted to apply PWM waveforms according to the assigned PWM pattern unless a different PWM pattern is currently in use at that time, except that in the event that the demanded voltage waveforms cannot be achieved with the current PWM pattern the processing means is adapted to force the PWM pattern to change. Upon the rotor moving into a different position associated with a different assigned pattern the processing means forces the PWM pattern to change to the assigned PWM pattern.
US11437937B2 Control circuit and dishwasher comprising the same
A control circuit includes: a converter configured to convert alternating current (AC) power into direct current (DC) power, an inverter configured to generate driving power of at least one motor using the converted DC power, and a first core formed by winding a coil by a number of windings determined in correspondence with an impedance of the at least one motor. The number of windings is determined such that an impedance of the first core is inversely proportional to the impedance of the at least one motor and a driving power line for driving the at least one motor passes through a center of the first core.
US11437936B2 Outdoor power equipment with distributed motor controllers
An outdoor power equipment includes multiple motors and a controller module. The motors include a first motor and a second motor. The first motor is structured to operate a first component of the outdoor power equipment and the second motor is structured to operate a second component of the outdoor power equipment. The controller module includes multiple motor controllers structured to communicate via a network communication bus with each other and operate the first motor and the second motor to operate the first component and the second component based on the communication via the network communication bus.
US11437935B2 High efficiency transducer driver
A method may include controlling commutation of a plurality of switches of an output stage comprising the plurality of switches in order to transfer charge between an energy storage device and a load to generate an output voltage across the load as an amplified version of an input signal, wherein the load comprises capacitive energy storage and controlling the power converter in order to regulate a cumulative electrical energy present in the system at an energy target, wherein the power converter is configured to transfer electrical energy from a source of electrical energy coupled to an input of the power converter to the energy storage device coupled to the output of the power converter and configured to store the electrical energy transferred from the source of electrical energy.
US11437933B2 Vibration wave motor and electronic apparatus having an electrical-mechanical energy conversion element
A vibration wave motor includes a vibrator including an electrical-mechanical energy conversion element and an elastic member, a contact member in contact with the elastic member, and a supporting member that supports the vibrator, wherein the supporting member supports an outer periphery portion of the vibrator so as to be movable along a direction in which the vibrator is pressed toward the contact member, and selectively supports a node of a vibration of the vibrator.
US11437932B2 Power generation body
A power generation body includes a first member, a second member, and a cushioning material. The first member includes a first insulating film that forms a first surface. The second member includes a second insulating film that forms a second surface that opposes the first surface and comes into contact with the first surface. The cushioning material is arranged on a side opposite to the first surface of the first member. The first member and the second member are configured such that a real contact surface area between the first surface and the second surface area changes according to pressure applied to the first member and the second member, and one of the first insulating film and the second insulating film is positively charged and the other is negatively charged due to the real contact surface area changing.
US11437930B2 Inverter control device
It provides an inverter main circuit converting a DC-voltage into three-phase AC-voltages, a DC-current detection unit detecting the DC-current value of a DC-current flowing in the main circuit, and an inverter control unit generating a drive signal for controlling operation of the main circuit using a voltage command value corresponding to each phase of the three-phase AC-voltages and a triangular-wave carrier. Using a time period during which the triangular-wave carrier monotonically increases or decreases as a unit period, the control unit provides control to alternately use, as the DC-current value for use in computation of the voltage command value, the DC-current value detected in the unit period in which the triangular-wave carrier monotonically increases and the DC-current value detected in the unit period in which the triangular-wave carrier monotonically decreases, for every voltage command value control period set to three times or more and an integer multiple of the unit period.
US11437926B2 Method for operating a controllable electrical device, and assembly having the controllable electrical device
A method for operating a controllable electrical device connected by a data link to a control device for controlling the electrical device, includes using the electrical device to exchange electrical power with a connected electrical grid and using an environmental sensor for collecting environmental information. The control device transmits control signals to the electrical device over the data link. The electrical device assumes a first or a second operating state depending on the control signals transmitted. The electrical device exchanges energy with the electrical grid in the first operating state and the electrical device does not exchange energy with the electrical grid in the second operating state. Environmental information collected by the environmental sensor is transmitted over the data link to the control device only when the electrical device is in the second operating state. An assembly for carrying out the method is also provided.
US11437925B2 Green bridge circuit for adjusting direct current power source and alternating current power source
A green bridge circuit for adjusting a DC power source and an AC power source is provided. The green bridge circuit includes a bridge circuit and a bias adjustment circuit. The bridge circuit includes four transistors connected to a first power terminal, a system load, and a second power terminal. The bias adjustment circuit has an input terminal coupled to an output terminal of the bridge circuit and an output terminal coupled to control terminals of the transistors. The bias adjustment circuit changes bias voltages of the control terminals of the transistors according to a rectified voltage outputted by the bridge circuit. In this way, loss is reduced, heat generation is prevented, and transmission loss is addressed.
US11437922B2 Printed circuit board power cell
A printed circuit board power cell having a printed circuit board including a DC bus disposed within the printed circuit board. The printed circuit board power cell includes a plurality of capacitors connected to the DC bus, a three-phase AC input disposed on the printed circuit board and a single-phase AC output disposed on the printed circuit board. The printed circuit board power cell also includes a power module connected to the DC bus, the three-phase AC input and the single-phase AC output, wherein the power module receives three phase AC input power via the three-phase AC input and responsively outputs a single-phase AC power via the single-phase AC output.
US11437918B2 LLC resonant converter
An LLC resonant converter is provided, which includes an input power source, a full-bridge switch circuit, a resonant circuit, a transformer, a rectifier circuit, a load, and a control circuit. The control circuit includes a load detection circuit and a valley switching circuit. The load detection circuit detects a load state of the load. The valley switching circuit is configured to, in response to the load state being a light load state: correspondingly generate a first difference voltage; calculate a first switch on-time for a first switch and a fourth switch; generate switching signals that control the first switch and the fourth switch to be turned off, and detect voltage valleys of a second switch and a third switch; and generate the switching signals to control the second switch and the third switch to be turned on according to the calculated first switch on-time.
US11437916B2 Adaptive zero voltage switching control
A flyback converter is disclosed that includes an auxiliary switch controller that adaptively controls the auxiliary switch for improved zero voltage switching. The auxiliary switch control adaptively adjusts the auxiliary switch on-time period responsive to a transformer reset time for the flyback converter, a resonant oscillation period for a power switch terminal voltage for a power switch transistor, and an on-time period for the power switch transistor to provide the improved zero voltage switching.
US11437912B2 DC-DC converter and display device having the same
A DC-DC converter including a first power supply including a first converter outputting a first power voltage, a first sensor detecting a panel current from an output of the first converter; and a first output group including a plurality of inverting converters outputting a second power voltage based on the panel current; a second power supply including a second converter outputting the first power voltage, and a second output group including a plurality of inverting converters outputting the second power voltage based on the panel current; and a first phase controller controlling operations of the inverting converters included in each of the first and second output groups based on the detected panel current. The second power supply operates when the panel current exceeds a predetermined enable value.
US11437911B2 Variable drive strength in response to a power converter operating condition
A controller for a power converter comprising a drive signal generator and drive strength control and a variable strength multi-stage gate driver. The drive signal generator and drive strength control outputs a drive signal to control switching of a power switch and a strength signal to control drive strength of the power switch. The variable strength multi-stage gate driver is configured to turn ON the power switch in response to the drive signal with a first drive strength then a second drive strength when the strength signal is not asserted. The variable strength multi-stage gate driver is configured to turn ON the power switch in response to the drive signal with a third drive strength then the second drive strength when the strength signal is asserted. The second drive strength is stronger than the first drive strength and the first drive strength is stronger than the third drive strength.
US11437907B2 Charge pump architecture
Disclosed herein is a charge pump architecture in which boosting capacitors of adjacent stages are connected only by NMOS type transistors and comprising a first stage receiving a first voltage and outputting an internal voltage; a second stage receiving the internal voltage and outputting a second voltage at an output terminal, and an auxiliary stage connected to the output terminal, the first stage and second stage including a first type of MOS transistors transferring the voltage from input node internal boosting nodes and being cross-coupled; a second type of MOS transistors with their gate biased by a third type of MOS transistors and fourth type of MOS transistors; the third type of MOS transistors connecting the gate of the second type of MOS transistors; and the fourth type of MOS transistors connecting the gate of the second type of MOS transistors.
US11437900B2 Modular outer-rotor brushless motor for a power tool
An outer-rotor brushless direct-current (BLDC) motor is provided including a stator core having an aperture extending therethrough, a stator mount including an elongated cylindrical member projecting into the aperture of the stator core, an outer rotor, and a rotor mount including an outer rim arranged to couple to the outer rotor and an inner body supporting an outer race of a motor bearing. A piloting pin is provided including a rear portion received within the hollow portion of the elongated cylindrical member of the stator mount and a front portion received within the inner race of the motor bearing.
US11437898B2 Brushless direct current motor with dual stators
A brushless direct current motor including a rotor, a first stator disposed adjacent the rotor, and a second stator disposed adjacent the rotor. The first stator is configured to selectively cause a rotational movement of the rotor during normal operation of the motor, and the second stator is configured to selectively maintain a stationary position of the rotor against a force exerted by an external source.
US11437897B2 Surface treatments of electrical steel core devices
An electric machine includes a plurality of planar laminations stacked to form an electrical steel rotor having openings defining magnet pockets and adjacent inner side pockets. The adjacent inner side pockets define a center bridge therebetween and have blasted surface portions such that compressive stress layers are induced along edges of the center bridge to strengthen the center bridge.
US11437895B2 Power systems
The invention relates to a power system that includes an electrical machine, (e.g., a motor or generator). The electrical machine has a stator with a stator winding connected to a power converter. The power system includes an assembly to reduce, and optionally eliminate, common mode currents between the electrical machine and the power converter. The assembly includes a stator frame connected to ground potential and an electrical insulator (e.g., a plurality of stator mounts) located between the stator frame and the stator.
US11437894B2 Touch sensor unit
The disclosure improves the flexibility of arrangement of a separator provided at an end of a touch sensor unit to ensure electrical insulation. A sensor body included in a touch sensor unit includes a tubular insulator that is elastically deformed when an external force is applied; linear electrodes that are provided inside the tubular insulator and come into contact with each other as the tubular insulator is elastically deformed; a resistor disposed on an outer side of an end of the tubular insulator; connection wires connecting the linear electrodes and the resistor; a separator interposed between the connection wires and preventing contact between the connection wires; a mold part including at least the connection wires, the resistor, and the separator; and a cover member covering at least a part of the connection wires, the resistor, and the separator via the mold part.
US11437893B2 Planar-drive system, stator module and sensor module
A planar-drive system includes a rotor and stator module with a housing, a stator assembly for driving the rotor, and a sensor module for detecting the rotor position. The sensor module has a 2D arrangement of magnetic-field sensors arranged on a carrier in first and second periodic grids, extending in first and second directions. Adjacent magnetic-field sensors are arranged at first and second distances in the first and second directions. The grids are shifted by a vector having first and second components smaller than the respective first and a second distances. The rotor has first and second magnet units, each with an arrangement of magnets with first and second periodic lengths aligned in the first and second directions. The first and second components of the vector, and a difference between the first and second distances and the respective components, are each smaller than the respective first and second periodic lengths.
US11437888B2 Medium conveying and heat exchange device and vortex flow separator for iron core in electromagnetic device
A medium conveying and heat exchange device and a vortex flow separator for an iron core of an electromagnetic device is provided. The vortex flow separator includes a jet pipe and a vortex flow separation pipe, the vortex flow separation pipe includes a vortex flow chamber, a cold end pipe section and a hot end pipe section. Compressed airflow flows through the jet pipe to form spiral airflow and flow into the vortex flow chamber in a tangential direction thereof. A valve having a cone-shaped surface is arranged inside the hot end pipe section, central airflow of the spiral airflow passes by the cone-shaped surface of the valve and flows back, and is cooled to become cold airflow, and then flows out from the cold end pipe section, to serve as cooling and drying airflow of the input electromagnetic device.
US11437882B2 Motor-driven compressor and method of assembling motor-driven compressor
The cluster block accommodates connection terminals and has conductive member insertion holes, into which the conductive members are inserted. The cluster block is disposed between the bottom wall of the housing and second coil ends. The conductive member insertion holes are located on the radially outer side of the inner circumferential surface of the stator core. The cluster block includes a second wall portion in the vicinity of the electric motor and a first wall in the vicinity of the bottom wall of the housing. The second wall portion has a pressed surface on the radially inner side of the inner circumferential surface of the stator core. The outer surface of the first wall portion has a contact surface that is lined up with the pressed surface in the axial direction of the stator core. The contact surface is allowed to contact the bottom wall of the housing.
US11437877B2 Rotor, motor, compressor, and air conditioner
A rotor includes a rotor core formed of a stacked body in which two or more first electromagnetic steel sheets and a second electromagnetic steel sheet are stacked in a direction of an axis, the rotor core having a magnet insertion hole passing through the stacked body in the direction of the axis, and a first permanent magnet and a second permanent magnet disposed in the magnet insertion hole. The magnet insertion hole has a first region in which the first permanent magnet is inserted, and a second region in which the second permanent magnet is inserted. Each of the two or more first electromagnetic steel sheets has a bridge dividing the magnet insertion hole into the first region and the second region. The second electromagnetic steel sheet has the magnet insertion hole in which the first region and the second region are formed continuously with each other.
US11437872B2 Electric machine with stator segments and winding supports
An electric machine includes an annular stator and a rotor disposed within the stator. The stator has a plurality of stator segments in the circumferential direction and a stator winding applied to a winding support. Each stator segment has lateral cutouts in the circumferential direction. In each case a winding support having a toroidally applied stator winding is introduced into lateral cutouts, which are adjacent in the circumferential direction, of adjacent stator segments. The radial outer side of the stator winding is partially surrounded by stator segment outer arms of mutually adjacent stator segments in such a way that a radially directed outer gap is formed between the stator segment outer arms of the two mutually adjacent stator segments.
US11437867B2 Systems and methods for wireless power and data transfer utilizing multiple antenna receivers
A wireless receiver system, configured to receive both electrical data signals and electrical energy, includes a first receiver antenna, configured to receive one or both of the electrical data signals and the electrical energy, and a power conditioning system in electrical connection with the first receiver antenna, configured to receive electrical energy from the first receiver antenna. The wireless receiver system further includes a second receiver antenna configured to receive the electrical data signals and a receiver controller operatively associated with the first receiver antenna and the second receiver antenna and configured to determine switching instructions. The wireless receiver system further includes a switch operatively associated with the receiver controller and configured to switch receiving operations between the first and second receiver antennas based, at least in part, on the switching instructions.
US11437865B2 Wireless charging system, wireless charging method, and device to-be-charged
A wireless charging system, a wireless charging method, and a device to-be-charged are provided. The wireless charging system includes a wireless charging device and a device to-be-charged. The wireless charging device is configured to conduct wireless communication with the device to-be-charged through communication control circuits to adjust a transmission power of the wireless charging device. In addition, the device to-be-charged has a step-down circuit.
US11437863B2 Power transmission apparatus, power reception apparatus, method for controlling wireless power transmission system, and storage medium
A wireless power transmission system wirelessly transmits power from a power transmission apparatus to a power reception apparatus. The system performs detection processing using a first detection method for detecting an object different from the power reception apparatus. The system determines whether a predetermined condition related to a state of at least either one of the power transmission apparatus and the power reception apparatus is satisfied. Then, the system performs object detection processing using a second detection method, different from the first detection method, according to a result of the determination regarding whether the predetermined condition is satisfied.
US11437861B2 Test object holder
A testing assembly comprising a test object and a test object holder. The test object holder includes a body with an aperture defined therethrough. The test object is located in the aperture and an adhesive sheet is positioned over the aperture and the test object to retain the test object in place during testing.
US11437860B2 Wireless charging device using multi-coil
The present disclosure provides a wireless charging device in which multiple coils are overlapped with one another on separated cores. According to an embodiment of the present disclosure, the wireless charging device includes two flat cores spaced apart from each other, and a first layer coil to a fourth layer coil disposed above the two plate cores and disposed on different layers from one another and overlapped with one another, so that the multiple cores are overlapped with one another on the separated cores.
US11437859B2 Wireless power transmission based on pre-matched filtering
A method of focused wireless power transmission is disclosed which includes generating a map for electromagnetic fingerprints at N locations within an environment of interest, including a transmitter and plurality of receivers each located at one of the N locations, transmitting pre-matched signals based on the electromagnetic fingerprints in a predetermined order for a first location of the N location, measuring response at each of the N locations, measuring spatial correlations between all other locations and the first location, and evaluating electromagnetic power focus at each of the N locations by comparing the measured spatial correlations.
US11437857B2 Wireless power transmission apparatus and wireless power transmission system
A wireless power transmission apparatus includes a power transmission coil that transmits electric power; a power transmission-side resonant capacitor that is connected to the power transmission coil and that, with the power transmission coil, forms a power transmission-side resonance circuit; and a self-oscillation circuit that converts a DC voltage to an AC voltage, and that supplies the AC voltage to the power transmission coil. The wireless power transmission apparatus has a state, during power transmission, in which multiple resonance points exist in a combined resonance circuit formed by magnetic coupling of the power transmission-side resonance circuit with a power reception-side resonance circuit formed from a power reception coil and a power reception-side resonant capacitor. In the state, the self-oscillation circuit operates at the highest frequency among the multiple resonance points.
US11437856B2 Wireless power transmitters and associated base stations for through-structure charging
A power transmitter for wireless power transfer at an operating frequency selected from a range of about 87 kilohertz (kHz) to about 360 kHz is disclosed. The power transmitter includes a control and communications unit and an inverter circuit configured to receive input power and convert the input power to a power signal. The power transmitter further includes a coil configured to transmit the power signal to a power receiver, the coil formed of wound Litz wire and including at least one layer. The power transmitter further includes a shielding comprising a magnetic backing and a magnetic wall, the magnetic wall and magnetic backing defining a cavity, the magnetic wall including a top surface, the cavity extending, at least, from the magnetic backing to the coil, the coil positioned proximate to the top surface.
US11437855B2 Wireless power transfer pad with multiple windings and magnetic pathway between windings
A wireless power transfer (“WPT”) pad apparatus includes a first winding adjacent to the ferrite structure, where the first winding is arranged in a spiral-type pattern, and a second winding adjacent to the ferrite structure. The second winding is arranged in a spiral-type pattern and the second winding wound interleaved to the first winding. The first and second windings are arranged to compensate for a difference in length between the first winding and the second winding for portions of the first and second windings wound adjacent to each other.
US11437851B2 Plated copper conductor structures for wireless charging system and manufacture thereof
A conductive structure is fabricated on a substrate (either flexible or rigid) by first printing a precursor seed layer of a conductive ink, then electroplating a highly conductive metal such as Cu or Ag onto the precursor. The plated layer has a conductivity approaching that of the bulk metal. To improve the uniformity of plating, an intervening layer of electroless metal may be deposited onto the precursor prior to electroplating. The structure may be used for applications such as coils used in a wireless power transfer system.
US11437845B2 LED light
The present disclosure provides an LED straight light including a light tube with two pins at both ends, an LED installed in the light tube and a driving circuit. The driving circuit includes a mains branch and a signal branch. The mains branch is coupled to the pins at one end of the light tube for transmitting power to the LED for power supply. The signal branch is coupled to the pins at the other end of the light tube for transmitting external driving signals to control the on/off of the mains branch. The LED straight light of the present disclosure is powered by two ends, one of the two ends supplies power to the LED through the mains branch, and the other end receives driving signals to control the on/off of the mains branch.
US11437843B2 Under-floor charging station
An under-floor charging station can be mounted under a floor such that a top plate of the under-floor charging station is substantially flush with a top surface of the floor without touching the ground. Openings in the top plate allow charging elements to extend when in use to charge a mobile robot, and to retract under the floor when not in use. The retractable charging elements prevent tripping hazards and allow the mobile robot to move freely throughout a clean room. Moreover, because the charging elements can be retracted in an unobtrusive position when the under-floor charging station is not in use, the under-floor charging station is permitted to be positioned in locations in the clean room that allow the mobile robot to continue working while charging and/or allow non-stop running of the mobile robot.
US11437840B2 Battery control system
In the battery control system pertaining to the present invention, one antenna is provided for each cell controller or each group of cell controllers. A battery controller switches between antennas by using a switch and performs wireless communication with each cell controller or each group of cell controllers. Hence, even if the number of cell controllers increases, a countermeasure can be taken by adding antennas and changing switches, and an increase in the number of battery controllers can be suppressed.
US11437839B2 Method of controlling charging of plurality of batteries and electronic device to which the method is applied
An electronic device is provided. The electronic device includes a housing, a first battery and a second battery arranged in the housing, a power management module, a first temperature sensor, a second temperature sensor, a first current limiting integrated circuit (IC) configured to limit a maximum intensity of a first current flowing into the first battery, a second current limiting IC configured to limit a maximum intensity of a second current flowing into the second battery, and a processor. The processor may determine whether the first temperature or the second temperature is outside a specified temperature range and, when the first temperature is outside of the specified temperature range, control the first current limiting IC to reduce a magnitude of the first current.
US11437838B2 Battery charging control method and apparatus, battery management system, and medium
The present application provides a battery charging control method and apparatus, a battery management system, and a medium. The method includes: obtaining, based on a received charging request, a threshold value and an initial value of a charging parameter of a battery, wherein the threshold value of the charging parameter is determined based on an actual capacity value of the battery and an accumulated mileage of an electric vehicle where the battery is located; sending, under a condition that the initial value of the charging parameter is less than the threshold value of the charging parameter, a control command of charging the battery, so as to charge the battery; obtaining a value of the charging parameter of the battery in real time during the charging of the battery; sending a control command of stopping charging the battery, so as to stop charging.
US11437837B2 Starting battery driving system and external system off-state recognition method using same
The present invention relates to a voltage recognition system of a starting battery and a method of recognizing an off state of an external system using the same, and more particularly, to a driving system of a starting battery and a method of recognizing an off state of an external system using the same, which make it possible to start an engine next time by recognizing the off state of the external system in an overvoltage state according to whether there occurs a difference between values of voltages measured by two ADCs having different positions of ground GND without requiring a current sensor.
US11437836B2 Battery device
A battery device includes a power storage unit, a signal input unit to which a security signal is input, and a switching unit that enables or disables an electrical connection of the power storage unit to an electric power input/output terminal according to a signal input to the signal input unit, and when a release signal that is one type of the security signal is input to the signal input unit, the switching unit enables an electrical connection of the power storage unit to the electric power input/output terminal.
US11437834B2 Storage battery apparatus with current cutoff control
An apparatus according to one embodiment includes a positive and a negative electrode terminals; modules each including an assembled battery and a CMU, the assembled battery including cells, the CMU to detect a voltage and a temperature of the assembled battery; a main circuit for electrical connection between terminals of the modules and the positive and negative electrode terminals; a BMU to receive information about the voltage and the temperature from the respective CMU; a supply circuit to convert DC power from the main circuit and supply the converted power to the BMU; a breaker for interrupting the main circuit; and a circuit to block a current flowing through the main circuit in a direction of charging the modules, in response to a stop of a control signal from the BMU.
US11437828B2 Equalization circuit and power storage system
An equalization circuit includes a cell selection circuit that is provided between n cells and an inductor, and that can electrically connect both ends of any cell of the n cells to both ends of the inductor. An energy holding-consuming circuit can form a closed loop including the inductor when the cell selection circuit does not select any cell. The energy holding-consuming circuit also can form a closed loop of a first pattern with a small resistance component of the closed loop and a closed loop of a second pattern with a large resistance component of the closed loop.
US11437825B2 Hybrid renewable power plant
A renewable power plant configured to deliver electrical power to an electrical grid in accordance with a reference is disclosed. The renewable power plant comprises at least one energy generating system of a first type, at least one energy generating system of a second type, and a control system including a central power plant controller (CPPC) which generates setpoints for controlling the energy generating systems in accordance with the reference. The energy generating systems provide feedback signals to the CPPC. The control system is configured to generate a modified feedback signal based on the feedback signal received from the energy generating systems of the second type, and using a model representing operational behavior of the energy generating systems of the second type. The CPPC is configured to apply the modified feedback signal to a feedback control loop for controlling the energy generating systems.
US11437824B2 Scalable hierarchical energy distribution grid utilizing homogeneous control logic
Techniques are disclosed for implementing a scalable hierarchical energy distribution grid utilizing homogeneous control logic are disclosed that provide distributed, autonomous control of a multitude of sites in an energy system using abstraction and aggregation techniques. A hierarchical energy distribution grid utilizing homogeneous control logic is provided that includes multiple control modules arranged in a hierarchy. Each control module can implement a same energy optimization scheme logic to directly control site energy resources and possibly energy resources of sites associated with control modules existing below it in the hierarchy. Each control module can act autonomously through use a similar set of input values to the common optimization scheme logic.
US11437817B2 Method and device for driving an electricity production assembly, and associated production assembly
A method for driving an electricity production assembly includes an electricity production system, that generates an output power, as well as an electricity storage system. The production assembly is driven, at each time-step, in such a way as to deliver a total power that is less than a maximum admissible power. The maximum admissible power is determined in such a way that the production assembly can, starting from this power, and taking account of a stored energy in the storage system at the considered time-step, progressively reach, with a moderate slope, a minimum anticipated power, which is representative of the worst downward variation expected for the output power in case of degradations in meteorological conditions.
US11437814B2 State retention load control system
A device may detect a power removal event, determine whether the power removal event is a local power removal event or a system power removal event, and perform state correction. For example, the device may receive an indication of a state change event turning on the lighting device. The indication may be received from a sensor. For example, the sensor may include a photosensing circuit (e.g., capable of detecting light emission from the lighting device) or the sensor may include a live voltage sensor (e.g., capable of detecting a change in current driven to the lighting device). The device may then determine whether the power removal event is a system power removal event or a local power removal event. If the device determines that the power removal event is a system power removal event, the device may perform state correction (e.g., setting the lighting device to its state prior to the power removal event).
US11437811B2 Electronic device
The disclosure relates to an electronic device including a circuit board; a housing; and an antenna, wherein the antenna and the circuit board are fixed inside the housing, wherein the circuit board comprises a first electrostatic protection circuit and a protected circuit, wherein the antenna is electrically connected to a first end of the first electrostatic protection circuit, and electrically connected to a first end of the protected circuit, wherein a second end of the first electrostatic protection circuit is electrically connected to a first ground point, a second end of the protected circuit is electrically connected to a second ground point, and the first electrostatic protection circuit is connected in parallel with the protected circuit, and wherein a trace distance between the second end of the first electrostatic protection circuit and the second end of the protected circuit is less than a first threshold, to reduce parasitic inductance.
US11437810B2 Systems and methods to suppress AC transient voltage and for AC powerline polarity reversal detection and alarm
A transient voltage suppressor (“TVS”) device includes a housing. Three prongs extend from the first end and are adapted for electrically connecting to an alternating current power source receptacle. Three recessed contacts extend into the second end of the housing for receiving three prongs from a power connector. The three prongs and three recessed contacts are adapted to pass electrical power along a ground wire, a neutral wire, and line wire, respectively. A protection circuit includes at least one silicon avalanche suppression diode (“SAS diode”) to limit high transient voltage imposed thereon to a lower level. A notification circuit is configured to communicate a status of the TVS device and configured to notify a user of one or more of: a correct connection of the vehicle wiring with respect to the power source, an incorrect connection of the vehicle wiring with respect to the power source, or a fault.
US11437802B2 Cable management system
A cable management system. The cable management system includes a collapsible body. The cable management system also includes a mounting plate attached to the collapsible body, wherein the mounting plate is configured to attach to an external device. The cable management system further includes a faceplate attached to the collapsible body opposite the mounting plate.
US11437797B2 Bracket for electrical devices
A bracket for supporting at least one electrical device includes a first portion including a flange oriented in a first plane and at least one second portion including a leg oriented in a second plane substantially parallel to and offset from the first plane. Each second portion is configured to be coupled to the at least one electrical device.
US11437796B2 Mounting guide for placement of a gang box
A mounting rail and gang box member installation system for placing a gang box on a wall structure in a desired horizontal and/or vertical location to accommodate for construction anomalies. The mounting rail and gang box member system includes an elongate mounting rail assembly and any one of an extendable box assembly, slidable bracket assembly or a rail channel structure that in combination with a gang box member and/or mud ring member provide for flexibility in locating and mounting wiring receptacles and wiring devices on a wall structure. Finally, the installation system includes wire or cable fastening configurations that are used in combination with cable ties or zip-ties to secure wires of cables without having to use staples.
US11437790B2 Gripping cable hanger and method of using
This invention has to do with a gripping cable hanger assembly system for the solar, mining, and electrical industry. The gripping cable hanger is comprised of a support wire gripping mechanism, cable carrier supports/receptacles, data carrier wire capability, space between said wire carriers with said wire comprising a shape retention material that may have a high dielectric, UV resistant coating thereon.
US11437786B2 Polarization insensitive colorless optical devices
Embodiments of the invention describe polarization insensitive optical devices utilizing polarization sensitive components. Light comprising at least one polarization state is received, and embodiments of the invention select a first optical path for light comprising a first polarization state or a second optical path for light comprising a second polarization state orthogonal to the first polarization state. The optical paths include components to at least amplify and/or modulate light comprising the first polarization state; the second optical path includes a polarization rotator to rotate light comprising the second polarization state to the first polarization state. Embodiments of the invention further describe optical devices including a polarization mode converter to convert light comprising a first and a second polarization state to light comprising different spatial modes of the first polarization state; light comprising the different spatial modes of the first polarization state is subsequently amplified and modulated.
US11437784B2 Compact emitter design for a vertical-cavity surface-emitting laser
A surface emitting laser may include an isolation layer including a first center portion and a first plurality of outer portions extending from the first center portion, and a metal layer including a second center portion and a second plurality of outer portions extending from the second center portion. The metal layer may be formed on the isolation layer such that a first outer portion, of the second plurality of outer portions, is formed over one of the first plurality of outer portions. The surface emitting laser may include a passivation layer including a plurality of openings. An opening may be formed over the first outer portion. The surface emitting laser may include a plurality of oxidation trenches. An oxidation trench may be positioned at least partially between the first outer portion and a second outer portion of the second plurality of outer portions.
US11437779B2 Vernier effect DBR lasers incorporating integrated tuning elements
Disclosed is a Vernier effect DBR laser that has uniform laser injection current pumping along the length of the laser. The laser can include one or more tuning elements, separate from the laser injection element, and these tuning elements can be used to control the temperature or modal refractive index of one or more sections of the laser. The refractive indices of each diffraction grating can be directly controlled by temperature changes, electro optic effects, or other means through the one or more tuning elements. With direct control of the temperature and/or refractive indices of the diffraction gratings, the uniformly pumped Vernier effect DBR laser can be capable of a wider tuning range. Additionally, uniform pumping of the laser through a single electrode can reduce or eliminate interfacial reflections caused by, for example, gaps between metal contacts atop the laser ridge, which can minimize multi-mode operation and mode hopping.
US11437778B2 Wavelength tunable laser
According to an embodiment, a wavelength tunable laser comprising a gain region and a wavelength tunable area is disclosed. The wavelength tunable area comprises: a lower clad layer; a passive optical waveguide positioned on the lower clad layer; an upper clad layer positioned on the passive optical waveguide; a drive electrode positioned on the upper clad layer; a current blocking layer positioned on the drive electrode; a heater positioned on the current blocking layer; and a first insulating groove and a second insulating groove which are positioned so as to face each other with the passive optical waveguide therebetween.
US11437777B2 Method for tuning emission wavelength of laser device
A method for tuning an emission wavelength of a laser device, including: acquiring a drive condition of a wavelength tunable laser diode to make the wavelength tunable laser diode oscillate at a wavelength from a memory; driving a first thermo-cooler and a first heater based on the drive condition of the wavelength tunable laser diode; determining whether respective control values of the first thermo-cooler and the first heater are reached within a first range of target values; and driving a gain region after the control values have been reached within the first range.
US11437776B2 Light emission control device, light source device, and projection-type video display apparatus
A light emission control device includes: a first light emission control circuit outputting a first control signal and a second control signal; and a second light emission control circuit outputting a third control signal and a fourth control signal. The first light emission control circuit controls a phase of the second control signal based on a first PWM signal in a first PWM dimming mode. The second light emission control circuit controls a phase of the fourth control signal based on a second PWM signal in a second PWM dimming mode. The second light emission control circuit outputs the fourth control signal having a phase different from that of the second control signal in a first analog dimming mode and a second analog dimming mode.
US11437770B2 Electrical coupling for connecting a wind turbine to an electricity network
Coupling for connecting a wind turbine to a power grid, the coupling comprising a first support having at least one first electrical connector and a second support having at least one second electrical connector that is complementary to the first electrical connector, the first support and the second support being rotatable with respect to one another, characterized in that at least one of the connectors is movable transversely to the plane of the supports relative to the other connector in order to form and disconnect an electrical plug connection and the connectors are sealed against the penetration of moisture both when they are interconnected and when they are separated.
US11437769B2 Solenoid coil with replaceable status indicator light
Apparatus and method provide a solenoid coil having a field-replaceable status indicator light, such as an LED. The status indicator light lights up when power is supplied to the solenoid coil to indicate the coil is energized and turns off when the coil is no longer energized. This allows technicians and other personnel working in hazardous environments to easily and reliably monitor the operational status of the solenoid coil. An electrical splitter adapter splits power between the solenoid coil and the status indicator light. The splitter adapter allows the status indicator light to be removed without interrupting power to the solenoid coil. Where the power is AC power, a rectifier may be provided on the splitter adapter to convert the AC power to DC power.
US11437765B1 Snap-in electrical connector
A connector assembly including a connector body with a spring clip including a first free end for engaging a side wall of an electrical box upon installation. During insertion of the connector body the first free end engages the knock-out hole perimeter and deforms so as to permit further insertion. An alignment rib also engages the perimeter to improve continuity between the connector assembly and the electrical box.
US11437763B1 Systems and methods for an electric aircraft charging connector
An electric aircraft charging connector, including a direct current pin and/or an alternating current pin. The connector including a ground pin, the ground pin providing a grounded connection. The connector also including a resistance sensor, the resistance sensor electrically connected to the direct current pin and/or the alternating current pin, and the ground pin, the resistance sensor configured to measure a resistance datum, the resistance datum including: a first resistance, the first resistance comprising a measurement of resistance between the direct current pin and the ground pin; and a second resistance, the second resistance comprising a measurement of resistance between the alternating current pin and the ground pin. The connector also including a controller, the controller configured to: receive the resistance datum from the resistance sensor; and compare the resistance datum to a threshold resistance datum.
US11437761B2 High-current plug-in connector components and high-current plug-in connector
The present invention relates to a high-current plug-in connector component and a high-current plug-in connector. The high-current plug-in connector component comprises a plug body provided with a center hole and a cable connecting hole in an inner cavity thereof, a silver cap which is welded to an outer side of an opening of the center hole, an elastic rubber arranged in the center hole, and a preset soldering tin arranged at a bottom of an inner side of the cable connecting hole, wherein the plug is slotted into three to six petals so that the plug is expanded to form an expansion plug; a head of the high-current plug-in connector component and a heel part of the plug are in a plugging engagement with a socket component of a corresponding plug-in connector, so that the high-current plug-in connector component is in electrical contact with corresponding plug-in connector component.
US11437759B2 Coaxial connector assembly with alignment member
An alignment device for use in an electrical connector or electrical connector assembly having coaxial terminals. The alignment device includes a planar plate portion having a first wall and an oppositely facing second wall. A plurality of coaxial terminal receiving openings extend through the plate portion. The coaxial terminal receiving openings are configured to receive mating ends of the coaxial terminals. Alignment members extend from the second wall of the plate portion in a direction away from the first wall, the alignment members are positioned proximate the coaxial terminal receiving openings.
US11437758B1 Electrical connector assembly
A connector assembly is presented herein. The connector assembly includes a first connector that has a fixed gear rack and a pinion gear engaged with the fixed gear rack and rotatable around a trunnion that is disposed in a first slot. The pinion gear and fixed gear rack cooperate to translate the trunnion along the slot as the pinion gear rotates. The first connector also includes a lever connected to the pinion gear configured to rotate the pinion gear and an actuator arm connected to the pinion gear defining a post protruding from the actuator arm. The connector assembly also contains a second connector that is configured to mate with the first connector. The second connector defines a second slot and a passage sized, shaped, and arranged to receive the post into the second slot.
US11437755B2 Controller and system
According to one embodiment, a controller may include a user interface that is operable to receive input from a user to control an electronic system to which the controller may be coupled either directly or indirectly. The user interface may comprise an interface housing to which the user interface is coupled, the interface housing having a front portion and a rear portion, the front portion of which may contain the user interface. A controller housing may be coupled to the rear portion of the interface housing, the controller housing having a smaller perimeter than the interface housing. The controller housing may be comprised of at least one sidewall and a rear wall. At least one magnet may be coupled to the controller housing. The magnet(s) may be operable to hold the controller in position using magnetic force when the controller housing is inserted into a mounting receptacle.
US11437754B2 Plug connector module for electrical contacts in the vehicle sector and method for connecting at least two contact elements to a plug connector module
A plug-connector module for electrical contacts in the vehicle sector features the following: at least two contact elements that each feature at least one contact opening for receiving an electrical contact, and each features at least one first engagement device; and at least one positioning element for connecting the contact elements. For this purpose, the positioning element includes at least two second engagement devices that are configured complementary to the first engagement devices. Each contact element features at least one positioning opening for pushing-through the at least one positioning element. Furthermore, the present disclosure relates to a method for connecting at least two contact elements to a plug-connector module.
US11437753B2 High density connector
High density pluggable electrical connector having a number of electrical contacts exceeding sixty and a contact density on a plugging interface of the connector of at least forty contacts per square centimeter, comprising a casing and a terminal unit mounted within the casing, the terminal unit comprising a housing with a module receiving cavity formed within the housing, and a plurality of terminal modules insertably received in the module receiving cavity in a stacked arrangement. Each terminal module comprises a plurality of contacts mounted in a dielectric terminal module housing, the terminal modules having a width W to height H ratio W/H greater than three.
US11437751B2 Connector
A connector includes a housing, a first sandwich structure, and a support structure. The housing includes two accommodating cavities vertically adjacent to each other, where each accommodating cavity is used for receiving a docking connector. The first sandwich structure is disposed between the two accommodating cavities. The support structure penetrates two side walls of the housing and two side walls of the first sandwich structure to fix the first sandwich structure on the housing.
US11437747B2 Spring-loaded contacts having capsule intermediate object
Reliable contacts for connectors, connector receptacles that can be easily aligned to an opening in an electronic device, and connector inserts and connector receptacles that are readily manufactured. One example can provide a spring-biased contact having plunger extending through an opening in a barrel and biased by a spring. An intermediate object can be positioned between the plunger and the spring. The intermediate object can contact a barrel in at least two locations on the barrel.
US11437746B2 Board-end connector and wire-end connector
A board-end connector and a wire-end connector capable of being engaged with each other to form a wire-to-board connector assembly are provided. The board-end connector includes a board-end insulating housing, a plurality of board-end terminals, and a plurality of board-end signal terminals. The board-end insulating housing has a board-end power mating section and a board-end signal mating section. The board-end signal mating section is located on one side of the board-end power mating section and has a long signal slot. The plurality of board-end terminals are accommodated in the board-end power mating section. The plurality of board-end signal terminals are accommodated in the long signal slot of the board-end signal mating section.
US11437743B2 Electrical connector
An electrical connector is provided. The electrical connector may include a body; a terminal portion disposed on the body; and a flexible printed circuit board (FPCB) electrically connected to the terminal portion, wherein the body includes a first part on which the terminal portion is disposed, a second part disposed on one side of the first part in a vertical direction, and a third part disposed on the other side of the first part and coupled to the second part, the FPCB includes a first region and a second region extending from the first region and including a contact point connected to the terminal portion, and the second region is disposed between the first part and the third part in a front-to-rear direction and is fixed to the first part.
US11437742B2 Flexible printed circuits marked with connections to vehicle circuits
Flexible circuits are described including markings that indicate connections between their flat-wire conductors and specific circuits of a vehicle electrical system. Wire conductors within the flexible circuit share connections with different circuits of the vehicle electrical system. To indicate a connection between a wire conductor and a vehicle circuit, the flexible circuit includes one or more human or machine-readable marks specifically indicating the connection, in some cases, at a position where the connection is to be made. The marks can include etchings or printings on the wire conductors or printings on or otherwise visible from the insulating body that protects the wire conductors.
US11437740B2 Contact insert, assembly produced therewith, and method for providing the contact insert
A contact insert for clamping an electric conductor to a clamping point by a clamping spring. The contact insert has a contact frame having at least one contact base and a respective lateral wall arranged at an angle to the contact base, wherein the lateral walls run substantially parallel to each other, and a receiving area is formed between the lateral walls. The clamping spring is arranged in the receiving area. The clamping spring has a contact arm, a spring bend, which adjoins the contact arm, and a clamping arm, which adjoins the spring bend. The contact arm is secured to one or both lateral walls or to at least one securing wall, which adjoins one or both lateral walls. The clamping arm is pretensioned relative to the contact base. The clamping point for the electric conductor to be clamped is formed between the clamping arm and the contact base.
US11437739B2 Connector pre-filled with sealant
A connector (10) configured to bring an object (70) into conduction comprises: a pair of fitting bodies fittable to each other; and a filler (60) with which at least one fitting body of the pair of fitting bodies is loaded, wherein a fitting body of the pair of fitting bodies includes: an accommodating portion (35a) configured to accommodate the object (70) together with the filler (60); and a receiving portion (36) configured to be adjacent to the accommodating portion (35a) and receive the filler (60).
US11437736B2 Broadband antenna having polarization dependent output
An antenna comprises a ground plane, a first antenna element and a second antenna element, wherein the first antenna element and the second antenna element are arranged for emitting and/or receiving electromagnetic radiation at a design wavelength with a first polarization direction and a second polarization direction, respectively, the second polarization direction being different from the first polarization direction, wherein the first and second antenna elements each comprise pairs of resonator elements having sidewalls facing a corresponding probe arranged in each pair of resonator elements, wherein one resonator element of each pair of resonator elements is shared between the first and second antenna elements and the respective probes of the first and second antenna elements are arranged on different sides of the shared resonator element.
US11437735B2 Systems for receiving electromagnetic energy using antennas that are minimally affected by the presence of the human body
An antenna for receiving wireless power from a transmitter is provided. The antenna includes multiple antenna elements, coupled to an electronic device, configured to receive radio-frequency (RF) power waves from the transmitter, each antenna element being adjacent to at least one other antenna element. Furthermore, the multiple antenna elements are arranged so that an efficiency of reception of the RF power waves by the antenna elements remains above a predetermined threshold efficiency when a human hand is in contact with the electronic device, the predetermined threshold efficiency being at least 50%. Lastly, at least one antenna element is coupled to conversion circuitry, which is configured to (i) convert energy from the received RF power waves into usable power and (ii) provide the usable power to the electronic device for powering or charging of the electronic device.
US11437733B2 Multi-band antenna device
An antenna device includes a first antenna, a second antenna, a barrier, and a signal processing device. The first antenna transceives a first radio frequency (RF) signal in a first communication band, and the second antenna transceives a second RF signal in a second communication band. The first antenna includes a first radiator and a second radiator having a shape symmetrical to a shape of the first radiator. The second antenna includes third and fourth radiators having shape identical to those of the first and second radiators but having a size corresponding to the second communication band. The barrier includes a penetration region, and reflects the first and second RF signals. A center frequency of the second communication band is higher than a center frequency of the first communication band, and the first and second antennas are connected with the signal processing device through the penetration region of the barrier.
US11437730B2 Patch antennas with excitation radiator feeds
Examples of a patch antenna are described herein. Some examples of the patch antenna include a parallelepipedal antenna holder. In some examples, a first excitation surface is situated on a first side of the antenna holder, where a second side opposite the first side is situated on a metal plane. A grounding surface is situated on a third side between the first side and the second side. An excitation radiator feed is situated to provide electromagnetic coupling between the excitation radiator feed and the first excitation surface.
US11437728B1 Multi-band quadrifilar helix slot antenna
A quadrifilar helix antenna may comprise a cylindrical body with a conductive layer. The antenna may further comprise a first slot disposed on the cylindrical body, wherein a length of the first slot is proportional to a first wavelength of a first signal. The antenna may further comprise a second slot disposed on the cylindrical body. The antenna may further comprise a first feed line crossing the first slot. The antenna may further comprise a second feed line crossing the second slot.
US11437725B2 Flat panel antenna including liquid crystal
A flat panel antenna includes a first substrate on which a radiation patch and a ground plane are provided; a second substrate; a liquid crystal layer between the first substrate and the second substrate; and a feed portion adjacent to the second substrate, wherein the ground plane includes a slot, wherein the feed portion includes a first spacing part, a second spacing part and a feed line between the first spacing part and the second spacing part, and wherein a thickness of the first substrate is greater than a thickness of the second substrate.
US11437724B2 Antenna module
An antenna module includes: a wiring structure including a plurality of insulating layers and a plurality of wiring layers; a metal structure disposed on one surface of the wiring structure, and having a through-portion; and an antenna disposed on the one surface of the wiring structure. At least a portion of the antenna is disposed in the through-portion.
US11437719B2 Digital array signal processing method for an array receiver
A digital or smart array antenna has at least one radio and a processor coupled to each antenna element. The processor is coupled with programmable logic that demodulates a plurality of signals received at one antenna element to obtain demodulation symbols. After obtaining the demodulation symbols, the programmable logic applies a weighting function. In this order or sequence, the digital array antenna is able to reduce the processing requirements associating within the signal information. The reduced processing requirements enable the signal information to be shared with adjacent antenna elements that may be timing adjusted between adjacent elements. Then, the sharing continues across all elements the array until the signal reaches an edge of the array. At the edge of the array, a signal beam may be generated that is steer in response to the processed signal information shared between all the elements in the array.
US11437716B1 Antenna element
An antenna element is provided that is adapted to provide a more consistent horizontally polarized signal. In one embodiment, a radiator and counterpoise are provided with the counterpoise being disposed between the radiator and a ground plane in use. The feed location for feeding the radiator and the counterpoise is significantly spaced from the ground plane in use and the radiator and counterpoise diverge relative to this feed location.
US11437715B2 High-gain miniaturized antenna element and antenna
A high-gain miniaturized antenna element includes a radiation structure and a feed support structure. The radiation structure includes a first radiator and a second radiator. The first radiator is arranged horizontally. The second radiator is formed by bending an outer edge of the first radiator downwardly. The feed support structure includes a plurality of feed support parts arranged vertically. Each feed support part is a downward extension of the first radiator.
US11437712B2 Smartphone antenna in flexible PCB
A thin, flexible antenna module is provided for use in a smartphone. When the antenna module is assembled in the smartphone, the antenna module provides an MST antenna and an NFC antenna. For this, the antenna module includes a flexible PCB containing coils and further includes a magnetic sheet engaged with flexible PCB. The flexible PCB and the magnetic sheet are attached to each other to form a single body.
US11437709B2 Electronic device with advanced antenna
The present disclosure provides an electronic device with advanced antenna. The electronic device includes: a display screen; a metal frame surrounding a side edge of the display screen; and a connecting component disposed between the side edge of the display screen and a top end of the metal frame; wherein a height of the connecting component is larger than a preset height such that a portion of the side edge of the display screen not facing the metal frame has at least the preset height. Since the height of the connecting component is larger than the preset height such that the area of the portion of the side edge of the display screen which faces directly the metal frame may be smaller than a predetermined value. Thus, interruption between the display screen and the metal frame may be reduced or eliminated.
US11437708B2 Antenna effect protection and electrostatic discharge protection for three-dimensional integrated circuit
A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.
US11437705B2 Radio frequency antenna for short range communications
An antenna assembly includes a substrate, a first antenna having a first, second, third, fourth sections, which have different configuration respectively, and a first transmission cable, a second antenna having a fifth, sixth, seventh, eighth sections, which have different configuration respectively, and a second transmission cable. The first and fifth sections extend vertically from a surface of the substrate respectively. The second, third and fourth sections extend in parallel with the first section and extend from its next section. The sixth, seventh, eighth sections extend in parallel with the fifth section and extend from its next section. The first and second transmission cables physically and electrically are connected to the first and second antenna respectively. The second antenna is spaced away from the first antenna a selected distance. The first antenna is arranged having each of its sections extending perpendicular to each of its sections of the second antenna.
US11437704B2 Combined active and passive wireless communication device
A wireless communication device comprises a control unit, an antenna interface, an active wireless transceiver operable together with the control unit and antenna interface, a passive wireless transceiver operable together with the antenna interface and operable by harvesting power from received radio messages. The device is further configured to deactivate the one or more active wireless transceivers and control unit to an inactive state and, subsequently, by the passive wireless transceiver, activate the control unit and an active wireless transceiver to an active state when the passive wireless transceiver receives a message from the antenna interface.
US11437702B2 Antenna mounting structure
An antenna mounting structure is disclosed. According to an embodiment of the present invention, provided is an antenna mounting structure comprising: a parapet mount part; a parapet contact part vertically connected to one end of the parapet mount part; a mount extension part vertically connected to the other end of the parapet mount part, disposed parallel to the parapet contact part, and is connected and fixed to an inner surface of a parapet wall by means of a first connecting means; and an antenna coupling part adjacently disposed to the parapet contact part and configured to be coupled with an antenna.
US11437699B2 Multiport matched RF power splitter
A multiport splitter with a circuit that is less costly, smaller, impedance matched on all ports, provides 9.54 dB isolation between neighboring ports, and is balanced as compared to the current typical implementations. The present disclosure may further provide a single multiport splitter that may be increased to any suitable number of output ports without the need for cascading multiple splitters and/or couplers together in a single device.
US11437694B2 Uninterruptable tap
A coaxial tap in a hybrid fiber coaxial cable distribution system serves subscribers with an RF signal while passing the RF signal and an equipment supply voltage to devices downstream of the tap.
US11437690B2 Nonaqueous battery and method of producing the same
A nonaqueous battery includes a positive electrode and a negative electrode. At least one of the positive electrode and the negative electrode includes a current collector, an intermediate layer, and an active material layer. The intermediate layer is interposed between the current collector and the active material layer and includes graphite particles and insulating particles. In a cross section of the intermediate layer in a thickness direction, a major axis diameter of the graphite particles is equal to or greater than the thickness of the intermediate layer. In X-ray diffraction measurement of the intermediate layer by an out-of-plane method, a ratio of an intensity of an 110 diffraction line of a graphite crystal to an intensity of a 002 diffraction line of the graphite crystal is 0.0011 or more.
US11437689B2 Battery cover plate assembly, battery cell, battery module, power battery and electric automobile
A battery cover plate assembly, a cell, a battery module, a power battery and an electric vehicle are provided. The battery cover plate assembly includes a cover plate, a first pole, a second pole, a flipping member, a scored member, a first conductive member and a telescopic assembly. The second pole includes an upper pole and a lower pole spaced apart from each other. The flipping member is configured to turn over under the action of gas pressure inside the battery and push, by means of the telescopic assembly, the first conductive member to move to break a score, so as to electrically disconnect the upper pole from the lower pole.
US11437683B2 Battery cell of venting structure using taping
A battery cell of a venting structure using taping is disclosed. The battery cell includes a battery case including a first case and a second case, at least one of the first and second cases being provided with a receiving part for receiving the electrode assembly, thermally bonded edges for sealing the receiving part being provided outside the receiving part, a positive electrode lead and a negative electrode lead protruding outward from the battery case, and an electrode assembly received in the battery case, the electrode assembly having electrode tabs protruding from one end thereof, the electrode tabs being coupled to the positive electrode lead and the negative electrode lead, wherein seal reinforcement tapes are attached to some of the thermally bonded edges so as to surround outer ends of the some thermally bonded edges.
US11437681B2 Enclosure device
An enclosure defined by first and second halves that are secured together by a locking member that is slidable lockingly engageable therewith.
US11437680B2 Battery holding device for preventing erroneous charging
A battery holding device is provided for preventing erroneous charging when being electrically connected to a power source. The battery holding device includes a battery holding mechanism and a charging control module. The battery holding mechanism is adapted to selectively accommodate a rechargeable first battery or two non-rechargeable second batteries. The charging control module is configured to control an electrical connection between the battery holding mechanism and the power source, and includes a sensor and a control unit. The electrical connection is allowed by the control unit to permit the first battery to be charged by the power source only when the first battery is installed in the installation space.
US11437679B2 Fixing band for battery module and battery module
The disclosure relates to a fixing band for a battery module and a battery module. The fixing band comprises a first end portion, a connecting section and a second end portion which are arranged successively in an extending direction of the fixing band. The first end portion includes a body and engaging grooves which are protruded in a thickness direction of the body. The engaging grooves are integral with the body. The second end portion has engaging protrusions which are shaped to match the engaging grooves. The first end portion and the second end portion are laminated in the thickness direction and are engaged with each other by the engaging grooves and the engaging protrusions, so that the fixing band encloses an annular accommodation space.
US11437678B2 Battery module and a traction battery
A battery module for a traction battery may include a module housing through which a coolant is flowable and at least one battery cell stack arranged within an interior space of the module housing. The at least one battery cell stack may include a plurality of battery cells arranged one after another along a stack direction. The plurality of battery cells may be arranged within the module housing such that a coolant flowable through the module housing directly contacts the plurality of battery cells. A locking mechanism may form-fittingly connect the at least one battery cell stack to the module housing via (i) a plurality of housing-side locking points and (ii) a plurality of stack-side locking points.
US11437676B2 Battery pack and production method therefor
A battery pack includes: a plurality of battery modules disposed adjacent to each other in a first direction inside a pack case, each of the plurality of battery modules including a plurality of battery cells disposed side by side in a second direction, the second direction being orthogonal to the first direction; and a side-frame disposed between the battery modules disposed adjacent to each other in the first direction inside the pack case. The side-frame includes two side-walls and a joint. The two side-walls elastically press side-surfaces, in the first direction, of the battery modules disposed adjacent to each other. The side-frame has a long-length shape with a U-shaped cross section. In a state where the side-frame is removed from the battery modules disposed adjacent to each other, a distance between the two side-walls of the side-frame becomes larger as the two side-walls go away toward opposite the joint.
US11437674B2 Battery cell tabs with a unitary seal
The disclosed technology relates to a set of battery tabs. The battery tabs include a first tab forming an elongated member, a second tab forming an elongated member, and a unitary seal surrounding a portion of the respective elongated members of the first tab and the second tab. The unitary seal spaces the first tab apart from the second tab to create a gap between the first tab and the second tab. The first tab and second tab each connect to respective electrodes enclosed within a pouch of a battery cell to allow the cell's energy to be transferred to an external component.
US11437671B2 Battery pack air cooling system and vehicle
A controller of a battery pack air cooling system is configured to calculate a degradation amount of each target battery based on integrated temperature information of each target battery that makes up a battery pack, calculate degradation variations in the battery pack based on the degradation amount of each target battery, when it is determined that a detected battery temperature of any one of the target batteries is higher than an outside air temperature, cause an air sending device to send outside air to the battery pack, and, when it is determined that the detected battery temperature is lower than or equal to the detected outside air temperature and it is determined that the degradation variations in the battery pack are greater than or equal to a threshold, cause an air sending device to send outside air to the battery pack.
US11437667B2 Battery assembly method for providing a battery arrangement and battery arrangement
A battery assembly method for providing a battery arrangement having at least one battery module, a cooling means, and a frame. For attaching the at least one battery module on a first side of the cooling means, the battery module is affixed in a module support region of the first side without the frame being attached to the cooling means, wherein the cooling means comprises a separating element which provides the first side, which element has an edge region and a transition region which connects the edge region to the module support region, wherein the separating element is elastically flexible, at least in the transition region, and wherein, after affixing the battery module, the frame is mounted such that at least a portion of the frame rests on the edge region of the separating element.
US11437663B2 Battery pack and method of disassembling battery pack
A battery pack may include a component housed in a case. The component may include an adhesion projection and a first guide projection projecting from a bottom surface of the component. The first guide projection may include: a first portion overlapping the adhesion projection; and a second portion not overlapping the first portion. A projection degree of the first portion may be greater than or equal to a projection degree of the adhesion projection. The second portion may include an inclined portion, wherein a projection degree of the inclined portion increases toward the first portion so that a projection degree of the second portion increases from a value lower than the projection degree of the adhesion projection to a value greater than or equal to the projection degree of the adhesion projection. An end surface of the adhesion projection may be adhered to the inner surface.
US11437662B1 Battery assembly for use in an electric aircraft
A battery assembly for use in an electric aircraft, the battery assembly including a plurality of battery cells, four opposite and opposing sides, where at least two sides are angled inward as to secure the plurality of battery cells inside the battery assembly, and at least a sensor, where the at least a sensor is configured to detect a thermal runaway.
US11437660B2 Battery module
A battery module including a cell assembly having a plurality of secondary batteries stacked in at least one direction and configured so that electrode leads of the secondary batteries protrude in at least one direction of forward direction and a rearward direction thereof; an upper housing disposed at an upper portion of the cell assembly; and a sensing block located at at least one of a front side and a rear side of the cell assembly and having a bus bar made of an electrically conductive material and contacting the electrode leads of the secondary batteries at the corresponding front side or rear side of the cell assembly is provided. The sensing block being slidably coupled to the upper housing.
US11437636B2 Fuel cell system
A fuel cell system includes a fuel cell a current sensor that detects a current of the fuel cell, a plurality of cell voltage sensors that detects a voltage in a unit of one or two or more cells of the fuel cell among the cells, a pump that adjusts a flow rate of the cooling medium, and a controller. The controller estimates, in a first case, a calorific value of the fuel cell using each detected cell voltage value and the detected current value, decides the flow rate of the cooling medium based on the estimated calorific value, and controls the operation of the pump such that the flow rate of the cooling medium is lower than that of a case where the estimated calorific value is the same in a normal operation of the fuel cell.
US11437632B2 Fuel-cell unit cell
Disclosed herein is a fuel-cell unit cell, at a first part of which: the fuel-cell unit cell has a bonding layer; between a first separator and an outer peripheral edge portion of a first gas diffusion layer, the bonding layer bonds the first separator and the outer peripheral edge portion together; between the first separator and an outer peripheral edge portion of a membrane-electrode assembly, the bonding layer is bonded to the outer peripheral edge portion of the membrane-electrode assembly; and between the first separator and a support frame and/or between a second separator and the support frame, the bonding layer bonds the support frame and the separator together.
US11437625B2 Lithium battery anode containing silicon nanowires formed in situ in pores of graphene foam
An anode for a lithium battery comprises a graphene foam structure composed of multiple pores and pore walls and Si nanowires residing in the pores. The Si nanowires are formed in situ inside the pores. The pore walls comprise a 3D network of interconnected graphene planes or stacked graphene planes having an inter-plane spacing d002 from 0.3354 nm to 0.40 nm as measured by X-ray diffraction. The Si nanowires have a diameter from 2 nm to 100 nm and a length-to-diameter aspect ratio of at least 5 and the Si nanowires are in an amount from 0.5% to 99% by weight based on the total weight of the graphene foam and the Si nanowires combined.
US11437623B2 Secondary battery and apparatus contained the secondary battery
This application discloses a secondary battery and an apparatus containing the secondary batteries. The secondary battery includes a positive electrode plate and a negative electrode plate, the positive electrode plate comprising a positive electrode current collector and a positive electrode film comprising a positive active material; the negative electrode plate comprising a negative electrode current collector and a negative electrode film comprising a negative electrode active material, wherein the positive active material comprises one or more of layered lithium transition metal oxides and modified compounds thereof, the negative electrode active material comprises artificial graphite and natural graphite, and the negative electrode plate satisfies 0.02≤I3R(012)/I2H(100)≤0.18, alternatively the positive active material comprises one or more of lithium-containing phosphates with olivine structure and modified compounds thereof, the negative electrode active material includes artificial graphite and natural graphite, and the negative electrode plate satisfies 0.04≤I3R(012)/I2H(100)≤0.22.
US11437621B2 Materials with extremely durable intercalation of lithium and manufacturing methods thereof
Composites of silicon and various porous scaffold materials, such as carbon material comprising micro-, meso- and/or macropores, and methods for manufacturing the same are provided. The compositions find utility in various applications, including electrical energy storage electrodes and devices comprising the same.
US11437615B2 Yolk-shell nanoparticle, method and applications
A nanoparticle and a method for fabricating the nanoparticle utilize a decomposable material yoke located within permeable organic polymer material shell and separated from the permeable organic polymer material shell by a void space. When the decomposable material yoke comprises a sulfur material and the permeable organic polymer material shell comprises a material permeable to both a sulfur material vapor and a lithium ion within a battery electrolyte the nanoparticle may be used within an electrode for a Li/S battery absent the negative effects of battery electrode materials expansion.
US11437612B2 Cathode mixture and method for producing the same
An object of the present disclosure is to produce a cathode mixture capable of increasing the charge-discharge capacity of a sulfur battery. The present disclosure achieves the object by providing a cathode mixture used for a sulfur battery and a method for producing the same, wherein the cathode mixture is produced by a mechanical milling treatment of a raw material mixture including Li2S and MxSy wherein M is selected from P, Si, Ge, B, Al, or Sn, and x and y are integers that confer an electroneutrality with respect to S according to a kind of M; a cathode active material including a sulfur simple substance; and a conductive aid including a carbon material.
US11437611B2 Negative electrode active material, negative electrode including the same, secondary battery including the negative electrode, and preparation method of the negative electrode active material
A negative electrode active material and a method for preparing a negative electrode active material, comprising preparing a silicon-based compound including SiOx, wherein 0.5
US11437610B2 High capacity secondary battery
Provided are a high-capacity secondary battery including a cathode including an over-lithiated oxide cathode material or a Ni-rich cathode material; a lithium anode (Li anode); and an electrolyte including a superoxide dismutase mimic catalyst (SODm).
US11437607B2 Dispersant for electrode coating liquid, electrode coating liquid composition including the dispersant for electrode coating liquid, electrode for power storage device manufactured using the electrode coating liquid composition, and power storage device having the electrode
A composition that includes a dispersion stabilizer for an electrode coating liquid for a power storage device is provided. The composition has superior ability to stably disperse an electrode active material and a conductive material, and makes it possible to manufacture a uniform electrode, even when a dispersion device that has weak shear force is used. A dispersant for an electrode coating liquid for a power storage device, the dispersant being characterized by containing cellulose fibers that satisfy (a)-(c). (a) The number average width of the short widths is 2-200 nm. (b) The aspect ratio is 7.5-250. (c) Cellulose I crystals are included and the crystallinity thereof is 70%-95%.
US11437604B2 Organic light-emitting diode having color distances between pixel electrodes and organic emission layers and light-emitting display apparatus comprising the same
An organic light-emitting display apparatus including; a first pixel electrode, a second pixel electrode, a third pixel electrode; a first lower functional layer, a second lower functional layer, and a third lower functional layer; a first organic emission layer for emitting a first color, a second organic emission layer for emitting a second color, and a third organic emission layer for emitting a third color; an opposite electrode; and a first upper functional layer, a second upper functional layer, and a third upper functional layer respectively disposed between the opposite electrode and the first organic emission layer, the second organic emission layer, and the third organic emission layer and each having a thickness that is equal to or greater than about 1300 Å and less than or equal to about 1800 Å.
US11437602B2 Display panel and manufacturing method thereof, display device
The present invention provides a display panel comprising a base substrate, wherein the base substrate comprises a display area and a non-display area disposed around the display area; a light emitting layer disposed on the display area; a first inorganic layer disposed on the base substrate and covering the light emitting layer; a guiding structure disposed on the first inorganic layer; an organic layer disposed on the guiding structure, wherein the guiding structure is used to guide vapor in the organic layer into the non-display area; and a second inorganic layer disposed on the guiding structure and covering the organic layer.
US11437597B2 Organic electroluminescence device
An organic electroluminescence device includes a first electrode, a hole transport region disposed on the first electrode, a first emission layer disposed on the hole transport region and including a first light-emitting host and a first light-emitting dopant, a second emission layer disposed on the first emission layer and including a first electron transport material and a second light-emitting dopant, an electron transport region disposed on the second emission layer and including a second electron transport material, and a second electrode disposed on the electron transport region, wherein a triplet energy of the first light-emitting host (T1a), a triplet energy of the second light-emitting dopant (T1b) and a triplet energy of the second electron transport material (T1c) satisfy a relation of T1a
US11437596B2 Organic photoelectronic element having hole transport layer containing fluorinated polymer and organic semiconductor material
To provide an organic photoelectronic element excellent in light emitting characteristics and long-term reliability. The organic photoelectronic element comprises a substrate, an anode provided on the substrate, a cathode facing the anode, a light emitting layer disposed between the anode and the cathode, a hole transport layer disposed between the light emitting layer and the anode, and an electron blocking layer provided in contact with the light emitting layer and the hole transport layer between the light emitting layer and the hole transport layer, wherein the hole transport layer contains a fluorinated polymer and an organic semiconductor material, and has a refractive index in the wavelength range of from 450 nm to 800 nm, of at most 1.60, the hole transport layer and the electron blocking layer are made of different materials from each other, and the LUMO energy level of the electron blocking layer is higher than the LUMO energy level of the light emitting layer and the LUMO energy level of the hole transfer layer.
US11437590B2 Organic electroluminescence element material, organic electroluminescence element, display apparatus and illumination apparatus
An organic electroluminescence element material contains a π-conjugated boron compound having a structure represented by Formula (1), wherein, X1 and X2 each independently represent O, S, or N—Y1, Y1 represents an alkyl group, an aromatic hydrocarbon ring group, or an aromatic heterocyclic group, when there are a plurality of Y1s the plurality of Y1s may be the same or different, R1 to R9 each independently represent a hydrogen atom or a substituent.
US11437588B2 Materials for organic electroluminescent devices
The invention relates to compounds of formula (1) which are suitable for use in electronic devices, and to electronic devices, in particular organic electroluminescent devices, containing said compounds.
US11437582B2 Organic electroluminescent device and manufacturing method thereof
Disclosed is an organic electroluminescent device, comprising a substrate and light emitting units formed in sequence on the substrate, characterized in that, each of the light emitting units comprises a first electrode layer (1), a light emitting layer (2) and a second electrode layer (3), the light emitting layer comprises a host material and a dye, the host material is made of materials having both electron transport capability and hole transport capability; at least one material in the host material has a CT excited triplet state energy level T1 greater than its n-π excited triplet state energy level S1, and T1-S1≤0.3 eV; or, at least one material in the host material has a CT excited triplet state energy level T1 greater than its n-π excited triplet state energy level S1, and T1-S1≥1 eV, with the difference between its n-π excited second triplet state energy level and its CT excited first singlet state energy level being in the range of −0.1 eV to 0.1 eV. The organic electroluminescent device configuration can sufficiently utilize the triplet state energy in the host material and the dye to increase the luminous efficiency and prolong the service life of the device.
US11437580B2 Organic semiconducting polymers
A polymer comprising wherein Ar1 and Ar2 are optional and either the same or different and independently selected from an aryl group or an heteroaryl group. In this polymer, W is selected from the group consisting of: S, Se, O, and N-Q; and Q is selected from the group consisting of: a straight-chain or branched carbyl, silyl, or hydrocarbyl, a branched or cyclic alkyl with 1 to 30 atoms, a fused substituted aromatic ring, and a fused unsubstituted aromatic ring. Additionally, in the polymer, R4 and R5 are selected from the group consisting of: a straight-chain or branched carbyl, silyl, or hydrocarbyl, a branched or cyclic alkyl with 1 to 30 atoms, a fused substituted aromatic ring, and a fused unsubstituted aromatic ring; and x+y=1.
US11437575B2 Manufacturing method of perovskite film having high transmittance, composition for manufacturing perovskite film, and display device having transparent display
A manufacturing method of a perovskite film and a composition for preparing the perovskite film. The manufacturing method of the perovskite film comprises a step of manufacturing a first mixed solution, a step of manufacturing a second mixed solution, a low pressure distillation step, a coating step, and a drying step. The technical effect of the present disclosure is to provide the manufacturing method of the perovskite film and the composition for manufacturing the perovskite film, wherein the perovskite film comprises components of a metal halide and an organic halogen salt to adjust absorption wavelengths and emission wavelengths by modulating components and concentration of each component and makes the perovskite film have a higher transmittance in the visible light band. When ultraviolet light illuminates the perovskite film, the perovskite film can produce visible light due to photoluminescence effect of the perovskite material in the perovskite film, thereby achieving display effect.
US11437573B2 Semiconductor device and method for manufacturing the same
A semiconductor device includes a bottom electrode, a top electrode, a switching layer and a diffusion harrier layer. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The diffusion barrier layer is between the bottom electrode and the switching layer to obstruct diffusion of ions between the switching layer and the bottom electrode.
US11437572B2 Negative differential resistance element having 3-dimension vertical structure
Provided is a negative differential resistance element having a 3-dimension vertical structure. The negative differential resistance element having a 3-dimension vertical structure includes: a substrate; a first electrode that is formed on the substrate to receive a current; a second semiconductor material that is formed in some region of the substrate; a first semiconductor material that is deposited in some other region and the first electrode of the substrate and some region of an upper end of the second semiconductor material; an insulator that has a part vertically erected from the substrate, the other part vertically erected from the second semiconductor material, and an upper portion stacked with a first semiconductor material; and a second electrode that is formed at an upper end of the second semiconductor material to output a current, thereby significantly reducing an area of the device and greatly improving device scaling and integration.
US11437571B2 Integration of selector on confined phase change memory
A method for fabricating a semiconductor device includes forming air gaps within respective dielectric layer portions to reduce thermal cross-talk between adjacent bits. Each of the dielectric portions is formed on a substrate each adjacent to sidewall liners formed on sidewalls of a phase change memory (PCM) layer. The method further includes forming a pillar including the sidewall liners and the PCM layer, and forming a selector layer on the pillar and the dielectric portions.
US11437570B2 Resistive switching memory device based on multi-inputs
A resistive switching memory device according to an exemplary embodiment includes: a first electrode; a second electrode formed to be separated from the first electrode; and an insulating layer formed near the first electrode and the second electrode, and changed to one of a high resistance state and a low resistance state when a conductive filament is controlled by a change of external humidity or a voltage applied through the first electrode or the second electrode.
US11437569B2 Hall sensor structure
A Hall sensor structure comprising a semiconductor body of a first conductivity type, a well region of a second conductivity type extending from a top side of the semiconductor body into the semiconductor body, at least three first semiconductor contact regions of the second conductivity type, each extending from a top side of the well region into the well region, at least one second semiconductor contact region of a second conductivity type, wherein the first semiconductor contact regions are spaced apart from one another and from an edge of the well region, a metallic connection contact layer is arranged on each first semiconductor contact region, the at least one second semiconductor contact region extends along the top side of the semiconductor body at least partially around the well region.
US11437568B2 Memory device and methods of making such a memory device
One illustrative memory cell disclosed herein includes at least one layer of insulating material having a first opening and an internal sidewall spacer positioned within the first opening, wherein the internal sidewall spacer includes a spacer opening. The memory cell also includes a bottom electrode positioned within the spacer opening, a memory state material positioned above an upper surface of the bottom electrode and above an upper surface of the internal sidewall spacer, and a top electrode positioned above the memory state material.
US11437563B2 Acoustic wave device and method of manufacturing the same
An acoustic wave device includes an acoustic wave generator, a support portion, a protective member, and at least one element embedded in the protective member. The acoustic wave generator is disposed on a surface of a substrate. The support portion is disposed on the substrate along a circumference of the acoustic wave generator. The protective member is coupled to the support portion and disposed to be spaced apart from the acoustic wave generator by an interval.
US11437557B2 Optoelectronic semiconductor device and method for forming an optoelectronic semiconductor device
An optoelectronic semiconductor device and a method for forming an optoelectronic semiconductor device are disclosed. In an embodiment a device includes a carrier having a main plane of extension, at least one semiconductor chip arranged on the carrier, a frame arranged on the carrier and surrounding the semiconductor chip in lateral directions which are parallel to the main plane of extension of the carrier and a conversion layer covering the at least one semiconductor chip and the frame, wherein the at least one semiconductor chip extends further in a vertical direction than the frame, wherein the semiconductor chip is configured to emit electromagnetic radiation, and wherein the frame and the semiconductor chip are spaced from each other in the lateral directions by a gap.
US11437554B2 Light emitting module
A light emitting module includes a first terminal part, a first light emitting device including a first electrode, a second light emitting device including a second electrode, a first conductive thin film including a first thin film region and a second thin film region, and a first conductive layer electrically connected to the first thin film region. The first thin film region electrically connects the first terminal part and the first electrode, and has a first current path length. The second thin film region electrically connects the first terminal part and the second electrode, and has a second current path length shorter than the first current path length. At least a portion of the first conductive layer overlaps with the first thin film region in a first direction that is perpendicular to a plane in which the first thin film region extends.
US11437553B2 Lighting device with switching material
A lighting device comprises a light-emitting module with light-emitting elements, wherein the light-emitting elements are arranged adjacent to each other and are configured to emit light towards a light-emitting side. The light-emitting module is configured such that the light-emitting elements can be addressed partially independently of each other, such that some may be brought into a switched-on state while others are brought into a switched-off state. A top layer is disposed on the light-emitting module at the light-emitting side. Further comprising a switching material capable of a reversible change in transmittance for the light emitted by changing to a higher transmittance in regions where the top layer situated on light-emitting elements in the switched-on state or to a lower transmittance in regions of the top layer situated in the switched-off state. The invention further refers to methods for producing and operating a lighting device and using a lighting device.
US11437552B2 Semiconductor device with transmissive layer and manufacturing method thereof
A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.
US11437545B2 Optoelectronic semiconductor chip
In one embodiment, the optoelectronic semiconductor chip (1) comprises a semiconductor layer sequence (2) with an active zone (23) for generating radiation with a wavelength of maximum intensity L. A mirror (3) comprises a cover layer (31). The cover layer (31) is made of a material transparent to the radiation and has an optical thickness between 0.5 L and 3 L inclusive. The cover layer (31) is followed in a direction away from the semiconductor layer sequence (2) by between inclusive two and inclusive ten intermediate layers (32, 33, 34, 35) of the mirror (3). The intermediate layers (32, 33, 34, 35) alternately have high and low refractive indices. An optical thickness of at least one of the intermediate layers (32, 33, 34, 35) is not equal to L/4. The intermediate layers (32, 33, 34, 35) are followed in the direction away from the semiconductor layer sequence (2) by at least one metal layer (39) of the mirror (3) as a reflection layer.
US11437539B2 Optical sensor package and manufacturing method for the same
A manufacturing method of an optical sensor package includes: disposing a chip on a circuit board, the chip including a light emitting area and a light receiving area; disposing at least one light emitting element, which is electrically connected to the circuit board, on the light emitting area of the chip; coating a light blocking material between the light emitting area and the light receiving area; filling a light permeable material that covers the circuit board, the chip, the light blocking material, and the at least one light emitting element; removing a part of the light permeable material disposed between the light emitting area and the light receiving area, forming a first recess and expose the light blocking material; and filling an anti-light-leakage material in the first recess, to form a lateral light blocking structure through stacking the anti-light-leakage material and the light blocking material.
US11437532B2 Method for the production of a light-to-electricity converter made entirely from silicon for a giant photoconversion
The production process according to the invention consists of a nanometric scale transformation of the crystalline silicon in a hybrid arrangement buried within the crystal lattice of a silicon wafer, to improve the efficiency of the conversion of light into electricity, by means of hot electrons. All the parameters, procedures and steps involved in manufacturing giant photoconversion cells have been tested and validated separately, by producing twenty series of test devices.An example of the technology consists of manufacturing a conventional crystalline silicon photovoltaic cell with a single collection junction and completing the device thus obtained by an amorphizing ion implantation followed by a post-implantation thermal treatment.The modulation of the crystal, specific to the giant photoconversion, is then carried out on a nanometric scale in a controlled manner to obtain SEGTONs and SEG-MATTER which are active both optically and electronically, together with the primary conversion of the host converter.
US11437527B2 Encapsulation cover for an electronic package and fabrication process
An encapsulation cover for an electronic package includes a frontal wall with a through-passage extending between faces. The frontal wall includes an optical element that allows light to pass through the through-passage. A cover body and a metal insert that is embedded in the cover body, with the cover body being overmolded over the metal insert, defines at least part of the frontal wall.
US11437525B2 Silicon carbide power diode device and fabrication method thereof
A silicon carbide power diode device has a silicon carbide substrate on which a silicon carbide epitaxial layer with an active region is provided. A Schottky metal layer is on the active region, and a first electrode layer is on the Schottky metal layer. A first ohmic contact is on the silicon carbide substrate, and a second electrode layer is on the first ohmic contact. The active region of the silicon carbide epitaxial layer has a plurality of first P-type regions, a plurality of second P-type regions, and N-type regions. The first P-type regions and the second P-type regions lacking an ohmic contact are spaced apart with dimensions of the second P-type regions being minimized and the N-type regions being maximized for given dimensions of the first P-type region. Second ohmic contacts are located between the first P-type region and the Schottky metal layer.
US11437523B2 Insulating film, method for manufacturing semiconductor device, and semiconductor device
In a semiconductor device including a transistor including an oxide semiconductor film and a protective film over the transistor, an oxide insulating film containing oxygen in excess of the stoichiometric composition is formed as the protective film under the following conditions: a substrate placed in a treatment chamber evacuated to a vacuum level is held at a temperature higher than or equal to 180° C. and lower than or equal to 260° C.; a source gas is introduced into the treatment chamber so that the pressure in the treatment chamber is set to be higher than or equal to 100 Pa and lower than or equal to 250 Pa; and a high-frequency power higher than or equal to 0.17 W/cm2 and lower than or equal to 0.5 W/cm2 is supplied to an electrode provided in the treatment chamber.
US11437520B2 Transistor and display device
The transistor includes a first insulating film, an oxide semiconductor layer, a gate insulating film, an upper gate electrode, and a second insulating film being sequentially layered on a substrate, and the transistor includes a light blocking layer layered on the second insulating film and formed of metal. The light blocking layer is electrically connected to the upper gate electrode by interposing a gate contact hole provided in the second insulating film. The oxide semiconductor layer is configured such that a region overlapping with the upper gate electrode entirely overlaps with the light blocking layer.
US11437516B2 Mechanisms for growing epitaxy structure of finFET device
A semiconductor structure includes a gate structure disposed over a substrate, and a plurality of source/drain features disposed on the substrate and interposed by the gate structure. Each of the source/drain features includes a first doped source/drain region extended away from the substrate, and a second doped source/drain region disposed on top and side surfaces of the first doped source/drain region, in which a phosphorus doping concentration of the first doped source/drain region is lower than a doping concentration of the second doped source/drain region.
US11437513B2 Multi-gate device and method of fabrication thereof
A multi-gate semiconductor device is formed that provides a first fin element extending from a substrate. A gate structure extends over a channel region of the first fin element. The channel region of the first fin element includes a plurality of channel semiconductor layers each surrounded by a portion of the gate structure. A source/drain region of the first fin element is adjacent the gate structure. The source/drain region includes a first semiconductor layer, a dielectric layer over the first semiconductor layer, and a second semiconductor layer over the dielectric layer.
US11437512B2 Buried channel metal-oxide-semiconductor field-effect transistor (MOSFET) and forming method thereof
A buried channel MOSFET includes a dielectric layer, a gate and a buried channel region. The dielectric layer having a recess is disposed on a substrate. The gate is disposed in the recess, wherein the gate includes a first work function metal layer having a “-” shaped cross-sectional profile, and a minimum distance between each sidewalls of the first work function metal layer and the nearest sidewall of the recess is larger than zero. The buried channel region is located in the substrate right below the gate. The present invention provides a method of forming said buried channel MOSFET.
US11437511B2 Multi-threshold voltage devices and associated techniques and configurations
Embodiments of the present disclosure describe multi-threshold voltage devices and associated techniques and configurations. In one embodiment, an apparatus includes a semiconductor substrate, a channel body disposed on the semiconductor substrate, a first gate electrode having a first thickness coupled with the channel body and a second gate electrode having a second thickness coupled with the channel body, wherein the first thickness is greater than the second thickness. Other embodiments may be described and/or claimed.
US11437510B2 Trench MOSFET and method of manufacturing trench MOSFET
The present disclosure discloses a trench MOSFET and a method of manufacturing trench MOSFET. The trench MOSFET includes a substrate, an epitaxial layer, a plurality of trenches, and body region; the substrate has a first conductivity type; the epitaxial layer has the first conductivity type; the plurality of trenches are formed in the epitaxial layer, and at least two of the plurality of trenches are communicated with each other a gate structure is provided in the trench; the body region has a second conductivity type and has a second conductivity type and is disposed among the plurality of trenches.
US11437509B2 Semiconductor device
A main semiconductor device element is a vertical MOSFET with a trench gate structure, containing silicon carbide as a semiconductor material, and having first and second p+-type regions that mitigate electric field applied to bottoms of trenches. The first p+-type regions are provided separate from the p-type base regions and face the bottoms of the trenches in a depth direction. The first p+-type regions are disposed at an interval that is at most 1.0 μm, in a first direction that is a direction in which gate electrodes extend. The second p+-type regions are provided between adjacent trenches of the trenches, separate from the first p+-type regions and the trenches, and in contact with the p-type base regions. In the first direction that is the direction in which the trenches, the second p+-type regions extend in a linear shape having a length that is substantially equal to that of the trenches.
US11437506B2 Wide-gap semiconductor device
A wide gap semiconductor device has: a drift layer using wide gap semiconductor material being a first conductivity type; a well region being a second conductivity type and provided in the drift layer; a source region provided in the well region; a gate contact region provided in the well region and electrically connected to a gate pad; and a Zener diode region provided in the well region and provided between the source region and the gate contact region.
US11437504B2 Complementary group III-nitride transistors with complementary polarization junctions
Group III-N transistors of complementary conductivity type employing two polarization junctions of complementary type. Each III-N polarization junction may include two III-N material layers having opposite crystal polarities. The opposing polarities may induce a two-dimensional charge sheet within each of the two III-N material layers. Opposing crystal polarities may be induced through introduction of an intervening layer between two III-N material layers. A III-N heterostructure may include two III-N polarization junctions. A 2D electron gas (2DEG) is induced at a first polarization junction and a 2D hole gas (2DHG) is induced at the second polarization junction. Transistors of complementary type may utilize a separate one of the polarization junctions, enabling III-N transistors to implement CMOS circuitry.
US11437503B2 Semiconductor device
A semiconductor device includes first and second electrodes, a semiconductor part therebetween, and first and second control electrodes in a trench of the semiconductor part. The first and second control electrodes are arranged along a front surface of the semiconductor part. The semiconductor part includes first and third layers of a first-conductivity-type, and the second and fourth layer of a second-conductivity-type. The second layer is provided between the first layer and the second electrode. Between the second layer and the second electrode, the third and fourth layers are provided apart from the first layer with first and second portions of the second layer interposed, respectively. The first portion of the second layer has a first thickness in a second direction from the first electrode toward the second electrode. The second portion of the second layer has a second thickness in the second direction larger than the first thickness.
US11437498B2 FinFET device and method
A method includes forming a fin on a substrate, forming an insulating material over the fin, recessing the insulating material to form an isolation region surrounding the fin, wherein an upper portion of the fin protrudes above the isolation region, performing a trimming process to reduce a width of the upper portion of the fin, and forming a gate structure extending over the isolation region and the upper portion of the fin.
US11437497B2 Semiconductor device and method
In an embodiment, a device includes: a substrate; a first semiconductor region extending from the substrate, the first semiconductor region including silicon; a second semiconductor region on the first semiconductor region, the second semiconductor region including silicon germanium, edge portions of the second semiconductor region having a first germanium concentration, a center portion of the second semiconductor region having a second germanium concentration less than the first germanium concentration; a gate stack on the second semiconductor region; and source and drain regions in the second semiconductor region, the source and drain regions being adjacent the gate stack.
US11437496B2 Uniform implant regions in a semiconductor ridge of a FinFET
A method for fabricating an integrated circuit is disclosed. The method comprises forming a semiconductor ridge over a semiconductor surface of a substrate and forming an implant screen on a top and sidewalls of the semiconductor ridge. The implant screen is at least two times thicker on the top of the semiconductor ridge relative to the sidewalls of the semiconductor ridge. The method further comprises implanting a dopant into the top and sidewalls of the semiconductor ridge.
US11437495B2 Semiconductor device and method of manufacturing the same
A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.
US11437494B2 Semiconductor device with graphene-based element and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a stacked gate structure positioned on the substrate; first spacers attached on two sides of the stacked gate structure; and second spacers attached on two sides of the first spacers; wherein the first spacers comprise graphene.
US11437493B2 Gate spacer structures and methods for forming the same
The present disclosure relates to a semiconductor device including a substrate having a top surface and a gate stack. The gate stack includes a gate dielectric layer on the substrate and a gate electrode on the gate dielectric layer. The semiconductor device also includes a multi-spacer structure. The multi-spacer includes a first spacer formed on a sidewall of the gate stack, a second spacer, and a third spacer. The second spacer includes a first portion formed on a sidewall of the first spacer and a second portion formed on the top surface of the substrate. The second portion of the second spacer has a thickness in a first direction that gradually decreases. The third spacer is formed on the second portion of the second spacer and on the top surface of the substrate. The semiconductor device further includes a source/drain region formed in the substrate, and a portion of the third spacer abuts the source/drain region and the second portion of the second spacer.
US11437492B2 Semiconductor device and method of manufacture
Semiconductor devices and methods of manufacturing are presented in which inner spacers for nanostructures are manufactured. In embodiments a dielectric material is deposited for the inner spacer and then treated. The treatment may add material and cause an expansion in volume in order to close any seams that can interfere with subsequent processes.
US11437491B2 Non-conformal capping layer and method forming same
A method includes forming a protruding structure, and forming a non-conformal film on the protruding structure using an Atomic Layer Deposition (ALD) process. The non-conformal film includes a top portion directly over the protruding structure, and a sidewall portion on a sidewall of the protruding structure. The top portion has a first thickness, and the sidewall portion has a second thickness smaller than the first thickness.
US11437486B2 Methods for making bipolar junction transistors including emitter-base and base-collector superlattices
A method for making a bipolar junction transistor (BJT) may include forming a first superlattice on a substrate defining a collector region therein. The first superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a base on the first superlattice, and forming a second superlattice on the base comprising a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include forming an emitter on the second superlattice.
US11437482B2 Field effect transistor, method of fabricating field effect transistor, and electronic device
A field effect transistor (FET), a method of fabricating the field effect transistor, and an electronic device are provided. The field effect transistor comprises: a source and a drain, the source being made of a Dirac material (103); a channel disposed between the source and the drain, and doped opposite to the source; and a gate (106) disposed on the channel and electrically insulated from the channel.
US11437481B2 Semiconductor device with T-shaped buried gate electrode and method for forming the same
The present disclosure provides a semiconductor device with a T-shaped buried gate electrode and a method for forming the semiconductor device. The semiconductor device includes a semiconductor substrate having an active region, and a first gate electrode disposed in the semiconductor substrate. The semiconductor device also includes a first source/drain region and a second source/drain region disposed in the active region and at opposite sides of the first gate electrode. The first gate electrode has a first portion extending across the active region and a second portion extending into the first source/drain region.
US11437476B2 Electrostatic catalysis
An electrode having an embedded charge contains a substrate, a first electronic charge trap defined at the interface of a first insulating layer and a second insulating layer; and a first conductive layer disposed on the first electronic charge trap; wherein the first conductive layer contains a conductive material configured to permit an external electric field to penetrate the electrode from the first electronic charge trap; and wherein the first insulating layer is not the same as the second insulating layer.
US11437474B2 Gate structures in transistors and method of forming same
A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric around the first nanostructure; a second high-k gate dielectric around the second nanostructure; and a gate electrode over the first and second high-k gate dielectrics. The gate electrode includes a first work function metal; a second work function metal over the first work function metal; and a first metal residue at an interface between the first work function metal and the second work function metal, wherein the first metal residue has a metal element that is different than a metal element of the first work function metal.
US11437464B2 Structure and method for forming capacitors for a three-dimensional NAND
Embodiments of a three-dimensional capacitor for a memory device and fabrication methods are disclosed. The method includes forming, on a first side of a first substrate, a peripheral circuitry having a plurality of peripheral devices, a first interconnect layer, a deep well and a first capacitor electrode. The method also includes forming, on a second substrate, a memory array having a plurality of memory cells and a second interconnect layer, and bonding the first interconnect layer of the peripheral circuitry with the second interconnect layer of the memory array. The method further includes forming, on a second side of the first substrate, one or more trenches inside the deep well, disposing a capacitor dielectric layer on sidewalls of the one or more trenches, and forming capacitor contacts on sidewalls of the capacitor dielectric layer inside the one or more trenches.
US11437463B2 Display device
According to one embodiment, a display device comprises a flexible substrate, a first insulating film disposed on the flexible substrate, a switching element disposed on the first insulating film, a signal wiring electrically connected with the switching element, a first organic film disposed on the signal wiring, a connection wiring disposed on the first organic film, a second organic film disposed on the connection wiring and a pad electrode disposed on the second organic film. The connection wiring is located between the first organic film and the second organic film and is in contact with the first organic film and the second organic film.
US11437462B2 Stretchable display device
In one or more embodiments, a stretchable display device includes a lower substrate on which a display area displaying an image and a non-display area adjacent to the display area are defined. A plurality of pixel substrates is disposed in the display area, and a plurality of outer substrates is disposed in the non-display area. A plurality of pixels is disposed on the plurality of pixel substrates. A plurality of gate drivers is disposed on the plurality of outer substrates and outputting gate voltages to the plurality of pixels. Thus, even in a state in which the stretchable display device is stretched, the pixels can be normally driven.
US11437460B2 Display device with substrate hole and data lines in different layers
A display device comprising: first and second pixels; a first data line connected to the first pixel and configured to have data voltages applied thereto; and a second data line connected to the second pixel, the second data line being adjacent to the first data line, and configured to have the data voltages applied thereto, wherein the first data line includes a 1A-th data line which is in a first data layer, and the second data line includes a 2B-th data line which is in a second data layer different from the first data layer.
US11437456B2 Display device including pixels with different types of transistors
A display device may include a plurality of pixels each including a light emitting element. A first scan line and a second scan line, are disposed in each of the pixels. A data line is disposed in each of the pixels. A power line is disposed in each of the pixels. A reference voltage line is disposed in each of the pixels. A first transistor controls a current of the light emitting element. A second transistor is connected between the data line and a first gate electrode of the first transistor. A third transistor is connected between the reference voltage line and a first electrode of the first transistor. A fourth transistor is connected between the power line and a second electrode of the first transistor. The fourth transistor may be a transistor of a type different from that of the first to third transistors.
US11437454B2 Backplane substrate, method of manufacturing the same, and organic light-emitting display device using the same
Disclosed are a backplane substrate that is capable of expressing high gradation even through a small pixel, a method of manufacturing the same, and an organic light-emitting display device using the same. Integration for ultra-high resolution is possible through structural modification.
US11437453B2 Display apparatus
Disclosed are a display apparatus and a method of manufacturing the same. The display apparatus includes a light emitting part including a plurality of light emitting diodes; and a thin film transistor (TFT) panel part configured to drive the plurality of light emitting diodes. The plurality of light emitting diodes are electrically connected to the plurality of TFTs, respectively, by a layer disposed between the light emitting diode part and the TFT panel part.
US11437450B2 Display device and manufacturing method thereof
A display device includes: a substrate; an inorganic insulating layer disposed on the substrate; a conductor disposed on the inorganic insulating layer; and an organic insulating layer disposed on the conductor, where an opening is defined through the organic insulating layer to expose a part of the upper surface of the conductor, and at least one material selected from a siloxane, a thiol, a phosphate, a disulfide including a sulfur series, and an amine is bonded on the part of the upper surface of the conductor exposed through the opening.
US11437447B2 Display device and manufacturing method thereof
Provided are a display device and a manufacturing method thereof. The display device includes an organic light-emitting display panel and a fingerprint identification assembly disposed on a non-light-emitting display side of the organic light-emitting display panel. The fingerprint identification assembly includes a first substrate, a fingerprint identification unit and a light-shielding structure. The fingerprint identification unit and the light-shielding structure are disposed on a same side of the first substrate. The light-shielding structure is disposed between the fingerprint identification unit and the organic light-emitting display panel; the light-shielding structure includes at least two light-shielding layers, each light-shielding layer includes light-transmissive portions and at least one light-shielding portion, and the light-transmissive portions are at least partially surrounded by the light-shielding portion; in a direction perpendicular to the first substrate, positions of light-transmissive portions in one light-shielding layer are in one-to-one correspondence with positions of light-transmissive portions in another one light-shielding layer.
US11437441B2 Display panel including vernier mark for aligning conductive adhesive member, electronic apparatus including the same, and method of manufacturing the electronic apparatus
An electronic apparatus includes a display panel including a base substrate including an active area and a peripheral area adjacent to the active area, pixels on the active area, pads on the peripheral area and arranged in a first direction, signal lines connecting the pixels to the pads, and a vernier mark on the peripheral area and spaced apart from the pads and the signal lines, a circuit board on the display panel and including a base film, and leads on the base film and overlapping with the pads in a plan view, and a conductive adhesive member extending in the first direction and between the display panel and the circuit board to connect the pads to the leads. The conductive adhesive member overlaps with the vernier mark when viewed in a second direction intersecting the first direction.
US11437440B2 Array substrate having detection and compensation lead lines, display apparatus, method of fabricating array substrate, and pixel driving circuit having connection bridge
An array substrate includes an array of a plurality of subpixels including a plurality of columns of subpixels respectively spaced apart by a plurality of inter-subpixel regions; a plurality of pixel driving circuits respectively driving light emission of the plurality of subpixels; and a plurality of detection and compensation lead lines respectively configured to respectively detect signals in the plurality of subpixels and respectively compensate signals in the plurality of subpixels. A respective one of a plurality of detection and compensation lead lines is disposed in a first inter-subpixel region between two directly adjacent columns of subpixels. The respective one of the plurality of detection and compensation lead lines is spaced apart by at least one columns of subpixels from a signal line configured to transmit an alternating current and arranged along a direction parallel to the respective one of the plurality of detection and compensation lead lines.
US11437438B2 Photoelectric conversion devices and organic sensors and electronic devices
A photoelectric conversion device includes a first electrode and a second electrode facing each other, a photoelectric conversion layer between the first electrode and the second electrode and configured to absorb light in at least one part of a wavelength spectrum of light and to convert it into an electric signal, and an inorganic nanolayer between the first electrode and the photoelectric conversion layer and including a lanthanide element, calcium (Ca), potassium (K), aluminum (Al), or an alloy thereof. An organic CMOS image sensor may include the photoelectric conversion device. An electronic device may include the organic CMOS image sensor.
US11437437B2 Electronic device and method for manufacturing electronic device
An electronic device includes a semiconductor memory including material layers each including one or more low-resistance areas and one or more high-resistance areas, insulating layers stacked alternately with the material layers and including protrusions extending more than the material layers, conductive pillars passing through the insulating layers and the low-resistance areas, conductive layers located between the protrusions, and variable resistance layers interposed between the low-resistance areas and the conductive layers.
US11437435B2 On-pitch vias for semiconductor devices and associated devices and systems
Semiconductor devices with on-pitch vias, and associated systems and methods, are disclosed herein. In one embodiment, the semiconductor device may include a 3-dimensional (3D) cross-point memory array. The semiconductor device also includes access lines for the memory array, which couple with on-pitch vias connected to CMOS circuitry disposed underneath the memory array. In some embodiments, a first access line may be coupled with a first via outside a boundary of the memory array, where the first via is separated from the boundary by a first distance and has a first length longitudinal to the first access line. Further, a second access line may be coupled with a second via outside the boundary, where the second via is separated from the boundary by a second distance greater than the first distance and has a second length longitudinal to the second access line, the second length different from the first length.
US11437434B2 Magnetic device and magnetic random access memory
A spin-orbit-torque (SOT) magnetic device includes a bottom metal layer, a first magnetic layer disposed over the bottom metal layer, a spacer layer disposed over the first magnetic layer, and a second magnetic layer disposed over the spacer layer. A diffusion barrier layer for suppressing metal elements of the first magnetic layer from diffusing into the bottom metal layer is disposed between the bottom metal layer and the first magnetic layer.
US11437430B2 Light-emitting device
A light-emitting device includes a substrate with light-emitting units. The light-emitting units include a first light-emitting unit, a second light-emitting unit, and one or more of third light-emitting units. Each of the light-emitting units includes a first semiconductor layer, an active layer and a second semiconductor layer. An insulating layer includes a first insulating layer opening and a second insulating layer opening formed on each of the light-emitting units. A first extension electrode covers the first light-emitting unit and the first extension electrode covers the first insulating layer opening on the first light-emitting unit. A second extension electrode covers the second light-emitting unit and the second extension electrode covers the second insulating layer opening on the second light-emitting unit. First and second electrode pads cover different parts of the light-emitting units.
US11437426B2 Image sensor chip scale packages and related methods
Methods of forming an image sensor chip scale package. Implementations may include providing a semiconductor wafer having a pixel array, forming a first cavity through the wafer and/or one or more layers coupled over the wafer, filling the first cavity with a fill material, planarizing the fill material and/or the one or more layers to form a first surface of the fill material coplanar with a first surface of the one or more layers, and bonding a transparent cover over the fill material and the one or more layers. The bond may be a fusion bond between the transparent cover and a passivation oxide; a fusion bond between the transparent cover and an anti-reflective coating; a bond between the transparent cover and an organic adhesive coupled over the fill material, and/or; a bond between a first metallized surface of the transparent cover and a metallized layer coupled over the wafer.
US11437422B2 Hybrid bonded structure
A hybrid bonded structure including a first integrated circuit component and a second integrated circuit component is provided. The first integrated circuit component includes a first dielectric layer, first conductors and isolation structures. The first conductors and the isolation structures are embedded in the first dielectric layer. The isolation structures are electrically insulated from the first conductors and surround the first conductors. The second integrated circuit component includes a second dielectric layer and second conductors. The second conductors are embedded in the second dielectric layer. The first dielectric layer is bonded to the second dielectric layer and the first conductors are bonded to the second conductors.
US11437421B2 Photoelectric conversion device, image pickup system and method of manufacturing photoelectric conversion device
A photoelectric conversion device includes a first semiconductor substrate including a photoelectric conversion unit for generating a signal charge in accordance with an incident light, and a second semiconductor substrate including a signal processing unit for processing an electrical signal on the basis of the signal charge generated in the photoelectric conversion unit. The signal processing unit is situated in an orthogonal projection area from the photoelectric conversion unit to the second semiconductor substrate. A multilayer film including a plurality of insulator layers is provided between the first semiconductor substrate and the second semiconductor substrate. The thickness of the second semiconductor substrate is smaller than 500 micrometers. The thickness of the second semiconductor substrate is greater than the distance from the second semiconductor substrate and a light-receiving surface of the first semiconductor substrate.
US11437419B2 Light shields for solid-state imaging devices and imaging apparatuses
Image plane phase difference pixels that can handle incident light at two or more chief ray angles are realized. A solid-state imaging device includes a pixel, the pixel including a microlens that condenses light from a subject, a photoelectric conversion unit that receives the subject light condensed by the microlens to generate an electrical signal according to an amount of received light, and a light shielding portion provided between the photoelectric conversion unit and the microlens. The light shielding portion includes an edge portion formed across over a light receiving surface of the photoelectric conversion unit, and the edge portion includes a first edge portion and a second edge portion at positions different from each other both in a first direction corresponding to an up and down direction of an output image and a second direction corresponding to a left and right direction of the output image.
US11437416B2 Pixel device layout to reduce pixel noise
Various embodiments of the present disclosure are directed towards an image sensor including a first photodetector and a second photodetector each disposed within a semiconductor substrate. An isolation structure extends from a front-side surface of the semiconductor substrate to a back-side surface of the semiconductor substrate. The front-side surface is opposite the back-side surface and the isolation structure is laterally between the first and second photodetectors. A readout transistor is disposed on the front-side surface of the semiconductor substrate. A first side of the readout transistor overlies the first photodetector and a second side of the readout transistor overlies the second photodetector. The first side is opposite the second side and the readout transistor continuously extends over the isolation structure.
US11437409B2 Array substrate and manufacturing method thereof, and display device
An array substrate and a manufacturing method thereof, and a display device. The array substrate includes: a base substrate, including a first surface and a second surface opposite to each other, and a through-hole penetrating the base substrate from the first surface to the second surface; a data line on the first surface of the base substrate, the data line being at least partially filled in the through-hole; a thin film transistor on the second surface of the base substrate, the thin film transistor including a source electrode and a drain electrode, and the source electrode being electrically connected to the data line.
US11437401B2 3-dimensional NAND flash memory device, method of fabricating the same, and method of driving the same
A 3-dimensional flash memory device and methods of fabricating and driving the same are provided. The device includes: a channel layer extending over a substrate in a first direction perpendicular to a surface of the substrate; an information storing layer extending along a sidewall of the channel layer in the first direction; control gates each surrounding, the channel layer, with the information storing layer between the channel layer and the control gates; an insulating layer being between the control gates in the first direction and separating the control gates from each other; a fixed charge region disposed at an interface of the insulating layer and the information storing layer or in a portion of the information storing layer between the control gates in the first direction; and a doped region induced by the fixed charge region and disposed at a surface of the channel layer facing the fixed charge region.
US11437399B2 Semiconductor device and manufacturing method of the semiconductor device
A semiconductor device includes a stacked structure including insulating layers and conductive layers alternately stacked on each other, a hard mask pattern located on the stacked structure, a channel structure passing through the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure and each including a first surface and a second surface, wherein the first surface faces each of the insulating layers and is flat and the second surface faces the channel structure and includes a curved surface, and a memory layer interposed between the stacked structure and the channel structure and filling a space between the insulating patterns, wherein a sidewall of each of the conductive layers is located on an extending line of a sidewall of the hard mask pattern and the insulating patterns protrude farther towards the channel structure than the sidewall of the hard mask pattern.
US11437397B2 Three-dimensional semiconductor memory devices
A three-dimensional (3D) semiconductor memory device includes a source conductive pattern on a substrate and extending in parallel to a top surface of the substrate, and an electrode structure including an erase control gate electrode, a ground selection gate electrode, cell gate electrodes, and a string selection gate electrode, which are sequentially stacked on the source conductive pattern in a first direction perpendicular to the top surface of the substrate.
US11437395B2 Electronic device and method for fabricating the same
A semiconductor memory includes: a substrate including a cell region, first and second peripheral circuit regions disposed on two sides of the cell region; first lines extending across the cell region and the first peripheral circuit region; second lines disposed over the first lines and extending across the cell region and the second peripheral circuit region; a contact plug disposed in the second peripheral circuit region and connected to the second line; third lines disposed over the second lines and respectively overlapping the second lines; and first memory cells disposed in the cell region and located at intersections of the first lines and the second lines between the first lines and the second lines, wherein a portion of the third line, located in the cell region contacts the second line, and another portion of the third line located over the contact plug is spaced apart from the second line.
US11437394B2 Semiconductor memory device
According to one embodiment, a semiconductor memory device includes: a stacked structure including a plurality of first layers stacked with a second layer therebetween above a substrate having a memory region in which a plurality of memory cells are arranged and an outer edge portion surrounding the memory region, the stacked structure having a stepped portion at which ends of the first layers form a stepped shape at an end of the stacked structure in a first direction within the memory region, wherein at least some of the first layers among the plurality of first layers extend, along a second direction perpendicular to the first direction, from above the outer edge portion at a first end side of the substrate through above the memory region over the substrate to above the outer edge portion at a second end side of the substrate.
US11437391B2 Methods of forming microelectronic devices, and related microelectronic devices and electronic systems
A method of forming a microelectronic device comprises forming a stack structure. Pillar structures are formed to vertically extend through the stack structure. At least one trench and additional trenches are formed to substantially vertically extend through the stack structure. Each of the additional trenches comprises a first portion having a first width, and a second portion at a horizontal boundary of the first portion and having a second width greater than the first width. A dielectric structure is formed within the at least one trench and the additional trenches. The dielectric structure comprises at least one angled portion proximate the horizontal boundary of the first portion of at least some of the additional trenches. The at least one angled portion extends at an acute angle to each of a first direction and a second direction transverse to the first direction. Microelectronic devices and electronic systems are also described.
US11437390B2 Semiconductor device and method of manufacturing the same
Provided herein may be a semiconductor device. The semiconductor device may include a stack. The semiconductor device may include channel layers including channel patterns passing through the stack, dummy channel patterns passing through the stack, and a coupling pattern which may be disposed below the stack and couples the channel patterns with the dummy channel patterns. The semiconductor device may include a bit line which is disposed on the stack and coupled with the channel patterns. The semiconductor device may include a well pick-up line which is disposed on the stack and coupled with the dummy channel patterns.
US11437383B1 Method for fabricating dynamic random access memory devices
The present disclosure provides a method for fabricating DRAM devices with cylinder-type stacked capacitors. By utilizing offsetting of a first lattice pattern on a second silicon nitride layer (i.e., a middle silicon nitride layer) and a second lattice pattern on a third silicon nitride layer (i.e., a top silicon nitride layer), a collapse or deformation phenomenon of bottom electrodes of stacked capacitors can be reduced or eliminated. The wobbling phenomenon of bottom electrodes of stacked capacitors can be significantly reduced.
US11437381B2 Integrated assemblies having voltage sources coupled to shields and/or plate electrodes through capacitors
Some embodiments include an integrated assembly having first conductive lines which extend along a first direction, and having second conductive lines over the first conductive lines and which extend along a second direction that crosses the first direction. Capacitors are over the second conductive lines. The second conductive lines are operatively proximate active structures to gatedly couple a first set of the capacitors to the first conductive lines through the active structures. Shield structures are between the first conductive lines and extend along the first direction. A voltage source is electrically coupled to the shield structures through a second set of the capacitors. Some embodiments include assemblies having two or more decks stacked one atop another.
US11437380B2 Semiconductor memory device and method of manufacturing the same
A semiconductor memory device including first-first conductive lines on a substrate; second-first conductive lines on the first-first conductive lines; first contacts connected to the first-first conductive lines; and second contacts connected to the second-first conductive lines, wherein the first-first conductive lines protrude in a first direction beyond the second-first conductive lines; the first-first conductive lines include first regions having a first thickness, second regions having a second thickness, the second thickness being greater than the first thickness, and third regions having a third thickness, the third thickness being smaller than the first thickness and smaller than the second thickness, and the second regions of the first-first conductive lines are between the first regions of the first-first conductive lines and the third regions of the first-first conductive lines.
US11437372B2 Liner structures
A semiconductor device includes a fin structure over a substrate. The fin structure includes a bottom portion and a top portion. The bottom and the top portions have different materials. The device also includes a liner layer on a sidewall of the bottom portion, a dielectric layer on side surfaces of the liner layer, an interfacial layer, and a gate structure over the dielectric layer and engages the fin structure. A top surface of the liner layer extends below a bottom surface of the top portion. The interfacial layer has a first section on and directly contacting sidewall surfaces of the bottom portion and a second section on and directly contacting top and sidewall surfaces of the top portion. The gate structure includes a high-k dielectric layer and a metal gate electrode over the high-k dielectric layer. The high-k dielectric layer directly contacts the first section of the interfacial layer.
US11437371B2 Field effect transistors with negative capacitance layers
The present disclosure describes a method includes forming a fin structure including a fin base portion and a stacked fin portion on a substrate. The stacked fin portion includes a first semiconductor layer on the fin base portion, a second semiconductor layer above the first semiconductor layer, and a sacrificial semiconductor layer between the first and second semiconductor layers. The method further includes replacing the sacrificial semiconductor layer with a negative capacitance (NC) layer and forming gate electrodes around the NC layer, the first semiconductor layer, and the second semiconductor layer. The NC layer includes an NC dielectric material.
US11437366B2 Tunable passive semiconductor elements
Passive semiconductor components and switches may be formed directly in, on, about, or across each of two or more semiconductor dies included in a stacked-die semiconductor package. At least some of the passive semiconductor components and/or switches may be formed in redistribution layers operably coupled to corresponding semiconductor dies included in the stacked-die semiconductor package. The switches may have multiple operating states and may be operably coupled to the passive semiconductor components such that one or more passive semiconductor components may be selectively included in one or more circuits or excluded from one or more circuits. The switches may be manually controlled or autonomously controlled using one or more control circuits. The one or more control circuits may receive one or more input signals containing host system information and/or data that is used to adjust or set the operating state of at least some of the switches.
US11437365B2 Device of protection against electrostatic discharges
A semiconductor substrate of a first conductivity type is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is formed an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are provided in the semiconductor layer. A second region of the second conductivity type is formed in the first well. A third region of the second conductivity type is formed in the second well. The first well, the semiconducting layer, the second well and the third region form a first lateral thyristor. The second well, the semiconductor layer, the first well and the second region form a second lateral thyristor. The buried region and semiconductor substrate form a zener diode which sets the trigger voltage for the lateral thyristors.
US11437364B2 Diode design on FinFET device
An electrostatic discharge (ESD) protection device includes a semiconductor substrate including a first region of a first conductivity type and a second region of a second conductivity type opposite the first conductivity type, the first region and the second region being adjacent to each other and forming a pn junction in the semiconductor substrate, a semiconductor fin on the semiconductor substrate, and an electrode on the semiconductor fin. The pn junction in the semiconductor substrate has a relatively large area to prevent local hot spots from occurring when a current flows through the ESD protection device, thereby reducing performance degradation of a semiconductor device.
US11437363B2 Diode, transistor and display device
A diode having a simple structure and a simple manufacturing method of the diode are provided. A diode including: a semiconductor layer having a first region and a second region having a resistance lower than a resistance of the first region; a first insulating layer having a first aperture portion and a second aperture portion and covering the semiconductor layer other than the first aperture and the second aperture, the first aperture portion exposing the semiconductor layer in the first region, the second aperture portion exposing the semiconductor layer in the second region; a first conductive layer connected to the semiconductor layer in the first aperture portion and overlapping with the semiconductor layer in the first region via the first insulating layer in a planar view; and a second conductive layer connected to the semiconductor layer in the second aperture.
US11437359B2 Offset-aligned three-dimensional integrated circuit
A method for manufacturing a three-dimensional integrated circuit includes attaching a first side of a first die to a first carrier wafer. The method includes preparing a second side of the first die to generate a prepared second side of the first die. The method includes attaching the prepared second side of the first die to a second carrier wafer. The method includes removing the first carrier wafer from the first side of the first die to form a transitional three-dimensional integrated circuit. The method includes attaching a third carrier wafer to a first side of the transitional three-dimensional integrated circuit. The method includes attaching a first side of the second die to a second side of the transitional three-dimensional integrated circuit.
US11437358B2 Organic light emitting diode display device and method of manufacturing thereof
An organic light emitting diode (OLED) display device is provided. The OLED display device includes a display panel and a camera. A first alignment mark is formed on a low pixel density area of the display panel, a second alignment mark is formed in the camera, and arrangements of the first alignment mark and the second alignment mark are consistent. Therefore, an alignment accuracy between the camera and the display panel is improved, and a purpose of adopting a blind hole in the area where the camera is mounted on the display device and displaying normally is achieved.
US11437357B2 Display panel and display device
A display panel and a display device are disclosed. The display panel includes a first substrate and a camera assembly. The first substrate includes a display area and a non-display area. The display area includes a flexible base substrate, a pixel array layer, a light-emitting layer, and a touch layer all sequentially disposed in a stacked arrangement. The camera assembly is disposed on a side of the display area adjacent to the flexible base substrate, so that an opening of the camera assembly of the display panel can be omitted, and a screen ratio of the display panel and the display device can be increased.
US11437356B2 Display module and display apparatus having the same
A display module is provided. The display module includes a substrate including a thin film transistor (TFT) layer including a plurality of TFTs, a plurality of light emitting diodes (LEDs) arranged on a front surface of the substrate, each LED corresponding to a respective TFT, and an operation driver that is connected to a rear surface of the substrate and controls an operation of the TFTs. The substrate includes a plurality of first via holes extending in a vertical direction from the front surface of the substrate to the rear surface of the substrate. The first via holes are filled with conductive materials and are distributively arranged based on at least one of the columns or rows of the plurality of LEDs. The first via holes connect the TFTs to the operation driver.
US11437347B2 Hybrid memory structure
A hybrid memory structure including a substrate, a flash memory, a first resistive random access memory (RRAM), and a second RRAM is provided. The flash memory is located on the substrate. The flash memory includes a gate, a first doped region, and a second doped region. The gate is located on the substrate. The first doped region is located in the substrate on one side of the gate. The second doped region is located in the substrate on another side of the gate. The first RRAM is electrically connected to one of the gate, the first doped region, and the second doped region. The second RRAM is electrically connected to another of the gate, the first doped region, and the second doped region.
US11437346B2 Package structure having substrate thermal vent structures for inductor cooling
Embodiments include a microelectronic device package structure having an inductor within a portion of a substrate, wherein the inductor is at least partially embedded within the substrate. One or more thermal vent structures extend through at least one of the substrate or a board attached to the substrate. The one or more thermal vent structures provide a thermal pathway for cooling for the inductor.
US11437342B2 Semiconductor packages and manufacturing methods for the same
A semiconductor package and a fabrication method of the semiconductor package are disclosed. First and second redistribution layer patterns are formed on a semiconductor substrate including a chip region and a scribe lane region to provide a bonding pad portion and an edge pad portion, respectively. A polymer pattern is formed to reveal the bonding pad portion and a portion of the edge pad portion. A dicing line is set on the scribe lane region. A stealth dicing process is performed along the dicing line to separate a semiconductor chip including the bonding pad portion from the semiconductor substrate. The semiconductor chip is disposed on a package substrate. A bonding wire is formed to connect the bonding pad portion to the package substrate. The bonding wire is supported by an edge of the polymer pattern to be spaced apart from the revealed portion of the edge pad portion.
US11437341B2 Semiconductor device
A semiconductor device comprises two memory chips, one control chip controlling each memory chip, a signal transmission path through which a signal transmission between the control chip and each memory chip is performed, and a capacitance coupled onto the signal transmission path. Also, the capacitance (capacitor element) is larger than each parasitic capacitance parasitic on each chip. Accordingly, it is possible to perform the signal transmission of the semiconductor device at high speed.
US11437329B2 Anti-tamper x-ray blocking package
The present disclosure relates to integrated circuits, and more particularly, to an anti-tamper x-ray blocking package for secure integrated circuits and methods of manufacture and operation. In particular, the present disclosure relates to a structure including: one or more devices on a front side of a semiconductor material; a plurality of patterned metal layers under the one or more devices, located and structured to protect the one or more devices from an active intrusion; an insulator layer between the plurality of patterned metal layers; and at least one contact providing an electrical connection through the semiconductor material to a front side of the plurality of metals.
US11437325B2 Electronic device, electronic package and packaging substrate thereof
An electronic package is provided and has a packaging substrate including a ground pad and a power pad. The power pad surrounds at least three directions of the ground pad so as to increase the footprint of the power pad on the packaging substrate, thereby avoiding cracking of an electronic element disposed on the packaging substrate and effectively reducing the voltage drop.
US11437322B2 Semiconductor device package
A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.
US11437316B2 Folded cell layout for 6T SRAM cell
A layout for a 6T SRAM cell is disclosed. The cell layout takes a conventional 6T SRAM cell layout and restructures the layout into a more square cell layout with a single p-channel and a single n-channel across the width of the cell. Restructuring the cell layout reduces the height of wordlines and allows dual wordlines to be placed in the cell to reduce wordline resistance in the cell. Dual pairs of bitlines may also be placed in separate metal layers in the cell layout to reduce bitline resistance.
US11437314B2 Semiconductor device with anti-fuse and metal-insulator-metal (MIM) capacitor connected to redistribution layer (RDL) and method for forming the same
The present disclosure provides a semiconductor device with an anti-fuse and a metal-insulator-metal (MIM) capacitor connected to a redistribution layer (RDL) and a method for forming the semiconductor device. The semiconductor device includes a first conductive portion and a second conductive portion disposed over a semiconductor substrate. The semiconductor device also includes a passivation layer covering the first conductive portion and the second conductive portion. The first conductive portion, the second conductive portion and a portion of the passivation layer therebetween form an anti-fuse. The semiconductor device further includes a first metal-insulator-metal (MIM) capacitor and a first redistribution layer (RDL) disposed over the passivation layer. The first MIM capacitor and the first RDL are electrically connected to the first conductive portion, and a first metal layer of the first MIM capacitor is integrally formed with the first RDL.
US11437313B2 Structure and method of forming a semiconductor device with resistive elements
A method of forming a semiconductor device includes forming a conductive feature and a first punch stop layer, where the conductive feature has a first top surface, and where the first punch stop layer has a second top surface that is substantially level with the first top surface. The method further includes forming a resistive element over the first punch stop layer. The method further includes etching through a first portion of the resistive element to form a first trench that exposes both the second top surface of the first punch stop layer and a first sidewall surface of the resistive element. The method further includes forming a first conductive via within the first trench, where the first conductive via contacts the first sidewall surface of the resistive element.
US11437307B2 Device comprising first solder interconnects aligned in a first direction and second solder interconnects aligned in a second direction
A device that includes a first die and a package substrate. The package substrate includes a dielectric layer, a plurality of vias formed in the dielectric layer, a first plurality of interconnects formed on a first metal layer of the package substrate, and a second plurality of interconnects formed on a second metal layer of the package substrate. The device includes a first series of first solder interconnects arranged in a first direction, the first series of first solder interconnects configured to provide a first electrical connection; a second series of first solder interconnects arranged in the first direction, the second series of first solder interconnects configured to provide a second electrical connection; a first series of second solder interconnects arranged in a second direction, the first series of second solder interconnects configured to provide the first electrical connection.
US11437306B2 Electronics unit with integrated metallic pattern
A non-conductive encapsulation cover is mounted on a support face of a support substrate to delimit, with the support substrate, an internal housing. An integrated circuit chip is mounted to the support substrate within the internal housing. A metal pattern is mounted to an internal wall of the non-conductive encapsulation cover in a position facing the support face. At least two U-shaped metal wires are provided within the internal housing, located to a side of the integrated circuit chip, and fixed at one end to the metallic pattern and at another end to the support face.
US11437305B2 Semiconductor module
A semiconductor module includes: semiconductor devices; a resin mold that integrally seals the semiconductor devices; and external terminals that are disposed at a lateral side of the resin mold along a direction perpendicular to a thickness direction of the semiconductor devices. Each semiconductor device includes an insulated gate semiconductor device having a gate electrode, a first electrode, and a second electrode. In the insulated gate semiconductor device, carriers move from the first electrode to the second electrode through a channel provided by a voltage applied to the gate electrode. The external terminals include: a gate terminal electrically connected to the gate electrode; a first terminal electrically connected to the first electrode; and a second terminal electrically connected to the second electrode. The gate terminal and the second terminal, which are electrically connected to an identical semiconductor device, are not adjacent to each other.
US11437301B2 Device with an etch stop layer and method therefor
A device includes a substrate, an insulating layer that includes an etch stop layer formed over an upper surface of the substrate, a first conductive region formed over the insulating layer, and an opening formed within the substrate that extends from a lower surface of the substrate, through the upper surface of the substrate, and through at least a portion the insulating layer, terminating on the first conductive region. A method for forming the device includes forming the substrate, forming the insulating layer that includes the etch stop layer over the upper surface of the substrate, forming a first conductive region over the insulating layer; and forming an opening within the substrate that extends from the lower surface of the substrate, through the upper surface of the substrate, and through at least a portion the insulating layer, terminating on the first conductive region formed over the insulating layer.
US11437299B2 Semiconductor apparatus and method of manufacturing the same
A semiconductor apparatus comprising a first substrate that has a first surface and a second surface and is provided with a through hole extending through from the first surface to the second surface and an insulating layer and a conductive member that are provided in the through hole is provided. The through hole includes a first opening formed in the first substrate and a second opening provided between the first opening and the second surface. The first opening and the second opening each have a tapered shape whose opening width decreases from the first surface to the second surface, and a first taper angle formed by a side surface of the first opening and a plane parallel to the second surface is smaller than a second taper angle formed by a side surface of the second opening and a plane parallel to the second surface.
US11437294B2 Structures to facilitate heat transfer within package layers to thermal heat sink and motherboard
Embodiments disclosed herein include electronics packages with improved thermal pathways. In an embodiment, an electronics package includes a package substrate. In an embodiment, the package substrate comprises a plurality of backside layers, a plurality of front-side layers, and a core layer between the plurality of backside layers and the plurality of front-side layers. In an embodiment, an inductor is embedded in the plurality of backside layers. In an embodiment, a plurality of bumps are formed over the front-side layers and thermally coupled to the inductor. In an embodiment, the plurality of bumps are thermally coupled to the core layer by a plurality of vias.
US11437293B2 Semiconductor packages having a dam structure
A semiconductor package is disclosed. The disclosed semiconductor package includes a substrate having bonding pads at an upper surface thereof, a lower semiconductor chip, at least one upper semiconductor chip disposed on the lower semiconductor chip, and a dam structure having a closed loop shape surrounding the lower semiconductor chip. The dam structure includes narrow and wide dams disposed between the lower semiconductor chip and the bonding pads. The wide dam has a greater inner width than the narrow dam. The semiconductor packages further includes an underfill disposed inside the dam structure and being filled between the substrate and the lower semiconductor chip.
US11437290B2 Electronic component built-in wiring board and method for manufacturing the same
An electronic component built-in wiring board includes a substrate having a cavity, an electronic component accommodated in the cavity of the substrate and having pads on a surface of the component, a coating insulating layer formed on the substrate such that the insulating layer is covering the component and has via holes, via conductors formed in the via holes such that the via conductors are penetrating through the insulating layer, and a resin coating formed between the component and the insulating layer and having through holes such that the through holes are partially exposing the pads in the via holes and that the coating has adhesion to the component that is stronger than adhesion of the insulating layer to the component. The via conductors are formed in the via holes and the through holes such that the via conductors are connected to the pads on the surface of the component.
US11437288B2 Display device
A display device includes a substrate, a light-emitting element, and a transistor. The substrate has a top surface. The light-emitting element is disposed on the substrate, and includes a first electrode and a second electrode. The transistor is disposed on the substrate and electrically connected to the light-emitting element. The transistor includes a gate electrode and a semiconductor layer. The semiconductor layer includes an overlapping portion overlapped with the gate electrode. The first electrode and the second electrode of the light-emitting element do not overlap with the overlapping portion along a direction perpendicular to the top surface of the substrate.
US11437287B2 Transistor gates and methods of forming thereof
A device includes a semiconductor substrate and a first gate stack over the semiconductor substrate, the first gate stack being between a first gate spacer and a second gate spacer. The device further includes a second gate stack over the semiconductor substrate between the first gate spacer and the second gate spacer and a dielectric material separating the first gate stack from the second gate stack. The dielectric material is at least partially between the first gate spacer and the second gate spacer, a first width of an upper portion of the dielectric material is greater than a second width of a lower portion of the dielectric material, and a third width of an upper portion of the first gate spacer is less than a fourth width of a lower portion of the first gate spacer.
US11437284B2 Contact over active gate structure
Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.
US11437281B2 Method for manufacturing semiconductor device and semiconductor device thereby formed
The present disclosure provides a method for manufacturing semiconductor device and a semiconductor device formed using same. The method includes: preparing a substrate; forming a pad oxide layer and a barrier layer on the substrate, the barrier layer is disposed on the pad oxide layer; forming a plurality of shallow trench isolation structures in the substrate to form multiple regions in the substrate; removing a part of the barrier layer to form a recess, the recess is set in any one of the multiple regions, and a region directly below the recess is defined as a high voltage device region; and forming a gate oxide layer in the recess, and removing the barrier layer. The method provided in the present disclosure simplifies the manufacturing process and reduces the production costs.
US11437280B2 Semiconductor device and method of manufacture
A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
US11437279B1 Method for fabricating a semiconductor device
During a front side process of a wafer, a hard mask layer is formed under a metal portion of a semiconductor device, and an epitaxial layer is deposited to form epitaxial portions of the semiconductor device. In a back side process of the wafer to cut the epitaxial layer, the metal portion is covered and protected by the hard mask layer from damages during etching of the epitaxial layer.
US11437278B2 Method for forming semiconductor device
A method of forming a semiconductor device includes forming a gate structure over first and second fins over a substrate; forming an interlayer dielectric layer surrounding first and second fins; etching a first trench in the interlayer dielectric layer between the first and second fins uncovered by the gate structure; forming a helmet layer lining the first trench; and forming a dielectric feature in the first trench.
US11437274B2 Fully self-aligned via
Apparatuses and methods to provide a fully self-aligned via are described. A first metallization layer comprises a set of first conductive lines extending along a first direction on a first insulating layer on a substrate, the set of first conductive lines recessed below a top portion of the first insulating layer. A capping layer is on the first insulating layer, and a second insulating layer is on the capping layer. A second metallization layer comprises a set of second conductive lines on the second insulating layer and on a third insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. At least one via is between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines. The tapering angle of the via opening may be in a range of from about 60° to about 120°.
US11437272B2 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a first semiconductor layer, an insulating layer, and a second semiconductor layer; forming an active device on the substrate; forming an interlayer dielectric (ILD) layer on the substrate and the active device; forming a first contact plug in the ILD layer to electrically connect the active device; and forming a second contact plug in the ILD layer and the insulating layer after forming the first contact plug.
US11437262B2 Wafer de-chucking detection and arcing prevention
Methods and systems of detection of wafer de-chucking in a semiconductor processing chamber are disclosed. Methods and systems of interdiction are also disclosed to prevent hardware and wafer damage during semiconductor fabrication if and when de-chucking is detected. In one embodiment, a de-chucking detection method is based on measuring change in imaginary impedance of a plasma circuit, along with measuring one or both of reflected RF power and arc count. In another embodiment, a possibility of imminent de-chucking is detected even before complete de-chucking occurs by analyzing the signature change in imaginary impedance.
US11437260B2 Heater for semiconductor manufacturing apparatus
A heater for a semiconductor manufacturing apparatus, the heater includes an AlN ceramic substrate and a heating element embedded inside the AlN ceramic substrate. The AlN ceramic substrate contains O, C, Ti, Ca, and Y as impurity elements, includes an yttrium aluminate phase as a crystal phase, and has a Ti/Ca mass ratio of 0.13 or more, and a TiN phase is not detected in an XRD profile measured with Cu K-α radiation.
US11437259B2 Stage, stage manufacturing method, and heat exchanger
A stage includes a plate and a heat exchanger. The plate has a front surface, on which a substrate is mounted, and a rear surface. The heat exchanger is configured to individually supply a heat exchange medium to a plurality of two-dimensionally distributed and mutually non-inclusive regions of the rear surface of the plate and to recover the heat exchange medium thus supplied.
US11437255B2 Epitaxial III-N nanoribbon structures for device fabrication
A structure, comprising an island comprising a III-N material. The island extends over a substrate and has a sloped sidewall. A cap comprising a III-N material extends laterally from a top surface and overhangs the sidewall of the island. A device, such as a transistor, light emitting diode, or resonator, may be formed within, or over, the cap.
US11437254B2 Sequencer time leaping execution
A method includes receiving a plurality of operations in a sequence recipe. The plurality of operations are associated with processing a plurality of substrates in a substrate processing system. The method further includes identifying a plurality of completion times corresponding to the plurality of operations. Each completion time of the plurality of completion times corresponds to completion of a respective operation of the plurality of operations. The method further includes simulating the plurality of operations by setting a virtual time axis to each of the plurality of completion times to generate a schedule for the sequence recipe. The method further includes causing, based on the schedule, the plurality of substrates to be processed or performance of a corrective action.
US11437251B2 Substrate processing apparatus for producing mixed processing liquid
A substrate processing apparatus includes: a substrate holder configured to hold a substrate; a processing liquid supply part configured to supply a processing liquid to the substrate held by the substrate holder; a chemical liquid supply part configured to supply a chemical liquid as a component of the processing liquid to the processing liquid supply part; a pure water supply part configured to supply pure water as a component of the processing liquid to the processing liquid supply part; a low-dielectric constant solvent supply part configured to supply a low-dielectric constant solvent as a component of the processing liquid to the processing liquid supply part; and a controller configured to control a ratio of the chemical liquid, the pure water, and the low-dielectric constant solvent contained in the processing liquid by controlling the chemical liquid supply part, the pure water supply part, the low-dielectric constant solvent supply part.
US11437247B2 Semiconductor package structure and method for manufacturing the same
A semiconductor package structure and a method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a conductive base, a first semiconductor die, a first conductive pillar, and a first encapsulant. The conductive base has a first surface. The first semiconductor die is disposed on the first surface of the conductive base. The first conductive pillar is disposed on the first semiconductor die. The first encapsulant is disposed on the first surface of the conductive base. The first encapsulant encapsulates the first semiconductor die. The first encapsulant includes an opening defined by the first conductive pillar.
US11437245B2 Germanium hump reduction
The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.
US11437243B2 Mask material for plasma dicing, mask-integrated surface protective tape and method of producing semiconductor chip
A mask material for plasma dicing, which is used in a plasma step, whose surface roughness Rz at the surface side that does not touch with an adherend is from 0.1 μm to 1.5 μm; a mask-integrated surface protective tape; and a method of producing a semiconductor chip.
US11437242B2 Selective removal of silicon-containing materials
Exemplary methods of etching semiconductor substrates may include flowing a fluorine-containing precursor into a processing region of a semiconductor processing chamber. The processing region may house a substrate having an exposed region of a first silicon-containing material and an exposed region of a second silicon-containing material. The second silicon-containing material may be exposed within a recessed feature defined by the substrate. The methods may include flowing a silicon-containing precursor into the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the semiconductor processing chamber to generate plasma effluents of the fluorine-containing precursor and the silicon-containing precursor. The methods may include contacting the substrate with the plasma effluents. The methods may include removing at least a portion of the second silicon-containing material.
US11437240B2 Transistor gate structure and method of forming
A device includes a first nanostructure; a second nanostructure over the first nanostructure; a high-k gate dielectric around the first nanostructure and the second nanostructure, the high-k gate dielectric having a first portion on a top surface of the first nanostructure and a second portion on a bottom surface of the second nanostructure; and a gate electrode over the high-k gate dielectric. The gate electrode comprises: a first work function metal around the first nanostructure and the second nanostructure, the first work function metal filling a region between the first portion of the high-k gate dielectric and the second portion of the high-k gate dielectric; and a tungsten layer over the first work function metal, the tungsten layer being free of fluorine.
US11437223B2 Stage and plasma processing apparatus
A stage includes an electrostatic chuck that supports a substrate and an edge ring; and a base that supports the electrostatic chuck. The electrostatic chuck includes a first region having a first upper surface and supports the substrate placed on the first upper surface; a second region having a second upper surface, provided integrally around the first region, and supports the edge ring placed on the second upper surface; a first electrode provided in the first region to apply a DC voltage; a second electrode provided in the second region to apply a DC voltage, and a third electrode to apply a bias power.
US11437222B2 Plasma processing apparatus and method of manufacturing semiconductor device using the same
A plasma processing apparatus includes a process chamber having an inner space, an electrostatic chuck in the process chamber and to which a substrate is mounted, a gas injection unit to inject a process gas into the process chamber at a side of the process chamber, a plasma applying unit to transform the process gas injected into the process chamber into plasma, and a plasma adjusting unit disposed around the electrostatic chuck and operative to adjust the density of the plasma across the substrate.
US11437221B2 Spatial monitoring and control of plasma processing environments
Systems and methods for plasma processing are disclosed. An exemplary system may include a plasma processing chamber comprising a source to produce a plasma in the processing chamber and at least two bias electrodes arranged within the plasma processing chamber to control plasma sheaths proximate to the bias electrodes. A chuck is disposed to support a substrate, and a source generator is coupled to the plasma electrode. At least one bias supply is coupled to the at least two bias electrodes, and a controller is included to control the at least one bias supply to control the plasma sheaths proximate to the bias electrodes.
US11437213B2 Electron emission source based on graphene layer and method for making the same
An electron emission source is provided. The electron emission source includes a first electrode, an insulating layer, and a second electrode. The first electrode, the insulating layer, and the second electrode are successively stacked with each other. the second electrode is a graphene layer, and the graphene layer is an electron emission end to emit electron. A thickness of the graphene layer ranges from about 0.1 nanometers to about 50 nanometers.
US11437211B2 Solid-state circuit breaker with self-diagnostic, self-maintenance, and self-protection capabilities
A solid-state circuit breaker (SSCB) with self-diagnostic, self-maintenance, and self-protection capabilities includes: a power semiconductor device; an air gap disconnect unit connected in series with the power semiconductor device; a sense and drive circuit that switches the power semiconductor device OFF upon detecting a short circuit or overload of unacceptably long duration; and a microcontroller unit (MCU) that triggers the air gap disconnect unit to form an air gap and galvanically isolate an attached load, after the sense and drive circuit switches the power semiconductor device OFF. The MCU is further configured to monitor the operability of the air gap disconnect unit, the power semiconductor device, and other critical components of the SSCB and, when applicable, take corrective actions to prevent the SSCB and the connected load from being damaged or destroyed and/or to protect persons and the environment from being exposed to hazardous electrical conditions.
US11437206B2 Waterproof pressing structure and membrane switch circuit board using the same
A waterproof pressing structure including a first membrane, at least one first contact, a second membrane, at least one second contact, an insulation layer and a hydrophobic material is provided. The first contact is located on the first membrane, the second contact is located on the second membrane, and the insulation layer is interposed between the first membrane and the second membrane, wherein the first membrane, the second membrane and the insulation layer are stacked in a vertical direction, and the hydrophobic material is respectively formed on the two surfaces of the first contact and the second contact to form a low surface tension zone between the first contact and the second contact.
US11437201B2 Key structure
A key structure includes a keycap and a connecting member. The keycap has a bottom surface and includes a fixing portion and an elastic arm. The fixing portion is disposed on the bottom surface, and the fixing portion has a connection hole and a first opening communicating with each other. At least one end of the elastic arm connects to a side surface of the fixing portion, and the elastic arm is adjacent to the first opening. The elastic arm has an open end communicating with the opening and a limiting surface toward the bottom surface. The connecting member includes a connection pin, one end of which connects to the connection hole and the other end of which has an extension portion. The connection pin is disposed in the connection hole, and the extension portion is disposed between the bottom surface and the limiting surface.
US11437196B2 Multilayer ceramic substrate and probe card including same
A multilayer ceramic substrate includes a first insulating portion including a body of a ceramic material, a first via conductor penetrating through the body, and a first internal wiring layer and a first connection pad connected to the first via conductor, and a second insulating portion including a body of an anodized oxide material, a second via conductor penetrating through the body, and a second internal wiring layer and a second connection pad connected to the second via conductor.
US11437195B2 Multilayer ceramic electronic component and manufacturing method therefor
A multilayer ceramic electronic component includes a ceramic main body including a functional part in which first internal electrodes and second internal electrodes are laminated in a vertical direction, end margin parts provided respectively between a first end surface of the ceramic main body and the second internal electrodes and between a second end surface of the ceramic main body and the first internal electrodes, and side margin parts that respectively cover the functional part from sides. The electronic component further includes external electrodes respectively provided on the first end surface and the second end surface. The end margin parts contain boron (B), and the side margin parts contain silicon (Si) and boron. A concentration of boron in the side margin parts is less than a concentration of boron in the end margin parts.
US11437194B2 Multi-layer ceramic electronic component and method of producing a multi-layer ceramic electronic component
A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction, and internal electrodes disposed between the ceramic layers, positions of end portions of the internal electrodes in a second direction orthogonal to the first direction being aligned with one another within a range of 0.5 μm in the second direction. The side margin includes a center portion in the first direction and a third direction orthogonal to the first direction and the second direction, and corner portions in the first direction and the third direction, the corner portions having a lower porosity than a porosity of the center portion, the side margin covering the multi-layer unit from the second direction.
US11437187B2 Tablet computer stand with near field coupling enhancement
A tablet stand is disclosed which incorporates a near field antenna configuration which couples to a near field antenna in the back of a tablet and provides a near field antenna coupling region for near field communication at the front of the tablet. The stand may be completely passive and use conductive antenna elements and passive resonance matching circuit elements to provide efficient coupling. In another aspect a thin profile passive keyboard adapted for use with a near field enabled tablet is provided. In another aspect a mounting bracket or holder, embedded antenna, and passive keyboard combination is provided adapted for converting a tablet into a notebook type configuration.
US11437184B2 Inductor
An inductor includes a base body and a metal body. The base body contains magnetic powder. The metal body includes first and second metal units. The first metal unit passes through inside the base body. The second metal unit is continuously provided from both ends of the first metal unit and protrudes from the base body to outside. The second metal unit is used as an outer electrode. In a cross section cut along a direction substantially perpendicular to the longitudinal direction of the first metal unit, the length of external shape lines of the sectional configuration of the first metal unit is about 1000 to 1800 μm, and the area surrounded by the external shape lines is about 40000 to 112500 μm2.
US11437177B2 Coil component and manufacturing method for same
In a coil component, a plate-shaped core is fixed to first and second flanges of a drum-shaped core with an adhesive interposed therebetween in a state that a lower principal surface of the plate-shaped core faces top surfaces of the first and second flanges. The adhesive is made of a hardened epoxy-based resin containing dicyandiamide.
US11437176B2 Electronic passive component having marking area for tracing production history
An electronic component includes a member with marking having at least one marking area to be processed digitally, as well as a member other than the member with marking. The marking allows for tracing the production history of individual electronic components.
US11437170B2 Self-extinguishing power cable with microcapsules and method for manufacturing same
Disclosed is a self-extinguishing power cable with microcapsules and a method for manufacturing the same. A method of manufacturing a self-extinguishing power cable with a microcapsule, the method includes applying a mixed solution of water-soluble adhesive, a magnetic powder and a swellable powder on one surface of a first nonwoven fabric; magnetically treating and drying the first nonwoven fabric; pressing one surface of a second nonwoven fabric on the one surface of the first nonwoven fabric to form a single nonwoven fabric; and forming the single nonwoven fabric into a neutral conductor water blocking layer of an electrical power cable to manufacture the electrical power cable, wherein the microcapsule is provided between the first nonwoven fabric and the second nonwoven fabric.
US11437164B2 Electrical cable and arrangement comprising an electrical cable
An electrical cable includes a plurality of electrical lines extending from a first section to a third section through a second section. Each electrical line is enveloped by an insulating sheath. The electrical lines are arranged side-by-side in the first section in a first plane and in the third section in a third plane. The insulating sheath is integrally formed as a first insulating section in the first section and as a third insulating section in the third section. The insulating sheath is divided into a first further insulating section and a second further insulating section in the second section that are separated from each other by a gap. The first further insulating section is guided from the first insulating section to the third insulating section in a first arcuate path and the second further insulating section is guided from the first insulating section to the third insulating section in a second arcuate path.
US11437159B2 Passive heat removal casks and methods of using the same
Casks shield materials and passively remove heat via heat transport paths from deep inside to outside the cask. The transport path may be heat pipes and conductive rods that are non-linear so that radiation is always shielded by the cask. A damper may surround an end of the heat transport path to control heat loss from the cask. A jacket of fluid or meltable material that conducts heat by convection may surround stored materials ensure an even temperature within the cask, and the heat transport path may absorb heat from the jacket. Casks are useable to safely store, transport, and dispose of any sensitive or heat-generating material. Casks may be opened or closed to simultaneously load and offload materials at a consistent operating temperature provided by heaters in the cask.
US11437152B1 Diode assembly and method of forming a diode assembly for pulsed fusion events
A diode assembly for producing a pulsed fusion event in a z-pinch driver. The diode assembly includes an inner core formed of a fusionable fuel source material including a lithium compound formed of one or more lithium isotopes and one or more hydrogen isotopes. A lithium metal outer sheath is integrally formed around the inner core by decomposing a surface of the fusionable fuel source material.
US11437149B2 Echocardiogram context measurement tool
A system (100) includes an echocardiogram measurement tool (150) that determines a subset (152) of measurements from a list of echocardiogram measurements according to a view of an ultrasound imaging sequence (110) and a mapping (154) between the view and the subset of measurements.
US11437148B2 System for predicting treatment outcomes based upon genetic imputation
Methods, systems, and software provide machine learning and artificial intelligence including deep neural networks that enable the creation and operation of unique, AI-driven genomic test results augmentation through variable genetic imputation.
US11437143B2 Systems and methods for predicting metabolic and bariatric surgery outcomes
Various systems and methods for predicting metabolic and bariatric surgery outcomes are provided. The systems and methods can also provide predictions for non-surgical metabolic and bariatric treatments. In general, a user can receive predictive outcomes of multiple bariatric procedures that could be performed on a patient. In one embodiment, a user can electronically access a metabolic and bariatric surgery outcome prediction system, e.g., using one or more web pages. The system can provide predictive outcomes of one or more different bariatric surgeries for the patient based on data gathered from the user and on historical data regarding outcomes of the different bariatric surgeries. The system can additionally provide predictive outcomes for not having any treatment and/or a comparison of the predictive outcomes of the one or more different bariatric surgeries to the predictive outcomes for not having any treatment.
US11437137B1 Method, apparatus, and computer program product for using machine learning to encode a healthcare claim as a predefined sized vector
A method, apparatus and computer program product are provided for generating a predefined sized vector representative of a healthcare claim including a variable number of service lines. A neural network is trained to identify hierarchical relationships between claim lines and services lines and to represent the relationships in the predefined sized vector. The predefined sized vector may be used to make predictions regarding adjudication, such as probability of denial (claim-level or service-level), days to pay, probability of being paid as a diagnosis related group (DRG), allowed amount, and/or denial reason. Predictions may also be made from the predefined sized vector relating to the likelihood and/or identification of missing procedure codes.
US11437136B2 Image processing apparatus, image processing method, and storage medium
An image processing apparatus includes an acquisition unit configured to acquire a first medical image and a second medical image that are three-dimensional images obtained by imaging a subject, a determination unit configured to determine a first resolution based on a resolution of the first medical image and determine a second resolution based on a predetermined resolution, a first generation unit configured to generate a first subtraction image having the first resolution by performing a first subtraction process between the first and second medical images, and generate a second subtraction image having the second resolution by performing a second subtraction process between the first and second medical images, and a second generation unit configured to generate a projection image using the second subtraction image.
US11437132B2 Drug library dynamic version management
A drug library management system generates versions of drug library data that can be used by infusion pumps, and version of drug library data that can be used by systems or components in a clinical environment other than infusion pumps. One version of the drug library data may be customized for a particular infusion pump, while another version may be a generalized version that can be used by middleware systems that process messages received from various infusion pumps that are using a different version of the drug library data. The generalized version may be archived separately from a drug library database used by the drug library management system to generate the various versions.
US11437128B2 Methods and systems for analyzing accessing of medical data
Various aspects described herein relate to presenting electronic patient data accessing information. Data related to a plurality of access events, by one or more employees, of electronic patient data can be received. A set of access events of the plurality of access events can be determined as constituting, by the one or more employees, possible breach of the electronic patient data. An alert related to the set of access events can be provided based on determining that the set of access events constitute possible breach of the electronic patient data.
US11437127B2 Trusted third-party computerized platform for AI-based health wallet
A process registers, at the user mobile computing device, one or more health-related documents for inclusion in a cloud-based digital health wallet. Furthermore, the process receives, at a user mobile computing device, a biometric identification input from the user for the registration of the one or more health-related documents. The process sends, from the user mobile computing device to a server computing device that stores the cloud-based digital health wallet, a first coded version of the biometric identification input for storage in a biometric validation data structure. Additionally, the process determines, at the user mobile computing device, a location of the user. Moreover, the process sends, from the user mobile computing device to the server computing device, a validation request at the location. The validation request includes a second coded version of a subsequently inputted biometric input from the user at the location.
US11437125B2 Artificial-intelligence-based facilitation of healthcare delivery
Techniques are provided that involve employing artificial intelligence (AI) to facilitate reducing adverse outcomes associated with healthcare delivery. In one embodiment, a computer implemented method comprises monitoring live feedback received over a course of care of a patient, wherein the live feedback comprises physiological information regarding a physiological state of the patient. The method further comprises employing AI to identify, based on the live feedback information, an event or condition associated with the course of care of the patient that warrants clinical attention or a clinical response. The method further comprises generating a response, based on the identification of the event or condition, that facilitates reducing an adverse outcome of the course of care, wherein the response varies based on a type of the event or condition, and providing the response to a device associated with an entity involved with treating the patient in association with the course of care.
US11437124B2 Method for processing, shaping, presentation and optimized display of results of biological analyses based on consolidated health data and normalized values
A method for tracking a biological parameter of a patient by processing one or more initially-measured values A(n) that correspond to results of one or more biological analyses of the patient's biological parameter from one or more laboratories, may include receiving data from one or more laboratories that includes at least one initial value A(n) and metadata indicating a corresponding normal range. The data is recorded and each of the initial values A(n) are transformed into a normalized value Anorm(n) through the use of a mathematical model and computer processing. A progression over time of the given biological parameter may be generated and displayed using a method of electronic graphical representation, wherein the normalized values Anorm(n) may be presented in combination with at least one element of data that relates to a common normalized normal range.
US11437122B2 Electronic methods and systems for microorganism characterization
Systems and methods to characterize one or more microorganisms or DNA fragments thereof are disclosed. Exemplary methods and systems use comparison of DNA sequencing information to information in one or more databases to characterize the one or more microorganism or DNA fragments thereof. Exemplary systems and methods can be used in a clinical setting to provide rapid analysis of microorganisms that may be a cause of infection.
US11437121B2 Methods and processes for non-invasive detection of a microduplication or a microdeletion with reduced sequence read count error
Provided herein are methods, processes and apparatuses for non-invasive assessment of genetic variations.
US11437119B2 Error read flow component
An apparatus includes an error read flow component resident on a memory sub-system. The error read flow component can cause performance of a plurality of read recovery operations on a group of memory cells that are programmed or read together, or both. The error read flow component can determine whether a particular read recovery operation invoking the group of memory cells was successful. The error read flow component can further cause a counter corresponding to each of the plurality of read recovery operations to be incremented in response to a determination that the particular read recovery operation invoking the group of memory cells was successful.
US11437115B2 Semiconductor memory devices and methods of operating semiconductor memory devices
A semiconductor memory device includes a memory cell array, an error correction code (ECC) engine, row fault detector circuitry and control logic circuitry. The memory cell array includes a plurality of memory cell rows. The control logic circuitry controls the ECC engine circuitry to perform a plurality of error detection operations on each of the memory cell rows. The control logic circuitry controls the row fault detector circuitry to store an error parameter associated with each of a plurality of codewords in each of which at least one error is detected by accumulating the error parameter for each of a plurality of defective memory cell rows. The row fault detector circuitry determines whether a row fault occurs in each of the plurality of defective memory cell rows based on a number of changes of the error parameter.
US11437114B1 Reduced error correction code for dual channel DDR dynamic random-access memory
A first set of 64 bytes of data and a second set of 64 bytes of data are received. A first set of eight error-correcting code (ECC) bytes for the first set of 64 bytes of data and a second set of eight ECC bytes for the second set of 64 bytes of data are calculated. The first set of 64 bytes of data, the second set of 64 bytes of data, the first set of eight ECC bytes, and the second set of eight ECC bytes are sent to one or more 5th generation double data rate (DDR5) synchronous dynamic random-access memory (SDRAM) modules through a DDR5 dual-channel in a single burst, wherein the DDR5 dual-channel comprises a first data channel and a second data channel, and wherein the first data channel and the second data channel are driven by a same clock signal.
US11437113B2 Memory system
A memory system includes a storage medium including a target memory region having a plurality of memory units; and a controller configured to store data into one or more target memory units, each of which is estimated to take less time to perform a write operation thereon than any of the other memory units among the plurality of memory units, when performing a memory dump operation due to a sudden power off.
US11437100B2 Distinct chip identifier sequence utilizing unclonable characteristics of resistive memory on a chip
Stochastic or near-stochastic physical characteristics of resistive switching devices are utilized for generating data distinct to those resistive switching devices. The distinct data can be utilized for applications related to electronic identification. As one example, data generated from physical characteristics of resistive switching devices on a semiconductor chip can be utilized to form a distinct identifier sequence for that semiconductor chip, utilized for verification applications for communications with the semiconductor chip or utilized for generating cryptographic keys or the like for cryptographic applications.
US11437092B2 Systems and methods to store multi-level data
Disclosed herein are related to a memory system and a method of operating the memory system. In one aspect, resistances of a first memory cell, a second memory cell, a third memory cell, and a fourth memory cell are individually set. In one aspect, the first memory cell and the second memory cell are coupled to each other in series between a first line and a second line, and the third memory cell and the fourth memory cell are coupled to each other in series between the second line and a third line. In one aspect, current through the second line according to a parallel resistance of i) a first series resistance of the first memory cell and the second memory cell, and ii) a second series resistance of the third memory cell and the fourth memory cell is sensed. According to the sensed current, multi-level data can be read.
US11437091B2 SRAM with robust charge-transfer sense amplification
A charge-transfer transistor couples between a bit line and a sense node for a sense amplifier. During a read operation, a charge-transfer driver drives a gate voltage of the charge-transfer transistor to control whether the charge-transfer transistor conducts during a charge-transfer period. To assist the charge-transfer by the charge-transfer transistor, a first and second cross-coupled transistor are coupled between the bit line and a complement bit line.
US11437090B2 Negative differential resistance circuits
Various implementations described herein refer to an integrated circuit having a bitcell coupled to a bitline. The integrated circuit may include a write driver coupled to the bitline for writing data to the bitcell. The write driver may have an inverter and a clamping device that are arranged to clamp current after data has been written to the bitcell.
US11437089B2 Integrated circuit devices
An integrated circuit device includes a sense amplifier configured to sense a voltage change of a bit line, wherein the sense amplifier includes: a sense amplifier unit connected to the bit line and a complementary bit line, configured to sense the voltage change of the bit line in response to a control signal, configured to adjust voltages of a sensing bit line and a complementary sensing bit line based on the sensed voltage change, and including a first PMOS transistor and a first NMOS transistor; and a first offset canceling unit connecting the bit line to the complementary sensing bit line in response to an offset canceling signal, and including a first offset canceling transistor arranged between the first NMOS transistor and the first PMOS transistor, wherein the first offset canceling transistor shares a common impurity region with the first NMOS transistor.
US11437086B2 Phase clock correction
Methods, systems, and devices for phase clock correction are described. The clock correction may, in some examples, include two stages of duty cycle adjustment. In a first stage, the duty cycles of multiple clock signals may be adjusted. These clock signals may be based on an input clock signal and its complement. The duty cycle adjustment provided to a clock signal during this stage may be based on a difference between the duty cycle of the clock signal before adjustment and the duty cycle of another clock signal. In the second stage, the duty cycle of the input clock signal and its complement may be adjusted. The duty cycle adjustment provided to the input clock signal and/or its complement may be based on clock signals generated from the multiple clock signals after their duty cycles have been adjusted.
US11437083B2 Two-bit magnetoresistive random-access memory device architecture
A magnetoresistive random-access memory (MRAM) device includes a first cell selectively connected to a first bit line and a second cell selectively connected to a second bit line. The MRAM device further includes a shared transistor connected to the first cell and connected to the second cell. The MRAM device further includes a first selector device and a second selector device. The first selector device is configured to permit current to flow through the first cell to the shared transistor when a voltage applied to the first selector device is larger than a threshold activation voltage. The second selector device is configured to permit current to flow through the second cell to the shared transistor when a voltage applied to the second selector device is larger than a threshold activation voltage. The MRAM cell further includes a word line connected to a gate of the shared transistor.
US11437082B2 Physically unclonable function circuit having lower gate-to-source/drain breakdown voltage
A physically unclonable function (PUF) circuit includes a program control transistor, a program select transistor, a read select transistor, and a PUF bit storage transistor. The PUF bit storage transistor has a drain region coupled to the read select transistor, a source region coupled to a source line and the program select transistor, a channel region, a gate dielectric layer, and a gate electrode coupled to the program select transistor. The gate dielectric layer has a first portion formed on the drain region, a second portion formed on the source region, and a main portion formed on the channel region and between the first portion and the second portion, thicknesses of the first portion of the gate dielectric layer and the second portion of the gate dielectric layer being smaller than a thickness of the main portion of the gate dielectric layer.
US11437081B2 Buffer control of multiple memory banks
Disclosed herein are related to operating a memory system including memory banks and buffers. Each buffer may perform a write process to write data to a corresponding memory bank. In one aspect, the memory system includes a buffer controller including a queue register, a first pointer register, a second pointer register, and a queue controller. In one aspect, the queue register includes entries, where each entry may store an address of a corresponding memory bank. The first pointer register may indicate a first entry storing an address of a memory bank, on which the write process is predicted to be completed next. The second pointer register may indicate a second entry to be updated. The queue controller may configure the queue register according to the first pointer register and the second pointer register, and configure one or more buffers to perform the write process, according to the entries.
US11437077B2 Semiconductor device including common select line
Provided herein may be a semiconductor device. The semiconductor device may include a stack including word lines, a bit line penetrating the stack, a global bit line disposed above the stack, global word lines disposed above the stack, a common select line disposed above the stack, a first contact plug coupling the global bit line and the bit line to each other and penetrating the common select line, and second contact plugs coupling the global word lines and the word lines to each other respectively and penetrating the common select line.
US11437072B2 Recording presentations using layered keyframes
A layered-keyframe-based, presentation recording service provides for presentation recording sessions, the recording of presentations, and the creation of presentation videos. A user records with the user's device the document pages and page annotations, as well audio and video streams, that are presented using the device during the course of a presentation recording session. The pages, annotations and video streams are efficiently and separately recorded as keyframes. These keyframes are used as document, annotation and video layers to create layered keyframes. A presentation video is created from the layered keyframes and the recorded audio stream. Users can then playback presentation videos at a time, place and manner that is available to, accessible by and/or convenient to them.
US11437063B2 Magnetic tape, magnetic tape cartridge, and magnetic tape apparatus
The magnetic tape includes a non-magnetic support; and a magnetic layer, in which the magnetic layer has a timing-based servo pattern, an edge shape of the timing-based servo pattern, specified by magnetic force microscopy is a shape in which a difference L99.9−L0.1 between a value L99.9 of a cumulative distribution function of 99.9% and a value L0.1 of a cumulative distribution function of 0.1% in a position deviation width from an ideal shape of the magnetic tape in a longitudinal direction is 180 nm or less, and an absolute value ΔN of a difference between a refractive index Nxy of the magnetic layer, measured in an in-plane direction and a refractive index Nz of the magnetic layer, measured in a thickness direction is 0.25 or more and 0.40 or less.
US11437058B2 Areal density capability improvement with a main pole skin
The present disclosure generally relates to data storage devices, and more specifically, to a magnetic media drive employing a magnetic recording head. The head includes a main pole at a media facing surface (MFS), a trailing shield at the MFS, and a heavy metal layer disposed between the main pole and the trailing shield at the MFS. Spin-orbit torque (SOT) is generated from the heavy metal layer and transferred to a surface of the main pole as a current passes through the heavy metal layer in a cross-track direction. The SOT executes a torque on the surface magnetization of the main pole, which reduces the magnetic flux shunting from the main pole to the trailing shield. With the reduced magnetic flux shunting from the main pole to the trailing shield, write-ability is improved.
US11437057B2 Detection of TV state using sub-audible signal
A computer-implemented method includes receiving, at a microphone of a voice-controlled device, a speech input, generating an electrical signal having a first gain level that is below a gain threshold for audible detection by a user, transmitting the electrical signal to the speaker and detecting, by the microphone, an audio signal that includes a combination of ambient noise and a probe audio signal, wherein the probe audio signal is output by the speaker based on the electrical signal. The method further includes determining a power level of the probe audio signal and determining a state of the display based on the power level of the probe audio signal.
US11437049B2 High-band signal generation
A device for signal processing includes a memory and a processor. The memory is configured to store a parameter associated with a bandwidth-extended audio stream. The processor is configured to select a plurality of non-linear processing functions based at least in part on a value of the parameter. The processor is also configured to generate a high-band excitation signal based on the plurality of non-linear processing functions.
US11437047B2 Method and apparatus for controlling audio frame loss concealment
In accordance with an example embodiment of the present invention, disclosed is a method and an apparatus thereof for controlling a concealment method for a lost audio frame of a received audio signal. A method for a decoder of concealing a lost audio frame comprises detecting in a property of the previously received and reconstructed audio signal, or in a statistical property of observed frame losses, a condition for which the substitution of a lost frame provides relatively reduced quality. In case such a condition is detected, the concealment method is modified by selectively adjusting a phase or a spectrum magnitude of a substitution frame spectrum.
US11437045B1 Virtual assistant technology
System, methods, and computer readable media can be used to create a virtual assistant. One of the methods includes receiving audio from a conversation between two parties while the conversation is occurring. The method includes generating a partial transcript of the conversation. The method includes identifying topics based on the partial transcript. The method includes presenting a user interface element based on the identified topic.
US11437042B2 Communication robot and method for operating the same
A communication robot capable of communicating with other electronic devices and an external server in a 5G communication environment by performing artificial intelligence (AI) algorithms and/or machine learning algorithms to be loaded and performing a speech recognition, and a driving method thereof are disclosed. The method for driving a communication robot according to an exemplary embodiment of the present disclosure may include receiving an utterance speech uttered by a user who has approached within a predetermined distance from the communication robot, and selecting any one ASR module capable of processing the uttered speech among plural ASR modules as an optimized ASR module. According to the present disclosure, it is possible to improve user's satisfaction with the use of the communication robot by reducing the inconvenience that the user has to manually set a first language in the preprocessing operation in order to receive a service from the communication robot.
US11437038B2 Recognition and restructuring of previously presented materials
Information recognition and restructuring includes analyzing electronic media content embedded in an electronic presentment structure presented to a user, and based on the analyzing, detecting portions of the electronic media content previously consumed by the user. The method includes modifying the electronic presentment structure, based on the detecting, to distinguish the electronic media content previously consumed by the user from other portions of the electronic media content.
US11437035B2 Agent device, method for controlling agent device, and storage medium
An agent device is equipped with a plurality of agent controllers which provide a service including causing an output device to output a response of voice in accordance with an utterance of an occupant of a vehicle, in which a first agent controller included in the plurality of agent controllers provides an agent controller different from the first agent controller with first service information on the service to be provided to the occupant.
US11437033B2 Microphone array beamforming control
Systems, apparatuses, and methods are described for controlling source tracking and delaying beamforming in a microphone array system. A source tracker may continuously determine a direction of an audio source. A source tracker controller may pause the source tracking of the source tracker if a user may continue to speak to the system. The source tracker controller may resume the source tracking of the source tracker if the user may cease to speak to the system, or when one or more pause durations have been reached.
US11437029B2 Voice application platform
Among other things, requests are received from voice assistant devices expressed in accordance with different corresponding protocols of one or more voice assistant frameworks. Each of the requests represents a voiced input by a user to the corresponding voice assistant device. The received requests are re-expressed in accordance with a common request protocol. Based on the received requests, responses to the requests are expressed in accordance with a common response protocol. Each of the responses is re-expressed according to a protocol of the framework with respect to which the corresponding request was expressed. The responses are sent to the voice assistant devices for presentation to the users.
US11437027B1 Alternate natural language input generation
Techniques for handling errors during processing of natural language inputs are described. A system may process a natural language input to generate an ASR hypothesis or NLU hypothesis. The system may use more than one data searching technique (e.g., deep neural network searching, convolutional neural network searching, etc.) to generate an alternate ASR hypothesis or NLU hypothesis, depending on the type of hypothesis input for alternate hypothesis processing.
US11437026B1 Personalized alternate utterance generation
A system is provided for handling errors during automatic speech recognition by leveraging past inputs spoken by the user. The system may process a user input to determine an ASR hypothesis. The system may then determine an alternate representation of the user input based on the inputs provided by the user in the past, and whether the ASR hypothesis sufficiently matches one of the past inputs.
US11437022B2 Performing speaker change detection and speaker recognition on a trigger phrase
A method of speaker recognition comprises receiving an audio signal representing speech. A speaker change detection process is performed on the received audio signal. A trigger phrase detection process is also performed on the received audio signal. On detecting the trigger phrase in the received audio signal, a speaker recognition process is performed on the detected trigger phrase and on any speech preceding the detected trigger phrase and following an immediately preceding speaker change.
US11437020B2 Techniques for spatially selective wake-up word recognition and related systems and methods
According to some aspects, a system for detecting a designated wake-up word is provided, the system comprising a plurality of microphones to detect acoustic information from a physical space having a plurality of acoustic zones, at least one processor configured to receive a first acoustic signal representing the acoustic information received by the plurality of microphones, process the first acoustic signal to identify content of the first acoustic signal originating from each of the plurality of acoustic zones, provide a plurality of second acoustic signals, each of the plurality of second acoustic signals substantially corresponding to the content identified as originating from a respective one of the plurality of acoustic zones, and performing automatic speech recognition on each of the plurality of second acoustic signals to determine whether the designated wake-up word was spoken.
US11437018B2 Vehicle output based on local language/dialect
Described herein are systems, methods, and computer readable media for dynamically determining a language variant to use for vehicle output to a vehicle occupant based on the vehicle's location. A geographic region may include multiple sub-regions, each of which may be associated with a respective one or more language variants. As an example, a geographic region may be a state or province, and each sub-region may have one or more dialects that are spoken by individuals in that sub-region. In some cases, a particular dialect may be predominant in a given sub-region. As a vehicle traverses a travel path, it may determine its current location, which geographic sub-region includes that location, and which language variant (e.g., dialect) is predominant there. That language variant may then be selected for in-vehicle communication with a vehicle occupant. The vehicle location determination may be made at or near where the occupant entered the vehicle.
US11437013B2 Ultra-thin acoustic lens for subwavelength focusing in megasonic range, and design method therefor
The present invention relates to an ultra-thin acoustic lens for subwavelength focusing in a megasonic range and a design method thereof. More particularly, the present invention relates to a super-oscillatory planar ultra-thin acoustic lens for subwavelength focusing in the megasonic range, which includes a plurality of concentric regions arranged in a concentric shape with reference to the center point, wherein the concentric regions include a plurality acoustic insulation region for insulating incident acoustic waves, and a plurality of transmission regions for transmitting acoustic waves, the acoustic insulation regions and the transmission regions being formed alternatively in a radial direction from the center point so as to focus incident acoustic wave energy onto a subwavelength region. The acoustic lens has flat surfaces on both sides thereof respectively and has a plate shape having a constant thickness, and a layout, which is a radius of each of the plurality of acoustic insulation regions and transmission regions in the concentric region, is determined by a topology optimization reverse design method.
US11437009B2 Method for producing metal structure
The present disclosure provides a method for producing a metal structure having holes dispersed in a matrix and having inorganic particles disposed inside the holes, that are capable of moving in the holes independently of the matrix, the method making it possible to increase the proportion of inorganic particles in the metal structure that are capable of moving in the holes independently of the matrix. In the method for producing a metal structure whereby inorganic particles are disposed inside holes dispersed in a matrix so as to be capable of moving independently of the matrix, the hollow particles covering the inorganic particles which are distributed in the matrix of the metal structure are fragmented so that the inorganic particles are disposed inside the holes formed by fragmenting the hollow particles.
US11437008B2 Acoustic barrier caps in acoustic honeycomb
Acoustic honeycomb structures that include cells in which a friction-locking insertion process is used to locate acoustic barriers within honeycomb cells to provide multiple degree of freedom (MDOF) acoustic liners having a variety of acoustic resonator depths. Solid polymer films are formed into acoustic barrier caps. The acoustic barrier caps are friction-locked and bonded to cell walls at one or more cell depths to form acoustically reflective hard walls that form effective bottom ends for acoustic resonators.
US11437006B2 Systems and methods for music simulation via motion sensing
The present disclosure relates to systems, methods, and devices for music simulation. The methods may include determining one or more simulation actions based on data associated with one or more simulation actions acquired by at least one sensor. The methods may further include determining, based on at least one of the one or more simulation actions and a mapping relationship between simulation actions and corresponding musical instruments, a simulation musical instrument that matches with the one or more simulation actions. The methods may further include determining, based on the one or more simulation actions, one or more first features associated with the simulation musical instrument. The methods may further include playing music based on the one or more first features.
US11437003B2 Torsional based tremolo system with a stationary bridge
Disclosed is a torsion based tremolo apparatus that uses a cylinder assembly to rotate part of the tremolo apparatus relative to a baseplate. The baseplate is used to mount the tremolo apparatus to a musical instrument, such as a guitar. A bridge string support assembly is coupled to the baseplate and, combined with a string holder, supports a string of the musical instrument. A torsion device is positioned to impart torsional force on the cylinder assembly relative to the baseplate. The string holder is coupled to the cylinder assembly and rotates when the cylinder assembly is rotated.
US11437002B2 Simulation system
A simulation system includes a display device and a selection unit. The display device shows an image on an exhibit related to a building. The selection unit selects content of the image shown on the exhibit. The selection unit includes a display section that displays information corresponding to the image.
US11437001B2 Image processing apparatus, program and image processing method
Provided are an image processing apparatus, a program and an image processing method capable of avoiding interference with the function of another program. An image processing apparatus includes a position information detection unit configured to detect position information indicating a position on a display, a region position setting unit configured to set the position of the region of interest on the display based on the position information, and an image processing unit configured to perform image process on at least one image among an image inside of the region of interest and an image outside of the region of interest. The region position setting unit, when the position information is changed with the image process, sets the position of the region of interest based on the position information immediately before the change.
US11436991B2 Display device including an embedded gate driving circuit
Provided is a display device including a display panel and a gate driving circuit. The gate driving circuit includes a stage part including a first stage group and a second stage group cascade-connected to the first stage group, a branch line part having first branch lines electrically connected to the first stages, respectively, and second branch lines electrically connected to the second stages, respectively, line pattern rows having first pattern rows electrically connected to the first branch lines and second pattern rows electrically connected to the second branch lines, respectively, and a signal line facing the line pattern rows in the first direction. Any one second branch line among the second branch lines includes a first line portion extending in the first direction and a second line portion extending in the second direction and disposed between the signal line and the line pattern rows on a plane.
US11436989B2 Display apparatus
A display apparatus includes a plurality of pixels arranged in rows and columns, each pixel column extends in a first direction and each pixel row extends in a second direction crossing the first direction, a first data line extending in the first direction and configured to transfer a data voltage to pixels included in at least two pixel columns, and for each pixel row, a first gate line extending in the second direction and disposed at a first side of the pixel row, and a second gate line extending in the second direction and disposed at a second side of the pixel row, the first and second sides of the pixel row are opposite to each other. In a pair of adjacent pixel columns, pixels, which are connected to the first gate line of their respective pixel row, are arranged in a zigzag arrangement in the first direction.
US11436988B2 Control method and control device
A control method or the like is provided capable of suppressing a flicker phenomenon even if frame periods vary in length. The control method is for controlling an emission period and an extinction period of a frame period, which is a period in which one image continues to be displayed. When a signal indicating start of a frame period is detected, as the frame period, n subframe periods that configure the frame period, where n is an integer greater than or equal to 2, are sequentially started from the first subframe period, after a predetermined period of time has elapsed since the detection of the signal. All of the n subframe periods are controlled to have a substantially same length determined in advance and to have a substantially same ratio between the emission period and the extinction period, determined in advance, the ratio being referred to as a duty ratio.
US11436987B1 Adaptive backlight activation for low-persistence liquid crystal displays
A display device dynamically determines a duration of the illumination period for a display frame to adjust an average brightness of a display device as the framerate dynamically changes. The display device includes a backlight unit (BLU) for providing light for displaying an image, a plurality of pixels for modulating the light provided by the BLU, and a controller circuit for controlling the BLU. The controller circuit measure a duration of a previous frame and determine a duration for an illumination period of a current frame based on the measured duration of the previous frame. The control circuit then controls the BLU based on the determined duration of the illumination period for the current frame.
US11436984B2 Pixel and organic light emitting display device having the same
A pixel includes an organic light emitting diode including an anode electrode and a cathode electrode; a driving transistor including an input electrode connected to a first node (FN), a control electrode connected to a second node, and an output electrode connected to a third node; a switching transistor to apply a data signal to the FN in response to a scan signal in a second period; a first initialization transistor to apply a first initialization voltage to the second node in response to an initialization control signal in a first period (FP); a second initialization transistor to apply a second initialization voltage having a voltage level different from the first initialization voltage to the anode electrode in response to the initialization control signal in the FP; and an on-bias transistor to apply a first driving voltage to the FN in response to an on-bias control signal in the FP.
US11436979B2 Pixel circuit in which a driving transistor is allowed to be on-biased to prevent unintended emission
A pixel circuit includes: an organic light emitting diode (OLED); a first transistor having first and second electrodes and a first gate electrode; a second transistor connected between a data line and the first electrode, controlled by a first scan line; a third transistor connected between the second electrode and the a electrode of the first transistor, controlled by the first scan line; a fourth transistor connected between the first gate electrode and a first initialization voltage line, controlled by a second scan line; a fifth transistor connected between a power line and first electrode, controlled by a first emission line; a sixth transistor connected between the second electrode and the OLED and controlled by a second emission line; and a storage capacitor connected between the first gate electrode and the power line, wherein the first emission line and the second emission line are located at different nodes.
US11436976B2 Display device
A display device includes: a substrate including a display area configured to display images and a non-display area around the display area; a plurality of driving voltage lines in the display area; a plurality of initialization voltage lines in the display area; a plurality of driving voltage transmission lines in the non-display area and configured to transmit a driving voltage to the driving voltage line, and including a first driving voltage transmission line and a second driving voltage transmission line adjacent to each other; an initialization voltage transmission line in the non-display area and configured to transmit an initialization voltage to the initialization voltage line; and a bridge connecting the first driving voltage transmission line and the second driving voltage transmission line and overlapping the initialization voltage transmission line.
US11436973B2 Repairable GOA drive system, driving method for GOA circuit, and display panel
The present invention relates to a repairable GOA drive system, a driving method for a GOA circuit, and a display panel, which are used to improve the yield of display panels in a manufacturing process. The display panel includes a display area and a pixel circuit arranged in the display area, and the repairable GOA drive system includes a GOA circuit, a repair circuit, and a driver IC. The GOA circuit is connected to a driving signal output end of the driver IC; and the repair circuit is arranged between the driver IC and the pixel circuit and configured to replace at least one abnormal GOA unit in the GOA circuit to output a driving signal to the corresponding pixel circuit when the at least one GOA unit is abnormal. The implementation of the present invention can greatly improve repairability of backplane circuits with a GOA and increase the screen yield in mass production.
US11436971B2 Display driving apparatus with vertical two dot polarity inversion
A display driving apparatus includes an output control circuit configured to, with one frame being divided into a plurality of blank periods by touch driving, output source signals corresponding to display data during the plurality of blank periods; and a polarity control circuit configured to receive pre-polarity control information for polarity inversion, and control polarities of the source signals outputted from the output control circuit, for polarity inversion by the unit of vertical 2 dots for one frame, wherein polarities for pre dummy lines and active data lines of odd-numbered and even-numbered blank periods are controlled by the pre-polarity control information.
US11436968B2 Display driver, image processing circuitry, and method
A display driver that drives a display panel comprises storage circuitry, color addition processing circuitry, and drive circuitry. The storage circuitry stores F subpixel data acquired from color coordinate data indicating color coordinates of a displayed color in a predetermined color space displayed on the display panel when an R subpixel, a G subpixel, and a B subpixel in each of a plurality of pixels of the display panel are driven with drive signals corresponding to a minimum grayscale value and an F subpixel in each of the plurality of pixels which displays an additional color other than a primary color R, a primary color G, and a primary color B is driven with a drive signal corresponding to a maximum grayscale value. The color addition processing circuitry generates output FRGB data from input RGB data, in response to the F subpixel data stored in the storage circuitry.
US11436967B2 System and method for a multi-primary wide gamut color system
Systems and methods for a multi-primary color system for display. A multi-primary color system increases the number of primary colors available in a color system and color system equipment. Increasing the number of primary colors reduces metameric errors from viewer to viewer. One embodiment of the multi-primary color system includes Red, Green, Blue, Cyan, Yellow, and Magenta primaries. The systems of the present invention maintain compatibility with existing color systems and equipment and provide systems for backwards compatibility with older color systems.
US11436964B1 Electronic devices having image transport layers and electrical components
An electronic device may have a display with pixels configured to display an image. The pixels may be overlapped by a cover layer. The display may have peripheral edges with curved cross-sectional profiles. An inactive area in the display may be formed along a peripheral edge of the display or may be surrounded by the pixels. Electrical components such as optical components may be located in the inactive area. An image transport layer may be formed from a coherent fiber bundle or Anderson localization material. The image transport layer may overlap the pixels, may have an opening that overlaps portions of the inactive area, may have an output surface that overlap portions of the inactive area, and/or may convey light associated with optical components in the electronic device.
US11436961B2 Shift register and method of driving the same, gate driving circuit and display panel
A shift register and a method of driving the same, a gate driving circuit, and a display panel are disclosed. The shift register includes a display control circuit coupled to a pull-up node, a first power supply and a first control terminal respectively; a cascade output circuit coupled to a second clock terminal, the pull-up node and a cascade output terminal; a sensing control circuit coupled to the pull-up node, the cascade output terminal, a second control terminal and a third control terminal respectively; and a signal output circuit coupled to the pull-up node, a first clock terminal and a signal output terminal.
US11436957B2 Abnormality detection circuit
An abnormality detection circuit includes: a plurality of voltage dividing circuits; a first selector configured to select and output one of a plurality of outputs of the plurality of voltage dividing circuits; a first comparator configured to compare an output of the first selector with a reference voltage; and a first detector configured to detect an abnormality based on an output of the first comparator, wherein the selection of the first selector is switched in synchronization with a vertical synchronization signal or a horizontal synchronization signal of a liquid crystal display device.
US11436956B2 Method and apparatus for releasing HUD protection mode based on vehicle information
Disclosed herein are a head-up display (HUD) including a photosensor for measuring the illuminance of incoming light and a light shutter in order to protect an imaging element vulnerable to thermal damage from sunlight reaching from the outside, and a method including setting the HUD protection mode by operating the light shutter, determining whether to release the HUD protection mode by estimating the change in the incident angle of the incoming light from the change in the vehicle orientation angle instead of using the photosensor incapable of measuring the light as the incoming light is blocked and additionally determining whether to release the HUD protection mode based on vehicle information including vehicle location, navigation map information, the brightness of surroundings of the vehicle, and rain sensor detection information.
US11436955B2 Dynamic modification of digital signage based on device edge analytics and engagement
Techniques and systems are described for dynamic modification of digital signage based on device edge analytics and engagement. For instance, the described techniques enable content output of a signage device to be dynamically modified based on different environmental conditions, such as human behaviors indicating likely interest in an instance and/or type of content. Further, different types of sensor data are utilized to automatically detect such behaviors, such as via sensor mounted to and/or adjacent a signage device.
US11436954B2 Graphic display modular wall system
A display panel for an upright display system includes a substrate having a front surface, a rear surface, an upper edge, a lower edge and a pair of opposing side edges. The substrate includes first and second cutouts in the rear surface, the cutouts extending from the upper edge to the lower edge to form a pair of hinges in the substrate. The cutouts dividing the substrate into a main substrate portion adjacent the second cutout, an intermediate portion between the cutouts, and a fold portion extending from the first cutout to a side edge of the substrate. The substrate is folded about the hinges such that the rear surface of the fold portion abuts the rear surface of the main portion. An adhesive is positioned between the rear surface of the fold portion and the rear surface of the main portion; and at least one magnet is disposed on the front surface of the substrate and capable of aligning and attracting an associated magnet on another of the substrates to form interconnected walls of the upright display system.
US11436953B1 Banner housing assembly
A marquee banner assembly includes one or more lightweight molding(s) that may be bowed under tension, at least one or more channels configured for the insertion of a flexible sign, and attachment brackets attachable to a substrate which may any vertical surface. The attachment brackets are angled to provide a curvature to the molding when the molding is attached to the brackets. The assembly may employ natural light alone, or any combination of natural light, artificial light.
US11436951B2 Display device
A display device includes a display module; and a layer disposed on the display module and having a first area and a second area adjacent to the first area, the layer in the first area including a plurality of discontinuities spaced apart from each other. A sum of widths of the plurality of discontinuities is less than about 0.23 times of a width of the first area, each of the widths of the plurality of discontinuities is equal to or less than about 400 μm, and the widths of the plurality of discontinuities and the width of the first area are parallel to a first direction.
US11436950B2 Stretchable display device
A stretchable display device according to embodiments of the present disclosure includes a plurality of first substrates in which a plurality of pixels are defined, the plurality of first substrates being spaced apart from each other; a plurality of second substrates disposed between first substrates adjacent to each other among the plurality of first substrates to connect the adjacent first substrates; a lower substrate on which a plurality of first areas, a plurality of second areas, and a plurality of third areas excluding the plurality of first areas and the plurality of second areas are defined, the plurality of first substrates being disposed in the plurality of first areas, and the plurality of second substrates being disposed in the plurality of second areas; and a plurality of align keys disposed in a portion of the plurality of third areas and formed of an elastic material.
US11436948B2 Modular visual indicator display device
A modular flag display includes: a base; a plurality of modular indicator units removably attached to the base, the plurality of modular indicator units including a slide housing attachable to the base, the modular indicator unit including an open end formed thereon; a slide located within the slide housing and extending at least partially from the open end of the slide housing, the slide including a visual indicator viewable on the slide, wherein the slide is movable between an open position such that the visual indicator is visible outside of the slide housing and a closed position wherein the visual indicator is hidden within the slide housing. Each of the plurality of modular indicator units is modular such that the plurality of modular indicator units may be in varying locations on the based.
US11436947B2 Packaging system with detection of product tampering and/or falsification and integrated galvanic cell(s)
A packaging system or tag is provided for at least one article or item, which employs a multilayer laminate structure that includes an encapsulated transformative material that is disposed between first and second conductive layers. The transformative material is configured to undergo a state change (for example, by a chemical reaction or physical change) that changes impedance between the first and second conductive layers in response to an intrusion or perforation through at least part of the multilayer laminate structure. Furthermore, one of the first and second conductive layers can be configured (for example, by printing or etching) to provide an RF antenna and a first electrode of the at least one integrated galvanic cell. The other of the first and second conductive layers can provide a second electrode of the at least one integrated galvanic cell. The at least one integrated galvanic cell is further provided by encapsulated electrolyte material and ion bridge disposed between the first and second conductive layers. At least one NFC/RFID integrated circuit is mechanically secured to the multilayer laminate structure (for example, in space between the first and second conductive layers) and electrically coupled to the coil antenna, the at least one galvanic cell, and other parts of the first and second conductive layers of the multilayer laminate structure. The galvanic cell can also be made to have long shelf life.
US11436946B2 Encryption device, encryption method, decryption device, and decryption method
There is provided an encryption device to ensure strong security without using a random number in a white-box model. The encryption device includes: an encryption part configured to encrypt an input value using a black-box model in which input/output values are able to be recognized from the outside and an intermediate value is not able to be recognized from the outside; and a key generation part configured to encrypt the input value to the encryption part to generate a cryptographic key of the encryption part using a white-box model in which the input/output value and the intermediate value are able to be recognized from the outside.
US11436937B2 Method and apparatus of diagnostic test
Method, apparatus and computer program for providing a personalized study plan to a learner through cognitive and behavioral diagnosis of the learner. A learner who uses a data input device such as a smart pen and a stylus pen by using data obtained from the data input device. The method, apparatus and computer program relate to technology for obtaining input data based on information inputted by a user for at least one question with the data input device, creating test behavior data on the user from the obtained input data, analyzing cognition and behavior of the user based on at least one of metadata on the at least one question and the created test behavior data, and providing a personalized study plan to the user through an algorithm using machine learning based on the cognition and behavior analysis.
US11436935B2 System, method and apparatus for driver training system with stress management
A method of training a trainee includes a sensor configured to measure at least one biological indicator of stress in the trainee. The method includes presenting a training segment in the simulation while monitoring inputs from the trainee. Data is read from the sensor and an instantaneous stress level of the trainee is calculated from the data. If the instantaneous stress level greater than a predetermined value, a stress-change feature is selected that will reduce stress and applying the stress-change feature to the training segment, thereby reducing complexity of the training segment for reducing the instantaneous stress of the trainee. for example, the stress-change feature is changing the weather, adding/removing bad drivers, adding/removing pedestrians, etc.
US11436925B2 Monitoring apparatus and method
Embodiments of the present invention provide apparatus for monitoring one or more target objects in an environment external to a host vehicle by means of at least one sensor, the apparatus being arranged to trigger at least one action responsive to the detection of prescribed relative movement between the host vehicle and the one or more target objects, wherein the apparatus is arranged to monitor one or more control inputs of the vehicle and to over-ride triggering of the at least one action such that triggering of the at least one action is not performed in the event that a prescribed movement of one or more of the control inputs is detected.
US11436921B2 Vehicle/road interaction signal control method and apparatus
Provided are a vehicle/road interaction signal control method and apparatus, including: expanding the range of an intersection, extending to an upstream intersection along each approaching vehicle direction, and determining signal phases according to traffic flow conditions; acquiring the current speed and the current position of each moving target in each phase; according to the current speed and the current position of each moving target in each phase, calculating the time for each moving target to reach the intersection; according to the time for each moving target to reach the intersection, obtaining a time sequence of the moving targets in each phase for reaching the intersection; according to the time sequence of the moving targets in each phase for reaching the intersection, determining a release order and a release duration for each phase; sending information to onboard terminals.
US11436919B2 Method and apparatus for determining driving strategy of a vehicle
A method for determining driving strategy of a vehicle includes obtaining localization information of the vehicle, a driving route of the vehicle, and a current driving velocity of the vehicle. The method further includes detecting and interpreting a current status of a traffic light. The method further includes recognizing a duration of the current status of the traffic light. The method further includes detecting a relevant stop line. The method further includes obtaining a distance between the stop line and the vehicle. The method further includes determining whether to change the current driving velocity according to the current status of the traffic light, the duration of the current status of the traffic light, the distance between the traffic stop line and the vehicle, and the current driving velocity. A data processing device for determining driving strategy of a vehicle is also provided.
US11436918B2 Remote control apparatus and control method thereof
A remote control apparatus is provided. The remote control apparatus includes a directional antenna, a communicator, and a processor configured to, based on a wireless signal being received from an external device through the directional antenna, identify an angle at which the wireless signal is received, based on the angle being within a predetermine range, obtain identification information of the external device by parsing the wireless signal, based on the identification information, identify whether the external device is registered to a server and based on identifying that the external device is not registered to the server, transmit a signal for requesting registration to the external device through the communicator.
US11436917B2 Central monitoring and measurement system
A central monitoring and measurement system is described. A central user interface system for generation of a plurality of user-desired information based upon a plurality of measured data, the central user interface system may include a receiver system configured to receive wirelessly the plurality of measured data from a plurality of external sensor systems. An input/output system may be configured to provide output data to a display screen, receive input data from the display device, and provide output data to a processing system. The processing system may be configured to process the plurality of measured data from the plurality of external sensor systems into the plurality of user-desired information. Each external sensor system may include a transmission system configured to transmit wirelessly measured data to the central user interface system, and a measurement system configured to determine the measured data associated with an external device.
US11436914B2 Methods for the determination and control of a piece of equipment to be controlled; device, use and system implementing these methods
Provided is a control object and a method for controlling a plurality of pieces of equipment. The method includes determining, with the control object, a piece of equipment to be controlled from the plurality of pieces of equipment based on a user pointing the control object at the piece of equipment to be controlled, adapting, with the control object, a control interface of the control object as a function of the piece of equipment to be controlled, receiving, through the control interface of the control object, at least one command from the user to control the piece of equipment to be controlled, generating, with the control object, control data configured to control the piece of equipment to be controlled based on the at least one command received from the user, and controlling the piece of equipment to be controlled by transmitting the control data with the control object.
US11436912B2 Signalling duress
It is provided a method performed by a key device for supporting duress signalling. The method comprises the steps of: determining that a user is under duress; entering a wait state after the step of determining that a user is under duress; exiting the wait state and establishing a communication channel with a lock device, the communication channel being intended to be used for access control signalling; generating a duress signal; and transmitting, over the communication channel, the duress signal to the lock device.
US11436911B2 Sensor based system and method for premises safety and operational profiling based on drift analysis
Techniques for detecting physical conditions at a physical premises from collection of sensor information from plural sensors execute one or more unsupervised learning models to continually analyze the collected sensor information to produce operational states of sensor information, produce sequences of state transitions, detect during the continual analysis of sensor data that one or more of the sequences of state transitions is a drift sequence, correlate determined drift state sequence to a stored determined condition at the premises, and generate an alert based on the determined condition. Various uses are described for these techniques.
US11436907B2 Safety service system and method thereof
Disclosed are a safety service system and a method thereof. The safety service system comprises: a collection unit for collecting position information and image information related to a protected person who is registered by a protector; and a service providing unit for providing the position information and the image information to one or both of the protector and a security company upon detection of a signal that the protected person is in danger.
US11436905B2 Socket fire alarm system
A fire alarm system 1, comprises a socket 2 including at least one electrical conductor 12 for supplying electricity to a component received by the socket 2; a temperature sensor 4 configured to detect a temperature of the electrical conductor 12; and a fire alarm control panel 6 in communication with the temperature sensor 4. The fire alarm control panel 6 is configured to take an action based on the detected temperature of the electrical conductor 12 within the socket 2.
US11436900B2 Apparatus and methods for haptic covert communication
Embodiments described herein relate generally to providing information through tactility. A computer system may receive an input from a user. The computer system may identify one or more locations associated with haptic elements disposed on a wearable haptic apparatus. The computer system may generate a message that includes an indication of the one or more locations. The computer system may transmit this message to the wearable haptic apparatus. The wearable haptic apparatus may actuate one or more haptic elements disposed thereon based on the indication of the one or more locations included in the message. Other embodiments may be described and/or claimed.
US11436899B2 System and method for visualizing a carbon footprint
Described herein are methods and systems for visualization of a carbon footprint for one or more real-world objects or events. A server computing device identifies a carbon footprint value for at least one real-world object or event. The server computing device determines an amount of greenhouse gas that corresponds to the carbon footprint value. The server computing device generates instructions for operation of a gas visualization device coupled to the server computing device based upon the amount of greenhouse gas. The server computing device transmits the instructions to the gas visualization device. The gas visualization device executes the instructions to produce an amount of gas (i.e., fog or vapor) based upon the received instructions.
US11436895B2 Cross-hand winning card combination evaluations for multi-hand poker
Various embodiments of the gaming systems and methods provide cross-hand winning card combination evaluations for multi-hand poker.
US11436894B2 Enabling gaming features with a tag having conductive, coded ink
The present disclosure relates generally to systems, methods, and devices that enable interactions between a tag having conductive, coded ink and a gaming environment. As an example, a method is disclosed that includes providing a tag with an encoded physical medium that is readable by a touch-capable user interface, determining that the tag has been read by a touch-capable user interface of a gaming device in combination with detecting a gesture of the user at the touch-capable user interface of the gaming device, enabling the gaming device to provide a predetermined game feature in response to determining that the tag has been read by the touch-capable user interface of the gaming device in combination with detecting the gesture of the user at the touch-capable user interface of the gaming device, and updating an electronic record associated with the tag to indicate that the predetermined game feature has been enabled.
US11436892B2 Zone dependent payout percentage
A method and apparatus include a processor that determines a location of a mobile game device and a count of other mobile gaming devices disposed at the location. The processor determines a game configuration associated with the location's proximity to merchant locations. The processor generates a game outcome using the game configuration and displays the outcome on the mobile game device.
US11436891B2 Database game playing system based on pregenerated data
A database system is disclosed for accessing databases, updating hands information associated with users. The database system can include a server. The server can retrieve and store data in the database. The server can retrieve a first request from a first computer over a network, the first request including a first set of authentication data. The server can identify the user and retrieve a first set of hands information data associated with the user from the database. The server can generate a first set of game data and transmit the game data to the first computer. It can then receive a first set of hands data from the first computer. It can compute a first game result based on the first set of hands data, the first set of game data and a first set of game rules.
US11436889B2 Electronic gaming device with call tower functionality
Examples disclosed herein relate to a gaming device including a memory, a processor, a display, and a call tower. The call tower extends upwardly from the gaming device, such as above the display. The call tower includes a call tower video display and may include one or more plates, such as light or image plates. The gaming device includes a processor which presents a game via the display and causes the plates and/or call tower video display to display information, such as images.
US11436888B2 Local cache-based identification system
An identification system uses a local cache for performing identifications. An identity system device may store identity information and identification information. An electronic device stores a cache of a portion of the identity information and a part of the identification information. The electronic device receives user input, determines an identity by comparing the user input to the cached identification information (such as by comparing a received digital representation of a biometric with cached biometric identification information), and performs an action using information in the cached identity information that is associated with the identity. The electronic device may update the identity information stored by the identity system device based on the action.
US11436886B2 Method for generating an access code to an event
A computer-implemented method is provided for generating an access code to an event, comprising: a user obtaining an access right to the event from an access provider; the user authenticating themselves to the access provider using a legal form of identification comprising one or more biometric identifiers and the user generating an access code using a mobile device wherein the user provides biometric data and if approved, the access code is generated as a combination of the access right to the event, the user and the mobile device. By using these three data inputs, a substantially unique access code is generated. Complicated authentication, such as facial recognition at an entrance to the event, is no longer required, as it has already been performed before approaching the access code reader.
US11436884B2 System and method for handling containers
A system (1) for handling containers (7) having electronic product ID tags (15), the system comprises a storage cabinet (5) with lockable compartments (51) for storing tool kits (53) for handling the containers; each tool kit has an electronic ID tag associated with a predetermined compartment (51) in the storage cabinet and with a predetermined product ID tag of a container; access to each compartment is allowed or blocked by a respective electronically controlled lock; an electronic control unit (21); an electronic ID reader device (25) in communication with the electronic control unit, operable to read electronic ID tags of the components of the system and communicate same to the electronic control unit; the electronic control unit is operable to actuate the electronic lock of a predetermined compartment in the storage cabinet to allow access to said compartment upon matching the electronic product ID tag of a container with the associated electronic ID tag of the tool kit stored in the predetermined compartment, whilst keeping the remaining compartments locked.
US11436882B1 Security surveillance and entry management system
An artificial intelligence (AI) entry management (EM) security system includes a camera, a microphone, a motion detector, a speaker, and a software platform. Geofences are utilized to create boundaries around physical areas, such as locations for package delivery or property boundaries. The EM device and other devices connected to the software platform are configured to monitor the geofences and detect a presence of an activity, an event, an object, or a device. At least one license plate reader is utilized to read license plate characters. Voice recognition and voice identification are used to grant or deny permissions for individuals on a property.
US11436880B2 Method for estimating the distance separating an authentication device and a motor vehicle
A method for estimating the distance between an authentication device and a vehicle, in particular a motor vehicle, the vehicle including a computer and a plurality of communication modules capable of communicating with the device by exchanging signals over a wireless communication link, each communication module including an electronic clock that defines the sampling frequency of the signals received from the device. The method includes a plurality of measurement phases each comprising determination, by the computer, of the distance between the vehicle and the device and stopping and restarting of the electronic clock, and estimation of the actual distance between the vehicle and the device based on the plurality of distances determined during the measurement phases.
US11436878B2 Method for determining the severity of a possible collision between a motor vehicle and another vehicle, control apparatus, driver assistance system and a motor vehicle
A method for determining the severity of a possible collision between a motor vehicle and another vehicle is disclosed. Sensor data which describes the other vehicle is received from at least one sensor of the motor vehicle by means of a control apparatus, a change in velocity which describes a difference between a velocity (V1) of the motor vehicle before the collision and a collision velocity (Vc) of the motor vehicle (1) after the collision is determined on the basis of the sensor data, and the severity of the possible collision is determined on the basis of the determined change in velocity, wherein a mass (m2) of the other vehicle is estimated by means of the control apparatus on the basis of the sensor data, and the severity of the possible collision is additionally determined on the basis of the estimated mass (m2).
US11436875B2 Protocol conversion device and vehicle diagnostic system
A protocol conversion device includes a converter and a communicator. The converter makes a protocol conversion of vehicle data acquired from a vehicle by communication based on a first protocol, into vehicle data in a format of HTTP or HTTPS as a second protocol. The vehicle data is directed to diagnosis of the vehicle. The communicator transmits the vehicle data protocol-converted by the converter, to a communication terminal that is able to execute, by communication based on the second protocol, a vehicle diagnosis program held by a web server. The converter makes a protocol conversion of data transmitted from the communication terminal by the communication based on the second protocol, into data in a first protocol format. The communicator transmits, to the vehicle by the communication based on the first protocol, the data in the first protocol format that is protocol-converted by the converter.
US11436872B2 Autonomous vehicle data management platform
A data management platform for Autonomous Vehicles (AVs) is provided. The data management platform can receive, from an AV at a first time, a first copy of a manifest including a creation history of a transformed object generated by the AV and a data integrity value corresponding to the transformed object. The data management platform can receive, from a second computing system at a second time, a second copy of the manifest. The data management platform can reconcile the first copy and the second copy. The data management platform can receive, from the second computing system at a third time, a request to upload the transformed object. The data management platform can validate the transformed object stored in storage of the first computing system based on the data integrity value included in the manifest.
US11436871B2 Living body determination device, living body determination method, and living body determination program
A living body determination device includes: a light irradiation device that irradiates a measuring object with a first light including a plurality of spectrums; a spectroscopic device that disperses a light at intensity depending on a wavelength and outputs the light; an image acquisition device that receives the light output by the spectroscopic device and outputs image information representing brightness depending on the intensity of the light; and a control unit. The control unit, for each spectrum of the first light, acquires image information with respect to the measuring object from the image acquisition device, based on the image information, selects one or more areas, for each of the areas, acquires spectroscopic information, and based on whether the spectroscopic information satisfies a predetermined condition, determines whether the measuring object is a living body.
US11436867B2 Remote biometric identification and lighting
A biometric capture device is operative to adjust one or more environmental parameters to enhance a range (e.g., distance) at which a biometric may be captured from a subject. For example, a sample biometric capture device may be, include, or otherwise incorporate a retinal or iris scanner configured to capture an image of the retina or iris (e.g., a biometric) when the retina or iris is illuminated by infrared light. Generally, the amount of infrared light required to accurately image the retina or iris increases with the distance of the subject's retina or iris from the image capture device. The biometric capture device may capture a facial image using a first image sensor, identify a face in the facial image, capture an iris image using a second image sensor guided by the facial image, and identify a person using the iris image.
US11436862B2 Privacy protection capturing module
A privacy protecting capturing module including a capture device, a memory unit storing at least part of an image captured by the capture device, an interface for receiving commands and transmitting information, and a processor, executing receiving a first image captured by the capture device, analyzing the first image and determining whether the first image meets a condition, subject to the condition being met, transmitting information related to the first image through the interface, receiving a second image captured by the capture device consequent to the first image, analyzing the second image and determining whether the second image meets a second condition, and subject to the second condition being met, prohibiting transmission of further information through the interface, where all accesses to the privacy protecting capturing module are through the interface, and no direct access is enabled to the capture device or to the memory unit.
US11436854B2 Display device
A display device includes a display panel disposed in a first non-folding region, a second non-folding region, and a folding region located between the first and second non-folding regions. The display device further includes first and second buffer members disposed on one surface of the display panel in the first and second non-folding regions, respectively, and a metal layer disposed in the first non-folding region, the second non-folding region, and the folding region on one surface of the first buffer member and one surface of the second buffer member. The display device further includes a fingerprint sensor disposed on the metal layer. The first and second buffer members are separated with the folding region therebetween. The metal layer includes first, second, and third metal portions located in the first non-folding region, the second non-folding region, and the folding region, respectively. The fingerprint sensor is attached to the third metal portion.
US11436851B2 Text recognition for a neural network
Image data having text associated with a plurality of text-field types is received, the image data including target image data and context image data. The target image data including target text associated with a text-field type. The context image data providing a context for the target image data. A trained neural network that is constrained to a set of characters for the text-field type is applied to the image data. The trained neural network identifies the target text of the text-field type using a vector embedding that is based on learned patterns for recognizing the context provided by the context image data. One or more predicted characters are provided for the target text of the text-field type in response to identifying the target text using the trained neural network.
US11436843B2 Lane mapping and localization using periodically-updated anchor frames
A hybrid approach for using reference frames is presented in which a series of anchor frames is used, effectively resetting a global frame upon a trigger event. With each new anchor frame, parameter values for lane boundary estimates (known as lane boundary states) can be recalculated with respect to the new anchor frame. Triggering events may a based on a length of time, distance traveled, and/or an uncertainty value.
US11436839B2 Systems and methods of detecting moving obstacles
The present disclosure provides systems and methods to detect occluded objects using shadow information to anticipate moving obstacles that are occluded behind a corner or other obstacle. The system may perform a dynamic threshold analysis on enhanced images allowing the detection of even weakly visible shadows. The system may classify an image sequence as either “dynamic” or “static”, enabling an autonomous vehicle, or other moving platform, to react and respond to a moving, yet occluded object by slowing down or stopping.
US11436836B2 Vehicular access security system
An access point barrier system having a barrier that extends in such a way as to be movable between an enabled position and a non-enabled position preventing a vehicle from crossing the access point is provided. The image-capture device is integrated to the arm of the barrier and a computing device coupled to a database of registered vehicles, wherein the computing device is adapted to establish a match between the vehicle adjacent the barrier against the database of registered vehicles based on in part at least one image captured by the image-capture device so that an established match moves the barrier to the enabled position.
US11436835B2 Method for detecting trailer status using combined 3D algorithms and 2D machine learning models
Methods for determining a trailer status are disclosed herein. An example method includes capturing a three-dimensional image and a two-dimensional image. The three-dimensional image may comprise three-dimensional image data, and the two-dimensional image may comprise two-dimensional image data. The example method may further include determining a first trailer status based on the three-dimensional image data, and determining a second trailer status based on the two-dimensional image data. The example method may further include comparing the first trailer status to the second trailer status to determine a final trailer status.
US11436833B2 Image processing method, image processing apparatus, and storage medium that determine a type of moving image, extract and sort frames, and display an extracted frame
An image processing method for extracting a frame from a moving image. The method includes determining a type of the moving image, extracting a frame from the moving image, based on a result of the determination and information indicating a plurality of predetermined types of frame features, the extracted frame having at least one of the plurality of predetermined types of frame features, wherein the plurality of predetermined types of frame features correspond to a plurality of image-capturing scenes, a sorting step of sorting a plurality of frames, which include the frame extracted in the extracting step, into a plurality of frame groups according to the type of the moving image that is determined in the determining step, and displaying the frame extracted in the extracting step on a display device. The plurality of frame groups are displayed on the display device based on the sorting.
US11436831B2 Method and apparatus for video processing
Embodiments of the disclosure provides methods and apparatuses for video processing. In one embodiment, the video processing method comprises: obtaining at least one video from a video repository as a video to be processed; performing semantic recognition on the video in one or more semantic recognition dimensions to obtain one or more video label data items corresponding to the video in the one or more semantic recognition dimensions; generating at least one candidate label combination based on at least one of the one or more video label data items; determining, based on a target label combination selected by a user from the at least one candidate label combination, one or more video clips in the video corresponding to at least one video label in the target label combination; and generating at least one target video clip corresponding to the target label combination based on at least one of the one or more video clips.
US11436830B2 Cognitive robotic process automation architecture
Systems, computer program products, and methods are described herein for implementing a cognitive robotic process automation (RPA) architecture. The present invention is configured to electronically receive a video file from a repository, wherein the video file demonstrating one or more actions to be executed in a sequential manner on an application programming interface associated with an application; initiate a neural processing graph generator on the video file; generate, using the neural processing graph generator, a conjugate task graph comprising one or more nodes and one or more edges; initiate a neural task engine on the conjugate task graph; and execute, using the neural task engine, the conjugate task graph.
US11436829B2 Head-mounted display device for use in a medical facility
A head-mounted display device interfaces with a blood processing machine. The display device has a frame for mounting on a person's head and configured to hold a lens in front of an eye of a wearer. The display device has a display, a wireless circuit configured to communicate with a network, a camera, and a processing circuit. The processing circuit retrieves instructions for servicing the blood processing machine and overlays indicators, text, highlighting and/or icons on the blood processing machine as seen from a field of view of the wearer based on the instructions. The wearer is thereby assisted in servicing the blood processing machine.
US11436827B1 Location tracking system using a plurality of cameras
A tracking system for tracking movements of an object in an area using a plurality of cameras: obtains a first recognized object and first information associated with the first recognized object, where the first recognized object is detected in a first image captured by a first camera, where the first information includes a first location of the first recognized object; stores the first recognized object and the first information in a tracking object on a list of tracking objects; obtains a second recognized object and second information associated with the second recognized object, where the second recognized object is detected in a second image captured by a second camera, where the second information includes a second location of the second recognized object; compares the first information with the second information; and when matched, stores the second information comprising the second location in the tracking object.
US11436821B2 Methods and systems for an automated design, fulfillment, deployment and operation platform for lighting installations
A platform for design of a lighting installation generally includes an automated search engine for retrieving and storing a plurality of lighting objects in a lighting object library and a lighting design environment providing a visual representation of a lighting space containing lighting space objects and lighting objects. The visual representation is based on properties of the lighting space objects and lighting objects obtained from the lighting object library. A plurality of aesthetic filters is configured to permit a designer in a design environment to adjust parameters of the plurality of lighting objects handled in the design environment to provide a desired collective lighting effect using the plurality of lighting objects.
US11436819B2 Consolidation and history recording of a physical display board using an online task management system
A method, computer system, and computer program product for consolidating and recording elements on a physical display board is provided. The embodiment may include capturing an initial image of a visual display mechanism, whereby the initial image contains elements. The embodiment may also include determining an initial state of the visual display mechanism based on the captured image. The embodiment may further include recognizing characters of the elements in the initial state. The embodiment may also include capturing a subsequent image of the visual display mechanism, wherein an auditory cue is sent to a user when there is an unsuccessful attempt to capture the subsequent image. The embodiment may further include comparing the initial image and the subsequent image of the visual display mechanism. The embodiment may include identifying updates to the visual display mechanism based on the comparison of the initial image and the subsequent image.
US11436818B2 Interactive method and interactive system
A tracking method, comprising: acquiring a feature point of a controller by a camera of a HMD, wherein the feature point is used to indicate a corresponding location of the controller; receiving state information of the controller collected by an IMU of the controller, wherein the state information includes position information and rotation information of the controller; and determining a current state of the controller according to the feature point and the state information, wherein the current state includes a current position and a current rotation of the controller.
US11436816B2 Information processing device, learning device, and storage medium storing learnt model
The information processing device includes a storage section storing a learnt model, a reception section, and a processor. The learnt model is obtained by mechanically learning the relationship between a sectional image obtained by dividing a voucher image and a type of a character string included in the sectional image based on a data set in which the sectional image is associated with type information indicating the type. The reception section receives an input of the voucher image to be subjected to a recognition process. The processing section generates a sectional image by dividing the voucher image received as an input and determines a type of the generated sectional image based on the learnt model.
US11436815B2 Method for limiting object detection area in a mobile system equipped with a rotation sensor or a position sensor with an image sensor, and apparatus for performing the same
Provided are a method for limiting an object detection area in a mobile system equipped with an image sensor and an apparatus for performing the method. The method comprises receiving an image obtained with respect to a detection target object from the image sensor and receiving sensor information from a rotation detection sensor only when the mobile system is equipped with the rotation detection sensor—the sensor information includes at least one of 3-axis angular velocity and steering information, wherein the steering information includes a steering angle and a speed; determining rotation of the mobile system by using at least one of the sensor information and motion vectors; and if it is determined that the mobile system is rotating, limiting an object detection area by using at least one of the sensor information and the motion vectors.
US11436811B2 Container-based virtual camera rotation
Methods and systems for controlling a view of a virtual camera in a virtual world. A view of user viewing a virtual world may be controlled or changed while accounting for a user's head position. For example, a virtual camera may be wrapped in a container such that rotation of the container causes rotation of the virtual camera relative to a global coordinate system. Based on a position of a head-mounted display, an initial virtual camera rotation angle relative to a global coordinate system of the virtual world may be identified. An indication to change to view to particular direction may be received. A desired rotation angle relative to the global coordinate system for a view to correspond to the particular direction is then determined. The container is then rotated by a rotation value based at least on both the desired rotation angle and the initial virtual camera rotation angle.
US11436808B2 Selecting augmented reality objects for display based on contextual cues
Disclosed are various embodiments for selecting augmenting reality (AR) objects based on contextual cues associated with an image captured by a camera associated with electronic device. Contextual cues are obtained at an electronic device and AR objects are identified from a memory associated with the electronic device. The electronic device implements a processor employing image segmentation techniques to combine the identified AR objects with the captured image and render the combined image for display at a display associated with the electronic device.
US11436801B2 Method for generating a 3D printable model of a patient specific anatomy
A computer implemented method for generating a 3D printable model of a patient specific anatomic feature from 2D medical images is provided. A 3D image is automatically generated from a set of 2D medical images. A machine learning based image segmentation technique is used to segment the generated 3D image. A 3D printable model of the patient specific anatomic feature is created from the segmented 3D image.
US11436800B2 Interactive system and method providing real-time virtual reality visualization of simulation data
A method for providing an immersive VR experience comprises defining in the computer memory, a model representing a three-dimensional model. The method further comprises producing field data based upon a simulation of the three-dimensional model. Additionally, the method comprises storing the field data within a data structure. The method also comprises extracting, for display, a surface of the three-dimensional model from a simulation model. The method additionally comprises creating a surface texture for the surface of the three-dimensional model from the field data. Further, the method comprises creating a query optimized grid from the calculated field data. Further still, the method comprises displaying a visualization of the calculated field data by means of the surface and the query optimized grid.
US11436798B2 Mesh driven strands
A computer implemented method comprises receiving a mesh representing a 3D object, the mesh comprising a plurality of 2D shapes, receiving a strand feature comprising a plurality of virtual strands, and associating each strand of the plurality of virtual strands with a 2D shape of the mesh.
US11436797B2 Image generation system and method
A system for rasterizing an image of a virtual environment, the system comprising a bounding volume hierarchy, BVH, obtaining unit operable to obtain a BVH representing one or more objects in the virtual environment, wherein each node of the BVH is associated with geometry information for the one or more objects at least partially contained within a bounding volume represented by that node, a frustum identification unit operable to identify a viewing frustum associated with a virtual camera defining a viewpoint within the virtual environment, a BVH identification unit operable to identify a BVH node associated with at least one bounding volume that is intersected by the frustum and a rasterization unit operable to rasterize an image of the virtual environment using the geometry information associated with the identified BVH node.
US11436796B2 Three-dimensional shape data processing apparatus and non-transitory computer readable medium
A three-dimensional shape data processing apparatus includes a processor. The processor receives three-dimensional shape data represented by dividing a space including an object into plural three-dimensional regions, at least one of the plural three-dimensional regions having a size different from another three-dimensional region, extracts from the space a unit shape formed in which a predetermined position in each of the three-dimensional regions included in a three-dimensional region group formed of three-dimensional regions adjacent to each other is defined as a vertex, without missing or repeating any unit shape, and configures a surface of the object as a formation face represented by a flat face, based on each of the extracted unit shapes.
US11436789B2 System for determining visually relevant design differences between 3D models
A system involves determining visually relevant design differences between a first three-dimensional model and a second three-dimensional model. The system has: a model receiving unit configured to receive the first three-dimensional model and the second three-dimensional model; a viewpoint defining unit configured to define one or more viewpoints from which the first three-dimensional model and the second three-dimensional model can be viewed; and a difference determining unit configured to determine visually relevant design differences between the first three-dimensional model and the second three-dimensional model from the one or more viewpoints.
US11436787B2 Rendering method, computer product and display apparatus
An image rendering method for a computer product coupled to a display apparatus may include rendering an entire display region of the display apparatus with a first rendering mode to generate a first rendering mode sample image, determining a target region in the entire display region, rendering the target region with a second rendering mode to generate a second rendering mode sample image, and transmitting data of the first rendering mode sample image and the second rendering mode sample image. The second rendering mode comprises at least a value of an image rendering feature that is higher than that of the first rendering mode.
US11436784B2 SIMD group formation techniques for primitive testing associated with ray intersect traversal
Disclosed techniques relate to primitive testing associated with ray intersection processing for ray tracing. In some embodiments, shader circuitry executes a first SIMD group that includes a ray intersect instruction for a set of rays. Ray intersect circuitry traverses, in response to the ray intersect instruction, multiple nodes in a spatially organized acceleration data structure (ADS). In response to reaching a node of the ADS that indicates one or more primitives, the apparatus forms a second SIMD group that executes one or more instructions to determine whether a set of rays that have reached the node intersect the one or more primitives. The shader circuitry may execute the first SIMD group to shade one or more primitives that are indicated as intersected based on results of execution of the second SIMD group. Thus, disclosed techniques may use both dedicated ray intersect circuitry and dynamically formed SIMD groups executed by shader processors to detect ray intersection.
US11436783B2 Method and system of decoupled object space shading
A method for generating a graphic display of frame images comprises collecting one or more graphic objects to be rendered into a frame image, the one or more graphic objects being represented as a mesh in object space; determining one or more shadels to be computed for the frame image based at least on the one or more input attributes for each of the one or more graphic objects, each shadel being a shaded portion of the mesh; allocating space in a shadel storage buffer for the one or more shadels; populating a work queue buffer, the work queue buffer containing a list of commands to be executed to compute each of the one or more shadels; computing the determined one or more shadels to generate a shaded mesh; and rasterizing the shaded mesh into the frame image. The method can be implemented using a graphics processing unit (GPU).
US11436777B1 Machine learning-based hazard visualization system
A hazard visualization system that can use artificial intelligence to identify locations at which hazards have occurred and a cause therein and to predict locations at which hazards may occur in the future is described herein. As a result, the hazard visualization system may reduce the likelihood of structural damage and/or loss of life that could otherwise occur due to natural disasters or other hazards. For example, the hazard visualization system can train an artificial intelligence model to predict the date, time, type, severity, path, and/or other conditions of a hazard that may occur at a geographic location. As another example, the hazard visualization system can train an artificial intelligence model to identify equipment or other infrastructure depicted in geographic images.
US11436776B2 Information processing apparatus and control method thereof
An information processing apparatus includes a designation unit configured to designate at least a part of a plurality of frame areas in each of which an image provided on a screen is arrangeable; an acquisition unit configured to acquire a frame area that satisfies a predetermined condition from the designated frame area; a first determination unit configured to automatically determine an image to be arranged in the frame area that satisfies the predetermined condition; and a display control unit configured to arrange and display the determined image in the frame area that satisfies the predetermined condition.
US11436775B2 Predicting patch displacement maps using a neural network
Predicting patch displacement maps using a neural network is described. Initially, a digital image on which an image editing operation is to be performed is provided as input to a patch matcher having an offset prediction neural network. From this image and based on the image editing operation for which this network is trained, the offset prediction neural network generates an offset prediction formed as a displacement map, which has offset vectors that represent a displacement of pixels of the digital image to different locations for performing the image editing operation. Pixel values of the digital image are copied to the image pixels affected by the operation.
US11436773B1 Modifying data visualizations to permit improved display of clustered data points
Disclosed is a system to obtain the data set including multiple variables. The system extracts the multiple variables from the data set. Based on the data set, the system creates an ontology indicating multiple relationships between two or more variables among the multiple variables, where a relationship among multiple relationships indicates a correlation between the two or more variables. The system obtains an intent associated with the user, and a visualization standard, where the visualization standard indicates an attribute associated with the visualization. The system generates a sequence of multiple visualizations to present to the user by ranking the multiple visualizations based on the correlation between the two or more variables, the visualization standard and the intent associated with the user. The system presents the sequence of multiple visualizations based on the ranking.
US11436767B2 Providing a constraint image data record and/or a difference image data record
A computer-implemented method includes, in an embodiment, receiving first X-ray projections of an examination volume in respect of a first X-ray energy and second X-ray projections in respect of a second X-ray energy, the first and second X-ray energies differing. The method further includes determination of a multienergetic real image data record of the examination volume based upon the first and second X-ray projections; selection of first voxels of the multienergetic real image data record based upon the multienergetic real image data record; selection of second voxels of the multienergetic real image data record based upon the first X-ray projections and the second X-ray projections, the first voxels including the second voxels and the second voxels mapping contrast medium in the examination volume. The method further includes provision of a constraint image data record and/or a difference image data record based upon the second voxels.
US11436765B2 Method and system for fast reprojection
Methods and systems for computed tomography provide advances in efficiency. The methods operating within the parallel-beam geometry, rather than a divergent beam geometry, for the majority of the operations. In back projection methods perform digital image coordinate transformations on selected intermediate-images, the parameters of one or more coordinate transformations being chosen such that Fourier spectral support of the intermediate-image is modified so that a region of interest has an increased extent along one or more coordinate direction and the aggregates of the intermediate-images can be represented with a desired accuracy by sparse samples. Forward projection methods perform digital image coordinate transformations on an input image to produce multiple intermediate-images, the parameters of one or more coordinate transformations being chosen such that Fourier spectral support of an intermediate-image being produced is modified so that a region of interest has a reduced extent along one or more coordinate direction and the intermediate-images can be represented with a desired accuracy by sparse samples.