| Document | Document Title |
|---|---|
| US11316528B2 |
PWM DAC with improved linearity and insensitivity to switch resistance
A pulse width modulation (PWM) digital-to-analog conversion circuit includes switches 102, 104, 114, 116 controlled by a first PWM signal, and switches 106, 108, 110, 112 controlled by a second PWM signal. A first operational amplifier (op-amp) includes a first input coupled to an output of a filter, and a second input coupled to an output of the first op-amp. During a first time period, an output of a second op-amp is coupled to an input of the filter via switches 102 and 104, and an output of a third op-amp is coupled to the output of the first op-amp via switches 114 and 116. During a second time period, the output of the second op-amp is coupled to the output of the first op-amp via switches 106 and 108, and an output of the third op-amp is coupled to the input of the filter via switches 110 and 112. |
| US11316524B1 |
Process independent spread spectrum clock generator utilizing a discrete-time capacitance multiplying loop filter
In one embodiment, a spread spectrum clock generator, comprising a digital delta sigma modulator coupled to a fractional N, phase locked loop (PLL), the PLL comprising a discrete-time capacitance multiplier loop filter, the discrete-time capacitance multiplier loop filter comprising: an amplifier comprising a non-inverting input and an inverting input; a first switched capacitor resistor and a capacitor coupled to the non-inverting input, the capacitor coupled between the first switched capacitor resistor and the non-inverting input; and a second switched capacitor resistor coupled to the inverting input. |
| US11316520B2 |
Transmitter for transmitting multi-bit data
A transmitter includes a driving circuitry configured to drive a channel coupled to an output node by controlling an output impedance of a pull-up path, an output impedance of a pull-down path, or both, according to one or more multi-bit data signals, a pull-up control signal, and a pull-down control signal; a driving control circuit configured to generate the pull-up control signal and the pull-down control signal according to one or more calibration signals and the multi-bit data signals or according to the calibration signals and one or more duplicate multi-bit data signals, the duplicate multi-bit data signals duplicating the multi-bit data signals; and a look-up table storing values of the calibration signals. |
| US11316517B2 |
Input operation device
To provide an input operation device capable of detecting, using a simple configuration, a first operation of touching an operation surface with an operation body and a second operation of pressing the operation surface with the operation body.An input operation device 11 includes a detection value changing part 31, which changes a detection value of a capacitive sensor 12, and a supporting part 41, which supports a touch sensor part 21 in a state in which the detection value changing part 31 and the touch sensor part 21 are separated from each other. The detection value changing part 31 is arranged on a back surface 24 side opposite to the operation surface 22 of the touch sensor part 21, and changes the detection value depending on contact with the detection part 23. The supporting part 41 includes an elastically shape-changeable part 42, which elastically changes shape so as to bring the detection part 23 into contact with the detection value changing part 31 in response to pressing of the operation surface 22. The capacitive sensor 12 of the input operation device 11 generates a first detection value indicating a first operation of touching the operation surface 22 and a second detection value indicating a second operation of pressing the operation surface 22 toward the detection value changing part 31. |
| US11316516B2 |
Circuit fault detection apparatus
A circuit fault detection apparatus includes an AD conversion circuit, a corrector, first and second determination devices, and a fault detector. The AD conversion circuit detects a voltage corresponding to a current or a voltage applied to the circuit fault detection element, and converts the voltage to a digital value. The corrector corrects a measurement value to a corrected measurement value. The first determination device determines whether or not the electric circuit has the fault, based on a comparison between an uncorrected measurement value and an uncorrected threshold value. The second determination device determines whether the electric circuit has the fault, based on a comparison between the corrected measurement value and a corrected threshold value. The fault detector detects the fault in the electric circuit, based on a condition that at least one of the first or second determination devices determines that the electric circuit has the fault. |
| US11316511B2 |
Method for reducing a thermal load on a controllable switching element
A method for reducing a thermal load on a switching element of an electronic fuse when switching on a load, wherein (a) a switching element is activated, (b) the switching element is deactivated and (c) the switching element is re-activated after reaching a set value of a switch-off duration, where steps (b) and (c) are repeated until an output voltage reaches a value that falls below a specified difference with respect to an input voltage of an electronic fuse or an output current reaches a specified duration current, where set values of a switch-on duration and/or switch-off current and the switch-off duration are maintained until new set values have been determined based on the output voltage, output current, and/or temperature, a pulse duty factor between the switch-on duration and the switch-off duration is adapted, and the specified maximum allowable temperature increase of the switching element is further observed. |
| US11316510B1 |
Transistors drivers with fast shutdown-capability, and associated systems and methods
A method for quickly shutting down a transistor in a switching circuit includes (a) generating a feedback signal associated with current flowing through the transistor, (b) transmitting the feedback signal through an isolating device to a controller, (c) detecting an over-current condition in the switching circuit without transmitting information through the isolating device, and (d) shutting-down the transistor in response to detecting the over-current condition, without transmitting information through the isolating device. A transistor driver includes logic circuitry, an isolating device, driver circuitry configured to drive a transistor according to a control signal received from the logic circuitry via the isolating device, and over-current circuitry configured to (a) detect an over-current condition without receiving information via the isolating device and (b) cause the driver circuitry to shut-down the transistor in response to detection of the over-current condition, without receiving information via the isolating device. |
| US11316509B1 |
Maintaining safe operating area operation of transistors during ramp up
Systems and methods are described for controlling inrush current for a system comprising a plurality of metal-oxide-semiconductor field-effect transistors (MOSFETs). The system may include a control circuit coupled to parallel series of gate drivers, where each gate driver is coupled to a different MOSFET. An inrush current may be received during charging of a capacitor of the switch circuit. During a first period of a ramp time, the control circuit may cause the inrush current to pass through a first gate driver. During a second period of the ramp time, the control circuit may cause the inrush current to pass through a second gate driver. By using a control circuit to cause the inrush current to pass through each MOSFET, a gate-source threshold voltage for the MOSFETs may remain below safe operating areas (SOAs) for the different MOSFETs. |
| US11316504B2 |
Apparatus comprising a differential amplifier
To make it possible to use a transistor with relatively low gate withstand voltage at an output stage in an apparatus including a differential amplifier. An apparatus is provided. The apparatus includes: a differential amplifier having a first current path and a second current path that form a differential pair; a first output-stage transistor that has: a first main terminal connected on a power-supply potential side; a second main terminal connected on a reference-potential side; and a control terminal connected to the second current path; and a first voltage-clamp circuit connected between the control terminal and second main terminal of the first output-stage transistor. |
| US11316502B1 |
Open condition sensing and protection
Systems and methods for detecting an open condition in a master-slave configuration are described. In an example, a controller can be integrated in a slave device of a master-slave configuration. The controller can be configured to activate a current source to supply a current to a pin of the slave device. The controller can be further configured to compare a voltage measured at the pin of the slave device with a reference voltage. The controller can be further configured to, based on the comparison, determine a presence or an absence of an open condition associated with the pin of the slave device. The controller can be further configured to output a signal representing the determination of the presence or the absence of the open condition to a master device. |
| US11316500B2 |
Beamforming with phase correction
A transmitter apparatus that performs beamforming with phase correction uses power detectors present between power amplifiers (PAs) and antennas are used to measure power amplitudes on at least two transmission paths. The sum and difference of these amplitudes are then evaluated to determine a phase difference therebetween. A phase of one signal contributing to the sum and difference may be modified until the sum and difference are the same. Based on an amount of phase modification, a correction signal may be sent to a beamforming circuit to provide phase correction during beamforming. |
| US11316489B2 |
Bidirectional variable gain amplification
An apparatus is disclosed for bidirectional variable gain amplification. In an example aspect, an apparatus comprises an antenna element of an antenna array and a wireless transceiver. The wireless transceiver comprises a transmit path coupled to the antenna element, a receive path coupled to the antenna element, and a phase shifter disposed in both the transmit path and the receive path. The phase shifter is configured to operate in an active mode and comprises a first bidirectional variable gain amplifier and a second bidirectional variable gain amplifier. |
| US11316488B2 |
Controlling analogue gain of an audio signal using digital gain estimation and voice detection
A gain control system for controlling gain applied to an audio signal includes a power estimator configured to estimate the power of a digital signal derived from the audio signal, a digital gain estimator configured to determine, in dependence on the estimated power, a digital gain which would modify the power of the digital signal so as to reach a target power level, and a gain controller configured to adjust an analogue gain applied to the audio signal in dependence on the determined digital gain. |
| US11316486B2 |
High frequency circuit and communication device
A high frequency circuit includes a transmit terminal and a transmit and receive terminal, a power amplifier that amplifies a high frequency signal inputted from the transmit terminal and outputs the high frequency signal toward the transmit and receive terminal, and an output matching circuit that is positioned on a signal path connecting the power amplifier and the transmit and receive terminal and that optimizes the output load impedance of the power amplifier. The output matching circuit includes a matching circuit coupled to an output terminal of the power amplifier, another matching circuit, and a switch that changes a connection between the matching circuits. The power amplifier and the switch are formed at a single semiconductor IC. The matching circuits are formed outside the semiconductor IC. |
| US11316484B2 |
Optically gated transistor selector for variable resistive memory device
An optically gated transistor (OGT) device that may be used as a selector device for one or more variable resistive memory devices. The OGT device isolates the one or more variable resistive memory devices when the OGT is not optically activated. The amount of current conducted by the OGT device is dependent on an intensity of light optically applied to the OGT device. The OGT device includes alternating layers of germanium selenide (GeSe) and GeSe plus an additional element deposited on a substrate. The OGT device includes only two electrodes connected to the alternating layers deposited on the substrate. The OGT device may generate an amplified electrical signal with respect to the magnitude of a received optical signal. The OGT device may be used to generate an optical signal having a different wavelength than the wavelength of a received optical signal. |
| US11316482B2 |
Radio frequency power amplifier adaptive digital pre-distortion
In an embodiment, an apparatus includes: a modulator to modulate a first signal; a distortion circuit coupled to the modulator to digitally pre-distort the first signal to compensate for a distortion of an amplifier; a distortion characterization circuit coupled to the distortion circuit to determine the distortion of the amplifier and configure the distortion circuit based on the determined distortion; a mixer coupled to the distortion circuit to upconvert the pre-distorted first signal to a pre-distorted radio frequency (RF) signal; and the amplifier coupled to the mixer to amplify the pre-distorted RF signal and output an amplified RF signal. |
| US11316478B2 |
Semiconductor device outputting reference voltage
Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced. |
| US11316474B1 |
Double-balanced mixer
A double-balanced mixer, including a coupling transformer, a first diode cascade circuit, a second diode cascade circuit, and a first set of coils, is provided. The coupling transformer receives a first input signal and generates at least one set of signals with opposite voltage phases. The first diode cascade circuit is coupled to the coupling transformer, and generates a first node voltage according to a first set of bias voltages. The second diode cascade circuit is coupled to the coupling transformer, and generates a second node voltage according to a second set of bias voltages. The first set of coils is coupled to the first and second diode cascade circuits, receives the first and second node voltages and a second input signal, and generates an output signal. The first node voltage is equal to the second node voltage. |
| US11316471B2 |
Manual transfer switch for onsite energy generation and storage systems
A manually controlled coupling mechanism for onsite energy generation and storage systems includes a first contact portion having a first electrical contact for coupling to an utility grid and a second electrical contact for coupling to an on-grid AC terminal of an inverter, a second contact portion having a third electrical contact for coupling to an off-grid output terminal of the inverter, and a manually activated multi-position switch, wherein in a first position, only the first contact portion is activated to allow power transfer between the utility grid, the on-grid AC terminal of the inverter and a main electrical panel, and in the second position, only the second contact portion is activated to allow power transfer from the off-grid output terminal of the inverter to the main electrical panel. |
| US11316468B2 |
Washing system for solar panels
A method and system for cleaning an array of solar panels. The system can include an applicator apparatus configured with a plurality of cleaning devices, and an automatic position system (APS) configured with the applicator apparatus. The APS can include a first and second sensor coupled to the applicator apparatus. A controller coupled to the first and second sensor devices can be configured to adjust a position of the applicator apparatus to maintain the plurality of cleaning devices in a direction facing a solar panel to facilitate a removal of an undesired material from the solar panel, while the applicator apparatus is moved from a first position to a second position. A mobile vehicle can be configured with the applicator apparatus to move along a row of the array of solar panels to perform the method for cleaning. |
| US11316464B2 |
Shift range control device
A shift range control device includes a plurality of control units provided for each of motor windings. When a motor rotation angle sensor is normal, a drive control unit controls an energization of the motor winding of its own system by using a motor rotation angle signal. When the motor rotation angle sensor has an abnormality and it is determined that an output shaft is rotating before a standby time elapses, the drive control unit does not energize the motor winding of its own system. When it is determined that the output shaft is not rotating even after the standby time has elapsed, the drive control unit controls the energization of the motor winding of its own system without using the motor rotation angle signal. |
| US11316459B2 |
Motor control system
A control system for an electric motor comprises a controller which receives as an input a demanded motor current and produces at an output an intermediate voltage demand signal, a voltage demand signal correction means arranged to generate a voltage demand correction signal, and a combining means arranged to combine the intermediate voltage demand signal and the voltage demand correction signal to produce an actual voltage demand signal that is applied to the motor by pulse width modulation of the switches of a motor bridge driver. The correction signal compensates for unwanted non-linearities caused by interlock delays in the switching of the motor bridge switches. |
| US11316457B2 |
Inverter type engine generator
An inverter type engine generator includes an alternator operable as a motor for starting an engine; a converter composed of a three-phase rectifying bridge circuit, converting three-phase alternating current output from the alternator into direct current, and operatable as a motor driver for driving the alternator when power is supplied from a power source; and a processor and a memory. The upper and lower three sets of elements of the three-phase rectifying bridge circuit of the converter are configured such that upper elements are configured from duty-controllable switching elements and thyristors connected in parallel therewith, and lower elements are configured from duty-controllable switching elements having diodes. The processor and the memory perform turning off the lower elements and controlling the duty of the thyristors while turning off the upper elements so that an output voltage of the three-phase rectifying bridge circuit is reduced, when a detected terminal voltage of the converter exceeds the target voltage. |
| US11316448B2 |
Arc resistant drive with bypass and synch transfer
The systems and methods disclosed relate to arc resistant medium voltage motor control centers for bypass and synch transfer. A drive control system comprising: a variable frequency drive cabinet comprising a variable frequency drive; a power supply line; at least one motor control cabinet having a top portion and a bottom portion, wherein the at least one motor control cabinet is arc resistant, wherein the at least one motor control cabinet comprises: a medium voltage fused bypass controller in the top portion; a medium voltage non-fused transfer controller in the bottom portion; a reactor compartment, wherein the reactor compartment is arc resistant; wherein the variable frequency drive is coupled to the power supply line and the non-fused transfer controller, and the fused bypass controller is coupled to the power supply line. |
| US11316445B2 |
Electrostatic energy harvester
An electrostatic energy harvester broadly comprises an electrical energy storage component, an electrical energy transfer stage, first and second variable capacitors, and a switching control module. The electrical energy transfer stage includes diode-connected transistors and dictates electrical energy transfer between the electrical energy storage component and the variable capacitors. The switching control module timely switches between the first and second variable capacitors according to a state machine. Subsequent electrical energy investments from the electrical energy storage component are less than an initial electrical energy investment due to remnant electrical energy remaining at the previously active one of the first and second variable capacitors from previous electrical energy harvesting. |
| US11316444B2 |
Charge pump circuit and method for voltage conversion
An inverter circuit arrangement that connects an IO-link master with a slave includes an AB class transistor circuit of which the currents are replicated by a current mirror to a terminal of the slave. A bias circuit provides bias voltages to the AB class transistors. A comparator forms a feedback between the master and slave terminals. The circuit provides for a bidirectional inversion to make a slave device IO-link compatible. |
| US11316442B2 |
Switch-mode power converters using hall effect sensors and methods thereof
System and method for a power converter. For example, the system includes a first controller; a first transmitter; a first receiver; one or more first wires; one or more second wires; a second controller; a second receiver connected to the first transmitter through the one or more first wires; and a second transmitter connected to the first receiver through the one or more second wires. The first controller is configured to output a first control signal to a first switch to affect a first current flowing through a primary winding of a power converter; and generate a first input signal. The first transmitter is configured to receive the first input signal and generate the first current. The second receiver includes a first coil configured to generate a first magnetic field based at least in part on the first current flowing through the first coil. |
| US11316441B2 |
Controlled gate-source voltage N-channel field effect transistor (NFET) gate driver
Controlling gate-source voltage with a gate driver in a secondary-side integrated circuit (IC) controller for a secondary-controlled AC-DC converter is described. In an example embodiment, the gate driver is configured to programmably control the gate-source voltage and the slew rate of a secondary-side provider field effect transistor (FET) in the converter. |
| US11316436B2 |
Active clamp controller circuit
A power converter includes an input side to receive an input voltage, and an output side to provide an output voltage, a main switch, a controller, a transformer having a primary winding that couples the main switch to the input side, an active clamp switch coupled to the input side by an active clamp capacitor, and an active clamp controller circuit. The active clamp controller circuit includes a sampling circuit to generate a sampled main switch voltage, a delay circuit to generate a delayed sampled main switch voltage, a voltage comparison circuit, and an active clamp switch controller circuit configured to i) enable the active clamp switch based on a first comparison between the sampled main switch voltage and the delayed sampled main switch voltage, and ii) disable the active clamp switch based on a second comparison between the sampled main switch voltage and the delayed sampled main switch voltage. |
| US11316434B2 |
Electric power conversion apparatus
An electric power conversion apparatus includes a main DC-to-DC converter and an electric power conversion unit. The main DC-to-DC converter is configured to perform voltage conversion between a first-voltage section that operates at a first voltage and a second-voltage section that operates at a second voltage. The electric power conversion unit is connected with the first-voltage section and includes an electric power conversion section and an auxiliary DC-to-DC converter. The electric power conversion section is configured to perform electric power conversion between the first-voltage section and a third-voltage section that operates at a third voltage. The auxiliary DC-to-DC converter is connected in parallel with the main DC-to-DC converter. The auxiliary DC-to-DC converter shares a common configuration section with the electric power conversion section. The common configuration section is constituted of at least part of the electric power conversion section. |
| US11316430B2 |
DC to DC switched inductor boost converter
A DC-DC switched inductor boost converter with reduced switch voltage stress including two inductors and two active switches. The two inductors may be configured to charge in parallel when the two active switches are turned on, and the two inductors may be configured to discharge in series when the two active switches are turned off A Switched Inductor Boost (SI-B) converter is proposed with reduced voltage stress across active switches to achieve higher output voltage. The SI-B converter configuration is transformer-less and derived by replacing the diode of the classical switched inductor structure with an active switch. As a result, compared to the existing transformer-less high step-up converter or switched inductor boost converter, certain embodiments have the merit that the switch voltage stress across the active switch is less than the output voltage. |
| US11316422B1 |
Station-to-station synchronous and interleaved phase system for multiple DC/AC power supplies connected in parallel
A station-to-station synchronous and interleaved phase system for multiple DC or AC power supplies connected in parallel includes a master and a plurality of slaves. The master and the slaves each includes a time base selector, a time base generator, a station-to-station synchronization and interleaved phase controller, a local interleaved phase controller and multiple sets of switching circuits, so that the switching circuits are controlled by the local interleaved phase controller to form interleaved phases, and the time base selector and the station-to-station synchronization and interleaved phase controller further control the station-to-station phases between the master and the slaves, and further generate synchronization and interleaved phases between the master and the slaves. In addition to the advantages of increasing the equivalent operating frequency, it can reduce the rate of ripples and increase the response speed. |
| US11316420B2 |
Adaptive bias control for a voltage regulator
A circuit includes first and second transistors, an adaptive bias current source circuit, and an adaptive resistance circuit. The first transistor has a control terminal and first and second current terminals. The control terminal of the first transistor being a first input to the circuit. The second transistor has a control terminal and first and second current terminals, and the control terminal of the second transistor is a second input to the circuit. The first and second inputs are differential inputs to the circuit. The adaptive bias current source circuit is coupled to the second current terminal of the first transistor. The adaptive resistance circuit is coupled between the second current terminal of the second transistor and the adaptive bias current source circuit. |
| US11316416B2 |
Method of manufacturing rotor, rotor, and motor
A method of manufacturing a rotor includes forming plates each including a scrap portion that has a center hole and core plate portions that are disposed continuously with the scrap portion on an inner side of the center hole and that each defines a portion of a corresponding one of the outer cores forming a multilayer body including the outer cores by stacking the plates, setting at least a portion of the multilayer body and a portion of the inner core in a mold with a gap therebetween in the radial direction, forming a molded body by pouring a molten filling material into a gap in the mold and forming the filling section, at least a portion of the filling section being positioned between the outer cores, and separating the scrap portion and the core plate portions from each other. |
| US11316412B2 |
Motor including sensor magnet
A motor includes an annular sensor magnet rotated integrally with a rotation shaft of a rotor by a bushing, and a rotation detector arranged opposed to the sensor magnet to detect rotation information of the rotor. The bushing includes an annular fixing portion, which is fixed to the rotation shaft, and an extension, which extends from the fixing portion in an axial direction of the rotation shaft and is embedded in the sensor magnet. The extension includes an axial engagement portion engaged with the sensor magnet in the axial direction inside the sensor magnet. |
| US11316409B2 |
Motor including flow rectification section and bulk reduction section
A motor includes a holder having an annular plate shape with a plate thickness in an axial direction of a rotor housing, and including a flange section disposed so the rotor housing rotates at an inner side of the flange section, a center piece including a plate-shaped section opposing the flange section, and a heat sink including a heat dissipation section projecting from the plate-shaped section toward the flange section. The flange section integrates with a flow rectification section including a cooling air flow rectification face extending along a cooling air flow path between the flange section and the plate-shaped section. The heat dissipation section is disposed in the cooling air flow path. The cooling air flow rectification face closely opposes the top of the heat dissipation section. A bulk reduction section is between the cooling air flow rectification face and the flange section opposite of the plate-shaped section. |
| US11316408B2 |
Cooling apparatus for electric motor
The cooling apparatus uses oil to cool an electric motor whose output is transmitted to a drive shaft inserted into a motor shaft via a reduction gear and a differential gear. An oil seal seals the gap between the differential case of the differential gear and the outer peripheral surface of the drive shaft. An oil passage is formed inside the drive shaft. An oil introduction hole is formed in the drive shaft on the side of the differential gear with respect to the oil seal to introduce oil from the differential gear into the in-drive-shaft oil passage. An oil outlet hole is formed in the drive shaft on the side of the electric motor with respect to the oil seal to draw oil from the in-drive-shaft oil passage to the inside of the motor shaft. |
| US11316405B2 |
Human motion energy harvesting apparatus and conversion method thereof
A human motion energy harvesting apparatus embeddable in a wearable electronic device is provided. The apparatus may include a base; a first rotor disposed in a ring shape and connected to the base, the first rotor being rotatable circumferentially relative to the base, wherein a plurality of pairs of first permanent magnets may be disposed on a surface of the first rotor; an oscillating weight fixed coaxially with the first rotor; a second rotor disposed in a ring shape and coaxially connected to the base with the first rotor, the second rotor being rotatable circumferentially relative to the base, wherein a plurality of pairs of second permanent magnets may be disposed on a surface of the second rotor; a modulation ring fixed to the base coaxially with the first rotor between the first rotor and the second rotor; and a stator fixed to the base coaxially with the first rotor on a side of the second rotor opposite the first rotor, wherein a coil is arranged on the stator. |
| US11316399B2 |
Electric actuator
An electric actuator includes a motor which has a rotor having a motor shaft and a stator, a motor case for housing the motor, and a deceleration mechanism coupled to the motor shaft. The motor case has a case cylinder portion and a lid. The lid has a top plate portion, an outer cylinder portion, an inner cylinder portion, an annular groove portion, and an annular seal member. An axial length of the outer cylinder portion is larger than an axial length of the inner cylinder portion. An inner diameter of the annular seal member is smaller than an outer diameter of the inner cylinder portion in a state that the annular seal member is removed from the lid. The annular seal member is housed in the annular groove portion in a state of being in contact with an outer peripheral surface of the inner cylinder portion. |
| US11316396B2 |
Coil body
One U-phase coil portion and the next U-phase coil portion in a circumferential direction, one V-phase coil portion and the next V-phase coil portion in the circumferential direction, and one W-phase coil portion and the next W-phase coil portion in the circumferential direction are electrically connected by conductive junctions, respectively. |
| US11316393B2 |
Magnetic sheet for rotor with a non-through shaft, method of obtaining such a sheet and associated rotor
The magnetic sheet for rotor with a non-through shaft with no recess at the center thereof is intended to be inserted between two half-shafts of the rotor. It comprises at least one locking means intended to cooperate with adjacent elements so as to prevent a relative movement of said sheet relative to the adjacent elements. |
| US11316391B2 |
Closed-loop control for transient operation of variable flux and permanent magnet electric machines
A method for controlling transient operation of a rotary electric machine in an electric powertrain or other electrical system includes, during a shunt angle transition occurring during a maximum torque per ampere (MTPA) control region, determining an estimated output torque of the electric machine via a torque estimation block using d-axis and q-axis current commands and an additional value, i.e., an actual shunt angle or a machine temperature. The method includes subtracting the estimated output torque from a commanded output torque to derive an adjusted commanded torque value or torque error, and calculating, from the torque error, a delta d-axis current command and a delta q-axis current command. The method includes adjusting d-axis and q-axis current commands using the delta commands to produce adjusted d-axis and q-axis current commands, which are then used as closed-loop feedback control terms by the torque estimation block. |
| US11316385B2 |
Wireless energy transfer
An example operation may include one or more of determining an energy state of a system, generating a wireless energy transfer request based on the energy state, transmitting the wireless energy transfer request to another system, receiving wireless energy transfer information from the other system, performing a wireless energy exchange with the other system based on the wireless energy transfer information, and receiving a data block associated with the wireless energy exchange from the other system. |
| US11316383B1 |
Wireless power systems with foreign object detection
A wireless power system has a wireless power transmitting device and a wireless power receiving device. The wireless power transmitting device uses a wireless power transmitting coil to transmit wireless power signals to the wireless power receiving device during wireless power transmission periods. During alternating foreign object detection periods, the wireless power transmitting device gathers signals from the wireless power transmitting coil to detect foreign objects. Another wireless power transmitting device may transmit signals that can cause interference. To help reduce interference, the wireless power transmitting device gathers signals with a sensing coil that is separate from the wireless power transmitting coil and subtracts these signals from signals gathered with the wireless power transmitting coil. A signal quality metric may be used in adjusting the timing of the foreign object detection periods to help avoid interference from the other wireless power transmitting device. |
| US11316377B2 |
Wireless power transceivers for supplementing wireless power delivery and extending range
Wireless transceiver devices are disclosed herein that enhance and otherwise extend the wireless power transmission range of a retrodirective wireless power transmission system. The wireless transceiver devices can be configured to operate, in whole or in part, as additional wireless power transmission systems enhancing range of the retrodirective wireless power transmission system and/or delivering supplemental wireless power to devices within range. |
| US11316376B2 |
Wireless power transmission system and method for detecting RFID/NFC card
Disclosed in the present application is a wireless power receiver comprising: a power pickup unit configured to receive, in a power transfer phase, wireless power generated by magnetic coupling from a wireless power transmitter; and a communications/control unit configured to transfer, in a negotiation phase, a first end-of-power-transfer (EPT) packet to the wireless power transmitter for detecting an RFID/NFC card, and to detect the RFID/NFC card during a re-ping time secured on the basis of the first EPT packet, wherein the first EPT packet instructs requesting the removal of a power signal for a predetermined time. As the process for detecting communication cards, such as RFID or NFC, between the wireless power transmitter and receiver is clearly defined, such RFID/NFC cards can be protected against getting destroyed by the wireless power, and a stable wireless power transfer can be achieved. |
| US11316372B2 |
Driving circuit and wireless power transmitter including the same
The present disclosure relates to a driving circuit and a wireless power transmitter including the same. In view of the fact that a transmitter-side coupling circuit exhibits a high resistance when an AC current having a frequency far away from its operating frequency is applied to input terminals, the present disclosure connects a plurality of transmitter-side coupling circuits which operates at different operating frequencies in parallel at output terminals of the same inverting circuit. The controller controls an operating frequency of the AC current output from the inverting circuit to drive different one of the transmitter-side coupling circuits to operate. Thus, one driving circuit can drive the transmitter-side coupling circuits which operate at different operating frequencies or under different technical standards to supply electric energy. The driving circuit is compatible with wireless power receivers which operate at different operating frequencies, and thus has improved compatibility. |
| US11316366B2 |
Electrical docking station
Systems and apparatuses for access-controlled electrical docking stations that automatically switch power to an electrical system between generator power and utility power are disclosed herein. An illustrative electrical docking station can include a cabinet that houses a circuit breaker, a generator interface to connect generators to the electrical docking station, an Automatic Transfer Switch, and a power supply. The power supply can supply converted DC power and protection to different accessories for the electrical docking station including an alarm, a supervisory control and data acquisition (SCADA), and a locking mechanism. The locking mechanism can be configured to lock a door to the generator connectors in a closed position when the ATS is energized by a generator and to not lock the door when the door is in an open position. In some such circumstances, the alarm can shine green or provide an audible alarm and shine red respectively. |
| US11316363B2 |
Energy storage systems for electrical microgrids with pulsed power loads
Pulsed power loads (PPLs) are highly non-linear and can cause significant stability and power quality issues in an electrical microgrid. According to the present invention, many of these issues can be mitigated by an Energy Storage System (ESS) that offsets the PPL. The ESS can maintain a constant bus voltage and decouple the generation sources from the PPL. For example, the ESS specifications can be obtained with an ideal, band-limited hybrid battery and flywheel system. |
| US11316356B2 |
Methods and apparatus for a battery
Various embodiments of the present technology may provide methods and apparatus for a battery. The apparatus may be configured to autonomously select an appropriate battery profile for a given battery. Autonomous selection may be achieved by measuring the time that the battery voltage is within a specified range and comparing the time results to a reference table having known battery data. |
| US11316354B1 |
Wireless charger with integrated cable reel
A wireless charger includes a housing with a circumferential outer edge; the outer edge including an annular groove with opposing first wall and second wall; and a cable having a first end operably secured inside the housing and an opposite second end having a connector for connecting to a power source. The cable is removably wound inside the groove; and a sleeve is slidably attached around the cable. The sleeve is disposed between the first end and the opposite second end. The sleeve is slidable along the length of the cable, and the sleeve being frictionally removably attached between the first wall and the second wall. |
| US11316353B2 |
Distributed charging station
A device charging system application to track one or more batteries configured to supply power to at least one load device and a central charging station in communication with the battery and including a transceiver and an electronic processor configured to define a virtual boundary within an area proximate to the central charging station, determine a proximate location of the battery, determine, based the location of the battery, whether the battery is within the virtual boundary, and transmit a command to the battery causing the battery to stop supplying power to the load device when the battery is not within the virtual boundary. |
| US11316352B2 |
Battery management
A battery management system (103) for a battery (100) comprising a plurality of battery cells (101, 102) connected in parallel with each other. The battery management system comprises an electronic circuit (104) for connection across at least one of the plurality of battery cells. The electronic circuit comprises a charge storage device (105) and a switching device (106). The switching device switches the circuit between a first state in which charge is discharged from the at least one battery cell and directed to the charge storage device and a second state in which charge is discharged from the charge storage device and directed to the at least one battery cell. The switching device is arranged to repeatedly switch the circuit between the first state and the second state to cause the at least one battery cell to undergo pulsed charging and discharging to and from the charge storage device. |
| US11316351B2 |
Power bridge device using mobile robot battery
A power bridge device includes: a power management unit (PMU), which is coupled to an external mobile robot and receives and monitors a battery from a mobile robot, wherein the battery provides a power; a control unit, which is coupled to the PMU and operates according to the power provided by the PMU, wherein when the control unit is waken up by the PMU, the control unit passes a handshake protocol with the mobile robot to obtain a battery control of the mobile robot, the control unit determines whether the battery of the mobile robot is sufficient for device charging according to the PMU; a DC/DC converter, which is coupled to the PMU and the control unit, and converts the power into a required voltage value according to the control unit and outputs a DC power source; and a DC/AC inverter, which is coupled to the PMU and the control unit and converts the power to output an AC power source according to the control unit. |
| US11316346B2 |
CAN bus terminating resistor arrangement
A mobile power source includes an electrical generator, a controller, a resistor, and a user-activated switch positioned on a control panel of the electrical generator, the user-activated switch is configured to move between at least a first position and a second position. In response to the user-activated switch being in the first position, the resistor is configured to act as a terminating resistor at one end of a controller area network (CAN) bus of a power generation system, and in response to the user-activated switch being in the second position, the resistor is configured to be prevented from acting as the terminating resistor of the CAN bus. |
| US11316344B2 |
Capacity estimator for an energy generation and/or storage system
A method and apparatus for estimating capacity of a system including an energy generation system, an energy storage system or both. The method and apparatus initially estimate the system capacity based on a facility location and size. The initial estimate may be adjusted through adjustment of at least one parameter. An updated capacity estimate is generated and displayed. |
| US11316342B2 |
Direct current power supplying system
A standalone direct current (DC) power supplying system, which is not connected to commercial power, includes a power conditioner that supplies generated power W2 of a power generator to a DC bus, DC/DC converters that convert a bus voltage Vbs and supply load power (WLa+WLb) to load appliances, bidirectional DC/DC converters that supply a constant DC current from the DC bus to storage batteries or from the storage batteries to the DC bus, and an energy management system. When the generated power W2 exceeds the load power (WLa+WLb), the energy management system causes the converters to supply a constant DC current with a common charging rate to the storage batteries, and when the generated power W2 falls below the load power (WLa+WLb), the energy management system causes the converters to supply a constant DC current with a common discharging rate from the storage batteries to the DC bus. |
| US11316337B2 |
Power supply apparatus that outputs voltage supplied to load
A processor starts output of a drive signal prior to output of a control signal. The processor determines a fault related to the drive signal based on a detection signal outputted from a detection circuit. In a case where a fault related to the drive signal is not detected, the processor starts output of the control signal. In a case where a fault related to the drive signal is detected, the processor stops output of the drive signal. |
| US11316335B2 |
Active disconnect device
A disconnect device includes a mounting plate having a thermally conductive substrate applied onto the mounting plate. A first layer of an electrically conductive material is applied onto the substrate. A semiconductor switch supported on the first layer connects or disconnects an input power source to or from a load. A second layer of an electrically conductive material applied onto the substrate is electrically isolated from the first layer. An electronic sensing, control and protection circuit is supported on the second layer and is connected to the semiconductor switch to control operation of the semiconductor switch. A control unit in communication with the electronic sensing, control and protection circuit via an electrically isolated control path provides control and communication between the electronic sensing, control and protection circuit and the semiconductor switch. |
| US11316333B2 |
System for transferring a magnetic link
The invention relates to a system (1) for transferring a magnetic link (2) between a first element and a second element rotatable relative to the first element, a first end of said link being adapted to be attached to the first element and a second end of the link being adapted to be attached to the second element, characterised in that it comprises: a first part (11, 13) adapted to be rigidly connected to the first element; a second part (21, 23) rotatable relative to the first part and adapted to be rigidly connected to the second element so as to be rotationally driven at the rotational speed of said second element; a third part (30, 31) rotatable relative to the first and second parts, a member for coupling (40, 45) the second and third parts, adapted to rotationally drive the third part at a speed equal to half the rotational speed of the second element, two sets of two coaxial ferromagnetic surfaces for winding the magnetic link (2), a first set comprising a first surface integral with the first part and a second surface integral with the third part,a second set comprising a third surface integral with the second part and a fourth surface integral with the third part. |
| US11316330B2 |
Cable wall passthrough and kit
The invention relates to a wall duct for cables, comprising a housing component which can be mounted on a housing wall in the region of a wall opening and has a recess for guiding cables through the housing component; separators which are integrally formed on the housing component and with which multiple openings separated by the separators are formed in the recess, wherein the openings are configured to accommodate one or more respective sealing elements, with which a cable duct for at least one of the cables is produced; and a closure component which closes at least one of the openings and is arranged on the housing component and/or the separators by means of one or more target breaking points. The invention also relates to an assembly for a wall duct for cables. |
| US11316325B2 |
Ground mat coupling systems and methods
An apparatus includes a first terminal configured to be coupled to a substation around mat for a substation and a second terminal configured to be coupled to a safety around mat for a piece of electrical equipment powered by the substation. The system further includes at least one voltage-dependent resistance device, such as at least one metal oxide varistor (MOV) configured to be coupled between the first and second terminals. At least one circuit interruption device, such as a fuse and/or a disconnect switch may be coupled in series with the at least one voltage-dependent resistance device. |
| US11316315B2 |
Filter element, laser device, fiber laser device, filter method, and method for manufacturing laser device
A fiber laser apparatus includes a pump light source that emits pump light; a pump delivery fiber that guides the pump light; an amplifying optical fiber that is optically coupled to the pump delivery fiber and guides laser light; and a filter element that causes more loss of light of a wavelength range that includes a peak wavelength of at least one of Stokes light and anti-Stokes light than the laser light. The Stokes light and anti-Stokes light result from four-wave mixing involving a plurality of guide modes in a multi-mode fiber that guides the laser light. The filter element is disposed between: the pump delivery fiber and the amplifying optical fiber, the amplifying optical fiber and the multi-mode fiber, or at the multi-mode fiber. |
| US11316312B2 |
Low profile circular dongle
A mobile peripheral adapter rotationally couples first and second circular housings with a spindle to define and cable cavity. A cable retracts into and extends from the cable cavity by rotation of the housing portions to bring a cable connector into the cable cavity at an opening formed to align with the cable connector at retraction. First and second magnets disposed in the cable cavity retrain the cable connector when retracted. The opening at the bottom surface of the peripheral adapter reduces the vertical height of the cable cavity by providing vertical space within which the cable connector can reside. |
| US11316310B2 |
Electrical connector
An electrical connector includes an insulating housing, a center ground plate fastened in the insulating housing, a strengthening ground strap, and a terminal assembly fastened in the insulating housing. The strengthening ground strap is fastened to the insulating housing. The strengthening ground strap has a front slice and two lateral slices. The front slice is fastened to a front surface of the center ground plate. The top edge of the front slice is higher than a top surface of the center ground plate. A bottom edge of the front slice projects beyond a bottom surface of the center ground plate. The two lateral slices are disposed to two opposite sides of the center ground plate. The terminal assembly includes a plurality of high speed terminals disposed among the front slice and the two lateral slices. |
| US11316309B2 |
Connector assembly coupled to a side of circuit board
A connector assembly includes a first signal pin formed to be in contact with a signal line of a circuit board; a first insulator surrounding the first signal pin; and a first housing accommodating the first signal pin and the first insulator and having a hole at a rear thereof corresponding to the first signal pin, wherein the first housing includes at least one clamping arm disposed on at least one side of the hole, protruding to a rear of the first housing, and having a lower surface formed to be in contact with an upper surface of the circuit board and the connector assembly further includes a ground plate disposed below the clamping arm and having an upper surface formed to be in contact with a lower surface of the circuit board; a clamping plate movably disposed below the ground plate; and a fastening member. |
| US11316306B2 |
Electrical connector
An electrical connector is used to electrically connect a first component and a second component, including: an insulating body, having an insertion slot for the first component to insert backward therein; multiple terminals, having at least one pair of first signal terminals. Each terminal has a contact portion and a tail portion provided in the front-rear direction. The contact portion is provided relatively in front of the bottom surface and protrudes into the insertion slot to be electrically connected to the first component. The tail portion is electrically connected to the second component. Each terminal further has a connecting portion located between the contact portion and the tail portion. An insulating block is used to fix the terminal. The connecting portion of each terminal extends forward from the front surface of the insulating block and passes beyond the bottom surface. A portion of the connecting portion of each terminals not passing forward beyond the bottom surface is defined as an adjusting portion. A medium between the two adjusting portions of each pair of first signal terminals is completely a first medium. A dielectric coefficient of the first medium is less than a dielectric coefficient of the insulating body. |
| US11316302B2 |
Electrical plug-in connection for a medical device arrangement
An electrical plug-in connection (100) provides a positive connection of a plug-in element (110) to a receiving element (120) within a medical device arrangement (700). The plug-in element forms a male part with an insertion area (112). The receiving element forms a female part with a receptacle (122) corresponding to the insertion area. In a plugged-together state this provides an electrical connection between a plug-side cable (118) connected to the plug-in element and a receptacle-side cable (128) connected to the receiving element via at least two contact areas. The insertion area is 180° rotationally symmetrical relative to an insertion axis (140) of the electrical plug-in connection. The insertion axis is oriented to an insertion direction, whereby a pole reversal of the electrical plug-in connection is allowed without being mirror symmetrical in relation to a reference plane comprising the insertion axis. |
| US11316300B2 |
Connector assembly and elastic engaging component
A connector assembly includes a first electrical connector, a second electrical connector detachably plugged to the first electrical connector and an elastic engaging component including a mount part, a bent part, an arm part, an engaging part and a press part. The mount part includes an insertion plate configured to be inserted into the retaining groove and a movable plate connected to the insertion plate. The arm part is connected to the mount part via the bent part. The arm part and the mount part are located at the same side of the bent part. The engaging part is located at the arm part and is movable along with the arm part. the engaging part is configured to be engageable with the second electrical connector. The press part is connected to the arm part, and the arm part is movable by pushing the press part. |
| US11316299B2 |
Electric power device with integrated safety measure
In a particular implementation, an electric power device includes a body, a receptacle configured to receive a plug, and a source connector configured to be coupled to a power source. The electric power device further includes a casing coupled to the body and movable with respect to the body between a first position in which the casing defines an enclosed chamber and access to the receptacle is inhibited and a second position in which the casing is configurable to enable access to the receptacle for receipt of the plug. A transition from the first position to the second position is configured to cause the receptacle to be electrically decoupled from the source connector when the casing is at the second position, and a transition from the second position to the first position is configured to cause the receptacle to be electrically coupled to the source connector when the casing is at the first position. |
| US11316297B2 |
Electrical plug connector
An electrical plug connector includes a metallic shell, an insulated housing in the metallic shell, plug terminals held in the insulated housing, and a hook member. Hook portions of the hook member extend into the insertion cavity of the insulated housing. Each hook portion forms a first positioning portion and a second positioning portion. When the electrical plug connector is mated with an electrical receptacle connector, the electrical plug connector can be positioned with the electrical receptacle connector through multiple contacts, thereby preventing the electrical plug connector from shaking. |
| US11316296B2 |
Miniaturized connector
Disclosed is a connector including an insulating body assembly and a plurality of terminal assemblies arranged side by side. Each of the plurality of terminal assemblies includes a connecting terminal and a contact terminal. The connecting terminal is disposed in the insulating body assembly, and a front end of the contact terminal is exposed to the insulating body assembly. A portion adjacent to the tail end of the contact terminal is provided with an accommodating hole a front end of the connecting terminal is inserted into the accommodating hole, and the front end of the connecting terminal is in elastic contact with an inner wall of the accommodating hole and is configured to move in the accommodating hole. |
| US11316294B2 |
Miniaturized electrical connector systems
Miniaturized electrical connector systems are disclosed herein. In exemplary aspects disclosed herein, the connector system includes a twinaxial female connector having a housing and at least one dielectric positioned therein. The at least one dielectric defines two parallel channels configured to receive at least a portion of two conductors of a twinaxial cable. The twinaxial female connector includes an oval interface configured to orient and align the conductors of the twinaxial cable with mating pins of a male connector. The twinaxial female connector further includes two spring-type interconnects positioned within the oval interface, each configured to directly contact a conductor of the twinaxial cable and a mating pin of the male connector. The twinaxial female connector further includes a retaining clip attached to an exterior of the housing with a lever arm biased towards and pivotable from an engaged orientation. Such features reduce the manufacturing complexity, cost, and overall size. |
| US11316290B2 |
Printed circuit board connector
A pin-like printed circuit board connector is at least slightly reversibly deformable and has a pin axis. The printed circuit board connector has at least a first slit which starts at the insertion end and runs through the pin axis towards the printed circuit board connection region and by means of which at least two segments pointing in the insertion direction are formed. In particular, the printed circuit board connector can additionally have a second such slit which intersects the first slit in the pin axis, in particular at right angles, forming even four segments pointing in the insertion direction. |
| US11316289B2 |
Support barrel for an electrical lead
A support barrel for an electrical lead includes a first barrel end and a second barrel end opposite to the first barrel end in a circumferential direction. The first barrel end engages the second barrel end and forms a positive engagement acting in the circumferential direction. |
| US11316286B2 |
Electrical connector
The present disclosure provides an electrical connector comprising an electrical connector body, a conductive adhesive layer, and a connecting cable. The electrical connector body comprises a plurality of electrical connecting conductors. The conductive adhesive layer covers the plurality of electrical connecting conductors. The connecting cable comprises a plurality of cables. One end of each of the cables comprises a conductive pin. The conductive pin of each of the cables is disposed on the conductive adhesive layer. The conductive pin of each of the cables forms an electrical connection path with the corresponding electrical connecting conductor. The plurality of electrical connection paths is individually separated. By combining the conductive pins of each cable with the electrical connecting conductors of the electrical connector body through a conductive adhesive layer, an electrical connection path could be formed to bond the connecting cable and the electrical connector body without any existing soldering process. |
| US11316281B2 |
Antenna apparatus
An antenna apparatus may include: a feed via; a patch antenna pattern electrically connected to the feed via; and coupling patterns spaced apart from the patch antenna pattern and spaced apart from each other. At least one of the coupling patterns may protrude in a direction in which the at least one of the coupling patterns is spaced apart from the patch antenna pattern. |
| US11316280B2 |
Tiling system and method for an array antenna
The system can include and the method can provide a first printed circuit board antenna tile. The first printed circuit board antenna tile comprises a repeating pattern of antenna element units. The antenna can also include and the method can also provide a second first printed circuit board antenna tile comprising the repeating pattern. The first printed circuit board antenna tile and the second first printed circuit board antenna tile can be attached such that the antenna elements maintain the same spacing in an X-Y plane associated with the repeating pattern across a boundary the first printed circuit board antenna tile and the second first printed circuit board antenna tile. |
| US11316272B2 |
Antenna apparatus
An antenna apparatus includes a feed line; a ground plane surrounding a portion of the feed line; a feed via electrically connected to the feed line and extending from a first side of the feed line; a first end-fire antenna pattern disposed on a first side of at least a portion of the ground plane and spaced apart from the ground plane, and electrically connected to the feed via; a second end-fire antenna pattern disposed on a second side of the feed line opposite the first side of the feed line and spaced apart from the first end-fire antenna pattern; and a core via electrically connecting the first end-fire antenna patterns to the second end-fire antenna pattern. |
| US11316268B2 |
Method for antenna beam and null steering under high platform dynamics
An electronically steerable antenna includes an embedded antenna processor and orientation sensor, separate from any orientation sensor within a corresponding GPS receiver. The orientation sensor tracks orientation changes in the mobile platform including the electronically steerable antenna, and an antenna processor updates beams and nulls produced by the antenna to track a real-world location based on the orientation changes. The embedded antenna processor periodically compares the orientation data from the embedded orientation sensor with orientation data from systems aboard the mobile platform to calibrate. |
| US11316267B2 |
Devices and methods for mitigating external passive intermodulation sources in base station antennas
The present disclosure describes an antenna mount kit. The antenna mount kit includes an antenna mount and a pipe clamp coupled to the antenna mount. The pipe clamp includes a front shell half and a rear shell half, the front shell half and the rear shall half having a front shell half inner surface and a rear shell half inner surface configured to cooperate with each other such that the mounting structure can be secured within the pipe clamp, at least two threaded bolts, a plurality of washers, and a plurality of nuts. The antenna mount kit may further include at least two isolation fasteners. The front shell half inner surface and the rear shell half inner surface each include a plurality of jagged teeth formed of a non-metallic material, at least two front shell bolt apertures through the front shell half, and at least two rear shell half bolt apertures through the rear shell half. The front shell half bolt apertures align with the rear shell half bolt apertures when securing the mounting structure within the pipe clamp. Antenna mount assemblies and methods for reducing external passive intermodulation from an antenna mount kit are also provided. |
| US11316264B2 |
Antenna device and display device comprising the same
An antenna device according to an embodiment of the present invention includes a dielectric layer, and an antenna pattern disposed on the dielectric layer. The antenna pattern includes a mesh structure in which unit cells defined by a plurality of electrode lines are assembled. A minimum distance between opposite sides facing each other in the unit cell is from 20 μm to 225 μm, and a line width of the electrode line is from 0.5 μm to 5 μm. A visual recognition of electrodes may be suppressed and a signal sensitivity may be enhanced by using the unit cell structure. |
| US11316254B2 |
Apparatus and method for multi cell communication using beamforming in wireless communication system
A multicell access method using beamforming in a wireless communication system is provided. In the method for operating a terminal, an access procedure for accessing a first base station using a first antenna and accessing a second base station using a second antenna is performed. Communication with the first base station is performed using the first antenna. Communication with the second base station is performed using the second antenna. |
| US11316253B2 |
Electronic device comprising antenna
An electronic device includes a housing including a first plate, a second plate opposite to the first plate, and a side member surrounding a space between the first plate and the second plate, and including at least part of a conductive material, a flexible printed circuit board (FPCB) attached on an inner surface of the housing, a first antenna element which is included in the FPCB and in which a slot is formed, and a first radio frequency integrated circuit (RFIC) for the first antenna element. An opening is formed in the side member or the second plate of the housing. The FPCB is attached the inner surface of the housing such that at least part in which the slot of the first antenna element is formed is exposed through the opening. At least part of the opening is filled with an insulating material. |
| US11316251B2 |
Radio frequency package
A radio frequency package includes a first connection member having a first stack structure including at least one first insulating layer and at least one first wiring layer; a second connection member having a second stack structure including at least one second insulating layer and at least one second wiring layer; a core member including a core insulating layer and disposed between the first and second connection members; and a first chip antenna disposed to be surrounded by the core insulating layer. The first chip antenna includes a first dielectric layer disposed to be surrounded by the core insulating layer; a patch antenna pattern disposed on an upper surface of the first dielectric layer; and a feed via disposed to at least partially penetrate the first dielectric layer, providing a feed path of the patch antenna pattern and connected to the at least one first wiring layer. |
| US11316250B2 |
Chip antenna and antenna module including chip antenna
A chip antenna is provided. The chip antenna includes a first dielectric layer; a second dielectric layer disposed on an upper surface of the first dielectric layer; a patch antenna pattern disposed in the second dielectric layer; first and second feed vias disposed to penetrate through at least one of the first and second dielectric layers, respectively and electrically connected to a corresponding feed point among different first and second feed points of the patch antenna pattern; and first and second filters disposed between the first and second dielectric layers, respectively and electrically connected to a corresponding feed via among the first and second feed vias. |
| US11316249B2 |
Semiconductor device package
The present disclosure provides a semiconductor device package. The semiconductor device package includes a first substrate having a first surface and a second surface opposite to the first surface, an antenna module disposed on the first surface of the first substrate, an electronic component module disposed on the first surface of the first substrate, and a first package body encapsulating the antenna module and the electronic component module. The antenna module has a first surface facing the first surface of the first substrate, a second surface opposite to the first surface of the antenna module, and a lateral surface extending between the first surface of the antenna module and the second surface of the antenna module. The lateral surface of the antenna module faces the electronic component module. A method of manufacturing a semiconductor device package is also provided. |
| US11316248B2 |
Scanned antenna and TFT substrate
The scanning antenna includes a TFT substrate, a slot substrate including a slot electrode, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a reflective conductive plate. Each of the plurality of antenna units includes a TFT, a patch electrode electrically connected to the drain of the TFT, a slot formed in the slot electrode corresponding to the patch electrode, and a first region in which the patch electrode and the slot electrode overlap each other when viewed from the normal direction of the first dielectric substrate. A distance in the normal direction of the first dielectric substrate between the patch electrode and the slot electrode of the plurality of second antenna units is smaller than a distance in the normal direction of the first dielectric substrate between the patch electrode and the slot electrode of the plurality of first antenna units. |
| US11316245B2 |
Base station antenna
The present disclosure relates to base station antennas. One example base station antenna includes at least two antennas, at least two outer cover structures, a fastening assembly, a connection assembly, and an upper cover, and each antenna is independently packaged in a radome. The fastening assembly includes a pole and a base. A bottom of the pole is mounted on the base. The connection assembly includes an antenna connection assembly, an outer cover connection assembly, and a pole connection assembly. The pole connection assembly is disposed on the pole, a top of the antenna is connected to the pole by using the antenna connection assembly and the pole connection assembly, and a bottom of the antenna is fastened on the bottom of the pole. Each of the outer cover structures is connected to the pole by using the outer cover connection assembly and the pole connection assembly. |
| US11316242B2 |
Compactable RF membrane antenna
Exemplary embodiments are described herein for compactable antennas. Exemplary compactable antennas include a support structure and a reflector surface. The support structure may directly or indirectly define the reflector shape. Exemplary embodiments comprise deployable support structures to permit the compactable antenna to have a smaller volume stowed configuration and a larger volume deployed configuration. |
| US11316240B2 |
Transition structure for coupling first and second transmission lines through a multi-layer structure and including a cavity corresponding to the second transmission line
A transition structure for millimeter wave is provided. The transition structure includes a first layer signal element coupled to an end of a first transmission line and a plurality of first layer ground elements surrounding the end of the first transmission line equidistantly from the end of the first transmission line and disposed along two opposite sides of a strip body of the first transmission line equidistantly from the strip body of the first transmission line. The transition structure further includes an intermediate layer signal element coupled to the first layer signal element and a plurality of intermediate layer ground elements surrounding the intermediate layer signal element quasi-coaxially. A multilayer transition structure including a multilayer structure and the transition structure is also provided. Therefore, the problem of operating frequency caused by the thickness of the multilayer structure can be overcome, thereby increasing the resonance frequency of the multilayer structure. |
| US11316239B2 |
Waveguide transition between front and rear windows connected by a tapered plate to form upper and lower chambers that define an energy path through the transition
The present invention features a waveguide transition. A waveguide transition is used to join two dissimilar segments of waveguide, in this case coplanar waveguide to rectangular waveguide, and vice-versa. Care taken during the design of the waveguide transition ensures that the reflection of electromagnetic waves, which may be traveling along the coplanar waveguide segment and toward the waveguide transition and subsequent rectangular waveguide segment, is minimized. |
| US11316234B2 |
Electronic device
An electronic device includes a device body and a male terminal structure connected to the device body. The male terminal structure includes a male terminal body, a first terminal member, and a free terminal member. The male terminal body is connected to the device body and a mating electronic device, respectively. The first terminal member is disposed at an end portion of the male terminal body, and the first terminal member is capable of being received in a terminal inserting portion of the mating electronic device. The free terminal member is disposed at the end portion of the male terminal body, detachably in contact with the first terminal member, and capable of being in contact with a secured terminal member of the mating electronic device. |
| US11316230B1 |
Battery thermal mitigation venting
A battery pack for a vehicle electrical system includes a casing for receiving one or more battery modules. The battery modules are insertable into a casing of the battery pack. Additionally, the battery modules may include cooling plate to cool the battery module and provide coolant to another battery module in response to a triggering event. Additionally, the battery modules may include a top cover with a frangible insulating material to further thermally insulate one battery module from another battery module and allow gasses and active material to escape the battery module in response to a triggering event. The battery pack may additionally be configured with vents for venting the gases and active material, such as those generated by a battery module in a thermal runaway event. Additionally, the battery modules may include a heat shield to direct vented gases and active material away from a cabin of a vehicle. |
| US11316229B2 |
Battery housing to hold a battery module, battery module arrangement, motor vehicle and method for incorporating a thermally conductive element in a battery housing
A battery housing to hold a battery module, wherein the battery housing includes a housing bottom, wherein the housing bottom comprises at least one injection opening, through which a thermally conductive material can be injected by means of an injection device into the battery housing in a first direction through the housing bottom, wherein the battery housing includes an elastically compressible sealing element, which is arranged in the area of the at least one injection opening, and is designed to close the at least one injection opening, wherein the sealing element is designed to open up the injection opening by elastic compression of the sealing element as of a predetermined injection force (Fi) acting in the first direction during the injecting of the thermally conductive material, and to close the injection opening once more by expanding of the sealing element in absence of the injection force (Fi). |
| US11316227B2 |
Conformal wearable battery
A molded housing of a conformal wearable battery (CWB) encloses an electronic component and include an electrically conductive contact component embedded within an exterior wall to conduct electricity between an interior and an exterior of the casing. A flexible printed circuit board assembly (PCBA) for a conformal wearable battery (CWB) is enclosed in a cavity within the molded housing and includes attachment sections for a plurality of battery cells that are arranged in a grid-like pattern on a same side of the flexible PCBA. A visco-elastic shock-absorbing member installed between the upper and lower portion of the flexible PCBA when configured in a folded configuration. Each battery cell is joined to the flexible PCBA via a welding process. Each battery cell has a visco-elastic shock-absorbing member attached individually to each battery cell of the plurality of battery cells. When folded to fit within the cavity of the molded housing, the flexible PCBA forms a three-dimensional grid of physical components comprising at least the battery cell modules. |
| US11316225B2 |
Battery container having a floating connector
A battery container is adapted to be disposed at a battery charging station for containing a battery which has a charging port. The battery container includes a container body, a floating connector, and a coupling board. The container body includes a rear wall that is formed with a through hole. The floating connector extends movably through the through hole of the rear wall. The coupling board is secured co-movably to the floating connector and is slidable on the rear wall. The floating connector and the coupling board are movable relative to the container body and along a plane parallel to the rear wall when the battery is inserted into a receiving space of the container body to electrically connect the charging port of the battery to the floating connector. |
| US11316223B2 |
Cylindrical battery
A cylindrical battery with an opening sealing body that seals an opening of a battery can. The opening sealing body includes a valve member, a metal plate disposed on an inner side of the battery with respect to the valve member, and an annular insulating member interposed between the valve member and the metal plate. The valve member and the metal plate are connected to each other at respective central portions. The valve member has an annular thin-walled portion which is deformable when an internal pressure of the battery increases, and a recessed portion is formed by the thin-walled portion on the insulating member opposing side of the valve member. The insulating member has a section P1 that covers a surface, on the valve member side, of the metal plate, and the section P1 has a rib to be housed in the recessed portion. |
| US11316219B2 |
Metal air battery including multi module air supply unit
A metal air battery includes a multi module air supply unit having air suction units or air purification units in a parallel arrangement. The metal air battery further includes a battery module including a metal air cell and the air supply unit which supplies the air to the battery module. The air supply unit includes an air suction unit which suctions air and an air purification unit that adsorbs impurities such as moisture and nitrogen from the suctioned air. The air suction unit or the air purification unit may be provided in plural to be in a parallel arrangement to define the multi module air supply unit. |
| US11316215B2 |
Battery structure reducing lithium deposition
A battery structure includes a plurality of batteries each made of lithium-ion secondary battery; and a plurality of arrangement portions in which the plurality of batteries are arranged. The plurality of arrangement portions are divided into two groups of: a upper heat transfer group having heat transfer orders higher than a center value of the heat transfer orders, where the heat transfer orders are respective amount of heat transfer from the batteries being ranked in descending order; and a lower heat transfer group having the heat transfer orders lower than the center value. A battery among the plurality of batteries showing the highest value of a lithium deposition tolerance which represents a degree of lithium being unlikely to deposit during charge/discharge operation, is disposed in a high tolerance arrangement portion in the plurality of arrangement portions, the high tolerance arrangement portion belonging to the upper heat transfer group. |
| US11316213B2 |
E-cigarette and re-charging pack
A rechargeable pack is provided for containing and recharging an e-cigarette. The pack includes a pack battery; a first connector which is electrically connectable to an external power source; a first recharging mechanism for re-charging the pack battery using the external power source when the first connector is electrically connected to the external power source; a second connector which is electrically connectable to the e-cigarette when the e-cigarette is received within the pack; and a second recharging mechanism for re-charging the e-cigarette using the pack battery when the e-cigarette is electrically connected to the second connector. The second recharging mechanism can be configured to provide protection against the pack battery providing excessive current through the second connector. |
| US11316212B2 |
Method, system and device for active balance control of battery pack
A method, system and device for active balance control of a battery pack are disclosed. The method includes: calculating a reference balance current ratio of a battery cell to a battery pack in each batch; calculating an actual balance current ratio of the battery cell to the battery pack at each moment in any batch; allowing the actual balance current ratio to track the reference balance current ratio of the corresponding batch in real time by executing a preset tracking algorithm; and performing balance control on the battery pack according to a tracking result. The system includes a first calculation module, a second calculation module, a tracking module, and a balance control module. The device includes a memory and a processor. |
| US11316209B2 |
Electric batteries
The present invention relates to an arrangement 10 comprising plural electric battery cell modules. Each of the electric battery cell modules comprises at least one electric battery cell 12 and a module antenna 14. The arrangement further comprises a transmission line 16 operative as an antenna. The arrangement 10 is configured to provide near field electromagnetic coupling of data between the transmission line 16 and each of the plural battery cell modules by way of the module antenna 14. |
| US11316207B2 |
Aqueous electrolyte and energy storage device comprising the same
The present invention relates to an aqueous electrolyte capable of improving low temperature performance. More specifically, the present invention provides an aqueous electrolyte that is an aqueous solution including lithium trifluoromethanesulfonate at a predetermined concentration range without separate additives, and thus can prevent freezing and realize high performance even at a very low temperature of about −30° C. or less, and an energy storage device including the same. |
| US11316203B2 |
Secondary battery and device including secondary battery
A secondary battery having high electromotive force and including less lead or being free of lead is provided. The secondary battery includes a positive electrode including a positive electrode active material containing manganese oxide, a negative electrode including a negative electrode active material containing at least one selected from zinc, gallium, and tin, and an electrolytic solution containing at least one selected from phosphoric acid and organic oxoacid and having a pH of less than 7 at 25° C. This secondary battery has an open circuit voltage of more than 1.6 V in a fully charged state. |
| US11316200B2 |
Method for drying and purifying lithium bis(fluorosulfonyl)imide salt
A method for drying and purifying a lithium bis(fluorosulfonyl)imide salt. Also, a method for producing a lithium bis(fluorosulfonyl)imide salt which is then dried and purified by the method. Further, a composition containing lithium bis(fluorosulfonyl)imide salt having a water content by mass of between 5 and 45 ppm. And, the use of the composition C in Li-ion batteries. |
| US11316197B2 |
Lithium-ion battery and apparatus
The present application provides a lithium-ion battery and an apparatus, and the lithium-ion battery includes an electrode assembly and an electrolytic solution, the electrode assembly includes a positive electrode sheet, a negative electrode sheet and a separation film. A positive active material of the positive electrode sheet includes Lix1Coy1M1-yO2-z1Qz1, 0.5≤x1≤1.2, 0.8≤y1≤1.0, 0≤z1≤0.1, M is selected from one or more of Al, Ti, Zr, Y, and Mg, and Q is selected from one or more of F, Cl, and S. The electrolytic solution contains vinylene carbonate, fluoroethylene carbonate, 1,3-propane sultone, and an additive A. The additive A is a polynitrile six-membered nitrogen-heterocyclic compound with a relatively low oxidation potential. The lithium-ion battery has superb cycle performance and storage performance, especially under high-temperature and high-voltage conditions. |
| US11316195B2 |
Electrolyte and electrochemical device
Energy storage materials, and specifically, an electrolyte and an electrochemical device, where the electrolyte includes an additive A and an additive B, the additive A is selected from multi-cyano six-membered N-heterocyclic compounds represented by Formula I-1, Formula I-2 and Formula I-3, and combinations thereof, and the additive B is at least one sulfonate compound. The electrochemical device includes the above electrolyte. The electrolyte can effectively passivate surface activity of the positive electrode material, inhibit oxidation of the electrolyte, and effectively reduce gas production of the battery, meanwhile the electrolyte can be adsorbed on catalytically active sites of the graphite surface to form a stable SEI film, thereby effectively reducing side reactions. The electrochemical device using the electrolyte has good high temperature and high voltage cycle performance and storage performance. |
| US11316192B2 |
Control apparatus and battery system
A control apparatus is configured to control an all solid state battery, the all solid state battery includes a laminated body in which a cathode, an anode and a solid electrolyte layer are laminated, the control apparatus is configured to execute a control operation for controlling a temperature distribution of the all solid state battery in a plane that intersects with a laminated direction of the laminated body so that a difference between a resistance value of a first part of the all solid state battery and a resistance value of a second part of the all solid state battery is smaller than the difference in the case where the control operation is not executed. |
| US11316191B2 |
Electrochemical secondary cells for high-energy or high-power battery use
An electrochemical cell for a secondary battery, preferably for use in an electric vehicle, is provided. The cell includes a solid metallic anode, which is deposited over a suitable current collector substrate during the cell charging process. Several variations of compatible electrolyte are disclosed, along with suitable cathode materials for building the complete cell. |
| US11316186B2 |
Fuel cell system and fuel cell vehicle
An outer surface of an upper wall of a stack case of a fuel cell system provided in a fuel cell vehicle includes a first outer surface, a second outer surface which is positioned closer than the first outer surface to a cell stack body, and an outer surface coupling part. Space is formed between a first upper wall of the upper wall and the cell stack body. Tabs and bus bars are disposed in the space. |
| US11316185B2 |
Fuel cell
A fuel cell may include a cell stack including a plurality of unit cells stacked in a first direction, first and second end plates disposed at corresponding first and second end portions of the cell stack, at least one clamping member coupled to the first and second end plates to clamp the plurality of unit cells in the first direction and configured to generate heat in a response to a control signal, and a controller configured to generate the control signal based on the temperature of the cell stack. |
| US11316181B2 |
Fuel cell unit structure and method of controlling fuel cell unit structure
A fuel cell unit structure includes: power generation cells; separators; a flow passage portion formed between the separators and including flow passages configured to supply gas to the power generation cells; gas flow-in ports configured to allow the gas to flow into the flow passage portion; gas flow-out ports configured to allow the gas to flow out from the flow passage portion; and an adjustment portion configured to adjust an amount of the gas flowing through the flow passages. The adjustment portion includes a first auxiliary flow passage provided between the power generation cells arranged to be opposed to each other on a same plane with a gas flow-in port of the gas flow-in ports being located on an extended line of an extending direction of the first auxiliary flow passage. |
| US11316179B2 |
Method for producing a composite of a bipolar plate and a membrane electrode assembly with the aid of a magnetic fixing
In order to provide a method for producing a composite of a bipolar plate and an MEA, the following is proposed: arranging the bipolar plate in a tool, which has a ferromagnetic or magnetic element, which partially forms the contact surface for the bipolar plate and is designed to be removable from the tool, arranging a membrane electrode assembly on the bipolar plate, arranging a second ferromagnetic or magnetic element on the membrane electrode assembly, removing the membrane electrode assembly and bipolar plate fixed to one another by the two ferromagnetic or magnetic elements, inserting the bipolar plate fixed to the membrane electrode assembly into a second tool, injecting a melt of a polymeric sealing material into the at least one mold cavity of the tool, allowing the melt to solidify, and demolding and removing the composite or the composites. In addition, a composite and a fuel cell stack are disclosed. |
| US11316175B2 |
Gas distributor plate for gas distribution and flow guidance in electrolysers and fuel cells
The invention relates to a gas distributor plate (2) for gas distribution and flow guidance at least in electrolysers or fuel cells, comprising a structure arranged on a contact surface of the gas distributor plate (2), for gas distribution and flow guidance, the structure for gas distribution and flow guidance being formed as a deformable structure (10). |
| US11316174B2 |
Fuel cell stacks and methods for forming same for providing uniform fluid flow
A fuel cell stack for providing uniform fluid flow through a plurality of plates is provided. The fuel cell stack includes a plurality of plates that define a plurality of fuel cells stacked with each other, each plate having a fuel inlet hole for receiving fuel and a fuel outlet hole for discharging fuel. The fuel cell stack includes a fuel inlet insert extending into the fuel inlet hole of at least some of the plurality of plates. The fuel inlet insert has an upstream end and a downstream end relative to a direction of fuel flow through the fuel inlet holes. The upstream end of the fuel inlet insert has a porosity and permeability less than a porosity and permeability of the downstream end of the fuel inlet insert such that the fuel insert provides uniform fuel flow through the plurality of plates. |
| US11316173B2 |
Fuel cell stack
A fuel cell system includes a first fluid flow plate including a first plurality of first channels for flow of an oxidant or a fuel. The plurality of first channel has first channel cross-sectional flow areas. A second fluid flow plate includes a second plurality of second channels for flow of an oxidant or a fuel. The plurality of second channels has second channel cross-sectional flow areas. A membrane electrode assembly is located between the first plate and the second plate. The first flow plate includes a passage for a flow of a fluid entirely on a seam side of the first flow plate as the first plurality of first channels. The passage has a cross-sectional area for flow of the fluid smaller than the first channel cross-sectional flow area. |
| US11316172B2 |
Fuel cell and method of manufacturing metal porous body
A fuel cell according to the present disclosure includes a flat plate-shaped metal porous body having a framework of a three-dimensional network structure as a gas diffusion layer. The framework is made of metal or alloy. In the metal porous body, a ratio of an average pore diameter in a direction parallel to a gas flow direction to an average pore diameter in a direction perpendicular to the gas flow direction is greater than or equal to 1.4 and less than or equal to 2.5. |
| US11316167B2 |
Anode electrode and electrochemical device containing the same
The present application relates to an anode electrode and an electrochemical device containing the same. The anode electrode comprises: a current collector, including a first surface and a second surface opposite to the first surface; an insulation layer being disposed on a peripheral portion of the first surface and/or a peripheral portion of the second surface; and a protection layer being disposed on the insulation layer and covering the first surface and/or the second surface. According to an embodiment of the present application, the insulation layer and the protection layer are disposed in the anode electrode of the electrochemical device to construct a seal cavity, which defines a space of the deposition of lithium metal on the anode electrode, thereby resolving the safety problem caused by the irregular deposition of the lithium metal. |
| US11316166B2 |
Functionalization of carbon for embedding in chalcogen particles to enhance electronic conductivity
A particle having a core of elemental chalcogen elements, such as sulfur, selenium and tellurium, and a coating of at least one polymeric layer on the core. A functionalized conductive carbon material is dispersed in the core. A cathode containing the particles and a battery constructed with the cathode are also provided. |
| US11316165B2 |
Solid-state battery layer structure and method for producing the same
There is provided a solid-state battery layer structure which may include an anode current collector metal layer, an anode layer arranged on the anode current collector metal layer, a solid electrolyte layer arranged on the anode layer laterally, a cathode layer arranged on the solid electrolyte layer, and a cathode current collector metal layer, and a plurality of nanowire structures comprising silicon and/or gallium nitride, wherein said nanowire structures are arranged on the anode layer and, wherein said nanowire structures are laterally and vertically enclosed by the solid electrolyte layer, wherein the anode layer comprises silicon and a plurality of metal vias connecting the plurality of nanowire structures with the anode current collector metal layer. Methods for producing solid-state battery layer structures are also provided. |
| US11316163B2 |
Dispersant for carbon material, dispersion containing dispersant for carbon material, electrode slurry for all-solid lithium-ion secondary battery, manufacturing method for electrode for all-solid lithium-ion secondary battery, electrode for all-solid lithium-ion secondary battery, and all-solid lithium-ion secondary battery
The present invention provides a dispersant for carbon materials, the dispersant containing a copolymer having a nitrogen-containing group, wherein the copolymer has a nitrogen content of 0.01 wt % or more and 5 wt % or less and the copolymer has an SP value of 8.0 to 12 (cal/cm3)1/2. |
| US11316160B2 |
Supercapacity lithium ion battery cathode material, preparation method therefor and application thereof
A supercapacity lithium ion battery cathode material, a preparation method therefor and an application thereof. The supercapacity lithium ion battery cathode material consists of a transition metal-containing lithium ion cathode material and carbon which is coated on the surface of the lithium ion cathode material. The transition metal on the surface of the lithium ion cathode material is coordinated with carbon by means of X—C bonds to form transition metal-X—C chemical bonds, such that carbon stably coats the surface of the cathode material, wherein C is SP3 hybridization and/or SP2 hybridization, and X is at least one selected from among N, O and S. The supercapacity lithium ion battery cathode material connects the lithium ion cathode material and the carbon by means of the transition metal-X—C chemical bonds, and utilizes the transition metal-X—C chemical bonds to repair boundary of lattices on the surface of the cathode material, such that an interface between the lithium ion cathode material and a carbon layer can be optimized, to form an interface that can store Li, thereby increasing the per gram capacity of the cathode material, and laying the foundation for preparing a supercapacity lithium ion battery. |
| US11316153B2 |
Lithium zinc secondary battery, battery pack, vehicle, and stationary power supply
According to one embodiment, provided is a lithium zinc secondary battery including a positive electrode, a negative electrode, an aqueous electrolyte, and a separator between the positive electrode and the negative electrode. The negative electrode includes a zinc-including metal body and an oxide on at least a part of a surface of the metal body. The aqueous electrolyte includes zinc and a lithium salt. Zinc is dissolved and deposited at the negative electrode. Lithium is inserted and extracted from the oxide in a range of −1.4 V (vs. SCE) or more and −1.0 V (vs. SCE) or less. A specific surface area of the oxide is 10 m2/g or more and 350 m2/g or less. A mol concentration ratio Zn/Li between zinc and lithium in the aqueous electrolyte is 1.0×10−5 or more and 0.3 or less. |
| US11316149B2 |
Positive electrode mix, positive electrode including the same, and lithium secondary battery
A positive electrode mix, a positive electrode, and a lithium secondary battery, each including the positive electrode mix, are provided. Specifically, the positive electrode mix includes lithium peroxide (Li2O2) and platinum (Pt), thereby effectively counterbalancing an irreversible capacity imbalance between both electrodes and further increasing the initial charge capacity of the positive electrode. |
| US11316146B2 |
Redox and ion-adsorption electrodes and energy storage devices
Provided herein are energy storage devices comprising a first electrode comprising a layered double hydroxide, a conductive scaffold, and a first current collector; a second electrode comprising a hydroxide and a second current collector; a separator; and an electrolyte. In some embodiments, the specific combination of device chemistry, active materials, and electrolytes described herein form storage devices that operate at high voltage and exhibit the capacity of a battery and the power performance of supercapacitors in one device. |
| US11316142B2 |
Methods for fabricating silicon-based electrodes comprising naturally occurring carbonaceous filaments and battery cells utilizing the same
Methods for fabricating electrodes include coating a current collector with a slurry to form a coated current collector. The slurry includes a dry fraction, including silicon particles, polymeric binders, and one or more types of naturally occurring carbonaceous filaments, and one or more solvents. The coated current collector is heat treated to produce the electrode having a layer of silicon-based host material. The one or more naturally occurring carbonaceous filaments can include animal fibers, chitin, alginate, cellulose, keratin, and chitosan, and can have an average length of 1 μm to 50 μm and an average diameter of 1 nm to 500 nm. The dry fraction can include 5 wt. % to 95 wt. % silicon particles, 0.1 wt. % to 15 wt. % polymeric binders, and 1 wt. % to 20 wt. % naturally occurring carbonaceous filaments. The method can include assembling a battery cell by disposing the electrode and a positive electrode in electrolyte. |
| US11316136B2 |
Manufacturing method of flexible display device and flexible display device
A manufacturing method of a flexible display device and a flexible display device are provided. The manufacturing method of the flexible display device includes: forming a conductive heating layer with a first microstructure pattern on a hard substrate; forming a flexible substrate layer on the conductive heating layer, and forming a display device on the flexible substrate layer; performing a heating treatment on the conductive heating layer to separate the flexible substrate layer from the conductive heating layer, and a side of the flexible substrate layer away from the display device having a second microstructure pattern after being separated. |
| US11316134B2 |
Display panel, method for manufacturing the same, and method for detecting the same
A display panel and a method for manufacturing the same are provided. The display panel includes a display area and a non-display area. The display panel further includes a substrate, a cover plate, an encapsulation assembly, an at least one diffusion layer. The cover plate is disposed opposite to the substrate. The encapsulation assembly is disposed between the cover plate and the substrate and disposed in the non-display area. The at least one diffusion layer is disposed on the substrate and disposed between the encapsulation assembly and the display area. Diffusion occurs when the diffusion layer encounters water. |
| US11316133B2 |
Organic light-emitting display apparatus and manufacturing method of the same
An organic light-emitting display apparatus includes a substrate, an inorganic insulation film on the substrate, an organic insulation film on the inorganic insulation film, an organic light-emitting device on the organic insulation film, and an encapsulation unit including a first inorganic film covering the organic light-emitting device and having a first boundary portion contacting the organic insulation film, an organic film covering the first inorganic film and having a second boundary portion contacting the inorganic insulation film, and a second inorganic film covering the organic film and having a third boundary portion contacting the substrate. |
| US11316132B2 |
Display device with multiple hardening layers and manufacturing method thereof
A display panel and a manufacturing method thereof are provided. The display panel includes a substrate, a thin film transistor (TFT) device layer, a luminescent device layer, and a thin film encapsulation layer, wherein the thin film encapsulation layer includes a first inorganic layer, a first hardening layer disposed on the first inorganic layer, a second inorganic layer disposed on the first hardening layer, an organic planarization layer disposed on the second inorganic layer, a second hardening layer disposed on the organic planarization layer, a third inorganic layer disposed on the second hardening layer, and a third hardening layer disposed on the third inorganic layer, thereby realizing a cover window and encapsulation structure characteristics at the same time, and achieving ultra-thin encapsulation. |
| US11316130B2 |
Display panel and display device having lower and upper through holes
The present invention provides a display panel. At least one first buffer layer is disposed between the base layer and the thin film transistor layer. At least one second buffer layer is disposed between the functional layer and the polarizer. The first buffer layer and the second buffer layer use hollow designs in the transparent displaying region and can reduce stress generated from cutting a hole, improve protection for the display panel and finally improve reliability of the display device. |
| US11316128B2 |
Flexible display substrate, display panel and display device having a crack stopping component
A flexible display substrate includes a flexible substrate and an insulation layer on the flexible substrate. The flexible substrate includes a display area and a non-display area surrounding the display area. A crack stopping component is on the insulation layer in the non-display area, and configured to stop a crack in the non-display area from extending to the display area. |
| US11316124B2 |
Organic light-emitting device
An organic light-emitting device and a flat panel display device, the organic-light emitting device including an anode; a cathode; and an organic layer therebetween including an emission layer, a hole transport region between the anode and the emission layer, the hole transport region including at least one of a hole injection layer, a hole transport layer, and an electron blocking layer, an electron transport region between the emission layer and the cathode, the electron transport region including at least one of a hole blocking layer, an electron transport layer, and an electron injection layer, and a buffer layer between the emission layer and the electron transport region, wherein the buffer layer includes a biscarbazole-based derivative and triphenylene-based derivative, and a triplet energy (ET1) of the biscarbazole-based derivative or the triphenylene-based derivative and a triplet energy (ET2) of a dopant of the emission layer satisfy the following relationship: ET1>ET2. |
| US11316120B2 |
Flexible substrate and display panel
The present invention provides a flexible substrate and a display panel. The flexible substrate comprises a substrate and a plurality of traces. The traces are disposed on the substrate. The substrate is further provided with a plurality of first via holes, and the first via holes are disposed along an extending direction of the traces. |
| US11316118B2 |
Dibenzo[d,B]silole-based reactive mesogens
A compound of Formula (I) D-S1-A-S2—B1, Formula (I) wherein: A represents a conjugated chain of from 1 to 20 aromatic moieties independently selected from the group consisting of aromatic moieties, heteroaromatic moieties and E moieties, provided that A includes at least one E moiety, wherein E is selected from the group consisting of: E1 being a dibenzo[d,b]silole moiety of the structure: E2 being a moiety of the structure: and E3 being a moiety of the structure: wherein E is connected in the conjugated chain of A and optionally to S1 or to S2 through covalent bonds at Y and Z; wherein each R is independently selected from the group consisting of straight chain or branched C1-C20 alkyl and C2-C20 alkenyl, optionally wherein from 1 to 5 CH2 groups are each replaced by an oxygen, provided that no acetal, ketal, peroxide or vinyl ether is present in the R group, and optionally wherein each H bonded to a C in each R group may independently be replaced by a halogen; wherein the X moieties are the same and are selected from the group consisting of hydrogen, straight chain or branched C1-C8 alkyl, straight chain or branched C1-C8 alkoxyl and a halogen, wherein each E moiety may have the same or different X moieties, wherein W is either an oxygen or sulfur atom, D represents a moiety having one or more cross-linkable functionalities, S1 and S2 are flexible linker groups; and B1 represents a moiety having one or more cross-linkable functionalities or a hydrogen atom, with the proviso that when B1 represents a hydrogen atom, D represents a moiety having at least two cross-linkable functionalities. |
| US11316117B2 |
Organometallic compound and organic light-emitting device including the same
An organic light-emitting device includes an organometallic compound represented by M1(L1)n1(L2)n2, wherein L1 is a ligand represented by Formula 1-1: In Formula 1-1, *1 to *4 indicate a binding site to M1, and Z11 and Z12 are respectively boron (B) and nitrogen (N), or N and B. When M1 binds to an α-position of the B or N atom, metal-ligand charge transfer in the complex may be improved. An OLED including the organometallic compound may have a long lifespan and improved luminescent efficiency and colorimetric purity. |
| US11316116B1 |
Compound for organic electronic element, organic electronic element using the same, and an electronic device thereof
Provided are a compound of Formula (1) for use in an organic electronic element and capable of improving the luminous efficiency, stability and lifespan of the organic electronic element, an organic electronic element employing the compound, and an electronic device thereof. |
| US11316115B2 |
Organic compound, display panel and display device
An organic compound, a display panel, and a display apparatus are provided. The organic compound has a structure represented by Chemical Formula 1, in which R1 to R8 are each independently selected from hydrogen, substituted or unsubstituted C6-C18 aryl, pyridyl, quinolyl, C1-C16 alkyl, C1-C16 alkoxy, hydroxyl, and carboxyl; m, n, x and y each independently represent 0 or 1, where m+x≥1, n+y≥1, m+n≥1, and x+y≥1; L1 and L2 are each independently selected from substituted or unsubstituted C6-C30 arylene, substituted or unsubstituted C5-C30 heteroarylene, substituted or unsubstituted C1-C8 alkylene, and substituted or unsubstituted C1-C8 alkyleneoxy; Ar1 and Ar2 each independently have a structure shown in Chemical Formula 2, in which R21 to R27 are each independently selected from hydrogen, substituted or unsubstituted C6-C18 aryl, pyridyl, quinolyl, C1-C16 alkyl, C1-C16 alkoxy, hydroxyl, and carboxyl. |
| US11316104B2 |
Inverted wide base double magnetic tunnel junction device
A method of manufacturing a double magnetic tunnel junction device is provided. The method includes forming a first magnetic tunnel junction stack, forming a spin conducting layer on the first magnetic tunnel junction stack, and forming a second magnetic tunnel junction stack on the spin conducting layer. The second magnetic tunnel junction stack has a width that is greater than a width of the first magnetic tunnel junction stack. |
| US11316101B2 |
Stack and magnetic device
A stack of the embodiment includes: a first magnetic substance; a second magnetic substance; and a first nonmagnetic substance which is disposed between the first magnetic substance and the second magnetic substance and contains at least one first metal element (M1) selected from the group consisting of ruthenium (Ru) and osmium (Os) and at least one second metal element (M2) selected from the group consisting of rhodium (Rh) and iridium (Ir). A magnetic device of the embodiment includes: a third magnetic substance; the stack; and a second nonmagnetic substance which is disposed between the third magnetic substance and the stack. |
| US11316098B2 |
High thermal stability by doping of oxide capping layer for spin torque transfer (STT) magnetic random access memory (MRAM) applications
A magnetic tunnel junction (MTJ) is disclosed wherein a free layer (FL) interfaces with a metal oxide (Mox) layer and a tunnel barrier layer to produce interfacial perpendicular magnetic anisotropy (PMA). The Mox layer has a non-stoichiometric oxidation state to minimize parasitic resistance, and comprises a dopant to fill vacant lattice sites thereby blocking oxygen diffusion through the Mox layer to preserve interfacial PMA and high thermal stability at process temperatures up to 400° C. Various methods of forming the doped Mox layer include deposition of the M layer in a reactive environment of O2 and dopant species in gas form, exposing a metal oxide layer to dopant species in gas form, and ion implanting the dopant. In another embodiment, where the dopant is N, a metal nitride layer is formed on a metal oxide layer, and then an anneal step drives nitrogen into vacant sites in the metal oxide lattice. |
| US11316096B2 |
Memory device
The present disclosure relates to an integrated circuit. The integrated circuit includes a an inter-layer dielectric (ILD) structure laterally surrounding a conductive interconnect. A dielectric protection layer is disposed over the ILD structure and a passivation layer is disposed over the dielectric protection layer. The passivation layer includes a protrusion extending outward from an upper surface of the passivation layer. A bottom electrode continuously extends from over the passivation layer to between sidewalls of the passivation layer. A data storage element is over the bottom electrode and a top electrode is over the data storage element. |
| US11316090B2 |
Thermoelectric generator
A thermoelectric generator has a heat conducting body that exchanges heat with the environment according to environmental temperature changes, a heat storing body, and a thermoelectric conversion unit and thermal resistance body arranged between the heat conducting body and the heat storing body. One end of the thermal resistance body and one end of the thermoelectric conversion unit are in contact with each other. The other end of the thermal resistance body is in contact with the heat conducting body, and the other end of the thermoelectric conversion unit is in contact with the heat storing body. The surface of the heat storing body is covered by a covering layer having certain heat insulation properties. The temperature difference generated between the heat conducting body and the heat storing body is utilized to extract electric energy from the thermoelectric conversion unit. |
| US11316086B2 |
Printed structures with electrical contact having reflowable polymer core
A printed structure comprises a device comprising device electrical contacts disposed on a common side of the device and a substrate non-native to the device comprising substrate electrical contacts disposed on a surface of the substrate. At least one of the substrate electrical contacts has a rounded shape. The device electrical contacts are in physical and electrical contact with corresponding substrate electrical contacts. The substrate electrical contacts can comprise a polymer core coated with a patterned contact electrical conductor on a surface of the polymer core. A method of making polymer cores comprising patterning a polymer on the substrate and reflowing the patterned polymer to form one or more rounded shapes of the polymer and coating and then patterning the one or more rounded shapes with a conductive material. |
| US11316085B2 |
Display device and manufacturing method thereof
A display device and a manufacturing method thereof are provided. The display device includes a circuit substrate, multiple light-emitting elements and a packaging material. The circuit substrate includes a first surface, a second surface opposite the first surface, and multiple through slots penetrating through the first and second surfaces. The through slots each are in a stepped form, and the circuit substrate is divided into a chip mounting area, multiple anodes, and a common cathode. The light-emitting elements include multiple light-emitting elements mounted on the circuit substrate along a straight line and electrically connected with the anodes respectively through wires. The packaging material covers the circuit substrate, the light-emitting elements and the wires. The display device has an excellent performance while achieving a small size. |
| US11316084B2 |
Radiation-emitting semiconductor component and method for producing radiation-emitting semiconductor component
A radiation-emitting semiconductor device (1) is specified, comprising a semiconductor body (2) having an active region (20) provided for generating radiation, a carrier (3) on which the semiconductor body is arranged and an optical element (4), wherein the optical element is attached to the semiconductor body by a direct bonding connection.Furthermore, a method for producing of radiation-emitting semiconductor devices is specified. |
| US11316081B2 |
Light-emitting module and method for manufacturing same
A light-emitting module includes an optical member including a first major surface, and a second major surface; a light-emitting device bonded to the first major surface, the light-emitting device including a light-emitting element including a major light-emitting surface, an electrode surface, and an electrode disposed at the electrode surface, a resin member covering a side surface of the light-emitting element, and a conductive layer disposed continuously on the electrode and on the resin member; an insulating member covering the first major surface of the optical member, a side surface of the light-emitting device, and a portion of the conductive layer of the light-emitting device; and a wiring member disposed on the insulating member and electrically connected to the conductive layer. |
| US11316077B2 |
Radiation-emitting device
A radiation-emitting device includes a semiconductor layer sequence having an active layer that emits a primary radiation during operation, a decoupling surface on a surface of the semiconductor layer sequence, a wavelength conversion layer on a side of the semiconductor layer sequence facing away from the decoupling surface, containing at least one conversion material that converts the primary radiation into secondary radiation, and a mirror layer on the side of the wavelength conversion layer facing away from the semiconductor layer sequence, wherein the at least one conversion material is electrically conductive and/or embedded in an electrically conductive matrix material. |
| US11316076B2 |
Light emitting diode package and light emitting module including the same
A light emitting diode package includes a body part having a cavity at the upper part thereof and having a long shape in one direction; and a first lead frame and a second lead frame which are coupled to the bottom of the body part and spaced apart from each other in a transverse direction. The first lead frame includes a first mounting part exposed in the cavity; a first terminal part exposed to one side surface of the body part; and a first connection part exposed to the lower surface of the body part. The second lead frame includes a second mounting part exposed in the cavity; a second terminal part exposed to the other side surface of the body part along a one-side direction; and a second connection part exposed to the lower surface of the body part. |
| US11316074B2 |
Light emitting unit and display device
A display device is disclosed, wherein the display device includes a light emitting unit, including: a first semiconductor layer; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and a protecting layer disposed on the second semiconductor layer, wherein the protecting layer has a region in which oxygen atomic percentages decrease toward the second semiconductor layer. |
| US11316068B2 |
Optoelectronic semiconductor chip and method for producing an optoelectronic semiconductor chip
An optoelectronic semiconductor chip and a method for producing an optoelectronic semiconductor chip are disclosed. In an embodiment, a chip includes a semiconductor body comprising a plurality of emission regions, first and second contact points, a rewiring structure and first and second connection points, wherein each emission region is contacted via the first and second contact points and configured to be operated separately from one another, wherein the rewiring structure electrically conductively connects each first contact point to an associated first connection point, wherein the rewiring structure electrically conductively connects every second contact point to an associated second connection point, wherein at least one of the connection points does not overlap with a contact point which is electrically conductively connected to this connection point in a vertical direction, and wherein each first connection point is disposed laterally directly adjacent to a further first connection point. |
| US11316067B2 |
Semiconductor body
A semiconductor body is disclosed. In an embodiment a semiconductor body includes an n-doped region comprising a first layer sequence comprising pairs of alternating layers, wherein a first layer and a second layer of each pair differ in their doping concentration, and wherein the first and second layers of each pair have the same material composition except for their doping and a second layer sequence comprising pairs of alternating layers, wherein a first layer and a second layer of each pair differ in their material composition, an active region, wherein the second layer sequence is disposed between the first layer sequence and the active region and a p-doped region, wherein the active region is disposed between the n-doped region and the p-doped region. |
| US11316066B2 |
Method for fabricating an optical device
An optical device and a method for fabricating an optical device are described. The optical device may be a light emitting diode (LED) device, e.g. a micro-LED (μLED) device, or a photodiode (PD) device, e.g. an imager. The method comprises processing, on a first semiconductor wafer, an array including a plurality of compound semiconductor LEDs or compound semiconductor PDs and a plurality of first contacts, each first contact being electrically connected to one of the LEDs or PDs. The method further comprises processing, on a second semiconductor wafer, a CMOS IC and a plurality of second contacts electrically connected to the CMOS IC. The method further comprises hybrid bonding the first semiconductor wafer to the second semiconductor wafer such that the plurality of LEDs or PDs are individually connected to the CMOS IC via the first and second contacts. |
| US11316065B2 |
Multi-wafer based light absorption apparatus and applications thereof
Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch. |
| US11316064B2 |
Photodiode and/or PIN diode structures
The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and/or PIN diode structures and methods of manufacture. The structure includes: at least one fin including substrate material, the at least one fin including sidewalls and a top surface; a trench on opposing sides of the at least one fin; a first semiconductor material lining the sidewalls and the top surface of the at least one fin, and a bottom surface of the trench; a photosensitive semiconductor material on the first semiconductor material and at least partially filling the trench; and a third semiconductor material on the photosensitive semiconductor material. |
| US11316059B2 |
Thermal radiation body for cooling heating element and method for manufacturing the same
The present inventive concept relates to a thermal radiation body for cooling a heating element, which includes a pattern unit including a pore part provided as an empty space or filled with a gas phase and a cover part covering the pore part and dissipates heat of the heating element through heat radiation. |
| US11316053B2 |
Multijunction solar cell assembly
A multijunction solar cell assembly and its method of manufacture including interconnected first and second discreate semiconductor body subassemblies disposed adjacent and parallel to each other, in the sense of the incoming illumination, each semiconductor body subassembly including first top subcell, and possibly third middle subcells and a bottom solar subcell; wherein the interconnected subassemblies form at least a Three junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor body with its at least least two junctions and the bottom solar subcell in the second semiconductor body representing the additional junction. |
| US11316052B2 |
Junction barrier schottky diode
A junction barrier schottky (JBS) diode is provided and includes: a bottom metal layer, a N+-type substrate layer and a N−-type epitaxial layer sequentially arranged in that order from bottom to top, P-type ion injection regions are disposed on an upper surface of the N−-type epitaxial layer, distances of the P-type ion injection regions are gradually increased along a direction from an edge to a center of the JBS diode; an isolation dielectric layer is arranged on a periphery of the upper surface of the N−-type epitaxial layer, an top metal layer is arranged on the upper surface of the N−-type epitaxial layer and an upper surface of the isolation dielectric layer and further is in contact with the P-type ion injection regions. The JBS diode can effectively inhibit an occurrence of local electromigration and improve a device reliability. |
| US11316050B2 |
BCE IGZO TFT device and manufacturing method thereof
A BCE IGZO TFT device and a manufacturing method thereof include steps of providing a substrate, depositing a first metal layer on the substrate, wherein the first metal layer forms a gate and a first electrode layer by a patterning process, depositing a gate insulating layer on the substrate, the gate, and the first electrode layer, wherein the gate insulating layer is etched to remove a part of the gate insulating layer on a surface of the first electrode layer, depositing an active layer on the first electrode layer and the gate insulating layer, wherein the active layer and the first electrode layer are in direct contact, and depositing a second metal layer on the active layer, wherein the second metal layer forms a source, a drain, and a second electrode layer by a patterning process. |
| US11316049B2 |
Thin-film transistor and manufacturing method thereof
A thin-film transistor and a manufacturing method thereof are provided, and the manufacturing method includes: forming a source electrode, a drain electrode and a planarization layer on a substrate, and patterning the planarization layer to form a first portion disposed between the source electrode and the drain electrode, a second portion disposed at a side of the source drain, and a third portion disposed at a side of the drain electrode. Upper surfaces of all the first portion, the second portion, and the third surface are flush with top portions of both the source electrode and the drain electrode. |
| US11316046B2 |
Method of manufacturing a semiconductor device and a semiconductor device
In a method of manufacturing a semiconductor device, an upper fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked is formed over a lower fin structure, a sacrificial gate structure is formed over the upper fin structure, a source/drain region of the upper fin structure, which is not covered by the sacrificial gate structure, is etched thereby forming a source/drain space, the first semiconductor layers are laterally etched through the source/drain space, an inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers, and a source/drain epitaxial layer is formed in the source/drain space to cover the inner spacer. In etching the source/drain region, a part of the lower fin structure is also etched to form a recess, in which a (111) surface is exposed. |
| US11316043B2 |
Semiconductor transistor device and method of manufacturing the same
A transistor device with a gate electrode in a vertical gate trench is described. The gate electrode includes a silicon gate region and a metal inlay region. The silicon gate region forms at least a section of a sidewall of the gate electrode. The metal inlay region extends up from a lower end of the gate electrode. |
| US11316042B2 |
Process and structure for a superjunction device
A superjunction device comprising a drain contact, a substrate layer above the drain contact, an epitaxial layer above the substrate layer, a P+ layer above the epitaxial layer formed by P-type implantation to a bottom of the superjunction device, a trench with a sloped angle formed by use of a hard mask layer. The trench is filled with an insulating material. A first vertical column is formed adjacent to the trench. A second vertical column is formed adjacent to the first vertical column. A source contact is coupled to the first vertical column and the second vertical column. A P-body region is coupled to the source contact. A gate oxide is formed above the source contact and the epitaxial layer, and a gate formed above the gate oxide. |
| US11316041B2 |
Semiconductor device
A semiconductor device (1) includes a substrate (2), an electron transit layer (4) disposed on the substrate (2), and an electron supply layer (5) disposed on the electron supply layer (4). The electron transit layer (4) includes a conductive path forming layer (43) in contact with the electron supply layer (5), a first semiconductor region (first nitride semiconductor layer) (41) containing an acceptor-type impurity, and a second semiconductor region (second nitride semiconductor layer) (42) disposed at a position closer to the conductive path forming layer (43) than the first semiconductor region (41) and containing an acceptor-type impurity. The first semiconductor region (41) has a higher acceptor density than the second semiconductor region (42). |
| US11316033B2 |
Semiconductor device and manufacturing method thereof
A method includes forming a work function metal layer over first and second semiconductor fins extending upward from a substrate; forming a sacrificial layer straddling the first semiconductor fin but not overlapping the second semiconductor fin; patterning the first work function metal layer using the sacrificial layer, resulting in a patterned work function metal layer under the sacrificial layer, and a work function metal residue in the vicinity of the second semiconductor fin; selectively forming a protective layer on a side surface of the sacrificial layer and a side surface of the patterned first work function metal layer; removing the work function metal residue after selectively forming the protective layer; after removing the work function metal residue, removing the sacrificial layer and the protective layer; and forming a second work function metal layer over the first and second semiconductor fins. |
| US11316031B2 |
Method of forming fin forced stack inverter
A method of forming a fin forced stack inverter includes the following steps. A substrate including a first fin, a second fin and a third fin across a first active area along a first direction is provided, wherein the first fin, the second fin and the third fin are arranged side by side. A fin remove inside active process is performed to remove at least a part of the second fin in the first active area. A first gate is formed across the first fin and the third fin in the first active area along a second direction. The present invention also provides a 1-1 fin forced fin stack inverter formed by said method. |
| US11316025B2 |
Silicon carbide-based electronic device and method of manufacturing the same
An electronic device comprising: a semiconductor body of silicon carbide, SiC, having a first and a second face, opposite to one another along a first direction, which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal, which extends at the first face of the semiconductor body; a second conduction terminal, which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer, of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge. |
| US11316022B2 |
Ion implant defined nanorod in a suspended Majorana fermion device
Devices, systems, methods, computer-implemented methods, apparatus, and/or computer program products that can facilitate a suspended Majorana fermion device comprising an ion implant defined nanorod in a semiconducting device are provided. According to an embodiment, a quantum computing device can comprise a Majorana fermion device coupled to an ion implanted region. The quantum computing device can further comprise an encapsulation film coupled to the ion implanted region and a substrate layer. The encapsulation film suspends the Majorana fermion device in the quantum computing device. |
| US11316020B2 |
Semiconductor device and method
In an embodiment, a semiconductor device includes a semiconductor substrate having a first major surface, a trench extending from the first major surface into the semiconductor substrate and having a base and a side wall extending form the base to the first major surface, and a field plate arranged in the trench and an enclosed cavity in the trench. The enclosed cavity is defined by insulating material and is laterally positioned between a side wall of the field plate and the side wall of the trench. |
| US11316019B2 |
Symmetric arrangement of field plates in semiconductor devices
The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor devices having field plates that are arranged symmetrically around a gate. The present disclosure provides a semiconductor device including an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region and laterally between the source and drain electrodes, a first field plate between the source electrode and the gate, a second field plate between the drain electrode and the gate, in which the gate is spaced apart laterally and substantially equidistant from the first field plate and the second field plate. |
| US11316014B2 |
Semiconductor devices with graded dopant regions
Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICs, improvement in refresh time for DRAMs, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for iFETs, and a host of other applications. |
| US11316013B2 |
Nitride semiconductor device
A nitride semiconductor device includes a nitride semiconductor layer, channel cells in the nitride semiconductor layer, a source lead region of a second conductivity type in the nitride semiconductor layer, and a source electrode on a side where a first main surface of the nitride semiconductor layer is located. The channel cells each include a well region of a first conductivity type and a source region of the second conductivity type in contact with the well region. The source lead region is connected to the source region. The channel cells extend in a first direction in a planar view from a normal direction of the first main surface, and arranged in a second direction intersecting with the first direction in the planar view. The source electrode is in contact with the source lead region away from a line of the channel cells arranged in the second direction. |
| US11316012B2 |
Semiconductor device
A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface facing each other in a thickness direction, the first main surface including a trench. The trench has a predetermined depth in the thickness direction and has a substantially wedge shape that has a first side surface and a second side surface that face each other and are not parallel to each other, and a first end surface and a second end surface that face each other and are substantially parallel to each other. The first side surface and the second side surface intersect each other at a line, or extension surfaces of the first side surface and the second side surface extended in the thickness direction intersect each other at a line, and the line extends in a first direction that does not align with a cleavage plane of the semiconductor substrate. |
| US11316010B2 |
Integrated circuit device and method of fabricating the same
An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gale line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line. |
| US11316009B2 |
Electronic power device with super-junction
An integrated electronic device includes a first terminal and a second terminal, a Schottky diode having a first threshold voltage and coupled between the first terminal and the second terminal, a derivation component having a second threshold voltage greater than the first threshold voltage and coupled between the first terminal and the second terminal. The derivation component comprises a super-junction. |
| US11316003B2 |
Array substrate, display device, and method for manufacturing same
Disclosed are an array substrate, and a display device, and a method for manufacturing the same. The array substrate includes: a base substrate, and a thin film transistor, a planarization pattern, a bonding pattern, and a conductive structure that are disposed on the base substrate. The thin film transistor, the planarization pattern, and the bonding pattern are laminated in a direction going distally from the base substrate. The planarization pattern is provided with a via and a groove, the conductive structure is disposed in the via, wherein the bonding pattern is conductive and is electrically connected to the thin film transistor by the conductive structure, an orthographic projection of the bonding pattern on the base substrate falls outside an orthographic projection of the groove on the base substrate, and the groove is configured to accommodate an adhesive. |
| US11316002B2 |
Unit pixel and organic light emitting display device including the same
A unit pixel includes a circuit structure, first and second wiring patterns, an interlayer insulating layer, a planarization layer, and a light emission structure. The first wiring pattern disposed on the circuit structure has a first bump structure. The interlayer insulating layer covers the circuit structure and the first wiring pattern. The second wiring pattern disposed on the interlayer insulating layer overlaps the first wiring pattern and has a second bump structure. The planarization layer covers the interlayer insulating layer and the second wiring pattern and includes a via-hole exposing at least a portion of the second wiring pattern. The light emission structure contacts the second wiring pattern through the via-hole. The first and second wiring patterns and the interlayer insulating layer form a capacitor, the light emission structure includes an OLED, and the capacitor is directly connected to an anode of the OLED. |
| US11315992B2 |
Array substrate and method for preparing the same, display panel and display device
The present disclosure provides an array substrate, including: a base substrate; a planarization layer formed on the base substrate; a plurality of pixel electrodes formed on the planarization layer; and a pixel definition layer including a first pixel definition layer and a second pixel definition layer, the first pixel definition layer covering a periphery of each pixel electrode and exposing a central area of each pixel electrode, the second pixel definition layer being formed on the planarization layer between adjacent pixel electrodes and having a plurality of openings defining each sub-pixel unit; a bottom of a dam portion of the second pixel definition layer and a bottom of a dam portion of the first pixel definition layer adjacent thereto are separated by a predetermined distance, and a thickness of the second pixel definition layer is greater than a thickness of the first pixel definition layer. |
| US11315986B2 |
Touch display device
A touch display device comprises a substrate; planarization film disposed over the substrate; an anode electrode and a touch metal disposed on the planarization film; a bank disposed over the planarization film on which the anode electrode and the touch metal are disposed, and the bank including a first cavity exposing the anode electrode and a second cavity exposing the touch metal; an organic light emitting layer disposed in the first cavity and disposed over the anode electrode; and a cathode electrode disposed over the organic light emitting layer and the bank, wherein the cathode electrode includes a first cathode electrode and a second cathode electrode, which are separated from each other, and a part of the first cathode electrode is disposed in the second cavity and connected to the touch metal in the second cavity. |
| US11315984B2 |
Color filter substrate, manufacturing method thereof, and OLED display device
The present disclosure relates to a color filter substrate, a manufacturing method thereof, and an OLED display device. The color filter substrate comprises a substrate, a black matrix, a plurality of color resists, and a plurality of isolation walls. The present disclosure disposes the plurality of isolation walls on the black matrix and between two adjacent color resists, thereby preventing light crosstalk between the adjacent color resists and preventing color mixing, and therefore improving display effect. |
| US11315983B2 |
Display panel including multiple pixel units and display device
The present invention provides a display panel and a display device, the display panel includes a first substrate; and a second substrate disposed opposite to the first substrate; and further includes two pixel layers, respectively a first pixel layer and a second a pixel layer; the first pixel layer is disposed on a surface of one side of the first substrate; and the second pixel layer is disposed on a surface of the second substrate facing the first pixel layer. The technical effect of the present invention is to improve the pixel resolution of the display panel. |
| US11315981B2 |
Light-emitting device, and electronic apparatus
A light-emitting device includes a semi-transmissive reflection layer, a first reflection layer that is disposed in a first sub-pixel, a second reflection layer that is disposed in a second sub-pixel, the second sub-pixel that emits same color light as the first sub-pixel, and a light-emitting functional layer that is disposed between the first reflection layer and the semi-transmissive reflection layer, the light-emitting functional layer that is disposed between the second reflection layer and the semi-transmissive reflection layer. A thickness of the light-emitting functional layer in the second sub-pixel is thicker than a thickness of the light-emitting functional layer in the first sub-pixel. |
| US11315979B2 |
Display device
According to an aspect, a display device includes: a substrate; a plurality of pixels; a first anisotropic diffusion layer and a second anisotropic diffusion layer that are layered; and a plurality of light emitting elements interposed between the first anisotropic diffusion layer and the substrate. The first anisotropic diffusion layer and the second anisotropic diffusion layer each include a high refractive index region and a low refractive index region in a mixed manner. An absolute value of a first angle formed by a boundary between the high refractive index region and the low refractive index region of the first anisotropic diffusion layer and a direction perpendicular to the substrate is different from an absolute value of a second angle formed by a boundary between the high refractive index region and the low refractive index region of the second anisotropic diffusion layer and the direction perpendicular to the substrate. |
| US11315976B2 |
Solid-state imaging device, manufacturing method of solid-state imaging device and electronic apparatus
A solid-state imaging device includes a pixel having a photoelectric conversion element which generates a charge in response to incident light, a first transfer gate which transfers the charge from the photoelectric conversion element to a charge holding section, and a second transfer gate which transfers the charge from the charge holding section to a floating diffusion. The first transfer gate includes a trench gate structure having at least two trench gate sections embedded in a depth direction of a semiconductor substrate, and the charge holding section includes a semiconductor region positioned between adjacent trench gate sections. |
| US11315972B2 |
BSI image sensor and method of forming same
A backside illumination (BSI) image sensor and a method of forming the same are provided. A method includes forming a plurality of photosensitive pixels in a substrate, the substrate having a first surface and a second surface, the second surface being opposite the first surface, the substrate having one or more active devices on the first surface. A first portion of the second surface is protected. A second portion of the second surface is patterned to form recesses in the substrate. An anti-reflective layer is formed on sidewalls of the recesses. A metal grid is formed over the second portion of the second surface, the anti-reflective layer being interposed between the substrate and the metal grid. |
| US11315969B2 |
Buried tri-gate fin vertical gate structure and method for making the same
The present application provides a buried tri-gate fin vertical gate structure. Which includes a transfer transistor on an epitaxial layer; a photodiode in the epitaxial layer at one side of the transfer transistor. A reset transistor on the epi-layer includes N+ regions at both sides of its gate, one of the N+ regions forms a floating diffusion node. The bottom of the fin vertical gate protrudes into the epitaxial layer with a number of vertical portions. Thus, increased surface areas enhance charge motion at the bottom, combining large-area transfer at an upper layer by the vertical gate and quick transfer at the bottom by the FINFET, thereby improving photo response. |
| US11315968B2 |
Solid state image device having an impurity concentration at a p/n interface of one photodiode being equal to or greater than at p/n interface of another photodiode within a semiconductor substrate
A solid-state imaging device includes: a first photodiode made up of a first first-electroconductive-type semiconductor region formed on a first principal face side of a semiconductor substrate, and a first second-electroconductive-type semiconductor region formed within the semiconductor substrate adjacent to the first first-electroconductive-type semiconductor region; a second photodiode made up of a second first-electroconductive-type semiconductor region formed on a second principal face side of the semiconductor substrate, and a second second-electroconductive-type semiconductor region formed within the semiconductor substrate adjacent to the second first-electroconductive-type semiconductor region; and a gate electrode formed on the first principal face side of the semiconductor substrate; with impurity concentration of a connection face between the second first-electroconductive-type semiconductor region and the second second-electroconductive-type semiconductor region being equal to or greater than impurity concentration of a connection face of an opposite layer of the second first-electroconductive-type semiconductor region of the second second-electroconductive-type semiconductor region. |
| US11315966B2 |
Solid-state imaging element, manufacturing method, and electronic apparatus
The present disclosure relates to a solid-state imaging element, a manufacturing method, and an electronic apparatus capable of suppressing an adverse effect of high-order light of diffracted light on image quality. A glass plate material is bonded to a semiconductor substrate on which a pixel region in which a plurality of pixels is arranged is formed so that a gap is not provided between the glass plate material and the pixel region, and a low refractive index layer having a refractive index lower than that of the glass substrate is arranged on a resin layer between a low reflection film formed on a front surface of an on-chip lens arranged for every pixel and the glass plate material. The low refractive index layer is formed by a hole layer that includes a plurality of fine holes having a diameter smaller than a pitch of the pixels and a film that is formed so as to close the plurality of fine holes as hollows. The present technology can be applied to, for example, an imaging element chip having a cavityless structure. |
| US11315963B2 |
Display substrate and method for preparing the same, and display device
The present disclosure provides a display substrate, a method for preparing the same, and a display device. The method for preparing the display substrate includes a step of preparing a pixel driving circuit on a substrate, the step specifically includes: preparing a first active layer of an oxide transistor on the substrate; preparing a barrier layer on a surface of the first active layer away from the substrate, an orthogonal projection of the barrier layer on the substrate covering an orthogonal projection of the first active layer on the substrate; preparing a low-temperature polysilicon transistor is on the substrate; and preparing a first gate insulating layer, a first gate electrode, a first input electrode, and a first output electrode of the oxide transistor on the substrate. |
| US11315961B2 |
Field-effect transistor, method for producing same, display element, display device, and system
(Object) To miniaturize a field-effect transistor. (Means of Achieving the Object) A field-effect transistor includes a semiconductor film formed on a base, a gate insulating film formed on a part of the semiconductor film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode formed in contact with the semiconductor film, wherein a thickness of the source electrode and the drain electrode is smaller than a thickness of the gate insulating film, and the gate insulating film includes a region that is not in contact with the source electrode or the drain electrode. |
| US11315959B2 |
Array substrate and display panel
The present disclosure provides an array substrate and a display panel. The array substrate includes a wiring layer, and a non-wiring layer located on a bottom portion of the wiring layer. The non-wiring layer includes a first film layer and a second film layer, which are sequentially stacked in a direction away from the wiring layer. A refractive index of the second film layer is smaller than a refractive index of the first film layer. |
| US11315957B2 |
Light emitting display apparatus
A light emitting display apparatus is disclosed. The light emitting display apparatus includes: a substrate; and a plurality of pixels disposed on a pixel area on the substrate. Each of the plurality of pixels includes: a first circuit layer including a first pixel circuit including a driving transistor; a second circuit layer overlapping the first circuit layer, wherein the second circuit layer includes a second pixel circuit including a data supply transistor configured to supply a data signal to the first pixel circuit; a circuit insulating layer between the first circuit layer and the second circuit layer; and a light emitting diode layer including a light emitting diode electrically connected with the first pixel circuit. |
| US11315956B2 |
Array substrate, manufacturing method thereof and display panel
The present disclosure provides an array substrate, a method of manufacturing the same, and a display panel. The array substrate includes a base substrate, a thin film transistor disposed at a side of the base substrate. The thin film transistor includes a first electrode, a second electrode, and a gate electrode. The array substrate includes a data line disposed at the side of the base substrate The array substrate includes a connection electrode electrically connecting the first electrode of the thin film transistor to the data line. An orthographic projection of an active layer of the thin film transistor on the base substrate is located within an orthographic projection of the gate electrode of the thin film transistor on the base substrate. |
| US11315953B2 |
Substrate and method for manufacturing the same, and display device
A substrate includes a base, a first insulating layer and a plurality of texture identifiers. The first insulating layer is disposed on the base and includes a plurality of via holes extending toward the base from a surface of the first insulating layer facing away from the base. The plurality of texture identifiers are disposed on the base. At least a part of each texture identifier is located within a respective one of the plurality of via holes. The texture identifier is configured to detect texture information. |
| US11315952B2 |
Array substrate, manufacturing method thereof, and display panel
The present disclosure relates to an array substrate, a manufacturing method thereof, and a display panel, the array substrate including: a substrate, and a low temperature polysilicon layer, an inorganic film group layer, and a source/drain layer disposed on the substrate in sequence. The substrate includes a display region, the low temperature polysilicon layer located at the display region, the inorganic film group layer provided with a through hole, and an angle between a sidewall and a bottom wall of the through hole is not less than 100 degrees; the source/drain layer covering the sidewall and the bottom wall of the through hole to be connected to the low temperature polysilicon layer. |
| US11315949B2 |
Charge-trapping sidewall spacer-type non-volatile memory device and method
Disclosed are a semiconductor structure, which includes a charge-trapping sidewall spacer-type non-volatile memory (CTSS-NVM) device, and a method of forming the structure. The CTSS-NVM device includes asymmetric first and second sidewall spacers on opposing sidewalls of a gate structure above a channel region in a semiconductor substrate. The second sidewall spacer is wider than the first and includes multiple dielectric spacer layers, one of which is made of a charge-trapping material, is separated from the substrate (e.g., by a thin oxide layer), and has a bottom end closest to the substrate with a maximum width that is sufficient to achieve charge-trapping for proper CTSS-NVM device operation. The CTSS-NVM device further includes an epitaxial semiconductor layer for a source/drain region on the semiconductor substrate adjacent to the first sidewall spacer and a metal silicide layer for a Schottky barrier on the semiconductor substrate adjacent to the second sidewall spacer. |
| US11315948B2 |
Three-dimensional semiconductor memory device
A three-dimensional semiconductor device includes a stacked structure including a plurality of conductive layers stacked on a substrate, a distance along a first direction between sidewalls of an upper conductive layer and a lower conductive layer being smaller than a distance along a second direction between sidewalls of the upper conductive layer and the lower conductive layer, the first and second directions crossing each other and defining a plane parallel to a surface supporting the substrate, and vertical channel structures penetrating the stacked structure. |
| US11315947B2 |
Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device including a mold structure including a plurality of gate electrodes on a substrate, the plurality of gate electrodes including first, second, and third string selection lines sequentially stacked on the substrate; a channel structure that penetrates the mold structure and intersects each of the gate electrodes; a first cutting region that cuts each of the gate electrodes; a second cutting region that is spaced apart from the first cutting region in a first direction and cuts each of the gate electrodes; a first cutting line that cuts the first string selection line between the first cutting region and the second cutting region; a second cutting line that cuts the second string selection line between the first cutting region and the second cutting region; and a third cutting line that cuts the third string selection line between the first cutting region and the second cutting region. |
| US11315942B2 |
Nonvolatile memory device having a memory-transistor gate-electrode provided with a charge-trapping gate-dielectric layer and two sidewall select-transistor gate-electrodes
The present disclosure provides a SONOS memory structure and a manufacturing method therefor. The SONOS memory structure including a substrate and a select transistor gate and a memory transistor gate formed on the substrate, wherein the substrate is a composite substrate including a base silicon layer, a buried oxide layer and a surface silicon layer, wherein the upper portion of the base silicon layer has a memory transistor well region formed therein; the select transistor gate and the memory transistor gate are formed on the surface silicon layer; the select transistor gate comprises a first select transistor gate and a second select transistor gate, the first select transistor gate and the second select transistor gate are respectively located at two sides of the memory transistor gate, and are electrically isolated from the memory transistor gate by first spacers on both sides of the memory transistor gate. |
| US11315938B1 |
Stacked nanosheet rom
A semiconductor device including a first nanosheet stack of two memory cells including a lower nanosheet stack on a substrate including alternating layers of a first work function metal and a semiconductor channel material vertically aligned and stacked one on top of another, and an upper nanosheet stack including alternating layers of a second work function metal and the semiconductor channel material vertically aligned and stacked one on top of another, the upper nanosheet stack vertically aligned and stacked on the lower nanosheet stack, where a first memory cell of the two memory cells including the lower nanosheet stack includes a first threshold voltage and a second memory cell of the two memory cells including the upper nanosheet stack includes a second threshold voltage, where the first threshold voltage is different than the second threshold voltage. Forming a semiconductor device including a first nanosheet stack of two memory cells. |
| US11315937B2 |
1.5-transistor (1.5T) one time programmable (OTP) memory with thin gate to drain dielectric and methods thereof
A semiconductor device and methods thereof are disclosed. The proposed semiconductor device includes at least a unit cell wherein the unit cell includes a select transistor, and half of a ground-gate transistor electrically connected to the select transistor, and including a central conductive gate electrode region, two side conductive spacer regions and a gate dielectric layer, wherein a first and a second thicknesses of the gate dielectric layer underneath the two side conductive spacer regions are thinner than a third thickness of the gate dielectric layer underneath the central conductive gate electrode region. |
| US11315931B2 |
Embedded transistor
An embedded transistor for an electrical device, such as a DRAM memory cell, and a method of manufacture thereof is provided. A trench is formed in a substrate and a gate dielectric and a gate electrode formed in the trench of the substrate. Source/drain regions are formed in the substrate on opposing sides of the trench. In an embodiment, one of the source/drain regions is coupled to a storage node and the other source/drain region is coupled to a bit line. In this embodiment, the gate electrode may be coupled to a word line to form a DRAM memory cell. A dielectric growth modifier may be implanted into sidewalls of the trench in order to tune the thickness of the gate dielectric. |
| US11315929B2 |
Semiconductor memory device including capacitor with shaped electrode and method for fabricating thereof
A semiconductor device includes a bit line extending in a first direction, a gate electrode extending in a second direction, and a semiconductor pattern extending in a third direction and connected to the bit line, and a capacitor. The capacitor includes a first electrode connected to the semiconductor pattern and a dielectric film between the first and second electrodes. The first or the second direction is perpendicular to an upper surface of the substrate. The first electrode includes an upper and a lower plate region parallel to the upper surface of the substrate, and a connecting region which connects the upper and the lower plate regions. The upper and the lower plate regions of the first electrode include an upper and a lower surface facing each other. The dielectric film extends along the upper and the lower surfaces of the upper and lower plate regions of the first electrode. |
| US11315923B2 |
Stacked nanosheet inverter
A cross-coupled inverter made of nanolayers from a nanosheet stack structure has a left field effect transistor (FET) stack and a right FET stack. The left FET stack has a second left FET stacked on a first left FET. The first and second left FETs have opposite types. The right FET stack has a second right FET stacked on a first right FET. The first and second right FETs have opposite types. The first left and first right FET have a first common source drain (S/D). The left FET stack has a left gate stack surrounding the one or more first left FET channel layers and the one or more second left FET channel layers. The right FET stack has a right gate stack surrounding the one or more first right FET channel layers and the one or more second right FET channel layers. In some embodiments the left/right gate stack has a left/right center gate stack layer and one or more left/right gate stack layers. The center gate stack layers are thicker than the gate stack layers and are between the first and second FETs. The insulating layer surrounds the middle of the center gate stack layers. The first right FET S/D and the second right FET S/D are internally and electrically connected and connected to a Q external connection. The Q external connection is externally connected to the left gate stack. The first left FET S/D and the second left FET S/D are internally, electrically connected together and connected to a QB external connection. The QB external connection is externally connected to the right gate stack.During operation, the first common S/D is connected to a first external power contact and the second common S/D is connected to a second external power contact and the Q external connection has a logically opposite value of the QB external connection during a desired operation phase. Chip area is reduced because of the low number of external connections required to wire the cross-coupled inverter device. |
| US11315922B2 |
Fin cut to prevent replacement gate collapse on STI
The present invention provides fin cut techniques in a replacement gate process for finFET fabrication. In one aspect, a method of forming a finFET employs a dummy gate material to pin a lattice constant of patterned fins prior to a fin cut thereby preventing strain relaxation. A dielectric fill in a region of the fin cut (below the dummy gates) reduces an aspect ratio of dummy gates formed from the dummy gate material in the fin cut region, thereby preventing collapse of the dummy gates. FinFETs formed using the present process are also provided. |
| US11315921B2 |
Integrated circuit with anti-punch through control
An integrated circuit die includes a FinFET transistor. The FinFET transistor includes an anti-punch through region below a channel region. Undesirable dopants are removed from the anti-punch through region during formation of the source and drain regions. When source and drain recesses are formed, a layer of dielectric material is deposited in the recesses. An annealing process is then performed. Undesirable dopants diffuse from the anti-punch through region into the layer of dielectric material during the annealing process. The layer of dielectric material is then removed. The source and drain regions are then formed by depositing semiconductor material in the recesses. |
| US11315920B2 |
Array substrate, electrostatic discharge protection circuit and display apparatus
An array substrate includes a base substrate, at least one first signal line and at least one second signal line disposed at a first side of the base substrate, and at least one electrostatic discharge (ESD) protection device disposed at the first side of the base substrate. Each ESD protection device includes a first electrode coupled to one first signal line, a second electrode coupled to one second signal line, and an insulating medium disposed between the first electrode and the second electrode. An orthographic projection of the first electrode on the base substrate at least partially overlaps with an orthographic projection of the second electrode on the base substrate, and the ESD protection device is configured to discharge electrostatic charges on one of the first signal line and the second signal line that are coupled to the ESD protection device to the other one. |
| US11315915B2 |
Display device
The disclosure relates to a display device, which includes a cover plate, a backlight unit, a display module disposed between the backlight unit and the cover plate, the display module including a first substrate close to the light exiting side of the backlight unit and a second substrate close to the cover plate, and a camera module arranged on the first substrate, the camera module including an infrared cut-off filter, wherein the first substrate extends horizontally beyond the second substrate and the backlight unit to form a mounting section for the camera module, and the infrared cut-off filter is arranged in the mounting section. |
| US11315912B2 |
Image display device
An image display device according to the present disclosure includes: a display panel; a frame unit; and a driver. The display panel is switchable between an image display mode in which an image is displayed and a transmissive mode in which the display panel is in a transmissive state where an object behind the display panel is visible in a front view of the display panel. The frame unit includes an upper plate disposed along an upper edge of the display panel and protruding rearward. The driver includes a circuit unit which drives the display panel. The driver is supported by the upper plate on a bottom side of the upper plate. |
| US11315905B2 |
Semiconductor packages including a bonding wire branch structure
A semiconductor package includes a package substrate, a die stack having a first sub-stack part and a second sub-stack part, an interface chip, and a bonding wire structure. The bonding wire structure includes a first signal wire connecting first signal die pads included in the first sub-stack part to each other, a first signal extension wire connecting the first signal wire to the interface chip, a second signal wire connecting second signal die pads included in the first sub-stack part to each other, a second signal extension wire connecting the second signal wire to the interface chip, an interpose wire connecting interpose die pads included in the first and second sub-stack parts to each other and electrically connecting the interpose die pads to the interface chip, and a shielding wire branched from the interpose wire. |
| US11315900B2 |
Bonded semiconductor devices and methods of forming the same
A method includes patterning a cavity through a first passivation layer of a first package component, the first package component comprising a first semiconductor substrate and bonding the first package component to a second package component. The second package component comprises a second semiconductor substrate and a second passivation layer. Bonding the first package component to the second package component comprises directly bonding the first passivation layer to the second passivation layer; and reflowing a solder region of a conductive connector disposed in the cavity to electrically connect the first package component to the second package component. |
| US11315897B2 |
Substrate having an insulating layer with varying height and angle
A semiconductor package includes: a semiconductor element; a substrate provided with the semiconductor element on a first surface of the substrate, the substrate including a first wiring partially exposed on a second surface of the substrate opposite to the first surface; a first structure formed of an insulating film, or an insulating film and a metal portion, the first structure surrounding an exposed portion of the first wiring, the first structure having asymmetric height and angle; and a first electrode provided on the exposed portion of the first wiring. |
| US11315892B2 |
Power semiconductor device load terminal
A power semiconductor device, a power semiconductor module and a power semiconductor device processing method are provided. The power semiconductor device includes a first load terminal structure, a second load terminal structure, and a semiconductor structure electrically coupled to each load terminal structure and configured to carry a load current. The first load terminal structure includes a conductive layer in contact with the semiconductor structure, a bonding block configured to be contacted by at least one bond wire and to receive at least a part of the load current from the at least one bond wire and/or the conductive layer, a support block having a hardness greater than the hardness of the conductive layer and the bonding block. The bonding block is mounted on the conductive layer via the support block, and a zone is arranged within the conductive layer and/or the bonding block, the zone exhibiting nitrogen atoms. |
| US11315891B2 |
Methods of forming semiconductor packages having a die with an encapsulant
An embodiment is a device including an integrated circuit die having an active side and a back side, the back side being opposite the active side, a molding compound encapsulating the integrated circuit die, and a first redistribution structure overlying the integrated circuit die and the molding compound, the first redistribution structure including a first metallization pattern and a first dielectric layer, the first metallization pattern being electrically coupled to the active side of the integrated circuit die, at least a portion of the first metallization pattern forming an inductor. |
| US11315886B2 |
Semiconductor package having stiffening structure
A semiconductor package having a stiffening structure is disclosed. The semiconductor package includes a substrate, an interposer on the substrate, and a first logic chip, a second logic chip, memory stacks and stiffening chips, all of which are on the interposer. The first logic chip and the second logic chip are adjacent to each other. Each memory stack is adjacent to a corresponding one of the first logic chip and the second logic chip. Each memory stack includes a plurality of stacked memory chips. Each stiffening chip is disposed between corresponding ones of the memory stacks, to be aligned and overlap with a boundary area between the first logic chip and the second logic chip. |
| US11315883B2 |
Integrated circuit product customizations for identification code visibility
An apparatus includes a substrate including an identification code on a first side of the substrate and near a perimeter of the substrate. The apparatus includes a stiffener structure attached to the first side of the substrate. The stiffener structure has a cutout in an outer perimeter of the stiffener structure. The stiffener structure is oriented with respect to the substrate to cause the cutout to expose the identification code. The cutout may have a first dimension and a second dimension orthogonal to the first dimension. The first dimension may exceed a corresponding first dimension of the identification code and the second dimension may exceed a corresponding second dimension of the identification code, thereby forming a void region between the identification code and edges of the stiffener structure. |
| US11315879B2 |
Package substrate and multi-chip package including the same
A package substrate, including a substrate, a first structure disposed on the substrate and having a first through-portion, a first wiring layer disposed in the first through-portion on the substrate, a first insulating layer disposed in the first through-portion on the substrate and covering at least a portion of the first wiring layer, and a second wiring layer disposed on the first insulating layer, and a multi-chip package, including the package substrate, are provided. |
| US11315877B2 |
Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems
A microelectronic device includes a stack structure, a staircase structure, conductive pad structures, and conductive contact structures. The stack structure includes vertically alternating conductive structures and insulating structures arranged in tiers. Each of the tiers individually includes one of the conductive structures and one of the insulating structures. The staircase structure has steps made up of edges of at least some of the tiers of the stack structure. The conductive pad structures are on the steps of the staircase structure and include beta phase tungsten. The conductive contact structures are on the conductive pad structures. Memory devices, electronic systems, and methods of forming microelectronic devices are also described. |
| US11315876B2 |
Thin film conductive material with conductive etch stop layer
A structure comprises a substrate and a conductive pad disposed over the substrate. A conductive layer overlies the conductive pad. A via is disposed over the conductive pad. The via penetrates through the conductive layer and touches a surface of the conductive pad. |
| US11315874B2 |
Cell structure with intermediate metal layers for power supplies
A cell on an integrated circuit is provided. The cell includes: a fin structure; an intermediate fin structure connection metal track disposed in an intermediate fin structure connection metal layer above the fin structure, the intermediate fin structure connection metal track being connected to the fin structure; and a first intermediate gate connection metal track disposed in an intermediate gate connection metal layer above the intermediate fin structure connection metal layer, the first intermediate gate connection metal track being connected to the intermediate fin structure connection metal track. A first power supply terminal is connected to the first intermediate gate connection metal track. |
| US11315871B2 |
Integrated circuit device with bonding structure and method of forming the same
An integrated circuit device includes a first substrate, a second substrate, a first expanding pad, a second expanding pad and a bonding structure. The first substrate is provided with a first conductive portion, the second substrate is provided with a second conductive portion, the first expanding pad is formed on the first conductive portion to provide a first expanded contact area, the second expanding pad is formed on the second conductive portion to provide a second expanded contact area, and the bonding structure is formed between the first substrate and the second substrate, wherein the first expanding pad is bonded to the second expanding pad. |
| US11315868B2 |
Electronic-component-mounted module design to reduce linear expansion coefficient mismatches
An electronic-component-mounted module has an electronic component, a first silver-sintered bonding layer bonded on one surface of the electronic component, a circuit layer made of copper or copper alloy and bonded on the first silver-sintered bonding layer, and a ceramic substrate board bonded on the circuit layer, and further has an insulation circuit substrate board with smaller linear expansion coefficient than the electronic component, a second silver-sintered bonding layer bonded on the other surface of the electronic component, and a lead frame with smaller linear expansion coefficient than the electronic component bonded on the second silver-sintered bonding layer; and a difference in the linear expansion coefficient between the insulation circuit substrate board and the lead frame is not more than 5 ppm/° C. |
| US11315867B2 |
External connection part of semiconductor module, semiconductor module, external connection terminal, and manufacturing method of external connection terminal of semiconductor module
An external connection terminal of a semiconductor module is provided. The external connection terminal includes a conductor having an upper surface and a lower surface; a plated layer configured to cover the upper surface of the conductor; and a nut provided on the lower surface-side of the conductor for receiving a screw penetrating the conductor. The plated layer includes a low contact resistance region overlapping a region in which the nut is provided, and a high contact resistance region that is a region except the low contact resistance region, as seen from above, and the plated layer includes a convex portion and a concave portion on a surface in the high contact resistance region. |
| US11315865B2 |
Circuit board structure and manufacturing method thereof
A method of manufacturing circuit board structure includes forming a sacrificial layer having first openings on a substrate; forming a metal layer on the sacrificial layer; forming a patterned photoresist layer having second openings over the sacrificial layer, in which the second openings are connected to the first openings and expose a portion of the metal layer; forming a first circuit layer filling the second openings and the first openings; forming a first dielectric layer over the sacrificial layer and covering the metal layer, in which the first dielectric layer has third openings exposing the first circuit layer; forming a second circuit layer filling the third openings and covering a portion of the first dielectric layer; removing the substrate to expose the sacrificial layer, a portion of the metal layer and a portion of the first circuit layer; and removing the sacrificial layer and the metal layer. |
| US11315864B2 |
Package structure of common-source common-gate gallium nitride field-effect transistor
A package structure of a common-source common-gate gallium nitride field-effect transistor is disclosed, including a lead frame. A gallium nitride field-effect transistor and a metal oxide semiconductor are directly disposed on the lead frame. The gallium nitride field-effect transistor includes a first matrix directly disposed on the lead frame. A first drain, a first gate, and a first source are disposed on a surface side of the first matrix, and the first drain and the first gate are separately electrically connected to the lead frame. The metal oxide semiconductor includes a second matrix directly disposed on the lead frame. A second drain, a second gate, and a second source are disposed on a surface side of the second matrix, the second drain is directly electrically connected to the first source, and the second gate and the second source are separately electrically connected to the lead frame. |
| US11315860B2 |
Semiconductor package and manufacturing process thereof
A package manufacturing process and semiconductor packages are provided. An interposer having a crystal structure is provided. A first die and a second die are bonded on the interposer. The second die is positioned to be spaced apart from the first die with a gap extending direction that is perpendicular to a shortest distance of the gap, and the gap extending direction is not parallel with a crystallographic orientation of the crystal structure of the interposer. A molding compound is formed over the interposer covering the first and second dies. The molding compound and the interposer are cut into packages. |
| US11315848B2 |
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device, includes: a semiconductor element including an element main surface and an element back surface facing opposite sides in a thickness direction; a wiring part electrically connected to the semiconductor element; an electrode pad electrically connected to the wiring part; a sealing resin configured to cover a part of the semiconductor element; and a first metal layer configured to make contact with the element back surface and exposed from the sealing resin, wherein the semiconductor element overlaps the first metal layer when viewed in the thickness direction. |
| US11315845B2 |
Semiconductor devices comprising getter layers and methods of making and using the same
Semiconductor devices comprising a getter material are described. The getter material can be located in or over the active region of the device and/or in or over a termination region of the device. The getter material can be a conductive or an insulating material. The getter material can be present as a continuous or discontinuous film. The device can be a SiC semiconductor device such as a SiC vertical MOSFET. Methods of making the devices are also described. Semiconductor devices and methods of making the same comprising source ohmic contacts formed using a self-aligned process are also described. The source ohmic contacts can comprise titanium silicide and/or titanium silicide carbide and can act as a getter material. |
| US11315844B2 |
Electronic device mounting board, electronic package, and electronic module
A substrate has a first surface and a second surface opposite to the first surface. The substrate has at least one first recess on the first surface and a second recess on the second surface. The substrate includes electrode pads. The electrode pads are in the at least one first recess. The substrate has the at least one first recess located separate from the second recess in a plan view. |
| US11315842B2 |
Semiconductor package
A transistor (2) and a matching circuit substrate (3-6) are provided on a base plate (1) and connected to each other. A frame (15) is provided on the base plate (1) and surrounds the transistor (2) and the matching circuit substrate (3-6). The frame (15) has a smaller linear expansion coefficient than that of the base plate (1). A screwing portion (17) is provided in the frame (15). A size of the base plate (1) is smaller than that of the frame (15). |
| US11315838B2 |
FinFET device and method of forming same
A method for forming a semiconductor device includes patterning a substrate to form a strip including a first semiconductor material, forming an isolation region along a sidewall of the strip, an upper portion of the strip extending above the isolation region, forming a dummy structure along sidewalls and a top surface of the upper portion of the strip, performing a first etching process on an exposed portion of the upper portion of the strip to form a first recess, the exposed portion of the strip being exposed by the dummy structure, after performing the first etching process, reshaping the first recess to have a V-shaped bottom surface using a second etching process, wherein the second etching process is selective to first crystalline planes having a first orientation relative to second crystalline planes having a second orientation, and epitaxially growing a source/drain region in the reshaped first recess. |
| US11315837B2 |
Semiconductor device and method
An embodiment is a device including a first fin extending from a substrate, a first gate stack over and along sidewalls of the first fin, a first gate spacer disposed along a sidewall of the first gate stack, and a first epitaxial source/drain region in the first fin and adjacent the first gate spacer. The first epitaxial source/drain region including a first epitaxial layer on the first fin, the first epitaxial layer including silicon and carbon, a second epitaxial layer on the first epitaxial layer, the second epitaxial layer having a different material composition than the first epitaxial layer, the first epitaxial layer separating the second epitaxial layer from the first fin, and a third epitaxial layer on the second epitaxial layer, the third epitaxial layer having a different material composition than the first epitaxial layer. |
| US11315833B2 |
Wafer processing method including a test element group (TEG) cutting step
A wafer processing method includes a sheet bonding step of placing a polyolefin or polyester sheet on a front side of a wafer having a device area where devices are formed so as to be separated by division lines, the sheet having a size capable of covering the device area, and next performing thermocompression bonding to bond the sheet to the front side of the wafer, thereby protecting the front side of the wafer with the sheet. The method further includes a test element group (TEG) cutting step of applying a first laser beam through the sheet to the wafer along each division line thereby cutting a TEG formed on each division line, and a modified layer forming step of applying a second laser beam to a back side of the wafer along each division line, the second laser beam having a transmission wavelength to the wafer, thereby forming a modified layer inside the wafer along each division line. |
| US11315830B2 |
Metallic interconnect structures with wrap around capping layers
Techniques are provided to fabricate metal interconnects using liner planarization-free process flows. A sacrificial layer is formed on a dielectric layer, and the sacrificial and dielectric layers are patterned to form an opening in the dielectric layer. A conformal liner layer is deposited, and a metal layer deposited to form a metal interconnect in the opening. An overburden portion of the metal layer is planarized to expose an overburden portion of the liner layer. A first wet etch is performed to selectively remove the overburden portion of the liner layer. A second wet etch process is performed to selectively remove the sacrificial layer, resulting in extended portions of the liner layer and the metal interconnect extending above a surface of the dielectric layer. A dielectric capping layer is formed to cover the sidewall and upper surfaces of the extended portions of the liner layer and the metal interconnect. |
| US11315829B2 |
Amorphous layers for reducing copper diffusion and method forming same
A method includes depositing an etch stop layer over a first conductive feature, performing a first treatment to amorphize the etch stop layer, depositing a dielectric layer over the etch stop layer, etching the dielectric layer to form an opening, etching-through the etch stop layer to extend the opening into the etch stop layer, and filling the opening with a conductive material to form a second conductive feature. |
| US11315828B2 |
Metal oxide composite as etch stop layer
A method includes providing a dielectric layer; forming a metal line in the dielectric layer; forming an etch stop layer on the metal line, wherein the etch stop layer includes a metal atom bonded with a hydroxyl group; performing a treatment process to the etch stop layer to displace hydrogen in the hydroxyl group with an element other than hydrogen; partially etching the etch stop layer to expose the metal line; and forming a conductive feature above the etch stop layer and in physical contact with the metal line. |
| US11315826B2 |
Three dimensional memory device and method for fabricating the same
A three-dimensional memory device includes a substrate, a plurality of horizontal conductive layers, a plurality of vertical memory structures and a vertical conductive post. The conductive layers are located above the substrate, and immediately-adjacent two of the conductive layers are spaced by a first air gap. The memory structures pass through the conductive layers and are connected to the substrate. The conductive post is located between immediately-adjacent two of the memory structures and passes through the conductive layers and is connected to the substrate. The conductive post is spaced from immediately-adjacent edges of the conductive layers by a second air gap. |
| US11315825B2 |
Semiconductor structures including stacked depleted and high resistivity regions
Structures including electrical isolation and methods associated with forming such structures. A semiconductor layer has a top surface, a polycrystalline region, and a single-crystal region between the polycrystalline region and the top surface. An isolation band is located beneath the single-crystal region. The isolation band contains a first concentration of an n-type dopant and a second concentration of a p-type dopant, and a net difference between the first concentration and the second concentration is within a range of about five percent to about fifteen percent. |
| US11315822B2 |
Porous chuck table
A porous chuck table for holding a plate-like workpiece under suction includes a porous plate having a porous structure, the porous plate having a holding surface for holding the workpiece under suction thereon, and a frame surrounding the porous plate and having a face side lying flush with the holding surface. The porous plate is at least made of spherical glass particles, adjacent ones of the glass particles are partly joined together, and interstices between adjacent ones of the partly joined glass particles function as pores through which a fluid can flow. |
| US11315821B2 |
Processing method for wafer
A processing method for a wafer includes the steps of forming a frame unit having a ring-shaped frame, providing a resin sheet, fixing the resin sheet, which covers the wafer at its front side, at its outer peripheral edge, on the ring-shaped frame, forming through-holes in the resin sheet, holding the frame unit on a side of the resin sheet under suction on a holding surface to fix the ring-shaped frame, applying a laser beam to the wafer to form modified layers inside the wafer, and separating the resin sheet. In the holding step, the adhesive tape is suctioned under a negative pressure acting from the holding surface via through-holes while the front side of the wafer is prevented by the resin sheet from being suctioned on the holding surface. |
| US11315819B2 |
System apparatus and method for enhancing electrical clamping of substrates using photo-illumination
A method may include providing a substrate on a clamp, and directing radiation from an illumination source to the substrate when the substrate is disposed on the clamp during substrate processing, wherein the radiation is characterized by a radiation energy, wherein at least a portion of the radiation energy is equal to or greater than 2.5 eV. |
| US11315818B2 |
Inline thin film processing device
A thin film processing device includes a showerhead for performing thin film processing for a substrate on a susceptor that moves along a transport track, and one or more transporters for supporting the susceptor. The transporters can transport the susceptor along the transport track while floating with respect to the track and not contacting the track, and can also control the height of the susceptor so as to adjust the distance from the substrate to the showerhead; and a transporter control system for controlling the transporters. |
| US11315817B2 |
Apparatus for transferring wafer, method for transferring wafer using the same with three sensors
An apparatus for transferring a wafer includes a main body, a first support installed in the main body, a sensor support fixed to the first support, a finger member slidably installed along the first support to transfer the wafer and positioned at a lower level than the sensor support, three sensors each including a light emitter installed on the first support and a light receiver installed on the sensor support, the three sensors respectively configured to detect three points of an edge of the wafer seated on the finger member, and a controller connected to the three sensors, wherein the controller is configured to determine whether any of the three points of the edge of the wafer is detected from a notch of the wafer based on signals received from the sensors. |
| US11315809B2 |
Device and forming method of device
A device comprises a first seal member, a second seal member, a first circuit member, a second circuit member and one or more compressive members. The first seal member has a first outer portion having a first seal portion, and a first inner portion located inward of the first outer portion. The second seal member has a second outer portion having a second seal portion, and a second inner portion located inward of the second outer portion. The first seal portion and the second seal portion are bonded together. The first circuit member and the second circuit member are shut in a closed space which is enclosed by the first inner portion and the second inner portion. One of the compressive members is located between the first seal member and the first circuit member or located between the second seal member and the second circuit member. |
| US11315808B2 |
Frame feeder
The present invention includes: a heat plate for heating a lower side of a substrate sliding on an upper surface; and a heat block for heating the heat plate. The heat block includes an air heating flow path for heating air which flows in from a bottom surface side and causing the air to flow out to the heat plate side, the heat plate includes air holes for discharging the air heated by the air heating flow path from the upper surface, the heated air discharged from the air holes forms a heated air atmosphere above the heat plate, and the substrate is transported through the heat air atmosphere. Thereby, curved deformation of the substrate is suppressed. |
| US11315805B2 |
Cross-wafer RDLs in constructed wafers
A method includes placing a plurality of package components over a carrier, encapsulating the plurality of package components in an encapsulant, forming a light-sensitive dielectric layer over the plurality of package components and the encapsulant, exposing the light-sensitive dielectric layer using a lithography mask, and developing the light-sensitive dielectric layer to form a plurality of openings. Conductive features of the plurality of package components are exposed through the plurality of openings. The method further includes forming redistribution lines extending into the openings. One of the redistribution lines has a length greater than about 26 mm. The redistribution lines, the plurality of package components, the encapsulant in combination form a reconstructed wafer. |
| US11315801B2 |
Processing of workpieces using ozone gas and hydrogen radicals
Methods for processing a workpiece are provided. The workpiece can include a ruthenium layer and a copper layer. In one example implementation, a method for processing a workpiece can include supporting a workpiece on a workpiece support. The method can include performing an ozone etch process on the workpiece to at least a portion of the ruthenium layer. The method can also include performing a hydrogen radical treatment process on a workpiece to remove at least a portion of an oxide layer on the copper layer. |
| US11315797B2 |
Plasma etching method using gas molecule containing sulfur atom
Provided is a plasma etching method that enables, in a semiconductor fabrication process, selective processing of a film consisting of a single material, such as SiO2 or SiN, or a composite material of SiO2 and SiN over a mask material as well as processing into satisfactorily vertical processed shapes.It is possible, for example, to enhance selectivity over a mask material or other materials excluding an etching target, to reduce damage on sidewalls, and to suppress etching in the lateral direction by generating a plasma of a gas compound having a thioether skeleton represented by general formula (1) or a mixed gas thereof and etching a film consisting of a composite material or a single material, such as SiO2 or SiN, thereby depositing a protective film that contains sulfur atoms and has a lower content of fluorine atoms than the cases of using common hydrofluorocarbon gases: general formula (1): Rf1—S—Rf2 (1) where Rf1 is a monovalent organic group represented by CxHyFz and Rf2 is a monovalent organic group represented by CaHbFc. |
| US11315796B2 |
Semiconductor structure and fabrication method thereof
Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a substrate having a first region, second regions and third regions; and forming a patterned structure on the substrate. The patterned structure includes at least one first patterned layer on the first region, at least one second patterned layer on the second region and at least one third patterned layer on the third region, the at least one first patterned layer is discrete from the at least one second region and the at least one second region is discrete from the at least one third region. The method also includes removing the second patterned layer; and etching the substrate using the first patterned layer and the third patterned layer as an etching mask to form a base substrate, the first fin on the base substrate and the third fin on the base substrate. |
| US11315795B2 |
Substrate processing method and substrate processing apparatus
A substrate processing method performed in a substrate processing apparatus includes providing a substrate which has a first film composed of silicon only and a second film including silicon; and etching the first film by plasma formed from a mixed gas including a halogen-containing gas and a silicon-containing gas but not including an oxygen-containing gas. |
| US11315794B2 |
Apparatus and methods for selectively etching films
An apparatus and methods for selectively etching a particular layer are disclosed. The apparatus and methods are directed towards maintaining the etch rate of the particular layer, while keeping intact a non-etched layer. The etching process may be accomplished by co-flowing a hydrogen precursor gas and a fluorine precursor gas into a remote plasma unit. A resulting gas mixture may then be flowed onto the substrate having a silicon oxide layer as an etch layer and a silicon nitride layer as a non-etched layer, for example. A reaction between the resulting gas mixture and the particular layer takes place, resulting in etching of the silicon oxide layer while maintaining the silicon nitride layer in the above example. |
| US11315791B2 |
Fluorine ion implantation method and system
A method and system for fluorine ion implantation is described, where a fluorine compound capable of forming multiple fluorine ionic species is introduced into an ion implanter at a predetermined flow rate. Fluorine ionic species are generated at a predetermined arc power and source magnetic field, providing an optimized beam current for the desired fluorine ionic specie. The desired fluorine ionic specie, such as one having multiple fluorine atoms, is implanted into the substrate under the selected operating conditions. |
| US11315785B2 |
Epitaxial blocking layer for multi-gate devices and fabrication methods thereof
A method includes providing a semiconductor substrate; epitaxially growing a blocking layer from a top surface of the semiconductor substrate, wherein the blocking layer has a lattice constant different from the semiconductor substrate; epitaxially growing a semiconductor layer above the blocking layer; patterning the semiconductor layer to form a semiconductor fin, wherein the blocking layer is under the semiconductor fin; forming a source/drain (S/D) feature in contact with the semiconductor fin; and forming a gate structure engaging the semiconductor fin. |
| US11315779B1 |
Dual-frequency RF ion confinement apparatus
A mass spectrometric system comprises an RF-device for transversely confining ions in an ion region using: (a) a first set of electrodes arranged parallel to one another along a direction of ion travel to define a first transverse boundary of the ion region, and that are supplied with a first RF-voltage such that opposite phases of the first RF-voltage are applied to adjacent electrodes of the first set; and (b) a second set of electrodes arranged parallel to one another along said direction of ion travel to define a second transverse boundary of the ion region, and that are supplied with a second RF-voltage such that opposite phases of the second RF-voltage are applied to adjacent electrodes of the second set, the first and second transverse boundaries being opposite each other in a transverse direction of the ion region and the first and second RF voltages having different frequencies. |
| US11315778B2 |
Spray chambers and methods of using them
Devices, systems and methods including a spray chamber are described. In certain examples, the spray chamber may be configured with an outer chamber configured to provide tangential gas flows. In other instances, an inner tube can be positioned within the outer chamber and may comprise a plurality of microchannels. In some examples, the outer chamber may comprise dual gas inlet ports. In some instances, the spray chamber may be configured to provide tangential gas flow and laminar gas flows to prevent droplet formation on surfaces of the spray chamber. Optical emission devices, optical absorption devices and mass spectrometers using the spray chamber are also described. |
| US11315776B2 |
Automated inline preparation and degassing of volatile samples for inline analysis
An analysis system includes a degassing cell, at least one first valve, and at least one second valve. The at least one first valve is fluidly coupled with a top of the degassing cell, the at least one first valve configured selectably connect the degassing cell to a displacement gas flow and to a vacuum source. The at least one second valve is fluidly connected with a lateral side of the degassing cell and separately fluidly connected with a bottom of the degassing cell. The at least one second valve is selectably coupled with any of a source of a sample-carrying fluid, a transfer line configured to deliver a sample to an analysis device, or a waste output. |
| US11315768B2 |
Loading apparatus and physical vapor deposition apparatus
The present disclosure provides a loading apparatus and a physical vapor deposition (PVD) apparatus. The loading apparatus includes a pedestal configured to support a workpiece; and a first support member placed on the pedestal and configured to push up a cover ring when the pedestal is at an operation position to prevent an overlapping portion of a cover ring and the workpiece from contacting each other. In the loading apparatus and the PVD apparatus, the first support member supports the cover ring, such that the cover ring does not contact the workpiece, thereby reducing stress forces on the workpiece by external components. |
| US11315765B2 |
Plasma processing apparatus and plasma processing method
Disclosed is a plasma processing apparatus including a processing chamber configured to perform a processing on a wafer by plasma, a VF power supply configured to change a frequency of a high frequency power to be supplied into the chamber, a susceptor configured to mount the wafer thereon, and a focus ring disposed to surround the wafer. A first route, which passes through the plasma starting from the VF power supply, passes through the susceptor, the wafer and the plasma, and a second route, which passes through the plasma starting from the VF power supply, passes through the susceptor, the focus ring and the plasma. The reflection minimum frequency of the first route is different from the reflection minimum frequency of the second route, and the frequency range changeable by the VF power supply includes the reflection minimum frequencies of the first and second routes. |
| US11315760B2 |
Symmetric plasma process chamber
Embodiments of the present invention provide a plasma chamber design that allows extremely symmetrical electrical, thermal, and gas flow conductance through the chamber. By providing such symmetry, plasma formed within the chamber naturally has improved uniformity across the surface of a substrate disposed in a processing region of the chamber. Further, other chamber additions, such as providing the ability to manipulate the gap between upper and lower electrodes as well as between a gas inlet and a substrate being processed, allows better control of plasma processing and uniformity as compared to conventional systems. |
| US11315757B2 |
Method and apparatus to enhance sheath formation, evolution and pulse to pulse stability in RF powered plasma applications
A radio frequency (RF) generator is configured to generate a RF signal. The RF signal can be modulated by a pulse having one or multiple states. During an initial state at pulse initiation, the RF generator adjusts the impedance match by selecting the frequency of the RF signal. During a second state of the pulse, the RF generator adjusts the impedance match using a matching network. The first state includes controlling the RF generator to output a power burst, and the second state includes controlling the generator to output an operating power. |
| US11315747B2 |
On-chip micro electron source and manufacturing method thereof
Provided are an on-chip miniature electron source and a method for manufacturing the same. The on-chip miniature electron source includes: a thermal conductive layer; an insulating layer provided on the thermal conductive layer, where the insulating layer is made of a resistive-switching material, and at least one through hole is provided in the insulating layer; and at least one electrode pair provided on the insulating layer, where at least one electrode of the electrode pair is in contact with and connected to the thermal conductive layer via the through hole, where there is a gap between two electrodes of the electrode pair, and a tunnel junction is formed within a region of the insulating layer under the gap. Thus, heat generated by the on-chip micro electron source can be dissipated through the electrode and the thermal conductive layer, thereby significantly improving heat dissipation ability of the on-chip miniature electron source. |
| US11315745B2 |
Key structure
A key structure, including a keycap, a scissor component, an elastomer, an optical switch, a shading portion, and a circuit board, is provided. The scissor component is formed of a first and a second supporter. The circuit board has two first and two second limiting units. The keycap has two third and two fourth limiting units. The first supporter is rotatably or slidably connected to the first and the third limiting units. The second supporter is rotatably or slidably connected to the second and the fourth limiting units. The keycap is disposed on the circuit board through the scissor component. The elastomer is interposed between the circuit board and the keycap. The optical switch includes an emitter and a receiver. The shading portion is disposed on the first or the second supporter to block a light signal transmitted between the emitter and the receiver. |
| US11315739B2 |
Electrolytic capacitor and method for manufacturing same
An electrolytic capacitor includes an anode body, a dielectric layer disposed on a surface of the anode body, and a solid electrolyte layer disposed on a surface of the dielectric layer. The solid electrolyte layer includes a conductive polymer and a first compound. The first compound has a naphthalene skeleton, and includes at least one COOM1 group and at least one sulfonate group. The at least one sulfonate group is bonded to the naphthalene skeleton. The at least one COOM1 group is bonded to the naphthalene skeleton, where M1 is a hydrogen atom, a metal atom, or an onium group. |
| US11315732B2 |
Multi-layer ceramic electronic component
A multilayer ceramic electronic component includes a ceramic body, and first and second external electrodes disposed on the surface of the ceramic body, respectively. The ceramic body includes a capacitance forming portion including a dielectric layer and internal electrodes, margin portions disposed on both sides of the capacitance forming portion, and cover portions disposed on both sides of the capacitance forming portion. The first and second external electrodes include first and second base electrodes, respectively, first and second conductive layers disposed on edges of the first and second base electrodes, respectively, and first and second terminal electrodes covering the first and second base electrodes, respectively. |
| US11315726B2 |
LC resonator
An LC resonator includes an external connection terminal, an inductor, a capacitor, and a via conductor pattern. The inductor winds around an axis orthogonal to a laminated direction. The capacitor is connected to the inductor. The via conductor pattern extends from the inductor in the laminated direction, and the inductor is connected to the external connection terminal with the via conductor pattern. The inductor includes a columnar conductor pattern extending in the X-axis direction. The area of the columnar conductor pattern in a plan view from the X-axis direction is greater than or equal to the area of the via conductor pattern in a plan view from the Z-axis direction. |
| US11315718B2 |
Coil component and method for manufacturing the same
A coil component includes a body including a plurality of pattern layers and a via electrode layer connecting the respective conductive pattern layers to each other, and external electrodes disposed on an external surface of the body. A cross-sectional shape of the via electrode layer is divided into an upper region and a lower region, a side surface of the upper region has a tapered shape, and a lower surface of the lower region includes a curved portion. |
| US11315716B2 |
Process and apparatus for the magnetization of magnetizable materials
An apparatus and method for magnetizing a magnetizable ink. The apparatus can include a first pair of first and second cylindrical magnetic arrays defining a first gap. The first and second cylindrical magnetic arrays can each have alternately spaced magnetized sections that are spaced apart axially by flux conducting elements. The apparatus can include a second pair of third and fourth cylindrical magnetic arrays defining a second gap. The third and fourth cylindrical magnetic arrays can each have alternately spaced magnetized sections that are spaced apart axially by flux conducting elements. The apparatus can include a third pair of fifth and sixth cylindrical magnetic arrays defining a third gap. The fifth and sixth magnetic array can have alternately spaced magnetized sections that are spaced apart axially by flux conducting elements. The cylindrical magnetic arrays can be positioned to receive a moving web substrate through the first, second, and third gaps. |
| US11315715B2 |
Electromagnetic actuator
An electromagnetic actuator including an armature movable along a longitudinal axis in an armature chamber, a coil running around the longitudinal axis for producing a magnetic field for moving the armature, a control element motionally coupled to the armature, in particular for operating a valve element of a pressure-regulating valve, a pole disk for conducting a magnetic flux, and a cover bounding the armature chamber, the cover and the pole disk together forming a component in one piece. |
| US11315702B2 |
Covered electrical wire, terminal-equipped electrical wire, copper alloy wire, and copper alloy stranded wire
A covered electrical wire comprises a conductor and an insulating covering layer provided outside the conductor, the conductor being a stranded wire composed of a strand of a plurality of copper alloy wires: composed of a copper alloy containing Fe in an amount of 0.2% by mass or more and 1.6% by mass or less, P in an amount of 0.05% by mass or more and 0.4% by mass or less, and Sn in an amount of 0.05% by mass or more and 0.7% by mass or less, with the balance being Cu and impurities, and having a mass ratio of Fe/P of 4.0 or more; and having a wire diameter of 0.5 mm or less. |
| US11315700B2 |
Method and apparatus for production of radiometals and other radioisotopes using a particle accelerator
An irradiation target positioning device and method for creating radioisotopes utilizing linear particle beam accelerators or cyclotron accelerators. The device positions a target proximate to a liquid reservoir and vapor expansion chamber. The target may be in a solid phase. Heat produced within the target during irradiation can be absorbed by the liquid. The liquid may be heated to its vaporization temperature and vapor emitted into the vapor chamber. The vapor chamber may utilize a cooling mechanism, allowing the vapor to condense (second phase change). The radioactive product may diffuse into the liquid, thereby allowing the irradiated product to be conveyed out of the target structure in a liquid, solution or slurry. Multiple radioisotopes may be produced simultaneously out of the target material and liquid and separated later. The target material and irradiated product may be removed from the target surface by acid. |
| US11315699B2 |
Composition of matter comprising a radioisotope composition
Disclosed are a method and apparatus for making a radioisotope and a composition of matter including the radioisotope. The radioisotope is made by exposing a material to neutrons from a portable neutron source. |
| US11315697B1 |
Fines removal apparatus installed on radioactive liquid waste granulat
Proposed is a fines removal apparatus installed on a radioactive liquid waste granulator, the apparatus including: a body unit fastened to an outlet provided on the radioactive liquid waste granulator and configured to receive the granulated radioactive waste by an operation of a first opening/closing valve, the radioactive liquid waste granulator being configured to manufacture concentrated liquid waste and to manufacture granulated radioactive waste by drying the concentrated liquid waste. an air supply unit provided on one side of the body unit and configured to spray air to the supplied granulated radioactive waste at regular periods, thereby scattering and separating fines contained in the granulated radioactive waste; and a reprocessing unit provided in a vacuum state on an opposite side of the body unit and configured to allow the scattered fines to be transferred to the radioactive waste granulator along a transfer pipe by vacuum pressure. |
| US11315695B2 |
Ceramic nuclear fuel having UB2 enriched in 11B
A fuel assembly for a nuclear reactor, a fuel rod of the fuel assembly, and a ceramic nuclear fuel pellet of the fuel rod are disclosed. The fuel pellet includes a first fissile material of UB2, The boron of the UB2 is enriched to have a concentration of the isotope 11B that is higher than for natural B. |
| US11315690B2 |
Modeling and simulation system for optimizing prosthetic heart valve treatment
A computer-implemented method for simulating blood flow through one or more coronary blood vessels may first involve receiving patient-specific data, including imaging data related to one or more coronary blood vessels, and at least one clinically measured flow parameter. Next, the method may involve generating a digital model of the one or more coronary blood vessels, based at least partially on the imaging data, discretizing the model, applying boundary conditions to a portion of the digital model that contains the one or more coronary blood vessels, and initializing and solving mathematical equations of blood flow through the model to generate computerized flow parameters. Finally, the method may involve comparing the computerized flow parameters with the at least one clinically measured flow parameter. |
| US11315689B2 |
Interactive graphical system for estimating body measurements
Utilizing graphical elements representing human bodies to estimate physical measurements of a user is described. In at least one example, a service provider can access a database storing a plurality of data items. The service provider can cause a set of data items of the plurality of data items to be presented to the user. Data items in the set of data items are associated with at least one graphical element representing a human body with individual magnitudes corresponding to individual dimensions of a plurality of dimensions. The service provider can receive data indicating a selection of a data item associated with a first magnitude associated with a first dimension and a second magnitude associated with a second dimension. The service provider can estimate physical measurements associated with the user based partly on a first magnitude and/or the second magnitude. |
| US11315686B2 |
Individualized care management system based on digestive activity
Embodiments of this invention include systems and methods for developing individualized dietary and health improvement plans based on an individual's intestinal microbiome and digestive activity. More particularly, the invention is related to a system providing a hydrogen and/or methane sensor device and a wireless platform in communication with the sensor device to periodically analyze the individual's metabolic activity in correlation with their gut microbiome and a personal database to provide personalized feedback to the individual of treatment plans and general techniques that can be used to improve the individual's general health and well being. The systems and methods further include a system for analyzing the hydrogen and/or methane levels in the individual's exhalations or flatulence in light of the individual's intestinal microbiome. This analysis uses bioinformatics to relate alterations in hydrogen and/or methane levels to the individual's intestinal microbiome and personal diet and tolerances/intolerances to identify and communicate real time dietary suggestions and general dietary and health treatment plans. The relationship of the bioinformatics and alterations in hydrogen and/or methane levels is also used to infer drug effectiveness. Such general dietary guidance, health treatment plans, and drug effectiveness contribute to an overall improvement in a person's general health and well being. |
| US11315682B2 |
Real-time phase detection of frequency band
Techniques are described for real-time phase detection. For the phase detection, a signal is correlated with a frequency component of a frequency band whose phase is being detected, and the correlation includes predominantly decreasing weighting of past portions of the signals. |
| US11315678B2 |
Method and apparatus for an intelligent schedule board for operating rooms for surgical centers and hospitals
A method for providing an intelligent schedule board for operating rooms in surgical centers and hospitals is provided. The method comprises displaying an estimated location of a patient on an operating room schedule board and displaying status information on the operating room schedule board. The method also comprises automatically updating the schedule dashboard as at least one of the location and the status of the patient changes. Patient location is estimated using an indoor tracking system and wherein the system is an RTLS system. Patient status information is entered by staff members by means of at least one of a tablet device, a phone device, and a computer. Patient status information is entered automatically by means of a computer vision scheme that detects patient status comprising at least one of a start of surgery and an end of surgery. Patient status information is entered using a voice recognition scheme. |
| US11315675B2 |
System and method for entrainment of a user based on bio-rhythm of the user
A system and method for entrainment of a user based on bio rhythm of the user. The system includes an analyzing unit and an entraining rhythm generation unit. The analyzing unit receives bio rhythm information of a user, analyzes the bio rhythm information, and sets an entraining target based on an analysis of the bio rhythm information. The entraining rhythm generation unit generates an entraining rhythm based on the entraining target for providing an entrainment experience to the user, and control one or more human sensory inputs to the user based on the entraining rhythm. The bio-rhythm information may be information related to a breathing rate, a heart rate, brain waves, circadian rhythm, body rhythm, emotion, etc. The entrainment experience may be provided either inside or outside a vehicle. |
| US11315672B2 |
Charging device for a physiological signal transmitter and a charging method for the same
A charging device for a physiological signal transmitter is disclosed, wherein the physiological signal transmitter is to receive and transmit a physiological signal from a subcutaneous tissue of a living body, and has a first electrical connecting port. The charging device comprises a body including a placing portion, a charging module and an operating module. The placing portion disposes thereon the physiological signal transmitter, and includes a bearing surface and a first opening. The bearing surface disposes thereon the physiological signal transmitter, and the first opening aligns therewith the first electrical connecting port of the physiological signal transmitter. The charging module is accommodated in the body and includes a second electrical connecting port, a third electrical connecting port and a circuit assembly. The second electrical connecting port is disposed in the opening and protrusive beyond or beneath the bearing surface. The third electrical connecting port is connected to a power source. The circuit assembly is configured to control a charging on the physiological signal transmitter, and electrically connected to the second electrical connecting port and the third electrical connecting port. The operating module is accommodated in the body, and coupled with the charging module, wherein when the physiological signal transmitter is placed on the bearing surface and in a first operating state, the operating module protrudes the second electrical connecting port beyond the bearing surface to electrically connect with the first electrical connecting port. |
| US11315670B2 |
Method and monitoring device for monitoring operation of a drug delivery device
The present invention relates to a method and to a monitoring device for monitoring operation of a drug delivery device, the monitoring device comprising of at least a first and a second sensor arranged at a distance from each other with regard to a first direction and being adapted to generate a first and a second electrical signal in response to an operation of the device, a processing unit configured to determine a time delay between the first and the second electrical signals and being adapted to determine at least one state parameter of the drug delivery device on the basis of said time delay. |
| US11315668B2 |
Abstracting information from patient medical records
Among other things, unstructured text items are processed to identify elements of the unstructured text items relevant to classification rules of quality metrics applicable to services provided by a healthcare provider with respect to diseases, conditions, or interventions of patients. The classification rules define classifications of patients based on diseases, conditions, or interventions of patients or on aspects of the services provided. Through a user interface, the unstructured text items, the identified elements, and user interface controls for classifying the patients with respect to the classification rules, based on the identified elements, are presented to the user. |
| US11315666B2 |
Blockchain-based data processing method and device
In an implementation, processing blockchain-based data is described. Data to be stored in a blockchain network is received at one or more processing devices of a blockchain node. A determination is made that an attribute of the data is of a particular type. In response to determining that the attribute of the data is of the particular type, a digest representing the data is generated. The digest is smaller in size than the data. The data is stored at a storage location in accordance with a mapping relationship between the digest and a first identifier of the data. An encrypted version of the digest is generated, by the one or more processing devices for storage on the blockchain network, using a private key of a public-private key pair corresponding to a second identifier of the data. |
| US11315665B2 |
Longitudinal data quality assurance system
A longitudinal data quality assurance system is operable to receive a set of medical scans corresponding to a same first patient. A first chronologically ordered list of the set of medical scans is generated based on a corresponding first set of dates, where each of the corresponding first set of dates are extracted from a headers of the set of medical scans. Quality assurance data is generated for the first chronologically ordered list by performing at least one quality assurance function on at least one of the set of medical scans. A second chronologically ordered list that includes a first subset of the first set of medical scans is generated to rectify at least one continuity error of the first chronologically ordered list, indicated in the quality assurance data. The second chronologically ordered list is transmitted to a client device for display via a display device. |
| US11315662B2 |
Assay information management methods and devices
The present invention relates to methods, devices and systems for associating assay information with an assay consumable used in a biological assay. Provided are assay systems and associated consumables, wherein the assay system includes a reader adapted to read/erase/write information from/to an assay consumable identifier associated with the assay consumable. Various types of assay information are described, as well as methods of using such information in the conduct of an assay by an assay system. |
| US11315659B2 |
Methods and systems for identifying nucleotide-guided nuclease off-target sites
Methods and systems for searching genomes for potential nucleotide-guided nuclease off-target sites are provided. Also provided are methods of searching genomes for potential off-target deadCas9 binding sites. In some embodiments, the methods include ranking the potential off-target sites based on the number and location of mismatches, insertions, and/or deletions in the DNA, RNA, or DNA/RNA guide sequence relative to the genomic DNA sequence at a putative target site in the genome, allowing the selection of better target sites and/or experimental confirmation of off-target sites. |
| US11315656B1 |
Detection circuit and detection method
A detection circuit and a detection method are provided. The detection circuit is suitable for a system-on-chip (SoC). The SoC is coupled to an alarm pin of a DDR4 memory through a connection pad, and the detection circuit includes a control circuit coupled to the connection pad. In response to the DDR4 memory performing a refresh process or a specific event occurring, the control circuit outputs a test signal with a first voltage level to the connection pad, and determines whether a voltage level of the connection pad is tied to a second voltage level. In response to determining that the voltage level of the connection pad is tied to the second voltage level, the control circuit outputs an interrupt signal to a CPU of the SoC, and the interrupt signal indicates that the alarm pin of the DDR4 memory is not controlled normally by the DDR4 memory. |
| US11315653B2 |
Dynamic random access memory and method thereof
The present disclosure provides a dynamic random access memory (DRAM) and method for controlling the DRAM. The DRAM has a first operation mode and a second operation mode. The DRAM includes a control module and a connecting module. The connecting module includes an input/output (I/O) pad and a determining circuit. The I/O pad is configured to receive a first input signal. The determining circuit includes a detector and a first determining unit. The detector is configured to compare the first input signal to a reference signal so as to generate a first signal. The first determining unit is configured to receive the first signal and generate a first output signal according to the first signal. The control module is configured to control the DRAM being operated under the first operation mode or the second operation mode according to the first output signal. |
| US11315651B1 |
Non-volatile memory device
A non-volatile memory device includes a first and a second memory regions including first and second memory cells and first and second analog circuits, respectively; a control logic circuit determining on/off states of the analog circuits, and converting an external power supply voltage into an internal operating voltage for operation of each of the memory cells; and input/output circuit selecting an input/output memory region for performing input/output of data using the internal operating voltage, wherein input/output of data for the first and second memory cells are sequentially performed, and at least one of the each of the first and second analog circuits are turned on together while the input/output of data for the first memory cells is performed. |
| US11315650B2 |
Memory system, memory controller, and method of operating memory system
A memory system is provided to include a memory device and a memory controller configured to control the memory device. The memory device includes a first data latch storing information about a state of the memory cell and is configured to: execute a first verification operation and a second verification operation on the memory cell in response to receiving, from the memory controller, a suspend command to suspend a program operation being performed on the memory cell; store, in the first data latch, a temporary value obtained based on a result value of the first verification operation and a result value of the second verification operation; and execute, a resumption command to resume the program operation, a third verification operation, and restore the result value of the first verification operation and the result value of the second verification operation. |
| US11315649B2 |
Memory controller, memory device and memory system having improved threshold voltage distribution characteristics and related operating methods
Provided are a memory controller and memory system having an improved threshold voltage distribution characteristic and an operating method of the memory system. As a write request of data with respect to a first block is received, an erase program interval (EPI) is determined denoting a time period elapsed after erasure of the first block. When the determined EPI is equal to or less than a reference time, data is programmed to the first block based on a first operation condition selected from among a plurality of operation conditions. When the determined EPI is greater than the reference time, the data is programmed to the first block based on a second operation condition selected from among the plurality of operation conditions. |
| US11315645B2 |
3-dimensional arrays of NOR-type memory strings
Multi-gate NOR flash thin-film transistor (TFT) string arrays are organized as 3-dimensional stacks of active strips. Each active strip includes a shared source sublayer and a shared drain sublayer that is connected to substrate circuits. Data storage in the active strip is provided by charge-storage elements between the active strip and a multiplicity of control gates provided by adjacent local word-lines. The parasitic capacitance of each active strip is used to eliminate hard-wire ground connection to the shared source making it a semi-floating, or virtual source. Pre-charge voltages temporarily supplied from the substrate through a single port per active strip provide the appropriate voltages on the source and drain required during read, program, program-inhibit and erase operations. TFTs on multiple active strips can be pre-charged separately and then read, programmed or erased together in a massively parallel operation. |
| US11315643B2 |
Method of controlling a semiconductor memory
According to one embodiment, a controller is configured to write four-bit data in each of memory cells, and read first data item from the memory cells through application of a first voltage to a word line. The controller is configured to read second data items by repeating a first operation of reading data including data of respective first bits of the memory cells through application of two voltages to the word line at different timings while changing the two voltages in each first operation from the two voltages in another first operation. The controller is configured to mask part of each of the second data items using the first data. |
| US11315642B2 |
Systems and methods providing improved calibration of memory control voltage
Disclosed are systems and methods of dynamically calibrating a memory control voltage more accurately. According to disclosed implementations, a memory control voltage such as Vpass or Vwlrv may be calibrated during memory operation as a function of the change in slope of total string current, even during increase in the wordline voltage. In one exemplary method, the wordlines are increased in sequence from a start voltage to an end voltage in steps, slope change is measured at every step, the measured slope change is compared against a threshold, and an adjusted memory control voltage is determined as a function of a wordline voltage at which the change in slope reaches the threshold. As such, memory control voltage may be determined and dynamically calibrated with less sensitivity to operating parameters such as temperature, pattern, and/or time of programming. |
| US11315640B2 |
Semiconductor device and continuous reading method
A continuous reading method of a flash memory is provided, including: after outputting data held in a cache memory (C0) of a latch (L1) of a page buffer/sensing circuit, data of the cache memory (C0) of a next page is read from a memory cell array, and the read data of the cache memory (C0) is held in the latch (L1). After outputting data held in the cache memory (C1) of the latch (L1), data of the same next page of the cache memory (C1) is read from the memory cell array, and the read data of the cache memory (C1) is held in the latch (L1). |
| US11315633B2 |
Three-state programming of memory cells
The present disclosure includes apparatuses, methods, and systems for three-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of three possible data states by applying a voltage pulse to the memory cell, determining whether the memory cell snaps back in response to the applied voltage pulse, and applying an additional voltage pulse to the memory cell based on the determination of whether the memory cell snaps back. |
| US11315631B2 |
3D memory device
A three-dimensional (3D) memory device includes a memory cell array, a first sense amplifier and a second sense amplifier. The memory cell array includes lower memory cells respectively arranged in regions where lower word lines intersect with bit lines and upper memory cells respectively arranged in regions where upper word lines intersect with the bit lines. The first sense amplifier is connected to a first lower word line and performs a data sensing operation on a first lower memory cell connected between a first bit line and the first lower word line. The second sense amplifier is connected to a first upper word line and performs a data sensing operation on a first upper memory cell connected between the first bit line and the first upper word line. The data sensing operations of the first and second sense amplifiers are performed in parallel. |
| US11315628B1 |
Techniques for powering memory
Various implementations described herein are directed to a device having memory with a first array and a second array. The device may have power rails formed in frontside metal layers that supply core voltage to the memory. The power rails may include a first path routed through a first frontside metal layer to the first array of the memory, and the power rails may include a second path routed through the first frontside metal layer and a second frontside metal layer to the second array of the memory. |
| US11315624B2 |
Semiconductor memory device
A memory cell of a 2-port static random access memory (SRAM) includes first and second p-type transistors and first to sixth n-type transistors. Gate interconnects extend in the X direction and are arranged in three rows in the Y direction. The gate interconnects in the first row form gates of the first n-type transistor, the first p-type transistor, and the fourth n-type transistor, the gate interconnect in the second row forms gates of the fifth and sixth n-type transistors, and the gate interconnects in the third row form gates of the third n-type transistor, the second n-type transistor, and the second p-type transistor. |
| US11315622B2 |
DDR5 four-phase generator with improved metastability resistance
A multi-phase clock generator has a set of transistors, a first latch, and a second latch. The set of transistors may be arranged in a sense amplifier latch architecture, in which the set of transistors include a first inverter and a second inverter. The first inverter may provide a first phase data strobe signal and the second inverter may provide a second phase data strobe signal. The first latch and the second latch are coupled to the set of transistors. The set of transistors may receive a first portion of current at the first inverter and a second portion of current at the second inverter. The set of transistors may amplify the first portion of current in response to the first portion being greater than the second portion. The set of transistors may also drive the first phase data strobe signal using the amplified first portion. |
| US11315620B2 |
Semiconductor device performing row hammer refresh operation
Disclosed herein is an apparatus that includes a memory cell array including a plurality of word lines each coupled to a plurality of memory cells, and a control circuit configured to activate first and second internal signals in a time-division manner in response to a first external command. A first number of the word lines are selected in response to the first internal signal, and a second number of the word line is selected in response to the second internal signal, the second number is smaller than the first number. |
| US11315613B2 |
Mixed mode multiply and accumulate array
Systems and methods for operating a digital-to-analog converter (DAC) are described. In an example, a device can receive a digital input. The device can generate a clock signal having frequency in radio frequency (RF) range. The device can combine the digital input with the clock signal to generate a first voltage signal. The device can convert the first voltage signal into a second voltage signal having at least two phases. The device can convert the second voltage signal into a current signal. The device can distribute the current signal to at least one current mode DAC. |
| US11315612B2 |
Semiconductor storing apparatus and pre-charge method
A semiconductor storing apparatus capable of suppressing a peak current in a pre-charge operation and shortening a sense time is provided. A pre-charge method of a bit line of an NAND type flash memory includes: turning on a transistor (BLPRE) and supplying a pre-charge voltage to a sense node (SNS) at time (t1); turning on a transistor (BLCLAMP) connected to the sense node (SNS) and used for generating a clamp voltage and turning on a transistor (BLCN) connected to a node (BLS) at time (t2), turning on a transistor (BLSe/BLSo) connected between the node (BLS) and a bit line (GBLe/GBLo) at time (t3), and performing the pre-charge operation on the bit line. |
| US11315611B2 |
Processing-in-memory (PIM) system and operating methods of the PIM system
A memory system includes a stacked memory device and a controller. The stacked memory device includes a base die and a plurality of memory dies stacked on the base die. Each of the plurality of memory dies has a plurality of channels, and the base die is configured to function as an interface for transmitting signals and data of the pluralities of channels. The controller controls the stacked memory device such that first and second data move control operations are sequentially performed to transmit moving data from a target channel of the pluralities of channels to a destination channel of the pluralities of channels. The first data move control operation is performed to store the moving data in the target channel into the base die, and the second data move control operation is performed to write the moving data stored in the base die into the destination channel. |
| US11315610B1 |
Sense amplifier, memory and method for controlling sense amplifier
The present disclosure provides a sense amplifier, a memory, and a method for controlling a sense amplifier, relating to the technical field of semiconductor memories. The sense amplifier comprises: an amplification module, configured to read data in a storage unit on a bit line or a storage unit on a reference bit line; and a first switch module, configured to control the amplification module to be disconnected from the reference bit line when the sense amplifier reads a first state for the bit line and the sense amplifier is in an amplification stage, and control the amplification module to be connected to the reference bit line when the sense amplifier reads a second state for the bit line and the sense amplifier is in the amplification stage. The present disclosure can reduce the power consumption of the sense amplifier. |
| US11315609B2 |
Memory with high-speed and area-efficient read path
A read path for a memory is provided that includes an integrated sense mixing and redundancy shift stage coupled between a sense amplifier and a data latch. The data latch is integrated with a level shifter. |
| US11315606B1 |
Timecode generation and assignment
A timecoding technique for determining and assigning timecodes for variable frame rate video. Content identified for timecode assignment is decoded, and for sequential frames of the content, portions of timestamps are compared to determine if the frames are from a same time period (e.g., from the same second in time). For a subsequent frame from the same time period, an index is atomically incremented, a timecode generated from a combination of the time period and the index, and the timecode assigned to the frame. For a subsequent frame from a different time period, the index is initialized, a timecode generated from a combination of the different time period and the initialized index, and the timecode assigned to the frame. Accumulated durations of frames may be used in place of timestamps, in some instances. |
| US11315605B2 |
Method, device, and computer program product for storing and providing video
Embodiments of the present disclosure relate to a method, a device, and a computer program product for storing and providing a video. A method for storing a video is provided, including: acquiring frame storage information in a to-be-stored video, the frame storage information including information related to storage of a plurality of frames in the video; converting the video into a plurality of data blocks based on the frame storage information; and converting the frame storage information into a streaming media index file to characterize the video in association with the plurality of data blocks. Embodiments of the present disclosure further provide a method for providing a video. |
| US11315599B2 |
Information processing device and information processing method
An information processing device including a mode control unit that determines a replay mode from replay mode candidates including a user dependent mode where output and replay are performed dependently on a user's action and a user independent mode where output and replay are performed independently of the user's action, and a output control unit that controls output and replay of an image, based on the replay mode. |
| US11315598B2 |
Floating head shell for a self propelled, tangentially tracking tone arm
A pivoting, passive servo controlled, self propelled and tangentially tracking tone arm, featuring a floating head shell/transducer assembly that tracks the groove in a disk-record independently of the tone arm itself and utilizing the so-called inward force to propel the tone arm across the disk record. |
| US11315593B2 |
Tape drive with head-gimbal assembly and contact plate
The present disclosure generally relates to a tape embedded drive having a head-gimbal assembly (HGA) and a contact plate. By using a support structure or contact plate beneath the tape, read and write heads can be designed to be narrower than the tape. The support structure or contact plate can stretch or relax the tape so that the spacing between servo tracks on the tape corresponds to the servo to servo spacing on the head. HGAs, which are narrower than the tape, can fly over the tape and read data from and write data to the tape. The HGA can have a single head or multiple heads. Additionally, multiple independent head assemblies can also be used for reading from and writing to the same tape. |
| US11315591B2 |
Voice activity detection method
The present invention relates to the field of voice activity detection technologies, and more particularly, to a voice activity detection method. The method comprises: providing an acquisition unit for acquiring an external sound signal; providing a judgment unit for judging whether the sound signal is a voice signal; if the sound signal is a voice signal, starting a voice processing unit for processing the sound signal; if the sound signal is not a voice signal, the voice processing unit is kept in a sleep state. With the voice activity detection method, the voice processing unit with large power consumption is made to be in a sleep state for a long time, and therefore, the entire system can be kept in a low-power consumption state; the voice activity detection method is low in implementation cost and can obtain better performance with a small amount of calculation and less resource consumption. |
| US11315590B2 |
Voice and graphical user interface
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for voice and graphical user interfaces. One of the methods includes receiving an audio input, analyzing the audio input to determine a requested task, determining response data in response to the requested task, determining at least a first part of the response data to be presented as an audio output and at least a second part of the response data to be presented as a visual output, forwarding the first part of the response data to an audio output for presentation to a user, forwarding the second part of the response data to a visual output for presentation to a user; and forwarding to at least one of the audio output and the visual output data describing sources and/or assumptions used to construct the response data. |
| US11315583B2 |
Audio encoders, audio decoders, methods and computer programs adapting an encoding and decoding of least significant bits
An audio decoder for providing a decoded audio information on the basis of an encoded audio information is configured to obtain decoded spectral values on the basis of an encoded information representing the spectral values. The audio decoder is configured to jointly decode two or more most significant bits per spectral value on the basis of respective symbol codes for a set of spectral values using an arithmetic decoding, wherein a respective symbol code represents two or more most significant bits per spectral value for one or more spectral values. The audio decoder is configured to decode one or more least significant bits associated with one or more of the spectral values in dependence on how much least significant bit information is available, such that one or more least significant bits associated with one or more of the spectral values are decoded. |
| US11315579B2 |
Metadata driven dynamic range control
A system for encoding and applying Dynamic Range Control/Compression (DRC) gain values to a piece of sound program content is described. In particular, a set of DRC gain values representing a DRC gain curve for the piece of content may be divided into frames corresponding to frames of the piece of content. A set of fields may be included with an audio signal representing the piece of content. The additional fields may represent the DRC gain values using linear or spline interpolation. The additional fields may include 1) an initial gain value for each DRC frame, 2) a set of slope values at particular points in the DRC curve, 3) a set of time delta values for each consecutive pair of slope values, and/or 4) one or more gain delta values representing changes of DRC gain values in the DRC gain curve between points of the slope values. |
| US11315574B2 |
Mobile device, system and method for task management based on voice intercom function
A mobile device, a system and a method for task management based on voice intercom function are provided. A mobile device receives a voice message associated with at least one task. Semantic information of the voice message is analyzed to determine at least one message receiver of the voice message and generate a task message. Another mobile device corresponding to one of the at least one message receiver receives the task message. Task management information associated with the at least one task is updated according to the semantic information of the voice message. |
| US11315569B1 |
Transcription and analysis of meeting recordings
Disclosed is a system for generating a transcript of a meeting using individual audio recordings of speakers in the meeting. The system obtains an audio recording file from each speaker in the meeting, generates a speaker-specific transcript for each speaker using the audio recording of the corresponding speaker, and merges the speaker-specific transcripts to generate a meeting transcript that includes text of a speech from all speakers in the meeting. As the system generates speaker specific transcripts using speaker-specific (high quality) audio recordings, the need for “diarization” is removed, the audio quality of recording of each speaker is maximized, leading to virtually lossless recordings, and resulting in an improved transcription quality and analysis. |
| US11315561B2 |
Audio device and computer readable program
[Problem] To provide an audio device having a voice operation receiving function with which the state of a voice recognition process can be notified in detail without affecting an audio playback environment, and which is inexpensive and has an excellent degree of freedom in design. [Solution] A wireless speaker 1 has a voice operation receiving function that receives an operation by a voice input into a microphone 11. The wireless speaker comprises: an LED 12; an LED control unit 18 that subjects the LED 12 to PWM control; and a lighting pattern storage unit 17 that stores a lighting pattern in which the brightness is changed on a time axis for each state of a voice recognition process. The LED control unit 18 subjects the LED 12 to PWM control in accordance with the lighting pattern stored in the lighting pattern storage unit 17 corresponding to the state of the voice recognition process performed on the voice input into the microphone 11. |
| US11315556B2 |
Devices, systems, and methods for distributed voice processing by transmitting sound data associated with a wake word to an appropriate device for identification
Systems and methods for distributed voice processing are disclosed herein. In one example, the method includes detecting sound via a microphone array of a first playback device and analyzing, via a first wake-word engine of the first playback device, the detected sound. The first playback device may transmit data associated with the detected sound to a second playback device over a local area network. A second wake-word engine of the second playback device may analyze the transmitted data associated with the detected sound. The method may further include identifying that the detected sound contains either a first wake word or a second wake word based on the analysis via the first and second wake-word engines, respectively. Based on the identification, sound data corresponding to the detected sound may be transmitted over a wide area network to a remote computing device associated with a particular voice assistant service. |
| US11315554B2 |
Methods, systems, and media for connecting an IoT device to a call
Methods, systems, and media for connecting an IoT device to a call are provided. In some embodiments, a method is provided, the method comprising: establishing, at a first end-point device, a telecommunication channel with a second end-point device; subsequent to establishing the telecommunication channel, and prior to a termination of the telecommunication channel, detecting, using the first end-point device, a voice command that includes a keyword; and in response to detecting the voice command, causing information associated with an IoT device that corresponds to the keyword to be transmitted to the second end-point device. |
| US11315552B1 |
Responding with unresponsive content
This disclosure describes systems and techniques receiving a request for information from a user and, in response, outputting the requested information along with unsolicited, interesting content that is related to, yet nonresponsive to, the requested information. In some instances, if the requested information is unknown, the techniques may output an indication that the information is unknown, followed by the additional, unsolicited, interesting content. |
| US11315551B2 |
System and method for intent discovery from multimedia conversation
This disclosure relates to systems and methods for discovering intents from multimedia conversations. In an implementation, the system may obtain an optimal parameter configuration based on a topic relevance quantifier. The system may extract topics from the audio calls based on the optimal parameter configuration. The system may determine respective context metrics for each of the topics. The system may select a relevant topic with respect to the intent discovery from the extracted topic based on the respective context metrics. The system may obtain documents associated with the relevant topic from the corpus of documents. The system may display information of the documents associated with the relevant topic via a user interface. The system may receive a feedback data with respect to the relevant topic. The system may determine intent information associated with the relevant topic based on the feedback data. |
| US11315550B2 |
Speaker recognition device, speaker recognition method, and recording medium
A speaker recognition device according to the present disclosure includes: an acoustic feature calculator that calculates, from utterance data indicating a voice of an obtained utterance, acoustic feature of the voice of the utterance; a statistic calculator that calculates an utterance data statistic from the calculated acoustic feature; a speaker feature extractor that extracts speaker feature of a speaker of the utterance data from the calculated utterance data statistic using a deep neural network (DNN); a similarity calculator that calculates a similarity between the extracted speaker feature and pre-stored speaker feature of at least one registered speaker; and a speaker recognizer that recognizes the speaker of the utterance data based on the calculated similarity. |
| US11315548B1 |
Method and system for performing domain adaptation of end-to-end automatic speech recognition model
A method for performing domain adaptation of an end-to-end (E2E) automatic speech recognition (ASR) model. The method includes: obtaining an un-adapted version of the E2E ASR model trained using a first set of transcriptions, the un-adapted version of E2E ASR model including an encoder network, a first prediction network and a joint network; using the first set of transcriptions, while keeping parameters of first prediction network fixed, to train a language model output component to match the first prediction network; using a second set of transcriptions, while keeping parameters of language model output component fixed, to fine-tune the first prediction network for obtaining a second prediction network; and generating an adapted version of the E2E ASR model, wherein the adapted version of the E2E ASR model comprises the encoder network, the second prediction network, the language model output component, and the joint network. |
| US11315539B2 |
Active vibration noise control system
An active vibration noise control system is applied to a vehicle provided with an EPS motor to change behavior of the vehicle. The active vibration noise control system includes an ANC processor configured to receive acoustic information at a predetermined position in a vehicle compartment as an error signal and control a vibration noise based on a reference signal correlate with the vibration noise and the error signal that is received and an inverse electromotive force information receiving section receiving information on an inverse electromotive force induced on the EPS motor by behavior change of the vehicle. The ANC processor utilizes as a reference signal the information on the inverse electromotive force received by the inverse electromotive force information receiving section. The active vibration noise control system actively controls the vibration noise generated in the vehicle. |
| US11315536B2 |
Sound regulation apparatus, method or program
[Technical problem] Circulatory sound regulation that changes environmental sound into input sound, converted sound with arbitrarily regulatory frequency component, arbitrarily regulatory amplitude or both of them, output sound, another input sound synthesized with this output sound and an environmental sound, and another converted sound made from this input sound. [Solution] Apparatus comprising: input means that receives environmental sound from arbitrary environment as an input sound; conversion means that converts the input sound into a converted sound that contains arbitrarily regulatory frequency component including frequency component that approximates to principle oscillator, arbitrarily regulatory amplitude or both; and output means that transmits the converted sound to environment as an output sound; whereby the input means receives synthetic sound synthesized with the output sound and environmental sound as an input sound again, and the conversion means converts this input sound further into another converted sound. |
| US11315535B2 |
Live stream processing method, apparatus, system, electronic apparatus and storage medium
The present disclosure provides a live stream processing method, apparatus and system, electronic device and a storage medium. The first electronic device acquires target song information provided by second electronic device, and the target song information at least includes a target song identifier. Afterwards, the first electronic device plays the accompaniment audio synchronously with the second electronic device according to a target song identifier when the notification information is received, that is, when the second electronic device plays the accompaniment audio of the target song, and the first electronic device acquires the singing audio sent by the second electronic device through a server. Finally, the first electronic device takes the played accompaniment audio and the singing audio as a live stream and sends the live stream to the server. |
| US11315532B2 |
Chord information extraction device, chord information extraction method and non-transitory computer readable medium storing chord information extraction program
A chord information extraction device includes a character group extractor, a determiner and a corrector. The character group extractor extracts a character group corresponding to chord information from score image data representing a music score. The determiner determines whether the character group extracted by the character group extractor follows a predetermined chord notation rule. In a case where the character group extracted by the character group extractor does not follow the chord notation rule, the corrector corrects the extracted character group to follow the chord notation rule. |
| US11315530B2 |
Tracking system and related positioning and calibration methods
A tracking system for positioning a user's location comprise a scan device including a light scanning module for generating a scan light source, where the light scanning module includes a point light source, a prism, a reflector and a synchronization processing module, the prism rotates with a rotation speed, the synchronization processing module is used to control the reflector to rotate with an angle according to the rotation speed, so that the light emitted to the prism is reflected to a specific direction to form the scan light source, a head mounted displayer, which includes a plurality of receivers for detecting the scan light source, for generating information about the scan light source, and an computing device for calculating the location of the user based on the information. |
| US11315529B2 |
Systems and methods for interactive control of window/level parameters of multi-image displays
A technology enables interactive control of simultaneously displayed multiple images with high dynamic ranges, which software automation processes are programmed to reduce the complexity in managing and viewing the post window/level adjustment of the multiple images. An image control engine provides several synchronous functional capabilities, which comprises an input module, a blending factor synchronization module, a window/level synchronization module, a display module, and an image storage. For window/level adjustment of the images in blended views, the blending factor synchronization module automatically links the activation of a window/level control of one image with a transparency blending factor that affects both images. For synchronization of window/level adjustments of two or more images, a window/level synchronization module is configured to automatically change window/level parameters of all remaining images when the user makes an adjustment to a window/level control of one image such that all images with updated window/level parameters are displayed simultaneously. |
| US11315527B2 |
Display device and electronic device
A display device whose aspect ratio can be changed is provided. The display device includes a plurality of display units and a plurality of driver circuit units. The plurality of display units each include a light-emitting portion and a connection region. The plurality of driver circuit units each include a driver circuit portion and a connection region. The connection regions of the adjacent units overlap with each other and one shaft passes through the connection regions. The adjacent units are electrically connected to each other with the one shaft. With such a structure, an angle between the adjacent units electrically connected to each other with one shaft can be changed, which enables the aspect ratio of the display device to be changed. |
| US11315525B1 |
Method and apparatus for compensating luminance of display device
A method for compensating luminance of a display device according to some embodiments of the present disclosure includes capturing an image of the display device, generating imaging data, primarily mapping display pixels of the display device and the imaging data so that a unit mapping area corresponding to the display pixels includes luminance values for image pixels of an imaging device, setting an offset value of the imaging data with respect to the display pixels so that a maximum luminance value among the luminance values is positioned at a center of the unit mapping area, secondarily mapping the imaging data according to the offset value with respect to the display pixels, calculating a representative luminance value, and setting a luminance correction value corresponding to the representative luminance value with respect to one of the display pixels. |
| US11315523B2 |
Emission controller, driving method, and display device
The present disclosure provides an emission controller, a driving method thereof, and a display device. The emission controller includes a first processing module, a second processing module, a third processing module, an output module and a shift control module. The first processing module generates a first signal in response to a first control signal, a second control signal and a second signal. The second processing module generates a second signal in response to the first control signal and the first signal. The third processing module generates third and fourth signals in response to the second control signal, the second and first signals. The output module provides emission control signal in response the first and fourth signal. The shift control module provides a shift control signal in response to the first and fourth signal, or provides a shift control signal in response to the first and third signal. |
| US11315522B2 |
Image display apparatus
Disclosed is an image display apparatus. The image display apparatus includes: a display; an illumination sensor configured to sense ambient illumination of the display; and a signal processing unit configured to output an image-quality-processed image signal to the display, wherein the signal processing unit is configured to, based on information on the illumination sensed by the illumination sensor, convert gray level of an input image according to a first gray level conversion mode or according to a second gray level conversion mode in which an amount of increase in gray level is greater than in the first gray level conversion mode. Accordingly, it is possible to improve gray level expression of a displayed image in response to ambient illumination of the display. |
| US11315521B2 |
Electronic device and method for brightness control of electronic device
An electronic device according to one embodiment disclosed in the present application comprises: a first surface; a second surface facing the first surface; a housing for encompassing a space between the first surface and the second surface; a display exposed through the first surface and including a plurality of pixels; applications outputted through the display; a memory for storing first data for identifying a designated part of the applications; a sensor for measuring second data related to a condition of the display; and a processor electrically connected to the display, the memory and the sensor. In addition, various embodiments identified through the specification are possible. |
| US11315520B2 |
Driving circuit
A driving circuit for driving a display panel is provided. The driving circuit includes a source driver. The source driver is configured to be controlled by a timing controller. The source driver is configured to adjust at least one of an operation frequency and a receiving bandwidth of a source driving circuit of the source driver when at least one of the timing controller and the source driver detects that an interference event occurs. |
| US11315519B2 |
Control method for improving network performance
The invention provides a control method for improving network performance, comprising: each upstream device issues corresponding playing commands and performs filtering to the playing commands to obtain first available playing commands; a downstream device switches to a route where the first available playing commands is located, and then issues vendor command parameters; an implementation module receives the vendor command parameters, then enables a timer, and sets identification information; during the preset timer time period, the implementation module filters the first available playing commands to obtain second available playing commands; when the preset timer time period ends, the implementation module turns off the timer and resets the identification information; and the downstream device receives the second available playing commands and switches to a route where the second available playing commands is located. The present invention has the following advantageous effects: the network congestion and the transmission delay are reduced. |
| US11315517B2 |
Data driver and display apparatus that reduces deterioration of image quality due to decrease in pixel charging rate during supply of gradation voltage signal
A modulated data signal is generated so as to change such that a length of a data period indicative of a timing of writing of the gradation voltage signal to each of the pixel portions becomes a length according to a distance from the data driver to each of the pixel portions. The timing control unit writes a video data signal to a memory at a timing according to a data period of the video data signal. The timing control unit reads the video data signal from the memory at a timing according to a period as a result of correction of a data period of the modulated data signal on the basis of a difference between an average value of lengths of the data periods of the video data signals and an average value of lengths of the data periods of the modulated data signals. |
| US11315515B2 |
GOA circuit, display panel, and electronic device
A GOA circuit is provided according to implementations of the disclosure. The GOA circuit includes multiple cascaded GOA units. Each GOA unit includes a first pull-down control module, a second pull-down control module, and a pull-down holding module. A type of at least one thin film transistor (TFT) in at least one of the first pull-down control module or the second pull-down control module is different from that of a TFT in the pull-down holding module. A display panel and an electronic device are further provided according to implementations of the disclosure. |
| US11315508B2 |
Liquid crystal display panel
The present invention provides a liquid crystal display panel including a color film substrate and an array substrate, and a plurality of input terminals, a scan line, and a data line. Wherein each of the input terminals is respectively connected to at least two data lines, a signal screening unit in series between at least part of the data lines and the corresponding input terminal. The input terminal is connected to an alternating current signal, and the signal screening unit is used for screening the alternating current signal to select a positive voltage signal or a negative voltage signal to the data lines. |
| US11315507B2 |
Display panel having column inversion polarity and compensation voltage driving method
A display panel control method, a display panel control device, and a display panel. The control method comprises: obtaining a first polarity of a drive voltage of a first pixel column, a second polarity of a drive voltage of a green pixel column, and a third polarity of a drive voltage of a third pixel column (S10); when the second polarity is opposite to the first polarity and the third polarity, determining a voltage compensation value of each of green sub-pixels according to a preset common voltage value and the current common voltage value (S30); and reducing the corresponding first voltage according to each of the voltage compensation values (S40). |
| US11315501B2 |
Light control method of cell phone and cell phone using the ambient light sensor and the proximity sensor
There is provided a portable electronic device including a backlight module, an ambient light sensor, a proximity sensor and a processing unit. The backlight module illuminates with backlight brightness. The ambient light sensor is configured to detect ambient light intensity. The proximity sensor is configured to detect an object. The processing unit is configured to activate the proximity sensor when the ambient light intensity detected by the ambient light sensor is lower than a predetermined value or decreases more than a predetermined range, and to maintain or reduce the backlight brightness according to a detection result of the proximity sensor. There is further provided an automatic detection method. |
| US11315495B2 |
Gate driving circuit and display device having the same
A gate driving circuit including a controller for providing a first carry signal to a control node, a first pull-up portion for outputting a first clock signal as a first gate signal in accordance with a signal provided to the control node, and a second pull-up portion for outputting a second clock signal with a phase that is different from the first clock signal as a second gate signal in accordance with the signal provided to the control node. |
| US11315494B2 |
Pixel circuit and display device using the same
The present disclosure relates to a pixel circuit and a display device using the same. The pixel circuit includes a first switch element configured to connect a first node to a third node in a sampling step, a second switch element configured to supply a data voltage to a second node in the sampling step, a third switch element configured to supply a pixel driving voltage to the second node in a emission step after the sampling step, a fourth switch element configured to connect the third node to an anode of a light-emitting element in the emission step, a first capacitor connected to the first node, a second capacitor connected between the third node and the anode of the light-emitting element, and a third capacitor connected between the anode and the cathode of the light-emitting element. |
| US11315492B2 |
Display device and method for driving the same
The present disclosure relates to display devices and methods of driving the display devices. In accordance with embodiments of the present disclosure, it is possible to improve image quality of a display device by reducing a sensing time for sensing one or more characteristic values of at least one driving transistor disposed in at least one sub-pixel. Further, it is possible to perform optimal sensing and compensation for at least one driving transistor by setting a minimum sensing time for one or more characteristic values of the at least one driving transistor and changing the sensing time according to a sensing available time of the display device. |
| US11315491B2 |
Pixel circuit, display panel and driving method
A pixel circuit, a display panel, and a driving method. The pixel circuit includes a data writing circuit, an ultrasonic acquiring and converting circuit, a storage circuit, a driving circuit, an output control circuit, and a light emitting device. The ultrasonic acquiring and converting circuit converts a received ultrasonic signal into a converted electrical signal, and provides the converted electrical signal to the data writing circuit; the data writing circuit provides the converted electrical signal or a data signal to a first node; the driving circuit provides a recognition signal obtained according to the converted electrical signal or a driving signal to the fourth node; the storage circuit maintains a voltage difference between the first node and the second node stable; the output control circuit provides a level of the fourth node to a third node; the third node outputs the recognition signal. |
| US11315486B1 |
Image processing circuit and image processing method with overdriving illumination element
An image processing circuit is configured to generate a first offset value according to second offset values in at least one look-up table corresponding to a starting voltage range of at least one illumination element in a display device. The image processing circuit is further configured to generate output image data according to an ending gray level value and the first offset value. The output image data is for overdriving the at least one illumination element. The second offset values correspond to a starting gray level value of a first frame and the ending gray level value of a second frame. |
| US11315477B2 |
Vehicle-mounted display control method, vehicle-mounted control device and vehicle-mounted display assembly
A vehicle-mounted display control method includes: receiving, by a vehicle-mounted control device, a signal to be displayed transmitted by a signal source; converting, by the vehicle-mounted control device, the signal to be displayed into a relay data signal, and transmitting, by the vehicle-mounted control device, the relay data signal to a signal conversion circuit of a corresponding vehicle-mounted display assembly; and converting, by the signal conversion circuit, the relay data signal into a display drive signal, and outputting, by the signal conversion circuit, the display drive signal to at least one display screen of the vehicle-mounted display assembly, so as to drive the at least one display screen to display. |
| US11315472B2 |
Shift register unit, gate driving circuit and driving method thereof, display device
A shift register unit, a gate driving circuit and a driving method thereof, a display device. The shift register unit includes: a first input circuit configured for outputting a voltage of a first voltage terminal to a pull-up node under a control of a first signal terminal; a second input circuit configured for outputting a voltage of a second voltage terminal to the pull-up node under a control of a second signal terminal; an output circuit configured for outputting a clock signal of a clock signal terminal to the signal output terminal under a control of the pull-up node; a pull-up node reset circuit configured for outputting a voltage of the third voltage terminal to the pull-up node under a control of the third signal terminal. |
| US11315467B1 |
System and method for a multi-primary wide gamut color system
Systems and methods for a multi-primary color system for display. A multi-primary color system increases the number of primary colors available in a color system and color system equipment. Increasing the number of primary colors reduces metameric errors from viewer to viewer. One embodiment of the multi-primary color system includes Red, Green, Blue, Cyan, Yellow, and Magenta primaries. The systems of the present invention maintain compatibility with existing color systems and equipment and provide systems for backwards compatibility with older color systems. |
| US11315465B2 |
Screen display method and electronic device supporting same
Disclosed is an electronic device that includes a display that outputs display data, an antenna arranged on a display area of the display, at least one processor electrically connected to the display, and a memory electrically connected to the processor, where the memory stores instructions that, when executed, cause the processor to correct the display data based on characteristic information of the antenna when a display location of the display data overlaps an arranged location of the antenna when the instructions are executed. In addition, various embodiments that are understood through the present disclosure are possible. |
| US11315462B2 |
Dual source drivers, display devices having the same, and methods of operating the same
TA dual source driver includes first and second gamma voltage generators configured to generate first and second gamma voltages, respectively, first and second latches configured to latch first and second data, respectively, a first driving cell configured to receive the first gamma voltage and the first data, and to transmit a first voltage corresponding to the first data and the first gamma voltage to a panel load based on a first switching operation, and a second driving cell configured to receive the second gamma voltage and the second data, and to transmit a second voltage corresponding to the second data and the second gamma voltage to the panel load based on a second switching operation. The first switching operation and the second switching operation may operate complementarily to each other. |
| US11315455B1 |
Display panel, method for detecting stress-detection-miss thereof, and display device
The present disclosure provides a display panel, including: a display driving circuit; power signal lines connected to the display driving circuit; an external stress detection terminal; and a stress-detection-miss detection circuit, that first access ports of the external stress detection terminal are one-to-one connected to the power signal lines; a second access port of the external stress detection terminal is connected to the stress-detection-miss detection circuit; any one of the power signal lines transmits a power supply voltage during normal display of the display panel, and transmits a first high-voltage detection voltage from the first access ports during a stress image detection of the display panel; and the stress-detection-miss detection circuit includes: a prompt information path formed responding to a second high-voltage detection voltage from the second access port during the stress image detection, to generate prompt information responding to a low-voltage detection voltage from the second access port during a stress-detection-miss detection of the display panel. |
| US11315454B2 |
Display device
A display device includes a substrate includes a display area having a plurality of pixels, a pad area including a plurality of input pads, and a circuit area positioned between the pad area and the display area; a crack sensor having a first end and a second end, the first end being connected to a first input pad of the plurality of input pads; a first shorting element extending through the pad area, the first shorting element being connected to the second end and extending to an edge of the substrate; a plurality of data lines connected to the plurality of pixels; and a crack sensing circuit including a first switching element having an input terminal connected to the first end and an output terminal connected to a first data line of the plurality of data lines, and a second switching element having an input terminal connected to the second end and an output terminal connected to a second data line of the plurality of data lines. |
| US11315453B1 |
Tiled display device with a test circuit
An electronic device includes a substrate having a top surface, a bottom surface and a side surface between the top surface and the bottom surface, and a test circuit disposed on the substrate. The test circuit extends from the top surface to the bottom surface through the side surface of the substrate and has a current terminal for an ammeter and a voltage terminal for a voltmeter, both of which are disposed on the bottom surface. |
| US11315452B2 |
Display apparatus and method of operating the same
A display apparatus includes a display panel, a timing controller and a power management integrated circuit (PMIC). The timing controller is to control an operation of the display panel and to store a plurality of fault patterns to be displayed on the display panel to represent that a plurality of defective phenomena have occurred. The PMIC is to supply a first power supply voltage to the timing controller and to monitor whether the plurality of defective phenomena have occurred. When a first defective phenomenon among the plurality of defective phenomena is sensed, the PMIC is to store first fault data and to shut down the display panel. When the first defective phenomenon is sensed, the timing controller is to control the display panel to display a first fault pattern corresponding to the first defective phenomenon among the plurality of fault patterns before the display panel is shut down. |
| US11315451B1 |
Display device and electronic device
A display device and an electronic device are provided. The display device is provided with a control unit between a driving chip and an electrostatic test point. During an electrostatic test, the control unit is disconnected from the driving chip to form a protection circuit for the driving chip under control of a first control signal and a second control signal, which can effectively prevent the driving chip from damage by static electricity. |
| US11315450B2 |
Inverter, gate driving on array circuit and related display panel
An inverter, a gate driver on array circuit, and a display panel are provided. The inverter includes a first transistor, a second transistor, a third transistor, a fourth transistor, a first test transistor, a second test transistor, and a third test transistor. A gate and a source of the first transistor and a source of the third transistor are electrically connected to a first test signal line, a drain of the first transistor, a drain of the second transistor is electrically connected to a first node, a gate of the second transistor and a gate of the fourth transistor are electrically connected to the pull-up node, and a drain of the third transistor and a drain of the fourth transistor are electrically connected to a second node. |
| US11315446B2 |
Display panel, display device and method for manufacturing the display panel
The present disclosure provides a display panel, a display device and a method for manufacturing a display panel. The display panel includes a flexible display and a support film. The flexible display includes a display area, a folding area and an extension area. Two ends of the folding area are respectively connected to the display area and the extension area. The display area and the extension area are non-coplanar. The support film is attached to an opposite surface of a display surface of the flexible display. The support film includes a first cured area and a second cured area. The first cured area and the second cured area respectively correspond to the display area and the extension area. |
| US11315442B2 |
Universal label
A sandwich-type, steam-sterilizable universal label for sterile products packaging can be used both on soft packaging and hard packaging. The universal label has different adhesives with different adhesive properties which are covered in such a way that they can be exposed selectively individually and separately from each other for their respective adhesive actions. |
| US11315440B2 |
Respiratory gating phantom device
A respiratory gating phantom device includes a first airbag, a second airbag, a first catheter, a second catheter, a fixture, and an air pressure gating device. The first catheter and the second catheter are respectively installed in the first airbag and the second airbag. The fixture is provided with a phantom tumor and adjustably installed in the first catheter or the second catheter, thereby installing the phantom tumor in the first catheter or the second catheter. The air pressure gating device, connected to the first airbag and the second airbag, inflates and deflates the first airbag and the second airbag to simulate breathing. The first catheter and the second catheter respectively move along three-dimensional direction and two-dimensional direction in response to motions of the first airbag and the second airbag. |
| US11315436B2 |
Method and system for automatically providing graphical user interfaces for computational algorithms described in printed publications
A system and method for providing graphical user interfaces based on computational algorithms described in printed publications. The method includes indexing a first output generated by a container; caching the indexed output in a cache memory; analyzing the printed publication to determine algorithm-indicating information of the computational algorithm; identifying, in the algorithm-indicating information, at least one input and at least one second output; generating at least one GUI element, wherein generating the at least one GUI element includes identifying an association between the printed publication and the container, wherein generating the at least one GUI element further comprises retrieving the first output from the cache memory, wherein the at least one GUI element is generated based on the retrieved first output; and generating executable code, wherein the executable code includes instructions for causing a display of the GUI including the at least one GUI element. |
| US11315435B2 |
Verbal expression system
Systems and methods for verbal expression are provided. In one aspect, a verbal expression system may receive a selection of sound identifiers, generate a list of video files associated with the identifiers, receive a selection of one or more video files, concatenate the video files into an assignment file, and map the assignment file to one or more users. Optionally, the verbal expression system determine user statistics for each user, generates a progress report for each user, and/or transmits the progress report to one or more users. |
| US11315425B2 |
History information storage apparatus, route calculation method, and influence range distribution system
A history information storage apparatus includes: a storage unit that stores history information about a travel history of a vehicle and map data divided into a plurality of sections; a change detection unit that detects a change of the map data; an influence range determination unit that determines a section influenced by the change as an influenced section from among the plurality of sections; a history information control unit that temporarily invalidates the history information about the influenced section; and a navigation unit that calculates a route from a departure place to a destination in consideration of the history information and records, in the history information, a history of a travel of the vehicle which has strayed from the route. |
| US11315419B2 |
Providing user assistance in a vehicle based on traffic behavior models
Providing user assistance in a vehicle includes identifying a traffic behavior of an object in an environment surrounding the vehicle based on an evaluation of information about the environment surrounding the vehicle while the vehicle is in the midst of manual operation, and issuing an alert to a user prompting the user to implement defensive manual operation. The user assistance further includes receiving a traffic behavior model that describes a predominating traffic behavior of a like population of reference objects, and issuing the alert to a user prompting the user to implement defensive manual operation in response to identifying that the traffic behavior of the object does not match the predominating traffic behavior of the like population of reference objects. Under the defensive manual operation, the traffic behavior of the object is addressed. |
| US11315417B2 |
Method, device and system for wrong-way driver detection
A method for wrong-way driver detection, including a step of reading in position data via an interface, the position data representing a measured position of a vehicle, a step of reading in inaccuracy data representing an inaccuracy of the position data, a step of reading in map data mapping road segments negotiable by the vehicle, and a step of ascertaining at least one plausible road segment based on the position data, the inaccuracy data and the map data, using a particle filter, the plausible road segment representing a road segment to which an instantaneous position of the vehicle may be assigned. |
| US11315416B2 |
Parking sensor magnetometer calibration
Various arrangements for determining that a vehicle is present in a parking space are presented. A parking sensor can make a plurality of magnetic field strength measurements using a magnetometer. A determination that the vehicle is parked proximate to the parking sensor device within the parking space can be based on a magnetic field strength measurement in relation to the selected magnetic field strength window. |
| US11315414B2 |
Information processing device, vehicle position control system, and vehicle position control method
An information processing device includes a control unit configured to perform: acquiring a degree of congestion of persons that are located in a predetermined range including a plurality of vehicles which is parked at predetermined positions and is able to travel autonomously; determining a positional relationship between the plurality of vehicles based on the degree of congestion; and transmitting a movement command to a first vehicle which is a vehicle which is requested to move out of the plurality of vehicles such that the determined positional relationship is satisfied. |
| US11315413B2 |
Traffic accident analysis system using error monitoring
An error monitoring apparatus and method are provided. The error monitoring method includes determining whether or not a predetermined event has occurred to a first mobility; sensing to collect an event-related potential (ERP) for at least one passenger of the first mobility for a predetermined amount of time, analyzing the collected ERP based on the determination, and transmitting error information of the first mobility to a traffic control server based on an analysis result. Herein, the predetermined event includes a traffic accident related at least to the first mobility, and the error information of the first mobility includes at least one of time information regarding when the ERP occurs, a waveform of the ERP, location information of the first mobility, or operational information of the first mobility. |
| US11315407B2 |
Methods, systems, and products for security services
Methods, systems, and products notify of alarms associated with security systems. An alarm is detected by an alarm controller, and an alarm message is sent to notify of the alarm. The alarm message identifies a unique network address assigned to the alarm controller. The alarm controller then receives a Voice-over Internet Protocol call to the unique network address to verify the alarm. |
| US11315404B1 |
Wearable proximity alert system
A wearable proximity alert system includes a first wearable band configured to be secured about an appendage of a child which is programmed to alert the wearer of a second wearable band when the bands are separated from each other by a predetermined distance. |
| US11315403B2 |
Nanosatellite-based property monitoring
Methods, systems, and apparatus for nanosatellite-based property monitoring are disclosed. A method includes receiving satellite data related to conditions of a property monitored by a monitoring system; determining, based on the satellite data, that the property is at risk from a threat; requesting, from a sensor of the monitoring system, sensor data related to the threat; receiving, from the sensor, the sensor data related to the threat; and based on analyzing the sensor data related to the threat, performing one or more monitoring system actions. The threat may include one of a weather hazard, a security hazard, or a property damage hazard. The monitoring system actions can include sending an instruction to adjust a sensor or component of the monitoring system and can include sending, to a user device, a notification that the property is at risk from the threat. |
| US11315401B2 |
Powered security apparatus
A security apparatus comprises a body comprising a first guide and a second guide extending along a guide axis and positioned at opposing side of the body, a first holder moveably coupled to the first guide, and a second holder moveably coupled to the second guide. The security apparatus further comprises an actuator, and at least one driver operatively coupled to the actuator and positioned along the guide axis. The driver is connected to the first holder and the second holder. A controller is in communication with the actuator and comprises a controller input, wherein in response to an authorized input, the actuator is configured to drive the driver to move the first holder along the first guide and to move the second holder along the second guide. |
| US11315400B1 |
Appearance based access verification
A computer implemented method, including receiving, by a monitoring system that is configured to monitor a property and from a first camera that is trained on a vicinity of an entry point of the property, first image data, determining that a visitor is located at the vicinity of the entry point of the property, generating, by the monitoring system, an appearance model of the visitor, receiving, by the monitoring system and from a second camera that is trained on an area of the property other than the vicinity of the entry point of the property, second image data, comparing, by the monitoring system, the second image data to the appearance model of the visitor, determining a confidence score that reflects a likelihood that the visitor is located at the area of the property other than the vicinity of the entry point, and performing a monitoring system action. |
| US11315399B2 |
Security camera with adaptable hood
A security device comprising a body having a first end and a second end, the first end being threadable into a light socket and the second end having a rotatable mount disposed thereon. The body may also include a light source disposed on the body of the security device and a slide connected to the rotatable mount, wherein the slide is configured to extend away from the mount. A camera with a lens may be disposed on a distal portion of the slide. The security device may further include a hood surrounding the lens of the camera and extending beyond the lens of the camera. |
| US11315398B2 |
Gateway-based anti-theft security system and method
Improved systems and techniques are disclosed for controlling the security states of anti-theft security systems such as product display assemblies using security fobs. The tasks relating to fob authentication are offloaded to a computer system, and these authentications can be based on identifiers for the different security fobs. The interactions between security fobs and product display assemblies can be consistent regardless of the population of authorized security fobs by using a security code that is shared by the security fobs. When attempting to use a security fob to change a security status for a product display assembly, the provision of the code to the subject product display assembly can be predicated on authorization of the subject security fob by the computer system. The computer system can maintain a list of identifiers for authorized security fobs that is easily updated when new security fobs are added to or existing security fobs are de-authorized from the system. |
| US11315396B2 |
Threat identification device and system with optional active countermeasures
Threat identification devices, systems, and methods are disclosed which identify and locate various threats and provide a variety of countermeasures to reduce the loss of life in an attack. In one implementation, a device is provided with a housing and a plurality of tubes coupled to and extending from the housing. Sensors are located within the tubes for sensing external conditions. A control unit is in electronic communication with the sensors. Upon detection of an external condition, the sensors transmit a signal to the control unit, which activates countermeasures, including rotating light sources to identify the location of the external condition as well as preferred escape routes. The control unit may also transmit signals to other devices in the environment, including video panels and speakers, to provide instructions. |
| US11315394B1 |
Integrated doorbell devices
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for implementing an integrated doorbell device are disclosed. In one aspect, a method includes the actions of receiving doorbell data indicating activation of a doorbell of a property. The actions further include receiving device data from one or more devices associated with a monitoring system within the property. The actions further include determining a security status associated with the monitoring system. The actions further include based on the doorbell data indicating activation of the doorbell of the property, the device data from the one or more devices associated with the monitoring system, and the security status associated with the monitoring system, determining a response action for execution by the monitoring system. The actions further include performing, by the monitoring system, the response action. |
| US11315392B2 |
Methods and devices for automatic transaction machines for recognizing surroundings
A method for enhancing automated transaction machine (ATM) security surveillance. The method consists of receiving a set of data from a financial device and generating a template for the financial device. The method generates an analysis by analyzing a portion of the received set of data. The method then determines a likelihood factor that the analyzed first portion is associated with a security threat, wherein if the likelihood factor is above a threshold then the method generates a second analysis by analyzing a second portion of the received first set of data and revises the likelihood factor based on the second analysis. The method generates a notice if the first likelihood factor exceeds a second threshold and then updates the template with the analysis and the likelihood factor and receives a second set of data from the monitoring device. The method updates the template with the second set of data. |
| US11315391B2 |
Automatic teller machine having a note storage unit with a door capable of being locked and unlocked
An automatic teller machine includes a door having a locking part for opening and closing a medium storage space in which a medium is stored; a first slide member located at a locked position or an opened position by means of a locking or opening operation of the locking part; a second slide member for locking the door by means of engagement with the first slide member when the first slide member is in the locked position; a drive unit for moving the second slide member between a first position in which the door is locked and a second position in which the door is unlocked when the first slide member is in the locked position; and a control unit for controlling driving of the drive unit. |
| US11315390B2 |
Transfer path unit structure for supply/collection cassette of ATM
The present disclosure relates to a transit transfer path unit structure connecting a supply/collection cassette and a banknote transfer path of an upper main body in an ATM which includes the upper main body and a lower main body and has a structure in which the supply/collection cassette is mounted on one side of the lower main body. The transit transfer path unit is disposed on one side of the upper main body of the ATM, and detachably provided between the supply/collection cassette and the banknote transfer path provided in the upper main body for separation from a banknote transfer route. Thus, the upper main body may be easily pulled to the front or rear of the ATM without any interference with the transit transfer path unit to perform the maintenance work, enhancing the convenience of the maintenance of the ATM. |
| US11315388B2 |
Identifying a specially designated object to facilitate dynamic promotions related to use of the object
In accordance with some embodiments, a physical game element such as a wagering chip or a playing card may be utilized to implement a promotion scheme on an electronic card table (e.g., using RFID or optical imaging technology). During a game it may be determined whether the element is associated with special functionality (e.g., entitles the player to a payout multiplier, special payout table, bonus prize or other benefit). The special functionality may have been previously associated with the element or associated with the element during the game (e.g., dynamically and/or randomly). In accordance with some embodiments a player is not able to readily discern the special functionality by a physical inspection of the physical game element and is only notified of the special functionality once the physical game element is used in a qualifying action (e.g., during a wager at an electronic card table). |
| US11315386B2 |
Fraud detection system in a casino
A fraud detection system which detects fraud in a game of performing collection and redemption of chips in accordance with a win or lose result includes a camera which captures an image of chips contained in a chip tray of a dealer, an image analyzing apparatus which analyses the image captured by the camera to detect an amount of the chips contained in the chip tray, a card distribution device which determines a win or lose result of a game, and a control device which compares the win or lose result of the game and the amount of the chips contained in the chip tray before and after collection and redemption of the chips to detect fraud. |
| US11315383B2 |
Gaming machine and method having trigger features for multiple game presentations
A gaming machine and method for providing multiple simultaneous virtual game presentations to a player. An electronic controller is programmed to operate the virtual game presentations in response to player wagers, and determine if virtual game presentations all include a winning pattern. If so, the controller activates a bonus game structure to display the conduct of a bonus game and a bonus game result. A trigger pattern may replicate to selected virtual game presentations. |
| US11315380B2 |
Direct-scan cash-management systems and methods
The invention provided herein generally relates to devices, systems, and methods for handling cash or quasi-cash items in such a way as to substantially eliminate employee theft, error, or difficulties in reconciling a record of transactions with a total amount of money in a cash drawer. The invention also provides devices, systems, and methods for cash-collateralized electronic banking. |
| US11315379B1 |
Systems and methods for cash-till optimization
The operation of one or more cash handling devices may be remotely modified by updating locally stored cash dispensing data at each of the one or more cash handling devices based at least in part on optimization data generated at a monitoring server. Operational data is received from the one or more cash handling devices and utilized to generate historical data within a historical database. Optimization parameters are received for each of one or more cash handling devices, and the optimization parameters are utilized together with the generated historical data to generate optimization data utilizing one or more optimization models. The optimization data is transmitted to applicable cash handling devices to cause the cash handling device to update locally stored executing instructions causing operation of the cash handling device to dispense cash into one or more register tills. |
| US11315378B2 |
Method of verifying an authenticity of a printed item and data processing terminal
A method of verifying an authenticity of a printed item includes: photographing the printed item to obtain a photographic image of the printed item, retrieving reference data of the printed item, the reference data including a reference image of the printed item, determining a test noise parameter from the photographic image of the printed item, determining a reference noise parameter from the reference image, comparing the test noise parameter of the photographic image of the printed item to the reference noise parameter of the reference image, and determining an authenticity of the printed item from a result of the comparing. The determining the authenticity of the printed item from the result of the comparing may include establishing from the reference noise parameter of the reference image and the test noise parameter of the printed item. |
| US11315376B2 |
Continuous authorization monitoring
A security system includes a first security badge having a visual portion that varies according to signals provided to the first security badge and an authorization server that periodically provides signals to the first security badge in response to a query of the authorization server by the first security badge while the first security badge remains in a controlled zone, the signals varying independently of reader access of the first security badge. The first security badge may be read by a reader only in connection with initial entry into the controlled zone. Authorization of a user of the first security badge may vary while the user remains in the controlled zone. The first security badge may include a visual image of a user of the first security badge and displays additional information. The additional information may include name and authorization status of the user. |
| US11315372B2 |
Zone learning for enabling frictionless building interaction
According to one embodiment, a method of conserving energy while seeking to wirelessly actuate an access control using a mobile device is provided. The method including: searching for a wireless signal at a first rate; detecting a wireless signal; generating a zone of interest; detecting positional data of a mobile device; and searching for a wireless signal at a second rate greater than the first rate when positional data of the mobile device indicates that the mobile device is within the zone of interest. |
| US11315367B2 |
Method and apparatus for controlling vehicle operations and computer device
Provided are a method and an apparatus for controlling vehicle operations, and a computer device. The method includes: acquiring current running status information of an in-vehicle component and current user operating behavior information sent by a first vehicle; determining a current running status score of the first vehicle according to the current running status information of the in-vehicle component and the current user operating behavior information from the first vehicle; and generating an operation strategy for the first vehicle according to the current running status score of the first vehicle. |
| US11315365B2 |
Method for registering fingerprint, terminal and computer-readable storage medium
Some embodiments of the present application provide a method for registering a fingerprint, a terminal, and a computer readable storage medium. The method for registering a fingerprint includes: acquiring fingerprint images collected in response to a user sliding a finger; filtering the fingerprint images to select filtered images that satisfy a preset filtering condition; and registering the filtered images into a fingerprint template. Thus, the user can register the fingerprint by sliding the finger, without pressing a number of times, which improves user experience and helps to enhance identification performance. |
| US11315363B2 |
Systems and methods for gait recognition via disentangled representation learning
Gait, the walking pattern of individuals, is one of the most important biometrics modalities. Most of the existing gait recognition methods take silhouettes or articulated body models as the gait features. These methods suffer from degraded recognition performance when handling confounding variables, such as clothing, carrying and view angle. To remedy this issue, a novel AutoEncoder framework is presented to explicitly disentangle pose and appearance features from RGB imagery and a long short-term memory integration of pose features over time produces the gait feature. |
| US11315361B2 |
Occupant state determining device, warning output control device, and occupant state determining method
An occupant state determining device includes an image data acquiring unit for acquiring image data indicating an image captured by a camera used for image capturing in a vehicle cabin, an image recognition processing unit for performing image recognition processing on the captured image by using the image data, a moveless state determining unit for determining whether an occupant is in a moveless state by using a result of the image recognition processing, and an abnormal state determining unit for determining whether the occupant is in an abnormal state due to decrease in the degree of awakening by using a result of the determination by the moveless state determining unit, and the abnormal state determining unit determines that the occupant is in an abnormal state when the duration of the moveless state exceeds a reference time. |
| US11315358B1 |
Method and system for detection of altered fingerprints
A method for detection of altered fingerprints includes receiving, by at least one processor, an image of a fingerprint from a fingerprint reader. The image has an image resolution. The processor determines a spatial location of the fingerprint within the image. The processor crops the image around the spatial location to provide a cropped image. The processor generates multiple derived images using the cropped image, such that each derived image has the image resolution. The processor generates a multiple-channel image using the derived images. The processor scales the multiple-channel image to an image size. The processor generates a score using a machine learning model. The score is based on the multiple-channel image and is indicative of a likelihood that the fingerprint has been altered. |
| US11315357B2 |
Single-feature fingerprint recognition
The present disclosure relates to methods and devices for fingerprint recognition. In an aspect, a method of a fingerprint sensing system of extracting at least one fingerprint descriptor from an image captured by a fingerprint sensor for enrolment in the fingerprint sensing system is provided. The method comprises capturing images of a finger contacting the fingerprint sensor, detecting at least one fingerprint feature in each captured image, extracting fingerprint data from an area surrounding a location of the detected feature in each captured image, and extracting a fingerprint descriptor by performing a transform of the fingerprint data extracted from the area surrounding the location of the detected feature in each captured image, wherein a size of the area is selected such that the area comprises sufficient information to allow a duplicated descriptor to be discarded for the captured images. |
| US11315352B2 |
Calculating the precision of image annotations
A machine receives, for a given target in a given image, a plurality of annotations, each annotation indicating a range of pixels corresponding to the given target. The machine computes a number of pixels in an intersection of the plurality of annotations. The machine computes an average pixels on target (APOT) for the given target by computing, for each annotation, a number of pixels that corresponds to the given target and taking a mean of those numbers. The machine computes a precision value of the plurality of annotations as the number of pixels in the intersection divided by the APOT. The machine provides an output representing the precision value. |
| US11315350B2 |
Method for assessing driver fatigue
A method for assessing driver fatigue is implemented by a processor and includes steps of: based on images of a driver captured by an image capturing device, obtaining an entry of physiological information that indicates a physiological state of the driver; based on one of the images of the driver, obtaining an entry of facial expression information that indicates an emotional state of the driver; based on one of the images of the driver, obtaining an entry of behavioral information that indicates driver behavior of the driver; and based on the entry of physiological information, the entry of facial expression information and the entry of behavioral information, obtaining a fatigue score that indicates a level of fatigue of the driver. |
| US11315349B2 |
Method, apparatus and device for identifying passenger state in unmanned vehicle, and storage medium
Embodiments of the present application provide a method, an apparatus, and a device for identifying a passenger state in an unmanned vehicle, and a storage medium. The method comprises: obtaining monitoring data of different dimensions in a process where the passenger takes the unmanned vehicle; performing feature extraction on the monitoring data of the different dimensions and forming feature data of different dimensions; and identifying the passenger state according to the feature data of the different dimensions. By obtaining the monitoring data of various dimensions in the process where the passenger takes the unmanned vehicle to identify the passenger state, it is possible to omnidirectionally monitor the personal is safety and property safety of the passengers, and effectively protect the passenger taking the unmanned vehicle. |
| US11315348B2 |
Vehicular vision system with object detection
A vehicular vision system includes a camera disposed at an in-cabin side of a windshield of a vehicle and viewing forward of the vehicle. The control, responsive at least in part to image processing by an image processor of multiple frames of captured image data, detects an object present exterior of the equipped vehicle that is moving relative to the equipped vehicle. The control receives vehicle motion data indicative of motion of the vehicle when the vehicle is moving. The control, responsive at least in part to the received vehicle motion data, and via image processing of multiple frames of captured image data, determines motion of the detected object relative to the moving vehicle by (i) determining corresponding object points in at least two frames of captured image data and (ii) estimating object motion trajectory of the detected object based at least in part on the determined corresponding object points. |
| US11315344B2 |
Reconfigurable 3D convolution engine
Disclosed is a reconfigurable convolution engine for performing a convolution operation on an image. A data receiving module receives image data. A determination module determines a kernel size based on the image data, clock speed associated to the convolution engine and number of available on-chip resources. An allocation module allocates a plurality of instances based on the kernel size. Each instance of the plurality of instances further comprises a set of computing blocks operating concurrently. Each computing block is configured to perform convolution operation on the feature map of the image. An aggregation module aggregates the convolution output of each computing block for each instance of the plurality of instances to produce a convolution result for the image. |
| US11315341B2 |
Information processing apparatus, verification method, and computer-readable recording medium recording verification program
An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: calculate a positional difference and a degree of similarity in feature value between each feature point in a verification image captured by an imaging device and each of a plurality of feature points in a registered image registered in advance; and match the verification image against the registered image by using the degree of similarity to a feature point having the degree of similarity that is second highest or lower for each feature point in the registered image in a case where a positional difference from a feature point having the degree of similarity that is highest in the verification image is greater than a threshold value. |
| US11315334B1 |
Display apparatuses and methods incorporating image masking
A display apparatus including light source(s), camera(s), head-tracking means, and processor configured to: obtain three-dimensional model of real-world environment; control camera(s) to capture given image of real-world environment, whilst processing head-tracking data obtained from head-tracking means to determine pose of users head with respect to which given image is captured; determine region of three-dimensional model that corresponds to said pose of users head; compare plurality of features extracted from region of three-dimensional model with plurality of features extracted from given image, to detect object(s) present in real-world environment; employ environment map of extended-reality environment to generate intermediate extended-reality image based on pose of users head; embed object(s) in intermediate extended-reality image to generate extended-reality image; and display extended-reality image via light source(s). |
| US11315333B2 |
Edge detection and smoothing for virtual object presentation
Image processing techniques for rendering holographic images are described. Image data captured from cameras can be converted into a triangle mesh. The triangle mesh may be processed by determining the location of edges, normals, and edge distances in the mesh. Mesh and edge smoothing can be performed on the mesh to reduce noise and jagged edges. Additional mesh cleanup and simplification can be performed to reduce the number of vertices and triangles and enhance the qualify of the mesh. Data from the resulting mesh can be transmitted to a receiving device where the mesh data is used to reproduce a holographic image of the image data captured by the depth sensors. |
| US11315324B2 |
Virtual try-on system for clothing
According to an embodiment, an acquisition unit of a first terminal acquires a try-on subject image. A first calculator calculates composite position information indicating a composite position of a clothing image in the try-on subject image. A first transmission unit transmits, to a server device, user information including the try-on subject image and the composite position information. A second reception unit of the server device receives the user information from the first terminal. Upon receipt of second information including a signal of request for execution of virtual try-on from a portable second terminal, a second transmission unit transmits third information including the user information and the clothing image to the second terminal. A third transmission unit of the second terminal transmits the second information to the server device. A third reception unit receives the third information from the server device. A third storage unit stores the received third information. |
| US11315321B2 |
View dependent 3D reconstruction mechanism
An apparatus to facilitate encoding of point cloud data is disclosed. The apparatus includes one or more processors to receive point cloud data including a plurality of images and camera parameters, generate encoded point cloud data including a color texture image and a depth image having cropped regions for each of the plurality of images, and metadata to describe the camera parameters and a mapping of the cropped regions to a real coordinate space. |
| US11315320B2 |
Information processing apparatus and method
There is provided an information processing apparatus and method that makes it possible to suppress a reduction in a subjective image quality. Point cloud data before update of position information is searched for a point to be compared, the point to be compared being a point to be compared with a current point, the current point being a processing target point of the point cloud data with the updated position information, and the retrieved point to be compared is compared with the current point, and attribute information of the current point is set. The present disclosure is applicable to, for example, an information processing apparatus, an image processing apparatus, electronic equipment, an information processing method, a program, etc. |
| US11315319B2 |
Method for preserving shapes in solid model when distributing material during topological optimization with distance fields
A method preserves shapes in a solid model when distributing material during topological optimization. A 3D geometric model of a part having a boundary shape is received. The geometric model is pre-processed to produce a variable-void distance field and to produce a frozen distance field representing the boundary shape. The geometric model is apportioned into a plurality of voxels, and a density value is adjusted for each voxel according to an optimization process. An iso-surface mesh is extracted from the voxel data, and an iso-surface distance field is generated from the extracted iso-surface mesh. A distance field intersection is derived between the iso-surface distance field and the variable-void distance field. A distance field union is performed between the distance field intersection and the frozen distance field, and a result iso-surface mesh is produced from the distance field union. |
| US11315314B1 |
Virtual vehicle generation by multi-spectrum scanning
A method and system for generating a three-dimensional representation of a vehicle to assess damage to the vehicle. A mobile device may capture multispectral scans of a vehicle from each a plurality of cameras configured to scan the vehicle at a different wavelength of the electromagnetic spectrum. A virtual model of the vehicle may be generated from the multispectral scan of the vehicle, such that anomalous conditions or errors in individual wavelength data are omitted from model generation. A representation of the virtual model may be presented to the user via the display of the mobile device. The virtual model of the vehicle may further be analyzed to assess damage to the vehicle. |
| US11315304B2 |
Apparatus and method for a hierarchical beam tracer
Apparatus and method for a hierarchical beam tracer. For example, one embodiment of an apparatus comprises: a beam generator to generate beam data associated with a beam projected into a graphics scene; a bounding volume hierarchy (BVH) generator to generate BVH data comprising a plurality of hierarchically arranged BVH nodes; a hierarchical beam-based traversal unit to determine whether the beam intersects a current BVH node and, if so, to responsively subdivide the beam into N child beams to test against the current BVH node and/or to traverse further down the BVH hierarchy to select a new BVH node, wherein the hierarchical beam-based traversal unit is to iteratively subdivide successive intersecting child beams and/or to continue to traverse down the BVH hierarchy until a leaf node is reached with which at least one final child beam is determined to intersect; the hierarchical beam-based traversal unit to generate a plurality of rays within the final child beam; and intersection hardware logic to perform intersection testing for any rays intersecting the leaf node, the intersection testing to determine intersections between the rays intersecting the leaf node and primitives bounded by the leaf node. |
| US11315303B2 |
Graphics processing
When a programmable execution unit of a graphics processor is executing a graphics processing program to render a frame that represents a view of a scene using a ray tracing process, and the ray tracing process requires the determination of geometry that will be intersected by a ray, the programmable execution unit sends a message to a ray tracing acceleration data structure traversal circuit of the graphics processor, for the ray tracing acceleration data structure traversal circuit to perform a traversal of a ray tracing acceleration data structure for the scene to determine geometry for the scene that may be intersected by the ray. The ray tracing acceleration data structure traversal circuit then returns to the programmable execution unit an indication of geometry that may be intersected by the ray, and the programmable execution unit uses the indicated geometry to determine any geometry that is intersected by the ray. |
| US11315300B2 |
Multi-spectral rendering for synthetics
Systems and methods are disclosed for leveraging rendering engines to perform multi-spectral rendering by reusing the color channels for additional spectral bands. A digital asset represented by a three dimensional (3D) mesh and a material reference pointer may be rendered using a first material spectral band data set and additionally rendered using a second material spectral band data set, and the results combined to create a multi-spectral rendering. The multi-spectral rendering may then be used as part of a synthetics service or operation. By abstracting the material properties, a material translator is able to return a banded material data set from among a plurality of spectral band sets, and asset material information may advantageously be managed apart from managing each asset individually. |
| US11315299B1 |
Method for computation of local densities for virtual fibers
An image generator generates images of a set of virtual fibers and effects thereon by processing representations of the set of fibers and computing representation of a virtual surface for a fiber clump in the set of virtual fibers from an artist parameter representing a desired artist effect, computing correlations of the vertices from a set of vertices based on associations of the vertices corresponding to the artist parameter, computing a set of relevant vertices using the correlations of the vertices, computing orthogonal gradients to produce a plurality of gradients using a selected vertex and the set of relevant vertices for the fiber clump, and computing the virtual surface of the fiber clump from the plurality of gradients. |
| US11315298B2 |
Personalized stylized avatars
The present disclosure is related to a method to generate user representative avatars that fit within a design paradigm. The method includes receiving depth information corresponding to multiple user features of the user, determining one or more feature landmarks for the user based on the depth information, utilizing the one or more feature landmarks to classify a first user feature relative to an avatar feature category, selecting a first avatar feature from the avatar feature category based on the classification of the first user feature, combining the first avatar feature within an avatar representation to generate a user avatar, and output the user avatar for display. |
| US11315294B2 |
Information processing device, display method, and program storage medium for monitoring object movement
To display with a display mode with which an analyst may easily ascertain actions (movements) of objects being monitored, provided is an information processing device, including a sensing unit and a display control unit. The sensing unit classifies, based on information relating to movements of objects being monitored, a plurality of objects into set movement paths. The display control unit controls a display such that the movements of the objects are displayed in a display screen of the display with an arrow in each set movement path. The axis of the arrow which is displayed in the display has a thickness according to the number of objects which are classified in the corresponding movement path, has a shape according to the trace of the objects which are classified in the corresponding movement path, and furthermore, the direction indicated by the arrow represents the direction of progress of the objects. |
| US11315293B2 |
Autonomous segmentation of contrast filled coronary artery vessels on computed tomography images
A computer-implemented method for autonomous segmentation of contrast-filled coronary artery vessels includes receiving a CT scan volume representing a 3D volume of a region of anatomy that includes a pericardium; preprocessing the CT scan volume to output a preprocessed scan volume; converting the CT scan volume to three sets of two-dimensional slices; extracting a region of interest (ROI) by autonomous segmentation of the heart region as outlined by the pericardium, by means of three individually trained ROI extraction convolutional neural networks (CNN), each trained to process a particular one of the three sets of two-dimensional slices to output a mask denoting a heart region as delineated by the pericardium; combining the preprocessed scan volume with the mask to obtain a masked volume; converting the masked volume to three groups of sets of two-dimensional masked slices; and performing autonomous coronary vessel segmentation to output a mask denoting the coronary vessels. |
| US11315292B2 |
Live-cell computed tomography
Systems and methods of using the same for functional fluorescence imaging of live cells in suspension with isotropic three dimensional (3D) diffraction-limited spatial resolution are disclosed. The method-live cell computed tomography (LCCT)-in-volves the acquisition of a series of two dimensional (2D) pseudo-projection images from different perspectives of the cell that rotates around an axis that is perpendicular to the optical axis of the imaging system. The volumetric image of the cell is then tomographically reconstructed. |
| US11315289B2 |
Adaptive depth guard band
Apparatuses, methods, and computer programs are disclosed. An example apparatus includes at least one processor; and at least one non-transitory memory including computer program code; wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to perform: signal a depth start of a patch data unit of a patch of data content based on an identifier of a tile and a patch index; wherein the depth start is used to derive a range of at least one depth value for the patch based on the patch index in a tile having the identifier; and signal a depth threshold of an immersive video extension of the patch data unit; wherein the depth threshold specifies a threshold below which an occupancy value is defined to be unoccupied for the patch based on the patch index. |
| US11315277B1 |
Device to determine user-specific HRTF based on combined geometric data
A device and a method of using the device to determine a user-specific head-related transfer function (HRTF), are described. The device can determine first geometric data corresponding to visible features of a pinna of a user in an image, and second geometric data corresponding to hidden features of the pinna obfuscated by the visible features in the image. The first geometric data and the second geometric data are combined in a geometric model that describes a shape of the pinna, and the user-specific HRTF is determined based on the geometric model. The user-specific HRTF is used to render spatial audio to the user. Other aspects are also described and claimed. |
| US11315276B2 |
System and method for dynamic stereoscopic calibration
Methods for stereo calibration of a dual-camera that includes a first camera and a second camera and system for performing such methods. In some embodiments, a method comprises obtaining optimized extrinsic and intrinsic parameters using initial intrinsic parameters and, optionally, initial extrinsic parameters of the cameras, estimating an infinity offset e using the optimized extrinsic and extrinsic parameters, and estimating a scaling factor s using the optimized extrinsic and extrinsic parameters and infinity offset parameter e, wherein the optimized extrinsic and extrinsic parameters, infinity offset e and scaling factor s are used together to provide stereo calibration that leads to improved depth estimation. |
| US11315272B2 |
Image and video capture architecture for three-dimensional reconstruction
The present approach relates to an automatic and efficient motion plan for a drone to collect and save a qualified dataset that may be used to improve reconstruction of 3D models using the acquired data. The present architecture provides an automatic image processing context, eliminating low quality images and providing improved image data for point cloud generation and texture mapping. |
| US11315271B2 |
Point cloud intensity completion method and system based on semantic segmentation
A point cloud intensity completion method and system based on semantic segmentation are provided. The point cloud intensity completion method includes: acquiring an RGB image and point cloud data of a road surface synchronously by a photographic camera and a lidar; performing spatial transformation on the point cloud data by using a conversion matrix to generate a two-dimensional reflection intensity projection map and a two-dimensional depth projection map; performing reflection intensity completion on the RGB image and the two-dimensional reflection intensity projection map to obtain a single-channel reflection intensity projection map; performing depth completion on the RGB image and the two-dimensional depth projection map to obtain a single-channel depth projection map; and performing coarse-grained completion on the RGB image, the single-channel reflection intensity projection map and the single-channel depth projection map to obtain a two-dimensional coarse-grained reflectance intensity projection map. |
| US11315267B2 |
Method for processing scan data
A method for processing scan data which are recorded by a measuring device with a scan functionality, wherein a reduced scan data record is created from a recorded scan data record with a first scan data density by selecting individual scan data points. Here, the selection represents an adaptation to a reduced scan data density, which is less than the first scan data density of the recorded scan data record. The reduced scan data density depends on a predetermined display resolution for displaying scan data. The reduced scan data record is transmitted to an external data processing device and displayed by the latter by means of a display, depending on the predetermined display resolution. |
| US11315266B2 |
Self-supervised depth estimation method and system
Depth perception has become of increased interest in the image community due to the increasing usage of deep neural networks for the generation of dense depth maps. The applications of depth perception estimation, however, may still be limited due to the needs of a large amount of dense ground-truth depth for training. It is contemplated that a self-supervised control strategy may be developed for estimating depth maps using color images and data provided by a sensor system (e.g., sparse LiDAR data). Such a self-supervised control strategy may leverage superpixels (i.e., group of pixels that share common characteristics, for instance, pixel intensity) as local planar regions to regularize surface normal derivatives from estimated depth together with the photometric loss. The control strategy may be operable to produce a dense depth map that does not require a dense ground-truth supervision. |
| US11315265B2 |
Fingertip detection method, fingertip detection device, and medium
A fingertip detection method, a fingertip detection device and a storage medium are disclosed. The fingertip detection method includes: determining a minimum-depth point in a hand area to be detected based on a depth image; determining a hand vertex in the hand area to be detected based on the depth image; determining a fingertip position based on the minimum-depth point and the hand vertex. |
| US11315264B2 |
Laser sensor-based map generation
The present disclosure provides a laser sensor-based map generation method. In an embodiment, the method includes: obtaining image data, the image data being acquired by a visual sensor; determining first point cloud data belonging to glass-like region in laser data based on the image data; adjusting a weight of the laser data according to the first point cloud data; fusing the first point cloud data and second point cloud data belonging to non-glass-like region in the laser data based on the adjusted weight of the laser data, to generate a map. |
| US11315262B1 |
Tracking objects in three-dimensional space using calibrated visual cameras and depth cameras
The motion of objects within a scene may be detected and tracked using digital (e.g., visual and depth) cameras aligned with fields of view that overlap at least in part. Objects may be identified within visual images captured from the scene using a tracking algorithm and correlated to point clouds or other depth models generated based on depth images captured from the scene. Once visual aspects (e.g., colors or other features) of objects are correlated to the point clouds, shapes and/or positions of the objects may be determined and used to further train the tracking algorithms to recognize the objects in subsequently captured frames. Moreover, a Kalman filter or other motion modeling technique may be used to enhance the prediction of a location of an object within subsequently captured frames. |
| US11315260B2 |
Geo-motion and appearance aware data association
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for associating a new measurement of an object surrounding a vehicle with a maintained track. One of the methods includes receiving an object track for a particular object, receiving a new measurement characterizing a new object at a new time step, and determining whether the new object is the same as the particular object, comprising: generating a representation of the new object at the new and preceding time steps; generating a representation of the particular object at the new and preceding time steps; processing a first network input comprising the representations using a first neural network to generate an embedding of the first network input; and processing the embedding of the first network input using a second neural network to generate a predicted likelihood that the new object and the particular object are the same. |
| US11315256B2 |
Detecting motion in video using motion vectors
Technology is disclosed herein for detecting motion in video using motion vectors. In an implementation, a frame of video is divided into regions and a vector score is identified for each of the regions. A selection is then made of a subset of the regions based on the identified vector scores, i.e. at least some of the regions may be excluded from further analysis based on their score. The selected subset is divided into or grouped in clusters. Motion may then be identified in response to at least one of the clusters appearing in at least one other frame of the video. |
| US11315255B2 |
Mixing segmentation algorithms utilizing soft classifications to identify segments of three-dimensional digital models
The present disclosure includes methods and systems for identifying and manipulating a segment of a three-dimensional digital model based on soft classification of the three-dimensional digital model. In particular, one or more embodiments of the disclosed systems and methods identify a soft classification of a digital model and utilize the soft classification to tune segmentation algorithms. For example, the disclosed systems and methods can utilize a soft classification to select a segmentation algorithm from a plurality of segmentation algorithms, to combine segmentation parameters from a plurality of segmentation algorithms, and/or to identify input parameters for a segmentation algorithm. The disclosed systems and methods can utilize the tuned segmentation algorithms to accurately and efficiently identify a segment of a three-dimensional digital model. |
| US11315248B2 |
Identifying invalid medical images
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying one or more invalid images characterizing the brain of a patient. One of the methods includes obtaining a data object comprising one or more images characterizing a brain of a patient; processing the data object to determine one or more particular images that are invalid; and providing, for display to a user on a graphical interface, data characterizing i) each particular image and ii) a respective reason that each particular image is invalid selected from a set of possible reasons that an image may be invalid. |
| US11315243B2 |
X-ray image processing method and system and computer storage medium
The present disclosure relates to techniques to expand the dynamic range of a detector and achieve smooth transition in images used for X-ray image processing. The image finally obtained can fully retain useful information. |
| US11315241B2 |
Method, computer device and storage medium of fundus oculi image analysis
A method of fundus oculi image analysis includes acquiring a target fundus oculi image; analyzing the target fundus oculi image by a fundus oculi image analysis model determined by training to acquire an image analysis result of the target fundus oculi image; and the fundus oculi image analysis model includes at least one of an image overall grade prediction sub-model and an image quality factor sub-model. The method performs quality analysis on the target fundus oculi image by the fundus oculi image analysis model, and when the model includes the overall grade prediction sub-model, a prediction result of whether the target fundus oculi image as a whole is gradable can be acquired; when the model includes the image quality factor sub-model, the analysis result of the fundus oculi image quality factor can be acquired and the image analysis model is determined by extensive image training, and the reliability of the result of whether the image is gradable determined based on the above model is high. |
| US11315239B1 |
Guided vehicle capture for virtual mode generation
Methods and system for guiding user data capture during a scan of a vehicle using a mobile device are disclosed. A user may scan a vehicle using a camera or other sensors of the mobile device to capture data from which a three-dimensional virtual model may be generated. During the scanning process, models may be generated and evaluated according to quality metrics. Visual cues may be determined and presented to the user during scanning to indicate areas sufficiently scanned or areas requiring additional scanning to meet data quality requirements for model generation. Damage to vehicle components may be identified by analysis of the generated model, and addition data capture or user annotation entry may be directed based upon the identified damage. |
| US11315238B2 |
Method for manufacturing a product
A method for manufacturing a product is provided. The method includes: providing a plurality of components; working on the plurality of components to form the product; and testing the product via a testing method, including: providing first images and second images; assigning the first images by an assigner to a first inspecting unit; determining whether the product corresponding to the first images is OK or not in the first inspecting unit; additionally assigning the second image by the assigner to the first inspecting unit in case no more first image is to be assigned; determining whether the product corresponding to the second image is OK or not in the second inspecting unit or additionally in the first inspecting unit; and sending a message of OK by the assigner for outputting the product that is determined OK. |
| US11315237B2 |
EBeam inspection method
An image is obtained by using a charged particle beam, and a design layout information is generated to select patterns of interest. Grey levels among patterns can be compared with each other to identify abnormal, or grey levels within one pattern can be compared to a determined threshold grey level to identify abnormal. |
| US11315235B2 |
Processing method for performing process on image and processing device using the processing method
An input unit 132 receives an input of an image subject to a process. A processing unit subjects the image input to the input unit 132 to a process of a convolutional neural network in which a fully connected layer is excluded. The convolutional neural network in the processing unit 114 includes a convolutional layer and a pooling layer. An output unit outputs a result of the process in the processing unit 114. A filter of the convolutional layer in the convolutional neural network in the processing unit 114 is trained to learn the result of the process having a 1×1 spatial dimension. |
| US11315233B2 |
Learning model generating device, and type identification system for generating learning model and using generated learning model to infer type of image defect
A learning model generating device includes a first image reading device and a first control device. The first control device includes a processor and functions, through the processor executing a first control program, as a first segmenter, a learning model generator, and a first compressor. The first segmenter segments each of images of training prints obtained by reading performed by the first image reading device. The learning model generator learns segmented images to generate a first learning model for use in inferring a type of an image defect. The first compressor compresses each of the images of the training prints. The first segmenter segments each of compressed images obtained by compression performed by the first compressor. The learning model generator learns compressed and segmented images to generate a second learning model for use in inferring a type of an image defect. |
| US11315230B2 |
System, method and computer program product for analyzing jpeg images for forensic and other purposes
Forensic method for identifying forged documents. For each of a stream of incoming jpeg images, using a processor configured for determining whether jpeg image/s is a replacement forgery by determining whether a first portion of individual image which resides at a known location (known likely to be replaced by forger) within the individual jpeg image has been replaced, including: indicator, face-djpg, for the first portion at known location; computing indicator, aka nonface-djpg, for a second portion of individual image which resides at a comparison location within the jpeg image known as unlikely to be replaced by a forger; and determining whether face-djpg and nonface-djpg fulfill predetermined logical criterion and deciding whether the individual jpeg image is a replacement forgery accordingly. |
| US11315229B2 |
Method for training defect detector
A method for training a defect detector comprises: obtaining a first reference image of a first reference object, wherein the first reference object has a defect and the first reference image has a first label indicating the defect; training a reconstruction model according to a second reference image of a second reference object associated with the first reference object, wherein a defect level of the second reference object is in a tolerable range with an upper limit; obtaining a target image of a target object associated with the first reference object and the second reference object; generating a second label according to the target image, the reconstruction model and an error calculation procedure, wherein the second label comprises a defect of the target object; and training a defect detector by performing a machine learning algorithm according to the first reference image, the target image and the second label. |
| US11315226B2 |
Intelligent cabling and connection validation
A method is disclosed to ensure that components in a complex system are correctly connected together. In one embodiment, such a method captures a visual image of a system made up of multiple components connected together with cables. The method analyzes the visual image to determine connections between the components. The method further builds a current model that represents the connections between the components. This current model is then compared to a previous model to find differences between the current model and the previous model. If differences exist, the method notifies a user of the differences. This may assist the user in identifying any incorrect connections between the components. A corresponding apparatus and computer program product are also disclosed. |
| US11315223B2 |
Image processing apparatus, image processing method, and computer-readable recording medium
An image processing apparatus is disclosed. The present image processing apparatus comprises: a memory for storing a low dynamic range (LDR) image and a processor for adjusting the brightness of the LDR image by means of a pixel-specific brightness ratio identified using a first parameter, and acquiring a high dynamic range (HDR) image by adding or subtracting a pixel-specific correction value identified using a second parameter in the brightness-adjusted LDR image. |
| US11315220B2 |
Distance measuring apparatus, vibration measuring apparatus, and industrial computed tomography apparatus
According to one embodiment, a distance measuring apparatus includes a processing circuit and a memory. The processing circuit generates a distance image by measuring distances to an obstacle by using the time until the emitted light is reflected from the obstacle and returned as reflected light. The processing circuit generates an intensity image by measuring the intensity of the reflected light or the intensity of the environmental light. The memory stores a learned model for generating a denoise image, in which noise of the distance image is reduced, based on the distance image and the intensity image. The processing circuit inputs the distance image and the intensity image to the learned model, and generates the |
| US11315219B2 |
Remote distribution of neural networks
Remote distribution of multiple neural network models to various client devices over a network can be implemented by identifying a native neural network and remotely converting the native neural network to a target neural network based on a given client device operating environment. The native neural network can be configured for execution using efficient parameters, and the target neural network can use less efficient but more precise parameters. |
| US11315218B2 |
Composition processing system, composition processing apparatus, and composition processing method
There are provided a composition processing system, a composition processing apparatus, and a composition processing method that allow efficient inspection. A composition processing system includes an image capturing apparatus A, a first computer B, and a second computer C. The first computer B includes: a first image acquisition unit; a composition supplementary information acquisition unit that acquires composition supplementary information for composing a first large-area image; a minified separate image generation unit that generates minified separate images acquired by reducing image sizes of the separate images; a second large-area image generation unit that composites the minified separate images on the basis of the composition supplementary information to generate a second large-area image; and an image display unit that displays the second large-area image. The second computer C includes: a second image acquisition unit that acquires from the first computer the plurality of separate images to which the composition supplementary information is added; and a first large-area image generation unit that composites the plurality of separate images on the basis of the composition supplementary information to generate the first large-area image. |
| US11315216B2 |
Method and system for improving compressed image chroma information
Methods, systems, and computer programs for improving compressed image chroma information. In one aspect of the invention, a resolution for a red color component of a color video image is used that is higher than the resolution for a blue color component of the color video image. Another aspect includes utilizing a lower or higher value of a quantization parameter (QP) for one or more chroma channels as compared to the luminance channel. Another aspect is use of a logarithmic representation of a video image to benefit image coding. Another aspect uses more than two chroma channels to represent a video image. |
| US11315213B2 |
Unified architecture for BVH construction based on hardware pre-sorting and a parallel, reconfigurable clustering array
An apparatus comprising a sorting unit to sort primitives of a graphics image, the primitives to be grouped, each group to form a first level node of a hierarchical acceleration structure; a parallel reconfigurable clustering array to construct the hierarchical acceleration structure, the parallel reconfigurable clustering array comprising a plurality of processing clusters, each cluster comprising: parallel efficiency analysis circuitry to evaluate different groupings of the first level nodes for a next level of the hierarchical acceleration structure to determine efficiency values for the different groupings; and node merge circuitry to merge the first level nodes based on the efficiency values to form second level nodes. |
| US11315208B2 |
Conceptual representation of business processes for cross-domain mapping
A computer-implemented method, system, and computer program product for cross-domain mapping between a business process modeler domain and an implementation domain are provided. The method includes accessing a business concept registry on a data storage device including business concepts with mapping for the business process modeler domain and the implementation domain. The method also includes creating a model with one or more of the business concepts interconnected to represent a business process in the business process modeler domain, and exporting the model from the business process modeler domain to the implementation domain according to the business concept mapping of the business concept registry. |
| US11315204B2 |
Updating sequence of online courses for new learners while maintaining previous sequences of online courses for previous learners
A method can present a new sequence of online courses within a specialization for a group of new learners while maintaining a previous sequence of online courses within the specialization for a group of previous learners. The method can include maintaining a base class, associating a first learner with the base class, receiving a request to update a previous sequence of courses, generating a child class, associating a second learner with the child class, responding to a request for a sequence associated with the first learner, and responding to a request for a sequence associated with the second learner. |
| US11315203B1 |
Computer implemented method, system, and non-transitory computer-readable data storage medium for information display and analysis
Information analysis and display systems and methods include receiving first financial information regarding a user, and calculating a target home price based on the received financial information. A user interface display is generated that displays the target home price, and modifications to the target home price from the user are received via the user interface. Homes for sale are evaluated based on the target price. |
| US11315199B2 |
System and method for providing OEM control to maximize profits
A system and method for providing original equipment manufacturer (OEM) control to maximize profits that include determining at least one demand based charging schedule and processing an OEM charging policy option to schedule charging of the at least one electric vehicle at a low energy production cost timeframe. The system and method also include modifying the at least one demand based charging schedule into a policy based charging schedule based on an acceptance of the OEM charging policy option by the at least one utility provider. The system and method further include facilitating payment of an incentive fee from the at least one utility provider to the OEM. |
| US11315198B2 |
Data analysis engine
Systems and methods for performing data analysis include receiving data for performing analysis from a user. A value associated with a variable is extracted from a first file based on the data. The value associated with the variable is loaded into a second file, the second file including a formula referencing the variable. An output is generated based on the data by calculating the formula based on the value associated with the variable. |
| US11315195B1 |
Systems and methods for determining validation times
Method and system for validating a plurality of policies. For example, a computer-implemented method includes receiving a plurality of policies, each policy of the plurality of policies associated with a policy lifecycle including one or more validation actions, each validation action of the one or more validation actions being associated with an action time; mapping the one or more validation actions associated with each policy of the plurality of policies on a common timeline of a shared clock; and determining the plurality of validation times based at least in part upon the action time associated with each validation action of the one or more validation actions by at least one of: minimizing the amount of validation times of the plurality of validation times; and maximizing the amount of validation actions contained within each validation time of the plurality of validation times on average across the plurality of validation threads. |
| US11315191B1 |
Method of controlling for undesired factors in machine learning models
A method of training and using a machine learning model that controls for consideration of undesired factors which might otherwise be considered by the trained model during its subsequent analyses of new data. For example, the model may be a neural network trained on a set of training images to evaluate an insurance applicant based upon an image or audio data of the insurance applicant as part of an underwriting process to determine an appropriate life or health insurance premium. The model is trained to probabilistically correlate an aspect of the applicant's appearance with a personal and/or health-related characteristic. Any undesired factors, such as age, sex, ethnicity, and/or race, are identified for exclusion. The trained model receives the image (e.g., a “selfie”) of the insurance applicant, analyzes the image without considering the identified undesired factors, and suggests the appropriate insurance premium based only on the remaining desired factors. |
| US11315189B1 |
Dynamic auto insurance policy quote creation based on tracked user data
A system and method may create auto insurance quotes using data collected from a device that tracks vehicle usage data and other data. Usage data may be tracked by an On Board Diagnostic (OBD) device or other portable computing device such as a smart phone. Based on a received coverage type, the usage data and other data may be analyzed to determine auto insurance quotes. A potential customer may then purchase an auto insurance policy. Once the purchased policy has been determined to have expired, new usage data will be collected, and new quotes will be created for the customer. |
| US11315187B2 |
Information alerts method, apparatus and device
A preset alert trigger event associated with a wealth management application operated on an electronic device is detected. In response to detecting the preset alert trigger event, the electronic device obtains a physiological characteristic parameter characterizing an emotion of a target user. The electronic device determines that a preset normal emotion fluctuation condition is not satisfied according to the physiological characteristic parameter. In response to determining that the normal emotion fluctuation condition is not satisfied, a risk alert on a wealth management action of the target user performed in the wealth management application is output. |
| US11315172B2 |
Systems and methods for facilitating feed in a network-based marketplace
Feeds in a network-based marketplace are described. The system receives a request, over a network, from a user that is associated with feed selection information, and identifies source feeds based on the feed selection information. The source feeds respectively include a first plurality of content elements. The system generates a presentation feed by retrieving a second plurality of content elements from the source feeds. The generating is performed continuously and in real-time. The system segments the presentation feed into pages and generates interfaces that include a first interface based on the pages. The system communicates the first interface, over the network, to the user, responsive to the receiving of the request. |
| US11315168B2 |
Systems and methods for providing an e-commerce slip cart
A method for managing an electronic commerce (e-commerce) shopping cart may include, in a computing device comprising a touch screen, memory, and at least one processor, receiving a selection of one of a plurality of web pages associated with an e-commerce web site. The selected one of the plurality of web pages and an indication of the e-commerce shopping cart may be displayed on the touch screen. The indication of the e-commerce shopping cart may be integrated for display into each of the plurality of web pages. While displaying the selected one of the plurality of web pages and the indication of the e-commerce shopping cart, at least one gesture event associated with the e-commerce shopping cart may be detected. Access to the e-commerce shopping cart may be enabled upon detecting the at least one gesture event. |
| US11315165B2 |
Routine item recommendations
An approach is disclosed for recommending complementary items based on customer shopping routines. The approach receives anchor item data. The approach identifies a routine that corresponds to the anchor item data. The routine is based on an item purchasing behavior of a customer. The approach determines categorical data within the identified routine by applying a ranking algorithm to the categorical data of the categories and the anchor item data. The categorical data is relevant to the anchor item data. The approach generates relevant item data from the categorical data by applying an item recommendation model to item data that corresponds to the categorical data. |
| US11315164B2 |
Complementary product recommendation systems
Generally, the present disclosure relates to methods and systems for generating complementary product recommendations. In some example aspects, human-identified complementarity of a subset of products can be used to train a neural network, which is in turn used to generate pairwise complementarity values for items. Based on such values, complementary items can be identified. |
| US11315162B2 |
Internet of things (IoT) configurator
An apparatus and corresponding method include a web-based database solution that may be referred to as the “IoT Configurator.” In one example, the IoT Configurator is a machine learning software tool that assists consumers by identifying compatible IoT products for devices they already own or plan to buy in the near future. The IoT Configurator may be configured to provide reviews, news, advice and recommendations regarding IoT devices and services. The IoT Configurator enables a user to learn which IoT products and services are right for them, and how such IoT products/services may be connected. The IoT Configurator enables a user to identify IoT devices that are compatible, that is, IoT devices that may interoperate with each other and share data. The IoT Configurator may employ data stored in at least one IoT database and use that data to help a consumer understand an IoT product's connectivity and compatibility, thereby simplifying the complexity of the IoT product for the user. |
| US11315161B2 |
Method, medium, and system for generating information
Disclosed are a method and apparatus for generating information. A method may include: acquiring total number information and initial routing information of a specified item, the initial routing information including current at least one piece of item supply link information and at least one piece of item display link information corresponding to the specified item; querying at least one initial link path between the at least one piece of item supply link information and the at least one piece of item display link information of the initial routing information; determining an updated link path between the at least one piece of item supply link information and the at least one piece of item display link information based on the total number information and the at least one initial link path; and generating and transmitting updated routing information through the updated link path. |
| US11315160B2 |
Prepaid bundled healthcare services with discreet virtual payment distribution
Apparatus and associated methods relate to presenting for selection services comprising at least one bundled set of healthcare services to be performed separately by respective providers, determining a bundle price for the at least one bundled set of healthcare services, and in response to receiving payment in an amount of the bundle price, generating a persistent purchase data record selectively redeemable to receive each of the at least one bundled set of healthcare services, and assigning a unique confirmation number generated for the purchase data record. The received payment may be a virtual funds payment. The bundle price may be discounted. The bundle price may be based on the location or time at which at least one service will be performed. The bundle price may be based on the user's remaining health insurance deductible. Payment may be disbursed to multiple providers of the bundled set of healthcare services. Disbursed payment may be virtual funds. |
| US11315159B2 |
System for determining, dispensing, and mixing blended composition for skin treatment
A system and method is provided for providing a cosmetic composition to a user. The system includes an apparatus configured to dispense at least one cosmetic composition into a output container; a user interface configured to receive information about the user; and circuitry configured to receive the information about the user and determine one or more cosmetic compositions to be dispensed into the output container based on the information about the user received at the user interface. |
| US11315158B1 |
Online sales assistance systems and related methods
Implementations of a method of adding an item to an online shopping cart may include providing a sales communication interface on a portable computing device associated with a sales representative. During a video, audio, or video and audio connection, the method may include receiving an item scan request, receiving a scanned item code at a web server, forwarding the scanned item code to a database server, retrieving a retailer item identity associated with the scanned item code, and forwarding the retailer item identity to the web server, the portable computing device, and a computing device associated with an online shopper. The method may include receiving a request to add an item associated with the retailer item identity to a shopping cart associated with a website controlled by a retailer that owns the item. Adding the item to the shopping cart may be done without intervention by the online shopper. |
| US11315156B2 |
Exchange item group sharing in a computing network
A method includes obtaining, by a first computing device, a digital exchange item. The method further includes sending, to a server, a request to share the digital exchange item with a group of computing devices. The method further includes determining, by the server, whether the digital exchange item can be shared based on one or more of: an issuer agreement and exchange item rules. When the digital exchange item can be shared, the method further includes the server establishing secure custody rights for each computing device, determining haring rights regarding the digital exchange item, and generating replications of the digital exchange item. The method further includes the server uploading the replications and the sharing rights to digital wallets associated with the computing devices of the group. |
| US11315155B2 |
Method and system for exposing data used in ranking search results
Methods and systems enable access to listing performance data associated with a search engine. A request for listing performance data for an item is received from a client computing system. The request is associated with a keyword and/or a category. The request is processed to retrieve the listing performance data corresponding to the item, and a value is determined that indicates a strength of the item in a search results listing having a plurality of search results based on a search using the keyword and/or the category. The listing performance data and value are provided for presentation. |
| US11315150B2 |
Portfolio driven targeted advertising network, system, and method
A system, method, device, and platform for generating targeted advertisements. Transaction information for a user is received. The transaction information associated with the user is verified. The information is reconciled with advertising data associated with the transaction information. Targeted advertisements are created based on the available advertising data. The targeted advertisements are communicated to the user. |
| US11315149B2 |
Brand personality inference and recommendation system
Mechanisms are provided to implement a brand personality inference engine. The mechanisms receive crowdsource information and extract features associated with a brand from the crowdsource information. The crowdsource information comprises natural language content submitted by a plurality of providers to a crowdsource information source. The mechanisms analyze features associated with the brand in accordance with a brand personality model configured to predict a brand personality for the brand based on the features associated with the brand. The mechanisms generate an inferred brand personality data structure, representing a perceived brand personality of providers providing the crowdsource information, and output an output indicating aspects of the perceived brand personality based on the inferred brand personality data structure. |
| US11315146B2 |
Systems, apparatus, and methods for providing promotions based on consumer interactions
Systems, apparatus, and methods for providing promotions based on consumer interaction data are discussed herein. Some embodiments may include a system and/or apparatus including circuitry configured to provide electronic user interfaces (or impressions) of promotions to consumer devices and receive consumer interaction data indicating consumer interaction with the impressions. The system may be further configured to determine a selected promotion for providing in a subsequent impression based on the consumer interaction data. For example, the system may be configured to determine a promotion score of available promotion based on consumer interaction data indicating consumer responses to the available impressions. The promotion score may provide a rating by which available promotions may be selected and may be determined based on various criteria discussed herein to provide selected promotions to consumer devices. |
| US11315145B1 |
Systems and methods for increasing digital marketing campaign efficiency
A method and associated system of managing advertising spending in an advertising campaign for an online marketplace seller, including, under control of one or more processors configured with executable instructions, defining a sales goal; setting a daily advertising budget and a bid value for an advertising campaign of the product; executing the advertising campaign; automatically collecting sales data relating to the product on the online marketplace; executing a machine learning component of an adaptive machine learning platform to generate a machine learning component output, at least in part based on the sales data; generating, based at least in part on the machine learning component output of the machine learning component, one or more sales milestones for the product on the online marketplace; comparing the sales data to the one or more sales milestones; and adjusting the daily advertising budget or the bid value to meet the sales goal. |
| US11315144B2 |
Method for evaluating the effectiveness of communication, advertising and promotions in communication media, method for developing optimized media plans and method for purchasing optimized media
The present invention relates to methods for evaluating the effectiveness of all types of communication carried on offline communication media so as to generate data equivalent to the data obtained in online communication media. The present invention uses tangible tools such as fixed-line telephones, cellphones, computers, tablets and any other wearable mobile device to generate that data that will be used in media plans that are much more precise and efficient than the plans currently known. Finally, the present invention relates to said media plan obtained using one of said methods as well as the purchase of optimized media. |
| US11315141B2 |
Server-based product substantiation with local filtering system and method
A system and method is presented for product substantiation and promotion redemption. A purchased product list is transmitted from a retail store system to a promotion analysis server along with a user identifier. The promotion analysis server identifies promotions available to the user, and then considers whether the benefits under the promotions are still available to the user. Discounts for available promotions related to the purchased product list are calculated and transmitted to the retail store system for deduction from the transactions. An approved product list can be provided that filters the purchased product list before transmittal. The approved product list can include promotions from a plurality of programs. |
| US11315127B2 |
Standard system and method for assigning ratings to art materials and works of art based on the projected stability of the constituents
Computer-powered system for determining a stability rating of an artwork piece, comprising a server, network, computer database(s) containing data regarding preservation-effecting factors and sub-factors and relating the factors and sub-factors to other pieces of artwork of various types, wherein data contained within the database forms a dynamic and searchable catalog of records of artwork pieces, at least one computing device having a software application stored therein that receives data from a user pertaining to queries about the artwork piece based on the examination of and research about the artwork and transmits the data to the network; the server applies algorithmic computations to the received data to convert it into representative grades for each factor and sub-factor and calculate a stability rating, wherein the stability rating represents the projected stability of the artwork and the resulting grades and stability rating are dependent upon the entire body of data within the database(s). |
| US11315124B2 |
Analyzing temporal classes in user feedback
A method, computer system, and a computer program product for feedback analysis is provided. The present invention may include, in response to identifying, using a natural language processing (NLP) component, a verb-related tag in a feedback data associated with a current version of a product or service, classifying the feedback data into a temporal class based on the identified verb-related tag. The present invention may also include, analyzing, using the NLP component, the classified feedback data within the temporal class. The present invention may further include, determining, based on the analyzed feedback data, a user perception associated with the current version of the product or service relative to the temporal class of the analyzed feedback data. |
| US11315119B1 |
System and method for fraud detection using event driven architecture
A system and method of providing real time account information for financial accounts is disclosed. The system includes an event based architecture including an event stream. Financial transaction processing systems publish transaction events to the event stream. A transaction service listening to the event stream detects new transaction events. The transaction service takes action to enrich transaction data. A middleware system reconciles existing transactions and persists transaction records in long term storage. The system can detect fraudulent transactions before the transactions have been posted to the financial account. The system can also be used to provide real time notifications to customers about potential fraudulent activity. |
| US11315117B2 |
Biometric pre-identification
A station device in a biometric pre-identification system uses identity to perform one or more actions. Identities are determined (such as via a backend) using biometric information. A biometric pre-identification device obtains biometric information and/or a digital representation thereof from a person approaching the station device. The biometric pre-identification device transmits such to the station device, facilitating the station to begin and/or perform various actions. The station device begins or performs the actions using the identity determined based on the biometric information before the person arrives at the station device. |
| US11315116B2 |
Systems and methods for use in authenticating consumers in connection with payment account transactions
Systems and methods are provided for use in authenticating consumers based on images of the consumers stored in payment cards. One exemplary method includes receiving, at a point-of-sale (POS) device, a transaction request by a consumer to purchase a product and soliciting, by the POS device, a payment device from the consumer for funding the transaction request. The method also includes retrieving, by the POS device, a reference image provisioned to the payment device, capturing, by the POS device, an image of the consumer presenting the payment device, and comparing, by the POS device, the captured image of the consumer to the reference image. The method then further includes submitting an authorization request, in response to the transaction request, when the captured image of the consumer matches the reference image, whereby the consumer is authenticated to the payment device. |
| US11315103B2 |
Automated Bluetooth pairing
This disclosure relates to creating a Bluetooth and/or BLE connection between two devices without using a UUID and/or MAC address. For example, a first device storing a private key may enter advertising mode to create a Bluetooth/BLE connection. An advertising packet (e.g., advertising channel packet data unit (PDU) may be transmitted (e.g., in encrypted format). A second device may enter scanning or initiator mode and may receive the advertising packet. A second device may request that a user log into an account associated with the first device (e.g., a customer account, a financial account, an employee account, and/or the like) in order to initiate a Bluetooth/BLE connection. A second device user may enter login credentials via the second device, which may then be transmitted to a backend system. A backend system may receive and validate the login credentials and, in response, transmit a public key to the second device. The public key may be transmitted in an encrypted format. A second device may receive the public key and may use the public key to perform a public/private key handshake in order to validate the first device. The handshake may then be validated by the first device and a Bluetooth and/or BLE connection may be created. |
| US11315102B2 |
Methods and systems for contactless transmission of transactional information
Embodiments described herein disclose a mobile device system for displaying contactless payment options to a user of a mobile device. A location of the device may be detected. The location may be transmitted to a payment services provider, and information indicating that the location corresponds to a merchant having contactless payment options may be received. In response, graphical depictions of payment options associated with a plurality of payment sources are displayed on a touch-sensitive display of the mobile device. A selection of one of the graphical depictions is received, and in response, one or more transceivers of the mobile device, such as one or more NFC transceivers, may be activated. The activation may cause the transceivers to transmit a personal account number to a point-of-sale terminal. Thus, the user is presented with contactless payment options based on a geographical location, and may be presented with a suggested payment source. |
| US11315101B2 |
High accuracy geo-location system and method for mobile payment
Location polygons are defined along traffic lanes and parking spaces to facilitate determination of the location of a vehicle relative to features associated with the location polygons. The location polygons are used, in one application, to identity entrance and exit of a special toll lane along a roadway, and to ensure that the vehicle properly enters and exits the tolling lane. |
| US11315099B2 |
Over the air update of payment transaction data stored in secure memory
A system, apparatus, and method for processing payment transactions that are conducted using a mobile device that includes a contactless element, such as an integrated circuit chip. The invention enables the updating, correction or synchronization of transaction data maintained by an Issuer with that stored on the device. This is accomplished by using a wireless (cellular) network as a data communication channel for data provided by an Issuer to the mobile device, and is particularly advantageous in circumstances in which the contactless element is not presently capable of communication with a device reader or point of sale terminal that uses a near field communications mechanism. Data transferred between the mobile device and Issuer may be encrypted and decrypted to provide additional security and protect the data from being accessed by other users or applications. If encryption keys are used for the encryption and decryption processes, they may be distributed by a key distribution server or other suitable entity to a mobile gateway which participates in the data encryption and decryption operations. |
| US11315097B2 |
Store system
A store system includes a server and a store terminal. The server receives data based on purchased commodities respectively input in a plurality of mobile terminals. The server stores the received data based on the purchased commodities. The store terminal acquires, from the stored data, the data based on the purchased commodity input in any one of the mobile terminals. The store terminal instructs correction of the acquired data. The server executes the instructed correction concerning the stored data. |
| US11315095B2 |
Electronic receipt management system
A distributed computer system includes a central server, a computing device of a user, and point-of-sale terminals. The central server is configured to assign a global user ID to a user and store, in association with the global user ID, local user IDs. The computing device is configured to generate and display a code symbol representing at least one user ID. A point-of-sale terminal is configured to scan the displayed code symbol and code symbols of merchandise being purchased, and generate transaction information. A local server is configured to transfer the transaction information from the point-of-sale terminal to the central server. When the transaction information includes a local user ID, a point total of the user is updated based on the transaction information and transmitted to the computing device. The central server stores the transaction information, which is received from the local server, in association with the global user ID. |
| US11315093B2 |
Systems and methods for recycling consumer electronic devices
Systems and associated methods for recycling and performing other processes with consumer electronic devices are described herein. In various embodiments, the present technology includes systems and methods for identifying and evaluating a used or pre-owned consumer electronic device, such as a mobile phone, laptop, etc. to facilitate purchasing the device. In some embodiments, the present technology includes a counter-top evaluation terminal that evaluates a device and facilitates purchase and recycling of the device. Various other aspects of the present technology are described herein. |
| US11315088B1 |
Geolocation and physiological signals for transaction initiation
A method may include collecting, in a data store, a plurality of signals associated with a user and a geographic area; calculating, using at least one processor, a satisfaction score for the user with respect to the geographic area based on the plurality of signals; querying the data store to retrieve a set of entities associated with the geographic area; generating, using the at least one processor, a respective credit allocation amount for each of the set of entities based on the satisfaction score and a user-specified allocation modality; and initiating a transfer from a user account to a set of receiver accounts according to the respective generated credit allocation amounts. |
| US11315083B2 |
Asset management method for substation
An asset management method for a substation includes deriving an optimal management plan by each element of the substation depending on integrity of the each element of the substation and deriving an optimal unique reliability model for each element of the substation through a process of compensating a reference reliability model of each substation type and an apparatus executing the method. |
| US11315081B2 |
Resource reservation system, terminal setting method, and information processing apparatus
A resource reservation system includes an information processing apparatus configured to manage reservation information of one or more resources, and an information processing terminal configured to acquire the reservation information from the information processing apparatus. The information processing apparatus includes first circuitry configured to provide information necessary for transmitting the reservation information to the information processing terminal. The information processing terminal includes second circuitry configured to receive the information provided by the first circuitry. The information processing terminal can acquire the reservation information from the information processing apparatus by using the information received by the second circuitry. |
| US11315079B2 |
Dynamic innovation enablement system
A dynamic Innovation Enablement System (IES) that utilizes a novel n-dimensional vector-based data management system, in combination with a novel user interface and novel expert system, to speed up the efficiency of computer processing and real-time user application of data for selecting user interventions that optimize outcomes within the IES. The IES is a computer-implemented system for facilitating users to develop, practice and apply competency in innovation-conducive behaviors and techniques. The system has a user system and coupled to the user system, a server system, a data store and an innovation enablement system (IES). IES has a first module that includes information to guide users through a first set of tasks directed to developing competencies in innovation. IES also has a second module that includes information to guide users through a second set of predetermined tasks, including at least two tasks that together form an innovation process that directs a user towards producing an innovation. IES also has a third module that integrates the first module and the second module, wherein information about the users, generated utilizing one of the two modules, can inform and facilitate what the users input as information when utilizing the other of the two modules. In a further aspect, the IES employs vector matrix algebra to arrive at an ideal vector correlated to an innovation outcome. |
| US11315078B2 |
Consolidated healthcare and resource management system
A technical procedure and information enhancement system comprising a multi-function colored display; a computing device having memory and processors; a touch-free gesture-responsive computer input device; computer-readable media containing computer instructions for displaying a plurality of electronic pages selected from the group consisting of a pre-procedural page, a procedure preparation page, an intra-procedural page and a post-procedural page; connection to the internet; a backup memory; a microphone; one or more video cameras situated to record the medical procedure, speakers, and an electronic signature pad. |
| US11315071B1 |
Speech-based storage tracking
Systems and methods for tracking inventory are provided herein. In some embodiments, a method for tracking inventory includes receiving weight sensor data representing a weight of a physical item in the storage unit, adding the weight of the physical item to a profile corresponding to the physical item, determining that the weight of the physical item is less than a predetermined threshold weight associated with the physical item, generating notification information associated with the physical item, and sending the notification information. In some embodiments, a method for tracking inventory includes receiving sensor data representing a location of a physical item, adding the location of the physical item to a profile corresponding to the physical item, receiving audio data representing a request for the location of the physical item, retrieving the location of the physical item from the profile, generating responsive data representing the of the physical item, and sending the responsive data. |
| US11315067B2 |
Logistical management system
Systems and methods of performing logistical management are provided. The logistical management system may receive a request to ship a package from an electronic device associated with a user. The request can include an initial location and information relating to one or more characteristics of the package. In response to receiving the request, electronic data store may be queried to determine a set of possible itineraries for the package. The set of possible itineraries can then be validated against a set of pre-determined rules to produce a subset of itineraries. One of the subset of itineraries can then be chosen. |
| US11315066B2 |
Simulating a return network
Embodiments herein describe a return network simulation system that can simulate changes in a retailer's return network to determine the impact of those changes. Advantageously, being able to accurately simulate the retailer's return network means changes can be evaluated without first making those adjustments in the physical return network. Doing so avoids the cost of implementing the changes on the return network without first being able to predict whether the changes will have a net positive result (e.g., a positive result that offsets any negative results). A retailer can first simulate the change on the return network, review how the change affects one or more KPIs, and then decide whether to implement the change in the actual return network. As a result, the retailer has a reliable indicator whether the changes will result in a desired effect. |
| US11315050B2 |
Automated scheduling assistant for a workforce management system
A system is provided for a workforce management system adapted to perform automated scheduling operations based on one or more scheduling rules. The system includes a processor and a computer readable medium operably coupled thereto, to perform the scheduling operations which include receiving, from an administrative user, parameters for a plurality of queries for a gamified survey, determining the gamified survey for the plurality of queries, wherein each of the plurality of queries further comprises an agreement level with an answer to the query, distributing the gamified survey to a first user through the workforce management system, detecting a first survey response by the first user to the gamified survey, and generating, without input from the administrative user, a first scheduling rule associated with the first user based on the first survey response. |
| US11315046B1 |
Machine learning-based disaster modeling and high-impact weather event forecasting
Machine learning-based disaster modeling and high-impact weather event forecasting are provided herein. Embodiments herein provide a flexible machine-learning platform for providing skillful forecast of severe weather (tornadoes, damaging wind gusts, and hail), tropical cyclone activity, and precipitation, with skill potentially extending to 13 months or more. |
| US11315044B2 |
Multi dimensional scale analysis using machine learning
The disclosure provides an approach for collecting system state data relating to whether certain system states overload a processor assigned to a controller of the system. The approach further involves using the collected data to train a regression machine learning algorithm to predict whether indented or desired system states will result in processor overload. Depending on the prediction, the approach takes one of several steps to efficiently change system state. |
| US11315043B1 |
Systems and methods for optimizing a machine learning model
A system for optimizing a machine learning model. The machine learning model generates predictions based on at least one input feature vector, each input feature vector having one or more vector values; and an optimization module with a processor and an associated memory, the optimization module being configured to: create at least one slice of the predictions based on at least one vector value, determine at least one optimization metric of the slice that is based on at least a total number of predictions for the vector value, and optimize the machine learning model based on the optimization metric. |
| US11315035B2 |
Machine learning in heterogeneous processing systems
Computer-implemented methods are provided for implementing training of a machine learning model in a heterogeneous processing system comprising a host computer operatively interconnected with an accelerator unit. The training includes a stochastic optimization process for optimizing a function of a training data matrix X, having data elements Xi,j with row coordinates i=1 to n and column coordinates j=1 to m, and a model vector w having elements wj. For successive batches of the training data, defined by respective subsets of one of the row coordinates and column coordinates, random numbers associated with respective coordinates in a current batch b are generated in the host computer and sent to the accelerator unit. In parallel with generating the random numbers for batch b, batch b is copied from the host computer to the accelerator unit. |
| US11315034B2 |
Intelligent big data system, and method and apparatus for providing intelligent big data service
A system comprises: a data warehouse, a storage device and a cluster including a plurality of computing nodes; the data warehouse is configured to store task data obtained from the user; at least one computing node in the cluster includes a resource scheduling component, and is configured to perform resource scheduling for the task and determine a computing node executing the task; the computing node executing the task comprises a model training component and/or a prediction component; the model training component is configured to, according to task data, invoke a corresponding type of learning model from the storage device; use sample data and training target included in the task data to train the learning model, to obtain the prediction model corresponding to the task and store the prediction model in the storage device; the prediction component is configured to obtain a prediction result output by the prediction model. |
| US11315032B2 |
Method and system for recommending content items to a user based on tensor factorization
The present teaching relates to recommending content items to a user based on tensor factorization. In one example, a request is received for recommending content items to the user. Tensor data related to a plurality of users and a plurality of content items are obtained based on the request. The tensor data is decomposed into a plurality of sub-tensors based on a prior probability distribution. At least one bound is determined for a tensor factorization model that is generated based on the prior probability distribution. One or more items interesting to the user are predicted based on the at least one bound and the plurality of sub-tensors. At least one of the one or more items is recommended to the user as a response to the request. |