| Document | Document Title |
|---|---|
| US11108694B2 |
Communication system and upload method
A communication system includes a plurality of communication terminals to transmit communication information and a communication controller. Each of the communication terminals includes: a generator to generate log information on communication between the communication terminals; a storage to store log information generated by the generator; and a transmitter to upload log information that is capable of being uploaded depending on a communication line band used for the communication information. The communication controller includes a communication management server configured to control transmission of the communication information and a log upload server, wherein the communication controller is configured to distribute the log information uploaded by the transmitter to the log upload server. |
| US11108690B2 |
Router methods and apparatus for managing memory for network overlay routes with fallback route support prioritization
A method and a router device for managing memory for network overlay routes with fallback route support prioritization may be provided. A network overlay route as a candidate network overlay route may be obtained at a router for storage in a memory. The memory may store a plurality of network overlay routes for forwarding user plane traffic in a network. An assessment for storage of the candidate network overlay route based on a priority level indicator of the candidate network overlay route may be performed. The priority level indicator may be indicative of a fallback route support level of the candidate network overlay route in the router. Based on the assessment, at least one of the following may be performed: adding the candidate network overlay route to the memory and refraining from adding the candidate network overlay route to the memory. |
| US11108687B1 |
Scalable network function virtualization service
A network function virtualization service includes an action implementation layer and an action decisions layer. On a flow of network traffic received at the service, the action implementation layer performs a packet processing action determined at the action decisions layer. |
| US11108684B1 |
Satisfying a set of services over given network resources
Techniques for satisfying a plurality of service demands in a data communication network are disclosed. Aspects include identifying a first plurality of edges, each of which connects two of a plurality of nodes in the data communication network, wherein each of the first plurality of edges is associated with one of a plurality of unprotected service demands; generating a spanning tree comprising a second plurality of edges selected from the first plurality of edges, wherein the spanning tree connects all of the plurality of nodes that are connected by the first plurality of edges; and creating a set of service links based on the generated spanning tree. |
| US11108683B2 |
Techniques for preferred path local switching in EVPN-VPWS
In one embodiment, a method includes, subsequent to receipt of a packet from a first customer network node destined for a second customer network node at a first provider network node, determining whether a local connection exists between the first provider network node and the second customer network node, the provider network node forming part of an Ethernet Virtual Private Network (“EVPN”)—Virtual Private Wire Service (“VPWS”) domain; if a local connection is determined to exist between the first provider network node and the second customer network node, determining whether the local connection has failed; if the local connection is determined not to have failed, switching the packet to the second customer network node via the local connection instead of via the EVPN-VPWS domain; and if the local connection is determined to have failed, switching the packet to the second customer network node via the EVPN-VPWS domain. |
| US11108682B2 |
Establishing entry corresponding to equal-cost paths
Methods of establishing an entry corresponding to equal-cost paths, network devices and non-transitory machine-readable storage mediums are provided. In one aspect, a network device assigns an inner label and an outer label for each of N paths configured to be equal cost with each other between the network device and a destination network device, wherein the respective inner labels corresponding to the paths are same with each other; createestablishes a FIB entry, wherein the FIB entry includes an address of the destination network device, the number of ECMP entries in an ECMP table corresponding to the paths, and the same inner label, and the number of ECMP entries in the ECMP table is equal to a preset fixed value; and assigns at least one ECMP entry for each of the paths based on the number N of the paths and the fixed value. |
| US11108681B2 |
Systems for transmitting a data stream and methods for transmitting a data stream
Disclosed herein is a system (10) for transmitting a data stream (12). The system (10) is configured to receive the data stream (12). The data stream (12) carries a plurality of orders that are destined for a market (24) configured for electronic trading. The system (10) is configured to transmit the data stream (12) carrying the plurality of orders. The system (10) is configured to process at least the plurality of orders (12) to determine trading risk information (14) indicative of trading risk. The system (10) is configured to determine if the trading risk indicated by the trading risk information (14) satisfies a trading risk condition (16). The system (10) is configured to cease transmitting the data stream (12) carrying the plurality of orders if the trading risk condition is determined to be satisfied and commenced transmitting another data stream (18) destined for the electronic market. Also disclosed herein is a method for transmitting a data stream (12). |
| US11108679B2 |
Producing deadlock-free routes in lossless cartesian topologies with minimal number of virtual lanes
An apparatus includes a network interface and a processor. The network interface communicates with a network including switches interconnected in a Cartesian topology having multiple dimensions. The processor predefines turn types of turns in the Cartesian topology, each turn traverses first and second hops along first and second dimensions having same or different respective identities, and each turn type is defined at least by identities of the first and second dimensions. The processor searches for a preferred route from a source switch to a destination switch, by evaluating candidate routes based on the number of VLs required for preventing a deadlock condition caused by the candidate route. The number of VLs required depends on a sequential pattern of turn types formed by the candidate route. The processor configures one or more switches in the network to route packets from the source switch to the destination switch along the preferred route. |
| US11108678B2 |
Inspired path computation in a network
In one embodiment, a controller in a network trains a deep reinforcement learning-based agent to predict traffic flows in the network. The controller determines one or more resource requirements for the predicted traffic flows. The controller assigns, using the deep reinforcement learning-based agent, paths in the network to the flows based on the determined one or more resource requirements, to avoid fragmentation of a flow during transmission of the flow through the network. The controller sends, to nodes in the network, assignment instructions that cause the flows to traverse the network via their assigned paths. |
| US11108677B2 |
Methods and apparatus for configuring a standby WAN link in an adaptive private network
Techniques for providing a backup network path using a standby wide area network (WAN) link with reducing monitoring. Packet loss and latency metrics are monitored for network paths in an adaptive private network (APN) connecting a first user and a second user according to control traffic operating at a first control bandwidth for each network path. A determination is made that a first network path uses a standby WAN link, has packet loss and latency metrics indicative of a good quality state, and has at least one characteristic that identifies the first network path as a backup network path. The control traffic is then reduced for the backup network path to a second control bandwidth substantially less than the first control bandwidth. The backup network path is made active when the number of active network paths is less than or equal to a minimum number. |
| US11108676B2 |
Method and system for detecting network quality based on a network fluctuation model
A method for detecting network quality includes: acquiring, by a data processing device, file download rates of a first node for files on a second node in a target time period within a pre-defined number of historical rate-collecting cycles; determining, by the data processing device, a plurality of network quality detection parameters from the first node to the second node in the target time period based on the file download rates, where the plurality of network quality detection parameters include a regular network speed, a network speed fluctuation range, and a network speed lower limit; creating, by the data processing device, a network fluctuation model from the first node to the second node in the target time period based on the plurality of network quality detection parameters and respective pre-defined weights, and providing the network fluctuation model to a central scheduling device; and detecting, by the central scheduling device, a network quality from the first node to the second node in the target time period based on the network fluctuation model. |
| US11108672B2 |
Measuring and verifying layer 2 sustained downlink maximum data rate decoding performance
Test entity for verifying user equipment (UE) device layer 2 sustained downlink maximum data rate decoding performance may send a non-access stratum message to the UE device that requests activation of a downlink-only test mode, sending a first Packet Data Convergence Protocol (PDCP) status request to the UE device, send downlink PDCP packets to the UE device during a measurement interval, receive a physical layer (PHY) hybrid acknowledge request (HARQ) acknowledgement (ACK) or non-acknowledgement (NACK) from the UE device and determine expected missed layer 1 packets based on the received PHY HARQ ACK/NACK, send a second PDCP status request to the UE device after the measurement interval, receive a PDCP status report from the UE device, and determine missed layer 2 packets from a First Missing Count (FMC) value or bitmap included in the received PDCP status report. |
| US11108671B2 |
Systems and methods for processing network traffic using dynamic memory
Systems and method for processing network traffic are provided. The network traffic includes a number of data packets representing a complete transmission which are located at a first electronic storage area. Each data packet including a data payload. A data block is generated by one or more processors according to software instructions for the received traffic. The data block includes a series of header pointers pointing to each of a series of headers and a data pointer pointing to the data payloads. |
| US11108664B2 |
Prioritized message routing
Systems, apparatuses, and methods are described for routing messages in a network. Gateways may be selectively chosen to forward messages from a user device to a network server. Gateways may forward messages based on forwarding priorities for the user device. The forwarding priorities may, for example, indicate a repeat count threshold for a quantity of times the gateway may receive a message from a particular user device before the gateway forwards the message. |
| US11108661B1 |
Apparatus and method for processing streaming data and forming visualizations thereof
A machine has a bus and a network interface circuit to receive different data streams from a network. The network interface circuit is connected to the network and the bus. A processor is connected to the bus. A memory is connected to the bus. The memory stores instructions executed by the processor to continuously increment aggregate functions associated with data parameters within the different data streams. Visualizations of the different data streams are periodically updated on different client devices connected to the network. |
| US11108653B2 |
Network service management method, related apparatus, and system
A network service management method includes receiving, by a second NFVO, a first request sent by a first NFVO; and establishing, by the second NFVO, a connection between the nested network service instance and the composite network service instance and a connection between the nested network service instance and a member instance in the composite network service instance based on the service access point instance and the information about the service access point instance, and establishing a network connection between the nested network service instance and a member instance in the nested network service instance based on the service access point instance and the information about the service access point instance. |
| US11108652B2 |
Server assisted network discovery (SAND)
Systems or methods that may be used to assist in distributed flow whereby each network element obtains information from a server so a first network element has information to determine what network element to connect with to create virtual private network tunnels associated with a virtual private network service. |
| US11108648B2 |
Information processing method in M2M and apparatus
An information aggregation method includes receiving an aggregation resource creation request, determining an identifier of an aggregated resource and an aggregation manner according to the aggregation resource creation request, creating an aggregation resource according to the determined identifier of the aggregated resource and the determined aggregation manner, where an attribute of the aggregation resource includes the identifier of the aggregated resource and the aggregation manner, and performing information aggregation according to the created aggregation resource. |
| US11108644B1 |
Data processing engine (DPE) array routing
Some examples described herein relate to routing in routing elements (e.g., switches). In an example, a design system includes a processor and a memory, storing instruction code, coupled to the processor. The processor is configured to execute the instruction code to model a communication network among switches interconnected in an array of data processing engines (DPEs), generate routes for an application on the modeled communication network, and translate the routes to a file. Each DPE includes a hardened processor core, a memory module, and one or more of the switches. Each switch includes an input or output port that is capable of being shared by multiple routes. Port(s) of each switch are modeled as respective node(s). Generating the routes includes using an A* algorithm that includes a congestion costing function based on a capacity of respective nodes in the modeled communication network and a cumulative demand for the respective nodes. |
| US11108641B2 |
Automatic switching fabric role determination system
A switching fabric role assignment system includes a plurality of switch devices coupled together in a switching fabric. A first switch device included in the plurality of switch devices receives an endhost device identification communication from an endhost device when the endhost device is connected to the first switch device. The first switch device uses the endhost device identification communication to identify an endhost device type of the endhost device and determines, based on the endhost device type, a first switch device role for the first switch device. The first switch device then transmits a first switch device role communication that identifies the first switch device role to a second switch device included in the plurality of switch devices and connected to the first switch device. The second switch device may then determine, based on the first switch device role, a second switch device role for the second switch device. |
| US11108640B2 |
Controlling devices in a decentralized storage environment
A method for controlling devices in a de-centralized storage environment comprises partitioning a plurality of devices in a network into a plurality of super-cells, wherein each super-cell comprises a subset of the plurality of devices. For each super-cell, a system controller is configured to nominate a device in the super-cell as a nucleus device, wherein the nucleus device in the super-cell controls member devices in the super-cell. The system controller is further configured to transmit commands associated with a specific task to the nucleus device and receive information from the nucleus device regarding performance of the specific task, wherein the information comprises information aggregated from the member devices of the super-cell associated with a performance of a respective portion of the specific task. |
| US11108639B2 |
Wireless device feedback for semi-persistent scheduling release
A wireless device receives RRC message(s) comprising a first configuration parameter of a first SPS configuration, a second configuration parameter of a second SPS configuration, and a third configuration parameter. The first configuration parameter may indicate a first HARQ codebook identifier. The second configuration parameter may indicate a second HARQ codebook identifier. The second HARQ codebook identifier may be the same as the first HARQ codebook identifier. The third configuration parameter may indicate a state that is mapped to the first SPS configuration and the second SPS configuration. A DCI may be received. A value of bit(s) of a HARQ process number field of the DCI may indicate the state. The wireless device may deactivate the first SPS configuration and the second SPS configuration in response to receiving the DCI. An acknowledgement may be transmitted. |
| US11108637B1 |
Wireless relay consensus for mesh network architectures
In a wireless mesh network, a leader relay transfers Remote Procedure Calls (RPCs) to follower relays that indicate leader Identifier (ID), term ID, index, log-entry, and entry command. The follower relays receive the RPCs and enter the log-entry. The leader relay commits the log-entry to a state machine. The state machine generates a mesh architecture that indicates user-access spectrum, relay-interconnect spectrum, and relay-backhaul spectrum. The leader relay transfers RPCs to the follower relays that indicate leader ID, term ID, index, commit command, and the leader mesh architecture. The follower relays receive the RPCs and commit the log-entry to their state machines which generate mesh architectures. The relays wirelessly exchange user data with user devices over the user access spectrum. The relays wirelessly exchange user data with each other over the relay-interconnect spectrum. The relays wirelessly exchange user data with other networks over the relay backhaul spectrum. |
| US11108635B2 |
Guided configuration item class creation in a remote network management platform
A system may include a database disposed within a remote network management platform, a server device disposed in the platform, and a client device. The database may contain representations of configuration items, such as computing devices and software applications associated with the managed network. The server device may provide a graphical user interface including a sequence of panes to the client device. The sequence of panes may include an identifier pane, an identification rules pane, and a reconciliation pane. Each pane may include data entry fields that are operable to define a new class of configuration item. The server device may receive, by way of the graphical user interface, a definition of the new class that uniquely identifies configuration items of a particular type using at least the attributes. The server may store, in the database, the definition of the new class. |
| US11108634B2 |
Method for deployment of a node
A method (10) for deployment of a node (2) in a wireless network (1) is provided. The method (10) is performed in the N node (2) and comprises: receiving (11) configuration data from two or more sets of nodes (31, . . . , 3N; 4) of the wireless network (1), N determining (12) a first number of nodes (31, . . . , 3N) of the first set of nodes (31, . . . , 3N) providing first configuration data and a second number of nodes (4) of the second set of nodes (4) providing second configuration data, and determining (13), based on the first and second number of nodes (31, . . . , 3N; 4), one of the first and second configuration data for use in configuration of the node (2). A node (2), a computer program and a computer program product are also provided. |
| US11108628B2 |
Linking multiple enrollments on a client device
Disclosed are various examples for facilitating enrollment of a client device into more than one management framework. A client device can be enrolled with a management service as a fully managed device. The client device can also be enrolled with the management service as a personal or bring-your-own-device (BYOD), which causes a workspace to be created on the device that is segregated from the rest of the client device. Both enrollments can be managed by a remotely executed management service. |
| US11108626B2 |
Rewriting communication headers to manage virtual networks of virtual machines
Techniques are described for providing logical networking functionality for managed computer networks, such as for virtual computer networks provided on behalf of users or other entities. In some situations, a user may configure or otherwise specify a network topology for a virtual computer network, such as a logical network topology that separates multiple computing nodes of the virtual computer network into multiple logical sub-networks and/or that specifies one or more logical networking devices for the virtual computer network. After a network topology is specified for a virtual computer network, logical networking functionality corresponding to the network topology may be provided in various manners, such as without physically implementing the network topology for the virtual computer network. In some situations, the computing nodes may include virtual machine nodes hosted on one or more physical computing machines or systems, such as by or on behalf of one or more users. |
| US11108625B2 |
Computer system and method for message routing
Message routing techniques include use of at least one controller module configured to maintain a graph. The graph defines communication relations between a plurality of message communication modules. Each communication relation defines a particular message type for a particular pair of modules. The plurality of message communication modules includes a first module configured to receive a message wherein the received message has a message type and is associated with least one pre-condition. Upon verification of an acceptance condition of the at least one pre-condition the received message is accepted if the acceptance condition is fulfilled. Upon verification of a generating condition of the at least one pre-condition, the first module generates a generated message directed to at least a second module or an external data consumer in accordance with the graph if the generating condition is fulfilled. |
| US11108623B2 |
Rapid owner selection
Systems and methods address automated ring owner selection for a ring topology network. A new ring owner may be selected based on failure of a current ring owner. The new ring owner may assume a ring ownership role by a) detecting a missing Ownership Select Message (OSM); b) detecting missing Continuity Check Protocol (CCP) messages; and c) determining that the current ring owner is an adjacent network module connected via an external link of a management network. A signal fail (SF) condition may also be present. Upon detection of adequate role changing conditions, a new ring owner may assume a ring ownership role, transmit an OSM and possibly select a new active uplink. |
| US11108622B2 |
Protocol-independent multicast designated router (PIM-DR) failover in a multi-chassis environment
Systems and methods are provided for performing a node-level redundant failover-type process with respect to the protocol-independent multicast (PIM) functionality in a multi-chassis environment. When a PIM-related failure occurs on a first network device, but otherwise it remains operational, a second network device is configured to assume responsibility for performing PIM data traffic forwarding. Upon detecting the PIM-related failure of the first network device, the second network device sends a PIM-DR failover event signal to the second network device's PIM module by loading multicast route states used by the first network device into the PIM data traffic forwarding hardware of the second network device. Upon the second network device assuming responsibility, the first network device disables its PIM data traffic forwarding functionality. |
| US11108621B1 |
Network performance metrics anomaly detection
A method for detecting anomalies in one or more network performance metrics stream for one or more monitored object comprising using a discrete window on the stream to extract a motif from said stream for a first of said network performance metric for a first of said monitored object. Maintaining an abnormal and a normal cluster center of historical time series for said first network performance metric for said first monitored object. Classifying said motif based on a distance between said new time series and said abnormal and said normal cluster center. Determining whether an anomaly for said motif occurred based on said distance and a predetermined decision boundary. |
| US11108619B2 |
Service survivability analysis method and apparatus
Embodiments of this application provide a service survivability analysis method and apparatus, and relate to the field of communications technologies, so as to shorten duration of service survivability analysis and improve efficiency of the service survivability analysis. The method includes: obtaining a link fault record and network topology information that are in a preset time period; determining a similarity between any two links in all faulty links based on fault occurrence time and fault removal time of the any two links in the link fault record and connection information of network devices on the any two links, to obtain a link similarity matrix; performing clustering on all the faulty links based on the link similarity matrix, to obtain at least one link cluster; and performing survivability analysis on services on at least two preset links based on each of the at least one link cluster. |
| US11108617B2 |
Methods, systems, and devices for provisioning an application on a network node according to movement patterns and application parameters for mobile devices
Aspects of the subject disclosure may include, for example, identifying a plurality of mobile devices implementing an application, and identifying a group of mobile devices from among the plurality of mobile devices according to a first movement pattern of the group of mobile devices. Further aspects can include identifying a first mobile edge compute (MEC) node at a first location according to a proximity threshold that does not include a MEC agent for the application, and identifying a second MEC node at a second location that includes the MEC agent for the application according to the proximity threshold. Additional aspects can include determining a first network relative performance (NRP) metric associated with a first communications between the group of mobile devices and the second MEC node. The first communications are associated with the application. Other embodiments are disclosed. |
| US11108615B2 |
Method for receiving an image signal and method for transmitting an image signal
In accordance with an embodiment of the present invention, a method for receiving a signal, comprising the estimation step for estimating time and frequency shifts that are embedded in the received signal, to cancel-out shifts, wherein the method refers to the non-commutative shift parameter space of co-dimension 2. |
| US11108612B2 |
Anti-interference signal detection and synchronization method for wireless broadband communication system
An anti-interference signal detection and synchronization method for a wireless broadband communication system. The method uses the peak value of a cross-correlation value of a received signal and a local sequence as a basis for determining signal detection and system synchronization. Because the cross-correlation value of the received signal and the local sequence is less affected by a signal-to-noise ratio and interference signals, the method can adapt to signal changes, can effectively alleviate the frame loss problem of a received signal autocorrelation based scheme under a low signal-to-noise ratio and interference condition, and also has good anti-noise and anti-interference capabilities. |
| US11108610B2 |
Multi-level voltage circuit and related apparatus
A multi-level voltage circuit and related apparatus are provided. The multi-level voltage circuit is configured to provide an average power tracking (APT) voltage to an amplifier circuit for amplifying a radio frequency (RF) signal, which can be modulated in a number of orthogonal frequency division multiplexing (OFDM) symbols. The RF signal may experience power fluctuations from one OFDM symbol to another and the multi-level voltage circuit may need to adjust the APT voltage accordingly. In examples discussed herein, when the APT voltage needs to increase from a present value to a higher future value at a predetermined effective time, the multi-level voltage circuit may start increasing the APT voltage from the present value toward the future value ahead of the predetermined effective time. As such, it may be possible to ramp up the APT voltage in a timely fashion to help improve linearity and efficiency of the amplifier circuit. |
| US11108608B2 |
Information transmission method and apparatus
An information transmission method related to the field of communications technologies includes: generating an orthogonal frequency division multiplexing (OFDM) symbol, where the OFDM symbol includes a pi/2-BPSK modulated data signal and a pi/2-binary phase shift keying (BPSK) modulated phase tracking reference signal (PTRS); and sending the OFDM symbol. This method may be applied to an uplink single carrier transmission scenario or a downlink single carrier transmission scenario. |
| US11108607B2 |
System and method for transmitting and receiving single-carrier OQAM symbols with non-nyquist transmit pulse shaping
A system and method are provided for processing symbols for transmission. A set of 2K outputs is produced that includes K real components and K imaginary components from K complex symbols. A Fourier transform operation on the 2K outputs produces 2K Fourier transform outputs. Transmit pulse shaping is applied to the 2K Fourier transform outputs. The transmit pulse shape may be Nyquist or non-Nyquist. An inverse Fourier transform operation on the J pulse shaped outputs produces an inverse Fourier transform output. In the receiver, equalization is performed to remove the effect of both the channel and the transmit pulse shape. Nyquist pulse shaping is performed by applying a Nyquist pulse shape prior to converting back to time domain. The approach avoids self-interference, even in situations where the transmit pulse shape is non-Nyquist. The transmitter is free to select a pulse shape to optimize PAPR without being concerned with interference. |
| US11108603B2 |
Frame format with dual mode channel estimation field
Certain aspects of the present disclosure provide methods and apparatus for generating frames with dual mode channel estimation fields (CEFs) that may accommodate devices with different processing capabilities. In some examples, a frame that is generated comprises a first portion for transmission on separate channels, and a second portion for transmission using channel bonding. The second portion has a training field including first complementary sequences, a first channel estimation field (CEF) including second complementary sequences, and a second CEF including one of the first complementary sequences of the training field and a subset of the second complementary sequences of the first CEF. |
| US11108601B2 |
Method for controlling gain of multi-stage equalizer of serial data receiver
The invention comprises a method for controlling a gain of a multi-stage equalizer of a serial data receiver, applied to the serial data receiver, the serial data receiver comprising the multi-stage equalizer, wherein the method comprises the steps of: Step S1, enabling the serial data receiver to receive a set of serial data; Step S2, selecting a continuous first data sequence from the set of serial data according to a preset first rule; Step S3, selecting a continuous second data sequence from the first data sequence according to a preset second rule; Step S4, extracting a predetermined bit from the second data sequence; Step S5, calculating an equalization gain identifier of the data sequence by using each predetermined bit; and Step S6, controlling the gain value of the multi-stage equalizer according to the equalization gain identifier. |
| US11108600B2 |
Systems and methods for time domain layer separation in orthogonal frequency division multiplexing-based receivers
A receiver circuit for separating a plurality of layers multiplexed in an orthogonal frequency domain multiplexed (OFDM) signal includes: a descrambling sub-circuit configured to descramble a plurality of signals received on non-adjacent subcarriers of the OFDM signal to generate a plurality of descrambled signals; an inverse fast Fourier transform sub-circuit configured to transform the descrambled signals from a frequency domain to a received signal including a plurality of samples in a time domain; and a layer separation sub-circuit configured to separate the layers multiplexed in the received signal by: defining a first time domain sampling window and a second time domain sampling window in accordance with a size of the inverse fast Fourier transform; extracting one or more first layers from the samples in the first time domain sampling window; and extracting one or more second layers from the samples in the second time domain sampling window. |
| US11108598B2 |
Transmission preemption in multi-TRP operation
Methods, systems, and devices for wireless communications are described. In a wireless communications system, multiple transmission/reception points (TRPs) may perform a joint transmission to a user equipment (UE) such that the UE may rely on demodulation reference signals (DMRSs) from the TRPs for channel estimation and data demodulation to receive the joint transmission. When TRP transmissions are punctured, which may introduce reception errors at a receiving UE, one or more TRPs may transmit unique DMRSs such that each TRP transmits a DMRS that is unique to the transmitting TRP, transmit DMRSs that are unique to punctured resource elements (REs), or determine to refrain from transmitting on punctured REs. In some cases, TRPs may transmit preemption indications (PIs) to a UE, where the PIs may indicate punctured (e.g., or not utilized) REs to allow the UE to utilize a unique DMRS for channel estimation or to ignore the punctured REs. |
| US11108595B2 |
Systems and methods for providing a global virtual network (GVN)
Systems and methods for managing a global virtual network connection between an endpoint device and an access point server are disclosed. In one embodiment the network system may include an endpoint device, an access point server, and a control server. The endpoint device and the access point server may be connected with a first tunnel. The access point server and the control server may be connected with a second tunnel. |
| US11108591B2 |
Transporting fibre channel over ethernet
Methods and apparatus for the Transporting of Fibre Channel data over Ethernet are disclosed. In one embodiment of the invention, Fibre Channel data frame and primitive signals are transported over Ethernet instead of using the Fibre Channel FC-1 and FC-0 protocols. This allows less expensive Ethernet equipment and devices to transport and perform services for Fibre Channel connected devices without having a physical Fibre Channel interface. The ability to provide Fibre Channel services and functions without having a physical Fibre Channel interface allows existing Ethernet equipment to be placed into service as SAN components without modification. |
| US11108587B2 |
Building management system with space graphs
A building system for operating a building and managing building information causes one or more processors to receive building data from one or more building data sources, generate relationships between entities based on the building data, wherein the relationships comprises a pair of relationships between a first entity and a second entity of the entities representing two different types of relationships, wherein the pair of relationships comprises a first relationship between the first entity and the second entity and a second relationship between the second entity and the first entity, and update a space graph by causing the space graph to store nodes representing the entities and edges between the nodes representing the relationships, wherein the space graph is a graph data structure. |
| US11108586B2 |
Infotainment apparatus of vehicle, and control method for the same
An infotainment apparatus of a vehicle includes: a communication device configured to receive relative location information of an Internet of Things (IoT) device included in a predetermined space from an external device; a controller configured to generate a virtual space based on the relative location information of the IoT device, generate an icon of the IoT device, dispose the icon of the IoT device in the virtual space, generate a Graphic User Interface (GUI) of the virtual space in which the icon of the IoT device is located; and a display configured to display the GUI of the virtual space. |
| US11108583B2 |
Collaborative learning and enabling skills among smart devices within a closed social network group
Methods and systems for collaborative learning and enabling skills among smart devices within a closed social network group are disclosed. A method includes: receiving, by a computing device from a first smart device, a request for steps to perform an activity; determining, by the computing device, the steps to perform the activity using a knowledge corpus; translating, by the computing device, the steps into a format that is compatible with the first smart device; and sending, by the computing device, the translated steps to the first smart device. |
| US11108582B2 |
Interactive weather advisory system
A method for providing information to a plurality of vendors located remotely from a broadcast network. A plurality of user-defined parameters are received by a user input database with at least one of the user-defined parameters including a user profile. Each of the user profiles includes a user identifier code identifying a communicator device associated with a particular user. Real-time data indicative of the spatial locations of the communicator devices is received by a communicator location database. Search information is received independently from a plurality of vendors and a data set is generated for each vendor. |
| US11108581B1 |
Group contact lists generation
Systems, methods, devices, computer readable media, and other various embodiments are described for group contact lists generation based on modified user contacts. One embodiment involves receiving, at a server computer from a client device, a plurality of contacts, the plurality of contacts each associated with a respective contact digital interface of plurality of contact digital interfaces, identifying a first set of contacts in the plurality of contacts that include a modification to each of a respective contact digital interface. In some embodiments, the server computer includes generating a first group contact interface comprising the modification, generating a new group contact list that comprises the first set of contacts, associating the first group contact interface with the new group contact list, and causing the first group contact interface to be displayed by the client device. |
| US11108578B1 |
Method for managing collaborative playlists
A method for managing collaborative playlists includes providing indication regarding one or more available collaborative guidance controls for a playlist created by a first user of a plurality of users of a content sharing platform, wherein the playlist comprises content items hosted by the content sharing platform. The method also includes receiving a user selection of the first user regarding one of the one or more collaborative guidance controls for the playlist, wherein the selected collaborative guidance control is to provide a theme for user suggestions for the playlist, and wherein a number of user suggestions from a particular user is limited based on a number of content items previously suggested by the particular user that have been added to the playlist. The method further includes receiving a user suggestion of a second user of the plurality of users regarding an additional content item hosted by the content sharing platform for addition to the playlist, determining a number of content items previously suggested by the second user that have been added to the playlist, and responsive to determining that the number of the added content items that were previously suggested by the second user is below a predefined maximum number, adding the additional content item to the playlist for consumption by the plurality of users via the plurality of user devices. |
| US11108574B2 |
Technologies for switch link and ply management for variable oversubscription ratios
Technologies for switch link and ply management for variable oversubscription ratios include powering up and down links of one or more network plys according to bandwidth demand, desired oversubscription ratio and/or other parameters. Telemetry data representing one or more network traffic metrics of one or more switch plies is monitored to determine respective power states of the plurality of links associated with the one or more switch plies as a function of a desired oversubscription ratio calculated based on the telemetry data. The respective power state of the plurality of links is set accordingly. |
| US11108571B2 |
Managing communications among consensus nodes and client nodes
Implementations of the present disclosure include generating, by a consensus node, a certificate signing request (CSR); sending the CSR to a first certificate authority (CA); receiving a first public key certificate of the consensus node from the first CA, and a first one or more public key certificates issued by a first one or more CAs. The consensus nodes also sends the CSR to a second CA, receives a second public key certificate of the consensus node from the second CA, and a second one or more public key certificates issued by a second one or more CAs. The consensus node further configures a first truststore including the first public key certificate and the first one or more public key certificates, and a second truststore including the second public key certificate and the second one or more public key certificates. |
| US11108569B2 |
Renewable traitor tracing
A system, method, and computer program product to renewably prevent traitors in a broadcast encryption system from re-using compromised keys. A license agency assigns individual receivers a set of Sequence Keys preferably at manufacture, and assigns Sequence Key Blocks (SKBs) to protected content files to be distributed. The files may be distributed on prerecorded media and typically include several file modifications. The particular modifications in a pirated version of a file can help identify which traitors contributed to its theft. SKBs assigned to new files distributed after traitors have been identified cannot be usefully processed using the compromised keys employed in previous content piracy. Innocent receivers that happen to have compromised key(s) in common with traitors can use a replacement uncompromised Sequence Key from the set to usefully decrypt content. Traitors will however step through all their Sequence Keys without reaching one that will work. |
| US11108561B2 |
Techniques for secure blockchain routing
Described herein are systems and methods for providing secure blockchain routing utilizing an extended blockchain protocol. In some embodiments, a blockchain routing node may join an overlay network including a plurality of blockchain routing nodes. The blockchain routing node may receive a plurality of forwarding tables from the plurality of blockchain routing nodes in accordance with an extended blockchain protocol. The blockchain routing node may determine a routing table for the overlay network based at least on part on the plurality of forwarding tables. In some embodiments, the blockchain routing node may route a payload message to a destination blockchain routing node in the overlay network in accordance with the determined routing table. |
| US11108552B1 |
Data encryption method and system
Plaintext data is encrypted and decrypted using a symmetric encryption algorithm that generates a sequence of pseudorandom values from a cryptographic key. A portion of the sequence of pseudorandom values is discarded. For example, in an embodiment, each value in the sequence of pseudorandom values is truncated by a number of bits. Encryption and decryption is performed by combining plaintext or ciphertext with the truncated sequence of pseudorandom values. In an embodiment, the combination is made by performing a bitwise exclusive or operation between the truncated pseudorandom values and the plaintext or ciphertext. In an embodiment, a number of bits discarded from each value is encoded into a message authentication code which is provided with any resulting ciphertext. |
| US11108546B2 |
Biometric verification of a blockchain database transaction contributor
A blockchain database employs cryptography and other methods to implement and protect a distributed, publicly-amendable ledger. Transactions in a blockchain ledger are intentionally anonymous; however, there are cases where it would be useful to be able to verify or disprove a claim of identity of a contributor of a blockchain transaction. Biometrics can be used to link a human being to digital information using their unique physical traits in a way that is analogous to a handwritten or digital signature. An exemplary embodiment disclosed herein describes methods to create and store data in a blockchain transaction such that it can be used in the future to biometrically verify the identity of the contributor of the transaction, and use encoded biometric data to determine whether the blockchain transaction was created or not created by a particular individual. |
| US11108540B2 |
Securing cluster communications in a non-secure network
Secure communications are established in a non-secure environment between virtual machines configured as nodes of a virtual machine cluster having a virtual scale-out architecture without user intervention. When a new virtual cluster node is automatically and dynamically created and deployed by a virtual cluster master node, the master node embeds in a common image from which the new node is created an initial secret key for establishing initial trusted communications between the new node and the master node. The master node then passes a permanent secret key to the new node, opens an OpenSSL connection for creating a public key infrastructure, and signs the new node's CSR with its own public and private keys and sends the signed certificate to the new node. |
| US11108538B2 |
Clock data recovery
A circuit includes a voltage-controlled oscillator (VCO) and a frequency divider. The frequency divider input is coupled to the VCO output. The circuit further includes a phase-frequency detector (PFD). A control output of the PFD is coupled to the VCO. A first PFD input is coupled to a first frequency divider output, and a second PFD input is coupled to a second frequency divider output. The first frequency divider output is configured to provide a first frequency divider signal and the second frequency divider output is configured to provide a second frequency divider signal 90 degrees out of phase with respect to the first frequency divider signal. The PFD is configured to detect an occurrence of at least two edges of a signal on the data input while the second frequency divider signal is continuously logic high across the at least two edges. |
| US11108536B1 |
Method and apparatus for performing clock and data recovery (CDR)
A method for implementing an efficient clock recovery for multilane high-speed Serializer/Deserializer (SerDes) system having M interleaved lanes, has a non-recursive architecture. |
| US11108534B2 |
Method and device for service time division multiplexing
A method and device for transmitting a service are disclosed. A terminal device receives position information of specific radio frames in a time unit, and position information of a specific subframe in each of the specific radio frames in the time unit from a base station. Every 2m radio frames in the time unit include one specific radio frame, the position information of the specific radio frames in the time unit comprises a value of a period of the specific radio frames in the time unit, and a length of the period is 2m radio frames, where m is a nonnegative integer. The terminal device receives the service carried in the specific subframe in one or more of the specific radio frames from the base station in accordance with the position information of the specific radio frames and the position information of the specific subframe. |
| US11108524B2 |
Method and device in UE and base station used for wireless communication
The present disclosure discloses a method and a device in a User Equipment (UE) and a base station used for wireless communication. The UE receives a first signaling, the first signaling being used for indicating a first time-frequency resource group, the first time-frequency resource group being reserved for a first bit block; and receives a second signaling, the second signaling being used for indicating a second time-frequency resource group, the second time-frequency resource group being reserved for a second bit block. Whether the first time-frequency resource group and the second time-frequency resource group belong to a same resource subset of G resource subsets is used for determining whether the first bit block and the second bit block are respectively transmitted in the first time-frequency resource group and the second time-frequency resource group or are both transmitted in a third time-frequency resource group. |
| US11108523B2 |
Methods and systems for determination of type of system information
The present disclosure introduces a method implemented at a user equipment. The method includes: determining, within a physical downlink control channel, one or more bits of a downlink control information that indicates a corresponding physical downlink shared channel carrying a remaining minimum system information or other system information. A user equipment and a corresponding network node are also introduced. |
| US11108522B2 |
Distinguishing reference signals in a beam-based communication system
A user equipment (110), UE, receives (410), on a frequency carrier (200), a plurality of beams (130a, 130b). Each beam (130a, 130b) comprises a corresponding reference signal (210a, 210b). The UE (110) identifies (420) resources of the frequency carrier (200) carrying the corresponding reference signals (210a, 210b) and transmits (430) a report (310) comprising an indication of the resources on which the corresponding reference signals (210a, 210b) were carried. The access node (120a) receives (510) the report (310) from the UE (110) and identifies (520) a given access node (120a, 120b) based on the indication of the resources on which the corresponding reference signals (210a, 210b) were carried. |
| US11108520B2 |
Reference signal transmission method and apparatus
This application discloses a reference signal transmission method and apparatus. The method includes: generating one or more OFDM symbols, where at least one OFDM symbol includes a PTRS resource block, the PTRS resource block includes at least two of three sequences: a PTRS sequence of Y elements, X elements after the PTRS sequence, and Z elements before the PTRS sequence, and the PTRS resource block occupies a plurality of consecutive resource elements REs, where X, Y, and Z are all integers; and sending the one or more OFDM symbols. According to the foregoing method and apparatus, inter-carrier interference is reduced, thereby improving spectral efficiency. |
| US11108518B2 |
Apparatus and method for transmitting reference signal in wireless communication system
Disclosed are: a communication technique for merging, with IoT technology, a 5G communication system for supporting a data transmission rate higher than that of a 4G system; and a system therefor. The disclosure can be applied to intelligent services (for example, smart home, smart building, smart city, smart car or connected car, healthcare, digital education, retail, security, and safety related services, and the like) on the basis of 5G communication technology and IoT-related technology. According to the disclosure, a terminal of a communication system can transmit, to a base station, information related to a mobile characteristic or a channel time-varying characteristic, receive information related to reference signal transmission from the base station, generate a reference signal on the basis of the information related to reference signal transmission, and transmit the reference signal to the base station. |
| US11108510B2 |
Communication channel calibration for drift conditions
A method and system provides for execution of calibration cycles from time to time during normal operation of the communication channel. A calibration cycle includes de-coupling the normal data source from the transmitter and supplying a calibration pattern in its place. The calibration pattern is received from the communication link using the receiver on the second component. A calibrated value of a parameter of the communication channel is determined in response to the received calibration pattern. The steps involved in calibration cycles can be reordered to account for utilization patterns of the communication channel. For bidirectional links, calibration cycles are executed which include the step of storing received calibration patterns on the second component, and retransmitting such calibration patterns back to the first component for use in adjusting parameters of the channel at first component. |
| US11108509B2 |
Methods for transmitting and receiving acknowledgment information between terminal and base station in wireless communication system, and devices for supporting same
Disclosed are a method whereby a terminal transmits acknowledgement information to a base station in a wireless communication system, and a device therefor, characterized by: receiving N pieces of downlink data (N is a natural number), wherein one piece of downlink data comprises M transmission blocks (TBs) (M is a natural number), and one TB comprises L code block groups (CBGs) (L is a natural number); bundling acknowledge information on the total number N*M*L of CBGs, comprised in the N pieces of downlink data, into an X-bit size (X is a natural number greater than or equal to 1 and less than N*M*L) on the basis of a predetermined rule; and transmitting the bundled acknowledgement information in the X-bit size to the base station. |
| US11108508B2 |
Applying more robust transmission procedure
It is provided a method performed in a network node of a cellular network also comprising a wireless device, the wireless device being in a discontinuous reception mode comprising receiving periods and idle periods. The method comprises the steps of: transmitting a first control signal to the wireless device during a receiving period for the wireless device; determining that a first control signal is likely to have failed to be correctly received by the wireless device; determining that a second control signal needs to be transmitted to the wireless device, the second control signal corresponding to the first control signal; applying a more robust transmission procedure for the second control signal compared to a corresponding transmission procedure for the first control signal; and transmitting the second control signal to the wireless device. |
| US11108506B2 |
Indicating retransmitted codeblock groups in 5G wireless communication systems
Various embodiments disclosed herein provide for a retransmission system that uses a hybrid system to signal to a receiver the retransmission of codeblock groups to reduce network overhead and bandwidth. The amount of bandwidth needed to signal to a receiver which codeblock groups are being retransmitted is directly proportional to the number of codeblock groups. Therefore, during retransmission, if the number of a codeblock groups is below a predetermined threshold, then explicit signaling can be performed, where the transmitter sends a bit map identifying the codeblock groups being retransmitted. If the number of codeblock groups is above the threshold however, can use a codeblock group confirmation bit in the control information sent to the receiver, where the values of the bit can inform the receiver how the retransmission will be performed. |
| US11108504B2 |
Terminal, radio base station, and radio communication method for communicating
A user terminal includes: a transmitter that transmits delivery acknowledgement signals (HARQ-ACKs); a receiver that receives downlink control information including: in one or more predetermined subframes of the downlink control information, first information that indicates a total number of cells to be subjected to downlink (DL) transmission scheduling, and second information that indicates a cumulative number of cells; and a processor that performs control so that the HARQ-ACKs are transmitted in predetermined uplink (UL) subframes based on the first information and the second information. The HARQ-ACKs are transmitted in response to DL signals transmitted from a plurality of cells. The plurality of cells include cells that use Time Division Duplex (TDD). A value of the first information is the same in each of the one or more predetermined subframes, and the processor updates the first information on a per subframe basis. |
| US11108500B2 |
Latency reduction by fast forward in multi-hop communication systems
Latency reduction by fast forward (FF) in multi-hop communication device and/or systems is disclosed. Packets may be received and forwarded using a codeword (CW)-based approach with and/or without per-CW CRC. A FF session may have a flow ID and packets may have sequence numbers. Packets targeted for FF may be divided into independently decodable CWs that may be transmitted in the next hop, for example, as soon as the destination is determined without waiting for an entire packet's arrival and/or for CRC verification. Low latency (e.g. FF) traffic may be indicated. CW-based FF may be extensible for an e2e RAN path from a WTRU to the last access node in a RAN. Intermediate metrics, a packet CRC and/or a per-CW CRC may be utilized for data integrity. HARQ and/or CW retransmission procedures may be implemented between network nodes for error handling. |
| US11108490B2 |
Systems and methods for carrier phase recovery
A digital receiver is configured to process a polarization multiplexed carrier from a communication network. The polarization multiplexed carrier includes a first polarization and a second polarization. The receiver includes a first lane for transporting a first input signal of the first polarization, a second lane for transporting a second input signal of the second polarization, a dynamic phase noise estimation unit disposed within the first lane and configured to determine a phase noise estimate of the first input signal, a first carrier phase recovery portion configured to remove carrier phase noise from the first polarization based on a combination of the first input signal and a function of the determined phase noise estimate, and a second carrier phase recovery portion configured to remove carrier phase noise from the second polarization based on a combination of the second input signal and the function of the determined phase noise estimate. |
| US11108489B1 |
Reducing connection validation (CV) time in an optical node
Systems and methods for conducting various types of Connection Validation (CV) are provided for reducing the overall CV scan time of regular CV scans. A method, according to one implementation, includes a step of receiving a request to perform a focused CV on one or more communication cables after the one or more communication cables are physically connected or reconnected into a portion of a network. The method also includes the steps of interrupting an ongoing CV running in the portion of the network and executing the focused CV to target a CV scan on the one or more communication cables. |
| US11108487B2 |
Method and apparatus for design of NR-SS burst set
A method of a user equipment (UE) in a wireless communication system comprises receiving, from a base station (BS), at least one physical broadcasting channel (PBCH) symbol containing resource elements (REs) mapped for at least one demodulation reference signal (DMRS) sequence over a downlink channel; and determining DMRS REs included in the at least one PBCH symbol, wherein a synchronization signal (SS) block hypotheses is carried in the at least one DMRS sequence that is mapped into the DMRS REs, and wherein the SS block hypotheses includes at least full or partial SS block indices. |
| US11108485B2 |
Clock synchronization method and apparatus
A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps. |
| US11108482B2 |
Enhanced radio systems and methods
An enhanced radio system is disclosed that provides for the capture and playback of one or more radio stations. A user may tune to a station, scan through stations, rewind through missed content (even while the system is off), and fast-forward through undesired content, while downloading and uploading audio content, and sending content to another user. A user may rate content, and be notified when that content is played on any station, with undesirable content skipped and desirable content saved, or station recommendations made. Support for multiple sets of configuration information to allow use by multiple listeners and in multiple locations may be provided. Optionally provided are security features to prevent the unauthorized downloading, uploading, and saving of copies of content, other radio related and content related information, a karaoke mode, integration with a telephone with the radio, or reporting usage information to a collection facility. |
| US11108478B2 |
Geographic information-based simulation test system for medium-high frequency communication channels
The present invention discloses a geographic information-based simulation test system for medium-high frequency communication channels, comprising a human-machine interface module, a geographic information processor, a ground wave signal simulation processing module, a sky wave signal simulation processing module, a digital map, an ambient noise generation module, a time generator, and an simulation signal synthesizer. A ground wave transmission signal and a sky wave transmission signal are respectively simulated according to a ground wave transmission path and a sky wave transmission path; and finally, the ground wave simulation signal, the sky wave simulation signal, and the ambient noise signal are synthesized and sent to a medium-high frequency receiver. By means of the geographic information-based simulation test system for medium-high frequency communication channels, the test cost of the medium-high frequency communication system and device can be reduced, the signals that may be actually received by the medium-high frequency receiver at any location in any period of a year can be simulated quickly, thereby greatly increasing the test speed of the medium-high frequency communication system and device. |
| US11108473B2 |
Methods for terminal-specific beamforming adaptation for advanced wireless systems
A method of user equipment (UE) in a wireless communication system is provided. The method comprises providing an indicia to instruct placement of the UE in a beam training condition, in response to identifying placement of the UE in the beam training condition, performing a beam codebook training including identifying beam usage rate statistics, and generating a beam codebook for a beam generation of an antenna array of the UE for the beam training condition based on the identified beam usage rate statistics, the beam codebook including a UE-specific sub-codebook. |
| US11108471B2 |
System and method for data transmission via acoustic channels
The present invention relates to transmitting data using vector sensors and via the vector components of the acoustic field. The data can be received via vector sensors and/or scalar sensors and/or arrays of such sensors. |
| US11108469B2 |
Mode demultiplexing hybrid apparatus, methods, and applications
A mode demultiplexing hybrid (MDH) that integrates mode demultiplexing, local oscillator power splitting, and optical 90-degree hybrid using multi-plane light conversion (MPLC). Reflective cavity and transmissive systems are disclosed. The MDH may fine advantageous application as the optical front end for a coherent receiver in a space-division multiplexing (SDM) system. |
| US11108466B2 |
Electronic equipment
The present disclosure discloses an electronic equipment. The electronic equipment includes a transmission component, a reception component, and a functional component. The transmission component is configured to transmit signals of a specific type into a surrounding environment of the electronic equipment. The reception component is configured to receive signals of the specific type from the surrounding environment of the electronic equipment. The functional component is located between the transmission component and the reception component to reduce a size of the electronic equipment. Further, the transmission component and the reception component are located with a distance in a first direction. The transmission component, the functional component, and the reception component are arranged along the first direction. |
| US11108462B2 |
Systems and methods for skew detection and pre-compensation in a coherent optical system
A skew compensation system for a coherent optical communication network includes a transmitter modulator having a first driver input for receiving a first signal from a first channel, a second driver input for receiving a second signal from a second channel, a source input for receiving a continuous wave source signal, and a modulation output in communication with an optical transport medium of the network. The system further includes a tunable delay line disposed between the second channel and the second driver input for inserting a pre-determined training sequence onto the second signal prior to the second driver input, and a processor for determining a skew amount between the second signal at the second driver input and the first signal at the first driver input, calculating a pre-compensation value corresponding to the skew amount, and reducing the skew amount at the modulation output according to the pre-compensation value. |
| US11108456B2 |
Module for generating options for radio signals reception
A module for generating signal-reception options, the module being configured to receive at least one signal transmitted by at least one antenna; the generating module including at least one group of mixers and at least one input module; the at least one group of mixers including a number Y of mixers in which Y is an integer equal to or higher than 1; the at least one input module being coupled to the at least one group of mixers and configured to deliver a number Z of reception options available to receive the at least one signal, the number Z being determined depending at least on the number Y and/or on a number of types of signals received by the at least one group of mixers. |
| US11108455B2 |
Antenna geometries for improved MIMO communication
A method for selecting a geometry of an antenna array in a multiple-input multiple-output, MIMO, radio communication system (100), the method comprising; obtaining a first parameter set comprising a first communication distance D1 and a first carrier frequency f1, and a second parameter set comprising a second communication distance D2 and a second carrier frequency f2, determining a first radio communication performance measure based on the first parameter set in dependence of antenna array geometry, and a second radio communication performance measure based on the second parameter set in dependence of antenna array geometry, and selecting the antenna array geometry based on the first radio communication performance measure and on the second radio communication performance measure. |
| US11108454B2 |
Methods for adapting density of demodulation reference signals
According to an aspect, a wireless node selects a set of reference signal antenna ports for use in transmitting data to other wireless nodes in a given transmit time interval, from a plurality of sets of reference signal antenna ports that are available for use and that include reference signal antenna ports having different reference signal densities in the frequency and/or time dimension. The wireless node sends a message to a second wireless node indicating a reference signal assignment and including an indication of the selected set of reference signal antenna ports. |
| US11108453B2 |
Antenna configuration parameters
This disclosure describes systems, methods, and devices related to antenna configuration parameters. A device may determine one or more antennas having one or more phases. The device may determine a first delay associated with a first antenna of the one or more antennas. The device may determine a second delay associated with a second antenna of the one or more antennas. The device may cause to send a frame to a first station device using the first antenna, wherein the frame comprises a first indication of the delay associated with the first antenna and a second indication of the delay associated with the second antenna. |
| US11108450B2 |
Beam measurement method and apparatus
Disclosed are a beam measurement method and apparatus. The method comprises: a terminal measuring at least one beam according to measurement configuration information, wherein the measurement configuration information is used for measuring the at least one beam; and the terminal determining a target beam and/or a target cell according to a measurement result of the at least one beam, wherein the target beam and/or the target cell is (are) a beam and/or a cell in which the terminal can reside. By a terminal determining a target beam and/or a target cell in which the terminal can reside according to a measurement result of at least one beam, a network side device is not required to determine the target beam and/or the target cell in which the terminal can reside for the terminal, thereby reducing the burden on the network side device. |
| US11108449B2 |
Radio communication apparatus, radio communication system and radio communication method
A radio communication apparatus is described that includes a reception antenna, a converter, a calculator, and a separator. The reception antenna receives a mixed signal including two or more backscatter signals respectively transmitted from two or more tag devices and the converter converts the mixed signal into complex data on a complex plane. The calculator calculates phase angles of carrier waves of the two or more backscatter signals to approximate the phase angles into a complex data sequence of a predetermined length, and generates a projector matrix formed of a combination of the phase angles of carrier waves of the two or more backscatter signals. The separator separates the two or more backscatter signals from the mixed signal based on an inverse matrix of the projector matrix and the complex data sequence. |
| US11108448B2 |
Signal generating method and signal generating device
A transmission method of simultaneously transmitting a first modulated signal and a second modulated signal at a common frequency performs precoding on both signals using a fixed precoding matrix and regularly changes the phase of at least one of the signals. One of signal generation processing in which phase change is performed and signal generation processing in which phase change is not performed is selectable, thereby improving general versatility in signal generation. |
| US11108447B2 |
Spatio-temporal precoding for faster-than-Nyquist signal transmissions
The invention provides a method and device for sending K data messages simultaneously from a data transmission device to K receivers, over a Multiple Input Single Output, MISO, channel. The transmitter uses a Faster-than-Nyquist signaling rate. By making use of spatio-temporal channel interference model at the transmitter, the benefits of FTN in terms of effective rate and energy efficiency do not come at the expense of increased receiver complexity. |
| US11108445B2 |
Methods and arrangements for signaling control information in a communication system
The invention relates to devices and methods for signalling control information associated with transmission of data over a wireless channel. A second communication device receives (S2) data from a first communication device, wherein the data comprises an indication of recommended precoders and a recommendation of a first transmission rank to possibly use during transmission. The second communication device determines (S4) a second transmission rank to use for transmitting data, and transmits (S6) a confirmation message to the first communication device. The confirmation message comprises a confirmation that transmission of data from the second communication device is using at least parts of each recommended precoder associated with a frequency resource that falls within the transmission of data and an indicator of the second transmission rank to use. |
| US11108442B1 |
Calibration and implicit sounding using multi user multiple input multiple output transmissions
Methods, systems, and devices for wireless communication are described. A wireless device may determine that a channel is reciprocal and perform an implicit sounding process. During the implicit sounding process, the wireless device may estimate the uplink channel by measuring a first uplink multi-user multiple input multiple output (MU-MIMO) transmission. The wireless devices may then update the uplink channel estimation based by measuring a second MU-MIMO transmission that is received after a downlink transmission from the wireless device. Based on the updated uplink channel estimation, the wireless device may send a beamformed MU-MIMO transmission to a number of other wireless devices. |
| US11108441B2 |
System and method for beam switching and reporting
A UE may receive, from a base station, a message requesting BSI. The UE may determine a number N of BSI reports to send to the base station, and each BSI report may indicate a beam index corresponding to a beam and a received power associated with the beam. The UE may send, to the base station, N BSI reports based on the message requesting BSI. The UE may receive, from the base station, a set of signals through a set of beams, and determine the received power for each signal of the set of signals received through each beam of the set of beams, each received power may be associated with a beam of the set of beams. |
| US11108437B1 |
Near-field communications device
One example discloses a near-field device, including: a conductive housing physically coupled to the near-field device; a near-field antenna, having a first feed point and a second feed point, and including, a first inductive coil having a first end coupled to the first feed point, a second end coupled to the second feed point, and a connection point; a conductive plate capacitively coupled to the conductive housing, and coupled to the first end of the first inductive coil; a tuning circuit; a reference potential; wherein another end of each of the capacitance banks and another end of each of the resistance banks are coupled to the reference potential; wherein the connection point is galvanically coupled to the reference potential; and wherein the conductive housing is galvanically coupled to the reference potential. |
| US11108433B2 |
Single side band transmission over a waveguide
Embodiments herein may relate to an interconnect that includes a transceiver, wherein the transceiver is configured to generate a single side band (SSB) signal for communication over a waveguide and a waveguide interconnect to communicate the SSB signal over the waveguide. In an example, an SSB operator is configured to generate the SSB signal and the SSB signal can be generated by use of a finite-impulse response filter. Other embodiments may be described and/or claimed. |
| US11108432B2 |
Device and method for estimating interference and radiofrequency communication system
A method comprises: Determining a set of all possible configurations of occupation or non-occupation of set of transmission bands, defined as a set of possible vectors satisfying at a time instant a non-overlapping condition of said radiofrequency system, said non-overlapping condition corresponding to the fact that only one interferer, among a set of possible interferers, can be active at a same time on each channel of said set of channels and forming, with contiguous channels, a transmission band, Obtaining measurements of occupation of at least a part of said set of channels, at respective tune instants, Performing probabilities calculations so as to determine, for each transmission band, an estimated activation rate, on the basis of said measurements, said estimated activation rate corresponding to an occupation rate of a transmission band by an interferer within said given observation time window. |
| US11108428B2 |
Reference signal distribution in multi-module systems
Systems of multiple transmitters and multiple receivers, allowing receivers to identify the transmitters from which reference signals originate. Identification is according to frequency offset patterns based on transmitter and local oscillator frequencies, and is particularly suitable in radio-frequency integrated-circuit devices and MIMO radar systems. |
| US11108427B2 |
Electronic device and antenna switching method thereof
Methods and devices for antenna switching are provided. A wireless signal is transmitted and received through a specific antenna module among a plurality of antenna modules. Status information about each of one or more other antenna modules among the plurality of antenna modules is acquired, when a temperature of the specific antenna module exceeds a predetermined value. The temperature of the specific antenna module is measured through a respective sensor module of a plurality of sensor modules. Each sensor module of the plurality of sensor modules is contained in or disposed adjacent to a respective antenna module of the plurality of antenna modules. The specific antenna module is switched to an antenna module selected from among the one or more other antenna modules, based on the acquired status information. |
| US11108425B1 |
Pause control for a calibration sequence
A calibration control component within a transmit (TX) or receive (RX) device executes a calibration sequence to ensure reliable data transmission and reception within the device. The calibration sequence comprises a set of calibration functions that are sequentially executed. The calibration control component detects a pause function being enabled based on a pause function configuration register. Based on detecting the pause function being enabled, the calibration control component pauses execution of the calibration sequence. |
| US11108424B2 |
Accessory device with communication features
Accessory devices are described herein. An accessory device may include a receptacle for receiving an electronic device. The accessory device may include a case that covers the housing of the electronic device, or a folio that additionally includes a cover can conceal the display of the electronic device. Accessory devices described herein further include wireless circuitry used to communicate with wireless circuitry in the electronic device. The wireless circuitry can be used for various functions and features. For instance, the wireless circuitry in the accessory device can respond to authentication requests from the electronic device, and/or to send authentication requests to the electronic device. Further, the wireless circuitry in the accessory device can send information to the electronic device. Such information may include properties of the accessory device, or information stored on the accessory device that is presented on a display of the electronic device. |
| US11108419B2 |
System and method for nonlinearity estimation with reference signals
A transmitter may be configured to generate a reference signal having a non-constant envelope for nonlinearity estimation by a receiver. The transmitter may transmit the reference signal. A receiver may be configured to receive, from the transmitter, the reference signal having the non-constant envelope. The receiver may estimate at least one nonlinearity characteristic based on the reference signal having the non-constant envelope. The receiver may transmit feedback based on the at least one nonlinearity characteristic and/or perform at least one digital post distortion (DPoD) operation based on the at least one nonlinearity characteristic. |
| US11108418B2 |
Electronic device for performing carrier aggregation using plurality of carrier frequencies via switch and operating method thereof
An electronic device and method for supporting carrier aggregation are provided. An electronic device may include a communication circuit including a plurality of local oscillators; and a processor configured to determine an operation mode of at least one local oscillator among the plurality of oscillators based on at least one of a number of uplink carriers and a number of downlink carriers; and control the at least one local oscillator to operate based on the determined operation mode. |
| US11108411B2 |
Polar coding with dynamic frozen bits
The present application concerns an encoding device comprising a FC 11 configured to generate m FC-output-bit-sequences by executing m polar encoding steps upon m FC-input-bit-sequences that comprise frozen and unfrozen bits, wherein m≥2. In an i-th polar encoding step of the m polar encoding steps at least one frozen bit is based on at least one unfrozen bit. The present application also concerns a decoding device comprising a processor configured to decode successively a polar-coded-bitstream comprising m-polar decoding steps, wherein m≥2. In an i-th polar decoding step of the m polar decoding steps at least one frozen bit is based on at least one unfrozen bit. Further, the present application concerns also correspondingly arranged encoding and decoding methods. |
| US11108406B2 |
System, apparatus and method for dynamic priority-aware compression for interconnect fabrics
In one embodiment, an apparatus includes: a compression circuit to compress data blocks of one or more traffic classes; and a control circuit coupled to the compression circuit, where the control circuit is to enable the compression circuit to concurrently compress data blocks of a first traffic class and not to compress data blocks of a second traffic class. Other embodiments are described and claimed. |
| US11108403B2 |
Device and method for efficient digital-analog conversion
A device for converting a digital input signal into an analog output signal is provided. The device includes a first digital to analog converter configured to generate a first analog signal, and a second digital to analog converter configured to generate a second analog signal. The device further includes a signal splitter configured to couple out a feedback signal from the second analog signal. The device further includes a first signal combiner configured to subtract the feedback signal from the first analog signal to generate an error signal. The device further includes an amplifier configured to amplify the error signal, resulting in an amplified error signal. The device further includes a second signal combiner configured to combine the amplified error signal and a signal derived from the second analog signal, resulting in the analog output signal. |
| US11108402B1 |
Delay compensated single slope analog-to-digital converter
Various embodiments relate to a single slope analog to digital converter (ADC), including: a voltage slope generator; a reference voltage generator configured to generate a first reference voltage, a second reference voltage, and a third reference voltage, where the first reference voltage equals the sum of the second reference voltage and the third reference voltage; a first comparator configured to compare a voltage to a voltage output from the voltage slope generator; a first register configured to store a first count based upon the first reference voltage being input into the first comparator; a second register configured to store a second count based upon the second reference voltage being input into the first comparator; a third register configured to store a third count based upon the third reference voltage being input into the first comparator; a fourth register configured to store a fourth count based upon a first input voltage being input into the first comparator, wherein the first input voltage is the voltage to be converted to a digital value by the ADC; and an output circuit configured to calculate a digital value for the first input voltage based upon the first, second, third, and fourth counts. |
| US11108400B1 |
Hitless switching by resetting multi-modulus feedback divider
An apparatus includes a plurality of monitoring circuits and a reset circuit. The monitoring circuits may each be configured to determine a status of one of a plurality of input signals, transmit one of the input signals to a PLL circuit and generate a loss signal in response to the status. The reset circuit may be configured to receive the loss signal and generate a reset signal in response to the loss signal. One of the input signals may be a primary input used by the PLL circuit. One of the input signals may be a secondary input that has been selected to replace the primary input. The reset signal may be configured to reset a feedback clock divider of the PLL circuit. |
| US11108398B2 |
Parametrically activated quantum logic gates
In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device. |
| US11108396B2 |
Multivoltage high voltage IO in low voltage technology
A multi-voltage, high voltage I/O buffer in low-voltage technology is disclosed. In one embodiment, the I/O buffer includes a logic circuit configured to generate a signal based on a data signal and a first control signal. A level shifter is coupled between a supply voltage terminal and a ground terminal, and the level shifter is generates first and second output signals in first and second voltage domains, respectively, at first and second nodes, respectively, based on the signal from the logic circuit. A control circuit is coupled between the second node and a third node. The control circuit transmits the second output signal to the third node when the first control signal is asserted, and the control circuit couples the third node to the ground terminal when the first control signal is not asserted. |
| US11108390B2 |
Method of forming a semiconductor device and circuit therefor
In one embodiment, a driver circuit is configured to form a Vgs of a transistor as a negative value during a time interval that a second transistor, connected to the first transistor, is being enabled. |
| US11108380B2 |
Capacitively-driven tunable coupling
A capacitively-driven tunable coupler includes a coupling capacitor connecting an open end of a quantum object (i.e., an end of the object that cannot have a DC path to a low-voltage rail, such as a ground node, without breaking the functionality of the object) to an RF SQUID having a Josephson element capable of providing variable inductance and therefore variable coupling to another quantum object. |
| US11108379B2 |
High isolation surface acoustic wave duplexer
A duplexer includes a surface acoustic wave (SAW) device comprising a transmit filter and a receive filter formed on a piezoelectric substrate. The transmit filter includes a first transmit shunt resonator connected to a first transmit-filter ground terminal. The receive filter includes a first receive shunt resonator connected to a first receive-filter ground terminal. A ground coupling capacitor is connected between the first transmit-filter ground terminal and the first receive-filter ground terminal. |
| US11108378B2 |
Method of manufacturing quartz crystal resonator and quartz crystal resonator unit
A method of forming a quartz crystal resonator is provided with the resonator including a body portion with first and second main surfaces facing each other and, in plan view having a pair of long sides extending in a first direction and a pair of short sides extending in a second intersecting direction. Moreover, first and second excitation electrodes are formed on the respective main surfaces; a frame surrounds the body portion at both ends and is separated from the both ends; and first and second coupling portions extend from the short sides and with widths of the short sides. At least one of the first and second coupling portions is formed with a thickness in a third direction is smaller than a thickness in the third direction of a region of the body portion where the first excitation electrode and the second excitation electrode face each other. |
| US11108377B2 |
Quartz crystal resonator and quartz crystal resonator unit
A quartz crystal resonator is provided that includes a body portion with first and second main surfaces facing each other and, in plan view has a pair of long sides extending in a first direction and a pair of short sides extending in a second intersecting direction. Moreover, first and second excitation electrodes are disposed on the first and second main surfaces respectively; a frame surrounds the body portion at both ends and is separated from the both ends; and first and second coupling portions extend from the short sides in the first direction with widths of the short sides. At least one of the first and second coupling portions has a portion whose thickness in a third direction is smaller than a thickness in the third direction of a region of the body portion where the first excitation electrode and the second excitation electrode face each other. |
| US11108375B2 |
Acoustic wave device, method of fabricating the same, filter, and multiplexer
An acoustic wave device includes: a piezoelectric substrate; and a pair of comb-shaped electrodes located on the piezoelectric substrate, each of the comb-shaped electrodes being formed mainly of a monocrystalline metal film, each of the comb-shaped electrodes including electrode fingers. |
| US11108374B1 |
Vertically integrated circuit assembly
A vertically integrated circuit assembly may include a substrate including a plurality of electrical traces, and a first circuit assembly layer disposed on the substrate. In embodiments, the first circuit assembly layer includes a first set of integrated circuit components, and a plurality of electrical interconnects configured to route signals through the first circuit assembly layer. In embodiments, the vertically integrated circuit assembly further includes a second circuit assembly layer coupled to the top surface of the first circuit assembly layer. The second circuit assembly layer may include a second set of integrated circuit components, and a plurality of electrical interconnects configured to route signals through the second circuit assembly layer. In embodiments, an electrical interconnect arrangement on a top surface of the first circuit assembly layer is configured to interface with an electrical interconnect arrangement on the bottom surface of the second circuit assembly layer. |
| US11108371B2 |
Tunable switched impedance matching network
A power system includes a traction battery, and a rectifier including a pair of diodes, a pair of switches, and a pair of capacitors each in parallel with a different one of the switches such that alternating current input to the rectifier results in alternating voltage having parabolic approaches to maximum magnitude values being input to the rectifier. The maximum magnitude values correspond to a magnitude of voltage output to the traction battery. |
| US11108367B2 |
Internal power supply for amplifiers
An internal power supply for an amplifier is disclosed. The internal power supply floats according to a common mode voltage at the input to the amplifier and according to an input voltage at an input stage of the amplifier. Powering the input stage of the amplifier using the floating supply allows for the use of low voltage devices even when the range of possible common mode voltages includes high voltages. The use of low voltage devices can correspond to performance improvement for the amplifier and can help reduce the size of the amplifier. The internal supply can accommodate both positive and negative common mode voltages and can be used for current sense amplifiers of any gain. |
| US11108366B2 |
Amplifier circuit
An amplifier circuit includes an output terminal, an amplification unit and a switch. The output terminal is used to output an amplification signal. The amplification unit includes a first transistor and a second transistor. The first transistor includes a control terminal for receiving a first input signal, a first terminal coupled to the output terminal for outputting an amplified first input signal, and a second terminal. The second transistor includes a control terminal for receiving a second input signal, a first terminal coupled to the output terminal for outputting an amplified second input signal, and a second terminal. The switch includes a first terminal coupled to the second terminal of the first transistor, and a second terminal. The amplification signal is generated using at least the amplified first input signal and/or the amplified second input signal. |
| US11108363B2 |
Envelope tracking circuit and related power amplifier apparatus
An envelope tracking (ET) circuit and related power amplifier apparatus is provided. An ET power amplifier apparatus includes an ET circuit and a number of amplifier circuits. The ET circuit is configured to provide a number of ET modulated voltages to the amplifier circuits for amplifying concurrently a number of radio frequency (RF) signals. The ET circuit includes a target voltage circuit for generating a number of ET target voltages adapted to respective power levels of the RF signals and/or respective impedances seen by the amplifier circuits, a supply voltage circuit for generating a number of constant voltages, and an ET voltage circuit for generating the ET modulated voltages based on the ET target voltages and a selected one of the constant voltages. By employing a single ET circuit, it may be possible to reduce the footprint and improve heat dissipation of the ET power amplifier apparatus. |
| US11108360B2 |
Doherty power amplifier system
A Doherty amplifier system is disclosed. The Doherty amplifier system includes a carrier amplifier having a main input for receiving a first portion of a radio frequency (RF) signal and a main output in communication with a RF signal output. A peaking amplifier has a peak input for receiving a second portion of the RF signal and a peak output in communication with the RF signal output. Further included is a first impedance inverter coupled between the main output and the peak output. A second impedance inverter is coupled between the peak output and the RF signal output. A first impedance inverter coefficient of the first impedance inverter is numerically within ±10% of a second impedance inverter coefficient of the second impedance inverter. |
| US11108359B2 |
Multi-amplifier envelope tracking circuit and related apparatus
A multi-amplifier envelope tracking (ET) circuit and related apparatus are provided. The multi-amplifier ET circuit includes a number of amplifier circuits configured to amplify concurrently a radio frequency (RF) signal to generate a number of amplified RF signals for concurrent transmission, for example, in a millimeter wave (mmWave) spectrum. The amplifier circuits are configured to amplify the RF signal based on a number of ET voltages and a number of low-frequency currents, respectively. A number of driver circuits is provided in the multi-amplifier ET circuit to generate the ET voltages and the low-frequency currents for the amplifier circuits, respectively. In examples discussed herein, the driver circuits are co-located with the amplifier circuits to help improve efficiency and maintain linearity in the amplifier circuits, particularly when the RF signal is modulated at a higher modulation bandwidth (e.g., >80 MHz). |
| US11108357B2 |
Circuit device, oscillator, electronic apparatus, and vehicle
The circuit device includes a current generation circuit configured to generate a temperature compensation current based on a temperature detection voltage, and a current-voltage conversion circuit configured to perform current-voltage conversion on the temperature compensation current to output a temperature compensation voltage. The current-voltage conversion circuit includes an operational amplifier, and a feedback circuit. The operational amplifier includes a differential section having a current mirror circuit and differential pair transistors, an output section configured to output the temperature compensation voltage, and an RC low-pass filter configured to output a signal obtained by performing a low-pass filter process on an output signal of the differential section to an input node of the output section. |
| US11108354B2 |
Portable power generator
A method and apparatus for portable power generation comprises an intermodal container having a front, a rear, a top and a bottom and extending between first and second ends, the intermodal container having a front and a rear corner post extending between the top and the bottom at each of the first and second ends. The apparatus further comprises a door hingedly secured to each of the front corner posts and at least one solar panel hinged to a top edge of the door, wherein the door is operable to pivot between a closed position extending between the front and the rear of the intermodal container, and an open position extending in planar alignment with the front of the intermodal container. |
| US11108353B1 |
Systems and methods for array level terrain based backtracking
A system and method for array level terrain based backtracking includes a tracker configured to collect solar irradiance and attached to a rotational mechanism for changing a plane of the tracker and a controller in communication with a rotational mechanism. The controller is programmed to determine a position of the sun at a first specific point in time, retrieve height information, execute a shadow model based on the retrieved height information and the position of the sun, determine a first angle for the tracker; collect an angle for each tracker in a plurality of trackers in an array; adjust the first angle based on executing the shadow model with the first angle and the plurality of angles associated with the plurality of trackers; transmit instructions to the rotational mechanism to change the plane of the tracker to the adjusted first angle. |
| US11108349B1 |
AC bus tie contactor input into RAT auto-deploy
A system includes a first AC bus configured to supply power from a first generator. A first generator line contactor (GLC) selectively connects the first AC bus to the first generator. A second AC bus is configured to supply power from a second generator. A second GLC selectively connecting the second AC bus to the second generator. An auxiliary generator line contactor (ALC) is connected to selectively supply power to the first and second AC buses from an auxiliary generator. A first bus tie contactor (BTC) electrically connects between the first GLC and the ALC. A second BTC electrically connects between the ALC and the second GLC. A ram air turbine (RAT) automatic deployment controller is operatively connected to automatically deploy a RAT based on the combined status of the first GLC, the second GLC, the ALC, the first BTC, and the second BTC. |
| US11108345B1 |
Control circuit for passive braking for DC motor
A control circuit includes a first high-side transistor coupled between a voltage supply terminal and the first terminal of a DC motor and a second high-side transistor coupled between the voltage supply terminal and the second terminal of the DC motor. The control circuit includes a first low-side transistor coupled between a ground terminal and the first terminal of the DC motor and a second low-side transistor coupled between the ground terminal and the second terminal of the DC motor. The control circuit includes a first pull-up resistor coupled between the voltage supply terminal and a gate terminal of the first low-side transistor and a second pull-up resistor coupled between the voltage supply terminal and a gate terminal of the second low-side transistor. The pull-up resistors apply bias currents to turn ON the first and second low-side transistors to provide a conductive path to brake the DC motor. |
| US11108334B2 |
Power conversion device
Provided is a power conversion device which can be configured inexpensively and in which initial charging can be performed quickly. Accordingly, the power conversion device is provided with: a power conversion device cell having a first converter for converting a first AC voltage to a first DC voltage, a second converter for converting the first DC voltage to another voltage, and a first capacitor charged by the first DC voltage; and a control circuit for allowing charging of the first capacitor while changing the operational state of the first converter in accordance with the first DC voltage. |
| US11108333B2 |
DC-DC converters
A system includes a DC-DC power converter including a first pair of input/output lines for connecting to a first device for supplying power to or drawing power from the first device, and a second pair of input output lines for supplying power to or drawing from a second device. The system includes at least one ultra-capacitor connected across the first pair of input/output lines. |
| US11108332B2 |
Half-bridge converter including rectifier structure using coupling inductor
Disclosed is an asymmetrical half-bridge converter having high efficiency in a wide input voltage range. The converter may include a primary-side circuit including a first switch, a second switch, a primary-side capacitor, an additional inductor, and a primary-side magnetization inductor, and a secondary-side circuit including first and second diodes connected in series, first and second capacitors connected in series, a secondary-side rectification inductor having one end connected to the anode of the first diode and cathode of the second diode, and having the other end connected between the first and second capacitors connected in series, a first coupling inductor having one end connected to the cathode of the first diode and having the other end connected to the first capacitor, and a second coupling inductor having one end connected to the anode of the second diode and having the other end connected to the second capacitor. |
| US11108330B2 |
Circuits and methods using power supply output voltage to power a primary side auxiliary circuit
In an AC-DC converter having a primary side control circuit, auxiliary power for the control circuit is derived from the converter secondary side through an isolated DC-DC converter. The circuits and methods solve the problem of supplying primary side auxiliary power during light load or no load operation of the AC-DC power converter. Since the output voltage of the AC-DC converter is normally regulated at a fixed level, the auxiliary voltage that is generated by the isolated DC converter is regulated. In some cases the isolated DC-DC converter may not need to be regulated, which simplifies the design and reduces overall cost. |
| US11108327B2 |
Selected-parameter adaptive switching for power converters
A selected-parameter adaptively switched power conversion system, for example, includes a counter for determining a period of an output oscillation a power supply switch, where the output oscillation starts when an output current generated by stored power of the power supply coil decays substantially to zero. An event generator for generating a switching delay event in response to the determined output oscillation period and generates a switching delay event in response to a determination of a phase of the output oscillation. |
| US11108326B2 |
DC-DC converter
A DC-DC converter includes current resonant converter units connected in parallel. The converter units include respective control devices each of which includes a control circuit, a gate-pulse generating circuit, and the like. Taking into account a relational characteristic of a switching frequency and an output voltage of each of the converter unit, a lowest frequency as a common switching frequency, from among switching frequencies with respect to a same output voltage, is shared by the control circuits. The converter units are operated with drive pulses each of which is at the common switching frequency. |
| US11108325B2 |
Electronic circuit and method of controlling three-level switching converters
A method including producing an electronic circuit. The method can include providing a first circuit portion, a second circuit portion, a flying capacitor voltage comparator, an output switching circuit, an electronic circuit first output node, and/or an electronic circuit second output node. The electronic circuit first output node can be electrically coupled to a first gate terminal of a switching converter. The electronic circuit second output node can be electrically coupled to a second gate terminal of the switching converter. The method also can include electrically coupling a voltage sensor output terminal of the flying capacitor voltage comparator to the first circuit second input node of the first circuit portion and the second circuit second input node of the second circuit portion. Other embodiments are disclosed. |
| US11108322B2 |
Dual-mode control of a switch mode power supply
A multi-phase switch-mode power supply to control an output in two possible modes is disclosed. A first mode can be applied for normal load conditions. In the first mode, control is achieved using an error signal based on a difference between an output voltage and a set voltage level. In heavy load conditions a load attempts to draw too more power than the switch-mode power supply can provide. As a result, control of the output voltage is lost and the current of each phase becomes saturated at a limit. When this condition is detected, a second mode can be applied. In the second mode, control is achieved using an error signal based on a difference between an output current and a set current level. The set current level is chosen so that the current of each phase is no longer saturated and control of the output current is maintained. |
| US11108320B2 |
Method and voltage multiplier for converting an input voltage, and disconnector
An input voltage is converted into a higher output voltage by several voltage stages each having a series circuit with a rectifier diode, a charging capacitor, and a switchable first semiconductor switch. Each voltage stage has a switchable second semiconductor switch is connected in parallel with the rectifier diode and the charging capacitor. The rectifier diodes of adjacent voltage stages are connected in series. First, the first semiconductor switches are closed and the second semiconductor switches are opened, to charge the charging capacitors by the input voltage. Then, the first semiconductor switches are opened and the second semiconductor switches are closed, so that the individual voltages produced on the charging capacitors add up along the series-connected rectifier diodes to produce the output voltage. |
| US11108314B2 |
Magnet holder, sensor magnet assembly, electric motor comprising a sensor magnet assembly, and method for producing a sensor magnet assembly
A magnet holder for attaching a sensor magnet to a motor shaft of an electric motor, including a receiving recess for the sensor magnet and an attachment region for attachment to the motor shaft, wherein the receiving recess is radially delimited by a wall that, over the circumference thereof, includes a plurality of weak spots which have a reduced wall thickness and are designed so that free spaces remain between the weak spots and the sensor magnet arranged in the receiving recess. The invention further relates to a sensor magnet assembly, to an electric motor comprising a sensor magnet assembly, and to a method for producing a sensor magnet assembly. It is the object of the present invention to very reliably and durably attach a sensor magnet to the end of a motor shaft in a very economical and simple manner, wherein adhesive methods are to be dispensed with. |
| US11108308B2 |
Apparatus for installing a wire package into an electrical machine
The invention relates to a package carrier for installing a plurality of wire windings into a component such as a stator or a rotor of an electrical machine, the component having a plurality of grooves running longitudinally which are designed to receive wire sections of the wire windings. |
| US11108304B2 |
Brushless motor assembly
A brushless motor assembly includes a motor body, a circuit board, and a heat sink. The circuit board has a mounting surface and includes a motor control unit and a power switch which are disposed on the mounting surface. The motor control unit is adapted to control an operation of the power switch. The heat sink is disposed between the motor body and the circuit board, wherein the heat sink has a first side portion and a second side portion which are opposite to each other; the first side portion faces the motor body, and the second side portion faces the circuit board and shields the mounting surface of the circuit board. With the aforementioned design, it could effectively protect the electronic components on the circuit board and provide good heat dissipation effect. |
| US11108301B2 |
Turbogenerator rotor, turbogenerator, and methods of furnishing a turbogenerator with a baffle assembly
Disclosed is a turbogenerator rotor, the rotor including a rotor body having two axial ends. The rotor further including a trunnion axially extending from each axial end of the rotor body. the rotor further including at least one baffle assembly provided on the circumference of the rotor body, the baffle assembly including at least one baffle member reversibly attached to the rotor body. |
| US11108300B2 |
Quick assembly structure used for driver
A quick assembly structure used for a driver is provided. The driver comprises a motor, an upper shell and a lower shell, and the upper shell is combined with the lower shell. The quick assembly structure comprises a clamping cavity formed in the lower shell. The upper shell is provided with a clamping piece to be inlaid in the clamping cavity. One end of the clamping piece is fixedly connected to the upper shell, and the other end of the clamping piece is an open end. A clamping hole is formed in a side of the lower shell, and the upper shell is provided with a first hook to be inlaid in the clamping hole. |
| US11108291B2 |
Flange for an electrical machine
The invention relates to a flange (1) for an electrical machine (100), said flange being configured to at least partially cover winding overhangs (10) that form part of the electrical machine (100), the flange (1) comprising a chamber (5) able to receive a cooling fluid, characterized in that the flange (1) comprises at least one first orifice and at least one second orifice allowing cooling fluid to enter the chamber (5) or allowing cooling fluid to leave the chamber (5), said chamber (5) having a profile that compliments that of at least one winding overhang (10). Said invention is applicable to motor vehicles. |
| US11108284B2 |
Wireless power transmitting device and method for controlling the same
A wireless power transmitting device is provided. The wireless power transmitting device may comprise an antenna, a memory, and a processor configured to control to store, as reference information, information of a first reflected signal of a pilot signal sent out through the antenna at a first time in the memory and control to compare the reference information with information about second reflected signals of a pilot signal sent out through the antenna at a second time, and determine a position of a target for detection based on a result of the comparison. |
| US11108276B2 |
High-performance shielding sheet and preparation method thereof and coil module comprising the same
The invention relates to a high-performance shielding sheet, preparation method thereof and coil module comprising the same. The high-performance shielding sheet includes at least one sheet which include: at least one shielding layer with low coercive force and low remanence formed of a soft magnetic material; and at least one adhesive layer disposed on at least one side of the shielding layer; and wherein the shielding layer includes a plurality of graphical slits, and the plurality of graphical slits divide the shielding layer into a plurality of graphical fragments; and wherein the plurality of graphical slits are filled with the adhesive layer, enabling the plurality of graphical fragments to be separated from each other and have a good insulation property. The advantages include: improving the electric charging conversion rate, increasing the charging efficiency, reducing the transmission loss, and increasing the uniformity of the electromagnetic wave transmission medium. |
| US11108275B2 |
Wireless power transmission apparatus and method therefor
A wireless power transmission device includes a laser light source configured to generate a first laser light for wireless charging and a guide beam for sensing at least one of an object and one or more receivers; a light outputting unit configured to output the first laser light and the guide beam; a light receiving unit configured to receive the guide beam; and a controller configured to control output of the first laser light through the guide beam received at the light receiving unit. |
| US11108273B2 |
Contactless power transmission apparatus with stable bidirectional power transmission
A contactless power transmission apparatus includes a secondary device that includes a resonant circuit including a second transmitter coil that transmits and receives electric power to and from a first transmitter coil included in a primary device and a resonant capacitor connected in parallel to the second transmitter coil, a second converter circuit connected to the resonant circuit to convert alternating current power flowing through the resonant circuit to direct current power and convert direct current power to alternating current power flowing through the resonant circuit, a coil connected in series to the second transmitter coil between the resonant circuit and the second converter circuit, and a capacitor connected in series to the second transmitter coil between the second transmitter coil and the second converter circuit. |
| US11108267B2 |
System and method for managing current of a notification appliance circuit
There is provided an alarm system and method for managing current of a notification appliance circuit. The system comprises a notification appliance circuit, in which a control panel and notification appliances are coupled to the notification appliance circuit. The control panel provides an activation signal in response to an emergency condition. The notification appliances are configured with time delays and receive an activation signal from the control panel. The notification appliances discharges energy storage components based on at least the activation signal and recharges the energy storage components at different time intervals based on the time delays in response to discharging the energy storage components. |
| US11108264B2 |
Battery management system
The present invention provides a battery management system, which is applicable to at least one battery string, wherein each battery string comprises a plurality of batteries connected in series. The battery management system comprises a plurality of battery sensors and a main controller. Each battery sensor measures at least one corresponding battery and has a first communication module, and each battery sensor issues a broadcast through the first communication module when its power is activated. The main controller has a second communication module. The second communication module and the first communication modules are signal connected in parallel. The main controller executes a web server program to provide a web page. When the main controller receives the broadcast, the main controller displays an addressing interface by the web page, so as to assign each battery sensor to at least one corresponding battery to complete the addressing of the battery sensors. |
| US11108260B2 |
Device and method for performing wireless charging and payment
Disclosed is an electronic device. The electronic device according to an embodiment disclosed in the disclosure may include housing, a battery, a first coil receiving power transmitted wirelessly from a power transmitting unit physically coupled with an electronic device through the housing, a wireless charging circuit electrically connected to the first coil and transmitting the received power to the battery, a communication circuit generating a payment signal, using a second coil distinguished from the first coil; and a processor electrically connected to the wireless charging circuit and the communication circuit. The processor may be configured to identify an event associated with the payment signal and to transmit a first message, which is set such that the power transmitting unit adjusts transmission of power, to the power transmitting unit through the first coil based on the event. Moreover, various embodiment grasped through the disclosure are possible. |
| US11108256B2 |
Multi-port battery charge and discharge system
A multi-port battery charge and discharge system used in the charge and discharge battery pack application. The multi-port battery charge and discharge system has N voltage converting circuits, each of which can operate in a charge mode to charge a battery pack or in a discharge mode to supply power sinks. The N voltage converting circuits can be operated in a master-slave configuration with one of the N voltage converting circuits set as a master voltage converting circuit and the remained ones set as slave voltage converting circuits. In a charge state, the master voltage converting circuit provides a regulated current signal to charge the battery pack, and the slave voltage converting circuits provide slave current signals to complementally charge the battery pack. |
| US11108255B2 |
Charging base
A charging base includes a charging cradle, a pad plate, and a recess positioning portion. A mobile device includes a bottom base, a contact portion disposed on the bottom base, and a drive wheel drives the mobile device to move. The charging cradle includes a platform and a charging contact portion, and a height of the charging contact portion is greater than a height of the bottom base, when the drive wheel moves onto the pad plate, the height of the bottom base is greater than the height of the charging contact portion, when the drive wheel reaches the recess positioning portion while moving from the pad plate toward the charging cradle, the height of the bottom base is less than or equal to the height of the charging contact portion, so that the bottom base covers the platform and the contact portion is in contact with the charging contact portion. |
| US11108251B2 |
Battery management system
The present disclosure relates to a reconfigurable battery system and method of operating the same. The reconfigurable battery system comprising a plurality of switchable battery modules, a battery supervisory circuit, and a battery pack controller, where the plurality of switchable battery modules electrically arranged in series to define a battery string defining an output voltage. The battery pack controller operable to connect the battery string to the external bus via a pre-charge switch to perform a pre-charge cycle. |
| US11108247B2 |
Method, apparatus, device and medium for equalization control of battery packs
The present application discloses a method, apparatus, device and medium for equalization control of battery packs. The method may include: acquiring a voltage of each of a plurality of cells of the battery pack; on the condition that one or more voltages of the voltages of the plurality of cells are within a preset voltage interval, selecting a target State of Charge (SOC)-Open Circuit Voltage (OCV) curve from a charging SOC-OCV curve and a discharging SOC-OCV curve stored for the battery pack based on the voltages within the preset voltage interval; acquiring a target SOC of each cell based on the target SOC-OCV curve and the voltage of each cell; calculating, for each cell, a SOC difference between the target SOC of the cell and a reference SOC; calculating an equalizing time for each cell based on the SOC difference of each cell. |
| US11108244B2 |
Power receiver circuit
Systems and techniques are provided for a power receiver circuit. A power generating mechanism may include power generating elements that may generate alternating current signals. Rectifier circuit may include rectifiers that may generate a direct current signal from an alternating current signal, and diodes. Group circuits that may connect groups of rectifier circuits in electrical circuits to combine the direct current signals from the rectifier circuits in a group into a single direct current signal. A step down converter may be connected to the group circuits. The step down converter may convert a direct current signal to a direct current signal of a target voltage level. An output switch may be connected to the step down converter. A linear regulator may be connected to the step down converter. A microcontroller may be connected to the linear regulator and the output switch and may control the output switch. |
| US11108240B2 |
System and method for managing the power output of a photovoltaic cell
A solar cell management system for increasing the efficiency and power output of a solar cell and methods for making and using the same. The management system provides an electric field across an individual solar cell, an array of solar cells configured as a panel, or a group of solar panels. The imposed electric field exerts a force on both the electrons and holes created by light incident on the solar cell and accelerates the electron-hole pairs towards the electrodes of the solar cell. Compared to conventional solar cells, these accelerated electron-hole pairs travel a shorter distance from creation (by incident optical radiation) and spend less time within the solar cell material, therefore the electron-hole pairs have a lower likelihood of recombining within the cells' semiconductor's material. This reduction in the electron-hole recombination rate results in an overall increase in the solar cells' efficiency and greater power output. |
| US11108238B2 |
Method for operating a wind farm
Provided is a method for operating a wind power installation or a wind farm with a number of wind power installations for exchanging electrical power between the wind farm and an electrical supply grid. Each wind power installation has one or more feeding-in devices. The wind power installation or the wind farm is connected to the electrical supply grid by a grid connection point. The power is exchanged by way of the grid connection point. One or more of the feeding-in devices operate as voltage-influencing units and one or more of the feeding-in devices operate as current-influencing units. The voltage-influencing units and the current-influencing units also operate in a voltage-influencing and current-influencing manner during undisturbed operation of the electrical supply grid. |
| US11108237B2 |
Building management and appliance control system
The present disclosure is directed to energy storage and supply management system. The system may include one or more of a control unit, which is in communication with the power grid, and an energy storage unit that stores power for use at a later time. The system may be used with traditional utility provided power as well as locally generated solar, wind, and any other types of power generation technology. In some embodiments, the energy storage unit and the control unit are housed in the same chassis. In other embodiments, the energy storage unit and the control unit are separate. In another embodiment, the energy storage unit is integrated into the chassis of an appliance itself. |
| US11108236B2 |
Electrical energy storage module, associated system and method
An electrical energy storage module is provided. The storage module includes a reversible electrical energy conversion device intended to be connected to an electrical energy source and an electrical energy storage device. The storage device includes a first branch including two filter capacitors in series, and a second branch including two identical electrical energy storage means connected in series. A node common to the two capacitors and a node common to the two energy storage means are coupled by an impedance. A first end of the first and second branches is connected to the electrical energy conversion device, and a second end of the first and second branches is connected to the electrical energy conversion device. |
| US11108235B1 |
Double synchronous unified virtual oscillator control for grid-forming and grid-following power electronic converters
A power electronic converter can utilize exemplary double synchronous unified virtual oscillator control (DSUVOC) logic or circuitry to convert direct current to alternating current that is input into a power grid. An exemplary DSUVOC controller of the present disclosure includes a double synchronous space vector oscillator component, a sequence extraction component, a fault detection component, a pre-synchronization component, a virtual impedance component, a terminal voltage compensation component, and/or an active damping component, wherein the double synchronous unified virtual oscillator controller is capable of controlling a grid following or a grid forming power electronic converter enabling synchronization and fault ride-through under both balanced and unbalanced conditions. |
| US11108233B1 |
Manufacturing method of solar house
[Problem]To provide a manufacturing method of a solar house capable of taking in a moderate amount of sunlight while obtaining a large amount of electric power generation.[Solution]A manufacturing method of a solar house 1 includes a step for contact-arranging the first house set 81, the second house set 82, and the intermediate house member 83 so that the intermediate house member 83 is positioned between the first house set 81 and the second house set 82 in the second direction Y; a step for contact-arranging the intermediate house member 83 and the other second house set 82 or the other first house set 81 in the second direction Y by a necessary number with respect to the arranged first house set 81 or the arranged second house set 82; and a step for supporting the first panel set 2 and the second panel set 3 with respect to the first house set 81 and the second house set 82 with the first support column 71. |
| US11108229B2 |
Electrostatic discharge (ESD) protection circuit and integrated circuit including the same
An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes a transient-state detection circuit configured to generate a dynamic triggering signal based on a voltage change rate of a voltage on a first power rail; a voltage detection circuit configured to generate a static triggering signal based on the voltage on the first power rail; a trigger circuit configured to generate a discharge control signal based on the dynamic triggering signal and the static triggering signal; and a main discharge circuit configured to discharge an electric charge from the first power rail to a second power rail based on the discharge control signal. |
| US11108223B2 |
Abnormal impedance fault isolation
In an aspect, a fire detection system is described. The first detection system may include isolation circuit having an isolation switch coupled with a system line of the fire detection system and configured to isolate a first side of the system line from a second side of the system line. The isolation circuit may also include a controller coupled with the isolation switch. The controller may be configured to detect a short circuit on the system line and control the isolation switch based on a calculated impedance on the system line in response to detecting the short circuit. |
| US11108220B2 |
Multifunctional surfacing material with burn-through resistance
A multifunctional surfacing material capable of providing lightning strike protection (LSP) and burn-through resistance. In one embodiment, the multifunctional surfacing material is composed of a conductive layer positioned between two resin layers, at least one of which contains one or more fire retardant compounds. In another embodiment, the multifunctional surfacing material is composed of a conductive layer positioned between two resin layers one of which is a thermally-stable layer. The surfacing material is co-curable with a composite substrate, e.g. prepreg or prepreg layup, which contains fiber-reinforced matrix resin. |
| US11108215B2 |
Modular gas insulated switchgear systems and related cabling modules
A gas insulated switchgear (GIS) system is provided including at least two separate modules including components of GIS, the at least two separate modules being independent of one another and configured to be assembled into the GIS system at a destination, wherein one or more of the at least two separate modules includes one of cabling and a solid insulated bus bar to connect the GIS system to an electrical power system at the destination. Related cabling modules are also provided. |
| US11108214B2 |
Wavelength combining laser apparatus
A wavelength combining laser apparatus includes: a semiconductor laser emitting laser beams in an optical-axial direction perpendicular to a laser beam combining direction; a wavelength combining element combining the laser beams in the laser beam combining direction into a single laser beam; a cross-coupling reduction optical system having positive power in the laser beam combining direction perpendicular to an optical axis of the single laser beam output from the wavelength combining element; and a partially-reflective mirror reflecting the single laser beam having passed through the cross-coupling reduction optical system and also allowing the single laser beam to transmit through and exit the partially-reflective mirror. The cross-coupling reduction optical system is disposed to image the light emitting end face on the partially-reflective mirror by causing the light emitting end face to be conjugate to the partially-reflective mirror in a plane formed by the optical axis and the laser beam combining direction. |
| US11108212B2 |
Optical interference light source device of current-temperature controlled semiconductor laser and measurement system including the same
Provided is an optical interference light source device of a current-temperature controlled semiconductor laser, including a heat dissipation plate, a ring-shaped semiconductor refrigerating sheet, a semiconductor laser, a PCB board, a thermal sensor and a fixed plate. The first circular window copper area of the PCB is in contact with the second circular copper area through a via. A lower end of a housing of the semiconductor laser is connected to the first circular windowed copper area through a thermally conductive silicone grease. The ring-shaped semiconductor refrigerating sheet is connected to the first circular window copper area through a thermally conductive silicone grease connected to the heat dissipation plate. The thermal sensor is configured to detect a temperature of the first circular windowed copper area. The present disclosure has beneficial effects of simple structures, good thermal conductivities, high temperature control precisions, and stable output wavelengths of the laser. |
| US11108204B2 |
Apparatus for terminating wires
A terminating apparatus for terminating a plurality of wires of a cable to a plurality of connection terminations of a communication module, the communication module comprises at least one upright walls each provided with at least one receiving slots for receiving the connection terminations each of which is electrically connected with one wire. The terminating apparatus comprises: at least one terminating portion into which the upright walls of the communication module are able to be inserted, each terminating portion separately holding the plurality of wires of the cable; and at least one cutting apparatus mounted in the terminating portions outside the receiving slot of the communication module and constructed to cut off parts of the wires which extend out the receiving slots after the wires are terminated to the connection terminations of the communication module. The wires may be easily and quickly terminated to the communication module. External protection layers of the wires are pierced and conductors of the wires are electrically connected to the communication module during terminating the wires. It does not need to peel off the external protection layers of the wires before terminating the wires. |
| US11108201B2 |
Modular system, comprising electrical consuming units and an electrical connection unit
A modular system comprising electrical consuming units and an electrical connection unit. The connection unit has a contact plug for plugging into a power outlet and for electrical connection with a particular cable connecting an electrical terminal and distribution strip as well as one connecting the terminal and distribution strip to the contact plug. The consuming units have first connection elements for mechanical and electrical connecting to second connection elements on the terminal and distribution strip. The first connection elements are geometrically different depending on a maximum electrical power consumption of the respective consuming unit. The second connection elements are likewise geometrically different such that selected first connection elements cannot be connected to selected second connection elements. The type and number of second connection elements are determined such that a total maximum electrical power consumption of all electrical consuming units connected simultaneously is limited to a predefined maximum value. |
| US11108200B2 |
Socket connector and connector assembly
A socket connector includes a housing defining a pair of rows of insertion cavities and an elastic fastener formed on a bottom wall of each insertion cavity. Each row of insertion cavities has at least one insertion cavity. The elastic fastener is adapted to engage a plug connector inserted into the insertion cavity. |
| US11108199B2 |
Coaxial connector
A coaxial connector has a first coaxial connector portion (1) and a second coaxial connector portion (2). The first coaxial connector portion (1) has an external conductor which is designed as a coaxial socket and the distal end of which is designed as a spring cage (3) with individual spring lugs (91, 92, 93, 94, 95). The second coaxial connector portion (2) has an external conductor (6) which is designed as a coaxial plug. An electrical and mechanical connection exists between the spring lugs (91, 92, 93, 94, 95) of the first coaxial connector portion (1) and an external shell surface of the external conductor (6) of the second coaxial connector portion (2). In the region of each gap (101, 102, 103, 104, 105) that is situated between in each case two adjacent spring lugs (91, 92, 93, 94, 95), there is provided at least one shielding component (111, 112, 113, 114, 115, 111′, 112′, 113′, 114′, 115′) which is connected respectively to one of the two adjacent spring lugs (91, 92, 93, 94, 95). A multiple coaxial connector portion has multiple first coaxial connector portion is arranged in a housing (12). |
| US11108197B2 |
Power cable assembly
A power cable assembly includes a lamp that has a base. A power cord extends outwardly from the base and the power cord is electrically coupled to a power source comprising a female electrical outlet. A housing is provided and the power cord extends through the housing. The housing has a first power port and a second power port. Each of the first power port and the second power port is in electrical communication with the power cord. A surge protector is positioned within the housing to protect the power cord, the first power port and the second power port from electrical surges. Each of the first power port and the second power port can supply electrical power for an electronic device. |
| US11108195B2 |
Shield terminal and shield connector
A shield terminal (20) includes an inner conductor terminal (21) and an outer conductor terminal (22) surrounding the inner conductor terminal (21). The outer conductor terminal (21) has a pull-out opening (46) through which an inner conductor connecting piece (26) of the inner conductor terminal (21) is pulled toward a circuit board (90). The outer conductor terminal (22) includes outer conductor connecting pieces that face the pull-out opening (46) and that include first and second outer conductor connecting pieces (53, 54) located on both sides across the inner conductor connecting piece (26) in a plan view and a third outer conductor connecting piece (42) that faces the inner conductor connecting piece (26) in a direction orthogonal to an arrangement direction of the first and second outer conductor connecting pieces (53, 54) at a position between the first and second outer conductor connecting pieces (53, 54) in the arrangement direction. |
| US11108194B2 |
Electrical connector including shielding net connected to conductive body
The application provides an electrical connector, which includes: an insulating body, including a first surface and a second surface opposite to the first surface; a plurality of grounding terminals and a plurality of signal terminals, the plurality of grounding terminals and the plurality of signal terminals being connected to the insulating body in an array; a conductive body, connected to the insulating body from the first surface; and a conductive shielding net. The shielding net is connected to the insulating body from the second surface and electrically connected to the conductive body, and the plurality of grounding terminals are electrically connected with the shielding net through the conductive body. According to the electrical connector of the application, by the shielding net, shielding in an insertion direction may be implemented better, thereby preventing or reducing crosstalk generated during a signal transmission of the electrical connector. |
| US11108191B2 |
Connector with cover to suppress deformation of sealing members and maintain waterproofing
A connector includes wires (10), a connector housing (30) to hold ends of the wires (10), sealing members mounted on the wires (10) to seal clearances between the connector housing (30) and the wires (10), and a cover (40) assembled with the connector housing (30) to cover the wires (10). The connector housing (30) has a wire pull-out surface (34F1) and cavities (35) open in the wire pull-out surface (34F1) to accommodate ends of the wires (10) and the sealing members inside. The sealing member has a wire draw-out surface (20F) and includes a wire insertion hole (21) open in the wire draw-out surface (20F). The wire (10) is inserted into the wire insertion hole (21). The cover (40) includes a cover body (41) to cover the wires (10) and guides (71) extend from the cover body (41) for contacting the wire draw-out surfaces (20F) and guiding the wires (10). |
| US11108187B2 |
Connector part with a shielding sleeve
A connector part includes: an electrically conductive shield sleeve; a plug-in portion provided on the shield sleeve for plug-in connection to an associated mating connector part; at least one electrical contact element disposed in or on the plug-in portion; a plastic housing part at least partially enclosing the shield sleeve; a pressure element which is disposed on the shield sleeve and connected to the plastic housing part and which has a receiving means; and a sealing element which is disposed in the receiving means of the pressure element and in sealing engagement with the shield sleeve to seal a transition between the plastic housing part and the shield sleeve. |
| US11108183B2 |
Electrical contact for connector
An electrical connector for connecting an electronic package to a printed circuit board, includes an insulative housing with a plurality of passageways therein, and a plurality of contacts are retained in the corresponding passageways, respectively. Each contact has a main body and opposite upper and lower contacting arms extending therefrom in a symmetrical manner in the vertical direction. Each of the upper contacting arm and the lower contacting arm has a pair of spring beams spaced from each other. Each beam includes an extension section directly extending from and coplanar with the main body, an oblique section extending from the extension section and a contacting section extending from the oblique section. The distance between the oblique sections of the pair of beams is essentially same with that of the extension sections thereof, while larger than that of the contacting sections thereof. |
| US11108182B2 |
Electrical connector assembly with locking arms and locking planes
An electrical connector assembly includes a plug connector and a receptacle connector. A plug connector includes an insulative plug housing and a plurality of blade type male contacts retained in the plug housing. Each of the blade type male contacts includes a contacting section composed of two opposite primary mating planes and two opposite side locking planes. Correspondingly, a receptacle connector includes an insulative receptacle housing and a plurality of clip type female contacts retained in the receptacle housing. Each of the clip type female contacts includes a pair of contacting portions sandwiching the two opposite primary mating planes of the corresponding blade type male contact therebetween in a first horizontal direction. A metallic blade type locking piece retained in the receptacle housing, includes a pair of locking arms sandwiching the two opposite side locking planes therebetween in a second horizontal direction perpendicular to the first horizontal direction. |
| US11108181B2 |
Vibration resistant high-power electrical connector
The disclosure relates to an electrical connector system including a first connector having a plurality of cantilevered fingers disposed along a mating face thereof, and a second connector having a conductive central core including a plurality of open slots designed for receiving the plurality of cantilevered fingers. When the connectors are mated, each cantilevered finger sits within a respective slot at a sufficient depth therein to improve vibration resistance of the mated electrical connector. |
| US11108173B2 |
Coaxial connector and coaxial connector incorporating coaxial cables
A coaxial connector includes internal and external terminals, and an insulation member disposed between the terminals. The external terminal includes a holding portion that holds coaxial cables, and crimping portions. A crimping portion outermost in an arrangement direction of the cables is formed from a plate member bent to follow an outer circumference of the cable, and includes a connection portion connectable with the holding portion between both end portions in the arrangement direction. An inner hook extends inward in the arrangement direction from a point of intersection between the connection portion connectable with the holding portion and a virtual straight line orthogonal to the arrangement direction and passing a center of the cable, in a cross-sectional view orthogonal to a longitudinal direction of the cable. An outer hook extends outward in the arrangement direction from the point of intersection. The inner hook is shorter than the outer hook. |
| US11108169B2 |
Base station antenna
The present invention relates to a base station antenna, comprising: a plurality of first radiating elements that are arranged as a first vertically-extending array; a plurality of second radiating elements that are arranged as a second vertically-extending array, where the second radiating elements are staggered in the vertical direction with respect to the first radiating elements; wherein phase centers in an azimuth plane for first sub-arrays of the first radiating elements are substantially the same as phase centers in the azimuth plane for respective third sub-arrays of the second radiating elements, and wherein the first sub-arrays each have a first number of first radiating elements and the third sub-arrays each have a second number of second radiating elements, the first number being different than the second number. This can effectively improve the pattern of the base station antenna. |
| US11108168B2 |
Antenna system for portable communication device for millimeter wave communication
An antenna system for a portable communication device, includes a plurality of antennas configured for at least mmWave-based cellular communication, and are distributed at a plurality of different locations in the portable communication device. Each antenna of the plurality of antennas has a first polarization and a second polarization. The plurality of antennas comprises a plurality of different types of antennas. A first type of antenna of the plurality of different types of antennas is configured to switch between reception of a first radio frequency (RF) signal in a mmWave frequency and transmission of a second RF signal in the mmWave frequency in the first polarization, and concurrently with the reception or the transmission in the first polarization, only receive RF signals in the mmWave frequency in the second polarization that is orthogonal to the first polarization. |
| US11108167B2 |
Waveguide antenna element-based beam forming phased array antenna system for millimeter wave communication
An antenna system, includes a first substrate, a plurality of chips, and a waveguide antenna element based beam forming phased array. The waveguide antenna element based beam forming phased array has a unitary body that comprises a plurality of radiating waveguide antenna cells in a first layout for millimeter wave communication. Each radiating waveguide antenna cell comprises a plurality of pins that are connected with a body of a corresponding radiating waveguide antenna cell that acts as ground for the plurality of pins. A first end of the plurality of radiating waveguide antenna cells of the waveguide antenna element based beam forming phased array, as the unitary body, in the first layout is mounted on the first substrate. The plurality of chips are electrically connected with the plurality of pins and the ground of each of the plurality of radiating waveguide antenna cells to control beamforming. |
| US11108166B2 |
Antenna device
Patch antennas include four radiation elements arrayed in a rectangular lattice pattern at four positions around a feeding point in the electrode, and wiring which electrically couples each of the radiation elements and the feeding point with an equal wiring length, and is fed by a line-shaped feeding conductor arranged at a position intersecting slots formed at a ground conductor plate, where the feeding conductor has a repetitive branch pattern in which multiple pieces of line-shaped wiring are connected in T-shapes being perpendicular to each other at a total of 2N−1 branch points from a base end to each of the tips, and each of the tips is bent in a same direction in the second direction from a terminal end of the line-shaped wiring to which the tip is connected. |
| US11108165B2 |
Radio frequency front end for full duplex wireless communications
An antenna system includes a ground and a substrate mounted on the ground. The antenna system includes a first transmitter antenna and a second transmitter antenna configured to transmit a first signal at a predetermined frequency. The first transmitter antenna has a first longitudinal axis and is mounted in a first quadrant of the substrate. The second transmitter antenna has a second longitudinal axis and is mounted in a second quadrant of the substrate. The antenna system includes a first receiver antenna and a second receiver antenna configured to receive a second signal at the predetermined frequency. The first receiver antenna has a third longitudinal axis and is mounted in a third quadrant of the substrate. The third longitudinal axis of the first receiver antenna is oriented orthogonal to the first longitudinal axis of the first transmitter antenna and the second longitudinal axis of the second transmitter antenna. |
| US11108161B2 |
Device and method for folded deployable waveguide
A foldable and deployable assembly for use to transfer RF signals comprises a RF transmitter/receiver adapted to operate in the RF range S and up, a transmit/receive horn unit to attach the assembly to an antenna operable in the RF range S and up and a foldable/deployable RF waveguide connected between the RF transmitter/receiver and the transmit/receive horn and operable in the RF range of S and up, the waveguide is formed as a hollow elongated piece made of at least one of silicone based shape memory composite carbon fiber reinforced silicone (CFRS) and graphite with silicone. |
| US11108158B2 |
Millimeter wave filter array
Methods, systems, and apparatuses, for a millimeter wave filter array are discussed. The filter array includes an array of unit cells formed using a dielectric layer of a dielectric material, the dielectric layer having a first surface and an opposing second surface. Each unit cell includes conductive sidewall layers extending at least partially between the first surface and the second surface of the dielectric layer and defining a resonant space within the dielectric layer. Each unit cell also includes a metallized layer formed on the first surface, covering at least a portion of the resonant space of the dielectric layer and electrically connected to the conductive sidewall layers. Each unit cell includes a radio-frequency input-output (RF I/O) contact formed on the first surface of the dielectric layer. |
| US11108156B2 |
Differential on-chip loop antenna
Aspects of the embodiments are directed to an on-chip loop antenna and methods of manufacturing the same. The on-chip loop antenna can be carried by a semiconductor package. The semiconductor package can include a printed circuit board coupled to an integrated circuit chip. The integrated circuit chip can include a semiconductor substrate, an integrated circuit; and a loop antenna surrounding the integrated circuit. In embodiments, the semiconductor package can include a metal shield enclosing the integrated circuit chip. In embodiments, the on-chip loop antenna can be impedance matched to the impedance of the integrated circuit. In embodiments, the integrated circuit can include an antenna driver to drive the antenna differentially, the on-chip loop antenna surrounding the antenna driver. |
| US11108151B1 |
Device and method for managing communications
There is described a device for managing communications comprising a sensor, first and second antennas, and first and second shields. The sensor has a field of view and includes a first side and a second side, in which the second side is substantially opposite the first side. The first antenna is positioned offset from the first side of the sensor, and the second antenna is positioned offset from the second side of the sensor. The first shield is positioned adjacent to the first side of the sensor and a first distance from the first antenna, and the second shield is positioned adjacent to the second side of the sensor and a second distance from the second antenna. The first shield focuses the first antenna toward the field of view, and the second shield focuses the second antenna toward the field of view. |
| US11108150B2 |
Radome for vehicles
A radome for vehicles comprising an internal base layer (1) formed of a radio transmissive resin; an intermediate decoration layer (2); and an external transparent resin layer (3), which is characterized in that the radome also comprises a camera (4) placed inside the radome or aligned with the external surface of the transparent resin layer (3). It allows more freedom for car designers by offering an integrated solution which is aesthetically pleasant, and it decreases part manufacturing complexity. |
| US11108144B2 |
Antenna structure
An antenna structure includes a feeding radiation element, a first radiation element, a second radiation element, and a third radiation element. The feeding radiation element has a feeding point. The first radiation element is coupled to a first connection point on the feeding radiation element. The first radiation element includes a bending portion. The second radiation element is coupled to a second connection point on the feeding radiation element, and is adjacent to the bending portion of the first radiation element. The second radiation element is not parallel to the first radiation element. The third radiation element has a grounding point, and is coupled to a third connection point on the feeding radiation element. The third radiation element includes a first protruding portion and a second protruding portion. The first protruding portion and the second protruding portion of the third radiation element extend in different directions. |
| US11108142B2 |
Antenna, transmitting antenna, receiving antenna and wireless communication device
An antenna includes a cylindrical substrate, an arc-shaped outer metal strip formed on an outer surface of the cylindrical substrate, and an arc-shaped inner metal strip formed on an inner surface of the cylindrical substrate. A cross section of the cylindrical substrate forms a complete circle with a center angle equal to 360 degrees or forms an arc with a center angle less than 360 degrees. The cylindrical substrate, the arc-shaped outer metal strip, and the arc-shaped inner metal strip have a common central axis. |
| US11108141B2 |
Embedded patch antennas, systems and methods
Disclosed are patch antennas, systems and methods for embedding a patch antenna between two layers, such as two layers of glass. The glass layers may be a vehicle windshield. An embedded portion of an antenna substrate supporting the patch antenna may be embedded between the two layers, and an exposed portion of the antenna substrate may extend outward from the two layers. The embedded portion of the antenna substrate may support the patch antenna, and the exposed portion of the antenna substrate may support a coplanar waveguide and a connector. |
| US11108136B2 |
Beam steering system configured for multi-client network
A beam steering antenna system and algorithm are described where radiation mode selection is made based on communication link quality metrics from multiple clients. Flexibility in both antenna system hardware and the algorithm allow for an optimized communication link as the communication system transitions from single client to multi-client operation. The beam steering system and algorithm are described where beam steering capability can be implemented on one or both sides of the communication link and for single and multi-client operation, and for simultaneous or sequential operation. |
| US11108133B2 |
Antenna system and mobile terminal implemented with the antenna system
An antenna system and a mobile terminal implemented with the antenna system are provided. The mobile terminal has a metal frame and a system grounding. The antenna system has at least a first antenna module, a second antenna module, a third antenna module and a fourth antenna module. The first antenna module has a radiating body and a parasitic element coupled to the radiating body. The radiating body is configured to generate a main harmonic, and the parasitic element is configured to generate a parasitic harmonic. The first antenna module further has a first tuning circuit and a second tuning circuit. The antenna system has at least four operation modes. The antenna system of the present invention may achieve carrier aggregation of different LTE frequencies, and may be used as a MIMO antenna system. |
| US11108127B2 |
Rectangular waveguide communication between memory and processor
Disclosed herein is an apparatus that includes a memory, a processor, and a rectangular waveguide coupled to the memory and the processor so that the memory and the processor communicate with each other via the rectangular waveguide. |
| US11108123B2 |
Triple-mode dielectric resonator filter, method for manufacturing the same, and band pass filter using dielectric resonator and NRN stub
A triple-mode dielectric resonator filter includes: a dielectric resonator positioned in a cavity of a housing and formed perpendicular to a longitudinal direction of the housing; a dielectric support coupled to the dielectric resonator through a bonding process and mounted and fixed by a fixing screw passing through a screw fixing mounting hole in the cavity of the housing and fixed to support the dielectric resonator at a predetermined height; and compensation blocks formed to protrude at regular intervals on a side surface of the dielectric resonator to allow the dielectric resonator to operate in three modes. A band pass filter composed of a dielectric resonator and an NRN stub achieves an improved insertion loss, high compression properties and a stable structure compared to a typical band pass filter using an NRN stub. |
| US11108122B2 |
TM mode dielectric resonator including a resonant dielectric rod soldered to a fixing base within a housing baseplate, for forming a filter and a communications device
A transverse magnetic mode dielectric resonator includes a housing with a top opening, a cover disposed on an opening side of the housing, a cavity body enclosed by the cover and the housing, an inner wall of the cavity body electrically conductive, a resonant dielectric rod disposed in the cavity body, a cavity disposed inside the resonant dielectric rod, a tuning part disposed on the cover, one end of the tuning part stretched into the cavity and capable of moving up and down relative to the cavity, two ends of the resonant dielectric rod respectively soldered with the cover and a baseplate of the housing, where a part that is of the cover and that is soldered with the resonant dielectric rod is made of elastic material, and a part that is of the baseplate and that is soldered with the resonant dielectric rod is made of elastic material. |
| US11108121B2 |
Cavity-type radio frequency filter
A cavity-type radio frequency filter is disclosed. the radio frequency filter having a cavity structure including an enclosure, a resonant element, a cover, a frequency tuning screw, and a resilient fixing member. The enclosure has a hollow inside and an open surface on one side to have a cavity. The resonant element is positioned in the hollow of the enclosure. The cover has a screw hole having a preset diameter at a position corresponding to the resonant element, and is configured to seal the open surface of the enclosure. The frequency tuning screw is configured to be screwed into the screw hole of the cover, and it has an upper end formed at least partially with a latching abutment that protrudes outwardly. |
| US11108120B2 |
DC-capable cryogenic microwave filter with reduced Kapitza resistance
An architecture for, and techniques for fabricating, a cryogenic microwave filter having reduced Kapitza resistance are provided. In some embodiments, the cryogenic microwave filter can comprise a substrate and a conductive line. The substrate can be formed of a material having a thermal conductivity property that sufficiently reduces Kapitza resistance in the cryogenic environment. The conductive line can be formed in a recess of the substrate and facilitate a filter operation on a microwave signal propagated in a cryogenic environment. In some embodiments, the conductive line can be formed according to a sintering technique that can reduce Kapitza resistance. |
| US11108115B2 |
Battery case and battery module
The present application provides a battery case and a battery module. The battery case includes a bottom plate; and a plurality of circumferentially spaced extensions formed by extending horizontally outward along the bottom plate, and each extension is bended at least once to form a case side arm, and a cavity of the battery case is enclosed by the case side arms and the bottom plate, and end faces for connection of the case side arms are bended to form connecting portions, and two adjacent connecting portions are snap-fitted to fix the adjacent case side arms to each other. |
| US11108111B2 |
Backplane assembly with power and cooling substructures
There is provided a backplane assembly with a power substructure and a cooling substructure. Battery modules may be engaged with the backplane assembly. When engaged, power connectors in the power substructure engage with corresponding power connectors on the battery modules. A cooling fluid moving through the cooling substructure is directed toward the battery modules so as to cool the battery modules during operation. The backplane assembly may additionally include an exhaust substructure. Gases vented by the battery modules move through the exhaust substructure and are directed away from the backplane assembly. |
| US11108104B2 |
Metal-air battery having cylindrical structure
A metal-air battery includes a unit cell wound into a roll. The unit cell includes a negative-electrode metal layer having a first surface located in a circumferential direction of the roll and a second surface facing the first surface and located in the circumferential direction of the roll; a first electrolyte film and a first positive-electrode layer sequentially disposed on the first surface of the negative-electrode metal layer; and a second electrolyte film and a second positive-electrode layer sequentially disposed on the second surface of the negative-electrode metal layer. The unit cell is wound in a way such that the first positive-electrode layer and the second positive-electrode layer face each other. |
| US11108101B2 |
Active internal air cooled vehicle battery pack
A vehicle battery thermal management system and method providing active internal air cooling includes a heat exchanger mounted within an exterior wall of the battery enclosure. The heat exchanger has a first set of heat exchanger elements extending externally to the battery enclosure and in fluid communication with external ambient air. The heat exchanger has a second set of heat exchanger elements extending internally to the battery enclosure and in fluid communication with internal air within the battery enclosure. The system includes at least one of an external damper door and an internal damper door. The external damper door is configured to control the flow of the external ambient air into the first set of heat exchanger elements. The internal damper door is configured to control the flow of the internal air into the first set of heat exchanger elements. |
| US11108100B2 |
Battery module for vehicle energy-storage systems
Provided are battery modules. Each module may comprise an enclosure having a base, the base having a plurality of first holes disposed therein, the enclosure including a coolant input port, a coolant output port; the enclosure having a coolant sub-system for circulating coolant being directed into the enclosure through the coolant input port and the plurality of first holes and out of the enclosure through the coolant output port; a center divider affixed to the enclosure; a module cover coupled to the enclosure at an opposite end of the module from the center divider; a retainer disposed within the enclosure and configured to support a plurality of cells; a current carrier disposed between the module cover and the retainer; and the plurality of cells disposed between the current carrier and the center divider, the cells being coupled to and supported by the retainer. |
| US11108099B2 |
Battery array frame designs with standoff features for reducing thermal interface material usage
This disclosure details exemplary battery pack designs for use in electrified vehicles. An exemplary battery pack may include a heat exchanger plate and a battery array positioned against the heat exchanger plate. The battery array may include an array frame and a thermal fin held within the array frame. The array frame may additionally include a standoff for controlling a size of a gap extending between the thermal fin and the heat exchanger plate. By controlling this gap, the amount of thermal interface material (TIM) that must be utilized to fill the gap can be reduced. |
| US11108098B2 |
Battery module having heat conduction pad
A battery module includes: a plurality of cylindrical battery cells each having electrode terminals respectively at an upper portion and a lower portion thereof; a module housing including an accommodation portion having hollow structures in which the cylindrical battery cells are inserted and accommodated; a current collecting plate on an outer surface of the module housing and including welding holes through which the electrode terminals of the cylindrical battery cells are exposed to the outside; a bus bar in contact with each of the electrode terminals and the current collecting plate to electrically connect the electrode terminals to the current collecting plate; and a heat conduction pad disposed outside the current collecting plate and including a contact protrusion portion protruding and extending in a direction in which the electrode terminals are disposed to be in contact with a contact connection portion between the electrode terminals and the bus bar. |
| US11108097B2 |
Battery cell, battery module, and application of such a battery module
A battery cell, specifically a lithium-ion battery cell, having a prismatic battery cell housing (6), in which the electrochemical components of the battery cell (2) are accommodated, and further comprising a thermal equalization element (8), which is configured for the enhancement of thermal conductivity, which is arranged on a smallest lateral surface (64) of the battery cell housing (6), such that a region (9) of the smallest lateral surface (64) which is not covered by the thermal equalization element (8) at least partially encloses said thermal equalization element (8). |
| US11108096B2 |
Vehicle battery device
A vehicle battery device includes: a battery cell mounting part accommodating a battery cell group constituted by a plurality of laminated battery cells and having a temperature control solution passage along a lamination direction of the battery cells; and an interface box, wherein the battery cell mounting part is connected to at least one of two side surfaces of the interface box; the interface box has, on any outer surface other than the side surface connected with the battery cell mounting part, a power interface part transmitting and receiving electricity and a temperature control solution interface part transmitting and receiving a temperature control solution; the battery cell group is electrically connected to the power interface part; and the temperature control solution passage is connected to the temperature control solution interface part so as to be capable of circulating the temperature control solution. |
| US11108095B2 |
Secondary battery
A secondary battery includes: a case including an internal receiving space and having an opening; an electrode assembly accommodated in the internal receiving space of the case; a cap plate coupled to the opening of the case; and a terminal coupled to the cap plate and electrically connected to the electrode assembly, and the terminal includes a terminal region integrally formed with the cap plate, a membrane on a bottom surface of the terminal region and being downwardly convex, and a pressure indicator pin on a top surface of the membrane. |
| US11108092B2 |
Storage battery management system, moving body, storage battery, and storage battery management method
A storage battery management system manages a state of a storage battery that is detachably mounted. The storage battery management system includes an activation signal generation unit configured to generate an activation signal for setting a mounted storage battery to an available state, a management unit configured to manage the mounted storage battery that has received the activation signal and identification information of the mounted storage battery in association with each other, an activation signal transmission line configured to electrically connect a storage battery management unit of the mounted storage battery and the activation signal generation unit with each other, and a signal transmission line configured to electrically connect the storage battery management unit and the management unit to each other. |
| US11108091B2 |
Battery module, and battery pack and energy storage system including the same
A battery module having a plurality of battery cells stacked on one another, each battery cell having a first electrode lead protruding therefrom, and at least one sensing assembly mounted to at least one side of the plurality of battery cells and configured to electrically connect the first electrode leads is provided. The at least one sensing assembly includes a sensing bus bar electrically connected to the first electrode leads, and a plurality of sensing housing parts configured so that the sensing bus bar is mounted to a front surface thereof. Each sensing housing part of the plurality of sensing housing parts allowing a corresponding first electrode lead to pass therethrough toward the sensing bus bar. Each sensing housing part being detachably assembled with an adjacent sensing housing part of the plurality of sensing housing parts. |
| US11108089B2 |
Cell, battery and electronic device
The present disclosure relates to a cell, a battery and an electronic device. The cell includes a first electrode sheet and a second electrode sheet. The first electrode sheet includes a first current collector. The second electrode sheet includes a second current collector. The second current collector includes a starting section and a first bending segment connected to the starting section. A current collector opposite to the starting section and the first bending segment is configured as the second current collector. Thus, the cell is not internally provided with an opposite region between the first current collector and the second current collector, which may enhance the energy density of the cell and improve the safety of the cell. |
| US11108088B2 |
Laminate-type battery production method
A method produces a laminate-type battery which can suppress short-circuiting even when a positioning guide is used. The method for producing a laminate-type battery having a first current collector layer, a first active material layer, a solid electrolyte layer or a separator layer, a second active material layer, and a second current collector layer laminated in this order, the method includes arranging a first layer along a first contact surface of a positioning guide, rotating the positioning guide, and thereafter arranging a second layer on the arranged first layer along a second contact surface of the positioning guide. The first layer and the second layer are different from each other and include an arbitrary layer selected from the first current collector layer, the first active material layer, the solid electrolyte layer or the separator layer, the second active material layer, and the second current collector layer. |
| US11108083B2 |
Electrode composite body, method of manufacturing electrode composite body, and lithium battery
An electrode composite body includes: an active material molded body including active material particles which include a lithium composite oxide and have a particle shape, and a communication hole that is provided between the active material particles; a first solid electrolyte layer that is provided on a surface of the active material molded body, and includes a first inorganic solid electrolyte; and a second solid electrolyte layer that is provided on the surface of the active material molded body, and includes a second inorganic solid electrolyte of which a composition is different from a composition of the first inorganic solid electrolyte, and which contains boron as a constituent element and is crystalline. |
| US11108076B2 |
Application of force in electrochemical cells
The present invention relates to the application of a force to enhance the performance of an electrochemical cell. The force may comprise, in some instances, an anisotropic force with a component normal to an active surface of the anode of the electrochemical cell. In the embodiments described herein, electrochemical cells (e.g., rechargeable batteries) may undergo a charge/discharge cycle involving deposition of metal (e.g., lithium metal) on a surface of the anode upon charging and reaction of the metal on the anode surface, wherein the metal diffuses from the anode surface, upon discharging. The uniformity with which the metal is deposited on the anode may affect cell performance. For example, when lithium metal is redeposited on an anode, it may, in some cases, deposit unevenly forming a rough surface. The roughened surface may increase the amount of lithium metal available for undesired chemical reactions which may result in decreased cycling lifetime and/or poor cell performance. The application of force to the electrochemical cell has been found, in accordance with the invention, to reduce such behavior and to improve the cycling lifetime and/or performance of the cell. |
| US11108073B2 |
Manufacturing method of fuel cell stack
A manufacturing method of a fuel cell stack includes: stacking fuel cells on a first end plate; superposing a pressure plate, on which protruding portions are provided along an outer periphery thereof, on a stacked body of the fuel cells so that the protruding portions protrude outward from side faces of the stacked body; pressing the protruding portions so that the stacked body is pressed between the first end and the pressure plates; measuring a length of the stacked body in a stacking direction while pressing the protruding portions; superposing on the pressure plate an adjustment plate having a thickness in accordance with the measured length while pressing the protruding portions; and fixing a second end plate to the first end plate so as to sandwich the stacked body, the pressure plate and the adjustment plate between the first and the second end plates while pressing the protruding portions. |
| US11108071B2 |
Method for producing polymer electrolyte molded article, polymer electrolyte material, polymer electrolyte membrane, and polymer electrolyte fuel cell
The present invention relates to a method for producing a polymer electrolyte molded article, which comprises forming a polymer electrolyte precursor having a protective group and an ionic group, and deprotecting at least a portion of protective groups contained in the resulting molded article to obtain a polymer electrolyte molded article. According to the present invention, it is possible to obtain a polymer electrolyte material and a polymer electrolyte molded article, which are excellent in proton conductivity and are also excellent in fuel barrier properties, mechanical strength, physical durability, resistance to hot water, resistance to hot methanol, processability and chemical stability. A polymer electrolyte fuel cell using a polymer electrolyte membrane, polymer electrolyte parts or a membrane electrode assembly can achieve high output, high energy density and long-term durability. |
| US11108070B2 |
Method and apparatus for forming electrode catalyst layer by electrospray method
A method for forming an electrode catalyst layer by putting catalyst ink within an insulative container having a conductive nozzle in communication with the interior of the container and applying an electrospray voltage to the nozzle to cause electrospray of the catalyst ink through the tip end of the nozzle and thereby to form an electrode catalyst layer, the method includes preparing catalyst ink containing a mixture of at least electrode catalyst, polymer electrolyte binder and volatile organic compound and/or water, putting the catalyst ink within the container with a space remaining inside thereof and air-tightly sealing the container, and electrospraying with the space inside of the air-tightly sealed container being conditioned to have a negative pressure of a level at which the catalyst ink cannot drip off from the nozzle. |
| US11108064B2 |
Fuel cell system mounted on a vehicle
A fuel cell system mounted on a vehicle is provided. During intermittent operation of the fuel cell system, if a cell voltage Vc of a fuel cell stack becomes lower than a predetermined threshold voltage V′, an air compressor is operated to supply air to the fuel cell stack at a first predetermined flow rate, and when the cell voltage Vc reaches and stabilizes at a predetermined target voltage V″, air is supplied to the fuel cell stack at a second predetermined flow rate that is higher than the first predetermined flow rate for a certain period of time. |
| US11108060B2 |
Fuel cell stack structure
A fuel cell stack structure in which unit cells are stacked includes first window frames and second window frame. The second window frames each have an area larger than an area of a first window frame and are periodically disposed at a predetermined interval in a direction in which the unit cells are stacked. Heat movement is promoted, a temperature deviation in the fuel cell stack structure is mitigated, and a temperature distribution is uniformized. |
| US11108056B2 |
Method for producing fuel cell
Provided is a method for producing a fuel cell that can reduce the amount of an adhesive applied to join a pair of sheet-like separators together while also avoiding failures in the conveyance of the separators. A separator, which has a bent portion on the peripheral edge thereof and has a recess and a projection formed on one surface and the other surface, respectively, of the separator by the bent portion, is used. The conveying step includes gripping the bent portion at opposite ends of each separator using grippers. The seal portion forming step includes disposing an adhesive in the recess formed by the bent portion of one of the separators, and fitting the projection formed by the bent portion of the other separator in the recess. |
| US11108054B2 |
Alumina substrate supported solid oxide fuel cells
Solid oxide fuel cells that include an alumina substrate as support are described. The alumina substrate supported SOFCs can exhibit desirable electrochemical characteristics including high performance at intermediate temperatures and excellent thermal stability. The alumina substrate support is formed according to a modified phase-inversion process that forms a series of aligned micro-channels extending from a first side to a second opposite side of the support enabling gas distribution between an electrode (e.g., an anode) located on one side of the alumina substrate and the other, opposite side of the alumina substrate. |
| US11108047B2 |
Conductive polymer material for solid-state battery
A conductive polymer material is provided that includes an electrically conducting monomer and a zwitterionic sulfate chemically attached to the monomer. The electrically conducting monomer is at least one of acetylene, pyrrole, thiophene, phenylenevinylene, paraphenylene and aniline. The zwitterionic sulfonate includes an imidazolium group or an ammonium group. A solid-state battery is also provided that includes the conductive polymer material in an electrode. The solid-state battery includes an anode, a cathode and a solid electrolyte disposed between the anode and the cathode. At least one of the anode and the cathode includes the conductive polymer material. |
| US11108045B2 |
Host material for stabilizing lithium metal electrode, and fabricating method and applications of same
The invention relates to a host material for stabilizing a Li metal electrode, fabricating methods and applications of the same. The host material includes crumpled graphene balls operably defining a scaffold having volumes and voids inside and in between the crumpled graphene balls so as to allow uniform and stable Li deposition/dissolution inside and in between the crumpled graphene balls without electrode volume fluctuations or with sufficiently small electrode volume fluctuations. The crumpled paper ball-like structures of graphene particles can readily assemble to yield the scaffold with scalable Li loading up to 10 mAh cm-2 within tolerable volume fluctuations. High Coulombic efficiency of 97.5% over 750 cycles (1500 hours) is achieved. Plating/stripping Li up to 12 mAh cm-2 on the crumpled graphene scaffold does not experience dendrite growth. |
| US11108043B2 |
Method for producing positive electrode active material for nonaqueous electrolyte secondary battery
Provided is a method for producing a positive electrode active material for nonaqueous electrolyte secondary batteries, including: a water-washing step of mixing, with water, Li—Ni composite oxide particles represented by the formula: LizNi1-x-yCoxMyO2 and composed of primary particles and secondary particles formed by aggregation of the primary particles to water-wash it, and performing solid-liquid separation to obtain a washed cake; a mixing step of mixing a W compound powder free from Li with the washed cake to obtain a W-containing mixture; and a heat treatment step of heating the W-containing mixture, the heat treatment step including: a first heat treatment step of heating the W-containing mixture to disperse W on the surface of the primary particles; and subsequently, a second heat treatment step of heating it at a higher temperature than in the first heat treatment step to form a lithium tungstate compound on the surface of the primary particles. |
| US11108040B2 |
Positive electrode material and secondary battery using same
One aspect of the invention provides a positive electrode material for a secondary battery including a positive electrode active material and a coating layer. The coating layer includes an ionic crystalline p-type semiconductor material and an ionic crystalline n-type semiconductor material which are both disposed on a surface of the positive electrode active material. |
| US11108038B2 |
Positive electrode for secondary battery, secondary battery, and method for fabricating positive electrode for secondary battery
A positive electrode for a secondary battery which enables both good battery characteristics and electrode strength at a predetermined level, a secondary battery, and a method for fabricating the positive electrode for a secondary battery are provided. The positive electrode for a secondary battery includes a current collector and an active material layer over the current collector. The active material layer includes an active material, graphene, and a binder. A carbon layer is on a surface of the active material. The proportion of the graphene in the active material layer is greater than or equal to 0.1 wt % and less than or equal to 1.0 wt %. |
| US11108037B2 |
Method for preparing graphene/ternary material composite for use in lithium ion batteries and product thereof
Provided is a method for preparing a graphene/ternary material composite for use in lithium ion batteries, comprising the following preparation steps: (a) mixing a ternary material and a graphene oxide powder in an organic solvent to form a mixed dispersion; (b) adding a reducing agent to the mixed dispersion from step (a), and carrying out a reduction reaction at a reduction temperature of 80-160° C. while stirring, to obtain a reduction reaction mixture after a reduction time of 60-240 min; and (c) evaporating the solvent from the reduction reaction mixture from step (b) while stirring, and drying and then annealing the mixture at a low temperature in an inert atmosphere to obtain a graphene/ternary material composite having a three-dimensional network structure. Also provided is a graphene/ternary material composite prepared by using this method. |
| US11108035B2 |
Solid-state positive electrode, method of manufacture thereof, and battery including the electrode
A positive electrode for a solid-state lithium battery, the positive electrode including: a positive active material; and a first solid electrolyte, wherein a ratio λ of an average particle diameter of the positive active material to an average particle diameter of the first solid electrolyte is 3≤λ≤40, wherein the positive active material has an average particle diameter of 1 μm to 30 μm, and wherein the first solid electrolyte has an average particle diameter of 0.1 μm to 4 μm. |
| US11108033B2 |
Electrochemical device and method for charging the electrochemical device
The present invention relates to an electrochemical cell (10) comprising a negative electrode (11) comprising alkali metal or alkaline earth metal (e.g. lithium), a positive electrode (12), and an electrolytic solution (13) between the negative electrode (11) and positive electrode (12). A salt (e.g. LiPF6) comprising ions of the corresponding alkali metal or alkaline earth metal of the negative electrode is dissolved in the electrolytic solution (13) with a molarity lower than 0.25M, and at least one supporting salt (e.g. TBAPF6) is dissolved in the electrolytic solution to improve the conductivity of the electrolytic solution. In addition, the electrochemical cell is configured to receive at least one electrical nucleation pulse (20; 40) having a pulse length (lp) prior to applying an electrical deposition current (21; 41) for charging of the electrochemical cell (10). |
| US11108031B2 |
Hybrid nanolaminate electrodes for Li-ion batteries
An electrode for a Lithium battery, comprising: a multi-dyad nanolaminate stack formed of a metal oxide layer of the group TiO2, MnO2 or combinations thereof, ranging between 0.3 and 300 nm; separated by a decoupling layer. |
| US11108023B2 |
Organic light emitting diode display device
An organic light emitting diode display device includes a substrate, an overcoating layer on the substrate and including a plurality of convex portions and a plurality of concave portions, a first electrode on the overcoating layer, a light emitting layer on the first electrode and including a first emitting material layer, and a second electrode on the light emitting layer, wherein the first emitting material layer in the plurality of convex portions is separated from the second electrode by a first distance, and the first emitting material layer in the plurality of concave portions is separated from the second electrode by a second distance different from the first distance. |
| US11108017B2 |
Organic light emitting diode device package structure and method of manufacturing same
The present disclosure provides an organic light emitting diode display package structure and a method of manufacturing the same. The organic light emitting diode display package structure is provided with a gate insulating layer, a first barrier layer, a first organic buffer layer, a first hydrophobic layer, a second organic buffer layer, and a second barrier layer which are disposed sequentially. A double layer of the organic buffer layer has a thickness capable of wrapping the foreign matters in the area to lower the possibility that the water and oxygen pass through this area and enter OLED device to enhance the protection ability of the TFE on the OLED device. |
| US11108014B2 |
Flexible display device
A flexible display device including a display panel, a cover window disposed on the display panel, and a first adhesive layer disposed between the display panel and the cover window, in which the first adhesive layer includes a first pressure sensitive adhesive layer, a second pressure sensitive adhesive layer, and a first elastomer layer disposed between the first pressure sensitive adhesive layer and the second pressure sensitive adhesive layer. |
| US11108013B2 |
Display screen and packaging method thereof
The invention relates to a display screen and a packaging method thereof. The packaging method of the display screen comprises the following steps: providing a substrate of the display screen; evaporating an organic light-emitting material on the substrate; printing a first packaging pattern and a second packaging pattern on the cover plate of the display screen, wherein the first packaging pattern surrounds the second packaging pattern; etching the organic light-emitting material by using a first laser on the substrate; fitting the substrate and the cover plate so that the first packaging pattern and the substrate are fitted, and the second packaging pattern and the organic light-emitting material are fitted; sintering the first packaging pattern and the second packaging pattern by using a second laser on one of the substrate and the cover plate; and performing punching on the display screen. |
| US11108006B2 |
Display apparatus and manufacturing method of the same
A display apparatus includes a plurality of pixels each including a substrate on which are disposed: an interlayer insulating layer; a driving thin film transistor in which a driving semiconductor layer and a driving gate electrode are each disposed between the substrate and the first interlayer insulating layer; a first capacitor in which a first electrode, a first dielectric pattern and a second electrode are sequentially stacked, the first electrode being connected to the driving gate electrode; and a plurality of contact plugs extended through a thickness of the interlayer insulating layer, with which the driving thin film transistor and the first capacitor are respectively connected to electrodes outside thereof. Lateral surfaces of the first dielectric pattern are covered by the interlayer insulating layer, and the first dielectric pattern within the first capacitor is disposed spaced apart from each of the contact plugs. |
| US11108004B2 |
Stretchable display device
A stretchable display device according to an aspect of the present disclosure includes: a first substrate including an active area, a non-active area adjacent to the active area, and a pad area extending from a side of the non-active area; a plurality of second substrates are spaced apart from each other on the first substrate; and connecting lines electrically connecting pads disposed on the second substrates adjacent to each other of the plurality of second substrates. The plurality of second substrates includes a first set disposed in the non-active area, a second set disposed in the active area and a third set disposed in the pad area. Accordingly, a stretchable display device according to an aspect of the present disclosure may stretch throughout not only the active area, but also the non-active area and the pad area. |
| US11108003B2 |
Flexible display apparatus
A flexible display apparatus including a display substrate having a bending area that is bendable in one direction; a thin film encapsulation (TFE) layer on the display substrate; and at least one insulating dam on the display substrate, wherein the at least one insulating dam is outside the bending area. |
| US11108002B2 |
Light emitting device
When visible light (light having wavelength of 380 nm or more and 780 nm or less) is transmitted through a first light transmitting region (TR1) (a first light emitting portion (160a)), a second light transmitting region (TR2) (a second light emitting portion (160b)) and a third light transmitting region (TR3) (a first light transmitting portion (162)), more specifically, when light from a D65 light source is transmitted through the first light transmitting region (TR1), the second light transmitting region (TR2) and the third light transmitting region (TR3), both of a color difference between the first light transmitting region (TR1) and the third light transmitting region (TR3) and a color difference between the second light transmitting region (TR2) and the third light transmitting region (TR3) are both, for example, 0.4 or more and 6.5 or less in CIELAB. This reduces conspicuousness of both of the first light transmitting region (TR1) and the second light transmitting region (TR2). Furthermore, it is possible to identify the first light transmitting region (TR1), the second light transmitting region (TR2), and the third light transmitting region (TR3). |
| US11108001B2 |
Organic compound and organic electroluminescence device using the same
The present invention discloses an organic compound and an organic electroluminescence device employing the organic compound as the fluorescent host or guest material in the light emitting layer of the organic electroluminescence device. The organic electroluminescence device employing the organic compound of the present invention can operate under reduced driving voltage, increased current efficiency, or prolong half-life time. |
| US11107999B2 |
Condensed cyclic compound and an organic light-emitting device including the same
A condensed cyclic compound represented by Formula 1-1 or Formula 1-2 and an organic light-emitting device including the same. |
| US11107994B2 |
Materials for organic electroluminescent devices
The present invention relates to compounds which are suitable for use in electronic devices, and to electronic devices, in particular organic electroluminescent devices, comprising these compounds. |
| US11107990B2 |
Mask sheet and method for manufacturing the same
The present disclosure relates to a mask sheet. The mask sheet includes a plurality of mask units. Each mask unit includes an evaporation effective area and a plurality of welding areas that are distributed around the evaporation effective area according to a preset rule. The distribution of the welding areas around the evaporation effective areas of the mask units at the edge of the mask sheet is consistent with the distribution of the welding areas around the evaporation effective areas of the mask units located in the inner region of the mask sheet. |
| US11107984B2 |
Protuberant contacts for resistive switching devices
Embodiments of the invention provide a method of forming a crossbar array. The method includes forming conductive row electrode lines and forming conductive column electrode lines. The conductive column electrode lines form a plurality of crosspoints at intersections between the conductive row electrode lines and the conductive column electrode lines. An RSD is formed at each of the plurality of crosspoints, wherein the RSD includes a first terminal, a second terminal, an active region having a switchable conduction state, and a protuberant contact communicatively coupled to the first terminal. The protuberant contact communicatively couples the first terminal through a first barrier liner to a first one of the conductive row electrode lines. The protuberant contact can be positioned with respect to the first barrier liner such that the first barrier liner does not impact the switchable conduction state of the active region. |
| US11107981B2 |
Halide semiconductor memristor and neuromorphic device
Disclosures of the present invention describe a halide semiconductor memristor that is suitable for being as an artificial synapse. The halide semiconductor memristor comprises a first electrode layer, an active layer and a second electrode layer, wherein the active layer comprises a first oxide semiconductor film formed on the first electrode layer, a halide semiconductor film formed on the first oxide semiconductor film, and a second oxide semiconductor film formed on the halide semiconductor film Moreover, a variety of experimental data have proved that, this halide semiconductor memristor is indeed suitable for being adopted as a plurality of artificial synapses that are used in manufacture of a neuromorphic device, and exhibits many advantages, including: capable of being driven by a low operation voltage, having a multi-stage adjustable resistance state, and a wide dynamic range of the switching resistance states. |
| US11107978B2 |
Methods of manufacturing three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer
A Magnetic Tunnel Junction (MTJ) device can include a reference magnetic layer having one or more trenches disposed therein. One or more sections of a tunnel barrier layer can be disposed on the walls of the one or more trenches. One or more sections of a free magnetic layer can be disposed on the one or more sections of the tunnel barrier layer in the one or more trenches. One or more sections of a conductive layer can be disposed on the one or more sections of the free magnetic layer in the one or more trenches. One or more insulator blocks can be disposed between corresponding sections of the tunnel barrier layer, corresponding sections of the free magnetic layer and corresponding sections of the conductive layer in the one or more trenches. |
| US11107976B2 |
Magnetic tunnel junction, spintronics device using same, and method for manufacturing magnetic tunnel junction
According to an embodiment, a magnetic tunnel junction includes a tunnel barrier layer provided between a first magnetic layer and a second magnetic layer. The tunnel barrier layer is a crystal body made of a stacked structure of a first insulating layer and a second insulating layer. The crystal body is oriented. The first insulating layer is made of an oxide of Mg1-xXx (0≤x≤0.15). X includes at least one element selected from the group consisting of Al and Ti. The second insulating layer is made of an oxide of an alloy including at least two elements selected from the group consisting of Mg, Al, Zn, and Li. Both the first magnetic layer and the second magnetic layer are made of an alloy including B and at least one element selected from the group consisting of Co and Fe. |
| US11107974B2 |
Magnetic tunnel junction devices including a free magnetic trench layer and a planar reference magnetic layer
A Magnetic Tunnel Junction (MTJ) device can include a reference magnetic layer having one or more trenches disposed therein. One or more sections of a tunnel barrier layer can be disposed on the walls of the one or more trenches. One or more sections of a free magnetic layer can be disposed on the one or more sections of the tunnel barrier layer in the one or more trenches. One or more sections of a conductive layer can be disposed on the one or more sections of the free magnetic layer in the one or more trenches. One or more insulator blocks can be disposed between corresponding sections of the tunnel barrier layer, corresponding sections of the free magnetic layer and corresponding sections of the conductive layer in the one or more trenches. |
| US11107970B2 |
Piezoelectric element and method for producing the same, liquid ejection head, and printer
A piezoelectric element including a first electrode provided above a base body, a first piezoelectric layer provided so as to be in contact with the base body and cover the first electrode, a second piezoelectric layer provided above the first piezoelectric layer, and a second electrode provided above the second piezoelectric layer, wherein the first piezoelectric layer includes a composite oxide that contains potassium and niobium and that has a perovskite-type structure containing potassium as a main component at an A-site, the second piezoelectric layer includes a composite oxide that contains potassium, sodium, and niobium and that has a perovskite-type structure, and the first piezoelectric layer has a higher potassium atomic concentration (atm %) than the second piezoelectric layer. |
| US11107968B1 |
All-semiconductor Josephson junction device for qubit applications
According to an embodiment of the present invention, a quantum mechanical device includes a monolithic crystalline structure. The monolithic crystalline structure includes a first region doped to provide a first superconducting region, and a second region doped to provide a second superconducting region, the second superconducting region being separated from the first superconducting region by an undoped crystalline region. The first and second superconducting regions and the undoped crystalline region form a Josephson junction. |
| US11107967B2 |
Yttrium-based superconductors with tungsten nano-structures
A superconducting material includes YBa2Cu3O7-δ and a nano-structured, preferably nanowires, WO3 dopant in a range of from 0.01 to 3.0 wt. %, preferably 0.075 to 0.2 wt. %, based on total material weight. Methods of making the superconductor may preferably avoid solvents and pursue solid-state synthesis employing Y, Ba, and/or Cu oxides and/or carbonates. |
| US11107959B2 |
Light emitting device
The invention relates to a light emitting device (LED), especially a LED at least partly embedded in transparent or translucent silicone fill, whereby the embedded LED is housed in a white silicone housing. Here and in the following, the wording transparent silicone fill always means a transparent or translucent silicone material. The invention further relates to a method for embedding the LED partly in a white silicone housing on the one hand and partly in transparent silicone fill on the other hand. The invention finally relates to the transparent silicone fill. The inner part of the LED device is at least partly embedded in transparent silicone fill, wherein the at least partly embedded LED device is housed in a white silicone housing comprising a white box silicone. A part of the inner part of the LED device is embedded in the white box silicone. |
| US11107958B2 |
Method of producing optoelectronic semiconductor components
A method of producing optoelectronic semiconductor components includes A) providing a chip carrier with electrical conductor structures on a carrier upper side, B) applying at least one semi-conductor chip configured to produce light on at least one of the electrical conductor structures, C) applying at least one sealing structure to at least one of the electrical conductor structures so that the sealing structure completely surrounds at least one contact area when viewed from the top, and D) producing a mold body directly at the at least one semiconductor chip and directly at the at least one sealing structure by transfer molding or injection molding, wherein, in an injection mold, the at least one sealing structure seals the at least one contact area against a material of the mold body so that the at least one contact area remains free of the mold body. |
| US11107957B2 |
LED device and backlight module
Provided is a LED device and a backlight module. The LED device comprises a bracket, a LED chip and an encapsulation layer. A reflective cup is arranged on the bracket, and the LED chip is arranged in the reflective cup. The encapsulation layer encases and encapsulates the LED chip in the reflective cup, the encapsulation layer has a top surface of the encapsulation layer. The top surface of the encapsulation layer is located above a top surface of the reflective cup, and is a lens curved surface. In an on-state, the LED device has virtual cross sections passing through a geometrical center of the LED chip and perpendicular to a top surface of the bracket, in at least one of the virtual cross sections of the LED device, the LED device has luminous efficiency greater than or equal to 95% within a beam angle of at least 60°. |
| US11107956B2 |
Production of radiation-emitting semiconductor components
A method of producing radiation-emitting semiconductor components includes arranging radiation-emitting semiconductor chips on a conversion layer; thickening the conversion layer next to and between the semiconductor chips by applying a filling compound containing phosphor, wherein the thickened conversion layer adjoins a front side and side faces of the semiconductor chips; forming a reflective layer on the conversion layer and on the semiconductor chips in a region of a rear side of the semiconductor chips, wherein a rear-side surface of the contacts of the semiconductor chips remains uncovered; and severing the reflective layer and the conversion layer to form singulated semiconductor components including a single semiconductor chip, a part of the conversion layer arranged on the front side and on the side faces of the semiconductor chip, and a part of the reflective layer arranged in the region of the rear side on the semiconductor chip and on the conversion layer. |
| US11107954B2 |
Light-emitting diode chip, and method for manufacturing a light-emitting diode chip
A light-emitting diode chip that includes an epitaxial semiconductor layer sequence having an active region that generates electromagnetic radiation during operation, and a passivation layer comprising magnesium oxide and magnesium nitride. The passivation layer may be applied to a lateral surface of the semiconductor layer sequence, and the passivation layer covering at least the active region. |
| US11107953B2 |
Optoelectronic semiconductor chip and method of producing an optoelectronic semiconductor chip
An optoelectronic semiconductor chip includes a semiconductor layer sequence having an active region arranged between first and second semiconductor layers; a first contact and a second contact for external electrical contacting of the semiconductor chip; first and second terminal layer regions, via which the first and second contacts electrically conductively connect to the first and second semiconductor layers; and a first insulation layer and a second insulation layer; wherein the first terminal layer region and the second terminal layer region are each arranged in some areas between the first insulation layer and the second insulation layer in a vertical direction perpendicular to a main extension plane of the active region; the first terminal layer region and the second terminal layer region are arranged side by side without overlapping; and the first terminal layer region extends in places up to a side surface of the semiconductor chip. |
| US11107951B2 |
Heterostructure for light emitting device or photodetector and light-emitting device employing the same
Heterostructures containing one or more sheets of positive charge, or alternately stacked AlGaN barriers and AlGaN wells with specified thickness are provided. Also provided are multiple quantum well structures and p-type contacts. The heterostructures, the multiple quantum well structures and the p-type contacts can be used in light emitting devices and photodetectors. |
| US11107946B2 |
Method of transferring micro-LEDs from a gallium arsenide substrate
The present disclosure discloses a micro-LED transfer method, a manufacturing method, device and an electronic apparatus. The transfer method comprises: in accordance with a sequence of micro-LEDs of blue, green and red, epitaxially growing micro-LEDs of two or all of the three colors on a single GaAs original substrate; epitaxially growing bumping electrodes corresponding to the micro-LEDs on a receiving substrate; bonding the micro-LEDs of the two or all of the three colors with the bumping electrodes on the receiving substrate; and removing the GaAs original substrate. The method can be used to transfer micro-LEDs of a variety of colors, in order to improve the production efficiency. |
| US11107945B2 |
Component with end-side mounted light emitting semiconductor chip
A component includes a light emitting semiconductor chip, wherein the semiconductor chip includes a layer arrangement including a plurality of layers, the p-conducting layer and the n-conducting layer adjoin one another in an active zone, a first electrical contact is configured on the p-conducting side of the layer arrangement at a first side of the semiconductor chip, a second electrical contact is configured on the n-conducting side of the layer arrangement at a second side of the semiconductor chip, the second side being situated opposite the first side of the semiconductor chip, the first side of the semiconductor chip transitions into the second side via an end side, the semiconductor chip is secured by the end side on a substrate, the substrate includes a first and second further electrical contact, and the further electrical contacts electrically conductively connect to the electrical contacts of the semiconductor chip. |
| US11107944B2 |
Method of manufacturing an optoelectronic semiconductor chip and optoelectronic semiconductor chip
A method of manufacturing an optoelectronic semiconductor chip includes a) providing a semiconductor layer sequence having an active region that generates or receives radiation on a substrate; b) forming at least one recess extending through the active region; c) forming a metallic reinforcement layer on the semiconductor layer sequence by galvanic deposition, the metallic reinforcement layer completely covering the semiconductor layer sequence and at least partially filling the recess; and d) removing the substrate, wherein the metallic reinforcement layer is leveled on a side facing away from the semiconductor layer sequence. |
| US11107943B2 |
Method and device for transporting an arrangement of flexible circuit substrates during the production of a laminate therefrom
The invention relates to a method and a device for transporting an arrangement of flexible circuit substrates produced on a transport substrate during the production of a laminate from the arranged circuit substrates, as well as—building thereon—a method and a device for producing a laminate of flexible circuit substrates. In the method, a film is applied to the arranged circuit substrates on the side thereof opposite the transport substrate, with the result that the film comes to lie over the transport substrate in at least two sections that are separate from each other and are not covered by a circuit substrate, and runs between them continuously over at least one of the circuit substrates. Then, the arranged circuit substrates are fixed on the transport substrate by means of the generation of a negative pressure acting on the arrangement of the circuit substrates, and which, at least in sections, directly impinges on the arrangement of the circuit substrates itself as well as, at least in sections, additionally on the film (6) and thereby in turn indirectly on at least one of the circuit substrates in the direction of the transport substrate with a pressing force with respect to the transport substrate. Then, the arrangement of circuit substrates fixed on the transport substrate by means of the pressing force is transported by moving the transport substrate. In the production method, the transport method is used for transporting the arrangement between individual manufacturing steps. The devices according to the invention are correspondingly arranged to carry out the above-mentioned method. |
| US11107934B2 |
Composition for forming solar cell electrode and solar cell electrode prepared using the same
A composition for solar cell electrodes, a solar cell electrode, and a method of manufacturing a solar cell, the composition including a conductive powder; a glass frit; and an organic vehicle, wherein the conductive powder includes a first silver powder having a cross-sectional particle porosity of about 0.1% to about 6%. |
| US11107929B2 |
Semiconductor device
A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a first insulator, a second insulator over the first insulator, a third insulator over the second insulator, a fourth insulator and a first conductor over the third insulator, a fifth insulator over the fourth insulator and the first conductor, a first oxide over the fifth insulator, a second conductor and a third conductor over the first oxide, a second oxide over the first oxide and between the second conductor and the third conductor, a sixth insulator over the second oxide, and a fourth conductor over the sixth insulator. The hydrogen concentration of the second insulator is lower than that of the first insulator. The hydrogen concentration of the third insulator is lower than that of the second insulator. |
| US11107928B2 |
Semiconductor device and method for manufacturing the same
An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed. |
| US11107922B2 |
Gate structure and method with enhanced gate contact and threshold voltage
The semiconductor structure includes a semiconductor substrate having a first region and a second region being adjacent to the first region; first fins formed on the semiconductor substrate within the first region; a first shallow trench isolation (STI) feature disposed on the semiconductor substrate within the second region; and a first gate stack that includes a first segment disposed directly on the first fins within the first region and a second segment extending to the first STI feature within the second region. The second segment of the first gate stack includes a low resistance metal (LRM) layer, a first tantalum titanium nitride layer, a titanium aluminum nitride layer, and a second tantalum titanium nitride layer stacked in sequence. The first segment of the first gate stack within the first region is free of the LRM layer. |
| US11107920B2 |
Methods of forming dislocation enhanced strain in NMOS structures
Methods of forming a strained channel device utilizing dislocations disposed in source/drain structures are described. Those methods and structures may include forming a thin silicon germanium material in a source/drain opening of a device comprising silicon, wherein multiple dislocations are formed in the silicon germanium material. A source/drain material may be formed on the thin silicon germanium material, wherein the dislocations induce a tensile strain in a channel region of the device. |
| US11107915B2 |
Semiconductor device
A semiconductor device includes: a semiconductor layer that includes principal surfaces; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, is thicker than the semiconductor layer, and comprises a first metal material; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, and comprises a metal material having a Young's modulus greater than that of the first metal material; and transistors. The transistor includes a source electrode and a gate electrode on a side facing the principal surface. The transistor includes a source electrode and a gate electrode on a side facing the principal surface. |
| US11107914B2 |
Metal-oxide semiconductor for field-effect transistor having enhanced high-frequency performance
An LDMOS device includes a doped drift region of a first conductivity type formed on an upper surface of a substrate having a second conductivity type. A body region of the second conductivity type is formed proximate an upper surface of the doped drift region. Source and drain regions of the first conductivity type are formed proximate an upper surface of the body region and doped drift region, respectively, and spaced laterally from one another. A gate is formed over the body region and between the source and drain regions. The gate is formed on a first insulating layer for electrically isolating the gate from the body region. A shielding structure is formed over at least a portion of the doped drift region on a second insulating layer. The gate and shielding structure are spaced laterally from one another to thereby reduce parasitic gate-to-drain capacitance. |
| US11107909B2 |
Semiconductor device
A collector layer, a base layer, and an emitter layer that are disposed on a substrate form a bipolar transistor. An emitter electrode is in ohmic contact with the emitter layer. The emitter layer has a shape that is long in one direction in plan view. A difference in dimension with respect to a longitudinal direction of the emitter layer between the emitter layer and an ohmic contact interface at which the emitter layer and the emitter electrode are in ohmic contact with each other is larger than a difference in dimension with respect to a width direction of the emitter layer between the emitter layer and the ohmic contact interface. |
| US11107907B2 |
Semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device includes forming a dummy gate structure on a semiconductor fin; forming a plurality of gate spacers on opposite sidewalls of the dummy gate structure; removing the dummy gate structure from the semiconductor fin; forming a gate structure on the semiconductor fin and between the gate spacers, wherein the gate structure comprises a gate dielectric layer and a work function metal over the gate dielectric layer; performing a first plasma etching process by using a first reactant to etch back the gate structure performing a second plasma etching process by using a second reactant on the etched-back gate structure, wherein the first plasma etching process has a first removal rate of the gate dielectric layer, the second plasma etching process has a second removal rate of the gate dielectric layer, and the second removal rate is greater than the first removal rate. |
| US11107905B2 |
Vertical field effect transistors with self aligned source/drain junctions
A method of controlling an effective gate length in a vertical field effect transistor is provided. The method includes forming a vertical fin on a substrate, and forming a bottom spacer layer on the substrate adjacent to the vertical fin. The method further includes forming a dummy gate block adjacent to the vertical fin on the bottom spacer layer. The method further includes forming a top spacer adjacent to the vertical fin on the dummy gate block, and removing the dummy gate block to expose a portion of the vertical fin between the top spacer and bottom spacer layer. The method further includes forming an absorption layer on the exposed portion of the vertical fin. The method further includes heat treating the absorption layer and vertical fin to form a dopant modified absorption layer, and removing the dopant modified absorption layer. |
| US11107904B2 |
Inner spacer formation in multi-gate transistors
A method of fabricating a semiconductor device includes forming a structure including multiple nanowires vertically stacked above a substrate; depositing a dielectric material layer wrapping around the nanowires; performing a treatment process to a surface portion of the dielectric material layer; selectively etching the surface portion of the dielectric material layer; repeating the steps of performing the treatment process and selectively etching until the nanowires are partially exposed; and forming a gate structure engaging the nanowires. |
| US11107903B2 |
Selective silicon growth for gapfill improvement
Embodiments disclosed herein relate generally to forming a gate layer in high aspect ratio trenches using a cyclic deposition-treatment process. In an embodiment, a method includes subjecting a substrate surface having at least one feature to a film deposition process to form a conformal film over a bottom surface and along sidewall surfaces of the feature, subjecting the substrate surface to a treatment process to form respective halogen surface layers or respective halogen-terminated layers on the conformal film formed at respective upper portions of the sidewall surfaces, and performing sequentially and repeatedly the film deposition process and the treatment process to fill the feature with the film. |
| US11107900B2 |
Dual-gate transistors and their integrated circuits and preparation method thereof
A dual-gate transistor and its production method are disclosed. An auxiliary gate is connected to the power supply of the integrated circuits, to form thick and high square-shaped potential barrier of minority carriers adjacent to the drain electrode, while the potential barrier is transparent for the majority carriers from the source electrodes. The potential barrier can effectively inhibit reverse minority carrier tunneling from the drain electrode at large drain-source voltage. The transistor can be easily turned on at small drain-source voltage, without significantly decreasing the on-state current. The dual-gate transistor can significantly suppress ambipolar behavior with increased current on/off ratio and reduced power consumption, and maintain the high performance. Based on transistors, strengthened CMOS circuits can have high noise margin, low voltage loss, reduced logic errors, high performance and low power consumption. Moreover, no additional power sources are added to the circuit, which makes it suitable for ultra-large-scale integrated circuits. |
| US11107899B2 |
Plate design to decrease noise in semiconductor devices
A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall. |
| US11107894B2 |
Group III-V compound semiconductor device
Provided is a Group III-V compound semiconductor device. The device includes a substrate, a compound semiconductor layer provided on the substrate; and a buffer layer interposed between the compound semiconductor layer and the substrate. The compound semiconductor layer includes a first semiconductor area having a first conductivity type and a second semiconductor area having a second conductivity type. The buffer layer includes a high electron density area. In the buffer layer, an electron density of the high electron density area is higher than an electron density outside the high electron density area. |
| US11107892B2 |
SiC epitaxial wafer and method for producing same
A method for producing a SiC epitaxial wafer according to the present embodiment includes: an epitaxial growth step of growing the epitaxial layer on the SiC single crystal substrate by feeding an Si-based raw material gas, a C-based raw material gas, and a gas including a Cl element to a surface of a SiC single crystal substrate, in which the epitaxial growth step is performed under growth conditions that a film deposition pressure is 30 torr or less, a Cl/Si ratio is in a range of 8 to 12, a C/Si ratio is in a range of 0.8 to 1.2, and a growth rate is 50 μm/h or more from an initial growth stage. |
| US11107891B2 |
Hexagonal arrays for quantum dot devices
Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous first rows and the plurality of second gates are arranged in electrically continuous second rows parallel to the first rows. Quantum dot devices according to various embodiments of the present disclosure are based on arranging first and second gates in hexagonal/honeycomb arrays. |
| US11107885B2 |
Semiconductor film, solar cell, light-emitting diode, thin film transistor, and electronic device
A semiconductor film includes a cluster of semiconductor quantum dots each having a metal atom and ligands coordinating to respective semiconductor quantum dots, and the semiconductor quantum dots have an average shortest inter-dot distance of less than 0.45 nm. A solar cell, a light-emitting diode, a thin film transistor, and an electronic device include the semiconductor film. |
| US11107882B2 |
Integrated circuit device including complementary metal-oxide-semiconductor transistor with field cut regions to increase carrier mobility
An integrated circuit device includes a substrate including a first conductivity type region and a second conductivity type region, a first active region arranged in the second conductivity type region, a second active region arranged in the first conductivity type region and spaced apart from the first active region with an isolation region between the second active region and the first active region, an isolation film formed in the isolation region, and a first field cut region extending along the isolation region in a first direction parallel with a channel length direction of each of a first conductivity type transistor on the first active region and a second conductivity type transistor on the second active region. |
| US11107877B2 |
Organic light emitting diode display
An organic light emitting diode display includes: a substrate including a display area and a non-display area adjacent to the display area; a pixel thin film transistor positioned in the display area of the substrate; a first data wire positioned on the pixel thin film transistor; a second data wire positioned on the first data wire; an organic light emitting element positioned on the second data wire and electrically connected to the pixel thin film transistor through the first data wire and the second data wire; a circuit unit positioned in the non-display area of the substrate and including a circuit thin film transistor electrically connected to the pixel thin film transistor; and a common power supply line overlapping at least part of the circuit unit, electrically connected to the organic light emitting element, and formed on a same layer as the second data wire. |
| US11107867B2 |
Display device and manufacturing method thereof
A display device includes a substrate, a switching transistor and a driving transistor positioned on the substrate, a first electrode connected to the driving transistor, a second electrode positioned on the first electrode, and a pixel definition layer positioned between the first electrode and the second electrode, where the pixel definition layer includes a first portion, and a second portion having a thickness less than that of the first portion, where a pixel opening defined in the pixel definition layer is enclosed by the first portion, and the second portion overlaps the first electrode and the second electrode. |
| US11107866B2 |
Array test apparatus and method
An array test apparatus includes a signal transmission unit which transmits a data signal to each of a plurality of data lines of a low-temperature polysilicon (“LTPS”) substrate, a signal measurement unit which measures the data signal of each of the data lines of the LTPS substrate, a timer which generates a horizontal period for setting a section in which the data signal is transmitted from the signal transmission unit to each of the data lines and a section in which the data signal output from each of the data lines is measured by the signal measurement unit, and a determination unit which determines whether each of the data lines of the LTPS substrate is normal based on the data signal measured by the signal measurement unit. |
| US11107863B2 |
Organic light-emitting display device with color adjusting pattern, and method of manufacturing the same
An organic light-emitting display device includes a thin film encapsulation layer, a transmission pattern, and a color-adjusting pattern. The thin film encapsulation layer covers an organic light-emitting diode. The transmission pattern is in a light-emitting area on the thin film encapsulation layer. The color-adjusting pattern includes ceramic particles as a coloring agent and is in a non-light-emitting area surrounding the light-emitting area on the thin film encapsulation layer. |
| US11107861B2 |
Organic light emitting diode display
An organic light emitting diode display (OLED) is disclosed. The disclosed OLED includes a substrate including a plurality of sub-pixels, each sub-pixel comprising a display area and a non-display area surrounding the display area, the display area comprising a first display area at a center region of the display area and a second display area surrounding the first display area; a first electrode formed in the display area; an organic light emitting layer formed on the first electrode and extending to the non-display area; a third electrode formed on a portion of the organic light emitting layer in the first display area; and a second electrode formed on the third electrode and the organic light emitting layer, wherein the first and third electrodes are able to achieve a micro cavity effect. |
| US11107858B2 |
Ultrasonic sensing device
An electronic device comprises a CMOS substrate having a first surface and a second surface opposite the first surface. A plurality of ultrasonic transducers is provided having a transmit/receive surface. A contact surface is piezoelectrically associated with the plurality of ultrasonic transducers and is formed on the first surface of the CMOS substrate. The plurality of ultrasonic transducers is disposed on the second surface of the CMOS substrate, with the transmit/receive side attached to the second surface thereof such that the CMOS substrate is between the plurality of ultrasonic transducers and the platen. An image sensing system is also provided, together with a method for ultrasonic sensing in the electronic device. |
| US11107852B2 |
Light receiving element having light blocking section covering at least part of amplifier circuit, light receiving module , photoelectric sensor and biological information measurement
A light receiving element includes a silicon substrate, a photodiode, an amplifier circuit adapted to amplify an output signal from the photodiode, and a light blocking section adapted to cover at least a part of the amplifier circuit to block light, and the photodiode, the amplifier circuit and the light blocking section are provided to the silicon substrate. |
| US11107849B2 |
Photoelectric conversion element, imaging device, and electronic apparatus to improve photoresponse while maintaining superior wavelenght selectivity of a subphthalocyanine and a subphthalocyanine derivative
A photoelectric conversion element according to an embodiment of the disclosure includes a first electrode and a second electrode that are disposed to face each other and a photoelectric conversion layer that is provided between the first electrode and the second electrode, and contains at least a subphthalocyanine or a subphthalocyanine derivative, and a carrier dopant, in which the carrier dopant has a concentration of less than 1% by volume ratio to the subphthalocyanine or the subphthalocyanine derivative. |
| US11107847B2 |
Pixel and imaging array with reduced dark current adapted to low light imaging
A pixel sensor, an imaging array that includes such pixel sensors, and a method for operating an imaging array are disclosed. The pixel sensor includes a transfer gate that connects a photodiode to a floating diffusion node in response to a transfer signal, a reset circuit, and a controller. The reset circuit is adapted to apply either a first potential or a second potential to the floating diffusion node, the second potential being less than the first potential. The controller is configured to cause the reset circuit to apply the first potential to the floating diffusion node while the transfer gate is conducting just prior to a start of an accumulation phase, and then apply the second potential to the floating diffusion node after the transfer gate is rendered non-conducting, the second potential is less than the first potential. |
| US11107846B2 |
Semiconductor device, manufacturing method thereof, and separation apparatus
A technique is described in which a transistor formed using an oxide semiconductor film, a transistor formed using a polysilicon film, a transistor formed using an amorphous silicon film or the like, a transistor formed using an organic semiconductor film, a light-emitting element, or a passive element is separated from a glass substrate by light or heat. An oxide layer is formed over a light-transmitting substrate, a metal layer is selectively formed over the oxide layer, a resin layer is formed over the metal layer, an element layer is formed over the resin layer, a flexible film is fixed to the element layer, the resin layer and the metal layer are irradiated with light through the light-transmitting substrate, the light-transmitting substrate is separated, and a bottom surface of the metal layer is made bare. |
| US11107840B2 |
Method for fabricating a semiconductor device comprising an oxide semiconductor
An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured. |
| US11107838B2 |
Transistor comprising an oxide semiconductor
An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured. |
| US11107836B2 |
Semiconductor device structure and method for forming the same
A method for forming a semiconductor device structure is provided. The method includes forming a first gate stack over a substrate. The substrate has a base and a first fin structure over the base, and the first gate stack wraps around a first upper portion of the first fin structure. The method includes partially removing the first fin structure, which is not covered by the first gate stack. The method includes forming a first mask layer over a first sidewall of the first fin structure. The method includes forming a first stressor over a second sidewall of the first fin structure while the first mask layer covers the first sidewall. The first sidewall is opposite to the second sidewall. The method includes removing the first mask layer. The method includes forming a dielectric layer over the base and the first stressor. The dielectric layer covers the first sidewall. |
| US11107835B2 |
BEOL cross-bar array ferroelectric synapse units for domain wall movement
A method is presented for incorporating a metal-ferroelectric-metal (MFM) structure in a cross-bar array in back end of the line (BEOL) processing. The method includes forming a first electrode, forming a ferroelectric layer in direct contact with the first electrode, forming a second electrode in direct contact with the ferroelectric layer, such that the first electrode and the ferroelectric layer are perpendicular to the second electrode to form the cross-bar array, and biasing the second electrode to adjust domain wall movement within the ferroelectric layer. |
| US11107830B2 |
Integrated assemblies having vertically-spaced channel material segments, and methods of forming integrated assemblies
Some embodiments include a NAND memory array having a vertical stack of alternating insulative levels and conductive levels. The conductive levels include control gate regions and include second regions proximate to the control gate regions. High-k dielectric structures are directly against the control gate regions and extend entirely across the insulative levels. Charge-blocking material is adjacent to the high-k dielectric structures. Charge-storage material is adjacent to the charge-blocking material. The charge-storage material is configured as segments which are vertically stacked one atop another, and which are vertically spaced from one another. Gate-dielectric material is adjacent to the charge-storage material. Channel material extends vertically along the stack and is adjacent to the gate-dielectric material. Some embodiments include integrated assemblies, and methods of forming integrated assemblies. |
| US11107829B2 |
Method of manufacturing a three-dimensional non-volatile memory device
In a method of manufacturing a non-volatile memory device, insulating layers and conductive gates may be alternately formed on a semiconductor substrate to form a stack structure. A contact hole may be formed through the stack structure. A channel layer may be formed on a surface of the contact hole. The contact hole may be filled with a gap-fill insulating layer. The gap-fill insulating layer may be etched by a target depth to define a preliminary junction region. The channel layer may be etched until a surface of the channel layer may correspond to a surface of an uppermost gate among the gates. Diffusion-preventing ions may be implanted into the channel layer. A capping layer with impurities may be formed in the preliminary junction region. |
| US11107825B2 |
Flash memory structure with enhanced floating gate
The present disclosure relates to a flash memory structure. The flash memory structure includes a first doped region and a second doped region disposed within a substrate. A select gate is disposed over the substrate between the first doped region and the second doped region. A floating gate is disposed over the substrate between the select gate and the first doped region, and a control gate is over the floating gate. The floating gate extends along multiple surfaces of the substrate. |
| US11107824B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device, and a method of manufacturing a semiconductor device, includes first stack structures enclosing first channel structures and spaced apart from each other. The first channel structures are spaced apart from each other at a first distance in each of the first stack structures and the first stack structures are spaced apart from each other at a second distance. |
| US11107823B2 |
Integrated structures and methods of forming integrated structures
Some embodiments include an integrated structure having semiconductor material within a region between two parallel surfaces. The semiconductor material has grain boundaries parallel to the parallel surfaces. At least one circuit component utilizes a region of the semiconductor material in a gated device. The semiconductor material has little if any metal therein so that the gated device has Ion/Ioff characteristics similar to if the semiconductor material had no metal therein. Some embodiments include a method in which semiconductor material is provided between a pair of parallel surfaces, and in which the parallel surfaces and semiconductor material extend between a first end and a second end. Metal is formed adjacent the first end, and gettering material is formed adjacent the second end. Thermal processing induces crystallization of the semiconductor material and drives the metal along the semiconductor material and into the gettering material. The gettering material is then removed. |
| US11107822B2 |
Semiconductor device
A semiconductor device includes first and second fin type patterns, first and second gate patterns intersecting the first and second fin type patterns, third and fourth gate patterns intersecting the first fin type pattern between the first and the second gate patterns, a fifth gate pattern intersecting the second fin type pattern, a sixth gate pattern intersecting the second fin type pattern, first to third semiconductor patterns disposed among the first, the third, the fourth and the second gate patterns, and fourth to sixth semiconductor patterns disposed among the first, the fifth, the sixth and the second gate patterns. The first semiconductor pattern to the fourth semiconductor pattern and the sixth semiconductor pattern are electrically connected to a wiring structure, and the fifth semiconductor pattern is not connected to the wiring structure. |
| US11107819B2 |
Memory cells, semiconductor devices comprising memory cells, and related systems
A memory cell is disclosed. The memory cell includes a transistor and a capacitor. The transistor includes a source region, a drain region, and a channel region including an indium gallium zinc oxide (IGZO, which is also known in the art as GIZO) material. The capacitor is in operative communication with the transistor, and the capacitor includes a top capacitor electrode and a bottom capacitor electrode. Also disclosed is a semiconductor device including a dynamic random access memory (DRAM) array of DRAM cells. Also disclosed is a system including a memory array of DRAM cells and methods for forming the disclosed memory cells and arrays of cells. |
| US11107813B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes first and second Fin FETs and a separation plug made of an insulating material and disposed between the first and second Fin FETs. The first Fin FET includes a first fin structure extending in a first direction, a first gate dielectric formed over the first fin structure and a first gate electrode formed over the first gate dielectric and extending in a second direction perpendicular to the first direction. The second Fin FET includes a second fin structure, a second gate dielectric formed over the second fin structure and a second gate electrode formed over the first gate dielectric and extending in the second direction. When viewed from above, an end shape the separation plug has a concave curved shape, while an end of the first gate electrode abutting the separation plug has a convex curved shape. |
| US11107812B2 |
Method of fabricating stacked semiconductor device
The disclosed technology relates to a method of forming a stacked semiconductor device. One aspect includes fin structures formed by upper and lower channel layers which are separated by an intermediate layer. After preliminary fun cuts are formed in the fin structure, a sacrificial spacer is formed that covers end surfaces of an upper channel layer portion. Final fin cuts are formed in the fin structure where the lower channel layer is etched which defines a lower channel layer portion. Lower source/drain regions are formed on end surfaces of the lower channel layer portion. The sacrificial spacer shields the end surfaces of the upper channel layer portion allowing for selective deposition of material for the lower source/drain regions. |
| US11107811B2 |
Metallization structures under a semiconductor device layer
Metallization structures under a semiconductor device layer. A metallization structure in alignment with semiconductor fin may be on a side of the fin opposite a gate stack. Backside and/or frontside substrate processing techniques may be employed to form such metallization structures on a bottom of a semiconductor fin or between bottom portions of two adjacent fins. Such metallization structures may accompany interconnect metallization layers that are over a gate stack, for example to increase metallization layer density for a given number of semiconductor device layers. |
| US11107806B2 |
Electrostatic discharge protection circuit
Described examples include an integrated circuit includes a protected node and a first transistor having a source coupled to the protected node, a gate and a drain coupled to a ground, wherein the first transistor is a MOSFET transistor. The integrated circuit also includes a second transistor having a first current handling terminal coupled to the protected node, a second current handling terminal coupled to the ground and a control terminal coupled to a reference potential, where the second transistor is configured to be off when a first voltage on the control terminal of the second transistor is less than a second voltage on the first current handling terminal of the second transistor. |
| US11107804B1 |
IC with test structures and e-beam pads embedded within a contiguous standard cell area
An IC that includes a contiguous standard cell area with a 4x3 e-beam pad that is compatible with advanced manufacturing processes and an associated e-beam testable structure. |
| US11107802B2 |
Semiconductor device and method of manufacturing the same
In one embodiment, a semiconductor device includes a first substrate, and a plurality of electrode layers provided above the first substrate and stacked in a first direction. The device further includes a first semiconductor layer extending in the first direction in the plurality of electrode layers, and a metal layer provided above an uppermost one of the plurality of electrode layers and extending to cross the first direction. The device further includes a second semiconductor layer including an impurity diffusion layer that is provided between the first semiconductor layer and the metal layer, electrically connects the first semiconductor layer with the metal layer, and has an impurity concentration higher than an impurity concentration of the first semiconductor layer. |
| US11107800B2 |
Display device
A display device can include a substrate on which a semiconductor element and a common electrode are disposed; a light emitting diode which is disposed on the substrate and includes an n-type layer, a light emitting layer, and a p-type layer; an insulating layer disposed on the substrate and the light emitting diode; and a first connecting electrode which is connected to the light emitting diode and the semiconductor element. Accordingly, it is possible to minimize defects which can be caused during a process of disposing the light emitting diode on the substrate. |
| US11107798B2 |
Semiconductor packages and methods of forming the same
Embodiments of the present disclosure include semiconductor packages and methods of forming the same. An embodiment is a method including forming a first die package, the first die package including a first die, a first electrical connector, and a first redistribution layer, the first redistribution layer being coupled to the first die and the first electrical connector, forming an underfill over the first die package, patterning the underfill to have an opening to expose a portion of the first electrical connector, and bonding a second die package to the first die package with a bonding structure, the bonding structure being coupled to the first electrical connector in the opening of the underfill. |
| US11107796B2 |
Semiconductor module including memory stack having TSVs
A semiconductor module includes a module board, an interposer on the module board, and a processing device and a memory stack that are disposed side by side on the interposer, wherein the memory stack includes a base die, and a memory die on the base die, wherein the memory die includes an outer bank region, a central TSV region, first and second inner bank regions, and a first non-central TSV region, wherein the central TSV region is disposed between the outer bank region and the second inner bank region, and the first non-central TSV region is disposed between the first inner bank region and the second inner bank region. |
| US11107795B2 |
Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture
Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture are disclosed herein. In one embodiment, a semiconductor device package includes a plurality of package contacts and a semiconductor die having a plurality of first die bond pads, a plurality of second die bond pads, and a plurality of duplicate die bond pads having the same pin assignments as the first die bond pads. The semiconductor die further includes an integrated circuit operably coupled to the package contacts via the plurality of first die bond pads and either the second die bond pads or the duplicate die bond pads, but not both. The integrated circuit is configured to be programmed into one of (1) a first pad state in which the first and second die bond pads are enabled for use with the package contacts and (2) a second pad state in which the first and duplicate die bond pads are enabled for use with the package contacts. |
| US11107794B2 |
Multi-wafer stack structure and forming method thereof
A multi-wafer stack structure and fabricating method thereof are disclosed. In the multi-wafer stack structure, the first interconnection layer is electrically connected to the second metal layer and the first metal layer via the first opening, the second interconnection layer is electrically connected to the first interconnection layer via the second openings, the third interconnection layer is electrically connected to the third metal layer via the third openings, and the second interconnection layer is in contact with the third interconnection layer, so that there is no need to reserve the wire pressure welding space between the wafers and a silicon substrate is eliminated, the overall device thickness of the multi-wafer stack package is reduced. Moreover, the design processing of the silicon substrate and a plurality of common pads on the silicon substrate is eliminated, thereby reducing the parasitic capacitance and power loss, and increasing the transmission speed. |
| US11107790B2 |
Laser bonding method
A laser bonding method includes forming a bonding part including an adhesive layer and a conductive particle disposed within the adhesive layer on a substrate; aligning a bonding target by disposing the bonding target on a surface of the bonding part opposite the substrate; disposing a pressing part on a surface of the bonding target that is opposite to the bonding part and pressing the bonding target onto the bonding part through the pressing part; heating the bonding target by irradiating at least the pressing part with a laser and conducting heat from the pressing part to the bonding target and from the bonding target to the bonding part; and bonding together the bonding part and the bonding target by the heat conducted from the bonding target to the bonding part so that the conductive particle electrically connects the substrate and the bonding target. The pressing part may be removed. |
| US11107789B2 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device according to the present invention includes at least the following three steps: (A) a step of preparing a first structure (100) including an adhesive laminate film (50) having a heat-resistant resin layer (10), a flexible resin layer (20) and an adhesive resin layer (30) in this order, and a first semiconductor component (60) adhered to the adhesive resin layer (30) and having a first terminal (65); (B) a step of performing solder reflow processing on the first structure (100) in a state where the first semiconductor component (60) is adhered to the adhesive resin layer (30); and (C) a step of, after the step (B), peeling the heat-resistant resin layer (10) from the adhesive laminate film (50). |
| US11107785B2 |
Semiconductor device with a plurality of landing pads and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a plurality of conductive features positioned above the substrate, a plurality of landing pads positioned above the substrate, a coverage layer positioned above the substrate, and a plurality of capacitor structures positioned above the substrate. An angle between the axes of two adjacent landing pads is less than 180 degrees. |
| US11107784B2 |
Semiconductor device having circuit board to which contact part is bonded
A semiconductor device includes: a multilayer substrate which includes a circuit board and an insulating plate on which the circuit board is formed; and a contact part having a cylindrical hollow hole therein and an open end bonded to a bonding area on the front surface of the circuit board via bonding material. In the case of this semiconductor device, wettability of a contact area of the contact part with respect to the bonding material is approximately equal to wettability of at least the bonding area of the circuit board with respect to the bonding material. Thus, the rising of the bonding material into the hollow hole of the contact part during heating performed when the contact part is bonded to the circuit board is reduced. |
| US11107782B2 |
Radio frequency module and communication device
A radio frequency module includes a mounting substrate, a low-noise amplifier including an amplifying element and amplifying a radio frequency signal, and an impedance matching circuit including an integrated first inductor, in which the first inductor is connected to an input terminal of the low-noise amplifier, the low-noise amplifier and the impedance matching circuit are laminated in a direction perpendicular to a main surface of the mounting substrate, and a first multilayer body on which the low-noise amplifier and the impedance matching circuit are laminated is mounted on the main surface. |
| US11107779B2 |
Semiconductor package and manufacturing method thereof
A semiconductor package includes a first die and a second die. The first die includes a first spiral section and first bonding metallurgies of an inductor. The first bonding metallurgies are connected to the first spiral section. The second die is bonded to the first die. The second die includes a second spiral section and second bonding metallurgies of the inductor. The second bonding metallurgies are connected to the second spiral section. The inductor extends from the first die to the second die. |
| US11107777B2 |
Substrate structure and semiconductor package structure including the same
A substrate structure includes a substrate body, a bottom circuit layer, a first bottom protection structure and a second bottom protection structure. The substrate body has a top surface and a bottom surface opposite to the top surface. The bottom circuit layer is disposed adjacent to the bottom surface of the substrate body, and includes a plurality of pads. The first bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. The second bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. A second thickness of the second bottom protection structure is greater than a first thickness of the first bottom protection structure. |
| US11107776B2 |
Semiconductor device
A semiconductor includes a semiconductor element, a connecting terminal electrically connected to the semiconductor element, and a case including an opening space for housing the semiconductor element, a frame which surrounds the opening space and in which the connecting terminal is partially embedded, and a terminal arrangement portion protruding from the frame towards the opening space. The connecting terminal includes an internal terminal portion that extends towards the opening space with respect to the frame, the internal terminal portion having a front surface that is electrically connected to the semiconductor element and exposed to the opening space, and a rear surface that is fixed to the terminal arrangement portion. |
| US11107762B2 |
Semiconductor package
A semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and a first encapsulant covering at least a portion of each of the inactive surface and a side surface of the semiconductor chip. A metal layer is disposed on the first encapsulant, and includes a first conductive layer and a second conductive layer, sequentially stacked. A connection structure is disposed on the active surface of the semiconductor chip, and includes a first redistribution layer electrically connected to the connection pad. A lower surface of the first conductive layer is in contact with the first encapsulant and has first surface roughness, and an upper surface of the first conductive layer is in contact with the second conductive layer and has second surface roughness smaller than the first surface roughness. |
| US11107761B2 |
Semiconductor device
A semiconductor device may include a first conductive plate, a plurality of semiconductor chips disposed on the first conductive plate, and a first external connection terminal connected to the first conductive plate. The plurality of semiconductor chips may include first, second, and third semiconductor chips. The second semiconductor chip may be located between the first semiconductor chip and the third semiconductor chip. A portion of the first conductive plate where the first external connection terminal is connected may be closest to the second semiconductor chip among the first, second, and third semiconductor chips. The first conductive plate may be provided with an aperture located between the portion of the first conductive plate where the first external connection terminal is connected and a portion of the first conductive plate where the second semiconductor chip is connected. |
| US11107760B2 |
Semiconductor device, electric power conversion apparatus and method for manufacturing semiconductor device
According to the present invention, a semiconductor device includes an insulating substrate having an organic insulating layer and a circuit pattern provided on the organic insulating layer; and a semiconductor chip provided on an upper surface of the circuit pattern, wherein a thickness of the circuit pattern is not less than 1 mm and not more than 3 mm. According to the present invention, a method for manufacturing a semiconductor device includes forming a metal layer with a thickness not less than 1 mm and not more than 3 mm on an organic insulating layer; patterning the metal layer by machining processing to form a circuit pattern; and providing a semiconductor chip on an upper surface of the circuit pattern. |
| US11107759B2 |
Chip package and manufacturing method thereof
A chip package includes a lower substrate, a first silicon nitride substrate, a bonding layer, an upper substrate, a first functional layer, a transparent conductive layer, an isolation layer, and a first conductive pad. The supporting layer is located between the lower substrate and the first silicon nitride substrate, and is made of a material including Benzocyclobutene (BCB). The upper substrate is located on the first silicon nitride substrate. The first functional layer is located between the upper substrate and the first silicon nitride substrate. The transparent conductive layer is located on the upper substrate. The isolation layer covers the upper substrate and the transparent conductive layer. The first conductive pad is located in the isolation layer and in electrical contact with the transparent conductive layer. |
| US11107758B2 |
Fan-out package structure and method
A method comprises embedding a semiconductor structure in a molding compound layer, depositing a plurality of photo-sensitive material layers over the molding compound layer, developing the plurality of photo-sensitive material layers to form a plurality of openings, wherein a first portion and a second portion of an opening of the plurality of openings are formed in different photo-sensitive material layers and filling the first portion and the second portion of the opening with a conductive material to form a first via in the first portion and a first redistribution layer in the second portion. |
| US11107755B2 |
Packaging for lateral high voltage GaN power devices
Packaging methods and structures for lateral high voltage gallium nitride (GaN) devices achieve electrical isolation while also maintaining thermal dissipation. The electrical isolation reduces or eliminates vertical leakage current, improving high voltage performance. The packages may use or be compatible standards such as JEDEC, which reduces packaging cost and facilitates implementation of the packaged devices in conventional circuit design approaches. |
| US11107753B2 |
Packaging structure for gallium nitride devices
Implementations of semiconductor packages may include: a substrate having one or more traces on a first side and one or more traces on a second side of the substrate. The substrate may be rigid. The packages may include at least one die mechanically and electrically coupled to the first side of the substrate. The die may be a high voltage die. The package may include one or more traces along one or more edges of the substrate. The one or more traces along the one or more edges of the substrate provide electrical connectivity between the one or more traces on the first side of the substrate and the one or more traces on the second side of the substrate. The package may also include a molding compound encapsulating at least the first and the one or more edges of the ceramic substrate. |
| US11107748B2 |
Semiconductor module and vehicle
A semiconductor module is provided to downsize the module, the semiconductor module including a terminal case made of a resin for housing a semiconductor chip; and a cooling portion including a refrigerant circulating portion through which a refrigerant flows and a joining portion surrounding the refrigerant circulating portion, the refrigerant circulating portion being arranged below the terminal case, and the cooling portion being arranged directly or indirectly in close contact with the terminal case at the joining portion, wherein the terminal case is provided above the joining portion, and has a side wall provided so as to surround the semiconductor chip when seen in a top view, and a temperature sensor for sensing a temperature of the refrigerant is provided on the side wall. |
| US11107743B2 |
Chip on film package and display device including the same
A chip on film package includes; a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members. |
| US11107737B2 |
Control wafer and method for fabricating semiconductor device
A method for fabricating a semiconductor device includes at least the following steps. First, a substrate having a first conductivity type is provided and the substrate is doped with a second conductivity type dopant to form a first well region and a second well region in the substrate, wherein the first conductivity type is opposite to the second conductivity type. An inverter is formed in the first well region. A control transistor and a reference transistor are formed in the second well region, wherein the inverter is electrically connected to the control transistor. An electrical connection path is formed between the inverter and a gate of the control transistor. A difference between electrical parameters of the control transistor and the reference transistor in the control wafer is measured to obtain a measuring result. The semiconductor device having a layout design is fabricated based on the measuring result. |
| US11107736B1 |
Gate structures for semiconductor devices
A semiconductor device with different gate structure configurations and a method of fabricating the semiconductor device are disclosed. The method includes depositing a high-K dielectric layer surrounding nanostructured channel regions, performing a first doping with a rare-earth metal (REM)-based dopant on first and second portions of the high-K dielectric layer, and performing a second doping with the REM-based dopants on the first portions of the high-K dielectric layer and third portions of the high-K dielectric layer. The first doping dopes the first and second portions of the high-K dielectric layer with a first REM-based dopant concentration. The second doping dopes the first and third portions of the high-K dielectric layer with a second REM-based dopant concentration different from the first REM-based dopant concentration. The method further includes depositing a work function metal layer on the high-K dielectric layer and depositing a metal fill layer on the work function metal layer. |
| US11107733B2 |
Multi-dimensional planes of logic and memory formation using single crystal silicon orientations
A method of forming transistor devices includes forming a first transistor plane on a substrate, the first transistor plane including at least one layer of field effect transistors; depositing a first insulator layer on the first transistor plane; forming holes in the first insulator layer using a first etch mask; depositing a first layer of polycrystalline silicon on the first insulator layer, the first layer of polycrystalline filling the holes and covering the first insulator layer; and annealing the first layer of polycrystalline silicon using laser heating, the laser heating creating regions of single-crystal silicon. A top surface of the first transistor plane is a top surface of a stack of silicon formed by epitaxial growth. |
| US11107723B1 |
Method of fabricating semiconductor device
A method of fabricating a semiconductor device, including a high-voltage device region and a low-voltage device region, includes the steps of: providing a substrate, wherein a bottom mask layer and a top mask layer are sequentially disposed thereon; forming a doped region in the substrate based on a first layout pattern; patterning the substrate based on a second layout pattern to form at least two trenches in the substrate respectively in the high-voltage device region and the low-voltage device region; and patterning the top mask layer in the high-voltage device region based on a third layout pattern to form a patterned top mask layer and expose the bottom mask layer from the patterned top mask layer, wherein the third layout pattern is generated by comparing the first layout pattern and the second layout pattern and executing a Boolean operation. |
| US11107721B2 |
3D semiconductor device and structure with NAND logic
A 3D semiconductor device, the device including: a first level including a single crystal layer and a plurality of first transistors; a first metal layer including interconnects between the plurality of first transistors, where the interconnects between the plurality of first transistors includes forming a plurality of logic gates; a plurality of second transistors atop at least a portion of the first metal layer, where at least six of the plurality of first transistors are connected in series forming at least a portion of a NAND logic structure, where the plurality of second transistors are vertically oriented transistors, and where the plurality of second transistors are at least partially directly atop of the NAND logic structure; and a second metal layer atop at least a portion of the plurality of second transistors, where the second metal layer is aligned to the first metal layer with less than 150 nm misalignment, and where at least one of the second transistors is a junction-less transistor. |
| US11107715B2 |
Semiconductor stocker systems and methods
In an embodiment, the present invention discloses cleaned storage processes and systems for high level cleanliness articles, such as extreme ultraviolet (EUV) reticle carriers. A decontamination chamber can be used to clean the stored workpieces. A purge gas system can be used to prevent contamination of the articles stored within the workpieces. A robot can be used to detect the condition of the storage compartment before delivering the workpiece. A monitor device can be used to monitor the conditions of the stocker. |
| US11107711B2 |
Micro light emitting diode transferring apparatus, method for transferring micro light emitting diode, and display apparatus
A micro light emitting diode (micro LED) transferring apparatus is provided. The micro LED transferring apparatus includes a transfer array including an array of a plurality of transfer heads; and an array mask having an array of a plurality of alignment holes. A respective one of the plurality of alignment holes has a size allowing a respective one of the plurality of transfer heads and a micro LED attached to the respective one of the plurality of transfer heads to pass through. |
| US11107709B2 |
Temperature-controllable process chambers, electronic device processing systems, and manufacturing methods
A temperature-controllable process chamber configured to process substrates may include one or more vertical walls at least partially defining a chamber portion of the process chamber. Multiple zones may be located about a periphery of the one or more vertical walls and multiple temperature control devices are thermally coupled to the periphery of the one or more vertical walls in each of the multiple zones. A controller coupled to the temperature control devices may be configured to individually control temperatures of the multiple temperature control devices to obtain substantial temperature uniformity across a substrate located in the chamber portion. Other systems and methods of manufacturing substrates are disclosed. |
| US11107706B2 |
Gas phase etching device and gas phase etching apparatus
Gas phase etching device and gas phase etching apparatus are provided. The gas phase etching device includes: a reaction chamber body, defining a space as a reaction chamber; a pedestal, disposed inside the reaction chamber for holding a workpiece; an inlet member, connected to the reaction chamber body for introducing etchants into the reaction chamber; a pressure regulating assembly, connected to the reaction chamber body for regulating a pressure inside the reaction chamber; a first temperature controller, connected to the reaction chamber body for controlling a temperature therein to a first temperature; and a second temperature controller, connected to the pedestal for controlling a temperature to a second temperature. The first temperature is a temperature that prevents the reaction chamber from being corroded by the etchants. The second temperature is a temperature under which the workpiece held by the pedestal satisfies a temperature requirement for directly performing a subsequent process. |
| US11107705B2 |
Cleaning solution production systems and methods, and plasma reaction tanks
A cleaning solution production system is for cleaning a semiconductor substrate. The system includes a pressure tank, a plasma reaction tank configured to form a plasma in gas bubbles suspended in a decompressed liquid obtained from the pressure tank to thereby generate radical species in the decompressed liquid, a storage tank configured to store a cleaning solution containing the radical species generated in the plasma reaction tank, and a nozzle configured to supply the cleaning solution from the storage tank to a semiconductor substrate. |
| US11107702B2 |
Method for creating through-connected vias and conductors on a substrate
A method to reduce the number and type of processing steps to achieve conductive lines in the planes of a substrate concurrently interconnecting conductor through the substrate, by forming structures in the planes of a substrate. These structures may include interconnect lines, bond pads, and other structures, and improve the performance of subsequent unique processing while simultaneously reducing the manufacturing complexity to reduce time and cost. These structures are formed by selective etching using chemical mechanical polishing, and then completed using a single fill step with a conductive material. |
| US11107701B2 |
Stiffener package and method of fabricating stiffener package
A wafer level fan out package includes a semiconductor die having a first surface, a second surface, and a third surface. A stiffener is disposed on the third surface of the semiconductor die. A conductive via passes through the stiffener. First and second electrically conductive patterns electrically connected to the conductive via are disposed on the first and second surfaces of the semiconductor die and stiffener. Solder balls are electrically connected to the first or second electrically conductive patterns. |
| US11107693B2 |
Method for high aspect ratio photoresist removal in pure reducing plasma
A method for removing photoresist, an oxidation layer, or both from a semiconductor substrate is disclosed. The method includes placing a substrate in a processing chamber, the processing chamber separate from a plasma chamber for generating a non-oxidizing plasma to be used in treating the substrate; generating a first non-oxidizing plasma from a first reactant gas and a first carrier gas in the plasma chamber, wherein the first non-oxidizing plasma comprises from about 10% to about 40% of the first reactant gas, wherein the first reactant gas has a flow rate of from about 100 standard cubic centimeters per minute to about 15,000 standard cubic centimeters per minute, and wherein the first carrier gas has a flow rate of from about 500 standard cubic centimeters per minute to about 20,000 standard cubic centimeters per minute; and treating the substrate by exposing the substrate to the first non-oxidizing plasma in the processing chamber. |
| US11107686B2 |
Methods for manufacturing semiconductor devices
A method for manufacturing a semiconductor device includes performing a first ion implantation process on a substrate to form a lower dopant region in the substrate, patterning the substrate having the lower dopant region to form active patterns, and performing a second ion implantation process on the active patterns to form an upper dopant region in an upper portion of each of the active patterns. The lower and upper dopant regions have a same conductivity type. |
| US11107683B2 |
Selective growth of metal-containing hardmask thin films
Methods and apparatuses for selectively growing metal-containing hard masks are provided herein. Methods include providing a substrate having a pattern of spaced apart features, each feature having a top horizontal surface, filling spaces between the spaced apart features with carbon-containing material to form a planar surface having the top horizontal surfaces of the features and carbon-containing material, selectively depositing a metal-containing hard mask on the top horizontal surfaces of the features relative to the carbon-containing material, and selectively removing the carbon-containing material relative to the metal-containing hard mask and features. |
| US11107680B2 |
Mask assembly and method for fabricating a chip package
A first mask and a second mask are sequentially provided to perform a multi-step exposure and development processes. Through proper overlay design of the first mask and the second mask, conductive wirings having acceptable overlay offset are formed. |
| US11107679B2 |
Method of processing a target material
Methods of processing a target material are disclosed. In one arrangement, a multilayer structure is irradiated with a radiation beam. The multilayer structure comprises at least a target layer comprising the target material and an additional layer not comprising the target material. The additional layer is metallic. The target layer is irradiated through the additional layer during the irradiation of the multilayer structure. A transfer of energy from the radiation beam to the target layer and to the additional layer is such as to cause a thermally-induced change in the target layer. The thermally-induced change comprising one or more of: crystal growth in the target material, increased carrier mobility in the target material, increased chemical stability in the target material, and increased uniformity of electrical properties in the target material. |
| US11107673B2 |
Formation of SiOCN thin films
Methods for depositing silicon oxycarbonitride (SiOCN) thin films on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a silicon precursor and a second reactant that does not include oxygen. In some embodiments the methods allow for the deposition of SiOCN films having improved acid-based wet etch resistance. |
| US11107670B2 |
Method for analyzing a gas by mass spectrometry, and mass spectrometer
A method for analyzing a gas by mass spectrometry includes exciting ions of the gas to be analyzed in an FT ion trap, and recording a first frequency spectrum in a first measurement time interval during or after the excitation of the ions. The first frequency spectrum contains ion frequencies of the excited ions and interference frequencies. The method also includes recording a second frequency spectrum in a second measurement time interval. The second frequency spectrum contains the interference frequencies, but not the ion frequencies of the first frequency spectrum. The method further includes comparing the first frequency spectrum with the second frequency spectrum to identify the interference frequencies in the first frequency spectrum. The disclosure also relates to a mass spectrometer which is suitable for carrying out the method for analyzing the gas by mass spectrometry. |
| US11107669B2 |
Sub-atmospheric pressure laser ionization source using an ion funnel
A system and method for sample analysis using sub-atmospheric pressure (sub-AP) laser ionization. The sub-AP ion source includes a holder with a sample containing analyte molecules, a pulsed laser beam configured to generate ionized species from the sample, an ion extractor adjacent to the holder configured to extract analyte ions from the ionized species by an extraction electric field Es near the sample, an ion funnel structure composed of orifice electrodes located along an ion funnel pathway direction z. The ion funnel structure has an entrance and an exit, the exit being the electrode with the smallest aperture in the structure. This structure is configured for accepting the analyte ions from the ion extractor at the entrance and dragging them toward the exit using an axial electric field Ez along the direction z. The extraction electric field Es is at least partly electrically shielded from the axial electric field Ez. |
| US11107665B2 |
Feeding structure, upper electrode assembly, and physical vapor deposition chamber and device
The present disclosure provides a feeding structure, an upper electrode assembly, and a physical vapor deposition chamber and device. In the present disclosure a RF power is fed through the center of a first introduction member of the feeding structure and is evenly distributed onto a target by a plurality of distribution members. |
| US11107664B2 |
Plasma processing apparatus and prediction apparatus of the condition of plasma processing apparatus
A plasma processing apparatus including a state prediction apparatus that predicts an apparatus state of the plasma processing apparatus configured to include an apparatus data recording unit that records apparatus data output from the plasma processing apparatus during the processing of the sample, a physical environment measurement data recording unit that measures physical environment in the processing chamber and records apparatus physical environment data, data correction unit that extracts a temporal change component of the physical environment from a plurality of the apparatus physical environment data recorded in the physical environment measurement data recording unit and extracts the temporal change component of the physical environment from the apparatus data to remove the temporal change components, and an apparatus state prediction calculation unit that predicts the state of the plasma processing apparatus using the apparatus data from which the temporal change component of the physical environment is removed as input data. |
| US11107660B2 |
Multi-charged particle beam image acquisition apparatus and multi-charged particle beam image acquisition method
A multi-charged particle beam image acquisition apparatus includes an image acquisition mechanism, including a stage on which a target object is capable to be disposed and a deflector for deflecting multiple charged particle beams in array arrangement, configured to acquire, in a state where a scan region width to be scanned by each of the multiple beams has been set depending on an image averaging frequency, image data of each beam by scanning the target object with deflected multiple beams while relatively shifting a stage moving direction angle and an array arranging direction angle of the multiple beams from each other, and an averaging circuit configured to average, using image data of each beam, errors of the image data by superimposing image data of the same position at the image averaging frequency. |
| US11107658B2 |
Fill pattern to enhance e-beam process margin
Lithographic apparatuses suitable for complementary e-beam lithography (CEBL) are described. In an example, a method of forming a pattern for a semiconductor structure includes forming a pattern of parallel lines above a substrate. The method also includes aligning the substrate in an e-beam tool to provide the pattern of parallel lines parallel with a scan direction of the e-beam tool. The e-beam tool includes a column having a blanker aperture array (BAA) with a staggered pair of columns of openings along an array direction orthogonal to the scan direction. The method also includes forming a pattern of cuts or vias in or above the pattern of parallel lines to provide line breaks for the pattern of parallel lines by scanning the substrate along the scan direction. A cumulative current through the column has a non-zero and substantially uniform cumulative current value throughout the scanning. |
| US11107652B2 |
Circuit breaker for gas insulated switchgear
The invention refers to a circuit breaker (300A) comprising a vacuum interrupter (301) for a gas insulated switchgear. Moreover, the invention refers to a gas insulated switchgear comprising at least one circuit breaker (300A) and/or a disconnector pole. The circuit breaker (300A) has a vacuum interrupter (301) comprising a first movable contact (302), a second stationary contact (303) and a first center axis (304). Moreover, the circuit breaker (300A) comprises a first insulator (305), a contact unit (306) arranged at the first insulator (305), wherein the first movable contact (302) can be moved towards the contact unit (306) so as to be connected to the contact unit (306), an electrical conducting unit (307) comprising a first side (308) and a second side (309), wherein the first side (308) and the second side (309) are opposite to each other, wherein the vacuum interrupter (301) is arranged at the first side (308) of the electrical conducting unit (307), and a second insulator (310) wherein the second insulator (310) is arranged at the second side (309) of the electrical conducting unit (307), wherein the second insulator (310) is connected to the second stationary contact (303), wherein the second insulator (310) has a second center axis (311), and wherein the second center axis (311) of the second insulator (310) is parallel to or collinear with the first center axis (304) of the vacuum interrupter (301). |
| US11107649B2 |
Keyboard device
A keyboard device includes a substrate, a connection hook, a keycap, and a connecting member. The substrate has a top surface including an assembly area. The connection hook is disposed on the assembly area and includes a fixed seat fixed on the substrate, a standing portion, and a reinforcement block. The standing portion is extending from the fixed seat and extending in a direction away from the fixed seat. A hook portion is laterally extending from a top end of the standing portion, the hook portion has a bottom edge. The reinforcement block is connected to the standing portion and the bottom edge. The keycap is disposed on the assembly area. The connecting member is connected between the keycap and the assembly area. The connecting member includes a shaft slidably pivoted at the bottom edge. An inner side of the shaft includes an avoidance groove corresponding to the reinforcement block. |
| US11107647B1 |
Solid state circuit interrupter with interlock
A solid state circuit interrupter provides structures which can manually move an isolation switch of a pole from the ON state to the OFF state without the use of auxiliary power but that advantageously additionally provides an interlock apparatus that avoids manually moving the isolation switch from the ON state to the OFF state until certain conditions exist. One such condition is to ensure that some action is taken, such as by switching a physical interlock between one state and another state. Such a change in state of the physical interlock might additionally result in a change in state of an electronic interlock that would resist the solid state switch being moved to its ON state while the isolation switch is capable of being manually switched to its OFF state. The physical interlock might additionally resist the isolation switch from being manually switched into its ON state. |
| US11107644B2 |
Keyswitch device
A keyswitch device includes a cap, a board, a first returning member, and a second returning member. The board is disposed opposite to the cap. The first returning member is disposed between the cap and the board and includes a magnet member and a magnetic member for providing a magnetic force. The second returning member is disposed between the cap and the board for providing an elastic force. When the cap is released at a lowest position, the cap moves upward via the elastic member and then arrives and stays at a highest position via the magnetic force. |
| US11107642B2 |
Electrical switch
The electrical switch includes a first and a second fixed contact, and a movable knife contact including at least one longitudinal pair of blades being flexibly connected to each other, wherein the blades form, in a switching event, contact with contact portions of the first and/or the second fixed contact. Opposite surfaces of the contact portions of the first and the second fixed contact include a roughened area and the inner surface of each blade includes a protruded area or opposite surfaces of the contact portions of the first and the second fixed contact include a protruded area and the inner surface of each blade includes a roughened area. |
| US11107635B2 |
Capacitor component
A capacitor component includes a body including a first surface and a second surface opposing each other in a first direction, a third surface and a fourth surface connected to the first and second surfaces and opposing each other in a second direction, a fifth surface and a sixth surface connected to the first to fourth surfaces and opposing each other in a third direction, and including a first dielectric layer, and a first internal electrode and a second internal electrode disposed to oppose each other in the first direction with the first dielectric layer interposed therebetween, and a first side margin portion and a second side margin portion, respectively including a second dielectric layer, a first margin electrode, and a second margin electrode, disposed in parallel with the fifth and sixth surfaces of the body, and respectively disposed on the fifth and sixth surfaces of the body. |
| US11107631B2 |
Ceramic electronic device and manufacturing method of ceramic electronic device
A ceramic electronic device includes: a ceramic main body having at least two edge faces facing each other; and external electrodes formed on the two edge faces, wherein: the external electrodes have a structure in which a plated layer is formed on a ground layer having ceramic; a main component of the ground layer is a metal; the external electrodes have an extension region that extends to at least one of four side faces from the two edge faces of the ceramic main body; a part of the extension region corresponding to a corner portion of the ceramic main body has a first portion having a maximum spaced distance of 10 μm or less in a face direction of the ground layer; and the plated layer has an average thickness that is 30% or more with respect to the maximum spaced distance, and covers the first portion. |
| US11107626B2 |
Intravascular blood pump comprising corrosion resistant permanent magnet
This invention is directed to a corrosion resistant permanent magnet, to a method for producing a corrosion resistant permanent magnet, and to an intravascular blood pump comprising the magnet. The magnet is corrosion resistant due to a composite coating comprising a metal layer, optionally a metal oxide layer, a layer formed from poly(2-chloro-p-xylylene), and a linker layer between the metal oxide layer and the poly(2-chloro-p-xylylene) layer. |
| US11107620B2 |
Coil component
For a substrate of a coil component, there are arranged a plurality of through-holes; the pattern-wiring is provided with a loop-shaped portion surrounding the circumference of a center hole which penetrates the substrate a pair of end portions which extend from that loop-shaped portion; and the neighboring two through-holes within the plurality of through-holes penetrate the substrate in a state that at least a part of each of the openings thereof superimpose each of the pair of end portions and is connected electrically with each of the end portions. In addition, the opening of one of the through-holes at one of the end portions within the pair of end portions is provided at a biased position close to the other of the end portions with respect to the center of the one of the end portions in the intersecting-direction. |
| US11107618B2 |
Core body and reactor
A core body includes a central iron core, an outer peripheral iron core surrounding the central iron core, and a single hoop material wound body formed by winding a hoop material. At least three iron portions of an outer circumferential surface of the hoop material wound body are bent radially inward thereof. The central iron core includes at least three iron cores, each of which having a cut tip, is made by cutting at least three projection portions of the hoop material wound body. Each of the at least three projection portions is located between the at least three portions. |
| US11107616B2 |
Coil component
A coil component includes a body in which a coil part is embedded. The coil part includes a support member, pattern walls formed on the support member, and coil patterns extending between the pattern walls on the support member, and the pattern walls include support portions having a width greater than an average width of the pattern walls. |
| US11107613B2 |
On-chip resistor trimming to compensate for process variation
A resistance trimming circuit has a resolution of N=X+Y bits. Included is a first circuit with M resistors, where M=2X−1, with each of the M resistors having a resistance of R*(2Y)*i, i being an index having a value ranging from 1 to 2X−1. M switches are associated with the M resistors. Each of the M resistors is coupled between a first node and its one of the M switches, and each of the M switches couples its one of the M resistors to a second node. Included is a second circuit with P resistors, where P=2Y−1, with each of the P resistors having a resistance of R*i. P switches are associated with the P resistors. Each of the P resistors is coupled between the second node and its one of the P switches, and each of the P switches selectively couples its one of the P resistors to a third node. |
| US11107611B2 |
Thermistor element and method for producing same
Provided are a thermistor element including a conductive intermediate layer containing RuO2 which can have a lower resistance and a thinner profile, whereby the increase in resistance can be suppressed even when peeling of the electrode proceeds; and a method for producing the same. The thermistor element according to the present invention includes: a thermistor body 2 made of a thermistor material; a conductive intermediate layer 4 formed on the thermistor body; and an electrode layer 5 formed on the conductive intermediate layer, wherein the conductive intermediate layer has an aggregation structure of RuO2 particles that are in electrical contact with each other where SiO2 is placed in the gaps in the aggregation structure, and has a thickness of 100 to 1000 nm. |
| US11107610B2 |
Thick film resistors having customizable resistances and methods of manufacture
A method includes blending a dielectric material including a titanate with a carbon-based ink to form a modified carbon-based ink. The method also includes printing the modified carbon-based ink onto a structure. The method further includes curing the printed modified carbon-based ink on the structure at a temperature that does not exceed about 250° C. In addition, the method includes processing the cured printed modified carbon-based ink to form a thick film resistor. Blending the dielectric material with the carbon-based ink causes the modified carbon-based ink to have a resistivity that is at least double a resistivity of the carbon-based ink. |
| US11107607B2 |
Foamed polycarbonate separators and cables thereof
A cable separator includes a body, and the body includes a polycarbonate-based material that is at least a partially foamed. Cables and methods of manufacturing such cables having a separator are also provided. |
| US11107604B2 |
Cable or flexible pipe with improved tensile elements
A cable includes an elongated tensile element having a cross section area and including a fibre reinforced polymer composite core having an elastic modulus of at least 70 GPa and a sheath at least partially covering the composite core. The sheath is made of metal and is at least 30% of the cross section area of the tensile element. |
| US11107603B2 |
Multi-core flat cable for vehicle
A multi-core flat cable for a vehicle includes a sheath covering two power wires and at least two signal wires. A pair of the signal wires is twisted and is configured as one twisted pair of signal wires. On a section perpendicular to a longitudinal direction, a ratio (long-axis dimension/short-axis dimension) of a long-axis dimension to a short-axis dimension is equal to or greater than 1.8. |
| US11107602B2 |
Electric wire conductor, covered electric wire, and wiring harness
An electric wire conductor capable of achieving both flexibility and a space-saving property, a covered electric wire and a wiring harness including such an electric wire conductor. The electric wire conductor contains a wire strand containing a plurality of elemental wires twisted together, and has a flat portion where a cross-section intersecting an axial direction of the wire strand has a flat shape. A covered electric wire contains the electric wire conductors and an insulator covering the electric wire conductors. A wiring harness contains such covered electric wires. |
| US11107601B2 |
Elastic conductor, paste for forming elastic conductor, and method for producing elastic conductor
The invention provides an elastic conductor which is excellent in stretchability and hardly causes a decrease in conductivity even when stretched. The elastic conductor includes an elastomer and two types of conductive particles, wherein the two types of conductive particles are flake-like particles and nanoparticles, and the conductive particles are dispersed throughout the elastomer. |
| US11107599B2 |
Diffraction grating for X-ray phase contrast and/or dark-field imaging
The present invention relates to a grating for X-ray phase contrast and/or dark-field imaging. It is described to form a photo-resist layer on a surface of a substrate. The photo-resist layer is illuminated with radiation using a mask representing a desired grating structure. The photo-resist layer is etched to remove parts of the photo-resist layer, to leave a plurality of trenches that are laterally spaced from one across the surface of the substrate. A plurality of material layers are formed on the surface of the substrate. Each layer is formed in a trench. A material layer comprises a plurality of materials, wherein the plurality of materials are formed one on top of the other in a direction perpendicular to the surface of the substrate. The plurality of materials comprises at least one material that has a k-edge absorption energy that is higher than the k-edge absorption energy of Gold and the plurality of materials comprises Gold. |
| US11107598B2 |
Anti-scatter collimator for radiation imaging modalities
Among other things, an anti-scatter collimator (200) includes a first anti-scatter structure (302) defining a retaining member (432). The retaining member includes a first protruding member having a top surface defining a first plane, and a second protruding member having a second top surface defining a second plane. The second protruding member is spaced apart from the first protruding member to define a groove (434). The retaining member includes a support member extending between the first protruding member and the second protruding member. The support member defines a bottom surface of the groove. The bottom surface of the support member is spaced a distance apart from the first plane and the second plane. A second anti-scatter structure (303) includes a septum disposed within the groove. The first protruding member, the second protruding member, and the support member maintain a position of the septum relative to the first anti-scatter structure. |
| US11107597B2 |
Cask and method of producing neutron shield
A cask includes a cask body, an outer cylinder, a plurality of fins, and a plurality of neutron shields. The cask body has a tubular shape around a central axis and is capable of housing fuel assemblies. The outer cylinder has a tubular shape surrounding the cask body. The fins are aligned in a circumferential direction in a tubular space formed between the cask body and the outer cylinder, and connect an outer peripheral surface of the cask body and an inner peripheral surface of the outer cylinder to divide the tubular space into a plurality of divided spaces. The neutron shields contain a neutron shielding material with which the divided spaces are filled. Each neutron shield includes a void portion extending in the axial direction along the central axis. Accordingly, it is possible to reduce stress that may be exerted on the outer cylinder or other components by thermal expansion of the neutron shielding material when the fuel assemblies are housed in the cask. |
| US11107594B2 |
Passive electrical component for safety system shutdown using Gauss' Law
An electro-technical device includes a first housing portion electrically isolated from a second housing portion with a point source being disposed within the first housing portion. A movable conductor is connected to the first portion and is responsive to an electric field generated by the point source to cause the movable conductor to contact the second housing portion to complete a circuit and send out a control signal. |
| US11107592B2 |
Plasma confinement device with helical current and fluid flow
A device and method for generating plasma conditions for deuterium-tritium and advanced fuel thermonuclear fusion consisting of an inner helicity-containing plasma such as a spheromak compact toroid bounded by a plurality of outer cusped magnetic fields. Helicity driven by steady-inductive helicity injectors energizes the plasmoid with helicity. The device further includes means for driving fluid rotation about the device axis, about the device magnetic axis, and means for a hot electron sheath. Means are also provided for reducing particle losses out through the open cusp field lines through helicity injector rectification. |
| US11107586B1 |
System and method for analyzing acetabular cup position
A system and method to identify, convey, and reduce the risk of hip dislocations following hip replacement surgery. Preoperative images are used to identify the pelvic tilt of a patient while the patient is in a sitting position, a standing position, and a supine position. Based on the pelvic tilt and pelvic mobility depicted in the preoperative images, the system can identify a quantitative and/or qualitative risk of hip dislocation when the patient is seated, standing, and lying. During surgery, an intraoperative image can confirm the acetabular cup orientation once implanted and the system can determine the risk of hip dislocation when patient is in the supine position. The system can also extrapolate the dislocation risk when the patient is seated and standing based on acetabular cup position and orientation depicted in the intraoperative image. |
| US11107584B2 |
Collaborative electronic nose management in personal devices
A diagnosis server for collaborating with electronic noses, a related mobile diagnosis unit and a related method may be provided. A diagnosis server may comprise a receiver unit for receiving a set of data from one out of a plurality of e-noses. The set of data may comprise a sensor identifier, a sensor output value, and a relevance flag for a predefined diagnosis. A determination unit may determine a probability factor for the predefined diagnosis based on the set of data, a relevance function and a distribution function. |
| US11107582B2 |
Guideline-based decision support
A system for decision support comprises a path unit (10) for determining a determined path through a decision tree (2) that leads to a determined recommendation node (4) comprising a determined recommendation. The decision tree (2) comprises condition nodes (3) and recommendation nodes (4), wherein a condition node (3) comprises a condition associated with a particular branch of the decision tree (2). A recommendation node (4) comprises a recommendation associated with the one or more conditions of the one or more condition nodes (3) on a path towards the recommendation node (4). The path unit (10) is arranged for taking into account the conditions of the condition nodes (3) along the path by applying the conditions to a set of parameters (1). The system comprises an explanation unit (11) for generating an explanation of a reason for the determined recommendation based on at least one of the condition nodes (3) on the path that leads to the recommendation node (4). |
| US11107576B2 |
Coordinating communications among healthcare providers
Computer-implemented systems and methods automatically track the dynamic composition of a patient-care team by combining and harvesting information from at least two electronic audit trails: (1) a trail recording access to electronic medical records (EMR), e.g., read-access to patient data, electronic prescriptions and physician orders, etc., and (2) a trail recording electronic communications (email, text messages, etc.) regarding and referencing the patient. |
| US11107575B1 |
Lighting system for medical appointment progress tracking
Provided are mechanisms and processes for a lighting system for medical schedule management. According to various examples, an apparatus is provided which comprises a lighting interface configured to connect to a lighting element for illuminating a medical examination room. The apparatus further comprises a power interface coupled to a power source. The apparatus further comprises a transceiver configured to connect to a device corresponding to a physician. The duration of the connection is used to track the presence of the physician in the medical examination room. The transceiver is tuned to transmit a signal strength corresponding to the size and characteristics of the medical examination room. The apparatus is located in a lighting fixture in the medical examination room. The lighting fixture may be centrally located in the medical examination room. |
| US11107574B2 |
Management of medication preparation with formulary management
A pharmacy workflow management application with improved functionality related thereto. The improved functionality may include enhancements to a user interface for maintenance of a formulary at a local system executing the pharmacy workflow management application. The formulary management may include user interface elements provided at least partially based on a user profile. Additional enhancements to a user interface associated with a user profile may be provided for dose order record maintenance using the pharmacy workflow management application. Furthermore, enhancements to triggered scan events for updating a status of a dose order, situation board enhancements related to formatting of the situation board in relation to a user profile, encryption of communication by the pharmacy workflow application, and improved methods of installing updates to terminals of the pharmacy workflow management application are discussed. |
| US11107573B2 |
Systems and methods for processing electronic images for generalized disease detection
Systems and methods are disclosed for generating a specialized machine learning model by receiving a generalized machine learning model generated by processing a plurality of first training images to predict at least one cancer characteristic, receiving a plurality of second training images, the first training images and the second training images include images of tissue specimens and/or images algorithmically generated to replicate tissue specimens, receiving a plurality of target specialized attributes related to a respective second training image of the plurality of second training images, generating a specialized machine learning model by modifying the generalized machine learning model based on the plurality of second training images and the target specialized attributes, receiving a target image corresponding to a target specimen, applying the specialized machine learning model to the target image to determine at least one characteristic of the target image, and outputting the characteristic of the target image. |
| US11107571B2 |
Information processing apparatus, information processing method, program, and medical observation system
Provided is an medical information processing apparatus including processing circuitry that, based on surgical situation information concerning surgical characteristics at a time of observing an interior of a living body, selects at least one of a plurality of biological images each having a different wavelength range or at least one of secondary images generated from the plurality of biological images each having a different wavelength range, as a recommended image. |
| US11107570B2 |
Flexible, extensible and automated systems and methods for scoring the quality of radiology examinations
The present disclosure relates to automated systems and methods which assess the quality of radiology examinations and identify actionable changes to improve the quality of future exams. For each of a plurality of imaging studies, a study protocol and set of study metrics can be defined and the defined study protocol can be performed to generate data associated with the imaging study. A metrics assessment can be performed by applying at least a portion of the data associated with the result of the imaging study against the set of study metrics for the imaging study so as to generate a metrics score for the imaging study. The metrics scores can be stored in a score repository and analyzed so as to provide recommendations to improve the examination process. |
| US11107564B2 |
Accession number correction system
An accession number correction system is operable to determine that an accession number of a received DICOM image does not link to any corresponding one of a plurality of medical reports. A query indicating medical report criteria, generated based on the first DICOM image, is transmitted to a report database, and a set of medical reports are received from the report database in response. One report of the set of medical reports that corresponds to the DICOM image is determined by performing a comparison function on the DICOM image and the one reports to generate a comparison value, and by determining the comparison value compares favorably to a comparison threshold. Updated report header data that includes the accession number of the first DICOM image is generated for the one report and is transmitted to the report database for storage. |
| US11107556B2 |
Authorization system that permits granular identification of, access to, and recruitment of individualized genomic data
Systems and methods are provided for controlling dissemination of genomic data. One embodiment is a system that stores genomic data. The genomic data for each individual lists genetic variants determined to exist within that individual. The system receives an access request for a segment of genomic data for an individual, analyzes an authentication token within the request, authenticates the request as belonging to an account for a user based on the authentication token, and reviews authorization directives for the individual that indicate how predefined portions of genomic data are shared. The system also transmits the segment of genomic data in response to determining that the authorization directives permit the account to access the segment of genomic data, and prevents transmission of the segment of genomic data in response to determining that the authorization directives do not permit the account to access the segment of genomic data. |
| US11107555B2 |
Methods and systems for identifying a causal link
A system for identifying a causal link, the system including a diagnostic generator module configured to receive a first user symptom datum, receive diagnostic training data, and generate using a supervised machine-learning process a diagnostic model that outputs a first prognosis. The system includes a prognostic chaining module configured to receive an expert input dataset, receive the first user symptom datum and the first prognosis, generate a gaussian mixture clustering model and identify a first causal link chained to the first prognosis. The system includes a causal link module configured to receive the first prognosis chained to the first causal link, receive a second prognosis chained to a second causal link, and evaluate the first causal link and the second causal link to calculate a degree of similarity between the first causal link and the second causal link. |
| US11107551B2 |
Directed strategies for improving phenotypic traits
The present invention provides a method for improving at least one phenotypic trait of interest in subsequent generation(s) of a population of individuals, preferably crop plants or cattle. Particularly, the method identifies the combination of at least three individuals that gives, upon subsequent intercrossing, the highest estimated probability of improving the at least one phenotypic trait of interest in the subsequent generation(s). Also provided is a computer-readable medium comprising instructions for performing the method. |
| US11107550B2 |
Self-adaptive read voltage adjustment using boundary error statistics for memories with time-varying error rates
A processing device in a memory system identifies a first range of a plurality of write-to-read delay ranges for the memory component, wherein the first range represents a plurality of write-to-read delay times and has an associated read voltage level used to perform a read operation on a segment of the memory component having a write-to-read delay time that falls within the first range. The processing device further identifies a first set of the plurality of write-to-read delay times at a first end of the first range and a second set of the plurality of write-to-read delay times at a second end of the first range, and determines a first error rate for the memory component corresponding to the first set of the plurality of write-to-read delay times and a second error rate for the memory component corresponding to the second set of the plurality of write-to-read delay times. The processing device determines whether a correspondence between the first error rate and the second error rate satisfies a first threshold criterion, and, responsive to the correspondence between the first error rate and the second error rate not satisfying the first threshold criterion, modifies the read voltage level associated with the first range. |
| US11107548B2 |
Leveraging chip variability
Embodiments are described that leverage variability of a chip. Different areas of a chip vary in terms of reliability under a same operating condition. The variability may be captured by measuring errors over different areas of the chip. A physical factor that affects or controls the likelihood of an error on the chip can be varied. For example, the voltage supplied to a chip may be provided at different levels. At each level of the physical factor, the chip is tested for errors within the regions. Some indication of the error statistics for the regions is stored and then used to adjust power used by the chip, to adjust reliability behavior of the chip, to allow applications to control how the chip is used, to compute a signature uniquely identifying the chip, etc. |
| US11107547B2 |
Semiconductor devices and semiconductor systems that operate with strobe signal during test mode
A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device outputs a chip selection signal, a command/address signal and a clock signal. The first semiconductor device outputs first external data and a strobe signal during a write operation in a test mode and receives second external data to adjust an output moment of the strobe signal during a read operation in the test mode. The second semiconductor device is synchronized with the strobe signal to latch input data generated from the first external data during the write operation according to the chip selection signal and the command/address signal. The second semiconductor device generates output data from the input data and outputs the output data as the second external data during the read operation according to the chip selection signal and the command/address signal. |
| US11107546B2 |
Memory device and operating method thereof
Disclosed are a memory device and an operating method thereof, and the memory device includes a plurality of first data lines, a plurality of second data lines, a common redundant memory region coupled to at least one repair line of the second data lines, a plurality of normal memory regions coupled to the first data lines in common, and coupled in common to the remaining the second data lines excluding the repair line, and a repair circuit coupled to the first and second data lines, and suitable for replacing at least one defective memory cell in the normal memory regions with at least one redundant memory cell in the common redundant memory region by shifting some or all of the first data lines to some or all of the second data lines, based on a row address, a column address and a region address. |
| US11107545B2 |
Shift register, gate drive circuit and display device
This application discloses a shift register, a gate drive circuit and a display device. The signal of the input signal terminal is provided to the pull-up node by the input circuit under the control of the input signal terminal; and the signal of the second reference signal terminal is provided to the output signal terminal by the output circuit under the control of the clock signal terminal and the signal of the pull-up node. The signal of the first reference signal terminal is provided to the pull-up node by the reset circuit under the control of the input signal terminal and the clock signal terminal. The pull-down control circuit resets the output signal terminal according to the signal of the first reference signal terminal. |
| US11107536B2 |
Apparatus for determining data states of memory cells
Memory having a controller configured to cause the memory to determine a plurality of activation voltage levels for the plurality of memory cells, determine a plurality of activation voltage level distributions based on a subset of the plurality of activation voltage levels with each of the activation voltage level distributions corresponding to a respective first subset of memory cells of a plurality of first subsets of memory cells of the plurality of memory cells, determine a plurality of transition voltage levels based on the plurality of activation voltage level distributions, and assign a respective data state of a plurality of data states to each memory cell of a second subset of memory cells of the plurality of memory cells based on the determined activation voltage of that memory cell and the determined plurality of transition voltage levels. |
| US11107533B2 |
Memory with improved cross temperature reliability and read performance
A memory array including memory cells, a temperature sensing circuit, and a memory control unit operatively coupled to the memory array. The memory control unit includes a processor. The processor is configured to receive temperature information from the temperature sensing circuit, initiate programming of the memory cells with data using a first threshold voltage distribution when the temperature information indicates an operating temperature is in a first temperature range, and initiate programming of the memory cells with data using a second threshold voltage distribution when the temperature information indicates the operating temperature is in a second temperature range. |
| US11107532B2 |
Memory device and method of operating memory device
The present technology includes a memory device and a method of operating the memory device. The memory device includes a memory block including a plurality of memory cells connected to word lines, peripheral circuits configured to generate operation voltages to be applied to the word lines, and control logic configured to control the peripheral circuits in response to a program command, a read command, or an erase command. The peripheral circuits include a voltage generator that adjusts a section of threshold voltage distributions of memory cells to be programmed among the memory cells, according to a distance between the word lines. |
| US11107531B2 |
Search circuits, hammer address management circuits, and memory systems including the same
A search circuit includes a content-addressable memory (CAM) including a plurality of CAM cells configured to store a plurality of entry data, each entry data including a first bit corresponding to a least significant bit through a K-th bit corresponding to a most significant bit, the CAM configured to provide a plurality of matching signals indicating whether each of the plurality of entry data matches searching data, and a CAM controller configured to perform a partial searching operation such that the CAM controller applies comparison bits corresponding to a portion of the first through K-th bits as the searching data to the CAM and searches for target entry data among the plurality of entry data based on the plurality of matching signals indicating that the corresponding bits of the target entry data match the comparison bits. |
| US11107525B2 |
Phase change memory with supply voltage regulation circuit
A voltage regulator and a phase change memory are disclosed. In an embodiment a phase-change memory includes an array of a plurality of phase-change memory cells, an address decoder configured for receiving an address signal and selecting a sub-area in the array of the plurality of memory cells, the selected sub-area having a given number of bits of a data signal and a writing circuit including a control circuit configured for receiving the data signal and determining, for each memory cell in the selected sub-area, whether a respective bit of the data signal indicates that the memory cell is to be changed from the amorphous state to the polycrystalline state and one or more driving circuits supplied via a regulated voltage and configured for applying the set current for the first interval to the memory cells that are to be changed from the amorphous state to the polycrystalline state. |
| US11107519B2 |
Techniques for accessing an array of memory cells to reduce parasitic coupling
Techniques are described herein for mitigating parasitic signals induced by state transitions during an access operation of a selected memory cell in a memory device. Some memory devices may include a plate that is coupled with memory cells associated with a plurality of digit lines and/or a plurality of word lines. Because the plate is coupled with a plurality of digit lines and/or word lines, unintended coupling between various components of the memory device may occur during an access operation. To mitigate parasitic signals induced by the unintended coupling, the memory device may isolate the selected memory cell from a selected digit line during certain portions of the access operation. The memory device may isolate the selected memory cell when the plate transitions from a first voltage to a second, when the selected digit line transitions from a third voltage to a fourth voltage, or a combination thereof. |
| US11107517B2 |
Semiconductor memory device and method for refreshing memory with refresh counter
A semiconductor memory device includes: a plurality of banks each suitable for refreshing at least one word line corresponding to a refresh address according to a row active signal; a refresh control circuit suitable for controlling, in response to a refresh command, an activation timing of the row active signal according to mode signals and a counting signal; a refresh counter suitable for generating the counting signal by counting the number of times the row active signal is activated, and generating sequence signals which are sequentially activated; and a detection circuit suitable for generating flag signals by combining the sequence signals, and generating a detection signal according to a corresponding one of the flag signals when any of the mode signals is activated, wherein the refresh counter is initialized by the detection signal. |
| US11107513B2 |
Spin-orbit torque magnetic memory device using alternating current
A magnetic memory according to one embodiment of the present invention comprises: a magnetic tunnel junction comprising a free layer, a reference layer, and a tunnel barrier layer disposed between the free layer and the reference layer; a first conductive line disposed adjacent to the free layer; and a second conductive line disposed adjacent to the free layer and intersecting the first conductive line. A magnetization switching method of the magnetic memory comprises the steps of: applying an alternating current-type first current having a first frequency to the first conductive line; and applying an alternating current-type second current having the first frequency to the second conductive line. The free layer performs magnetization reversal, using the first current and the second current, and the magnetic tunnel junction is disposed on an intersection point between the first conductive line and the second conductive line. |
| US11107509B1 |
Continuous sensing to determine read points
A variety of applications can include devices or methods that provide read processing of data in memory cells of a memory de vice without predetermined read levels for the memory cells identified. A read process is provided to vary a selected access line gate voltage over time, creating a time-variate sequence where memory cell turn-on correlates with programmed threshold voltage. Total string current of data lines of a group of strings of memory cells of the memory device can be monitored during a read operation of selected memory cells of the strings to which a ramp voltage with positive slope is applied to an access line coupled to the selected memory cells. Selected values of the change of the total current with respect to time, from the monitoring of the total current, are determined. Read points to capture data are based on the determined selected values. Additional devices, systems, and methods are discussed. |
| US11107501B2 |
Encrypted data key in medium auxiliary memory
A method for securing user data that is stored to a tape cartridge having a medium auxiliary memory (MAM) is described. When user data is sent to a tape library from a client, the tape library sends a request to a cloud based key management service for a data key to encrypt the user data and an encrypted data key that corresponds to the data key. The data key is used to encrypt the user data which is then stored to the tape cartridge and the encrypted data key is stored to the MAM. Upon decrypting the encrypted user data, the encrypted data key is extracted from the MAM and sent to the cloud based key management service where it is used to produce the data key from the cloud based key management service which is then sent to the tape library. When the tape library is in possession of the data key, the encrypted data in the tape cartridge can then be decrypted and sent to a requester of the user data. |
| US11107499B2 |
Materials for near field transducers and near field transducers containing same
A device including a near field transducer, the near field transducer including gold (Au) and at least one other secondary atom, the at least one other secondary atom selected from: boron (B), bismuth (Bi), indium (In), sulfur (S), silicon (Si), tin (Sn), hafnium (Hf), niobium (Nb), manganese (Mn), antimony (Sb), tellurium (Te), carbon (C), nitrogen (N), and oxygen (O), and combinations thereof; erbium (Er), holmium (Ho), lutetium (Lu), praseodymium (Pr), scandium (Sc), uranium (U), zinc (Zn), and combinations thereof; and barium (Ba), chlorine (Cl), cesium (Cs), dysprosium (Dy), europium (Eu), fluorine (F), gadolinium (Gd), germanium (Ge), hydrogen (H), iodine (I), osmium (Os), phosphorus (P), rubidium (Rb), rhenium (Re), selenium (Se), samarium (Sm), terbium (Tb), thallium (Th), and combinations thereof. |
| US11107498B2 |
Apparatus for producing n-layer optical information carriers and method therefor
A device for manufacturing an n-layered optical information carrier having an injection molding unit for manufacturing a carrier body with a first information layer, and furthermore, a first embossing unit for manufacturing a second information layer. The second information layer has an input via which information carriers can be received in the embossing unit. The embossing unit moreover has an output unit via which the coated information carriers are output. (n−2) additional embossing units are associated with the device, for manufacturing in each case an additional information layer, wherein “n” is greater than two. The respective units are linked to one another so that the n-layered information carrier is manufactured in an inline manufacturing. The (n−2) additional embossing units can be coupled to and uncoupled from the device, wherein the additional embossing units in each case have an input and an output unit. |
| US11107496B2 |
Near field transducers including platinum group alloys
Heat assisted magnetic recording (HAMR) devices that includes a near field transducer, the near field transducer including alloys of a first element selected from: platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), and osmium (Os); and a second element selected from; hafnium (Hf), niobium (Nb), tantalum (Ta), titanium (Ti), vanadium (V), and zirconium (Zr). |
| US11107490B1 |
System and method for adding host-sent audio streams to videoconferencing meetings, without compromising intelligibility of the conversational components
Automated methods and systems are provided for performing acoustic echo cancellation of streaming audio for a plurality of participants who are each receiving the streaming audio from a host, and who are simultaneously engaged in remote audio communications with each other. The streaming audio is captured in memory as an audio signal copy for subsequent use in performing the acoustic echo cancellation. In this manner, participants may engage in remote audio communications with each other without receiving acoustic echoes of the streaming audio received by other participant computers, while still being able to individually hear the streaming audio outputted from their respective speakers. |
| US11107489B2 |
Signal processing apparatus
A signal processing apparatus includes a generator, an output controller, and an echo canceller. The generator generates an output sound signal by combining an over-the-phone sound signal with a system sound signal different from the over-the-phone sound signal. The output controller outputs, to a loudspeaker, the output sound signal generated by the generator. The echo canceller cancels the output sound signal from an input sound signal input via a microphone located in a vicinity of the loudspeaker. The output controller suppresses a level of the system sound signal to be output from the loudspeaker so as not to be greater than a predetermined value within a range in which a volume value for the over-the-phone sound signal is settable. |
| US11107488B1 |
Reduced reference canceller
A system configured to perform echo cancellation using a reduced number of reference signals. The system may perform multi-channel acoustic echo cancellation (MCAEC) processing on a first portion of a microphone audio signal that corresponds to early reflections and may perform single-channel acoustic echo cancellation (AEC) processing on a second portion of the microphone audio signal that corresponds to late reverberations. For example, the system may use MCAEC processing on a plurality of reference audio signals to generate a first echo estimate signal and may subtract the first echo estimate signal from the microphone audio signal to generate a residual audio signal. The system may delay the first echo estimate signal, perform the AEC processing to generate a second echo estimate signal, and subtract the second echo estimate signal from the residual audio signal to generate an output audio signal. This reduces an overall complexity associated with performing echo cancellation. |
| US11107486B2 |
Speech/audio signal processing method and coding apparatus
The present disclosure provides a speech/audio signal processing method based on wideband switching and a coding apparatus. The method includes: if a first wideband speech/audio signal is a harmonic signal, adjusting a determining condition for determining that a second wideband speech/audio signal is a harmonic signal, to obtain a first determining condition, where the first wideband speech/audio signal is a signal before wideband switching, and the second wideband speech/audio signal is a signal after the wideband switching; and determining, according to the first determining condition, whether the second wideband speech/audio signal is a harmonic signal. In the case of wideband switching, signal types of speech/audio signals remain as consistent as possible before and after the switching, so that continuity of the speech/audio signal decoded by a decoder device is ensured as much as possible, further improving speech communication service quality. |
| US11107483B2 |
Audio encoder for encoding a multichannel signal and audio decoder for decoding an encoded audio signal
A schematic block diagram of an audio encoder for encoding a multichannel audio signal is shown. The audio encoder includes a linear prediction domain encoder, a frequency domain encoder, and a controller for switching between the linear prediction domain encoder and the frequency domain encoder. The controller is configured such that a portion of the multichannel signal is represented either by an encoded frame of the linear prediction domain encoder or by an encoded frame of the frequency domain encoder. The linear prediction domain encoder includes a downmixer for downmixing the multichannel signal to obtain a downmixed signal. The linear prediction domain encoder further includes a linear prediction domain core encoder for encoding the downmix signal and furthermore, the linear prediction domain encoder includes a first joint multichannel encoder for generating first multichannel information from the multichannel signal. |
| US11107482B2 |
Systems and methods for speech signal processing to transcribe speech
The present disclosure relates to systems and methods for speech signal processing on a signal to transcribe speech. In one implementation, the system may include a memory storing instructions and a processor configured to execute the instructions. The instructions may include instructions to receive the signal, determine if at least a portion of data in the signal is missing, and when at least a portion of data is missing: process the signal using a hidden Markov model to generate an output; using the output, calculate a set of possible contents to fill a gap due to the missing data portion, with each possible content having an associated probability; based on the associated probabilities, select one of the set of possible contents; and using the selected possible content, update the signal. |
| US11107481B2 |
Low-complexity packet loss concealment for transcoded audio signals
Systems and methods are described for concealing packet loss in a received audio stream. Packets of the audio stream may be received in a non-lapped transform domain format, where at least one packet is missing in the stream. The received packets are decoded, and each missing packet in the decoded stream is replaced by a reduced-energy signal block. Each reduced-energy signal block may also be modified at a beginning or ending boundary, and shifted such that a start or end of each missing packet does not coincide with a peak of a transform window of a lapped transform domain format. The raw audio signal may then be encoded into transform windows having the lapped transform domain format. Packet loss concealment may then be performed for selected transform windows that include modified reduced-energy blocks, either prior to transmission or after transmission by the receiving endpoint. |
| US11107479B2 |
Determining contextual relevance in multi-auditory scenarios
A computer-implemented method for determining contextual relevance in multi-auditory source scenarios is disclosed, the method including receiving, by a cognitive system, auditory communications regarding a current activity, analyzing, by the cognitive system, each auditory communication to determine an intended action. For each intended action, the cognitive system creates a simulation to identify a resulting outcome of each intended action. The method further includes ranking, by the cognitive system, the resulting outcome, the ranking based on a comparison of each simulated result and the corresponding intended action regarding the current activity, and physically implementing the highest rated resulting outcome(s) for the current activity. The analyzing, in one example, includes assigning a weight to each of the relevant auditory communications based on one or more criterion, and ranking the relevant auditory communications by weight. |
| US11107478B2 |
Neural networks for speaker verification
This document generally describes systems, methods, devices, and other techniques related to speaker verification, including (i) training a neural network for a speaker verification model, (ii) enrolling users at a client device, and (iii) verifying identities of users based on characteristics of the users' voices. Some implementations include a computer-implemented method. The method can include receiving, at a computing device, data that characterizes an utterance of a user of the computing device. A speaker representation can be generated, at the computing device, for the utterance using a neural network on the computing device. The neural network can be trained based on a plurality of training samples that each: (i) include data that characterizes a first utterance and data that characterizes one or more second utterances, and (ii) are labeled as a matching speakers sample or a non-matching speakers sample. |
| US11107476B2 |
Speaker estimation method and speaker estimation device
A speaker estimation method that estimate the speaker from audio and image includes: inputting audio; extracting a feature quantity representing a voice characteristic from the input audio; inputting an image; detecting person regions of respective persons from the input image; estimating feature quantities representing voice characteristics from the respective detected person regions; Performing a change such that an image taken from another position and with another angle is input when any person is not detected; calculating a similarity between the feature quantity representing the voice characteristic extracted from the audio and the feature quantity representing the voice characteristic estimated from the person region in the image; and estimating a speaker from the calculated similarity. |
| US11107474B2 |
Character input device, character input method, and character input program
A character input device includes a speech input unit that receives an input speech, a controller that detects a substitution voice included in the input speech received by the speech input unit, and generates a predictive suggestion including a part replaced with the substitution voice and corresponding to the input speech, and a suggestion output unit that outputs the predictive suggestion. |
| US11107467B2 |
Method for voice recognition and electronic device for performing same
An electronic device includes an audio input module, a memory storing a speech recognition application, a first application, and a second application, a communication circuit communicating with a first NLU server associated with the first application and a second NLU server associated with the second application, and a processor electrically connected to the audio input module, the memory, and the communication circuit and executing the speech recognition application. The processor is configured to convert an utterance of a user received through the audio input module, into an audio signal, to transmit text data corresponding to the audio signal to the first NLU server and the second NLU server, to receive a first control message as a result of analyzing the text data, from the first NLU server, to receive a second control message as a result of analyzing the text data, from the second NLU server, to select one of the first control message or the second control message depending on a specified condition, to provide the first control message to the first application, when the first control message is selected, and to provide the second control message to the second application, when the second control message is selected. |
| US11107465B2 |
Natural conversation storytelling system
The present application discloses a multi-media interactive story-telling system that provides natural conversational interactions between a human user and a contributor who appears in multi-media recordings. The multi-media interactive story-telling system includes an intake device for recording interview sessions in which a contributor tells a life story about her life experience. The contributor may rely on a script when creating the life story. The multi-media interactive story-telling system further comprises storage devices for storing the recorded interview sessions and processors for organizing the recorded interview sessions. The multi-media interactive story-telling system further comprises an interactive device for retrieving and playing a recorded interview session in response to a query from a user. |
| US11107463B2 |
Minimum word error rate training for attention-based sequence-to-sequence models
Methods, systems, and apparatus, including computer programs encoded on computer-readable storage media, for speech recognition using attention-based sequence-to-sequence models. In some implementations, audio data indicating acoustic characteristics of an utterance is received. A sequence of feature vectors indicative of the acoustic characteristics of the utterance is generated. The sequence of feature vectors is processed using a speech recognition model that has been trained using a loss function that uses N-best lists of decoded hypotheses, the speech recognition model including an encoder, an attention module, and a decoder. The encoder and decoder each include one or more recurrent neural network layers. A sequence of output vectors representing distributions over a predetermined set of linguistic units is obtained. A transcription for the utterance is obtained based on the sequence of output vectors. Data indicating the transcription of the utterance is provided. |
| US11107462B1 |
Methods and systems for performing end-to-end spoken language analysis
Exemplary embodiments relate to improvements in spoken language understanding (SLU) systems. Conventionally, SLU systems include an automatic speech recognition (ASR) component configured to receive an input of audio data and to generate a textual representation of the audio data. Conventional SLU systems also include a natural language understanding (NLU) component configured to receive a text-based transcript and perform language-based tasks such as domain classification, intent determination, and slot-filling. However, these two components are typically trained separately based on different metrics. In real-world situations, errors in the ASR component propagate to the NLU component, which degrades the performance of the overall system. Exemplary embodiments described herein perform SLU in an end-to-end manner that infers semantic meaning directly from audio features without an intermediate text representation. This may allow for more a more accurate translation performed in a more resource-efficient manner (particularly in terms of processing resources). |
| US11107460B2 |
Adversarial speaker adaptation
Embodiments are associated with a speaker-independent acoustic model capable of classifying senones based on input speech frames and on first parameters of the speaker-independent acoustic model, a speaker-dependent acoustic model capable of classifying senones based on input speech frames and on second parameters of the speaker-dependent acoustic model, and a discriminator capable of receiving data from the speaker-dependent acoustic model and data from the speaker-independent acoustic model and outputting a prediction of whether received data was generated by the speaker-dependent acoustic model based on third parameters. The second parameters are initialized based on the first parameters, the second parameters are trained based on input frames of a target speaker to minimize a senone classification loss associated with the second parameters, a portion of the second parameters are trained based on the input frames of the target speaker to maximize a discrimination loss associated with the discriminator, and the third parameters are trained based on the input frames of the target speaker to minimize the discrimination loss. |
| US11107455B1 |
Constant beam pattern array method
A method for providing a broadband constant beam pattern acoustic array includes providing an array of transducers in a known three dimensional axisymmetric spherical configuration with each transducer element having an associated signal. A user can specify a far field beam pattern for the array. Weightings are calculated for each transducer in the array as being proportional to the voltage that gives the beam pattern power level associated with the bearing for each transducer. Signal power levels for each transducer are modified in accordance with the weightings. The array can be operated for receiving and transmitting signals with a constant beam pattern over a broad range of frequencies. |
| US11107453B2 |
Anti-noise signal generator
An anti-noise signal generator and a method of generating an anti-noise signal are presented. The anti-noise generator includes a first microphone input to receive a first sigma-delta modulated signal at a microphone sampling frequency. The first microphone input is coupled to a combiner via a first path and a second path. The combiner is adapted to combine a first filtered signal from the first path and a second filtered signal from the second path to generate the anti-noise signal. The first path includes a first digital filter adapted to operate at a filter frequency equal or greater than the microphone sampling frequency. The second path includes a second digital filter. The first digital filter may be a sigma-delta based filter that includes a sigma-delta modulator. |
| US11107451B2 |
Method for preparing sound-adsorbing material and sound-adsorbing material
The present invention relates to a method for preparing a sound-adsorbing material and a sound-adsorbing material. The method includes the following steps: S1, preparing a non-foaming material slurry and mixing the slurry uniformly; S2, forming the non-foaming material slurry by using an oil column forming method to form wet granules; S3, drying the wet granules to form dry granules; and S4, roasting the dry granules to form sound-adsorbing material granules. The method has the advantages of simple operation and high reliability. The formed granules can have a uniform size, a smooth surface and high sphericity, and the granules are in contact with each other in points and piled up uniformly, which can reduce the bed resistance. |
| US11107448B2 |
Computing technologies for music editing
This disclosure discloses various computing technologies that enable a user to insert a personal vocal content into an original song in a quick and simple manner, thereby potentially creating a derivative work of the original song. Additionally, these technologies enable a right holder of the original song to monitor the new derivative work in a granular, reliable, de-centralized, and secure manner. |
| US11107447B2 |
Musical instrument tuner
A frequency detection and display device includes a body having a vibratory portion configured for vibrating at a predetermined frequency. In this manner, the vibratory portion provides a visible indication corresponding to the predetermined frequency in response to vibration of an object, such as a stringed musical instrument, to which the frequency detection and display device is attached. |
| US11107443B2 |
Foldable display device and driving method of the same
A foldable display device includes a display panel including a first display area and a second display area, a timing controller configured to receive input image data and to provide a first data packet corresponding to the first display area and a second data packet corresponding to the second display area concurrently, and a data driver configured to receive the first data packet and the second data packet, to determine whether the first display area or the second display area is folded based on the first data packet and the second data packet, and to not output a first data signal corresponding to the first data packet or a second data signal corresponding to the second data packet when the first display area or the second display area is folded. |
| US11107440B2 |
System and method for dynamic backlight and ambient light sensor control management with semi-supervised machine learning for digital display operation
A method of operating or an information handling system operating a dynamic backlight and ambient light sensor (DBL and ALS) brightness control management system comprising a digital display having a selectable brightness level, a processor operatively connected to the digital display for executing code instructions of a dynamic backlight (DBL) control system for modifying brightness levels of some or all portions of the display screen in response to inputs relating to display content type and associated optimal contrast levels for the display content and the processor executing code instructions of an ambient light sensor (ALS) control system to modify brightness levels of some or all portions of the display screen in response to detected ambient light levels of the information handling system where the processor executing code instructions of the DBL and ALS brightness control management system adjusts operation of either the DBL control system or the ALS control system based on location or detected ambient light levels and wherein the adjustment to the DBL control system or the ALS control system prevents interfering impact by both systems. |
| US11107436B2 |
Image processing device and image processing method
A motion detection section 720 detects a motion exceeding a permissible limit in a wide-viewing-angle image displayed on a head-mounted display 100. A field-of-view restriction processing section 750 restricts a field of view for observing the wide-viewing-angle image in a case in which the motion exceeding the permissible limit has been detected in the wide-viewing-angle image. An image provision section 760 provides, for the head-mounted display 100, the wide-viewing-angle image in which the field of view has been restricted. |
| US11107435B2 |
Display apparatus and method of driving the same
A display apparatus includes a display panel, a position detector, a driving controller, a gate driver and a data driver. The display panel is configured to display an image. The position detector is configured to determine a position of a user. The driving controller is configured to generate an overdriving value according to a grayscale value of previous frame data and a grayscale value of present frame data. The gate driver is configured to output gate signals to the display panel. The data driver is configured to output data voltages to the display panel based on the overdriving value. |
| US11107434B2 |
Gamma adjustment circuit and display driver circuit using the same
A gamma adjustment circuit includes: a first node; a second node; a first decoder to which a first voltage signal and a second voltage signal are provided and which outputs either one of the first voltage signal and the second voltage signal as a third voltage signal; an amplifier receiving the third voltage signal as a positive input and outputting a fourth voltage signal; a second decoder receiving the fourth voltage signal and outputting the provided fourth voltage signal as a fifth voltage signal to one of the first and second nodes; a third decoder connected to the first and second nodes, receives the fifth voltage signal from one of the first and second nodes, and outputs the fifth voltage signal to a negative input terminal of the amplifier as a sixth voltage signal; and a first resistor connected between the first node and the second node. |
| US11107431B2 |
Display device with shift register segment start signal control in case of malfunction
A display device includes: a display unit including pixels; a shift register connected to scan signal lines and outputting a pulse signal sequentially, the shift register being divided into shift register segments; a driver generating a clock signal to be supplied to each segment, and a video signal to be input to each pixel; and a controller controlling the driver for generating the clock signal and the video signal, the controller monitoring output of each segment and detecting a malfunction of any of the segments. A shift register unit of a first stage of each segment outputs the pulse signal at a prescribed timing after receiving a start signal. The unit of a stage differing from the first stage outputs the pulse signal at a prescribed timing after receiving a carry signal based on the pulse signal from the unit of a preceding stage. |
| US11107429B2 |
Active matrix substrate, liquid crystal display device, and organic EL display device
According to an embodiment of the present invention, an active matrix substrate (100) includes a display region (DR) defined by a plurality of pixel regions (P) arranged in a matrix and a peripheral region (FR) located around the display region. The active matrix substrate includes a substrate (1), a first TFT (10), and a second TFT (20). The first TFT is supported by the substrate and disposed in the peripheral region. The second TFT is supported by the substrate and disposed in the display region. The first TFT includes a crystalline silicon semiconductor layer (11), which is an active layer. The second TFT includes an oxide semiconductor layer (21), which is an active layer. The first TFT and the second TFT each have a top-gate structure. |
| US11107425B2 |
Electro-optic displays with resistors for discharging remnant charges
An electro-optic display having a plurality of display pixels, each of the plurality of display pixels comprising: a pixel electrode for driving the display pixel; a thin film transistor (TFT) coupled to the pixel electrode for transmitting waveforms to the pixel electrode; a resistor coupled to the pixel electrode for discharging remnant charges from the display subsequent to the TFT being de-activated; and a storage capacitor coupled to the pixel electrode and placed in parallel with the resistor. A time constant of a circuit comprising the pixel electrode, the resistor, and the storage capacitor is larger than a driving frame time of the electro-optic display. |
| US11107422B2 |
Display device with different driving frequencies for still and moving images and method of driving the same
A display device includes a display panel including a plurality of pixels and a display panel driver configured to drive the display panel. Here, the display panel driver is configured to receive input image data, to drive the display panel at a first driving frequency when the input image data corresponds to a moving image, and to select one of a plurality of flicker lookup tables based on the first driving frequency and drive the display panel at a second driving frequency based on the flicker lookup table when the input image data corresponds to a still image. |
| US11107415B2 |
Display driving method and device, compression and decompression methods and devices, display device and storage medium
A display driving method, compensation data compression and decompression methods and devices, a display device and a storage medium. The compensation data compression method includes dividing a display panel into at least one region; determining a reference value according to first compensation data of each pixel unit in each of at least one region; performing a computation on the first compensation data and the reference value to obtain corresponding second compensation data. The storage bit length of the second compensation data is shorter than the storage bit length of the first compensation data. |
| US11107413B2 |
Display substrate and method for manufacturing the same, display device
The present disclosure provides a display substrate and a method for manufacturing the same, and a display device. In the display substrate, the pixel circuit includes a second capacitor, a first electrode of the second capacitor is formed by a connection portion of active layers of a second compensation transistor and a first compensation transistor, a second electrode of the second capacitor is located on a side, facing a base, of the active layer of the first compensation transistor, and the second electrode of the second capacitor is electrically coupled to the power line adjacent thereto through a via hole. The second capacitor with a relative large capacitance is provided to stabilize a voltage at a location where the first compensation transistor and the second compensation transistor are coupled during a light emitting stage. |
| US11107405B2 |
Pixel compensation circuit unit, pixel circuit and display device
A pixel compensation circuit unit, a pixel circuit, and a display device are provided in the disclosure. The pixel compensation circuit unit may include a reset power supply line, a reset control circuit, a bridge circuit, and at least two pixel compensation circuits. The at least two pixel compensation circuits are coupled to the reset power supply line, respectively; the reset control circuit is coupled to the reset power supply line and the bridge circuit, respectively; and the at least two pixel compensation circuits are coupled by the bridge circuit. A plurality of pixel compensation circuits may share one reset power supply line, thereby reducing the number of reset power supply lines and simplifying the structure of the pixel compensation circuit unit. |
| US11107399B2 |
Organic light-emitting diode display device with pixel array
A display device includes power lines, first driving transistors on a first side of each of the power lines, second driving transistors on a second side of each of the power lines, light-emitting elements of a first color, a second color and a third color. A first driving transistor of a first power line drives a light-emitting element of the first color. A second driving transistor of the first power line drives a light-emitting element of the second color. A first driving transistor of a second power line drives a light-emitting element of the third color. A second driving transistor of the second power line drives a light-emitting element of the second color. A first driving transistor of a third power line drives a light-emitting element of the first color. A second driving transistor of the third power line drives a light-emitting element of the third color. |
| US11107398B2 |
Selective pixel driver and display device including the same
A pixel driver includes a plurality of stages, with each stage including a pixel driving signal generator, a shift register, and a selection circuit. The pixel driving signal generator generates a pixel driving signal. The shift register receives image data and the pixel driving signal and generates an output control signal for determining whether to output the pixel driving signal based on the image data and the pixel driving signal. The selection circuit selectively outputs the pixel driving signal in response to the output control signal. |
| US11107397B2 |
Display device having a feedback loop for a power supply voltage
A display device includes a display panel including pixels, a data driver providing data signals to the pixels, a scan driver providing scan signals to the pixels, a DC-DC converter converting an input voltage to a power supply voltage and supplying the power supply voltage to the display panel, a feedback circuit having a variable impedance and providing a feedback path of the power supply voltage to the DC-DC converter by receiving the power supply voltage supplied from the DC-DC converter to the display panel and providing an error signal corresponding to a difference between the feedback voltage and a reference voltage to the DC-DC converter, and a controller controlling the data driver and the scan driver, calculating a panel load of the display panel based on input image data, and adjusting the variable impedance of the feedback circuit according to the calculated panel load. |
| US11107394B2 |
Image display device
An image display device includes pixel circuits arranged in a matrix configuration between a first power supply line and a second power supply line. Each of the pixel circuits includes a light-emitting element and a first circuit connected to the light-emitting element and configured to set a duration during which a current is supplied to the light-emitting element based on a result of comparing a first signal and a first direct current voltage. The first signal includes a triangular wave signal. The first direct current voltage is set in a prescribed period. At least one of the pixel circuits includes a second circuit connected in series to the first circuit. The second circuit is configured to control a current supplied to the first circuit based on a second direct current voltage set in a period different from the prescribed period. |
| US11107392B2 |
Display panel and electronic device
A display panel and an electronic device are provided. The display panel comprises: a light-transmissive display area that comprises first pixel driving circuits; a first pixel array comprising an alternating light-emitting region. The alternating light-emitting region includes a plurality of sub-pixel groups, the plurality of sub-pixel groups include at least two colors, and each one of the plurality of sub-pixel groups includes at least one sub-pixel of the same color, at least two sub-pixel groups of the same color are connected in parallel to the same one of said first pixel driving circuits. The light-transmissive display includes a plurality of switching circuits. Each one of the plurality of switching circuits is connected with corresponding sub-pixel groups and first pixel driving circuit. The display panel also includes a control circuit connected with the plurality of the switching circuits and the first pixel driving circuits. |
| US11107390B2 |
Display device with halo
A display device includes a front portion, a rear portion, a halo, and sides extending between the front portion and the rear portion. The front portion, the rear portion, and the sides form an enclosure. The halo includes a rim and an internal structure. The rim is positioned between the front portion and the rear portion. The internal structure is at least partially within the enclosure and includes a sweep portion and a receiving post. The receiving post and the sweep portion are configured to receive light emitted by one or more light emitting devices and at least one of guide, direct, diffuse, focus, and scatter light emitted by the one or more light emitting devices out of the display device. |
| US11107384B2 |
Display driving device including voltage limiter for sensing voltage variation and limiting voltage level of sensing line
A display driving device includes sensing lines configured to sense pixel signals of a display panel; and a voltage limiter provided for each of the sensing lines. The voltage limiter senses a voltage variation of the sensing line, and limits a voltage level of the sensing line to a reference voltage. |
| US11107380B2 |
GOA unit and method of driving the same, GOA circuit and display apparatus
The present disclosure provides a gate driver-on-array (GOA) unit and a method of driving the same, a GOA circuit, and a display apparatus. The GOA unit includes a pulling-up circuit, a pulling-down circuit and an output holding circuit. The pulling-up circuit is configured to output a gate scanning signal from the output terminal, under the control of a trigger signal, a first control signal and a second control signal. The output holding circuit is configured to hold the gate scanning signal output from the output terminal, under the control of the trigger signal, the first control signal and the second control signal. The pulling-down circuit is configured to reset the gate scanning signal and hold the gate scanning signal in a reset state for a set time period, under the control of the trigger signal, the first control signal and the second control signal. |
| US11107378B2 |
Mischarge detection method, mischarge detection apparatus, and display apparatus
A mischarge detection method, a mischarge detection apparatus, and a display apparatus are provided. The mischarge detection method includes: acquiring a target sub-pixel; cutting off a connection between the target sub-pixel and sub-pixels adjacent to the target sub-pixel in a vertical direction; cutting off a connection between the target sub-pixel and the target data line; outputting a scanning signal of the target scanning line to the pixel electrode of the target sub-pixel through the target data line, the target common electrode line sequentially; acquiring the scanning signal of the target scanning line from the pixel electrode of the target sub-pixel; and acquiring a mischarge degree of an array substrate according to the scanning signal of the target scanning line. |
| US11107372B2 |
Display device and electronic apparatus
[Object] To make it possible to improve viewing angle characteristics more.[Solution] Provided is a display device including: a plurality of light emitting sections formed on a substrate. The light emitting section has a configuration in which a luminescence layer is sandwiched by a first electrode functioning as a reflecting electrode and a second electrode in a stacking direction, a surface of the first electrode facing the luminescence layer is inclined from a plane perpendicular to the stacking direction in at least a partial region in a display surface, and an inclination direction of the first electrode has a distribution in the display surface. |
| US11107370B2 |
Respiratory system simulator
An apparatus that simulates a respiratory system for characterizing particle delivery within lungs by an inhaler within lungs is shown and described. The respiratory system simulator comprises a simulated oral cavity to receive an aerosol, a simulated oropharynx cavity, a simulated lung airway system, and a breath simulator. The simulated oral cavity is configured to receive a flow of particles and direct the flow to the simulated oropharynx cavity. The simulated oropharynx cavity is configured to receive a flow from the simulated oral cavity and direct the flow to a simulated trachea cavity. The simulated trachea cavity directs the flow to the simulated lung airway system. The simulated lung airway system comprises a plurality of bronchial airway generations simulating bronchial airway generations of a lung or lungs. The respiratory system simulator may be maintained at or near humidity and temperature levels within a respiratory system. The breath simulator interface is in fluid communication with the rest of the respiratory system simulator and configured to control a flow through the simulated oropharynx cavity, the simulated trachea airway cavity, and the simulated lung airway system. |
| US11107367B2 |
Adaptive assembly guidance system
A device implementing an adaptive assembly guidance system includes an image sensor and a processor configured to capture, using the image sensor, an image of a set of connectable components. The processor is further configured to process the captured image to detect individual connectable components of the set of connectable components and to detect a current configuration of the set of connectable components. The processor is further configured to determine, based at least in part on the detected individual connectable components of the set of connectable components, a recommended configuration of the set of connectable components. The processor is further configured to display information for assembling the set of connectable components into the recommended configuration from the current configuration. |
| US11107366B2 |
Method and apparatus for capturing a golf swing and fitting a golfer
An image capturing apparatus is disclosed herein. More specifically, image capturing apparatus disclosed herein will be used to help a golfer properly select a golf club utilizing a high speed camera attached to a gantry apparatus capable of adjusting its own position relative to the golfer in order to capture data of a golf swing in an iron type golf club. |
| US11107360B1 |
Automated air traffic control systems and methods
Automated air traffic control systems and methods may include one or more sensors, such as radar sensors, that are positioned and oriented at opposite ends of a runway. The sensors may detect aerial vehicles on the runway, as well as aerial vehicles within approach corridors at opposite ends of the runway, and other aerial vehicles proximate the runway. Based on data received by the sensors, various characteristics of aerial vehicles can be determined, and instructions for the aerial vehicles can be determined based on the detected characteristics. Then, the aerial vehicles may utilize the determined instructions to coordinate their operations proximate the runway, which may include takeoff, taxiing, and/or landing operations. Further, speech-to-data processing may be used to translate between data and speech or audio input/output in order to enable coordination between unmanned aerial vehicles, manned aerial vehicles, and combinations thereof. |
| US11107359B1 |
Terminal area noise management system and method
A terminal area noise management method includes receiving, at a processor, aircraft information for an aircraft operating in a region in proximity to an airport; accessing a plurality of terminal area flight paths available to the aircraft; estimating a plurality of noise profiles for the aircraft, one estimated noise profile for the aircraft for each of the plurality of flight paths; calculating a plurality of cumulative noise fairness measures using each estimated noise profile; calculating a plurality of operational efficiency values for the aircraft, one or more of the calculated operational efficiency values for the aircraft for each of the flight paths; calculating a plurality of cumulative operational fairness measures using each of the calculated operational efficiency values; and selecting a flight path for the aircraft based on maximizing a cumulative noise fairness measure and a cumulative operational fairness measure. |
| US11107356B2 |
Cellular network-based assisted driving method and traffic control unit
A cellular network-based assisted driving method and a traffic control unit are provided, to accurately assess a risk and provide a valuable safety warning for a vehicle. In various embodiment, a first about-to-occur track of a first vehicle is determined based on traveling status information of the first vehicle. The first about-to-occur track is a traveling track of the first vehicle that is to occur within preset duration from a current moment. Warning information can be sent to the first vehicle when it is determined that a second about-to-occur track of a second vehicle intersects the first about-to-occur track. The second about-to-occur track is a traveling track of the second vehicle that is to occur within the preset duration from the current moment. |
| US11107355B2 |
Transport dangerous driving reporting
An example operation includes one or more of identifying a dangerous driving situation, capturing first media by a vehicle involved in the dangerous driving situation, establishing a geofence based on a distance associated with the dangerous driving situation, and capturing second media by one or more other vehicles within the geofence. |
| US11107353B2 |
System for communicable integration of an automobile system and a fuel station system
Embodiments of the present invention provide a system for transferring one or more resources associated with an interaction via an automobile. The system is typically configured for receiving an input from a user, via one or components of an automobile, to identify one or more third party entities associated with an interaction, identifying, via the one or more components, a current location and a destination of the user, identifying the one or more third party entities between the current location and the destination, applying logic to select a third party entity from the one or more third party entities, establishing a communication link with a third party entity device associated with the third party entity, and initiating transfer of resources to the remote device to complete the interaction. |
| US11107352B2 |
Routing both autonomous and non-autonomous vehicles
The present disclosure relates to systems and methods for managing and routing ridesharing vehicles. In some implementations, the systems and methods may count the number of passengers entering a ridesharing vehicle, distribute vehicles in need of charge to charging stations based on predicted future demand, manage a fleet of petrol and electric ridesharing vehicles, route autonomous and non-autonomous vehicles, automatically adjust drop-off locations based on safety constraints, and preschedule a rideshare with an unknown pick-up location. |
| US11107350B2 |
Carrier agnostic relay for delivering information to autonomous vehicles
A device receives a first message indicating that content was transmitted to a telemetry device, generates and sends a second message to a remote device. The device receives a third message from the remote device including first information identifying the remote device and second information identifying a neighbor device of the remote device, and generates and sends a fourth message to the remote device, causing the remote device to download the content via a link and send the fourth message to the neighbor device, which causes the neighbor device to download the content via the link. The device receives a fifth message from the remote device including third information indicating whether the remote device and the neighbor device downloaded the content via the link, and generates and sends, to the base station, a sixth message including the first information, the second information, and the third information. |
| US11107349B2 |
Sidewalk detection for electric scooters
Systems, devices, and methods for detection of a scooter riding environment are described. A scooter alarm and pedestrian walkway detection system includes an alarm, a movement sensor configured to detect motion of a scooter and transmit motion data indicative of the motion to a processor, and an image capture device configured to detect features of a riding environment of the scooter and transmit riding environment data indicative of the features to the processor. The processor is configured to determine whether the riding environment of the scooter is a pedestrian walkway based on the motion data and the riding environment data. The processor is configured to activate the alarm in response to determining that the riding environment of the scooter is a pedestrian walkway. |
| US11107347B2 |
Adaptively controlling traffic movements for driver safety
A camera whose field of view includes an intersection of thoroughfares captures images and/or video of the intersection. Based on the captured images and/or video, a computer system surveys vehicular traffic through the intersection visible and defines both a risk zone of the intersection and a safe zone associated with the intersection. The computer system identifies that an at-risk vehicle is present in the risk zone and automatically modifying a timing of a traffic signal indicator to allow the at-risk vehicle to pass through the risk zone into the safe zone, for example by extending a green or yellow light. |
| US11107345B1 |
Automatically configuring a remote control for a device
Intuitive methods of automatically configuring a remote control for multiple electronic devices are disclosed. The remote control can be automatically configured with the help of a first electronic device that is connected to one or more additional electronic devices. The first electronic device aids in the configuration of the remote control by gathering information about the one or more additional electronic devices and configuring the remote control in accordance. The information about the one or more additional electronic devices may be gathered from the devices themselves, from additional remote controls associated with the devices, and/or from a user, among other possibilities. |
| US11107344B2 |
Rescue system and rescue method, and server used for rescue system and rescue method
A rescue system includes: a plurality of movable bodies each equipped with a camera; and a server configured to communicate with the plurality of movable bodies. The rescue system identifies a protection target, based on information acquired by the camera. The server is configured to (a) define a search area to be searched for the protection target, (b) acquire positional information about the plurality of movable bodies and select, from movable bodies located within the search area, at least one movable body to be used for searching for the protection target, the movable body being selected as a selected movable body, and (c) output, to the selected movable body, a search command for searching for the protection target. |
| US11107343B2 |
System and method of user mobility monitoring
A user mobility monitoring system has a user-wearable device and a remote analysis system. The user-wearable device monitors the physical mobility of a user, having a plurality of sensors, including at least motion sensors, the device being wirelessly connectable to the Internet and adapted in use to transmit wirelessly to the Internet real-time sensor data from the sensors for the duration of a monitoring period. The remote analysis system is connectable to the Internet and adapted in use to receive the sensor data transmitted via the Internet from the user-wearable device and, during the monitoring period, to analyse the data so as to detect a physical instability event of the user and generate corresponding alert data. An analogous method of monitoring the mobility of a user is also provided. The operation of the user-wearable device is controlled at least partly by the remote analysis system. |
| US11107340B1 |
Automobile child alert warning system
An automobile child alert warning system that will prevent young children, babies, and, pets from dying as a result of being left alone in hot locked automobiles. The system includes a warning light, a recording mechanism, a time delay provision, a speaker, and a visual and verbal warning message that alerts driver to make sure everyone has vacated from the vehicle at the end of the trip. This system may be built into a dashboard of the automobile during the manufacturing process. Preferably, the warning light will protrude through the speedometer or be placed adjacent to it. The speedometer location is the ideal location for this warning device because speedometers are usually located directly in front of the driver. In actuality, all that will be visible of this device will be the red warning light. The rest of the components will be hidden behind the dashboard. |
| US11107334B2 |
Connectible component identification
A connectible component is connected to a housing. A sensor of the housing is utilized to detect an identity element of the at connectible component. The connectible component is identified utilizing the at least one sensor. In some implementations, identification of the connectible component may identify whether or not a connectible component is connected to the housing. In other implementations, identification of the connectible component may identify the type of connectible component that is connected. In such implementations, the housing may house an electronic device and the electronic device may be configured based on the type of connectible component that is connected. |
| US11107331B2 |
Wagering game having reels with dynamic growing-symbol feature
A gaming system has a plurality of reels. Each reel has a plurality of symbol locations. The gaming system is in communication with one or more processors. The gaming system involves the selection of a symbol location on a first reel of the plurality of reels. The selected symbol location is associated with a first type of symbol. At least one additional symbol location is added to the first reel at a location adjacent to the selected symbol location. Each additional symbol location is filled with the first type of symbol to create a first clump of the first type of symbols. Alternatively, the gaming system determines a number of additional symbol locations that are added to the first reel adjacent to the selected first symbol location. The gaming system then fills the additional symbol locations with symbols. |
| US11107329B2 |
Gaming system and method providing keno game with a wild extra spot indicator feature
Gaming systems and methods that, upon an occurrence of a designated triggering event, associated with a keno game, provide wild ball feature for one or more keno cards of the keno game. |
| US11107323B2 |
Virtual players card
A gaming machine including a secondary processor coupled to a player tracking system for tracking game play of a patron using a virtual player loyalty card is described. A virtual player loyalty card can be created by associating an existing physical player loyalty card with a newly created mobile loyalty card account. The mobile card can be virtually inserted into an electronic gaming machine when a portable electronic device with an associated mobile application is in the vicinity of an electronic gaming machine. Once the mobile card is virtually inserted into the gaming machine, the patron's game play at the gaming machine can be tracked. |
| US11107321B2 |
Distributed ledger based gaming system
A system is provided for securely issuing a ticket for a draw of a game via smart contracts of a blockchain. The system records in the blockchain a game smart contract. The game smart contract records a draw smart contract for issuing tickets for a draw of the game. The game smart contract receives a game place order message indicating placement of an order for a ticket for the draw of the game. The game smart contract sends to the draw smart contract a draw place order message indicating the placement of the order for the ticket for the draw of the game. The game smart contact receives from the draw smart contract a confirmation that the ticket for the draw of the game has been issued. The game smart contract coordinates generation of winning drawlines and directs the draw smart contract to identify winning tickets. |
| US11107318B2 |
Detecting excluded players and related systems and methods
A gaming system, computer-implemented method and gaming device are operable to determine player identification data corresponding to a player in a property corresponding to a selected one of multiple gaming operator nodes, compare the player identification data with each of multiple data blocks in a block chain to determine a match between the player identification data and one of the data blocks, and responsive determining that the player identification data matches one of the data blocks, send an alarm signal to a gaming operator that corresponds to the selected one of the gaming operator nodes. |
| US11107312B2 |
Gaming machine, control method for machine, and program for gaming machine
A gaming machine provides an operation unit, a display unit, and a control unit. The display unit displays a display area with a plurality of cells in a grid. A respective symbol, from a set of symbols, is displayed in each cell. The symbols in the set of symbols having a ranking from lowest to highest and include first and second sub-groups. The symbols in the second sub-group of symbols have a higher ranking than the symbols in the first sub-group. The control unit randomly selects one of the symbols from the second sub-group of symbols. The selected symbols from the second sub-group of symbols and the first sub-group of symbols forming an instant sub-group of symbols. The control unit being further configured to randomly select a plurality of symbols associated with the display area from the instant sub-group of symbols. |
| US11107310B2 |
Method and system for access systems
Aspects of the invention are directed towards method system and devices assisting a user in providing seamless access to a user through an access point of the access system. The invention describes adjusting the threshold signal strength used by the user terminal to access an access point. The adjustment to the threshold signal strength is determined by determining a change in the time interval based on different time stamps. The different time stamps are registered when a user with the user terminal attempts to access the access point. |
| US11107306B1 |
Systems and methods for machine-assisted vehicle inspection
A remotely-controlled (RC) and/or autonomously operated inspection device, such as a ground vehicle or drone, may capture one or more sets of imaging data indicative of at least a portion of an automotive vehicle, such as all or a portion of the undercarriage. The one or more sets of imaging data may be analyzed based upon data indicative of at least one of vehicle damage or a vehicle defect being shown in the one or more sets of imaging data. Based upon the analyzing of the one or more sets of imaging data, damage to the vehicle or a defect of the vehicle may be identified and corrected. |
| US11107300B2 |
Driving management system, vehicle, and information processing method
A driving management system includes an authentication server, and a vehicle capable of switching between a manual driving mode and an automatic driving mode. The vehicle includes multiple electronic control processors connected to a network inside the vehicle, a first processor that detects switching between the manual driving mode and the automatic driving mode, based on messages issued by one or more electronic control processors of the multiple electronic control processors, and the first processor generates first transaction data including information indicating the detected switching, and a first identifier indicating the vehicle, and transmitting the first transaction data to the authentication server. The authentication server includes a second processor that judges the validity of transaction data including the first transaction data obtained from the vehicle, and the second processor records the transaction data, of which the validity has been verified by the second processor, in a storage device. |
| US11107298B2 |
Sensorized brake pad calibration machines, systems, and methods
Various machines, systems, and methods for generating calibration data for a sensorized brake pad are disclosed. In some embodiments, a system includes a fixture, a brake pad retainer, a pressure plate, an actuator and a controller. The actuator applies a pressure to the sensorized brake pad and signals from the pressure sensors are received. Calibration data is generated based on the signals received from the pressures sensors when the pressure is applied to the sensorized brake pad. |
| US11107296B2 |
Intelligent parking management system and method
An intelligent parking management system for residential communities is disclosed that includes a license plate reader; and a server communicatively coupled to the license plate reader over a network. The server includes a memory storing a parking policy and registered license places for one or more residential communities registered with the at least one server; and at least one processor. The processor is operably configured to receive a license plate number, over the network, from the license plate reader; compare the license plate number to a plurality of registered license plate numbers stored in the memory; and communicate, over the network, a parking violation message as a result of determining that the license plate number does not match any one of the plurality of registered license plate numbers to a user such as a resident, a towing company, or administrator. |
| US11107295B2 |
Element alignment for hangers in computer-aided design
Examples herein describe systems and methods for aligning elements, such as conduit, ductwork, and plumbing within a computer-aided design (“CAD”) application. A plugin can provide an element alignment option on a graphical user interface (“GUI”) of the CAD program. An anchor point from which to align elements is selected in the GUI so that the plugin can choose locations within a structure to run multiple elements in parallel alignment. The system can recommend an alignment plane based on the slopes of the selected multiple elements and provide a direction for a run of the multiple elements. The systems retrieve the specifications and parameters of each individual element to determine its spacing among the run of multiple elements. The run of multiple elements is displayed and manipulated by the plugin via the GUI. |
| US11107290B1 |
Depth map re-projection on user electronic devices
A method includes rendering, on displays of an extended reality (XR) display device, a first sequence of image frames based on image data received from an external electronic device associated with the XR display device. The method further includes detecting an interruption to the image data received from the external electronic device, and accessing a plurality of feature points from a depth map corresponding to the first sequence of image frames. The plurality of feature points includes movement and position information of one or more objects within the first sequence of image frames. The method further includes performing a re-warping to at least partially re-render the one or more objects based at least in part on the plurality of feature points and spatiotemporal data, and rendering a second sequence of image frames corresponding to the partial re-rendering of the one or more objects. |
| US11107285B2 |
Augmented reality-based image editing
A computer-implemented method that includes capturing a first image from a frame of video, analyzing the first image to create a set of artifacts, and classifying an artifact based on an attribute associated with the artifact to create an artifact class. The method also includes comparing the artifact class to a reference class, where, responsive to the comparing, a degree of correspondence is formed. The method continues with detecting a mismatch when the degree of correspondence is below a threshold degree of correspondence, generating a response indicating the mismatch, and causing, responsive to the mismatch, a content production system to change from a first setting to a second setting, the second setting causing a classification of the artifact to change to a second artifact class. |
| US11107284B2 |
System and method for visualization of system components
A system, method, and computer-readable medium for modeling and diagnosing a system. System identification information captured by an AR system is used to identify the system and one or more of a model of the components of the system or an overlay of the system is retrieved from a repository or generated based on component identification information or component performance data and sent to the AR system. A composite view of the model or overlay relative to a dynamic image or model of the system allows a technician to visualize the system and components and diagnose the operation of the system without opening the system. |
| US11107277B2 |
Method and device for constructing 3D scene model
A method and apparatus for constructing a 3D scene model are provided. The method includes: acquiring a first point cloud corresponding to a current target scene (S101); determining a first partial point cloud corresponding to a dynamic object from the first point cloud (S102); constructing a foreground 3D model based on the first partial point cloud (S103); and superimposing the foreground 3D model with a background 3D model to obtain a current 3D scene model (S104). As can be seen, it is not necessary to fuse each pixel acquired by each depth camera. Instead, the dynamic object is determined in the point cloud acquired by the depth camera. Only the foreground 3D model corresponding to the dynamic object is superimposed with the background 3D model corresponding to the static objects obtained in advance. This reduces the amount of computation to build a 3D scene model. |
| US11107272B2 |
Scalable volumetric 3D reconstruction
Scalable volumetric reconstruction is described whereby data from a mobile environment capture device is used to form a 3D model of a real-world environment. In various examples, a hierarchical structure is used to store the 3D model where the structure comprises a root level node, a plurality of interior level nodes and a plurality of leaf nodes, each of the nodes having an associated voxel grid representing a portion of the real world environment, the voxel grids being of finer resolution at the leaf nodes than at the root node. In various examples, parallel processing is used to enable captured data to be integrated into the 3D model and/or to enable images to be rendered from the 3D model. In an example, metadata is computed and stored in the hierarchical structure and used to enable space skipping and/or pruning of the hierarchical structure. |
| US11107258B2 |
Providing a dark viewing mode while preserving formatting
A method for improving visibility of contents displayed on a GUI by providing a dark viewing mode that preserves user-generated formatting and/or style contained in the contents is disclosed. The method includes receiving content for displaying on the display, parsing the received content into one or more objects, based on at least a formatting characteristic of the objects, and comparing for each object a first color characteristic of the object with a second color characteristic to determine if a contrast between the first color characteristic and the second color characteristic satisfies a threshold requirement. Upon determining that the threshold requirement is not satisfied, the method includes adjusting the first characteristic, and displaying the objects with the adjusted first characteristic. |
| US11107256B2 |
Video frame processing method and apparatus
Disclosed in the embodiments of the present application are a video frame processing method and apparatus. An embodiment of the method comprises: acquiring a video frame containing a hand, and detecting key points of the hand contained in the video frame; generating a special effect of the hand on the basis of the key points; and displaying the generated special effect in an image of the video frame. |
| US11107255B2 |
Interactive augmented reality system
Example embodiments described herein relate to an augmented-reality system to generate and cause display of interactive augmented reality content at a client device. |
| US11107253B2 |
Image processing method, and image decoding and encoding method using same
Provided are an image processing method, the method includes the steps of dividing a picture of an image into a plurality of coding units which are basic units in which an inter prediction or an intra prediction is performed; and selectively configuring a prediction mode list for deriving a prediction direction of the decoding target block from an intra prediction direction of an decoding target object from an intra prediction direction of a neighboring block adjacent to the decoding target object for an intra predicted unit among the divided coding units; wherein includes the picture or the divided coding units is/are divided into a binary tree structure in the step of dividing the coding units. |
| US11107251B2 |
Image processing device and method
The present invention relates to an image processing device and method which enable encoding efficiency in intra prediction to be improved. In the event that the optimal intra prediction mode is mode 0, adjacent pixels to be used for prediction of the current block are pixels A0, A1, A2, and A3. According to these pixels and a 6-tap FIR filter, pixels a−0.5, a+0.5, and so on with ½ pixel precision are generated, and further, pixels a−0.75, a−0.25, a+0.25, and a+0.75 with ¼ pixel precision are generated by linear interpolation. Subsequently, the optimal shift amount is determined with a value of −0.75 through +0.75 that is phase difference between an integer pixel and generated fractional pixel precision serving as a candidate of the shift amount in the horizontal direction. The present invention may be applied to an image encoding device which performs encoding using the H.264/AVC system, for example. |
| US11107245B2 |
Image processing device, ranging device, and method
According to one embodiment, an image processing device includes first storage and a processor. The first storage is configured to store a statistical model generated by learning of bokeh that occurs in a first image affected by aberration of a first optical system and varies non-linearly in accordance with a distance to a subject in the first image. The processor is configured to acquire a second image affected by aberration of a second optical system, input the acquired second image into the statistical model corresponding to a lens used in the second optical system and acquire distance information indicating a distance to a subject in the second image. |
| US11107239B2 |
Pose detection method and device, electronic device and storage medium
An orientation detection method and device, electronic device and storage medium, the method comprising: determining first position information of at least one first feature part of a target object in a target image (S100); determining three-dimensional position information of a second feature part of the target object on the basis of the first position information and device parameters of a camera device (S200); and determining spatial orientation of the target object on the basis of the first position information of the at least one first feature part comprised in the second feature part and the three-dimensional position information of the second feature part (S300). The described method may increase the accuracy of orientation detection. |
| US11107238B2 |
Method, system and apparatus for detecting item facings
A method by an imaging controller of detecting item facings from image sensor data includes: obtaining, at the imaging controller, the image sensor data corresponding to a support structure containing at least one item; identifying, by a feature detector of the imaging controller, a set of matched keypoint pairs from keypoints of the image sensor data; determining, by a peak detector of the imaging controller, a separation distance between the keypoints of each matched keypoint pair; detecting, by the peak detector, a count of item instances represented in the image sensor data based on the separation distances; and presenting item facing detection output including the count of item instances. |
| US11107236B2 |
Projected augmented reality interface with pose tracking for directing manual processes
Technologies are described for providing a projected augmented reality system with pose tracking for directing manual processes. A projected augmented reality system includes a video projector, configured to project a dynamically-changing image onto a surface within a work area of an operator, a sensor, and a computer. The computer includes a memory including instructions that when executed cause the computer to obtain three-dimensional pose data using the sensor, determine an output graphical element based on a sequence of three-dimensional pose data over time, and on a current production state, and send an output image based on the output graphical element to the video projector for projection onto the surface. |
| US11107235B1 |
Systems and methods for identifying data suitable for mapping
Systems and methods for identifying data suitable for mapping are provided. In some aspects, the method includes receiving one or more images acquired in an area of interest, and selecting at least two ground control points within a field of view of the one or more images. The method also includes determining perceived locations for the at least two ground control points using the one or more images, and computing pairwise distances between the perceived locations and predetermined locations of the at least two ground control points. The method further includes comparing corresponding pairwise distances to identify differences therebetween, and determining a suitability of the one or more images for mapping based on the comparison. |
| US11107234B2 |
Validation systems and methods for human or object detection
A system includes a sensor and a remote processing and storage component in communication with the sensor. The sensor generates sensor data indicative of the presence of people or objects in a scene. The remote processing and storage component receives the sensor data from the sensor and performs an automated counting process to determine an automated count of people or objects. The component receives a request to perform a validation process for the sensor. The component also generates and transmits a link to a manual validation page that includes an interface for performing a manual count. The component further receives an indication to start a validation process from the manual validation page, generates an automated count value from the performed automated counting process, and receives manual count data. The component also generates a validation report based on the automated count value and the manual count data. |
| US11107228B1 |
Realistic image perspective transformation using neural networks
The present disclosure discloses a system and a method. In example implementations, the system and the method can include receiving an image having a first perspective; generating, via a deep neural network, a depth map corresponding to the image having the first perspective; generating, via the deep neural network, a point cloud representation based on the depth map; projecting the point cloud representation onto a point cloud representation corresponding to an image having a second perspective; generating a depth map corresponding to the image having the second perspective; and generating a synthetic image having the second perspective based on the depth map corresponding to the image having the second perspective and a semantic segmentation map corresponding to the image having the first perspective, wherein the second perspective is different from the first perspective. |
| US11107226B2 |
Object re-identification during image tracking
A system includes sensors and a tracking subsystem. The subsystem tracks first and second objects in a space. Following a collision event between the first and second object, a top-view image of the first object is received from a first sensor. Based on the top-view image, a first descriptor is determined for the first object. The first descriptor is associated with an observable characteristic of the first object. If criteria are not satisfied for distinguishing the first object from the second object based on the first descriptor, a third descriptor is determined for the first object. The third descriptor is generated by an artificial neural network configured to identify objects in top-view images. The tracking subsystem uses the third descriptor to assign an identifier to the first object. |
| US11107225B2 |
Object recognition device and computer readable storage medium
An object recognition device includes a memory, a processor and a computer program stored in the memory and executed by the processor. When the computer program is executed by the processor, the processor implements the following steps: extracting object recognition feature vectors based on at least one frame image of the video on the first tracking target; matching the extracted object recognition feature vectors with object feature vectors of registered objects in a registration object library, the registration object library being established based on pre-learning of the object feature vectors in images of the registered objects; and taking one of the registered objects as a recognition result if the extracted object recognition feature vectors match with the object feature vectors of the one of the registered objects. |