| Document | Document Title |
|---|---|
| US11005706B2 |
Method for configuring forwarding table for user equipment, apparatus, and system
A method for configuring a forwarding table for user equipment, an apparatus, and a system, where an operator server receives a service access request of user equipment, establishes a correspondence for the user equipment, and sends the correspondence to an access node (AN) controller. The correspondence includes a media access control (MAC) address of the user equipment and an identifier of an operator to which the user equipment belongs. The AN controller generates a first forwarding table according to the correspondence, and sends the first forwarding table to an AN. The AN forwards, using the first forwarding table, service data of the user equipment to the operator to which the user equipment belongs. |
| US11005705B1 |
Network fault detection and quality of service improvement systems and methods
A Quality of Service (QoS) improvement system and method for transport network fault detection and QoS improvement so that a telecommunication network service provider can analyze the root cause on chronic performance issues and recommend potential solutions is disclosed. The system runs performance analysis on each AAV (mobile backhaul) or other transport networks and collects performance related metrics data. The system then selects a subset of the data related to certain key performance indicators (KPIs), such as latency, jitter, packet loss ratio, and availability. On this subset of KPI-related data, the system applies clustering techniques to identify clusters with similar performance issues. For each cluster, the system binds the AAV performance KPI data with one or more of the following site features—health, location, vendor, market, service type, etc.—to create a cluster map. The system can then generate inferences on root causes of the performance issues. |
| US11005704B2 |
Mobility robustness in a cellular network
A user equipment starts a first timer in response to detecting a physical layer problem with a radio link between the user equipment and a node of a cellular network. Responsive to detecting a handover measurement event, the user equipment also starts a second timer and sends a measurement report to the node. The starting of the first and second timers causes the first and second timers to simultaneously elapse. Responsive to one of the simultaneously elapsing timers expiring, the user equipment sends a radio link failure report, to the node, indicating which of the simultaneously elapsing timers expired. |
| US11005697B2 |
Orthogonal frequency-division multiplexing equalization using deep neural network
Orthogonal frequency-division multiplexing (OFDM) equalization using a Deep Neural Network (DNN) may be provided. First, a signal in a packet structure may be received at an OFDM receiver from an OFDM transmitter. The signal may have distortion. Training constellation points, pilot constellation points, and data constellation points may be extracted from the signal based on the packet structure. Each data constellation point may correspond to a data subcarrier within a data symbol of the signal. Next, the training constellation points and the pilot constellation may be provided as input for the data symbol to a DNN. A coefficient for each data subcarrier within the data symbol that reverses the distortion may be received as output from the DNN. Then, the coefficient for each data subcarrier may be applied to the corresponding data constellation point to determine a per subcarrier constellation point prediction. |
| US11005694B2 |
Apparatus for analyzing transmitter identification signal and method using the same
Disclosed herein are an apparatus for analyzing a transmitter identification (TxID) signal and a method using the apparatus. The apparatus for analyzing the TxID signal includes a demodulator for decoding the bootstrap of a received signal; a cancellation unit for performing a host signal cancellation process for the received signal, thereby generating a host-signal-cancelled received signal; a correlator for calculating a correlation value between a signal corresponding to the host-signal-cancelled received signal and a signal corresponding to a TxID sequence; and a TxID profile analyzer for generating information about a channel between a transmitter corresponding to the TxID signal and a receiver using the correlation value. |
| US11005690B1 |
Method and device for digital compensation of dynamic distortion in high-speed transmitters
A device and method of operation for digital compensation of dynamic distortion. The transmitter device includes at least a digital-to-analog converter (DAC) connected to a lookup table (LUT), a first shift register, and a second shift register. The method includes iteratively adjusting the input values via the LUT to induce changes in the DAC output that compensate for dynamic distortion, which depends on precursors, current cursors, and postcursors. More specifically, the method includes producing and capturing average output values for each possible sequence of three symbols using the shift register and LUT configuration. Then, the LUT is updated with estimated values to induce desired output values that are adjusted to eliminate clipping. These steps are performed iteratively until one or more check conditions are satisfied. This method can also be combined with techniques such as equalization, eye modulation, and amplitude scaling to introduce desirable output signal characteristics. |
| US11005688B2 |
Common-mode control for AC-coupled receivers
Implementations provide a receiver circuit that includes: an alternate current (AC)-coupling network to filter an input signal, the AC-coupling network including a first RC filter connected between a first input node and a first common node and a second RC filter connected between a second input node and the first common node; a differential amplifier coupled to the AC-coupling network and configured to receive a filtered input signal from the AC-coupling network and generate an output signal, the differential amplifier including a differential pair of transistors and a common-mode measurement network coupled to source terminals of a first and a second transistors in the differential pair; and a first operational amplifier having an input coupled to output terminal of the common-mode measurement network and an output coupled to the first common node. |
| US11005686B2 |
Wireless communication system
Methods and apparatus for communicating circuit switched voice data with a first cellular radio access network (RAN) and communicating voice over Internet protocol (VoIP) packets using session initiation protocol (SIP) with a second cellular RAN. The second cellular RAN does not support circuit switched voice communication. |
| US11005677B2 |
System and method for controlling building systems engineering
The invention relates to a system for controlling building systems engineering on the basis of measured values detected by sensors. The system comprises a mobile device (3), at least one stationary sensor unit (14.1, 14.2, 14.3) and a data processing unit (16). The mobile device (3), the at least one sensor unit (14.1, 14.2, 14.3) and the data processing unit (16) are connected by at least one communications network. The system is distinguished in that the mobile device (3) has at least one sensor (5) for detecting a physical variable, and the data processing unit (16) generates a control signal for the building engineering system on the basis of a combination of information about the physically detected variable of the sensor of the mobile device (3) and of the stationary sensor unit (14.1, 14.2, 14.3). |
| US11005675B2 |
Electronic device and method for providing notification service therefor
An electronic device is disclosed. The electronic device comprises: a communication unit for performing communication with at least one external electronic device; and a processor for receiving, from the external electronic device, interest information of a user in the external electronic device and system information in the external electronic device, comparing the received interest information and system information with notification service information of the electronic device, and determining whether the user registers a notification service. |
| US11005662B2 |
Multimodal communication system
A multimodal communication system includes a vehicle controller that controls one or more systems or subsystems of an unmanned vehicle. The communication controller manages communication and logical access to the unmanned vehicle. One or more sensors in communication with the communication controller detects and measures physical properties in proximity to the unmanned vehicle. Transceivers receive the unmanned vehicle commands that are transmitted simultaneously or concurrently and a monotonic generator generates a monotonic object each time the unmanned vehicle's operating state changes. The communication controller executes the first unmanned vehicle command received that has the correct cryptographic hash validating knowledge of the unmanned vehicle's current operating state. |
| US11005659B2 |
Protocol independent forwarding of traffic for content inspection service
A method, system, and computer-usable medium are disclosed for, responsive to an attempted connection from a client to a server for establishing communications between the client and the server, redirecting the connection to a proxy and injecting protocol-independent header information into a datagram of the traffic between the client and the server, the protocol-independent header information including information based upon which the proxy enforces a security policy. |
| US11005655B2 |
System and method of providing information to a device
In one or more embodiments, one or more systems, methods, and/or processes may provide, to a device coupled to an information handling system, a request for salt data; may receive the salt data from the device; may determine a first position in an application that is executed by at least one processor of the information handling system; may determine a second position in the application, different from the first position; may determine a hash value of the application between the first position and the second position; may encrypt, utilizing a private encryption key, the salt data and the hash value as encrypted data; may provide the encrypted data to a buffer associated with the application; may retrieve the encrypted data from the buffer; and may provide the encrypted data to the device. |
| US11005651B2 |
Method and terminal for establishing security infrastructure and device
A method, terminal and device for establishing security infrastructure, comprising: an intermediate service organization receives an organization secret key sent by a third-party service organization; the intermediate service organization encrypts the organization secret key by a first encryption means and sends the encrypted organization secret key to a security storage region of a terminal; the intermediate service organization receives a first terminal public key encrypted by the terminal using a second encryption means; and the intermediate service organization sends the first terminal public key obtained by decryption to the third-party service organization. The organization secret key of the third-party service organization may be sent to the terminal through the intermediate service organization, and the first terminal public key of the terminal may be sent to the third-party service organization, thus a universal security infrastructure and a technical frame work having good openness may be provided by the intermediate service organization. |
| US11005649B2 |
Autonomous driving controller encrypted communications
An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications. |
| US11005647B2 |
Method for processing an image executed by a terminal forming a “white box” environment
The present invention relates to a method for processing an image executed by a terminal (1), comprising steps of receiving a proof datum previously input by a user of the terminal (1), setting (104, 106) of at least one parameter to a first value when the proof datum is equal to a secret reference datum, and to a second value different to the first value when the proof datum is different to the secret reference datum, and generation (200) of an output datum from an input datum being or dependent on an image previously acquired by a sensor (4), and also from the parameter, the output datum having a value as function of the value the parameter has been set to. |
| US11005641B2 |
Distributed antenna system for multiple input multiple output signal
According to an aspect of the inventive concept, there is provided a master unit included in a distributed antenna system of a frequency division duplex scheme, includes: a frequency converting unit converting a frequency of a first signal received from a base station into a predetermined frequency to generate a first frequency conversion signal; a signal combining unit combining the first frequency conversion signal and a second signal received from the base station to generate a transmit signal; and a signal transmitting/receiving unit transmitting the transmit signal to a remote unit connected through a single transmission line. |
| US11005640B2 |
Component carrier activation and deactivation using resource assignments
This invention relates to a proposal of an uplink resource assignment format and a downlink resource assignment format. Furthermore, the invention relates to the use of the new uplink/downlink resource assignments in methods for (de)activation of downlink component carrier(s) configured for a mobile terminal, a base station and a mobile terminal. To enable efficient and robust (de)activation of component carriers, while minimizing the signaling overhead, the invention proposes a new uplink/downlink resource assignment format that allow the activation/deactivation of individual downlink component carriers configured for a mobile. The new uplink or downlink resource assignment comprises an indication of the activation state of the configured downlink component carriers, i.e., indicate which downlink component carrier(s) is/are to be activated or deactivated. This indication is for example implemented by means of a bit-mask that indicates which of the configured uplink component carriers are to be activated respectively deactivated. |
| US11005639B2 |
Methods and apparatus for associating carriers in a wireless communication network
The present disclosure provides methods and apparatus for associating carriers in a wireless communication network. One embodiments provides a method in a wireless terminal device. The wireless terminal device is configurable with a plurality of carriers for communication with one or more network nodes of a wireless network. The plurality of carriers comprise a first carrier operated by a first network node of the wireless network located at a first cell site. The method comprises: responsive to a determination that a second carrier of the plurality of carriers is operated by the first network node or a second network node of the wireless network that is located at the first cell site: obtaining one or more measured values for one or more radio characteristics for the first carrier; and utilizing the one or more measured values to transmit a wireless radio message over the second carrier. |
| US11005634B2 |
Dynamic flow control in AMPDU aggregation in wireless communications
A first communication apparatus dynamically controls data flow in aggregated medium access control (MAC) protocol data unit (AMPDU) aggregation by negotiating an initial block acknowledgement (Block-ACK) window size for the AMPDU aggregation with the second communication apparatus. The first communication apparatus adjusts the AMPDU aggregation during subsequent communication with the second communication apparatus by creating a Block-ACK frame with a reserved field, which has a value indicating a change to the AMPDU aggregation, and then transmitting the Block-ACK frame to the second communication apparatus. |
| US11005632B2 |
Dynamic signaling of the downlink and uplink subframe allocation for a TDD wireless communication system
An apparatus for use in a wireless communication network, comprising a processing resource configured to determine a time interval for periodic time division duplex (TDD) Uplink/Downlink (UL/DL) reconfiguration windows, generate a UL/DL reconfiguration command to indicate a dynamic TDD UL/DL allocation change, and encode the UL/DL reconfiguration command in a physical downlink control channel (PDCCH) data, and a radio front end (RF) interface coupled to the processing resource and configured to cause the encoded UL/DL reconfiguration command to be transmitted to a first of a plurality of wireless user equipment (UEs) in a first of the UL/DL reconfiguration windows, wherein the encoded UL/DL reconfiguration command is transmitted via a PDCCH to provide a fast TDD UL/DL reconfiguration. |
| US11005625B2 |
Reference signal indication method and apparatus to improve spectrum efficiency
This application discloses an indication method and apparatus, to support a requirement of a complex and fickle scenario. The method includes: generating and sending an arrangement indication used to indicate an arrangement manner of a reference signal, where the reference signal occupies at least one group of time frequency resources, and the arrangement manner is frequency division, time division, frequency division+code division, or time division+code division; in the frequency division manner, each group of time frequency resources occupy a symbol in time domain and at least one contiguous subcarrier in frequency domain; in the time division manner, each group of time frequency resources occupy at least one contiguous symbol in time domain and a subcarrier in frequency domain. |
| US11005619B2 |
Method and system for non-orthogonal multiple access communication
A bit-level operation may be implemented prior to modulation and resource element (RE) mapping in order to generate a NoMA transmission using standard (QAM, QPSK, BPSK, etc.) modulators. In this way, the bit-level operation is exploited to achieve the benefits of NoMA (e.g., improved spectral efficiency, reduced overhead, etc.) at significantly less signal processing and hardware implementation complexity. The bit-level operation is specifically designed to produce an output bit-stream that is longer than the input bit-stream, and that includes output bit-values that are computed as a function of the input bit-values such that when the output bit-stream is subjected to modulation (e.g., m-ary QAM, QPSK, BPSK), the resulting symbols emulate a spreading operation that would otherwise have been generated from the input bit-stream, either by a NoMA-specific modulator or by a symbol-domain spreading operation. |
| US11005618B1 |
Adaptive high efficiency, low latency DOCSIS PGS scheduler
Determining when to provide a Proactive Grant Service (PGS) scheduling grant. A plurality of PGS grants are issued to a cable modem (CM). The PGS grants that were utilized by the CM are monitored as well as those PGS grants that were not utilized by the CM. A compromise PGS grants pattern for that CM is generated based on the observations of which PGS grants the CM utilized and which PGS grants the CM did not utilize. The compromise PGS grants pattern for that CM optimizes a projected experienced latency and jitter for particular data flows of the CM verses a projected wasted upstream capacity. |
| US11005613B2 |
Multiple power control and timing advance loops during wireless communication
A method of wireless communication includes receiving a signal from an base station. The method also includes determining a timing advance loop from a set of timing advance loops, and/or a power control loop from a set of power control loops. The determination is based on the received signal. |
| US11005610B2 |
Method for setting starting position of data channel in wireless communication system and device using method
Provided are a method for setting a starting position in a time domain of a data channel in a wireless communication system and a device using the method thereof. The method comprises the steps of: receiving position information notifying the position at which data channels start in a plurality of subframes; receiving a control channel in a first downlink subframe; and receiving at least one data channel scheduled by the control channel in the plurality of the downlink subframes, wherein the position at which the data channel starts in the plurality of the downlink subframes is determined on the basis of the position information. |
| US11005609B2 |
Apparatus and method for avoiding deterministic blanking of secure traffic
In one embodiment an apparatus, method, and system is described, the embodiment an apparatus, method including receiving a stream of data frames at an input interface, the data frames one of including security frames, or being included in security frames, wherein the security frames include payload data, performing forward error correction on the data frames a forward error correction (FEC) decoder, buffering received data frames at a buffer and blanker engine and building a complete security frame of the received data frames, determining whether or not to suppress taking a consequent action based on a frequency of authentication errors at an authentication engine, wherein the consequent action to be taken or suppressed, when taken, is taken upon payload data of one or more security frames including a data frame upon which an authentication error occurred. Related apparatus, methods and systems are also described. |
| US11005606B2 |
Systems and methods for removal of duplicated packets for transmission
According to certain embodiments, a method in a wireless device includes transmitting a protocol data unit (PDU) or segment of a PDU on a first link and transmitting the PDU or the segment of the PDU on a second link. One or more retransmissions of the PDU or the segment of the PDU are scheduled on the second link. A positive acknowledgment is received from a receiver. The positive acknowledgement indicates a successful receipt of the PDU or the segment of the PDU on the first link. In response to receiving the positive acknowledgement, the one or more retransmissions of the PDU or the segment of the PDU on the second link are cancelled. |
| US11005602B2 |
HARQ buffer size design for communication systems
Techniques and examples of hybrid automatic repeat request (HARQ) buffer size design for communication systems are described. A user equipment (UE) communicates with a serving cell of a wireless network using a HARQ mechanism, with the communicating involving: (a) determining, by the processor, a respective size of each buffer of a plurality of buffers corresponding to a plurality of HARQ processes on a per-HARQ process basis; and (b) storing, by the processor, respective information in each buffer of the plurality of buffers for a corresponding HARQ process among the plurality of HARQ processes. |
| US11005601B2 |
Transmission device, reception device, and communication method
In a case of a contention-based radio communication technique, it is necessary to identify a terminal apparatus that has performed data transmission among terminal apparatuses sharing frequency resources. There is a problem that it is difficult to identify the terminal apparatus that has performed data transmission in a case with a large number of terminal apparatuses that are non-orthogonally spatial multiplexed. Provided is a transmission device for transmitting a data signal to a reception device, the transmission device including: a transmission processing unit configured to transmit the data signal without performing SR transmission or receiving control information of transmission permission transmitted from the reception device; an identification signal multiplexing unit configured to multiplex an identification signal to an orthogonal resource; and a control information receiving unit configured to receive in advance a transmission parameter relating to transmission of the data signal. The transmission processing unit transmits the identification signal and a data signal in a case that the transmission processing unit repeatedly transmits the same data signal, based on the transmission parameter. |
| US11005599B2 |
Data transmission systems and data transmission methods of suppressing data error occurrences due to crosstalk
A data transmission system includes a data transmitter and a data receiver. The data transmitter outputs ‘N’-bit transmission data (where ‘N’ denotes a natural number which is equal to or greater than two). The data receiver receives the ‘N’-bit transmission data through ‘N’-number of data transmission lines. The data receiver transmits a re-transmission request signal to the data transmitter when the ‘N’-bit transmission data inputted to the data receiver are erroneous data. The data transmitter divides the ‘N’-bit transmission data in response to the re-transmission request signal and operates in a first data re-transmission mode so that the divided transmission data are resent, together with first ground data, to the data receiver. |
| US11005597B2 |
Two-stage scrambling for polar coded PDCCH transmission
A wireless transmit receive unit (WTRU) may receive a Physical Downlink Control Channel (PDCCH) transmission and perform early termination on the PDCCH transmission. Transmissions that are not intended for the WTRU may be terminated. The WTRU may perform a first decode of the PDCCH transmission based on a first scrambling sequence. The first scrambling sequence may be generated using a Gold sequence, which may be initialized based on a WTRU identifier. If the first decode is not successful, the WTRU may determine that the PDCCH transmission is not intended for the WTRU. The WTRU may perform an assistance bit added (ABA) polar decode of the PDCCH transmission based on a second scrambling sequence (e.g., a cell radio network temporary ID (C-RNTI)). The WTRU may perform a CRC on the output of the ABA polar decode to obtain downlink control information (DCI). |
| US11005593B2 |
Systems and methods for multi-carrier signal echo management using pseudo-extensions
A receiver is configured to capture a plurality of linearly distorted OFDM symbols transmitted over a signal path. The receiver forms the captured OFDM symbols into an overlapped compound data block that includes payload data and at least one pseudo-extension, processes the overlapped compound block with circular convolution in the time domain using an inverse channel response, or frequency domain equalization, to produce an equalized compound block, and discards end portions of the equalized block to produce a narrow equalized block. The end portion corresponds with the pseudo-extension, and the narrow block corresponds with the payload data. The receiver cascades multiple narrow equalized blocks to form a de-ghosted signal stream of OFDM symbols. The OFDM symbols may be OFDM or OFDMA, and may or may not include a cyclic prefix, which will have a different length from the pseudo-extension. |
| US11005591B2 |
Impulse noise management
A discrete multitone transceiver (DMT) includes a deinterleaver operable to de-interleave a plurality of bits. The DMT further includes: a forward error correction decoder operable to decode the plurality of bits, a module operable to determine, during Showtime, an impulse noise protection value, wherein the impulse protection value specifies a number corrupted DMT symbols that can be corrected by the forward error correction decoder in combination with the deinterleaver, and a receiver coupled to the deinterleaver. The receiver receives using a first interleaver parameter value, receives a flag signal, and changes to receiving using a second interleaver parameter value that is different than the first interleaver parameter value, wherein the second interleaver parameter value is used for reception on a pre-defined forward error correction codeword boundary following reception of the flag signal. |
| US11005590B2 |
Method and system for adjusting packet length and mobile device using the method
A method for adjusting packet length is disclosed. A first reference point currently closest to the mobile device is calculated. A current position of a mobile device is compared with GPS data of the first reference point to calculate brief GPS data. It is determined whether a second reference point has been uploaded to the server. It is determined whether the first reference point is identical to the second reference point if the second reference point has been uploaded to the server. The first reference point is uploaded to the server if the first reference point is not identical to the second reference point. The first reference point is uploaded to the server if the second reference point has not been uploaded to the server, and the brief GPS data is uploaded to the server. |
| US11005586B2 |
Reference signal monitoring mechanism for remote interference management
Certain aspects of the present disclosure provide techniques for reference signal monitoring and transmission for remote interference management. In some cases, an aggressor base station decides to monitor for reference signals (RSs) transmitted from at least one victim BS, for example, regardless of an amount of interference from at least one remote BS detected by the first base station and participating in a remote interference mitigation (RIM) process based on the monitored RS. In some cases, a first BS transmits reference signals (RSs) as part of a remote interference mitigation (RIM) process, in response to a determination that it is an aggressor BS whose downlink transmissions possibly interfere with reception of uplink transmissions by at least one remote BS, a victim BS whose reception of uplink transmissions are possibly interfered with by downlink transmissions from the at least one remote BS, or both an aggressor BS and a victim BS. |
| US11005584B2 |
Clock synchronization in a device
To provide an indication of an accuracy level of a grandmaster clock, a solution using at least three different grandmaster types and grandmaster information maintained in a device is introduced. The three grandmaster types are a primary grandmaster, a secondary grandmaster and neither of them. The grandmaster information includes information on a primary grandmaster and information based on which one or more secondary grandmasters may be determined. After master-slave hierarchy negotiations, the grandmaster information and information on a master clock negotiated is used to determine whether the master clock negotiated for the device is the primary grandmaster, a secondary grandmaster setting a warning, or neither of them in which case an alarm is set. |
| US11005577B2 |
Reducing wireless interference from a wired digital interface
Circuits and systems may be operable to provide improved wireless networking performance in the presence of a high speed wired interface. Filter circuits may be applied to wired interface leads to suppress frequency content that may interfere with wireless home networking. High speed digital wired interface systems on a chip may similarly be altered to suppress interfering frequency content before it leaves the chip. Systems with reduced radiated energy from wired interface circuits in frequencies of interest to wireless networking have improved wireless range and throughput characteristics. |
| US11005575B2 |
Wireless sensors in medical environments
Monitoring a patient can include a vital sign device including a skin contact and a demodulator circuit in communication with the electrically conductive skin contact, the demodulator circuit including: a physiological waveform data processing module configured to process the waveform data received from the electrically conductive skin contact; and a digitally encoded data processing module configured to detect and decode digitally encoded data modulated at the carrier frequency. Also included can be a signal conductive blanket including an extended touch point. A clinician contacts the extended touch point of the signal conductive blanket and the patient monitoring device to connect the vital sign device and the patient monitoring device. |
| US11005572B1 |
Temperature-locked loop for optical elements having a temperature-dependent response
Examples described herein generally relate to a temperature-locked loop for optical elements. In an example, a device includes a controller and a digital-to-analog converter (DAC). The controller includes a DC-controllable transimpedance stage (DCTS), a slicer circuit, and a processor. The DCTS is configured to be coupled to a photodiode. An input node of the slicer circuit is coupled to an output node of the DCTS. The processor has an input node coupled to an output node of the slicer circuit. The DAC has an input node coupled to an output node of the processor and is configured to be coupled to a heater. The processor is configured to control (i) the DCTS to reduce a DC component of a signal on the output node of the DCTS and (ii) an output voltage on the output node of the DAC, both based on a signal output by the slicer circuit. |
| US11005569B1 |
Optical transmitter having cascaded modulators
An optical data transmitter comprising two or more serially connected optical modulators, each driven using a respective DAC. The digital signals applied to the individual DACs are produced using different respective subsets of the set of bitstreams representing the digital waveform or data stream to be transmitted, with the bitstream subsets being selected, e.g., such that (i) each of the individual DACs is able to support the digital resolution and sampling rate needed for properly handling the subset of bitstreams applied thereto and (ii) differences between average driving powers applied to different optical modulators are relatively small. In different embodiments, the two or more serially connected optical modulators can be arranged for generating optical communication signals of different modulation formats, e.g., PSK, ASK, PAM, IM, and QAM. Some embodiments can advantageously be used for generating optical communication signals employing constellations of relatively large sizes, e.g., larger than 1000 symbols. |
| US11005568B1 |
Optical transceiver system
An optical transceiver system includes an optical transceiver chassis including a cable connector, a laser subsystem, and a sensor subsystem. A controller included in the optical transceiver chassis is coupled to the laser subsystem and the sensor subsystem. The controller receives a cable connection signal from the sensor subsystem that indicates that a cable has been connected to the cable connector included on the optical transceiver chassis and, in response, activates the laser subsystem. Subsequent to activating the laser subsystem, the controller receives a cable disconnection signal from the sensor subsystem that indicates that the cable has been disconnected from the cable connector included on the optical transceiver chassis and, in response, deactivates the laser subsystem. |
| US11005565B1 |
Free space optical communication terminal with wavelength dependent optic
Embodiments relate to a free space optical (FSO) communication terminal. The terminal includes an optical source and optics. The optical source can produce optical beams at different wavelengths. The optics direct optical beams in a direction towards a remote FSO communication terminal. A wavelength dependence of the optics results in a divergence of the optical beam that depends on a wavelength of the optical beam. A controller may control the wavelength of the optical beam produced by the optical source, thereby adjusting the divergence of the optical beam (e.g., according to an acquisition process or a tracking process). |
| US11005564B2 |
Communication method and apparatus using hybrid modulation scheme in communication system
Provided are a communication method and apparatus using a hybrid modulation scheme in a communication system. The communication node uses a hybrid modulation scheme in the communication system and includes a processor, a first light-emitting diode (LED) array configured to transmit a first signal by blinking a first LED set according to control of the processor, a second LED array configured to transmit a second signal by blinking a second LED set according to control of the processor, and a memory configured to store one or more instructions executed by the processor. Therefore, performance of the communication system can be improved. |
| US11005563B2 |
Systems and methods for performing self-diagnostic optics troubleshooting techniques
A test instrument for providing an optics troubleshooting technique of an optical transceiver is disclosed. The test instrument may comprise a processor and a memory, which when executed by the processor, performs the optics troubleshooting technique. The optics troubleshooting technique may include identifying a test signal from the optical transceiver. The optics troubleshooting technique may include determining signal power associated with the signal. The optics troubleshooting technique may further include applying one or more expert mode settings. In some examples, the one or more expert mode settings may be applied in a predefined order until an acceptable BER result is achieved over a predefined test period. In this way, test instrument may determine which of the one or more expert mode settings is responsible for the acceptable BER result. |
| US11005560B1 |
Method and device for re-transmission of satellite dish signals
Aspects of the subject disclosure may include, for example, a method that includes receiving, by a processing system at a first premises, a request from a second premises for a channel signal to be obtained from a first signal received via a satellite dish system; the request specifies one channel provided by the satellite dish system. The method also includes converting the first signal to generate a converted signal, and encrypting and modulating the converted signal to generate a second signal; the modulating is performed by a first transceiver at the first premises, and the second signal includes the requested channel signal. The method further includes transmitting the second signal to a second transceiver at the second premises; the second transceiver demodulates and decrypts the encrypted second signal to provide the requested channel signal at equipment at the second premises. Other embodiments are disclosed. |
| US11005559B2 |
Repeater and radiation pattern forming method for the same
A repeater includes an up-link circuit and a down-link circuit. The down-link circuit includes a receiver, a radio frequency circuit and a transmitter. The transmitter transmits the repeated second signals to the user equipment and includes an antenna array, a plurality of power amplifiers, a plurality of first phase shifters, a first memory unit, and a first control logic circuit. The antenna array includes a plurality of antenna elements arranged along a first direction, and the number of the plurality of antenna elements is at least four. The first memory unit is configured to store predetermined parameters associated with a predetermined radiation pattern. The first control logic circuit selects a first number of the power amplifiers and the first number of the first phase shifters, and sets normalized gains for the selected plurality of power amplifiers range from 0.7 to 1 unit. |
| US11005557B2 |
Telecommunications apparatus and methods
Infrastructure equipment for use with a wireless telecommunications system, the infrastructure equipment operable to transmit radio signals for reception by a terminal device located within a first one of a plurality of predetermined geographical regions during a first portion of a periodically repeating time duration and to transmit radio signals for reception by a terminal device located within a second, different, one of the plurality of predetermined geographical regions during a second, different, portion of the periodically repeating time duration. |
| US11005556B2 |
Apparatus and method for selecting uplink transmission beams in wireless communication system
The present disclosure relates to a pre-5th-generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-generation (4G) communication system such as long term evolution (LTE). Disclosed is an apparatus of a base station (BS). The BS may be configured to determine whether to use a beam of the BS and a beam of a terminal, which have been used in a downlink, in an uplink based on capability information received from the terminal and whether an antenna of the BS used for communication with the terminal is a transmission/reception common antenna and perform an uplink beam search when it is determined that the beam of the BS or the beam of the terminal is not used in the uplink. |
| US11005555B2 |
Apparatus and method for performing measurement
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). According to various embodiments, an apparatus of a user equipment (UE) in a wireless environment comprises at least one transceiver; and at least one processor operably coupled to the at least one transceiver. The at least one transceiver is configured to receive a reference signal configuration comprising information for indicating whether a reference signal of a transmission and reception point (TRP) is transmitted through beam sweeping from the TRP, and receive the reference signal from the TRP based on the received reference signal configuration. |
| US11005554B2 |
Mobility for beam-forming systems
A method for a network node of a cellular communication network is disclosed. The network node and at least some other network nodes of the cellular communication network are each adapted to support a plurality of beams of a signal beam-forming scheme and to communicate with a wireless communication device using at least one of the plurality of beams. The method comprises initiating a mobility procedure, identifying interfering signals transmitted by one or more interfering beams, decreasing a transmit power level of the identified interfering signals, and executing at least part of the mobility procedure while the identified interfering signals use the decreased transmit power level. The mobility procedure may, typically, comprise transmission of a reference signal on each of one or more candidate beams (wherein the reference signals are for measurement by the wireless communication device), reception of a report from the wireless communication device (wherein the report is indicative of a result of measurements of the reference signals and is for making a beam switch decision), and execution of the beam switch (if applicable). Corresponding computer program product, arrangement and network node are also disclosed. |
| US11005552B2 |
Antenna port mode and transmission mode transition
A wireless communication device may autonomously transition from a multiple antenna port mode to a single antenna port mode. The wireless communication device may implicitly notify a base station about the autonomous transition from the multiple antenna port mode to the single antenna port mode. The base station may reallocate resources that were previously allocated to the wireless communication device but that are no longer being used by the wireless communication device. In some cases, the base station may configure the wireless communication device's antenna port mode via radio resource control signaling. |
| US11005543B2 |
Transmission device, receiving device, transmission method, and receiving method
This invention is a transmission device capable of enhancing the reception characteristics of a terminal when employing transmit diversity using two antenna ports in an ePDCCH. In a base station (100) that transmits a reference signal to a terminal (200) using two antenna ports, a setting unit (102), on the basis of the reception quality of the terminal, sets as the aforementioned two antenna ports either a first antenna port pair for which DMRS (reference signals) do not undergo mutual code multiplexing, or a second antenna port pair for which the DMRS do undergo code multiplexing. A transmitter (109) transmits the DMRS from the two antenna ports set in the setting unit (102). |
| US11005541B2 |
Method for transmitting feedback information and terminal therefor
A method for transmitting feedback information by a terminal may comprise the steps of: measuring a channel; multiplying a first matrix associated with the measured channel by a transformation matrix, so as to obtain a second matrix and transmitting the obtained second matrix to a base station in a bit format. In addition, the transformation matrix may be determined on the basis of an angle offset satisfying a predetermined condition. |
| US11005533B2 |
Active near-field communication device facilitation of low power card detection
A device implementing a system for NFC communication includes a processor configured to receive, from an other device, pulse signals for detecting proximity of the device with the other device. The processor is further configured to determine an interval at which the pulse signals are received from the other device. The processor is further configured to determine a time when the other device is expected to transmit a subsequent pulse signal based at least in part on the determined interval. The processor is further configured to transmit a signal to the other device based on the determined time when the other device is expected to transmit the subsequent pulse signal. |
| US11005532B2 |
Variable impedance circuit
A power line communication device including a current path provided between a first terminal and a second terminal. A coupling circuit includes a first circuit of a first inductor connected in parallel with a first capacitor and a first resistor, wherein the coupling circuit is connected between the first and second terminals. A sensor is configured to sense a communication parameter of the coupling circuit. The communication parameter may be a resonance of the first circuit, the quality (Q) factor of the resonance, the bandwidth (BW) of the coupling circuit, the resistance of the first resistor, or the impedance of the first circuit. A transceiver is adapted to couple to the first and second terminal to transmit a signal onto the current path or receive a signal from the current path responsive to the parameter of the coupling circuit and a level of current in the current path sensed by the sensor. |
| US11005530B2 |
Data encoder for power line communications
In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line. |
| US11005527B2 |
Method and apparatus for transmitting signals over wire connections
A method and apparatus for transmitting data from a transmitter device to one or more receiver devices connected to the transmitter device via a respective wire connection, the transmitter device being operable to transmit signals onto the wire connections and a further wire connection at different tones, the method comprising: for each tone, measuring electromagnetic coupling between the further wire connection and each of the wire connections and using the measurements, identifying a wire connection that most strongly receives crosstalk interference from the further wire connection; based on the identifications, for each tones, allocating signals transmitted on the further wire connection as supporting signals for a particular wire connection; transmitting a first signal onto the particular wire connection that has been allocated a supporting signal; and transmitting a second signal onto the further wire connection, thereby to cause crosstalk interference in the particular wire connection transmitting the first signal. |
| US11005525B2 |
Methods for improving flexibility and data rate of chirp spread spectrum systems in LoRaWAN
A transmitter stores mappings of distinct values of an information signal to corresponding ones of distinct combinations of K chirps taken from M chirps that are different from each other, such that each of the distinct values is mapped to a corresponding one of the distinct combinations of K chirps. The transmitter receives a distinct value among the distinct values of the information signal. The transmitter selects, based on the mappings, a distinct combination of K chirps among the distinct combinations of K chirps that is mapped to the distinct value. The transmitter sums the K chirps of the distinct combination of K chirps to produce a symbol that represents the distinct value. The transmitter modulates the symbol to produce a modulated symbol, and transmits the modulated symbol. A receiver receives a modulated symbol that conveys a distinct value, and recovers the distinct value using stored mappings. |
| US11005522B2 |
Terminal and transmission method
In the present invention, regarding a narrowband used in a subframe for transmitting uplink data, if a switch is made from a first narrowband used in a first subframe to a second narrowband that is different from the first narrowband, with respect to a second subframe continuing to the first subframe, a final one symbol of the first subframe and an initial one symbol of the second subframe are punctured and set as a retuning time to transmit the uplink data in the first narrowband and the second narrowband. |
| US11005520B2 |
Method and system for spread spectrum code acquisition
A code acquisition module for a direct sequence spread spectrum (DSSS) receiver includes: a Sparse Discrete Fourier transform (SDFT) module configured to perform an SDFT on a finite number of non-uniformly distributed frequencies comprising a preamble of a received DSSS frame to calculate Fourier coefficients for the finite number of non-uniformly distributed frequencies; a multiplier configured to multiply the Fourier coefficients for the finite number of non-uniformly distributed frequencies of the received DSSS frame by complex conjugate Fourier coefficients for the finite number of non-uniformly distributed frequencies to generate a cross-correlation of the received DSSS frame and the complex conjugate Fourier coefficients; and a filter module configured to input the cross-correlation and output a delay estimation for the received DSSS frame. |
| US11005507B2 |
Targeted ratio of signal power to interference plus noise power for enhancement of a multi-user detection receiver
According to some embodiments, in a multi-user detection (MUD) receiver, a method for identifying a beam which produces a specific signal-to-interference-plus-noise ratio (SINR) can include: determining a maximum output SINR; determining beam weights to achieve a target SINR using the determined maximum output SINR; applying the beam weights to one or more received signals to generate a beamformed signal having the target SINR, one or more of the received signals having a signal of interest (SOI), one or more interfering signals, and noise; and providing the beamformed signal to a multi-user detection unit to recover the SOI. |
| US11005505B2 |
Radio-frequency module
There is provided a radio-frequency module that can reduce communication signal loss in both the case of employing one communication band of multiple communication bands and the case of employing two or more communication bands together. A radio-frequency module includes a first switching circuit and matching circuits. The matching circuits are provided individually for a first transmission path, a second transmission path, and a third transmission path. When communications are performed by using only a first communication band, the first switching circuit selects the first transmission path. When communications are performed by using together the first communication band and the second communication band, the first switching circuit selects the second transmission path and the third transmission path. |
| US11005504B2 |
Polar code rate matching method and apparatus
The embodiments of the application provides a polar code rate matching method and apparatus. The method includes: obtaining, by a communications device, to-be-encoded information; determining, by the communications device, a to-be-used rate matching manner based on the code rate, a code rate threshold, a target code length, and a target code length threshold, where the rate matching manner is a puncturing manner or a shortening manner; and rate matching, by the communications device based on the determined rate matching manner, a polar code of the to-be-encoded information. |
| US11005502B2 |
Iterative decoding circuit and decoding method
An iterative decoding circuit is provided. The iterative decoding circuit includes a first concatenated decoding circuit, a second concatenated decoding circuit, and a comparator. The first concatenated decoding circuit includes a first convolutional decoder, a first deinterleaver, and a first block decoder. The second concatenated decoding circuit is coupled to the first concatenated decoding circuit, and the second concatenated decoding circuit includes a second convolutional decoder, a second deinterleaver, and a second block decoder. The comparator receives a first convolutional decoding result corresponding to a first convolutional decoding operation and a second convolutional decoding result of a second convolutional decoding operation, and is configured to compare the first convolutional decoding result with the second convolutional decoding result to generate a comparing result. The second block decoder obtains an erasure address information according to the comparing result. |
| US11005501B2 |
Error correction on a memory device
Some instances of a memory device include a memory die having an array of memory cells including a plurality of banks. In some cases, the memory die further includes a first error correcting code (ECC) circuit coupled with a first bank of memory cells, where the first ECC circuit is configured to perform operations associated with a first access operation (e.g., write operation) of the first bank of memory cells. In some examples, the memory die further includes a second ECC circuit coupled with the first bank of memory cells, where the second ECC circuit is configured to perform ECC operations associated with a second access operation (e.g., read operation) of the first bank. In some cases, the first ECC circuit is located under the footprint of the array and the second ECC circuit is located outside the footprint of the array. |
| US11005498B1 |
Methods and network device for uncoded bit protection in 10Gbase-T ethernet
A network interface devices receives a plurality of bits, and encodes the plurality of bits into a plurality of bit blocks that includes a first set of bit blocks and a second set of bit blocks. The network interface device transcodes the first set of bit blocks to generate a third set of bit blocks, and aggregates the second set of bit blocks and the third set of bit blocks into an aggregated set of bit blocks. A first error correction encoder encodes a first portion of the bits in the aggregated set of bit blocks to generate a first set of encoded bits. A second error correction encoder encodes a second portion of the bits in the aggregated set of bit blocks to generate a second set of encoded bits. The network interface modulates the first set of encoded bits and the second set of encoded bits. |
| US11005493B2 |
Digital-to-analog conversion circuit
A digital-to-analog conversion circuit (60) for converting a digital input sequence to an analog representation is disclosed. It comprises a first DAC, (100) wherein the first DAC (100) is of a capacitive voltage division type having a capacitive load (110). Furthermore, it comprises a second DAC (120) having a resistive load (130). An output (104) of the first DAC (100) and an output (124) of the second DAC (120) are connected, such that said capacitive load (110) and said resistive load (130) are connected in parallel. |
| US11005492B2 |
Dual output signal paths for signal source channels to optimize for bandwidth and amplitude range
A signal source device includes at least one digital-to-analog converter, at least one connector, a first output path from the at least one digital-to-analog converter to the at least one connector, and a second output path from the at least one digital-to-analog converter to the at least one connector. A method of generating a analog signal includes generating at least one analog signal from at least one digital-to-analog converter, transmitting a first analog signal of the at least one analog signal along a first output path from the at least one digital-to-analog converter to at least one connector, and transmitting a second analog signal of the at least one analog signal along a second output path from the at least one digital-to-analog converter to the at least one connector. |
| US11005485B2 |
Frequency multiplier and method for frequency multiplying
A frequency multiplier comprises a phase generator configured to receive an oscillation signal and to provide at phase generator outputs versions of the oscillation signal, which are phase-shifted with respect to each other. An injection-locked ring oscillator comprises a plurality of stages, wherein each of the phase generator outputs is coupled to a different stage of the plurality of stages for multi-point injection. A combiner combines output signals of the plurality of stages of the injection-locked ring oscillator into a signal having a frequency which is a multiple of a frequency of the oscillation signal. |
| US11005484B2 |
Integrated circuit including phase locked loop circuit
A phase locked loop circuit includes a voltage controlled oscillator configured to output a clock signal having a predetermined frequency based in a control voltage, a phase frequency detector configured to compare the clock signal with a reference signal to output a first control signal and a second control signal, a charge pump configured to output the control voltage based on the first control signal and the second control signal, a voltage supply including an output terminal connected to an output terminal of the charge pump by a transmission switch, and a leakage remover circuit connected to the transmission switch and configured to remove a leakage current flowing through the transmission switch while the transmission switch is turned-off. |
| US11005479B2 |
Phase detection circuit, and clock generating circuit and semiconductor apparatus using the phase detection circuit
A phase detection circuit includes an edge trigger circuit and a duty detection circuit. The edge trigger circuit generates a reference pulse signal and a comparison pulse signal based on a target clock signal and at least two clock signals having phases adjacent to the phase of the target clock signal. The duty detection circuit generates a phase detection signal by detecting the duty ratio of the reference pulse signal and the comparison pulse signal. |
| US11005477B2 |
Driver circuit and control method therefor, and transmission/reception system
The present technology relates to a driver circuit, a control method therefor, and a transmission/reception system that enable implementation of a large amplitude signal output required for long distance transmission with low power consumption. The driver circuit includes: a current drive circuit that outputs a predetermined current; and a termination resistance circuit connected in parallel with the current drive circuit, in which the termination resistance circuit connects a termination resistance to a transmission line when the current drive circuit outputs a current, and disconnects the termination resistance from the transmission line when the current drive circuit does not output the current. The present technology can be applied to, for example, a driver circuit that outputs a signal to a long distance transmission line, and the like. |
| US11005475B1 |
Emission driver and pump unit
An emission driver includes a latch circuit and a buffer circuit. The latch circuit receives a first signal, a second signal, and a first clock signal. The latch circuit includes a first output terminal and a second output terminal. The first output terminal of the latch circuit outputs a third signal according to the first clock signal. The second output terminal of the latch circuit outputs a fourth signal in reverse to the third signal according to the first clock signal. The buffer circuit includes a first input terminal, a second input terminal and a third output terminal. The first input terminal of the buffer circuit receives the third signal. The second input terminal of the buffer circuit receives the fourth signal. The third output terminal of the buffer circuit outputs an emission signal according to the third signal and the fourth signal. |
| US11005473B2 |
Voltage difference measurement circuit and associated voltage difference measuring method
The present invention provides a voltage difference measurement circuit comprising a level shifting circuit, an ADC and a calculation circuit. In the operations of the voltage difference measurement circuit, the level shifting circuit adjusts levels of a supply voltage and a ground voltage to generate an adjusted supply voltage and an adjusted ground voltage, respectively. The ADC performs an analog-to-digital converting operation upon the adjusted supply voltage and the adjusted ground voltage to generate a first digital value and a second digital value, respectively. The calculation circuit calculates a voltage difference between the supply voltage and the ground voltage according to the first digital value and the second digital value. |
| US11005467B1 |
Low-noise duty cycle correction circuit and method thereof
A method operates by receiving a first voltage, which is a logical signal; converting the first voltage into a second voltage using a first inverting buffer with a first pull-up resistance and a first pull-down resistance; and converting the second voltage into a third voltage using a second inverting buffer with a second pull-up resistance and a second pull-down resistance, wherein: the first pull-up resistance, the first pull-down resistance, the second pull-up resistance, the second pull-down resistance are all tunable, and a difference between the first pull-up resistance and the first pull-down resistance is approximately equal to a difference between the second pull-down resistance and the second pull-up resistance. |
| US11005462B1 |
Interface circuit and interface device
An interface device, including a plurality of interface circuits, wherein each interface circuit of the plurality of interface circuits includes a first switching element connected in series to a second switching element, and a first capacitor and a second capacitor connected to an output terminal to which the first switching element and the second switching element are connected; and a controller configured to determine a plurality of output signals corresponding to the plurality of interface circuits by controlling the first switching element and the second switching element, and configured to adjust a slew rate of the plurality of output signals by charging and discharging the first capacitor and the second capacitor. |
| US11005461B2 |
Level shift latch circuitry
Various implementations described herein are directed to an integrated circuit having first devices arranged to operate as a latch. The first devices may include inner devices and outer devices. The integrated circuit may include second devices coupled to the first devices and arranged to operate as a level shifter. The second devices may include upper devices and lower devices. The lower devices may be cross-coupled to gates of the inner devices and the upper devices. The integrated circuit may include input signals applied to gates of the outer devices and the lower devices to thereby generate output signals from the outputs of the lower devices that are applied to the gates of the inner devices and the upper devices to activate latching of the output signals. |
| US11005459B1 |
Efficient retention flop utilizing different voltage domain
A system and method for efficiently retaining data in sequential elements during power down modes. In various embodiments, a master latch of a flip-flop circuit receives an always-on first power supply voltage, whereas, a slave latch and other surrounding circuitry receives a second power supply voltage capable of being powered down. During a power down mode, circuitry consumes less power while the master latch retains stored data. In some designs, the flip-flop circuit is a level shifting circuit, and the always-on first power supply voltage is less than the second power supply voltage. The master latch uses complex gates with a p-type transistor at the top of a stack of p-type transistors receiving the always-on power supply voltage level on its source terminal and the retained data value on its gate terminal. This top p-type transistor is capable of remaining disabled even when used in a level shifting manner. |
| US11005452B2 |
Impedance tuner and signal amplification device
A control circuit (16) is configured to detect the impedance P1 of a load (3) and control each of the reactance value L1 of a first variable reactance element (12), the reactance value L2 of a second variable reactance element (14), and the phase shift amount φ of a phase shifter (15) on the basis of the detected impedance P1. Consequently, impedance matching can be achieved even with the phase shifter (15) that performs discrete phase shift control. |
| US11005450B2 |
Acoustic filter using acoustic coupling
A filter circuit includes a first input node and a second input node for receiving an input signal, and a first output node and a second output node for providing an output signal. A first series acoustic resonator is coupled in series between the first input node and the first output node. At least one coupled resonator filter (CRF) includes first and second transducers, which may be acoustically coupled to one another. The first transducer has a first electrode coupled to the first input node, a second electrode coupled to the second input node, and a first piezoelectric layer between the first electrode and the second electrode. A second transducer has a third electrode coupled to the first output node, a fourth electrode coupled to the second output node, and a second piezoelectric layer between the third electrode and the fourth electrode. |
| US11005447B2 |
Microelectronic devices having vertical piezoelectric membranes for integrated RF filters
Embodiments of the invention include microelectronic devices, resonators, and methods of fabricating the microelectronic devices. In one embodiment, a microelectronic device includes a substrate and a plurality of cavities integrated with the substrate. A plurality of vertically oriented resonators are formed with each resonator being positioned in a cavity. Each resonator includes a crystalline or single crystal piezoelectric film. |
| US11005445B2 |
Electronic component including a pad electrode and a bump stacked on a wiring electrode
An electronic component including a pad electrode provided on a wiring electrode and a Au bump provided on the pad electrode, wherein the uppermost layer of the wiring electrode is a first Ti layer, the uppermost layer of the pad electrode is a Au layer, and the thickness of the first Ti layer in at least a portion on which the Au bump is superposed in plan view is greater than the thickness of at least a portion of the first Ti layer in a portion on which the Au bump is not superposed in plan view. |
| US11005441B2 |
Audio/video power processor and audio/video playback system
An audio/video power processor for an audio/video playback device, and an audio/video playback system. The audio/video power processor for an audio/video playback device includes: a box having a grounded metal shell; an electric power input port for receiving AC electric power, the electric power input port comprising a first live line terminal and a first null line terminal; an electric power output port for outputting electric power to the audio/video playback device, the electric power output port comprising a second live line terminal and a second null line terminal; a first capacitor unit electrically connected between the first live line terminal and the first null line terminal; a first inductor electrically connected between the first live line terminal and the second live line terminal; and a second inductor electrically connected between the first null line terminal and the second null line terminal. The audio/video power processor has the advantage of improving the playback performance of the audio/video playback device. |
| US11005435B2 |
Amplifier with built in time gain compensation for ultrasound applications
An ultrasound circuit comprising a trans-impedance amplifier (TIA) with built-in time gain compensation functionality is described. The TIA is coupled to an ultrasonic transducer to amplify an electrical signal generated by the ultrasonic transducer in response to receiving an ultrasound signal. The TIA is, in some cases, followed by further analog and digital processing circuitry. |
| US11005433B2 |
Continuous-mode harmonically tuned power amplifier output networks and systems including same
The disclosed technology can include a power amplifier comprising an input, an output, and a transformer. The power amplifier can include a primary inductor coil coupled to the input, a secondary inductor coil coupled to the output, and three harmonic branches coupled to the primary coil. Each branch can comprise at least one electrical component having a tunable impedance. |
| US11005431B2 |
Power amplifier fault detector
Herein disclosed in some embodiments is a fault detector for power amplifiers of a communication system. The fault detector can detect a portion of the power amplifiers that are in fault condition and can prevent or limit current flow to the power amplifiers in fault condition while allowing the rest of the power amplifiers to operate normally. The fault detector can further indicate which power amplifiers are in fault condition and/or the cause for the power amplifiers to be in fault condition. Based on the indication, a controller can direct communications away from the power amplifiers in fault condition and/or perform operations to correct the fault condition. |
| US11005425B2 |
Source switched split LNA
A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention. |
| US11005424B2 |
Power efficient amplifier
A power efficient (PE) amplifier includes a cascode amplifier, a transistor amplifier, and a voltage supply. The transistor amplifier includes at least one differential pair of transistors and a plurality of transformers having a primary winding and a tapped secondary winding. The secondary winding is connected across emitters or sources of each transistor pair. The tap of each secondary has a current source. The primary windings of the plurality of transformers are connected in series. The transistor bases or gates are alternating current (AC) grounded. The collector or drain terminal pairs are connected in parallel. The voltage supply is low voltage and supplies a current to the cascode amplifier. The PE amplifier further includes a plurality of current sources which provide a total current to the transistor amplifier. The PE amplifier has, among other things, improved power gain, improved reverse isolation, improved power dissipation, and improved peak differential swing. |
| US11005418B2 |
Device for testing a concentrated photovoltaic module
The invention relates to a device for testing a concentrated photovoltaic module comprising at least one assembly of a photovoltaic cell and of a concentrator, the device being characterized in that it comprises: a light source; a parabolic mirror coupled to the source so as to reflect the light emitted by the source in an almost collimated light beam toward the module to be tested, in a direction perpendicular to the surface of the module; and an intensity filter interposed on the path of the almost collimated beam upstream of the module to be tested, the filter comprising at least partially absorbent regions that have a neutral spectral density with respect to the light beam, the at least partially absorbent regions being arranged facing higher intensity zones of the beam, so as to attenuate differences in the intensity of the beam. |
| US11005416B2 |
Photovoltaic panel
Modular photovoltaic (PV) panel, system, and method of mounting. The system including a mounting flashing configured to mounted to a mounting surface and a folding PV panel. The folding PV panel including: a first subpanel including first PV cells, wherein the first subpanel extends along a first lateral plane and comprises a plurality of mounting hooks extending laterally from and affixed to a backside of the first subpanel, the mounting hooks configured to couple to the mounting flashing; a second subpanel including second PV cells, wherein the second subpanel extends along a second lateral plane, wherein the second subpanel comprises a front edge support configured to hold a front edge of the second subpanel away from the mounting surface; and a hinge assembly rotationally coupling the first subpanel and the second subpanel to allow an angle between the first lateral plane and the second lateral plane to change. |
| US11005415B2 |
Solar shade structure
A shade structure assembly includes at least one column member. A horizontal beam is secured at a top end of the column member. A first rail is secured to a first end and a second rail is secured to a second end of each horizontal beam. At least one truss assembly is secured to the rails. The truss assembly includes at least two truss members arranged in spaced parallel relation. Structural supports connect the truss members along two of the truss beams and panel supports connect the truss members along two of the truss beams. The panel supports mount a panel array. Each truss member may comprise a center truss portion and one or both of a first and second truss extension. Each truss member may be comprised of a universal center truss portion and one or both of a first and second truss extension. |
| US11005411B2 |
Battery pack and battery charger system
A battery pack and charger system includes a first battery pack having a first set of battery cells and configured to provide only a first operating voltage and a second battery pack having a second set of battery cells and configured to provide the first operating voltage and a second operating voltage that is different from the first operating voltage and a battery pack charger configured to be able to charge the first battery pack and the second battery pack. |
| US11005407B2 |
Data obtaining method, inverter, and rotating electric machine
Provided are a data obtaining method, an inverter, and a rotating electric machine capable of managing the operation state of a device without complicating the configuration thereof. Therefore, the data obtaining method uses an inverter for controlling a synchronous electric motor, wherein a position/speed calculation unit of the inverter calculates an electric angle of the synchronous electric motor from the value of the current flowing between the synchronous electric motor and the inverter and obtains data for each electric angle by sampling internal data within the inverter, said internal data being used for controlling the synchronous electric motor in synchronization with the information of the electric angle. |
| US11005406B2 |
Hysteresis based DC offset corrector for current reconstruction when using discontinuous PWM
Disclosed embodiments are directed to a technique to remove DC offset from current measurement signals through shunt resistors in digital signal processing for current reconstruction when using discontinuous pulse width modulation (DPWM). Such measurements regarding current are pertinent to a feedback loop used for a system including a DC-link capacitor, inverter, and motor. A method of removing DC offset comprises: determining a three-phase output current signal of an inverter, wherein the inverter is coupled to a motor and a power supply; producing a voltage signal based on the three-phase output current signal and the resistances of one or more shunt resistors disposed in the inverter; applying an analog gain circuit to the voltage signal; processing the voltage signal with an analog-to-digital converter (ADC); applying a DC offset corrector to the voltage signal; and performing current reconstruction on the voltage signal to produce a continuous current signal. |
| US11005405B2 |
Rotating-electric-machine control apparatus and electric power steering control apparatus equipped with the rotating-electric-machine control apparatus
When a switching device cutoff failure determination unit determines a failure in a switching device cutoff switching unit, output torque produced based on the first armature winding and output torque produced based on the second armature winding are produced in such a way that the respective directions thereof are opposite to each other. |
| US11005404B2 |
Motor driving apparatus
In a motor driving apparatus having an inverter for driving a motor capable of switching between a star connection and a delta connection, when currents detected by winding current detecting elements detecting currents flowing through windings become excessive, the inverter is made to stop. Moreover, inverter output currents are calculated after removing a circulating current component at the time of the delta connection, from the winding currents detected by the winding current detecting elements, and the inverter is controlled using the calculated inverter output currents. Because over-current protection is performed based on the detected values of the winding currents, it is possible to prevent demagnetization taking account oSf the circulating current. Also, the inverter control is prevented from being affected by the circulating current in the delta connection. Accordingly, it is possible to reduce the number of the current detecting elements, and perform the over-current protection and control properly. |
| US11005398B2 |
Motor drive controller and motor drive control method
Provided is a motor drive controller capable of a locking energization operation while preventing increase in temperature of a coil. The motor drive controller includes a motor drive section selectively energizing coils with a plurality of phases of a motor and a locking energization control section. The locking energization control section performs a locking energization operation when the motor is started or restarted and holds a rotor of the motor in a position corresponding to the coil in which the lock current flows. In case of performing the locking energization operation, the locking energization control section switches a locking energization pattern for applying the lock current in the coil from a locking energization pattern when the preceding locking energization operation was performed. The locking energization control section controls the motor drive section so that the lock current flows in the coil in accordance with the switched locking energization pattern. |
| US11005395B2 |
Circuit for selectively actuating DC motors in a motor vehicle
The invention relates to a circuit for selectively actuating drive elements (1, 2), which are operated on direct current, in a motor vehicle by means of half-bridges (4, 5). According to the invention, the circuit is designed for selectively actuating eight drive elements (1, 2) for locking and, respectively, unlocking four doors of the motor vehicle from the outside and/or from the inside. The circuit contains nine half-bridges (4, 5), wherein the outputs of eight of the nine half-bridges (4) are each connected to a first pole of one of the eight drive elements (1, 2) and the output of the ninth half-bridge (5) is connected to all second poles of the eight drive elements (1, 2). |
| US11005391B2 |
Brake drive circuit
A drive circuit for an electromagnetic brake is used in a circuit including a motor, a converter converting a DC voltage into an AC voltage to be generated between a pair of DC link buses, and an inverter converting the DC voltage into an AC voltage and driving the motor. A full-bridge circuit has a pair of power supply terminals connected to the pair of DC link buses, and a pair of output terminals connected to the electromagnetic brake. |
| US11005390B2 |
AC power transfer over self-passivating connectors
Methods and systems to transform an alternating current into constant-polarity constant or pulsed voltages, provide these to a first group of contacts of an electrical connector assembly such that none of the contacts is subjected to polarity reversal, receive the constant-polarity constant or pulsed voltages from a second group of contacts of the electrical connector assembly, and reconstruct the alternating current from these voltages. |
| US11005388B2 |
Single-phase multi-level asymmetric inverter with AC-bypass and asymmetric modulation strategy
A multi-level inverter includes a coupling to a DC power source and a coupling to an AC power source, a plurality of capacitors arranged to create a set of nodes, and a plurality of switches located between the capacitors and the AC power source. Switches are configured to create an AC bypass in which the capacitors coupled to the DC power source may be isolated from the AC power source. The AC bypass is utilized as one of the switching states in a switching sequence that provides enhanced performance including but not limited to reduced electromagnetic interference and ripple. |
| US11005386B2 |
Power converter circuit and power conversion method
A power converter circuit includes a plurality of input nodes, an output, a plurality of switch and inductor circuits, a plurality of rectifier circuits, a first capacitor network, and a second capacitor network. Each of the plurality of switch and inductor circuits is connected between a respective pair of the plurality of input nodes, and each of the plurality of rectifier circuits is connected between a respective one of the plurality of switch and inductor circuits and the output. The first capacitor network includes at least two capacitors connected between at least one of the plurality of input nodes and the output, and the second capacitor network includes at least one capacitor and is connected to the output. A capacitance of the at least one capacitor of the second capacitor network is greater than a capacitance of each of the at least two capacitors of the first capacitor network. |
| US11005382B2 |
Synchronous rectification controlling device, isolated synchronous-rectification DC-DC converter, gate driving device, isolated DC-DC converter, AC-DC converter, power adapter, and electric appliance
In an isolated DC-DC converter, in response to a switching transistor connected to the primary winding of a transformer turning off, a turn-on control circuit turns on a synchronous rectification transistor on the secondary side. A turn-off control circuit determines the turn-off time point of the synchronous rectification transistor by charging a capacitor with a current commensurate with the magnitude of an induced voltage appearing in the secondary wiring of the transformer during the on-period of the switching transistor and, after the synchronous rectification transistor turns on, discharging the capacitor with a current commensurate with the output voltage of the DC-DC converter. |
| US11005375B2 |
DC-DC converter and display device having the same
A DC-DC converter including a first power supply including a first converter outputting a first power voltage, a first sensor detecting a panel current from an output of the first converter; and a first output group including a plurality of inverting converters outputting a second power voltage based on the panel current; a second power supply including a second converter outputting the first power voltage, and a second output group including a plurality of inverting converters outputting the second power voltage based on the panel current; and a first phase controller controlling operations of the inverting converters included in each of the first and second output groups based on the detected panel current. The second power supply operates when the panel current exceeds a predetermined enable value. |
| US11005373B2 |
Switching power supply control circuit with bottom point detection
A switching power supply apparatus includes a switching device and a switching power supply control circuit for converting an AC source voltage to a DC voltage. A comparison circuit in the switching power supply control circuit produces an H-level output signal when its non-inverted input voltage exceeds a voltage value during each off-state period of the switching device. A delay circuit outputs a pulse signal after a predetermined delay time from detecting the H-level signal. This pulse signal indicates detection of a bottom point of drain voltage of the switching device. Since the output of the delay circuit is directly connected to the set input terminal S of a flip-flop, the switching device is surely turned on, without bottom skip, upon detection of the bottom point of its drain voltage. |
| US11005369B2 |
Switching regulator and integrated circuit package
Provided is an integrated circuit package which complementarily switches on/off a MOS transistor Q1 (first switch) and MOS transistor Q2 (second switch) in accordance with an output voltage Vout, and which externally outputs a pulse signal having a fixed on-duty D during a step-up/step-down mode. The integrated circuit package has a determination unit 61 for determining the impedance of an external component connected to an external pin P5 that outputs the pulse signal to the exterior during the step-up/step-down mode, and determining whether the external component is a third switch on the basis of the impedance determination result. |
| US11005368B2 |
Hysteretic window adjustment of tri-level switching regulator
A method for unbalancing a tri-level switching regulator uses hysteretic control when switching across multiple states of the tri-level switching regulator. The method includes determining a battery voltage and an output voltage of the tri-level switching regulator. The method also includes dynamically adjusting at least one of a first hysteretic window of a first hysteretic comparator associated with a second switching state of the tri-level switching regulator and a second hysteretic window of a second hysteretic comparator associated with a first switching state of the tri-level switching regulator based on the battery voltage and the output voltage. |
| US11005367B2 |
Boost spread-spectrum technique in pulse skip mode with fixed frequency clock reference
A boost DC-DC switching converter architecture is provided, with a spread spectrum technique working in pulse skip mode, and a fixed frequency clock reference, comprising a high side switch and a low side switch, controlled by a voltage or current mode control loop operating in a Pulse Width Modulation (PWM) mode, and having a pulse skip mode. The switching converter comprises an inductor, connected between an input voltage terminal and the high side switch, and also connected to the low-side switch, and a random delay generator, where the random delay generator randomly varies a time for entering, or exiting, or both entering and exiting pulse skip mode, and varies a time where the high side switch is turned off in pulse skip mode. |
| US11005365B2 |
Power converter using hysteretic boost architecture and method therefor
In one form, a control circuit is adapted for use with a power converter having an inductor and a switch switching the inductor in response to a switching signal to regulate an output voltage of the power converter. The control circuit includes a slow feedback path, a fast feedback path, an integrator, a comparator, and a drive circuit. The slow feedback path provides a ripple signal in response to an average value of the output voltage. The fast feedback path provides a feedback signal in response to the output voltage. The integrator provides an error signal in response to a sum of the feedback signal and the ripple signal. The comparator provides a comparison output signal in response to a comparison of the error signal and a threshold voltage. The driver circuit provides the switching signal in response to the comparison output signal. |
| US11005361B2 |
Control circuit and method of a switching power supply
A control circuit is configured to control a power factor correction (PFC) pre-regulator including a power switch and being configured to operate in a transition mode of operation and a valley-skipping mode of operation. The control circuit generates a drive signal to control a switching of the power switch based on a current threshold. A current threshold generator in the control circuit is configured to modulate the current threshold as a function of a number of valleys skipped in the valley-skipping mode of operation. |
| US11005358B1 |
Flexible direct current system of photovoltaic plant having active control-based protection system
A DC collection system for a PV power plant contains a large number of feeders. When a fault occurs, the fault current rapidly increases, causing electronic devices to block to protect themselves. This blockage presents a challenge to the protection of the DC collection system because of extremely short data windows. To address this challenge, a protection method based on active control of DC/DC converters is disclosed. The fault current control principle is analyzed and derived so that DC/DC converters can provide an injected low-amplitude and controllable post-fault stable current signal. The disclosed protection method is designed based on identifying the direction of the injected signal. Simulation results indicate that the fault section can be accurately identified and that the disclosed protection method performs efficiently against transition resistance and noise. |
| US11005353B2 |
Lens moving apparatus and camera module including same
A lens moving apparatus, according to one embodiment, comprises: a bobbin having a first coil installed on the outer circumferential surface thereof; a location detection sensor equipped to the bobbin; a housing in which the bobbin is provided; an upper elastic member disposed on the upper side of the housing; and a support member that supports the housing such that the housing can move in a second or third direction that is perpendicular to a first direction, wherein the upper elastic member is divided into a plurality of parts, at least two of which are disposed parallel to each other on the x-y plane in the second or third direction and are disposed such that end portions thereof face each other. |
| US11005352B2 |
Device for generating electrical power from low frequency oscillations
An energy harvesting device for generating electrical power from low-frequency oscillations includes a high-frequency cantilever, a plurality of low-frequency cantilevers each configured to contact the high-frequency cantilever in response to environmental vibrations having a frequency within a near-resonance frequency range associated with said low-frequency cantilever, an a generator that produces electrical power in response to contact between at least one of the plurality of low-frequency cantilevers and the high-frequency cantilever. The energy harvesting device may also include an impact mass coupled to a free end of each of the plurality of low-frequency cantilevers. Some aspects may include a common base to which the high-frequency cantilever and the plurality of low-frequency cantilevers are coupled. Other aspects may include the generator comprising one or more of an induction coil and magnet, a variable distance capacitor, or a piezo-electric material. |
| US11005343B2 |
Electrical sub-assembly
An electrical sub-assembly comprises a stator having a plurality of coils and a cooling means attached to the stator. The electrical sub-assembly further comprises a plurality of pairs of diodes attached to the cooling means, each pair of diodes being in antiparallel configuration and having three electrical terminals. One of the three electrical terminals is a common terminal shared by both diodes in each pair of diodes. A plurality of busbars electrically connect each of the diodes to at least one of the plurality of coils via one or more of the electrical terminals. In use, the cooling means is configured to simultaneously cool the stator and the plurality of diodes. The electrical sub-assembly may have particular application as a part of a switched reluctance machine. |
| US11005341B2 |
Sealing structure for peripheral area of generator fan
Provided is a sealing structure for sealing a peripheral area of a fan of a generator. The sealing structure includes a rotor, a fan assembly including a ring-shaped fan body coupled to an axial end of the rotor, multiple fan blades radially arranged along a circumferential surface of the fan body, and an annulus groove recessed, in an axial direction of the rotor, from an axial outer end surface of the fan body, a stator surrounding the rotor with an air gap provided between the stator and the rotor, a cooler positioned a predetermined distance apart from the stator, and a cooling gas duct including an outlet connected with the cooler and an inlet configured to cover the axial outer end surface of the fan body and an axial end of the air gap between the stator and the rotor, wherein an inlet-side end of the cooling gas duct includes a first member and a second member that are coaxially arranged and are positioned close to the axial outer end surface of the fan body and the axial end of the air gap, respectively, and an inlet-side end of the first member is inserted into the groove with a clearance, and a sealing device is provided on the inlet-side end of the first member. |
| US11005339B1 |
Spinning amusement park ride with onboard power generation
A spinning ride system adapted to convert kinetic energy to electrical energy onboard each of its vehicles. The system includes a passenger vehicle with a chassis for receiving a passenger. The system includes a ride structure including a support arm supporting the passenger vehicle, and the ride structure moves the support arm along a ride path. The system includes a mounting sleeve statically attached to the chassis and pivotally coupled to the support arm. A user input mechanism is attached to the mounting sleeve adapted to receive user input forces to cause the chassis to have movements relative to the support arm. The system includes an electrical component provided on or in the chassis and includes a kinetic energy conversion assembly with an electrical generator converting kinetic energy of the chassis during the movements (e.g., spinning) to electrical energy used to power the electrical component. |
| US11005337B2 |
Removable differential for an active core electric motor
A gear assembly is provided that simplifies the integration of a differential assembly into the hollow rotor of an electric motor. The gear assembly utilizes a hollow cross member that includes a central portion and a plurality of hollow extension members onto which the gears are mounted. Within each of the hollow extension members is a pin. When the pins are withdrawn, the assembly fits unimpeded within the hollow rotor. When the pins are partially extended out of the corresponding extension members, the ends of the pins fit within apertures in the rotor. A plug fits within a centrally located thru-hole in the central portion of the hollow cross member, thereby locking the pins in the extended position and locking the gear assembly in place. |
| US11005335B2 |
Systems and methods for providing enhanced mechanical/electrical energy storage
An energy apparatus that stores and disperses energy, the energy apparatus including: (1) an energy object that experiences movement so as to store kinetic energy in the energy object, the energy object including a magnet assembly through which electrons are driven resulting in electric output from the magnet assembly, and the electric output dependent on experienced EMF (electro-motive force) that is experienced by the magnet assembly; (2) a supporting structure that supports the energy object while providing for the movement of the energy object; (3) a first tuning magnet that is supported adjacent the energy object, the first tuning magnet positionable throughout a range of positions, the positions including a first position and a second position; (4) a second tuning magnet that is supported adjacent to the energy object. |
| US11005334B2 |
Annular member, method, and assembly for component displacement control
An electric motor or generator assembly includes a stator, a housing, and an annular member fit between the stator and the housing, where the annular member is radially compressed so as to exert a radial force outward onto the housing and inward onto the stator to maintain a positional relationship therebetween. |
| US11005333B2 |
Electric motor having a stator with a radially outside rotor with the rotor having a fan mounting portion comprising a noncontact region and a contract region configured to contact a mouting surface of a fan
An electric motor includes a stator, a rotor having a tubular shape and disposed radially outside of the stator, and a fan mounting portion located on one side of the stator along an axial direction and mounted to the rotor. An end face of the fan mounting portion has a contact region that contacts a mounting surface of a fan, and a noncontact region that does not contact the fan. |
| US11005331B2 |
Closed rotating electrical machine comprising an internal air cooling system of the magnets in the rotor
The invention relates to an enclosed rotary electrical machine including a cooling system comprising two internal fans (181, 182) fixedly mounted on shaft (160) at both ends of rotor (150). The rotor and stator (190) are contained in an enclosure sealed by two flanges. The fans allow dual air circulation in flux barriers surrounding the rotor magnets and formed by axial recesses running throughout the rotor, and also air circulation in the space created between the internal fans and the inner faces of the flanges comprising fins (113, 123) which orient the air flows created by the fans to capture the heat thereof. External cooling allows the enclosure and the flanges to be cooled, by air or liquid cooling. |
| US11005326B2 |
Electric drive unit having cover assembly with integrated cooling channels
An electric drive unit for powering a load, e.g., road wheels of a motor vehicle, includes a housing having a floor section separating the housing into upper and lower chambers. The floor section defines an elongated drain opening, drain holes, and an oil supply port in fluid communication with an oil pump. A rotary electric machine is enclosed within the lower chamber, and has electrical leads positioned directly below the drain opening. A cover assembly is fastened to the housing within the upper chamber, and has a coolant channel assembly integrally connected to a cover plate. The coolant channel assembly includes electrical terminals that project through the drain opening and are fastened at a first distal end of the electrical terminals to the electrical leads. The cover assembly defines a primary coolant channel in fluid communication with the oil supply port, and directs oil to the electrical terminals. |
| US11005325B2 |
Rotating electric machine, stator of rotating electric machine, and compressor
Provided is a stator of a rotating electric machine including: a stator core; windings of multiple phases wound around the stator core via insulators attached to the stator core; and tab terminals that each have at least one slit and a plate-shaped tab and that electrically connect an end portion of a winding, of one of the multiple phases, of the windings to an end portion of an other of the windings of a different one of the multiple phases, wherein a portion of each of the insulators or a resin component different from the insulators has a connection terminal insertion hole into which the tab terminal is inserted, and the connection terminal insertion hole is formed on a circle centered on a shaft center of the stator, and a plate surface of the tab of the tab terminal to be inserted into the connection terminal insertion hole is placed to be tangential to the circle. |
| US11005322B2 |
Rotor assemblies for axial flux machines
A rotor assembly for an axial flux machine may include at least one magnet and first and second support structures. The first support structure may be configured to have the at least one magnet attached thereto and to provide a flux return path for the at least one magnet. The second support structure may be configured to be attached to the first support structure so as to allow torque to be transferred between the at least one magnet and the second support structure via the first support structure, and may be further configured (A) to be attached to a rotatable shaft of the axial flux machine, or (B) to function as an output or input flange of the axial flux machine. |
| US11005320B2 |
Variable flux bridge for rotor of an electric machine
An electric machine includes a rotor including a channel defined between a pair of magnets and a bridge assembly within the channel. The bridge assembly includes a bridge element and a spring arranged to bias the bridge element toward a center of the rotor such that responsive to spinning of the rotor, the bridge element moves radially away from the center against a force of the spring to alter a magnetic flux pattern associated with the magnets. |
| US11005311B2 |
Noncontact power transmission apparatus and power transmission device
A noncontact power transmission apparatus includes an instrument including a first case, a power reception coil arranged to generate an induced current due to magnetic flux in a first direction intersecting a gravitational direction, and a holder configured to hold the power reception coil at a predetermined distance from an outer surface of the first case in the first case. A power transmission device includes a conductive second case that has an opening into which the instrument is inserted in which the instrument is stored, a power transmission coil provided in the second case so as to generate magnetic flux in the first direction, and disposed to generate an induced current in the power reception coil, and an elastic body that is provided in the second case, maintains a distance between the power transmission coil and the power reception coil to be constant, and supports the power transmission coil. |
| US11005303B2 |
Method for detecting foreign material, and apparatus and system therefor
The present invention relates to a method for detecting foreign material, and an apparatus and a system therefor, and a method for detecting foreign material in a wireless power transmitter, according to one embodiment of the present invention, comprises the steps of: measuring a quality factor value, which corresponds to a reference operation frequency, when an object is sensed; searching for a current peak frequency having a maximum quality factor value within an operation frequency band; receiving, form a wireless power receiver, a foreign material detection state packet including information on a reference peak frequency; correcting the measured quality factor value by using a difference value between the current peak frequency and the reference peak frequency; and determining whether the foreign material exists by comparing the corrected quality factor value with a predetermined quality factor threshold value. Therefore, the present invention has an advantage of enabling foreign material to be more effectively and accurately detected. |
| US11005301B1 |
System and method for encrypted resonant inductive power transfer
Systems and methods for ensuring that resonant inductive power transfer goes only to authorized users using encryption. Resonant inductive power transfer requires near-identical resonant frequencies in the transmitter and the receiver. The frequency of the power transfer signal changes on a schedule known only to the transmitter and receiver so a “power eavesdropper” cannot track the frequency well enough to efficiently receive power. To make the frequency transitions energetically efficient, a capacitive or inductive element is switched in or out of each circuit at moments of zero-crossing: zero charge on a capacitor or zero current in an inductor. To maintain phase alignment, either switching an inductor on the transmit side is nearly simultaneous with switching a capacitor on the receive side, or switching a capacitor on the transmit side is nearly simultaneous with switching an inductor on the receive side. |
| US11005297B2 |
Power receiving apparatus, power transmission apparatus, control method, and non-transitory computer-readable storage medium
A power receiving apparatus for wirelessly receiving a power from a power transmission apparatus that uses a power supplied from a power supply apparatus is provided. The power receiving apparatus obtains, from the power transmission apparatus, a result of first device authentication between the power supply apparatus and the power transmission apparatus, performs second device authentication for the power transmission apparatus, and performs a negotiation concerning a transmission power with the power transmission apparatus based on the result of the first device authentication and a result of the second device authentication. |
| US11005296B2 |
Electrode unit, power transmitting device, power receiving device, electronic device, vehicle, and wireless power transmission system
An electrode unit is used in a power transmitting device or a power receiving device of a wireless power transmission system based on an electric field coupling method. The electrode unit includes: a first electrode to which a first voltage is applied when power is transferred; a second electrode to which a second voltage antiphase to the first voltage is applied when power is transferred; and a third electrode spaced apart from the first and second electrodes, the third electrode having a third voltage whose amplitude is less than amplitudes of the first and second voltages when power is transferred. The first and second electrodes are arranged along an electrode installation plane. At least a portion of the third electrode does not overlap the first and second electrodes as viewed from a direction perpendicular to the electrode installation plane. |
| US11005295B2 |
Non-contact power feeding device
A non-contact power feeding device includes multiple power feeding elements that are disposed spatially separated from one another in a movement direction, an AC power supply that supplies AC power to the power feeding elements, multiple power receiving elements that are provided in a moving body and that receive AC power in a non-contact manner, and a power receiving circuit that converts the AC power received by the power receiving elements and that outputs to an electrical load. When a length of the power feeding elements in the movement direction is LT, a separation distance between the power feeding elements is DT, a length of the power receiving elements in the movement direction is LR, and a separation distance between the power receiving elements is DR, the relationship DT≤DR and the relationship (2×LR+DR)≤LT are satisfied. |
| US11005288B2 |
Methods and apparatus for power generation and distribution
Methods and apparatus according to various aspects of the present invention may operate in conjunction with a microgrid capable of connecting to a main electrical grid supplying electrical power at a frequency (or other characteristic, such as voltage). A sensor may provide a signal to a control system, wherein the signal corresponds to the frequency (or other characteristic) of the electrical power from the main electrical grid. The control system may compare the frequency (or other characteristic) of the electrical power from the main electrical grid to a first threshold, and automatically provide power from the microgrid to the main electrical grid if the frequency (or other characteristic) of the electrical power from the main electrical grid crosses the first threshold. |
| US11005287B1 |
Advanced mobile energy storage device
An advanced mobile energy storage device includes an energy storage component for the storage of electrical energy and characterized by a state of charge representative of an amount of energy stored within the energy component and by an energy storage rate into and out of the energy storage component. At least one power input transfers electrical energy into the device for storage in the energy storage component. At least one power output transfers electrical energy out of the device from the energy storage component. A processor determines, for indication to a user, an estimate of time until the state of charge at least reaches one or more particular levels, the estimate determined at least from the state of charge in conjunction with the energy storage rate. The device can network with an external computing device and can generate solar adjustment information. |
| US11005285B2 |
Wireless power transfer
Provided is a base unit for wireless power transfer or charging through a time varying magnetic field, comprising. The unit may include one or more components including a magnetic material or layer, that guide a corresponding magnetic flux generated by a coil in the base unit in one or multiple dimensions and/or to guide the magnetic flux in such a manner as to create a preferential path for returning flux flow in one or multiple dimensions. When one or more power receivers, each having one or more receiver coils or receivers associated therewith, is placed in proximity to a base unit, the coil in the base unit is used to inductively generate a current in the one or more receiver coils or receivers associated with the one or more power receivers. The base unit and the one or more receivers communicate uni-directionally or bi-directionally through the coils by load modulation or another RF communication method including NFC, Bluetooth or WiFi communication to control and optimize the power transfer between the base unit and the one or more receivers. |
| US11005284B2 |
Electric power transmission device and electric power transmission system
An electric power transmission device as one aspect of the present invention comprises: a power transmitter that generates a magnetic field; a storage; and a power transmission controller. The storage stores a first parameter set concerning frequency hopping performed on a first frequency band and a second parameter set concerning frequency hopping performed on a second frequency band. The power transmission controller controls the power transmitter such that the frequency hopping is performed based on the parameter set acquired from the storage. The first frequency band is a band corresponding to a first resolution bandwidth for measuring a leakage magnetic field. The second frequency band is a band corresponding to a second resolution bandwidth intended for a higher band than the first resolution bandwidth. |
| US11005276B2 |
Stacked variable voltage battery module arrangement
The present invention comprises a reconfigurable variable voltage battery. One or more variable voltage battery (VVB) modules are connected in series to form a stacked variable voltage battery (SVVB or Stacked VVB). A variable voltage battery module may comprise at least one battery cell and processor controlled switches adapted to vary the output of the variable voltage battery module. By separately configuring the switches of each VVB module, the output of the stacked VVB module can produce any voltage up to the full sum of the voltages of all the cells in the individual VVB modules. In addition, charge balancing can easily be achieved with a stacked VVB configuration, as some VVB modules can be bypassed (e.g., by setting select switches to simulate a short condition) either to prioritize the discharging of stronger VVB modules, or to prioritize the charging of weaker VVB modules. |
| US11005275B2 |
Intelligent charging USB splitter
A smart charging solution is provided. The smart charging solution includes a power supply, a power line connected to the power supply and at least one universal serial bus (USB) splitter module and/or wireless charging module. The smart charging solution further includes a cable compensation integrated circuit (IC) for improved output voltage stabilization and a locking mechanism for furniture installation. |
| US11005271B2 |
Battery balancing apparatus and battery balancing method
Disclosed is a battery balancing apparatus and method. The battery balancing apparatus includes a plurality of balancing circuits, each balancing circuit is connected in parallel to a respective battery cell among a plurality of battery cells and the plurality of balancing circuits are connected in series to each other, in one-to-one relationship; and a control unit operably coupled to each balancing circuit. The control unit selects at least one of the plurality of battery cells as a balancing target, based on a SOC of each battery cell, and outputs an enable signal and a balancing message to each balancing circuit connected to each battery cell selected as the balancing target. Each balancing circuit transmits a first wireless signal and a second wireless signal corresponding to the balancing message by using electric energy stored in each battery cell, when the enable signal is received by each balancing circuit. |
| US11005270B2 |
Method for operating an island system, and island system
A method for operating an island system is disclosed. The island system includes a group of voltage-controlling converters, wherein each of the voltage-controlling converters of the group are configured to convert power of respectively connected regenerative power sources into AC power in accordance with a respective frequency-power characteristic curve. The island system also includes a load having a power consumption that depends on a voltage amplitude of an AC voltage of the island system, and a control unit that is configured to transmit a default value of the voltage amplitude to the group of voltage-controlling converters. The method adapts the power to be consumed by the load. |
| US11005263B2 |
Electro-static discharge (ESD) protection clamp technology
In some implementations, an apparatus can include a semiconductor region including an electrical device and a back-end region disposed on the semiconductor region. The back-end region can include a first terminal and a second terminal. The apparatus can include an insulator-metal transition (IMT) material electrically coupled between the first terminal and the second terminal. |
| US11005262B2 |
Arc mitigation in electrical power distribution system
A circuit to mitigate arc failures in an electrical power distribution system can include a solid state distribution system connected to a source of power and to a load, a solid state power controller (SSPC) having a set of field effect transistors (FETs) responsive to command signals from the SSPC wherein an arc in a wire bond of a failed FET can trigger a predetermined sequence to quench the arc and isolate remaining wire bond material in the failed FET from contaminating a creepage path. |
| US11005253B2 |
Circuit and method of over-current protection
A method of over-current protection includes: determining a current flowing through a first element to be protected, comparing the determined current with a plurality of thresholds, controlling a counter based on the comparing the determined current with a plurality of thresholds, and stopping the current flowing through the first element by activating a switch in series with the first element when an output of the counter reaches a predetermined counter threshold. |
| US11005249B2 |
Devices, systems and methods for routing wires through walls
Devices, systems and methods for routing wires or other inserted members thru walls or other structural elements are described. For at least one embodiment, a device, for forming a channel between two structural elements, includes a first member configured for insertion into a first hole, and a second member configured for insertion into a second hole. The first member may be configured for mating with the second member while the second member is being inserted into the second hole such that a channel is formed by the first member mated with the second member. The channel facilitates routing of an inserted member into and thru the first hole, thru the channel formed by the first member mated with the second member, and thru and out of the second hole. |
| US11005242B2 |
Wiring member and composite harness
A wiring member includes wires and a resin molded portion. The wires include a curved portion to be arranged along a curved path. The resin molded portion includes a main body portion and a curve reinforcing portion. The main body portion covers the curved portion of the wires. The curve reinforcing portion protrudes from an outer peripheral surface of the main body portion and extends along an extending direction of the curved portion so as to keep the wiring member in a curved state. |
| US11005240B2 |
Three phase switchgear or control gear
A three phase switchgear or control gear includes: at least one compartment; a plurality of components for a first phase; a plurality of components for a second phase; and a plurality of components for a third phase. The plurality of components for the first phase, the second phase, and the third phase each include a connection to a main busbar, a circuit breaker actuator, a single phase circuit breaker pole, and a cable connection. The circuit breaker actuator and the single phase circuit breaker pole for the first phase are oriented along a first axis. The circuit breaker actuator and the single phase circuit breaker pole for the second phase are oriented along a second axis. The circuit breaker actuator and the single phase circuit breaker pole for the third phase are oriented along a third axis. The first axis, the second axis, and the third axis are inclined. |
| US11005231B2 |
Strain-balanced semiconductor structure
Systems and methods are described herein to grow a layered structure. The layered structure comprises a first germanium substrate layer having a first lattice constant, a second layer that has a second lattice constant and is epitaxially grown over the first germanium substrate layer, wherein the second layer has a composite of a first constituent and a second constituent, and has a first ratio between the first constituent and the second constituent, and a third layer that has a third lattice constant and is epitaxially grown over the second layer, wherein the third layer has a composite of a third constituent and a fourth constituent, and has a second ratio between the third constituent and the fourth constituent, wherein the first ratio and the second ratio are selected such that the first lattice constant is between the second lattice constant and the third lattice constant. |
| US11005230B2 |
Combiner, fiber laser device, and method for manufacturing combiner
A combiner, that optically combines input fibers that propagate pumping light launched from pumping light sources and a relay fiber connected to an amplification fiber, includes: a bundle portion where the input fibers are bundled together; and a melting portion where the input fibers are melted and integrated together. In an interface between the relay fiber and the melting portion, the input fibers are fused together without a gap between the input fibers. |
| US11005228B2 |
Laser machining device and laser machining method
To appropriately change an output of laser light without deteriorating laser characteristics. A control section of a laser machining device controls, when a target output is larger than a predetermined threshold, an output of laser light by changing a driving current supplied to an excitation light source and, on the other hand, controls, when the target output is equal to or smaller than the threshold, the output of the laser light by changing a duty ratio of a Q switch while keeping the driving current supplied to the excitation light source substantially fixed. |
| US11005227B2 |
Multi-wavelength adjustable-radial-mode fiber laser
A high-power fiber laser produces a compound output beam having a center beam and an annular beam. The center beam and the annular beam are independently adjustable in power and wavelength. The output beam is delivered from an output optical fiber having a center core and a concentric annular core. A fundamental beam generated by a seed laser is amplified by a fiber amplifier and partially converted to a second-harmonic beam by a second-harmonic generator. The residual fundamental beam and second-harmonic beam are separated, attenuated, and selectively coupled into the cores of the output optical fiber. |
| US11005222B1 |
Powered wall plate
A powered wall plate with at least two wall plate electrical current features behind the rear surface of the wall plate, each with a receiving prong, at least two electrical current transfer plugs with an electrical wire extending therefrom and configured to removably mate with the receiving prong. A plurality of LED lights is located along a bottom edge of the front surface, a photocell is exposed on the front surface of the wall plate, and a control switch has an on position, an off position, and an auto position. A transformer housing may extend forward of the front surface and includes a circuit therein operatively coupled to a USB port on a perpendicular surface of the transformer housing. The USB port is configured to provide power when power is supplied to the at least two electrical wires. |
| US11005216B2 |
Connector and connector structure
A connector includes: an outer housing including an arm that protrudes from a first wall portion to a space portion surrounded by a housing main unit; an inner housing inside the housing main unit; and a detection member supported between the first wall portion and the inner housing slidably. The housing main unit has an opening portion in which a counterpart housing having a protrusion is inserted. The arm includes an arm main unit with flexibility extending toward the opening portion and a lock tab protruding from the arm main unit. When the counterpart housing is inserted, the arm main unit is elastically deformed to enable the lock tab to ride over and lock the protrusion. When the lock tab completes riding over, the lock tab allows the detection member to move toward the opening portion. |
| US11005214B2 |
Locking electrical adaptor
A locking electrical adaptor. The adaptor includes a housing with a pair of conductive prongs for carrying an electrical current, and a grounding prong for grounding an electrical connection of the pair of conductive prongs. The grounding prong is comprised of a flexible conductive material, and includes a lip on a portion thereof, such that upon insertion of the adaptor into an electrical outlet, the lip snaps into place behind a ridge of the electrical outlet to secure the adaptor thereto and lock it in place. The adaptor may be unlocked by depressing a button disposed on the housing, which bends the grounding prong and displaces the lip. After the adaptor is unlocked, the adaptor may be removed from the electrical outlet. |
| US11005212B2 |
Coaxial cable connector sleeve with cutout
A torque sleeve includes sleeve body configured to extend along an axis. The sleeve body is further configured to at least partially receive a coupling member of a coaxial cable connector. The sleeve body has an outer surface configured to permit a user to tighten the coupling member to an interface port up to a first torque, and the sleeve body includes a pair of opposed cutouts configured to receive a tightening tool so as to permit the tightening tool to grip the coupling member and tighten the coupling member to an interface port up to a second torque, the second torque being greater than the first torque. |
| US11005211B2 |
Method for manufacturing cable with connector and cable with connector
A method for manufacturing a cable with a connector is provided. In the method, a contact is attached to a reinforcing wire. The reinforcing wire to which the contact is attached is inserted into an insertion portion of a housing. The housing is connected to one end of a cable. The reinforcing wire is secured to the cable by a securing member. |
| US11005210B2 |
Electrical connector
An electrical connector comprises a plurality of conductive terminals, a housing and a holder. The housing has a plurality of terminal receiving grooves which extend forwardly from a rear end face of the housing and receive the terminals respectively and a locking structure which is formed to a top surface of the housing. The holder is provided to the housing, the holder has a transverse frame portion which extends in a transverse direction, a plurality of positioning arms which obliquely extend downwardly and forwardly from the frame portion and are respectively inserted into the grooves, and a lock plate portion which extends forwardly from a top of the frame portion to above a top surface of the housing and has elasticity, the arms respectively position the terminals along slopes inside the grooves, the lock plate portion has a lock structure which is locked with a locking structure of the housing. |
| US11005203B2 |
Terminal module
A terminal module (10) has a metal case (20) with a ceiling wall (21), a bottom wall (51) facing the ceiling wall (21), opposed side walls (23) extending from the ceiling wall (21) toward the bottom wall (51) and retaining pieces (24). A coil spring (40) is sandwiched between the ceiling wall (21) and the bottom wall (51). The retaining pieces (24) face each other in a direction perpendicular to a facing direction of the side walls (23) and project toward the bottom wall (51) from the periphery of the ceiling wall (21). The side walls (23) and the retaining pieces (24) are disposed alternately on the periphery of the ceiling wall (21). A spring receiving portion (26) formed by the ceiling wall (21), the side walls (23) and the retaining pieces (24) receives an end part of the coil spring (40) on the side of the ceiling wall (21). |
| US11005202B2 |
Connector
A connector includes a housing, a terminal attached to the housing, and a bending member that connects the housing and a substrate. The bending member can electrically connect to wiring of the substrate. The housing can be inserted in an opening of a panel positioned above the substrate. A guide cap can be attached to a tip end part of the housing. |
| US11005200B2 |
Connector assembly and connector
A connector assembly comprises a first connector and a second connector. The first connector comprises a first insulator and a first metal member. The first metal member has a first metal plane. The second connector comprises a second insulator and a second metal member. The second insulator has at least one insulating plane. The second metal member has a second metal plane. The first metal plane, at least in part, faces each of the second metal plane and the at least one insulating plane in a first direction under a mated state where the first connector and the second connector are mated with each other. A distance from the first metal plane to the second metal plane in the first direction is shorter than a distance from the first metal plane to the at least one insulating plane in the first direction under the mated state. |
| US11005198B2 |
Connector
A connector includes a body and a contact that is inserted into the body. The contact includes a protruding part that is protruded in a direction orthogonal to an insertion direction of the contact, a protrusion that is provided on an outer periphery of the contact, and an overhanging part that overhangs in the direction orthogonal to the insertion direction. The body includes, on an inner surface thereof, a guide groove that is fitted with the protruding part and is extended in the insertion direction, a housing part that has an internal dimension for press-fitting the contact, which includes the protrusion, thereto, and a press-fitting part that has an internal dimension for press-fitting the contact, which includes the overhanging part, thereto. An insertion distance A of the protruding part, an insertion distance B of the protrusion, and an insertion distance C of the overhanging part satisfy a relation A>B>C. |
| US11005195B2 |
Encapsulated IPC lug connector
An electrical connector, including a body formed from an electrically conductive material, the body defining an open channel configured to receive a first electrical conductor, at least one first threaded hole transverse to and in communication with the open channel, a plurality of bores extending toward the open channel, each bore configured to receive a second electrical conductor, and a second threaded hole associated with each bore transverse to and in communication with the associated bore. At least one first set screw is configured to mate with the at least one first threaded hole in communication with the open channel and configured to secure the first electrical conductor within the open channel. A plurality of second set screws are configured to mate with the second threaded holes in communication with an associated bore and configured to secure the second electrical conductor within the bore. |
| US11005192B2 |
Intelligent metamaterial radar having a dynamically controllable antenna
Examples disclosed herein relate to an intelligent metamaterial radar. The radar has an Intelligent Metamaterial (“iMTM”) antenna module to radiate a transmission signal with a dynamically controllable iMTM antenna in a plurality of directions based on a controlled reactance and generate radar data capturing a surrounding environment. The radar also has an iMTM interface module to detect and identify a target in the surrounding environment from the radar data and to control the iMTM antenna module. |
| US11005185B2 |
Millimeter wave conformal slot antenna
The system and method for a conformal millimeter wave (mmW) cavity backed slot antenna with near positive gain and hemispherical gain coverage. The antenna has a microstrip launch and feed and a surface mount connector. The mmW antenna may have a stripline launch or waveguide launch instead of a microstrip launch. In some cases, the microwave electronics can be mounted on the launch substrate instead of a connector. |
| US11005183B2 |
Antenna module including dielectric material and electronic device including antenna module
An antenna module of a wireless communication system is provided. The antenna module includes a radiator comprising a top face to which a radio wave is radiated, a dielectric material disposed on a bottom face of the radiator, the bottom face of the radiator being opposite to the top face of the radiator, a feeding unit disposed on a bottom face of the dielectric material, the feeding unit being configured to supply an electric signal to the radiator through the dielectric material, and a support unit disposed on the bottom face of the dielectric material, the support unit comprising a metallic material. |
| US11005181B2 |
Multi-layer antenna assembly and related antenna array
A multi-layer antenna assembly and related antenna array are provided. In one aspect, a multi-layer antenna assembly includes a first radiating layer(s) and a second radiating layer(s). The second radiating layer(s) is provided below and in parallel to the first radiating layer(s). The second radiating layer(s) overlaps at least partially with the first radiating layer(s). In this regard, an electromagnetic wave radiated vertically from the second radiating layer(s) is horizontally guided by an overlapping portion of the first radiating layer(s). In another aspect, an antenna array can be configured to include a number of multi-layer antenna assemblies to enable radio frequency (RF) beamforming. By employing the multi-layer antenna assemblies in the antenna array, it may be possible to flexibly and naturally steer an RF beam in a desired direction(s) without causing oversized side lobes, thus helping to improve power efficiency and performance of the antenna array. |
| US11005179B2 |
Feed structure for a metamaterial antenna system
The present invention is an antenna system having an array of metamaterial cells and a transmission array having a plurality of slots, wherein a signal propagates through the transmission array to the metamaterial cells and radiates a beamform. The system further includes reactance control means to adjust a phase of the beamform and to perform beam steering and beam switching. |
| US11005178B2 |
Antenna and antenna array configurations, antenna systems and related methods of operation
The subject matter described herein relates to various antenna element configurations, antenna array configurations, their operations including various systems and methods to generate modulated data for transmission by an RF antenna array via an optical processing engine. The subject matter includes optical processing engine structure and methods (e.g., modulating in the optical domain, MIMO and spatial modulation via RF beam formation, coherent transmission of RF signal components, coherent operation of spatially separate RF antenna arrays) that may be implemented with the various RF antenna array structures. In some examples, the system combines the virtues of digital, analog and optical processing to arrive at a solution for scalable, non-blocking, simultaneous transmission to multiple UE-s. Much of the system architecture is independent of the RF carrier frequency, and different frequency bands can be accessed easily and rapidly by tuning the optical source (TOPS). In some examples, multiple communication channels may be transmitted simultaneously to different locations. The transmitter may be formed by an array of optically fed antennas. |
| US11005173B2 |
ESD protection for antenna port
A transceiver device comprising transceiver circuitry (5) coupled to one or more antenna ports (2; 2′) by a balun arrangement (Lb, Lu; Lu′). For each of the antenna ports (2; 2′) an antenna switch (Ta; Ta′) is present having an antenna enabling input (4; 4′) and being arranged to connect an unbalanced coil (Lu; Lu′) from the balun arrangement (Lb, Lu; Lu′) to the antenna port (2; 2′) and a ground port (3). Also an electro-static discharge (ESD) protection circuit is provided with an ESD switch (Te; Te′) arranged to connect the antenna port (2; 2′) to the antenna enabling input (4; 4′) of the antenna switch (Ta; Ta′). The ESD switch (Te; Te′) has an ESD switch control input (A) connected to an ESD trigger arrangement (Rtrigger). |
| US11005172B2 |
Method for producing a radome and corresponding radome
The invention relates to a method for producing a radome, a flexible printed circuit board having a metallic structure being used. Said flexible printed circuit board is embossed and is back-molded with a thermoplastic material and electric contact elements are connected to the flexible printed circuit board. A connector skirt is placed on the contact elements prior to back-molding. |
| US11005170B2 |
Millimeter-wave radar cover
A millimeter-wave radar cover housing a millimeter-wave radar including an antenna and an electronic circuit configured to drive the antenna includes: a first site provided in front of the millimeter-wave radar to protect the millimeter-wave radar and transmit millimeter waves emitted from the antenna; and a second site including a housing space in which the antenna and the electronic circuit except for the first site are housed. The first site is made of a stacked structural body obtained by stacking at least one layer of a first constituent material having a negative permittivity in the frequency band of the millimeter waves and a second constituent material having a positive permittivity in the frequency band of the millimeter waves. |
| US11005165B2 |
Cubesat antenna system
A system and method of using a transceiver antenna formed on a fixed outer panel of a cubesat includes electrically coupling an RF feed to a first edge of the outer panel and electrically coupling an RF return to a second edge of the outer panel, the second edge being opposite from the first edge. The RF feed and the RF return being disposed approximately one half a height of the outer panel. An RF distribution plane is electrically coupled to the RF feed and the RF return by substantially equal length circuits. A communication system is electrically coupled to the RF distribution plane. The transceiver antenna does not require deployment and thus improves reliability. |
| US11005162B2 |
Antenna structure of wireless communication device
An antenna structure includes a first array antenna having a number of first antenna units. The antenna units are arranged along a first direction and a second direction. The first antenna units are monopole antennas. The monopole antennas include a radiating body having a strip portion and a bulb portion. The radiating body generates radiation along the first direction or the second direction. The strip portion is electrically coupled to a signal source. The bulb portion is electrically coupled to the strip portion. An end of the bulb portion away from the strip portion is semi-circular in shape. |
| US11005158B2 |
Electrically functional structure integration in ultrathin foldable device
Systems and methods are disclosed for integration of an electrically functional structure in an information handling system. An information handling system may include may include a housing including a first housing portion coupled to a second housing portion. The first housing portion may include an electrically functional structure integrated within the first housing portion. The first housing portion may also include a first layer and a structural adhesive applied to the first layer. The first housing portion may further include a second layer and a thermally conductive adhesive applied to the second layer to bond the second layer to the first layer. The first housing portion may also include a PCB layer coupled between a first PCB and a second PCB, the PCB layer bonded to the second layer, and the electrically functional structure includes the first PCB and the second PCB. |
| US11005157B2 |
Liquid crystal cell and scanning antenna
A liquid crystal cell including antenna units includes a TFT substrate, a slot substrate, an acidic group-containing orientation film, a liquid crystal layer, and a sealant. The TFT substrate includes a first dielectric substrate, TFTs supported by the first dielectric substrate, and patch electrodes electrically connected to the TFTs. The slot substrate includes a second dielectric substrate and a slot electrode supported by the second dielectric substrate and including slots. The acidic group-containing orientation film on a surface of one of the TFT substrate and the slot substrate contains a polymer having an acidic group. The liquid crystal layer is interposed between the TFT substrate and the slot substrate in which the patch electrodes and the slot electrode are opposed to each other to constitute the antenna units. The sealant surrounds the liquid crystal layer and is interposed between the TFT substrate and the slot substrate. |
| US11005152B2 |
RFID transponder
An RFID transponder, comprising an antenna, comprising a radiating element an IC, and a ground plane arranged under the radiating element, the ground plane being solid without openings. The radiating element comprises a near field communication section extending over the edge of the ground plane for enabling near field communication of the antenna by the ground plane from backside of the RFID transponder. |
| US11005145B2 |
Preloaded battery module safety plugs
This disclosure relates to safety plugs for a battery of an electrified vehicle. An example battery includes a first battery module adjacent a second battery module, with each battery module having a respective housing. Further, the first battery module includes a first electrical contact and the second battery module includes a second electrical contact configured to electrically connect to the first electrical contact in a normal operating condition. The first and second electrical contacts are biased away from one another in a first direction, and the first and second electrical contacts are held together by a positive locking arrangement in the normal operating condition. Additionally, the first and second electrical contacts are configured to move out of contact with one another upon relative movement of the first and second battery modules in a second direction transverse to the first direction. |
| US11005144B2 |
Battery system with a cell connecting unit
The present invention refers to a battery system (300) which comprises a cell stack (20), wherein at least two battery cells (10) of the cell stack (20) are electrically interconnected via a battery cell connector (90). The battery system (30) comprises a printed circuit board, PCB (150), and a cell connecting unit, CCU (140). The battery cell connector (90) is accommodated in the CCU (140), the CCU (140) being fixed onto the cell stack (20) and comprising one first flexible bracket (145) that is inserted into a corresponding mounting hole (151) of the PCB (150). According to the invention, the first flexible bracket (145) of the CCU (140) comprises a member (146) configured to fix the PCB (150) to the CCU (140) after the member (146) has been molten in a state in which the first flexible bracket (145) was inserted into the corresponding mounting hole (151). |
| US11005138B2 |
Battery module and battery pack
A battery module includes a plurality of single cells, a battery chamber, an exhaust chamber, a partition wall, a smoke exhaust cover and a seal member. The exhaust chamber is provided adjacently to the battery chamber. Gas released from the single cells flows through the exhaust chamber. The exhaust chamber has one or more exhaust holes configured to release the gas to an outside. The partition wall isolates the exhaust chamber and the battery chamber from each other. The smoke exhaust cover is arranged so as to lace the partition wall. The exhaust chamber is surrounded by the partition wall, the smoke exhaust cover and the seal member. The smoke exhaust cover has a protective protrusion at a location between the seal member and the exhaust valves adjacent to the seal member. The protective protrusion is configured upright from the smoke exhaust cover toward the partition wall. |
| US11005137B2 |
Electrified vehicle battery pack to vehicle body attachment and sealing strategies
This disclosure details electrified vehicles that are equipped with one or more attachment and sealing assemblies for securing a battery pack to the vehicle. An exemplary attachment and sealing assembly may establish a mid-span attachment point of the battery pack and may include a pass-through component, a fastener, and a seal. The fastener may be positioned relative to the pass-through component using either a bottom-up or top-down approach. The seal may radially seal between a portion of a battery pack enclosure assembly and the pass-through component. |
| US11005136B2 |
Battery module
The present disclosure provides a battery module, which comprises a plurality of battery arrays, a first end plate, a second end plate and a separating plate. Each battery array comprises a plurality of batteries sequentially arranged in a longitudinal direction, the plurality of battery arrays are sequentially arranged in a transversal direction. The first end plate and the second end plate are respectively positioned at two ends of the plurality of battery arrays in the longitudinal direction. The first end plate has a passage. The separating plate is provided between two adjacent battery arrays, one end of the separating plate in the longitudinal direction is fixed with the second end plate, the other end of the separating plate in the longitudinal direction extends into the passage and is fixed with the first end plate. In the passage, the separating plate has a bending portion not parallel to the longitudinal direction. |
| US11005135B2 |
Electrified vehicle with battery arrangement permitting relative transverse movement of individual modules
This disclosure relates to a battery arrangement for an electrified vehicle. Among other things, the battery arrangement includes first and second battery modules, each of which includes a battery module housing. Adjacent surfaces of these battery module housings are interlocked such that the first and second battery modules are configured to slide relative to one another in a transverse direction of the electrified vehicle. Accordingly, this disclosure increases safety while saving space and without requiring undue reinforcements of the chassis structure, which would increase the weight of the vehicle and reduce the energy efficiency the vehicle. These and other benefits will be appreciated from the following description. |
| US11005133B2 |
Sheet manufacturing apparatus and control method for sheet manufacturing apparatus
A sheet manufacturing apparatus includes a second web forming unit that processes fibers into a web shape, a sheet forming unit that pinches and transports a second web processed into the web shape by the second web forming unit, and a control unit that controls at least any of a pressing state and a transport state in the sheet forming unit. The control unit causes the second web to pass through a nip unit by controlling at least any of a transport speed of the sheet forming unit, a nip pressure of the sheet forming unit, and a nip width of the sheet forming unit depending on a position of a leading edge of the second web with respect to the nip unit in which the sheet forming unit pinches the second web. |
| US11005129B2 |
Systems and methods for closed-loop recycling of a liquid component of a leaching mixture when recycling lead from spent lead-acid batteries
The present disclosure relates generally to systems and methods for recycling lead-acid batteries, and more specifically, relates to purifying and recycling the lead content from lead-acid batteries. A system includes a reactor that receives and mixes a lead-beating material waste, a carboxylate source, and a recycled liquid component to form a leaching mixture yielding a lead carboxylate precipitate. The system also includes a phase separation device coupled to the reactor, wherein the phase separation device isolates the lead carboxylate precipitate from a liquid component of the leaching mixture. The system further includes a closed-loop liquid recycling system coupled to the phase separation device and to the reactor, wherein the closed-loop liquid recycling, system receives the liquid component isolated by the phase separation device and recycles a substantial portion of the received liquid component back to the reactor as the recycled liquid component. |
| US11005128B2 |
Lithium ion batteries and methods of sterilization
A lithium ion battery is provided that includes: a positive electrode; a negative electrode; a separator comprising a material having a melt temperature of greater than 150° C.; and an electrolyte including an organic solvent and a lithium salt. A method for sterilizing a lithium ion battery is also provided that includes: providing a lithium ion battery (particularly one as described herein); either charging or discharging the battery to a state of charge (SOC) of 20% to 100%; and steam sterilizing the battery to form a sterilized lithium ion battery. |
| US11005127B2 |
Stable fluorinated alkylated lithium malonatoborate salts for lithium-ion battery applications
The invention is directed in a first aspect to electrolyte salt of the general formula Li+Z−, wherein Z− has the following chemical formula: wherein R1 is an alkyl group (R′) containing at least one and up to twelve carbon atoms, and R2 and R3 are independently selected from fluorine atom, hydrocarbon groups R, alkoxy groups (—OR), and ester groups —OC(O)R, wherein R2 and R3 can optionally interconnect via R functionalities to form a boron-containing ring. The invention is also directed to electrolyte compositions in which the above electrolyte salt is incorporated. The invention is further directed to lithium-ion batteries containing these electrolytes. |
| US11005126B2 |
Electrolytic solution for secondary battery, secondary battery, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic device
A secondary battery is provided. The secondary battery includes a positive electrode, a negative electrode, and an electrolytic solution. The electrolytic solution includes at least one of a first heterocyclic compound and a second heterocyclic compound. |
| US11005120B2 |
Electrochemical cell
The electrochemical cell includes an anode, a cathode active layer, and a solid electrolyte layer disposed between the anode and the cathode active layer. The cathode active layer includes a first region which is disposed facing the solid electrolyte layer, and a second region which is disposed on the first region. An average particle diameter of first constituent particles which constitute the first region is smaller than an average particle diameter of second constituent particles which constitute the second region. |
| US11005113B2 |
Solids mitigation within flow batteries
Solids can sometimes form in one or more electrolyte solutions during operation of flow batteries and related electrochemical systems. Over time, the solids can accumulate and compromise the integrity of flow pathways and other various flow battery components. Flow batteries configured for mitigating solids therein can include an autonomous solids separator, such as a lamella clarifier. Such flow batteries can include a first half-cell containing a first electrolyte solution, a second half-cell containing a second electrolyte solution, a first flow loop configured to circulate the first electrolyte solution through the first half-cell, a second flow loop configured to circulate the second electrolyte solution through the second half-cell, and at least one lamella clarifier in fluid communication with at least one of the first half-cell and the second half-cell. A hydrocyclone can be used as an alternative to a lamella clarifier in some instances. |
| US11005110B2 |
Energy supply system for a consumer unit and method for supplying energy to a consumer unit
An energy supply system for a consumer unit with safety-relevant electronic consumers has an energy supply network with a main energy supply source for feeding electrical energy into the energy supply network in the normal operating mode of the energy supply system and an energy detection device for detecting the electrical energy being fed into the energy supply network by the main energy supply source. At least one thermal battery feeds electrical energy into the energy supply network in an emergency operating mode of the energy supply system if the electrical energy being fed into the energy supply network from the main energy supply source is insufficient. A controller switches the energy supply system into the emergency operating mode and activates the at least one thermal battery if the energy which is detected by the first energy detection device undershoots a predetermined threshold value. |
| US11005101B2 |
Block graft copolymer binders and their use in silicon-containing anodes of lithium-ion batteries
A graft copolymer composition comprising the following structure: wherein: Ax represents a polymer backbone having a number of polymerized monomer units x; [By] represents a multiplicity of a graft polymer side chain having a number of polymerized monomer units y, and at least a portion of the monomer units in By contains a group —C(O)OM, with M independently selected from H and alkali metals; [C] represents a multiplicity of positions on the polymer backbone Ax where the graft polymer side chain B or any other graft polymer side chain is not attached; the subscript w represents a grafting density of the group By, wherein w is an integer within a range of 10-50%; and the subscript z represents a density of the group C, wherein z=(100−w) %. The invention is also directed to lithium-ion batteries in which the above-described composition is incorporated in an anode of the battery. |
| US11005100B2 |
Selenium-doped MXene material, and preparation method and use thereof
The present invention discloses a selenium-doped MXene material and a preparation method thereof, comprising the following steps: (1) adding MXene and an organic selenium source into a dispersant, and stirring to prepare a dispersion with a concentration of 10 mg/ml to 100 mg/ml, wherein a mass ratio of MXene and an organic selenium source is 0.1 to 1:1; (2) transferring the dispersion into a reaction kettle, heating to 110° C. to 230° C., reacting for 10 h to 30 h, and then naturally cooling to a room temperature; and (3) washing the product obtained in the step (2) with a cleaning agent, centrifuging to collect a precipitate, and drying the precipitate under vacuum to obtain the selenium-doped MXene material. The composite material prepared by the present invention has high specific surface area, good electrical conductivity, cycle stability performance, rate performance and high theoretical specific capacity. |
| US11005098B2 |
Method of preparing lithium metal oxide and method of manufacturing lithium secondary battery
In a method of preparing a lithium metal oxide, a preliminary lithium metal oxide is prepared. The preliminary lithium metal oxide is washed using a washing solution to remove lithium salt impurities. The washing solution includes water and an organic ligand multimer compound. The lithium metal oxide having improved structural uniformity and stability is obtained using the washing solution. |
| US11005096B2 |
Positive electrode for nonaqueous electrolyte secondary battery and nonaqueous electrolyte secondary battery
A positive electrode for a nonaqueous electrolyte secondary battery according to an embodiment of the present disclosure includes a positive electrode current collector mainly composed of aluminum (Al), a protective layer disposed on the positive electrode current collector, and a positive electrode mixture layer containing a lithium-containing transition metal oxide and disposed on the protective layer. The protective layer has a thickness of 1 to 5 μm and contains an electroconductive material and an inorganic compound having an oxidation power lower than that of the lithium-containing transition metal oxide. |
| US11005095B2 |
Negative electrode active material, mixed negative electrode active material, and method for producing negative electrode active material
A negative electrode active material includes a negative electrode active material particle. The negative electrode active material particle includes a silicon compound particle including a silicon compound (SiOx: 0.5≤x≤1.6). The silicon compound particle includes crystalline Li2Si2O5 in at least part of the silicon compound particle. Among peak intensities A derived from Li2SiO3, B derived from Si, a peak intensity C derived from Li2Si2O5, and D derived from SiO2 which are obtained from a 29Si-MAS-NMR spectrum of the silicon compound particle, the peak intensity C is the highest intensity, and the peak intensity A and the peak intensity C satisfy a relationship of the formula A |
| US11005093B2 |
Positive electrode active material for non-aqueous electrolyte secondary battery comprising a complex oxide
A positive electrode active material for a non-aqueous electrolyte secondary battery includes secondary particles of a lithium transition metal complex oxide as a main component. The main component is represented by a formula: Lit(Ni1-xCox)1-yMnyBαPβSγO2, where t, x, y, α, β, and γ satisfy inequalities of 0≤x≤1, 0.00≤y≤0.50, (1−x)·(1−y)≥y, 0.000≤α≤0.020, 0.000≤β=0.030, 0.000≤γ≤0.030, and 1+3α+3β+2γ≤t≤1.30, and satisfy at least one of inequalities of 0.002≤α, 0.006≤β, and 0.004≤γ. The secondary particles exhibit a pore distribution, where a pore volume Vp(1) having a pore diameter of not less than 0.01 μm and not more than 0.15 μm satisfies an inequality of 0.035 cm3/g≤Vp(1) and where a pore volume Vp(2) having a pore diameter of not less than 0.01 μm and not more than 10 μm satisfies an inequality of Vp(2)≤0.450 cm3/g. |
| US11005092B2 |
3D pattern cutting machine for lithium metal electrode
A 3-dimensional (3D) pattern puncher for punching a lithium metal electrode to provide one or more unit electrodes is provided. The 3D pattern puncher includes a mold punch configured to move up and down, the mold punch corresponding to a size of the unit electrode; a die corresponding to the mold punch; a mold blade disposed at an edge of the mold punch and configured to punch the lithium metal electrode to provide the one or more unit electrodes; and a 3D pattern positioned at an inner portion of the mold punch where the mold blade is not disposed. |
| US11005086B2 |
Feedthrough forming a terminal for an electrochemical metal-ion battery and associated battery
A feedthrough that forms a terminal for a metal-ion electrochemical accumulator, provided through an aperture opening out on either side of a wall including two opposite faces. The includes feedthrough an electrically conductive male part, and a female part made of an aluminum-based alloy. A portion of the male part is tight-fitted into a blind hole of the female part. |
| US11005085B2 |
Method for producing electrode tab having thickness difference, and rechargeable battery comprising same
A method for producing an electrode tab according to an embodiment of the present invention may comprise: a step of preparing a thin plate of a strip shape having a first thickness; a step of forming an adhesion part by compressing the thin plate from one end thereof to a second thickness; and a step of forming, from the other end of the thin plate to the adhesion part, a lead tab part formed to have the first thickness, by releasing the compression applied to the adhesion part. |
| US11005084B2 |
Method for manufacturing a display apparatus
A method for manufacturing display apparatus comprises: forming a display panel by forming a plurality of display elements on a substrate having flexibility; providing a holding member at a part of or the entire of an outer edge of the display panel along the outer edge, the holding member engaging with an outer periphery of the display panel; preparing a supporting member having a surface on which the substrate of the display panel is to be placed; placing the substrate on the surface of the supporting member; bonding the holding member to the surface of the supporting member; and bringing the substrate into close contact with the surface of the supporting member at a strength lower than a bonding strength between the holding member and the surface of the supporting member. |
| US11005083B2 |
High-resolution Micro-OLED display module and manufacturing method thereof
The present invention provides a high-resolution Micro-OLED display module and a manufacturing method thereof. The method for manufacturing the high-resolution Micro-OLED comprises: S1, providing a substrate, and manufacturing light-emitting pixel units on the substrate; S2, encapsulating the light-emitting pixel units by a film encapsulation technique, and forming a film encapsulation layer; S3, manufacturing sub-pixel units on the surface of the film encapsulation layer, and depositing a metal reflective layer between two sub-pixel units which are adjacent to each other; S4, manufacturing a metal oxide layer on the surfaces of the metal reflective layer and the sub-pixel units by a deposition technique, to obtain a high-resolution Micro-OLED matrix; and S5, using a cover plate to encapsulate the high-resolution Micro-OLED matrix produced in step S4, to finish the manufacturing of a high-resolution Micro-OLED. |
| US11005079B2 |
Anti-reflection bottom-emitting type OLED display device and manufacturing method thereof
An anti-reflection bottom-emitting type OLED display device and a manufacturing method are provided. The anti-reflection bottom-emitting type OLED display device includes a substrate, multiple drive transistors, and a light emitting layer. The substrate is provided with a plurality of black matrixes spaced apart from each other. The drive transistors are arranged in an array on the substrate and arranged corresponding to the black matrixes respectively. The light emitting layer is disposed on the drive transistors. An opening region is arranged between each two adjacent black matrixes. The light emitting layer includes multiple light-emitting material layers arranged in an array. Each light-emitting material layer defines a display region and a non-display region. Each opening region is arranged corresponding to each display region, and each non-display region is arranged corresponding to each black matrix. Each display region coincides with each opening region between the black matrixes on the substrate. |
| US11005075B2 |
OLED light extraction using nanostructured coatings
An apparatus for light diffraction and an organic light emitting diode (OLED) incorporating the light diffraction apparatus is disclosed. An apparatus for light diffraction may comprise an optional planarization layer, a transparent substrate, a waveguide layer. The planarization layer may have a refractive index of ns. The transparent substrate may have a refractive index of ng. The waveguide layer may have a refractive index nw distributed over of the transparent substrate. The waveguide layer may comprise a binding matrix, at least one nanoparticle. The waveguide layer may be interposed between the transparent substrate and the optional planarization layer. |
| US11005074B2 |
Display device
A display device is provided. The display device includes a light-emitting unit. The light-emitting unit includes a light-emitting part, wherein a light extraction structure is disposed on a first surface of the light-emitting part. The light-emitting unit also includes a connective part disposed on a second surface opposite to the first surface of the light-emitting part. The light-emitting unit further includes a protective part surrounding the light-emitting part and the connective part. In addition, the display device includes a substrate having a plurality of active elements and at least one bonding pad, wherein the bonding pad is electrically connected to the corresponding connective part of the light-emitting unit. The roughness of the light extraction structure is greater than or equal to 0.2 μm and less than or equal to 5 μm. |
| US11005073B2 |
OLED display panel and manufacturing method thereof
An OLED display panel and a manufacturing method of the OLED display panel are provided. A light-transmissive hole is in the OLED display panel, a blocking wall is arranged outside some sub-pixel regions around the light-transmissive hole, and a thin-film encapsulation layer is on the blocking wall. A portion of light emitted from the sub-pixel regions inside the blocking wall is reflected at an interface of the thin film encapsulation layer by total internal reflection to cause a bright light spot, so that an image can also be displayed in the light-transmissive hole. Therefore, an opening for an under-screen camera less affects aesthetics and appearance integrity of the OLED display panel. |
| US11005071B2 |
Method for manufacturing light-emitting device
An object of one embodiment of the present invention is to provide a more convenient highly reliable light-emitting device which can be used for a variety of applications. Another object of one embodiment of the present invention is to manufacture, without complicating the process, a highly reliable light-emitting device having a shape suitable for its intended purpose. In a manufacturing process of a light-emitting device, a light-emitting panel is manufactured which is at least partly curved by processing the shape to be molded after the manufacture of an electrode layer and/or an element layer, and a protective film covering a surface of the light-emitting panel which is at least partly curved is formed, so that a light-emitting device using the light-emitting panel has a more useful function and higher reliability. |
| US11005070B2 |
Organic photoelectronic device and image sensor and electronic device
An organic photoelectronic device includes a first electrode and a second electrode facing each other, and first and second photoelectronic conversion layers between the first electrode and the second electrode. The first and second photoelectronic conversion layers include a p-type semiconductor and an n-type semiconductor. The first photoelectronic conversion layer has a first composition ratio (p1/n1) of the p-type semiconductor relative to the n-type semiconductor, the second photoelectronic conversion layer has a second composition ratio (p2/n2) of the p-type semiconductor relative to the n-type semiconductor, and the first composition ratio (p1/n1) is greater than the second composition ratio (p2/n2). |
| US11005066B2 |
Organic electronic device using adhesive film encapsulation technology, and method of manufacturing same
This organic electronic device using an adhesive film encapsulation technology includes: a substrate; an electrode layer formed of a transparent conductive material on the top surface of the substrate; an active region layer which is an active layer that induces the flow of holes or electrons in a portion of the electrode layer; a counter electrode formed of a conductive material on the top surface of the electrode layer and the active region layer; an adhesive film attached to cover a region including the active region layer; and a cover material disposed at a certain distance vertically upward and apart from the adhesive film, and sealing the space between counter electrodes by using an encapsulating material along both edges thereof, wherein a gap is formed between the adhesive film and the cover material. |
| US11005064B2 |
Transparent display substrate and driving method thereof and transparent display device
A transparent display substrate and a driving method thereof, and a transparent display device are provided. The transparent display substrate includes a base substrate and pixel units which are located above the base substrate and arranged in an array, each of the pixel units comprises a display region and a transparent region; a first light emitting layer is provided in the transparent region, and a first electrode is provided at a side of the first light emitting layer proximal to the base substrate and a second electrode is provided at a side of the first light emitting layer distal to the base substrate; a brightness of light emitted by the first light emitting layer is adjusted according to change in a difference between a first voltage and a second voltage loaded on the first electrode and the second electrode, respectively. |
| US11005062B2 |
Light emitting apparatus and method of fabricating the same
Although an ink jet method known as a method of selectively forming a film of a high molecular species organic compound, can coat to divide an organic compound for emitting three kinds (R, G, B) of light in one step, film forming accuracy is poor, it is difficult to control the method and therefore, uniformity is not achieved and the constitution is liable to disperse. In contrast thereto, according to the invention, a film comprising a high molecular species material is formed over an entire face of a lower electrode connected to a thin film transistor by a coating method and thereafter, the film comprising the high molecular species material is etched by etching by plasma to thereby enable to selectively form a high molecular species material layer. Further, the organic compound layer is constituted by a material for carrying out luminescence of white color or luminescence of single color and combined with a color changing layer or a coloring layer to thereby realize full color formation. |
| US11005060B2 |
Electroluminescent device, and display device comprising thereof
An electroluminescent device including a first electrode, a hole transport layer disposed on the first electrode, a first emission layer disposed on the hole transport layer, the first emission layer including a first light emitting particle on which a first ligand having a hole transporting property is attached, a second emission layer disposed on the first emission layer, the second emission layer including a second light emitting particle on which a second ligand having an electron transporting property is attached, an electron transport layer disposed on the second emission layer, and a second electrode disposed on the electron transport layer, wherein a solubility of the first ligand in a solvent is different than a solubility of the second ligand in the solvent and a display device including the same. |
| US11005056B2 |
Flexible display panel and manufacturing method for the same
A flexible display panel is disclosed. The panel includes: a flexible substrate; an organic material layer disposed on the flexible substrate, and the organic material layer includes multiple grooves; multiple thin-film transistors received in the multiple grooves; a planarization layer disposed on the organic material layer and the multiple thin-film transistors; a pixel definition layer disposed on the planarization layer, and including multiple openings; multiple organic light-emitting diodes received in the multiple openings; an encapsulation layer disposed on the multiple organic light-emitting diodes and the pixel definition layer. The formed organic material layer having the groove has good bending property, which can improve the stress absorption and release capability of the device, and can avoid the film from variations in the performance of the thin-film transistors (such as threshold voltage Vth, sub-threshold swing S.S, etc.) that occur during constant bending in order to increase the life of device. |
| US11005055B2 |
Flexible display apparatus
A display apparatus may include a base substrate including a first portion and a second portion smaller than the first portion, a plurality of pixels disposed on the first portion, a protection substrate disposed below the base substrate, and a groove disposed in a portion of the protection substrate and overlapped with the second portion. The groove may include a first region extending in a first direction, and a second region and a third region, which are arranged along the first direction, wherein the first region is interposed between the second region and the third region. The first and second portions may be arranged in a second direction crossing the first direction, and a width of each of the second and third regions may be larger than a first width of the first region, when measured in the second direction. |
| US11005053B2 |
Organic light emitting display apparatus comprising a light conversion film and composite film comprising a light conversion film
An organic light emitting display apparatus can include a substrate including an active area and a non-active area; a bending area in the active area of the substrate; a non-bending area in the active area of the substrate, the non-bending area being adjacent to the bending area; and a plurality of light conversion particles disposed in the active area of the substrate. |
| US11005051B2 |
Organic electroluminescent materials and devices
A compound comprising a ligand LA of Formula I: as well as, devices and formulations containing the compound of Formula 1 are disclosed. In the compounds, having a ligand La of Formula I: wherein R1 represents mono, or di-substitution, or no substitution; wherein R2 represents di, tri, or tetra-substitution; wherein R is selected from hydrogen, deuterium, alkyl, cycloalkyl, and combinations thereof; wherein R1 and R2 are each independently selected from hydrogen, deuterium, alkyl, cycloalkyl, aryl, and combinations thereof; wherein at least one pair of adjacent R2 substitutions are joined to form a fused ring; wherein the ligand LA is coordinated to a metal M; and wherein the ligand LA is optionally linked with other ligands to comprise a tridentate, tetradentate, pentadentate or hexadentate ligand. |
| US11005049B2 |
Metal complexes
The present invention relates to metal complexes, to compositions and formulations comprising these complexes, and to devices comprising the complexes or compositions. |
| US11005048B2 |
Organic molecules, in particular for use in optoelectronic devices
The invention relates to an organic molecule, in particular for the application in organic optoelectronic devices. According to the invention, the organic molecule has a first chemical moiety with a structure of Formula I, and one second chemical moiety with a structure of Formula II, # represents the binding site of a single bond linking the first chemical moiety to the second chemical moiety; wherein at least one variable of X1, X2 is N, and at least one variable of X3, X4 is N. |
| US11005031B2 |
Stacked magnetoresistive structures and methods therefor
A magnetoresistive device may include a first plurality of magnetic tunnel junction (MTJ) bits arranged in a first XY plane, and a second plurality of MTJ bits arranged in a second XY plane that is spaced apart from the first XY plane in a Z direction. And, the MTJ bits of the first plurality of MTJ bits may be spaced apart from the MTJ bits of the second plurality of MTJ bits in the X and Y directions. |
| US11005023B2 |
Superconducting logic element
A superconducting logic element includes a superconducting tunnel junction including first and second superconductors. First and second insulating ferromagnets in contact with the first and second superconductors, respectively, generate by magnetic proximity effect a predetermined density of spin-split states in the first and second superconductors, respectively. A writing element applies a writing current to at least a superconductor and is in contact with one of the first or second insulating ferromagnets, so that the first and second insulating ferromagnets commute, by the magnetic field generated by the applied writing current, between a state with parallel magnetization to a state with antiparallel magnetization with respect to each other. The superconducting tunnel junction includes the first or second superconductor between which an insulating layer is arranged with tunnel barrier function, the insulating layer selected between a layer selected from the group consisting of AlOx, AlN, and the first or second insulating ferromagnet. |
| US11005020B2 |
Display panel and fabricating method thereof
The present disclosure provides a display panel and a fabricating method thereof. The display panel includes a substrate and a plurality of mutually insulated binding pads disposed on the substrate. Each binding pad includes an upper surface, a lower surface and a side surface. The upper surface and the lower surface are both parallel to a plane of the substrate, the side surface is located between the upper surface and the lower surface, and the side surface connects the upper surface with the lower surface. A first insulating layer is disposed on the side surface of the binding pad, the first insulating layer is in contact with the side surface of the binding pad and is made of an inorganic material. With such a configuration, the side surface of the binding pad will not be damaged by an etching process subsequent to fabrication of the binding pads. |
| US11005009B2 |
Light emitting device and fabricating method thereof
A light emitting device including first and second electrodes spaced apart from each other on a substrate, at least one bar-type LED having a first end on the first electrode and a second end on the second electrode, and an insulative support body between the substrate and the bar-type LED. The at least one bar-type LED has a length greater than a width. |
| US11005007B2 |
Light-emitting device and manufacturing method thereof
The present disclosure provides a light-emitting device and manufacturing method thereof. The light-emitting device comprising: a light-emitting stack; and a semiconductor layer having a first surface connecting to the light-emitting stack, a second surface opposite to the first surface, and a void; wherein the void comprises a bottom part near the first surface and an opening on the second surface, and a dimension of the bottom part is larger than the dimension of the opening. |
| US11005005B2 |
Optoelectronic semiconductor device and method of manufacturing an optoelectronic semiconductor device
An optoelectronic semiconductor device and a method for manufacturing an optoelectronic semiconductor device are disclosed. In an embodiment an optoelectronic semiconductor device includes a semiconductor body comprising a first region of a first conductive type, an active region, a second region of a second conductive type and a coupling-out surface, wherein the first region, the active region and the second region are arranged along a stacking direction, wherein the active region extends from a rear surface opposite the coupling-out surface to the coupling-out surface along a longitudinal direction transverse to or perpendicular to the stacking direction, wherein the coupling-out surface is arranged plane-parallel to the rear surface, and wherein the coupling-out surface and the rear surface of the semiconductor body are produced by an etching process. |
| US11005002B2 |
Manufacturing of a semiconductor photosensitive device
The present disclosure relates to a method of manufacturing a semiconductor device, including the successive steps of: a) forming doped germanium on a germanium layer covering a first support; b) covering said doped germanium with a second support; and c) removing the first support. |
| US11004998B2 |
Wearable brain interface systems including a headgear and a plurality of photodetector units
An exemplary wearable brain interface system includes a headgear configured to be worn on a head of a user, a plurality of photodetector units configured to attach to the headgear, and a master control unit coupled to each of the photodetector units and configured to control the photodetector units by directing a photodetector of each photodetector unit to detect photons of light. |
| US11004996B2 |
Regenerative braking using phosphorescence
Provided herein are systems and methods for regenerative braking. A method for regenerative braking may comprise converting mechanical energy from a braking event to electrical energy. The electrical energy may activate a photon battery comprising phosphorescent material. |
| US11004995B2 |
Photovoltaic device
A photovoltaic device according to the present disclosure is provided with: a condensing optical system having chromatic aberration; a first photoelectric converter, which is arranged on an optical axis of the condensing optical system; and a second photoelectric converter, which is arranged on an outer peripheral side of the first photoelectric converter when viewed from an optical axis direction of the condensing optical system, and which has a bandgap lower than a bandgap of the first photoelectric converter, wherein the first photoelectric converter is arranged on an inner side of a rectangle that circumscribes a condensing region of absorbable longest-wavelength light determined based on the bandgap. |
| US11004993B2 |
Tiled frameless PV-module
A photovoltaic module employing an array of photovoltaic cells disposed between two optically transparent substrates such as to define a closed-loop peripheral area of the module that does not contain a photovoltaic cell. The module is sealed with a peripheral seal along the perimeter; and is devoid of a structural element affixed to an optically transparent substrate and adapted to mount the module to a supporting structure. The two substrates may be bonded together with adhesive material and, optionally, the peripheral seal can include the adhesive material. The module optionally includes diffraction grating element(s) adjoining respectively corresponding PV-cell(s). |
| US11004976B2 |
Semiconductor device including MOS transistor having silicided source/drain region and method of fabricating the same
A semiconductor device has a silicide source/drain region is fabricated by growing silicon on an epitaxial region including silicon and either germanium or carbon. In the method, a gate electrode is formed on a semiconductor substrate with a gate insulating layer interposed therebetween. An epitaxial layer is formed in the semiconductor substrate at both sides of the gate electrodes. A silicon layer is formed to cap the epitaxial layer. The silicon layer and a metal material are reacted to form a silicide layer. In a PMOS, the epitaxial layer has a top surface and inclined side surfaces that are exposed above the upper surface of the active region. The silicon layer is grown on the epitaxial layer in such a way as to cap the top and inclined surfaces. |
| US11004974B1 |
Field effect transistors containing electric field assist layers at gate corners and method of making the same
A semiconductor structure includes a source region, a drain region, a channel region located between the source region and the drain region, a gate stack structure including a gate dielectric and a gate electrode that overlies the gate dielectric, such that a first gap region is present between an area of the source region and an area of the gate electrode in a plan view and a second gap region is present between an area of the drain region and the area of the gate electrode in the plan view, a contact-level dielectric layer overlying the source region and the drain region and laterally surrounding the gate stack structure, and at least one assist-field metallic plate located vertically above a top surface of the gate electrode and having an areal overlap with at least one of the first gap region and the second gap region in the plan view. |
| US11004970B2 |
Mirror device structure for power MOSFET and method of manufacture
A MOSFET includes a substrate having a body region of a first conductivity type. A main field effect transistor (mainFET) and a mirror device are formed in the substrate. The mainFET includes first gate trenches, first source regions of a second conductivity type adjacent to the first gate trenches, and first body implant regions of the first conductivity type extending into the body region adjacent to and interposed between the first source regions. The mirror device includes second gate trenches, second source regions of the second conductivity type adjacent to the second gate trenches, second body implant regions of the first conductivity type extending into the body region adjacent to and interposed between the second source regions, and link elements of the first conductivity type interconnecting pairs of the second body implant regions. |
| US11004969B2 |
Trench MOSFETs having dummy cells for avalanche capability improvement
A trench MOSFET layout with multiple trenched floating gates and at least one trenched channel stop gate in termination area shorted with drain region is disclosed to make it feasibly achieved after die sawing. The layout consisted of multiple trench MOSFETs connected together with multiple sawing trenched gates across a space between two trench MOSFETs having a width same as scribe line. Dummy cells formed between an edge trench and active area act as buffer cells to absorb avalanche energy when gate bias is increasing for turning on channel, therefore, the UIS failure issue is avoided and the avalanche capability of the trench MOSFET is enhanced. |
| US11004968B2 |
Semiconductor device
The semiconductor device of the present invention includes a semiconductor layer which includes an active portion and a gate finger portion, an MIS transistor which is formed at the active portion and includes a gate trench as well as a source region, a channel region and a drain region sequentially along a side surface of the gate trench, a plurality of first gate finger trenches arranged by an extended portion of the gate trench at the gate finger portion, a gate electrode embedded each in the gate trench and the first gate finger trench, a second conductive-type first bottom-portion impurity region formed at least at a bottom portion of the first gate finger trench, a gate finger which crosses the plurality of first gate finger trenches and is electrically connected to the gate electrode, and a second conductive-type electric field relaxation region which is formed more deeply than the bottom portion of the first gate finger trench between the mutually adjacent first gate finger trenches. |
| US11004963B2 |
Insulated gate bipolar transistor having first and second field stop zone portions and manufacturing method
An embodiment relates to a method of manufacturing an insulated gate bipolar transistor in a semiconductor body. A first field stop zone portion of a first conductivity type is formed on a semiconductor substrate. A second field stop zone portion of the first conductivity type is formed on the first field stop zone portion. A drift zone of the first conductivity type is formed on the second field stop zone portion. A doping concentration in the drift zone is smaller than 1013 cm−3 along a vertical extension of more than 30% of a thickness of the semiconductor body upon completion of the insulated gate bipolar transistor. |
| US11004962B2 |
Integrated circuit including at least one nano-ridge transistor
The disclosed technology generally relates to integrated circuit devices having at least one transistor, and methods of fabricating the same. In one aspect, an integrated circuit device can be produced from a silicon substrate and can include at least one nano-ridge transistor formed from III-V semiconducting crystal portions. The III-V portions can be grown epitaxially from the silicon substrate using an intermediate portion which can be adapted to produce aspect ratio trapping. The nano-ridge transistor can have a reduced footprint on the silicon substrate, may be adapted for power RF applications, and can be combined with MOS or CMOS transistors within one and a same integrated circuit. |
| US11004957B2 |
Manufacturing methods of inorganic thin film transistors (TFTs) and flexible display devices
The present disclosure relates to a manufacturing method of inorganic thin film transistors (TFTs), including: forming a p-type semiconductor layer and a n-type semiconductor layer on a hard substrate in sequence, forming a slot on the p-type semiconductor layer, wherein the slot passes through the n-type semiconductor layer, forming a source and a drain on the n-type semiconductor layer, wherein the source and the drain are respectively configured on two sides of the slot, performing a flip-transferring process to transfer the p-type semiconductor layer, the n-type semiconductor layer, the source, and the drain on a flexible substrate, forming a gate insulation layer and a gate on the p-type semiconductor layer in sequence, forming a flat layer on the gate insulation layer, wherein the flat layer covers the gate. The inorganic TFT is designed to obtain a narrow channel inorganic TFT device, to reduce process requirements, and to reduce costs. |
| US11004956B2 |
Manufacturing method of semiconductor device
A method of manufacturing a semiconductor device includes forming a stacked structure, forming an opening in the stacked structure, forming a preliminary channel layer in the opening, forming a channel layer by performing heat treatment on the preliminary channel layer, etching an inner surface of the channel layer, and performing ozone (O3) treatment on an etched inner surface of the channel layer. |
| US11004952B1 |
High-electron mobility transistor and fabrication method thereof
A high-electron mobility transistor includes a substrate; a buffer layer on the substrate; a AlGaN layer on the buffer layer; a passivation layer on the AlGaN layer; a source region and a drain region on the AlGaN layer; a source layer and a drain layer on the AlGaN layer within the source region and the drain region, respectively; a gate on the AlGaN layer between the source region and a drain region; and a field plate on the gate and the passivation layer. The field plate includes an extension portion that laterally extends to an area between the gate and the drain region. The extension portion has a wave-shaped bottom surface. |
| US11004948B2 |
Three-dimensional memory devices and methods for forming the same
Embodiments of three-dimensional (3D) memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a gate electrode having a two-sided staircase shape above the substrate, a blocking layer on the gate electrode, a plurality of discrete charge trapping layers each extending laterally on the blocking layer, a tunneling layer on the plurality of charge trapping layers, and a plurality of discrete channel layers each extending laterally on the tunneling layer. The plurality of charge trapping layers are disposed corresponding to stairs of the two-sided staircase shape of the gate electrode, respectively. The plurality of channel layers are disposed corresponding to the stairs of the two-sided staircase shape, respectively. |
| US11004946B2 |
FinFET structure with composite gate helmet
A semiconductor device includes first and second gate stack, a source/drain contact, and a first gate capping structure. The first gate stack and the second gate stack are over a semiconductor fin. The source/drain contact extends laterally from a first gate spacer of the first gate stack to a second gate spacer of the second gate stack, and extends vertically from a source/drain region in the semiconductor fin to above the source/drain region. The first gate capping structure is atop the first gate stack, and has a greater thickness on the first gate spacer of the first gate stack than on a gate metal of the first gate stack. The thickness is measured in a direction perpendicular to a top surface of the first gate stack. |
| US11004944B2 |
Gate cut device fabrication with extended height gates
Methods of forming semiconductor devices include forming a lower dielectric layer, to a height below a height of a dummy gate hardmask disposed across multiple device regions, by forming a dielectric fill to the height of a dummy gate and etching the dielectric fill back. A dummy gate structure includes the dummy gate and the dummy gate hardmask. A protective layer is formed on the dielectric layer to the height of the dummy gate hardmask. The dummy gate hardmask is etched back to expose the dummy gate. |
| US11004943B2 |
Porous and nanoporous semiconductor materials and manufacture thereof
Methods for forming porous or nanoporous semiconductor materials are described. The methods allow for the formation of arrays pores or nanopores in semiconductor materials with advantageous pore size, spacing, pore volume, material thickness, and other aspects. Porous and nanoporous materials also are provided. |
| US11004940B1 |
Manufacture of power devices having increased cross over current
An embodiment relates to a n-type planar gate DMOSFET comprising a Silicon Carbide (SiC) substrate. The SiC substrate includes a N+ substrate, a N− drift layer, a P-well region and a first N+ source region within each P-well region. A second N+ source region is formed between the P-well region and a source metal via a silicide layer. During third quadrant operation of the DMOSFET, the second N+ source region starts depleting when a source terminal is positively biased with respect to a drain terminal. The second N+ source region impacts turn-on voltage of body diode regions of the DMOSFET by establishing short-circuitry between the P-well region and the source metal when the second N+ source region is completely depleted. |
| US11004937B1 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate, a gate structure, a source/drain region, a contact opening, an etching stop layer, an interlayer dielectric layer, and a first contact structure. The substrate includes a buried insulation layer, a semiconductor layer, and an isolation structure. The semiconductor layer is disposed on the buried insulation layer. The gate structure is disposed on the semiconductor layer. The isolation structure and the source/drain region are disposed in the semiconductor layer. The contact opening penetrates at least a part of the substrate. The etching stop layer is disposed on the gate structure, the source/drain region, a sidewall of the contact opening, and a bottom of the contact opening. The interlayer dielectric layer is disposed on the etching stop layer. The first contact structure penetrates the interlayer dielectric layer and the etching stop layer in the contact opening. |
| US11004935B2 |
Solid power semiconductor field effect transistor structure
The present invention discloses a rugged power semiconductor field effect transistor structure, and through a special design, it solves the problem that the activation under a transient condition may result in failures on the device, so that there is no parasitic BJT, and thus the device is more rugged. |
| US11004933B2 |
Field effect transistor structures
Field effect transistors include a stack of nanowires of vertically arranged channel layers. A source and drain region is disposed at respective ends of the vertically arranged channel layers. A gate stack is formed over, around, and between the vertically arranged channel layers. Internal spacers are each formed between the gate stack and a respective source or drain region, with at least one pair of spacers being positioned above an uppermost channel layer. |
| US11004929B2 |
Trimmable silicon-based thermistor with reduced stress dependence
Various examples provide an electronic device that includes first and second resistor segments. Each of the resistor segments has a respective doped resistive region formed in a semiconductor substrate. The resistor segments are connected between first and second terminals. The first resistor segment is configured to conduct a current in a first direction, and the second resistor segment is configured to conduct the current in a second different direction. The directions may be orthogonal crystallographic directions of the semiconductor substrate. |
| US11004927B2 |
Display apparatus
A display apparatus including a substrate, a first power source line disposed in a peripheral area adjacent to a display area configured to display image, the first power source line including a first layer and a second layer disposed on the first layer and electrically connected to the first layer, a first insulation layer disposed between the first layer and the second layer of the first power source line, and a first insulating dam disposed on and contacting the second layer of the first power source line, the first insulating dam disposed in the peripheral area and surrounding the display area. |
| US11004924B2 |
Display device, method of manufacturing the same, and electronic apparatus
There is provided a display device including: a light emitting element; and a drive transistor (DRTr) that includes a coupling section (W1) and a plurality of channel sections (CH) coupled in series through the coupling section (W1), wherein the drive transistor (DRTr) is configured to supply a drive current to the light emitting element. |
| US11004923B2 |
Display device with a bending area
Disclosed is a display device that is capable of being driven with low power consumption. A first thin-film transistor including a polycrystalline semiconductor layer and a second thin-film transistor including an oxide semiconductor layer are disposed in an active area, thereby reducing power consumption. At least one opening formed in a bending area is formed to have the same depth as any one of contact holes formed in the active area, thereby making it possible to form the opening and the contact holes through the same process and consequently simplifying the process of manufacturing the device. Since a high potential supply line and a low potential supply line overlap each other with a protective film formed of an inorganic insulation material interposed therebetween, short-circuiting of the high potential supply line and the low potential supply line may be prevented. |
| US11004920B2 |
Display device and method of manufacturing the same
A display device includes a substrate, a plurality of pixels on the substrate, a first electrode arranged for each pixel on the substrate, a pixel defining layer on the substrate along a boundary of each pixel and including an opening exposing the first electrode of the pixel, an organic layer on the first electrode in the opening of the pixel defining layer, and a second electrode on the organic layer, the pixel defining layer including a first pixel defining layer and a second pixel defining layer stacked on a surface of the first pixel defining layer, the surface of the first pixel defining layer including an upper surface and a side surface, and a surface roughness of the upper surface of the first pixel defining layer being greater than a surface roughness of the first electrode. |
| US11004917B2 |
Pixel defining layer, display substrate and manufacturing method thereof, and display apparatus
A pixel defining layer, a display substrate and manufacturing method thereof, and a display apparatus are provided. The pixel defining layer includes: a lyophilic material layer disposed on a base substrate, and a lyophobic material layer disposed at a side of the lyophilic material layer away from the base substrate. An orthographic projection of a surface of the lyophobic material layer close to the base substrate on the base substrate is within an orthographic projection of a surface of the lyophilic material layer away from the base substrate on the base substrate. The lyophilic material layer is made of a lyophilic material having attractability to a solution with organic electroluminescent materials dissolved, and the lyophobic material layer is made of a lyophobic material having repellency to the solution with organic electroluminescent materials dissolved. The pixel defining layer reduces the influence on the uniformity of the films. |
| US11004915B2 |
Display device having a power supply layer including a plurality of holes
Provided is a display device including: a substrate; a plurality of display elements defining a display area on the substrate and each including a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode; a power supply wiring disposed outside the display area; an organic insulating layer on the power supply wiring and having an opening exposing the power supply wiring; a power supply electrode layer partially disposed on the organic insulating layer and including a plurality of holes over the organic insulating layer, wherein a first portion of the power supply electrode layer overlaps the power supply wiring and a second portion of the power supply electrode layer overlaps the opposite electrode; a plurality of protrusions spaced apart from each other and respectively covering at least some of the plurality of holes; and an encapsulation layer covering the plurality of display elements. |
| US11004912B2 |
Flexible display apparatus having alignment mark and method of assembling the same
A flexible display apparatus includes a flexible display panel including a flexible substrate, a display area of the flexible substrate including a thin film transistor, an organic light emitting layer and a sensor electrode, and a peripheral area of the flexible substrate including a first alignment mark in which respective portions of two metal layers are stacked;a window on a first surface of the flexible display panel; and a protective film on a second surface of the flexible display panel. The first alignment mark is aligned with a reference point of the window and with a reference point of the protective film. |
| US11004911B2 |
Active-matrix organic light emitting diode display panel structure
An active-matrix organic light emitting diode display panel structure includes: a displaying region including at least one curved peripheral portion located on an outer edge; displaying pixel units disposed in the displaying region, some of the units are defined as at least one group disposed adjacent to each of the at least one curved peripheral portion; at least one group of dummy pixel units disposed on the outer edge of the displaying region and corresponding to the at least one curved peripheral portion, the dummy pixel units connected to a group of peripheral displaying pixel units that is connected to the each curved peripheral portion, and located outside the group of the peripheral displaying pixel units. Each of the peripheral displaying pixel units is directly connected to the dummy pixel units. The dummy pixel units can lower loading effect of the peripheral displaying pixel units and prevent a brightness decreasing issue. |
| US11004908B1 |
Pixel structure and display device
A pixel structure and a display device are provided. The pixel structure is designed and arranged in this way, which is helpful for simplifying a layout design of data lines. In addition, this can reduce dependence on a compensation circuit in a driving circuit. Further, arrangements and shapes of first sub-pixels and second sub-pixels are same. Therefore, a set of masks can be used to make the first sub-pixels and the second sub-pixels together, thereby reducing the mold charge of the masks and saving costs. |
| US11004905B2 |
Display panel and display device
A display panel includes pixels arranged in an array in a first direction and a second direction. Each pixel includes a first sub-pixel having a first light-emitting zone to emit light of a first color, a second sub-pixel having a second light-emitting zone to emit light of a second color, and a third sub-pixel having a third light-emitting zone to emit light of a third color. The first, second, and third light-emitting zones are arranged in a triangle such that the first, second, and third light-emitting zones cover respective vertices of the triangle, with one side of the triangle being substantially parallel to the first direction. Any two pixels directly adjacent in the first direction have respective patterns of first, second, and third light-emitting zones, which are substantially mirror-symmetrical to each other. Any two diagonally adjacent pixels have a substantially repeating pattern of first, second and third light-emitting zones. |
| US11004903B2 |
Electronic device having hexagonal structure and addressing method therefor
The present disclosure discloses an electronic device having a hexagonal structure and an addressing method therefor. The electronic device according to one embodiment of the present disclosure includes a first conductor arranged in a first direction, a second conductor disposed on the first conductor and arranged in a second direction, a third conductor disposed on the second conductor and arranged in a third direction, a selection element disposed at a portion between the first and second conductors where the first, second, and third conductors intersect, and a memory element disposed at a portion between the second and third conductors where the first, second, and third conductors intersect. |
| US11004900B2 |
Magnetoresistive random access memory device and method of manufacturing the same
An MRAM device includes a first conductive pattern including a material generating a spin orbital torque, a torque transfer pattern contacting a portion of an upper surface of the first conductive pattern, an insulation pattern on a side of the torque transfer pattern and covering the first conductive pattern, and a magnetic tunnel junction (MTJ) structure on the torque transfer pattern, the MTJ structure including a free layer pattern, a tunnel barrier pattern, and a fixed layer pattern sequentially stacked. |
| US11004897B2 |
Magnetoresistive random access memory and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate; forming a first top electrode on the first MTJ and a second top electrode on the second MTJ; forming a first ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ; forming a passivation layer on the first ULK dielectric layer, wherein a bottom surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the first MTJ; and forming a second ULK dielectric layer on the passivation layer. |
| US11004884B2 |
Solid-state imaging apparatus
An imaging device includes one or more insulating layers on a substrate; an effective region including: a polarization layer in the one or more insulating layers and including one or more polarizers that polarize light; and at least one first photoelectric conversion region in the substrate and that converts incident light polarized by the one or more polarizers into electric charge; and a peripheral region outside the effective region and including: one or more wiring layers that include a pad portion in a same layer of the one or more insulating layers as the polarization layer. |
| US11004883B2 |
System and method for optical sensing
A processing system for an optical sensing device may comprise receiver circuitry and a determination module. The processing system may also include drive circuitry configured to drive a light source to emit light. The receiver circuitry is coupled to a photodetector, and the receiver circuitry is configured to acquire a resulting signal from the photodetector, and generate a measurement of light received by the photodetector based on the resulting signal. The receiver circuitry includes high-pass filter circuitry configured to high-pass filter the resulting signal to generate a high-pass filtered signal based. The determination module is configured to generate a light measurement based on the high-pass filtered signal. |
| US11004875B2 |
Methods of manufacturing electronic structures
A structure is disclosed, comprising: a first field effect transistor, FET, comprising a first source terminal, a first drain terminal, a first layer or body of semiconductive material arranged to provide a first semiconductive channel connecting the first source terminal to the first drain terminal, and a gate terminal arranged with respect to the first semiconductive channel such that a conductivity of the first semiconductive channel may be controlled by application of a voltage to the gate terminal; and a second FET comprising a second source terminal, a second drain terminal, a second layer or body of semiconductive material arranged to provide a second semiconductive channel connecting the second source terminal to the second drain terminal, and the gate terminal, the second conductive channel being arranged with respect to the gate terminal such that a conductivity of the second channel may be controlled by application of a voltage to the gate terminal. Methods of manufacturing such structures are also disclosed. |
| US11004874B2 |
Thin film transistor, method for fabricating the same, array substrate, and display panel
The disclosure discloses a thin film transistor, a method for fabricating the same, an array substrate, and a display panel. The thin film transistor includes: a first conductive layer on a base substrate, a first insulation layer on a side of the first conductive layer facing away from the base substrate, and a second conductive layer on a side of the first insulation layer facing away from the first conductive layer, wherein an active layer is arranged on a side of the first insulation layer facing the first conductive layer, and/or a side thereof facing the second conductive layer. |
| US11004871B2 |
Display panel and display apparatus
Disclosed are a display panel and a display apparatus. The display panel includes a multiplex circuit, a plurality of signal connection lines and a plurality of data signal lines, wherein each of the switch devices in the multiplex circuit comprises at least one thin film transistor; the colors of all pixel units in a first pixel unit column are the same; the colors of at least two pixel units in a second pixel unit column are different; first switch devices correspond to first pixel unit columns; second switch devices correspond to second pixel unit columns; and the equivalent channel width-to-length ratio of thin film transistors in each first switch device is less than the equivalent channel width-to-length ratio of thin film transistors in each second switch device. |
| US11004870B2 |
Transistor structure, display device including transistor structure, and method of manufacturing transistor structure
A transistor structure may include a first electrode, a second electrode, a third electrode, a substrate, and a semiconductor member. The semiconductor member overlaps the third electrode and includes a first semiconductor portion, a second semiconductor portion, and a third semiconductor portion. The first semiconductor portion directly contacts the first electrode, is directly connected to the third semiconductor portion, and is connected through the third semiconductor portion to the second semiconductor portion. The second semiconductor portion directly contacts the second electrode and is directly connected to the third semiconductor portion. A minimum distance between the first semiconductor portion and the substrate is unequal to a minimum distance between the second semiconductor portion and the substrate. |
| US11004863B2 |
Non-volatile memory with gate all around thin film transistor and method of manufacturing the same
A non-volatile memory having a gate all around thin film transistor includes a multi-layer structure, an elongated plug structure, a first conductive plug, and a second conductive plug. The multi-layer structure includes a plurality of gate electrode layers stacked on a substrate separately from each other. The elongated plug structure penetrates through the multi-layer structure, and a cross-section of the elongated plug structure has an elongated contour. The elongated plug structure includes an insulating pillar, a channel layer, and a gate dielectric layer. The channel layer surrounds the insulating pillar. The gate dielectric layer surrounds the channel layer. The gate electrode layers surround the gate dielectric layer. The first conductive plug is disposed between the channel layer and the substrate and between the insulating pillar and the substrate. The second conductive plug is disposed on the insulating pillar and is covered by the channel layer. |
| US11004858B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a non-volatile memory and a logic circuit. The non-volatile memory includes a stacked structure comprising a first insulating layer, a floating gate, a second insulating layer, a control gate and a third insulating layer stacked in this order from a substrate; an erase gate line; and a word line. The logic circuit includes a field effect transistor comprising a gate electrode. The word line includes a protrusion, and a height of the protrusion from the substrate is higher than a height of the erase gate line from the substrate. The word line and the gate electrode are formed of polysilicon. |
| US11004855B2 |
Buried metal track and methods forming same
An integrated circuit includes a semiconductor substrate, an isolation region extending into, and overlying a bulk portion of, the semiconductor substrate, a buried conductive track comprising a portion in the isolation region, and a transistor having a source/drain region and a gate electrode. The source/drain region or the gate electrode is connected to the buried conductive track. |
| US11004851B2 |
Complementary transistor and semiconductor device
A complementary transistor is constituted of a first transistor TR1 and a second transistor TR2, active regions 32, 42 of the respective transistors are formed by layering first A layers 33, 43 and the first B layers 35, 45 respectively, surface regions 201, 202 provided in a base correspond to first A layers 33, 43 respectively, first B layers 35, 45 each have a conductivity type different from that of the first A layers 33, 43, and extension layers 36, 46 of the first B layer are provided on insulation regions 211, 212 respectively. |
| US11004850B2 |
Vertical fin field effect transistor devices with a replacement metal gate
A method of forming a fin field effect transistor complementary metal oxide semiconductor (CMOS) device is provided. The method includes forming a plurality of multilayer fin templates and vertical fins on a substrate, wherein one multilayer fin template is on each of the plurality of vertical fins. The method further includes forming a dummy gate layer on the substrate, the plurality of vertical fins, and the multilayer fin templates, and removing a portion of the dummy gate layer from the substrate from between adjacent pairs of the vertical fins. The method further includes forming a fill layer between adjacent pairs of the vertical fins. The method further includes removing a portion of the dummy gate layer from between the fill layer and the vertical fins, and forming a sidewall spacer layer on the fill layer and between the fill layer and the vertical fins. |
| US11004848B2 |
Composite transistor having overlapping active regions and control electrode
Disclosed herein is a composite transistor which includes a first transistor TR1 including a control electrode, a first active region, a first A extending part, and a first B extending part, and a second transistor TR2 including a control electrode, a second active region, a second A extending part, and a second B extending part. The first active region, the second active region, and the control electrode overlap one another. Both the first A extending part and the first B extending part extend from the first active region and both the second A extending part and the second B extending part extend from the second active region. The first electrode is connected to the first A extending part, the second electrode is connected to the second A extending part, and the third electrode is connected to the first B extending part and the second B extending part. |
| US11004846B2 |
Enlarging spacer thickness by forming a dielectric layer over a recessed interlayer dielectric
An exemplary semiconductor device includes first spacers disposed along sidewalls of a first gate structure and second spacers disposed along sidewalls of a second gate structure. A source/drain region is disposed between the first gate structure and the second gate structure. A first ILD layer is disposed between the first spacers and the second spacers. A portion of the first ILD layer has a first recessed upper surface. A dielectric layer is disposed over the first spacers, the second spacers, and the first recessed upper surface of the first ILD layer. A portion of the dielectric layer has a second recessed upper surface that is disposed over the portion of the first ILD layer having the first recessed upper surface. A second ILD layer is disposed over the dielectric layer. A contact extends through the second ILD layer, the dielectric layer, and the first ILD layer to the source/drain region. |
| US11004844B2 |
Recessed STI as the gate dielectric of HV device
A method includes forming an isolation region extending into a semiconductor substrate, etching a top portion of the isolation region to form a recess in the isolation region, and forming a gate stack extending into the recess and overlapping a lower portion of the isolation region. A source region and a drain region are formed on opposite sides of the gate stack. The gate stack, the source region, and the drain region are parts of a Metal-Oxide-Semiconductor (MOS) device. |
| US11004843B2 |
Switch control circuit for a power switch with electrostatic discharge (ESD) protection
An integrated circuit includes a power switch coupled between a first voltage supply node and an internal voltage supply node and a switch control circuit coupled to a control electrode of the power switch. The switch control circuit includes a driver circuit coupled between a second voltage supply node and a third voltage supply node, a pass-gate having a first node coupled to an output of the driver circuit and a second node coupled to the control electrode of the power switch, a pull-up transistor having a first current electrode coupled to the first voltage supply node, a second current electrode coupled to the control electrode of the power switch, and a bias circuit having a bias output configured to provide a higher voltage between the first and second power supply nodes as a bias voltage to a body electrode of the pull-up transistor. |
| US11004841B2 |
Semiconductor device having multiple gate pads
Disclosed are semiconductor devices that include additional gate pads, and methods of fabricating and testing such devices. A device may include a first gate pad, a second gate pad, and a third gate pad. The first gate pad is connected to a gate including a gate oxide layer. The second and third gate pads are part of an electro-static discharge (ESD) protection network for the device. The ESD protection network is initially isolated from the first gate pad and hence from the gate and gate oxide layer. Accordingly, gate oxide integrity (GOI) testing can be effectively performed and the reliability and quality of the gate oxide layer can be checked. The second gate pad can be subsequently connected to the first gate pad to enable the ESD protection network, and the third gate pad can be subsequently connected to an external terminal when the device is packaged. |
| US11004836B2 |
Method for integrating a light emitting device
Light emitting devices and methods of integrating micro LED devices into light emitting device are described. In an embodiment a light emitting device includes a reflective bank structure within a bank layer, and a conductive line atop the bank layer and elevated above the reflective bank structure. A micro LED device is within the reflective bank structure and a passivation layer is over the bank layer and laterally around the micro LED device within the reflective bank structure. A portion of the micro LED device and a conductive line atop the bank layer protrude above a top surface of the passivation layer. |
| US11004835B2 |
Light-emitting diodes with light coupling and conversion layers
Light-emitting sub-pixels and pixels for micro-light-emitting diode-based displays are provided. Also provided are methods of fabricating individual sub-pixels, pixels, and arrays of the pixels. The sub-pixels include a double-layered film that includes a coupling layer disposed over a light-emitting diode and a light-emission layer disposed over the coupling layer. |
| US11004834B2 |
LED unit
An LED unit comprises a substrate and a first LED chip. The first LED chip may include a first light-emitting surface arranged on the substrate in such a way that light emitted from the first LED chip radiates in a direction of radiation of the LED unit. The LED unit includes a second LED chip comprising a second light-emitting surface and arranged above the first LED chip in such a way that the second LED chip at least partially covers the first LED chip and radiates light emitted from the second LED chip in the direction of radiation of the LED unit. The LED unit comprises a first conversion layer at least partially covering the first light-emitting surface and/or at least partially laterally surrounding the first LED chip. A second conversion layer at least partially covers the second LED chip. |
| US11004833B1 |
Multi-chip stacked devices
Examples described herein generally relate to multi-chip devices having stacked chips. In an example, a multi-chip device includes a chip stack that includes chips. Neighboring chips are connected to each other. Plural chips of the chips collectively include columns of broken via pillars and bridges. Each of the plural chips has a broken via pillar in each column. The broken via pillar has first and second continuous via pillar portions aligned in a direction normal to a side of a semiconductor substrate of the respective chip. The first continuous via pillar portion is not connected within the broken via pillar to the second continuous via pillar portion. Each of the plural chips has one or more of the bridges. Each bridge connects, within the respective chip, the first continuous via pillar portion in a column and the second continuous via pillar portion in another column. |
| US11004830B2 |
Control system, semiconductor device and method of the semiconductor device
The control system according to embodiments includes a switching element, a control unit controlling the conductive state of the switching element, and a first capacitor storing charge supplied to the control unit. The first capacitor and the control unit are connected with each other via the switching element. |
| US11004828B2 |
Methods and apparatus for integrated gang bonding and encapsulation of stacked microelectronic devices
Methods for fabricating microelectronic device assemblies, the method comprising providing mutually spaced stacks of microelectronic devices on a substrate and substantially concurrently encapsulating the stacks of microelectronic devices on the substrate and gang bonding mutually aligned conductive elements of vertically adjacent microelectronic devices. Compression molding apparatus for implementing the methods, and resulting microelectronic device assemblies are also disclosed. |
| US11004820B2 |
Apparatus and method for filling a ball grid array
An apparatus and method for filling a ball grid array template and a method for transferring a plurality of balls are disclosed. The apparatus includes a flat base, a plate and a stationary ball supply bin. The plate is mounted on the base and configured to be rotatable about a first axis perpendicular to the base. An upper surface of the plate includes a plurality of holes forming the ball grid array template. The stationary ball supply bin is mounted to the base. The base is configured to be inclined at an angle relative to a horizontal plane. The ball supply bin is configured in use to dispense a plurality of balls onto the corresponding plurality of holes forming the ball grid array template as the plate is rotated about the first axis. |
| US11004819B2 |
Prevention of bridging between solder joints
A method of fabricating a connection structure is disclosed. The method includes providing a substrate that has a top surface and includes a set of pads for soldering, each of which has a pad surface exposed from the top surface of the substrate. The method also includes applying a surface treatment to a part of the top surface of the substrate close to the pads and the pad surface of each pad so as to make at least the part of the top surface and the pad surfaces of the pads rougher. |
| US11004818B2 |
Package with passive devices and method of forming the same
An embodiment is a device comprising a substrate, a metal pad over the substrate, and a passivation layer comprising a portion over the metal pad. The device further comprises a metal pillar over and electrically coupled to the metal pad, and a passive device comprising a first portion at a same level as the metal pillar, wherein the first portion of the passive device is formed of a same material as the metal pillar. |
| US11004816B2 |
Hetero-integrated structure
A hetero-integrated structure includes a substrate, a die, a passivation layer, a first redistribution layer, a second redistribution layer, and connecting portions. The die is attached on the substrate. The die has an active surface and a non-active surface. The active surface has pads. The passivation layer covers sidewalls and a surface of the die to expose a surface of the pads. The first redistribution layer is located on the passivation layer and electrically connected to the pads. The second redistribution layer is located on the substrate and adjacent to the die. The connecting portions are connected to the first redistribution layer and the second redistribution layer. |
| US11004813B2 |
Semiconductor device and manufacturing method of semiconductor device
A semiconductor device includes a lower insulating layer formed on a primary surface of a semiconductor substrate; a sealing layer formed in contact with a top surface of the lower insulating layer; and a conductive member including a first conductive member formed on the sealing layer and having a first film thickness and a second conductive member formed on the sealing layer in contact with a first conductive member and having a second film thickness that is smaller than the first film thickness. |
| US11004807B2 |
Method of producing laminated substrate, method of producing semiconductor module, laminated substrate, and semiconductor module
A method of manufacturing a laminated substrate including an insulation substrate comprised of ceramic, and a front electrode formed on a front surface of the insulation substrate, a semiconductor element being mountable on a front surface of the front electrode, including forming the front electrode on the front surface of the insulation substrate, and before or after the forming the front electrode, applying laser processing to the front surface of the insulation substrate at an outer peripheral area of the front electrode to modify a conductive property of the front surface of the insulation substrate to have electrical conductivity. |
| US11004805B2 |
Semiconductor device and method of fabricating same including two seal rings
Provided is a method of fabricating a semiconductor device, including the following steps. A first seal ring and a second seal ring that are separated from each other are formed on a substrate. A protective layer covering the first seal ring and the second seal ring is formed on the substrate. The protective layer between the first seal ring and the second seal ring includes a concave surface. The protective layer at the concave surface and a portion of the protective layer on the first seal ring are removed to form a spacer on a sidewall of the first seal ring, and form an opening in the protective layer. The width of the opening is greater than the width of the first seal ring, and the opening exposes a top surface of the first seal ring and the spacer. |
| US11004803B2 |
Dummy dies for reducing warpage in packages
A method includes placing a plurality of functional dies over a carrier, placing a plurality of dummy dies over the carrier, encapsulating the plurality of functional dies and the plurality of dummy dies in an encapsulant, and forming redistribution lines over and interconnecting the plurality of functional dies. The redistribution lines, the plurality of functional dies, the plurality of dummy dies, and the encapsulant in combination form a reconstructed wafer. The plurality of functional dies are in a center region of the reconstructed wafer, and the plurality of dummy dies are in a peripheral region of the reconstructed wafer, with the peripheral region encircling the center region. The reconstructed wafer is de-bonded from the carrier. The reconstructed wafer is bonded to a package component selected from the group consisting essentially of an interposer, a package substrate, a printed circuit board, a thermal module, and combinations thereof. |
| US11004799B2 |
Package structure and manufacturing method thereof
A package structure and the method thereof are provided. The package structure includes a conductive plate, a semiconductor die, a molding compound, and antenna elements. The conductive plate has a first surface, a second surface and a sidewall connecting the first surface and the second surface. The semiconductor die is located on the second surface of the conductive plate. The molding compound laterally encapsulates the semiconductor die and covers the sidewall and a portion of the second surface exposed by the semiconductor die, wherein the first surface of the conductive plate is coplanar with a surface of the molding compound. The antenna elements are located over the first surface of the conductive plate. |
| US11004797B2 |
Package structure, semiconductor package and method of fabricating the same
A package structure including a first semiconductor die, a second semiconductor die, a molding compound, an interconnect structure, first conductive features, through insulator vias, an insulating encapsulant and a redistribution layer is provided. The molding compound is encapsulating the first semiconductor die and the second semiconductor die. The interconnect structure is disposed on the molding compound and electrically connecting the first semiconductor die to the second semiconductor die. The first conductive features are electrically connected to the first semiconductor die and the second semiconductor die, wherein each of the first conductive features has a recessed portion. The through insulator vias are disposed on the recessed portion of the first conductive features and electrically connected to the first and second semiconductor die. The insulating encapsulant is encapsulating the interconnect structure and the through insulator vias. The redistribution layer is disposed on the insulating encapsulant and over the interconnect structure. |
| US11004795B2 |
Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a substrate, a first gate structure, a first spacer, a source drain structure, a first dielectric layer, a conductor, and a protection layer. The first gate structure is present on the substrate. The first spacer is present on a sidewall of the first gate structure. The source drain structure is present adjacent to the first spacer. The first dielectric layer is present on the first gate structure and has an opening therein, in which the source drain structure is exposed through the opening. The conductor is electrically connected to the source drain structure, in which the conductor has an upper portion in the opening of the first dielectric layer and a lower portion between the upper portion and the source drain structure. The protection layer is present between the lower portion and the first spacer and between the upper portion and the source drain structure. |
| US11004794B2 |
Partial barrier free vias for cobalt-based interconnects and methods of fabrication thereof
Partial barrier-free vias and methods for forming such are disclosed herein. An exemplary interconnect structure of a multilayer interconnect feature includes a dielectric layer. A cobalt-comprising interconnect feature and a partial barrier-free via are disposed in the dielectric layer. The partial barrier-free via includes a first via plug portion disposed on and physically contacting the cobalt-comprising interconnect feature and the dielectric layer, a second via plug portion disposed over the first via plug portion, and a via barrier layer disposed between the second via plug portion and the first via plug portion. The via barrier layer is further disposed between the second via plug portion and the dielectric layer. The cobalt-comprising interconnect feature can be a device-level contact or a conductive line of the multilayer interconnect feature. The first via plug portion and the second via plug portion can include tungsten, cobalt, and/or ruthenium. |
| US11004786B2 |
Package structure and method of forming the same
A package structure includes a die, a TIV, a first encapsulant, a RDL structure, a thermal dissipation structure and a second encapsulant. The die has a first surface and a second surface opposite to each other. The TIV is laterally aside the die. The first encapsulant encapsulates sidewalls of the die and sidewalls of the TIV. The RDL structure is disposed on the first surface of the die and on the first encapsulant, electrically connected to the die and the TIV. The thermal dissipation structure is disposed over the second surface of die and electrically connected to the die through the TIV and the RDL structure. The second encapsulant encapsulates sidewalls of the thermal dissipation structure. |
| US11004782B2 |
Semiconductor device with internal and external electrode and method of manufacturing
A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface. |
| US11004779B2 |
Semiconductor device package and a method of manufacturing the same
A substrate includes a first dielectric layer having a first surface and a second surface opposite to the first surface, a first patterned conductive layer adjacent to the first surface of the first dielectric layer and comprising an interconnection structure, and an interconnection element. The interconnection element extends from the first surface of the first dielectric layer to the second surface of the first dielectric layer and is surrounded by the interconnection structure. |
| US11004778B1 |
Polygonal BGA semiconductor package
A ball grid array (BGA) package for an integrated circuit device includes an integrated circuit device having a plurality of terminals, and two largest dimensions that define a major plane. A package substrate material encloses the integrated circuit device, and is formed, in a plane parallel to the major plane, into a polygon having at least five sides. An array of contacts on an exterior surface of the package substrate material is electrically coupled to the plurality of terminals. Contacts in the array of contacts are distributed in a pattern of contact positions, and the center of each contact position may be separated from the center of each nearest other position by a separation distance that is identical throughout the pattern. Each position may be occupied by a contact, or positions in a sub-pattern may lack a contact and may be available for insertion of at least one via. |
| US11004777B2 |
Semiconductor device assemblies
In one general aspect, an apparatus can include a leadframe including a plurality of leads configured to provide electrical connections for the apparatus. The apparatus can also include a semiconductor die disposed on the leadframe and a conductive clip electrically coupling the semiconductor die with the leadframe. The apparatus can further include a heat slug disposed on the conductive clip. The heat slug can include a thermally conductive and electrically insulative material. |
| US11004776B2 |
Semiconductor device with frame having arms and related methods
A semiconductor device may include a circuit board having an opening, and a frame. The frame may have an IC die pad in the opening, and arms extending outwardly from the IC die pad and coupled to the circuit board. The semiconductor device may include an IC mounted on the IC die pad, bond wires coupling the circuit board with the IC, and encapsulation material surrounding the IC, the bond wires, and the arms. |
| US11004772B2 |
Cooling structure, cooling structure manufacturing method, power amplifier, and transmitter
A cooling structure according to the present invention is provided with: a base material formed with a cooling water flow passageway; a pipe which includes a first layer formed on an outer surface of the base material, and a second layer formed on the outside of the first layer; and a plate having the pipe cast therein. The base material is configured from a highly thermally conductive first material. The first layer is configured from a heat-resistant second material. The second layer is configured from a third material having high affinity with the second material. The plate is configured from a highly thermally conductive fourth material. The second material and the third material respectively have high affinity with the fourth material. |
| US11004767B2 |
Composite material, electronic apparatus, and method for manufacturing electronic apparatus
A composite material includes a base resin, a heat dissipation filler that is mixed into the base resin, hollow particles that are mixed into the base resin, hollow particles that are mixed into the base resin, and bubbles that are formed in the base resin. |
| US11004766B2 |
Cooler
A cooler may include: a housing including a coolant space in which coolant flows; partition walls partitioning the coolant space into a plurality of flow channels; and a plurality of cooling fins located in each of the flow channels. The partition walls may be curved tortuously such that each of the flow channels comprises wide portions and narrow portions. The wide portions and the narrow portions may be arranged alternately in each of the flow channels in a direction along which the coolant flows. A number of the cooling fins located in each of the wide portions may be greater than a number of the cooling fins located in each of the narrow portions. |
| US11004765B2 |
Field-effect transistor with a heat absorber in contact with a surface of the gate electrode on its back side
A semiconductor device may include a semiconductor substrate, an insulator film covering a part of an upper surface of the substrate, and a gate electrode opposing the upper surface via the insulator film. In the semiconductor substrate, a drift layer extending through a body layer to the upper surface opposes the gate electrode via the insulator film. The insulator film extends from the upper surface of the semiconductor substrate to an upper surface of the gate electrode by passing between the gate electrode and an upper electrode, and defines an opening at the upper surface of the gate electrode. A side surface of the opening of the insulator film is entirely located outside a volume space consisting of all straight lines that passes through the opposing surface of the drift layer at angle of 45 degrees to the opposing surface. |
| US11004762B2 |
Semiconductor device, vehicle-mounted semiconductor device, and vehicle-mounted control device
Provided is a vehicle-mounted semiconductor device enabling a temperature increase of active elements to be restricted. A vehicle-mounted semiconductor device includes: a semiconductor substrate; a plurality of active elements formed on the semiconductor substrate; a plurality of trenches surrounding the plurality of active elements to insulate and separate the active elements; and a terminal connecting in parallel the plurality of active elements insulated and separated by different trenches among the plurality of trenches and connected to an outside. |
| US11004759B2 |
Electronic component and method for manufacturing the same
An electronic component includes a resin structure including first and second surfaces facing each other, an electronic component element contained in the resin structure, including first and second main surfaces facing each other, and side surfaces connecting the first and second main surfaces, and being exposed to the first surface of the resin structure, and a through-electrode penetrating the resin structure to connect the first and second surfaces of the resin structure, in which the through-electrode are in contact with at least one of the side surfaces of the electronic component element. |
| US11004757B2 |
Bonded structures
A bonded structure is disclosed. The bonded structure includes a first element and a second element that is bonded to the first element along a bonding interface. The bonding interface has an elongate conductive interface feature and a nonconductive interface feature. The bonded structure also includes an integrated device that is coupled to or formed with the first element or the second element. The elongate conductive interface feature has a recess through a portion of a thickness of the elongate conductive interface feature. A portion of the nonconductive interface feature is disposed in the recess. |
| US11004756B2 |
Semiconductor device
A semiconductor device includes: a base plate; a semiconductor chip mounted on the base plate; a case surrounding the semiconductor chip on the base plate; an electrode terminal connected to the semiconductor chip; a sealing material covering an upper face of the base plate, the semiconductor chip and a part of the electrode terminal in the case; and a lid fastened to the case above the sealing material, wherein the electrode terminal is not exposed on an upper face of the sealing material, and there is a gap between the upper face of the sealing material and a lower face of the lid. |
| US11004755B2 |
Apparatus and method for the minimization of undercut during a UBM etch process
A semiconductor etch process is provided in which an undercut is minimized during an etch process through tight control of etch profile, recognition of etch completion, and minimization of over etch time to increase productivity. |
| US11004754B2 |
X-ray topographic apparatus and substrate processing system using the apparatus
A laser processing method includes irradiating a laser light into a substrate along a cutting line to form a laser-scribed layer within the substrate, irradiating an X-ray onto a first surface of the substrate along the cutting line, obtaining an image of a diffracted X-ray from the substrate, and determining whether or not the laser-scribed layer is formed along the cutting line, based on analysis of the obtained image of the diffracted X-ray. |
| US11004751B2 |
Vertical transistor having reduced edge fin variation
A semiconductor device includes a substrate with a first semiconductor fin and a second semiconductor fin formed thereon. A pair of opposing dielectric trench spacers are between the first and second semiconductor fins. The opposing dielectric trench spacers define an isolation region therebetween. The semiconductor device further includes a shallow trench isolation (STI) element formed in the isolation region. The STI element includes a lower portion on the substrate and an upper portion located opposite the lower portion. The upper portion extends above an upper end of the dielectric trench spacers. |
| US11004750B2 |
Middle of the line contact formation
Methods for forming semiconductor devices are disclosed including forming a semiconductor structure having a semiconductor substrate containing two or more fins. The method includes etching a first optical planarization layer on the semiconductor structure exposing a top surface of each of a gate spacer, a gate cap layer and a portion of a source/drain contact adjacent to the exposed gate spacer to form a first gate contact opening. The method further includes depositing a sacrificial place-holder material in the first gate contact opening. The method further includes removing the first optical planarization layer. The method further includes recessing a first conductive material. |
| US11004749B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device for suppressing a variation in characteristics caused by a current flowing at the time of breakdown is disclosed. The first power MOS transistor Q 1 and the column CLM are formed in the first element region FCM defined in the epitaxial layer NEL, and the second power MOS transistor Q 2 is formed in the second element region RCM. The first power MOS transistor Q 1 includes a first trench gate electrode TGE1, and the second power MOS transistor Q 2 includes a second trench gate electrode TGE2. The depth GDP1 of the first trench gate electrode TGE1 is shallower than the depth GDP2 of the second trench gate electrode TGE2. |
| US11004742B2 |
Methods and apparatus for an improved integrated circuit package
In a described example, an integrated circuit (IC) package includes an IC die disposed on a die attach pad; a plurality of leads electrically connected to terminals on the IC die, the leads including a base metal; and molding compound material encapsulating portions of the IC die, the die attach pads, and the plurality of leads; the plurality of leads having a solder joint reinforcement tab. The solder joint reinforcement tabs include a first side, a second side opposite to the first side, a third side, a fourth side opposite to and in parallel to the third side, a fifth side forming an end portion of the solder joint reinforcement tab, the solder joint reinforcement tabs including a solderable metal layer on the second, third and fourth sides and on portions of the fifth side. |
| US11004735B2 |
Conductive interconnect having a semi-liner and no top surface recess
According to embodiments of the present invention, a semiconductor wafer includes a substrate and an interlayer dielectric located on the substrate. The interlayer dielectric includes an interconnect. A barrier layer is located in between the interconnect and the interlayer dielectric. A semi-liner layer is located in between the interconnect and the barrier layer. The interlayer dielectric, the interconnect, and barrier layer form a substantially planar surface opposite the substrate. The interconnect has an interconnect height from a base to the substantially planar surface and a semi-liner height of the semi-liner layer is less than the interconnect height such that liner layer does not extend to the planar surface. |
| US11004732B2 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes forming first and second pattern structures on first and second regions of a substrate, respectively; forming a preparatory first interlayer insulating layer covering the first pattern structure on the first region; forming a preparatory second interlayer insulating layer covering the second pattern structure on the second region, the preparatory second interlayer insulating layer including first colloid; and converting the preparatory first and second interlayer insulating layers into first and second interlayer insulating layers, respectively, by annealing the preparatory first and second interlayer insulating layers. |
| US11004730B2 |
Methods of forming conductive features using a vacuum environment
An interconnect structure and a method of forming are provided. The method includes forming an opening in a dielectric layer and an etch stop layer, wherein the opening extends only partially through the etch stop layer. The method also includes creating a vacuum environment around the device. After creating the vacuum environment around the device, the method includes etching through the etch stop layer to extend the opening and expose a first conductive feature. The method also includes forming a second conductive feature in the opening. |
| US11004724B2 |
FETS and methods of forming FETS
An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate. |
| US11004722B2 |
Lift pin assembly
Apparatuses for substrate transfer are provided. A lift pin assembly can include a lift pin, a purge cylinder, and a lift pin guide. The lift pin guide is disposed adjacent the purge cylinder. The lift pin guide and the purge cylinder have a passage formed therethough in which the lift pin is disposed. The purge cylinder includes one or more nozzles that direct the flow of gas radially inward into a portion of the passage disposed in the purge cylinder. The one or more nozzles are disposed radially outward from the lift pin. The purge cylinder reduces particle deposition on the substrate by preventing contact between the lift pin and the support assembly as the lift pin is in motion. |
| US11004720B2 |
System and method for ring frame cleaning and inspection
A system and method for cleaning and inspecting ring frames is disclosed here. In one embodiment, a ring frame processing system includes: a cleaning station configured to remove a first tape on a first surface of a ring frame using a first blade, clean first adhesive residues from the first tape on the first surface of the ring frame using a first wheel brush, and remove second adhesive residues from a second tape on a second surface of the ring frame using a second blade; and an inspection station, wherein the inspection station comprises an automated optical inspection system configured to determine the cleanness of the first and second surfaces of the ring frame after cleaning. |
| US11004715B2 |
Substrate supporting device
A substrate supporting device having a feeder structure that enables a large number of electrodes to be successfully supplied with power. A ceramic heater 100 includes a base 10 having an upper surface as a support surface on which a substrate is supported, electrodes 20 embedded in the base 10, a base-supporting member 30 that is mounted on a lower surface of the base 10 and that is formed of a heat insulating material, and feeder rods 40 that extend through respective through-holes 35 formed in a circumferential wall 34 of the base-supporting member 30 and extending in the vertical direction and that are electrically connected to the electrodes 20. |
| US11004711B2 |
Automated wafer monitoring
In an embodiment, a system includes: a chuck; multiple groove conduits arranged around a circumference of a wafer position on the chuck; a gas source in fluid communication with the multiple groove conduits; and a flow monitor configured to determine an amount of gas flow from the gas source to an individual one of the multiple groove conduits. |
| US11004701B2 |
Break-in apparatus, break-in system and storage media
A break-in apparatus 100 has a supply unit 20 for supplying a cleaning liquid, a substrate support unit 30 for holding a dummy substrate W1 and a cleaning member holding unit 40 for performing a break-in processing on the cleaning member 200 by rotating the cleaning member 200 and bringing the cleaning member 200 into contact with the dummy substrate W1. |
| US11004694B1 |
3D semiconductor device and structure
A 3D semiconductor device, the device including: a first level, where the first level includes a first layer, the first layer including first transistors, and where the first level includes a second layer, the second layer including first interconnections; a second level overlaying the first level, where the second level includes a third layer, the third layer including second transistors, and where the second level includes a fourth layer, the fourth layer including second interconnections; and a plurality of connection paths, where the plurality of connection paths provides connections from a plurality of the first transistors to a plurality of the second transistors, where the second level is bonded to the first level, where the bonded includes oxide to oxide bond regions, where the bonded includes metal to metal bond regions, where the second level includes at least one memory array, and where the third layer includes material other than silicon. |
| US11004693B2 |
Light-irradiation heat treatment method and heat treatment apparatus
A plurality of flash lamps that irradiate a semiconductor wafer with flash light are arrayed in a plane. The array of the plurality of flash lamps is divided into two zones: a central zone including a region opposed to a central portion of the semiconductor wafer to be treated, and a peripheral zone outside the central zone. During flash light irradiation, an emission time of a flash lamp belonging to the peripheral zone is set to be longer than an emission time of a flash lamp belonging to the central zone. Thus, a greater amount of flash light is applied to the peripheral portion of the semiconductor wafer, where a temperature drop is relatively likely to occur, than to the central portion thereof, thus preventing a relative temperature drop in the peripheral portion of the semiconductor wafer during flash heating. |
| US11004688B2 |
FinFET device and method of forming
A finFET device and methods of forming are provided. The method includes etching recesses in a substrate on opposite sides of a gate stack. The method also includes epitaxially growing a source/drain region in each recess, where each of the source/drain regions includes a capping layer along a top surface of the respective source/drain region, and where a concentration of a first material in each source/drain region is highest at an interface of the capping layer and an underlying epitaxy layer. The method also includes depositing a plurality of metal layers overlying and contacting each of the source/drain regions. The method also includes performing an anneal, where after the anneal a metal silicide region is formed in each of the source/drain regions, where each metal silicide region extends through the capping layer and terminates at the interface of the capping layer and the underlying epitaxy layer. |
| US11004687B2 |
Gate contact over active processes
A semiconductor device fabrication process includes forming gates on a substrate having a plurality of openings, each gate having a conducting layer a first metal and a gate dielectric layer of a first dielectric material, partially filling the openings with a second dielectric material, forming a first structure on the substrate in a processing system without breaking vacuum, depositing a third dielectric material over the first structure, and forming a planarized surface of the gates and a surface of the third dielectric material that is disposed over the first structure. The forming of the first structure includes forming trenches by removing second portions of the second dielectric material within each opening, forming recessed active regions in the trenches by partially filling the trenches with a second metal, forming a liner over each recessed active region, and forming a metal cap layer over each liner. |
| US11004686B2 |
Bonding method, bonding device, and holding member
A method for bonding a first substrate and a second substrate includes: forming a protrusion at a partial region of the first substrate; measuring a position of the first substrate after the protrusion is formed in the first substrate; and bonding the first substrate and the second substrate by contacting the protrusion of the first substrate with a surface of the second substrate to form a contact region and enlarging the contact region. |
| US11004685B2 |
Multi-layer structures and methods of forming
A method includes depositing a plurality of layers on a substrate, patterning a first mask overlying the plurality of layers, and performing a first etching process on the plurality of layers using the first mask. The method also includes forming a polymer material along sidewalls of the first mask and sidewalls of the plurality of layers, and removing the polymer material. The method also includes performing a second etching process on the plurality of layers using the remaining first mask, where after the second etching process terminates a combined sidewall profile of the plurality of layers comprises a first portion and a second portion, and a first angle of the first portion and a second angle of the second portion are different to each other. |
| US11004676B2 |
Method for manufacturing semiconductor device, non-transitory computer-readable recording medium, and substrate processing apparatus
A method for improving a film formation rate and forming a film having a high dry etching resistance is disclosed.The method includes forming a metal nitride layer containing the metal element and the nitrogen element by performing a predetermined number of times in a time division manner supplying a halogen-based source gas containing the metal element to the substrate and supplying a reaction gas containing the nitrogen element and reacting with the metal element to the substrate; and forming a metal carbonitride layer containing the metal element, the carbon element, and the nitrogen element by performing a predetermined number of times in a time division manner supplying an organic-based source gas containing the metal element and the carbon element to the substrate and supplying the reaction gas to the substrate. |
| US11004673B2 |
High-power ultraviolet (UV) and vacuum ultraviolet (VUV) lamps with micro-cavity plasma arrays
A product having at least one plasma lamp that includes plates that are approximately parallel, with at least one array of microcavities formed in a surface of at least one plate. When desirable, the plates are separated a fixed distance by spacers with at least one spacer being placed near the plate's edge to form a hermetic seal therewith. A gas makes contact with the microcavity array. Electrodes capable of delivering a time-varying voltage are located such that the application of the time-varying voltage interacts with the gas to form a glow discharge plasma in the microcavities and the fixed volume between the plates. The glow discharge plasma efficiently and uniformly emits radiation that is predominantly in the UV/VUV spectral range with at least a portion of the radiation being emitted from the plasma lamp. |
| US11004658B2 |
Plasma processing apparatus and plasma processing method
In a plasma processing apparatus including a first radio-frequency power supply which supplies first radio-frequency power for generating plasma in a vacuum chamber, a second radio-frequency power supply which supplies second radio-frequency power to a sample stage on which a sample is mounted, and a matching box for the second radio-frequency power supply, the matching box samples information for performing matching during a sampling effective period which is from a point of time after elapse of a prescribed time from a beginning of on-state of the time-modulated second radio-frequency power until an end of the on-state and maintains a matching state attained during the sampling effective period from after the end of the on-state until a next sampling effective period. |
| US11004653B2 |
Edge detection system
An edge detection system is provided that generates a scanning electron microscope (SEM) linescan image of a pattern structure including a feature with edges that require detection. The edge detection system includes an inverse linescan model tool that receives measured linescan information for the feature from the SEM. In response, the inverse linescan model tool provides feature geometry information that includes the position of the detected edges of the feature. |
| US11004651B2 |
Tomography-assisted TEM prep with requested intervention automation workflow
Provided is a process for lamella thinning and endpointing that substitutes a series of automated small angle tilts for the motions in the conventional endpointing sequence. STEM images or through-surface BSE scans are acquired at each tilt. The results are analyzed automatically to determine feature depths, and an intervention request is made requesting a user decision based on marked-up images and summary information displayed. |
| US11004648B2 |
Methods and systems for multi-area selective etching
Embodiments herein provide systems and methods for multi-area selecting etching. In some embodiments, a system may include a plasma source delivering a plurality of angled ion beams to a substrate, the substrate including a plurality of devices. Each of the plurality of devices may include a first angled grating and a second angled grating. The system may further include a plurality of blocking masks positionable between the plasma source and the substrate. A first blocking mask of the plurality of blocking masks may include a first set of openings permitting the angled ion beams to pass therethrough to form the first angled gratings of each of the plurality of devices. A second blocking mask of the plurality of blocking masks may include a second set of openings permitting the angled ion beams to pass therethrough to form the second angled gratings of each of the plurality of devices. |
| US11004647B2 |
Compact source for generating ionizing radiation, assembly comprising a plurality of sources and process for producing the source
A source for generating ionizing radiation and in particular x-rays, to an assembly includes a plurality of sources and to a process for producing the source. The source for generating ionizing radiation comprises: a vacuum chamber; a cathode that is able to emit an electron beam into the vacuum chamber; an anode that receives the electron beam and that comprises a target that is able to generate ionizing radiation from the energy received from the electron beam; and an electrode that is placed in the vicinity of the cathode and forming a wehnelt. The electrode is formed from a conductive surface adhering to a concave face of a dielectric. |
| US11004645B2 |
Display assembly with anti-reflective film applied to video monitor with vacuum suction
A display system achieving a screen finish using vacuum suction. The system includes an optical element with an exterior surface, and an optical film is positioned over the exterior surface. The optical film is formed of a flexible optical material such as an anti-reflective material. The display system includes a retention frame supporting the optical element and retaining outer edges of the optical film against the exterior surface. The display system includes a vacuum unit in fluidic communication with a gap between the inner side of the optical film and the exterior surface of the optical element. The vacuum unit operates to pump gas out of the gap to draw a vacuum on the gap and may be operated on an ongoing basis to retain this vacuum. The optical element may be a video monitor, with the exterior surface being the display screen. |
| US11004643B2 |
Remote controlled circuit breaker panel system
A electrical distribution system has been developed to provide a remote central control point for individual circuits, and methods have been developed for retrofitting it to existing service panels or installing it into new service panels. This system provides a power circuit monitoring and control system that fits inside standard residential service panels, both new and retrofitted panels. The entire system can be retrofitted into existing breaker panel systems without the need of removing any permanent structure such as a wall. During this retrofit process, the panel cover on the existing distribution panel is first removed after the power to it is disconnected. The old breaker assembly is removed from the panel, and a circuit controller is then installed in the now available space within the panel. A new service panel enclosure with a circuit breaker assembly is installed directly over top of the enclosure. |
| US11004641B2 |
Thomson coil driven switch assembly with lightweight plunger
An electrical switch assembly includes a contact element to be moved towards a further contact element for generating an electrical connection; and a drive for moving the contact element; wherein the drive includes a plunger with a connection member interconnected with the contact element; wherein the plunger includes a mechanical structure with a top side to which the connection member is connection, and a bottom side opposite to the top side; wherein the drive includes a Thomas coil for moving the plunger via an electrically conducting top face, which is provided on the top side and an electrically conducting bottom face, which is provided on the bottom side. The mechanical structure includes at least one channel between the top side and the bottom side, the at least one channel extending transverse to a movement direction of the plunger. Furthermore, the mechanical structure fills less than 50% of a volume between the top side and the bottom side. |
| US11004640B2 |
Relay
A relay has a case, a first fixed terminal including a first fixed contact, a second fixed terminal including a second fixed contact, a movable touch piece including a first movable contact that is disposed facing the first fixed contact and a second movable contact that is disposed facing the second fixed contact, the movable touch piece being disposed in the case and disposed so as to be movable in a direction in which the first movable contact and the second movable contact come into contact with the first fixed contact and the second fixed contact and in a direction in which the first movable contact and the second movable contact separate from the first fixed contact and the second fixed contact, a drive shaft connected to the movable touch piece and extending in a movement direction of the movable touch piece, and a coil. |
| US11004638B2 |
System for monitoring an electromechanical relay, assembly and method for monitoring relay operation conditions
The present invention relates to a system for monitoring an electromechanical relay, wherein the electromechanical relay includes a relay coil for actuating at least one switch, the system comprising: at least one sensor adapted to measure an operating condition of the electromechanical relay, wherein the sensor is arranged adjacent or attached to the electromechanical relay; at least one controller communicatively connected to the at least one sensor and at least one memory, wherein the at least one controller is adapted to store the measured operating condition in the at least one memory; at least one transmitter, operatively connected to the controller, wherein the transmitter is adapted to transmit the stored measured operating condition to a remote device. |
| US11004637B2 |
Field device latching relay reset
An industrial process field device includes an active component, a latching relay, a controller, a relay drive, and a reset circuit. The active component may be a sensor configured to sense a process parameter, or a control device configured to control a process of the industrial process. The controller is configured to generate a switch signal, and the relay drive is configured to set the latching relay in one of a set state and a reset state based on the switch signal. The reset circuit is configured to set the latching relay to the reset state in response to an interruption of electrical power to the relay drive. |
| US11004636B2 |
Electrical relay with mounting bracket
The present invention relates to the field of electrical relays. In particular the invention relates to a bracket a relay and bracket combination which permits the relay to be mounted on a surface or panel in a plurality of angular rotational orientations. There is provided a relay and mounting bracket combination comprising a relay having a body with a terminal end portion provided with one or more electrical terminal connectors and a base end portion adapted for engagement with the bracket, wherein the bracket is provided with attachment features which facilitate the mounting of the bracket to an external object or surface when the bracket is engaged with the base end portion of the relay. |
| US11004635B2 |
Electric circuit breaker device
The present application relates to an electric circuit breaker device and has an object to reduce in size while maintaining a required strength. The electric circuit breaker device includes, in a resin housing (10), an igniter (20), a rod-like projectile (40), a conductor portion (50), which are disposed in this order from a first end portion (11) of the housing toward a second end portion (12) opposite the first end portion in an axial direction, and an insulating closed space (60) between the second end portion of the housing and the conductor portion, wherein the conductor portion is a plate portion including connection portions (51, 52) on both end sides; and a cut portion (53) at an intermediate portion, the conductor portion extending in a width direction orthogonal to a housing axial direction, the rod-like projectile is disposed to face the cut portion in the axial direction, and the cut portion includes fragile portions (55a, 55b) formed at two locations on the second end portion side of the conductor portion, each of the fragile portions being a notch portion. |
| US11004630B2 |
Button assembly
A button assembly is disposed in a rocker. The button assembly including a base, a pressure sensor and a keycap. The base has two lower pivoting portions with each of the two lower pivoting portions protruding outwardly from respective sides of the base. The pressure sensor is mounted on the base. The keycap overlies the pressure sensor. The keycap has two upper pivoting portions with each of the two upper pivoting portions protruding outwardly from respective sides of the keycap. The two lower pivoting portions are pivoted with the two upper pivoting portions to allow the two upper pivoting portions to be rotatable relative to the two lower pivoting portions. As described above, a push-button structure is thus formed by the two lower pivoting portions and the two upper pivoting portions configured among the base, the pressure sensor and the keycap to achieve the modularization of the button assembly. |
| US11004628B2 |
Key switch device
A key switch device includes a base including an opening in a central part thereof; a light guide including an elastic body receiving portion, the light guide being supported by the base to be disposed in the opening; a button attached capable of approaching and separating from the base to cover the light guide; an elastic body disposed between the elastic body receiving portion and a lower surface of the button, the elastic body biasing the button in a separating direction where the button is separated from the base; a fixed contact piece including a fixed contact, the fixed contact piece being attached to the base; and a movable contact piece, which is attached to the base, including a movable contact to be brought into contact with the fixed contact when the button is moved toward the base in an approaching direction where the button approaches the base. |
| US11004627B2 |
Reaction force generating member and key switch device
A reaction force generating member includes: a first dome that gives a reaction force to an operation member according to the depression of the operation member; and a second dome that includes a hemispherical bowl part disposed inside the first dome, and a projection projecting downward from the center of the bowl part and depressing a switch disposed below the operation member. |
| US11004626B2 |
Power supply control device, power supply control method, and computer program
With a power supply control device, if semiconductor switches of a switch circuit are on and a relay contact is off, a controller determines whether or not a switch electric current detected by an electric current sensor is at least a threshold. If the controller has determined that the switch electric current is at least the threshold, then an electric current supply unit switches on the relay contact, and a drive circuit switches off the semiconductor switches. The controller changes the above-described threshold in accordance with the length of the lapse of time from when an electric current flows through the switch circuit. |
| US11004624B2 |
Circuit breaker lockout apparatus
A circuit breaker lockout apparatus includes a base body having a first section, a second section, and a recess formed between the first and second sections to receive a switch lever of a circuit breaker; a fixing element installed at the first section of the base body and having an actuation section to fix the base body to a switch lever of a circuit breaker received in the recess; and a cover adjustably fastened between a release position and a lockout position at the base body, the actuation section of the fixing element is accessible in the release position and is covered in an inaccessible manner by the cover in the lockout position, and the cover is configured to be fixed to the base body in the lockout position to block an adjustment of the cover from the lockout position into the release position. |
| US11004622B2 |
On-load tap changer
An on-load tap changer of a resistor type includes a selector base plate; a selector mounted on the selector base plate; a diverter switch base plate; a diverter switch mounted on the diverter switch base plate and having a transition resistor; and a common drive shaft which is configured to actuate the selector and the diverter switch. |
| US11004621B2 |
Relay
A relay is disclosed. In an embodiment a relay includes a first contact, a second contact, a movable element arrangeable in a closed position and in an open position; and at least one bimetallic strip, wherein the movable element electrically connects the first contact to the second contact in the closed position, wherein the first contact and the second contact are electrically isolated from each other when the movable element is arranged in the open position, and wherein the at least one bimetallic strip is configured to be deformed upon an increase in temperature such that it presses the movable element against the first and second contacts after deformation. |
| US11004619B2 |
Circuit interrupters with non-contact sensor systems for evaluating erosion of electrical contacts and related methods
Circuit interrupters with opto-electronic and/or acoustic systems that can measure displacement over time, optionally along with interrupt current measurements, during an opening and closing event with signal data collected when triggered by a “breaker open” or “breaker close” event. |
| US11004617B2 |
Method for manufacturing organic-inorganic hybrid solar cell
A method for manufacturing an organic-inorganic hybrid solar cell, the method including forming a first electrode, forming a first common layer on the first electrode, forming a first light absorbing layer by applying a first perovskite precursor solution including a first organic halide and a first metal halide on the first common layer, forming a second light absorbing layer by applying a second perovskite precursor solution including a second organic halide on the first light absorbing layer, forming a second common layer on the second light absorbing layer; and forming a second electrode on the second common layer. |
| US11004614B2 |
Stacked capacitors for use in integrated circuit modules and the like
A device including a substrate, an upper capacitor, and a lower capacitor is described. The upper capacitor is mounted on the substrate and includes an upper body and a pillar that extends from the upper body towards the substrate. The lower capacitor includes a lower body that is disposed both lateral to the pillar and at least in part between the upper body and the substrate. Each of the upper capacitor and the lower capacitor is a respective discrete circuit component. Such capacitor stacking configurations facilitate the placement of larger numbers of capacitors in close proximity to microprocessor cores in integrated circuit modules without the need to increase module size. |
| US11004612B2 |
Low temperature sub-nanometer periodic stack dielectrics
MIM capacitors using low temperature sub-nanometer periodic stack dielectrics (SN-PSD) containing repeating units of alternating high dielectric constant materials sublayer and low leakage dielectric sublayer are provided. Every sublayer has thickness less than 1 nm (sub nanometer). The high dielectric constant materials could be one or more different materials. The low leakage dielectric materials could be one or more different materials. For the SN-PSD containing more than two different materials, those materials are deposited in sequence with the leakage current of the materials from the lowest to the highest and then back to the second-lowest, or with the energy band gap of the materials from the widest to the narrowest and then back to the second widest in each periodic cell. A layer of low leakage current dielectric materials is deposited on and/or under SN-PSD. The dielectric constant of SN-PSD is much larger than that of the component oxides and can be readily deposited at 250° C. using atomic layer deposition (ALD). The ALD deposition cycle could be 20-1000 cycles. The deposition technology is not limited to ALD, could be thermal oxidation, chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD) and other thermal source assisted deposition. |
| US11004607B2 |
Method for manufacturing multilayer ceramic capacitor
A method for manufacturing a multilayer ceramic capacitor includes: producing a plurality of dielectric green sheets; producing therefrom a plurality of internal electrode-printed green sheets; producing therefrom a plurality of individually cut unsintered laminates by stacking some of the plurality of dielectric green sheets, as cover layers, and the plurality of internal electrode-printed green sheets together; producing therefrom element body precursors by applying a ceramic paste to side faces of the unsintered laminates for forming side margins thereon, wherein an application thickness of the ceramic paste is adjusted in a manner such that a thickness of the side margins is greater than a thickness of the cover layers in the final product; producing therefrom element bodies by sintering; and forming external electrodes on at least one of principal faces and on both end faces of the element bodies. |
| US11004606B2 |
Dielectric materials using 2D nanosheet network interlayer
The present disclosure provides advantageous composite films/coatings, and improved methods for fabricating such composite films/coatings. More particularly, the present disclosure provides improved methods for fabricating composite films by trapping at least a portion of a layered material (e.g., hexagonal boron nitride sheets/layers) at an interface of a phase separated system and then introducing the layered material to a polymer film. The present disclosure provides for the use of boron nitride layers to increase the properties (e.g., dielectric constant and breakdown voltage) of polymer films. The exemplary films can be produced by an advantageous climbing technique. Exemplary boron nitride films are composed of overlapping boron nitride sheets with a total thickness of about one nanometer, with the film then transferred onto a polymer film, thereby resulting in significant increases in both dielectric and breakdown properties of the polymer film. |
| US11004604B2 |
Ceramic electronic device with inflected external electrodes and manufacturing method of ceramic electronic device with reverse pattern slurry
A ceramic electronic device includes: a multilayer chip in which dielectric layers are stacked, the multilayer chip having two end faces, an upper face, a lower face and two side faces; a plurality of first internal electrode layers that are provided inside of the multilayer chip, each of the plurality of first internal electrode layers having projection portions extracted to the two side faces; and external electrodes that are provided on the two side faces between the two end faces and are connected to the projection portions, wherein each of the external electrodes has a smaller thickness in a region not connected to the projection portions, has an inflection point toward the projection portions, and has a larger thickness in a region connected to the projection portions, in a direction connecting the two end faces. |
| US11004603B2 |
Vertical electrode decoupling/bypass capacitor
The invention is directed to a multilayer ceramic capacitor comprising a top surface and an opposing bottom surface and four side surfaces that extend between the top and bottom surfaces, a main body formed from a plurality of dielectric layers and a plurality of internal electrode layers alternately arranged, and external terminals electrically connected to the internal electrode layers wherein a first external terminal is disposed along the top surface and a second external terminal is disposed along the bottom surface. The internal electrode layer includes a first electrode electrically connected to the first external terminal and a second counter electrode electrically connected to the second external terminal, wherein the first electrode includes a central portion extending from the first external terminal toward the second external terminal and wherein the central portion extends 40% to less than 100% a distance from the first external terminal to the second external terminal. |
| US11004602B2 |
Manufacturing method of flat coil and electronic apparatus
A flat coil, a manufacturing method thereof and an electronic apparatus are disclosed. The manufacturing method comprises: rolling a metal foil lamination onto a carrier roller to form a foil rod, wherein the metal foil lamination includes at least one layer of metal foil; sliding the foil rod from the carrier roller; slicing the foil rod into thin disks; and processing the thin disks to form at least one flat coil, wherein a pressing roller is pressed against the carrier roller via the metal foil lamination with a controlled pressing force as the metal foil lamination is rolled. |
| US11004600B2 |
Permanent magnet and method of making permanent magnet
A method includes mixing first and second alloys to form a mixture, pressing the mixture within a first magnetic field to form a magnet having anisotropic particles of the first alloy aligned with a magnetic moment of the magnet, and heat treating the magnet within a second magnetic field to form elongated grains from the second alloy and align the elongated grains with the moment. |
| US11004598B2 |
Wireless charging coil
A wireless charging coil is provided herein. The wireless charging coil comprising a first stamped coil having a first spiral trace, the first spiral trace defining a first space between windings, and a second stamped coil having a second spiral trace, the second spiral trace defining a second space between windings, wherein the first stamped coil and second stamped coil are planar to and interconnected with one another, such that the first stamped coil is positioned within the second space of the second stamped coil, and the second stamped coil is positioned within the first space of the first stamped coil. |
| US11004593B2 |
Coil component
A coil conductive wire has a coil part wound around a pillar part, and flat-shaped connection end parts provided at respective ends of the coil part. Terminal electrodes are electrically connected to the connection end parts, each of which terminal electrodes has an electrode layer and a conductive layer covering the electrode layer. Each connection end part has a first principle face connected to a surface of the electrode layer, a second principle face projecting from a surface of the conductive layer, and a side face. The conductive layer has a flat area, and a skirt area provided between the flat area and the side face and sloping onto the side face. The thickness of the flat area is smaller than that of each connection end part, while the thickness of the skirt area decreases in the direction away from the side face. |
| US11004592B2 |
High-current half-turn windings
An electric device comprises a core having a center section and two outer sections, a high current winding, and a low current winding. The high current winding includes a plurality of half-turn coils connected in parallel between a first high current terminal and a second high current terminal. Each of the plurality of half-turn coils is wound around a fraction of the center section and forms a loop around one of the two outer sections along with the first and second high current terminals. The low current winding includes a plurality of full-turn coils connected in series between a first low current terminal and a second low current terminal, each of the plurality of full-turn coils wound around the center section of the core substantially fully. The plurality of half-turn coils of the high current winding are interleaved with the plurality of full-turn coils of the low current winding. |
| US11004585B2 |
Permanent magnet, rotor, motor, and compressor
A permanent magnet, a rotor, a motor and a compressor are provided. A work face of the permanent magnet includes a first edge and a second edge, a head endpoint of the first edge is connected to a tail endpoint of the second edge by means of a transition edge, the transition edge is located at a side, adjacent to a center of the work face, of a line connecting the head endpoint with the tail endpoint, and the transition edge includes at least one sub-arc segment, or a combination of at least one sub-arc segment and at least one sub-straight segment. |
| US11004583B2 |
Magneto-dielectric material comprising hexaferrite fibers, methods of making, and uses thereof
In an embodiment, a magneto-dielectric material comprises a polymer matrix; a plurality of hexaferrite microfibers; wherein the magneto-dielectric material has a permeability of 2.5 to 7, or 2.5 to 5 in an x-direction parallel to a broad surface of the magneto-dielectric material and a magnetic loss tangent of less than or equal to 0.03; as determined at 1 GHz, or 1 to 2 GHz. |
| US11004578B1 |
Twisted pair communication cables having dielectric separators that identify pairs
Twisted pair communication cables that include reduced or minimal use of colorant may include a plurality of twisted pairs of individually insulated conductors, and the respective insulation formed around each conductor included in the plurality of twisted pairs may include one or more polymeric materials that are not blended or compounded with any colorant. A plurality of dielectric separators may be provided including a dielectric separator respectively positioned between the individually insulated conductors of each of the plurality of twisted pairs. Physical indicia may be selectively formed on at least two of the plurality of dielectric separators, and the physical indicia may facilitate identification of the plurality of twisted pairs. A jacket may be formed around the plurality of twisted pairs and the plurality of dielectric separators. |
| US11004574B2 |
Method for manufacturing anisotropic conductive film, and anisotropic conductive film
An anisotropic conductive film manufacturing method capable of reducing manufacturing costs. Also, an anisotropic conductive film capable of suppressing the occurrence of conduction defects. The anisotropic conductive film manufacturing method includes: a holding step of supplying conductive particles having a plurality of particle diameters on a member having a plurality of opening parts, and holding the conductive particles in the opening parts; and a transfer step of transferring the conductive particles held in the opening parts to an adhesive film. In the particle diameter distribution graph (X-axis: particle diameter (μm), Y-axis: number of particles) of the conductive particles held in the opening parts, the shape of the graph is such that the slope is substantially infinite in a range at or above a maximum peak particle diameter. |
| US11004572B2 |
Charged particle detection material, and charged particle detection film and charged particle detection liquid using the same
A charged particle detection material which can detect charged particles due to a discharge phenomenon or the like caused even in a very low voltage which cannot be observed by a prior art, as well as a charged particle detection film and a charged particle detection liquid using the material. The charged particle detection material and the charged particle detection film contain at least one of a fluorescent substance, a luminescent substance, an electroluminescent substance, a fractoluminescent substance, a photochromic substance, an afterglow substance, a photostimulated luminescent substance and a mechanoluminescent substance and can easily detect emission or incidence of charged particles in real time. |
| US11004561B2 |
Motion tracking system with inertial-based sensing units
Systems, apparatus, and method of monitoring a position of a joint. An inertial monitoring unit is configured to be coupled to a portion of a patient, such as a thigh. Another inertial monitoring unit is configured to be attached to another portion of the patient, such as a shank, that is connected to the other portion by a joint, such as a knee. The inertial monitoring units detect motion of their respective portions of the patient and transmit data indicative of this motion. These transmissions may be received by a computer and used to determine an orientation of the joint. The inertial monitoring units may also be coupled to vibration detection units and/or ultrasound modules that provide additional data regarding a condition of the joint. |
| US11004550B2 |
Treatment recommendations based on drug-to-drug interactions
Cognitive medical treatment recommendation mechanisms are provided. The mechanisms ingest a corpus of medical treatment content that comprises drug-to-drug interaction information. The mechanisms generate a set of drug interaction insight data structures and an initial set of candidate treatments for a medical condition of a patient based on an analysis of an electronic medical record associated with the patient. The mechanisms rank candidate treatments in the initial set of candidate treatments based on the set of drug interaction insight data structures to generate a final set of candidate treatments, where the ranking reduces rankings of candidate treatments in which drug interactions are identified in the set of drug interaction insight data structures. The mechanisms output a treatment recommendation based on the final set of candidate treatments. |
| US11004547B2 |
Systems and methods of aggregating healthcare-related data from multiple data centers and corresponding applications
Described herein are systems and methods for receiving healthcare data from a plurality data sources that generate and store data in various data model regimes, many of which are not standardized or are variants of a standard. The stored data may then be used to provide a plurality of customized execution environments and graphical user interfaces (GUIs) to users, based on each user's electronic healthcare records, insurance records, and wearable device data. |
| US11004545B2 |
Clinical effect of pharmaceutical products using communication tool integrated with compound of several pharmaceutical products
A combination of N>1 substances with pharmaceutical activity against at least one medical condition for treating the medical condition with a program including instructions causing a computer to perform a method including: providing a patient with a set of questions adapted to the combination according to a question schedule; providing a patient with N sets of questions according to N question schedules, wherein each set of questions is adapted to one substance; collecting answers to the sets of questions from the patient; subjecting the answers to the set of questions adapted to the combination to a set of functions, thereby generating a first patient feedback; subjecting the answers to the sets of questions each adapted for one substance, to N sets of functions, thereby generating a second patient specific feedback; and providing the first and second specific feedbacks to the patient. |
| US11004542B2 |
Using subject sequencing data and a database of therapy biomarker distributions to determine therapy impact
Techniques for generating therapy biomarker scores and visualizing same. The techniques include determining, using a patient's sequence data and distributions of biomarker values across one or more reference populations, a first set of normalized scores for a first set of biomarkers associated with a first therapy, and a second set of normalized scores for a second set of biomarkers associated with a second therapy, generating a graphical user interface (GUI) including a first portion associated with the first therapy and having at least one visual characteristic determined based on a normalized score of the respective biomarker in the first set of normalized scores; and a second portion associated with a second therapy and having at least one visual characteristic determined based on a normalized score of the respective biomarker in the second set of normalized scores; and displaying the generated GUI. |
| US11004541B1 |
Systems and methods for determining a genomic testing status
A computer-implemented system for determining a genomic testing status of a patient may include at least one processor programmed receive, from a source, unstructured information from a plurality of patient records associated with a patient; determine, using a first machine learning model, a primary patient record from among the plurality of patient records, wherein at least a portion of information represented in the primary patient record correlates to genomic testing; determine, using a second machine learning model and based on unstructured information from one at least one of the patient records, a likelihood of an occurrence of genomic testing for the patient; determine a genomic testing status of the patient based on the determined likelihood of the occurrence of genomic testing; and display a user interface comprising an indicator of the genomic testing status of the patient and a link to the primary patient record. |
| US11004540B2 |
Determining the limit of detection of rare targets using digital PCR
A method for determining false positives calls in a biological data plot is provided. The method includes identifying a first data cluster as non-amplification data points within the biological data plot and identifying a second data cluster as wild-type positives within the biological data plot. The method further includes estimating a position in the biological data plot of a center of the first and second data clusters. The method further includes determining, for each data point within the first data cluster, a probability of belonging to the first data cluster and determining, for each data point within the second data cluster, a probability of belonging to the second data cluster. The method includes applying a probability threshold for each data point within the first and second data cluster to identify false positives. |
| US11004525B1 |
Modulation of programming voltage during cycling
Systems and methods for increasing cycling endurance and minimizing over programming of non-volatile memory cells by modulating the programming voltage applied to the non-volatile memory cells over time as the number of program/erase cycles increases are described. A bit count ratio based on bit counts within two threshold voltage zones may be used to determine the amount of voltage reduction in the programming voltage applied during subsequent programming operations. For example, if the bit count ratio is between 0.02 and 0.05, then the reduction in the programming voltage may be 100 mV; if the bit count ratio is between 0.05 and 0.10, then the reduction in the programming voltage may be 200 mV. The modulation (e.g., the reduction) of the programming voltage may be performed at varying cycle intervals depending on the total number of program/erase cycles for a memory block and/or the bit count ratio. |
| US11004517B2 |
Storage device including nonvolatile memory device and operating method thereof
A storage device includes a nonvolatile memory device including a memory block and a memory controller. The memory block includes a first memory region connected with a first word line and a second memory region connected with a second word line. The memory controller sets a read block voltage based on a first read voltage of the first memory region. The memory controller determines a second read voltage of the second memory region based on variation information and the read block voltage. |
| US11004516B2 |
Erasing memory cells
Apparatus including an array of memory cells comprising a plurality of strings of series-connected memory cells, a plurality of access lines each connected to a control gate of a respective memory cell of each string of series-connected memory cells of the plurality of series-connected memory cells, and a controller configured during an erase operation of the plurality of strings of series-connected memory cells to apply a first voltage level to a node connected to an end of a particular string of series-connected memory cells of the plurality of strings of series-connected memory cells, and apply a second voltage level to a particular access line of the plurality of access lines concurrently with applying the first voltage level to the node, wherein the second voltage level has a magnitude greater than the first voltage level, and is lower than the first voltage level. |
| US11004515B2 |
Semiconductor memory device, controller and memory system having the same
There may be provided a controller including an erase count monitor and a command generator. The erase count monitor may store and update an erase count value for the memory block. The erase count value may indicate a number of times an erase operation is performed for the memory block. The command generator may be configured to generate, based on the erase count value, a set command for setting a first select transistor among the select transistors to which an erase operation voltage is to be applied during the erase operation of the memory block, and a second select transistor among the select transistors to be floated when the erase operation voltage is to be applied to the first select transistor. |
| US11004514B2 |
Semiconductor memory device
A memory device includes a first cell above a substrate, a first line connected to the first cell, a second cell above the first cell connected with the first cell, a second line connected to the second cell, a third cell above the second cell connected with the second cell, a third line connected to the third cell, a fourth cell above the third cell connected with the third cell, a fourth line connected to the fourth cell, and a driver applying voltages to the lines when data is written to a cell in a write operation. To write data to the second cell, the driver applies a write voltage to the second line, applies a first voltage lower than the write voltage to the first line, and applies a second voltage higher than the first voltage and lower than the write voltage to the third and fourth lines. |
| US11004511B2 |
Memory device having separate programming and resistance readout control
A method for fabricating a semiconductor device includes forming first contacts to a heater for programming, and forming second contacts to a phase-change material layer for resistance readout. The phase-change material layer is formed in proximity to the heater, and the first contacts are electrically isolated from the second contacts to provide separate programming and resistance readout control. |
| US11004507B2 |
Methods and systems for detecting degradation of resistive memory devices
A memory controller may detect degradation in accordance with a bit error rate (BER) of the resistive memory device including memory cells. The memory controller may control the memory cells to be programmed to a first resistance state, read the programmed memory cells, and receive the BER of the memory cells generated during a read operation from the resistive memory device. The memory controller may determine a quantity of program cycles of the memory cells based on the BER. The quantity may be determined based on reference to a lookup table indicating a correlation between the BER and the quantity of program cycles. |
| US11004504B2 |
Controller, memory system including the controller, and operating method of the memory system
A controller comprises an error correction circuit configured to check an error bit number of error bits in the read data and correct the error bits; a read retry range setting circuit configured to reset a preset read retry range with respect to the read data, and set a new read retry range based on the error bit number and an error correction capability of the error correction circuit; a read voltage setting circuit configured to reset the set read voltage and set, as a new read voltage, a voltage among a plurality of voltages of the reset read retry range, corresponding to the new read retry range; and a flash control circuit configured to control the memory device to perform a read retry operation on the stored data, using the new read voltage. |
| US11004501B2 |
Sensing a memory device
A memory device comprises a memory cell array with memory cells arranged in a cell string coupled to a metal bit line, a sense amplifier for providing a sensing current to the memory cell array, and a memory controller for controlling the sense amplifier to provide the sensing current to access data during a memory access cycle. The memory controller performs operations comprising: during a pre-charging stage of the memory access cycle, providing a pre-charging voltage to the sense amplifier to drive the sense amplifier such that a particular voltage is provided to the memory cell array; during a first sensing stage, providing the pre-charging voltage to the sense amplifier; and during a second sensing stage, providing a sensing voltage to drive the sense amplifier such that the particular voltage provided to the memory cell array is maintained. |
| US11004498B2 |
Memory interface circuit, memory storage device and configuration status checking method
A memory interface circuit, a memory storage device and a configuration status checking method are provided. The memory interface circuit is configured to connect a plurality of volatile memory modules and a memory controller. The volatile memory modules include a first volatile memory module and a second volatile memory module. The memory interface circuit includes a first interface circuit and a second interface circuit. The first interface circuit is configured to receive a first signal from the first volatile memory module and transmit a second signal to the second interface circuit through an internal path of the memory interface circuit. The second interface circuit is configured to transmit a third signal to the second volatile memory module according to the second signal to evaluate a configuration status of the memory interface circuit by the third signal. |
| US11004492B2 |
Cell bottom node reset in a memory array
Methods, systems, and devices for cell bottom node reset in a memory array are described. The memory array may include a plurality of ferroelectric memory cells having a cell bottom node and a cell plate opposite the cell bottom node. A zero voltage may be applied to a plurality of digit lines in the memory array. A plurality of word lines may be activated to electrically coupled the plurality of digit lines to cell bottom node of each of the ferroelectric memory cells. Accordingly, the cell bottom node of each of the ferroelectric memory cells may be reset to the zero voltage. |
| US11004486B2 |
Driving circuit
The present disclosure relates to a driving circuit including a first circuit, a transistor switch, and a voltage level conversion circuit. The first circuit includes an operational amplifier and a feedback circuit, and is configured to output a first signal (e.g., an analog signal). The feedback circuit is configured to feed back the first signal to the operational amplifier. A source terminal and a drain terminal of the transistor switch are respectively electrically coupled to the operational amplifier and an output pin of the driving circuit. The voltage level conversion circuit is connected to the source terminal and a gate terminal of the transistor switch. When the voltage level conversion circuit is enabled, a voltage difference between the gate terminal and the source terminal of the transistor switch is controlled to a set value, so that the first signal is output to the output pin through the transistor switch. |
| US11004482B1 |
Retention voltage generator circuit
Memory circuits used in computer systems may have different operating modes. In a retention mode, a voltage level of an array power supply node coupled to memory cells included in the memory circuit is reduced to a level sufficient to retain data, but not to perform read and write operations to the memory cells. A power converter circuit may be configured to generate the retention voltage level, and adjust the retention voltage level using a leakage current of dummy memory cells included in the memory circuit. |
| US11004481B2 |
Internal voltage generation device and method for generating internal voltage
An internal voltage generation device includes: a voltage detection circuit generating a first detection signal by comparing a first voltage with a target voltage; a voltage difference detection circuit enabled in response to an operation enable signal, generating a second detection signal by comparing a voltage difference between the first voltage and a second voltage with a target gap voltage; a control circuit generating a first up/down code and the operation enable signal according to the first detection signal, and generating a second up/down code according to the second detection signal; a first voltage generation circuit generating the first voltage by down-converting a supply voltage, and adjusting a level of the first voltage according to the first up/down code; and a second voltage generation circuit generating the second voltage by boosting up the supply voltage, and adjusting a level of the second voltage according to the second up/down code. |
| US11004479B2 |
Method, system and device for integration of bitcells in a volatile memory array and bitcells in a non-volatile memory array
Disclosed are methods, systems and devices for operation of memory device. In one aspect, volatile memory bitcells and non-volatile memory bitcells may be integrated to facilitate copying of memory states between the volatile and non-volatile memory bitcells. |
| US11004474B2 |
Recording apparatus, reproducing apparatus, recording/reproducing apparatus, image pickup apparatus, recording method, and program
A recording apparatus is disclosed. The recording apparatus includes a data input portion configured to input data, a first moving image signal recording portion configured to record, based on the input data, a first moving image signal having a first image quality attribute, a condition detector configured to detect that the input data satisfies a predetermined condition during recording of the first moving image signal, and a second moving image signal recorder configured to record, based on the input data, a second moving image signal having a second image quality attribute when the condition detector detects that the input data satisfies the predetermined condition. |
| US11004465B2 |
Magneto-resistance element in which I-III-VI2 compound semiconductor is used, method for manufacturing said magneto-resistance element, and magnetic storage device and spin transistor in which said magneto-resistance element is used
An object of the present invention is to provide a Magneto-Resistance (MR) element showing a high Magneto-Resistance (MR) ratio and having a suitable Resistance-Area (RA) for device applications. The MR element of the present invention has a laminated structure including a first ferromagnetic layer 16, a non-magnetic layer 18, and a second ferromagnetic layer 20 on a substrate 10, wherein the first ferromagnetic layer 16 includes a Heusler alloy, the second ferromagnetic layer 20 includes a Heusler alloy, the non-magnetic layer 18 includes a I-III-VI2 chalcopyrite-type compound semiconductor, and the non-magnetic layer 18 has a thickness of 0.5 to 3 nm, and wherein the MR element shows a Magneto-Resistance (MR) change of 40% or more, and has a resistance-area (RA) of 0.1 [Ωμm2] or more and 3 [Ωμm2] or less. |
| US11004462B1 |
Machine learning classifications of aphasia
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for performing aphasia assessment. One of the methods includes receiving a recording, generating a text transcript of the recording, and generating speech quantifying and comprehension scores which can be used to determine an aphasia classification. Another method includes performing an aphasia assessment on a brain image to obtain an aphasia classification. |
| US11004459B2 |
Environmental condition detection
Examples described herein involve detecting known environmental conditions of using a neural network. An example implementation involves a playback device receiving data indicating a response of a listening environment to audio output of one or more playback devices as captured by a microphone and determining an input vector for a neural network. The playback device provides the determined input vector to the neural network, which includes an output layer comprising neurons that correspond to respective environmental conditions. The playback device detects that the input vector caused one or more neurons of the neural network to fire such that the neural network indicates that one or more particular environmental conditions are present in the listening environment. The playback device adjusts audio output of the one or more playback devices to at least partially offset the one or more particular environmental conditions. |
| US11004456B2 |
Methods, apparatus and articles of manufacture to provide secondary content in association with primary broadcast media content
Example methods, apparatus and articles of manufacture to provide media content are disclosed. Example apparatus disclosed herein include means for identifying primary media content presented on a first media presentation device. Disclosed example apparatus also include means for accessing a secondary content schedule associated with the primary media content. The secondary content schedule includes a plurality of secondary content items and time values associated with the secondary content items. The secondary content items are also associated with a loyalty value for a user of the first media presentation device. Disclosed example apparatus further include means for selecting one of the secondary content items to be accessed in response to a timestamp associated with the primary media content being between time values associated with the selected one of the secondary content items in the secondary content schedule. |
| US11004455B2 |
Apparatus and method for processing an encoded audio signal
An apparatus for processing an encoded audio signal having a plurality of downmix signals associated with a plurality of input audio objects and object parameters. The apparatus includes a grouper configured to group the downmix signals into groups of downmix signals associated with a set of input audio objects. The apparatus includes a processor configured to perform at least one processing step individually on the object parameters of each set of input audio objects in order to provide group results. Further, there is a combiner configured to combine the group results or processed group results in order to provide a decoded audio signal. The invention also refers to a corresponding method. |
| US11004451B2 |
System for processing sound data and method of controlling system
A system, a user terminal, a method of the system, a method of the user terminal, and a computer program product are provided. The system includes a communication interface, at least one processor operatively coupled to the communication interface, and at least one piece of memory operatively coupled to the at least one processor, wherein the at least one piece of memory is configured to store instructions configured for the at least one processor to receive sound data from a first external device through the communication interface, obtain a voice signal and a noise signal from the sound data using at least some of an automatic voice recognition module, change the voice signal into text data, determine a noise pattern based on at least some of the noise signal, and determine a domain using the text data and the noise pattern when the memory operates. |
| US11004450B2 |
Dialogue system and dialogue processing method
A dialogue system for a vehicle may include: an input processor configured to receive a dialogue among occupants of the vehicle including a driver and at least one passenger, to detect vehicle operation information, to identify the at least one passenger based on the dialogue among the occupants or the vehicle operation information, to generate passenger number information which estimates a change in a number of passengers in the vehicle based on the dialogue among the occupants when the vehicle arrives at a stop-over point, and to acquire a pre-utterance message according to the passenger number information; and a result processor configured to output a pre-utterance according to the pre-utterance message. |
| US11004449B2 |
Vocal utterance based item inventory actions
Methods, computer program products, and systems are presented. The method computer program products, and systems can include, for instance: obtaining vocal utterance data representing vocal utterances of multiple users within a venue; processing the vocal utterance data to return metadata associated to the vocal utterance data; predicting using the metadata an item for acquisition by one or more user of the multiple users; and returning an action decision in dependence on the predicting. |
| US11004448B2 |
Method and device for recognizing text segmentation position
The present disclosure provides a method and a device for recognizing a text segmentation position. The method includes: receiving a continuous voice message inputted by a user, and recognizing the continuous voice message to generate a text message corresponding to the continuous voice message; analyzing the text message to determine an interval position, and sequentially inserting a sentence end and sentence begin sign at each interval position; calculating a segmentation value corresponding to the sentence end and sentence begin sign inserted at a present interval position according to a preset algorithm; and determining whether the segmentation value is greater than a preset threshold, and determining the present interval position as a segmentation position when the segmentation value is greater than the preset threshold. |
| US11004446B2 |
Alias resolving intelligent assistant computing device
Intelligent assistant systems, methods and computing devices are disclosed for resolving alias identifiers. A method comprises receiving and parsing data comprising a current user input that includes an alias identifier. The data and/or other sensor data are analyzed to identify the user. Based at least on identifying the user and recognizing the alias identifier, usage pattern data comprising at least one previous user input that includes the alias identifier and corresponding context information is accessed. The usage pattern data is used to resolve the alias identifier to mean the alias identifier in an alias record of a known entity. Based at least on resolving the alias identifier, an output device is controlled to one or more of generate a message and perform an action with respect to the known entity. |
| US11004441B2 |
Speech endpointing based on word comparisons
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for speech endpointing based on word comparisons are described. In one aspect, a method includes the actions of obtaining a transcription of an utterance. The actions further include determining, as a first value, a quantity of text samples in a collection of text samples that (i) include terms that match the transcription, and (ii) do not include any additional terms. The actions further include determining, as a second value, a quantity of text samples in the collection of text samples that (i) include terms that match the transcription, and (ii) include one or more additional terms. The actions further include classifying the utterance as a likely incomplete utterance or not a likely incomplete utterance based at least on comparing the first value and the second value. |
| US11004435B2 |
Real-time integration and review of dance performances streamed from remote locations
Systems and methods are provided for assembling and displaying a visual ensemble of musical performances that were created and uploaded from one or more locations that are remote from a host of the network, a director or other administrator reviewing submissions for selection and assembly, or perhaps merely remote from one or more other submissions received over a computer network. The assembled performances include a plurality of submissions, the submissions including performances created and uploaded at one or more locations remote from the location of the director for the assembly and display over the computer network. Systems and methods are also included for mapping one performance against another performance qualitatively, quantitatively, in real-time, or some combination thereof, enabling a musician, or a reviewer of performances, in the assessment of one performance relative to another performance. |
| US11004434B2 |
Systems and methods for visual image audio composition based on user input
The present invention relates to systems and methods for visual image audio composition. In particular, the present invention provides systems and methods for audio composition from a diversity of visual images and user determined sound database sources. |
| US11004433B1 |
Tilting stands for musical instruments and their accessories
A load-bearing support for an object includes a sleeve, a bushing lodged in the bore of the sleeve, a bent shaft having a portion that extends through the bushing and a portion that is coupled to an undercarriage, and a tensioning device for pulling the shaft against the bushing. The bushing is notched at a desired location so that, when the support is attached to the object and the shaft is lodged in the notch, an angle is formed between the shaft and a principally vertical axis of the object to thereby support the weight of the object via a force reactive to compression of the shaft. The location of the notch may be adjusted to accommodate a variety of supported objects by rotating the bearing within the bore of the sleeve, and an exterior surface of the sleeve may be marked to permit precise rotation. |
| US11004432B1 |
Drum stand coupler and drum using the same
A drum stand coupler is provided, including: a fixing mechanism and a connecting mechanism. The fixing mechanism is configured to be disposed on a drum body. The connecting mechanism is rotatably connected with the fixing mechanism and configured to be assembled with a stand. A drum using the drum stand coupler as described above is further provided, further including: the drum body. An interconnection of the fixing mechanism and the connecting mechanism defines a rotating axis about which the connecting mechanism is rotatable, and the rotating axis is transverse to an axial direction of the drum body. |
| US11004428B2 |
Electronic device and method of partially updating screen using same
Disclosed is an electronic device that includes a display, a memory, and a processor configured to combine a plurality of images based on an execution of a plurality of applications so that the plurality of images is displayed in a single screen form, identify coordinate information of a display area of each of a first image and a second image on the screen based on the first image and second image belonging to the plurality of images and being updated, store the first image and the second image in a contiguous address of the memory, and transmit the coordinate information of the display area of each of the first image and the second image and the stored first image and second image to the display. |
| US11004407B2 |
Multiview backlight, display, and method employing active emitters
A multiview backlight and a multiview display employ active emitters configured to provide a plurality of light beams having different principal angular directions corresponding to different view directions of the multiview display. A size of the active emitter is comparable to a size of a view pixel in the multiview display. A distance between active emitters is commensurate with a distance between adjacent multiview pixels of the multiview display. A multiview display further includes an array of light valves configured to modulate the directional light beams to display a multiview image. |
| US11004406B1 |
Dual liquid crystal display device
A dual LCD device includes a gray LCD, a color LCD stacked on the gray LCD, a backlight assembly disposed at the rear of the gray LCD, and a controller. The controller is configured to receive an input image data and then respectively output a gray cell pixel data and a color cell pixel data to the gray LCD and the color LCD based on a dual cell dimming algorithm. The dual cell dimming algorithm is configured to alleviate a moiré effect caused by light interference between the gray LCD and the color LCD. The dual cell dimming algorithm includes: calculating an initial gray cell pixel data based on the input image data; calculating the gray cell pixel data by spatially blurring the initial gray cell pixel data; and calculating the color cell pixel data by compensating the gray cell pixel data. |
| US11004402B2 |
Integrated circuit for operating display panel
An embodiment provides a technology relating to data transmission or reception in a display panel. In the embodiment, a plurality of integrated circuits sharing a data line may transmit an indication signal through signal lines connected 1:1 to the circuits, and transmit data through the data line in response to the indication signal. |
| US11004400B2 |
Display device compensating for horizontal crosstalk
A display device includes a display panel including a plurality of pixels, a gray group data generator configured to receive current line data for pixels in a current row, and to generate current row gray group data based on the current line data, a horizontal crosstalk determiner configured to determine whether horizontal crosstalk occurs in the current row, a horizontal crosstalk compensator configured to compare the current row gray group data with adjacent row gray group data when the horizontal crosstalk is determined to occur in the current row, and to selectively adjust a plurality of gamma reference voltages according to a result of the comparison between the current row gray group data and the adjacent row gray group data, and a data driver configured to generate and provide data voltages corresponding to the current line data based on the selectively adjusted plurality of gamma reference voltages. |
| US11004399B2 |
Display apparatus and driving method thereof
A display apparatus can include a display panel configured to display images; a scan driver configured to supply scan signals to the display panel; a data driver configured to supply data voltages to the display panel; a timing controller configured to control the scan driver and the data driver; and a device controller configured to in response to receiving a frequency change signal, change a driving frequency of a device from a first frequency to a second frequency higher than the first frequency or change the driving frequency of the device from the second frequency to the first frequency, while maintaining widths of driving signals of the scan driver before and after the driving frequency is changed, in which the device includes at least one of the scan driver or the data driver. |
| US11004398B2 |
Electronic device
An electronic device includes a power source unit and an electronic unit. The electronic unit includes a first switch, a light-emitting unit, and a plurality of pulse switches. The first switch is coupled to the power source unit, and the first switch has a gate electrode. The light-emitting unit is coupled to the first switch. The plurality of pulse switches are coupled to the gate electrode of the first switch. Therefore, the brightness of the light-emitting unit may be effectively controlled to improve the quality of the electronic device. |
| US11004397B2 |
Display device and method for driving same
Provided is a pixel circuit including: an electro-optical element, a driving transistor; a writing control transistor whose first conduction terminal is connected to a data line and whose control terminal is connected to a scanning line; and an initialization transistor whose first conduction terminal is connected to a control terminal of the driving transistor, to whose second conduction terminal an initialization voltage is applied, and whose control terminal is connected to a first control line. In a case of a P-channel transistor, a high-level voltage to be given to the control terminal of the initialization transistor is lower than a high-level voltage to be given to the control terminal of the writing control transistor. |
| US11004395B2 |
Display device
A display device includes a base layer, first pixels, second pixels, a power supply line (PSL), a power supply voltage supply circuit (PSVSC), and a feedback wire (FBW). The base layer includes a display area (DA) and a non-display area (NDA) adjacent to the DA. The DA includes a first pixel area (PA) including first pixels and a second PA including second pixels. The second PA protrudes from the first PA. The PSL extends in at least a first direction in the DA. The PSL receives a first power supply voltage (PSV) through a first end of the PSL, and supplies the first PSV to the first and second pixels. The PSVSC supplies the first PSV to the PSL through the first end. The FBW is electrically connected to a second end of the PSL disposed in the second PA. The FBW feeds back the first PSV to the PSVSC. |
| US11004391B2 |
Image data compensation based on predicted changes in threshold voltage of pixel transistors
An electronic device includes an electronic display having an active area comprising a pixel. The electronic device also includes processing circuitry configured to receive image data and predict a change in threshold voltage associated with a transistor of the pixel based at least in part on the image data. Furthermore, the processing circuitry is configured to adjust the image data to generate adjusted image data based at least in part on the predicted change in threshold voltage. |
| US11004386B2 |
Methods for calibrating correlation between voltage and grayscale value of display panels
Method and system for calibrating a plurality of voltages of a light-emitting element and a plurality of grayscale values of a respective pixel of the light-emitting element on a display panel are provided. The method may include determining a mapping correlation between the plurality of voltages of the light-emitting element and a plurality of luminance values of the light-emitting element, determining N grayscale values of the pixel, and determining N first luminance values each corresponding to the respective one of the N grayscale values. The method may also include determining N first voltages mapped to the N first luminance values using the mapping correlation and determining, of each one of the N first luminance values, (M−1) second luminance values. Each one of the (M−1) second luminance values may correspond to a different dimmed luminance value of the respective first luminance value. |
| US11004382B2 |
Backlight source and manufacture method thereof, display device
A backlight source and a manufacture method thereof, a display device are provided. The backlight source includes a base substrate, the base substrate is divided into a plurality of light emitting regions, and at least one of the plurality of light emitting regions comprises a plurality of light emitting elements, a first common polar line, and a second common polar line. Light emitting brightness of at least one of the light emitting regions is adjustable independently. |
| US11004381B2 |
Array substrate comprising an antenna, driving method and display device
The present disclosure provides an array substrate and a display device for reducing the space occupied by the antenna inside the mobile phone, so as to reduce the thickness of the mobile phone and make the mobile phone thinner and lighter. The array substrate according to the present disclosure includes dummy signal lines and a conductive portion. The dummy signal lines and the conductive portion are disposed in different layers. An insulating layer is disposed between the dummy signal lines and the conductive portion. A via is disposed on the insulating layer. The dummy signal line is connected to the conductive portion through the via. The dummy signal line and the conductive portion are used to form an antenna. |
| US11004377B2 |
Non-rectangular display device with simplified scanning line load adjustment for improved luminance
A display device is disclosed including a display area having a non-rectangular shape, in which a first area and a second area are joined. The second area is smaller than the first area in a first direction, and the second area is adjacent to the first area in a second direction orthogonal to the first direction. A non-display area is adjacent to the second area in the first direction and adjacent to the first area in the second direction. A plurality of pixel circuits is arranged in the display area in the first direction and the second direction, avoiding the non-display area. A plurality of first control lines and second control lines are grouped into control line assemblies arranged such that control line assemblies of different types belonging to each of the plurality of groups are adjacent to each other, in order to simplify load adjustment. |
| US11004371B2 |
Display device and method for inspection thereof
A display device includes a display area configured to include a plurality of pixels and a plurality of data lines connected to the pixels. A hole area is disposed within the display area. A hole crack detection line is disposed adjacent to the hole area and surrounds the hole area. The device includes first and second detection lines which include first and second detection transfer lines and first and second detection receiving lines, respectively. A test controller electrically connects the first detection receiving line to a first data line and the second detection receiving line to a second data line. Pixels connected to the first data line that is connected to a first bright-line transistor and pixels connected to the second data line that is connected to a second bright-line transistor are configured to emit light when a crack occurs in the hole crack detection line. |
| US11004367B2 |
Hanger for mounting cables
A cable hanger includes: a base panel having opposed ends; a pair of arms, each of the arms attached to a respective end of the base panel and having a free end; a pair of locking projections, each of the locking projections attached to a respective free end of the arms; and a pair of gripping members, each gripping member attached to a respective arm, each gripping member having opposed ends, wherein one of the ends of each gripping member is fixed to the arms and the other of the ends of each gripping member is fixed to the arm or to the base panel. The arms and locking projections are configured to spread apart to enable insertion of a cable between the arms, wherein the gripping projections engage and grip the cable, and wherein the locking projections are configured to be inserted into the aperture of the supporting structure. |
| US11004366B2 |
Illumination display platforms and related methods
An illumination display platform is provided. The platform includes an illumination source, like an LED strip, that provides lighting effects in connection with an art element and a panel system when the art element and panel system are in electrical and magnetic communication with one another. The illumination display platform permits tool-free assembly and disassembly. |
| US11004364B2 |
Supporting structure for flexible screen, flexible screen structure and terminal device
A supporting structure includes: a first supporting module located below the flexible screen and used for supporting the flexible screen, which has a first opening; and a second supporting module, which is located at a position corresponding to the first opening, when an external force acts through the flexible screen, the second supporting module forms a deformation protrusion towards a direction away from the flexible screen; and when the external force is removed, the deformation of the second supporting module is removed. Supporting the flexible screen corresponding to the first opening by the second supporting module can reduce a probability that the flexible screen collapses at the position of the first opening, thereby making appearance of the flexible screen flat. |
| US11004360B2 |
Data security apparatus with analog component
A data security apparatus includes an analog component. The analog component operates internally with a high degree of entropy. This high degree of entropy resides in the interactions between its internal components in response to an external driving signal. The interactions within the analog component have a level of entropy that is high enough to make digital simulation of the analog component impractical. Because the analog component is impractical to digitally simulate it is referred to as being digitally unclonable. The data security apparatus processes data by encrypting plaintext data into ciphertext and/or decrypting data from ciphertext into plaintext. Part of the conversion between plaintext and ciphertext uses the analog component. Since the analog component is digitally unclonable (that is, impractical to digitally simulate), the part of the conversion process that uses the analog component requires possession of the analog component itself or the possession of another analog component that has the same signature. |
| US11004359B2 |
Defibrillation training system
A defibrillation training system, enabling the use of a live defibrillation unit (2), comprising a module (3) and a cable (1) interconnecting said module (3) and said defibrillation unit (2). The cable (1) being a resistance cable that has an impedance that simulates patent impedance and absorbs electric shock pulses made by said defibrillator unit (2). |
| US11004358B2 |
Visual and kinesthetic method and educational kit for solving algebraic linear equations involving an unknown variable
An educational kit for teaching mathematics includes easily manipulated elements, which serve as cognitive reinforcement during the learning process. These physical elements are used in conjunction with a set of grouping rules. The educational kit and corresponding grouping rules determine a model and process to represent both an algebraic linear equation and its algebraic solution. A simple element, such as an item/figure including a variable “X”, is used to denote the unknown quantity. An item/figure including a number is used to represent a numerical value. These items/figures contain the exact elements used to form the expressions of the linear equation and are not items/figures that simulate the elements that form the expressions of the equation. By the use of this educational kit and associated grouping, students learn to simplify a given linear algebraic equation to the point where the solution is obvious. |
| US11004357B2 |
Pre-license development tool
Methods, computer-readable media, software, and apparatuses provide a tool for use by drivers and/or coaches throughout the pre-license stage of obtaining a driver's license. A pre-license program may control a computing device to collect drive data while a driver is driving a vehicle. This drive data may be used to detect a drive event. Then, the computing device may present coaching information associated with the detected drive event. The coaching information may provide a passenger, such as a coach or parent, with real-time advice for instructing the driver how to improve his/her driving skills. Moreover, the drive data collected may be used to prepare reports providing feedback to the drivers and coaches. |
| US11004352B2 |
Portable and toolless mission reconfigurable trainer
A system and method are that includes a frame and a weapon mount on the frame that receives a weapon mock-up. The method includes setting up a trainer simulator including opening a transportable shipping container, wherein the transportable shipping container includes a coupled integrated common base frame and a universal mount tower. The method includes assembling a seat and pivoting the universal mount tower from a horizontal position to a vertical position wherein the universal mount tower auto-locks into position. The method includes delivering ground vehicle based weapon system training to a user using a continuum of human interface fidelities that includes a first, second and third fidelity, wherein the user is first delivered training at a first fidelity, and then at a second fidelity and then at a third fidelity. A system for a mission reconfigurable trainer simulation is also presented. |
| US11004345B2 |
Systems and methods for generating and monitoring flight routes and buffer zones for unmanned aerial vehicles
In some embodiments, methods and systems are provided that provide for creating and monitoring predefined mission routes along air rails and non-overlapping buffer zones surrounding unmanned vehicles during travel of the unmanned vehicles along the predefined mission routes. The buffer zone may be thought of as a projected movement variation area being associated by the system to the UAV and containing four dimensions, the three positional dimensions, X, Y, and Z, along with a temporal one, time. Generally, the buffer zone will change as ambient conditions, location, and orientation of an unmanned vehicle change during travel of the unmanned vehicle along its predefined mission route. |
| US11004344B2 |
Method for vehicle identification
A method is provided for vehicle identification, which method includes the steps of: an ego vehicle detecting a communicating vehicle by wireless vehicle to vehicle communication; the ego vehicle detecting a nearby vehicle by a sensor onboard the ego vehicle; the ego vehicle sending an identification request to the communicating vehicle by wireless vehicle to vehicle communication, wherein the identification request instructs the communicating vehicle to perform an action; the ego vehicle determining whether or not the nearby vehicle performed the action based at least on data from the sensor; and if the ego vehicle determines that the nearby vehicle performed the action, the ego vehicle determining that the communicating vehicle and the nearby vehicle are the same vehicle. |
| US11004340B2 |
Method for operating a control device of a motor vehicle
A method for operating a control device of a motor vehicle driving by automation. The method includes determining a location of the motor vehicle, and acquiring driving-environment data of the motor vehicle, a control characteristic of the control device of the motor vehicle being formed in such a way that a driving behavior of at least one other road user is influenced in defined manner. |
| US11004333B2 |
Detecting influential factors for traffic congestion
A method, computer system, and a computer program product for detecting a plurality of influential factors for traffic congestion is provided. The present invention may include identifying one or more influential roads and one or more influential routings associated with an object road in a target road network. The present invention may also include quantifying an impact associated with the identified one or more influential roads and the identified one or more influential routings associated with the object road, wherein at least one Impact Matrix is utilized to determine a road-by-road influence in connection to the target road network. |
| US11004327B2 |
Composing and transmitting customized alert messages to responders
Systems and methods for directing an alert to responders are provided. Upon activation of an alert application on a user device, an options screen is displayed to a user. The user can select a report option, and a screen is displayed for the user to enter information into one or more required and optional fields regarding a threat or a risk event. Once the system determines that the required fields have been filled, the system automatically composes a customized alert message based on the received information, automatically determines appropriate responders to notify. The customized alert message is transmitted to the determined responders, and acknowledgement messages are received from the responders. |
| US11004325B2 |
Smartphone based reminding system for forgotten objects
A peripheral device, e.g. a smart phone, receives information defining a secured area perimeter of a secure area and a global positioning system (GPS) about the location of a user. The process compares the security perimeter to the position information to determine whether a user is within the secured area. If the user is outside the secured area and has not returned an access device, e.g. a badge, a temporary pass, etc., the peripheral device posts an alert to the user, e.g. a warning the user may have forgotten to return the access device/badge. Alerts can be posted or sent for other conditions as well. |
| US11004316B2 |
Systems and methods for responding to an abnormal event in a region monitored by a security system
Systems and methods for responding to an abnormal event in a region monitored by a security system are provided. Such systems and methods can include a cloud server periodically receiving a heartbeat signal from the security system, the cloud server receiving a notification signal of an occurrence of the abnormal event in the region, and responsive to failing to receive the heartbeat signal after receiving the notification signal of the occurrence of the abnormal event, the cloud server transmitting an alarm to a central monitoring station. |
| US11004314B2 |
Paging system and method using wireless communication
A paging system comprise paging buttons configured to transmit a first signal including a paging request; a server configured to: receive the first signal, identify which of the paging buttons transmit the first signal received by the server, and transmit to at least one portable device a second signal including information on an identifier corresponding to the identified paging button that transmits the first signal, and the paging request; and at least one portable device configured to: display the identifier corresponding to the identified paging button and/or the paging request based on the second signal, and transmit to the server a third signal in response to an acceptance input responded to the paging request. The server transmits to at least one portable device a fourth signal confirming that the portable device transmitting the third signal is matched to the identified paging button in response to the third signal. |
| US11004311B2 |
Systems and methods for providing electronic gaming pieces
Systems and methods are provided for providing playing cards. An exemplary method may include retrieving data related to a selection of a set of numbers for bingo and determining matching bingo patterns on a predetermined number of cards from a library of bingo cards against the set of selected numbers. The method may further include selecting corresponding playing cards based on the matching bingo patterns on the predetermined number of cards and providing the corresponding playing cards for display. The exemplary method may be used to deal playing cards for poker using a set of selected numbers. |
| US11004309B2 |
Information processor
The information processor executes the processes of: (a) setting a winning probability of second random determination based on a winning probability corresponding to a condition set by a setting unit which sets one of conditions associated with different winning probabilities; (b) determining whether to execute the first random determination by the second random determination based on the winning probability set in the process (a); (c) when a win is achieved in the second random determination in the process (b), executing the first random determination; and (d) when a result of the first random determination in the process (c) is different from a predetermined result, executing the first random determination again. |
| US11004304B2 |
Adaptive mobile device gaming system
Embodiments disclosed herein concern mobile gaming environments. Portable electronic devices can be supported by the mobile gaming environments. The locations of the portable electronic device can influence how the portable electronic devices operate or what services or features are available to the portable electronic device or their users. According to one embodiment, a mobile gaming system can concern gaming/betting opportunities that can be secured using a portable electronic device even when an individual is located in a location where betting or games of chance are not permitted. According to another embodiment, a mobile gaming system can concern an application program operating on a portable electronic device that supports multiple modes of operation depending upon whether the portable electronic device is in a location where betting or games of chance are permitted. |
| US11004303B2 |
Gaming terminal management
Methods, apparatuses, and computer-readable media for enabling monitoring and managing aspects of gaming terminals and related game plays. One method of monitoring a gaming terminal comprises steps of receiving, by a companion board communicatively coupled to a gaming board of the gaming terminal, data regarding various aspects of game play at the gaming terminal; transmitting, by the companion board, the data to a communication board utilizing a first protocol; and transmitting, by the communication board, the data from the communication board to a monitoring system utilizing a second protocol. |
| US11004297B2 |
Vending machine for retaining and dispensing products
An apparatus for dispensing a product a hygiene product. The apparatus includes a housing for retaining a plurality of products wherein the housing includes a storage rack configured to hold the plurality of products. A weight is movably positioned within the storage rack and is configured to exert a downward force on the plurality of products. A sensor is positioned adjacent to a bottom end of the storage rack. A magnet is affixed to the weight wherein the magnet is configured to substantially align with the sensor once the plurality of products have been completely dispensed from the storage rack. |
| US11004292B2 |
Optical character recognition of voter selections for cast vote records
An electronic voting system is described that utilizes printed vote records (PVRs) in which a voter's vote selections are recorded in voter readable characters. Optical character recognition (OCR) techniques may then be utilized to scan the PVR to record the voter's selections. The OCR data is then utilized to generate the cast vote record. Thus, the electronic voting system directly interprets the voter selections from the PVR just as the voter sees the data. In this manner “what you see is what you get” printed vote record data is provided for a voter's viewing and that same data is used to generate the cast vote record. |
| US11004285B2 |
Processing device, processing method, and program
A processing device includes a control unit configured to perform: identifying a user when the user enters a vehicle and performing a process of guaranteeing a boarded state of the user while the user is in the vehicle; receiving information on a predetermined procedure for performing an authentication process from the user; and transmitting user information which is required for performing the predetermined procedure as information on the user of whom the boarded state in the vehicle is guaranteed to an external device that is installed at a first place for the predetermined procedure in a state in which the boarded state of the user is guaranteed. |
| US11004284B2 |
Smart home system, method, and computer program
A smart home system is provided. In operation, a user input of a guest at a location is detected, and calendar information is received from a calendar application. In response to detecting the user input, an identity of a guest is determined. Utilizing the identify of the guest, it is determined that the guest is expected for a calendared event at the location by reviewing the calendar information from the calendar application. Utilizing the determined identity of the guest and the determination that the guest is expected for the calendared event at the location, a visual notification is outputted, and an audible notification is outputted. |
| US11004283B1 |
Temperature detection device
Described herein is a temperature device, including systems and methods associated therewith. The temperature device may include a housing. The temperature device may further include an actuation feature associated with the housing and configured to receive a user input. The temperature device may further include a sensing feature recessed within the housing and configured to detect a temperature condition in response to a receipt of the user input. The temperature device may further include a communication module operatively connected to the sensing feature and configured to transmit and receive information associated with a detection of the temperature condition. |
| US11004280B1 |
Determining corrective actions based upon broadcast of telematics data originating from another vehicle
A mobile device configured to receive telematics data from another vehicle when the mobile device is traveling in a moving vehicle and take corrective action when a travel event exists may be provided. The mobile device may receive telematics data associated with an originating vehicle, analyze the telematics data, and determine or identify that a travel event associated with the originating vehicle exists and, when the travel event is determined to exist, determine whether the travel event is relevant to the moving vehicle or a route that the moving vehicle is presently traveling, and if so, direct corrective action such that safer vehicle travel for the moving vehicle is facilitated based upon the telematics data that is collected by the originating vehicle. An insurance provider may collect an insured's usage of the vehicle safety functionality to calculate, update, and/or adjust insurance premiums, rates, discounts, points, or programs. |
| US11004276B2 |
Method and system for marking consignment units
The invention relates to a method for marking a consignment unit in a logistics process. The invention furthermore relates to a system for marking a consignment unit in a logistics process. The method according to the invention for marking a consignment unit in a logistics process contains the steps of initially creating a first image of the surface of a consignment unit in order to then link this image to an identification number and store the image and the identification number on a data processing unit. |
| US11004275B2 |
Product evaluation result display system
Provided is a product evaluation result display system. At least a part of a product image representing a three-dimensional shape of a product that is configured by assembly of a plurality of parts is output to an output interface. When an evaluation point of the product is designated by a user through the input interface, in association with a designated part having a relatively high contribution degree with respect to the position precision of the evaluation point on the basis of a reference shape of the product, a contribution degree index image representing the contribution degree is output to the output interface. Therefore, within the plurality of parts constituting the product, the designated part having a relatively high contribution degree with respect to the position precision of the evaluation point designated by the user can be easily recognized by the user. |
| US11004274B2 |
Energy management apparatus and operating method thereof
An energy management apparatus according to an embodiment of the present invention is designed to provide a method for visually displaying an energy operation status in various manners so as to facilitate energy analysis, and may comprise: a measurement unit for acquiring power state information of at least one energy apparatus constituting a system to which the energy management apparatus belongs; a control unit for analyzing an energy operation status on the basis of the acquired power state information; and a display unit for displaying the analyzed energy operation status in the form of a three-dimensional energy graph, wherein each of the X-, Y-, and Z-axes of the three-dimensional energy graph is mapped to one of time, an energy apparatus, and an object of energy analysis. |
| US11004273B2 |
Information processing device and information processing method
An information processing device that includes a display control unit to perform display control such that a first virtual object corresponding to content is contained in a rendering image of the content when a position of the content defined in a virtual space and a position of a viewpoint defined in the virtual space have a first positional relation, and a second virtual object corresponding to the content is contained in the rendering image when the position of the content and the position of the viewpoint have a second positional relation. A distance between the position of the content and the position of the viewpoint in the second positional relation is shorter than a distance between the position of the content and the position of the viewpoint in the first positional relation, and visibility of the second virtual object is lower than visibility of the first virtual object. |
| US11004269B2 |
Blending virtual environments with situated physical reality
Various embodiments are provided herein for tracking a user's physical environment, to facilitate on-the-fly blending of a virtual environment with detected aspects of the physical environment. Embodiments can be employed to facilitate virtual roaming by compositing virtual representations of detected physical objects into virtual environments. A computing device coupled to a HMD can select portions of a depth map generated based on the user's physical environment, to generate virtual objects that correspond to the selected portions. The computing device can composite the generated virtual objects into an existing virtual environment, such that the user can traverse the virtual environment while remaining aware of their physical environment. Among other things, the computing device can employ various blending techniques for compositing, and further provide image pass-through techniques for selective viewing of the physical environment while remaining fully-immersed in virtual reality. |
| US11004263B1 |
System and method for reading arrays of data by rebuilding an index buffer while preserving order
Disclosed herein are systems and methods for reading input data into a geometry shader by rebuilding an index buffer. In one aspect, an exemplary method comprises constructing T-vectors for one-element ranges of the index buffer by defining each T-vector as a 4-component vector, calculating T-vectors for ranges [0; i] for all vertices of the index buffer by prefix scanning, for each vertex and for each primitive featuring the vertex, determining if the primitive is complete, and for each complete primitive, calculating an offset in an output index buffer using a component of the T-vector used to indicate, for the vertex, a number of complete primitives inside the range and a component that indicates a number of vertices since a last primitive restart, and writing an index value in an output index buffer, and reading input data into the geometry shader in accordance with the written index values. |
| US11004262B2 |
Semantic structure from motion for orchard reconstruction
A method includes constructing a three-dimensional model of a front side of a row of trees based on a plurality of images of the front side of the row of trees and constructing a three-dimensional model of a back side of the row of trees based on a plurality of images of the back side of the row of trees. The three-dimensional model of the front side of the row of trees is merged with the three-dimensional model of the back side of the row of trees by linking a trunk in the three-dimensional model of the front side to a trunk in the three-dimensional model of the back side to form a merged three-dimensional model of the row of trees. The merged three-dimensional model of the row of trees is used to determine a physical attribute of the row of trees. |
| US11004261B2 |
Method, device, computer system, and mobile apparatus for generating three-dimensional point cloud
A method of generating a three-dimensional point cloud includes obtaining a plurality of image data sources through a plurality of sensors, and performing fusion processing according to the plurality of image data sources to obtain the three-dimensional point cloud. |
| US11004260B2 |
Item model based on descriptor and images
A model generation machine may form all or part of a network-based system. The model generation machine may generate an item model (e.g., a 3D model of the item) based on a set of images of an item and based on a product model (e.g., a 3D model of a product of which the item is a specimen). The item may be available for purchase from a seller. The model generation machine may access the set of images, as well as a descriptor of the item. Based on the descriptor, the model generation machine may identify the product model. Accordingly, the model generation machine may generate the item model from the identified product model and the accessed set of images. |
| US11004259B2 |
Estimating dimensions of geo-referenced ground level imagery using orthogonal imagery
A system and method is provided for measurements of building façade elements by combining ground-level (201) and orthogonal imagery (906). The measurements of the dimension of building façade elements are based on ground-level imagery that is scaled and geo-referenced using orthogonal imagery (209). The method continues by creating a tabular dataset (1002) of measurements for one or more architectural elements such as siding (e.g., aluminum, vinyl, wood, brick and/or paint), windows or doors. The tabular dataset can be part of an estimate report (1002). |
| US11004257B1 |
Method and apparatus for image conversion
A method and apparatus for image conversion according to an embodiment of the present disclosure includes receiving original image data, separating the original image data into a front view image and a back view image for performing 3D conversion processing of the original image data, and generating a converted 3D image by restoring a background space between the front view image and the back view image using a 3D conversion processing neural network. The 3D conversion processing neural network according to the present disclosure may be a deep neural network generated by machine learning, and input and output of images may be performed in an Internet of things environment using a 5G network. |
| US11004255B2 |
Efficient rendering of high-density meshes
Examples are disclosed that relate to culling of polygons for efficient rendering of a high-density polygon mesh using one or more compute shaders. Examples include monoscopic and stereoscopic rendering, foveated and non-foveated rendering, and selectively utilizing one or more computer shaders to rasterize very small triangles instead of using a regular rendering pipeline for increased performance. |
| US11004251B2 |
Automatic configuration of knobs to optimize performance of a graphics pipeline
A knob has a plurality of settings that configure a graphics pipeline. A first setting is associated with a first state of the graphics pipeline. The first setting is associated with the first state based on a measure of performance of the graphics pipeline while configured according to the first setting. The graphics pipeline is configured according to the first setting in response to the first state of the graphics pipeline matching a current state of the graphics pipeline. The graphics pipeline processes graphics according to the first setting. In some cases, the first setting is associated with the first state of the graphics pipeline by dithering or toggling the knob between the settings once per frame for a predetermined number of frames. The first setting achieves better performance than other ones of the plurality of settings during the predetermined number of frames. |
| US11004249B2 |
Hand drawn animation motion paths
Techniques are provided for hand drawing an animation motion path for an object to follow on a graphical user interface (GUI). The motion path may be drawn with a user's finger or drawing device, such as an Apple Pencil®, by selecting a drawing tool (e.g., a freehand tool and/or straight line tool). A new motion path may be added to an existing motion path, such that the new motion path is an extension of the existing motion path. The new motion path may also be added to an end point of an existing motion path, such that the new motion path is a different segment of a motion path and is associated with a new key frame. A motion path segment may be split into additional segments with new key frames, reshaped using editing points, redrawn, and/or deleted from the overall motion path. In some embodiments, the actions applied to the object (e.g., motion path) may be indicated by an associated tray that provides editable context-specific properties related to the action. |
| US11004246B1 |
Jewelry generation services
Systems, methods, and computer-readable media for a jewelry generation service are provided. |
| US11004244B2 |
Time-series analysis system
Various systems and methods are provided that display various graphs in an interactive user interface in substantially real-time in response to input from a user in order to determine information related to measured data points and provide the determined information to the user in the interactive user interface. For example, a computing device may be configured to retrieve data from one or more databases and generate one or more interactive user interfaces. The one or more interactive user interfaces may display the retrieved data in one or more graphs, such as time-series or scatterplots. The user interface may be interactive in that a user may manipulate one graph, which causes an identical or nearly identical manipulation of another displayed graph in real-time. The manipulations may occur even if the displayed graphs include data across different time ranges. |
| US11004243B2 |
CT reconstruction method using filtered back projection
Projection images of reduced resolution are generated by reducing resolution of filtered projection images and/or reducing the number of filtered projection images. Volume data of reduced resolution is generated by performing CT reconstruction using the projection images of reduced resolution. Each voxel of the volume data of reduced resolution is provisionally divided. The provisionally divided voxels are compared in voxel value before and after provisional division. If a difference in voxel value before and after the provisional division is greater than a threshold, the provisional division is determined to be valid, and division is further continued. If the difference in voxel value before and after the provisional division is less than or equal to the threshold, the provisional division is determined to be invalid and the voxel ends being divided. |
| US11004239B2 |
Image retrieval device and method, photograph time estimation device and method, repetitive structure extraction device and method, and program
A repetitive structure extraction device includes an image feature extraction unit which extracts an image feature for each of a plurality of images which are captured at one or a plurality of locations and which are given different capture times, a temporal feature extraction unit which extracts, for each of the plurality of images, a temporal feature according to a predetermined period from a capture time given to the image, and a repetitive structure extraction unit which learns, on the basis of the image feature extracted for each of the plurality of images by the image feature extraction unit and the temporal feature extracted for each of the plurality of images by the temporal feature extraction unit, a repetitive structure which is used to perform interconversion between the temporal feature and a component of the image feature and which is provided according to a correlation of periodic change between the component of the image feature and the temporal feature. |
| US11004237B2 |
Palette coding for color compression of point clouds
A method of compression of the color data of point clouds is described herein. A palette of colors that best represent the colors existing in the cloud is generated. Clustering is utilized for generating the palette. Once the palette is generated, an index to the palette is found for each point in the cloud. The indexes are coded using an entropy coder afterwards. A decoding process is then able to be used to reconstruct the point clouds. |
| US11004236B2 |
Object localization framework for unannotated image data
A system is provided for object localization in image data. The system includes an object localization framework comprising a plurality of object localization processes. The system is configured to receive an image comprising unannotated image data having at least one object in the image, access a first object localization process of the plurality of object localization processes, determine first bounding box information for the image using the first object localization process, wherein the first bounding box information comprises at least one first bounding box annotating at least a first portion of the at least one object in the image, and receive first feedback regarding the first bounding box information determined by the first object localization process. The system is further configured to persist the image with the first bounding box information or access a second object localization process based on the first feedback. |
| US11004235B2 |
Method and apparatus for determining position and orientation of bucket of excavator
Embodiments of the present disclosure provide a method and apparatus for determining position and orientation of a bucket of an excavator, an electronic device and a computer readable medium. The method may include: acquiring an image of a bucket of an excavator collected by a camera provided on an excavator body, the image of the bucket including a preset marker provided on the bucket; determining position and orientation information of the camera relative to the bucket on the basis of the image of the bucket and pre-acquired three-dimensional feature information of the preset marker; and converting the position and orientation information of the camera relative to the bucket into position and orientation information of the bucket relative to the excavator body. |
| US11004233B1 |
Intelligent vision-based detection and ranging system and method
An intelligent vision-based detection and ranging (iVidar) system consists of at least four cameras to form at least two stereo vision systems. The first pair of two cameras forms a first stereo vision system with a field of view A1 and has a baseline B1. The second pair of two cameras forms a second stereo vision system with a field of view A2 and has a baseline B2. Where B2 is greater than B1 and A2 is smaller than A1. One of the preferred configurations for the current invention is to mount the second stereo vision system field of view A2 to cover a perspective vanishing point in the along-track direction. |
| US11004231B2 |
Method for determining a real position of a trailer tow ball of a tow hitch of a motor vehicle by means of an assistance system of the motor vehicle, assistance system as well as motor vehicle
The invention relates to a method for determining a real position (X, Y, Z) of a trailer tow ball (6) of a tow hitch (4) of a motor vehicle (1) by means of an assistance system (9) of the motor vehicle (1) by: capturing the trailer tow ball (6) and determining a characterizing property (11) of the trailer tow ball (6), determining a relative position (x, y) of the characterizing property (11), determining a first real space coordinate (X) and a second real space coordinate (Y), presetting a third real space coordinate (Z) for the third real space coordinate (Z) within a predetermined coordinate interval, generating a comparative position of the trailer tow ball (6) at least depending on the preset third real space coordinate (Z) by means of the electronic computing device (12), determining the real position (X, Y, Z) with the preset third real space coordinate (Z) upon coincidence of the relative position (x, y) with the comparative position. Further the invention relates to an assistance system (9) and to a motor vehicle (1). |
| US11004230B2 |
Predicting three-dimensional articulated and target object pose
A data processing system is provided that includes a processor having associated memory, the processor being configured to execute instructions using portions of the memory to cause the processor to, at classification time, receive an input image frame from an image source. The input image frame includes an articulated object and a target object. The processor is further caused to process the input image frame using a trained neural network configured to, for each input cell of a plurality of input cells in the input image frame predict a three-dimensional articulated object pose of the articulated object and a three-dimensional target object pose of the target object relative to the input cell. The processor is further caused to output the three-dimensional articulated object pose and the three-dimensional target object pose from the neural network. |
| US11004229B2 |
Image measurement device, image measurement method, imaging device
An image measurement device is provided that includes at least one processor and at least one memory functioning as: a first acquisition unit that acquires a plurality of image data captured at a plurality of focus positions and at different viewpoints; a second acquisition unit that acquires distance information corresponding to each of the plurality of image data on the basis of the image data at different viewpoints at each focus position; a designation unit that designates a ranging point; a determination unit that determines reliability corresponding to the ranging point in each of the plurality of image data; and a selection unit that selects the distance information used as the distance information of the ranging point from the distance information acquired by the second acquisition unit on the basis of the reliability determined by the determination unit. |
| US11004226B2 |
Image processing device, image processing method, and image display system for grasping a distance from an obstacle with a smaller visual line shift
A stereo image capturing device captures a stereo image with a measurement target range in front of a vehicle as an angle of field, and a display device is disposed so as to cover at least part of the measurement target range as seen from the viewpoint position of a driver inside the vehicle. Then a distance measuring section measures the distances to another object in the measurement target range using the stereo image and identifies the object within a predetermined distance as an obstacle, and an image generating section generates a virtual mirror image that allows at least the vehicle and the obstacle to be seen using a reflection by a mirror in a case where the mirror is assumed to be virtually disposed above a location at which the obstacle is seen from the viewpoint position of the driver in the vehicle, and causes the display device to display the virtual mirror image. The present technology can be applied, for example, to in-vehicle image display systems. |
| US11004224B2 |
Generation of structured map data from vehicle sensors and camera arrays
Motion and video data from vehicle sensors and camera arrays attached to a vehicle collect video and sensor data along a path driven by the vehicle. A system processes such data to produce high-accuracy structured map data, as might be used to precisely locate a moving vehicle in its environment. Positions are calculated from the sensor data. The positions are updated based on the video data. When loops in the vehicle path are detected, a loop closure error is calculated and used to update the positions as well as to reduce bias in the sensors when calculating future positions. Positions of features in the video are used to create or update structured map data. |
| US11004218B2 |
Three-dimensional image processing device and three-dimensional image processing method for object recognition from a vehicle
A three-dimensional image processing device includes: an input unit configured to acquire a first taken image and a second taken image respectively from a first imaging unit and a second imaging unit; and a stereo processing unit configured to execute stereo processing and then outputs a range image, for a common part where an imaging region of the first taken image and an imaging region of the second taken image have an overlap with each other, an imaging direction of the first imaging unit and an imaging direction of the second imaging unit are set toward a horizontal direction, and both side parts of the imaging region of the first imaging unit and both side parts of the imaging region of the second imaging unit are set as common parts. |
| US11004210B2 |
Methods circuits devices systems and associated computer executable code for extraction of visible features present within a video feed from a scene
Disclosed are methods, circuits, devices, systems and associated executable code for multi factor image feature registration and tracking, wherein utilized factors include both static and dynamic parameters within a video feed. Assessed factors may originate from a heterogeneous set of sensors including both video and audio sensors. Acoustically acquired scene information may supplement optically acquired information. |
| US11004209B2 |
Methods and systems for applying complex object detection in a video analytics system
Techniques and systems are provided for tracking objects in one or more video frames. For example, a first set of one or more bounding regions are determined for a video frame based on a trained classification network applied to the video frame. The first set of one or more bounding regions are associated with one or more objects in the video frame. One or more blobs can be detected for the video frame. A blob includes pixels of at least a portion of an object in the video frame. A second set of one or more bounding regions are determined for the video frame that are associated with the one or more blobs. A final set of one or more bounding regions is determined for the video frame using the first set of one or more bounding regions and the second set of one or more bounding regions. Object tracking can then be performed for the video frame using the final set of one or more bounding regions. |
| US11004207B2 |
Multi-modal data fusion for scene segmentation
Multiple detection techniques are used to determine whether the individual pixels in an image are background or foreground. The outputs from the multiple techniques are combined according to a confidence metric associated with each technique, which may vary from pixel to pixel. The resulting blended value for each pixel is compared with a threshold to determine whether the pixel is foreground or background. |
| US11004205B2 |
Hardware accelerator for histogram of oriented gradients computation
A hardware accelerator for histogram of oriented gradients computation is provided that includes a gradient computation component configured to compute gradients Gx and Gy of a pixel, a bin identification component configured to determine a bin id of an angular bin for the pixel based on a plurality of representative orientation angles, Gx, and signs of Gx and Gy, and a magnitude component configured to determine a magnitude of the gradients Gmag based on the plurality of representative orientation angles and the bin id. |
| US11004203B2 |
User guided iterative frame and scene segmentation via network overtraining
Systems and methods for user guided iterative frame and scene segmentation are disclosed herein. The systems and methods can rely on overtraining a segmentation network on a frame. A disclosed method includes selecting a frame from a scene and generating a frame segmentation using the frame and a segmentation network. The method also includes displaying the frame and frame segmentation overlaid on the frame, receiving a correction input on the frame, and training the segmentation network using the correction input. The method includes overtraining the segmentation network for the scene by iterating the above steps on the same frame or a series of frames from the scene. |
| US11004202B2 |
Systems and methods for semantic segmentation of 3D point clouds
Systems and methods for obtaining 3D point-level segmentation of 3D point clouds in accordance with various embodiments of the invention are disclosed. One embodiment includes: at least one processor, and a memory containing a segmentation pipeline application. In addition, the segmentation pipeline application configures the at least one processor to: pre-process a 3D point cloud to group 3D points; provide the groups of 3D points to a 3D neural network to generate initial label predictions for the groups of 3D points; interpolate label predictions for individual 3D points based upon initial label predictions for at least two neighboring groups of 3D points including the group of 3D points to which a given individual 3D point belongs; refine the label predictions using a graph neural network; and output a segmented 3D point cloud. |
| US11004194B2 |
Inspection device, image forming apparatus, and inspection method
An inspection device includes: an image acquirer that acquires an inspection target image; an edge extractor that extracts an edge from each of the inspection target image and a reference image to be used in inspecting the output image; a defect candidate region extractor that extracts a defect candidate region having a possibility of a defect by comparing the inspection target image with the reference image; an edge direction calculator that calculates a direction of the edge in the inspection target image and a direction of the edge in the reference image; and a defect determiner that determines whether the defect candidate region is a defect, on a basis of the direction of the edge in the inspection target image and the direction of the edge in the reference image at a position corresponding to the defect candidate region. |
| US11004192B2 |
Image processing of aerial imagery for energy infrastructure analysis using pre-processing image selection
A computer-implemented method for selecting aerial images for image processing to identify Energy Infrastructure (EI) features is provided. The method includes performing image processing on aerial images of a portion of global terrain captured at different times to determine differences in terrain content the captured images. Aerial images are selected for further image processing according to identified differences in terrain content. The selected images are imaged processed via an EI feature recognition type to identify EI features within the images. |
| US11004186B2 |
Parcel change detection
A computer-implemented method for identifying property changes by analyzing differences between old and new imagery. In one embodiment, an administrator begins by creating a project with links to old and new imagery and uploading a file with parcel boundaries. The application may then divide the project into smaller batches and then automatically classify each batch. Analysts may then review these batches and reject those that are insufficiently accurate. For rejected batches, analysts may manually classify the parcels. Analysts may then review these batches again. In one embodiment, once all batches are accepted, the project may be marked as complete and suitable reports may be generated and sent. These reports may include a customer report which may include overall project statistics, a breakdown of changes by type, a heatmap showing which areas are changing fastest, and/or an estimated tax impact of the identified changes. |
| US11004176B1 |
Methods and apparatus for multi-encoder processing of high resolution content
Methods and apparatus for multi-encoder processing of high resolution content. In one embodiment, the method includes capturing high resolution imaging content; splitting up the captured high resolution imaging content into respective portions; feeding the split up portions to respective imaging encoders; packing encoded content from the respective imaging encoders into an A/V container; and storing and/or transmitting the A/V container. In another embodiment, the method includes retrieving and/or receiving an A/V container; splitting up the retrieved and/or received A/V container into respective portions; feeding the split up portions to respective imaging decoders; stitching the decoded imaging portions into a common imaging portion; and storing and/or displaying at least a portion of the common imaging portion. |
| US11004174B2 |
Lenticular image formation method
A variable image display body and a lenticular image formation method that are capable of displaying a variable image without incongruity are provided. In a variable image display body, lenticular images are composed of arranged image strips obtained by scaling a plurality of images so that subject images appearing in the respective images have the same size, subjecting the scaled images to position adjustment so that reference portions of the subject images in the scaled images are located at the same position, in the superimposed state, trimming a region in which a predetermined number of the scaled images are overlapped and the subject images are included, and extracting image strips in the form of lines from each of the trimmed images. |
| US11004170B2 |
Converting flash content to HTML content by generating an instruction list
Systems and methods for converting FLASH content to HTML content is described herein. A transcoder module can receive a FLASH-based content item including instructions to cause a computing device to generate or access a display list comprising display objects. The transcoder module can traverse the display list to identify a class type for each display object. The transcoder module can generate a set of HTML-based instructions based on the class type for each display object. The transcoder module can insert the generated set of HTML-based instructions into an instruction list. The transcoder module can store the instruction list in a data structure. An policy generator module can generate an execution policy. The execution policy can specify an application of a client device to execute the sets of HTML-based instructions in the instructions list based on a trigger condition. |
| US11004169B2 |
Neural network watermarking
Methods and apparatus, including computer program products, are provided for watermarking neural networks. In some embodiments, there may be provided a method. The method may include determining, for a neural network, an activation layer output by a hidden layer of the neural network. The method may include selecting a watermarking process. The method may include applying the selected watermarking process to the activation layer output to generate a key. The method may include storing, for the neural network to enable detection of copying of the neural network, the selected watermarking process and the key. Related systems, methods, and articles of manufacture are also described. |
| US11004168B2 |
Optical feedback for visual recognition authentication
Providing optical watermark signals for a visual authentication session by performing at least the following: receive, at an anti-spoof engine, an instruction to perform visual authentication operations for a visual authentication session, generate, with the anti-spoof engine, an optical watermark signal based on receiving the instruction, wherein the optical watermark signal includes at least one optical identifier to authenticate images captured during the visual authentication session, obtain, with the anti-spoof engine, an image source that includes captured images of the visual authentication session, determine, with the anti-spoof engine, whether the image source includes a reflected optical watermark signal, and compare, with the anti-spoof engine, whether the reflected optical watermark signal matches the generated optical watermark signal based on the determination that the image source includes the reflected optical watermark signal. |
| US11004167B2 |
Image capturing apparatus having capability of recognizing a relationship among a plurality of images
An image capturing apparatus includes a capture part acquiring image data, and a display displaying an image on a display based on the image data. First information acquired includes at least either an azimuth angle or an elevation angle as a direction of the image and at least either an angle of view of the image or angle-of-view related information calculating the angle of view. When a second direction of a second image is included within a range of a first angle of view in a first direction of a first image, the second image is associated with the first image, and the first image is displayed within the display, and display is performed in a state in which the second image to be associated with the first image is overlapped on the first image within the display as the second image or second information indicating the second image. |
| US11004165B2 |
Management systems and methods for claim-based patent analysis
Systems, methods, and graphical user interfaces for the management and coordination of patent infringement-related analyses, such as freedom-to-operate, patent clearance, and enforcement, are provided. Patent claim information is extracted and presented to users along with purpose-specific workflows that facilitate the capture and presentation of work product on both a claim-by-claim level as well as on a document level. Integrated data management facilitates access to historical work product by interconnecting the various record entities of the system including product information, patent document information, review information, and work product information. |
| US11004162B2 |
Systems and methods for facilitating real estate transactions with purchase offer processing feature
A system and method for facilitating real estate transactions that is configured for receiving property information from a listing service or data feed, presenting a property information display on data communication devices for each property; generating a unique transaction actuator in each property information display, and responsive to selecting a unique transaction actuator, generating an offer form with an offer transmittal actuator, wherein the offer form includes a plurality of data fields relating to an offer to purchase property that are populated with the property information for the specific property associated with the selected unique transaction actuator. |
| US11004160B2 |
Systems and methods for advanced energy network
A multiplicity of participants comprising utility operators, distributed energy resource (DER) providers, vendors/aggregators, energy customers, and utility financial officers, are communicatively connected to a platform. The platform provides interactive interfaces for each type of participant to access the platform over communication network. Utility operators are enabled to view and control DER in a certain area via an interface for utility operators. DER providers are enabled to interconnect DER packages to a utility grid via an interface for DER providers. Vendors/aggregators are enabled to view and manage their portfolios via an interface for vendors/aggregators. Energy customers are enabled to view energy information, shop for new products or services, and manage rate plans via an interface for marketplace. Utility financial officers are enabled to view revenue streams from the platform to a utility via an interface for financial settlement. |
| US11004159B2 |
Method and system for providing automated high scale fabrication of custom items
Method and system for providing volume manufacturing of customizable items including receiving a data package including a plurality of manufacturing parameters, each of the plurality of manufacturing parameters associated with a unique item, verifying the received data package, and implementing a manufacturing process associated with the received data package is provided. |
| US11004156B2 |
Method and system for predicting and indexing probability of financial stress
A method, computer system, and computer program product that aggregates data regarding a plurality of factors correlated with income; performs iterative analysis on the data using machine learning to construct a predictive model; populates, using the predictive model, a database with predicted income values for a selected range of housing costs; converts the predicted income values in the database into percentages of observed income values for a selected group of people within the selected range of housing costs over a specified time period to create indices of financial stress; and rank orders the people within the selected group according to their indices of financial stress. |
| US11004154B2 |
Collection of transaction receipts using an online content management service
An online content management service can collect and store receipts for a user from a variety of sources, including images captured by the user, messages received for the user at a messaging service or message management service, and/or receipts directly uploaded to the online content management service by a merchant. In the case of receipts provided as messages, a user can interact with a message management service to identify messages as receipts, and the message management service can upload such messages to the online content management service. |
| US11004150B2 |
Apparatuses, methods and systems for a high density financial asset information display
The disclosure details the implementation of an APPARATUSES, METHODS AND SYSTEMS FOR A HIGH DENSITY FINANCIAL ASSET INFORMATION DISPLAY. The disclosure teaches a High Density Financial Asset Information Display which provides a high density, straightforward, unified, compact, dynamic and comprehensive display interface that presents users with a high volume of easy to understand financial asset information including the current buy and sell prices, the current price direction, the amount of time the asset pair is traded at each price, and the change in price over multiple time frames. The High Density Financial Asset Information Display is dynamically updated with the latest financial information and is formatted to convey relevant changes in the information of interest in a way that is easily understood by users. |
| US11004149B2 |
Mobile securities trading platform
A mobile securities trading platform interface may include a mobile order entry portion, a mobile portfolio view portion, a mobile stock price view portion, an investment education video programming portion (which may also be provided on a non-mobile version of the platform), and a portion for following trades of other users on the platform (which may also be provided on a non-mobile version of the platform). |
| US11004146B1 |
Business health score and prediction of credit worthiness using credit worthiness of customers and vendors
A method for generating a business health score of a business entity that includes identifying tools used to manage the business entity, obtaining business information from the tools, filtering the business information into at least one data category to obtain categorized business information, populating the categorized business information into a data silo, and analyzing, by a computer processor, the categorized business information in the data silo to create a composite business factor. The method also includes applying an algorithm to the composite business factor to generate a result, generating, based on the result, the business health score of the business entity, and providing the business health score to an interested entity. |
| US11004145B2 |
Converting solar output measure to commercial rent per square area
A method of designing bifacial solar panels installations that does not rely on the use of all available space to maximize electrical output and return on investment. Instead, the design method relies the market meter rate of the business sector in the area to determine of the KW size of the array. This production is then converted to cost per square Area for use in evaluating the costs, predicting profits, and generating lease agreements. The tenant pays a contract cost per square Area regardless of actually energy consumption. |