| Document | Document Title |
|---|---|
| US10986344B2 |
Method and system for picture segmentation using columns
A video picture is divided into a plurality of columns, each column covering only a part of the video picture in a horizontal dimension. All coded tree blocks (“CTBs”) belonging to a slice may belong to one or more columns. The columns may be used to break the same or different prediction or in-loop filtering mechanisms of the video coding, and the CTB scan order used for encoding and/or decoding may be local to a column. Column widths may be indicated in a parameter set and/or may be adjusted at the slice level. At the decoder, column width may be parsed from the bitstream, and slice decoding may occur in one or more columns. |
| US10986342B2 |
360-degree image encoding apparatus and method, and recording medium for performing the same
Provided is a 360-degree image encoding apparatus and method, and a recording medium for performing the same function. The 360-degree image encoding apparatus divides an input image to be encoded into a plurality of regions in a vertical direction and encodes the divided regions while changing resolutions thereof so that all regions have the same resolution to maintain pixel continuity among the regions when a predictive image is generated and the regions have resolutions changed according to the degree of distortion of the regions when a residue image is encoded. |
| US10986337B2 |
Systems and methods for selective transmission of media content
Systems and methods for transmitting, encoding, and decoding video in accordance with embodiments of the invention are illustrated. One embodiment includes a method for transmitting video. The method includes steps for partitioning a current frame of video into a plurality of subgrids, identifying active subgrids from the plurality of subgrids for the current frame, generating a longcanvas includes a barcode and image data of the active subgrids, where the barcode includes location data indicating a location within the frame for each active subgrid, transmitting the longcanvas to a destination device. |
| US10986331B2 |
Distance to fault measurements in cable TV networks
A TDR technique for performing in-service distance-to-fault measurements in cable TV networks is disclosed. Using a cable network tester configured to generate chirped probe pulses and to perform pulse-matched filtering and averaging of received echoes, network faults may be detected without interfering with the downstream reception. The probe pulse transmission may be timed to take advantage of the error correction coding in the network. |
| US10986326B2 |
Layered scene decomposition CODEC with higher order lighting
A system and methods for a CODEC driving a real-time light field display for multi-dimensional video streaming, interactive gaming and other light field display applications is provided applying a layered scene decomposition strategy. Multi-dimensional scene data including information on directions of normals is divided into a plurality of data layers of increasing depths as the distance between a given layer and the display surface increases. Data layers which are sampled using a plenoptic sampling scheme and rendered using hybrid rendering, such as perspective and oblique rendering, to encode light fields corresponding to each data layer. The resulting compressed, (layered) core representation of the multi-dimensional scene data is produced at predictable rates, reconstructed and merged at the light field display in real-time by applying view synthesis protocols, including edge adaptive interpolation, to reconstruct pixel arrays in stages (e.g. columns then rows) from reference elemental images. |
| US10986319B2 |
Method for projecting image content
A method of projecting imagery. In one embodiment, the method comprises projecting on a surface, from a projector device, a projected image of a matte displayed on a display device; adjusting the size, shape, position, orientation, or any combination thereof, of the projected image of the matte by adjusting the matte displayed on the display device; associating imagery content with the matte; and projecting the associated imagery in the projected image of the matte. |
| US10986315B2 |
Pixel array included in image sensor, image sensor including the same and electronic system including the same
A pixel array in an image sensor includes first, second, third, and fourth pixel groups adjacent to each other. The first pixel group includes a plurality of first subpixels adjacent to each other and arranged in a first pattern, and a first microlens shared by the plurality of first subpixels. The second pixel group includes a plurality of second subpixels adjacent to each other and arranged in a second pattern, and a second microlens shared by the plurality of second subpixels. The third pixel group includes a plurality of third subpixels adjacent to each other and arranged in a third pattern, and a third microlens shared by the plurality of third subpixels. The fourth pixel group includes a plurality of fourth subpixels adjacent to each other and arranged in a fourth pattern, and a fourth microlens shared by the plurality of fourth subpixels. |
| US10986312B2 |
Information processing apparatus, information processing method, program, and server
An information processing apparatus according to an embodiment of the present technology includes a generation unit and a first transmission unit. The generation unit generates parameter information that shows states of a user. The first transmission unit transmits the generated parameter information through a network to an information processing apparatus of a communication partner capable of generating an image that reflects the state of the user on the basis of the parameter information. |
| US10986306B2 |
Monitoring camera system and method capable of recording images during storage device recovery
A monitoring camera system may include: a camera including an imaging unit for capturing an image of a periphery region according to a first profile, a local storage medium capable of storing the captured image, and a first communication interface for transmitting the captured image; and an image management device including a main storage for storing the transmitted image, a recovery control unit for determining whether a recovery is necessary in the main storage and generating a control signal according to the determination result such that the main storage is recovered, and a computation unit for calculating storable hours for which the image captured according to the first profile can be stored in the local storage medium, according to the determination result, and comparing the calculated storable hours and predicted recovery hours required for recovering the main storage. |
| US10986301B1 |
Participant overlay and audio placement collaboration system platform and method for overlaying representations of participants collaborating by way of a user interface and representational placement of distinct audio sources as isolated participants
A participant overlay and audio placement collaboration system platform and a method for overlaying participants collaborating via a user interface and placement of distinct audio sources are disclosed. The participant overlay and audio placement collaboration system platform provides an ergonomic and intuitive sense-oriented user interface that separates presenters/speakers relevant video contents from irrelevant surroundings and visually overlays the presenter with the presented material, thereby allowing for a more immersive, intuitive, and interactive presentation, while maximizing usage of desktop space for shared/presented content and of the presenter(s) themselves. The further correlation of audio-mapping of acoustic content of presenter(s)/participant(s) relative to their visual representation on the desktop, allows for a significantly improved audio experience and separation capability of different speakers and relevant speakers audio from nuisance background sounds. |
| US10986297B2 |
Image sensor capable of removing a horizontal band noise phenomenon and electronic device having the same
An image sensor is provided. The image sensor includes a pixel array including a plurality of pixels connected between a plurality of row lines and a plurality of column lines; an analog-to-digital converter configured to convert each of a plurality of column signals received through the plurality of column lines into a plurality of first digital signals, and convert a level of the plurality of row lines into a second digital signal; and a compensator configured to generate digital pixel data based on the plurality of first digital signals and the second digital signal. |
| US10986294B2 |
Wide field of view optical module for linear sensor
A sensing module includes a linear image sensor and an optical unit. The unit includes an optical element having a curved, outward surface and a covering on the outward surface. The covering has a slit formed therein. The optical unit faces the sensor with the slit perpendicular to a longitudinal axis of the sensor and images a wide field of view onto a single pixel of the linear sensor, wherein light impinging normal to the slit, at any location along the slit, is imaged on a central pixel of the sensor while light impinging one of a plurality of non-normal angles to the slit is imaged on an associated one of a plurality of non-central pixels of the sensor. |
| US10986291B2 |
Solid-state image pickup device and control method of solid-state image pickup device
A solid-state image pickup device according to an embodiment is a solid-state image pickup device including a first pixel row, a second pixel row, and a third pixel row that are arranged in a horizontal direction. In the solid-state image pickup device, a first control pulse for transferring charges of first accumulation portions of the fourth and sixth CCD registers in a vertical direction perpendicular to the horizontal direction and a second control pulse for transferring charges of second accumulation portions of the fourth and sixth CCD registers in the horizontal direction are input to the fourth and sixth CCD registers such that an Hi period of the first control pulse and an Hi period of the second control pulse do not overlap each other in a timing period in which charges accumulated in the first, second, and third pixel rows are transferred. |
| US10986290B2 |
Wide dynamic range image sensor with global shutter
An image sensor includes a photodiode disposed in a semiconductor material to generate image charge in response to incident light, and a first transfer gate is coupled to the photodiode to extract image charge from the photodiode in response to a first transfer signal. A first storage gate is coupled to the first transfer gate to receive the image charge from the first transfer gate, and a first output gate is coupled to the first storage gate to receive the image charge from the first storage gate. A first capacitor is coupled to the first output gate to store the image charge. |
| US10986288B2 |
Flat field correction systems and methods for infrared cameras
Various techniques are provided to perform flat field correction (FFC) for infrared cameras. In one example, a system includes a focal plane array (FPA) of an infrared camera configured to capture thermal image data in response to infrared radiation received by the FPA via an optical path of the infrared camera. The system further includes a memory configured to store a set of supplemental FFC values. The system further includes a processor configured to determine a scale factor based at least on a temperature and/or a rate of temperature change of an internal component of the infrared camera; generate a scaled set of supplemental FFC values based on the scale factor and set of supplemental FFC values; and apply the scaled set of supplemental FFC values to the thermal image data to adjust for non-uniformities associated with at least a portion of the first optical path. |
| US10986286B2 |
Image creation device
An image creation device is provided with an image acquisition unit acquiring multiple captured images of a peripheral area, a detection unit detecting a three-dimensional object present in the peripheral area, a first conversion unit converting the multiple captured images into multiple individual overhead images to create a first conversion image by means of an overall overhead image, a second conversion unit creating a second conversion image in which an image captured from a virtual camera is converted in accordance with the conversion rule, the virtual camera being virtually arranged at a virtual position set on the vehicle such that a virtual optical axis direction faces the direction of the three-dimensional object, and a synthesis unit synthesizes the second conversion image on the first conversion image to create a synthesis image. |
| US10986284B2 |
Light flicker mitigation in machine vision systems
The present disclosure is directed to systems and methods of detecting and minimizing the effect of light flickering in a stitched HDR image formed using a plurality of images obtained using image acquisition sensor circuitry. Light flicker mitigation (LFM) circuitry receives a signal containing data representative of a plurality of images. Multi-feature extraction circuits in the LFM circuitry extract data representative of one or more features from some or all of the pixels included in the plurality of images. Light flicker detection and analysis circuits in the LFM circuitry detect flickering pixels in the plurality of images. Exposure index conversion circuits in the LFM circuitry determine one or more output corrections to apply to the plurality of images as the images are stitched to form a single HDR image in which flickering pixels are minimized, mitigated, or eliminated. |
| US10986283B2 |
Device for inspecting mask plate, method for inspecting mask plate, and corresponding method for controlling light sources
The embodiments of the present disclosure propose a device for inspecting a mask plate, a method for inspecting a mask plate, and a corresponding method for controlling light sources. The device includes: an image sensor configured to capture an image of the mask plate; and a plurality of light sources disposed on one side of the mask plate opposite to the image sensor, wherein at least one of the plurality of light sources is configure to emit light when the image sensor is capturing an image of a first region of the mask plate, and the at least one light source comprises light sources within a first range, wherein the first range corresponds to the first region and an orthographic projection of the image sensor on a light source plane falls within the first range. The method for controlling light sources includes: turning on at least one of a plurality of light sources disposed on one side of the mask plate opposite to an image sensor, which corresponds to a first region of the mask plate to be inspected, when the image sensor is moved to a position corresponding to the first region. |
| US10986279B1 |
Automated application of drift correction to sample studied under electron microscope
Control system configured for sample tracking in an electron microscope environment registers a movement associated with a region of interest located within an active area of a sample under observation with an electron microscope. The registered movement includes at least one directional constituent. The region of interest is positioned within a field of view of the electron microscope. The control system directs an adjustment of the electron microscope control component to one or more of dynamically center and dynamically focus the view through the electron microscope of the region of interest. The adjustment comprises one or more of a magnitude element and a direction element. |
| US10986272B2 |
Image capturing device and captured image display method
An object of the present disclosure is to display a captured image and a shake corrected image thereof on the same screen. An imaging device is provided and has a configuration provided with a correction amount calculator that calculates a correction amount for correcting image shake in a frame image, a shake corrected image generator that generates a shake corrected image in which the image shake is corrected by performing a geometrical conversion with respect to a current frame image based on the correction amount, and a synthesized image generator that generates a synthesized image in which the current frame image and the shake corrected image are disposed on the same screen. |
| US10986263B2 |
Calibration method of variable focal length lens and variable focal length lens device
A calibration method of a variable-focal-length lens including a liquid lens unit whose focal-length is periodically varied in response to a periodic drive-signal includes: using a calibration tool having a plurality of height-different parts on a surface; preparing a calibration table by repeating outputting a drive-signal having a predetermined voltage to the variable-focal-length lens, detecting a surface image of the calibration tool using an image detector, detecting two points having maximum image contrast in the surface image, calculating a focal-depth from a difference in a focal-length between the two points; and recording the focal-depth and the voltage of the drive-signal in a corresponding combination, and retrieving a value of the voltage corresponding to a desired focal-depth from the calibration table to set the variable-focal-length lens at the desired focal-depth, and adjusting the voltage of the drive-signal outputted to the variable-focal-length lens based on the retrieved value. |
| US10986255B2 |
Increasing display size by placing optical sensors beneath the display of an electronic device
Various embodiments concern sensors and other components that can be disposed beneath a variable transparency layer of a mobile device. By modifying how much voltage is applied to the variable transparency layer, a component, such as a camera, can be readily hidden when not in use. More specifically, the variable transparency layer may be substantially opaque when the camera is not in use and at least partially transparent when the camera is in use and ready to capture an image. The opacity level of the variable transparency layer can be modified by a voltage source that is electrically coupled to the variable transparency layer. The various levels of opacity could also enable the variable transparency layer to act as an electronic aperture for the camera. |
| US10986251B2 |
Colour standard from a digital input file
The invention provides a colour standard, assembled from a graphic digital input file, in which one or a combination of CMYK, RGB, Lab or spot colour builds are contained. The colour standard comprises a colour target calibration strip which is indicative of the calibration status of a printing press; an output image which is indicative of the digital input file; and a grid chart of spot colour builds, built-in process inks, with their respective process build values available for each spot colour in the digital input file. The colour standard is configured to capture the calibrated state of the press for a particular digital input file in order to achieve a particular colour-managed output image, so that product print runs of the output image can be repeated accurately and consistently over time. |
| US10986249B1 |
System and method for processing and enhancing achromatic characters of scanned digital documents
An image processing device includes a neutral edge detection and enhancement component which, for pixels of an input image, computes an edge strength for the pixel as a function of differences between the input luminance value of the pixel and input luminance values of neighboring pixels, computes a neutral adjustment factor for the pixel as a function of the input luminance value of the pixel, and computes a chroma adjustment factor for the pixel as a function of the input chrominance values of the pixel. An adjusted luminance value for the pixel is computed as a function of the input luminance value, the edge strength, and the neutral adjustment factor. Adjusted chrominance values for the pixel may be computed as a function of the input chrominance value, the edge strength, and the chroma adjustment factor. The system allows detection and enhancement of neutral edges in monochrome and color images. |
| US10986248B2 |
Document reading apparatus configured to output an image in which background area is removed or non-background area is extracted
A document reading apparatus includes a scanner, an input device receiving an input of a width and length, and a processor configured to scan an area specified based on the input length and generate a first image, generate a second image by removing a part of the first image so that a width of the second image is equal to or greater than the input width, detect a background or non-background area in the second image, determine whether the input is appropriate based on whether all sides of an area specified based on the input width and length overlap the background area or none of the sides overlaps the non-background area on the second image, and when the input is appropriate, output a third image in which the background area is removed or the non-background area is extracted from the second image. |
| US10986247B2 |
Communication apparatus, data transfer apparatus, and methods of controlling them
A communication apparatus that communicates with a data transfer apparatus using a plurality of communication methods that include a first communication method with which the communication device is unable to connect to a second network while connected to the data transfer apparatus via a first network, and a second communication method with which the communication device is able to connect to the second network while connected to the data transfer apparatus, executes a communication application for data communication, and controls the communication device. While the communication apparatus is executing the communication application and is connected to the data transfer apparatus using the first communication method, the communication controller controls the communication device so as to switch from the first communication method to the second communication method upon the state of the communication application transitioning to a background state. |
| US10986243B2 |
Information processing apparatus for reducing power consumption by supplying power to a necessary controller of multiple controllers
An information processing apparatus includes a first controller that performs a process dependent on hardware having a function, a second controller that performs a process independent of the hardware, and a power controller that, if there is a reason to resume supply of power to the second controller when supply of power to the first and second controllers has been restricted or stopped, activates both the first and second controllers or only the second controller depending on the reason. |
| US10986232B2 |
Systems and methods for sizing modular routing applications
A method for allocating resources to modules of a contact center includes: receiving a first interaction in a first state; determining a first load of a first module of the contact center to be low; in response to determining that the first load is low, routing the first interaction to the first module of the contact center, the first module transitioning the first interaction from the first state to a second state; receiving a second interaction in the first state; determining a second load on the first module of the contact center to be high; and in response to determining that the second load is high, routing the second interaction to a second module configured to transition the second interaction from the first state to the second state, the second module having different resource requirements than the first module. |
| US10986229B2 |
Interactive user interface for profile management
Techniques for managing electronic user profiles are presented herein. An example method includes accessing, from a data structure, a user profile. The user profile can include a profile identifier and a plurality of data fields. The method also includes displaying, on a display device, an interactive user interface. The user interface can include a plurality of user interface action elements. Each of the user interface action elements can be associated with a data field in the data structure. Each of the user interface action elements can also be individually selectable by a respective user action to transmit the associated data field to a remote device. In response to receiving a selection of a user interface action element, the method can further include transmitting the associated data field and the profile identifier to a router configured to send, based on the profile identifier, the associated data field to the remote device. |
| US10986225B2 |
Call recording system for automatically storing a call candidate and call recording method
Embodiments of the present disclosure describe a call recording system and a call recording method for automatically recording, i.e. storing, a call candidate when an active call is detected. The call recording system comprises a sound receiver to receive sound data and to convert sound data to audio representations of sound, a buffer to buffer the audio representations of sound for a predetermined time duration, a call candidate determination unit to determine if the buffered audio representations comprise a call candidate, a call analyzer to analyze the call candidate, wherein the call analyzer determines if the call candidate is a call to be stored, and a storage to store the call candidate as a call. Hence, a reliable system can be provided for automatically storing a call. |
| US10986222B2 |
Electronic device for controlled transmission of voice data packet and method thereof
An electronic device is provided. The electronic device includes a display, at least one communication circuit, and at least one processor configured to control the display and the at least one communication circuit. The at least one processor is configured to obtain a communication state using the at least one communication circuit during a packet based voice call, and to stop transmitting data associated with at least one of a plurality of background applications which operate in a background of an operating system (OS) of the electronic device when the communication state meets a specified first condition. |
| US10986221B2 |
Execution of testing processes on apparatuses
According to examples, an apparatus may include a processor and a non-transitory computer readable medium that the processor may execute to initiate a testing process of the apparatus following a boot up of the apparatus, in which a popup message is displayed on the apparatus following the boot up and the popup message blocks performance of the testing process and in which the apparatus is to enter into a lock mode following the popup message being displayed. While the apparatus is in the lock mode, the apparatus may be caused to emerge from the lock mode, in which emergence from the lock mode is to dismiss the popup message from being displayed on the apparatus. In addition, execution of the testing process of the apparatus may be continued following dismissal of the popup message. |
| US10986220B2 |
Device for radio communications and method for establishing and maintaining communications between device and fixed location radio communication facilities
A mobile or transportable device for radio communications include a mobile platform. The mobile platform has at least one antenna; a radio operating component coupled with the at least one antenna for receiving and/or transmitting radio signals; and a microcontroller coupled with the radio operating component, configured such that when a radio signal received by the radio operating component from one of fixed location radio communication facilities is weaker than a threshold value, the microcontroller searches radio communication parameters of a closest radio communication facility to a current location of the mobile or transportable device, and operably retunes the mobile or transportable device according to the radio communication parameters of the closest radio communication facility. According to the invention, certain functions of the mobile or transportable device may be performed remotely away from the mobile platform. |
| US10986217B1 |
Methods, systems, and computer program products for sharing information for detecting at least one time period for a connection
In various embodiments, a method, apparatus, and computer program product are provided to: receive first information on which at least a first duration for detecting a first type of time period is based; generate a first packet including a first parameter field identifying first metadata for use in determining a second duration for detecting the first type of time period; set up a first connection, by sending, from the first node to a second node, the first packet to provide the first metadata to the second node, for use by the second node in determining the second duration for detecting the first type of time period; in response to detecting, based on the first duration and by the first node during at least a portion of the first connection including at least a portion of the first connection set up, a first time period of the first type of time period, at least partially close the first connection; and in response to detecting, based on the second duration and by the first node after the first duration is changed to the second duration, a second time period of the first type of time period, at least partially close the first connection. |
| US10986215B2 |
Access control in the remote device of network redirector
An approach for accessing one or more resources at a virtualized desktop infrastructure (VDI) client running on a client device by a remote virtual machine (VM) is provided. The method includes intercepting, via a VDI agent, a request to access one or more resources at the client device, transferring the request from the remote VM to the client device via a network redirector protocol, and filtering the request to determine if the request complies with one or more rules. For a first resource of the one or more resources, if the request does not comply with any one of one or more first rules of the one or more rules, access to the first resource is denied. If the request complies with the one or more first rules, access to the first resource is granted and a response is sent to the VDI agent via the network redirector protocol. |
| US10986212B2 |
Method a server and a client for policy based control of M2M devices
A method executed at a M2M server, capable of interacting with a remotely located M2M client, is suggested. The method comprise: acquiring resources and/or parameters for provisioning a policy applicable for the M2M client; initiating formulation of the policy by arranging policy dependent mutually associated objects based on said resources and/or parameters, such that a M2M client on which the policy has been provisioned is capable of making decisions on the basis of said policy without having to communicate with any external device, and, initiating provisioning of the policy by provisioning said objects on the M2M client. |
| US10986211B2 |
Efficient context monitoring
Disclosed are systems, methods, and non-transitory computer-readable storage media for efficiently monitoring the operating context of a computing device. In some implementations, the context daemon and/or the context client can be terminated to conserve system resources. For example, if the context daemon and/or the context client are idle, they can be shutdown to conserve battery power or free other system resources (e.g., memory). When an event occurs (e.g., a change in current context) that requires the context daemon and/or the context client to be running, the context daemon and/or the context client can be restarted to handle the event. Thus, system resources can be conserved while still providing relevant context information collection and callback notification features. |
| US10986210B2 |
Per-application network content filtering
Disclosed are various examples for providing network content filtering to client devices on a per-application basis. A network stack receives a request from an application to connect to a network service. The network stack then determines the identity of the application. Based at least in part on the identity of the application, the network stack initiates a network connection between the application and the network service using or without using a managed network tunnel. |
| US10986208B2 |
System and method for improving internet communication by using intermediate nodes
A method for fetching a content from a web server to a client device is disclosed, using tunnel devices serving as intermediate devices. The client device accesses an acceleration server to receive a list of available tunnel devices. The requested content is partitioned into slices, and the client device sends a request for the slices to the available tunnel devices. The tunnel devices in turn fetch the slices from the data server, and send the slices to the client device, where the content is reconstructed from the received slices. A client device may also serve as a tunnel device, serving as an intermediate device to other client devices. Similarly, a tunnel device may also serve as a client device for fetching content from a data server. The selection of tunnel devices to be used by a client device may be in the acceleration server, in the client device, or in both. The partition into slices may be overlapping or non-overlapping, and the same slice (or the whole content) may be fetched via multiple tunnel devices. |
| US10986205B2 |
Management of contextual device notifications with VIP rankings
Examples described herein include systems and methods for management of contextual notifications on user devices. Entities can be categorized as VIP status based on scoring profiles sent from a management server to the user device. Applications on the user device can implement an SDK that reads the profiles and sets certain actions to boost scores and others to reduce scores. These local VIP scores can be sent periodically from the user device to the management server. The management server can use them in conjunction with global VIP scores for the same entities to create aggregated VIP information. This can be sent back to the user device, allowing the user device to then visualize different notifications or workflows based on whether an entity's aggregated VIP information exceeds one or more thresholds. |
| US10986204B2 |
Terminal device, edge server, data delivery system, and delivery control method
When playback of content has been requested, the terminal device according to the present invention determines whether or not an edge server has cache data for the content on the basis of information that is received from the edge server and that relates to the cache data retained by the edge server, and if it is determined that the edge server has cache data for the content, the terminal device determines whether or not the terminal device is communicating with the edge server via a base station capable of high-speed or high-capacity communication. If it is determined that the communicating base station is capable of high-speed or high-capacity communication, then the terminal device transmits, to the edge server, a request to change the delivery control method for the cache data for the content. |
| US10986200B1 |
String processing of clickstream data
A method includes assigning unique symbols to pages of a website, respectively. The method includes obtaining page symbol sequences of browsing sessions, respectively. Each browsing session corresponds to a visitor of the website. For each browsing session, the page symbol sequence of the browsing session is a sequence of symbols that corresponds, respectively, to a sequence of pages of the website visited during the browsing session by the corresponding visitor. The method includes generating a master string including the page symbol sequences, generating a suffix array corresponding to the master string, and generating a longest common prefix (LCP) array corresponding to the suffix array. The method includes, based on the suffix array and LCP array, determining one or more most common n-step subsequences of pages (n is an integer greater than 1). |
| US10986197B2 |
Content distribution systems and methods
This disclosure relates to systems and methods for distributing content to a mobile device. Systems and methods are described that provide techniques for the dynamic selection of content for distribution to a mobile device based on user profile information and/or feedback information associated with a user of the mobile device. Additional embodiments of the disclosed systems and methods may provide for the pre-distribution of certain shared content portions to a mobile device. In further embodiments, information relating to the rendering of content items from a set of serialized and/or episodic content items on a mobile device may be used to determine whether to pre-distribute other content items from the set of content items. |
| US10986194B2 |
Selecting content for high velocity users
Disclosed are systems, methods, and computer-readable storage media to select content to present to a user are disclosed. In one aspect, a method includes determining a content consumption rate of the user, and selectively presenting content to the user based on the content consumption rate. The content consumption rate may be determined based on a number of media content presented to the user over a period of time. If the number is above a threshold, a first type of content may be presented, while if the number is below (or equal) to the threshold, a second type of content, or in some aspects, no content, may be presented. After the selective presentation, additional content may be presented regardless of the content consumption rate. |
| US10986191B2 |
Method and device for scheduling resources
Disclosure method that includes traversing a user instance distribution of user instances of a user on hosts in a cluster to detect whether a trigger condition for user scheduling of adjustment of the user instance distribution is satisfied; migrating the user instance to be migrated out from the one or more hosts from which the user instances are to be migrated out to the one or more second hosts to which the one or more user instances are to be migrated in if the trigger condition for user scheduling is satisfied. The implementations of the present disclosure may schedule resources based on user instance distributions of users on hosts and achieve a balanced distribution of user instances. The implementations further avoid placing user instances of all users into a small number of hosts, increase the ability to prevent risks, and enhance the user experience. |
| US10986190B2 |
Information processing device and method for updating a session timer
An information processing device (20) performs a session timer updating process of restoring the remaining time of a session timer to N seconds whenever a packet is received from a client (10). The information processing device (20) does not perform the session timer updating process even when a packet is received from the client (10) until a session timer update stop time (Δ) elapses after the session timer was last updated. The information processing device (20) resumes the session timer updating process after the session timer update stop time (Δ) has elapsed after the session timer was last updated. |
| US10986189B2 |
Intermediate broker with multi-session recording
A computer-implemented method for operating an intermediate broker with multi-session recording, wherein the method comprises the steps of: an intermediate broker providing an application session on an application server as a user session to a user client; a recording module recording the user session in a session recording; upon termination of the user session, the intermediate broker providing a session continuation link for continuing the application session; upon activation of the session continuation link, the intermediate broker continuing the application session on the application server as a further user session to a further user client; the recording module recording the further user session in a further session recording. |
| US10986188B2 |
Handling multi-pipe connections
Methods, systems, and computer program products for handling multi-pipe connections is provided. A primary pipe request for a connection between a client and a server is received. The connection includes a plurality of pipes between the client and the server. The primary pipe request includes a number corresponding to the amount of pipes required for the connection. A first response acknowledging the receipt of the primary pipe request is transmitted. The first response includes a token. A plurality of subsequent pipe requests are received for the connection between the client and the server. Each subsequent pipe request includes the token. A subsequent response to each subsequent pipe request is transmitted. A count of the number of pipe requests received is maintained. The established pipes are released after a period of time has elapsed when the number of pipe requests received doesn't reach the number of pipes required for the connection. |
| US10986187B2 |
System and method for personalized virtual reality experience in a controlled environment
A system and method for initiating a personalized virtual reality session via a virtual reality communication system in a controlled environment is disclosed. The system includes a profile subsystem configured to store an inmate profile of the inmate of the controlled environment. The system also includes a virtual reality subsystem that retrieves the inmate profile associated with the inmate from the profile subsystem, initiates the virtual reality session involving a first communication device used by the inmate of the controlled environment, and personalizes the virtual reality session based on the inmate profile. The system also includes a communication subsystem configured to transmit information related to the virtual reality session to a monitoring system. |
| US10986186B2 |
Systems and methods for remote management of appliances
The present disclosure describes systems and methods for remote management of appliances. The appliance may be configured to periodically check in a predetermined online location for the presence of a trigger file identifying one or more appliances directed to contact a management server for maintenance. If the file is present at the predetermined location and the file includes the identifier of the appliance, the appliance may initiate a connection to the management server. If the file is not found, then the appliance may reset a call timer and attempt to retrieve the file at a later time. To avoid having to configure addresses on the appliance, link local IPv6 addresses may be configured for use over a virtual private network, allowing administration, regardless of the network configuration or local IP address of the appliance. |
| US10986180B2 |
Smart mounting of storage devices
A method for smart mounting of a first storage device to a first server includes receiving, at a first peer-to-peer communication component of a first server, a request from a second peer-to-peer communication component of a second server, the request being a request to mount a first storage device to said first server. The request is a request to mount a first storage device to said first server. The request is using a peer-to-peer communication protocol between the first and the second peer-to-peer communication components without using a central instance between the first and the second server. |
| US10986178B2 |
Execution of data logging in a networked computing environment
Embodiments of the present invention provide systems and methods for organization of data logging in a networked computing environment. A plurality of logging and monitoring zones, referred to as “logmon” zones are defined. Each zone is associated with one or more policies. The policies specify various parameters such as storage limits, priority, periodicity, and retention time, among others. A networked application operating in a cloud (networked) environment is associated with a zone. The tenant for the application can be billed according to the zone. |
| US10986173B1 |
Systems and methods for locating server nodes for edge devices using latency-based georouting
Systems and methods for locating server nodes for edge devices using latency-based georouting. At least one cloud platform including at least one cloud platform router and a node database is in network communication with at least one edge device and a plurality of server nodes. The at least one cloud platform receives an initial hypertext transfer protocol (HTTP) request from the at least one edge device. The node database is queried using the at least one cloud platform router and node data is fetched from the plurality of server nodes using an object-oriented function. A query result is returned indicating a nearest node from the plurality of server nodes. The HTTP request is responded to with a unique hypertext markup language (HTML) web page, and the HTTP request is executed using the nearest node. |
| US10986171B2 |
Method for unified communication of server, baseboard management controller, and server
In a method for unified communication of a server, a baseboard management controller (BMC) receives a first packet sent by a server, and forwards the received first packet to a physical network adapter of the BMC using a preconfigured virtual network adapter, where the first packet includes first management data or service data. The first packet is sent to an external network via the physical network adapter. The virtual network adapter is further configured to send a second packet received by the BMC to a control module of the BMC, and the control module processes the second packet. |
| US10986162B2 |
Implementing a blockchain-based web service
Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for implementing a blockchain-based web service. One of the methods includes receiving a web service request for web data by a blockchain network node of a blockchain network node and from a client device. The web service request is stored in the blockchain network node. The blockchain network node forwards the web service request to a smart contract deployed in a software container on the blockchain network node. The blockchain network node obtains an execution result from the smart contract in response to the web service request, and sends the execution result to the client device. |
| US10986160B2 |
Systems and methods for client-side contextual engagement
Disclosed is a new approach for client-side contextual engagement with a website visitor. A browser loads a page containing a reference to a script file implementing a visitor client. The visitor client may store visitor client data including site rules and a visitor profile locally on the client device. The visitor client may include a context monitor for calling the decision engine, a decision engine for evaluating the site rules relative to a context defined at least partially by events occurring on the page and the visitor profile, and a widget manager for managing visitor client data persisted on the client device. The content monitor may call the decision engine when the context changes. The decision engine may determine, in real time and relative to the context, that proactive or reactive engagement(s) may be appropriate and call the widget manager to launch and display corresponding engagement channel(s) on the page. |
| US10986155B2 |
Segmented video codec for high resolution and high frame rate video
Embodiments disclosed herein provide systems, methods, and computer readable media for a segmented video codec for high resolution and high frame rate video. In a particular embodiment, a method of encoding a composite video stream provides identifying a first portion of an image of a video stream for encoding using first parameters and a second portion of the image of the video stream for encoding using second parameters. The method further provides segmenting the first portion of the image into one or more first tiles and the second portion of the image into one or more second tiles. The method further provides encoding the first tiles using the first parameters and the second tiles using the second parameters and, after the encoding, combining the first tiles and the second tiles into the composite video stream. |
| US10986152B2 |
Method for dynamically managing content delivery
Methods and systems are provided for bitrate adaptation of a video asset to be streamed to a client device for playback. The method includes selecting a representation from a manifest which expresses a set of representations available for each chunk of the video asset and generating a dynamic manifest for the video asset in which the representation selected for the at least one chunk is recommended for streaming to the client device. The selection of the representation recommended for the chunk may be based on at least one of historic viewing behavior of previous viewers of the chunk, content analysis information for the chunk, a level of available network bandwidth, a level of available network storage, and data rate utilization information of network resources including current, average, peak, and minimum data rate of network resources. |
| US10986150B2 |
Load balancing in a dynamic scalable services mesh
The disclosed technology teaches distributed routing and load balancing in a dynamic service chain: receiving and processing a packet, with added header including stream affinity code, at a first service instance and based on processing determining a second service, among available services, that should next handle the packet. The technology teaches accessing a flow table using the stream affinity code in the header to select a service instance performing the second service in the service chain, and routing the packet to the second service instance upon egress from the first service instance. When the flow table lacks an entry for the second service corresponding to the stream affinity code, the disclosed technology teaches accessing a consistent hash table of service instances performing the second service, selecting an available instance, and updating the flow table to specify the second service instance as providing the second service for packets sharing the header. |
| US10986147B2 |
Distributedly synchronized edge playout system
The same sequence of media items is pre-distributed to storage devices at multiple locations. A local program component, including content not in the pre-distributed sequence of media items, is obtained at a first media mixer at a first location. A control signal associated with playout of the pre-distributed media items is obtained at a first processing device co-located with the first media mixer. The local program component is transmitted to a second media mixer located at a second location. Separately from the local program component, the control signal is transmitted from the first processing device to a second processing device, co-located with the second media mixer. The control signal is synchronized to the local program component at the second location to generate a synchronized media program control. The pre-distributed sequence of media items is mixed with the local program component as directed by the synchronized media program control. |
| US10986143B2 |
Switch controller for separating multiple portions of call
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for collecting call data, feeding call data to applications, and providing advanced call features. |
| US10986139B2 |
Micro-segmentation in virtualized computing environments
Example methods are provided for an entity to perform micro-segmentation in a virtualized computing environment that includes multiple hosts. The method may comprise obtaining application implementation information associated with one or more applications implemented by multiple virtualized computing instances, each of the multiple virtualized computing instances being supported by one of the multiple hosts. The method may further comprise detecting micro-segments by clustering the multiple virtualized computing instances based on the application implementation information, and determining security policies for respective detected micro-segments. Each of the detected micro-segments may include one or more of the multiple virtualized computing instances that have more similarity compared to those in a different detected micro-segment. |
| US10986138B2 |
System and method for adaptively determining an optimal authentication scheme
A method and a system for determining an optimal authentication scheme for an authenticating system. Embodiments may include: receiving, from the authenticating system an identity of a user requiring access to the authenticating system and a policy of the authenticating system; receiving, from a storage device, data including historical information regarding previous authentication attempts by the user; producing a list including an optimal selection of one or more authentication schemes, each including one or more authentication factors, according to the historical information and the authenticating system policy; and sending the selection list of one or more authentication schemes to the authenticating system. |
| US10986135B2 |
Advanced asset tracking and correlation
A security management system may be remotely deployed (e.g., using a cloud-based architecture) to add security to an enterprise network. For example, the security management system may scan assets within the enterprise network for vulnerabilities and may receive data from these scans. The security management system may also receive data from other sources, and, as a result, the system may handle data having many different formats and attributes. When the security management system tries to associate data to assets, there may not be a globally unique identifier that is applicable for all received data. Provided in the present disclosure are exemplary techniques for tracking assets across a network using an asset correlation engine that can flexibly correlate data with assets based on attribute information. |
| US10986129B1 |
Live deployment of deception systems
Disclosed herein are methods, systems, and processes to perform live deployment of deception computing systems. An imminent or ongoing malicious attack on a protected host in a network is detected. In response to detecting the imminent or ongoing malicious attack, personality characteristics of the protected host are cloned and a honeypot clone based on the personality characteristics is generated. The honeypot clone is then deployed in the network. A determination is made that the malicious attack includes an interactive session between an attacker associated with the malicious attack and the protected host, and a live state transition is performed between the protected host and the honeypot clone using agent data if the interactive session includes an encrypted protocol or using session state data if the interactive session does not include the encrypted protocol. Attacker data traffic associated with the malicious attack is redirected from the protected host to the honeypot clone and the interactive session is resumed if the redirection of the attacker traffic data transitions within a predetermined time period. |
| US10986123B2 |
Passive and active identity verification for online communications
Methods, systems, and computer program products for performing passive and active identity verification in association with online communications. For example, a computer-implemented method may include receiving one or more electronic messages associated with a user account, analyzing the electronic messages based on a plurality of identity verification profiles associated with the user account, generating an identity trust score associated with the electronic messages based on the analyzing, determining whether to issue a security challenge in response to the electronic messages based on the generated identity trust score, and issuing the security challenge in response to the electronic messages based on the determining. |
| US10986121B2 |
Multivariate network structure anomaly detector
A multivariate anomaly detector can detect a cyber-attack using incremental malicious actions distributed across multiple devices in a network. A multivariate anomaly detector can collect input data describing communication connections between devices in the network. The multivariate anomaly detector can group the input data into a graph data batch based on a fixed batch increment of time to identify incremental actions. The multivariate anomaly detector can calculate a multivariate centrality score for two or more devices based on the graph data batch describing device centrality to the network. The multivariate anomaly detector can identify whether the two or more devices are in an anomalous state from normal device network interactions based on the multivariate centrality score to identify malicious activity distributed across multiple devices in the network. The multivariate anomaly detector can identify a cyber-attack upon identifying the incremental malicious actions distributed across multiple devices in the network. |
| US10986112B2 |
Method for collecting cyber threat intelligence data and system thereof
Disclosed herein are a method and system for collecting cyber threat intelligence (CTI) data. The system includes a management server that determines agent configuration values associated with an OSINT providing source, an agent that receives the agent configuration values from the management server, performs a data collection task for collecting the CTI data based on the agent configuration values, and transmits the CTI data and data collection status information to the management server, a threat information database where which the CTI data is logged, and a system database where the data collection status information is logged. |
| US10986111B2 |
Displaying a series of events along a time axis in enterprise threat detection
One or more entities are selected for which logged Events are to be displayed in an Event Series Chart. One or more filters and a timeframe are selected. Events are fetched from one or more selected log files based on the one or more selected filters and the timeframe. The fetched Events are displayed in an Event Series Chart according to an associated timestamp and identification Event property value associated with each fetched Event. |
| US10986107B2 |
Systems and methods for detecting anomalous software on a programmable logic controller
There is provided a method including: during a training period, collecting a plurality of scan cycle times of a programmable logic controller (PLC) program executing on a PLC; calculating one or more baseline parameters based on the plurality of scan cycle times; determining a baseline PLC program signature based on the one or more baseline statistical parameters; and storing the baseline PLC program signature. |
| US10986105B2 |
Unauthorized communication detection method, unauthorized communication detection system, and non-transitory computer-readable recording medium storing a program
An unauthorized activity detection method in an onboard network system. The detection method includes determining whether or not a message sent out onto the network is an attack message, saving information relating to the attack message in at least one memory in a case where the message is an attack message, identifying a communication pattern from information relating to the attack message, and determining whether or not the message matches a communication pattern. The determination of whether an attack message and determination of whether matching a communication pattern are executed on each of a plurality of messages received from the network. In the determining of whether an attack message executed on a message received after executing of determining of whether matching a communication pattern, results of the determination of whether an attack message that has already be executed are used. |
| US10986100B1 |
Systems and methods for protecting website visitors
The disclosed computer-implemented method for protecting website visitors may include (i) retrieving an instance of a website that was dynamically generated by aggregating multiple website subcomponents, (ii) decomposing the instance of the website into the multiple website subcomponents, (iii) checking whether a website subcomponent has been previously scanned by a security scanner, (iv) accelerating a review of the instance of the website by reusing results of a previous scan of the website subcomponent that was performed in response to retrieving a different instance of the website subcomponent rather than performing an original scan of the website subcomponent, and (v) protecting a visitor of the website by modifying a display of the instance of the website based on the accelerated review of the instance of the website that reused results of the previous scan of the website subcomponent. Various other methods, systems, and computer-readable media are also disclosed. |
| US10986098B2 |
Reverse identity federation in distributed cloud systems
The current document is directed to reverse federated identity-management systems and to reverse-federated-identity-management methods employed by the reverse federated identity-management systems. The currently disclosed reverse-federated-identity-management systems automatically provision local proxy identities in distributed computers systems from which distributed resource-distribution systems allocate resources on behalf of users and clients of the distributed resource-distribution systems. In addition, the currently disclosed reverse-federated-identity-management systems automatically record associations of local proxy identities with users and clients of the distributed resource-distribution systems so that the users can be subsequently identified to auditing and monitoring organizations should the need for detailed auditing and monitoring subsequently arise. |
| US10986095B2 |
Systems and methods for controlling network access
A computing device obtains a request from a user device to access a network beacon. The computing device obtains a device profile for the user device. The computing device determines whether the user device satisfies an authorization rule based on the state of the user device as indicated by the device profile. The computing device authorizes the user device to access the network beacon responsive to determining that the user device satisfies the authorization rule. |
| US10986093B2 |
Monitoring device, monitoring method, and computer program
The monitoring device includes a receiver and a processor. The receiver receives a frame from a communication network. The processor performs a first determination that determines whether the frame is illegal based on a result of message authentication for the frame and a second determination that determines whether the frame is illegal based on a state of the frame and a predetermined rule. In addition, the processor executes, in accordance with a combination of a result of the first determination and a result of the second determination, at least one of processing for the frame, processing for a transmission source device of the frame, change of contents to be notified to an external device, and change of priority of notification to the external device. |
| US10986091B2 |
Systems and methods of serverless management of data mobility domains
Techniques for managing data mobility domains in storage system environments. The techniques employ a multiple master approach, in which each storage system in a storage system domain can function as an owner of the domain. Each domain owner has privileges pertaining to addition of new members to the domain, removal of members from the domain, and modification of domain credentials. When a new storage system is added as a member of the domain, the domain credentials are provided from the domain owner to the new storage system, resulting in the domain credentials being shared among all members of the domain. Domain membership information is also shared among all members of the domain. In this way, the management of storage system domains can be achieved without the need of a domain management server, avoiding a single point of failure or latency and reducing the complexity/cost associated with the domain management server. |
| US10986090B1 |
Security orchestration and automation using biometric data
Disclosed herein are methods, systems, and processes for facilitating security orchestration, automation, and response (SOAR) in cybersecurity computing environments that use biometric data or implement biometric data gathering. An instruction is periodically transmitted to a protected computing device to perform a security scanning operation that captures biometric data generated from a biometric device associated with the protected computing device. The biometric data received from the protected computing device includes a biometric identity of a trusted user or an untrusted user. A security database is accessed to determine whether the biometric identity matches a stored biometric identity of the trusted user. A security workflow that includes orchestrated security operations configured to identify the untrusted user and to prevent the untrusted user from accessing the protected computing device if the biometric identity does not match the stored biometric identity is generated and transmitted to the protected computing device. A confirmation is received from the protected computing device that the orchestrated security operations have been performed. |
| US10986089B2 |
Virtual mobile device system and method thereof
A system and method are disclosed for virtual replication of a user's mobile device using a plurality of master and auxiliary host servers, a failover server, and connectivity to network and telephony, mobile voice and text services. According to one example embodiment, a user of a mobile device creates an account on the master host server via a mobile device application that uploads the data and settings of the mobile device to the master host server. The master host server via a master controller distributes the user data and settings among the plurality of the auxiliary host servers, where the user data and settings are combined into a mobile device image that is optionally compressed, mirrored, split, and stored in a plurality of storage facilities among the auxiliary host servers. Upon single or two-factor authentication, the user who no longer has access to their mobile device, accesses the host server via a client device's browser interface and gains access to the mobile device image via replication and hosting in an auxiliary host server optimally selected by the master host server. When the auxiliary host servers are unreachable, the user requests through a secondary channel for communication to the help facility that is a separately enabled process. The replicated mobile device images provide the user with access to the data and functionality of their original mobile device and the changes are stored in an updated mobile device image. Upon request by the user, the most recent version of the mobile device image is transferred to either the original mobile device for further use, or to a new mobile device in the event the user replaced the original. |
| US10986088B2 |
Methods and apparatus for account linking
Apparatus and methods are provided for enabling a plurality of applications running on a user device or in communication therewith to share data. In one exemplary embodiment, a single user device is configured to run a plurality of heath-monitoring applications which collect data from a respective plurality of health-monitoring devices and/or via user entry. According to the present disclosure, once the applications are linked, the user accesses, views, and analyzes the plurality of health-related data from the plurality of applications at a single application. Moreover, once the applications are linked, the user may sign-in to one application and be automatically signed into the other applications. In this manner, the user's activity and updated information entered, sensed, or otherwise collected into or by one application may be accessible at the other applications for analysis and display therein as well. |
| US10986087B2 |
Motion based authentication
A method for authenticating a user is presented. Responsive to a request for access to a computer resource, a computer system prompts the user making the request to access the computer resource to perform a new motion in an environment in which the user is monitored by a sensor system. Detected biometric data in the new motion performed by the user is identified by the computer system. A determination is made as to whether the user performing the new motion is an authenticated user based on comparing the detected biometric data with stored biometric data for a prior motion performed by the authenticated user. The computer system provides access to the computer resource when the user is identified as the authenticated user. |
| US10986084B1 |
Authentication data migration
Disclosed herein are embodiments of systems, methods, and products comprises an analytic server, which retains the old passwords during security system migration. The analytic server receives strings corresponding to passwords from an old system. When a user issues a login request after the system migration, the analytic server determines the input password and computes a second string based on the input password. By comparing the second string with the string received from the old system, the analytic server determines whether input password is correct. If the second string and the received string match, the analytic server determines that the input password is the actual password and replaces the received string with the input password. In this way, the analytic server obtains the actual password, which is the original password. As a result, the analytic server retains the old password during the system migration. |
| US10986083B2 |
Hardware identification-based security authentication service for IoT devices
A method, a device, and a non-transitory storage medium are provided to store a hardware identifier that uniquely identifies an IoT device; perform an attachment procedure with a wireless network, wherein the attachment procedure includes authenticating the IoT device by the wireless network and establishing a bearer connection; establish a secure channel with an authentication device via the bearer connection, in response to successfully completing the attachment procedure; transmit, to the authentication device, a first request to authenticate the IoT device, wherein the first request includes the hardware identifier; receive, from the authentication device, a first response that indicates whether the IoT device is authenticated; and determine that the IoT device is authenticated based on the first response. |
| US10986078B2 |
Adaptive device enrollment
Examples described herein include systems and methods for dynamically determining enrollment requirements and enrolling a user device into a management system. The systems and methods can differ based on the type and version of operating system executing on the user device. With some operating systems, enrollment can be completed through a single application that performs other functionality, such providing single-sign-on access to enterprise resources. With other operating systems, enrollment can be completed by pausing the first application and requiring installation of an agent application to complete enrollment. The determination of how and when to enroll a user device can be done automatically and can be based on an organizational group to which the user belongs. |
| US10986073B2 |
Vaultless tokenization engine
A computer-implemented system for storing computer program instructions, which, when executed by a processor, cause the processor to perform a method of tokenization, the method comprising the steps of receiving a request for tokenization from a user, the request including a Session Token; decoding and validating the Session Token; retrieving a token definition, a token key, and a security policy; appending the user key and the token key to the received value to create an input value; replacing each input value character with a known character to create a replacement input value using a lookup table; generating a secure hash of the replacement input value to create a derived key; substituting characters of the replacement input value with a character from lookup tables to create a third input value; and returning the input value to the user. |
| US10986071B2 |
Systems and methods for ensuring data security in the treatment of diseases and disorders using digital therapeutics
A method that includes receiving patient-generated event data over a network from a patient device associated with a patient having an active digital therapy prescription for treating an underlying disease or disorder. The patient-generated event data is encrypted by the patient device and includes at least one timestamped event related to the active digital therapy prescription. In response to receiving the patient-generated event data, the method includes decrypting, anonymizing, and storing the anonymized patient-generated event data on memory hardware. The method further includes receiving a patient record request over the network from a healthcare provider (HCP) system that requests the patient-generated event data and includes an authentication token. In response to receiving the patient record request, the method includes retrieving and encrypting the anonymized patient-generated event data from the memory hardware using the authentication token. The method also includes transmitting the encrypted patient-generated event data to the HCP system. |
| US10986069B2 |
System for distributing digital media to exhibitors
A system for packaging digital media and distributing digital media to exhibitors is described, which system enables distribution by utilizing media content booking, media content packaging, encryption, and delivery components. |
| US10986066B2 |
Systems, apparatuses, methods, and non-transitory computer readable media for efficient call processing
A system and method for efficient call processing is provided. The system of a server implemented with a computer includes a memory configured to store a computer-readable instruction and at least one processor configured to execute the computer-readable instruction. The at least one processor includes a push request controller configured to control the server to request a push server to provide push notification to a terminating electronic device corresponding to an outgoing request of an originating electronic device and a call management controller configured to control the server to establish a call session between the originating electronic device and the terminating electronic device based on an invite request sent from the terminating electronic device based on the push notification. |
| US10986063B2 |
Methods and systems for providing supplemental data
Methods and systems for providing supplemental data are disclosed. An exemplary method can comprise determining content currently being consumed by a user, determining one or more user preferences for display of supplemental data, retrieving supplemental data according to the one or more user preferences, and providing the supplemental data to the user concurrently with the content currently being consumed. |
| US10986062B2 |
Subscription transfer
One or more computing devices, systems, and/or methods for transferring subscriptions are provided. For example, a user (e.g., and/or a device associated with the user) of a communication platform may request to transfer a plurality of subscriptions from a first account to a second account. Access information associated with the first account may be used to access a first storage space of the first account, the plurality of subscriptions may be identified based upon the first storage space, and the plurality of subscriptions may (e.g., concurrently) be transferred from the first account to the second account. |
| US10986059B2 |
System event notification
The subject matter disclosed herein provides methods for distributing notifications to a user. The method can include receiving data encapsulating notifications from a device connected to a network that provide information relating to the device's status. The device can provide a health related treatment. The method can associate each notification with one or more notification categories relating to a function performed by the device or a location of the device. A table of users having one or more subscriptions to these notification categories can be accessed. The subscriptions can be automatically assigned to users based on the users' role. A user can be identified from the table to distribute the one or more notifications to. The user can have a subscription that matches a notification category of the received notifications, and data comprising the notifications can be distributed to the user. Related apparatus, systems, techniques, and articles are also described. |
| US10986055B2 |
Systems and methods for controlling user contacts
Systems and methods for controlling contacts with a client's users make use of segment-based contact limits. A contact limit sets a maximum number of contacts that a client can have with a user within a predetermined time window. A segment-based contact limit only applies the contact limit to a subset of all the client's users. The type of contact being limited could include messages that are sent to the user or advertising or sales campaigns that are conducted for the user. A segment is a subset of all of the client's users, and a segment may be defined based on one or more filters. |
| US10986054B1 |
Email alert for unauthorized SMS
The disclosed techniques enable selective forwarding and blocking of text messages directed to an alias phone number based on a whitelist, as well as email alerts triggered by text messages from unauthorized originating numbers. More generally, the disclosed techniques enable an enterprise system to store contact phone numbers (i.e., alias phone numbers) for users while avoiding storing and managing personal phone numbers for the user. For example, the enterprise system may forward personal phone numbers to an aliasing server configured to generate alias phone numbers based on the personal phone number. The aliasing server may operate as a “middle man” that receives text messages directed to the alias phone number and that forwards the text messages to the personal phone number when appropriate. The enterprise system may store and maintain the alias phone numbers in lieu of the personal phone numbers. |
| US10986044B2 |
Low latency data synchronization
In some examples, a computing device for processing data streams includes storage to store instructions and a processor to execute the instructions. The processor is to execute the instructions to receive respective data streams provided from a plurality of data producer sensors. The processor is also to execute the instructions to stagger a time of triggering of a first of the plurality of data producer sensors relative to a time of triggering of a second of the plurality of data producer sensors to minimize a concurrency of data frames of the data stream received from the first data producer sensor and data frames of the data stream received from the second of the plurality of data producer sensors. The processor is also to execute the instructions to process the data streams from the plurality of data producer sensors in a time-shared manner. The processor is also to execute the instructions to provide the processed data streams to one or more consumer of the processed data streams. |
| US10986039B2 |
Traffic broker for routing data packets through sequences of in-line tools
Embodiments are disclosed for a network switch appliance with a traffic broker that facilitates routing of network traffic between pairs of end nodes on a computer network through a configurable sequence of in-line tools. |
| US10986037B2 |
On-demand access to compute resources
Disclosed are systems, methods and computer-readable media for controlling and managing the identification and provisioning of resources within an on-demand center as well as the transfer of workload to the provisioned resources. One aspect involves creating a virtual private cluster within the on-demand center for the particular workload from a local environment. A method of managing resources between a local compute environment and an on-demand environment includes detecting an event associated with a local compute environment and based on the detected event, identifying information about the local environment, establishing communication with an on-demand compute environment and transmitting the information about the local environment to the on-demand compute environment, provisioning resources within the on-demand compute environment to substantially duplicate the local environment and transferring workload from the local-environment to the on-demand compute environment. The event can be a threshold or a triggering event within or outside of the local environment. |
| US10986034B2 |
Systems and methods for common policy platform
A converged small cell communication system includes a mobile network core, a data over cable service interface specification (DOCSIS) core, and a common policy platform for managing a service flow of a user equipment within a communication vicinity of the small cell communication system. The mobile network core includes a policy engine and a packet data network gateway (PGW). The DOCSIS core includes a packetcable multimedia (PCMM) unit having a policy server and an application manager, and a cable modem termination system (CMTS). |
| US10986026B2 |
Proportional integral based shaper for lossless output buffer
A network device includes network ports to communicate with source devices and destination devices. The network device receives respective packets from each source device and, for each source device, respectively performs the following operations. The network device stores the respective packets in a shared memory that stores all packets from all of the source devices, and dequeues the respective packets from the shared memory to send the packets to destination devices. Responsive to the storing and the dequeuing, the network device respectively increases and decreases an input packet count for the source device. The network device determines for the source device a packet sending rate based on the input packet count and a flow control threshold common across all of the source devices in accordance with a proportional integral (PI) control equation. The network device transmits to the source device a control message including the packet sending rate. |
| US10986024B1 |
Dynamic prefix list for route filtering
In general, techniques are described for a dynamic prefix list for route filtering. In one example, a network device comprises a control unit comprising one or more processors; one or more interface cards coupled to the control unit; a routing protocol process configured to execute on the control unit to exchange, using the interface cards, routing protocol advertisements with a peer network device in accordance with a routing protocol; and a configuration database comprising a routing policy that references a dynamic prefix list comprising one or more prefixes. The routing policy includes at least one action for application to routes for import or export, by the network device via a routing protocol, that match any of the one or more prefixes of the dynamic prefix list. The dynamic prefix list comprises a routing table to store the one or more prefixes, the routing table separate from the configuration database. |
| US10986022B2 |
Congestion control for LTE-V2V
Improvements may be made for an apparatus performing congestion control considering different technologies, types of radio resources, and priorities of different packets. The apparatus may be a UE. The UE determines a channel busy ratio (CBR). The UE determines one or more channel resource utilization limits based on the CBR, where each channel resource utilization limit of the one or more channel resource utilization limits corresponds to a respective packet priority. The one or more channel resource utilization limits are also a function of a CBR limit. The UE controls transmission of a plurality of packets based on the one or more channel resource utilization limits, and each packet of the plurality of packets has a respective packet priority. |
| US10986019B2 |
IP address and routing schemes for overlay network
A communication system includes multiple Point-of-Presence (POP) interfaces distributed in a Wide-Area Network (WAN), and one or more processors coupled to the POP interfaces. The processors are configured to assign to an initiator in the communication system a client Internet Protocol (IP) address, including embedding in the client IP address an affiliation of the initiator with a group of initiators, to assign to a responder in the communication system a service IP address, including embedding in the service IP address an affiliation of the service with a group of responders, and to route traffic between the initiator and the responder, over the WAN via one or more of the POP interfaces, in a stateless manner, based on the affiliation of the initiator and the affiliation of the service, as embedded in the client and service IP addresses. |
| US10986017B2 |
Large-scale real-time multimedia communications
A method, an apparatus, and a system for real-time multimedia communications using a software-defined network (SDN) are provided. The method includes receiving, by a processor, a path metric indicative of transmission capacity between directly-connected service nodes in the SDN, determining, by the processor based on the path metric, a cascade network topology comprising an optimal path between a first edge node and a second edge node, wherein the optimal path has the lowest transmission latency among data transmission paths in the SDN between the first edge node and the second edge node, and based on a determination that multimedia data is to be transmitted between the first edge node and the second edge node, transmitting the multimedia data between the first edge node and the second edge node in accordance with the optimal path. |
| US10986016B2 |
User-based differentiated routing system and method
A differentiated routing system includes an electronic service in communication with an ingress gateway that receives a communication service, such as a call from a terminal, over a trunk. The service receives a request from the ingress gateway for establishing a communication service for the calling party terminal. The service obtains information associated with the calling party terminal, which may be based on the trunk and its relationship to a customer, in which the information is to be used for applying at least one of a routing decision and policy decision to the communication service, and appends a tag to the request based on the information. The service may then transmit the request appended with the information to a routing device, which may then use the information when providing the service. |
| US10986013B1 |
Fault injection service
A collection of fault categories, including faults associated with internal resources at a provider network, is presented via an interface of a fault injection service. A fault injection mode, selected from a set which comprises a non-randomized mode, to be used to inject faults into a target environment is determined. Fault injection agents introduce faults into the target environment in accordance with the fault injection mode. |
| US10986011B2 |
Unobtrusive support for third-party traffic monitoring
System utilization related to memory usage can be monitored by storing host memory usage information in the corresponding host physical memory. However, retrieving this information can be a high overhead operation because it involves engaging with the operating system of each host. Moreover, storing memory usage information in the host physical memories can pose a security risk if they also store privileged data. Network interfaces according to the present disclosure provide unobtrusive and secure support for monitoring of network and other system resources such as regions of memory within host physical memories. Implementations according to the present disclosure include a plurality of memory region counters stored on a network interface. Each memory region counter corresponds to one of the memory regions located in a physical memory of a host coupled to the network interface. Each of the counters includes a system utilization metric associated with its corresponding memory region. |
| US10986010B2 |
Mobility network slice selection
Core network slices that belong to a given operator community are efficiently tracked at the network control/user plane functions level, with rich data analytics in real-time based on their geographic instantiations. In one aspect, an enhanced vendor agnostic orchestration mechanism is utilized to connect a unified management layer with an integrated slice-components data analytics engine (SDAE), a slice performance engine (SPE), and a network slice selection function (NSSF) in a closed-loop feedback system with the serving network functions of one or more core network slices. The tight-knit orchestration mechanism provides economies of scale to mobile carriers in optimal deployment and utilization of their critical core network resources while serving their customers with superior quality. |
| US10986009B2 |
Cross-layer troubleshooting of application delivery
Techniques for cross-layer troubleshooting of application delivery are disclosed. In some embodiments, cross-layer troubleshooting of application delivery includes collecting test results from a plurality of distributed agents for a plurality of application delivery layers; and generating a graphical visualization of an application delivery state based on the test results for the plurality of application delivery layers (e.g., different application delivery layers). |
| US10986006B2 |
Performance analysis method and management computer
A performance analysis method of a computer system using a management computer. The management computer includes: a processor; and a memory device in which a program to be executed by the processor is stored. The computer system is constituted by a plurality of resources. The processor divides the plurality of resources into a plurality of resource groups based on a correlation of changes in performance data between the resources, and analyzes the performance data for each of the divided resource groups. |
| US10986005B2 |
Technologies for dynamically managing resources in disaggregated accelerators
Technologies for dynamically managing resources in disaggregated accelerators include an accelerator. The accelerator includes acceleration circuitry with multiple logic portions, each capable of executing a different workload. Additionally, the accelerator includes communication circuitry to receive a workload to be executed by a logic portion of the accelerator and a dynamic resource allocation logic unit to identify a resource utilization threshold associated with one or more shared resources of the accelerator to be used by a logic portion in the execution of the workload, limit, as a function of the resource utilization threshold, the utilization of the one or more shared resources by the logic portion as the logic portion executes the workload, and subsequently adjust the resource utilization threshold as the workload is executed. Other embodiments are also described and claimed. |
| US10986004B2 |
Sorting and displaying network traffic analytics
A method including: in a network element that includes one or more hardware memory resources of fixed storage capacity for storing data used to configure a plurality of networking features of the network element and a utilization management process running on the network element, the utilization management process performing operations including: obtaining a plurality of entries of the one or more hardware memory resources representing utilization of the one or more hardware memory resources by network traffic passing through the network element; sorting the plurality of entries of the one or more hardware memory resources by statistics associated with the network traffic passing through the network element to produce sorted entries; and sending the extracted to a network management application for display is disclosed. An apparatus and one or more non-transitory computer readable storage media to execute the method are also provided. |
| US10985998B1 |
Domain controller configurability for directories
A managed directory service receives a request to add a domain controller to a directory. In response to the request, the managed directory service determines, based on locations of other domain controllers of the directory, a location for the domain controller. The managed directory service provisions the domain controller at the location and associates the domain controller to the directory. The domain controller is activated in order to perform directory operations for the directory. |
| US10985997B2 |
Systems and methods for domain-driven design and execution of metamodels
An order is received indicating a network service model. A context of the order is identified. A deployment plan is generated using the network service model, the deployment plan facilitating an instantiation of a contextually-motivated network service instance as a set of normalized lifecycle management (LCM) operations performed against each of a plurality of associated service entities. The deployment plan is deployed, the deploying including binding each of the normalized LCM operations, based on the context of the order, to one or more respective micro-capabilities, each of the respective micro-capabilities having previously been onboarded to the system as one or more corresponding modeled objects capable of being declaratively composed, each of the corresponding modeled objects including a mapping of object properties, object behaviors, and standard LCM operations to one or more existing micro-capabilities of the system. The deploying also including managing execution of the one or more respective micro-capabilities and associated resources, associated storage, and associated network and service allocation and configuration, to instantiate the contextually-motivated network service instance. |
| US10985995B2 |
Dynamic engine for matching computing devices based on user profiles and machine learning
A computing platform having at least one processor, a memory, and a communication interface may receive, by the at least one processor, via the communication interface, and from a dynamic data management node, at least one organization computing system data file profile and a plurality of client computing device data file profiles. The computing platform may identify, based on the organization computing system data file profile(s), the client computing device data file profiles, and a machine learning dataset, a potential match between the organization computing system data file profile(s) and the client computing device data file profile(s). The computing platform may establish a connection with the client computing device(s) and, while the connection is established, transmit a notification which, when processed by the client computing device(s), causes the notification to be displayed on the client computing device(s). |
| US10985994B1 |
Simulated incident response using simulated result when actual result is unavailable
Described herein are improvements for generating courses of action for an information technology (IT) environment. In one example, a method includes identifying a first course of action for responding to an incident type in an information technology environment and generating a simulated incident associated with the incident type. The method further includes initiating performance of the first course of action based on the generation of the simulated incident. The method also includes, upon reaching a particular step of the first course of action that prevents the performance of the first course of action from proceeding, providing a first simulated result that allows the performance of the first course of action to proceed. |
| US10985993B2 |
Identifying audiences that contribute to metric anomalies
The present disclosure is directed toward systems and methods for identifying contributing audience segments associated with a metric anomaly. One or more embodiments described herein identify contributing factors based on statistical analysis and machine learning. Additionally, one or more embodiments identify audience segments associated with each contributing factor. In one or more embodiments, the systems and methods provide an interactive display that enables a user to select a particular anomaly for further analysis. The interactive display also provides additional interfaces through which the user can view informational displays that illustrate the factors and segments that caused the particular anomaly and how those factors correlate with each other. |
| US10985991B2 |
Relay device, program, and display control method
A relay device acquires network topology data representing a network topology that includes a connection relationship of each relay device and a connection relationship of a terminal device connected to each relay device in a local area network (LAN), and displays, on a display device, an image of a tree structure in which each relay device included in the LAN corresponds to a node, as an image of the network topology represented by the acquired network topology data. The relay device displays, on the display device, the image of the tree structure in which a node corresponding to a relay device designated in advance among the relay devices included in the LAN and nodes of up to directly below the designated node are set as a drawing target. |
| US10985990B2 |
Software defined topology (SDT) for user plane
A controller and a method for determining a logical topology of communications resources for providing a service offering. The controller comprises a function identifier, a graph generator and a mapper. The identifier is coupled to a service level description (SLD) associating the service with at least one service type and a library of network functions (NFs) and identifies at least one NF in the library for each service type. The generator is coupled to the SLD and a library of primitive service level graphs (SLGs) representing at least one data flow between directly-coupled resource entities and associates at least one primitive SLG to each identified NF. The mapper is coupled to the service level description and a map of network infrastructure elements and maps at least one resource entity of a primitive SLG onto an available network infrastructure element. |
| US10985982B2 |
Proximal playback devices
Systems and methods disclosed herein include, determining a proximity of the first networked device to a second networked device, determining whether there is a wired network connection existing between the first networked device and the second networked device, and in response to determining the proximity and the existence of a wired network connection, reconfiguring one or more operational parameters of one or both of the first networked device and the second networked device. |
| US10985978B2 |
System and method for first time automatic on-boarding of Wi-Fi access point
A Wi-Fi access point device is provided for use with a Wi-Fi communication device that is operable to transmit a login signal and to transmit a reconfiguration signal. The Wi-Fi access point device includes a memory having onboarding configuration information stored therein, an initialization component to generate an initialization signal, an onboarding component to generate an onboarding signal based on the onboarding configuration information; a Wi-Fi communication component to transmit the onboarding signal, based on the initialization signal, by way of a beacon management frame, to receive the login signal and to receive the reconfiguration signal; and a Wi-Fi network creating component to create a Wi-Fi network based on the login signal and to modify the Wi-Fi network. |
| US10985974B2 |
Selectable declarative requirement levels
Constraints are stored. A plurality of processing stages is processed. For at least one of the plurality of processing stages, an input declarative requirement is utilized with at least some of the constraints to determine an output declarative requirement that is at a different level than a level of the input declarative requirement. At least a portion of the plurality of processing stages are utilized to at least in part automatically configure a computer network. |
| US10985973B2 |
System for connecting and controlling multiple devices
The present invention provides a platform that enables devices, services and applications to be connected together. An in-home gateway device provides the hub for this connectivity, by connecting and coordinating in-home (and/or in-office) devices and cloud-based services. Creating a “connected environment” via this platform requires coordinating multiple device manufacturers and service providers, and multiple standards/protocols. Advantageously, the platform removes the requirement for different manufacturers of different devices to adopt common protocols to enable device connection, and further, the platform removes the burden of configuration away from the consumer. |
| US10985972B2 |
Distributed system of home device controllers
A home device controller can receive inputs on a touch control mechanism from a user to control a selected home device in a local network of the home device controller. The controller can generate a set of control commands based on the inputs, and transmit the set of control commands to the selected home device for execution. The controller can publish state data indicating a state of the selected home device, following execution of the set of control commands, to a message bus of the distributed system, the message bus being accessed by each of the plurality of home device controllers to mitigate or resolve fault conditions occurring with any of the home controllers in the distributed system. |
| US10985971B2 |
System and method for replacing media content
Aspects of the subject disclosure may include, for example, determining a satellite service channel that provides a first media content item for processing by a media processor for presentation by equipment of a user. A terrestrial service source is identified that provides a second media content item via a terrestrial service. A portion of the second version of the media content item is buffered for subsequent processing by the media processing device for presentation in place of the first version of the media content item responsive to an unavailability of the satellite service channel Other embodiments are disclosed. |
| US10985969B2 |
Systems and methods for a virtual network assistant
Methods and apparatus for identifying the root cause of deterioration of system level experience (SLE). Offending network components that caused the SLE deterioration are identified and corrective actions are taken. |
| US10985966B2 |
Terminal and communication method
A terminal is disclosed, which is capable of appropriately distributing transmission power when transmission time interval (TTI) lengths are different. A transmission-power determining section (211) determines transmission power for an uplink signal in a first TTI and an uplink signal in a second TTI shorter in TTI length than the first TTI, when the second TTI uplink signal occurs during a first interval in the first TTI, so as to keep the transmission power for the first reference signal and the first TTI uplink signal constant without allocating any transmission power to the second TTI uplink signal in the first interval, and to reduce the transmission power for the first TTI uplink signal to allocate transmission power to the second TTI uplink signal in a second interval which is subsequent to the first interval in the first TTI. |
| US10985964B2 |
Techniques for selecting subcarrier spacing for signal detection
Techniques are described herein that allow a user equipment (UE) to configure a subcarrier spacing value while monitoring synchronization signals of neighboring cells. In some wireless communication systems, synchronization signals in given radio frequency spectrum band may be transmitted using one of a plurality of different subcarrier spacings. In some cases, a network entity, such as a base station, may transmit an indication to the UE that indicates the subcarrier spacing used by a cell to transmit a specific set of synchronization signals. In some cases, the UE may select a subcarrier spacing based on a database of subcarrier spacings stored locally by the UE. In some cases, the UE may select the subcarrier spacing based on a predetermined configuration. |
| US10985961B1 |
Efficient synthesis and analysis of OFDM and MIMO-OFDM signals
Disclosed techniques for improving computational efficiency can be applied to synthesis and analysis in digital signal processing. A base discrete-time Orthogonal Frequency Division Multiplexing (OFDM) signal is generated by performing an inverse discrete Fourier transform (IDFT) on a set of data symbols. The set of data symbols is multiplied with a sparse update weight matrix to produce an update signal, and an IDFT is performed on the update signal to generate a discrete-time update signal. The discrete-time update signal is summed with the base discrete-time OFDM signal to produce an updated discrete-time OFDM signal. |
| US10985956B2 |
Pre-allocated random access identifiers
Systems and methods of pre-allocating identifiers to wireless devices for use in requesting resources over a random access channel are described. A wireless communication system includes a random access channel over which wireless devices can anonymously send requests for resources. The base stations receiving and processing the anonymous requests reduces the probability of random access channel collisions and conserves the resources needed to support the anonymous requests by pre-allocating one or more identifiers to select wireless devices. The wireless devices having the pre-allocated codes can transmit a particular code over the random access channel as a request for resources that uniquely identifies the requester. |
| US10985953B2 |
Channel equalization for multi-level signaling
A memory interface may include a transmitter that generates multi-level signals made up of symbols that convey multiple bits of data. The transmitter may include a first data path for a first bit (e.g., a least significant bit (LSB)) in a symbol and a second data path for a second bit (e.g., the most significant bit (MSB)) in the symbol. Each path may include a de-emphasis or pre-emphasis buffer circuit that inverts and delays signals received at the de-emphasis or pre-emphasis buffer circuit. The delayed and inverted data signals may control de-emphasis or pre-emphasis drivers that are configured to apply de-emphasis or pre-emphasis to a multi-level signal. |
| US10985950B2 |
Apparatus and method for performing radio communication
An apparatus including: a communication unit configured to perform radio communication; and a control unit configured to perform control such that control information regarding a filter length of a filter for limiting a width of a guard band in a frequency band to be used in the radio communication is transmitted to an external apparatus through the radio communication. The filter length is determined in accordance with at least one of a frequency resource and a time resource for the radio communication. The apparatus enables a filter improving frequency use efficiency. |
| US10985942B2 |
Multicast traffic steering using tree identity in bit indexed explicit replication (BIER)
Methods and network devices are disclosed for multicast traffic steering in a communications network. In one embodiment, a method includes receiving, at a node in a network, a multicast message comprising an incoming message bit array and a tree identifier value. The embodiment further includes selecting a bit indexed forwarding table stored at the node and corresponding to the tree identifier value, accessing within the selected forwarding table an entry corresponding to an intended destination node for the message, and forwarding, to a neighboring node identified in the accessed entry, a copy of the message comprising a forwarded message bit array in place of the incoming message bit array. An embodiment of a network device includes one or more network interfaces and a processor adapted to perform steps of the method. |
| US10985938B2 |
Smart building visual and contextual team identification system and method
A project team identification tool utilizes media components and sensors installed throughout a smart building, to detect individual persons and groups of people gathered together within the smart building. After detecting the people that are present within the smart building, the PTI tool references employee profile information to identify the detected people. The PTI tool is further configured to predict a project team the identified people belong to, as well as one or more projects associated with the predicted project teams. The PTI tool utilizes the advanced technology offered by the smart building to provide a unique solution for seamlessly identifying a project team of people meeting within the smart building. |
| US10985933B1 |
Distributed push notifications for devices in a subnet
A distributed notification system is described herein. A distributed notification grouping can be created in which a master device is appointed for a subnet. The master device can poll a server periodically on behalf of peer or slave devices so that the peer or slave devices do not poll the server unless they are appointed as the master or are retrieving notification data from the server. |
| US10985917B2 |
Physical, tamper-evident cryptocurrency card
A physical currency card (in some cases without any on-board source of power or computing capabilities) is configured to maintain access information for digital bearer assets. Public access information, like a cryptographic hash address operable to receive digital bearer assets or a public key operable to derive a cryptographic hash address operable to receive digital bearer access, may be visible upon inspection of the card such digital bearer assets may be transferred to the card in one or more transactions on a decentralized computing platform, like a blockchain-based decentralized computing platform. Private access information, like a secret, private key that corresponds to the public key (e.g., a public-private key-pair) or a representation of the private key (like a ciphertext thereof) and corresponding encryption key, is physically concealed with tamper-evident components such that a user can readily determine whether the private access information was divulged. |
| US10985908B2 |
Data storage method, data query method and apparatuses
A data storage method comprises sending, by a blockchain node associated with a blockchain, data to an encryption device to cause the encryption device to encrypt the data and return the encrypted data to the blockchain node; receiving the encrypted data returned by the encryption device; and sending the encrypted data to other blockchain nodes associated with the blockchain to cause each of the other blockchain nodes to store the encrypted data in the blockchain after performing consensus verification on the encrypted data with success. |
| US10985907B2 |
Identifying faults in a blockchain ordering service
An example operation may include one or more of initiating a timer to begin timing an audit procedure, when the timer expires after a predefined period of time, randomly selecting a committer node member of a blockchain, transmitting a request for a hash of a blockchain block, comparing the hash of the blockchain block, received from the randomly selected committer node, to a known value of the hash of the blockchain block, and determining whether the hash of the blockchain block received matches the known value of the hash of the blockchain block. |
| US10985905B2 |
Strong fully homomorphic white-box and method for using same
A fully homomorphic white-box implementation of one or more cryptographic operations is presented. This method allows construction of white-box implementations from general-purpose code without necessitating specialized knowledge in cryptography, and with minimal impact to the processing and memory requirements for non-white-box implementations. This method and the techniques that use it are ideally suited for securing “math heavy” implementations, such as codecs, that currently do not benefit from white-box security because of memory or processing concerns. Further, the fully homomorphic white-box construction can produce a white-box implementation from general purpose program code, such as C or C++. |
| US10985899B2 |
Network node, wireless device and methods therein relating to time division duplex configurations for narrowband Internet of Things
A method in a network node is provided. The method comprises determining (1304) a frame structure configuration for a narrowband Internet of Things (NB-IoT) system operating in time division duplex (TDD) mode. The frame structure comprises a plurality of subframes. The plurality of subframes comprises at least one of each of a downlink subframe, an uplink subframe, and a special subframe comprising a gap period during which no transmission occurs. The plurality of subframes is arranged such that the frame structure configuration is compatible with an uplink configuration of the NB-IOT system, e.g. having a subcarrier spacing of 3.75 kHz. The method further comprises communicating the determined frame structure configuration to a wireless device operating in the NB-IoT system. |
| US10985898B2 |
Method for mitigating self-interference in FDR communication environment
Disclosed are a method and a base station for mitigating self-interference in which, in a resource region for transmitting a plurality of downlink control channels, an overlap region is configured, the overlap region being a resource region from which the effects of self-interference due to an uplink communication of a terminal must be removed, and the information regarding the overlap region is transmitted to a terminal connected to a base station and communicating via FDR. |
| US10985891B2 |
Method and apparatus for reporting channel state information
A channel state information request requesting a device to feedback channel state information can be received. Whether the channel state information request corresponds to regular latency based operation or reduced latency based operation can be determined. Channel state information can be derived based on a first reference resource when the channel state information request corresponds to regular latency based operation. Channel state information can be derived based on a second reference resource when the channel state information request corresponds to reduced latency based operation. The reduced latency based operation can have a latency less than the regular latency based operation. The derived channel state information can be reported to a network. |
| US10985890B2 |
Method of linking extended PUCCH resources for ACK/NACK implicitly to eCCEs used by EPDCCH
The invention proposes a method of linking extended PUCCH resources for ACK/NACK implicitly to eCCEs used by EPDCCH. According to an embodiment of the invention, extended PUCCH resources for ACK/NACK are indexed based on the numbering of eCCEs. As compared with a method of indexing extended PUCCH resources for ACK/NACK through explicit linking, this method of implicit linking can save a significant signaling overhead and facilitate a standardization course. Furthermore this method further addresses the problem in the prior art of the lack of a linkage between extended PUCCH resources for ACK/NACK implicitly to eCCEs used by EPDCCH. |
| US10985887B2 |
Transmission of sounding reference signal and scheduling request in single carrier systems
A transmission of information from a secondary to a primary node occurs in a plurality of transmission instances which are logical time durations. A secondary node receives an allocation of periodic transmission instances for a scheduling request indicator (SRI) and an allocation if periodic transmission instances for a sounding reference signal (SRS). In a particular transmission instance allocated for the transmission of both SRS and SRI, the secondary node transmits the SRI without transmitting the SRS if the SRI indicates a pending scheduling request; otherwise, the secondary node transmits the SRS without transmitting the SRI. |
| US10985883B2 |
Apparatus and method for retransmission in wireless communication system
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). The present disclosure relates to the retransmission in wireless communication system. A method of operating a base station comprises transmitting resource configuration information related to a resource for an initial transmission and a resource for a retransmission to a terminal, receiving initially-transmitted data through a first resource, and receiving retransmitted data through a second resource, if a decoding of the initially-transmitted data fails. The second resource is determined based on the first resource and the resource configuration information. |
| US10985882B2 |
Code block segmentation by OFDM symbol
According to some embodiments, a method in a wireless transmitter of aligning code blocks with modulation symbols comprises: receiving a block of information bits for wireless transmission in a plurality of modulation symbols; partitioning the plurality of modulation symbols into groups of one or more modulation symbols, wherein the modulation symbols in a group are contiguous in time; and assigning each of the information bits to one of the groups. For each of the groups the method further comprises: segmenting the assigned information bits in the group into one or more code blocks; encoding each code block into coded bits; and assigning the coded bits of the one or more code blocks to the group of modulation symbols the information bits are assigned to. The method further comprises transmitting the groups of modulation symbols to a wireless receiver. |
| US10985877B2 |
Codebook determination of HARQ-ACK multiplexing with fallback downlink control information (DCI) and code block group (CBG) configurations
A user equipment (UE) is described. The UE includes a processor and memory in electronic communication with the processor. Instructions stored in the memory are executable to determine a HARQ-ACK codebook size for multiple slots on a single carrier (CC) or one or more slots on multiple carriers. The instructions are also executable to send a single HARQ-ACK report for the multiple slots based on the HARQ-ACK codebook size. |
| US10985874B2 |
HARQ framing and retransmission with two-tier feedback
An example method may include receiving a wireless packet from a sender node at a receiver node that includes a PHY and a MAC. The wireless packet may include multiple codewords. The method may include error checking the codewords at the PHY of the receiver node for codeword-level errors. The method may include generating multiple MPDUs from the codewords. The method may include error checking the MPDUs at the MAC of the receiver node for MPDU-level errors. The method may include generating two-tier feedback based on the error checking at the PHY and the MAC of the receiver node. The method may include sending the two-tier feedback to the sender node. |
| US10985873B2 |
CRC bits for information transmission method and device
Example information transmission methods and devices are disclosed. One example method is applied to a network device and includes determining CRC bits of to-be-sent information bits, concatenating the CRC bits and the to-be-sent information bits to obtain a first information sequence, and interleaving bits in the first information sequence in an interleaving manner or scrambling the bits in the first information sequence in a scrambling manner, to obtain a second information sequence, to ensure that bits at locations of the CRC bits after a cyclic shift cannot check bits at locations of the to-be-sent information bits after the cyclic shift. A cyclic shift is performed on the second information sequence to obtain a third information sequence, where a quantity of cyclically shifted bits is used to carry information about some bits of a system frame number, and the third information sequence is sent. |
| US10985871B2 |
Method to generate ordered sequence for polar codes
A number K of N sub-channels that are defined by a code and that have associated reliabilities for input bits at N input bit positions, are to be selected to carry bits that are to be encoded. A localization area that includes multiple sub-channels and is located below fewer than K of the N sub-channels in a partial order of the N sub-channels is determined based on one or more coding parameters. The fewer than K sub-channels of the N sub-channels above the localization area in the partial order are selected, and a number of sub-channels from those in the localization area are also selected. The selected fewer than K sub-channels and the number of sub-channels selected from those in the localization area together include K sub-channels to carry the bits that are to be encoded. |
| US10985867B2 |
Rate matching resource sets for wireless systems
Methods, systems, and devices for wireless communications are described. A wireless device, such as a UE or base station, may identify a rate matching resource set for a transmission time interval (TTI) of a shared channel, where the rate matching resource set includes a set of symbols of the TTI allocated for rate matching. In some cases, the wireless device may identify a rate matching configuration for the rate matching resource set based at least in part on a multi-TTI grant for the shared channel, and perform rate matching of a set of data for transmission via the TTI based on the rate matching resource set and the rate matching configuration. In some cases, the wireless device may transmit, or receive, the rate-matched set of data via the one or more TTIs, in accordance with the multi-TTI grant, based on communications with another wireless device. |
| US10985866B2 |
Mobile communication transmission using flexible frame structure with variable MCS and TTI length
The invention provides method in a mobile communication system of transmitting data wherein the data is transmitted using a modulation and coding scheme, MCS, which is reconfigurable over a MCS re-configuration cycle length and wherein the data is transmitted using a reconfigurable transmit time interval, TTI, length, the MCS reconfiguration cycle length and the TTI length being different from each other. |
| US10985865B2 |
Flexible uplink/downlink transmissions in a wireless communication system
Apparatuses, methods, and systems are disclosed for flexible uplink/downlink transmissions. One apparatus includes a processor and a memory that stores code executable by the processor. The code, in various embodiments, includes code that determines a frame period length for communication with a user equipment. In a further embodiment, the code includes code that determines an uplink/downlink split pattern to use with the determined frame period length. In certain embodiments, the code includes code that forms at least one message indicating the frame period length and the uplink/downlink split pattern. The apparatus may include a transmitter that provides the at least one message to the user equipment. |
| US10985861B2 |
Energy-efficient reactive jamming of frequency-hopping spread spectrum (FHSS) signals using software-defined radios
A reactive jamming software defined radio (SDR) apparatus to target Frequency Hopping Spread-Spectrum (FHSS) signals includes a peripheral module for SDR processing; a reactive jamming hardware IP core that implements time-sensitive operations on a field programmable gate array (FGPA); and a host computer that implements non-time-critical operations, such as jammer configuration, logging, and strategy composition. |
| US10985860B2 |
Method for managing multi-wavelength passive optical network, and optical module
A method for managing a multi-wavelength passive optical network, comprising: an optical module extracting a module management signal from a reception signal input from an optical signal interface, where the module management signal carries a management message related to the optical module. The solution can solve the problem that an optical module of a multi-wavelength passive optical network in the related art cannot support the smooth upgrade of a related device to the multi-wavelength passive optical network. |
| US10985859B2 |
Optical protection switch with broadcast multi-directional capability
An apparatus includes a first reconfigurable optical add/drop multiplexer (ROADM) to receive a first optical signal and a second ROADM to receive a second optical signal. The apparatus also includes a reconfigurable optical switch that includes a first switch, switchable between a first state and a second state, to transmit the first optical signal at the first state and block the first optical signal at the second state. The reconfigurable optical switch also includes a second switch, switchable between the first state and the second state, to transmit the second optical signal at the first state and block the second optical signal at the second state. The reconfigurable optical switch also includes an output port to transmit an output signal that is a sum of possible optical signals transmitted through the first switch and the second switch. |
| US10985858B2 |
Method for sending random access preamble sequence, device, and system
This application relates to the mobile communications field, and in particular, to a random access technology in a wireless communications system. This application provides a method for sending a random access preamble sequence, an apparatus, and a system. In this solution, a terminal device obtains a cyclic shift value that satisfies a high-speed movement scenario and sends a random access preamble sequence corresponding to the cyclic shift value. Impact brought by the high-speed movement scenario is considered when the random access preamble sequence is determined, thereby avoiding interference between terminal devices in the high-speed scenario. |
| US10985855B2 |
Communication device, method of communication, and computer program product
A communication device of an embodiment includes one or more processors. The processors synchronize time between the communication device and a different communication device using data transmitted and received by time division multiple access. The processors determine the end timing of carrier-sensing in a time slot of the time division multiple access. The processors control carrier-sensing to end at a determined end timing. The processors generate data including timing information, allowing identification of the determined end timing, as data to be transmitted to the different communication device. |
| US10985854B1 |
System and methods of real-time creation of electronic programming guides for radio broadcasts
A method including while receiving a live digital audio stream from one or more remote servers and outputting the live digital audio stream via a speaker of a client device, receiving the updated content schedule from the one or more remote servers, generating and displaying a real-time programming guide user-interface including the updated content schedule, the real-time programming guide user-interface including at least one content segment component corresponding to at least one of the content segment data in the updated content schedule, and, in response to a content selection command at the at least one content segment component, transmitting a content segment digital audio signal request to the one or more remote servers for a prior portion of the live digital audio stream corresponding to the content segment data; and, in response to receiving the prior portion of the live digital audio stream, ceasing outputting the live digital audio stream and outputting the prior portion of the live digital audio stream corresponding to the content segment data. |
| US10985853B2 |
Method and system for real-time broadcast audience engagement
A method and system for real-time broadcast audience engagement independent of the act of broadcasting, means of broadcasting, or broadcasting partner includes providing a list of broadcast shows currently being broadcast live to user, receiving the user's selection of a broadcast show from the list, providing the user with a binary reaction interface for the selected broadcast show, receiving the user's binary reaction based on the user's interaction with the binary reaction interface, and providing the selected broadcast show with one or more metrics of real-time broadcast audience engagement based, at least in part, on the user's binary reaction. |
| US10985852B2 |
Broadcast signal transmission device, broadcast signal reception device, broadcast signal transmission method and broadcast signal reception method
A broadcast signal transmission method includes encoding service data of a service and service layer signaling information that are delivered over a Real-Time Object Delivery over Unidirectional Transport (ROUTE) session, wherein the service layer signaling information includes Layered Coding Transport (LCT) channel information and Media Presentation Description (MPD) information for the service; encoding signaling information for one or more services including the service, wherein the signaling information includes one or more service element entries corresponding to the one or more services, wherein a service element entry corresponding to the service includes service information related to the service, and wherein the service information includes service identification information for identifying the service, first version information for indicating a change of the service information, channel information of the service and address information of the ROUTE session; and transmitting the encoded service data, the encoded service layer signaling information and the encoded signaling information. |
| US10985850B1 |
Media distribution between electronic devices for low-latency applications
A system includes a media distribution device including a first network interface, a second network interface, and a first processor. The first processor configures the first network interface to use a first communication network, and broadcasts, using the first communication network, audio data. The system includes a media device including a third network interface, a fourth network interface, and a second processor. The second processor causes, using the third network interface, the media device to join the first communication network, receives, using the third network interface, a first portion of the audio data, processes the first portion of the audio data to generate first audio output, and transmits, using the fourth network interface, a control signal to the second network interface of the media distribution device. The control signal is configured to cause the first processor to modify an attribute of the audio data or stop broadcasting the audio data. |
| US10985845B2 |
Adaptive equalization filter and signal processing device
Each of a first filter to a fourth filter is an FIR filter having one tap. Each of a fifth filter and a sixth filter is an FIR filter having less than 46 taps. As a result, it is possible to obtain an adaptive equalization filter having a smaller total number of taps than an adaptive equalization filter using an FIR filter having 24 taps as each of the first to fourth filters. |
| US10985844B2 |
Coherent optical receiver device and coherent optical receiving method
In a coherent optical receiver device, the dynamic range considerably decreases in the case of selectively receiving the optical multiplexed signals by means of the wavelength of the local oscillator light, therefore, a coherent optical receiver device according to an exemplary aspect of the invention includes a coherent optical receiver receiving optical multiplexed signals in a lump in which signal light is multiplexed; a variable optical attenuator; a local oscillator connected to the coherent optical receiver; and a first controller controlling the variable optical attenuator by means of a first control signal based on an output signal of the coherent optical receiver; wherein the coherent optical receiver includes a 90-degree hybrid circuit, a photoelectric converter, and an impedance conversion amplifier, and selectively detects the signal light interfering with local oscillation light output by the local oscillator out of the optical multiplexed signals; and the variable optical attenuator is disposed in the optical path of the optical multiplexed signals in a stage preceding the photoelectric converter, inputs the optical multiplexed signals, and outputs them to the coherent optical receiver controlling the intensity of the optical multiplexed signals based on the first control signal. |
| US10985839B2 |
3D-compatible directional optical antenna
In the mobile communications of the fifth generation or the like, a radio relay apparatus capable of stably over a wide area realize a three-dimensional network, in which a propagation delay is low, a simultaneous connection with a large number of terminal apparatuses in a wide-range and high-speed communication can be performed, and a system capacity per unit area is large, in radio communications with terminal apparatuses including devices for the IoT, and there is no influence on radio wave frequency resources, is provided. The radio relay apparatus comprises a floating object provided with a radio relay station and controlled to be located in a floating airspace with an altitude less than or equal to 100 [km] by an autonomous control or an external control, an optical communication section for performing optical communication with an optical communication destination via an optical antenna apparatus controllable to change outgoing directional beam, an information acquisition section for acquiring at least one of optical-beam control information provided with a radio relay station and a reception sensitivity of the optical communication section, and a beam control section for controlling a directional beam of the optical antenna apparatus based on information acquired by the information acquisition section. |
| US10985837B2 |
Generic non-client specific protection via TCM status and enhanced OTN network propagation of client faults
A network element includes a client port configured to receive a signal for transmission; a line port configured to transmit the signal to a far end via Optical Transport Network (OTN); circuitry configured to communicate one or more of a fault and a status associated with the signal to the far end via OTN overhead. The circuitry configured to communicate can be for the fault and utilizes one or more Tandem Connection Monitoring (TCM) layers in the OTN overhead. The circuitry configured to communicate can be for the status and utilizes one or more of Optical Data Unit (ODU) Performance Monitoring (PM) and one or more Tandem Connection Monitoring (TCM) layers. |
| US10985835B2 |
Devices, methods, and systems for uplink synchronization in time division multiple access (TDMA) satellite network
Devices, methods, and systems for uplink synchronization in time division multiple access (TDMA) satellite network. In one embodiment, an earth-based satellite terminal is configured to communicate with a satellite hub through a satellite using the TDMA communication protocol. The earth-based satellite terminal is configured to determine its own location, a location of the satellite, estimate a distance between the location of the terminal and the location of the satellite, determine a Coarse Timing Advance based on the distance that is estimated, and transmit data to the satellite based on the Coarse Timing Advance and the TDMA communication protocol. The Coarse Timing Advance may allow uplink TDMA communication without a preamble transmission on a random access channel, the preamble transmission being required in many conventional systems. |
| US10985834B2 |
Method and apparatus for handling communications between spacecraft operating in an orbital environment and terrestrial telecommunications devices that use terrestrial base station communications
A multiple-access transceiver handles communications with mobile stations in environments that exceed mobile station design assumptions without necessarily requiring modifications to the mobile stations. One such environment is in Earth orbit. The multiple-access transceiver is adapted to close communications with mobile stations while exceeding mobile station design assumptions, such as greater distance, greater relative motion and/or other conditions commonly found where functionality of a terrestrial transceiver is to be performed by an orbital transceiver. The orbital transceiver might include a data parser that parses a frame data structure, a signal timing module that adjusts timing based on orbit to terrestrial propagation delays, frequency shifters and a programmable radio capable of communicating from the Earth orbit that uses a multiple-access protocol such that the communication is compatible with, or appears to the terrestrial mobile station to be, communication between a terrestrial cellular base station and the terrestrial mobile station. |
| US10985831B2 |
System for preventing unauthorized access to operational aircraft data
In one example, a system for a preventing unauthorized access to operational aircraft data is provided. The system includes a server configured to be positioned on an aircraft. The server configured to communicate with a portable electronic device and a plurality of aircraft systems, wherein the server is configured to unidirectionally communicate with the plurality of aircraft systems, wherein the server is configured to receive avionic operational data from the plurality of aircraft systems. The server is further configured to implement security measures to prevent unauthorized electronic devices from accessing the avionic operational data produced by the plurality of aircraft systems. The server is further configured to control dissemination of avionic operational data to electronic devices. |
| US10985830B2 |
Radio relay apparatus and operating method therefor
A radio relay apparatus and an operating method therefor are provided.The radio relay apparatus that relays a communication signal between a base station and a terminal includes a donor unit that transmits and receives a radio frequency signal to and from the base station, and at least one service unit that transmits and receives an analog transmission signal to and from the donor unit, and transmits and receives the radio frequency signal to and from the terminal. In the analog transmission signal, an intermediate frequency signal into which the radio frequency signal is converted and a time synchronization signal extracted from the intermediate frequency signal are combined. The time synchronization signal is used by the donor unit and the at least one service unit for time division duplex communication (TDD) synchronization control. |
| US10985828B2 |
System and method for beam switching and reporting
Methods, apparatuses, and computer-readable mediums associated with a user equipment (UE) and a base station are provided for herein. In aspects, a UE may receive, from a base station, a beam modification command indicating at least one beam index for communicating through at least one beam on at least one channel. In an aspect, each beam index of the at least one beam index may indicate at least a direction for communicating through a corresponding beam of the at least one beam. The UE may communicate, with the base station, through the at least one beam corresponding to the at least one beam index on the at least one channel. |
| US10985825B2 |
Methods for transmitting uplink signal and downlink signal, UE and base station
Embodiments of the present disclosure provide methods for transmitting an uplink signal and a downlink signal. A method for transmitting an uplink signal comprises detecting whether there is a beam failure; if there is a beam failure, determining at least one of whether there is a candidate downlink transmission beam(s) or candidate downlink transmission beam information; and transmitting a beam failure recovery request message to a base station, the beam failure recovery request message being used for informing the base station of at least one of whether there is a candidate downlink transmission beam(s) or candidate downlink transmission beam information. A method for transmitting a downlink signal comprises detecting a beam failure recovery request message, determining at least one of whether there is a candidate downlink transmission beam(s) or candidate downlink transmission beam information in the UE; and transmitting a feedback message corresponding to the beam failure recovery request message. |
| US10985820B2 |
Extending association beamforming training
Apparatuses, computer readable media, and methods for extending association beamforming training are disclosed. An apparatus is disclosed including processing circuitry. The processing circuitry being configured to decode an enhanced directional multi-gigabit (EDMG) beacon comprising a multiplier field and a length field of an association beamforming training (A-BFT) interval. The processing circuitry may be further configured to determine a count of sector sweep (SSW) slots based on a value of the multiplier field and a value of the length field of the A-BFT interval, and select a SSW slot of the count of SSW slots. The processing circuitry may be further configured to encode a SSW frame, and configure the station to transmit the SSW frame during the selected slot of the count of SSW slots. |
| US10985819B1 |
Element-level self-calculation of phased array vectors using interpolation
This patent application describes systems, devices, and methods for element-level self-calculation of phased array vectors by a beam forming ASIC using interpolation and a look-up table for calculation of phase setting values such as for fast beam steering. |
| US10985818B2 |
Method, system and apparatus
A method comprises receiving beam cluster information from a beam forming access point. The beam cluster information defining a plurality of beam clusters. The beam cluster information defines beam identification information for each of a plurality of beams in a respective beam cluster. The beam cluster information is used to control the processing of at least one beam received from the access point. |
| US10985817B2 |
Beamforming training
A method for beamforming training and a device using the same are provided. A station (STA) receives a beacon frame from an access point (AP) during a beacon transmission interval (BTI). The beacon frame includes information on a sector sweep (SSW) frame type used in at least one of a plurality of SSW slots. During association beamforming training (A-BFT), the STA transmits the SSW frame according to the SSW frame type from an SSW slot, among a plurality of SSW slots, having succeeded in a random backoff. |
| US10985814B2 |
System and method for coding WCDMA MIMO CQI reports
A block coding method and system for improving the reliability of Channel Quality Indicators (CQI) and Antenna Weight Indicators (AWI) reporting, A user terminal first generates 8-bit CQI and 2-bit AWI. A codeword generator produces a codeword responsive to these 10 CQI/AWI bits using a codebook or a generator matrix of a (20,10,6) code. The (20,10,6) code has a minimum Hamming distance of 6. The encoded codeword is transmitted to a receiver for decoding utilizing an identical (20,10,6) codebook. |
| US10985812B2 |
Method for non-linear pre-coding based on CSI accuracies, corresponding network device and computer readable storage medium
Embodiments of the present disclosure relate to a method for precoding, a network device and a computer readable storage medium. For example, at a network device configured with a plurality of antennas and configured to operate in a plurality of frequency bands, channel state information (CSI) and an indication of a plurality of CSI accuracies corresponding to the CSI are obtained from a plurality of terminal devices. The bandwidth of the plurality of frequency bands is divided into one or more frequency band ranges based on comparison of each CSI accuracy with a first threshold accuracy, and ordering and precoding are performed, based on the CSI, on a plurality of data to be transmitted to the plurality of terminal devices within each frequency band range. Within each frequency band range, the plurality of precoded data is transmitted to the plurality of terminal devices via the plurality of antennas. |
| US10985809B2 |
Compression of radio signals with adaptive mapping
The described technology is generally directed towards selecting a compression and/or quantization function for communicating data to and from an analog front end of a radio unit of a base station coupled to a digital baseband processor of a central unit of the base station. The compression function and/or quantization function can be adaptively and/or otherwise selected based on various criteria, such as the amount of data being transmitted, whether the data corresponds to reference signals or other data, the network architecture (e.g., digital beamforming or hybrid beamforming) in use, and so on. |
| US10985806B2 |
Orthogonal differential vector signaling
Using a transformation based at least in part on a non-simple orthogonal or unitary matrix, data may be transmitted over a data bus in a manner that is resilient to one or more types of signal noise, that does not require a common reference at the transmission and acquisition points, and/or that has a pin-efficiency that is greater than 50% and may approach that of single-ended signaling. Such transformations may be implemented in hardware in an efficient manner. Hybrid transformers that apply such transformations to selected subsets of signals to be transmitted may be used to adapt to various signal set sizes and/or transmission environment properties including noise and physical space requirements of given transmission environments. |
| US10985803B2 |
Device for receiving PLC signals
A receiving device for receiving PLC signals, including a filtering stage linked to an input of the receiving device and configurable in at least two modes including a default mode, wherein the filtering stage passes at least first PLC signals included in a first frequency band and second PLC signals included in a second frequency band separate from the first frequency band, and a first selection mode, in which the filtering stage passes the first PLC signals and stops the second PLC signals; and a processing circuit linked to the filtering stage and arranged to receive frames of PLC signals, and, for each received frame, to analyse a preamble of the frame, and to dynamically configure the filtering stage in the first selection mode if the frame is a frame of first PLC signals. |
| US10985802B2 |
System and method for high speed data communications
A method is disclosed for delivering broadband video data to an end user device comprising transmitting broadband video data via a radio frequency transmitter to a home radio frequency receiver located at a residential power transformer providing electrical power to a home; coupling the broadband video data from the home radio frequency receiver to a first modem onto a copper power line electrically coupled to the residential power transformer; receiving the broadband data on a second modem from the copper power line; and sending from the second modem, different portions of the broadband data to each of a plurality of end user devices in the home. A system and computer program for performing the method are disclosed. |
| US10985801B1 |
Ethernet link transmit power method based on on-chip detected alien crosstalk feedback
A method of operating an Ethernet transceiver includes initializing the Ethernet transceiver during a training mode of operation by monitoring background link operating characteristics with on-chip circuitry during a non-data-transfer interval to establish a baseline alien crosstalk value. Training data is then transmitted at a first transmit power level and first data rate to a link partner during a data transfer interval. The link is monitored with the on-chip circuitry during the data transfer interval to detect feedback indicating alien crosstalk effects to neighboring Ethernet links due to the transmitting. The first data rate and/or first transmit power level is then adjusted to an adjusted second data rate and/or second transmit power level based on the feedback. The Ethernet transceiver is then operated in a normal data transfer mode utilizing the adjusted second data rate and/or transmit power level. |
| US10985794B2 |
Radio-frequency switch and communication device
A radio-frequency switch includes a first switch circuit including a first common terminal, at least two first selection terminals, a first switch that selectively connects the first common terminal and the at least two first selection terminals to each other, and a first shunt switch that switches the first common terminal and ground between a conductive state and a non-conductive state with each other, and a second switch circuit including a second common terminal that is connected to the first common terminal, at least two second selection terminals, and a second switch that selectively connects the second common terminal and the at least two selection terminals to each other. |
| US10985793B1 |
Tunable RF frontend
An advantageously fast and asynchronous interface is disclosed for the tuning of an RF frontend. The interface transmits a tuning word to the RF frontend that controls a tuning of the RF frontend responsive to a channel index. |
| US10985792B2 |
Common phase error compensation
According to some embodiments, a method in a wireless receiver of compensating common phase error in a received wireless signal comprises receiving a first symbol of a wireless signal. The first symbol comprises a code division multiplexed demodulation reference signal (DM-RS) multiplexed with a length M orthogonal cover code, and a first code division multiplexed common phase error reference signal (CPE-RS) multiplexed with a length N orthogonal cover code, wherein N is less than or equal to M. The method further comprises determining M code points in the first symbol associated with a DM-RS; estimating a channel corresponding to the received wireless signal using the M code points associated with the DM-RS; estimating a first CPE-RS corresponding to the estimated channel using the first N code points of the M code points associated with the DM-RS; and compensating the estimated channel for phase error using the estimated first CPE-RS. |
| US10985790B2 |
Multi-antenna communication data-converter clocking
A communication circuit (20) for communication via multiple antenna elements (10j) of a communication apparatus (2) is disclosed. The communication circuit (20) comprises a plurality of communication units (30j) configured to communicate simultaneously in the same frequency band. Each communication unit (30j) of said plurality of communication units (30j) is arranged to be connected to a separate antenna element (10j) and comprises a data converter (90, 120). The data converters (90, 120) of the plurality of communication units (30j) together form a set of data converters. Furthermore, the communication circuit (20) comprises a clock-signal generation circuit (50) configured to generate a distinct sampling clock signal at a distinct sampling clock frequency (fsj) to each data converter (90, 120) in the set of data converters. |
| US10985786B2 |
Method for multiband communication using single antenna and electronic device therefor
Disclosed is an electronic device that performs communication in multiple bands by using a single antenna, and includes an antenna, a radio frequency front end module (RF FEM) connected to the antenna, a first signal processing module connected to the RF FEM and configured to process a signal of a first radio access technology (RAT), and a second signal processing module connected to the RF FEM and configured to process a signal of a second RAT, the signal of the second RAT being different than the signal of the first RAT, and the RF FEM including a frequency separating circuit configured to separate a signal received through the antenna into the signal of the first RAT and the signal of the second RAT, and a switch including a first input terminal coupled with the antenna, a first output terminal coupled with an input terminal of the frequency separating circuit, a second input terminal coupled with one of output terminals of the frequency separating circuit, and a second output terminal coupled with a path for the first signal processing module. |
| US10985784B2 |
Front-end architecture having quadplexer for carrier aggregation and MIMO support
In some embodiments, a front-end architecture can include a quadplexer configured to support uplink carrier aggregation with a first antenna. The quadplexer can include a low-band filter, a mid-band filter, a first high-band filter, and a second high-band filter, with each filter having a respective input node, and the quadplexer including a common output node associated with the first antenna. The front-end architecture can further include a triplexer configured to support uplink carrier aggregation with a second antenna. The triplexer can include a mid-band filter, a first high-band filter, and a second high-band filter, with each filter having a respective input node, and the triplexer including a common output node associated with the second antenna. |
| US10985783B1 |
Correction device
The present disclosure provides a circuit. The circuit includes a detection circuit, a correction circuit and an adjustment circuit. The detection circuit is configured to detect an initial logic state of an input signal, and to generate, in response to the initial logic state, a first signal with a first logic state. The correction circuit is configured to compare the first signal having the first logic state with a second signal having a second logic state, and to generate an enable signal according to the comparison. The adjustment circuit is configured to be enabled by the enable signal when the first logic state of the first signal is different from the second logic state of the second signal, to generate an adjustment signal to the detection circuit, in which the detection circuit is further configured to be adjusted according to the adjustment signal, to generate an adjusted first signal. |
| US10985780B2 |
Error correction circuit, and memory controller having the error correction circuit and memory system having the memory controller
Provided herein may be an error correction circuit, and a memory controller and a memory system. The error correction circuit may include an encoder configured to generate a codeword comprising a message part, a first parity part, and a second parity part, and a decoder configured to perform error correction decoding using read values corresponding to at least a portion of the codeword, wherein, the decoder is configured to perform error correction decoding based on a first or a second error correction ability such that error correction decoding using the first error correction ability is performed using partial read values corresponding to a partial codeword including the message part and the first parity part, and error correction decoding using the second error correction ability is performed using read values corresponding to the entire codeword, and wherein the second error correction ability is greater than the first error correction ability. |
| US10985774B2 |
Delta-sigma modulator and analog-to-digital converter including the same
A delta-sigma modulator generates a bitstream signal from a differential input signal including a first input signal and a second input signal by repeating a first operation and a second operation alternately. The delta-sigma modulator includes a first sampling capacitor, a second sampling capacitor, a third sampling capacitor, a fourth sampling capacitor, an operational amplifier, a first feedback capacitor, a second feedback capacitor, and a quantizer. |
| US10985773B2 |
Analog to digital converting device and capacitor adjusting method thereof
An analog to digital converting module includes a comparator, at least one digital to analog convertor, and a reference buffer. The comparator is configured to compare a first input signal and a second input signal so as to output a comparing signal. The at least one at least one digital to analog convertor includes at least one capacitor. The reference buffer is configured to provide a reference signal. The at least one digital to analog convertor receives the reference signal such that a ripple signal is generated according to a change of a voltage of the reference signal. The capacitance of the capacitor of the at least one digital to analog convertor is adjusted based on the ripple signal. |
| US10985771B2 |
Method of calibrating capacitive array of successive approximation register analog-to-digital converter
A method of calibrating capacitive array of a resistor-capacitor hybrid successive approximation register analog-to-digital converter (RC-hybrid SAR ADC) that includes a high M-bit capacitor DAC and a low N-bit resistor DAC. The method includes: disposing n unit capacitors in each capacitive array of the RC-hybrid SAR ADC, wherein n=2M−1; sorting the capacitors in an ascending order according to their capacitances to form a sorted array, and selecting two capacitors Cu(n/2)*, Cu(n/2+1)* in the middle positions as a least significant bit (LSB) capacitor and a dummy capacitor, respectively; obtaining a new array by forming each capacitor through adding two capacitors which have symmetrical positions with respect to the middle position(s) in the sorted array; and sorting the new array in an ascending order, and selecting the capacitor in the middle position as a higher bit capacitor. The method improves the static and dynamic performance of the SAR ADC. |
| US10985768B2 |
Ultra-high speed digital-to-analog (DAC) conversion methods and apparatus having sub-DAC systems for data interleaving and power combiner with no interleaving
A ultra-high speed DAC apparatus (e.g., with a full sampling frequency not less than 20 GHz) may include one or more digital pre-coders and DAC modules. Each DAC module may include multiple current-mode DAC systems and a first power combiner. The gate length of transistors within each DAC module may be between 6 and 40 nm. Each current-mode DAC system includes a transmission line (e.g., 40 to 80 microns long) coupled to multiple interleaving sub-DAC systems (within the current-mode DAC systems) and the first power combiner. The first power combiner combines, without interleaving, analog signals that have been interleaved within the current-mode DAC systems. The impedance of the first power combiner matches the impedance of each of the current-mode DAC systems and a load of the first power combiner. A second power combiner combines, without interleaving, analog signals from the DAC modules. |
| US10985767B2 |
Phase-locked loop circuitry having low variation transconductance design
A phase-locked loop circuitry (200) having low variation transconductance design comprises a voltage controlled oscillator structure (308) to provide an output signal (Fosc) having an oscillation frequency. The voltage controlled oscillator structure (308) comprises a voltage-to-current converter circuit (312) and a current controlled oscillator circuit (314). The voltage-to-current converter circuit is designed with a low variation transconductance. The voltage-controlled oscillator circuit (200) has a characteristic curve being independent of different PVT (processes, supply voltages and temperature) conditions to ensure that the phase-locked loop circuitry (200) is stable under different PVT condition. |
| US10985766B1 |
Phase locked loop circuit with oscillator signal based on switched impedance network
Phase-locked loop circuitry to generate an output signal, the phase-locked loop circuitry comprising oscillator circuitry, switched resistor loop filter, coupled to the input of the oscillator circuitry (which, in one embodiment, includes a voltage-controlled oscillator), including a switched resistor network including at least one resistor and at least one capacitor, wherein an effective resistance of the switched resistor network is responsive to and increases as a function of one or more pulsing properties of a control signal (wherein pulse width and frequency (or period) are pulsing properties of the control signal), phase detector circuitry, having an output which is coupled to the switched resistor loop filter, to generate the control signal (which may be periodic or non-periodic). The phase-locked loop circuitry may also include frequency detection circuitry to provide a lock condition of the phase-locked loop circuitry. |
| US10985764B1 |
Phase detector offset to resolve CDR false lock
An example method of clock and data recovery (CDR) includes adding a pre-defined offset to an output of a phase detector (PD) of a CDR circuit, and loading an accumulator of a frequency loop of the CDR circuit with a pre-defined load value. The method further includes detecting the phase of an incoming signal using a PD, and determining that the CDR has locked onto a real lock point. In some examples, the method further includes determining that the CDR has locked on a real lock point, and, in response to the determination, modifying the pre-defined offset to equal zero. |
| US10985759B2 |
Apparatuses and methods involving a segmented source-series terminated line driver
An example apparatus includes a line driver and an interface circuit. The line driver has a plurality of source-series terminated (SST) driver segments including switching circuitry to selectively switch among at least three voltage-reference levels to drive an output node, common to each of the SST driver segments, in response to received digital signals by switching at a rate that is faster than a baud rate characterizing the received digital signals. The interface circuit drives a transmission link, in response to a drive signal at the output node, with an analog signal representing an oversampling of the received digital signals. |
| US10985757B2 |
Dynamic impedance control for input/output buffers
A system and method of performing off chip drive (OCD) and on-die termination (ODT) are provided. A common pull-up network composed of transistors and a common pull-down network composed of transistors are employed to implement both of these functions. In drive mode, the pull-up network is configured to produce a calibrated drive impedance when an “on” output is to be generated, and the pull-up network is configured to produce a calibrated drive impedance when an “off” output is to be generated. In termination mode, the pull-up network and the pull-down network are configured to produce a calibrated pull-up resistance and pull-down resistance respectively such that together, they form a split termination. |
| US10985751B2 |
Determining and compensating power transistor delay in parallel half bridge legs
A method and an apparatus for determining switching delay times of power semiconductor switch components in parallel connected half bridge legs in which two or more power semiconductor switches are controlled in parallel. The method includes providing a gate control signal to gate drivers of the parallel connected power semiconductor switch components, determining collector to emitter voltages of the parallel connected power semiconductor switch components, and determining separate delay times for each of the parallel connected power semiconductor switch components based on the time instant of the gate control signal and the determined collector to emitter voltages or time derivatives of the determined collector to emitter voltages. |
| US10985748B2 |
Drive voltage booster
This disclosure describes a gate driver with voltage boosting capabilities. In some embodiments, the gate driver may comprise a charge pump that includes capacitor(s) and switch(es). Responsive a logic low input signal, the gate driver may bypass the capacitor(s) to allow the input digital signal to drive the gating signal directly. Conversely, responsive to a logic high input signal, the gate driver may couple the capacitor(s) in series with the input digital signal to generate a boosted gating signal. In some embodiments, the gate driver may comprise an inductor-capacitor resonant circuit to create a doubled output gating signal with respect to the input digital signal. In some embodiments, the resonant gate driver may include an additional voltage boosting capability that can be selectively enabled to compensate for a voltage drop during the signal transfer from the input to the output. |
| US10985746B1 |
Transducer driver enhancement with intelligent threshold selection within non-overlap generator
Non-overlap generation circuitry may include a first portion configured to condition an input signal to generate a first predriver signal, the first portion comprising a first switching threshold logic path and a second switching threshold logic path in parallel with the first switching threshold logic path, wherein the first portion is configured to select between the first switching threshold logic path and the second switching threshold logic path based on the input signal. The non-overlap generation circuit may also include a second portion configured to condition the input signal to generate a second predriver signal, the second portion comprising a third switching threshold logic path and a fourth switching threshold logic path in parallel with the third switching threshold logic path, wherein the second portion is configured to select between the third switching threshold logic path and the fourth switching threshold logic path based on the input signal. |
| US10985743B2 |
Low-power-consumption high-speed zero-current switch
A low-power-consumption high-speed zero-current switch includes a delay controller, a driving stage and a power transistor MN, wherein: an input of the delay controller is connected with an external clock CLK, an output of the delay controller is connected with an input of the driving stage, and an output of the driving stage is connected with a gate of the power transistor MN; the delay controller includes a gate signal generator, a sampling circuit and a current controller, and three of which form a negative feedback loop for stabilizing the turn-on voltage VON and the turn-off voltage VD to 0, so that when the power transistor MN is turned on or off, the source-drain voltage thereof is 0. The present invention no longer uses a high-power-consumption high-speed comparator, but uses a low-power-consumption delay controller to generate turn-on and turn-off signals of the power transistor. |
| US10985742B2 |
Operation method of signal receiver, pulse width controller, and electronic device including the same
An operation method of a signal receiver includes sequentially receiving 0-th and first bits through one signal line, and adjusting a width of any one of a first high duration and a first low duration of a first signal corresponding to the first bit, based on values of the 0-th and first bits, when the values of the 0-th and first bits are identical to each other. |
| US10985738B1 |
High-speed level shifter
Embodiments disclosed herein relate to level shifters of a memory device. Specifically, the level shifters include a first series arrangement of transistors to offset a first transistor. The level shifters also include a second series arrangement of transistors to offset a second transistor. The first series arrangement of transistors is opposite the second series arrangement of transistors. The output of the first series arrangement of transistors is coupled to a first node and selectively couples the first node to a first voltage based on an input signal. The output of the second series arrangement of transistors is coupled to a second node and couples the second node to the first voltage based on an input signal. The first node and the second node are coupled to the first voltage at different times. The series arrangements of transistors enables faster level shifting over conventional level shifters. |
| US10985735B2 |
Impedance matching device and impedance matching method
An impedance matching device includes: a variable capacitor in which a plurality of series circuits of capacitors and semiconductor switches are connected in parallel; a calculation unit that calculates an impedance or a reflection coefficient on the load side using information regarding impedance acquired from the outside; and a control unit that determines ON/OFF states to be taken by the semiconductor switches included in the variable capacitor using the impedance or the reflection coefficient calculated by the calculation unit and turns on or off the semiconductor switches based on the determined states. The control unit changes an ON/OFF control timing between one and another of the semiconductor switches. |
| US10985729B2 |
BAW resonator based pressure sensor
A pressure sensor apparatus is disclosed. The pressure sensor apparatus includes a bulk acoustic wave (BAW) die having a die interface side and a pressure contact side, a sensor BAW resonator and a reference BAW resonator disposed on the die interface side of the BAW die, a control circuit die coupled to the die interface side of the BAW die via an attachment layer, and an extended opening on the pressure contact side that extends into a depth of the BAW die and is generally aligned with the sensor BAW resonator, the extended opening being configured to translate an external pressure on the pressure contact side onto the sensor BAW resonator. |
| US10985728B2 |
Transversely-excited film bulk acoustic resonator and filter with a uniform-thickness dielectric overlayer
Acoustic filters, resonators and methods are disclosed. An acoustic filter device includes a substrate having a surface and a single-crystal piezoelectric plate having front and back surfaces and a thickness ts, the back surface attached to the surface of the substrate except for portions of the piezoelectric plate forming a plurality of diaphragms that span respective cavities in the substrate. A conductor pattern is formed on the front surface of the piezoelectric plate, the conductor pattern comprising a plurality of interdigital transducers (IDTs) of a plurality of acoustic resonators, interleaved fingers of each IDT of the plurality of IDTs disposed on a respective diaphragm of the plurality of diaphragms. Zero or more dielectric layers are deposited over all of the IDTs and the diaphragms, wherein a total thickness of the zero or more dielectric layers is the same for all of the plurality of acoustic resonators. |
| US10985724B1 |
Transformer-based wideband filter with ripple reduction
A radio frequency filtering circuitry includes a first inductor, a second inductor, and a conductive loop. The first inductor receives a first current that induces a second current in the second inductor upon receiving the first current. The first inductor and/or the second inductor induce a third current in the conductive loop. The conductive loop adjusts the third current to reduce a first gain peak of an output signal to correlate to a second gain peak of the output signal. |
| US10985721B2 |
Switched capacitor amplifier circuit, voltage amplification method, and infrared sensor device
A switched capacitor amplifier circuit includes an operational amplifier, a first capacitor and a second capacitor each having one end connected to a negative input terminal of the operational amplifier, a first switching circuit configured to connect the other end of the first capacitor and a signal source during a first operation, a second switching circuit configured to connect the other end of the second capacitor and the output terminal of the operational amplifier so as to connect the output terminal and the negative input terminal of the operational amplifier through the second capacitor during the second operation, and an impedance converter circuit configured to convert an output impedance of the signal source into a specified impedance, the impedance converter circuit being connected between the first switching circuit and the other end of the first capacitor. |
| US10985719B2 |
Electronic module and power module
Peeling in an electronic module is sensed. An electronic module according to the present invention includes a specified conductor, an insulating layer, a wiring layer, and a capacitance-to-voltage converter. The wiring layer includes a sense electrode. The capacitance-to-voltage converter is connected to the sense electrode. The sense electrode is opposed to a portion of the specified conductor via the insulating layer, and forms a capacitance with the portion. The capacitance-to-voltage converter is configured to output a voltage according to the capacitance. |
| US10985717B2 |
Multi-level class D audio power amplifiers
The present invention relates to a multi-level class D audio power amplifier for supplying an N-level drive signal to a loudspeaker. The multi-level class D audio power amplifier further comprises a switching matrix comprising a plurality of controllable semiconductor switches where the switching matrix comprising at least (N−2) switch inputs, coupled to respective ones of (N−2) DC input voltage nodes, and at least 2*(N−2) switch outputs coupled to respective ones of 2*(N−2) intermediate nodes of a first output driver. A control circuit is configured to sequentially connect each of the (N−2) DC input voltages to a predetermined set of nodes of the 2*(N−2) intermediate nodes of the first output driver via the switching matrix in accordance with one or more of the 2*(N−1) modulated control signals of the first output driver. N is a positive integer larger than or equal to 3. |
| US10985716B2 |
Audio processing device and method for controlling audio processing device
An audio processing device includes: at least one processor configured to: generate a first signal by reducing components that fall below a first frequency in an audio signal; generate a second signal by reducing components that fall below a second frequency that is higher than the first frequency in the audio signal; select between a first state for outputting the first signal and a second state for outputting the second signal; and output one of the selected first or second signal as an output signal; and a class-D amplifier configured to amplify the output signal, in which, the at least one processor is further configured to: determine whether or not a power supply pumping phenomenon exists or a possibility of the power supply pumping phenomenon exists, in a power source that supplies a power supply voltage to the class-D amplifier; and in which, in the selecting between the first state and the second state, the at least one processor is configured to select: the first state in a case where a determination result is negative, where the power supply pumping phenomenon is determined to not exist or the possibility of the power supply pumping phenomenon is determined to not exist; and the second state in a case where the determination result is affirmative, where the power supply pumping phenomenon is determined to exist or the possibility of the power supply pumping phenomenon is determined to exist. |
| US10985713B2 |
Power amplifier with a tracking power supply
Systems and methods are described for a power amplifier with a tracking power supply. The power amplifier may use envelope tracking. The power amplifier is protected when the output of the power amplifier is short circuited or overloaded. |
| US10985706B1 |
Hysteresis comparator
The present invention discloses a hysteresis comparator comprising an input stage, a hysteresis current generating circuit and an output stage. In the operation of the hysteresis comparator, the input stage is configured to receive a pair of differential input signals to generate at least one differential current signal; the hysteresis current generating circuit is configured to generate at least one hysteresis current to adjust the differential current signal to generate an adjusted differential current signal, wherein the hysteresis current generating circuit includes a common mode voltage detecting circuit for detecting a common mode voltage of the differential input signal for generating the hysteresis current; and the output stage is configured to generate an output signal according to the adjusted differential current signal. |
| US10985704B2 |
Amplifier circuit and transmitting device
According to one embodiment, an amplifier circuit includes N (N>=3) transistors, two first branches and N−2 second branches. The N (N>=3) transistors are connected in parallel. The two first branches each include the transistor and a first transmission line which is connected to an output terminal of the transistor. The N−2 second branches each include the transistor and a second transmission line which is connected to the output terminal of the transistor. For each of the first branches, a sum between an electrical length of a parasitic component of the transistor and the electrical length of the first transmission line are odd multiples of approximately 90 degrees. For each of the second branches, the sum between the electrical length of the parasitic component of the transistor and the electrical length of the second transmission line are multiples of approximately 180 degrees. |
| US10985702B2 |
Envelope tracking system
An envelope tracking system is disclosed having an envelope tracking integrated circuit (ETIC) with a first tracker having a first supply output and a second tracker having a second supply output, wherein the ETIC has a first mode in which only one of the first and second trackers supplies voltage and a second mode in which the first and second trackers both supply voltage. A first notch filter is coupled to the first supply output and a second notch filter is coupled to the second supply output. A mode switch coupled between the first supply output and the second supply output is configured to couple the first notch filter and the second notch filter in parallel in the first mode and open the mode switch to decouple the first notch filter from the second notch filter in the second mode in response to first and second switch control signals, respectively. |
| US10985697B2 |
Circuit device, oscillator, electronic apparatus, and vehicle
Provided is a circuit device including: an oscillation circuit oscillating a vibrator, in which the oscillation circuit includes a variable capacitance circuit having a first variable capacitance element and a second variable capacitance element constituted by a first transistor and a second transistor, and a reference voltage supply circuit. The first reference voltage is supplied to a first gate of the first transistor and a capacitance control voltage is supplied to a first impurity region of the first transistor, the second reference voltage is supplied to a second gate of the second transistor and the capacitance control voltage is supplied to a second impurity region of the second transistor, and the capacitance control voltage is supplied to a first common impurity region of the first transistor and the second transistor. |
| US10985695B2 |
DC arc detection and photovoltaic plant profiling system
An arc detection method includes classifying whether an arc fault is present in the power system by, for each of a plurality of bins of a current frame of a signal, marking the bin as a candidate bin if a magnitude spectrum of the bin meets first criteria; determining a number of candidate bins in the current frame; marking the number of candidate bins as candidate cluster bins if the number of candidate bins exceeds a minimum cluster size; for each of the candidate cluster bins, determining whether the candidate cluster bin is also a candidate cluster bin of a previous frame of the first signal and if so, identifying the current frame as a candidate frame and incrementing a candidate frame count; and if the candidate frame count exceeds a candidate frame count threshold, determining that an arc fault is present in the power system. |
| US10985693B2 |
Arc detection device and arc detection method
In an arc detector, a frequency analyzer analyzes frequency components of a current subject to detection in a first frequency band. A detector detects an occurrence of an arc by referring to the frequency components in the first frequency band. When the detector does not detect the occurrence of an arc by referring to the frequency components in the first frequency band, the frequency analyzer analyzes frequency components of the current subject to detection in a second frequency band lower than the first frequency band, and the detector detects the occurrence of an arc by referring to the frequency components in the second frequency band. |
| US10985690B2 |
Clamp assembly for solar tracker
In an example, the solar tracker has a clamp assembly that is configured to pivot a torque tube. In an example, the assembly has a support structure configured as a frame having configured by a first anchoring region and a second anchoring region. In an example, the support structure is configured from a thickness of metal material. In an example, the support structure is configured in an upright manner, and has a major plane region. In an example, the assembly has a pivot device configured on the support structure and a torque tube suspending on the pivot device and aligned within an opening of the support and configured to be normal to the plane region. In an example, the torque tube is configured on the pivot device to move about an arc in a first direction or in a second direction such that the first direction is in a direction opposite to the second direction. |
| US10985689B2 |
Collapsible shelter
A shelter or camper that provides improved portability and protection. The shelter or camper may include rigid walls to offer greater protection from weather, animals, and theft. The shelter or camper may be transitionable between different configurations for different purposes, including an open and expanded configuration for use as a shelter, camper, or sleeping quarters and a compact, closed case configuration for easy storage and transport. To facilitate this, the walls may be foldable, expandable, or collapsible. When the walls are folded or collapsed, roof and floor sections may be connected to each other and may enclose the folded, collapsed walls and internal components within the collapsed closed case. |
| US10985686B2 |
Methods and apparatus for the provision of AC power
A unit for installation in a complex product comprising an electric machine requiring an AC power supply. The unit comprises: a housing carrying an AC output; a battery in the housing comprising at least one battery cell; an inverter in the housing, the inverter comprising a plurality of voltage controlled impedances, VCIs, for providing a power supply to the AC output based on energy from the battery; wherein the housing carries a timing signal input configured to receive a timing signal from outside the housing; and wherein the timing signal input is coupled to control the VCIs so that changes in the impedances of the VCIs are synchronised with the timing signal. |
| US10985682B2 |
Method of controlling a multi-phase electrical machine
A method of controlling a multi-phase electrical machine by means of a power converter, wherein the method includes: a) controlling the electrical machine by utilizing vector space decomposition, VSD, wherein the controlling involves releasing control of the current of a harmonic while maintaining control of the current of the fundamental, b) measuring phase currents of the electrical machine while the control of the current of the harmonic is released, c) transforming the current measurements using VSD to obtain a current signature of the harmonic, and d) determining whether a fault is present in the electrical machine or the power converter based on a comparison of the current signature with a reference current signature of the harmonic. |
| US10985679B2 |
Continuously rotating electric motor having a permanent magnet rotor
A continuously rotating electric motor includes a rotor provided with permanent magnets and a stator formed by two coils in which, when the rotor is rotating, two induced voltage signals (UB1 and UB2) are respectively generated, which signals have an electric phase shift φ where 5°≤φ≤90°, preferably 30°<φ<65°. The control device includes a circuit for detecting intersection times (TC) at which values of the two induced voltage signals are substantially equal. The control device is arranged to generate electric driving pulses to rotate the rotor, which are respectively initiated at initiation times determined by respective intersection times, and such that the electric driving pulses can be applied to the two coils arranged in series. Preferably, the control device is arranged such that the initiation times of the electric driving pulses occur directly after detections of corresponding intersection times. |
| US10985678B2 |
Motor control apparatus and motor control method
A motor control apparatus includes: a motor drive control section that controls driving of a motor using a predetermined phase; a rotation position detecting section that, at every 180 degrees of an electrical angle of the motor, outputs two kinds of detection signals according to the rotation position of the rotor of the motor; a stopped position estimating section that estimates the stopped position at the start of rotation of the rotor using an elapsed time from when rotation the rotor starts until the kind of the detection signal outputted from the rotation position detecting section switches; a rotational speed estimating section that estimates the rotational speed of the rotor using the elapsed time and the stopped position; and an estimated phase calculating section that calculates an estimated phase as the aforementioned predetermined phase using the rotational speed. |
| US10985671B2 |
Alternate arm converter
A converter (30) comprises first and second DC terminals (32,34) connectable in use to a DC network (40), the converter (30) including a converter limb (36) extending between the DC terminals (32,34), the converter limb (36) including first and second limb portions separated by an AC terminal (38), the AC terminal (38) connectable in use to an AC voltage, each limb portion including at least one director switch (44) connected in series with a waveform synthesizer between the AC terminal (44) and a respective one of the first and second DC terminals (32,34), the waveform synthesizers operable to control the modulation of an AC voltage waveform at the AC terminal (38), each director switch (44) operable to switch the respective waveform synthesizer into and out of circuit between the respective DC terminal (32,34) and the AC terminal (38); and a controller (56) programmed to selectively control the switching of the director switches (44) to switch both of the limb portions into circuit concurrently to form a current conduction path between the DC terminals (32,34), the current conduction path configured to carry a current for presentation to the DC network (40), wherein the controller (56) is programmed to selectively operate the waveform synthesizers to inject at least one harmonic component to modulate the AC voltage waveform at the AC terminal (38) so that during the formation of the current conduction path the magnitude of the modulated AC voltage waveform is lower than the magnitude of the fundamental component of the AC voltage waveform, and wherein the at least one harmonic component is a non-triplen harmonic component. |
| US10985669B2 |
Phase module for a power converter
A phase module for a power converter includes first and second busbars and at least two semiconductor modules. The first busbar is connected to AC voltage connections of the semiconductor modules. The second busbar is connected to DC voltage connections of the semiconductor modules. At least one section of the first and second busbars is arranged at a distance to one another, the value of which is less than half the value of the distance between the AC voltage connection and the DC voltage connection of one of the semiconductor modules. At least one of the busbars has a separator arranged at a right angle on the remaining part of the busbar and connecting the busbar to at least one of the DC voltage connections or one of the AC voltage connections of one of the semiconductor modules. The separator is arranged along a surface of the one semiconductor module. |
| US10985668B2 |
Model based current control of a three-to-single-phase power converter
A method of an estimator of an inner control loop controlling a three-to-single-phase converter connected to an AC power grid via a transformer includes obtaining a value of a voltage reference uRef produced by the inner control loop for the converter, obtaining a value of a secondary side current produced by the converter and measured between the converter and the transformer, obtaining a value of a primary side current produced by the converter and measured between the grid and the transformer, and obtaining a value of a primary side voltage measured between the grid and the transformer. The method also includes estimating a control current iCtrl component of the primary or secondary side current iMeas which results from the voltage reference, based on the obtained values of the voltage reference, the secondary side current, the primary side current and the primary side voltage, and feeding the estimated control current iCtrl* to the inner control loop. |
| US10985666B2 |
Voltage supply for synchronous rectifier controller during low voltage output conditions
A switched-mode power supply includes an input, an output, and a transformer including primary and secondary windings. The power supply also includes a synchronous rectifier coupled to selectively conduct current through the secondary winding of the transformer. The synchronous rectifier includes a source, a gate and a drain terminal. The power supply further includes a controller having a supply voltage terminal and a gate terminal to supply a control signal to the gate of the synchronous rectifier, and a circuit coupled between the supply voltage terminal of the controller and at least one of the gate terminal of the controller and the drain terminal of the synchronous rectifier to supply power from the gate terminal of the controller or the drain terminal of the synchronous rectifier to the supply voltage terminal of the controller. Methods of supplying power in switched-mode power supplies are also disclosed. |
| US10985663B2 |
Power converter responsive to device connection status
Various embodiments of apparatuses, systems, and methods for controlling the operating status of a power converter during, a standby mode, a powered mode, and a transition from the standby mode to the powered mode is described. For at least one embodiment, a power converter includes a primary controller and a secondary controller wherein the primary controller includes a first circuit configured to initiate a transition from standby mode to powered mode upon receipt of a wake-up signal and wherein the first circuit is powered during standby mode. For at least one embodiment, the first circuit is powered during a transition from a standby mode to a powered mode by voltages induced in a third coil of a transformer by a device battery powering a second coil of the transformer. |
| US10985659B2 |
Flexible power conversion systems with wide DC voltage utilization
A DC-DC power converter comprises: first, second and third input nodes for connection to one or more DC input power sources; a pair of upper switches TH1, TH2 connected in series between the first and second input nodes; and a pair of lower switches TL1, TL2 connected in series between the second and third input nodes. An output port is connected, via one or more output capacitors and one or more output inductors, to an upper switching node between the pair of upper switches and a lower switching node between the pair of lower switches TL1, TL2. The converter is connectable to a pair of DC input power sources, with a first DC input power source connected between the first and second input nodes and a second DC input power source connected between the second and third input nodes, and, when so connected, the pair of upper switches TH1, TH2 and the pair of lower switches TL1, TL2 are switchable to provide DC output power at the output por. The converter is connectable to one DC input power source connected between the first and third input nodes, and, when so connected, the pair of upper switches TH1, TH2 and the pair of lower switches TL1, TL2 are switchable to provide DC output power at the output port. |
| US10985657B2 |
Switch-mode power supply output compensation
A switch-mode power supply includes a drive transistor, an inductor, and a compensation network. The drive transistor includes a drive transistor current output terminal. The inductor includes an inductor input terminal and an inductor output terminal. The inductor input terminal is coupled to the drive transistor current output terminal. The compensation network is disposed across the inductor. The compensation network is configured to detect voltage drop across the inductor, and to conduct a current from the inductor output terminal to the drive transistor current output terminal. |
| US10985654B2 |
Switching regulator and method of operating the same
A switching regulator configured to generate a level-controlled output voltage from an input voltage, the switching regulator includes an inductor, an output capacitor configured to generate the level-controlled output voltage based on a current flowing through the inductor, at least two flying capacitors, and a plurality of switches configured to form electrical connections when the switching regulator operates in a first operating mode to, alternately charge each of the at least two flying capacitors using the input voltage, and provide a first boosted voltage to the inductor using a charged flying capacitor among the at least two flying capacitors. |
| US10985652B1 |
Power balancer for series-connected load zones of an integrated circuit
This disclosure relates to power balancer circuits that enable multiple load zones of an IC to be powered in series while maintaining balanced voltage at each load zone. In one aspect, a circuit includes load zones that are powered in series. The circuit includes a power balancer for balancing a voltage across each load zone. The power balancer includes an equivalent DC transformer array that includes, for each load zone, an equivalent DC transformer connected in parallel with the load zone. The power balancer includes, for each load zone, a bus capacitor connected in parallel with the load zone. Each equivalent DC transformer is electrically connected to each other equivalent DC transformer providing an electrical path for each bus capacitor to discharge current to each other bus capacitor when a voltage across a bus capacitor is greater than a voltage across another bus capacitor. |
| US10985650B2 |
Open-loop charge pump for increasing ripple frequency of output voltage
An open-loop charge pump is provided. In the open-loop charge pump, a peak current limiting control circuit is arranged between a control circuit and a boost circuit. The control circuit drives the peak current limiting control circuit based on an over-voltage protection signal to control the boost circuit to be in a charging phase continuously or in a normal operation mode. In a case that the output voltage is higher than an upper threshold voltage, the boost circuit is continuously in the charging phase and does not supply power to an output load, and an output capacitor is discharged to supply power to the output load. In a case that the output voltage is lower than a lower threshold voltage, the boost circuit is in the normal operation mode. |
| US10985643B1 |
Systems and methods for collecting, storing, and using electrical energy from the earth magnetic field
A system for using the Earth's magnetic field to provide supplemental power to a machine having a motor, the system comprising: a computer; a water wire; and an energy storing device; the computer being in electrical communication with the water wire and the energy storing device; the water wire comprising: a tube having a length and an inner diameter; a pair of conductive pins attached at each end of the tube; and a water solution having a conductive solute, the water solution being provided within the tube such that to contact the pair of conductive pins; wherein the water wire can collect electrical energy from the Earth's magnetic field when the machine is put in motion by a power source powering the motor; and wherein the collected electrical energy is stored in the energy storing device or used to provide the supplemental power to the machine or other machine components. |
| US10985642B2 |
Power transmission device
A power transmission device includes: a high speed magnet rotor which includes a magnet array which is magnetized in a radial direction; a low speed magnet rotor which includes a magnet array which is magnetized in a circumferential direction; and an inductor rotor which allows magnetic fluxes from the magnet array of the high speed magnet rotor to pass, and the high speed magnet rotor, the low speed magnet rotor and the inductor rotor are concentrically arranged and the magnet array of the low speed magnet rotor is formed such that homopolar surfaces of neighboring magnets face each other in the circumferential direction. |
| US10985636B2 |
Semiconductor device
A semiconductor device includes: a plurality of control modules that controls a rotating electric machine. Each control module includes at least two sets of arms, each set including high-side and low-side switching elements that provide an inverter. A plurality of arms of each control module are coupled in parallel to each other with respect to a bus bar coupled to one power source. Each control module includes a metal plate on which the high-side and low-side switching elements are mounted, and mediates an electric coupling with the power source. Each metal plate includes a first metal plate on which one set of arms is disposed, a second metal plate on which another set of arms is disposed, and a coupling plate that couples the first and second metal plates. |
| US10985634B2 |
Inverter-integrated rotating electric machine
Provided is an inverter-integrated rotating electric machine capable of suppressing an influence of electromagnetic noise between a peripheral device and a control circuit board. An inverter-integrated rotating electric machine (1A) includes: a rotating electric machine main body (2); and an inverter device (3A), which is provided to the rotating electric machine main body (2). The inverter device (3A) includes: a heat sink (32) configured to cool switching elements (31); a control circuit board (33), which is provided so as to be opposed to the heat sink (32), and includes a drive circuit configured to drive the switching elements (31); and a metal shield plate (34), which is provided so as to be opposed to the control circuit board (33) in such a manner that the control circuit board (33) is arranged between the metal shield plate (34) and the heat sink (32), and is electrically connected to the heat sink (32). |
| US10985633B2 |
Vibrational energy harvester with amplifier having gear assembly
An energy harvester coupled to a vibration source includes a housing, a transducer, and an amplifier. The transducer may have a first part and a second part. The first part and the second part may move relative to each other along a central axis in response to a motion from the vibration source. The amplifier is coupled to the housing and operable to amplify an amplitude of the motion received from the vibration source. The amplifier has an input member coupled to the vibration source and an output member coupled to the first part of the transducer. The input member moves at a distance D1 in response to the motion from the vibration source. The output member moves the first part of the transducer in response to the input member moving. The first part of the transducer moves along the central axis by a distance D2, where D2>D1. |
| US10985632B2 |
Electrical power system
An electrical power system is provided. The electrical power system involves a battery powered motor which in turn generates electricity using a primary generator and a secondary generator. The secondary generator provides a recycle electricity to the battery, while the primary generator provides an electrical output for powering electrical devices. |
| US10985628B2 |
Electric drive device
Provided is an electric drive device capable of achieving redundant supply of power from outside and achieving downsizing. An electric drive device, including: a motor; a controller configured to control driving of the motor; and a power supply connector electrically connected to the controller, the power supply connector including: a power supply connector housing; and a first power supply terminal and a second power supply terminal, which are provided in the power supply connector housing and electrically connected to separate external power sources, respectively. |
| US10985627B2 |
Vehicle main electric motor
A vehicle main electric motor includes: a ring-shaped filling chamber, which is formed in contact with a ball bearing and a roller bearing in a direction of a rotation shaft, for filling with a semi-solid lubricant, and which has a central axis concentric with the rotation shaft; and a discharge section connected to the filling chamber, for inflow of the semi-solid lubricant from the filling chamber. A display member, which has a specific gravity lower than a specific gravity of the semi-solid lubricant, is arranged, in an interior of the discharge section, at an initial position that is a position not reached by the semi-solid lubricant during an initial greasing. The discharge section has a retaining part for retaining, at a movement position that is a determined position within the discharge section, the display member moving in a greasing direction due to pressure of the semi-solid lubricant during a supplemental greasing. At least a portion of visible light from the exterior reaches at least a portion of the movement position. |
| US10985626B2 |
Electric machine supplied at low voltage and associated multicellular power train
Disclosed is an electric machine and a traction machine utilizing the electric machine. The electric traction chain includes an electric machine, a plurality of power converters configured to generate AC power signals associated with the various phases of the electric machine, and a plurality of DC power sources. The electric machine includes a rotor and a stator, the stator including at least one winding made from coilings of an insulated conductive material, each winding being associated with one phase of the electric machine, and including a plurality of independently powered coils. Each DC power source of the electric machine is associated with a separate power converter, the coils of a same winding are powered by power signals associated with a same phase generated by the separate power converters. |
| US10985625B2 |
Motor stator and forming method thereof
A motor stator structure includes a core and plural hairpin wires. The core has slots, an insertion side, and an extension side. Each slot has an innermost layer, a second inner layer, a second outer layer and an outermost layer configured in a radial direction of the core. The hairpin leg protruding from the innermost layer extends for a first span distance, the hairpin leg protruding from the second inner layer extends for a second span distance, the hairpin leg protruding from the second outer layer extends for a third span distance, and the hairpin leg protruding from the outermost layer extends for a fourth span distance. The first span distance is different from the second span distance. The third span distance is different from the fourth span distance. The first and fourth span distances are substantially the same. The second and third span distances are substantially the same. |
| US10985621B2 |
Molded motor
A molded motor of the present invention includes a rotor, a stator, a pair of shaft bearings, a pair of metal brackets, and a molding resin. The rotor has: a rotary shaft extending in a shaft direction; and a rotary body that has a permanent magnet and is fixed to the rotary shaft. The stator has: a stator core on which a plurality of salient poles are formed; and a plurality of coils each wound on each salient pole via an insulator, where the stator is covered by the molding resin and is disposed to face the rotor. The pair of metal brackets each fix each of the shaft bearings, and the shaft bearings rotatably support the rotor. Further, the rotary body has a dielectric layer formed between the rotary shaft and an outer peripheral surface of the rotary body. A metal member is provided, on an outer peripheral side of a coil end of the coil and on at least a part facing the coil end, in a circumferential direction. |
| US10985620B2 |
Devices to be used as magnets
There is provided a device to be used as a magnet. The device comprises a first member, a second member, and a third member. The first member defines a trench extending along a longitudinal direction. The trench has a top being open. Moreover, the first member comprises a first material being magnetizable. The second member is received in the trench and secured to the first member. The second member comprises a second material being magnetizable. Furthermore, the third member is received in the trench and secured to the first member. The third member comprises a third material being magnetizable. The third member and the second member are disposed side-by-side along the longitudinal direction. |
| US10985618B2 |
Wireless transmitter with switchable mode
A wireless transmitter includes a an amplifier; and a switchable transformer, coupled to the amplifier, wherein the amplifier is configured to be coupled to the switchable transformer in first and second configurations, wherein the first configuration causes the amplifier to provide a first output impedance to the switchable transformer, and wherein the second configuration causes the amplifier to provide a second output impedance to the switchable transformer, the first and second output impedances being different from each other. |
| US10985613B2 |
Wireless inductive power transfer
A power transmitter (101) of a wireless power transfer system comprises a resonance including a transmitter coil (103) for generating a power transfer signal for wirelessly transferring power to a power receiver (105). Further, a driver (1303) generates a drive signal for the resonance circuit (201) and a message receiver (1305) is arranged to receive messages from the power receiver (105). A power loop controller (1307) implements a power control loop by adapting the power of the drive signal in response to power control messages received from the power receiver (105). However, the regulation is subject to a constraint of at least one of a current or voltage of the resonance circuit and a power of the drive signal being below a maximum limit. Further, the power transmitter (101) comprises an adapter (1309) which adapts the maximum limit in response to a load indication indicative of a loading of the power transfer signal by the power receiver (105). |
| US10985610B2 |
High speed control systems and methods for economical optimization of an electrical system
The present disclosure is directed to systems and methods for economically optimal control of an electrical system. A two-stage controller includes an optimizer and a high speed controller to effectuate a change to one or more components of the electrical system. The high speed controller receives a set of control parameters for an upcoming extended time period. The control parameters include a plurality of bounds for an adjusted net power of the electrical system. The high speed controller sets an energy storage system command control variable (ESS command) based on a state of adjusted net power of the electrical system and the set of control parameters. |
| US10985608B2 |
Back-up power system for a component and method of assembling same
A back-up power control system for an AC-powered component includes a bypass starter coupled to an AC bus, and a variable frequency drive (VFD) coupled to a DC bus. The VFD is selectively operable in each of (i) an active mode, such that said VFD converts DC power provided by the DC bus into a selectable frequency AC power signal, and (ii) a stand-by low-power mode. The system also includes a controller operatively coupled to the bypass starter and the VFD and programmed to (a) while the AC bus is in a normal operating condition, command the VFD to the low-power mode and operatively couple the bypass starter to the AC-powered component, and (b) while the AC bus is in an outage condition, command the VFD to the active mode and operatively couple the VFD to the AC-powered component. |
| US10985606B2 |
Power supply system
A power supply system disclosed here is connected to an electric power system through a distribution device. The power supply system includes a plurality of strings connected to the distribution device and a failure detector. The failure detector of the power supply system is configured to perform a first process of connecting at least one battery module to a main line to set a voltage detected by a string voltage detector at a voltage higher than a predetermined voltage in a state where a switch disconnects the distribution device and the main line, a second process of sending a disconnecting signal for disconnecting all the sweep modules from the main line, and a third process of determining whether the voltage detected by the string voltage detector is lower than the predetermined determination voltage or not after the second process. |
| US10985605B2 |
Power management circuit and electronic device thereof and power supply method thereof
A power management method includes: determining, by a control circuit, whether a first connector is connected to a first power supply and whether a second connector is connected to a second power supply. The method further includes: controlling, by the control circuit, a first conversion circuit to supply power to a battery unit and a system circuit, and computing a second fully-charged condition that is less than a first fully-charged condition when a determining result is yes. The method also includes: determining, by the control circuit, whether power information of the battery unit reaches the second fully-charged condition, and controlling, by the control circuit, a second conversion circuit to convert a second power from the second connector according to the second fully-charged condition, to supply power to the battery unit and the system circuit. A related circuit and electronic device are also provided. |
| US10985604B2 |
Power supply redundancy device for a display system
A system comprises a redundancy circuit board including a plurality of primary input connectors each connectible to a primary power supply that supplies primary electrical energy, a redundancy power input connector connectible to a redundant power supply that supplies redundant electrical energy, a plurality of output connectors connectible to a display component powerable by the primary or redundant electrical energy, and a plurality of electrical pathways including primary pathways each connecting a primary input connector to a corresponding output connector, redundant pathways each connecting the redundancy input connector to a corresponding output connector. The system also includes one or more electrical devices that detect whether primary electrical energy has been interrupted along a first primary pathway, activate the redundant power supply to supply redundant electrical energy to the redundancy input connector, and direct redundant electrical energy along a first redundant pathway to the first output connector. |
| US10985603B2 |
Three-source automatic redundant bypass-isolation switches and related power systems and methods
Power systems include a housing and an automatic transfer switch (ATS switch) held in the housing, a Bypass switch held in the housing and a control circuit in communication with the ATS switch and the Bypass switch to automatically direct the Bypass switch and the ATS switch to carry out the selective connections to thereby allow automated, redundant power transitions to the system load from three different power sources. |
| US10985601B2 |
Methods, systems and devices for extending run-times of uninterruptible power supplies (UPSs)
A system for providing power is provided including an uninterruptible power supply (UPS) coupled to a first power source, the UPS including at least one battery therein; at least one external battery module (EBM) coupled to the UPS and a second power source, the second power source being different and separate from the first power source. Each of the at least one EBMs include at least one battery string; and a super charger coupled to the at least one battery string and the at least one battery in the UPS, the super charger being configured to charge the at least one battery string and the at least one battery in the UPS when power from the first power source is removed. EBMs and UPSs are also provided herein. |
| US10985600B2 |
Emergency lighting system with integrated testing and reporting functionality
An emergency lighting system provides testing and reporting functionality in a rapidly repeatable fashion for environments with numerous emergency lighting units. In one or more embodiments, the emergency lighting system comprises a plurality of emergency lighting units capable of conducting one or more tests and reporting their operating condition as test results. One or more terminals receive and aggregate the test results and present the same to a user. Emergency lighting units having an undesirable operating condition can then be readily identified and addressed. |
| US10985597B2 |
Emergency lighting converter
The invention is in the field of emergency lighting devices and power supply of emergency lighting devices. A LED converter for an emergency lighting unit comprises a LED driver for supplying a current to a LED lighting device, an energy storage interface for connecting an energy storage device, a charging circuit for charging the energy storage, and a control circuit. The energy storage interface is configured to connect at least two different types of energy storage devices. The charging circuit sets at least one energy storage management parameter according to the type of energy storage device connected by the energy storage interface. The control circuit determines the type of energy storage device connected by the energy storage interface and controls the charging circuit to set the energy storage management parameter according to the determined type of energy storage device. |
| US10985594B2 |
Battery with electronic compartment
An electronic module includes wireless data transmission circuitry configured to receive from a base station a signal corresponding uniquely to a battery device, wireless charging circuitry coupled with the wireless data transmission circuitry and configured to receive energy wirelessly transmitted from the base station, and a controller configured to, in response to the wireless data transmission circuitry receiving the signal, cause the wireless charging circuitry to charge a battery module of the battery device corresponding to the signal using the received wirelessly transmitted energy. |
| US10985591B2 |
System and method to improve battery performance with cycled current transfer
A battery includes plural battery cells that output a source voltage to power a device, such as an information handling system. A controller of the battery disconnects each battery cell at a predetermined interval for a predetermined time period, such as from a range of between 15 and 60 seconds, while maintaining the source voltage. The predetermined time and interval are selected based upon the load supplied by the battery and an estimated increase in battery output efficiency. |
| US10985578B1 |
Tablet storage and charging cabinet
A tablet charging cabinet includes a storage space having a base, a top wall, two opposed side walls, and a back wall, and a plurality of angled partition panels defining a plurality of storage and charging compartments at different elevations therein, each compartment having a respective connector at the back of the respective panels. Each connector is configured for providing power supply and network connection to a respective electronic device connected thereto. At least two alignment posts located on two sides of each connector to facilitate alignment of an electronic device to a respective connector. Each partition panel is configured to have an opening to allow a charging indicator light of an electronic device to be visible from outside the cabinet. The plurality of partition panels are angled downward toward the back wall to facilitate connection of an electronic device to a respective connector. |
| US10985576B2 |
Battery pack
A battery pack, a method of heating a battery cell and an electrical combination. The battery pack may include a housing; a battery cell; a heating element operable to provide heat to the battery cell; a temperature sensing device operable to sense a temperature of an interior of the battery pack; a heating switch operable to control whether power is provided to the heating element; and an electronic processor configured to receive a signal from the temperature sensing device, the signal indicating the temperature of the interior of the battery pack, determine that the temperature of the interior of the battery pack is less than a predetermined temperature threshold, and in response to determining that the temperature of the interior of the battery pack is less than the predetermined temperature threshold, close the heating switch to provide power to the heating element. |
| US10985567B1 |
Methods and systems for providing electric energy production and storage
The present disclosure provides a method and a system for the production and storage of electric energy. The method performed by a central control unit includes providing the power supply to a customer location from an electrical power supply system. The method further includes determining whether power supply is available from a remote power system. The availability of the power supply is determined based on determining whether electric power is being exchanged with an interface electrically connecting a gateway AC battery of the electrical power supply system to the remote power system. The method further includes charging and discharging of the AC batteries using power supply that is being exchanged between the gateway AC battery and the remote power system for providing power supply from the gateway AC battery to the customer location, and from photovoltaic panels equipped with AC/DC converters. |
| US10985565B2 |
Building management and appliance control system
The present disclosure is directed to energy storage and supply management system. The system may include one or more of a control unit, which is in communication with the power grid, and an energy storage unit that stores power for use at a later time. The system may be used with traditional utility provided power as well as locally generated solar, wind, and any other types of power generation technology. In some embodiments, the energy storage unit and the control unit are housed in the same chassis. In other embodiments, the energy storage unit and the control unit are separate. In another embodiment, the energy storage unit is integrated into the chassis of an appliance itself. |
| US10985564B2 |
Electric power-regulating system and method thereof
An electric power-regulating system includes an electric-load end, a power-supply end, a power regulator, a DC-bus device, a flywheel energy-storage device, a switch device and a controller. The flywheel energy-storage device connects the DC-bus device. The switch device is connected between the flywheel energy-storage device and the DC-bus device. The switch device provides at least one current-flow direction between the DC-bus device and the flywheel energy-storage device. The controller controls the power regulator and the flywheel energy-storage device. When a voltage of the DC-bus device exceeds a operation range, the controller selectively limits the current-flow direction of the switch device. Further, when a voltage-bias direction of the switch device and the current-flow direction are the same, the controller allows a current of the DC-bus device to flow into or out of the flywheel energy-storage device in the current-flow direction. In addition, an electric power-regulating method is also provided. |
| US10985547B2 |
Current differential protection method for self-adaptive half-wavelength line based on time-difference method
A current differential protection method for a self-adaptive half-wavelength line based on a time-difference method. Since an electrical distance of half-wavelength power transmission is long, after a fault occurs, there is an obvious time difference between the actuation times for protecting starting elements at two sides of a line. According to the principles of wave propagation, the position of a fault point can be determined by means of a difference between the actuation times for protecting the starting elements at the two sides of the line. By means of taking the fault point as a differential point, a current value at the differential point can be obtained according to a long line equation by means of the voltage and current at protection-mounted positions at the two sides of the line, and a differential current is then calculated. |
| US10985546B2 |
Low-loss and fast acting solid-state breaker
A circuit including a source, a load, and an isolation circuit for controllably isolating the load from the source. The isolation circuit is disposed between the source and the load. The isolation circuit includes at least one insulated-gate bipolar transistor (IGBT) and at least one gate turn-off thyristor (GTO) in parallel with the insulated-gate bipolar transistor. When no fault condition exists, the GTO is configured to be ON to couple the load to the source. When a fault condition exists, the at least one IGBT is configured to turn ON. After the at least one IGBT turns ON, the at least one GTO is configured to turn OFF. After a predetermined amount of time, reflecting the post fabrication alteration to the GTO's minority carrier lifetime (e.g. electron irradiation), after the at least one GTO turns OFF, the at least one IGBT is configured to turn OFF. Alternatively, the circuit is used as an inverter switch, where at the command to turn ON is supplied, the at least one IGBT is turned ON, followed by the at least one SGTO. When commanded to turn OFF the at least one SGTO is turned OFF followed by the at least one IGBT. This alternative configuration allows the robust, controllable switching speeds of IGBTs and the superior conduction efficiency of SGTOs. The two configurations mentioned above utilize a wide range of SGTO performance, thus the ability to control the SGTOs turn-off speed by reducing its minority carrier lifetime after the device is processed is of large importance. The efficiency of all uses of the circuit can be optimized with the judicious selection of SGTO minority carrier lifetime and the ratio of active area between the SGTO and IGBT devices. In all cases there is a balance between the time the circuit can achieve hard turn-off without current commutation, the conduction efficiency of the circuit and the maximum amount of controllable current. In all cases both the conduction efficiency of the circuit is higher than an IGBT-only based circuit, and the switching performance is higher than a GTO-only based circuit. |
| US10985545B2 |
Electrical switching device and associated configuration and diagnostic methods
A switching device includes two connection lands, a measurement device for measuring a first quantity of a current flowing between the two lands, a power supply system and a trigger module, the latter including a first driver module for detecting an electrical fault according to first values stored in a first memory and controlling a switching member; a communication module for receiving and storing second values in a second, non-volatile memory; and a second driver module for replacing the first values with the second values in the first memory. The first driver module compares a second quantity of the first supply current with a threshold and controls the supply of power to the second driver module if the second value is higher than or equal to the threshold. |
| US10985543B2 |
Hanging assembly and display apparatus having the same
A hanging assembly includes at least one flexible hanging cable, at least one first fixing component, and a frame. The flexible hanging cable includes a power wire and a hanging wire combined with each other. The first fixing component is connected to the flexible hanging cable and adapted to be fixed at a fixed position. The frame is adapted to be fixed at the fixed position, and the at least one first fixing component is adapted to be fixed on the frame. In addition, a display apparatus applying the hanging assembly is also provided. |
| US10985542B2 |
Wire protecting protector and protector-equipped wire
An object of the present invention is to reduce the constraints on the mounting of a wire protecting protector to a wire, while achieving a reduction in the weight of the wire protecting protector. A wire protecting protector is made of a foamed resin and is formed in a shape having a wire housing recess capable of housing a wire, and a surface of the wire protecting protector that includes an inner circumferential surface on the wire housing recess side is a surface formed through molding. Preferably, a reinforcing film is formed on at least a part of the surface of the wire protecting protector. |
| US10985539B1 |
Unmanned aerial vehicle line and cable stringing system
An unmanned vehicle line and cable string apparatus is provided and the method of use thereof. A small drone has a shot line canister loaded with an inside wound shot line string spool. Shot line is strung between power line towers wherein the inside shot line string end is attached to a remotely controlled released shot line sinker. The sinker is deployed near the proximate tower, the drone is directed to the distal tower deploying shot line from the shot line canister. The shot line canister, having a remotely controlled jettison mechanism and an end of shot line detection mechanism, is jettisoned at the distal power line tower. As shot line is dispensed, the vehicle loses weight thereby extending the flying time, distance, and maneuverability particularly as the vehicle approaches the distal tower. Because the shot line is deployed and not dragged, the impact of inclement weather conditions is minimized. |
| US10985537B2 |
Power overlay architecture
A modular power overlay architecture includes at least two sets of power overlay tiles arranged to provide for or meet a desired power overlay architecture demand. The power overlay assembly can include a base having seats to receive the power overlay tiles. The power overlay tiles can include power switching components arranged relative to a conductive surface commonly arranged relative to each of the at least two sets of power overlay tiles. |
| US10985532B2 |
Semiconductor optical waveguide and optical integrated element
The object is to provide a technology capable of efficiently injecting a current into a core layer of a buried waveguide. On one end side of the substrate, a buried waveguide including a core layer, a cladding layer, and a current blocking layer is disposed, both sides of the core layer in a layer-stacking direction are sandwiched by the cladding layer, and both sides of the core layer in a width direction that is perpendicular to the layer-stacking direction are sandwiched by the current blocking layer. On another end side of the substrate, a ridge waveguide including the core layer and the cladding layer is disposed, and both sides of the core layer in the layer-stacking direction are sandwiched by the cladding layer. |
| US10985528B2 |
Laser diodes separated from a plurality of laser bars
A laser diode includes a semiconductor body having a substrate and a semiconductor layer sequence arranged on the substrate, which includes an active zone that generates electromagnetic radiation, wherein the semiconductor body has a first main surface and a second main surface opposite the first main surface and at least one first and second laser facet, which are respectively arranged transversely to the first and second main surfaces, and at least one structured facet region located at a transition between the first main surface and at least one of the first and second laser facets, and the structured facet region includes at least a strained compensation layer or a recess. |
| US10985519B2 |
Active LMA optical fiber and laser system using the same
A laser system based on nonlinear pulse compression and a LMA optical fiber therefor are provided. The LMA optical fiber is configured to amplify seed light pulses and promote the onset of nonlinear spectral broadening. The LMA optical fiber includes a first section having constant core and cladding diameters and receiving and supporting propagation of the light pulses in multiple transversal modes. The first section is configured to suppress high order modes propagating therealong. The LMA optical fiber further includes a tapered second section receiving the fundamental mode from the first section, the core and cladding diameters increasing gradually along said second section so as to provide an adiabatic transition of the fundamental mode. The LMA optical fiber further includes an optional third section having constant core and cladding diameters. Dispersive compression of the light pulses outputted by the LMA optical fiber provides excellent beam quality and high peak powers. |
| US10985518B2 |
Lasers with setback aperture
The present disclosure relates, generally, to lasers and, more particularly, to lasers with a setback aperture. In one in illustrative embodiment, a laser comprises front and rear resonator mirrors, an output window positioned near the front resonator mirror, and a plurality of waveguide walls extending between the front and rear resonator mirrors and extending between the rear resonator mirror and an aperture defined by the plurality of waveguide walls, such that a laser beam formed between the front and rear resonator mirrors will propagate in free-space between the aperture and the output window so that a first cross-sectional profile of the laser beam at the aperture will be different than a second cross-sectional profile of the laser beam at the output window. |
| US10985516B1 |
Outlet wall plate charger apparatus
The present embodiments disclose an outlet wall plate charger apparatus. The outlet wall plate charger apparatus includes a wall plate having a lower portion and an upper portion. The lower portion includes a mounting aperture and an outlet aperture extending therethrough. The upper portion protrudes from the lower portion to define an upper cavity and includes a top face having at least one cord slot. A charger includes a charger body dimensioned to fit within the upper cavity and a pair of plug blades extending from the charger body. An upper face of the charger body has at least one cable port, each being configured to receive a charging cable. |
| US10985504B2 |
Electrical connector and connector device
An electrical connector is attached to a wiring substrate and mated with a counterpart connector connected to a signal transmission medium. A shell of the electrical connector has a pair of wall parts that contact a ground member on the counterpart connector. One wall part distant from the signal transmission medium includes a first side plate that has one end attached to a ground conductive path of the wiring substrate and extends in a direction away from the wiring substrate, a joining part that has one end joined to another end of the first side plate, and a second side plate that has one end joined to another end of the joining part and extends in a direction closer to the wiring substrate. The second side plate has a contact piece that extends in a direction away from the wiring substrate and elastically contacts the ground member. |
| US10985502B2 |
Connector with pry preventing protrusion
A connector (10) includes a first connector (20) and a second connector (50) to be connected to each other. The first connector (20) includes first terminals (21) and a first housing (23) configured to accommodate the first terminals (21). The second connector (50) includes second terminals (51) and a second housing (53) configured to accommodate the second terminals (51) and having a receptacle (54) to be fit to the first housing (23). A concave portion (30) is provided on a side of the first housing (23) to be fit to the second housing (53). The second housing (53) is provided with a pry preventing protrusion (62) projecting forwardly of the receptacle (54) and configured to suppress a positional deviation of the second housing (53) with respect to the first housing (23) by entering the concave portion (30) during a connecting operation. |
| US10985500B2 |
Connector assembly
A connector assembly is provided, including a plug including a plug casing defining a housing, and a plug polarizing socket arranged in the housing; a base including a base casing configured to be assembled with the plug casing, the base casing including a base polarizing pin matching the plug polarizing socket and configured to fit together with the plug polarizing pin during assembly of the plug and base casings; and a snap-fitting component supported by the base polarizing pin and by the plug casing, and configured to be activated when the base polarizing pin is in an end of travel position in the housing of the plug casing. |
| US10985498B2 |
Framing assembly with modular connectors
Embodiments of a framing assembly including modular connectors for interconnecting components of the framing assembly are disclosed. |
| US10985492B2 |
Connector shroud configuration
An illustrative example embodiment of a connector includes a terminal configured to establish an electrically conductive connection with another component and a shroud surrounding the terminal. The shroud includes a first sidewall and a second sidewall that is transverse to the first sidewall. The first sidewall and the second sidewall have a sidewall dimension in a direction parallel to a longitudinal axis of the terminal. The shroud includes a first transition between the first sidewall and the second sidewall in the form of a hollow cylindrical sector having a first angular measurement of more than 90 degrees. The transition has a transition dimension that is less than the sidewall dimension. |
| US10985488B1 |
Electrical contact, connector and method of manufacture
An electrical contact and connector (also known as elastic electrical contact and system) are disclosed herein for testing semiconductor devices such as integrated circuit (IC) packages, particular high density IC packages. The elastic electrical contact comprises a plurality of interlaced or interwove and unsupported conductive wires. The electrical contact system comprises the elastic electrical contacts and a carrier having a plurality of through openings. The elastic electrical contacts are placed in their respective through openings with both ends exposed from the through openings. Method of making and using the elastic electrical contact are also provided. |
| US10985487B2 |
Electrical connector between a bus and a circuit breaker
An electrical connector is provided for electrically coupling two electrical components. Opposing ends of the connector are coupled to each of the electrical components. At the first end, the connector is disposed in an opening of the first electrical component to establish electrical connection. The first end includes multiple contact portions that are equally biased against the sides of the opening. |
| US10985482B2 |
Electrical connector having reduced crosstalk with improved signal transmission
An electrical connector includes: a first terminal with one end having a first contact and a second terminal with one end having a second contact. The first contact is located in a first accommodating hole, and a first distance exists between the first contact and an inner wall of the first accommodating hole. A width of the second contact is greater than a width of the first contact. The second contact is located in a second accommodating hole, and a second distance exists between the second contact and the inner wall of the second accommodating hole. A width of the first accommodating hole at the first contact is equal to a width of the second accommodating hole at the second contact, and the first distance is greater than the second distance. |
| US10985479B2 |
Compression-mounted electrical connector
An electrical connector includes electrical contacts that are configured to be mounted to an electrical cable, and mating ends that are configured to be surface mounted to a contact pad of an underlying substrate, such that the mating ends flex and apply a pressure against the contact pad. |
| US10985478B1 |
Low profile lighting adapters
A low profile lighting adapter can include a first housing section configured to hold an electrical ground connection, and a second housing section configured to couple with the first housing section, the second housing section including a planar surface orthogonal to the first housing section. The low profile lighting adapter can include a second electrical connection disposed in the first housing section and opposite of a first electrical connection, wherein the first housing section is configured to allow individual actuation of the second electrical connection along an axis orthogonal to a planar surface of the second housing section. The low profile lighting adapter can include an extending arm coupled to the second housing section and configured to rotate about the axis. Certain of the disclosed embodiments can permit a live connection to be individually set at different levels to engage different electrical circuits on a light track. |
| US10985477B1 |
Removable terminal block assembly that permits an I/O base to operate in simplex mode or duplex mode
An I/O device includes an I/O base, at least two I/O modules supported on the I/O base, and a duplex terminal block assembly supported on the I/O base. The at least two I/O modules include a first I/O module and a second I/O module coupled to the duplex terminal block assembly in parallel. The duplex terminal block assembly can include connectors for connecting to a field device. The duplex terminal block assembly can include conductive structures for coupling the connectors with each of the first and second I/O modules. The duplex terminal block can be installed in a pair of ports in an I/O base to connect two I/O modules in parallel. |
| US10985473B2 |
Dielectric resonator antenna
A dielectric resonator antenna having a dielectric resonator element and a substrate assembly attached to the dielectric resonator element. The substrate assembly includes a feeding network arranged to: feed the dielectric resonator element to produce a first linearly-polarized omnidirectional radiation pattern at a first resonant mode, and feed the dielectric resonator element to produce a second linearly-polarized omnidirectional radiation pattern at a second resonant mode different from the first resonant mode. |
| US10985471B2 |
Radar device
A radar device includes: a housing that includes an aperture in a front direction as a transmitting direction of an electromagnetic wave; a circuit board disposed in the housing such that a board surface extends along the front direction; an antenna unit that includes antenna elements being arrayed along a direction intersecting the front direction in a region on a side in the front direction of the circuit board, and that transmits the electromagnetic wave to the outside of the housing through the aperture and receives a reflected wave of the electromagnetic wave; and a dielectric lens that is disposed in the aperture of the housing to extend along a direction in which the antenna elements are arrayed and that has a semi-cylindrical shape or a parabolic-cylindrical shape projecting in the front direction. |
| US10985469B2 |
Scanning antenna and method for manufacturing same
The scanning antenna (1000) is a scanning antenna in which antenna units (U) are arranged, the scanning antenna comprising: a TFT substrate (101) including: a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15), a slot substrate (201) including: a second dielectric substrate (51), and a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; a sealing portion that envelopes the liquid crystal layer; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged in correspondence with the plurality of patch electrodes. The sealing portion includes a main sealing portion (73Fa) that defines an injection port (74Fa) and an end sealing portion (75Fa) that seals the injection port (74Fa). The end sealing portion (75Fa) is formed of a thermosetting sealant material. |
| US10985467B2 |
Stacked patch antennas using dielectric substrates with patterned cavities
A GNSS RHCP stacked patch antenna with wide dual band, high efficiency and small size is made of a molded high-permittivity material, such as ceramics, with a patterned cavity in the dielectric substrate. The perforated cavities in the substrate reduce the effective dielectric constant, increase the bandwidth and efficiency. The high-order modes can be manipulated through the design of cavities. |
| US10985466B2 |
Terahertz detector and method based on N×M dielectric resonant antenna array
The present disclosure discloses a terahertz detector based on a N×M dielectric resonant antenna array, wherein a N×M on-chip dielectric resonant terahertz antenna array is connected to a matching network, the matching network is connected to a source of a NMOSFET, a gate of the NMOSFET is sequentially connected to a first bias resistor and a first bias voltage, a third transmission line is connected between the first bias resistor and the gate, a drain of the NMOSFET is connected to a first DC blocking capacitor, the other end of the first DC blocking capacitor is connected to a low noise preamplifier, a second bias resistor and a second bias voltage are further connected between the first DC blocking capacitor and the low noise preamplifier, and the low noise preamplifier is further provided with a voltage feedback loop. The present disclosure also discloses a design method for the same. |
| US10985464B2 |
Miniaturized inductive loop antenna with distributed reactive loads
A device for implanting into, or mounting onto, a body includes an enclosure, an inductive loop antenna disposed on a surface within the enclosure, and an integrated circuit (IC) disposed within the enclosure and coupled to the inductive loop antenna. The inductive loop antenna includes one or more distributed reactive loads disposed along the inductive loop antenna that adjust a reactance of the inductive loop antenna. The one or more distributed reactive loads include signal trace sections that run along, or adjacent to, the surface upon which the inductive loop antenna is disposed. The IC includes communication circuitry coupled to the inductive loop antenna to wirelessly communicate over the inductive loop antenna. The one or more distributed reactive loads adjust the reactance of the inductive loop antenna to improve conjugate reactance matching of the inductive loop antenna to the IC. |
| US10985459B2 |
Antenna structure and wireless communication device using the same
An antenna structure of few components and reduced size which functions by switching between components to achieve radiation in three different frequency bands includes two radiating portions, a feeding portion, a matching circuit, and a first switching circuit. With the first switching circuit closed, current flows along a first radiating portion to activate a first frequency band. A second radiating portion obtains the current from the first switching circuit by coupling with the first radiating portion, to activate a second frequency band. Current in the first radiating portion can activate a third frequency band. With the first switching circuit open, current in the first radiating portion activates radiation in the first frequency band. The second radiating portion can radiate in second frequency band by coupling current from the first radiating portion. Frequency multiplication of the first frequency band can activate the third frequency band. |
| US10985454B2 |
Base station antennas having bottom end caps with angled connector ports
A base station antenna includes a radome having a bottom opening, an antenna assembly within the radome, a bottom end cap covering the bottom opening of the radome, the bottom end cap including a plurality of connector receptacles, and a plurality of connectors mounted in respective ones of the connector receptacles, each connector including a connector port that extends downwardly from the bottom end cap. Longitudinal axes of a first subset of the connectors extend at respective oblique angles with respect to a plane that is normal to a longitudinal axis of the antenna. |
| US10985446B1 |
Physically reconfigurable structurally embedded vascular antenna and method of making
A method of making a reconfigurable antenna comprises the steps of applying one or more first layers of a prepreg laminate fabric to a form having a desired contour; applying a pattern corresponding to an antenna shape to the first layers of prepreg fabric; applying one or more second layers of the prepreg laminate fabric atop the pattern to form a laminate stack; curing the laminate stack; and removing the pattern to form channels in the antenna shape. The desired contour may be an aircraft skin panel or an airfoil panel. The pattern may be a polymer sheet with an applied cPLA antenna design. The curing step may be performed in a vacuum bag under the application of vacuum and heat. The removing step may be performed by heating the cured laminate stack to remove the pattern. |
| US10985445B2 |
Wirelessly reconfigurable antenna
A reconfigurable antenna element is controlled using a wirelessly powered and wirelessly activated switch, where the antenna element is part of an antenna or antenna array. A control signal for reconfiguring the antenna element is embedded into a wirelessly transmitted data signal for transmission by the antenna. |
| US10985441B2 |
Radio frequency filter module
A radio frequency filter module includes: an antenna package including patch antennas and having first and second frequency passbands different from each other; an integrated circuit (IC) package including an IC; and a connecting member disposed between the antenna package and the IC package, and having a laminated structure configured to electrically connect the patch antennas and the IC to each other. The connecting member includes: a first radio frequency filter pattern having the first and second frequency passbands, and including a first port electrically connected to the IC and a second port electrically connected to at least one of the patch antennas; and a second radio frequency filter pattern having the first and second frequency passbands, and including a third port electrically connected to the IC and a fourth port electrically connected to at least another one of the patch antennas. |
| US10985435B2 |
Tunable probe for high-performance cross-coupled RF filters
A tunable probe includes a first resonator, a second resonator spaced from the first resonator, and a cross-couple extending from the first resonator to the second resonator. The cross-couple includes a first substrate and a second substrate disposed between the first and second resonator to create a capacitance between the first and second resonators. The cross-couple further includes a wire connecting the first and second substrates and a dielectric surrounding the wire. |
| US10985434B2 |
Waveguide assembly including a waveguide element and a connector body, where the connector body includes recesses defining electromagnetic band gap elements therein
A waveguide assembly which includes an elongated waveguide element (1) and a connector body (2). The connector body (2) is connected to an end of the elongated waveguide element (1) and has a substantially planar bottom surface (24) and an opposing top surface (23). The connector body is made from a single piece of partially metallized dielectric. The connector body has a waveguide coupling element (21) adjacent to the elongated waveguide element (1). The connector body further has an arrangement of electromagnetic band gap elements (27) adjacent to the waveguide coupling element (21). |
| US10985433B2 |
Battery module having structure breaking connector by using venting gas
A battery module has a cell stack including a first battery cell and a second battery cell, which respectively have electrode leads and are stacked to face each other. A connector configured to connect the electrode leads of the pair of battery cells. A support frame provided to at least one side of the cell stack and having a pair of lead slits at which the electrode leads are drawn and an injection slit formed at a location corresponding to the connector to give a passage through which a venting gas discharged at venting of the battery cell is injected. |
| US10985432B2 |
Rechargeable battery having terminal
A rechargeable battery having a terminal is disclosed. In one aspect, the rechargeable battery includes an electrode assembly including a first electrode, a second electrode, and a separator interposed between the first electrode and the second electrode. The battery also includes a case housing the electrode assembly. The case defines a hole at the bottom of the case and an opening at the top of the case. The battery further includes a cap plate connected to the opening in the case and a first terminal bonded to the first electrode and penetrating through the hole so as to protrude beyond the exterior of the case. |
| US10985428B2 |
Lead-acid battery separators with improved performance and batteries and vehicles with the same and related methods
Improved battery separators are disclosed herein for use in flooded lead-acid batteries, and in particular enhanced flooded lead-acid batteries. The improved separators disclosed herein provide for enhanced electrolyte mixing and substantially reduced acid stratification. The improved flooded lead-acid batteries may be advantageously employed in applications in which the battery remains in a partial state of charge, for instance in start/stop vehicle systems. Also, improved lead-acid batteries, such as flooded lead-acid batteries, improved systems that include a lead-acid battery and a battery separator, improved battery separators, improved vehicles including such systems, and/or methods of manufacture and/or use may be provided. |
| US10985422B2 |
Battery housing for a vehicle driven by an electric motor
A battery housing for a vehicle driven by an electric motor comprises a tray part with a bottom and side walls formed thereon, for receiving at least one battery module. The side walls of the tray part are respectively interconnected by a curved edge section. Said battery housing is characterized in that each curved edge section of the tray part is connected to at least one of the side walls connected thereby, with a connecting wall section curved in the opposite direction to the curved edge section being connected between the respective curved edge sections and side walls, and the side walls as well as each curved edge section and each curved connecting wall section are at a distance from the, or the plurality of, battery module(s). |
| US10985419B2 |
Battery packaging material and battery
A battery packaging material which is slim, has excellent moldability, effectively prevents curl after molding, and moreover, is capable of imparting sufficient surface insulation to a battery. This battery packaging material is configured from a laminate which is at least provided with a polyester film layer, an aluminum alloy foil layer, and a thermally-fusible resin layer in this order. The thickness of the polyester film layer is 23-27 μm, the thickness of the aluminum alloy foil layer is 33-37 μm, the thickness of the thermally-fusible resin layer is 55-65 μm, the thickness of the laminate is 130 μm or less, and the insulation breakdown voltage of the polyester film layer-side surface is 13 kV or greater. |
| US10985418B2 |
Battery package structure
An apparatus comprises an electrochemical energy storage device, a non-conductive film at least partially covering the electrochemical energy storage device, and a nano-grain metallic film at least partially covering the non-conductive film. The electrochemical energy storage device may include a cathode electrode layer, an anode electrode layer, and a separator layer therebetween. |
| US10985413B2 |
Method for testing all solid state battery, method for producing all solid state battery, and method for producing battery pack
A method for testing an all solid state battery with which the presence of short circuit or the presence of defect causing short circuit can be detected with high accuracy by a method in which a voltage is applied to a battery and the current value thereof is measured. The method includes the steps of: a resistance increasing step of increasing resistance of an all solid state battery to 3.2*105 Ω·cm2 or more; a voltage applying step of applying voltage to an all solid state battery of which the resistance is increased; and a judging step of judging acceptability of the all solid state battery based on a current value measured in the voltage applying step. |
| US10985404B2 |
Electrolyte for lithium secondary battery, and lithium secondary battery comprising electrolyte
The present invention relates to an electrolyte for a lithium secondary battery, and a lithium secondary battery including the electrolyte. The electrolyte includes a non-aqueous organic solvent; a lithium salt; a first additive including a compound represented by Chemical Formula 1; and a second additive including LiN(CxF2x+1SO2)(CyF2y+1SO2), wherein 0≤x≤20 and 0≤y≤20: wherein, in Chemical Formula 1, A is a substituted or unsubstituted aliphatic chain or (—C2H4—O—C2H4-)n, and n is an integer from 1 to 10. |
| US10985402B2 |
Battery
A battery includes a first positive electrode collector, a first negative electrode collector, a first power generating element, a second power generating element, and a first insulating part. The first and second power generating elements each include a positive electrode active material-containing layer, a negative electrode active material-containing layer, and an inorganic solid electrolyte-containing layer. In each of the first and second power generating elements, the inorganic solid electrolyte layer is in contact with the positive electrode active material-containing layer and the negative electrode active material-containing layer. The positive electrode active material layers of the first and second power generating elements are in contact with the first positive electrode collector. The negative electrode active material layers of the first and second power generating elements are in indirect contact with the first negative electrode collector. The first insulating part is disposed between the first and second power generating elements. |
| US10985400B2 |
Nonaqueous electrolyte secondary battery and method for manufacturing the same
A method for manufacturing a nonaqueous electrolyte secondary battery which includes an electrode assembly, a housing with an opening and contains the electrode assembly, and a sealing member sealing the opening, the electrode assembly comprising a positive electrode and a negative electrode. The positive electrode includes a positive electrode active material, lithium carbonate, and lithium phosphate, the negative electrode comprising a negative electrode active material. The method includes placing the electrode assembly in the housing, and placing a nonaqueous electrolyte containing lithium fluorosulfonate in the housing. |
| US10985399B2 |
Negative electrode for lithium ion secondary battery, and lithium ion secondary battery using the same
A negative electrode for a lithium ion secondary battery includes a current collector and an active material-containing layer disposed on the current collector. The active material-containing layer includes: a first negative electrode active material including a carbon material; a second negative electrode active material including a metal element or a metalloid element as a constituent element, the metal element or the metalloid element being capable of forming an alloy with lithium; and a binder. The first negative electrode active material contains a spherical graphite, and the binder contains an acrylic resin. |
| US10985398B2 |
Battery unit and battery set
A battery unit includes two bases, two locking components, a plurality of battery cells and two electrode pieces. The two bases fixed to each other through the two locking components. The battery cells and the two electrode pieces are accommodated in the two bases. Two opposite ends of each battery cell respectively abut against the two electrode pieces. Each base has an engaging protrusion and an engaging groove. A battery set is also provided. The battery set is composed by the plurality of battery units and the battery units are electrically connected with each other through at least one electrical connecting component. One of the battery units is engaged with the engaging groove of the other one of battery units through the engaging protrusion. |
| US10985397B2 |
Clamping device for an electrochemical cell stack
A clamping device for an electrochemical cell stack is provided. The clamping device can include a first plate and a second plate. The second plate can be positionable relative to the first plate such that a space between the first plate and the second plate can be sized to receive an electrochemical cell stack. The device also can include a coupling member coupling the first plate to the second plate. At least one of the first and second plates can be movable away from the other plate. The coupling member can have a first end portion and a second end portion. The device further can include an elastic member disposed between the first end portion and the second end portion. |
| US10985396B2 |
Fuel cell stack pressurized by press forks and assembly method of the same
A fuel cell stack is provided and includes a fuel cell assembly in which a plurality of fuel cells are stacked between upper and lower current collectors. The fuel cell stack includes an enclosure that pressurizes and seals the fuel cell assembly in a stacked direction of the fuel cells. |
| US10985390B2 |
Fuel cell system and control method of fuel cell system
Provided is a fuel cell system including: a fuel cell; an anode gas supply device; a pressure sensor; a discharge valve; an estimation unit that estimates an anode gas concentration; and a control unit. The control unit performs first control of opening the discharge valve when a first valve opening condition is established in which the estimated anode gas concentration is equal to or lower than a first concentration, and closing the discharge valve when a first valve closing condition is established in which the estimated anode gas concentration is equal to or higher than a second concentration higher than the first concentration, and performs second control of closing the discharge valve when a deviation between the target pressure value and a value of the pressure sensor is continuously equal to or larger than a predetermined threshold for a predetermined period, and opening the discharge value when a second valve opening condition is established in which the estimated anode gas concentration is equal to or lower than a third concentration lower than the first concentration, or in which a value obtained by multiplying the estimated anode gas concentration by a predetermined coefficient so that the anode gas concentration is estimated to be high is equal to or lower than the first concentration. |
| US10985383B2 |
Scalable, massively parallel process for making micro-scale functional particles
A method of fabrication produces one or more functional microparticles using a parallel pore working piece. In one embodiment, the method forms a particle that includes a segment for the oxidation of a biofuel (such as glucose) and the reduction of oxygen. The particle may be synthesized in a structure with defined and parallel, uniform, thin pores that completely penetrate the structure. Further, the functional microparticle may be configured to reside in a human or animal body or cell such that it may be self-contained fuel cell having an anode, a cathode, a separator membrane, and a magnetic component. In other embodiments, the functional microparticles may deliver energy or therapeutic materials in the body. |
| US10985375B2 |
Slurry composition for non-aqueous secondary battery positive electrode, positive electrode for non-aqueous secondary battery, and non-aqueous secondary battery
Provided is a slurry composition for a non-aqueous secondary battery positive electrode that has excellent stability and enables formation of a positive electrode mixed material layer that causes a non-aqueous secondary battery to display excellent output characteristics. The slurry composition contains a positive electrode active material and a copolymer. The proportion constituted by nickel among transition metal in the positive electrode active material is at least 30.0 mol % and not more than 100.0 mol %. The copolymer includes a nitrile group-containing monomer unit in a proportion of at least 70.0 mass % and not more than 96.0 mass % and a basic group-containing monomer unit in a proportion of at least 0.1 mass % and not more than 5.0 mass %. |
| US10985374B2 |
Binder composition for non-aqueous secondary battery electrode, slurry composition for non-aqueous secondary battery electrode, non-aqueous secondary battery electrode, and non-aqueous secondary battery
Disclosed is a binder composition for non-aqueous secondary battery electrode which comprises: a water-soluble polymer which comprises an acid group-containing monomer unit; and water, wherein the water-soluble polymer comprises the acid group-containing monomer unit in an amount of 5% to 70% by mass, and wherein the water-soluble polymer comprises water-soluble polymer particles having a radius of gyration of 200 nm or less in an amount of 95% to 100% by mass. |
| US10985373B2 |
Lithium battery cathode and method of manufacturing
Provided is cathode active material layer for a lithium battery. The cathode active material layer comprises multiple cathode active material particles and an optional conductive additive that are bonded together by a binder comprising a high-elasticity polymer having a recoverable tensile strain from 5% to 700% (preferably from 10% to 100%) when measured without an additive or reinforcement in said polymer and a lithium ion conductivity no less than 10−5 S/cm (preferably and typically from 1.0×10−5 S/cm to 5×10−2 S/cm) at room temperature. |
| US10985372B2 |
Pyrolytic carbon black composite and method of making the same
A method of recovering carbon black includes the step of providing a carbonaceous source material containing carbon black. The carbonaceous source material is contacted with a sulfonation bath to produce a sulfonated material. The sulfonated material is pyrolyzed to produce a carbon black containing product comprising a glassy carbon matrix phase having carbon black dispersed therein. The pyrolysis can be conducted at a temperature from 1100° C. to 1490° C. A method of making a battery electrode and a lithium ion or sodium ion battery is also disclosed. |
| US10985370B2 |
Composite anode active material, method of preparing the same, and lithium secondary battery including anode including composite anode active material
Provided herein is a composite anode active material including: a porous carbon structure; a first coating layer on the porous carbon structure and including a non-carbonaceous material capable of intercalating and deintercalating lithium; and a second coating layer on the first coating layer and including a carbonaceous material. |
| US10985369B2 |
Method for manufacturing positive electrode active material, and lithium ion battery
A composite oxide with high diffusion rate of lithium is provided. Alternatively, a lithium-containing complex phosphate with high diffusion rate of lithium is provided. Alternatively, a positive electrode active material with high diffusion rate of lithium is provided. Alternatively, a lithium ion battery with high output is provided. Alternatively, a lithium ion battery that can be manufactured at low cost is provided. A positive electrode active material is formed through a first step of mixing a lithium compound, a phosphorus compound, and water, a second step of adjusting pH by adding a first aqueous solution to a first mixed solution formed in the first step, a third step of mixing an iron compound with a second mixed solution formed in the second step, a fourth step of performing heat treatment under a pressure more than or equal to 0.1 MPa and less than or equal to 2 MPa at a highest temperature more than 100° C. and less than or equal to 119° C. on a third mixed solution formed in the third step with a pH of more than or equal to 3.5 and less than or equal to 5.0. |
| US10985365B2 |
Lithium-sulfur battery containing two anode-protecting layers
Provided is a rechargeable alkali metal-sulfur cell comprising: (a) an anode; (b) a cathode active material layer comprising a sulfur-containing material; and (c) an electrolyte or an electrolyte/separator layer; wherein the anode comprises (i) an anode active material layer; (ii) a first anode-protecting layer, in physical contact with the anode active material layer, having a thickness from 1 nm to 100 μm and comprising a thin layer of an electron-conducting material having a specific surface area greater than 50 m2/g; and (iii) a second anode-protecting layer in physical contact with the first anode-protecting layer, having a thickness from 1 nm to 100 μm and comprising an elastomer having a fully recoverable tensile elastic strain from 2% to 1,000% and a lithium ion conductivity from 10−8 S/cm to 5×10−2 S/cm when measure at room temperature. |
| US10985364B2 |
Pliable carbonaceous pocket composite structure, method for preparing the same, electrode, including the same, and energy storage device including the electrode
The present disclosure relates to a pliable carbonaceous pocket composite structure including various particles encapsulated within pliable carbonaceous pockets formed by carbonaceous sheets, a method for preparing the pliable carbonaceous pocket composite structure which enables ultrafast mass production of the pliable carbonaceous pocket composite structure, an electrode including the pliable carbonaceous pocket composite structure, and an energy storage device including the electrode. |
| US10985363B2 |
Electrodes and methods of fabricating electrodes for electrochemical cells by continuous localized pyrolysis
A method of manufacturing a silicon-carbon composite electrode assembly for an electrochemical cell includes forming an electrode by pyrolyzing at least a portion of a polymer in an assembly to form pyrolyzed carbon. The assembly includes an electrode precursor in electrical contact with a current collector. The electrode precursor includes a polymer and an electroactive material. The electroactive material includes silicon. The current collector includes an electrically-conductive material. The pyrolyzing includes directing an energy stream toward a surface of the electrode precursor. The surface is disposed opposite the current collector. The silicon-carbon composite electrode assembly includes the electrode and the current collector. In certain variations, the energy stream includes a laser beam or a plasma jet. In certain aspects, the electrode defines a concentration gradient between a first surface and a second surface. |
| US10985362B2 |
Electrochemical device, negative electrode used for same, and method for manufacturing electrochemical device
A negative electrode for an electrochemical device includes: a negative current collector; a first negative electrode active material layer supported on a first surface of the negative current collector; and a second negative electrode active material layer supported on a second surface of the negative current collector. And capacity C1 per unit mass of the first negative electrode active material layer is greater than capacity C2 per unit mass of the second negative electrode active material layer. As a result, it is possible to provide a negative electrode suited for an electrochemical device having high capacitance, the electrochemical device being manufactured by pre-doping the negative electrode with lithium ions. |
| US10985360B2 |
Methods, systems, and compositions for the liquid-phase deposition of thin films onto the surface of battery electrodes
Methods, systems, and compositions for the liquid-phase deposition (LPD) of thin films. The thin films can be coated onto the surface of porous components of electrochemical devices, such as battery electrodes. Embodiments of the present disclosure achieve a faster, safer, and more cost-effective means for forming uniform, conformal layers on non-planar microstructures than known methods. In one aspect, the methods and systems involve exposing the component to be coated to different liquid reagents in sequential processing steps, with optional intervening rinsing and drying steps. Processing may occur in a single reaction chamber or multiple reaction chambers. |
| US10985357B2 |
Battery wiring module
In a battery wiring module that is attached to a unit cell group, a configuration that can inhibit noise propagation to signal lines is implemented in a more compact manner. A battery wiring module is attached to a unit cell group in which a plurality of unit cells are aligned. The battery wiring module includes: a wiring pattern configured as a signal transmission path on one side of a board main body portion; and a guard pattern that is formed in the vicinity of the wiring pattern on the one side of the board main body portion, and is kept at a predetermined reference potential while being insulated from the wiring pattern. |
| US10985356B2 |
Composite separation membrane for lithium secondary battery and manufacturing method therefor
The present invention relates to a composite separation membrane for a lithium secondary battery, having an excellent effect of improving the life time and safety of a battery and a lithium secondary battery including the membrane. The composite separation membrane includes a porous base layer; a heat-resistant layer formed on one side or both sides of the porous base layer; and a fusion layer formed on an outermost layer. The heat-resistant layer includes inorganic particles connected and fixed by binder polymers, and the fusion layer includes crystalline polymers in the form of particles having a melting temperature of 100° C. or higher. |
| US10985355B2 |
Method for producing functional film, control device, and control method
A coating amount is adjusted based on a result of the inspecting step, then the coating amount is not adjusted during a standby period (Wt) which is a time taken to transfer the film from a coating section (21) to an inspecting section (26), and then the coating amount is adjusted based on the result of the inspecting step after the standby period has elapsed. With the configuration, an amount of a coating layer on a film base material is stabilized. |
| US10985352B2 |
Electrical system with thermal protection
A battery pack for a vehicle electrical system includes a casing for receiving one or more battery modules. The battery modules are insertable into a casing of the battery pack by sliding couplers along pairs of rails and are securable to the ends of the rails. After insertion, the rails thermally insulate one battery module from other battery modules in the battery pack. Additionally, the battery modules may include a top cover with an insulating material to further thermally insulate one battery module from another battery module. The battery pack may additionally be configured with vents for venting the hot gases, such as those generated by a battery module in a thermal runaway event. Additionally, the battery modules may include a second insulating material disposed between cells and configured to thermally insulate the cells from one another. |
| US10985351B2 |
Method of forming a package
A method of forming a package is provided and includes providing two laminate edge portions of the package, each of which includes a foil layer between first and second resin layers; and welding together the respective first resin layers at a first position spaced apart from the edges while not welding the respective first resin layers at the edges, wherein the edge portions include edges from which electrode terminals extend such that portions of the electrode terminals are exposed beyond the edges, and wherein the edge portions are between a sealing portion and exposed portions of positive and negative electrode terminals. |
| US10985348B2 |
Display panel, manufacturing method thereof, and display device
A display panel, a manufacturing method thereof and a display device are provided. The display panel includes a plurality of functional layers arranged on a base substrate. A portion of at least one of the functional layers is removed to form a gap portion. The display panel further includes a light-transmissible structure including the gap portion and configured to allow a light beam to pass therethrough to an optical sensing element arranged at a position corresponding to the light-transmissible structure. An orthogonal projection of the gap portion onto the base substrate overlaps an orthogonal projection of the optical sensing element onto the base substrate. |
| US10985347B2 |
Display apparatus
A display apparatus includes a buffer layer provided on a substrate and having a plurality of concave portions and a black matrix disposed at each of the plurality of concave portions, whereby loss of the black matrix may be prevented and a filling material may be uniformly filled when a transistor substrate and a color filter substrate are bonded. |
| US10985345B2 |
Organic light emitting diode display device
An organic light emitting diode display device includes a display panel including an array substrate displaying an image, a face sealing adhesive layer attached to the array substrate, a side sealing layer covering a side surface of the array substrate, and a protecting substrate attached to the array substrate through the face sealing adhesive layer; and a printed circuit board attached to the protecting substrate. |
| US10985344B2 |
Flexible cover lens films
Flexible display devices, such as flexible cover lens films, are discussed and provided herein. The flexible cover lens film has good strength, elasticity, optical transmission, wear resistance, and thermostability. The cover lens film includes a hard coat layer with a thickness from about 5 μm to 40 μm, an impact absorption layer with a thickness from about 20 μm to 110 μm, and a substrate layer with a thickness from about 10 μm to 175 μm and is disposed between the hard coat layer and the impact absorption layer. By combining the hard coat layer and the impact resistant layer, the cover lens film is both flexible and strong with hardness from 6H to 9H. |
| US10985343B1 |
Display panel and manufacturing method of display panel and electronic device
A display panel and manufacturing method thereof, and electronic device are provided. The display panel comprises a flexible substrate, thin film transistor layer comprising a drain, anode layer, light-emitting layer, cathode layer and photoresist layer arranged sequentially in a stacked manner, wherein the anode layer and drain are electrically connected; the photoresist layer comprises a first photoresist layer, second photoresist layer and third photoresist layer arranged sequentially at intervals; all of the first, second and third photoresist layer are disposed on the surface of cathode layer; a first dielectric layer filling the space between the first and second photoresist layer, and a second dielectric layer filling the space between the second and third photoresist layer are included, and the first and second dielectric layer are used to absorb light incident from one side of photoresist layer away from cathode layer so as to improve contrast of the display panel. |
| US10985341B2 |
Encapsulating thin film, production method thereof, and method for encapsulating display panel
Provided are an encapsulating thin film, a production method thereof, and a method for encapsulating a display panel. The encapsulating thin film has: a protective film; a plurality of discrete metal film units on the protective film; an adhesive layer on each of the metal film units; and optionally a release layer. This encapsulating thin film may be used to encapsulate a plurality of display panels simultaneously. |
| US10985336B1 |
Oxygen scavenging nanoparticles for air-processed quantum dot light emitting diodes
A light-emitting device includes a first electrode, a second electrode, and an emissive layer between the first and second electrodes, where the emissive layer comprises quantum dots and oxygen scavenging nanoparticles. The oxygen scavenging nanoparticles comprise at least one of one or more iron based materials, and one or more organic polymer based materials. |
| US10985332B2 |
Display device and manufacturing method thereof
A display device includes a plurality of islands and a bridge connecting the plurality of islands to each other. Each of the plurality of islands includes a flexible substrate, a thin film transistor positioned on a first surface of the flexible substrate, a first electrode connected to the thin film transistor, and a protective mask positioned on a second surface of the flexible substrate. |
| US10985325B2 |
Aromatic amine derivative, and organic electroluminescent element using same
An aromatic amine derivative represented by formula (1): wherein HAr1, Ar2, L1, L2, and L3 are as defined in the specification, is useful as a material for constituting an organic EL device and realizes an organic EL device having a high efficiency and a long lifetime even when driving at a low voltage. |
| US10985324B2 |
Nitrogen-containing compound, organic electroluminescent device and photoelectric conversion device
A nitrogen-containing compound, an organic electroluminescent device, and a photoelectric conversion device are provided, which relates to the technical field of electronic components. The nitrogen-containing compound has a structure represented by Chemical Formula 1. The organic electroluminescent device using the nitrogen-containing compound and the photoelectric conversion device using the nitrogen-containing compound can be improved. |
| US10985320B2 |
Organic transistor and manufacturing method thereof, array substrate, display device
The present disclosure provides an organic transistor and a manufacturing method thereof, an array substrate, and a display device. The method for manufacturing the organic transistor includes: applying a photoresist on a side of an organic insulating layer; patterning the photoresist to form a confinement well; adding a solution of an organic semiconductor material and an orthogonal solvent to the confinement well; volatilizing the orthogonal solvent by an annealing process to induce directional growth of single crystal of the organic semiconductor material in the confinement well, thereby obtaining an organic single crystal layer; and removing remaining photoresist and using the organic single crystal layer as an active layer. The embodiment of the present disclosure produces an organic single crystal in a flexible display device at a low temperature, and the organic single crystal can be used as an active layer, resulting in an organic transistor having high mobility and stability. |
| US10985315B2 |
Resistive random-access memory
Techniques for fabricating a volatile memory structure having a transistor and a memory component is described. The volatile memory structure comprises the memory component formed on a substrate, wherein a first shape comprising one or more pointed edges is formed on a first surface of the memory component. The volatile memory structure further comprises transistor formed on the substrate and electrically coupled to the memory component to share operating voltage, wherein operating voltage applied to the transistor flows to the memory component. |
| US10985311B2 |
Semiconductor element, magnetoresistance effect element, magnetic sensor and spin transistor
A semiconductor element includes a semiconductor layer, a first electrode and a second electrode. The first electrode and the second electrode are separated from each other on the semiconductor layer. The semiconductor layer has a first semiconductor region and a second semiconductor region. The first electrode and the second electrode are provided on the first semiconductor region. The second semiconductor region is separated from the first electrode and the second electrode. The second semiconductor region is provided to be in contact with at least a part of an end surface of the first semiconductor region. The first semiconductor region has n-type/p-type conductivity. The second semiconductor region has p-type/n-type conductivity. |
| US10985310B2 |
Flexible device and operating methods thereof
A flexible device includes a flexible body and a plurality of piezoelectric materials arranged on the flexible body that deform in response to drive signals causing deformation of the flexible body of the flexible device. |
| US10985307B2 |
Cryogenic transmitter
A semiconductor device includes a transmission circuit coupled between a first voltage supply node and a second voltage supply node, and suitable for outputting an output data signal corresponding to a data value to an output terminal during a data output enable period, and a switching circuit coupled between the first and second voltage supply nodes, and suitable for providing a current path between the first and second voltage supply nodes during a data output disable period. |
| US10985306B2 |
Optoelectronic semiconductor chip
A semiconductor chip includes an electrically insulating layer including a first opening and a second opening, an electrically conductive first connection point, and an electrically conductive second connection point, wherein a carrier mechanically connects to a semiconductor body, the active region electrically connects to a first conductor body and a second conductor body, the electrically insulating layer covers the carrier on a side thereof facing away from the semiconductor body, the first connection point electrically connects to the first conductor body through the first opening, the second connection point electrically connects to the second conductor body through the second opening, the first conductor body is at a first distance from a second conductor body, the first connection point is at a second distance from the second connection point, and the first distance is less than the second distance. |
| US10985305B2 |
Light emitting element mounting substrate, light emitting device, and light emitting module
A light emitting module and the like having a higher heat-dissipation effect includes a light emitting element mounting substrate, one or more light emitting elements, a heatsink including a through-hole in a position corresponding to a screw hole, a bolt screwed in the screw hole and fastening the heatsink and a metal plate or a full thread and a nut for the fastening. In the light emitting element mounting substrate, the metal plate, an insulating layer, and an electrode layer on which the one or more light emitting elements are mountable are stacked in this order. The metal plate includes a bottomed screw hole opened at a surface opposite to a surface in contact with the insulating layer. The bolt or the full thread and the nut have a heat conductivity equal to or greater than that of the metal plate. |
| US10985304B2 |
Highly reliable light emitting diode
A light emitting diode including a first semiconductor layer, a mesa disposed thereon and including a second semiconductor layer and an active layer, an ohmic reflection layer disposed on the mesa to form an ohmic contact with the second semiconductor layer, a lower insulation layer covering the mesa and the ohmic reflection layer and partially exposing the first semiconductor layer and the ohmic reflection layer, a first pad metal layer disposed on the lower insulation layer and electrically connected to the first semiconductor layer, a metal reflection layer disposed on the lower insulation layer and laterally spaced apart from the first pad metal layer, and an upper insulation layer covering the first pad metal layer and the metal reflection layer, and having a first opening exposing the first pad metal layer, in which at least a portion of the metal reflection layer covers a side surface of the mesa. |
| US10985303B2 |
Method of making an LED device
A thermally efficient, cost efficient and compact LED device having an LED module and a circuit board. The LED module having an LED substrate and an LED chip mounted on a mounting surface of the LED substrate. The circuit board is composed of a circuit board substrate and has a plurality of conductive tracks on a surface of the circuit board substrate. The LED substrate is embedded in the circuit board substrate. |
| US10985300B2 |
Encapsulation method for flip chip
An encapsulation method for a flip chip that includes electroforming metal on an electrode surface of a flip chip and a surface of an encapsulation substrate simultaneously. The encapsulation method specifically includes setting an encapsulation substrate around a flip chip; plating a metal conducting film on an electrode surface of the flip chip and a surface of the encapsulation substrate; coating a photoresist on a surface of the metal conducting film; aligning and photoetching an electrode structure on a photoetching plate and an electrode structure of the flip chip, and covering an insulating part between electrodes with the photoresist; taking the metal conducting film as the electrode, electroforming metal inside the photoresist structural model; and removing the photoresist covering the insulating part and removing the metal conducting film. The encapsulation method adopts electroforming and photoetching technology, and thus the process is simplified and the production efficiency is improved. |
| US10985295B2 |
Light-emitting device
A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first contact layer on the first semiconductor layer; a second contact layer on the second semiconductor layer, wherein the first contact layer and the second contact layer comprise a metal material other than gold (Au) or copper (Cu); a first pad on the semiconductor stack; a second pad on the semiconductor stack. |
| US10985291B2 |
Radiation-hard high-speed photodiode device
The photodiode device comprises a substrate (1) of semiconductor material with a main surface (10), a plurality of doped wells (3) of a first type of conductivity, which are spaced apart at the main surface (10), and a guard ring (7) comprising a doped region of a second type of conductivity, which is opposite to the first type of conductivity. The guard ring (7) surrounds an area of the main surface (10) including the plurality of doped wells (3) without dividing this area. Conductor tracks (4) are electrically connected with the doped wells (3), which are thus interconnected, and further conductor tracks (5) are electrically connected with a region of the second type of conductivity. A doped surface region (2) of the second type of conductivity is present at the main surface (10) and covers the entire area between the guard ring (7) and the doped wells (3). |
| US10985288B2 |
Monolithic multiple solar cells
A monolithic multiple solar cell includes at least three partial cells, with a semiconductor mirror placed between two partial cells. The aim of the invention is to improve the radiation stability of said solar cell. For this purpose, the semiconductor mirror has a high degree of reflection in at least one part of a spectral absorption area of the partial cell which is arranged above the semiconductor mirror and a high degree of transmission within the spectral absorption range of the partial cell arranged below the semiconductor mirror. |
| US10985285B2 |
Methods for fabricating III-nitride tunnel junction devices
A physical vapor deposition (e.g., sputter deposition) method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and electron cyclotron resonance (ECR) sputtering to grow one or more tunnel junctions. In another method, the surface of the p-type layer is treated before deposition of the tunnel junction on the p-type layer. In yet another method, the whole device (including tunnel junction) is grown using MOCVD and the p-type layers of the III-nitride material are reactivated by lateral diffusion of hydrogen through mesa sidewalls in the III-nitride material, with one or more lateral dimensions of the mesa that are less than or equal to about 200 μm. A flip chip display device is also disclosed. |
| US10985277B2 |
Method for forming semiconductor device structure
A method includes forming a first semiconductor layer over a substrate. A second semiconductor layer is formed over the first semiconductor layer. The first semiconductor layer and the second semiconductor layer are etched to form a fin structure that extends from the substrate. The fin structure has a remaining portion of first semiconductor layer and a remaining portion of the second semiconductor layer atop the remaining portion of the first semiconductor layer. A capping layer is formed to wrap around three sides of the fin structure. At least a portion of the capping layer and at least a portion of the remaining portion of the second semiconductor layer in the fin structure are oxidized to form an oxide layer wrapping around three sides of the fin structure. |
| US10985273B2 |
Vertical field-effect transistor including a fin having sidewalls with a tapered bottom profile
A method of forming a semiconductor structure includes forming at least one fin disposed over a substrate, wherein sidewalls of the at least one fin includes a first portion proximate a top surface of the substrate having a tapered profile and a second portion disposed above the first portion. The method also includes forming a bottom source/drain region surrounding at least part of the first portion of the sidewalls of the at least one fin having the tapered profile and forming a bottom spacer disposed over a top surface of the bottom source/drain region surrounding at least part of the second portion of the sidewalls of the at least one fin. The at least one fin provides a channel for a vertical field-effect transistor. |
| US10985271B2 |
High electron mobility transistor with improved barrier layer
A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a patterned mask on the first barrier layer; forming a second barrier layer adjacent to two sides of the patterned mask; removing the patterned mask to form a recess; forming a gate electrode in the recess; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode. |
| US10985270B2 |
Nitride power transistor and manufacturing method thereof
A nitride power transistor comprises: a silicon substrate comprising a differently doped semiconductor composite structure for forming a space charge depletion region; and a nitride epitaxial layer located on the silicon substrate. With introduction of a differently doped semiconductor composite structure for forming a space charge depletion region inside a silicon substrate of a nitride power transistor, the nitride power transistor is capable of withstanding a relatively high external voltage, and thus a breakdown voltage of the device is improved. |
| US10985265B2 |
Method for forming semiconductor device structure
A method for forming a semiconductor device structure is provided. The method includes forming a semiconductor layer on a semiconductor substrate, forming an interfacial layer on the semiconductor layer, forming a first gate dielectric layer on the interfacial layer, introducing fluorine on the first gate dielectric layer, annealing the first gate dielectric layer, forming a second gate dielectric layer on the first gate dielectric layer, introducing fluorine on the second gate dielectric layer, annealing the second gate dielectric layer, and forming a gate stack structure on the second gate dielectric layer. |
| US10985263B2 |
Thin film cap to lower leakage in low band gap material devices
An apparatus is provided which comprises: a semiconductor region on a substrate, a gate stack on the semiconductor region, a source region of doped semiconductor material on the substrate adjacent a first side of the semiconductor region, a cap region on the substrate adjacent a second side of the semiconductor region, wherein the cap region comprises semiconductor material of a higher band gap than the semiconductor region, and a drain region comprising doped semiconductor material on the cap region. Other embodiments are also disclosed and claimed. |
| US10985262B2 |
Semiconductor structure and manufacturing method thereof
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a plurality of gate structures, a plurality of dielectric structures, and spacers. The plurality of gate structures is disposed on the substrate. The plurality of dielectric structures is respectively disposed between the gate structures and the substrate, wherein a top width of the dielectric structure is less than the bottom width of the dielectric structure. The spacers are disposed on the sidewalls of the gate structures and cover the sidewalls of the dielectric structures. |
| US10985261B2 |
Dummy gate structure and methods thereof
A structure and method for implementation of dummy gate structures within multi-gate device structures includes a semiconductor device including an isolation region that separates a first and second active region. The first active region is adjacent to a first side of the isolation region and the second active region is adjacent to a second side of the isolation region. A device including a source, a drain, and a gate is formed within the first active region. One of the source and drain regions are disposed adjacent to the isolation region. A dummy gate is formed at least partially over the isolation region and adjacent to the one of the source and drain regions. In various examples, the gate includes a first dielectric layer having a first thickness and the dummy gate includes a second dielectric layer having a second thickness greater than the first thickness. |
| US10985258B2 |
Method for preparing diamond-based field effect transistor, and corresponding field effect transistor
Disclosed are a preparation method for a diamond-based field effect transistor and a field effect transistor, relating to the technical field of semi-conductors. Said method comprising: forming a conductive layer on the upper surface of a diamond layer; the diamond layer being a high-resistance layer; manufacturing an active region mesa on the diamond layer; manufacturing, on the conductive layer, a source electrode on a first region corresponding to a source electrode region, and manufacturing, on the conductive layer, a drain electrode on a second region corresponding to a drain electrode region; depositing, on the conductive layer, a photocatalyst dielectric layer on the upper surface of a third region corresponding to a source and gate region, and depositing, on the conductive layer, the photocatalyst dielectric layer on the upper surface of a fourth region corresponding to a gate and drain region; illuminating the photocatalyst dielectric layer; depositing, on the conductive layer, a gate dielectric layer on a fifth region corresponding to gate electrode region, manufacturing a gate electrode on the upper surface of the gate dielectric layer. The present invention can reduce the on-resistance of devices. |
| US10985256B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode, a pair of source/drain regions, a pair of first well regions, a second well region, a pair of contact regions and a pair of third well regions. The gate dielectric is disposed in the semiconductor substrate having a concave profile that defines an upper boundary lower than an upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric. The pair of first well regions are disposed under the pair of source/drain regions. The second well region is disposed between the pair of first well regions. The pair of contact regions are disposed on opposing sides of the pair of source/drain regions. The pair of third well regions are disposed under the pair of contact regions. |
| US10985255B2 |
Semiconductor device and method of forming the same
A semiconductor device and a method of forming the same are provided. The semiconductor device includes a gate trench crossing an active region, and a gate structure in the gate trench. The gate structure includes a gate dielectric layer disposed on an inner wall of the gate trench, a gate electrode disposed on the gate electric layer and partially filling the gate trench, a gate capping insulating layer disposed on the gate electrode, and a gap-fill insulating layer disposed in the gate trench and disposed on the gate capping insulating layer. The gate capping insulating layer includes a material formed by oxidizing a portion of the gate electrode, nitriding the portion of the gate electrode, or oxidizing and nitriding the portion of the gate electrode. |
| US10985254B2 |
Semiconductor device and method of manufacturing the same
The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a source region, a drain region, and a gate electrode. The source region and the drain region are in the substrate, and the gate electrode is partly buried in the substrate and between the source region and the drain region. |
| US10985253B2 |
Semiconductor devices with multiple channels and three-dimensional electrodes
The present invention relates, for example, to a semiconductor structure containing multiple parallel channels in which several parallel conductive channels are formed within the semiconductor structure. Electric contact or electrostatic control over all these channels is done by three-dimensional electrode structures. The multiple channel structure with three-dimensional electrodes can be applied to semiconductors devices such as field effect transistors, diodes, and other similar electronic or quantum-effect devices. This structure is practical for materials where multiple parallel conduction channels can be formed, such as in III-V semiconductors. Ill-Nitride semiconductors with such structures are described which can lead to increased power density, reduced on-resistance and improved device performance, in addition to reducing dynamic on-resistance, and improving the stability of their threshold voltage and reliability. |
| US10985246B2 |
MOSFET with selective dopant deactivation underneath gate
A semiconductor device includes a channel region comprising dopants, a gate structure over the channel region and a deactivated region underneath the gate structure and partially within the channel region. Dopants within the deactivated region are deactivated. The deactivated region includes carbon. The deactivated region is physically separated from a top surface of a substrate by a portion of the substrate that is free of carbon. |
| US10985245B2 |
Semiconductor device with planar field effect transistor cell
The disclosure relates to a semiconductor device including a first planar field effect transistor cell and a second planar field effect transistor cell. The first planar field effect transistor cell and the second planar field effect transistor cell are electrically connected in parallel and each include a drain extension region between a channel region and a drain terminal at a first surface of a semiconductor body. A gate electrode of the first field effect transistor cell is electrically connected to a source terminal, and a gate electrode of the second field effect transistor cell is connected to a gate terminal that is electrically isolated from the source terminal. |
| US10985239B2 |
Oxidative trim
Methods, apparatuses, and systems related to trim a semiconductor structure using oxygen are described. An example method includes forming a support structure for a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming an opening through the semiconductor structure. The method further includes depositing an electrode material within the opening. The method further includes removing portions of the support structure. The method further includes performing a controlled oxidative trim to an upper portion of the electrode material. |
| US10985236B2 |
Tunable on-chip nanosheet resistor
A method of forming an integrated circuit device having a nanosheet resistor includes forming a nanosheet structure having alternating sheets of silicon and silicon germanium. An ion implantation is performed on the nanosheet structure. A thermal anneal is performed on the nanosheet structure. A dielectric oxide is placed around the nanosheet structure. A first contact and a second contact are coupled to the nanosheet structure to form a resistor between the first contact and the second contact. Other embodiments are also described herein. |
| US10985234B2 |
Organic light emitting diode display
An organic light emitting diode display includes a substrate, a scan line on the substrate for transferring a scan signal, a data line crossing the scan line and for transferring a data signal, a driving voltage line crossing the scan line and for transferring a driving voltage, a switching thin film transistor coupled to the scan line and the data line, a driving thin film transistor coupled to a switching drain electrode of the switching thin film transistor, and an organic light emitting diode (OLED) coupled to a driving drain electrode of the driving thin film transistor, wherein a driving semiconductor layer of the driving thin film transistor is bent and in a plane substantially parallel to the substrate. |
| US10985229B2 |
Display device and method for manufacturing the same
A display device including a substrate, a source electrode and a drain electrode on the substrate, the source electrode and the drain electrode being spaced apart from each other, a first layer on the source electrode or the drain electrode, a second layer directly on the first layer, and a first electrode on the second layer. A step difference between a top of the first layer and a top of the drain electrode is 100 Å or less. |
| US10985228B2 |
Flexible display panel with reinforced insulating layer, method of manufacturing flexible display panel, and flexible display apparatus
Embodiments of the present disclosure provide a flexible display panel, a method of manufacturing the flexible display panel, and a flexible display apparatus. The flexible display panel comprises: a reinforced insulating layer of an inorganic material, wherein the reinforced insulating layer comprises a reinforced region, and is formed with a reinforcing hole in the reinforced region; an organic material filled in the reinforcing hole; and at least one insulating film which is disposed on at least one of both sides of the reinforced insulating layer and which is in contact with the reinforced insulating layer at least in the reinforced region. |
| US10985226B2 |
Ink jet printing organic light emitting diode display panel and manufacturing method thereof
Provided are an ink jet printing organic light emitting diode display panel and a manufacturing method thereof. The method includes: sequentially forming a passivation layer and a planarization layer on a carrier substrate prepared with one pair of thin film transistors, wherein the passivation layer covers the one pair of thin film transistors; forming one pair of vias in the passivation layer and the planarization layer; forming one pair of anodes on the planarization layer, wherein the one pair of anodes are electrically connected to the one pair of thin film transistors through the one pair of vias in the passivation layer and the planarization layer; preparing an electrode separation layer between the one pair of anodes with Al2O3 or an organic photoresist material; forming a light emitting layer over the one pair of anodes by ink jet printing, wherein the light emitting layer covers the electrode separation layer. |
| US10985219B2 |
Display device
A display device includes a cover plate, a display screen and a photoreceptor, the cover plate is disposed on the display screen, and the cover plate is provided with a light shielding layer. The light shielding layer is provided with a light transmitting area, and the photoreceptor is disposed corresponding to the light transmitting area. The display device of the present application can improve the photographic properties and the accuracy of the photoreceptor, and make it easier to assemble, and reduce assembly steps. |
| US10985216B2 |
Display apparatus and imaging apparatus
A display apparatus comprises a pixel including a plurality of sub pixels. Each of the sub pixels includes a current driven light emitting device, a transistor for supplying an electric current to the light emitting device and a capacitive element for maintaining a gate voltage of the transistor. The capacitive element of one sub pixel and the capacitive element of the other sub pixel at least partially overlap each other. |
| US10985214B2 |
Flexible display substrate for foldable display apparatus, method of manufacturing flexible display substrate, and foldable display apparatus
A flexible display substrate for a foldable display apparatus, a method of manufacturing the flexible display substrate, and a foldable display apparatus are disclosed. The flexible display substrate includes: a first region corresponding to a non-foldable region of the foldable display apparatus; a second region corresponding to a foldable region of the foldable display apparatus; a plurality of first pixel units disposed in the first region, configured to display an image, and each including a polysilicon thin film transistor; and a plurality of second pixel units disposed in the second region, configured to display an image, and each including an organic thin film transistor. |
| US10985212B2 |
Multi-component cell architectures for a memory device
Methods, systems, and devices for multi-component cell architectures for a memory device are described. A memory device may include self-selecting memory cells that include multiple self-selecting memory components (e.g., multiple layers or other segments of a self-selecting memory material, separated by electrodes). The multiple self-selecting memory components may be configured to collectively store one logic state based on the polarity of a programming pulse applied to the memory cell. The multiple memory component layers may be collectively (concurrently) programmed and read. The multiple self-selecting memory components may increase the size of a read window of the memory cell when compared to a memory cell with a single self-selecting memory component. The read window for the memory cell may correspond to the sum of the read windows of each self-selecting memory component. |
| US10985198B2 |
Pixel isolation elements, devices and associated methods
Light trapping pixels, devices incorporating such pixels, and various associated methods are provided. In one aspect, for example, a light trapping pixel device can include a light sensitive pixel having a light incident surface, a backside surface opposite the light incident surface, and a peripheral sidewall disposed into at least a portion of the pixel and extending at least substantially around the pixel periphery. The pixel can also include a backside light trapping material substantially covering the backside surface and a peripheral light trapping material substantially covering the peripheral sidewall. The light contacting the backside light trapping material or the peripheral light trapping material is thus reflected back toward the pixel. |
| US10985197B2 |
Imaging device
An imaging device includes: a semiconductor substrate including a first diffusion region of a first conductivity type and a second diffusion region of the first conductivity type; a first plug that is connected to the first diffusion region and that contains a semiconductor; a second plug that is connected to the second diffusion region and that contains a semiconductor; and a photoelectric converter that is electrically connected to the first plug. An area of the second plug is larger than an area of the first plug in a plan view. |
| US10985194B2 |
Display panel and display device
A display panel and a display device are provided. The display panel comprises a display area; a non-display area surrounding the display area; a first edge; and a first insulating layer. The non-display area includes a binding area disposed between the display area and the first edge, and the binding area includes a plurality of bonding pads. The first insulating layer includes a plurality of through-holes disposed at the binding area and one-to-one corresponding the plurality of bonding pads, and a through-hole at least partially exposes a corresponding bonding pad. The first insulating layer includes a sub-edge arranged adjacent to the first edge, and a distance between the sub-edge and the first edge is D1, and the bonding pad has a first bonding pad edge arranged adjacent to the first edge, and a distance between the first bonding pad edge and the first edge is D2, where D1≥D2. |
| US10985190B2 |
Active device substrate and fabricating method thereof
An active device substrate including a substrate and an active device is provided. The active device includes a protrusion, a gate disposed on the protrusion, a semiconductor layer, a gate insulation layer disposed between the gate and the semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer. The protrusion has a first upper surface, a second upper surface, an inner surface and an outer surface. The inner surface and the first upper surface define a concave portion. The inner surface, the second upper surface and the outer surface define a convex portion. The semiconductor layer is disposed on the first upper surface, the inner surface, the second upper surface and the outer surface. The first electrode is disposed on at least one portion of the outer surface. The second electrode is disposed in the concave portion of the protrusion. |
| US10985187B1 |
Display panel and fabrication method, and display device
A display panel and fabrication method, and a display device are provided. The display panel includes a substrate, an array layer disposed on the substrate, and a light-emitting device disposed on a side of the array layer facing away from the substrate. The array layer includes a thin film transistor, and the thin film transistor includes a ring-shaped active layer, a ring-shaped gate electrode isolatedly overlapped with a channel region of the ring-shaped active layer, and a ring-shaped first end corresponding to and connected to the ring-shaped active layer. The ring-shaped first end is one of a source electrode and a drain electrode of the thin film transistor. The light-emitting device includes a first electrode, and the first electrode is connected to the ring-shaped first end, and the first electrode is a ring-shaped electrode. |
| US10985181B2 |
Semiconductor device and method for manufacturing same
According to one embodiment, a source layer includes a semiconductor layer including an impurity. A stacked body includes a plurality of electrode layers stacked with an insulator interposed. A gate layer is provided between the source layer and the stacked body. The gate layer is thicker than a thickness of one layer of the electrode layers. A semiconductor body extends in a stacking direction of the stacked body through the stacked body and the gate layer. The semiconductor body further extends in the semiconductor layer where a side wall portion of the semiconductor body contacts the semiconductor layer. The semiconductor body does not contact the electrode layers and the gate layer. |
| US10985177B2 |
Method of manufacturing a semiconductor device having non-overlapping slits at one side of the channel layers of a memory block
A semiconductor device includes a first conductive layer, at least one first slit through the first conductive layer, and configured to divide the first conductive layer in the unit of a memory block, second conductive layers stacked on the first conductive layer, and a second slit through the second conductive layers at a different location from the first slit and configured to divide the second conductive layers in the unit of the memory block. |
| US10985175B2 |
Semiconductor memory device
A semiconductor memory device comprises: stacked bodies adjacent to each other in a second direction, each comprising conductive layers stacked in a first direction; semiconductor portions arranged in a third direction between the stacked bodies, and comprising semiconductor layers facing the conductive layers, and a first insulating layer; and a second insulating layer provided between the semiconductor portions. The smallest distance from a geometrical center of gravity of the second insulating layer to the stacked body on a predetermined first cross-section being represented by D1; a distance from surfaces of the stacked bodies facing the semiconductor portion on a predetermined second cross-section being represented by D2, the relationship 2D1>D2 is satisfied. |
| US10985170B2 |
Non-volatile memory device and method for fabricating the same
A method for fabricating the three dimensional (3D), non-volatile memory (NVM) device includes: forming a stacked structure including a plurality of interlayer insulating layers and a plurality of first material layers which are alternately stacked; forming at least one channel hole penetrating through the stack structure; forming a second material layer along the at least one channel hole; trimming a surface of the second material layer; oxidizing a whole of the trimmed second material layer to form at least a portion of a charge blocking layer; and forming a charge storage layer and a tunnel insulating layer over the charge blocking layer. |
| US10985168B2 |
Semiconductor memory device
A semiconductor memory device includes a substrate, at least one floating gate electrode, an interlayer dielectric layer, an interconnection structure, an etching stop layer, a conductive structure, and an opening. The floating gate electrode is disposed on the substrate. The interlayer dielectric layer is disposed on the floating gate electrode. The interconnection structure is disposed in the interlayer dielectric layer. The etching stop layer is disposed on the interlayer dielectric layer. The conductive structure penetrates the etching stop layer and is electrically connected with the interconnection structure. The opening penetrates the etching stop layer and overlaps at least a part of the floating gate electrode in a thickness direction of the substrate. |
| US10985166B2 |
Method of forming a memory device
A method for forming a memory device is disclosed, including providing a substrate, forming an isolation structure and plural active regions in the substrate, forming a plurality of island features on the substrate respectively covering two of the terminal portions of the active regions, using the island features as an etching mask to etch the substrate to perform a first etching process to define a first recessed region and plural island structures on the substrate. The island structures respectively comprise the two terminal portions of the active regions and the first recessed region comprises the central portions of the active regions. |
| US10985163B2 |
Semiconductor capacitor structure
The present disclosure provides a semiconductor capacitor structure. The semiconductor capacitor structure includes a substrate, a comb-like bottom electrode disposed over the substrate, a top electrode disposed over the comb-like bottom electrode, and a dielectric layer sandwiched between the top electrode and the comb-like bottom electrode. The comb-like bottom electrode includes a plurality of tooth portions parallel to the substrate and a supporting portion coupled to the plurality of tooth portions and perpendicular to the substrate. |
| US10985161B2 |
Single diffusion break isolation for gate-all-around field-effect transistor devices
Devices and methods are provided for forming single diffusion break isolation structures for integrated circuit devices including gate-all-around FET devices such as nanosheet FET devices and nanowire FET devices. For example, a semiconductor integrated circuit device includes first and second gate-all-around field-effect transistor devices disposed in first and second device regions, respectively, of a semiconductor substrate. A single diffusion break isolation structure is disposed between the first and second device regions. The single diffusion break isolation structure includes a dummy gate structure disposed on the semiconductor substrate between a first source/drain layer of the first gate-all-around field-effect transistor device and a second source/drain layer of the second gate all-around field-effect transistor device. The single diffusion break isolation structure is configured to electrically isolate the first and second source/drain layers. |
| US10985159B2 |
Method for manufacturing monolithic three-dimensional (3D) integrated circuits
A method for manufacturing a monolithic three-dimensional (3D) integrated circuit (IC) with junctionless semiconductor devices (JSDs) is provided. A first interlayer dielectric (ILD) layer is formed over a semiconductor substrate, while also forming first vias and first interconnect wires alternatingly stacked in the first ILD layer. A first doping-type layer and a second doping-type layer are transferred to a top surface of the first ILD layer. The first and second doping-type layers are stacked and are semiconductor materials with opposite doping types. The first and second doping-type layers are patterned to form a first doping-type wire and a second doping-type wire overlying the first doping-type wire. A gate electrode is formed straddling the first and second doping-type wires. The gate electrode and the first and second doping-type wires at least partially define a JSD. |
| US10985158B2 |
Semiconductor device with transistor portion having low injection region on the bottom of a substrate
To improve the withstand capability of a transistor portion, provided is a semiconductor device including a semiconductor substrate; a transistor portion provided in the semiconductor substrate; and a diode portion provided in the semiconductor substrate and arranged adjacent to the transistor portion in a predetermined arrangement direction. The transistor portion includes a collector region provided in a bottom surface of the semiconductor substrate, at respective ends adjacent to the diode portion; and a first low injection region that is provided on a bottom surface side of the semiconductor substrate farther inward than the respective ends, and has a carrier injection density from the bottom surface side to a top surface side of the semiconductor substrate that is lower than that of the collector region. |
| US10985157B2 |
Electrostatic discharge protection device and layout design thereof
An electrostatic discharge (ESD) protection device for a semiconductor device that includes a gate, a source including a silicide portion having a plurality of source contacts, and a drain including a silicide portion having a plurality of drain contacts, wherein the source and drain are extended away from the gate along a device axis. The ESD device includes a resist protective oxide (RPO) portion located on the semiconductor device in between the plurality of drain contacts and in between the plurality of source contacts, respectively. |
| US10985148B2 |
Electronic device
An electronic device is disclosed, which comprises: a substrate; a plurality of sensing elements disposed on the substrate; and a plurality of electronic modules disposed on the substrate, each electronic module comprising a plurality of electronic elements, wherein the plurality of electronic modules are arranged in a manner to expose the plurality of sensing elements. |
| US10985146B2 |
Semiconductor device with integrated heat distribution and manufacturing method thereof
A semiconductor package having an internal heat distribution layer and methods of forming the semiconductor package are provided. The semiconductor package can include a first semiconductor device, a second semiconductor device, and an external heat distribution layer. The first semiconductor device can comprise a first semiconductor die and an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the tope surface. The second semiconductor device can comprise a second semiconductor die and can be stacked on the top surface of the first semiconductor device. The external heat distribution layer can cover an external surface of the second semiconductor device and the side surface of the first semiconductor device. The external heat distribution layer further contacts an internal heat distribution layer on a top surface of the first semiconductor die. |
| US10985140B2 |
Structure and formation method of package structure with underfill
A structure and a formation method of a package structure are provided. The method includes disposing a semiconductor die structure over a substrate. The method also includes disposing a protective film over the substrate. The protective film has an opening exposing the semiconductor die structure, and sidewalls of the opening surround the semiconductor die structure. The method further includes dispensing an underfill material into the opening to surround the semiconductor die structure. |
| US10985139B2 |
Semiconductor chip for sensing temperature and semiconductor system including the same
In one example embodiment, a semiconductor system includes a first chip configured to generate first temperature information of the first chip, the first temperature information being based on at least one temperature measurement using at least one first temperature sensor. The semiconductor system further includes a second chip including a second temperature sensor configured to be controlled based on at least the first temperature information. |
| US10985136B2 |
Microelectronic die stack having at least one rotated microelectronic die
A microelectronic package may be fabricated having a microelectronic die stack attached to a microelectronic substrate, wherein the microelectronic die stack may include a first microelectronic die having an active surface and an opposing back surface, a first side and an opposing second side, wherein the first microelectronic die may include a plurality of primary bond pads on the active surface proximate the first side and at least one secondary bond pad on the active surface proximate the second side. The microelectronic die stack may further include a second microelectronic die having an active surface and an opposing back surface, wherein the back surface of the second microelectronic die is attached to the active surface of the first microelectronic die and wherein the second microelectronic die is rotated relative to the first microelectronic die to expose the at least one secondary bond pad of the first microelectronic die. |
| US10985133B2 |
Die processing
Representative implementations provide techniques and systems for processing integrated circuit (IC) dies. Dies being prepared for intimate surface bonding (to other dies, to substrates, to another surface, etc.) may be processed with a minimum of handling, to prevent contamination of the surfaces or the edges of the dies. The techniques include processing dies while the dies are on a dicing sheet or other device processing film or surface. Systems include integrated cleaning components arranged to perform multiple cleaning processes simultaneously. |
| US10985131B2 |
Microelectronic device having protected connections and manufacturing process thereof
A microelectronic device includes a chip housing a functional part and carrying first electrical contact regions in electrical connection with the functional part through first protected connections extending over or in the chip. A substrate has a first contact area and a second contact area, which is remote from the first contact area. The first contact area carries second electrical contact regions, and the second contact area carries external connection regions. The second contact regions and the external connection regions are in mutual electrical connection through second protected connections extending over or in the substrate. A protection-ring structure surrounds the first and second electrical contact regions and delimits a first chamber closed with respect to the outside. The first electrical contact regions and the second electrical contact regions are in mutual electrical contact. |
| US10985129B2 |
Mitigating cracking within integrated circuit (IC) device carrier
Multiple integrated circuit (IC) devices are connected to a top side metallization surface of a multi IC device carrier. The carrier includes resin based substrate layers and associated wiring line layers. To reduce stain of the resin layers, especially in region(s) within the carrier between the IC devices, a stiffener or stiffeners are applied to the back side metallization (BSM) surface of the IC device carrier. The stiffener(s) reduce the amount of curvature of the IC device carrier and reduce the strain seen by the resin layer(s), thereby mitigating the risk for cracks forming and expanding within the resin layers. |
| US10985126B2 |
Semiconductor package
A semiconductor package includes a first connection structure having first and second surfaces and including a first redistribution layer, a first semiconductor chip disposed on the first surface and having a first connection pad electrically connected to the first redistribution layer, a second semiconductor chip disposed around the first semiconductor chip on the first surface and having a second connection pad electrically connected to the first redistribution layer, an interconnection bridge disposed on the second surface to be spaced apart from the second surface and connected to the first redistribution layer through a connection member to electrically connect the first and second connection pads to each other, and a second connection structure disposed on the second surface to embed the interconnection bridge and including a second redistribution layer electrically connected to the first redistribution layer. |
| US10985125B2 |
Chip package structure
A chip package structure is provided. The chip package structure includes a substrate having a first surface and a second surface opposite to the first surface. The chip package structure includes a first chip structure and a second chip structure over the first surface. The chip package structure includes a protective layer over the first surface and surrounding the first chip structure and the second chip structure. A portion of the protective layer is between the first chip structure and the second chip structure. The chip package structure includes a first anti-warpage bump over the second surface and extending across the portion of the protective layer. The chip package structure includes a conductive bump over the second surface and electrically connected to the first chip structure or the second chip structure. The first anti-warpage bump is wider than the conductive bump. |
| US10985123B2 |
Semiconductor apparatus
A first wiring is disposed above operating regions of plural unit transistors formed on a substrate. A second wiring is disposed above the substrate. An insulating film is disposed on the first and second wirings. First and second cavities are formed in the insulating film. As viewed from above, the first and second cavities entirely overlap with the first and second wirings, respectively. A first bump is disposed on the insulating film and is electrically connected to the first wiring via the first cavity. A second bump is disposed on the insulating film and is electrically connected to the second wiring via the second cavity. As viewed from above, at least one of the plural operating regions is disposed within the first bump and is at least partially disposed outside the first cavity. The planar configuration of the first cavity and that of the second cavity are substantially identical. |
| US10985120B1 |
Chip packaging method and chip packaging structure
Provided are a chip packaging method and a chip packaging structure. The passivation layer is arranged on the pads of the wafer, then the first bonding layer is formed on the passivation layer, and the second bonding layer is formed on the substrate. The substrate and the wafer are bonded and packaged together by bonding the first bonding layer and the second bonding layer. The pads are only used as a conductive structure, not as a bonding layer due to the passivation layer arranged between the pads and the bonding layer. The through silicon via is arranged at the position above the pad and avoiding the bonding layer, so as to connect the functional circuit region between the wafer and the substrate to the outside of the chip packaging structure. |
| US10985117B2 |
Solder ball protection in packages
An integrated circuit structure includes a substrate, a metal pad over the substrate, a passivation layer having a portion over the metal pad, and a polymer layer over the passivation layer. A Post-Passivation Interconnect (PPI) has a portion over the polymer layer, wherein the PPI is electrically coupled to the metal pad. The integrated circuit structure further includes a first solder region over and electrically coupled to a portion of the PPI, a second solder region neighboring the first solder region, a first coating material on a surface of the first solder region, and a second coating material on a surface of the second solder region. The first coating material and the second coating material encircle the first solder region and the second solder region, respectively. The first coating material is spaced apart from the second coating material. |
| US10985113B2 |
Display substrate, display panel and display device
The present disclosure discloses a display substrate, a display panel, and a display device. The display substrate includes: a base, and a device layer and an insulation layer on the base. The base includes a display area and a non-display area located on a peripheral side of the display area. At least one blocking dam is provided in a portion, located on the non-display area, of the insulation layer, and each blocking dam corresponds to an edge portion of one side edge of the base. In each edge portion of a side edge corresponding to a blocking dam, the blocking dam includes a plurality of blocking strips arranged along an extension direction of the side edge, an extension direction of each blocking strip is perpendicular to the side edge, and each blocking strip has a zigzag structure extending along a direction perpendicular to the side edge. |
| US10985112B2 |
Memory device and method for fabricating the memory device
A vertical memory device includes: a substrate including a memory cell region and a contact region; a plurality of gate electrodes that extend from the memory cell region to the contact region and include pad portions which are end portions stacked in a step shape in the contact region; a plurality of contact plugs coupled to the pad portions of the gate electrodes; and a plurality of supporters formed below the pad portions of the gate electrodes. |
| US10985110B2 |
Semiconductor package having an electromagnetic shielding structure and method for producing the same
A semiconductor package having a double-sided cooling structure includes an upper electrically conductive element having an outwardly exposed metal surface, a lower carrier substrate having an upper electrically conductive layer, a lower electrically conductive layer having an outwardly exposed surface, and an electrical insulation layer arranged between the upper and lower electrically conductive layers, a first electrically conductive spacer arranged between the upper electrically conductive element and the upper electrically conductive layer, a power semiconductor chip arranged between the upper electrically conductive element and the upper electrically conductive layer, a second electrically conductive spacer arranged between the upper electrically conductive element and the power semiconductor chip, and a shielding structure configured to electromagnetically shield a line of the semiconductor package. |
| US10985109B2 |
Shielded semiconductor packages with open terminals and methods of making via two-step process
A semiconductor device has a substrate including a terminal and an insulating layer formed over the terminal. An electrical component is disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A portion of the insulating layer over the terminal is exposed from the encapsulant. A shielding layer is formed over the encapsulant and terminal. A portion of the shielding layer is removed to expose the portion of the insulating layer. The portion of the insulating layer is removed to expose the terminal. The portion of the shielding layer and the portion of the insulating layer can be removed by laser ablation. |
| US10985101B2 |
Semiconductor package and manufacturing method thereof
A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes semiconductor dies, an encapsulant and a redistribution structure. The semiconductor dies are disposed side by side. Each semiconductor die has an active surface, a backside surface, and an inner side surface connecting the active surface and the backside surface. The encapsulant wraps the semiconductor dies and exposes the active surfaces of the semiconductor dies. The redistribution structure is disposed on the encapsulant and the active surfaces of the semiconductor dies. The inner side surfaces of most adjacent semiconductor dies face each other. The redistribution structure establishes single-ended connections between most adjacent semiconductor dies by crossing over the facing inner side surfaces of the most adjacent semiconductor dies. |
| US10985100B2 |
Chip package with recessed interposer substrate
A chip package is provided. The chip package includes a redistribution structure including an insulating layer and a wiring layer. The wiring layer is in the insulating layer. The chip package includes a chip over the redistribution structure and electrically connected to the wiring layer. The chip package includes an interposer substrate over the redistribution structure and the chip, wherein a portion of the chip is in the interposer substrate. The chip package includes a conductive structure between the interposer substrate and the redistribution structure and electrically connected to the wiring layer. The conductive structure includes a conductive bump or a conductive pillar. The chip package includes a molding layer surrounding the interposer substrate and the conductive structure. The molding layer is partially between the interposer substrate and the redistribution structure and partially between the interposer substrate and the chip. |
| US10985096B2 |
Electrical device terminal finishing
In described examples, a terminal (e.g., a conductive terminal) includes a base material, a plating stack and a solder finish. The base material can be a metal, such as copper. The plating stack is arranged on a surface of the base material, and includes breaks in the plating stack. The breaks in the plating stack extend from a first surface of the plating stack to a second surface of the plating stack adjacent to the surface of the base material. The solder finish is coated over the breaks in the plating stack. |
| US10985094B2 |
Lead frame and method of manufacturing lead frame
A lead frame includes a lead portion having a first surface and a second surface, a connecting bar that has a first surface and a second surface and to which the lead portion is connected, and a raised portion provided on the first surface of the connecting bar. The first surface of the connecting bar is positioned between the first and the second surfaces of the lead portion. The tip of the raised portion is positioned between the first surface of the lead portion and the first surface of the connecting bar. |
| US10985089B2 |
Semiconductor cooling arrangement
The present invention relates to a semiconductor cooling arrangement for cooling semiconductor devices, such as power semiconductors. The semiconductor cooling arrangement comprises one or more semiconductor assemblies located in a chamber within a housing. The housing comprises inlet and outlet ports for receiving and outputting a cooling medium. The chamber is flooded with a cooling medium to cool the assemblies. The assemblies themselves each comprise a heatsink and one or more semiconductor power devices thermally coupled to the heatsink. The heatsink comprises heat exchanging elements in the form of a plurality of holes in the heatsink extending through the heatsink from one surface to another surface such that the cooling medium flows through the holes to extract heat from the heatsink. |
| US10985088B2 |
System comprising at least one power module comprising at least one power die that is cooled by liquid cooled system
The present invention concerns a system comprising at least one power module comprising at least one power die that is cooled by a liquid cooled system, the liquid cooled system is arranged to provide at least one electric potential to each power dies of the power module, characterized in that the liquid cooled system is composed of a first and a second current-carrying bars connected together by an electrically non-conductive pipe, the first bar is placed on the top of the power module and provides a first electric potential to the power die and the second bar is placed on the bottom of the power module and provides a second electric potential to the power dies and the liquid coolant is electrically conductive and the channels surfaces are covered by an electrical insulation layer. |
| US10985086B2 |
Information handling system low form factor interface thermal management
Information handling system thermal rejection of thermal energy generated by one or more components, such as a central processing unit and graphics processing unit, is enhanced by disposing boron arsenide between the one or more components and a heat transfer structure that directs thermal energy from the one or more components to a heat rejection region, such as cooling fan exhaust. For instance, the boron arsenide is a layer formed with chemical vapor deposition on a copper heat pipe or a layer of thermal grease infused with the boron arsenide. |
| US10985079B2 |
Method of manufacturing SiC epitaxial wafer
The invention provides a method of manufacturing a SiC epitaxial wafer in which stacking faults are less likely to occur when a current is passed in a forward direction. The method of manufacturing the SiC epitaxial wafer includes a measurement step for measuring a basal plane dislocation density, a layer structure determining process for determining the layer structure of the epitaxial layer, and an epitaxial growth step for growing the epitaxial layers. And in the layer structure determination step, in the case of (i) when the basal plane dislocation density is lower than a predetermined value, the epitaxial layer includes a conversion layer and a drift layer from the SiC substrate side; and in the case of (ii) when the density is equal to or higher than the predetermined value, the epitaxial layer includes a conversion layer, a recombination layer, and a drift layer from the SiC substrate side. |
| US10985076B2 |
Single metallization scheme for gate, source, and drain contact integration
A technique relates to a semiconductor device. One or more N-type field effect transistor (NFET) gates and one or more P-type field effect transistor (PFET) gates are formed. Source and drain (S/D) contacts are formed, at least one material of the S/D contacts being formed in the PFET gates. Insulating material is deposited as self-aligned caps above the NFET gates and the PFET gates, while the insulating material is also formed as insulator portions adjacent to the S/D contacts. Middle of the line (MOL) contacts are formed above the S/D contacts. |
| US10985075B2 |
Gate formation scheme for n-type and p-type transistors having separately tuned threshold voltages
Embodiments of the invention are directed to a method that includes forming a first channel fin in an n-type region of a substrate, forming a second channel fin in a p-type region of the substrate, and depositing a gate dielectric over the substrate and the first and second channel fins. A work function metal stack is deposited over the gate dielectric, the first fin in the n-type region, and the second fin in the p-type region. The work function metal stack over the gate dielectric and the first fin in the n-type region forms a first work function metal stack. The work function metal stack over the gate dielectric and the second fin in the p-type region forms a second work function metal stack. The first work function metal stack includes at least one shared layer of work function metal that is shared with the second work function metal stack. |
| US10985074B2 |
Method of manufacturing a CMOS transistor
A CMOS transistor manufacturing method includes: forming a gate insulating film on a semiconductor substrate; forming a first gate electrode pattern on the gate insulating film in an NMOS transistor area; forming a second gate electrode pattern on the gate insulating film in a PMOS transistor area; forming a first photoresist pattern covering the NMOS transistor area to expose the second gate electrode pattern; performing a first ion injection process into the PMOS transistor area to form an n-type well region and a p-type LDD region; removing the first photoresist pattern; forming a second photoresist pattern covering the PMOS transistor area to expose the first gate electrode pattern; performing a second ion injection process into the NMOS transistor area to form a p-type well region and an n-type LDD region; removing the second photoresist pattern; and forming sidewall spacers at sidewalls of the first and second gate electrode patterns. |
| US10985069B2 |
Gate stack optimization for wide and narrow nanosheet transistor devices
A method of forming a nanosheet device is provided. The method includes forming a plurality of narrow nanosheets on a first region of a substrate, and forming a plurality of wide nanosheets on a second region of the substrate. The method further includes forming an interfacial layer on the plurality of narrow nanosheets and the plurality of wide nanosheets. The method further includes depositing a gate dielectric layer on the plurality of narrow nanosheets and the plurality of wide nanosheets. The method further includes depositing a dummy gate layer on the gate dielectric layer on the plurality of narrow nanosheets and the plurality of wide nanosheets. The method further includes forming a dummy cover layer on the dummy gate layer on the plurality of narrow nanosheets and the plurality of wide nanosheets. |
| US10985064B2 |
Buried power and ground in stacked vertical transport field effect transistors
A stacked semiconductor device structure and method for fabricating the same. The stacked semiconductor device structure includes a first vertical transport field effect transistor (VTFET) and a second VTFET stacked on the first VTFET. The structure further includes at least one power line and at least one ground line disposed within a backside of the stacked semiconductor structure. The method includes at least orientating a structure including a first VTFET and a second VTFET stacked on the first VTFET such that a multi-layer substrate, on which the first VTFET is formed, is above the first and second VTFETs. First and second contact trenches are formed through at least one layer of the multi-layer substrate. The first contact trench exposes a portion of a metal contact and the second contact trench exposes a portion of a source/drain region. The first and second contact trenches are filled with a contact material. |
| US10985060B2 |
Laser processing method using plasma light detection for forming a pore in a substrate
A laser processing method for applying a laser beam to the reverse side of a substrate with a device formed on a face side thereof and including an electrode pad, to form a pore in the substrate that leads to the electrode pad, includes an irradiation area setting step of detecting the size of the electrode pad and setting an irradiation area for the laser beam such that the pore to be formed is positioned within the electrode pad. After the irradiation area setting step has been performed, the laser beam is applied to the reverse side of the substrate to form a pore in the substrate at a position corresponding to the electrode pad. First plasma light emitted from the substrate and second plasma light emitted from the electrode pad are detected. When the second plasma light is detected, the beam is stopped from being applied to the substrate. |
| US10985059B2 |
Preclean and dielectric deposition methodology for superconductor interconnect fabrication
A method is provided of forming a superconductor device interconnect structure. The method comprises forming a first dielectric layer overlying a substrate and forming a superconducting interconnect element in the first dielectric layer. The superconducting interconnect element includes a top surface aligned with a top surface of the first dielectric layer to form a first interconnect layer. The superconductor device interconnect structure is moved into a dielectric deposition chamber. The method further comprises performing a cleaning process on a top surface of the first interconnect layer in the dielectric deposition chamber to remove oxidization from a top surface of the first interconnect layer, and depositing a second dielectric layer over the first interconnect layer in the dielectric deposition chamber. |
| US10985054B2 |
Interconnect structure and method of forming the same
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a lower etch stop layer (ESL); an upper low-k (LK) dielectric layer over the lower ESL; a first conductive feature in the upper LK dielectric layer, wherein the first conductive feature has a first metal line and a dummy via contiguous with the first metal line, the dummy via extending through the lower ESL; a first gap along an interface of the first conductive feature and the upper LK dielectric layer; and an upper ESL over the upper LK dielectric layer, the first conductive feature, and the first gap. |
| US10985045B2 |
Electrostatic chuck mechanism and semiconductor processing device having the same
An electrostatic chuck mechanism and a semiconductor processing device having the same are provided. The electrostatic chuck mechanism includes a base, an edge assembly, a main electrostatic heating layer, and an edge electrostatic heating layer. The base includes a loading surface for loading a wafer and a step surface surrounding the loading surface and located at an edge portion of the wafer. The edge assembly includes a focus ring disposed above the step surface and surrounding the loading surface, and an insulation ring disposed at a bottom of the base and supporting the base. The main electrostatic heating layer, disposed above the loading surface, is configured to secure the wafer and adjust temperature of the wafer. The edge electrostatic heating layer, disposed above the step surface, is configured to secure the focus ring and adjust temperature of the focus ring. |
| US10985038B2 |
Determination method and substrate processing equipment
In equipment that executes a drying process of forming a liquid membrane on a top surface of a substrate W which is held horizontally and gradually enlarging a dry area from which the liquid membrane has been removed, quality of the drying process is determined. Specifically, first, the top surface of the substrate is repeatedly imaged by an imaging unit during execution of the drying process. Then, it is determined whether the dry area is in a normal state based on a plurality of captured images acquired by the imaging. Accordingly, it is possible to quantitatively determine whether a dry area is in a normal state based on a plurality of captured images. |
| US10985035B2 |
Substrate liquid processing apparatus, substrate liquid processing method and computer readable recording medium having substrate liquid processing program recorded therein
Disclosed is a method for performing a liquid processing on a substrate using an aqueous solution of a chemical agent at a predetermined concentration as a processing liquid. The method includes: storing the processing liquid in a processing liquid storage unit; and supplying an aqueous solution of the chemical agent at a different concentration from the concentration of the processing liquid to the processing liquid storage unit, discharging the processing liquid from the processing liquid storage unit so as to update the processing liquid stored in the processing liquid storage unit. The aqueous solution in a predetermined amount is supplied to the processing liquid storage unit, and the processing liquid is discharged from the processing liquid storage unit, the processing liquid containing the chemical agent in the same amount as the amount of the chemical agent contained in the aqueous solution supplied to the processing liquid storage unit. |
| US10985034B2 |
Semiconductor processing device
A semiconductor processing device is provided. The device includes a reaction chamber, a first gas inlet mechanism, and a second gas inlet mechanism that includes a gas inlet, a uniform-flow chamber, at least one gas outlet, and at least one switch element. The gas inlet communicates with the uniform-flow chamber and arranged to deliver a process gas into the uniform-flow chamber. The at least one gas outlet is between the reaction chamber and the uniflow-flow chamber. The at least one switch element is disposed in each gas outlet and arranged to enable the uniform-flow chamber to communicate with the reaction chamber when the process gas is being delivered into the uniform-flow chamber through the gas inlet, and to isolate the uniform-flow chamber from the reaction chamber when no process gas is being delivered into the uniform-flow chamber. |
| US10985033B2 |
Semiconductor package with reduced parasitic coupling effects and process for making the same
The present disclosure relates to a semiconductor package with reduced parasitic coupling effects, and a process for making the same. The disclosed semiconductor package includes a thinned flip-chip die and a first mold compound component with a dielectric constant no more than 7. The thinned flip-chip die includes a back-end-of-line (BEOL) layer with an upper surface that includes a first surface portion and a second surface portion surrounding the first surface portion, a device layer over the upper surface of the BEOL layer, and a buried oxide (BOX) layer over the device layer. The BEOL layer includes a first passive device and a second passive device, which are underlying the first surface portion and not underlying the second surface portion. Herein, the first mold compound component extends through the BOX layer and the device layer to the first surface portion. |
| US10985029B2 |
Substrate processing apparatus and substrate processing method
In a substrate processing apparatus for processing a substrate mounted on a mounting table in a processing chamber by supplying a gas to the substrate, the apparatus includes: a partition unit provided, between a process space where a substrate is provided and a diffusion space where a first gas is diffused, to face the mounting table; a first as supply unit for supplying the first gas to the diffusion space; first gas injection holes, formed through the partition unit, for injecting the first gas diffused in the diffusion space into the processing space; and a second gas supply unit including second gas injection holes opened on a gas injection surface of the partition unit which faces the processing space. The second gas supply unit independently supplies a second gas to each of a plurality of regions arranged in a horizontal direction in the processing space separately from the first gas. |
| US10985025B2 |
Fin cut profile using fin base liner
Methods for forming semiconductor fins include forming a protective layer around a base of a hardmask fin on an underlying semiconductor layer. A portion of the hardmask fin is etched away with an etch that is selective to the protective layer. A semiconductor fin is etched from the semiconductor layer using the etched hardmask fin as a mask. |
| US10985019B2 |
Method of forming a semiconductor device using layered etching and repairing of damaged portions
A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te. |
| US10985017B2 |
Method of manufacturing semiconductor device and non-transitory computer-readable recording medium
Described herein is a technique capable of improving a quality of a substrate processing performed using hydrogen peroxide. According to one aspect of the technique described herein, there is provided a method of manufacturing a semiconductor device including: (a) supplying a first process gas containing water and a first concentration of hydrogen peroxide to a substrate having a silicon-containing film formed on a surface thereof; and (b) supplying a second process gas containing water and a second concentration of hydrogen peroxide higher than the first concentration to the substrate after (a). |
| US10985016B2 |
Semiconductor substrate, and epitaxial wafer and method for producing same
A semiconductor substrate that is used as an underlying substrate for epitaxial crystal growth carried out by the HVPE method includes a β-Ga2O3-based single crystal, and a principal plane that is a plane parallel to a [100] axis of the β-Ga2O3-based single crystal. An epitaxial wafer includes the semiconductor substrate, and an epitaxial layer including a β-Ga2O3-based single crystal and formed on the principal plane of the semiconductor substrate by epitaxial crystal growth using the HVPE method. A method for producing an epitaxial wafer includes by using the HVPE method, epitaxially growing an epitaxial layer including a β-Ga2O3-based single crystal on a semiconductor substrate that includes a β-Ga2O3-based single crystal and has a principal plane parallel to a [100] axis of the β-Ga2O3-based single crystal. |
| US10985013B2 |
Method and precursors for manufacturing 3D devices
Described herein is an apparatus comprising a plurality of silicon-containing layers wherein the silicon-containing layers are selected from a silicon oxide and a silicon nitride layer or film. Also described herein are methods for forming the apparatus to be used, for example, as 3D vertical NAND flash memory stacks. In one particular aspect or the apparatus, the silicon oxide layer comprises slightly compressive stress and good thermal stability. In this or other aspects of the apparatus, the silicon nitride layer comprises slightly tensile stress and less than 300 MPa stress change after up to about 800° C. thermal treatment. In this or other aspects of the apparatus, the silicon nitride layer etches much faster than the silicon oxide layer in hot H3PO4, showing good etch selectivity. |
| US10985007B2 |
Substrate treating apparatus and method for inspecting treatment liquid nozzle
Disclosed are a substrate treating apparatus and a method for inspecting a treatment liquid nozzle. The substrate treating apparatus includes a support member configured to support a substrate, a treatment liquid nozzle configured to discharge a treatment liquid to the substrate located on the support member, a light source configured to irradiate light to a point of the substrate, to which the treatment liquid is discharged, a camera configured to photograph the point of the substrate, to which the treatment liquid is discharged, and a controller configured to determine, through an image captured by the camera, whether a crown is generated when the treatment liquid collides with the substrate. |
| US10985003B2 |
Analysis method for determining halogens in geological samples by ICP-MS
The present invention provides an analysis method for determining halogens in geological samples by ICP-MS. The method includes following steps: weighing a geological sample and ammonium bifluoride in a sample dissolving tank, tightening the sample dissolving tank, and shaking; then heating the sample dissolving tank in a drying oven, and setting a temperature of the drying oven as 200-220° C. and heating time as 1-2 hours; cooling the sample dissolving tank to room temperature so as to obtain a solid mixture after heating is ended, adding ammonium hydroxide into the solid mixture, centrifuging, removing a precipitate, and collecting the supernatant; adding an internal standard solution into the supernatant, and uniformly mixing; and optimizing the ICP-MS to an optimal state, testing content of chlorine in the supernatant under a condition of medium resolution m/Δm=4000, and testing content of bromine and iodine in the supernatant under a condition of low resolution m/Δm=300. |
| US10985002B2 |
Ionization sources and methods and systems using them
Certain configurations of an ionization source comprising a multipolar rod assembly are described. In some examples, the multipolar rod assembly can be configured to provide a magnetic field and a radio frequency field into an ion volume formed by a substantially parallel arrangement of rods of the multipolar rod assembly. The ionization source may also comprise an electron source configured to provide electrons into the ion volume of the multipolar rod assembly to ionize analyte introduced into the ion volume. Systems and methods using the ionization source are also described. |
| US10985001B2 |
Rapid online analyzer for 14C-AMS
A rapid online analyzer for a 14C-AMS, comprising: a solid sample processing module, an atmospheric sample collection and processing module, a microflow control module, an AMS module and an automatic control module. Sample preparation and AMS measurement are combined, a solid sample is directly converted into CO2 gas by an element analyzer and then enters an AMS for measurement, and an atmospheric sample is collected in real time for analysis by the AMS, such that quick and efficient analysis of the solid sample and the atmospheric sample is realized. |
| US10984995B2 |
Hybrid solar generator
A solar generator can include a photon-enhanced thermionic emission generator with a cathode to receive solar radiation. The photon-enhanced thermionic emission generator can include an anode that in conjunction with the cathode generates a first current and waste heat from the solar radiation. A thermoelectric generator can be thermally coupled to the anode and can convert the waste heat from the anode into a second current. A circuit can connect to the photon-enhanced thermionic emission generator and to the thermoelectric generator and can combine the first and the second currents into an output current. |
| US10984991B2 |
Substrate processing apparatus
Described herein is a technique capable of capable of managing a substrate processing apparatus efficiently. According to one aspect of the technique of the present disclosure, there is provided a substrate processing apparatus including: process performing parts configured to process a substrate based on a program; a first controller configured to process the program; and a second controller configured to control the process performing parts based on data received from the first controller, wherein the first controller is further configured to determine whether or not a first controller provided in an additional substrate processing apparatus is malfunctioning based on operation data of the first controller provided in the additional substrate processing apparatus, and to perform an alternative control for the first controller provided in the additional substrate processing apparatus when it is determined that the first controller provided in the additional substrate processing apparatus is malfunctioning. |
| US10984987B2 |
Showerhead faceplate having flow apertures configured for hollow cathode discharge suppression
A faceplate of a showerhead has a bottom side that faces a plasma generation region and a top side that faces a plenum into which a process gas is supplied during operation of a substrate processing system. The faceplate includes apertures formed through the bottom side and openings formed through the top side. Each of the apertures is formed to extend through a portion of an overall thickness of the faceplate to intersect with at least one of the openings to form a corresponding flow path for process gas through the faceplate. Each of the apertures has a cross-section that has a hollow cathode discharge suppression dimension in at least one direction. Each of the openings has a cross-section that has a smallest cross-sectional dimension that is greater than the hollow cathode discharge suppression dimension. |
| US10984985B2 |
RF impedance matching network
In one embodiment, an impedance matching network includes an electronically variable reactance element (EVRE) comprising discrete reactance elements and corresponding switches. The switches are configured to switch in and out the discrete reactance elements to alter a total reactance provided by the EVRE. A monitoring circuit is operably coupled to the EVRE. For each discrete reactance element, the monitoring circuit monitors a value related to the discrete reactance element or its corresponding switch. Upon determining the monitored value exceeds a predetermined amount, the monitoring circuit the discrete reactance element of the EVRE from switching in or out. |
| US10984983B2 |
Particle beam system and method for operating a particle beam system
A particle beam system includes first and second particle beam columns. In a first operating mode, an end cap having an opening therein is outside a beam path of a first particle beam. In a second operating mode, the beam path of the first particle beam can extend through the opening of the end cap so that secondary particles coming from a work region can pass through the opening of the end cap to a detector in the interior of the first particle beam column. While the particle beam system is in the first operating mode, an image of an object arranged in the work region is recorded using the first particle beam column. While the particle beam system is in the second operating mode, the object is processed using a second particle beam. |
| US10984982B2 |
Charged particle beam optical apparatus, exposure apparatus, exposure method, control apparatus, control method, information generation apparatus, information generation method and device manufacturing method
A charged particle beam optical apparatus has a plurality of irradiation optical systems each of which irradiates an object with a charged particle beam and a first control apparatus configured to control a second irradiation optical system on the basis of an operation state of a first irradiation optical system. |
| US10984976B1 |
Microfabricated ion trap chip with an integrated microwave antenna
An ion trap chip, which may be used for quantum information processing and the like, includes an integrated microwave antenna. The antenna is formed as a radiator connected by one of its ends to the center trace of a microwave transmission line and connected by its other end to a current return path through a ground trace of the microwave transmission line. The radiator includes several parallel, coplanar radiator traces connected in series. The radiator traces are connected such that they all carry electric current in the same direction, so that collectively, they simulate a single, unidirectionally flowing sheet of current. In embodiments, induced currents in underlying metallization planes are suppressed by parallel slots that extend in a direction perpendicular to the radiator traces. |
| US10984971B2 |
Switch operation mechanism
A switch operation mechanism includes: a knob configured to be rotatable about a first rotation axis; a rotor configured to be rotatable about a second rotation axis; a first transmission mechanism configured to transmit rotation of the knob to the rotor and including a slide mechanism configured to allow displacement of the knob in a first direction intersecting with the second rotation axis; and a second transmission mechanism configured to convert the displacement of the knob in the first direction into an operation of a switch. |
| US10984968B2 |
Keyswitch structure
A keyswitch structure includes a base plate, a keycap, and two supports connected to the base plate and the keycap. The keycap is movable relative to the base plate through the two supports. In an embodiment, the support is pivotally connected to the base plate through a pivotal connection structure that includes a guiding slot and a protruding shaft oppositely disposed on the support and the base plate. The guiding slot has an indentation portion and can guide the protruding shaft to fit in the indentation portion. In another embodiment, the support includes a support body connected to the base plate, and an abutting arm extending from the support body. The base plate structurally constrains the support through a hook and a limitation post thereof. The abutting arm of one support extends under the other support, so that the two supports can move each other through the abutting arms. |
| US10984962B2 |
Sensor and supercapacitor based on graphene polypyrrole 3D porous structure, and integrated device including the same
Disclosed is a sensor based on a graphene polypyrrole 3-dimensional (3D) porous structure, the sensor comprising: the graphene polypyrrole 3D porous structure, wherein the graphene polypyrrole 3D porous structure is prepared by growing graphene on a nickel 3D porous structure, growing polypyrrole on a graphene-grown nickel 3D porous structure, and then coating polydimethylsiloxane (PDMS) on a graphene polypyrrole grown structure; and electrodes respectively disposed on top and bottom faces of the graphene polypyrrole 3D porous structure. |
| US10984961B2 |
Hybrid capacitor and manufacturing method thereof
A hybrid capacitor is provided which, while improving utilization ratio of the negative electrode active substance, achieves a low DC internal resistance. This hybrid capacitor is provided with a positive electrode having a layer of a positive electrode active substance having double-layer capacitance, and a negative electrode which has a negative electrode active substance layer that can occlude and release lithium ions and that is formed from metal compound particles having a three-dimensional network structure. The 100% discharge capacity of the metal compound particles having the three-dimensional network structure is 1.25-5.0 times the 100% discharge capacity of the positive electrode active substance. |
| US10984960B2 |
Electrolytic capacitor
An electrolytic capacitor includes a capacitor element, a liquid component, an outer case, and a sealing body. The capacitor element includes an anode body having a dielectric layer, and a solid electrolyte layer in contact with the dielectric layer. The liquid component is in contact with the solid electrolyte layer. The outer case houses the capacitor element and the liquid component. The sealing body seals an opening of the outer case. The liquid component contains a first component, which is an aliphatic polyol compound having two or more hydroxy groups per molecule. The aliphatic polyol compound includes at least one of a compound having a C3 carbon chain in a main chain and a compound having no C3 carbon chain but having one to four ether oxygen atoms in a main chain. The sealing body includes a polymer having no double bond in a main chain. |
| US10984959B1 |
Quantum dot-sensitized solar cell and method of making the same
The quantum dot-sensitized solar cell (QDSSC) includes a photoelectrode, a counter electrode, and an electrolyte sandwiched between the photoelectrode and the counter electrode. The photoelectrode is formed from a titanium dioxide (TiO2) layer, a cadmium sulfide (CdS) quantum dot sensitizer layer, and a tin dioxide (SnO2) nanograss layer sandwiched between the titanium dioxide (TiO2) layer and the cadmium sulfide (CdS) quantum dot sensitizer layer. |
| US10984951B2 |
Multilayer capacitor having dummy electrodes on corners of dielectric layers
A multilayer capacitor includes a capacitor body including an active region having a plurality of dielectric layers and a plurality of first and second internal electrodes, and upper and lower cover layers, the capacitor body having first to six surfaces, one ends of the plurality of first and second internal electrodes being exposed through the third and fourth surfaces, respectively; first and second external electrodes; and a plurality of dummy electrodes disposed on each of the plurality of dielectric layers in the active region, to be exposed through corners of the dielectric layers. Each of the plurality of dummy electrodes has a width of 60% or less of a distance between the first internal electrode and the fourth surface or a distance between the second internal electrode and the third surface, the width being in a direction from the third surface to the fourth surface. |
| US10984942B2 |
Coil component
A coil component includes a body including a coil, and an external electrode disposed on an external surface of the body and connected to the coil, wherein the body includes a support member supporting the coil and including a through-hole and a via hole spaced apart from the through-hole, the coil includes a coil body and a lead portion connecting the coil body and the external electrode to each other, and a support thin film layer is interposed between one surface of the support member and one surface of the lead portion facing the one surface. |
| US10984939B2 |
Multilayer coil component
A multilayer coil component includes an element body, a coil including a plurality of internal conductors, and a plurality of stress-relaxation spaces. The plurality of internal conductors are separated from each other in a first direction in the element body. Each stress-relaxation space is in contact with a surface of the corresponding internal conductor and powders exist in each stress-relaxation space. The element body includes element body regions located between the internal conductors adjacent to each other in the first direction. Each stress-relaxation space includes a first boundary surface with each internal conductor and a second boundary surface with each element body region. The first boundary surface and the second boundary surface oppose each other in the first direction. A distance between the first boundary surface and the second boundary surface is smaller than a thickness of each element body region in the first direction. |
| US10984938B2 |
Magnetoresistance effect device
The magnetoresistance effect device includes: a magnetoresistance effect element that includes a first magnetization free layer, a magnetization fixed layer or a second magnetization free layer, and a spacer layer interposed between the first magnetization free layer and the magnetization fixed layer or the second magnetization free layer; and a magnetic material part that applies a magnetic field to the magnetoresistance effect element, wherein the magnetic material part is arranged to surround an outer circumference of the magnetoresistance effect element in a plan view in a stacking direction L of the magnetoresistance effect element. |
| US10984935B2 |
Superconducting dipole magnet structure for particle deflection
A superconducting dipole magnet structure that includes coil boxes, a dewar and a support device is provided, wherein each of the coil boxes is of a one-piece structure in which a superconducting coil is provided, wherein the superconducting coils are opposite to each other so that a uniform dipole magnetic field is generated when the two superconducting coils are energized, and wherein the support device is fixed to the dewar and supports the coil box in the way of point contact. |
| US10984933B2 |
Superparamagnetic iron cobalt ternary alloy and silica nanoparticles of high magnetic saturation and a magnetic core containing the nanoparticles
Thermally annealed superparamagnetic core shell nanoparticles of an iron-cobalt ternary alloy core and a silicon dioxide shell having high magnetic saturation are provided. A magnetic core of high magnetic moment obtained by compression sintering the thermally annealed superparamagnetic core shell nanoparticles is also provided. The magnetic core has little core loss due to hysteresis or eddy current flow. |
| US10984931B2 |
Magnetic copper alloys
Magnetic copper-nickel-tin-manganese alloys are disclosed. Also disclosed are processing steps that can be performed for maintaining and/or changing various magnetic or mechanical properties of the alloys. Further described herein are methods for using such an alloy, including various articles produced therefrom. |
| US10984930B2 |
Method for producing sintered R—T—B based magnet and diffusion source
A method for producing a sintered R-T-B based magnet includes the steps of: providing a sintered R-T-B based magnet work; providing a Pr—Ga alloy powder produced through atomization; subjecting the Pr—Ga alloy powder to a heat treatment at a temperature which is not lower than a temperature that is 250° C. below a melting point of the Pr—Ga alloy powder and which is not higher than the melting point, to obtain a diffusion source from the Pr—Ga alloy powder; and placing the sintered R-T-B based magnet work and the diffusion source in a process chamber, and heating the sintered R-T-B based magnet work and the diffusion source in a vacuum or an inert gas ambient, thereby allowing Pr and Ga to diffuse from the diffusion source into the interior of sintered R-T-B based magnet work. |
| US10984925B2 |
Electric wire twisting device and electric wire twisting method
An electric wire twisting device is provided, which is capable of producing a preferable twisted electric wire from a plurality of electric wires of which both ends are cut. An electric wire twisting device 1 includes a first gripping device 11 including a first clamp 2a that grips a first end of a first electric wire CT, a second clamp 2b that grips a first end of a second electric wire C2, and a first holder 15A that holds the first clamp 2a and the second clamp 2b. The electric wire twisting device 1 includes a second gripping device 12 that grips a second end of the first electric wire CT and a second end of the second electric wire CT, a first revolving actuator 3b that causes the first holder 15A to rotate around a center line of revolution CL, and a first rotating actuator 3a that causes the first clamp 2a and the second clamp 2b to rotate around a center line of rotation that is parallel to the center line of revolution CL or is inclined with respect to the center line of revolution CL. |
| US10984917B2 |
Systems and methods for compressing plasma
Embodiments of systems and methods for compressing plasma are described in which plasma pressures above the breaking point of solid material can be achieved by injecting a plasma into a funnel of liquid metal in which the plasma is compressed and/or heated. |
| US10984915B2 |
Medical/care support method, medical/care support system, and medical/care support program
A medical/care support method is provided, which enables medical or care workers having different special fields such as physicians and nurses to share the medical or care information of each patient or care-needing person while protecting the privacy of the patient or care-needing person, and to support the provision of better-quality medical or care service to the patient or care-needing person based on the medical or care information shared. A patient ID, a disease ID, and a medical facility ID are associated and stored, thereby generating a group G11. A patient P1 designated by patient group registration participates in the group G11 after the patient's approval of an invitation request. Medical workers M1 and M2 and patient-related persons R1, R2, and R4 participate in the group G11 as supporters in response to respective invitation requests. |
| US10984914B2 |
CPR assistance device and a method for determining patient chest compression depth
A Cardiopulmonary resuscitation assistance device is used by a Rescuer when administering Cardiopulmonary resuscitation to a patient. Using the rescuer vital signs, image subsection from a patient facing camera can be identified that comprise the rescuer's hands. Having correctly identified the image subsections comprising the rescuer's hands the chest compression depth and frequency can be derived from the patient facing camera by tracking the distance between the patient facing camera and the rescuer's hands. |
| US10984912B2 |
Method and apparatus to monitor, analyze and optimize physiological state of nutrition
A method and apparatus that for monitoring the physiological state of nutrition of an individual and adaptively analyze that data input to anticipate the individual's nutritional needs. A satiety meter may be employed to analyze a user's profile including nutritional state and determine when and how much a user should consume to prevent the onset of hunger and communicate is to a decision engine. The decision engine may generate and communicate a message to the user via the client device to prescribe prophylactic intake of nutrition to the individual prior to the onset of hunger based on the user's nutrition plan and/or regimen. |
| US10984911B2 |
Multiple wavelength sensor emitters
A physiological sensor has light emitting sources, each activated by addressing at least one row and at least one column of an electrical grid. The light emitting sources are capable of transmitting light of multiple wavelengths and a detector is responsive to the transmitted light after attenuation by body tissue. |
| US10984910B2 |
System and method for assuring patient medication and fluid delivery at the clinical point of use
A system for confirmation of fluid delivery to a patient at the clinical point of use is provided. The system includes a wearable electronic device. The wearable electronic device has a housing; at least one imaging sensor associated with the housing; a data transmission interface; a data reporting accessory for providing data to the user; a microprocessor for managing the at least one imaging sensor, the data transmission interface, and the data reporting accessory; and a program for acquiring and processing images from the at least one imaging sensor. The system further includes a fluid delivery apparatus; and one or more identification tags attached to or integrally formed with the fluid delivery apparatus. The program processes an image captured by the at least one imaging sensor to identify the one or more identification tags and acquires fluid delivery apparatus information from the one or more identification tags. |
| US10984909B2 |
Gas cylinder monitoring system
A gas cylinder monitoring system is disclosed having a gas cylinder for receiving and distributing gas contained therein, a first monitoring system associated with the gas cylinder operable to monitor data associated with the gas cylinder and having a transmitter operable to broadcast the data at a controlled time and/or time interval in a discrete advertisement package, and a second monitoring system associated with one or more locations in which the first monitoring system may reside and having a receiver operable in a first mode to receive the advertisement package broadcast from the first monitoring system when the second monitoring system is within range of the first monitoring system. |
| US10984906B2 |
Medical image processing apparatus, program installable into medical image processing apparatus, and medical image processing method
The present disclosure provides a medical image processing apparatus capable of readily creating, from a medical image, an electronic document that displays a three-dimensional body organ model. The medical image processing apparatus performs control to acquire patient information from DICOM additional information of medical image data designated when the creation of the electronic document has been instructed, and to create the electronic document of the three-dimensional body organ model corresponding to the medical image data, the electronic document containing the acquire patient information. To which patient the three-dimensional body organ model belongs can be identified on the electronic document. |
| US10984903B2 |
Modular blood treatment systems, units, and methods
A portable adapter is provided that can include a closure system configured to control the flow of blood and/or dialysate between the adapter and a blood treatment apparatus. Modular systems are also provided that include the portable adapter engaged with various units such as a portable blood processing module, a non-portable base module, and/or a remote module. Methods of conducting blood treatments such as blood circulation, hemodialysis, and hemofiltration, hemodiafiltration, using the modular systems are also provided. The systems, units, and methods enable the engagement and disengagement of the adapter from the various units to conduct, interrupt, and resume blood treatments without disconnecting the adapter from the vasculature of a patient. Modular systems including interchangeable portable and base modules configured for various blood treatments are also provided that can be engaged and disengaged with each other without disconnecting the portable module from the vasculature of a patient. |
| US10984900B1 |
Systems and methods for refilling prescriptions by text message
A messaging module is configured to, in response to a first indicator indicating that a patient has opted into receiving text messages, selectively send and receives text messages to and from a mobile phone number of the patient. A refill by text (RBT) module is configured to, when a second indicator indicates that the patient is not included in an RBT program, trigger the messaging module to send a predetermined text message to the mobile phone number in response to a determination that: a name of a prescription drug prescribed to the patient is included in a stored list of prescription drugs associated with the RBT program; the first indicator indicates that the patient has opted into receiving text messages; and a number of refills of the prescription drug already provided to the patient without a change in the therapy of the prescription drug is greater than a predetermined number. |
| US10984899B2 |
Platform and system for digital personalized medicine
The digital personalized medicine system uses digital data to assess or diagnose symptoms of a subject to provide personalized or more appropriate therapeutic interventions and improved diagnoses. The use of prioritized questions and answers with associated feature importance can be used to assess mental function and allow a subject to be diagnosed with fewer questions, such that diagnosis can be repeated more often and allow the dosage to be adjusted more frequently. Pharmacokinetics of the subject can be estimated based on demographic data and biomarkers or measured, in order to determine a treatment plan for the subject. Also, biomarkers can be used to determine when the patient may be at risk for experiencing undesirable side effects and the treatment plan adjusted accordingly. |
| US10984898B2 |
Cooperative health management system
In various implementations, a method includes obtaining first patient display data indicating a first set of health metric types associated with a first patient account and second patient display data indicating a second set of health metric types associated with a second patient account. The method includes receiving, via the network interface, first patient health data associated with the first patient account. The method includes receiving, via the network interface, second patient health data associated with the second patient account. The method includes displaying a user interface including a first patient data region and a second patient data region, the first patient data region including representations of values for the first set of health metric types selected from the first patient health data and the second patient data region including representations of values for the second set of health metric types selected from the second patient health data. |
| US10984896B2 |
Systems and methods for providing an inducement to purchase incident to a physician's prescription of medication
Systems and methods for providing targeted content to a patient who has received a prescription for medication. The systems and methods generally provide the content prior to the Point of Sale (POS) of the actual prescription allow patients to review the content and possibly act on it prior to actually obtaining the medication. Depending on embodiment, the content may be provided by a pharmacy at or around the time of dispensing or by a physician at or around the time of prescribing. |
| US10984895B2 |
System and method for health and wellness mobile management
A system for health and wellness mobile management comprises a database operable to store a health and wellness data record associated with a patient/data owner, a content management system adapted to strictly control access to the health and wellness data record stored in the database according to access rules set by the patient, a web interface adapted to interface with information requesters submitting requests for access to the health and wellness data record via a web application, an external connect interface adapted to interface with external systems and applications for receiving health and wellness data associated with the patient, a prescription interface adapted to receive a pharmaceutical prescription for the patient submitted by a healthcare provider, and a handheld physiological parameter measurement device adapted to wirelessly communicate with a computing device executing the web application. |
| US10984894B2 |
Automated image quality control apparatus and methods
An image quality control system is disclosed. The example system includes an artificial intelligence modeler to process image data and metadata from patient data to generate first feature(s) from the image data and to parse the metadata to identify study information. The example system includes a computer vision processor to identify second feature(s) in the image data. The example system includes a results evaluator to compare the first feature(s) and second feature(s) to generate a comparison and to evaluate the comparison, first feature(s), and second feature(s) with respect to the study information to generate an evaluation. The example system includes a quality controller to compare the evaluation to quality criterion(-ia) to produce an approval or rejection of the patient data, the approval to trigger release of the patient data and the rejection to deny release of the patient data. |
| US10984890B2 |
Synthetic WGS bioinformatics validation
Systems, methods, and devices for generating synthetic genomic datasets and validating bioinformatic pipelines for genomic analysis are disclosed. In preferred embodiments, synthetic maternal and paternal datasets with known variants are used with matched normal synthetic datasets to validate various bioinformatic pipelines. Bioinformatic pipelines are evaluated using the synthetic datasets to assess design changes and improvements. Accuracy, PPV, specificity, sensitivity, reproducibility, and limit of detection of the pipelines in calling variants in synthetic datasets is reported. |
| US10984888B2 |
Methods and systems for a digital PCR experiment designer
A computer-implemented method for designing a digital PCR (dPCR) experiment is provided. The method includes receiving, from a user, a selection of optimization type. The optimization type may be maximizing the dynamic range, minimizing the number of substrates including reaction sites needed for the experiment, determining a dilution factor, or determining the lower limit of detection, for example. The method further includes receiving, from the user, a precision measure for an experiment, and a minimum concentration of a target in a reaction site for the experiment. The method also includes determining a set of dPCR experiment design factors for the experiment based on the optimization type. The set of dPCR experiment design factors is then displayed to the user. |
| US10984887B2 |
Systems and methods for detecting structural variants
Systems and method for identifying long deletions can obtain sequencing information for a plurality of amplicons in and around a potential region from a nucleic acid sample. The sequencing information can include a plurality of reads that can be mapped to a reference sequence. Using information, such as where reads map to a reference sequence and relative abundance of reads for the amplicons, structural variants can be identified and a determination can be made if the nucleic acid sample is homozygous or heterozygous for the structural variant. |
| US10984886B2 |
Reduced footprint fuse circuit
A memory device includes a memory bank accessible via a plurality of memory addresses. The memory device further includes a fuse array including a plurality of fuse banks. A fuse bank of the plurality of fuse banks includes a fuse circuit, which includes a fuse latch having first input circuitry. The fuse latch is implemented to store a first bit of a first memory address received at the first input circuitry. The fuse circuit also includes a matching circuit coupled to the first input circuitry. The matching circuit is implemented to receive a first bit of a second memory address at the first input circuitry and to output, at output circuitry, a comparison result based at least in part on the first bit of the first memory address and the first bit of the second memory address. |
| US10984884B2 |
Configurable associated repair addresses and circuitry for a memory device
A memory device includes a memory bank having multiple addressable groups of memory cells. The multiple addressable groups of memory cells include a primary set of addressable groups and a secondary set of addressable groups. The memory bank has a control circuitry that activates an addressable group with the control circuitry including repair address match circuitry that includes dynamic selection circuitry having multiple first inputs that receive row address values corresponding to the primary set. The dynamic selection circuitry includes one or more second inputs configured to receive one or more fused address values corresponding to the secondary set of addressable groups. The dynamic selection circuitry includes an output configured to selectively transmit a result that is based at least in part on a selection of one or more first inputs and a comparison of the selected one or more first inputs with the one or more the second inputs. |
| US10984877B1 |
Multi BLCS for multi-state verify and multi-level QPW
An apparatus and method for a multi-state verify of a memory array are provided. A sense circuit of a memory device is connected to a bit line of the memory array. The sense circuit includes a first voltage clamp, a second voltage clamp, and a program data latch disposed on the bit line. The first and second voltage clamps are biased to first and second voltages, respectively, where the first voltage is lower than the second voltage. When a high bias is applied to the program data latch, the program data latch is in an OFF state, and the first voltage clamp limits the bias on the bit line to the first voltage. When a low bias is applied to the program data latch, the program data latch is in an ON state, and the second voltage clamp limits the bias on the bit line to the second voltage. |
| US10984874B1 |
Differential dbus scheme for low-latency random read for NAND memories
A random access memory is provided including a plane structure comprising a plurality of sense amplifiers, each including a local data latch, a pair of local busses connected to each of the data latches, a differential data bus, and a pair of redrivers connected between the pair of local busses and the differential data bus. |
| US10984865B2 |
Three-dimensional non-volatile memory device and method of manufacturing the same
A semiconductor device includes a memory block comprising a plurality of memory strings, wherein transistors, in each of the plurality of memory strings, are adjusted to be dummy transistors and normal transistors. |
| US10984864B2 |
Methods and apparatus for pattern matching in a memory containing sets of memory elements
Methods include receiving a pattern to be searched in a memory having a plurality of sets of memory elements with each set coupled to a separate data line and corresponding to a same set of bit positions of the pattern. Methods further include receiving a pattern of data to be programmed into a memory, programming a first data state into one memory cell of each cell pair of a plurality of cell pairs of a memory array, and programing a second data state into another memory cell of each cell pair of the plurality of cell pairs for each bit position of the pattern. Memory configured to facilitate such methods include a plurality of cell pairs, each cell pair of the plurality of cell pairs programmed to store a same bit of data corresponding to a particular bit position of a pattern to be searched in the memory. |
| US10984860B2 |
Self-healing dot-product engine
A DPE memristor crossbar array system includes a plurality of partitioned memristor crossbar arrays. Each of the plurality of partitioned memristor crossbar arrays includes a primary memristor crossbar array and a redundant memristor crossbar array. The redundant memristor crossbar array includes values that are mathematically related to values within the primary memristor crossbar array. In addition, the plurality of partitioned memristor crossbar arrays includes a block of shared analog circuits coupled to the plurality of partitioned memristor crossbar arrays. The block of shared analog circuits is to determine a dot product value of voltage values generated by at least one partitioned memristor crossbar array of the plurality of partitioned memristor crossbar arrays. |
| US10984851B2 |
Memory system and method for operating the same
A memory system includes: a memory device; and a controller suitable for performing a first test read operation on a first plurality of candidate memory blocks, determining a test read method of a second test read operation based on a reference value and a first number of the first plurality candidate memory blocks scanned in the first test read operation, and performing the second test read operation on a second plurality of candidate memory blocks based on the determined test read method. |
| US10984850B2 |
Apparatuses and methods for switching refresh state in a memory circuit
An apparatus may include a semiconductor device that includes an internal clock circuit configured to receive an internal clock signal and to provide a local clock signal based on the internal clock signal. The internal clock circuit comprises a clock synchronizer configured to, in response to receipt of a command to exit a self-refresh mode, disable provision of the local clock signal by a number of cycles of the internal clock signal. |
| US10984847B2 |
Memory management for charge leakage in a memory device
Methods, systems, and devices for memory management associated with charge leakage in a memory device are described. A memory device may identify a charge leakage associated with one or more memory cells or access lines, and may determine whether to invert a logic state stored by a memory cell or a set of memory cells to improve the likelihood that the memory cells are read properly in the presence of charge leakage. In some examples, the memory device may also store an indication that the complement of the detected logic state was written, such as a bit flip indication, which may correspond to one memory cell or a set of memory cells. |
| US10984845B2 |
Protection of a microcontroller
In an embodiment, a method for protecting an electronic circuit includes: detecting a malfunction of the electronic circuit; executing a plurality of waves of countermeasures without interrupting an operation of the electronic circuit; and triggering a reset of the electronic circuit after executing the plurality of waves of countermeasures. An interval between two waves of countermeasures of the plurality of waves of countermeasures is variable. |
| US10984840B2 |
Semiconductor device
To provide a novel semiconductor device.The semiconductor device includes cell arrays and peripheral circuits; the cell arrays include memory cells; the peripheral circuits includes a first driver circuit, a second driver circuit, a first amplifier circuit, a second amplifier circuit, a third amplifier circuit, and a fourth amplifier circuit; the first driver circuit and the second driver circuit have a function of supplying a selection signal to the cell array; the first amplifier circuit and the second amplifier circuit have a function of amplifying a potential input from the cell array; the third amplifier circuit and the fourth amplifier circuit have a function of amplifying a potential input from the first amplifier circuit or the second amplifier circuit; the first driver circuit, the second driver circuit, the first amplifier circuit, the second amplifier circuit, the third amplifier circuit, and the fourth amplifier circuit include a region overlapping with the cell array; and the memory cells include a metal oxide in a channel formation region. |
| US10984839B2 |
Voltage regulation circuit
A voltage regulation circuit includes a first comparison and control unit and a second comparison and control unit. The first comparison and control unit is connected to a first switch unit, determine a first bias voltage based on a first output voltage, a first reference voltage, and a second reference voltage, and control a value of an equivalent resistance of the first switch unit using the first bias voltage. The second comparison and control unit is connected to a third switch unit and the second switch unit, determine a second bias voltage based on the first output voltage, a second output voltage, and a third reference voltage, and control values of equivalent resistances of the third switch unit and the second switch unit using the second bias voltage. |
| US10984838B2 |
Interconnect architecture for three-dimensional processing systems
A processing system includes a plurality of processor cores formed in a first layer of an integrated circuit device and a plurality of partitions of memory formed in one or more second layers of the integrated circuit device. The one or more second layers are deployed in a stacked configuration with the first layer. Each of the partitions is associated with a subset of the processor cores that have overlapping footprints with the partitions. The processing system also includes first memory paths between the processor cores and their corresponding subsets of partitions. The processing system further includes second memory paths between the processor cores and the partitions. |
| US10984834B2 |
Dual control security processing
A dual-control security procedure is initiated, and a first person is identified for the procedure. The first person is authenticated and a remote agent that is remotely located is requested to participate in the procedure. Actions/behaviors of at least the first person are monitored from the video in accordance with the procedure and provided in real-time to the remote agent. An audit log is written to upon the conclusion of the procedure. The audit log at least comprising: identifiers for the first person and the remote agent, a procedure identifier for the procedure, an asset/area identifier associated with the procedure, a zone identifier for a location within an establishment, action identifiers for the actions, behavior identifiers for the behaviors, violation identifiers for any violations detected during the procedure, and a link to a video clip from the video that corresponds to at least the first person performing the procedure. |