| Document | Document Title |
|---|---|
| US10965832B2 |
Information processing apparatus saving fax transmission settings for redisplay
An information processing apparatus, to which a facsimile device is communicably connected, includes an input device to receive operation of a user, a memory, and a hardware processor controlling the facsimile device to fax print data. The hardware processor is configured to: cause a display device to display a first setting screen for making settings based on operation received by the input device; cause the display device to display a preview screen representing an output image of fax transmission based on the settings made on the first setting screen; store, in the memory, setting values being input via the first setting screen; and cause the display device to display, when a cancellation operation of fax transmission is performed on the preview screen, a second setting screen corresponding to the first setting screen on which at least part of the setting values stored in the memory have been displayed. |
| US10965831B2 |
Optical head, optical head scanning device, and method for driving optical head scanning device
Provided is an optical head that includes a base substrate and a line head. The line head includes a plurality of sub-line heads electrically independent of one another and arranged on the base substrate in parallel with a first direction. Each of the plurality of sub-line heads includes a circuit substrate unit that constitutes a portion of the base substrate, and an optical-element array that includes a plurality of optical elements each arranged on the circuit substrate unit at least in parallel with a second direction that is a direction of a length of each of the plurality of sub-line heads. |
| US10965827B2 |
Document reading device and image forming apparatus
A document reading device includes an image reading part, a document conveying part, an operation display part including a display device and receiving operation input, a double feed detecting part detecting double feed of a conveyed document, and a controlling part. In conveyance reading for documents, when double feed is detected from a double feed document, the controlling part stops the conveyance reading for a following document following to the double feed document. In re-reading for the double feed document, the controlling part displays, on the display device, urging to place the double feed document onto the document conveying part and sets a double feed detection function to OFF. After re-performing the conveyance reading for the double feed document, in restarting the following document, the controlling part sets the double feed detection function to ON and restarts the conveyance reading for the following document. |
| US10965826B2 |
Method for controlling information processing apparatus and storage medium
A first soft key for use of a function that differs from a function available by selecting a second soft key displayed in a second display area of an information processing apparatus or a first soft key for use of a function that is the same as a function available by selecting a second soft key displayed in the second display area is displayed in a first display area displayed together with the second display area in accordance with a display condition. |
| US10965823B2 |
Information processing system, device, and method
An information processing system includes a first display control unit and a second display control unit. The first display control unit displays, on a display unit, a button on which a setting value of a program is displayed. The second display control unit starts up the program when the button is pressed and, in accordance with the started program, displays, on the display unit, a setting screen that corresponds to the button being pressed. |
| US10965822B1 |
Photograph cropping using facial detection
Methods and systems for preventing the cropping of faces depicted by digital photographs are provided. To this end, the methods and systems may automatically detect the presence of faces depicted by the digital photographs and generate a facial boundary for the faces. The methods and system may also generate a crop boundary at which the photograph is cropped. In some scenarios, the systems and methods attempt to locate the crop boundary on the digital photograph to prevent omitting a portion of the facial boundary. Additionally or alternatively, users are provided an interface to manually set a location for the crop boundary. The user is warned if the crop boundary omits a portion of the facial boundary. The digital photographs and crop boundaries are sent to a printer to generate a physical print of the digital photographs. |
| US10965821B2 |
Information processing apparatus and system and non-transitory computer readable medium
An information processing apparatus includes first and second estimators and a determining unit. The first estimator estimates a quality of each individual part to be used for a product, based on error information concerning a manufactured product. The second estimator estimates a degree of an influence of each portion of a product on a quality of the product, based on the error information. The determining unit determines, for each portion of the product, which part will be used for a corresponding portion of the product, based on the estimated quality and the estimated degree of an influence. |
| US10965811B1 |
Systems and methods for identifying a behavioral target during a conversation
A conversation may be monitored in real time using a trained machine learning model. This real-time monitoring may detect attributes of a conversation, such as a conversation type, a state of a conversation, as well as other attributes that help specify a context of a conversation. Contextually appropriate behavioral targets may be provided by machine learning model to an agent participating in a conversation. In some embodiments, these “behavioral targets” are identified by applying a set of rules to the contemporaneously identified conversation attributes. The behavioral targets may be defined in advance prior to the start of a conversation. In this way, the machine learning model may be trained to associate particular behavioral target(s) with one or more conversation attributes (or collections of attributes). This facilitates the real-time monitoring of a conversation and contemporaneous guidance of an agent with machine-identified behavioral targets. |
| US10965807B2 |
Systems and methods for anomaly or fraud detection
A system for anomaly estimation for a telephonic call is described, receiving a call object including an identifier field associating the call object to a purported user; retrieving a user data object associated with the purported user, and processing the user data object to retrieve one or more vectorized user features associated with the purported user. A neural network processes the one or more vectorized call features and the one or more vectorized user features through a machine learning model. |
| US10965805B1 |
Contextual awareness determination for a mobile device
Disclosed herein are methods and systems determining contextual awareness for a mobile device and adjusting settings based on the contextual awareness determination. A method for determining an environmental context for a mobile device includes capturing, by one or more non-intrusive sensors on a mobile device, sensor data associated with the one or more non-intrusive sensors, where global positioning system sensor data is unavailable, generating, by the mobile device, a sensor data attribute from each captured sensor data, determining, by the mobile device, an environmental context for the mobile device from the sensor data attribute, and adjusting, by the mobile device, settings on the mobile device based on the determined environmental context. |
| US10965804B2 |
Method and apparatus of acquiring information regarding applications for display on a user interface
An approach is provided for acquiring information regarding installed applications on a user equipment. A request for information is received regarding one or more applications installed on user equipment in a category of applications. The request includes a respective unique identifier for the one or more applications. And, a transmission of the information is initiated including an icon corresponding to the one or more applications compiled using the respective unique identifier for the one or more applications. |
| US10965803B2 |
Vibration alerting method for mobile terminal and mobile terminal
A vibration alerting mobile terminal configured to adjust an amplitude parameter and a frequency parameter of a vibration alerting mode, to implement diverse vibration alerting modes to meet vibration requirements of the mobile terminal in different environments. The terminal provides for: displaying a first interface, wherein the first interface includes an amplitude adjustment control, a frequency adjustment control, and a vibration mode adjustment control; responding to an adjustment operation for at least one of the amplitude adjustment control, the frequency adjustment control, and the vibration mode adjustment control; generating a first vibration alerting mode; and alerting a user according to the first vibration alerting mode. |
| US10965801B2 |
Method for inputting and processing phone number, mobile terminal and storage medium
A method for inputting and processing phone number is provided. The method includes: taking or storing a picture P1 including a phone number; obtaining a picture P2 including only the phone number by automatically processing the picture P1 and saving the picture P2; obtaining editable character strings of the phone number in the picture P2 by automatically recognizing the phone number in the picture P2; determining whether a format of the editable character strings of the phone number in the picture P2 is consistent with a standard format of the contact information of the mobile terminal; when consistent, the phone number in the picture P2 is displayed in the dialing interface for dialing or saving; and when not consistent, the phone number in the picture P2 is displayed in a modifying interface for correcting. |
| US10965794B2 |
On-board self-healing network for delivery of vehicle passenger-consumable content
A self-healing network on-board a vehicle includes multiple wireless devices that are directly and communicatively interconnected via communications backbone(s). One of devices is collectively determined by the other devices to be a lead device of the network, and therefore establishes a wireless link (e.g., an only wireless link) communicatively connecting any of the self-healing network devices to other devices/servers on-board the vehicle and external to the network. Passenger-consumable content may be delivered between any device of the self-healing network and the other on-board, external devices via the lead wireless device, its established wireless link, and the communications backbone(s). Any wireless device of the self-healing network may serve as a hot spare for the lead wireless device, so that the self-healing network may automatically reconfigure to mitigate and recover from faults, e.g., by automatically forming multiple, mutually exclusive sub-self-healing networks, each of which has its own cooperatively selected lead wireless device. |
| US10965793B2 |
Methods and nodes for facilitating a PDU session procedure in interworking networks
A method at a first node for facilitating a PDU session procedure for a UE in a first communication network, wherein the first communication network is interworking with a second communication network, and a second node supporting the interworking is selected for managing the PDU session, the method comprising: determining an indication which indicates whether the PDU session supports interworking with the second network; and sending the indication to the second node. According to various aspects and embodiments of the method, allocation of resources can be improved and the deployment can be simplified. |
| US10965792B2 |
Providing efficient routing of an operations, administration and maintenance (OAM) frame received at a port of an ethernet switch
A system for efficient routing of an OAM) frame in an Ethernet switch receives an OAM frame at a first port; building a first classification key dependent on an OAM frame header; classifies in a context of the first port to create a first classification; resolves action dependent on the first classification; modifies the first classification key to create a second classification key; classifies the frame in a context of the second port to create a second classification; sends the second classification key to an OAM engine coupled to the Ethernet switch for modification into a third classification key; receives the third classification key from the OAM engine; modifies the third classification key into a final classification key; modifies the header of the OAM frame with the final classification key; and sends the modified OAM frame to a switching fabric of the Ethernet switch. |
| US10965791B2 |
Handling different protocol data unit types in a device to device communication system
A method and system for differentiating different Protocol Data Units (PDU) in a D2D communication network. The type of PDU to be differentiated is assigned/associated with a unique data/value and transmitted to the destination, by a transmitting User Equipment. At the receiving end, the receiving User Equipment differentiates between different types of PDU packets received, based on the unique data associated with the collected data. Further, the received PDU data is processed based on a suitable packet processing function that matches the PDU type of the PDU data received. |
| US10965787B2 |
Systems and methods for aircraft interface device connectivity with mobile devices
A computer-implemented method for providing vehicle data to a mobile device is disclosed. The method may include: receiving raw vehicle data from one or more vehicle data streams using one or more protocols; recording the received raw vehicle data from the one or more vehicle data streams in a file format; and transmitting the recorded vehicle data to a mobile device having at least one application configured to interpret the transmitted vehicle data. |
| US10965786B2 |
Adaptive fixed point mapping for uplink and downlink fronthaul
Compression techniques can reduce the fronthaul throughput in split radio access network (RAN) architectures for next generation designs. Adaptive fixed-point mapping can reduce the throughput requirements between a baseband unit (DU) and a remote radio unit (RU). Thus, a bit or plurality of bits can indicate the type of data being passed over the fronthaul. Consequently, adaptive mapping between precoded downlink data and non-precoded downlink data suited to the type of data passed over the fronthaul can achieve high compression ratios. |
| US10965784B2 |
Virtual reality devices and accessories
Systems and methods disclosed provided a virtual reality experience, including: a set of motorized pads for coupling to feet of a user; a means of communication between the set of motorized pads and a computing environment operating a virtual reality headset; such that the set of motorized pads are configured to provide pressure on a user's feet as an avatar within a virtual environment traverses the environment. Systems and methods disclosed further provide a multiuser virtual reality experience. Systems and methods disclosed further provide a multiuser experience including generation of a common environment viewable in the virtual reality headsets; and recording a tour including audio data as the first user describes the common environment. |
| US10965782B2 |
Coordinating services across multiple providers
A method includes: processing, by a processing device of a services coordination platform, a request from an application in relation to one or more of a plurality of leaderboard platforms to identify a leaderboard platform capable of executing a leaderboard service associated with the request, wherein the request comprises transaction parameters in a first format; formatting, by the services coordination platform, the transaction parameters into a second format, wherein the transaction parameters in the first format are incompatible with the leaderboard platform, and the transaction parameters in the second format are compatible with the leaderboard platform; providing, by the services coordination platform, the transaction parameters in the second format to the leaderboard platform; receiving, by the services coordination platform, a transaction outcome from the leaderboard platform with respect to the leaderboard service; and providing, by the services coordination platform, the transaction outcome to the application. |
| US10965781B2 |
Method and server for displaying access content
Methods, apparatuses, and devices, including computer programs encoded on computer storage media for displaying webpage content are provided. One of the methods includes: receiving an access request of a first user to access a webpage; determining webpage content according to the access request of the first user; determining a second user identifier comprised in the webpage content based on the webpage content; determining a presentation identifier from one or more presentation identifiers corresponding to the second user according to the determined second user identifier and the webpage content, wherein the one or more presentation identifiers are configured to identify the corresponding second user; and returning the webpage content to the first user, wherein the webpage content comprises the determined presentation identifier corresponding to the determined second user identifier. |
| US10965778B1 |
Multiunit charging device and method for preemptive data upload
A multiunit charging device and method for preemptive data upload is provided. A multiunit charging device controls a first mobile device, received at a plurality of charging stations of the multiunit charging device, to upload first data via a communication unit. After upload of the first data has begun, the multiunit charging device detects that a second mobile device is received at the plurality of charging stations. When an amount of second data for upload at the second mobile device is smaller than a remaining amount of the first data for upload at the first mobile device, the multiunit charging device: preempts uploading of the first data at the first mobile device; and controls the second mobile device to upload the second data via the communication unit. |
| US10965777B2 |
Application management of network slices with ledgers
The technologies described herein are generally directed to facilitating the allocation, scheduling, and management of network slice resources. According to an embodiment, a system can comprise a processor and a memory that can store executable instructions that, when executed by the processor, facilitate performance of operations. The operations can include receiving proposed contract data representative of a proposed contract for access by an application of a user equipment device to resources of a network slice usable for the access by the application. The operations can further include, based on the proposed contract data, storing governing contract data representative of a governing contract in a storage device, with the governing contract being selected to control the access by the application to the resources of the network slice. The operations can further include scheduling use of the resources of the network slice by the application based on the governing contract data. |
| US10965774B2 |
Automated platform provisioning system
According to some embodiments, a system to automate platform provisioning for an enterprise includes a platform resource computer store containing a set of electronic data records (each including a component identifier and a set of computing characteristic values). A profile engine may receive a platform request from a user associated with the enterprise and identify, based on data in the platform resource computer store, a resource bundle of components appropriate in view of the platform request. A platform generator may receive platform requirements based on the identified resource bundle of components and provide input data to a REST API service. Final platform definition information for the enterprise may be stored into a central repository. According to some embodiments, a platform provisioning system may process IaaS and PaaS automation components and utilize a return service to generate infrastructure binding data to couple components in the resource bundle to each other. |
| US10965772B2 |
Interface invocation method and apparatus for hybrid cloud
The various embodiments described herein include methods, systems, and devices for invoking an interface for a hybrid cloud. In one aspect, a computing system receives, from an invoker, an interface invocation request for a hybrid cloud, the request including a uniform resource locator address and information of a first target cloud platform. In accordance with the request, the computing system determines an interface of the first target cloud platform, e.g., a type of the first target cloud platform, a region of the interface of the first target cloud platform; and an interface within the region as the interface of the first target cloud platform. Next, the computing system sends the request to the interface of the first target cloud platform and then receives a response from the interface of the first target cloud platform. |
| US10965769B2 |
Airborne data library
The disclosed subject matter includes, an airborne data library onboard an airborne platform, configured for automatic management of situation awareness data (SAD), the airborne data library comprising an onboard data management system; the on-board data management system comprises a data management unit and an onboard data-repository; the data management unit being operatively connectible to at least one computer processor and configured to: establish a communication link with at least one situation awareness data (SAD) source; obtain situation awareness data from the at least one SAD source; process the SAD based on data management logic being accessible to the data management unit. |
| US10965767B2 |
Methods, apparatuses, and computer program products for providing filtered services and content based on user context
An apparatus may include a processor configured to receive a request for a service or content from a first device. The processor may be further configured to receive a user's context information from a second device. The processor may additionally be configured to filter the requested service or content based at least in part upon the user's context information. The processor may be further configured to provide the filtered service or content to the first device. Corresponding methods and computer program products are also provided. |
| US10965763B2 |
Web analytics tags
Systems and methods that facilitate capturing web analytics data are disclosed. One example method can include the acts of receiving a web page request from a client computer and providing the requested web page to the client computer. The requested web page can include one or more analytics tags. The method can also include capturing at least one of client side information, performance of, or one or more user interactions with the web page and providing the captured information to a web server associated with the web page. These interactions can include user actions that do not include a call to a web server, such as actions that occur during an AJAX flow. |
| US10965762B2 |
Connection model-based control of concurrent connection count and properties
A connection request including a connection model key and a partner system attribute of a partner system requesting a connection is received at an application server from the partner system within a distributed system. Using a predefined connection model, a determination is made as to whether the received connection model key and the received partner system attribute respectively match a configured connection model key and a configured authorized partner system attribute within the predefined connection model. A logical connection is created that includes a first unique connection name derived from the received partner system attribute in response to determining that the received connection model key and the received partner system attribute match the respective configured connection model key and the configured authorized partner system attribute within the predefined connection model. |
| US10965756B2 |
Sensor system of master and slave sensors, and method therein
It is disclosed a sensor system (10, 58) and a method therefore for providing quality data to a network node. The sensor system comprises two or more populations (12a, 12b, 56a, 56b) of sensors, each population having a plurality (11i, 11j, 52a, 52i, 200) of single-purpose slave sensors distributed over a geographical area and at least one master sensor (14a, 14b, 54). Based on the data quality received (302) from each single-purpose slave sensor, a master sensor may perform discretionary management (320, 322) and terminate (322) single-purpose slave sensor not meeting data quality standards. The sensor system provides a possibility to deploy master sensors and single-purpose slave sensor networks in remote or inaccessible areas without large network planning expenditures, for example by “carpet-bombing” an area with slave sensors and master sensors from the air. |
| US10965751B2 |
Just a bunch of flash (JBOF) appliance with physical access application program interface (API)
A storage array includes a first controller, memory, and one or more storage devices. Each of the storage devices comprises a second controller and a nonvolatile memory. The first controller receives a command and data from a host connected to the storage array and transmits a response or data to the host. When a write command, write data, and size information of the write data are received from the host, the first controller sends the received data to the second controller. The second controller determines a write address indicating a memory region of the nonvolatile memory in which the write data are to be written, based on the write command and the size information, writes the write data in the memory region associated with the write address, and transmits the write address to the first controller. The first controller further transfers the write address to the host. |
| US10965750B2 |
Distributed management of dynamic processing element connections in streaming applications
Dynamic connections between processing elements of a streaming application are managed in a distributed manner by the processing elements to increase efficiency and performance of real-time connection updates. A streams application management service includes a connection manager that notifies all processing elements when a job with a new processing element is submitted. Each processing element dynamically maintains its own connections based on one or more of the following conditions: connection data received from the streams management service, and a behavior change of the processing element. Then the processing element reports connection updates to the connection manager in the streams management service. The connection manager may store updated connection information in the connection data. |
| US10965749B2 |
Dynamic data batching
The present disclosure relates to a network, comprising a switch, a server and a database, and specifically the dynamic batching of data from the switch to the server for uploading to the database according to dynamic feedback received from a monitoring device arranged to obtain operation metrics from at least one of the server device and the database. |
| US10965748B2 |
Creating and using document pedigree data
One embodiment provides a method including storing, in response to an event associated with a file, file identification data and event data for the file; creating, using a processor, a reference between the file, the file identification data, and the event data; and storing, in a catalog, the reference in association with the file; wherein the catalog includes an inter-application reference. Other aspects are described and claimed. |
| US10965747B2 |
Optimization of a multi-channel system using a feedback loop
Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium, including a system that controls content distribution using a feedback loop. Content is distributed over multiple different online channels using a same initial selection value for distribution over each different online channel. An observed user actions required for distribution of the content over the multiple different online channels is received through a feedback loop and for multiple different distributions of the content. Based on the observed user actions received through the feedback loop, a predicted user action rate is determined for the multiple different distributions across the multiple different online channels. The selection value is adjusted based on a difference between the predicted user action rate and a reference distribution amount specified by a provider of the content. The content is distributed over the multiple different online channels using the adjusted selection value. |
| US10965746B2 |
Determining presence in an application accessing shared and synchronized content
A device collects presence information and other interaction information from an application viewing a content item synchronized with a content management system. The interaction information indicates interactions of a device with respect to a content item, and includes presence information obtained from a native application such as whether the content item is being viewed by the user on a user interface element or the user interface element is modifying the content item. A presence management module receives presence events indicating possible change of presence with respect to a user interface window associated with a process and a synchronized content item. Such presence events include a change in focus of a user interface element indicating that a user is viewing the content item, and changes to a content item indicating a user is editing the content item. |
| US10965742B2 |
Migration project automation, e.g., automated selling, planning, migration and configuration of email systems
Technology is generally described for automating the project management and execution of data migration from a source email system to a destination email system. In some examples, the technology can include receiving a domain name of a second computing system; obtaining domain name system (DNS) records for the received domain name; determining an email hosting provider for the second computing system; determining, by the processor, based on the obtained DNS records, an email system service type of the source email system on the second computing system; discovering mailboxes and message delivery rules of the source email system; displaying customization options for migrating discovered source email system mailboxes; migrating data items from the source email system to the destination email system; and managing migration of data from source email system client computing devices to the destination email system. |
| US10965740B2 |
Method and device for automatically managing network
The present invention is a method for allowing a network system to automatically perform a configuration of a network management server without user intervention, and a method for allowing a load distribution device to manage the network management server comprises the steps of: receiving information indicating that a new base station is added to a network; transmitting the information on the new base station to at least one network management server; receiving processing time information on the new base station from the at least one network management server; and determining a network management server to which the new base station is to be allocated, on the basis of the processing time information. |
| US10965734B2 |
Data management for an application with multiple operation modes
A method and system for managing an application with multiple modes are described. A device manager that manages a mobile device may monitor the mobile device. The device manager may detect that a first type of application that runs in a managed mode (or in multiple managed modes) and an unmanaged mode is installed on the mobile device. When the application is executed on the device, the application executes in accordance with the selected application mode, e.g., based on location, user, role, industry presence, or other predefined context. |
| US10965732B2 |
Streaming zip
A system is described to create and transmit a streamable ZIP file container. The streamable ZIP file container contains stream metadata, files, and a central directory. The stream metadata, files, and central directory can be saved in a contiguous stream without any intervening bytes. When the streamable ZIP file container is read by a client device that supports streamable ZIP file containers, the client device can exit the data stream without receiving the central directory. Interruptions during transmission of the ZIP file container can be resumed. |
| US10965731B2 |
Transfer device, client apparatus, server apparatus, reproduction apparatus and transfer method
A technology is disclosed by which, when plural content data are successively transmitted from a server apparatus to a reproduction apparatus through a client apparatus, if the transmission is interrupted, the transmission of the content data can be resumed from the point at which the transmission is interrupted. The transfer device includes a storage section for storing a transmission object list including content identification information corresponding to plural content data to be transmitted from a server apparatus to a reproduction apparatus connected to a client apparatus through the client apparatus. A reception section successively receives the content data from the server apparatus. A transmission section successively transfers the successively received content data to the reproduction apparatus. A control section deletes, every time content data is transferred, the corresponding content identification information from the transmission object list stored in the storage section. |
| US10965728B2 |
Method and system for aggregating and converting sensor data streams
A method and system of aggregating and converting data in a vehicle network is provided. An example method includes receiving a plurality of streams of sensor data over two or more Camera Serial Interface (CSI). The method further includes rearranging the plurality of streams of sensor data into an aggregate stream. The method further includes packetizing the aggregate stream by arranging transmission format bits at appropriate bit positions of the aggregate stream to form a packet data stream. The method further includes transmitting the packet data stream over a vehicle on-board packet data link. |
| US10965723B2 |
Instantaneous call sessions over a communications application
In one embodiment, a method includes determining, by a computer server machine, that a callee-user is available for a communication session based on location information associated with a client system of the callee-user; sending, by the computer server machine, in response to determining that the callee-user is available, a notification to a client system of a caller-user indicating that the callee-user is available; receiving, by the computer server machine, a request from the client system of the caller-user to initiate the communication session; establishing, by the computer server machine, the communication session to enable a media stream comprising media captured at the client system of the caller-user to be received at the client system of a callee-user; and sending, by the computer server machine, the media captured at the client system of the caller-user to the client system of the callee-user. |
| US10965722B1 |
Local area network architecture for supporting multiple IP services
A network device receives an indication to establish a session for an internet protocol (IP) service between a first device and a second device, wherein the network device is part of a local network with the first device and another network device. The network device identifies a service tag to include in a service tag field of a session request. The other network device causes the session request that includes an updated service tag to be provided to the second device. The second device provides a session response with the service tag to the other network device, the other network device updates the session response to include the original service tag and provides an updated session response to the network device. The network device causes the session to be established. |
| US10965720B2 |
System for establishing a shared media session for one or more client devices
A system is provided for establishing a shared media session for one or more client devices. One or more processors in the system are configured to establish a shared media session that includes a disparate live media output stream scheduled by a first client device to start at a defined timestamp, and played back on one of the first client device or a plurality of client devices that join the shared media session through a distributed communication network. A persistent record of event data and media, synchronized based on one or more criteria and received from a recording client device, is generated corresponding to the shared media session and previous shared media sessions until the shared media session is terminated by at least one of the first client device or by abandonment of the distributed communication network by the plurality of client devices. |
| US10965718B2 |
Method for providing wireless application privilege management
A method for providing an administration policy to a user device comprising a plurality of applications, the method comprising centrally generating the administration policy to be implemented in the user device, the administration policy comprising at least one of an application administration policy to be used by at least one of the plurality of applications and a client administration policy for the user device; and providing the generated policy to the user device. |
| US10965714B2 |
Policy enforcement system
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing, by a policy enforcement system, a plurality of policies and data associating a plurality of user credentials with the plurality of policies; receiving, from a client device, a request for data from a file system, the request further comprising user credentials; forwarding the request for data to a second node that stores the data from the file system; receiving, from the node, the data from the file system; selecting from the plurality of policies, based on the received user credentials and the data associating the plurality of user credentials with the plurality of policies, one or more policies that correspond to the received user credentials; filtering, by the policy enforcement system, the data from the file system based on the one or more policies; and sending the filtered data to the client device. |
| US10965710B1 |
Dynamic pin configurator
A method and apparatus to protect the coded signals sent over physical twisted-pair wiring or between two (2) or more LANs connected by a Wide Area Network (WAN), from unauthorized electronic circuit/wiring monitoring. This is accomplished by varying the assignments of the standard Registered Jack communication pins, varying the transmission speed, inserting meaningless or unrelated data, encrypting data before it is sent or changing network protocol(s) on behalf of the communications adapter/controller of each computer to which it is attached on those LANs. |
| US10965708B2 |
Systems and methods for machine learning based application security testing
Discloses are systems, methods and computer readable mediums for automated verifications of potential vulnerabilities of one or more sites or code utilizing one or more neural networks. The systems, methods and computer readable mediums can transmit one or more scan operations to one or more sites, receive one or more responses to the one or more scan operations, tokenize the one or more responses, transmit to one or more neural networks the one or more tokenized responses, receive from the one or more neural networks verification of the one or more tokenized responses, and determine one or more confidences of the one or more verified responses. |
| US10965706B2 |
Cybersecurity system
A computing device determines a peer group identifier and supplements netflow records with the peer group identifier. An authentication event block object is received that was sent to a first source window. The authentication event block object includes a user identifier, an IP address, and a peer group identifier. Members of the peer group are identified based on an expected network activity behavior. The user identifier and the peer group identifier are stored in association with the IP address in a cache. A netflow event block object sent to the first source window is received that includes a netflow packet IP address. Netflow data is parsed from the netflow event block object into a netflow record. When the stored IP address matches the netflow packet IP address, the netflow record is supplemented with the user identifier and the peer group identifier. The supplemented netflow record is output to summary data. |
| US10965705B2 |
Systems, methods, user interfaces, and computer-readable media for investigating potential malicious communications
A data analysis system receives potentially undesirable electronic communications and automatically groups them in computationally-efficient data clusters, automatically analyze those data clusters, automatically tags and groups those data clusters, and provides results of the automated analysis and grouping in an optimized way to an analyst. The automated analysis of the data clusters may include an automated application of various criteria or rules so as to generate an ordered display of the groups of related data clusters such that the analyst may quickly and efficiently evaluate the groups of data clusters. In particular, the groups of data clusters may be dynamically re-grouped and/or filtered in an interactive user interface so as to enable an analyst to quickly navigate among information associated with various groups of data clusters and efficiently evaluate those data clusters. |
| US10965703B2 |
Threat mitigation system and method
A computer-implemented method, computer program product and computing system for: utilizing artificial intelligence/machine learning to define a training routine for a specific attack of a computing platform; and generating a simulation of the specific attack by executing the training routine within a controlled test environment. |
| US10965702B2 |
Detecting injection attacks using passive network monitoring
Embodiments are directed to monitoring network traffic using network monitoring computers (NMCs). NMCs may determine requests provided to a server based on a first portion of network traffic. NMCs may determine suspicious requests based on characteristics of the provided requests. NMCs may employ the characteristics of the suspicious requests to provide correlation information that is associated with the suspicious requests. NMCs may determine dependent actions associated with the server based on a second portion of the network traffic and the correlation information. And, in response to determining anomalous activity associated with the evaluation of the dependent actions, NMCs may provide reports associated with the anomalous activity. |
| US10965699B2 |
Detecting anomalous network behavior
Approaches provide for monitoring attempted network activity such as network port connections and corresponding payloads of network data obtained by a network device and, based on the attempted connections and/or payloads, identifying malicious network activity in real time. For example, network activity obtained from a plurality of network devices in a service provider environment can be monitored to attempt to detect compliance with appropriate standards and/or any of a variety of resource usage guidelines (e.g., network behavioral standards or other such rules, guidelines, or network behavior tests) based at least in part on network port connection activity with respect to at least one network device. If it is determined that network activity is not in compliance with the usage guidelines, or other such network behavior test, the system can take one or more remedial actions, which can include generating a notification identifying the malicious network activity. |
| US10965696B1 |
Evaluation of anomaly detection algorithms using impersonation data derived from user data
Techniques are provided for evaluating anomaly detection algorithms using impersonation data derived from user transaction data. An exemplary method comprises obtaining transaction data of a given enterprise organization comprising transactions of a plurality of users; generating impersonation data by modifying one or more features of a subset of the transaction data of the given enterprise organization; classifying (i) at least a portion of the transaction data of the given enterprise organization, and (ii) at least a portion of the impersonation data using the anomaly detection algorithm of the given enterprise organization, wherein records of the impersonation data comprise a known classification; and evaluating a performance of the anomaly detection algorithm of the given enterprise organization by comparing the classification of records of the impersonation data by the anomaly detection algorithm with the known classification. |
| US10965693B2 |
Method and system for detecting movement of malware and other potential threats
Methods and systems, including devices, which allow for the rapid detection of malware and other threats, such as malicious intrusions and attacks, are disclosed. These methods and systems, including devices, detect malware and other threats by detecting and analyzing lateral movement of the malware and other threats, once having entered a network, such as an enterprise network. |
| US10965692B2 |
System for processing queries using an interactive agent server
A system for processing queries is disclosed. The system is configured to receive a query from a user, the query comprising a message indicating a request for a service. The system then performs natural language processing on the query, and identifies keywords of the query based on the natural language processing. Based on the identified keywords, the system determines an action and an actionable item from the query. Then, the system generates an acknowledgement request for the query based on the determined action and actionable item, and sends the acknowledgement request to the user. After receiving an acknowledgement from the user on the acknowledgement request, the system sends the determined action and actionable item to an upstream server to request the service. |
| US10965691B1 |
Systems and methods for establishing sender-level trust in communications using sender-recipient pair data
Systems and methods are disclosed for utilizing sender-recipient pair data to establish sender-level trust in future communication. One method comprises receiving raw communication data over a network and testing the received raw communication data against trained machine learning data to predict whether the raw communication data is associated with expected communication data. The raw communication data is sorted for expected communication data, which is further analyzed for sender-recipient pair data and assigned an expected communication pair data score. Senders associated with an expected communication pair data score that meets or exceeds a threshold are labeled and stored in a database as trusted. As a result of the sender-recipient pair analysis, recipients at-risk for being scammed can be identified, senders misidentified as spammers can be properly classified, and machine learning techniques utilized for analyzing raw communication data can be fine-tuned. |
| US10965690B2 |
Method for managing the status of a connected device
This invention relates to a method for managing the status of a connected device by publishing assertions in an immutable distributed database composed of a plurality of compute nodes, a pair of keys comprising a public key and a private key being associated with the connected device. The method comprises the steps of: receiving from a first terminal associated to a first user an instruction message; verifying that the first user is allowed to modify the status of the connected device; sending an assertion request to the immutable distributed database for publishing an assertion comprising the status information. |
| US10965686B1 |
System and method of managing privilege escalation in cloud computing environments
Systems and methods of identifying over-privileged access in a computing system are disclosed. The method includes receiving configuration information for the computing system, selecting an identity that can access the computing system and determining access privileges for the selected identity using at least the received configuration information, the access privileges identifying one or more computing resource or service accessible to the selected identity, determining at least one role assumable by the identified one or more computing resource or service accessible to the selected identity, and determining whether the identified one or more computing resource or service accessible to the selected identity can elevate its privileges. In a case where it is determined that the identified one or more computing resource or service accessible to the selected identity can elevate its privileges, the method provides notification that the identity has over-privileged access to the computing system. |
| US10965678B2 |
Rolling security platform
A method of rolling security for a system that includes multiple server groups, such as a first server group of one or more servers and a second server group of one or more servers. The method includes repeatedly initiating rebuilding of the first server group of one or more servers. The method also includes repeatedly initiating rebuilding of the second server group of one or more servers. The rebuilding of the first server group of one or more servers is staggered in time from the rebuilding of the second server group of one or more servers. The servers may be physical servers or virtual machines. Rolling security may also be applied to software containers, computing devices within a data center, and computing devices outside of a datacenter. |
| US10965670B2 |
Biometric signature authentication and centralized storage system
A biometric authentication system may include a centralized database including stored biometric signature information for authenticating a user of one or more external systems. The biometric authentication system may extract data attributes from a biometric signature of the user and compare them to the stored biometric signature information in the database. The biometric authentication system may identify user identifier information associated with a signature key stored of the stored biometric signature information that matches the data attributes to authenticate the user to access secure information. |
| US10965665B1 |
Passwordless privilege access
Systems and methods for network security are provided. Various embodiments of the present technology provide systems and methods for an identity security gateway agent that provides for privileged access. Embodiments include a system and method that uses a single sign-on (SSO) (or similar) mechanism to facilitate a user accessing web-based service providers, but separates the assertion and entire SSO process from the user credential. |
| US10965664B2 |
Single sign-on for unmanaged mobile devices
Disclosed are various examples for providing a single sign-on experience for mobile applications that may or may not be managed. A first application executed in a client device sends an access request to a service provider. The first application receives a redirection response from the service provider that redirects the first application to an identity provider. The first application then receives a further redirection response from the identity provider that causes the first application to request an identity assertion from a second application executed in the client device. The first application receives the identity assertion from the second application. The first authentication then authenticates with the service provider using the identity assertion. |
| US10965660B2 |
Communication between a communication device and a network device
A communication device of a communication network receives, via a network, a challenge, generates a first Diffie Hellman, DH, parameter, a first verification code for the first DH parameter, forwards the challenge or a derivative thereof to an identity module, receives at least one result parameter as response from the identity module, determines, based on the result parameter, whether the first DH parameter is authentic, and if the first DH parameter is authentic, generates and sends a second DH parameter to the network device for session key generation based on the first DH parameter and the second DH parameter. |
| US10965655B2 |
Multiple PDN connections over untrusted WLAN access
Embodiments of this invention relate to methods and apparatus for establishing additional simultaneous packet data network (PDN) connections between a User Equipment (UE) and an evolved packet core network (EPC) over an untrusted WiFi network. The UE is attached to the EPC through a security gateway over a first PDN connection over which the UE is authenticated and has established an Internet Key Exchange Security Association (IKE SA) and a first Internet Protocol Security SA (IPSec SA). The UE then establishes an additional PDN connection using a new IKE request/response exchange or an enhanced IKE CREATE_CHILD_SA exchange that is cryptographically protected using algorithms and keys negotiated during the first PDN connection, hence improving delay and battery life of the UE as the UE no longer needs, for each additional PDN connection, to negotiate an individual IKE SA and to authenticate the UE. |
| US10965651B2 |
Secure domain name system to support a private communication service
Described herein are systems, methods, and software to enhance secure communications between computing systems. In one implementation, a private domain name system (DNS) receives a DNS lookup request from a computing system of a plurality of computing systems associated with a private communication group, and forwards the DNS lookup request to a public DNS. The private DNS further receives a public address associated with the DNS lookup request from the public DNS, translates the public address to a private address, and transfers the private address to the requesting computing system. |
| US10965650B2 |
Indicating channel usage in wireless network
This document discloses a solution for providing channel usage information. In an embodiment, an apparatus managing a wireless network and being in an unassociated state towards an access node managing another wireless network is provided with the channel usage information. The channel usage information is provided together with a further information element enabling the apparatus to verify that the channel usage information originates from a trusted source. |
| US10965649B2 |
Persistent data communication sessions across WAN
Instead of specifying actual transport layer IP addresses as a basis for a secure tunnel's security association, an approach described herein specifies virtual addresses. Then suitable network appliances intercept and modify packets in order to map between the virtual addresses and actual addresses. The virtual addresses satisfy IPsec or another authentication procedure that checks packets using the security association. The actual addresses are used by transport layer protocols. This overlay approach permits a session to failover from one network connection to another without requiring restoration of the session in a newly created secure tunnel after one of the network interfaces becomes unavailable, thereby obsoleting the security association based in part on the IP address of the now unavailable interface. This innovative approach also allows the use of parallel paths and the use of one-to-many or many-to-one path topologies, which would otherwise not be permitted. |
| US10965647B2 |
Efficient matching of feature-rich security policy with dynamic content
A method for filtering data packets at a firewall system is disclosed that includes receiving a data packet having a plurality of fields at a processor. Determining with the processor whether a precondition exists for one or more of the plurality of fields, where an action is associated with the precondition. Performing the action associated with the precondition on the data packet with the processor if it is determined that the precondition exists for one or more of the plurality of fields. Processing the data packet using a plurality of rules with the processor if it is determined that the precondition does not exist for the one or more of the plurality of fields. |
| US10965643B2 |
Access point name management
A computer device may include a memory configured to store instructions and a processor configured to execute the instructions to select to use an access point name (APN) table to be received from a wireless access network and attach to the wireless access network. The processor may be further configured to execute the instructions to receive a Protocol Configuration Options (PCO) message from the wireless access network; retrieve the APN table from the received PCO message; select an APN from the retrieved APN table; and connect to a packet data network associated with the selected APN via the wireless access network using the selected APN. |
| US10965641B2 |
Live virtual machine migration utilizing network address pools
Aspects of the disclosure provide for mechanisms for live virtual machine migration. A method of the disclosure includes: performing, by a processing device, at least one operation to migrate a virtual machine from a source computer system to a destination computer system, wherein the virtual machine is associated with a first network address; assigning, to the virtual machine, a second network address from a pool of network addresses, wherein the pool of network addresses is associated with a destination hypervisor running on the destination computer system; receiving, from a source hypervisor running on the source computer system, a data packet directed to the first network address and forwarded to the destination hypervisor using the second network address; and forwarding, by the destination hypervisor, the data packet to the virtual machine. |
| US10965640B2 |
Configuration of an M2M device
There is provided mechanisms for configuring a message brokering service address in an M2M device. A method is performed by a gateway. The method comprises sending a request to a DHCP server for configuration. The method comprises receiving a response from the DHCP server comprising at least address information assigned to the gateway. The method comprises receiving an MQTT_BROKER_URI representing the message brokering service address from a node. |
| US10965637B1 |
Duplicate address detection for ranges of global IP addresses
An example network device determines to assign a number of global Internet protocol (IP) addresses to respective network interfaces, determines a subnetwork for the network interfaces, determines a prefix corresponding to the subnetwork, determines a first global IP address having the prefix, determines a range value that is equal to or greater than the number of global IP addresses, generates a message according to Duplicate Address Detection Protocol (DAD) including data indicating that the message includes a range of addresses, the data further indicating the first global IP address and the range value, and sends the message according to DAD to one or more host network devices to determine whether any global IP address in a range starting with the first global IP address and through the range value is in use by the one or more host network devices. |
| US10965636B2 |
Message processing method and apparatus
A message processing method and apparatus The method includes determining an importance level of each application on a terminal according to a historical use feature of the respective application, determining a notification manner of a notification message of each application according to the importance level for the respective application, and displaying, when receiving a notification message, the notification message according to the notification manner corresponding to the application to which the notification message belongs. |
| US10965630B2 |
Enhanced data sharing to and between mobile device users
A method of enhancing data sharing between mobile or other computing device users includes receiving a submission request generated by user interaction with a first user interface on a first computing device, the submission request including content and associated submission data indicative of a recipient of the content, and updating a second user interface on a second computing device associated with the recipient to make the content available for display. The method may include sending a push notification to the second computing device indicating that the content is available for display for a period of time. |
| US10965629B1 |
Method for generating imitated mobile messages on a chat writer server
A method for an automated chatwriter implemented on a chatwriter server is provided. A chatwriter application is provided to create an imitation of a real device chat displaying personal's emotions during the chatting process in an instant messaging software modules. The chatwriter can be used in a movie industry to simplify the process of chatting between users and to maintain a “real-life” chat effect. It can be used as a story telling tool that can generate a content in order to fulfill social needs of the users. The chat content can be created in advance and the selected chat can be displayed at any time. |
| US10965628B2 |
Dynamic customized electronic message content generation
Discussed herein are dynamically generated, customized electronic messages based on, for example, data representing attributes of an electronic message to be generated for an intended recipient; and, in response to receiving the data, sending custom content triggering data based on the attributes, where the custom content triggering data represent at least a dynamic portion of customized content to be added subsequently into the electronic message while the electronic message is rendered for display to the intended recipient; generating the electronic message content, which includes the custom content triggering data; and sending the electronic message to the intended recipient; and, in response to receiving the custom content triggering data, determining attributes of the electronic message based on the custom content triggering data; and generating the dynamic portion of customized content based on the electronic message attributes. |
| US10965620B2 |
Multi-destination packet redaction
Presented herein are techniques for redacting mirrored network packets prior to providing the mirrored packets to an intended recipient application, such as a third-party analysis application. More specifically, a multi-destination packet redaction device obtains mirrored network traffic that comprises one or more mirrored network packets. The multi-destination packet redaction device filters the mirrored network traffic to determine an intended recipient application of the one or more mirrored network packets and applies a redaction process to redact one or more portions of at least one of the one or more mirrored network packets. The redaction process is customized based on one or more attributes of the intended recipient application. |
| US10965619B2 |
System and method for supporting node role attributes in a high performance computing environment
System and method for supporting node role attributes in a high performance computing environment. In accordance with an embodiment, a node role attribute can comprise a vendor defined subnet management attribute. When a subnet manager attempts to discover a high performance computing environment, such as an InfiniBand subnet, or a switch topology, identifying a topology is quite complex when subnet manager can only observe connectivity, without context behind the connectivity (the roles of the different nodes in the connectivity). However, when a subnet has a node role attribute enabled, the subnet manager can map the interconnect more effectively as it can discover not only the connectivity during the initial sweep, but it can also discover the role of each node discovered, thus leading to a more efficient interconnect discovery. |
| US10965614B2 |
Negotiating quality of service for data flows
A method of allocating resources in a network for the transmission of a data flow is disclosed. The method involves receiving a query specifying one or more quality-of-service (QoS) requirements for the data flow and identifying, based on the specified QoS requirements, one or more QoS models from a set of stored QoS models, each QoS model defining a class of service available in the network. A query response specifying the identified QoS models is transmitted. Subsequently, a reservation request is received specifying at least one of the identified QoS models. Resources are allocated in the network for the data flow based on the at least one QoS model specified in the reservation request. |
| US10965612B2 |
Access management system with a resource-ownership policy manager
Methods, systems, and computer storage media for providing access to computing environments are provided. Based on a resource-ownership policy manager (i.e., a self-service engine and a runtime policy evaluation engine) that provides resource-ownership policy operations executed to apply a resource owner's policies only on resource owned by the resource owner. In operation, at runtime, a first resource instance is identified and an entity is determined to be the resource owner of the first policy and first resource instance. The first policy is applied to the first resource instance because the entity owns both the first policy and the first resource instance. A second resource instance is identified and the entity is determined not to be the resource owner of the second resource instance. A second resource policy of the entity is not applied to the second resource instance because the entity is not the owner of the second resource instance. |
| US10965607B2 |
Arbitration of competing flows
In one embodiment, a gateway includes a memory, and a processor to, in response to receiving a plurality of content requests, generate a plurality of network flows and flow buffers, each one content request of the plurality of content requests being served by one network flow of the plurality of network flows, and one flow buffer of the plurality of flow buffers, the one flow buffer being included in the memory, the plurality of network flows including a first flow and a second flow, the first flow serving one of the plurality of requests having a first priority level, the second flow serving one of the plurality of requests having a second priority level, the first priority level being higher than the second priority level, and run a network arbiter to give prioritize reading the first flow over reading the second flow when the first flow is non-idle. |
| US10965606B2 |
System and method for dynamic queue management using queue protocols
A system and method for efficiently processing and managing data stored in a queue. A processing device may process the data stored in the queue. Queue protocols can be applied to the queue to efficiently process and manage data stored in the queue. Queue protocols may facilitate efficient use of processing resources that process the data stored in one or more queues. A queue protocol may include at least a first protocol for facilitating transfer of data in the queue to another queue processed by another processing device or a second protocol for inhibiting transfer of data in the queue to another queue. |
| US10965605B2 |
Communication system, communication control method, and communication apparatus
A communication system, comprising: a communication apparatus controlling transmission and reception of data in a network connecting a server and a user terminal; and a management apparatus, the network including an edge apparatus, the communication apparatus including a relay unit which has a queue for each communication flow, and controls the transmission and reception of data using the queue, the management apparatus including a monitoring unit which identifies a communication flow where data loss has occurred, calculates modifications for settings for communication control used for a queue corresponding to the identified communication flow, and transmits to the communication apparatus a modification command including the modifications, and the relay unit modifies settings for communication control using the queue corresponding to the identified communication flow on the basis of the modifications included in the modification command. |
| US10965602B2 |
Software assisted hashing to improve distribution of a load balancer
Examples include a computing system having a load balancer circuitry to assign data units to destinations using a hash function having a plurality of hash bins, each hash bin being associated with a destination. The computing system includes a hash adjuster to assign a destination to each of the plurality of hash bins, sample assignment of data units to hash bins by the load balancer circuitry over a sample window, analyze the sampled assignments, and reassign destinations to the hash bins based at least in part on the analyzed sampled assignments. This results in increased system performance in processing of the data units by the load balancer. |
| US10965599B2 |
Methods and arrangements for end-point mobility of a traffic engineering tunnel of a multi-domain network
It is disclosed a coordinator (22), a physical network controller (24, 26) and methods therein for enabling end-point mobility of a traffic engineering, TE, tunnel in a multi-domain network. Based on a request for virtual network configuration of one or both of the ingress and the egress end-points of the TE tunnel, the coordinator of a multi-domain network determines 54, S416 a second request for virtualizing said one or both of the ingress and the egress end-points of the TE tunnel. The physical network controller may then virtualize end-points of the TE tunnel, providing a virtualized end-point, VEP, TE tunnel, having end-point mobility capacity. Recovery mechanisms of tunnel paths may be efficiently implemented. The present disclosure also provides scalability improvements and operational expenditure, OPEX, savings, as compared to state of art TE tunnels. |
| US10965598B1 |
Load balancing in a service chain
A method including: storing, in at least one hardware module of a network device having a plurality of ports, attributes for at least one access control list and associated actions that cause network packets received at one of the plurality of ports that match the attributes for the at least one access control list, to be directed into a service chain that includes at least a first application performed by any one of a first plurality of redundant network processing appliance elements connected to another port of the plurality of ports; directing received network packets that match the attributes for the at least one access control list into the service chain; and load balancing network packets among the first plurality of redundant network processing appliance elements for the first application based on the attributes stored in the at least one hardware module of the network device. |
| US10965596B2 |
Hybrid services insertion
In an embodiment, a method is provided. The method includes: storing, in at least one hardware module of a network device having a plurality of ports, attributes for at least one access control list and associated actions that cause network packets received at one of the plurality of ports that match the attributes for the at least one access control list, to be directed into a service chain that includes at least a first network processing application specified according to a port and a second network processing application specified according to an internet protocol (IP) address; and directing a received network packet that matches the attributes for the at least one access control list into the service chain. |
| US10965593B2 |
Optimizations for PE-CE protocol session handling in a multi-homed topology
Apparatuses and methods are provided in which a CE protocol communication session is established, at a first provider edge network device (PE), for customer equipment device (CE) multi-homed to the first PE and one or more second PEs. The first PE is an owner of the CE protocol communication session. The first PE signals to the one or more second PEs an ownership message indicating that the first PE is the owner of the CE protocol communication session. The ownership message includes parameters that enable one or more second PEs to install in their respective forwarding tables a redirect policy to instruct the respective PE to forward packets of this session to the first PE via an overlay segment. The first PE receives the packets of the session via the overlay segment based on the ownership message. |
| US10965591B2 |
System and method for network traffic processing based on federated services and user groups
A system includes a first MODEM configured to generate a first data packet (including a first virtual routing and forwarding (VRF) instance identifier associated with a first service, a first user group, or both) based on a first radio-frequency (RF) signal and a second MODEM configured to generate a second data packet (including a second VRF instance identifier associated with a second service, a second user group, or both) based on a second RF signal. The system includes a network device configured to receive the first data packet, transmit a first packet (including a first header that includes a first indicator associated with a first VRF instance) to a first device via a network, receive the second data packet, and transmit a second packet (including a second header that includes a second indicator associated with a second VRF instance) to a second device via the network. |
| US10965589B2 |
Fast receive re-convergence of multi-pod multi-destination traffic in response to local disruptions
One technique includes receiving, in a first network, a multi-destination packet from a second network, and determining, based on the multi-destination packet, a first multi-destination tree in the first network for forwarding the multi-destination packet. In response to determining that the first multi-destination tree is not rooted on the network device, a second multi-destination tree in the first network is determined, and the multi-destination packet is transmitted using the second multi-destination tree. Another technique includes, upon detecting a first network device joining a network, sending a first indication to a second network device that the first network device is in a state for an amount of time. After the amount of time has elapsed, a second indication that the first network device has exited the state is sent to the second network device. A topology of the network is updated after the first network device has exited the state. |
| US10965583B2 |
Mechanism to preserve weights assigned to nexthops
Embodiments disclosed herein relate to methods and computer-readable mediums for preserving forwarding equivalence class (FEC) hierarchy weights, which may include obtaining a FEC hierarchy; obtaining a target height for the FEC hierarchy; identifying within the FEC hierarchy a FEC node comprising pointers to a plurality of lower level FEC nodes; making a first determination that a height of the FEC node is greater than the target height; obtaining a rebasing factor for the FEC node; and updating weights for the plurality of lower level FEC nodes using the rebasing factor to obtain an updated FEC hierarchy. |
| US10965579B2 |
System and method for interactivity testing of text-based customer communications
A system and method for interactivity testing of text-based customer communications which allows for interactivity testing of different forms of text-based communications with a contact center including two-factor authentication testing, multi-modal communication testing, and load testing. |
| US10965577B2 |
Method and apparatus for data plane to monitor differentiated services code point (DSCP) and explicit congestion notification (ECN)
A method is executed by a network device implementing a session-sender to perform a test to determine whether differentiated services code point (DSCP) and explicit congestion notification (ECN) are modified in a single test session in a forward direction and a reverse direction between the session-sender and a session-reflector, where multiple DSCP and ECN are tested using the single test session. The method includes determining a first initial forward DSCP and ECN, generating a first test packet including the first initial forward DSCP and ECN, and sending the first test packet to the session-reflector in the single test session. The method further includes determining a second initial forward DSCP and ECN, generating a second test packet including the second initial forward DSCP and ECN, and sending the second test packet to the session-reflector in the single test session. |
| US10965576B2 |
Method and apparatus for control plane to configure monitoring of differentiated service code point (DSCP) and explicit congestion notification (ECN)
A method is executed by a network device implementing a control-client to configure a session- sender to perform a test to determine whether differentiated services code point (DSCP) and explicit congestion notification (ECN) are modified in a single test session in a forward direction and a reverse direction between the session-sender and a session-reflector. Multiple DSCP and ECN are tested using the single test session. The method includes receiving a server greeting message from a server including characteristics of the session-reflector, determining whether the session-reflector supports use of multiple DSCP in the single test session, setting a set-up- response message to indicate DSCP and ECN testing, and determining whether the session- reflector supports DSCP and ECN monitoring. The method further includes adding an indicator of DSCP and ECN monitoring in the set-up-response message, in response to a determination that the session-reflector supports DSCP and ECN monitoring, and sending the setup-response message to the server. |
| US10965572B2 |
Data transfer control
Aspects of the disclosure provide effective, efficient, scalable, and convenient technical solutions that address and overcome technical challenges associated with transferring data files in a distributed network having multiple data sources and multiple data destinations. In some examples, a computer system, device, platform, or the like is configured to control the data transfers between other computing systems, devices, platforms, or the like in a computing environment. Controlling the data transfer includes, in some examples, detecting the data transfer between a data source and a data destination, evaluating a data transfer condition associated with the data transfer, determining a data transfer instruction based, at least in part, on the data transfer condition, and providing the data transfer instruction to the data source. The data source then transfers the data to the data destination in accordance with the data transfer instruction. |
| US10965571B2 |
Time interval error determination method and measurement instrument
A clock timing recovery method for determining a clock timing of an input signal is described, wherein the input signal is generated by a signal source, comprising: receiving the input signal; determining signal edges of the input signal based on the received input signal; determining at least a first clock timing model parameter; determining at least one jitter component of the input signal; and determining a clock timing error associated with the at least one jitter component, wherein the clock timing error is determined based on the determined signal edges, the determined first clock timing model parameter and the determined jitter component. Moreover, a measurement instrument is described. |
| US10965570B2 |
Remote control device, system, method, and recording medium for determining a delay setting value
In order to improve a transient response and stability of remote control when a transmission delay varies, a remote control device receives a control result from a control target device, generates control data for performing a feedback control with dead time compensation, based on the control result and a delay setting value, determines the delay setting value, based on a history of a delay amount of transmitted/received data to/from the control target device, transmits the delay setting value, and transmits the control data and a generation time of the control data. And, a delay adjustment device receives control data from a remote control device and storing the control data, receives a delay setting value to be used for dead time compensation in the remote control device, and outputs the control data to a control target, based on the delay setting value and a generation time of the control data. |
| US10965569B2 |
IoT monitoring
The present disclosure involves systems, software, and computer implemented methods for Internet of Things (IoT) end-to-end continuous monitoring. In one example, a method may include transmitting a first message by a first device to a second device in an IoT cloud system, the first message including a first timestamp indicating when the first message is transmitted, receiving a second message by the first device from the second device, the second message including the first timestamp and a second timestamp indicating when the first message was received by the second device, the second message being received at a time indicated by a third timestamp, and monitoring by the first device end-to-end communication between the first device and the second device in the IoT cloud system based on at least one of the first, second, or third timestamps. |
| US10965564B2 |
Devices and methods of using network function virtualization and virtualized resources performance data to improve performance
Devices and methods of providing performance measurements (PMs) for Network Function Virtualization are generally described. A Virtual Network Function (VNF) PM job is scheduled at a VNF and VNF PM data received in response. From the VNF PM data, it is determined that virtualized resource (VR) management may be a cause of poor VNF performance. A VR PM job is scheduled and results in VR PM data. The VR PM and VNF PM data are analyzed to determine whether to increase the VR at the VNF. If an increase is determined, a request for the increase is transmitted from an element manager to a VNF manager or the VNF PM and/or VR PM data are provided to a Network Manager (NM) for the NM to request the increase by a Network Function Virtualization Orchestrator (NFVO). |
| US10965561B2 |
Network security monitoring and correlation system and method of using same
A network security monitoring and correlation system for providing a three-dimensional visualization of network traffic overlaid with security alerts and other relevant discrete data. The system may comprise an application server communicably linked to a client. The server functions to retrieve network traffic metadata and relevant discrete data associated with individual computer hosts and connections in the monitored network, process the network traffic data by building a graph data structure, and then embedding within the graph data structure one or more layers of additional information about the individual computer hosts and connections derived from the discrete data. The client functions to produce a three-dimensional visualization of the network environment by parsing the graph data structure received from the server and then spawning computer hosts and connections in the 3-D environment. The client will then add the overlay information to the appropriate hosts or connections, with the overlay information preferably being represented within the 3-D environment as a particular color, shape, size, position, or a changing dynamic value. |
| US10965560B2 |
Organizing and storing network communications
Examples relate to organizing and storing network communications. In one example, a programmable hardware processor may: receive a first set of network packets; identify, for each network packet included in the first set, a network flow, each network flow including at least one related packet; store each network packet included in a subset of the first set in a first data storage device; for each network packet included in the subset, organize the network packet according to the network flow identified for the network packet; identify, from the network flows, a set of network flows that each have at least one characteristic of interest; and store, in a second data storage device, each network packet included in each network flow of the set of network flows. |
| US10965557B2 |
Information management method
An information management method collects log information of one or more home electrical apparatuses corresponding to service providers. Display screen data is generated which indicates a status of the log information. The display screen data includes groups of information which each contain information on an apparatus, a service provider corresponding to the apparatus, and log information output from the apparatus. Provision of the log information of each group is individually selectable. The display screen data is provided via a network to a display terminal that performs access to a server device. Information is received from the display terminal, which indicates that selection on whether or not provision of the log information is performed. Provision of the log information is not performed on the selected group when a determination is made that refusal of provision of the log information on the selected group is performed. |
| US10965553B2 |
Scalable unsupervised host clustering based on network metadata
A method for optimizing performance analysis of a plurality of network hosts associated with a communications network includes aggregating captured network performance data including a plurality of captured network performance metrics for a plurality of network flows. Each one of the plurality of network flows is associated with a plurality of network hosts. The aggregated captured network performance data is encoded by employing at least one data modification function. Dimensionality of the encoded captured network performance data is reduced using a neural network model. One or more reduced-dimensional clusters of the encoded captured network performance data are generated. Each of the one or more reduced-dimensional clusters is grouping one or more hosts of the plurality of network hosts based on the captured network performance metrics. |
| US10965551B2 |
Secure count in cloud computing networks
Inducements are provided to customers to regularly connect back to a service provider and report usage that is expressed using a count of requests from a local computing device for cloud-based operations such as packet routing, container instantiation, virtual machine (VM) utilization, calls to a service or application, and the like. The count information is reported within a secure context, such as a trusted execution environment (TEE), using public-private key pair cryptography by which key derivation is dependent on some form of counting. For example, a customer computing device that is subject to a usage license encrypts an operation count and reports it to the service provider. |
| US10965548B2 |
Network operational decision engine
Embodiments of the invention provide systems, computer program products, and methods for a network operational decisional engine (NODE) to allow individual users to set resource distribution constraints on various accounts over a number of different networks. By providing a centralized user interface and storing and tracking user configuration and account data, the invention recognizes and filters resource distribution requests based on operational decisions as specified by users in order to provide increased control over the authorization or denial of resource distribution requests. The NODE provides the ability to proactively control resource distribution constraints before requests for resource distribution are initiated, and allows for tailored operational decisions to be easily implemented based on a wide range of user-defined criteria. |
| US10965545B2 |
Playback device connection
An example playback device includes programming to perform functions including detecting a triggering event that causes the playback device to transmit a first message indicating that the playback device is available for setup. The functions also include receiving a response to the first message that facilitates establishing an initial communication path with a computing device operating on a secure wireless local area network (WLAN), where the initial communication path is outside of the secure WLAN. The functions also include receiving, from the computing device via the initial communication path, a second message containing network configuration parameters for the secure WLAN including an identifier of, and a security key for, the secure WLAN. The functions also include using the network configuration parameters to connect to the secure WLAN and transitioning from communicating with the computing device via the initial communication path to communicating with the computing device via the secure WLAN. |
| US10965544B2 |
Augmented reality for slice management in a telco network
Examples described herein include systems and methods for managing slices in a Telco network by using a graphical user interface (“GUI”) with augmented reality (“AR”). A user device can scan a code that is related to physical hardware in a datacenter. Based on the code, the GUI can display at least one virtual component that resides on that hardware. The user can move the virtual component from one slice to another, such as by dragging it to a displayed slice region. Similarly, the user can drag the virtual component to new physical hardware. This can cause an AR engine to contact an orchestrator to route traffic to the virtual component according to the new slice identifier and new hardware. The GUI can also provide a datacenter map to related physical or virtual components, allowing the user to locate and inspect other hardware relied on by a slice. |
| US10965543B2 |
Prediction of a performance indicator
The present invention relates to a method for predicting a performance indicator for a service in a network. The method is performed by a network node of the network, and the method comprises obtaining measurement data of a metric affecting a service communicating via a radio access network, RAN, node, wherein the metric is independent of the service communicating via the RAN node, inputting the obtained measurement data into a prediction model for performance of the service communicating via the RAN node, wherein the prediction model has been trained with measurement data from the RAN node and measurement data from an end node, and predicting the performance indicator for performance of the service in the network. A network node, a computer program and a computer program product are also presented. |
| US10965542B2 |
Management apparatus, management method and non-transitory computer-readable storage medium for storing management program
A management method includes executing an acquisition process, estimation process, comparison process, and output process. The acquisition process acquires; an actual measurement value of the first traffic, and accesses a memory storing a model for estimation of second traffic in accordance with the first traffic. The estimation process includes obtaining, for each of the plurality of communication apparatuses, an estimation value of the second traffic by inputting the actual measurement value of the first traffic per unit time into the model. The comparison process includes comparing, for each of the communication apparatuses, an estimation value of the second traffic and a given value with each other. The output process includes outputting an alert in accordance with a result of the comparison process. |
| US10965541B2 |
Method and system to proactively determine potential outages in an information technology environment
A method and a system for determining and preventing outages in an IT network by predicting status, utilization, performance, or a combination thereof for IT resources is disclosed. The method includes extracting and classifying data for one or more parameters associated with a plurality of nodes. A set of historical metrics and real-time metrics are used for predicting status score, utilization score, and performance score of IT infrastructure resources. The predictions are compared with a predetermined threshold limit for identifying potential outage in the network. A summary indicating the predictions are displayed to an administrator for preventing and mitigating the potential downtime. |
| US10965536B2 |
Methods and apparatus to insert buffers in a dataflow graph
Disclosed examples to insert buffers in dataflow graphs include: a backedge filter to remove a backedge between a first node and a second node of a dataflow graph, the first node representing a first operation of the dataflow graph, the second node representing a second operation of the dataflow graph; a latency calculator to determine a critical path latency of a critical path of the dataflow graph that includes the first node and the second node, the critical path having a longer latency to completion relative to a second path that terminates at the second node; a latency comparator to compare the critical path latency to a latency sum of a buffer latency and a second path latency, the second path latency corresponding to the second path; and a buffer allocator to insert one or more buffers in the second path based on the comparison performed by the latency comparator. |
| US10965531B2 |
Service offering wish list ordering interface and conflict scheduling calendar system
Systems and methods for a service portal interface including a service offering catalog and conflict scheduling calendar are disclosed. A service offering catalog may make available tangible hardware and infrastructure equipment to employees of an organization via a web-based ordering system. The service offering catalog may also make available non-tangible services to be performed in support of one or more employees of the organization. The conflict calendar scheduling system may provide a graphical conflict detection and resolution interface incorporating calendar style view and drag and drop capability such than an end-user may adjust parameters of a scheduled update to align with other requested work items of an enterprise and result in a conflict free timeslot for maintenance and upgrade tasks. |
| US10965527B2 |
Registering collaborative configuration changes of a network element in a blockchain ledger
Systems and methods for enacting or applying configuration changes (e.g., updates, optimizations) in a network element of a production network are provided. The configuration changes may be proposed and enacted in a collaboration system between artificial intelligence (AI) devices and human-controlled devices. According to one implementation, a system includes a production network having a plurality of network elements and a computer connected to the production network. The computer is configured to request a new configuration update regarding a first network element. The system further includes an electronic ledger configured to store a history of one or more configuration updates that have been previously enacted with respect to the first network element. |
| US10965519B2 |
Exactly-once transaction semantics for fault tolerant FPGA based transaction systems
This disclosure relates generally to methods and systems for providing exactly-once transaction semantics for fault tolerant FPGA based transaction systems. The systems comprise middleware components in a server as well as client end. The server comprises Hosts and FPGAs. The FPGAs control transaction execution (the application processing logic also resides in the FPGA) and provide fault tolerance with high performance by means of a modified TCP implementation. The Hosts buffer and persist transaction records for failure recovery and achieving exactly-once transaction semantics. The monitoring and fault detecting components are distributed across the FPGA's and Hosts. Exactly-once transaction semantics is implemented without sacrificing performance by switching between a high performance mode and a conservative mode depending on component failures. PCIE switches for connectivity between FPGAs and Hosts ensure FPGAs are available even if Hosts fail. When FPGA's provide higher processing elements and memory, the Hosts may be eliminated. |
| US10965518B1 |
Network alert correlation
Technologies are provided for correlating alert messages using correlation domains. Alert messages can be received that are related to computer network components. The alert messages can be partitioned using separate correlation domains and analyzed by separate alert processors. When an alert message is received, it can be analyzed to determine a correlation domain with which the alert message is associated. The alert message can then be correlated with other alert messages associated with the correlation domain, and alert messages that are not associated with the correlation domain can be ignored. Groups of alert messages associated with different correlation domains can be correlated independently by different alert processors. Events generated by an alert processor can include correlation domain information. Events associated with different correlation domains can be handled differently. |
| US10965512B2 |
Method and apparatus using cell-specific and common pilot subcarriers in multi-carrier, multi cell wireless communication networks
A multi-carrier cellular wireless network (400) employs base stations (404) that transmit two different groups of pilot subcarriers: (1) cell-specific pilot subcarriers, which are used by a receiver to extract information unique to each individual cell (402), and (2) common pilots subcarriers, which are designed to possess a set of characteristics common to all the base stations (404) of the system. The design criteria and transmission formats of the cell-specific and common pilot subcarriers are specified to enable a receiver to perform different system functions. The methods and processes can be extended to other systems, such as those with multiple antennas in an individual sector and those where some subcarriers bear common network/system information. |
| US10965510B2 |
Method for receiving NRS and NB-IoT device thereof
One disclosure of the present specification proposes a method for receiving a Narrowband Reference Signal (NRS) by a Narrow band Internet of Things (NB-IoT) device. The method may comprise receiving the NRS on at least one or more orthogonal frequency division multiplexing (OFDM) symbols. The one or more OFDM symbols are in a time division duplex (TDD) subframe. If the TDD subframe corresponds to a TDD special subframe, the one or more OFDM symbols for receiving the NRS is determined based on which TDD special subframe configuration index among a plurality of TDD special configuration indexes is used by the TDD special subframe. |
| US10965508B2 |
Space-time block coding schemes for DFT-s-OFDM
An apparatus and method for transmission of a single-carrier waveform from multiple transmit antennas including both a reference signal and data in a discrete Fourier transform spread orthogonal frequency division multiplexing (DFT-s-OFDM) symbol. |
| US10965507B1 |
Constant envelope barker-modulated WLAN waveform
This disclosure provides methods, apparatuses, wireless nodes, and computer-readable mediums for wireless communications. In one aspect, a method is provide for a Barker-modulated waveform with constant envelope for a wireless local area network (WLAN) signal. A method that may be performed by a transmitter device includes generating a Barker-modulated signal having a constant envelope and transmitting the Barker-modulated signal in a WLAN. |
| US10965505B2 |
Flexible waveform synthesis in NR-SS
Flexible waveform synthesis is disclosed for new radio (NR) shared spectrum (NR-SS) networks. In order to accommodate variable transmission resources, a transmitter may construct an M×N grid to model a resource element (RE) map of transmission resources available to the transmitter within a shared communication channel, where M corresponds to a number of symbols for a scheduled physical signal and N corresponds to a number of tones of a transmission bandwidth for the transmitter. The transmitter may then map the M×N grid to the RE map and puncture one or more REs associated with the subbands unavailable for transmission in the transmission resources. The transmitter may then transmit a transmission according to the unpunctured REs of the RE map. |
| US10965504B2 |
Method for generating a pulse-position-modulated signal, demodulation method and corresponding computer program product and devices
A method for generating a pulse-position-modulated signal. The signal includes a temporal succession of waveforms among Ns waveforms obtained by time shift that is an integer multiple of an elementary time duration Tc. The method includes the following steps executed for a k rank symbol among Ns symbols: obtaining, a set of N modulation coefficients cl(k), a modulation coefficient of index n, cn(k), being expressed as the product of a reference modulation coefficient cn(r) coming from the Fourier series decomposition of a reference waveform associated with a symbol of rank r multiplied by a phase shift term the argument of which is proportional to n; and generating M temporal samples of a k-th waveform carrying the symbol of rank k by Fourier transformation of said set of N modulation coefficients cl(k). |
| US10965503B2 |
Facilitating scrambling of wake-up signal sequences
Aspects directed towards wake-up signal (WUS) scrambling sequence design are disclosed. In one example, a time-based scrambling sequence that facilitates a phase shift in time may be generated according to a time parameter associated with a WUS or a paging occasion (PO). A scrambled WUS may be generated by multiplying a WUS base sequence by the time-based scrambling sequence, and subsequently transmitted to at least one scheduled entity. In another example, a scrambled WUS may be received from a scheduling entity. A time-based scrambling sequence associated with the WUS may be identified in which the time-based scrambling sequence facilitates a phase shift in time and corresponds to a time parameter associated with a WUS or a PO. The WUS may be descrambled according to the time-based scrambling sequence. Other aspects, embodiments, and features are also included. |
| US10965498B2 |
Communication relay apparatus and air-conditioning system
Provided is a communication relay apparatus configured to relay communication between a plurality of segments of a network by a plurality of communication devices including an indoor unit and an outdoor unit connected to one another via the network, the communication relay apparatus including a relay setting unit configured to set a first mode value corresponding to processing of relaying all frames and a second mode value corresponding to processing of relaying a frame on the basis of a destination address of the frame, and a relay determination unit configured to perform processing of relaying the frame in an operation mode corresponding to a relay mode value set by the relay setting unit. |
| US10965493B2 |
On-vehicle communication system, on-vehicle device and communication control method
An on-vehicle communication system is an on-vehicle communication system mounted on a vehicle, comprises: a plurality of on-vehicle devices including a first on-vehicle device and a second on-vehicle device; an acquisition unit that acquires error information concerning an error of data received by the first on-vehicle device from the second on-vehicle device; and a determination unit that performs determination processing of determining whether or not a communication route from the second on-vehicle device to the first on-vehicle device is to be switched to another communication route from the second on-vehicle device to the first on-vehicle device by way of another on-vehicle device based on the error information acquired by the acquisition unit. |
| US10965492B2 |
Method for transmitting data packets, controller and system having a controller
The invention relates to a method for transmitting at least one data packet from a first communication participant via a transfer channel shared with at least one further communication participant, wherein data packets are transmitted by the communication participants according to a Round-Robin method. The method comprises receiving by the first communication participant of at least one data packet from the at least one further communication participant via the shared transfer channel, wherein the further communication participant is configured to transmit data packets of different priority values, and determining a priority value from the data packet assigned to the further communication participant. The method comprises a transmission of the data packet by the first communication participant via the shared transfer channel depending on the priority value. The invention also relates to a controller and a system as well as a motor vehicle. |
| US10965490B2 |
Data service including channel group
A method includes dividing, at a cable modem termination system, a transmit stream into multiple data streams. The multiple data streams include a first data stream and a second data stream. Each of the multiple data streams has a lower bit rate than a bit rate of the transmit stream. The method includes transmitting, via the cable modem termination system, the first data stream over at least a first channel of a group of channels. The method also includes transmitting, via the cable modem termination system, the second data stream over at least a second channel of the group of channels. The group of channels supports traffic to a plurality of destinations. The first channel and the second channel are frequency-division multiplexed channels. |
| US10965488B2 |
System and method for monitoring a property
There are provided systems and methods for monitoring a property using a system of sensor units in one or more premises on the property that can interface with respective utilities entering the premises or being generated by appliances on the premises with a minimal of effort and without requiring modification of the utility's equipment or the appliance. The systems and methods are connectable to a cloud-based monitoring, analytics and notification system via a long range network connection directly from one or more of the sensor units. The system of sensors can also incorporate primary and secondary units with at least one primary unit capable of communicating directly to the cloud-based system/server via a long-range connection with the secondary units sending data to the cloud via the primary unit by communicating at the property via a short-range communication connection. There are also provided various sensor units for specifically monitoring water flow and water leakage, flooding, sump pump operability, levels within water softeners and other fluid containing vessels, electrical power usage, furnace operations, among others as described herein. |
| US10965485B2 |
Agent analysis system, device and method
An agent analysis system includes a terminal product system, a remote diagnosis system (RDS), and an agent analyzer. The terminal product system is supplied with a power source and provided with a current sensor to sense the power source. The RDS is used to transmit at least one control instruction via internet for the terminal product system. They agent analyzer is used to communicate with the terminal product system and the RDS, and configured to measure and analyze the electricity use characteristics of the terminal product system to be transmitted to the RDS; and receive and convert the control instruction from the RDS via internet for the terminal product system. |
| US10965483B2 |
Methods, systems, and media for media content streaming device setup
Systems, methods, and media for setting up a media content streaming device are provided. In some implementations, the systems comprise: a first communication interface that is configured to provide a media output to a media content presentation device; a second communication interface that is configured to transfer data; and a hardware processor that is configured to: retrieve a setup application in response to detecting a connection between the media content streaming device and a user device via the second communication interface; cause the setup application to be launched on the user device; receive, from the user device, information relating to setting up the media content streaming device; set up the media content streaming device based on the received information relating to setting up the media content streaming device; and prompt a user to connect the media content streaming device to the media content presentation device via the second communication interface. |
| US10965482B2 |
Building management system that determines building utilization
A building management system and method that determines space utilization in a building. The building management system comprises room utilization sensors, such as occupancy sensors, a gateway that gathers raw occupancy data records from the occupancy sensors, and at least one processor. Each raw occupancy data record comprises an occupancy state associated with a timestamp. The processor is configured for normalizing the raw occupancy data records into normalized occupancy data records each comprising a time segment and an occupancy state indicating whether for a given time segment a room is occupied. The processor is further configured for structuring the normalized occupancy data records by associating each normalized occupancy data record with a space node corresponding to a room in the building from where the raw occupancy data record was collected and associating each space node with a set of tags, each tag defining a single state from a plurality of states. The processor may further receive a selection of a tag from a user interface, split the normalized occupancy data records along the selected tag's states into sets of normalized occupancy data records, for each split set of occupancy data records, calculate at least one occupancy rate, and display a visualization of space utilization of the building comprising a comparison of the occupancy rates of the selected tag's states. |
| US10965479B2 |
Bearer modification for V2X communications
A vehicle to everything application function (V2X AF) transmits a DIAMETER AA-request command to a policy and charging rule function (PCRF). The DIAMETER AA-request command comprises: an attribute value pairs (AVP) identifying a V2X application, and one of more quality of service (QoS) parameters. The one of more quality of service (QoS) parameters indicate a QoS of a V2X bearer for the V2X application employed by a wireless device. The PCRF decides one or more policy and charging control (PCC) provisions for the QoS provided for the V2X application identified by the AVP. The PCRF transmits a DIAMETER command to a policy charging enforcement function (PCEF). The DIAMETER command comprises the one or more PCC provisions for the QoS. The PCEF enforces the one or more PCC provisions for the QoS on a plurality of packets transmitted via the V2X bearer to the wireless device. |
| US10965475B2 |
Physical unclonable function (PUF) security key generation
Systems and methods of generating a security key for an integrated circuit device include generating a plurality of key bits with a physically unclonable function (PUF) generator. Unstable bits of the plurality of key bits are identified, and a security key is generated based on the plurality of key bits, wherein the security key excludes the identified unstable bits. |
| US10965474B1 |
Modifying security state with highly secured devices
Some embodiments of the invention provide a method for authenticating a security device (e.g., a smart card or other highly secured device) to modify a security state (e.g., unlocking, decrypting, etc.) at a target device (e.g., laptop computers, mobile phones, tablets, etc.). In some embodiments, the security device does not have a volatile storage for storing volatile parameters for the particular device to use to perform the authentication process. The method of some embodiments sends an encrypted challenge to the security device, in which the encrypted challenge can only be decrypted by the security device. The method receives a response and modifies accessibility for the target device when the response is a valid response. The method of some embodiments determines that a response is valid based on the decrypted contents of the response and/or based on a period of time between the issuance of the challenge and the received response. |
| US10965473B2 |
Smart object identification in the digital home
Methods, systems, and devices may be used for assigning names and bootstrapping of security credentials for Smart Objects inside a Digital Home environment. Methods, systems, and devices for identification and security bootstrapping of a smart object within a digital home environment may include automated assignment of a device level ID and security credential for each smart object in the home using a resource directory. |
| US10965467B1 |
Reversible hash generators for pairs of complementary sequences
A first string, having a first string value, that is associated with a sample set of material is received where a second string, having a complementary value relative to the first string value, is also associated with the sample set of material. A reversible hash generator is used to generate a determinative hash using the first string value, where a second hash, corresponding to the second string, is able to be determined directly from the determinative hash and without the reversible hash generator processing the complementary value of the second string. It is determined whether at least one of the first string or the second string is stored in a memory using the determinative hash. |
| US10965466B2 |
Estimable proof-of-work for blockchain
A method for calculating a number of proof-of-work to measure how much work has been done in one block mining, includes the following steps: using a low hash, wherein the low hash value corresponding to a low nonce is not greater than a predetermined target value; using a high hash, wherein the high hash value corresponding to a high nonce is higher than the same target value; and calculating the number of proof-of-work according to the low hash value and the high hash value. The low hash value is the lowest hash value in one block mining. The high hash value is the highest hash value in the same block mining. |
| US10965451B2 |
Authentication method, authentication device, authentication target device and image forming apparatus
An authentication method includes: at a first device, selecting an original key in which a first identifier has a first value and a second identifier has a second value from m original keys and generating an authentication key based on the selected original key and the authentication identifier; at a second device, selecting an authentication key generated from the original key in which the first identifier has the first value and the second identifier has the second value from n authentication keys, generating response data based on challenge data and the authentication key, and notifying the generated response data to the first device; at the first device, generating verification data based on the challenge data and the authentication key, and authenticating the authentication target device by comparing the verification data with the response data. |
| US10965449B2 |
Autonomous secrets management for a key distribution service
Various methods and systems are provided for autonomous secrets management for a key distribution service (“KDS”). A KDS server performs centralized management and distribution of keys for client devices in a distributed computing system, which obviates key management and distribution at the client devices. In operation, a key request is received at a KDS server from a KDS client device. The key request is generated using a data protector and a KDS client component of the KDS client device. The key request is associated with a caller and a security token of the caller. The caller is authenticated at a security token service (STS) based on a security token. An encryption key or decryption key associated with the key request is generated. The encryption key or the decryption key is generated based on an interval-based key derivation scheme. The encryption key or the decryption key is communicated to KDS client. |
| US10965447B1 |
Distributed blockchain-type implementations configured to manage tokenized digital assets and improved electronic wallets, and methods of use thereof
In some embodiments, the present description provides a computer-based system having a dual-exchange cryptographically-secured platform (DECSP); where the DECSP includes: a first-type cryptographically-secured platform (first-type CSP) and a second-type cryptographically-secured platform (second-type CSP); where the first-type CSP includes a first computing device; where the second-type CSP includes a second computing device; where the first computing device is connected to a blockchain and configured to issue crypto-tokens associated with a non-crypto asset, perform blockchain-based activities, and automatically transmit an instruction associated with the non-crypto asset to a second computing device in response to an issuance of the crypto-token by the first computing device; where the second computing device is configured to: receive the instruction associated with the one non-crypto asset from the first computing device and automatically communicate with a non-crypto asset electronic marketplace to execute a transaction associated with the non-crypto asset to obtain a position in the non-crypto asset. |
| US10965443B2 |
Amplitude caching in receive from many communications networks
In various examples there is a communications network comprising a plurality of nodes connected via an interconnection medium to form a receive-from-many communications network. The network has a synchronisation mechanism which synchronizes a signal frequency of the nodes. The network has at least one store holding signal amplitude data of signals previously sent between specified pairs of nodes of the communications network. An amplitude controller uses the stored data to adjust amplitudes of signals communicated between at least one of the pairs of nodes of the communications network. |
| US10965437B2 |
Adaptive timing synchronization for reception for bursty and continuous signals
Receivers, controller units for receivers and related methods are provided. One receiver includes an adjustable sample provider providing samples of an input signal using an adjustable sample timing and a feedback path providing a feedback signal to the adjustable sample provider based on a timing error. The feedback path includes a loop filter providing sample timing information to the adjustable sample provider and a replacement value provider providing a replacement sample timing information replacing the sample timing information when an input signal does not fulfil a predetermined requirement for a feedback-based sample timing adaptation. The replacement value provider provides the replacement sample timing information considering a timing error information over a longer time period when compared to a time period considered by the loop filter for a provision of the sample timing information. |
| US10965432B2 |
Methods and devices operating with fine timing reference signals transmitted occasionally
Methods and devices enable a fine synchronization related to a data transmission on a physical channel. A fine timing reference signal is occasionally transmitted to the data transmission recipient using one of time-frequency resources in a recipient-specific pattern. |
| US10965431B2 |
Apparatus and method for feeding back channel quality information and scheduling apparatus and method using the same in a wireless communication system
An apparatus and method are provided for feeding back channel quality information and performing scheduling using the fed-back channel quality information in a wireless communication system based on Orthogonal Frequency Division Multiple Access (OFDMA). In the OFDMA wireless communication system, forward performance degradation due to a decrease in an amount of reverse channel quality information is reduced, and also an increase in the reverse load due to channel quality information feedback is suppressed. A base station controls power of a physical channel using information fed back from a mobile station. In a method for feeding back channel quality information from the mobile station, sub-band-by-sub-band channel quality information is measured and channel-by-channel quality information of a number of channels is transmitted in order of sub-bands of better channel quality information. Average channel quality information for a total band is measured and transmitted. |
| US10965430B2 |
Method for transmitting HARQ ACK/NACK signal in NB IoT
A disclosure of the present specification provides a method for transmitting a hybrid automatic repeat request (HARQ) ACK/NACK signal in a narrowband Internet of things (NB-IoT) communication. The method may comprise a step of modulating at least one of a first and a second HARQ ACK/NACK signal by two HARQ processes. The step of modulating may comprise a step of mapping at least one of the first and the second HARQ ACK/NACK signal onto a constellation having a quadrature phase shift keying (QPSK) form. The first HARQ ACK/NACK signal may be a signal generated by a first HARQ process for a first downlink data through a first narrowband physical downlink shared channel (NPDSCH). The second HARQ ACK/NACK signal may be a signal generated by a second HARQ process for a second downlink data through a second NPDSCH. |
| US10965428B2 |
Methods and systems for transmission of TCP ACK packets
Methods performed by a User Equipment (UE) are provided for transmission of one or more Transport Control Protocol (TCP) Acknowledgement (ACK) packets including reserving one or more Sequence Numbers (SNs) in at least one of a Packet Data Convergence Protocol (PDCP) SN space or a Radio Link Control (RLC) SN space, allocating the one or more reserved SNs, to the one or more TCP ACK packets, and sending the one or more TCP ACK packets. |
| US10965424B2 |
Uplink control information transmission in autonomous uplink
Methods, systems, and devices for wireless communications are described. One method may include receiving, by a user equipment (UE) from a base station, a resource allocation indicator corresponding to a total number of resource elements to allocate for uplink control information within a resource allocation of a shared data channel. The UE may determine anchor resources within the resource allocation, and determine a plurality of transmission parameters for an autonomous uplink transmission based on the total number of resource elements. The UE may transmit, to the base station, the uplink control information within the anchor resources to indicate the plurality of transmission parameters for the autonomous uplink transmission. |
| US10965422B2 |
Terminal and communication method
In a terminal, an SRS drop control unit drops a portion of partial bands from among a plurality of partial bands in a case where transmission power for reference signals generated using a plurality of sequences having a sequence length that corresponds to a partial band exceeds a threshold value. Furthermore, a radio transmission unit transmits the reference signals by means of the remaining partial bands other than the portion of partial bands that are dropped from among the plurality of partial bands. |
| US10965409B2 |
Communication device, infrastructure equipment and methods
A communications device comprising receiver circuitry, transmitter circuitry and controller circuitry controlling the transmitter circuitry and the receiver circuitry to receive data in accordance with an automatic repeat request (ARQ) type protocol in which the data is received as a plurality of encoded data packets encoded with an error correction code and the transmitter circuitry transmits a feedback signal depending on whether each of the data encoded packets is estimated as having been decoded successfully by the receiver circuitry. The controller circuitry is configured to evaluate a quality measure of each encoded data packet and in response to the evaluated quality measure to transmit an early indication of the feedback signal to the wireless communications network, before the encoded data packet has been decoded by the error correction decoder. |
| US10965408B2 |
Method, network device, and terminal device for transmitting information
Example methods and apparatus for transmitting information are described. One example method includes determining a first hybrid automatic repeat request (HARQ) timing corresponding to a first service of a terminal device by a network device from a plurality of HARQ timings. Indication information is sent by the network device to the terminal device, where the indication information is used to indicate the first HARQ timing. |
| US10965407B2 |
User equipments, base stations and communication methods
A user equipment (UE) is described. The UE receives, from a base station apparatus, a radio resource control message including first information used for configuring a number of repetitions for transmission of a transport block. The UE also receives, from the base station apparatus, a radio resource control message including second information used for configuring a pattern of redundancy version for the repetitions for the transmission of the transport block. The pattern of the redundancy version is any one of a first pattern and a second pattern. The UE also performs, based on the first information and the second information, to the base station apparatus, the repetition for the transmission of the transport block. The same redundancy version used for the repetitions for the transmission for the transport block is a redundancy version “zero.” |
| US10965403B2 |
Gap data collection for low energy devices
A system can include a server and a device having a power source with a limited life span. The server receives data from the device and identifies a gap in the data from the device that indicates that at least a portion of the data from the device is missing. The server uses a gap reconciliation profile associated with the device to control the server to collect the missing data from the device. The server can generate a signal to request the missing data from the device based on the gap reconciliation profile and transmit the signal to the device to collect the missing data based on the gap reconciliation profile. A parameter of the gap reconciliation profile can be used to control generating or transmitting of the signal, which can preserve the limited life span of the power source of the device. |
| US10965402B2 |
Configuring puncture bundles of data for a first service in a transmission of a second service
A transmitting node determines data for a first service will be transmitted during a time period when data for a second service will be transmitted. The data for the first service requires lower latency than the data for the second service and the data for the first service includes an original set of data for the first service and at least one repetition of the original set of data for the first service. The transmitting node adjusts resources consumed by the data for the first service based on available transmission resources. During the time period the transmitting node then transmits the data for the first service using the adjusted resources while data for the second service is transmitted during the time period. |
| US10965401B2 |
Receiver, transmitter, communication network, data signal and method improving a retransmission process in a communication network
Data to be transmitted over a channel from a transmitter to a receiver is encoded to obtain a codeword. The codeword is defined by a plurality of variable nodes associated with a plurality of the check nodes of a bipartite graph representing the code. The codeword is transmitted over the channel such that certain variable nodes are transmitted prior to other variable nodes. The certain variable nodes are associated with a subset of the check nodes of the bipartite graph and define a subcodeword known at the receiver. At the receiver, a decodability of the transmitted codeword is estimated using the subcodeword prior to receiving all variable nodes of the codeword. |
| US10965397B2 |
Transmitting apparatus and interleaving method thereof
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. |
| US10965396B2 |
Receiver for receiving data in a broadcast system using redundancy data
A receiver for receiving data in a broadcast system comprises a broadcast receiver configured to receive, via said broadcast system, a receiver input data stream comprising a plurality of channel symbols represented by constellation points in a constellation diagram. A demodulator demodulates said channel symbols into codewords and a decoder decodes said codewords into output data words. A redundancy unit selects or requests, if demodulation of a channel symbol and/or decoding of a codeword is erroneous or likely to fail, redundancy data for demodulation of future channel symbols and/or decoding of future codewords via a broadband system and a broadband receiver obtains said redundancy data via said broadband system. Said demodulator and/or said decoder is configured to use the obtained redundancy data to demodulate the respective future channel symbols and to decode the respective future codewords, respectively. |
| US10965393B2 |
Systems and methods for dual-band modulation and injection-locking for coherent PON
An optical communication network includes a downstream optical transceiver. The downstream optical transceiver includes at least one coherent optical transmitter configured to transmit a downstream coherent dual-band optical signal having a left-side band portion, a right-side band portion, and a central optical carrier disposed within a guard band between the left-side band portion and the right-side band portion. The network further includes an optical transport medium configured to carry the downstream coherent dual-band optical signal from the downstream optical transceiver. The network further includes at least one modem device operably coupled to the optical transport medium and configured to receive the downstream coherent dual-band optical signal from the optical transport medium. The at least one modem device includes a downstream coherent optical receiver, and a first slave laser injection locked to a frequency of the central optical carrier. |
| US10965390B2 |
Receiver apparatus and method for controlling the access to contents broadcasted via satellite
A receiver apparatus and a method for controlling the access to at least a portion of a content broadcasted via satellite, wherein the receiver apparatus includes a receiver for receiving broadcast signals configured for receiving at least a broadcast signal having at least a content, a receiver for receiving terrestrial signals configured for receiving at least a terrestrial signal, and a processor configured for determining access information on the basis of at least the received terrestrial signal, and allowing or blocking, on the basis of at least the access information, the access to the at least one content of the broadcast signal. |
| US10965389B2 |
OFDM system with reverse link interference estimation
A new method of performing interference estimation to allow the data packets to be efficiently delivered in an OFDM system. The interference estimation is performed on average over each frame for each mobile station individually in both frequency and time domains. Based on the estimated interference, the CIR can be determined by the BTS based on channel response estimates made by the BTS, or by the MS based on channel response estimates made for the uplink assuming a symmetrical channel. Numerical results show that the CIR estimation error could be very small if a sub-channel is considered as the minimum transmission unit. In terms of the aggregate throughput, the interference estimation method can provide a significant gain. |
| US10965387B2 |
Transceiver calibration for large-scale and massive MIMO deployments
A method and apparatus is disclosed herein for wireless transceiver calibration. In one embodiment, the method for relative calibration of multiple transceiver units for their use for joint transmission from groups of transceiver units to at least one other wireless entity, wherein each transceiver unit includes an antenna element, comprises: exchanging pilots using multiple signaling resource slots, using at least two non-overlapping groups of transceiver units; and performing calibration of transceiver units in the first and second groups of transceiver units, including choosing relative calibration parameters to control calibration and using a metric to assess calibration, where the metric is based on at least one combination of calibration parameters and the observations of each transceiver group in at least two groups of transceiver units based the simultaneous pilot broadcast and subsequent reception between transceiver units in pairs of groups of transceiver units. |
| US10965386B1 |
System and method for calibrating antenna array
A system may include a processor and an antenna array including antenna radiating elements. The processor may be configured to: receive first, second, third, and fourth measurement coding matrixes; calculate a reference encoding matrix with coherent signal leakage de-embedded by subtracting the fourth measurement coding matrix from the third measurement coding matrix; calculate a differential encoding matrix providing twice a signal-to-noise ratio by adding the first measurement coding matrix and the second measurement coding matrix; calculate a differential matrix decoded back to conventional Hadamard matrix by subtracting the differential encoding matrix providing twice a signal-to-noise ratio from the reference encoding matrix with coherent signal leakage de-embedded; calculate complex calibration coefficients for the antenna radiating elements by multiplying an inverse Hadamard matrix by the differential matrix decoded back to conventional Hadamard matrix; and program the antenna array with amplitude and phase offsets computed from the complex calibration coefficients. |
| US10965385B1 |
Method of reducing a noise-induced signal drift and test instrument
The present disclosure relates to a method of reducing a noise induced signal drift. The method comprises: receiving an input signal; recording a waveform of the input signal; and determining an antiderivative of the waveform by optimizing a derivative of the antiderivative to be determined and an absolute deviation of the antiderivative to be determined. Further, the present disclosure relates to a test instrument for analyzing an input signal. |
| US10965383B1 |
Zero hold time sampler for low voltage operation
Certain aspects of the present disclosure generally relate to a sampling circuit, such as a sampling circuit for a low-voltage differential signaling (LVDS) serializer/deserializer (SerDes) system. One example sampling circuit generally includes a latching circuit and a plurality of pass-gate transistors. The latching circuit includes differential inputs, differential outputs, a clocked input circuit coupled to the differential inputs, a first cross-coupled circuit coupled to the clocked input circuit, and a second cross-coupled circuit coupled to the first cross-coupled circuit, wherein the first and second cross-coupled circuits are coupled to the differential outputs of the latching circuit. Each pass-gate transistor is coupled between one of the differential inputs of the latching circuit and a corresponding differential input of the sampling circuit. |
| US10965382B1 |
Oscillator for pulse communication with reduced startup latency
An oscillator for use in pulse communication of pulse signals with a startup latency and a pulse oscillation signal (such as for use in a transmitter for OOK pulse communication with pulse modulation). The oscillator includes an LC resonator having a tank impedance, and including a high-side node (Vp), and a low-side node Vn, and having a tank voltage corresponding to [Vp-Vn]. A pulse startup circuit, includes a PMOS transistor with a source connected to a supply voltage VDD, and a drain connected through a resistance R to the Vp node (where R is significantly larger than the tank impedance), and connected to an attenuation capacitance, in parallel with the resistance R. The PMOS control terminal is coupled to receive a kick start pulse to initiate a pulse signal. the oscillator can include high-side and low-side pulse startup circuits. |
| US10965372B2 |
Optical transmission device and spectrum control method
The function of each component of an optical transmission device is as follows. The wavelength selecting means has a means for selecting an optical signal, and a means for outputting a signal after adjusting the signal level. The optical amplifying means amplifies the wavelength multiplexed signal having the adjusted signal level. The measuring means measures the spectrum of the amplified wavelength multiplexed signal. The setting means sets a spectrum shape, which serves as a reference of the wavelength multiplexed signal to be outputted to the transmission line, as output spectrum setting information. The control means compares the measured spectrum with the output spectrum setting information and determines the attenuation amount when adjusting the signal level for each wavelength of the wavelength multiplexed signal in the wavelength selecting means. The wavelength selecting means adjusts the signal level on the basis of the determined attenuation amount. |
| US10965371B2 |
Optical performance monitoring based on fast bit error rate (BER) statistics
A method, transceiver, and system for monitoring performance of a fiber optic-based communication network and, in particular to determining contributing linear and nonlinear noise components, is disclosed. The method includes computing fast bit error rate of a received optical signal at a sampling time interval that is less than or equal to 100 microseconds (μsecs), generating, over a time period, a bit error rate distribution data associated with the computed fast bit error rate, applying statistical measurements to the bit error rate distribution data to extract statistical attribute data of the bit error rate distribution data, processing the extracted statistical attribute data to separately determine nonlinear noise components and linear noise components that contribute to total noise levels, and changing a launch power associated with an optical signal to be transmitted in accordance with separately determined nonlinear noise components and linear noise components. |
| US10965366B2 |
Adaptive channel symbol rate in a satellite system
A method and system are disclosed for adaptive channel adjustments in a satellite communication system. The maximum bandwidth for a traffic carrier used for user communication in a satellite communication system is determined during changing conditions. The maximum bandwidth is then compared to a predetermined bandwidth allocated for the traffic carrier. New transmit parameters are selected to adjust the traffic carrier bandwidth within the allocated bandwidth in order to improve capacity. All transmitters and receivers within the system are subsequently reconfigured to transmit and receive the traffic carrier using the new transmit parameters. |
| US10965364B2 |
Systems and methods for beacon detection infrastructures
A communication system includes an earth station configured to receive a downlink transmission from a satellite and transmit an uplink transmission to the satellite. The communication system further includes a server in operable communication with the earth station, a beacon detector in operable communication with the server, an access point configured to operate within a proximity of the earth station, and a beacon transmitter disposed within close proximity to the access point. The beacon transmitter is configured to transmit a beacon signal to one or more of the server and the beacon detector. The beacon signal uniquely identifies the access point. The server is configured to implement a measurement-based protection scheme with respect to at least one of the downlink transmission and the uplink transmission. |
| US10965363B2 |
Satellite telecommunication system
This disclosure relates to a method in a satellite telecommunications system, and a device for performing the method, the satellite telecommunications system including one or more satellites, wherein the one or more satellites are configured to transmit data via a first plurality of spotbeams, the method including analyzing data relating to the first plurality of spotbeams; identifying a set of spotbeams of the first plurality of spotbeams based on the analysis; assigning a group identifier to each spotbeam of the set of spotbeams; and sending an update message to the one or more satellites associated with each spotbeam of the set of spotbeams, the update message including the group identifier. |
| US10965362B2 |
Positioning method based on time division multiple access, positioning system, and frame structure used therein
A time division multiple access frame structure includes a signal transmission section allocated for transmitting reference signals from a plurality of ground reference stations; a relay section for relaying the transmitted reference signals by a plurality of aeronautical satellite relay stations selected by a central station; and a data transmission section for data transmission of the central station, the plurality of ground reference stations, or the plurality of aeronautical satellite relay stations, wherein the signal transmission section, the relay section, and the data transmission section are time division multiplexed with each other. |
| US10965355B2 |
Precoding matrix index reporting method, communications apparatus, and medium
This application discloses a precoding matrix index (PMI) reporting method, and related communications apparatus and medium. The method includes: determining an rank indicator (RI) and a PMI, where the PMI is used to determine R precoding matrices W1, . . . , WR. An rth precoding matrix Wr in the R precoding matrices satisfies Wr×W1×W2, r, where an lth row of W2, r is obtained by performing DFT transform on an lth row of a matrix V2,rand R is indicated by the RI. The PMI includes first indication information and second indication information. The first indication information includes location index information. The location index information is used to indicate Km,r element locations tr,m,1, . . . , tr,m,Kmj∈{1, . . . , T} on an mth row of V2,r. The second indication information is used to indicate Km,r complex coefficients ar,m,tr,mj at the element locations tr,m,1, . . . , tr,m,kmj on the mth row of V2,r. V2,r is determined based on the Km,r element locations and the Km,r complex coefficients. |
| US10965350B1 |
Electronic device and method
According to one embodiment, an electronic device comprises a first antenna includes first antenna elements on a first planar substrate, a second antenna includes second antenna elements on a second planar substrate, an orientation of the second planar substrate being different from an orientation of the first planar substrate, and a circuit that forms a first beam pattern using the first antenna elements, forms a second beam pattern using the second antenna elements, and forms a first combined beam pattern using some of the first antenna elements and some of the second antenna elements. |
| US10965348B2 |
Uplink user resource allocation for orthogonal time frequency space modulation
A method of reducing peak to average power ratio of uplink transmission includes, assigning a slice of transmission resource to uplink transmission from a user equipment, where all resource elements in the slice have a same Doppler value, mapping data to the slice, performing orthogonal time frequency space transformation to generate time-frequency domain data and processing the time-frequency domain data for transmission. |
| US10965342B2 |
Rotorcraft tail boom health management system
A system for data transfer in a rotorcraft includes a power bus extending from a power source in a main fuselage of the rotorcraft to provide electrical power to electrical loads located in a tail boom section of the rotorcraft, a first power line communication node on the power bus in the tail boom section of the rotorcraft, a second power line communication node on the power bus in the main fuselage of the rotorcraft, and a digital sensor bus connected to the first power line communication node. Information from the digital sensor bus is transmitted to the first power line communication node and across the power bus to the second power line communication node. |
| US10965341B2 |
Communication system, relay device, communication terminal, and base station
Provided is a communication system including a plurality of base stations, a plurality of communication terminals that communicates with one of the plurality of base stations, and a relay device, the relay device including a selection unit that selects a communication terminal to be relayed from among the plurality of communication terminals on the basis of communication quality information received from each of the plurality of communication terminals, and a relay unit that relays communication between the communication terminal selected by the selection unit and the corresponding base station. |
| US10965340B2 |
Transmission medium and communication interfaces and methods for use therewith
Aspects of the subject disclosure may include, for example, a system for receiving first electromagnetic waves via a transmission medium without utilizing an electrical return path, and inducing second electromagnetic waves at an interface of the transmission medium without the electrical return path. In an embodiment, the first and second electromagnetic waves have a non-optical frequency range. Other embodiments are disclosed. |
| US10965338B2 |
Transmitter module, receiver module and data transmission system
A transmitter module for a broadband data transmission system for radio communications, comprising at least one polyphase FFT filter bank and a hopping processor is described. The at least one polyphase FFT filter bank is established as a synthesis polyphase FFT filter bank, wherein the at least one polyphase FFT filter bank comprises several filter units, wherein the transmitter module is configured to receive an input signal comprising a symbol sequence, wherein the transmitter module is configured to generate and transmit a transmission signal based on the received input signal by a frequency hopping technique, and wherein the hopping processor is configured to adjust a transmission frequency of the transmission signal. Moreover, a receiver module for a broadband data transmission system and a data transmission system are described. |
| US10965334B2 |
SAR radiation-free mobile terminal body, SAR radiation-free external communication body and SAR radiation-free mobile terminal
The present invention discloses a SAR radiation-free mobile terminal body, a SAR radiation-free external communication body and a SAR radiation-free mobile terminal. The SAR radiation-free mobile terminal comprises the SAR radiation-free mobile terminal body. The SAR radiation-free external communication body is disposed outside the SAR radiation-free mobile terminal body and is connected with the SAR radiation-free mobile terminal body through optical fibers. The SAR radiation-free external communication body comprises a communication module connecting with a communication base station without affecting the compatibility and normal radiation power of communication equipment; inter-conversion between electric signals and optical signals is realized through a photoelectric conversion module. Signals are transmitted between the SAR radiation-free external communication body and the SAR radiation-free mobile terminal body through optical fibers mainly made from non-metallic materials, so that conduction of microwave radiation is avoided, thus, effectively avoiding the harm of mobile phone radiation to human bodies. |
| US10965329B2 |
Devices and methods for radio frequency front end systems
A wireless device comprising a first antenna and second antenna, a transceiver and a radio frequency front end system electrically coupled between the transceiver and the antennas. The RF front end system includes a first module operable to provide a high band transmit signal to the first antenna, receive a first high band receive signal and a first mid band receive signal from the first antenna. The first high band receive signal has a frequency range greater than that of the first mid band receive signal. The RF front end system further includes a second module operable to provide a mid band transmit signal to the second antenna, receive a second mid band receive signal and a second high band receive signal from the second antenna. The second high band receive signal has a frequency range greater than that of the second mid band receive signal. |
| US10965327B2 |
Terminal and communication method thereof
A terminal includes: a first baseband processor, a second baseband processor, a first radio frequency chip, a second radio frequency chip, a first antenna, a second antenna, a third antenna, and a fourth antenna. The first baseband processor is connected to the first antenna and the second antenna by using the first radio frequency chip. The first radio frequency chip is connected to the first antenna to form a first channel, and is connected to the second antenna to form a second channel. The second baseband processor is connected to the third antenna and the fourth antenna by using the second radio frequency chip. The second radio frequency chip is connected to the third antenna to form a third channel, and is connected to the fourth antenna to form a fourth channel. |
| US10965325B2 |
Communication unit
A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal. |
| US10965318B2 |
LDPC performance improvement using SBE-LBD decoding method and LBD collision reduction
Systems and methods are described for performing Layered Belief LDPC decoding on received Standard Belief LDPC encoded data bursts. In on implementation, a receiver: demodulates a signal, the demodulated signal including a noise corrupted signal derived from a codeword encoded using standard belief LDPC encoding; converts the noise corrupted signal derived from the standard belief LDPC encoded codeword to a noise corrupted signal derived from a layered belief LDPC encoded codeword; and decodes the noise corrupted signal derived from the layered belief LDPC encoded codeword using a layered belief LDPC decoder. In further implementations, systems are described for reducing collisions in Layered Belief LDPC decoders that occur when multiple parity checks need the same soft decision at the same time. In these implementations, elements in an original LBD decoder table are rearranged to increase the distance between elements specifying the same location in a RAM where soft decisions are stored. |
| US10965316B2 |
Parallel Lempel-Ziv compression for highly-parallel computer architectures
One embodiment provides a method comprising receiving an input data stream, partitioning the input data stream into a plurality of data blocks, and compressing the data blocks utilizing a plurality of processor sets. Each processor set is assigned a data block to compress. The processor sets compress in parallel to exploit inter-block parallelism. Each processor set comprises one or more processors that collaborate in compressing an assigned data block to exploit intra-block parallelism. The method further comprises writing a plurality of compressed data blocks resulting from the compressing to a storage device in encoded form. |
| US10965314B2 |
Compensation table compression method, display manufacturing apparatus, and memory
The present invention discloses a compensation table compression method, a display manufacturing apparatus, and a memory. The method includes: obtaining a reference frame compensation table and a current frame compensation table; dividing the reference frame compensation table and the current frame compensation table into a plurality of coding blocks, wherein each coding block is separately processed by using multiple prediction modes to obtain a residual coding block in the corresponding prediction mode; and compressing the residual coding block. By using the above method, the invention can save resources, reduce costs, and improve work efficiency. |
| US10965309B1 |
Digital delta-sigma modulator with dynamically adjustable output frequency band
A delta-sigma modulator (DSM) with non-recursive computation of delta-sigma residues comprising: an input port for receiving a digital input signal; a residue calculation circuit coupled to the input port for calculating delta-sigma residues non-recursively; a DSM output calculation circuit coupled to the output of the residue calculation circuit for generating an output of the DSM; and a second input port for receiving a control signal, wherein the control signal dynamically adjusts an output frequency band of the DSM. |
| US10965301B2 |
Analog-digital converter, solid-state imaging element, and electronic equipment
Included are a loop filter, a quantization circuit section, and a current steering digital-analog conversion section. The quantization circuit section converts a loop filter output into a digital value. The current steering digital-analog conversion section is provided in a feedback loop that feeds back the output of the quantization circuit section to the loop filter. Then, each of the analog-digital converters includes a first input signal current path, a second input signal current path, a first feedback current path, and a second feedback current path. The first input signal current path feeds a first input signal current to an input end of a first stage integrator of the loop filter. The second input signal current path feeds a second input signal current, a current opposite in sign to the first input signal current, to an input end of a second stage integrator of the loop filter. The first feedback current path connects one feedback output end of the current steering digital-analog conversion section to the input end of the first stage integrator of the loop filter. The second feedback current path connects other feedback output end of the current steering digital-analog conversion section to the input end of the second stage integrator of the loop filter. |
| US10965300B1 |
High bandwidth under-sampled successive approximation register analog to digital converter with nonlinearity minimization
Described herein are apparatus and methods for a high bandwidth under-sampled successive approximation register (SAR) analog to digital converter (ADC) (SAR ADC) with non-linearity minimization. A method includes sampling, by a sampling switch triggered by a sampling clock in the SAR ADC, an input signal, determining, by a comparator in the SAR ADC, a value for a bit based on comparing the sampled input signal to a reference signal provided by a reference digital-to-analog (DAC) in the SAR ADC, wherein the input signal and the reference signal propagate through substantially similar input paths, resampling, by the sampling switch, the input signal for each successive bit, determining, by the comparator, a value for each successive bit based on comparing the resampled input signal and a reference signal for each successive bit, and outputting, by a digital controller, a digital result after determining a value for a last bit by the comparator. |
| US10965295B1 |
Integer boundary spur mitigation for fractional PLL frequency synthesizers
A clock generation circuit is disclosed. The clock generation circuit includes a first PLL circuit configured to generate a first output clock based on a first input clock, where the first PLL circuit includes a first feedback divider circuit. The clock generation circuit also includes a second PLL circuit configured to generate a second output clock based on a second input clock, where the second PLL circuit includes a second feedback divider circuit. The first input clock is generated based on the second output clock. |
| US10965294B1 |
Storage cell ring-based time-to-digital converter
In described examples, a storage cell ring includes circularly coupled storage cells. Each storage cell includes a respective capacitor for generating a respective integrated voltage responsive to a respective duration a respective storage cell is selected, a respective thresholding converter for generating a respective thresholded signal for indicating whether the respective integrated voltage has crossed a threshold, and respective selection circuitry configured to generate a respective select signal responsive to select signals generated by a respective adjacent storage cells. The ring is coupled to an analog quantifier for generating a conversion value responsive to the generated respective integrated voltage and a respective select signal. The ring is coupled to a loop counter for generating a loop count value responsive to changes of values of at least some of the respective thresholded signals. The conversion value and the loop count value can comprise a time measurement. |
| US10965292B1 |
Delay-locked loop device and operation method therefor
A DLL device and an operation method for the DLL device are provided. The DLL device includes a delay line, a replica circuit, a phase detector, and a delay controller. The delay line delays an input clock in response to a delay code to provide a delayed clock. The replica circuit generates a feedback clock according to the delayed clock. The phase detector compares the input clock with the feedback clock to generate a delay control signal. The delay controller generates the delay code at a first time point according to the delay control signal based on a control clock and delays a replica delay time length to provide the delay code to the delay line at a second time point. The delay line adjusts the input clock at the second time point. A cycle of the control clock is adjusted to be larger than the replica delay time length. |
| US10965291B2 |
Delay locked loop
A delay locked loop includes a main delay circuit including a plurality of unit delay lines that generate a plurality of internal clocks by delaying an input clock, delay amounts of the plurality of unit delay lines being adjusted in response to code signals; a sub-delay circuit including a plurality of sub-delay lines that generate a plurality of phase clocks by respectively delaying the input clock and the plurality of internal clocks; a phase detector configured to compare phases of the plurality of phase clocks and provide a phase detection signal according to a result of the comparison; and a digital circuit configured to update the code signals corresponding to the plurality of unit delay lines one by one at a time when the phase detection signal is provided to the digital circuit. |
| US10965289B2 |
Metal oxide semiconductor device of an integrated circuit
A MOS device of an IC includes pMOS and nMOS transistors. The MOS device further includes a first Mx layer interconnect extending in a first direction and coupling the pMOS and nMOS transistor drains together, and a second Mx layer interconnect extending in the first direction and coupling the pMOS and nMOS transistor drains together. The first and second Mx layer interconnects are parallel. The MOS device further includes a first Mx+1 layer interconnect extending in a second direction orthogonal to the first direction. The first Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The MOS device further includes a second Mx+1 layer interconnect extending in the second direction. The second Mx+1 layer interconnect is coupled to the first Mx layer interconnect and the second Mx layer interconnect. The second Mx+1 layer interconnect is parallel to the first Mx+1 layer interconnect. |
| US10965285B2 |
Multiple controllers for a capacitive sensing device
A capacitive sensing device can include multiple capacitive sensors. A first device controller is operatively connected to a portion of the capacitive sensors, while a second device controller is operatively connected to another portion of capacitive sensors. A common node or shield can be connected between the first device controller and the second device controller. Charging and discharging events of selected drive lines in the capacitive sensing device and/or of the common node or shield can be synchronized to reduce undesirable effects such as noise and/or to prevent the charging events and the discharging events from overlapping with each other. One or more reference capacitive sensors can be shared by the multiple device controllers. |
| US10965283B2 |
Floating switch and drive circuit thereof
An apparatus can include: a drive circuit for a floating switch having first and second transistors coupled in series, where gate terminals of the first and second transistors are coupled together, and source terminals of the first and second transistors are coupled together; a control circuit coupled to the gate terminals of the first and second transistors, and being configured to control on and off states of the first and second transistors; and a clamp circuit configured to clamp gate-source voltages of the first and second transistors to maintain current switching states of the first and second transistors. |
| US10965279B2 |
Ramp generator for multilevel class-D amplifiers
A multi-level ramp generator comprises three ramp generators. The first ramp generator generates a first ramp signal, comprising a sawtooth voltage waveform with a first common mode voltage and a first peak to peak voltage. The second ramp generator generates a second ramp signal, comprising a sawtooth voltage waveform with a second common mode voltage and a second peak-to-peak voltage. The third ramp generator generates a third ramp signal, comprising a sawtooth voltage waveform with a third common mode voltage and the second peak-to-peak voltage. The second and third ramp signals are in phase with each other and the first ramp signal is 180° out of phase with the second and third ramp signals. In some implementations, each of the first, second, and third ramp generators comprise a respective delay locked loop and a respective voltage controlled oscillator. |
| US10965276B2 |
Low noise charge pump method and apparatus
A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures. |
| US10965272B2 |
Filter with antiresonance frequency correction
A filter comprises a series unit comprising a plurality of series resonators, a shunt unit comprising a plurality of shunt resonators, connected between the plurality of series resonators and a ground, and a correction unit comprising an inductor unit connected between both ends of at least one of a set of series resonators of the plurality of series resonators and a set of shunt resonators of the plurality of shunt resonators, and an impedance unit connected between the inductor unit and a ground. |
| US10965269B2 |
Electronic devices formed in a cavity between substrates and including a via
An electronic device, such as a filter, includes a first substrate having a bottom surface and a top surface, a first side wall of a certain height being formed along a periphery of the bottom surface to surround an electronic circuit disposed on the bottom surface, an external electrode formed on the top surface, the external electrode being connected to the electronic circuit by a via communicating with the bottom surface and a second substrate. The second substrate has a second side wall of a certain height formed along a periphery of a top surface, the second side wall being aligned and bonded with the first side wall to internally form a cavity defined between the bottom surface of the first substrate, the top surface of the second substrate, the first side wall, and the second side wall. |
| US10965264B2 |
Bias circuit for supplying a bias current to an RF power amplifier
A bias circuit generates a bias current to an RF power amplifier used for transmitting RF signals, and the amount of the bias current supplied to the RF power amplifier can be configured in multiple modes through transistor switches that are controlled by mode control signals, so that the bias current supplied to the RF power amplifier can be adjusted according to the required power level of the transmitting RF signals. In addition, the bias current can be turned off by another transistor switch that is controlled by a power control signal for saving power while the RF power amplifier is not transmitting RF signals. |
| US10965261B2 |
Power amplifier circuit
The present disclosure provides an amplifier circuit that includes one or more amplifier stages, each of the one or more amplifier stages including a complementary transistor configuration. The complementary transistor configuration includes an NMOS transistor and a PMOS transistor. The NMOS transistor is electrically coupled in parallel to the PMOS transistor. The amplifier circuit further includes an output amplifier stage electrically coupled to an output of the one or more amplifier stages, the output amplifier stage including a non-complementary transistor configuration including one or more NMOS transistors or PMOS transistors. |
| US10965259B2 |
Multi-mode amplifier architectures with resonant structures
The disclosed technology is related to a radio-frequency (RF) amplifier having a bypass circuit and a resonant structure to improve performance in a bypass mode (e.g., a low gain mode). The disclosed amplifiers have a resonant structure that effectively isolates an amplifier core from a bypass circuit. For example, in a bypass mode, the resonant structure is configured to create an open impedance looking into the amplifier core input. This effectively removes any loading from the amplifier core to the bypass circuit. The disclosed amplifiers with resonant structures improve linearity performance in bypass modes due at least in part to the open impedance to the amplifier core provided by the resonant structure. |
| US10965257B2 |
Signal processing circuit without clock mediation
A signal processing circuit that achieves functionality similar to that of a switched capacitor circuit without the necessity a clock. The circuit compensates for finite open loop gain and for offset voltages in the components, allowing the circuit to “calculate” the result of a problem represented by the circuit essentially immediately upon the presentation of a new input or set of inputs. After the circuit is initialized to remove gain, an input is applied to the circuit, and propagates through the network and affects the state of amplifier outputs; the propagation from the input through capacitors to the ultimate output(s) of the circuit is the analog calculation taking place. The calculation is not mediated by a clock, but rather the calculation corresponds to the circuit's one-time response to the application of the inputs. Using these techniques complex signal processing circuits and even analog neural networks may be constructed. |
| US10965254B2 |
Low noise amplifier circuit for a thermal varying resistance
A circuit arrangement, including: a circuit configured to synthesize a resistor having a resistance value having a variation in time equivalent to a resistance variation of a sensor resistor applied with a resistance bias voltage and a resistance current bias, wherein the circuit includes: an amplifier comprising an input transistor; a bias current generator comprising a control node coupled to an output of the input transistor, wherein the bias current generator is configured to generate a bias current flowing in the input transistor; and a further current generator configured to generate a current at least proportional to the resistance bias current and coupled to the output of the input transistor, wherein the resistance bias voltage is applied to an input of the amplifier, and wherein a transconductance of the input transistor is at least proportional to the resistance of the sensor resistor. |
| US10965252B2 |
Broadband driver with extended linear output voltage
Modern modulator drivers must be capable of delivering a large output voltage into a tens of ohms modulator, while minimizing the amount of distortion added by the driver. The driver should deliver the output voltage without exceeding a maximum distortion while minimizing the DC power consumption. Accordingly, a modulator driver includes a final stage amplifier with auxiliary transistors that turn on when the conventional differential pair of transistors approaches their maximum voltage of the linear region of their transfer function, thereby providing a more linear transfer function, in particular at large input voltages. |
| US10965250B1 |
Switched capacitor crystal oscillator
This document presents an oscillator circuit and method. The oscillator circuit has a crystal to generate an oscillating voltage signal, a load capacitor coupled to the crystal, a capacitive element, and a switching circuit. The switching circuit alternately connects the capacitive element to the load capacitor and disconnects the capacitive element from the load capacitor. The presented oscillator circuit shows the advantages of a lower power consumption and a smaller circuit area. |
| US10965247B2 |
Apparatus and method for measuring one or more characteristics of one or more photovoltaic cells
An apparatus for facilitating a measurement of characteristics of a photovoltaic cell. The apparatus includes an input port for coupling to a photovoltaic cell and an output port for coupling to a measurement equipment. The apparatus is configured to couple a first resistor across positive and negative inputs of the input port and a second resistor between the negative input and ground when the input port is not selected or inactive, and decouple the first and second resistors from the input port when the input port is selected and active. The apparatus couples the positive input of the input port to the output port when the input port is selected but inactive or selected and active. The resistors protect the photovoltaic cell from adverse consequences due to incident ambient light. Examples of multiple port versions of the apparatus are also disclosed. |
| US10965245B2 |
Photovoltaic module, photovoltaic system and method of operating photovoltaic system
According to an embodiment of the present invention, there is provided a photovoltaic module including a photovoltaic solar cell, a converter to convert a level of a direct current power from the photovoltaic solar cell, an inverter to convert the direct current power from the converter into an alternating current power, a controller to control the converter and the inverter, and a communication unit to perform electric power line communication with a gateway and at least one nearby photovoltaic module, in which the communication unit periodically transmits communication state information to the gateway and the at least one nearby photovoltaic module using the electric power line communication, and receives a message transmitted by the gateway along a path determined according to the communication state information. |
| US10965243B2 |
Solar tracking system
A solar tracking system for tracking the orientation of solar energy is disclosed. The solar tracking system may be integrated with solar cells and solar concentrators. The solar tracking system may have a first (22) and second (24) tracker module array that are opposite from another, aligned in substantially identical orientation, and form a tracker module pair array (1000). Tracker module pairs (12, 14; 12, 144) may allow motion relative to one another while maintaining substantially identical orientation. Solar concentrators may be attached to opposing tracker modules of a tracker module pair forming an array of solar concentrators. A base bar array (28) may be coupled to at least one tracker module pair. A transmission may operably rotate the base bar array and the tracker module pair array simultaneously. |
| US10965242B2 |
Solar power generation device, method for installing solar power generation device, and method for operating solar power generation device
A photovoltaic apparatus includes: a power generation part; an angle changeable mechanism configured to support the power generation part so as to be able to change an elevation of the power generation part; a post configured to support the power generation part and the angle changeable mechanism; and a hinge mechanism configured to support the post so as to be able to change an angle of the post relative to an installation surface for the photovoltaic apparatus. |
| US10965241B2 |
Solar plant support structure
A new type of structure for mounting solar modules addresses the problem of solar access in several ways. Firstly, the structure can enclose a living plant and protect it and equipment. This allows improved acceptance and can provide a means for ground mounted solar to be classified as landscape by permitting authorities. This can make a large difference in the amount of area a land owner can use to mount solar modules. Also, the structure can make better use of recently developed solar technology like AC modules, microinverters and optimizers by allowing a solar designer to predefine a non-planar insolation surface that can be implemented using locally made materials. By allowing a custom non-planar design the solar plant support structure can more closely match loads, lower energy storage costs, energy transmission costs and make better use of limited solar access. |
| US10965238B2 |
Power conversion apparatus, power estimating method for electric motor, and control method for electric motor
A power conversion apparatus includes a power converter circuit that outputs an AC power to an electric motor, and circuitry that controls the power converter circuit to add a first change, accompanying a change of a power generated by the electric motor, to a first phase angle, which is a phase angle of a magnetic flux direction of the electric motor corresponding to the AC power, extracts a component generated by the first change from first information indicating the electric power supplied to the electric motor, and estimates the power generated by the electric motor based on the component. |
| US10965236B2 |
Motor control system and associated method to control motor speed
A motor control system has a computing device and a motor controller. The computing device receives user demands through a GUI, and provides a preset speed table based on the user demands. The preset speed table has a plurality of fixed values of a duty cycle of a pulse width modulation signal and a plurality of preset values of a preset motor speed corresponding to the plurality of fixed values of the duty cycle of the pulse width modulation signal. The motor controller provides the pulse width modulation signal to drive a motor based on the preset speed table. |
| US10965235B2 |
High frequency electric motor, control system, and method of manufacture
An electric motor can include a stator including a plurality of air-gap wound coils supported by a yoke, and a rotor including a permanent magnet array. The air-gap wound coils can be impregnated with a resin containing a plurality of particles, such as ceramic nanoparticles or iron particles. A corresponding control system for an electric motor can include a boost converter, and a reconfigurable multilevel inverter. |
| US10965234B2 |
Motor controller and electric power steering device having same
A motor controller for driving an interior permanent magnet (IPM) motor has a current feedback control unit that calculates a q-axis current restriction value based on a dq-axis voltage instruction value and a dq-axis current detection value, so that a power source current flowing in an inverter circuit is controlled to be equal to or lower than a target power source current. Provided that a torque current proportional to an output torque of the motor is defined as a torque current, a torque current converter converts the q-axis current restriction value to a torque current restriction value by using a d-axis current detection value. A torque current instruction value restrictor restricts a torque current instruction value with the torque current restriction value. A dq-axis current converter converts a post-restriction torque current instruction value to a d-axis current instruction value and a q-axis current restriction value. |
| US10965233B2 |
Motor control device and electric power steering device including the same
A motor control device includes a backup electrical angle detection circuit in which an inter-sensor error correction unit calculates an advance gain equal to or more than 1 with respect to input of a steering torque equal to or more than a predetermined torque value, and multiplies an output shaft angular velocity by the advance gain to calculate a post-advance steering angular velocity for correcting the estimated angle error of the direction delayed with respect to the steering direction. Then, an estimated angle calculation unit of the backup electrical angle detection circuit integrates the post-advance steering angular velocity, and, on the basis of a value of the integration, calculates a second motor electrical angle that is an estimated value of a motor electrical angle. |
| US10965232B2 |
Advanced cross current compensation system and method for enhancing reactive current sharing in power generation having multiple generators
The present system and method provides a cross-current compensation control system that provides for improved load sharing performance during the parallel operation of multiple generators through use of a Proportional Integral PI controller or a Proportional Integral Differential PID controller eliminating steady state error in reactive current sharing, with such providing a stable and robust response with uncertain variations of equipment in the power system through improved cross-current compensation when various system parameter uncertainties exist. |
| US10965229B2 |
AC power adapter having a switchable capacitor
A power adapter is provided to supply electric power from an alternating current from an alternating current (AC) power supply to a powered apparatus. It includes a switchable capacitor circuit housed within a housing and including a switchable capacitor switchably coupled across the AC power supply and a H-bridge circuit including four switches. An OFF-state of the four switches creates a charging path for the switchable capacitor, an ON-state of a first pair of the four switches creates a discharge path for the switchable capacitor during a positive half cycle of the alternating current, and an ON-state of a second pair of the four switches creates a discharge path for the switchable capacitor during a negative half cycle of the alternating current. |
| US10965228B2 |
Motor module, rotation angle detector, and method for detecting failure of rotation angle detector
A rotation angle detector includes a rotational angular velocity calculator that calculates a rotational angular velocity of a motor based on an inter-terminal voltage of the motor detected by a voltage detector and a current flowing through the motor and detected by a current detector; a ripple detector that detects a ripple component included in the current; and a failure detector that detects a failure of any one of the voltage detector, the current detector, and the ripple detector based on outputs from the detectors. The failure detector determines that the failure has occurred when a state, where the outputs from two of the voltage detector, the current detector, and the ripple detector indicate normal rotation and the output from the remaining one of the voltage detector, the current detector, and the ripple detector does not indicate normal rotation, continues for a predetermined period of time. |
| US10965226B2 |
Power conversion apparatus and power conversion system
A power conversion apparatus and a power conversion system that ensure safety capable of reliably performing an emergency stop and have a failure monitoring function are provided. The command signal for emergency stop of the power conversion apparatus between the supervisory monitoring and control device and the power conversion apparatus is to be a dual system, and the supervisory monitoring and control device monitors a performance of emergency stop of the power conversion apparatus by delaying the start of operation for a predetermined time from the operation command signal output. The supervisory monitoring and control device check a soundness of the power conversion apparatus by generating a test operation signal during that delay period. |
| US10965224B2 |
Method for levitation control of a linear motor, method for measuring a position of a linear motor, inductive sensing device, and elevator system
A method for levitation control of a linear motor includes supplying an alternating current or alternating voltage to at least one oscillating circuit including at least one sensing coil being or assumed to be arranged in a fixed spatial correlation to a mover part of the linear motor such that an opening plane of the sensing coil faces a sensor counter-surface of a stator part of the linear motor with a gap therebetween; receiving a response signal from the oscillating circuit; determining a gap length of the gap based on the response signal; and controlling the gap length by driving a magnetic levitation unit of the linear motor based on the determined gap length. An inductive sensing device and an elevator system, and a method for determining a position of the linear motor are also disclosed. |
| US10965222B2 |
Power supply
A power supply includes: a rectifier circuit which has a plurality of rectifier switching elements, and separately extracts a positive voltage and a negative voltage for every phase from a primary power source of three-phase alternating current, respectively; a smoothing circuit which has a pair of smoothing capacitors connected in series to each other to be charged by the rectifier circuit, and a plurality of smoothing inductors respectively arranged between the rectifier circuit and the smoothing capacitors; a inverter circuit which has a plurality of inverter switching elements and inverts output of the smoothing circuit into alternating current; and a control circuit which controls switching of the plurality of rectifier switching elements so that output voltage of the smoothing circuit becomes a desired voltage, and electrical current flowing to each phase of the rectifier circuit becomes a desired electrical current. |
| US10965219B2 |
Idle ring detection for a multi-output power converter
A controller for use in a power converter with multiple outputs includes a discharge detect circuit coupled to receive a voltage signal from a transformer winding of the power converter to output a discharge signal in response to the voltage signal. A multi-output signal process and interface block is coupled to output request signals to the output selection drive and idle ring visibility logic circuit. An output selection drive and idle ring visibility logic circuit is coupled to receive the discharge signal from the discharge detect circuit and the output request signals from the multi-output signal process and interface block. An idle ring detection circuit is coupled to one of the plurality of output switches and coupled to output an idle ring output signal to generate a next request pulse. |
| US10965206B2 |
Step-up/down DC-DC converter
A switch controller performs first sleep operation, to which a transition from normal operation is made when a light load is detected, and second sleep operation, to which a transition is made after the first sleep operation. In the first sleep operation, a coil current is passed via a body diode of any of a plurality of transistors that is off to an input voltage side or to an output voltage side. In the second sleep operation, a current path from at least one of first and second connection nodes to ground is formed. |
| US10965202B2 |
Slide apparatus
A slide apparatus includes a track body, at least one primary module, and a slider provided therein with a secondary module. The track body defines a recessed space therein, and the primary module is installed in the recessed space. The slider is slidably mounted on the track body and has a housing located in the recessed pace of the track body. The housing is provided with at least one channel in which the secondary module is located. The channel of the housing, which opens out at a bottom opening facing to a bottom of the track body, serves as a jig to facilitate the secondary module formed integrally with the housing of the slider. The secondary module works with the primary module to constitute a linear motor, which enables the slider to move linearly along the track body. |
| US10965199B2 |
Electric motor system, and turbo compressor provided with same
An electric motor system includes a drive shaft that rotationally drives a load, a bearingless motor, a power source unit, and a control unit. The bearingless motor includes a rotor and a stator having armature and support windings. The bearingless motor rotationally drives the drive shaft and supports a radial load of the drive shaft in a contactless manner. The power source unit applies a voltage to the armature and support windings. The control unit controls the power source unit so that a radial support force that is a sum of a radial support force caused by a support current and a radial support force caused by both the support current and an armature current is output, and so that one of an armature voltage across the armature winding and the support current is increased and the other of the armature voltage and the support current is decreased. |
| US10965193B2 |
Motor with shaft flange through-hole filled with resin
A motor includes a shaft centered on a center axis oriented in a vertical direction, a bearing rotatably supporting the shaft, an armature disposed radially outward of the bearing, a bracket to which the bearing and the armature are fixed, and a covered cylindrical rotor connected to the shaft. The rotor includes a disk-shaped rotor lid portion connected to the shaft, and a rotor side wall portion extending downward from an outer edge of the rotor lid portion. The shaft is made of metal. The rotor lid portion and the rotor side wall portion are made of resin. The rotor lid portion and the shaft are an integrally molded article. |
| US10965191B2 |
Thermodynamic system for storing/producing electrical energy
A system for producing and storing electrical energy includes a thermally insulated chamber containing a first circuitry in which circulates a first working fluid, a hot source, a cold source, wherein the hot source is composed of a pure water ice slurry at 0° C., the cold source is composed of an ice slurry with a temperature lower than or equal to −40° C. and the system for producing/storing electrical energy further includes a second circuitry of working fluid for circulating a second working fluid between the hot source and a thermostat, wherein the second working fluid is circulated between said thermostat and the hot source by an auxiliary expansion valve and an auxiliary compressor. |
| US10965189B2 |
Actuator for a drug administrating device
An actuator unit includes a support plate having a first side and a second side; an electric motor with terminal lugs and a motor shaft; a motor mounting pocket on the first side, the motor mounting pocket accommodating the electric motor; mounting projections on the first side, the mounting projections including a plurality of clamping pockets; a PC-board insertion slot on the first side; a motor shaft passage from the first side to the second side; the motor shaft of the electric motor projecting from the first side through the shaft passage to the second side and carrying a pinion; a multistage reduction gear arranged on the second side and meshing with the pinion; and a plurality of conductor stampings fixed in the clamping pockets and connected with the terminal lugs of the electric motor. |
| US10965188B2 |
Compact gear motor
The present disclosure relates to a mechatronic actuator consisting of a housing incorporating a shell and a three-phase electric motor formed by a stator excited by electrical coils and by a magnetized rotor, driving an output shaft by means of a gear train, the axis of the rotor, the axis of the output shaft and the axes of the intermediate toothed wheels being parallel, the stator having a radial triangular star shape, the three wound poles forming the three branches of the star, the axes of symmetry of two consecutive wound poles forming a mechanical angle of 120°, the housing also incorporating an electronic circuit, including a capacitor for filtering the electrical signal, the shell having a longitudinal axis, characterised in that the stator is positioned in the hosing in such a way that the axis of symmetry of one of the three wound poles forms an angle of between 70 and 110° with the longitudinal axis. |
| US10965186B2 |
Drum brake concept for use with an electric wheel end drive motor
A drum brake apparatus is provided for a vehicle air braking system. The drum brake apparatus comprises a wheel drum having a first interior chamber. The drum brake apparatus also comprises a drum brake assembly disposed in the first interior chamber of the wheel drum and mounted on inboard side of the wheel drum. The drum apparatus further comprises a brake drum adapter mounted on outboard side of the wheel drum and providing a second interior chamber in which an electric drive motor can be disposed. The drum brake apparatus also comprises a wheel hub disposed in the second interior chamber of the brake drum adapter and to which a wheel rim can be mounted. |
| US10965183B2 |
Integrated traction drive system
A traction drive system for a vehicle includes a housing, a high-speed motor, a motor controller, a transmission, a cooling system, and a lubricating oil system. The housing defines a motor cavity, an electronics cavity, an oil cavity, and a cooling fluid cavity. The cooling fluid cavity is thermally coupled to each of the motor, electronics, and oil cavities. The high-speed motor is substantially within the motor cavity and coupled to a lubricating oil system fluidically coupled to the oil cavity. The motor controller includes electronics within the electronics cavity. The transmission is mechanically coupled to the high-speed motor and coupled to the lubricating oil system fluidically coupled to the oil cavity. The cooling system is fluidically coupled to the cooling fluid cavity and configured to cool the high-speed motor, the motor controller, and the lubricating oil system. |
| US10965182B2 |
Hybrid module including axial retention housing for bearing
A drive unit for a hybrid module includes a housing assembly and an electric motor including a stator and a rotor. The stator is fixed to the housing assembly. The drive unit further includes an assembly configured for rotatably connecting the rotor to an internal combustion engine The assembly includes a shaft configured for connecting to the internal combustion engine, a rear ball bearing on the shaft and a bearing housing on an outer race of the rear ball bearing. The bearing housing axially abuts the rear ball bearing so the rear ball bearing limits rearward axial movement of the bearing housing relative to the shaft. In other words, axial thrust from the bearing housing is transferred to the shaft by the axial load carrying capacity of the ball bearing. |
| US10965180B2 |
Rotary actuator
A rotary actuator includes: an electric motor; a case that receives the electric motor; a rotatable body that is configured to transmit an output of the electric motor to an outside of the case; a seal member that seals between the rotatable body and the case; and a labyrinth forming portion that forms a labyrinth space in a path that extends from an outside space of the case to a sealing point of the rotatable body, at which the rotatable body is sealed by the seal member. |
| US10965176B2 |
Electric motors with pole biasing
An example motor includes: a rotor with a plurality of alternate polarity permanent magnets; and a stator forming a like number of poles. The stator forms one or more biasing features concentrating magnetic flux at at least one location. In some examples, the stator has an interior surface unbroken by locating features, and the stator has one or more openings that form the one or more biasing features. |
| US10965173B2 |
Distance detection methods and systems for wireless power transmission device
A distance detection method and system for a wireless power transmission device are disclosed. The wireless power transmission device includes a transmitter circuit and a receiver circuit, wherein a transmitting coil of the transmitter circuit and a receiving coil of the receiver circuit form an inductive circuit via magnetic coupling. The distance detection method includes: calculating an inductance value of a magnetizing inductance of the inductive circuit according to electrical parameters of the receiver circuit and electrical parameters of the transmitter circuit; and calculating a distance between the transmitting coil and the receiving coil according to the inductance value of the magnetizing inductance of the inductive circuit. |
| US10965172B2 |
Shape adaptive wireless charging coil for vehicle interior
Methods, systems, and apparatus for a wireless charging apparatus. The wireless charging apparatus includes a layer or sheet of polymeric or similarly compliant material. The wireless charging apparatus includes an inductive loop embedded within the layer or sheet of polymeric material. The inductive loop has a first shape and a first size. The wireless charging apparatus includes one or more actuators. The one or more actuators are configured to move or shape the layer or sheet of polymeric material and the inductive loop. The wireless charging apparatus includes a controller. The controller is configured to determine a second shape or a second size for the inductive loop. The controller is configured to move or adjust the one or more actuators to form the inductive loop into a second shape or a second size. |
| US10965171B2 |
Power supply apparatus, method for controlling the same, and power supply system
A power supply apparatus of this invention includes a communication unit that performs transmission of power and transmission/reception of information, in a non-contact manner, a plurality of object sensors that are provided on a placing table, and generate object detection signals, a determiner that determines, based on identification information of the electronic device acquired by the communication unit, whether or not the detection signals from the object sensors are within predetermined reference value ranges, a power supply unit that supplies power to the electronic device if it is determined that the detection signals are within the reference value ranges, and a controller that uses signals from object sensors that have not detected placement of the electronic device for detecting extraneous object, and that controls the power supply unit based on whether or not an extraneous object is detected. |
| US10965164B2 |
Systems and methods of wirelessly delivering power to a receiver device
A method of wireless power transmission is provided. The method includes, at a wireless power transmitter, receiving a signal from a receiver device and determining a location of the receiver device based, at least in part, on data included in the signal. The method further includes in response to determining that the location of the receiver device is within a wireless power transmission range of the wireless power transmitter: (I) selecting at least two antennas of the wireless power transmitter's antenna array based, at least in part, on the location of the receiver device, and (II) transmitting, via the at least two antennas of the antenna array, radio frequency power transmission waves that: (i) constructively interfere at the location of the receiver device to produce a focused energy at the location and (ii) destructively interfere around the location of the receiver device to form null-spaces around the focused energy. |
| US10965163B2 |
Compact power transfer mechanism using induced EMF
What is presented is a power-transfer system that provides resonant inductive power from a first object to a second object, which is adjacent to the first object. The system includes a first transformer portion that is positioned on the first object and having a first core portion. The first core portion includes a transmit unit configured to transfer an electromagnetic field to the second transformer portion. The first core portion also includes first circuitry that allows the transmit unit to transfer the electromagnetic field. The second transformer portion is positioned on the second object and has a second core portion. The second core portion includes a receiver unit configured to receive the electromagnetic field. The second core portion also includes second circuitry that allows the transmit unit to transfer the electromagnetic field. |
| US10965160B2 |
Method and device for obtaining power intended to supply a consuming appliance from a conductor traversed by an alternating electrical current
A method and a device are described for obtaining power intended to supply a consuming appliance from a conductor traversed by a primary electrical current, in which a core of magnetic material and a conductive solenoid wound about the core are positioned in a position remote from the conductor to obtain a secondary current in the solenoid from a magnetic field flux generated in the solenoid by the conductor, core and solenoid. The conductive solenoid is connected to the consuming appliance by a circuit adapted to convert the secondary current into a power intended to supply the consuming appliance through a related voltage and output current. |
| US10965155B2 |
System for non-contact transmission of electrical energy to a mobile part
In a system for a non-contact transmission of electrical energy to a mobile part, the system has a bore introduced into a floor material, a frame part is accommodated in the bore, a receiving part is situated in the frame part, an electronic circuit is situated in the receiving part, the receiving part is at least partially covered by a cover part in the manner of a housing, in particular on one of its sides, a sheet-metal part is situated between the receiving part and the frame part, and the sheet-metal part touches the receiving part and the sheet-metal part touches the frame part. |
| US10965152B2 |
Uninterruptible power supply systems and methods for communication systems
An uninterruptible power supply adapted to be connected between an AC line and a load, comprising a battery system, an inverter, and a transformer, and a controller. The battery system stores battery power. The inverter is operatively connected to the battery system. The transformer is operatively connected to the AC line, the load, and an inverter winding operatively connected to the inverter. The controller controls the inverter to supply power to the primary winding using battery power stored in the battery system based on a cost value indicative of reduction of life of the battery system. |
| US10965146B2 |
High-voltage motor vehicle electrical system
The present patent application relates to a high-voltage motor vehicle electrical system comprising an electrical heating device and at least on further consumer during switching on of which, undesired electromagnetic oscillations may occur in the electrical system. According to the invention, these are suppressed by initially switching on the heating device, before the further consumer is switched on. Switching on the heating device changes the complete impedance of the electrical system such that a resonant enhancement of the interference oscillations is prevented. Preferably, the heating device is switched on only as shortly as possible (only during the switching on process of the further consumer) in order to minimize an undesired heating. |
| US10965143B2 |
Wireless power transmission device and operation method of wireless power transmission device
Provided are a wireless power transmission device and an operation method of the wireless power transmission device according to embodiments. The wireless power transmission device according to an embodiment includes: a wireless power transmitter configured to transmit wireless power to a mobile device in response to a signal indicating that the mobile device is in contact with the wireless power transmission device; and a controller configured to control an operation with the mobile device, control an electronic device connected to the wireless power transmission device, or control at least one external device, in response to the signal indicating that the mobile device is in contact with the wireless power transmission device. |
| US10965141B2 |
Vehicle and vehicle charging apparatus
A vehicle charging apparatus includes: an AC/DC converter configured to variably output a DC link voltage; and a DC/DC converter electrically connected to the AC/DC converter and configured to acquire an output voltage by conversion of the DC link voltage outputted by the AC/DC converter and transmit the acquired output voltage to a battery. The AC/DC converter includes: a first switch element configured to adjust a power factor of the AC/DC converter according to an operation of the first switch element, and a second switch element configured to increase the DC link voltage outputted by the AC/DC converter according to the operation of the first switch element. |
| US10965139B2 |
Charger circuit and intelligent charging control method thereof
A charger circuit and an intelligent charging control method thereof are disclosed. The charger circuit comprises a power circuit used to generate a charging voltage, a charging output switch, an MCU and an electrical appliance plug-in detection circuit, wherein the MCU is connected to a positive output terminal or a negative output terminal of the power circuit through a current sampling element to detect a charging current in a charging loop and is connected to a positive connecting terminal of a charging interface to detect a charging voltage in the charging loop. In this way, a charger is able to intelligently judge whether or not a to-be-charged electrical appliance is plugged into the charging interface, automatically charges the electrical appliance in a corresponding charging mode and effectively prevents overcharging of batteries of consumer electrical appliances, thus, prolonging the battery life and avoiding disasters caused by overcharging of the batteries. |
| US10965138B2 |
Method, apparatus, and device for charging a battery and storage medium
The present disclosure provides a method, apparatus, and device for charging a battery, and storage medium. The method for charging a battery includes acquiring a battery temperature; determining a charging current value In for the nth charging stage of the battery, according to the battery temperature and a mapping relationship between different temperature ranges and charging current values I, wherein a preset charging cut-off voltage value Vn for the nth charging stage is greater than Vn−1; charging the battery with Ij in the jth charging stage; acquiring a voltage value of the battery at the current time; if the voltage value is less than Vj, continuing to charge the battery with Ij; if the voltage value is not less than Vj and j |
| US10965137B2 |
Charging device and charging method thereof
A charging device including a converter and a controller coupled with the converter is provided. The charging device is suitable for charging to an electronic device having a rated input voltage value. The converter can receive a power. Wherein, the controller makes the converter to output a first charging voltage value to the electronic device. The first charging voltage value is greater than the rated input voltage value of the electronic device. Further, a charging method of the charging device is provided. |
| US10965134B2 |
Portable solar power management system
A portable solar power management system includes (i) a solar panel interface to one or more solar panels, (ii) an energy storage interface to one or more energy storage devices, (iii) a charging circuit which routes the electrical currents from the solar panels to the energy storage devices; (iv) a load interface to one or more load devices, the load devices being powered independently on primary and secondary load circuits; and (v) a controller for controlling the operations of solar panel interface, the energy storage interface, the charging circuit, and the load interface. In addition, a secondary load control circuit and a programmable controller may be provided which route the electrical currents from the energy storage devices to the load interface, wherein the programmable controller, based on the sensing signals, also activates and deactivates the secondary load circuit. |
| US10965125B2 |
Simultaneous bidirectional power usage of generator power feeders
Aircraft power distribution systems and methods for regulating a system voltage in aircraft power distribution systems are described. An example system includes a first generator, a first power feeder, a second power feeder, a first load, a second load, and a plurality of contactors. The first power feeder and the second power feeder are coupled in parallel between the first generator and a power panel. The first load is coupled to the first power feeder, and the second load is coupled to the second power feeder. The plurality of contactors is configurable to transfer power in a first direction from the first generator to both the first load and the second load during a first mode of operation, and configurable to transfer power in a second direction from the power panel to the first load or the second load during a second mode of operation. |
| US10965124B2 |
Apparatuses including power electronics circuitry, and related methods of operation
Apparatuses including power electronics circuitry are provided. The power electronics circuitry includes at least one power converter that is coupled to a DC bus. Moreover, in some embodiments, the at least one power converter is configured to regulate a voltage of the DC bus. Related methods of operating an apparatus including power electronics circuitry are also provided. |
| US10965123B1 |
Photovoltaic direct current distribution system having a fault detection and location-based active protection system
A detection and location-based active protection method for flexible DC distribution systems with multi-terminal distributed photovoltaic sources is disclosed. The disclosed protection method actively utilizes the coordinated control between local protection and the converters in the DC distribution system. The converter can then be modified to become an injection source with characteristic signal, providing a known fault signal to build a clear protection boundary. The disclosed protection method can distinguish the correct faulted area by calculating the harmonic impedance of the characteristic signals. Compared with existing DC protection techniques, this disclosed method does not require additional injection equipment and modification of the DC distribution system configuration, nor does it need high data sampling frequency. The disclosed technique is also unaffected by measuring noise and cable-distributed capacitance. The disclosed protection method is therefore feasible for industry application in a large and complex DC network. |
| US10965117B2 |
Method for controlling a leakage current protection device in a photovoltaic apparatus
The application includes a method to control a leakage current protection device in a photovoltaic apparatus, said photovoltaic apparatus being adapted to be electrically connected to an electric power distribution grid having one or more phase voltages at an AC section of the photovoltaic apparatus. The method includes executing a first control procedure to control the leakage current protection device, the first control procedure providing for a comparison of current check values indicative of leakage currents in the photovoltaic apparatus with one or more predefined current threshold values for the leakage currents. The method includes executing a monitoring procedure to check the phase voltages and identify possible relevant positive transients of the phase voltages. If the monitoring procedure identifies relevant positive transients of the phase voltages, one or more new current threshold values for the leakage currents are provided, the execution of the first control procedure is terminated and a second control procedure to control the leakage current protection device is executed, the second control procedure providing for a comparison of the current check values with the new current threshold values for the leakage currents, the second control procedure being executed for a predefined time interval only. After the predefined period of time has passed, the execution of the second monitoring procedure is terminated and the first control procedure is again executed. |
| US10965116B2 |
Overvoltage-proof circuit capable of preventing damage caused by overvoltage
The present invention discloses an overvoltage-proof circuit capable of preventing damage caused by an overvoltage at moments of starting and/or stopping operation. An embodiment of the overvoltage-proof circuit includes a protected circuit and a protecting circuit. The protected circuit receives a power supply voltage to operate, and includes: a protected component, in which an upmost voltage that the protected component can withstand is lower than the power supply voltage; and at least one operational switch(es) operable to enable or disable the protected circuit according to an enabling signal. The protecting circuit is coupled to the protected component, and starts protecting the protected circuit from an overvoltage before a transition of the enabling signal, in which the overvoltage is greater than the upmost voltage. |
| US10965115B2 |
Vehicle power supply circuit
A vehicle power supply circuit includes; a resistor disposed between negative electrode side of the switch portion and positive electrode side of back lamps, of which positive electrode side is connected to the negative electrode side of the switch portion, and the negative electrode side is connected to the positive electrode side of the back lamps; and a rectifier which causes the current of the power supply to flow in one direction from the plurality of switch circuits to the back lamps, of which positive electrode side is connected to the negative electrode side of the plurality of switch circuits, and the negative electrode side is connected to the negative electrode side of the resistor and the positive electrode side of the back lamps. |
| US10965112B2 |
Self-seating damper clamp
Damper clamps that can be mounted and secured to utility conductors from remote locations are provided. The damper clamps are configured to be installed from remote locations, such as the ground, by an individual lineman using an extendable reach tool. Initially, the damper clamp is set in an open position where a conductor can be positioned within a seat of the damper clamp and then the damper clamp can be activated so that a keeper is biased toward the seat to temporarily hold the conductor within the seat. The keeper is then tightened to releasably secured to the conductor to the damper clamp. |
| US10965106B2 |
Gas-insulated electrical equipment
A gas-insulated electrical equipment includes: a grounded tank filled with an insulating gas; a central conductor which is disposed inside the grounded tank and to which to apply a voltage; a high-resistance insulating portion which is disposed on an inner surface of the grounded tank and which is configured of an insulating material of high resistivity; a low-resistance insulating portion which is disposed on at least a partial front surface of the high-resistance insulating portion and which has a resistivity lower than that of the high-resistance insulating portion, and a non-linear resistance insulating portion which is disposed on at least a partial front surface of the low-resistance insulating portion and which is configured of a non-linear resistance material, which exhibits a non-linear resistivity relative to a change in electric field, and an insulating material of high resistivity, wherein the low-resistance insulating portion has a floating potential. |
| US10965095B2 |
Optical amplification system
An optical amplification system includes: a first amplification module configured to amplify at least a conventional band (C band) optical signal; a second amplification module configured to amplify a longer wavelength band (L band) optical signal; an attenuator configured to attenuate at least the C band optical signal to obtain a first optical signal and a second optical signal, where the attenuator is further configured to output the first optical signal to the second amplification module and output the second optical signal to a wavelength division multiplexing module, which is configured to combine and output the C band optical signal and the L band optical signal. |
| US10965094B2 |
Wavelength-tunable laser device
A laser device includes a wavelength-tunable laser including plural wavelength selectors in an optical resonator; a semiconductor optical amplifier that amplifies the laser light input thereto; a light intensity variation detector that detects variation in intensity of the laser light output from the wavelength-tunable laser before the laser light is input to the semiconductor optical amplifier; a wavelength dithering generation unit that generates a resonator mode wavelength dithering to modulate a resonator mode of the resonator; a wavelength dithering feedback controller that performs, on the resonator mode wavelength dithering, feedback control based on the variation in intensity detected by the light intensity variation detector; a light intensity detector that detects an intensity of the laser light output from the semiconductor optical amplifier; and a semiconductor optical amplifier feedback controller that performs feedback control on the semiconductor optical amplifier based on the intensity detected by the light intensity detector. |
| US10965092B2 |
Pulsed lasers based on spatiotemporal mode-locking
The technology disclosed in this patent document allows mode locking of both selected longitudinal and transverse modes to produce laser pulses. The laser light produced based on such mode locking exhibits a 3-dimensional mode profile based on the locked longitudinal and transverse modes. |
| US10965087B2 |
Laser device
Provided is a laser device that includes a laser chamber in which a pair of discharge electrodes are disposed; a line narrowing optical system including a grating disposed in a position outside the laser chamber; a beam expander optical system that increases a diameter of a light beam, outputted from the laser chamber and traveling toward the grating, in a first direction parallel to a discharge direction between the discharge electrodes and in a second direction orthogonal to the discharge direction; and a holding platform that is formed as a component separate from the laser chamber and the grating, holds the beam expander optical system, and forms along with the beam expander optical system a beam expander unit. |
| US10965085B2 |
Laser chamber with metal damper member
A laser chamber may include a first discharge electrode, a second discharge electrode, a fan making a laser gas flow through a discharge space between the first and second discharge electrodes, a first insulating member disposed on upstream side and downstream side of the first discharge electrode in the laser gas flow, a first metal damper member disposed on upstream side of the second discharge electrode and a second insulating member disposed on downstream side of the second discharge electrode in the laser gas flow, and a second metal damper member disposed on downstream side of the second insulating member in the laser gas flow. In a boundary portion between the second metal damper member and the second insulating member, a first discharge space side surface of the second metal damper member may be located further toward the opposite side to the discharge space than a second discharge space side surface of the second insulating member. A first corner formed by the first surface and a first side surface of the second metal damper member, the first side surface being on the side of the second insulating member, may be in contact with a second side surface of the second insulating member, the second side surface being on the side of the second metal damper member. |
| US10965078B2 |
Gripper head for use with terminal seals
A gripper head for use in gripping a seal and positioning the seal in an electrical terminal. The gripper head has a mounting section, a compliant section and a gripping section. The compliant section extends from the mounting section. The compliant section has compliant legs having fixed ends proximate the mounting section and free ends. The compliant legs are spaced apart by compliant section slots. The gripping section extends from the compliant section. The gripping section has gripping legs which extend from the compliant legs. The gripping legs are spaced apart by gripping section slots. As the gripper head is moved into engagement with the seal, the gripping legs and the compliant legs are resiliently deformed causing the compliant legs and the gripping legs to apply a force to the seal to retain the seal on the gripping section of the gripper head. |
| US10965077B2 |
Superconducting devices, such as slip-rings and homopolar motors/generators
A device {i.e., a slip-ring or a homopolar motor/generator) (40, 50, 80) is adapted to provide electrical contact between a stator and a rotor (41, 83), and includes: a current-carrying brush-spring (31, 84) mounted on the stator, and having two opposite surfaces; a fibrous brush assembly (35, 69) mounted on the conductor, the brush assembly having a bundle of fibers (36, 71) arranged such that the tips of the fibers will engage the rotor for transferring electrical current between the stator and rotor; a ribbon (33, 85) of superconducting material mounted on each opposite surface of the current-carrying brush-spring and communicating with the stator and the brush assembly; and another ribbon (29, 86) of superconducting material mounted on the rotor. The device is submerged in a cryogenic fluid at a temperature below the transition temperatures of the superconducting materials such that the electrical resistivity of the device will be reduced and the current-transfer capability of the device will be increased. |
| US10965072B2 |
Remote racking device for bus plug
A power distribution system includes a busway and a bus plug. A mechanical assembly rotatably mounts the bus plug relative to the busway. The system includes a remote racking device including a mechanism having a first mechanical component coupled to the bus plug and a second mechanical component coupled to the busway. The remote racking device rotates the bus plug relative to the busway about a rotation axis defined by the mechanical assembly based on mechanical interaction of the first mechanical component and the second mechanical component. Methods of connecting and disconnecting a bus plug relative to a busway with a remote racking device are also provided. |
| US10965060B1 |
Dimmable tamper-resistant nightlight
A dimmable tamper resistant nightlight may include a body comprising at least one light emitting diode (LED). Plug blades may extend from the body. A dimming switch may be coupled to the at last one LED, the dimming switch configured to move between a first position that activates about 50% luminosity of the at least one LED, a second position that deactivates about 100% luminosity of the at least one LED, and a third position that activates about 100% luminosity of the at least one LED. A housing may be coupled to the body, the housing comprising an access opening through which the dimming switch may be moved among the first position, the second position, and the third position. A housing may also comprise a locking element configured to prevent the dimmable tamper resistant nightlight from being removed from the electrical receptacle. |
| US10965059B2 |
Electronic device and robot controller
An electronic device includes: a first board configured as a printed circuit board having an electronic circuit component mounted thereon; a second board configured as a printed circuit board having an electronic circuit component mounted thereon; a board-to-board connector configured to electrically connect the first board and the second board, the board-to-board connector including a first terminal on the first board and a second terminal on the second board, the second terminal being configured to be connected to the first terminal; and a grip member on the second board. |
| US10965058B2 |
Power connector
The present disclosure relates to a power connector which comprises an insulative housing and a terminal. The insulative housing defines a terminal receiving groove therein and comprises a stopping wall. The terminal is positioned in the terminal receiving groove and comprises a mating portion, a stopping portion and a wire connecting portion. The stopping portion abuts against the stopping wall and comprises a first horizontal portion and a second horizontal portion. The first horizontal portion comprises a first front end edge. The second horizontal portion comprises a second front end edge. A portion of a front end of the first horizontal portion and a portion of a front end of the second horizontal portion are cut off, therefore when the terminal clamps the wire, the first front end edge and the second front end edge do not splay forwardly and outwardly to protrude forwardly, but are parallel to each other or respectively extend backwardly, which thus can avoid the first front end edge and the second front end edge of the stopping portion from abutting against the stopping wall first due to the protruding. |
| US10965057B2 |
Method for checking a sealing of a plug connection, and plug connection
A method checks a sealing of an interior space of a plug connection that is to be tested. The plug connection has two plug connection elements, namely a plug connector element and a mating connector element, the plug connector element being plugged into the mating connector element in a plug-in direction. One of the plug connection elements additionally has a test opening to the interior space, via which, for the purpose of checking the sealing, a test medium is applied to the interior space, and the test opening is then sealed toward the interior space. |
| US10965053B2 |
Electrical contact element
The present invention relates to an electrical contact element (1), that has a plurality of contact areas (21, 22), with a base body (6) made from a first material and a coating (7) applied to the base body (6) made from a coating material. In at least one area of the base body (6) within at least one contact area (21, 22) in each case the first material is removed and is at least partially replaced by a second material. The second material and the coating material each have a higher electrical conductivity than the first material. |
| US10965052B2 |
Connector holding mechanism
A connector holding mechanism includes a biasing member provided in a through hole formed in a bottom plate of a storage body, a cover having a connector insertion hole and an inclined surface which is fixed to the through hole, a connector, in which a terminal is loosely inserted into the connector insertion hole, and a flange portion protruding from an outer periphery of the housing biased by the biasing member. When the connector is waiting to be fitted to a stored object, the connector is held in a posture where the terminal is inclined due to abutment between the inclined surface and the flange with respect to a virtual line perpendicular to the bottom surface, and when the connector is fitted to the stored object, the connector is held in a posture where the terminal is vertical along the virtual line. |
| US10965043B2 |
Set screw connector
A set screw for connecting conductors with electrical terminals, such as a terminal block of a load panel includes a screw body and a screw face. The screw face fits inside the screw body and is movable along the axis of the screw body. An elastically deformable member, such as a coil spring or set of spring washers is disposed between the screw body and the screw face. The elastically deformable member compresses in response to force exerted between the screw body and screw face. An indicator bar is connected with the screw face and moves along the axis of the screw body along with the screw face in response to the compressive force. The proximal end of the indicator bar extends proximal of the screw body and includes one or more indicia that show the deformation of the elastically deformable member. |
| US10965041B2 |
Dual polarized horn antenna with asymmetric radiation pattern
A horn-type of electromagnetic dual polarized antenna, having an asymmetric radiation pattern is provided. More specifically, the radiation pattern in the azimuth plane will have a wider beam width while the radiation pattern in the elevation plane will have a narrower beam width, and the radiation patterns for the horizontal and vertical polarizations are substantially equal. |
| US10965040B2 |
Antenna device
An antenna device is provided. The antenna device includes a first antenna pair. The first antenna pair includes a first antenna unit and a second antenna unit arranged juxtaposed to the first antenna unit. The first antenna unit includes a first membrane extending in a first longitudinal direction. The second antenna unit includes a second membrane extending in a second longitudinal direction. An angle between the first longitudinal direction and the second longitudinal direction is in a range from 75 to 105 degrees. |
| US10965038B2 |
Radar apparatus
A transmitting array antenna includes a second antenna group placed in a position inside a first antenna group in a first direction and a position different from the first antenna group in a second direction. A receiving array antenna includes a fourth antenna placed in a position outside a third antenna group arranged in the first direction and a position different from the third antenna group in the second direction. An interelement spacing between a receiving antenna of the third antenna group located at an end on a second side is identical to an interelement spacing in the first direction between a transmitting antenna of the first antenna group on the first side and each of the second antenna group. In a case where the first antenna group and the third antenna group are identical in position in the second direction, positions of antennas are different. |
| US10965035B2 |
Reconfigurable antenna systems with ground tuning pads
Reconfigurable antenna systems with ground tuning pads are provided herein. In certain configurations, an antenna system includes a module substrate including a ground plane and a ground tuning pad configured to receive a ground voltage from the ground plane. The antenna system further includes an antenna element and a tuning conductor that is spaced apart from the antenna element and operable to load the antenna element. Furthermore, a switch is electrically connected between the tuning conductor and the ground tuning pad, and operates to selectively connect the tuning conductor to the ground plane by way of the ground tuning pad to provide tuning to the antenna element. |
| US10965033B2 |
Adaptive-spacing antenna
Disclosed is an adaptive-spacing antenna system and a method for designing an adaptive-spacing antenna system. The antenna system and design method are operative to provide a configuration layout that reduces both the amount of material required to manufacture the antenna and the obtrusiveness caused by the antenna, while providing more flexibility for installation and a variety of options for aesthetic applications. The adaptive-spacing antenna comprises one or a combination of more than one set of straight-linear and curvilinear elements forming an adaptively-spaced grid or mesh structure. The system and method are particularly suitable for reducing the antenna weight, cost, and obtrusiveness during operation. |
| US10965030B2 |
Antenna apparatus
An antenna apparatus includes: a ground layer; a feed line disposed in a position lower than a position of the ground layer; and an antenna structure including a first radiation part connected to one end of the feed line and configured to provide a first electromagnetic plane in a first direction, and a second radiation part connected to the first radiation part, configured to provide a second electromagnetic plane in a second direction, and disposed such that at least a portion of the second radiation part is disposed in a position higher than the position of the ground layer. |
| US10965027B2 |
RF ripple correction in an antenna aperture
A method and apparatus for RF ripple correction in an antenna aperture are described. In one embodiment, the antenna comprises: an array of antenna elements having liquid crystal (LC); drive circuitry coupled to the array and having a plurality of drivers, each driver of the plurality of drivers coupled to an antenna element of the array and operable to apply a drive voltage to the antenna element; and radio-frequency (RF) ripple correction logic coupled to the drive circuitry to adjust drive voltages to compensate for ripple. |
| US10965026B2 |
Phased array transceiver with built-in transmitter linearization feedback
Methods and devices for streamlining phase and amplitude calibration and linearization in RF transceiver circuits including a plurality of switchable transmit and receive processing paths is presented. According to one aspect, switchable feedback paths are provided that can selectively feedback a portion of a transmitted RF signal or a test RF signal for use in the calibration. According to another aspect, the switchable feedback paths include combination of switches and couplers to selectively combine feedback from one or more of the switchable feedback paths. According to another aspect, the switchable feedback paths reuse portions of the receive paths of the plurality of switchable transmit and receive processing paths. The switchable feedback paths can be used to provide a combined feedback RF signal based on one or more transmitted RF signals that can be used as a digital pre-distortion feedback for linearization of the one or more transmitted RF signals. |
| US10965024B2 |
Frequency routing based on orientation
Systems, methods, and apparatus for frequency routing based on orientation are disclosed. An example method includes receiving, by a playback device, an audio data stream. The example method includes determining, by the playback device, an orientation of the playback device. The example method includes routing, by the playback device, a first set of frequencies in the audio data stream to at least one of a plurality of speaker drivers based on the first orientation. The example method includes routing, by the playback device, a second set of frequencies in the audio data stream to the at least one of the plurality of speaker drivers based on the second orientation, wherein the first set of frequencies is different than the second set of frequencies. |
| US10965021B2 |
Radio frequency systems with tunable filter
Radio frequency (RF) systems with tunable filters are provided herein. In certain embodiments, an RF system includes a first RF processing circuit configured to process a first frequency band of a first communication standard and a second frequency band of a second communication standard. The first frequency band and the second frequency band are close in frequency and/or partially overlapping in frequency. The first RF processing circuit includes a tunable filter for changing the bandwidth of the first RF processing circuit to enhance the robustness of the first RF processing circuit to blocker or jammer signals of a third frequency band. |
| US10965018B2 |
Antenna device
A first ground conductor is disposed in or on a main substrate. In or on an antenna module, a first antenna and a second ground conductor operating as a ground electrode of the first antenna are disposed. A coaxial cable including a core wire and an outer conductor feeds power to the first antenna. The outer conductor is electrically connected to the first ground conductor at a first position, and is connected to the second ground conductor at a second position. A second antenna including a feed element and a parasitic element operates at a lower frequency than the operating frequency of the first antenna. The second ground conductor and a part of the outer conductor from the first position to the second position also serve as the parasitic element of the second antenna. |
| US10965013B2 |
Antenna module
An antenna module of the present disclosure includes a control substrate having a flat plate shape and configured to house or mount a semiconductor element; a frame substrate bonded to an upper surface of the control substrate via bonding members and exposing a center portion of the upper surface of the control substrate; and an antenna substrate having a flat plate shape, bonded to an upper surface of the frame substrate via the bonding members so as to face the control substrate, and provided with a plurality of antenna patterns disposed along a main surface of the antenna substrate. The frame substrate includes a frame main body and a crosspiece. Between the frame main body/the crosspiece and the control substrate as well as the antenna substrate, projecting portions that come into contact with the opposing control substrate, frame substrate, and antenna substrate are provided at a fixed height. |
| US10965012B2 |
Multi-filar helical antenna
A multi-filar helical antenna comprising a helical radiating element extending along a longitudinal axis, comprising an elongate body having a free first end and a second end opposite the first end and coupled to a feeding port, and a tail member, extending away from the body at the second end. The tail member has a geometry that is selected for modifying at least one of an impedance of the radiating element, and broadening the antenna's resonance bandwidth. The radiating element may comprise a positioning member extending away from the second end along a direction substantially parallel to the axis. An end portion of the positioning member is secured to an electrically conductive surface in connection with the feeding port. The second end is positioned at a given distance above the conductive surface and the radiating element is fed through the feeding port at the given distance above the conductive surface. |
| US10965009B2 |
Capacitively coupled label antenna
The methods, systems, and devices of the present disclosure are directed to a capacitively coupled label antenna as a component in an antenna system comprising the label antenna, a feed block, an antenna coupler, and a gap between the antenna coupler and the feed block. The label antenna is electrically connected to the antenna coupler, and the antenna coupler is capacitively coupled to the feed block through the gap. By the addition of the gap between the feed block and antenna coupler, the label antenna may be placed on the surface of a container without requiring a wired connection to pass through the container. The feed block may be a small electronic component on a circuit board while the label antenna may be significantly larger thereby providing increased frequency bandwidth and an improved antenna radiation pattern. |
| US10965007B2 |
Antenna module
An antenna module includes a substrate having a first surface including a ground region and a feeder region; chip antennas mounted on the first surface of the substrate; and at least one patch antenna disposed inside of the substrate or at least partially disposed on a second surface of the substrate. The chip antennas include a body portion, a ground portion bonded to a first surface of the body portion, and a radiation portion bonded to a second surface of a body portion. The ground portion of each chip antenna is mounted on the ground region and the radiation portion of each chip antenna is mounted on the feeder region. |
| US10965006B2 |
Terminal back cover and mobile terminal
A back cover includes: a back cover body, an antenna structure, a first hand-held part, and a second hand-held part arranged apart from the first hand-held part. The antenna structure includes a first part whose first side is separated from one end of the back cover body by a first slit, a second part separated from a second side of the first part by a second slit, and a third part for connecting the first and second parts. The first hand-held part extends to the second part from the back cover body and separated from a third side of the first part by a third slit. The second hand-held part extends to the second part from the back cover body and separated from a fourth side of the first part by a fourth slit, where the back cover body and the antenna structure are made of a metal material. |
| US10965001B2 |
Universal industrial transmitter mounting
An industrial transmitter assembly includes an industrial transmitter and a transmitter mount. The transmitter includes electronics contained in a housing. The transmitter mount is configured to attach the housing to a structure and includes a stem member, an adaptor and a locking member. The stem member includes a first end connected to the housing of the transmitter, and a second end having a flange or a first twist-lock connector. The adaptor is configured for attachment to the structure and includes a base member having a slot configured to receive the flange or a second twist-lock connector configured to attach to the first twist-lock connector. The locking member is configured to secure the second end of the stem to the base member. |
| US10964998B2 |
Multi-mode resonator
A multi-mode resonator includes: a housing having a cavity therein; and a plurality of resonance ribs which are arranged radially around a center of the cavity with a predetermined interval therebetween. Each of the plurality of resonance ribs includes a body having a lower end and an upper end. The lower end of each of the plurality of resonance ribs is fixed to a bottom surface of the housing, and the body of the each of the plurality of resonance ribs is bent so that the upper end of each of the plurality of resonance ribs points to the center of the cavity. |
| US10964996B2 |
Bidirectional coupler
Bidirectional detection is performed with a suppressed increase in return loss at an output terminal. A bidirectional coupler includes a detection port, a main line connected to a first port and a second port, a sub-line, a termination circuit, a switch circuit that switches each of one end and another end of the sub-line to the termination circuit or the detection port, and a matching network disposed between the switch circuit and the detection port and including at least one of a first variable capacitor, a first variable inductor, or a first variable resistor. In a first mode for detecting a first signal, the switch circuit connects the one end of the sub-line to the detection port, and connects the other end of the sub-line to the termination circuit. |
| US10964995B2 |
Dielectric coupling system with mode control and methods for use therewith
In accordance with one or more embodiments, a coupling system includes a plurality of dielectric couplers configured to generate, responsive to first electromagnetic waves received via a hollow waveguide, second electromagnetic waves along a surface of a transmission medium, wherein the plurality of dielectric couplers each have an end at differing azimuthal orientations relative to the transmission medium and wherein the second electromagnetic waves propagate along the surface of the transmission medium without requiring an electrical return path. A controller is configured to control a generation of the first electromagnetic waves in accordance with a first set of phases, wherein the second electromagnetic waves generated by the plurality of dielectric couplers combine on the surface of the transmission medium to propagate via a first selected wave mode. |
| US10964991B2 |
Tunable waveguide filter input/output coupling arrangement
The present disclosure relates to a tunable waveguide filter input/output coupling arrangement comprising a waveguide part, a coupling iris part and a tunable filter part. The waveguide part runs along a longitudinal extension and has a waveguide width extending perpendicular to the longitudinal extension, and is electrically connected to the tunable filter part by means of the coupling iris part which comprises an opening between the waveguide part and the tunable filter part. The opening is positioned at a certain position along the longitudinal extension. The waveguide part comprises a stub part that has a certain stub length along the longitudinal extension, between an electrical short-circuit end plate and an edge of the opening that is closest to the end plate, where the stub part also has a stub width extending perpendicular to the longitudinal extension. |
| US10964990B2 |
Battery pack and electrical combination
An electrical combination includes a battery pack and a power tool. The battery pack includes two battery pack connectors which are connected with the same electrode of a battery of the battery pack. A circuit of one battery pack connector has a resistance greater than that in another circuit of another battery pack connector. The power tool includes corresponding tool connectors. When the battery pack is connected with the power tool, the power tool is supplied with a small current by the battery pack firstly, and then is supplied with a large current, so the electric spark is eliminated when the terminals of the battery pack contact with the terminals of the power tool. |
| US10964989B2 |
Connection module
A connection module to be assembled to a power storage element stack including power storage element arrays in each of which power storage elements including electrode terminals of a positive electrode and a negative electrode are arranged. The connection module includes: a plurality of bus bars that electrically connects the electrode terminals between the adjacent power storage elements; a plurality of bus bar housing parts each housing each of the bus bars; a plurality of first hinge linking parts that links the bus bar housing parts and expands and contracts in a direction where the power storage elements are arranged; a plurality of inter-array bus bars that electrically connects the electrode terminals of power storage element arrays; a plurality of inter-array bus bar housing parts each housing each of the inter-array bus bars; and angle adjusting part adjusting an inclination angle of each of the inter-array bus bar housing part. |
| US10964988B2 |
Fusible bimetallic bus bars for battery arrays
This disclosure details exemplary battery pack designs for use in electrified vehicles. Exemplary battery arrays that may be incorporated into electrified vehicle battery packs may include a grouping of battery cells and a circuit connector module configured for electrically connecting the grouping of battery cells. The circuit connector module may include a first bus bar made of a single material and a second bus bar that is fusible and made of at least two dissimilar materials. |
| US10964986B2 |
Separator for electrochemical elements, and electrochemical element comprising same
An object of the invention is to provide a separator for an electrochemical element in which the occurrence of fluff on the sheet surface thereof is suppressed and an internal short-circuit defect rate is low, and the invention provides a separator for an electrochemical element, comprising: a fibrillated solvent spun cellulose fiber; and a synthetic fiber, wherein the separator for an electrochemical element contains, as the synthetic fiber, from 5 to 40% by weight of a core-sheath type composite fiber having a fiber diameter of 6.0 μm or less which is composed of: a core component made of a resin having a melting point of 160° C. or more; and a sheath component made of polyethylene. |
| US10964981B2 |
Battery module
The present invention provides a battery module comprising: a plurality of battery cells of which the horizontal length of a front surface is formed to be longer than the vertical length and which are vertically stacked; a cooling fin which has a first cooling part contacting an upper and lower surface of adjacent battery cells, and a second cooling part extending from both side surfaces of the first cooling part and contacting both side surfaces of the battery cells which are in contact with the first cooling part; and a side cooling fin which has an ground part contacting a side surface of the second cooling part of the cooling fin, and contacting a heat sink located in a lower part. |
| US10964980B2 |
Indicator circuit decoupled from a ground plane
The invention is directed towards an indicator circuit. The indicator circuit includes a ground plane; an antenna; a decoupler component; and an integrated circuit. The antenna includes at least one antenna trace; a first antenna terminal; and a second antenna terminal. The decoupler component includes a first decoupler component terminal and a second decoupler component terminal. The integrated circuit is electrically coupled to the first antenna terminal and the second antenna terminal. The integrated circuit is electrically coupled to the first decoupler component terminal. The second decoupler component terminal is electrically connected to the ground plane. |
| US10964973B2 |
Asymmetric battery having a semi-solid cathode and high energy density anode
Embodiments described herein relate generally to devices, systems and methods of producing high energy density batteries having a semi-solid cathode that is thicker than the anode. An electrochemical cell can include a positive electrode current collector, a negative electrode current collector and an ion-permeable membrane disposed between the positive electrode current collector and the negative electrode current collector. The ion-permeable membrane is spaced a first distance from the positive electrode current collector and at least partially defines a positive electroactive zone. The ion-permeable membrane is spaced a second distance from the negative electrode current collector and at least partially defines a negative electroactive zone. The second distance is less than the first distance. A semi-solid cathode that includes a suspension of an active material and a conductive material in a non-aqueous liquid electrolyte is disposed in the positive electroactive zone, and an anode is disposed in the negative electroactive zone. |
| US10964967B2 |
Process for the recovery of ionomer
A process for the recovery of a perfluorosulphonic acid ionomer from a component comprising a perfluorosulphonic acid ionomer is disclosed, the process comprising immersing the component comprising the perfluorosulphonic acid ionomer in a solvent comprising an aliphatic diol and heating. Also disclosed is the use of the recovered perfluorosulphonic acid ionomer, for example in to prepared a proton conducting membrane or a catalyst ink. |
| US10964964B2 |
Method and system for controlling hydrogen supply for fuel cell
A method and a system for controlling hydrogen supply for a fuel cell are provided. The method includes calculating a target hydrogen supply pressure, which is a target pressure value of hydrogen supplied to a fuel cell stack based on a required output. A fuel supply valve (FSV) duty is then adjusted based on the calculated target hydrogen supply pressure and modes are determined based on the FSV duty or actual hydrogen supply pressure measurements of a sensor. A hydrogen supply pressure measurement is calculated according to each of the determined modes and the FSV duty is corrected based on the calculated target hydrogen supply pressure and the hydrogen supply pressure measurement. |
| US10964960B2 |
Fuel cell vehicle and fuel gas detector for fuel cell
A fuel cell stack is located in a front room of a fuel cell vehicle. The fuel cell stack is connected to a fuel gas guide passage extending to a widthwise central part in front of a windshield of the fuel cell vehicle. When a fuel gas is leaked from the fuel cell stack, the fuel gas is guided by the fuel gas guide passage and discharged from a discharge outlet formed in the widthwise central part through an opening formed in a hollow cover to the outside. The fuel gas guide passage is connected to a filter case in a fuel gas detector for fuel cells. |
| US10964946B2 |
Anode active material and lithium secondary battery including the same
The present invention relates to an anode active material including natural graphite and mosaic coke-based artificial graphite, and a lithium secondary battery including the same. According to an embodiment of the present invention, an anode active material including natural graphite and mosaic coke-based artificial graphite is used, when applied to a lithium secondary battery, intercalation and deintercalation of lithium ions is more facilitated and conductivity of an electrode is improved even if no or little conductive material is used. Furthermore, the increase in conductivity can lead to not only a further improvement in rate performance of a lithium secondary battery but also a reduction in interfacial resistance. |
| US10964944B2 |
Lithium-containing composite oxide, cathode active material, positive electrode for lithium ion secondary battery, and lithium ion secondary battery
To provide a lithium-containing composite oxide capable of obtaining a lithium ion secondary battery having a large discharge capacity wherein the deterioration of the discharge voltage due to repetition of a charge and discharge cycle is suppressed, a cathode active material, a positive electrode for a lithium ion secondary battery and a lithium ion secondary battery. A lithium-containing composite oxide, which is represented by the formula I: LiaiNibCOcMndMeO2 Formula I, wherein M is at least one member selected from the group consisting of Na, Mg, Ti, Zr, Al, W and Mo, a+b+c+d+e=2, 1.1≤a/(b+c+d+e)≤1.4, 0.2≤b/(b+c+d+e)≤0.5, 0≤c/(b+c+d+e)≤0.25, 0.3≤d/(b+c+d+e)≤0.6, and 0≤e/(b+c+d+e)≤0.1, and wherein the valence of Ni is from 2.15 to 2.45. |
| US10964942B2 |
Nickel nanostructure electrode and method
A nickel based micro-structured material and methods are shown. In one example, the nickel based micro-structured material is used as an electrode in a battery, such as a lithium ion battery. One specific example shown includes NiO-decorated Ni nanowires with diameters around 30-150 nm derived from Ni wire backbone (around 2 μm in diameter). In one specific example, The NiO nanowire foam can be manufactured with bio-friendly chemicals and low temperature processes without an templates, binders and conductive additives, which possesses the potential transferring from lab scale to industrial production. |
| US10964940B1 |
Electroactive materials for metal-ion batteries
This invention relates to particulate electroactive materials consisting of a plurality of composite particles, wherein the composite particles comprise: (a) a porous carbon framework including micropores and mesopores having a total volume of 0.5 to 1.5 cm3/g; and (b) silicon located at least within the micropores of the porous carbon framework in a defined amount relative to the volume of the micropores and mesopores. At least 20 wt % of the silicon is characterized as surface silicon by thermogravimetric analysis. |
| US10964939B2 |
Positive electrode for electrochemical device and electrochemical device, and method for manufacturing same
A positive electrode for electrochemical device includes a positive current collector and a positive electrode material layer supported on the positive current collector. The positive electrode material layer includes a positive electrode active material. The positive electrode active material includes an inner core portion containing polyaniline and a surface layer portion containing poly(3,4-ethylenedioxythiophene) and polythiophene. The inner core portion is fibrous or grain-aggregate, and the surface layer portion covers at least a part of the inner core portion. Furthermore, an electrochemical device includes the above-described positive electrode, a negative electrode including a negative electrode material layer that occludes and releases a lithium ion, and a nonaqueous electrolytic solution having lithium ion conductivity. |
| US10964928B2 |
Methods and systems for managing multi-cell batteries
A resistor ladder comprising identical resistors is disposed electrically in parallel with a multicell battery to calibrate voltage-controlled oscillators or analog-to-digital converters for voltage balancing the battery cells in the multicell battery. Switches in a first state provide the voltage across each resistor as inputs to the VCOs or ADCs. The number of oscillations of the output signal of each VCO or ADC over a predetermined time period are compared to determine an offset error. Switches in a second state provide the voltage across each battery cell as inputs to the VCOs or ADCs. The battery cells with a higher relative voltage can be discharged until they are balanced. Some aspects describe temperature-adjusted and interpolated determinations of electrical quantities in the cells such as voltage and/or current. |
| US10964926B2 |
Nonaqueous electrolyte battery and battery pack
According to one embodiment, provided is a nonaqueous electrolyte battery that includes a positive electrode, a negative electrode, a separator, and a nonaqueous electrolyte. The separator is disposed between the positive electrode and the negative electrode. The separator includes a fiber-made nonwoven fabric having a tortuosity of 1.8 to 3 and a vacancy of 40% to 60%. The negative electrode has an operating potential of 0.7 V or more with respect to the potential of metallic lithium. |
| US10964925B2 |
Hermetial via seal for thin film battery
Vertical via connections to a battery are hermetically sealed to prevent environmental factors (e.g. moisture, oxygen, and nitrogen) from entering the internals of the battery through porous conductive material filling the vias resulting in reduced battery performance and battery failure. |
| US10964924B2 |
Packaging for flexible secondary battery and flexible secondary battery comprising the same
Provided is a packaging for a flexible secondary battery, including: a first polymer resin layer; a barrier layer formed on the first polymer resin layer for interrupting moisture and gases; a parylene layer including parylene on at least one surface of the barrier layer; and a second polymer resin layer formed on the barrier layer, wherein the parylene layer has a thickness of 0.1-2.5 μm. A flexible secondary battery including the packaging is also provided. |
| US10964922B2 |
Battery with enhanced resistance to dendrite formation
A battery includes a case having a feedthrough port, a feedthrough assembly disposed in the feedthrough port, and a cell stack disposed within the case. The feedthrough port includes an inner conductor and an insulator core separating the inner conductor from the case. The cell stack includes an anode, a cathode, and a separator insulating the anode from the cathode, wherein the anode and cathode are offset from one another. An insulating boot surrounding the cell stack insulates the cell stack from the case. The insulating boot has an opening configured to receive therein the feedthrough assembly, which may include overmolded insulation. The interior surfaces and interior walls of the battery case may be thermal spray-coated with a dielectric material to prevent lithium dendrite formation between cathode and anode surfaces. |
| US10964921B2 |
Battery with enhanced resistance to dendrite formation
A battery includes a case having a feedthrough port, a feedthrough assembly disposed in the feedthrough port, and a cell stack disposed within the case. The feedthrough port includes an inner conductor and an insulator core separating the inner conductor from the case. The cell stack includes an anode, a cathode, and a separator insulating the anode from the cathode, wherein the anode and cathode are offset from one another. An insulating boot surrounding the cell stack insulates the cell stack from the case. The insulating boot has an opening configured to receive therein the feedthrough assembly, which may include overmolded insulation. The interior surfaces and interior walls of the battery case may be thermal spray-coated with a dielectric material to prevent lithium dendrite formation between cathode and anode surfaces. |
| US10964914B2 |
Organic light emitting diodes displays including a polarization film and manufacturing method thereof
A cracks propagation preventing, polarization film attaches to outer edges of a lower inorganic layer of an organic light emitting diodes display where the display is formed on a flexible substrate having the lower inorganic layer blanket formed thereon. The organic light emitting diodes display further includes a display unit positioned on the inorganic layer and including a plurality of organic light emitting diodes configured to display an image, and a thin film encapsulating layer covering the display unit and joining with edges of the inorganic layer extending beyond the display unit. |
| US10964909B2 |
Organic light emitting diode display device having a dam for controlling flow of encapsulant
An OLED display device and a method of fabricating the same are disclosed. The OLED display device includes a substrate including a display area provided with an organic light emitting element and a pad area provided with a plurality of pads, the pad area formed around the display area, an encapsulation layer formed on the substrate such that the encapsulation layer covers the organic light emitting element, and a dam formed between the display area and the pad area, the dam controlling flow of an organic film material constituting the encapsulation layer. |
| US10964903B2 |
Light-emitting element, light-emitting device, electronic device, and lighting device
To increase emission efficiency of a fluorescent light-emitting element by efficiently utilizing a triplet exciton generated in a light-emitting layer. The light-emitting layer of the light-emitting element includes at least a host material and a guest material. The triplet exciton generated from the host material in the light-emitting layer is changed to a singlet exciton by triplet-triplet annihilation (TTA). The guest material (fluorescent dopant) is made to emit light by energy transfer from the singlet exciton. Thus, the emission efficiency of the light-emitting element is improved. |
| US10964897B2 |
Tridentate cyclometalated metal complexes with six-membered coordination rings
Tridentate cyclometalated complexes with rigid six-membered coordination rings of General Formula I having tunable emission wavelengths in the visible range. These emitters are suitable for full color displays and lighting applications. |
| US10964896B2 |
Perovskite light-emitting device
Provided are: a light-emitting layer for a perovskite light-emitting device; a method for manufacturing the same; and a perovskite light-emitting device using the same. The method of the present invention for manufacturing a light-emitting layer for a halide perovskite light-emitting device comprises a step of forming a first nanoparticle thin film by coating, on a member for coating a light-emitting layer, a solution comprising halide perovskite nanoparticles including a perovskite nanocrystal structure. Thereby, a nanoparticle light emitter has therein a halide perovskite having a crystal structure in which FCC and BCC are combined; and can show high color purity. In addition, it is possible to improve the luminescence efficiency and luminance of a device by making perovskite as nanoparticles and then introducing the same into a light-emitting layer. |
| US10964894B2 |
Carbazole derivatives
The present invention relates to carbazole derivatives, especially for use in electronic devices. The invention further relates to a process for preparing the compounds of the invention and to electronic devices comprising these. |
| US10964891B2 |
Pyrene derivative, organic light-emitting medium, and organic electroluminescent element containing pyrene derivative or organic light- emitting medium
An organic light-emitting medium including a pyrene derivative represented by the following formula (1) and a phenyl-substituted anthracene derivative represented by the following formula (2): wherein Ar1 to Ar4 are independently a substituted or unsubstituted aryl group having 6 to 30 ring carbon atoms or a substituted or unsubstituted heteroaryl group having 5 to 20 ring atoms. |
| US10964890B2 |
Opto-electrical devices incorporating metal nanowires
The present disclosure relates to OLED and PV devices including transparent electrodes that are formed of conductive nanostructures and methods of improving light out-coupling in OLED and input-coupling in PV devices. |
| US10964886B2 |
Spin transfer torque memory devices having heusler magnetic tunnel junctions
The present disclosure relates to the fabrication of spin transfer torque memory devices, wherein a magnetic tunnel junction of the spin transfer torque memory device is formed with Heusler alloys as the fixed and free magnetic layers and a tunnel barrier layer disposed between and abutting the fixed Heusler magnetic layer and the free Heusler magnetic layer, wherein the tunnel barrier layer is lattice matched to the free Heusler magnetic layer. In one embodiment, the tunnel barrier layer may be a strontium titanate layer. |
| US10964883B2 |
Magnetic storage device
According to one embodiment, a magnetic storage device includes a magnetoresistive effect element. The magnetoresistive effect element including: a first ferromagnetic layer; a second ferromagnetic layer; a first non-magnetic layer between the first ferromagnetic layer and the second ferromagnetic layer; a second non-magnetic layer at an opposite side of the first non-magnetic layer relative to the first ferromagnetic layer; and a third non-magnetic layer at an opposite side of the first ferromagnetic layer relative to the second non-magnetic layer. The second non-magnetic layer including rare-earth oxide, and the third non-magnetic layer including ruthenium (Ru) or molybdenum (Mo). |
| US10964882B2 |
Bonding method
A bonding layer 3 is formed over a piezoelectric material substrate, and the bonding layer is made of one or more materials selected from the group consisting of silicon nitride, aluminum nitride, alumina, tantalum pentoxide, mullite, niobium pentoxide and titanium oxide. A neutralized beam is irradiated onto a surface of the bonding layer and a surface of a supporting body to activate the surface of the bonding layer and the surface of the supporting body. The surface of the bonding layer and the surface of the supporting body are bonded by direct bonding. |
| US10964877B2 |
Piezoelectric element, piezoelectric actuator, ultrasonic probe, ultrasonic apparatus, electronic apparatus, liquid jet head, and liquid jet apparatus
A piezoelectric element includes a first electrode layer, a piezoelectric layer, and a second electrode layer. The first electrode layer, the piezoelectric layer, and the second electrode layer are stacked in sequence on one another. The first electrode layer has a first part overlapping the piezoelectric layer in a plan view, and a second part at least partially separated from the first part and not overlapping the piezoelectric layer in the plan view. The second electrode layer has a third part overlapping the piezoelectric layer in the plan view, and a fourth part separated from the third part. The fourth part is in contact with the first part and the second part. |
| US10964874B2 |
Thermoelectric generator using in-situ passive cooling
A portable electrical power generation system using thermoelectric modules to produce voltage from a temperature differential. The temperature differential is maintained using a passive cooling system including a retained liquid coolant and heat from a heated fluid. |
| US10964870B2 |
LED package
The present disclosure provides a light emitting diode (LED) package, which ensures the reliability during use while adopting an LED chip of higher output. The LED package includes an LED chip, which has a front and a back facing opposite sides in the thickness direction z, and a first back electrode provided at the back surface; a first terminal in conduction with the first back electrode; and a first bonding layer, configured to bond the first back electrode and the first terminal 201; wherein the composition of the first bonding layer includes a metal eutectic composition containing Au, and when the LED chip is viewed in the thickness direction z, a first bent portion which is recessed toward the inner side of the periphery of the first back electrode is formed in the first bonding layer. |
| US10964869B2 |
Transparent light emitting element display
A transparent light emitting element display, comprising: a transparent substrate; at least one light emitting element which is provided on the transparent substrate; and a first common electrode wiring portion, a second common electrode wiring portion, and a signal electrode wiring portion which are provided on the transparent substrate, in which all of the first common electrode wiring portion, the second common electrode wiring portion, and the signal electrode wiring portion comprise metal mesh patterns, respectively, each of the metal mesh patterns, which constitute the first common electrode wiring portion, the second common electrode wiring portion, and the signal electrode wiring portion, has a standard deviation of a line width which is 20% or less, a standard deviation of a pitch which is 10% or less, and a standard deviation of a line height which is 10% or less, and the metal mesh patterns are provided in a region having an area of 80% or more of an overall area on the transparent substrate. |
| US10964865B2 |
Printed board, light emitting device, and method for manufacturing same
A method for manufacturing a printed board includes steps of; providing a starting board comprising a base member having a plate-like shape, having an upper surface and a lower surface opposite the upper surface, and having an insulation property, a first metal layer disposed on the upper surface, and a second metal layer disposed on the lower surface; and laser machining a through-hole penetrating the starting board in a thickness direction of the starting board by irradiating a laser beam irradiation area of the starting board with a laser beam from a side of the starting board on which side the first metal layer is disposed. The method further includes a step of etching the second metal layer so as to remove a portion of the second metal layer located in the laser beam irradiation area, prior to the step of laser machining. |
| US10964863B2 |
Method of producing an optoelectronic element
A method of producing an optoelectronic element with a light emitting component, includes arranging a sacrificial layer at least above a part of a light emitting side of the component, forming at least in a part of an outer surface of the sacrificial layer an inverted optic structure, covering the outer surface of the sacrificial layer by a light transparent layer, transferring the inverted optic structure to an inner side of the transparent layer, and removing the sacrificial layer and forming a gap between the component and the light transparent layer, wherein the light transparent layer includes at the inner side the optic structure. |
| US10964862B2 |
Semiconductor heterostructure with multiple active regions
A semiconductor heterostructure for an optoelectronic device includes a base semiconductor layer having one or more semiconductor heterostructure mesas located thereon. One or more of the mesas can include a set of active regions having multiple main peaks of radiative recombination at differing wavelengths. For example, a mesa can include two or more active regions, each of which has a different wavelength for the corresponding main peak of radiative recombination. The active regions can be configured to be operated simultaneously or can be capable of independent operation. A system can include one or more optoelectronic devices, each of which can be operated as an emitter or a detector. |
| US10964858B2 |
Light emitting diodes, components and related methods
Light emitting diodes, components, and related methods, with improved performance over existing light emitting diodes. In some embodiments, light emitter devices included herein include a submount, a light emitter, a light affecting material, and a wavelength conversion component. Wavelength conversion components provided herein include a transparent substrate having an upper surface and a lower surface, and a phosphor compound disposed on the upper surface or lower surface, wherein the wavelength conversion component is configured to alter a wavelength of a light emitted from a light source when positioned proximate to the light source. |
| US10964856B1 |
Method of preparing white light-emitting material
Disclosed herein is a method of preparing a white light-emitting material. The method of preparing a white light-emitting material includes the steps of: (a) depositing a metal for the formation of a blue light-emitting material on a substrate by performing thermal evaporation; (b) forming a material in which green and blue light-emitting materials are hybridized by placing the substrate, on which the metal film is deposited in step (a), in a plasma-enhanced chemical vapor deposition (PECVD) reactor and exposing the substrate to silicon (Si) and oxygen (O) in a plasma state; and (c) forming a red light-emitting material in the material formed in step (b) by annealing the material formed in step (b) so that the red, green and blue light-emitting materials are hybridized. |
| US10964855B2 |
Method for manufacturing micro light-emitting diode array substrate
A method for manufacturing a micro light-emitting diode array substrate is disclosed. The method includes: providing a drive substrate comprising a plurality of sub-pixel regions, the plurality of sub-pixel regions being configured for bearing micro light-emitting diodes of different colors, and epitaxial layers of the micro light-emitting diodes of different colors having different thicknesses; providing a base substrate, forming a plurality of micro light-emitting diodes on the base substrate, and transferring micro light-emitting diodes of same color on the base substrate as a whole onto the drive substrate; repeating the transferring process in a sequence that the thicknesses of the epitaxial layers of the micro light-emitting diodes gradually increase, until each sub-pixel region in pixel units is provided with one of the micro light-emitting diodes having same color as the each sub-pixel region. |
| US10964854B2 |
Semiconductor light-emitting device
A semiconductor light-emitting device includes: a package substrate having a mounting surface on which a first circuit pattern and a second circuit pattern are disposed; a semiconductor LED chip mounted on the mounting surface, having a first surface which faces the mounting surface and on which a first electrode and a second electrode are disposed, a second surface opposing the first surface, and side surfaces located between the first surface and the second surface, the first electrode and the second electrode being connected to the first circuit pattern and the second circuit pattern, respectively; a wavelength conversion film disposed on the second surface; and a side surface inclined portion disposed on the side surfaces of the semiconductor LED chip, providing inclined surfaces, and including a light-transmitting resin containing a wavelength conversion material. |
| US10964849B2 |
Micro light emitting diode apparatus and method of fabricating micro light emitting diode apparatus
A micro light emitting diode (micro LED) apparatus. The micro LED apparatus includes a thin film transistor array substrate including a plurality of thin film transistors; an array of a plurality of micro LEDs on the thin film transistor array substrate, a respective one of the plurality of micro LEDs being connected to a respective one of the plurality of thin film transistors; and a plurality of microcavities respectively on a side of the plurality of micro LEDs away from the thin film transistor array substrate. The plurality of microcavities include a first microcavity having a first optical path length and a second microcavity having a second optical path length different from the first optical path length. The first microcavity is configured to allow a light of a first color to transmit there-through. The second microcavity is configured to allow a light of a second color to transmit there-through. |
| US10964844B2 |
High-efficiency micro-LEDs
Disclosed herein are light emitting diodes (LEDs) having a high efficiency. A light emitting diode including an active light emitting layer within a semiconductor layer is provided. The semiconductor layer has a mesa shape. The light emitting diode also includes a substrate having a first surface on which the semiconductor layer is positioned and an outcoupling surface opposite to the first surface. Light generated by the active light emitting layer is incident on the outcoupling surface and propagates toward an optical element downstream of the outcoupling surface. The light emitting diode also includes a first anti-reflection coating adjacent to the outcoupling surface; an index-matched material between the outcoupling surface and the optical element, wherein an index of refraction of the index-matched material is greater than or equal to an index of refraction of the optical element; and/or secondary optics adjacent to the outcoupling surface. |
| US10964841B2 |
Method for manufacturing light-emitting element
A method for manufacturing a light-emitting element includes: providing a wafer comprising: a substrate having a first surface and a second surface, and a semiconductor structure provided at the first surface; irradiating a laser beam into an interior of the substrate from a second surface side of the substrate, which comprises: forming a plurality of first modified regions, a plurality of second modified regions, and a plurality of third modified regions in the interior of the substrate; and subsequently, separating the wafer into a plurality of light-emitting elements. |
| US10964839B2 |
Manufacturing method of sensor chip package structure
A manufacturing method of a sensor chip package structure is provided. In the manufacturing method, a wafer including a plurality of sensor chips is provided, and each sensor chip has an active region and defines a pre-thinned region thereon. Each pre-thinned region is located at one side of the active region and covers a boundary line of each sensor chip. The pre-thinned region of each sensor chip is etched to form a concave portion. A redistribution layer is formed on the wafer. Subsequently, the wafer is cut to separate the sensor chips from one another, and each separated sensor chip has a wiring layer extending from the active region along a sidewall surface to a bottom surface of the concave portion. The separated sensor chips are respectively mounted on a plurality of substrates, and the active region is electrically connected to the substrate through the wiring layer. |
| US10964830B2 |
Surface plasmon-semiconductor heterojunction resonant optoelectronic device and preparation method therefor
A surface plasmon-semiconductor heterojunction resonant optoelectronic device and a preparation method thereof are provided. A surface ligand molecule is modified on a plasmonic nanostructure, a plasmonic crystal face structure is bound to the surface ligand molecule, a semiconductor nanostructure seed crystal is located on the plasmonic crystal face structure, a one-dimensional semiconductor nanostructure is located on the semiconductor nanostructure seed crystal, and all parts are in tight contact. The heterogeneous integration material achieves a lattice match at an interface, greatly reduces a loss caused by defects and rough crystal faces, and can achieve direct coupling of a surface plasmon mode and an optical mode. The heterogeneous integration material has a large application prospect in the fields of a nanolaser, a nano heat source and photoelectric detection and photocatalysis. |
| US10964829B2 |
InGaN-based resonant cavity enhanced detector chip based on porous DBR
An InGaN-based resonant cavity enhanced detector chip based on porous DBR, including: a substrate (10); a buffer layer (11) formed on the substrate (10); a bottom porous DBR layer (12) formed on the buffer layer (11); an n-type GaN layer (13) formed on the bottom porous DBR layer (12), wherein one side of the n-type GaN layer (13) is recessed downward to form a mesa (13′), and the other side of the n-type GaN layer (13) is protruded; an active region (14) formed on the n-type GaN layer (13); a p-type GaN layer (15) formed on the active region (14); a sidewall passivation layer (20) formed on an upper surface of the p-type GaN layer (15) and sidewalls of the protruded n-type GaN layer (13), the active region (14), and the p-type GaN layer (15), wherein the sidewall passivation layer (20) on the upper surface of the p-type GaN layer (15) has a window in a middle; a transparent conductive layer (16) formed on the sidewall passivation layer (20) and the p-type GaN layer (15) at the window; an n-type electrode (18) formed on the mesa of the n-type GaN layer (13); a p-type electrode (19) formed on a periphery of an upper surface of the sidewall passivation layer (20); a top dielectric DBR layer (17) formed on the transparent conductive layer (16) and the p-type electrode (19). |
| US10964828B2 |
Bifacial P-type PERC solar cell and module, system, and preparation method thereof
Provided are a bifacial P-type PERC solar cell, preparation method, module and system. The bifacial P-type PERC solar cell consecutively comprises a rear silver electrode (1), rear aluminum grid lines (2), a rear passivation layer (3), P-type silicon (4), an N-type emitter (5), a front silicon nitride film (6), and a front silver electrode (7); the rear silver electrode (1) is perpendicularly connected with the rear aluminum grid lines (2), grid line backbones (10) are disposed on the rear aluminum grid lines (2), an outer aluminum grid frame (9) is disposed around the rear aluminum grid lines (2), the grid line backbones (10) are connected with the rear aluminum grid lines (2), and the outer aluminum grid frame (9) is connected with the rear aluminum grid lines (2) and the rear silver electrode (1); a first laser grooving region (8) is formed in the rear passivation layer (3) with laser grooving, and the rear aluminum grid lines (2) are connected to the P-type silicon (4) via the first laser grooving region (8); the first laser grooving region (8) includes a plurality of sets of first laser grooving units (81) arranged horizontally, each of the sets of first laser grooving units (81) includes one or more first laser grooving bodies (82) arranged horizontally, and the rear aluminum grid lines (2) are perpendicular to the first laser grooving bodies (82). The solar cell is simple in structure, low in cost and easy to popularize, and has a high photoelectric conversion efficiency. |
| US10964825B2 |
Semiconductor device
The semiconductor device of the present invention includes a first conductivity type semiconductor layer made of a wide bandgap semiconductor and a Schottky electrode formed to come into contact with a surface of the semiconductor layer, and has a threshold voltage Vth of 0.3 V to 0.7 V and a leakage current Jr of 1×10−9 A/cm2 to 1×10−4 A/cm2 in a rated voltage VR. |
| US10964824B2 |
Two-dimensional electrostrictive field effect transistor (2D-EFET)
A device and method for manufacturing a two-dimensional electrostrictive field effect transistor having a substrate, a source, a drain, and a channel disposed between the source and the drain. The channel is a two-dimensional layered material and a gate proximate the channel. The gate has a column of an electrostrictive or piezoelectric or ferroelectric material, wherein an electrical input to the gate produces an elongation of the column that applies a force or mechanical stress on the channel and reduces a bandgap of two-dimensional material such that the two-dimensional electrostrictive field effect transistor operates with a subthreshold slope that is less than 60 mV/decade. |
| US10964819B2 |
Fin field effect transistor (FinFET) device and method for forming the same
A fin field effect transistor (FinFET) device structure and method for forming the FinFET device structure are provided. The FinFET structure includes a substrate, and the substrate includes a core region and an I/O region. The FinFET structure includes a first etched fin structure formed in the core region, and a second etched fin structure formed in the I/O region. The FinFET structure further includes a plurality of gate stack structures formed over the first etched fin structure and the second etched fin structure, and a width of the first etched fin structure is smaller than a width of the second etched fin structure. |
| US10964818B2 |
Semiconductor device doped from a diffused layer
The present disclosure relates to the technical field of semiconductors, and discloses a semiconductor device and a manufacturing method therefor. The manufacturing method includes: providing a substrate; forming a source and a drain that are at least partially located in the substrate; forming a diffused layer on a surface of at least one of the source or the drain, where a conductivity type of the diffused layer is the same conductivity type as the source and the drain, and a doping density of a dopant contained in the diffused layer is separately greater than doping densities of dopants contained in the source and the drain; and performing an annealing processing after the diffused layer is formed. The present disclosure can increase a doping density at a surface of a source and/or a drain, helping to reduce a contact resistance, thereby improving performance of a device. |
| US10964810B2 |
Methodology and structure for field plate design
The present disclosure, in some embodiments, relates to a method of forming an integrated chip. The method may be performed by forming a source region and a drain region within a substrate. A gate structure is formed over the substrate and between the source region and the drain region. One or more dielectric layers are formed over the gate structure, and a first inter-level dielectric (ILD) layer is formed over the one or more dielectric layers. The first ILD layer laterally surrounds the gate structure. The first ILD layer is etched to define contact openings and a field plate opening. The contact openings and the field plate opening are filled with a conductive material. |
| US10964801B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate, at least one active semiconductor fin, at least one first dummy semiconductor fin, and at least one second dummy semiconductor fin. The active semiconductor fin is disposed on the substrate. The first dummy semiconductor fin is disposed on the substrate. The second dummy semiconductor fin is disposed on the substrate and between the active semiconductor fin and the first dummy semiconductor fin. A top surface of the first dummy semiconductor fin and a top surface of the second dummy semiconductor fin are curved in different directions. |
| US10964796B2 |
Heterojunction bipolar transistors with stress material for improved mobility
According to a semiconductor device herein, the device includes a substrate. An active device is formed in the substrate. The active device includes a collector region, a base region formed on the collector region, and an emitter region formed on the base region. An isolation structure is formed in the substrate around the active device. A trench filled with a compressive material is formed in the substrate and positioned laterally adjacent to the emitter region and base region. The trench extends at least partially into the base region. |
| US10964794B2 |
Cryogenic semiconductor device having buried channel array transistor
A cryogenic semiconductor device includes isolation regions defining an active region having a first P-type ion concentration in a substrate, a gate structure in the substrate, and an ion implantation region having a second P-type ion concentration in the active region below the gate structure, wherein the gate structure includes a gate dielectric layer conformally disposed on inner sidewalls of a gate trench, a lower gate electrode disposed on the gate dielectric layer, and an upper gate electrode disposed on the lower gate electrode, wherein the lower gate electrode has a relatively lower work function than the upper gate electrode. |
| US10964792B1 |
Dual metal capped via contact structures for semiconductor devices
The structure of a semiconductor device with dual metal capped via contact structures and a method of fabricating the semiconductor device are disclosed. A method of fabricating the semiconductor device includes forming a source/drain (S/D) region and a gate structure on a fin structure, forming S/D and gate contact structures on the S/D region and the gate structure, respectively, forming first and second via contact structures on the S/D and gate contact structures, respectively, and forming first and second interconnect structures on the first and second via contact structures, respectively. The forming of the first and second via contact structures includes forming a first via contact plug interposed between first top and bottom metal capping layers and a second via contact plug interposed between second top and bottom metal capping layers, respectively. |
| US10964790B1 |
TFT substrate and manufacturing method thereof
The present invention teaches a TFT substrate manufacturing method and a TFT substrate. The method configures contact region vias in the source/drain contact regions at two ends of the active layer, provides buffer layer troughs in the buffer layer beneath the contact region vias, and forms undercut structure between the buffer layer troughs and the active layer around the contact region vias, thereby separating the transparent conductive layer at the contact region vias, and extending the source/drain electrodes to contact the source/drain contact regions of the active layer from below through the buffer layer troughs. The present invention therefore prevents the occurrence of Schottky contact barrier resulted from the contact between poly-Si and ITO in the 7-mask process by letting the source/drain electrodes to directly contact and form ohmic contact with the source/drain contact regions of the active layer, thereby enhancing the electronic mobility of TFT devices. |
| US10964786B2 |
Group III-V compound semiconductor substrate and group III-V compound semiconductor substrate with epitaxial layer
An InP substrate that is a group III-V compound semiconductor substrate includes particles of greater than or equal to 0.19 μm in particle size at less than or equal to 0.22 particles/cm2 or particles of greater than or equal to 0.079 μm in particle size at less than or equal to 20 particles/cm2 on the main surface. An epilayer-attached InP substrate that is an epilayer-attached group III-V compound semiconductor substrate includes the InP substrate mentioned above and an epitaxial layer disposed on the main surface of the InP substrate, and includes LPDs of greater than or equal to 0.24 μm in circle-equivalent diameter at less than or equal to 10 defects/cm2 or LPDs of greater than or equal to 0.136 μm in circle-equivalent diameter at less than or equal to 30 defects/cm2 on the main surface in a case where the epitaxial layer has a thickness of 0.3 μm. |
| US10964785B2 |
SiC epitaxial wafer and manufacturing method of the same
The object of the present invention is to enhance the device yield of SiC epitaxial wafers. The SiC epitaxial wafer includes a drift layer which is a SiC epitaxial layer. The drift layer has a film thickness of 18 μm or more and 350 μm or less and has arithmetic average roughness of 0.60 nm or more and 3.00 nm or less, and the impurity concentration thereof is 1×1014/cm3 or more and 5×1015/cm3 or less. |
| US10964783B2 |
Semiconductor device
A semiconductor device according to an exemplary embodiment of the present disclosure includes a substrate, an n− type layer, a plurality of trenches, a p type region, a p+ type region, an n+ type region, a gate electrode, a source electrode, and a drain electrode. The semiconductor device may include a plurality of unit cells. A unit cell among the plurality of unit cells may include a contact portion with which the source electrode and the n+ type region are in contact, a first branch part disposed above the contact portion on a plane, and a second branch part disposed below the contact portion on a plane, the plurality of trenches are separated from each other and disposed with a stripe shape on a plane. |
| US10964779B2 |
Vertical plate capacitors exhibiting high capacitance manufactured with directed self-assembly
A semiconductor structure includes a substrate and a first trench including a dielectric material disposed in the substrate. The first trench includes a transferred pattern of a first polymer of a directed self-assembly stack including the first polymer and a second polymer. The semiconductor structure also includes a second trench including a first vertical metal plate disposed in the substrate adjacent a first sidewall of the first trench, and a third trench including a second vertical metal plate disposed in the substrate adjacent a second sidewall of the first trench. The first vertical metal plate in the second trench, the dielectric material in the first trench, and the second vertical metal plate in the third trench provide a metal-insulator-metal vertical plate capacitor. |
| US10964776B2 |
Pixel defining structure, display panel, method of manufacturing the same and display device
This disclosure relates to a pixel defining structure, a display panel, a method of manufacturing the same, and a display device. The pixel defining structure includes: a first pixel defining layer with a first opening, located on a substrate, wherein the first pixel defining layer includes a first portion formed by a first hydrophilic-hydrophobic material and a second portion formed by a second hydrophilic-hydrophobic material, projections of the first portion and the second portion on a surface of the substrate are substantially not overlapped, a side surface of the first pixel defining layer facing the first opening includes a first side surface formed by the first hydrophilic-hydrophobic material and a second side surface formed by the second hydrophilic-hydrophobic material, and the first hydrophilic-hydrophobic material has a different hydrophilicity and hydrophobicity from that of the second hydrophilic-hydrophobic material. |
| US10964775B2 |
Display panel having low resistance conductive layer
A display panel having a low-resistance conductive layers is disclosed. An example display panel includes a first conductive layer having a first layer, a second layer, a third layer, a fourth layer, and a fifth layer that are sequentially stacked with the first layer being electrically conductive with the fifth layer, and a second conductive layer that is disposed on the first conductive layer and that in contact with the fifth layer. The first layer and the third layer include a first metal. Further, the second layer includes a second metal that is different from the first metal. Still further, the fourth layer includes the first metal and oxygen in a first composition ratio, and the fifth layer includes the first metal and oxygen in a second composition ratio with the first composition ratio and the second composition ratio being different from each other. |
| US10964773B2 |
Organic electroluminescent device including arrangement of capacitive electrode between layer of other capacitive electrode and layer of gate electrode
An organic electroluminescent device includes a first transistor, a power supply line layer connected to one current terminal of the first transistor, a capacitive element including a first capacitive electrode connected to a gate of the first transistor, and a second capacitive electrode, a signal line, and a pixel electrode connected to the other current terminal of the first transistor, the first capacitive electrode is provided on a layer over the gate of the first transistor, and the power supply line layer is provided on a layer between the first capacitive electrode and the signal line. |
| US10964771B2 |
Display panel having an opening arranged inside a display area
A display panel including a substrate including a display area surrounding an opening area and a non-display area between the opening area and the display area; a plurality of display elements on the display area; a plurality of scan lines extending in a first direction and detouring around an edge of the opening area; a plurality of data lines extending in a second direction that intersects with the first direction, the plurality of data lines detouring around the edge of the opening area; and a plurality of emission control lines extending in the first direction and detouring around the edge of the opening area. |
| US10964770B2 |
Flexible display
A flexible display is disclosed. In one aspect, the display includes at least one first pattern including a plurality of display elements configured to display an image and extending in a first direction. The display device also includes at least one second pattern extending in a second direction and overlapping at least a portion of the first pattern. The second pattern has a curved shape in the first direction and the second direction crosses the first direction. The first and second patterns form at least one cavity region defining a space therebetween and the first and second patterns form a mesh structure. |
| US10964769B2 |
Stretchable display device with insulation layer disposed on stretchable substrate
A stretchable display device includes a stretchable substrate including a plurality of island areas that are separated from each other and a hinge area connecting the plurality of island areas, a plurality of display units respectively located in each of the plurality of island areas, a wiring part connecting the plurality of display units and located at the hinge area, and an insulating layer between the stretchable substrate and the plurality of display units. The insulating layer includes an opening overlapping the hinge area. |
| US10964767B2 |
Organic EL display device and manufacturing method for organic EL display device
This organic-EL display apparatus comprises an organic-EL display panel including: a substrate that is provided with pixel drive circuits to drive respective pixels arranged in a matrix along each of a first direction and a second direction, and organic light-emitting elements being provided to each of the pixels and connected to any one of the pixel drive circuits. The organic-EL display panel comprises a signal output circuit to supply a signal to each of the pixel drive circuits arranged in a line along the first direction or the second direction. The signal output circuit includes thin film transistors and is formed around a display region on a surface of the substrate. The thin film transistors include a semiconductor layer including a region to be a channel between a source electrode and a drain electrode. The semiconductor layer is formed of amorphous silicon. |
| US10964766B2 |
One-way transparent display
A transparent emissive device is provided. The device may include one or more OLEDs having an anode, a cathode, and an organic emissive layer disposed between the anode and the cathode. In some configurations, the OLEDs may be non-transparent. The device may also include one or more locally transparent regions, which, in combination with the non-transparent OLEDs, provides an overall device transparency of 5% or more. |
| US10964764B2 |
Display panel and method of manufacturing thereof
A display panel and a method of manufacturing thereof are provided. The pixel defining block is formed by one-time exposing the column spacer column and the bank with a halftone mask, thereby omitting the process of individually forming the bank, and manufacturing time and manufacturing cost are reduced. The organic functional layer disposed above the bank is not directly contacted with the first electrode due to the bank structure, and the bank causes the defined region to be disconnected from the first electrode, and no current flows through the defined region. Thus, the defined region does not emit light, and the pixel region emits uniform light. The material of the bank is an organic photoresist, so hydrogen and oxygen are not introduced into the bank, and therefore not affect the thin film transistor, and improves stability of the display panel. |
| US10964763B2 |
Display panel, manufacturing method thereof, and display device
A display panel, a manufacturing method thereof and a display device are disclosed. The display panel includes a display backplane and a display cover assembled to be a cell. The display backplane includes a first base substrate, a pixel circuit layer, a first electrode layer, a light-emitting layer, a second transparent electrode layer, and a plurality of first pixel regions stacked on the first base substrate. The display cover includes a second base substrate, a plurality of optical sensing components and a plurality of second pixel regions on the second base substrate, the plurality of optical sensing components being arranged in the plurality of second pixel regions in one to one correspondence. |
| US10964761B2 |
Display device
A display device may include an active area including a first area having a special-form portion and a second area not having a special-form portion and a bezel area including a third area close to the first area and having a special-form portion and a fourth area close to the second area and not having a special-form portion. Furthermore, the display device may include a first power supply electrode positioned in the third area of the bezel area, a semiconductor pattern positioned in the third area of the bezel area and overlapping the first power supply electrode, and a plurality of dummy gate lines positioned between the semiconductor pattern and the first power supply electrode and overlapping the semiconductor pattern to form a first compensation capacitance and overlapping the first power supply electrode to form a second compensation capacitance. |
| US10964755B2 |
Organic light emitting diode panel including light emitting units and color filter layer, method for manufacturing the same, and display device
The present disclosure relates to an organic light emitting diode panel and a method for manufacturing the same, and a display device. The organic light emitting diode panel includes a light emitting function layer disposed on a substrate, wherein the light emitting function layer includes a first light emitting unit, a second light emitting unit, and a third light emitting unit, the first light emitting unit, the second light emitting unit, and the third light emitting unit emit light of three colors, a light exit side of at least one of the light emitting units is provided with a color filter layer that filters out blue light from light emitted by the at least one of the light emitting units. |
| US10964754B2 |
Solid-state image pickup element and manufacturing method thereof, and electronic device
The present disclosure relates to a solid-state image pickup element in order to enable inhibition of a variation in the photoelectric conversion characteristic of an organic photoelectric conversion film due to atmospheric exposure and a manufacturing method of the solid-state image pickup element, and an electronic device. The solid-state image pickup element includes: a photoelectric conversion film formed above a semiconductor substrate; and a sidewall sealing a side face of the photoelectric conversion film. The sidewall includes a re-deposited film of a film directly under the sidewall. The present disclosure is applicable to, for example, a CMOS image sensor or the like. |
| US10964751B2 |
Semiconductor device having plural dummy memory cells
A semiconductor device that includes a plurality of word lines disposed on a substrate in which p-type and n-type active regions are defined, and extends in a first direction. A plurality of bit lines is disposed on the plurality of word lines and extends in a second direction, perpendicular to the first direction. A plurality of memory cells is disposed between the plurality of word lines and the plurality of bit lines and each includes a data storage pattern. The plurality of memory cells includes a plurality of dummy memory cells and a plurality of main memory cells. An upper surface of the data storage pattern of the main memory cells is higher than an upper surface of the data storage pattern of the dummy memory cells. |
| US10964748B1 |
Electric field controllable spin filter tunnel junction magnetoresistive memory devices and methods of making the same
A magnetoresistive memory device includes a first electrode, a second electrode, and a layer stack containing an electric field-modulated magnetic transition layer and a ferroelectric insulator layer located between the first electrode and the second electrode, The electric field-modulated magnetic transition layer includes a non-metallic magnetic material having a ferromagnetic state and a non-ferromagnetic state with a state transition therebetween that depends on an external electric field. |
| US10964736B2 |
Image sensing device and method for forming the same
An image sensing device is disclosed. The image sensing device includes a semiconductor substrate including an active region, a first impurity region and a second impurity region formed in the active region, a photoelectric conversion region disposed over the semiconductor substrate to be directly coupled to the first impurity region and configured to generate photocharges in response to incident light and transmit the generated photocharges to the first impurity region, a switching element disposed coupled to the first impurity region and the second impurity region and configured to transmit the photocharges stored in the first impurity region to the second impurity region, an insulation structure disposed on sides of the photoelectric conversion region and a plurality of conductive lines disposed in the insulation structure and configured to read out an electrical image signal corresponding to the photocharges generated by the photoelectric conversion region. |
| US10964734B2 |
Image sensor
Disclosed is an image sensor including a first device isolation layer in a semiconductor layer and defining a plurality of pixel regions, a first photoelectric conversion device and a second photoelectric conversion device that are in each of the pixel regions, and a second device isolation layer in the semiconductor layer vertically overlapping the first photoelectric conversion device and the second photoelectric conversion device. |
| US10964732B2 |
Fabrication of thin-film electronic devices with non-destructive wafer reuse
Thin-film electronic devices such as LED devices and field effect transistor devices are fabricated using a non-destructive epitaxial lift-off technique that allows indefinite reuse of a growth substrate. The method includes providing an epitaxial protective layer on the growth substrate and a sacrificial release layer between the protective layer and an active device layer. After the device layer is released from the growth substrate, the protective layer is selectively etched to provide a newly exposed surface suitable for epitaxial growth of another device layer. The entire thickness of the growth substrate is preserved, enabling continued reuse. Inorganic thin-film device layers can be transferred to a flexible secondary substrate, enabling formation of curved inorganic optoelectronic devices. |
| US10964729B2 |
Display device and electronic device
A liquid crystal display device with high aperture ratio is provided. The liquid crystal display device includes a first conductive layer, a second conductive layer, and a liquid crystal element where a liquid crystal layer is positioned between a third conductive layer and a fourth conductive layer. The first to fourth conductive layers transmit visible light and include a region where the first to fourth conductive layers overlap with each other. The second conductive layer is positioned between the first conductive layer and the third conductive layer. An insulating layer is positioned between the first conductive layer and the second conductive layer. An insulating layer is positioned between the second conductive layer and the third conductive layer. Therefore, two capacitors each including the second conductive layer as an electrode are stacked. The two capacitors transmit light and overlap with the liquid crystal element; thus, aperture ratio can be increased. |
| US10964728B2 |
Display device
To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension. |
| US10964727B2 |
Flexible array substrate, with protection layer, preparation method thereof, and display device
A flexible array substrate includes an active area and a bending area. The bending area is adjacent to the active area. The bending area includes a protection layer and at least one signal line disposed on the base substrate. The protection layer is located on the at least one signal line at a side away from the base substrate. An orthographic projection of the protection layer on the base substrate has an overlapping region with an orthographic projection of the at least one signal line on the base substrate, the Young modulus of the protection layer is larger than or equal to the Young modulus of the at least one signal line. |
| US10964719B2 |
Semiconductor device
According to one embodiment, the semiconductor body of the first portion includes a first semiconductor part and a second semiconductor part. The first semiconductor part extends in the stacking direction. The second semiconductor part is provided between the first semiconductor part and the first electrode layer, and has an end located closer to the first electrode layer side than the first semiconductor part. The first insulating film of the second portion includes a first insulating part and a second insulating part. The first insulating part extends in the stacking direction. The second insulating part is provided between the first insulating part and the second electrode layer, and has an end located closer to the second electrode layer side than the first insulating part. |
| US10964715B2 |
Three-dimensional memory device containing channels with laterally pegged dielectric cores
A three-dimensional memory device includes a vertical semiconductor channel surrounding a vertical dielectric core. Laterally extending dielectric pegs structurally support the vertical semiconductor channel and the vertical dielectric core. The vertical semiconductor channel may be a single crystalline semiconductor channel. |
| US10964712B2 |
Memory system
According to one embodiment, a memory system includes a semiconductor memory and a controller. The semiconductor memory includes blocks each containing memory cells. The controller is configured to instruct the semiconductor memory to execute a first operation and a second operation. In the first operation and the second operation, the semiconductor memory selects at least one of the blocks, and applies at least one voltage to all memory cells contained in said selected blocks. A number of blocks to which said voltage is applied per unit time in the second operation is larger than that in the first operation. |
| US10964711B2 |
Semiconductor memory device
A semiconductor memory device includes a first insulating layer over a semiconductor substrate, a metal layer, an adhesive layer on a first region of the metal layer, a conductive layer on a second region of the metal layer and on the adhesive layer, a second insulating layer on the conductive layer, a plurality of wiring layers that are separated from each other and are stacked above the second insulating layer, a semiconductor layer that extends in a first direction perpendicular to the semiconductor substrate and includes a bottom surface connected to the conductive layer, a storage portion disposed between at least one of the plurality of wiring layers and the semiconductor layer, and a slit that extends in the first direction, includes aside surface in contact with the plurality of wiring layers and a bottom surface reaching the conductive layer, and is filled with an insulating material. |
| US10964709B2 |
Stacked FinFET EEPROM
A method for integrating a stack of fins to form an electrically erasable programmable read-only memory (EEPROM) device is presented. The method includes forming a stack of at least a first fin structure and a second fin structure over a semiconductor substrate, forming a sacrificial gate straddling the stack of at least the first fin structure and the second fin structure, forming a first conductivity type source/drain region to the first fin structure, and forming a second conductivity type source/drain to the second fin structure. The method further includes removing the sacrificial gate to form a gate opening, and forming a single floating gate in communication with a channel for each of the first and second fin structures. |
| US10964706B2 |
Three-dimensional semiconductor device including integrated circuit, transistors and transistor components and method of fabrication
A 3-D IC includes a substrate having a substrate surface. A first semiconductor device has a first electrical contact and is formed in a first area of the surface on a first plane substantially parallel to the substrate surface. A second semiconductor device has a second electrical contact and is formed in a second area of the surface on a second plane substantially parallel to the surface and vertically spaced from the first plane in a direction substantially perpendicular to the surface. A first electrode structure includes opposing top and bottom surfaces substantially parallel to the substrate surface, and a sidewall connecting the top and bottom surfaces such that the electrode structure forms a three dimensional electrode space. A conductive fill material is provided in the electrode space, and a dielectric layer electrically separates the conductive fill material into a first electrode electrically connected to the first contact of the first semiconductor device and a second electrode electrically connected to the second semiconductor device and electrically insulated from the first electrode. A first circuit terminal extends vertically from the top or bottom surface of the electrode structure and is electrically connected to the first electrode. |
| US10964704B2 |
Semiconductor device and method of fabricating the same
A semicondcutor device, and a method of fabricating the semiconductor device including forming on a substrate a device isolation layer defining a plurality of active regions; and forming a plurality of gate lines intersecting the active regions and buried in the substrate. The forming of the gate lines includes forming on the substrate a trench that intersects the active regions; forming a work-function control layer on a sidewall and a bottom surface of the trench; forming a conductive layer on the work-function control layer; sequentially forming a barrier layer and a source layer on the work-function control layer and the conductive layer, the source layer including a work-function control element; and diffusing the work-function control element from the source layer into an upper portion of the work-function control layer. |
| US10964703B2 |
Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device is provided. The method includes the actions of: providing a substrate comprising a preliminary pattern formed thereon; forming an opening through the preliminary pattern to expose an etch stop layer in the preliminary pattern; forming a dielectric layer on a sidewall of the opening; performing a first etching process to penetrate the etching stop layer and form a hole; performing a second etching process to expand a portion of the hole in the substrate; removing the dielectric layer; and depositing a conductive preliminary pattern on the sidewall of the opening and in the hole. |
| US10964700B2 |
Semiconductor device and memory device including the semiconductor device
To provide a semiconductor device that can reduce power consumption and retain data for a long time and a memory device including the semiconductor device. The semiconductor device includes a word line divider, a memory cell, a first wiring, and a second wiring. The word line divider is electrically connected to the first wiring and the second wiring. The memory cell includes a first transistor with a dual-gate structure. A first gate of the first transistor is electrically connected to the first wiring, and a second gate of the first transistor is electrically connected to the second wiring. The word line divider supplies a high-level potential or a low-level potential to the first wiring and supplies a predetermined potential to the second wiring, whereby a threshold voltage of the first transistor is changed. With such a configuration, a semiconductor device that can reduce power consumption and retain data for a long time is driven. |
| US10964688B2 |
Semiconductor device
A semiconductor device 100 has a power transistor N1 of vertical structure and a temperature detection element 10a configured to detect abnormal heat generation by the power transistor N1. The power transistor N1 includes a first electrode 208 formed on a first main surface side (front surface side) of a semiconductor substrate 200, a second electrode 209 formed on a second main surface side (rear surface side) of the semiconductor substrate 200, and pads 210a-210f positioned unevenly on the first electrode 208. The temperature detection element 10a is formed at a location of the highest heat generation by the power transistor N1, the location (near the pad 210b where it is easiest for current to be concentrated) being specified using the uneven positioning of the pads 210a-210f. |
| US10964687B2 |
FinFET ESD device with Schottky diode
A fin field effect transistor (FinFET) ESD device is disclosed. The device may include: a substrate; a silicon-controlled rectifier (SCR) over the substrate, the SCR including: a p-well region over the substrate; an n-well region laterally abutting the p-well region over the substrate; a first P+ doped region over the p-well region; a first N+ doped region over the p-well region; and a second N+ doped region over the p-well region; and a Schottky diode electrically coupled to the n-well region, wherein the Schottky diode spans the n-well region and the p-well region, and wherein the Schottky diode controls electrostatic discharge (ESD) between the second N+ doped region and the n-well region. |
| US10964682B2 |
Data storage system using wafer-level packaging
A data storage system is described that uses wafer-level packaging. In one embodiment an apparatus includes a silicon wafer, a plurality of memory cells formed directly on the wafer, an encapsulant formed over the memory cells, a plurality of wiring connections to connect the memory cells to an external interface, a memory controller, and an external interface. |
| US10964681B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes a substrate, first and second semiconductor chips, an adhesion layer, and a resin layer. The first and second semiconductor chips are provided on a surface of the substrate. The second semiconductor chip includes, on a side thereof facing the substrate, a first region and a second region that is recessed from the first region and is above at least part of the first semiconductor chip or at least part of a wire that electrically connects the first semiconductor chip and the substrate. The adhesion layer is provided at least between the first region of the second semiconductor chip and the substrate. The resin layer is on the surface of the substrate and enclosing the first and second semiconductor chips. |
| US10964680B2 |
Display device
The display device includes a flexible base layer including a first region and a second region located around the first; a display unit on one surface of the first region and including a light emitting element; a driving circuit on the second region and including a plurality of first bumps arranged in a first row and a plurality of second bumps arranged in a second row, the driving circuit includes a third bump in the first row and disposed outward relative to the plurality of first bumps, a first and second reference bump each disposed at a center of the plurality of first and second bumps that are disposed along a reference line defined in a column direction vertically intersecting a row direction, the remaining first and second bumps excluding the first reference bump and the second reference bump arranged to have a preset slope with respect to the reference line. |
| US10964677B2 |
Electronic packages with stacked sitffeners and methods of assembling same
A semiconductor package apparatus includes a passive device that is embedded in a bottom package stiffener, and a top stiffener is stacked above the bottom package stiffener. Electrical connection through the passive device is accomplished through the stiffeners to a semiconductor die that is seated upon an infield region of the semiconductor package substrate. |
| US10964676B2 |
Semiconductor structure and a method of making thereof
An integrated circuit package comprising a first substrate having a cavity; a second substrate; and one or more semiconductor device(s) and/or passive component (s) are coupled to the second substrate. The cavity is formed using two opposite side walls of the first substrate where two opposite sides of the cavity are kept open, the one or more semiconductor device(s) and/or passive component(s) is/are electrically coupled using redistribution layers, and the second substrate is located inside the cavity of the first substrate. |
| US10964674B2 |
Micro-LED display panel
A micro-LED display panel is disclosed. The micro-LED display panel includes: a plurality of unit substrates, each of which is formed with a plurality of electrode pads; a plurality of pixels, each of which includes a first micro-LED chip, a second micro-LED chip, and a third micro-LED chip mounted corresponding to the electrode pads; and a mesh arranged over the plurality of unit substrates. The mesh has pixel spacing portions covering at least some exposed areas of the plurality of unit substrates between the pixels and a plurality of openings accommodating the corresponding pixels. The micro-LED display panel is constructed such that the reflection of external light by the exposed areas of the substrate between the pixels and the exposed areas of the electrode pads disposed on the unit substrates is reduced. This construction improves the contrast characteristics and black characteristics of a display and achieves seamlessness in the micro-LED display panel. |
| US10964670B2 |
Semiconductor package and method of manufacturing the same
Disclosed are semiconductor packages and methods of manufacturing the same. The method of manufacturing a semiconductor package may include providing a carrier substrate having a trench formed on a first top surface of the carrier substrate, providing a first semiconductor chip on the carrier substrate, mounting at least one second semiconductor chip on a second top surface of the first semiconductor chip, coating a mold member to surround a first lateral surface of the first semiconductor chip and a second lateral surface of the at least one second semiconductor chip, and curing the mold member to form a mold layer. The trench may be provided along a first edge of the first semiconductor chip. The mold member may cover a second edge of a bottom surface the first semiconductor chip. |
| US10964661B2 |
Wire bonding apparatus, circuit for wire bonding apparatus, and method for manufacturing semiconductor device
The present invention comprises: a spool (10); a clamper (22); a torch electrode (31); a high-voltage power source circuit (30); a non-bonding detection circuit (40); a first changeover switch (50) switching a connection between the spool (10) and the high-voltage power source circuit (30) or the non-bonding detection circuit (40); and a relay (53) turning on/off a connection between the clamper (22) and a spool side of the first changeover switch (50), and comprises a control part (60) that sets the first changeover switch (50) to the high-voltage power source circuit side and turns off the relay (53) to generate electric discharge, and that sets the first changeover switch (50) to the non-bonding detection circuit side and turns on the relay (53) to perform non-bonding detection. Due to this configuration, electric corrosion of a wire clamper can be suppressed and non-bonding detection can be carried out with a simple configuration. |
| US10964660B1 |
Use of adhesive films for 3D pick and place assembly of electronic components
An electronic device assembly includes one or more discrete electronic components mounted onto a substrate having a 3D, 2.5D, or N×2D geometric classification. The substrate surface includes a specific mounting location to which an electronic component is to be electrically connected, where each specific mounting location includes one or more electrical connection points, such as contact pads. An anisotropic conductive film (ACF) is applied to the substrate surface covering the one or more electrical connection points of the specific mounting location, and the electronic component is placed on the ACF and properly aligned with the specific mounting location on the substrate surface. Pressure and heat are applied to compress the ACF to form an electrical interconnection between corresponding pairs of the electrical connection points on the electronic device and the specific mounting location on the substrate surface. |
| US10964653B2 |
Method of forming a semiconductor device comprising top conductive pads
A method for making a semiconductor device is disclosed. A substrate comprising semiconductor device elements is provided. A top conductive pad and an anti-reflective coating are patterned over the substrate. The anti-reflective coating is disposed on the top conductive pad. At least one passivation film is formed over the substrate and the anti-reflective coating. The at least one passivation film and the anti-reflective coating are etched to form a trench therein so as to expose a portion of the top conductive pad. |
| US10964652B2 |
Semiconductor device package and method of manufacturing the same
A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a circuit layer, a first package body, a first antenna and an electronic component. The circuit layer has a first surface and a second surface opposite to the first surface. The first package body is disposed on the first surface of the circuit layer. The first antenna penetrates the first package body and is electrically connected to the circuit layer. The electronic component is disposed on the second surface of the circuit layer. |
| US10964647B2 |
Dielectric crack stop for advanced interconnects
An interconnect level is provided on a surface of a substrate that has improved crack stop capability. The interconnect level includes at least one wiring region including an electrically conductive structure embedded in an interconnect dielectric material having a dielectric constant of less than 4.0, and a crack stop region laterally surrounding the wiring region. The crack stop region includes a crack stop dielectric material having a dielectric constant greater than the dielectric constant of the interconnect dielectric material. The crack stop region may be devoid of any metallic structure, or it may contain a metallic structure. The metallic structure in the crack stop region, which is embedded in the crack stop dielectric material, may be composed of a same, or different, electrically conductive metal or metal alloy as the electrically conductive structure embedded in the interconnect dielectric material. |
| US10964643B2 |
Semiconductor package and method of fabricating the same
Insulating layers of a redistribution layer of a semiconductor package may be formed as a polymer film having inorganic fillers formed therein. The inorganic fillers may trap reactive materials to inhibit and/or substantially prevent the metal conductors, such as chip pads of the semiconductor chip being packaged, from being damaged by the reactive material. As a result, the reliability and the durability of the semiconductor package may be improved. |
| US10964641B2 |
Method of forming semiconductor packages having through package vias
A semiconductor device and method for forming the semiconductor device is provided. The semiconductor device includes an integrated circuit having through vias adjacent to the integrated circuit die, wherein a molding compound is interposed between the integrated circuit die and the through vias. The through vias have a projection extending through a patterned layer, and the through vias may be offset from a surface of the patterned layer. The recess may be formed by selectively removing a seed layer used to form the through vias. |
| US10964640B2 |
Semiconductor device
A gate electrode is formed in a trench formed in a semiconductor substrate. A gate interlayer insulating film is formed to cover the gate electrode and the like. A gate interconnection and an emitter electrode are formed in contact with the gate interlayer insulating film. A glass coating film and a polyimide film are formed to cover the gate interconnection and the emitter electrode. A solder layer is formed to cover the polyimide film. The gate interconnection and the emitter electrode are each formed of a tungsten film, for example. |
| US10964639B2 |
Integrated circuits including via array and methods of manufacturing the same
An integrated circuit (IC) includes a via stack, and the via stack includes via arrays including a plurality of vias at the same level. A plurality of vias of a via array are arranged at intersections between tracks of adjacent conductive layers and arranged along a central line between the tracks. Also, a via overlap extends parallel to tracks of a conductive layer. Thus, the number of tracks sacrificed by the via array may be reduced, and the IC may have enhanced performance and a reduced area due to improved routability. |
| US10964638B2 |
Vertical memory device including common source line structure
An integrated circuit (IC) device includes: a channel region that extends on the substrate to penetrate a plurality of word lines; a bit line contact pad that contacts an upper surface of the channel region; a bit line that contacts the bit line contact pad and extends on the bit line contact pad in a direction parallel to the main surface of the substrate; a common source line that partially fills a word line cut region and has a height lower than that of the channel region; and a common source via contact that contacts an upper surface of the common source line in the word line cut region. |
| US10964637B2 |
Package and light emitting device
A package includes a first lead and a second lead. The first lead includes a first part and a second part connected to the first part. The second lead includes a third part and a fourth part connected to the third part. A molded body having a front surface and rear surface opposite to the front surface. The first part has a first terminal exposed from the rear surface. The first terminal is provided within an outer peripheral edge of the rear surface. The third part has a second terminal exposed from the rear surface. The second terminal is provided within the outer peripheral edge. The first lead or the second lead has a heat releasing terminal exposed from the rear surface. The heat releasing terminal is disposed between the first terminal and the second terminal to be spaced apart from the first terminal and the second terminal. |
| US10964634B2 |
Method of manufacturing circuit carrier with embedded semiconductor substrate
A circuit carrier with embedded substrate includes a circuit structure and an embedded substrate. The circuit structure includes a first dielectric layer, a first patterned circuit layer, a trench, and a plurality of first bumps. The first dielectric layer has a first surface and a second surface opposite to each other. The first patterned circuit layer is embedded in the first surface. The first bumps are disposed on the first surface and electrically connected to the first patterned circuit layer. The trench exposes a portion of the first dielectric layer. The embedded substrate is disposed in the trench and includes a plurality of second bumps. A chip package structure includes the above circuit carrier with embedded substrate. |
| US10964633B2 |
Wiring substrate
A wiring substrate includes: a wiring layer; an insulating layer covering the wiring layer, and including a first opening portion exposing the wiring layer and a second opening portion exposing the wiring layer, wherein a diameter of the second opening portion is larger than that of the first opening portion; a first metal layer formed in the first opening portion and the second opening portion, and having a recess in the second opening portion; and a second metal layer that is formed on the first metal layer formed in the first opening portion and the second opening portion, wherein a portion of the second metal layer fills the recess. The first metal layer and the second metal layer serve as connection terminals to be electrically connected to an electronic component. |
| US10964630B2 |
Semiconductor device having a conductor plate and semiconductor elements
A semiconductor device may include a first conductor plate on which a first semiconductor element, a second semiconductor element and a first circuit board are disposed, and a plurality of first signal terminals. A size of the second semiconductor is smaller than a size of the first semiconductor element. In a plan view along a direction perpendicular to the first conductor plate, the plurality of first signal terminals is located in a first direction with respect to the first semiconductor element. The second semiconductor element and the first circuit board are located between the plurality of first signal terminals and the first semiconductor element and are arranged along a second direction that is perpendicular to the first direction. A signal pad of the first semiconductor element is connected to a corresponding one of the plurality of first signal terminals via a signal transmission path of the first circuit board. |
| US10964629B2 |
Siderail with mold compound relief
A method of manufacturing a semiconductor package includes attaching semiconductor dies to an array of leadframes and positioning a clip array in alignment with the array of leadframes within a mold cavity, the clip array including clips that electrically connect to at least some of the semiconductor dies and a siderail along a perimeter of the clip array. The siderail forms a set of reliefs extending from an outer edge of the siderail to an inner edge of the siderail, the inner edge being adjacent to the array of leadframes. The method also includes injecting a mold compound into the mold cavity through a flow path including the set of reliefs of the siderail to form a mold block at least partially covering the semiconductor dies. |
| US10964625B2 |
Device and method for direct liquid cooling via metal channels
A device for direct liquid cooling is disclosed. The device includes a packaged assembly disposed on a substrate. The device also includes a metal channel layer having a plurality of channels disposed on top of the packaged assembly, and a top seal disposed on the metal channel layer. The top seal has at least one inlet and at least one outlet for direct liquid cooling. The metal channel layer includes copper or silver. The packaged assembly can also include silicon channels. In addition, the method of producing the device is also disclosed. |
| US10964613B2 |
Environmentally protected sensing device
A device includes a die comprising a sensor. The device also includes a substrate that is coupled to the die via the electrical coupling. The device further includes a packaging container. The packaging container and the substrate form a housing for the die. The packaging container comprises an opening that exposes at least a portion of the die to an environment external to the housing. The exposed surfaces of the die, interior of the housing, the electrical coupling, and the substrate to the environment external to the housing through the opening are coated with a conformal film. The conformal film prevents liquid, e.g., water, gas, etc., contact to the exposed surfaces of the die, the electrical coupling and the substrate. |
| US10964606B2 |
Film forming system, film forming method, and computer storage medium
A film forming system is to form an organic film on a substrate having a pattern formed on a surface thereof, includes: an organic film formation section configured to perform an organic film formation treatment on the substrate to form the organic film on the substrate; a film thickness measurement section configured to measure a film thickness of the organic film on the substrate; and an ultraviolet treatment section configured to perform an ultraviolet irradiation treatment on the organic film on the substrate to remove a surface of the organic film. In the film forming system, the organic film formation section, the film thickness measurement section, and the ultraviolet treatment section are disposed side by side in this order along a transfer direction of the substrate. |
| US10964605B1 |
Wafer-scale testing of photonic integrated circuits using horizontal spot-size converters
Disclosed herein are methods, structures, and devices for wafer scale testing of photonic integrated circuits. |
| US10964604B2 |
Magnetic storage element, magnetic storage device, electronic device, and method of manufacturing magnetic storage element
To provide a magnetic storage element, a magnetic storage device, and an electronic device which store multi-value information with a simpler structure. A magnetic storage element provided with a plurality of tunnel junction elements each of which includes a reference layer having a fixed magnetization direction, a storage layer capable of reversing a magnetization direction, and an insulator layer interposed between the reference layer and the storage layer, the plurality of tunnel junction elements electrically connected to each other in parallel, in which the plurality of tunnel junction elements has film configurations identical to each other, respective layers of the film configurations formed by using a same material to have a same thickness, and each of cross-sectional shapes obtained by cutting the plurality of tunnel junction elements in a laminating direction is a polygonal shape including upper and lower sides parallel to each other with a ratio of the lower side to the upper side different for each of the plurality of tunnel junction elements. |
| US10964603B2 |
Hybrid gate stack integration for stacked vertical transport field-effect transistors
A method of forming a semiconductor structure includes forming one or more vertical fins each including a first semiconductor layer providing a vertical transport channel for a lower vertical transport field-effect transistor (VTFET) of a stacked VTFET structure, an isolation layer over the first semiconductor layer, and a second semiconductor layer over the isolation layer providing a vertical transport channel for an upper VTFET of the stacked VTFET structure. The method also includes forming a first gate stack including a first gate dielectric layer and a first gate conductor layer surrounding a portion of the first semiconductor layer of the vertical fins. The method further includes forming a second gate stack including a second gate dielectric layer and a second gate conductor layer surrounding a portion of the second semiconductor layer of the vertical fins. The first gate conductor layer and the second gate conductor layer are the same material. |
| US10964598B2 |
Methods of forming source/drain regions of a FinFET device and the resulting structures
One illustrative method disclosed herein includes forming at least one fin, forming a first recessed layer of insulating material adjacent the at least one fin and forming epi semiconductor material on the at least one fin. In this example, the method also includes forming a second recessed layer of insulating material above the first recessed layer of insulating material, wherein at least a portion of the epi semiconductor material is positioned above a level of the upper surface of the second recessed layer of insulating material, and forming a source/drain contact structure above the second recessed layer of insulating material, wherein the source/drain contact structure is conductively coupled to the epi semiconductor material. |
| US10964595B2 |
Method for singulating packaged integrated circuits and resulting structures
A method of packaging an integrated circuit includes forming a first integrated circuit and a second integrated circuit on a wafer, the first and second integrated circuit separated by a singulation region. The method includes covering the first and second integrated circuits with a molding compound, and sawing through the molding compound and a top portion of the wafer using a beveled saw blade, while leaving a bottom portion of the wafer remaining. The method further includes sawing through the bottom portion of the wafer using a second saw blade, the second saw blade having a thickness that is less than a thickness of the beveled saw blade. The resulting structure is within the scope of the present disclosure. |
| US10964594B2 |
Methods of packaging semiconductor devices including placing semiconductor devices into die caves
Methods of packaging semiconductor devices and structures thereof are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a carrier wafer, providing a plurality of dies, and forming a die cave material over the carrier wafer. A plurality of die caves is formed in the die cave material. At least one of the plurality of dies is placed within each of the plurality of die caves in the die cave material. A plurality of packages is formed, each of the plurality of packages being formed over a respective at least one of the plurality of dies. |
| US10964591B2 |
Processes for reducing leakage and improving adhesion
A method includes forming a metal seed layer on a dielectric layer, and forming a patterned mask over the metal seed layer. An opening in the patterned mask is over a first portion of the dielectric layer, and the patterned mask overlaps a second portion of the dielectric layer. The method further includes plating a metal region in the opening, removing the patterned mask to expose portions of the metal seed layer, etching the exposed portions of the metal seed layer, performing a plasma treatment on a surface of the second portion of the dielectric layer, and performing an etching process on the surface of the second portion of the dielectric layer. |
| US10964587B2 |
Atomic layer deposition for low-K trench protection during etch
An atomic layer deposition (ALD) technique is used to deposit one or more layers on hard mask layers and the sidewalls of low-K dielectric trench as part of the trench etch process. The ALD layer(s) can prevent the hard mask from being eroded during various hard mask open processes. Further, the ALD layer(s) may be utilized to prevent the low-K dielectric sidewall from being laterally etched during the low-K dielectric trench etch. Hence, better control of the trench profile and better critical dimension control may be provided. |
| US10964583B2 |
Micro-transfer-printable flip-chip structures and methods
In certain embodiments, a method of making a semiconductor structure suitable for transfer printing (e.g., micro-transfer printing) includes providing a support substrate and disposing and processing one or more semiconductor layers on the support substrate to make a completed semiconductor device. A patterned release layer and, optionally, a capping layer are disposed on or over the completed semiconductor device and the patterned release layer or capping layer, if present, are bonded to a handle substrate with a bonding layer. The support substrate is removed to expose the completed semiconductor device and, in some embodiments, a portion of the patterned release layer. In some embodiments, an entry path is formed to expose a portion of the patterned release layer. In some embodiments, the release layer is etched and the completed semiconductor devices transfer printed (e.g., micro-transfer printed) from the handle substrate to a destination substrate. |
| US10964582B2 |
Transfer substrate utilizing selectable surface adhesion transfer elements
An apparatus includes a transfer substrate with two or more transfer elements. Each of the transfer elements includes an adhesion element having a first surface adhesion at a first temperature and a second surface adhesion at a second temperature. The second surface adhesion less than the first surface adhesion. Each transfer element has a thermal element operable to change a temperature of the adhesion element in response to an input. A controller is coupled to provide the inputs to the thermal elements of the two or more transfer elements to cause a subset of the transfer elements to selectably hold objects to and release the objects from the transfer substrate in response to changes between the first and second surface adhesion of the subset of the transfer elements. |
| US10964581B1 |
Self-aligned adhesive layer formation in light-emitting structure fabrication
Techniques are disclosed for fabricating light-emitting structures in which recesses in a carrier adhesive layer are formed after singulation of the light-emitting structures. These recesses are self-aligned with the light-emitting structures and enable a pickup adhesive layer to be formed on each of the light-emitting structures without the need for creating an etching mask or etching the pickup adhesive layer. |
| US10964570B2 |
Semiconductor wafer storage system and method of supplying fluid for semiconductor wafer storage
A semiconductor wafer storage system includes a container that provides a space in which a semiconductor wafer is to be stored, a fluid supply that provides a fluid to the container, a connection part that receives the fluid from the fluid supply and transfers the fluid to the container, and a nozzle part that connects the connection part to the container. The container may include a coupling plate to which the nozzle part is coupled, and the nozzle part may include a first nozzle and a second nozzle. |
| US10964568B2 |
Substrate carrier
A substrate carrier includes a substrate carrier plate having a front-sided substrate carrier surface on which at least one substrate receiving area is provided for receiving a respective substrate. The substrate carrier is intended to enable a secure support of the substrate and a simple, damage-free removal of the substrate from the substrate carrier when operating in a fast manner, preferably without impairment of the characteristics of the substrate or the substrate processing. Therefore, the substrate receiving area has an interior area and an exterior area running around the interior area. The exterior area has spaced plateaus which are raised compared to a surface of the interior area for the support of edge areas of the substrates. Ventilation channels are provided between the plateaus. |
| US10964566B2 |
Machine learning on overlay virtual metrology
The current disclosure describes techniques for managing vertical alignment or overlay in semiconductor manufacturing using machine learning. Alignments of interconnection features in a fan-out WLP process are evaluated and managed through the disclosed techniques. Big data and neural networks system are used to correlate the overlay error source factors with overlay metrology categories. The overlay error source factors include tool related overlay source factors, wafer or die related overlay source factors and processing context related overlay error source factors. |
| US10964565B2 |
Substrate processing apparatus and method
Disclosed is a substrate processing apparatus that includes an interference member for minimizing a collision between a descending flow of gas supplied by a fan unit and a gas flow directed toward a transfer space from the inside of a container. |
| US10964564B2 |
Heating treatment apparatus and heating treatment method
A side surface unit of a heat treatment space S is formed by a shutter member 250 including an outer shutter 260 and an inner shutter 270. Supply air A is supplied as a horizontal laminar flow toward a wafer W from a lower end side of the shutter member 250, that is, from a gap d1 located on the level with the wafer W placed on a heat plate 211 of a mounting table 210. Supply air B is supplied into the heat treatment space S from an upper end side of the shutter member 250, that is, from a gap d2 positioned higher than the wafer W. A ratio between a flow rate of the supply air A and a flow rate of the supply air B is 4:1. |
| US10964561B2 |
Integrated circuit controlled ejection system (ICCES) for massively parallel integrated circuit assembly (MPICA)
Methods, systems, and apparatuses are described for integrated circuit controlled ejection system (ICCES) for massively parallel integrated circuit assembly (MPICA). A unique Integrated Circuit (IC) die ejection head assembly system is described, which utilizes Three-Dimensional (3D) printing to achieve very high resolution manufacturing to meet the precision tolerances required for very small IC die sizes. |
| US10964560B2 |
Substrate chuck and substrate bonding system including the same
Provided are a substrate chuck and a substrate bonding system including the substrate chuck. The substrate bonding system includes a lower substrate chuck and an upper substrate chuck disposed on the lower substrate chuck. The lower substrate chuck has a non-flat lower substrate contact surface, and the upper substrate chuck has a flat upper substrate contact surface. |
| US10964557B2 |
Substrate processing apparatus and substrate processing method
The present disclosure relates to a substrate processing apparatus and a substrate processing method. The substrate processing apparatus according to the exemplary embodiment of the present disclosure may include: a processing liquid supply tube; a nozzle unit which is supplied with a processing liquid from the processing liquid supply tube and discharges the processing liquid to the substrate; and a light source unit which is provided to irradiate the processing liquid discharged from the nozzle unit with ultraviolet rays. According to the present disclosure, the processing liquid, which is electrified while passing the processing liquid supply tube, is irradiated with ultraviolet rays, such that electricity is eliminated from the electrified processing liquid, and as a result, it is possible to minimize a problem that the substrate is contaminated by peripheral particles or arcing occurs on the substrate. |
| US10964555B2 |
Water jet processing apparatus
Disclosed herein is a water jet processing apparatus including a chuck table that holds a workpiece by a holding surface, a high-pressure water injection unit having a high-pressure water nozzle that injects high-pressure water along planned dividing lines of the workpiece to remove burrs, a processing feed unit that carries out processing feed of the chuck table in an X-direction, and an indexing feed unit that carries out indexing feed of the high-pressure water nozzle in a Y-direction. The water jet processing apparatus also includes a movement unit that moves the high-pressure water nozzle in a Z-direction, an alignment unit that images the workpiece, a cassette placement region in which a cassette that houses plural workpieces is placed, and a conveying unit that conveys the workpiece between the cassette and the chuck table. |
| US10964553B2 |
Manufacturing method of semiconductor device and semiconductor device
A manufacturing method of a semiconductor device includes mounting a semiconductor element on a first electrode disposed on a first surface of a substrate; preparing a metal plate including a main body part and a projection part; mounting the metal plate on the first surface side of the substrate, by joining the projection part to a second electrode that is disposed on the first surface of the substrate; sealing the semiconductor element and the projection part with a sealing resin; and forming an electrode terminal made of a base end part that is connected to the second electrode and has a side surface that is covered by the sealing resin, and a tip end part that is integrally formed with the base end part and that projects from a front surface of the sealing resin, by etching the main body part excluding a portion overlapping with the projection part. |
| US10964552B2 |
Methods for producing laminate and substrate for mounting a semiconductor device
A method for producing a laminate that includes at least the following: providing a first intermediate laminate comprising a carrier substrate including a support therein and a peelable metal layer formed on at least one surface of the carrier substrate; forming, in a section not serving as a product of the first intermediate laminate, a first hole reaching at least the support in the carrier substrate from a surface of the first intermediate laminate, to prepare a second intermediate laminate with the first hole; stacking and disposing on the surface where the first hole is formed of the second intermediate laminate, an insulating material and a metal foil in this order when viewed from the surface; and pressurizing the second intermediate laminate, the insulating material and the metal foil in the stacking direction thereof with heating, to prepare a third intermediate laminate where the first hole is filled with the insulating material; and performing treatment with a chemical agent on the third intermediate laminate. |
| US10964548B2 |
Fin field-effect transistor device and method
A method includes forming a semiconductor capping layer over a first fin in a first region of a substrate, forming a dielectric layer over the semiconductor capping layer, and forming an insulation material over the dielectric layer, an upper surface of the insulation material extending further away from the substrate than an upper surface of the first fin. The method further includes recessing the insulation material to expose a top portion of the first fin, and forming a gate structure over the top portion of the first fin. |
| US10964541B2 |
Method to improve adhesion of photoresist on silicon substrate for extreme ultraviolet and electron beam lithography
An etch process that includes removing an oxide containing surface layer from a semiconductor surface to be etched by applying a hydrofluoric (HF) based chemistry, wherein the hydrofluoric (HF) based chemistry terminates the semiconductor surface to be etched with silicon-hydrogen bonds, and applying a vapor priming agent bearing chemical functionality based on the group consisting of alkynes, alcohols and a combination thereof to convert the silane terminated surface to a hydrophobic organic surface. The method continues with forming a photoresist layer on the hydrophobic organic surface; and patterning the photoresist layer. Thereafter, the patterned portions of the photoresist are developed to provide an etch mask. The portions of the semiconductor surface exposed by the etch mask are then etched. |
| US10964534B2 |
Enhanced thin film deposition
Methods of producing metal-containing thin films with low impurity contents on a substrate by atomic layer deposition (ALD) are provided. The methods preferably comprise contacting a substrate with alternating and sequential pulses of a metal source chemical, a second source chemical and a deposition enhancing agent. The deposition enhancing agent is preferably selected from the group consisting of hydrocarbons, hydrogen, hydrogen plasma, hydrogen radicals, silanes, germanium compounds, nitrogen compounds, and boron compounds. In some embodiments, the deposition-enhancing agent reacts with halide contaminants in the growing thin film, improving film properties. |
| US10964531B1 |
Method of manufacturing semiconductor device by supplying gas
There is provided a technique that includes: substrate mounting plate where substrates are arranged circumferentially; rotator rotating the substrate mounting plate; gas supply structure disposed above the substrate mounting plate from center to outer periphery thereof; gas supplier including the gas supply structure and controlling supply amount of gas supplied from the gas supply structure; gas exhaust structure installed above the substrate mounting plate at downstream side of the gas supply structure in rotation direction; gas exhauster including the gas exhaust structure and controlling exhaust amount of gas exhausted from the gas exhaust structure; and gas main component amount controller including the gas supplier and the gas exhauster and controlling gas main component amount in the gas supplied from the gas supply structure to the substrates and the gas main component amount in the gas supplied to the substrates from the center to the outer periphery of the mounting plate. |
| US10964530B2 |
Method of forming blocking silicon oxide film, and storage medium
A method of forming a blocking silicon oxide film on a target surface on which a silicon oxide film and a silicon nitride film are exposed, includes: placing a workpiece having the target surface on which the silicon oxide film and the silicon nitride film are exposed in a processing container under a depressurized atmosphere; forming a spacer polysilicon film to be a sacrificial film on the target surface on which the silicon oxide film and the silicon nitride film are exposed; and substituting the spacer polysilicon film with a substitution silicon oxide film by supplying thermal energy, oxygen radicals and hydrogen radicals onto the workpiece. |
| US10964527B2 |
Residual removal
Methods for removing residuals after a selective deposition process are provided. In one embodiment, the method includes performing a selective deposition process to form a metal containing dielectric material at a first location of a substrate and performing a residual removal process to remove residuals from a second location of the substrate. |
| US10964522B2 |
High resolution electron energy analyzer
A high-resolution electron energy analyzer is disclosed. In one embodiment, the electron energy analyzer includes an electrostatic lens configured to generate an energy-analyzing field region, decelerate electrons of an electron beam generated by an electron source, and direct the decelerated electrons of the electron beam to the energy-analyzing field region. In another embodiment, the electron energy analyzer includes an electron detector configured to receive one or more electrons passed through the energy-analyzing field region. In another embodiment, the electron detector is further configured to generate one or more signals based on the one or more received electrons. |
| US10964521B2 |
Mass spectrometer
The mass spectrometer includes an ionization unit, an ion transport unit, and a mass separation unit that separates transported ions according to a mass-to-charge ratio. The ion transport unit includes a transport electrode member, a voltage generator that applies a voltage to the transport electrode member, and a voltage controller that changes a voltage applied to the transport electrode member while ionization is performed. The voltage controller switches between a first voltage state in which charged particles generated in the ionization unit can enter the mass separation unit, and a second voltage state in which the charged particles cannot enter the mass separation unit, and switches a voltage state of the transport electrode member between the first voltage state and the second voltage state. |
| US10964515B2 |
Plasma diagnostic system and method
The present invention relates to a plasma diagnosing system and method, and more particularly, to a system and a method for diagnosing plasma in real time using a change in a capacitance sensed by an electrode using a reference waveform having a frequency different from a plasma discharging frequency band region. The sensed capacitance varies before and after discharging plasma and the plasma is diagnosed using the change in capacitance in real time. |
| US10964514B2 |
Electrode for plasma processing chamber
An electrode for transmitting radiofrequency power to a plasma processing region includes a plate formed of semiconducting material and a high electrical conductivity layer formed on a top surface of the plate and integral with the plate. The high electrical conductivity layer has a lower electrical resistance than the semiconducting material of the plate. The electrode includes a distribution of through-holes. Each through-hole extends through an entire thickness of the electrode from a top surface of the high electrical conductivity layer to a bottom surface of the plate. In some embodiments, the plate can be formed of a silicon material and the high electrical conductivity layer can be a silicide material formed from the silicon material of the plate. |
| US10964513B2 |
Plasma processing apparatus
Provided is a plasma processing apparatus including a processing chamber which is disposed in a vacuum vessel and able to be decompressed, a sample stage on a top surface of which a wafer to be processed is mounted, an opening which is configured to supply a heat-transfer gas to a gap between the wafer and the top surface of the sample stage, a regulator which regulates a flow rate of the heat-transfer gas, and a controller which regulates an operation of the regulator based on a pressure of the gap detected using an amount of the heat-transfer gas leaking from the regulator to the processing chamber through the gap while the wafer is mounted on the sample stage and an amount of the heat-transfer gas supplied from the opening to the processing chamber while the wafer is not mounted on the sample stage. |
| US10964503B2 |
Relay
A relay has a case, a first fixed terminal including a first fixed contact, a second fixed terminal including a second fixed contact, a movable touch piece including a first movable contact that is disposed facing the first fixed contact and a second movable contact that is disposed facing the second fixed contact, the movable touch piece being disposed in the case and disposed so as to be movable in a contact direction in which the first movable contact and the second movable contact come into contact with the first fixed contact and the second fixed contact and a separation direction in which the first movable contact and the second movable contact separate from the first fixed contact and the second fixed contact. The first fixed terminal includes a first contact support configured to support the first fixed contact. |
| US10964499B2 |
Detection circuit module for use in detecting an operational status of a household appliance door
A detection circuit module for use with a household appliance door to detect when the door is closed and/or locked, the detection circuit module having a first and a second contact configured for electrical connection with the household appliance door so as to be operable with the household appliance door, the detection circuit module including: a door closing switch arranged electrically in series between the first connecting contact and an actuator; a door locking switch arranged electrically in series between the actuator member and the second connecting contact; and a diode arranged in series with the actuator and the second connecting contact and the diode being arranged electrically in parallel with the door locking switch. |
| US10964493B2 |
Arc-quenching device for direct current switch
An arc quenching device, which prevents a load device from displaying an unnecessary behavior during starting of a power supply, includes: a semiconductor switch connected in parallel to a first switch which is mechanical; a power supply circuit configured to use a voltage which is generated between both contact points of the first switch to output a voltage which causes the semiconductor switch to turn on; and a second switch configured to cause its open state to prevent the semiconductor switch from turning on. |
| US10964488B2 |
Electrochemical and capacitative energy storage device and method of manufacture
Devices which internally control and regulate voltage of a super-capacitor cell or stack thereof during charge-discharge cycles, methods for controlling and regulating voltage of a super-capacitor cell or stack thereof with these devices and methods for production of the devices are provided. |
| US10964480B2 |
Capacitor module having intervening inward facing portion
A capacitor module is provided which includes a plurality of capacitors, a capacitor case, and a sealing resin with which the capacitor case is filled to seal the capacitors in the capacitor case. The capacitor case includes inward-facing portions of an outer wall thereof each of which bulges or protrudes between every adjacent two of the capacitors. As viewed in a height-wise direction perpendicular both to a direction in which the inward-facing portions protrude and to a direction in which two of the capacitors adjacent each other across one of the inward-facing portions are aligned, the intervening inward-facing portion traverses a line segment passing through centers of the two adjacent capacitors. This structure minimizes thermal interference between the capacitors. |
| US10964477B2 |
Dielectric composition and electronic component
A dielectric composition comprising a complex oxide represented by a general formula of AaBbC4O15+α and an oxide including aluminum, in which “A” at least includes Ba, “B” at least includes Zr, and “C” at least includes Nb, “a” is 2.50 or more and 3.50 or less, and “b” is 0.50 or more, and 1.50 or less. |
| US10964470B2 |
Coil and method for forming a coil
A coil includes first and second coil elements both of which are formed by feeding one piece of a rectangular wire rod by a predetermined amount and winding rectangularly in an edgewise manner using winding heads, the first and second coil elements being wound in opposite directions from each other. A winding terminating end point of the first coil element is bent approximately 90 degrees in a direction opposite to a winding direction of the first coil element, and is connected to a winding terminating end point of the second coil element in a same flat plane. The second coil element includes an offset portion of the rectangular wire rod that is offset in a plan view from a side of the second coil element. |
| US10964467B2 |
Solenoid assembly with included constant-current controller circuit
A constant-current controller that supplies a constant-current to a solenoid driver for use with an electromechanical device. The controller comprises a PCB containing a constant-current control circuit. The circuit comprises a GaNFET primary switch and a secondary switch. The PCB is integrated with and made a part of the solenoid driver. A standard electromechanical device may be converted to a constant-current controlled electromechanical device by exchanging the solenoid driver. |
| US10964466B2 |
Insulation treatment method for helium inlet pipe of superconducting magnet
Disclosed is an insulation treatment method for a helium inlet pipe of a superconducting magnet. The superconducting magnet has a structure with varying T-shaped cross section. The irregular parts of the magnet are filled with G10 to reduce the difficulty in the insulation treatment caused by the irregular shape. Moreover, a skirt-shaped insulating material is provided around the metal conduit to overcome the reduction in the insulation electrical performance caused by the defects in the insulation treatment for such irregular parts. The application designs a sample structure for insulation treatment, and can wrap the superconducting magnet having the T-shaped varying cross-section with insulating materials before vacuum pressure impregnation, meeting special requirements of high-voltage insulation treatment for the superconducting magnet with a complex structure under low temperature and vacuum environment. |
| US10964464B2 |
Magnet and motor using the same
The present invention aims to provide a novel magnet, whose surface's insulating property can be increased, and a motor using the same. The present invention provides a magnet comprising a magnet element containing a rare earth element R, a transition metal element T and boron B, and a phosphate layer including manganese-containing phosphate, wherein the phosphate layer is provided on the surface of the magnet element, and the thickness of the phosphate layer is 0.5 μm or more. |
| US10964462B2 |
Production method for a resistor, resistor and corresponding production installation
The invention concerns a manufacturing method for an electrical resistor (1), in particular for a low-resistance current measuring resistor, with the following steps (S1-S4): a) providing a plate-shaped base part (9) for the resistor (1), the base part (9) having a certain thickness and corresponding to the thickness a certain value of an electrical component characteristic (R), the thickness-dependent electrical component characteristic (R) preferably being the electrical resistance (1) of the base part (9), the sheet resistance or the transverse resistance, and b) rolling the base part (9) with a certain degree of rolling (AG), the thickness of the base part (9) decreasing in accordance with the degree of rolling (AG) and the value of the component characteristic (R) changing accordingly, c) measuring the thickness-dependent electrical component characteristic (R) on the rolled base part (9), and d) adaptation of the degree of rolling (AG) as a function of the measured electrical component characteristic (R), in particular in the context of a closed-loop control system with the electrical component characteristic (R) as controlled variable and the degree of rolling (AG) as control variable. Furthermore, the invention includes an appropriately manufactured resistor and a corresponding production plant. |
| US10964458B2 |
Resistor unit
A resistor unit has a case with an opening face, a resistor housed in the case, cement that is filled inside the case to bury the resistor, and a lead-out terminal that is connected to the resistor in the cement and is led out of the cement through the opening face of the case. A lead-out terminal has a protrusion portion that protrudes in an opening direction that is across the opening face, and an extension portion that extends parallel to the opening face from the protrusion portion. |
| US10964457B2 |
Chip resistor
The chip resistor according to the present disclosure includes insulating substrate, a pair of upper face electrodes provided on both ends of one face of insulating substrate, and resistor provided on the one face of insulating substrate and connected between the pair of upper face electrodes. The chip resistor includes a pair of end-face electrodes provided on both end faces of insulating substrate to be electrically connected to the pair of upper face electrodes, and plating layer formed on portions of the pair of upper face electrodes and faces of the pair of end-face electrodes. Insulating film formed of a resin is provided on another face opposite to the one face of insulating substrate. Insulating film has a thickness of more than or equal to 30 μm. |
| US10964456B2 |
Grommet and wire harness
A grommet arranged between a pipe and an outer cover that surrounds a braided member connected to the pipe, the grommet including a body with a pass-through space through which a caulking portion of a caulking ring for caulking the braided member to an end portion of the pipe can move in an axial direction. |
| US10964449B2 |
Resin composition, insulated electric wire and method of manufacturing insulated electric wire
An insulated electric wire includes a conductor and an insulating layer coated in periphery of the conductor. The insulating layer is made of a resin composition containing a base polymer and a flame retardant. The flame retardant is made of silane-treated aluminum hydroxide, aluminum hydroxide treated with a treatment agent other than a silane coupling agent and/or untreated aluminum hydroxide. The base polymer contains a polymer having a polar group. The resin composition contains the flame retardant, a content of which is more than 40 parts by mass and equal to or less than 80 parts by mass per 100 parts by mass of the base polymer. The resin composition contains the silane-treated aluminum hydroxide, a content of which is equal to or more than 10 parts by mass and equal to or less than 70 parts by mass per 100 parts by mass of the flame retardant. |
| US10964448B1 |
High density ribbon cable
A ribbon cable with desirable properties including mechanical integrity, resistance to propagation of a flame, and a compact structure is provided. The ribbon cable may be formed by wrapping a flexible layer around a plurality of parallel cable cores. The flexible layer may be adhered to itself and may conform to the outer surfaces of the cores. The flexible layer may, at its edges, overlap such that the edges may be readily adhered to each other. Some or all of the cable cores may be individually shielded. The cable may also include metal foil adjacent one or two sides of the cable cores or, in some instances, encircling the cable cores. |
| US10964446B2 |
Electric wire conductor, covered electric wire, and wiring harness
Provided are an electric wire conductor having both flexibility and a space-saving property, a covered electric wire, and a wiring harness containing such an electric wire conductor. The electric wire conductor contains a plurality of elemental wires, and has a flat portion in which a cross-section intersecting an axial direction of the wire strand has a flat shape. Deformation ratios of the elemental wires at peripheral end parts in a width direction are 70% or lower of deformation ratios of the elemental wires at center parts. Further, a covered electric wire contains the electric wire conductor and an insulator covering the electric wire conductor. |
| US10964445B2 |
Heating element and manufacturing method therefor
The present disclosure relates to a method for manufacturing a heating element, which includes the steps of: preparing a first bonding film; forming a conductive heating pattern on the first bonding film; and laminating a second bonding film and a transparent substrate on the first bonding film, where the second bonding film is disposed on a surface opposite to the surface provided with the conductive heating pattern of the first bonding film, and the conductive heating pattern is formed by using an adhesive film having an adhesive strength decrement of 30% or greater by an external stimulus based on adhesive strength before the external stimulus. |
| US10964435B2 |
Method of monitoring the behavior of a cohort group of members
A method of monitoring the behavior of a cohort group of members, including: a cohort group behavior monitoring step during which the behavior of the members of the cohort group of members is monitored so as to provide behavior data; and a vision information generating step during which vision information relating to the vision of the members of the cohort group is generated based on the monitoring of the behavior data over time. |
| US10964434B2 |
Systems and methods for extraction of clinical knowledge with reimbursement potential
A computerized Medical Information Navigation Engine (“MINE”) extracts clinical knowledge, by identifying coded elements with reimbursement potential contributing to payoff based on clinical history, and subtracting coded elements documented in an encounter from the coded elements, based on business logic. The MINE sorts the remaining coded elements in accordance with one optimization criteria to payoff based on clinical history. |
| US10964431B2 |
Technique for linking electrodes together during programming of neurostimulation system
An external control device for use with a neurostimulator coupled to a plurality of electrodes capable of conveying electrical stimulation energy into tissue in which the electrodes are implanted. The external control device comprises a user interface including at least one control element, a processor configured for independently assigning stimulation amplitude values to a first set of the electrodes, for linking the first set of electrodes together in response to the actuation of the at least one control element, and for preventing the stimulation amplitude values of the first linked set of electrodes from being varied relative to each other, and output circuitry configured for transmitting the stimulation amplitude values to the neurostimulator. |
| US10964430B2 |
System and method for determining computer system compatibility
Systems and methods, as well as devices, are described for computer system compatibility. Computer systems exchange messages over a network or communication link according to a communication standard. A declarations of how a communication standard is implemented by a trading partner computer system is received by a host provider computer system, and an ontology model of the implementation is generated based at least in part on information in the declaration. The ontology models are queried to cause the provision of query responses indicative of differences between the trading partner implementation and a host provider implementation of the communication standard. Indications of communication compatibility between the computer systems are generated based on results of the queries against the ontology model. The indications may include augmented enforcement libraries to be implemented by the trading partner for messaging interoperability. |
| US10964429B2 |
Acceptance, commissioning, and ongoing benchmarking of a linear accelerator (LINAC) using an electronic portal imaging device (EPID)
The present invention is a method or system for acceptance testing and commissioning of a LINAC and treatment planning system (TPS). For a LINAC commissioning, the present invention collects reference data from a fully calibrated LINAC and compares the reference data with machine performance data collected from a testing LINAC. The compared results are analyzed to assess accuracy of the testing LINAC. For a TPS commissioning, the present invention collects standard reference data from standard treatment plans and standard input data and compares the standard reference data with results from standard tests that are performed by a testing treatment plan system. The compares results are analyzed to assess accuracy of the testing treatment plan system. |
| US10964428B2 |
Merging messages into cache and generating user interface using the cache
Various techniques for facilitating communication with and across a clinical environment and a cloud environment are described. For example, a method for generating a user interface based on messages from a clinical environment is described. A data flow manager (DFM) in the cloud environment may check whether the information in a message received from a connectivity adapter in the clinical environment can be used to generate a user interface (UI). If the information can be used to generate a UI, the DFM may merge the information into the cache. The information merged into the cache can subsequently be used to generate a UI in response to a user request. |
| US10964426B2 |
Methods and systems to sense situational awareness with a dual doppler and control for optimized operations
Certain examples provide systems and methods to monitor and control hospital operational systems based on occupancy data and medical orders. An example healthcare workflow management and reasoning system includes a workflow engine including a first particularly programmed processor to monitor one or more medical orders from one or more hospital information systems to identify a condition indicating that a first patient in a first room is ready for a clinical activity such as discharge. The example healthcare workflow management and reasoning system includes a sensing component including a second processor to gather occupancy data regarding the first patient in the first room and transmit the occupancy data to the workflow engine. The example workflow engine controls one or more hospital operational systems to trigger cleaning of the first room, lighting settings for the first room, and transportation of a second patient to the first room based on occupancy data from the sensing component. |
| US10964422B2 |
Apparatus and method for user exercise monitoring
An apparatus (2) for user exercise monitoring is disclosed. The apparatus (2) comprises a frame (4), a motion sensing unit (10) and a user input unit (12) supported by the frame (4), and a harness (6) configured to secure the frame (4) to a user body part. The user input unit (12) comprises a continuous input device (72). Also disclosed is a method for monitoring user exercise via a monitoring apparatus (2) secured to the user. The method comprises sensing user motion with the monitoring apparatus (2) and receiving, via the motioning apparatus (2), user input during exercise. The user input is received via a continuous input device (72) on the monitoring apparatus. |
| US10964421B2 |
Method and apparatus for delivering a substance to an individual
Aspects of the subject disclosure may include, for example, detecting, by a substance delivery system coupled to a body part of an individual, an input signal not associated with a biological measurement of the individual, determining from the input signal, by the substance delivery system, whether delivering a dosage of a substance stored in the substance delivery system is needed and conforms to a dosage policy, and responsive to determining from the input signal that delivery of the dosage of the substance is needed and conforms to the dosage policy, initiating, by the substance delivery system, delivery of the dosage of the substance to the body part of the individual. Other embodiments are disclosed. |
| US10964415B2 |
Automated systems and methods for obtaining, storing, processing and utilizing immunologic information of an individual or population for various uses
A system and method for assessing the immunological status of one or more individuals in a patient population is presented. The method includes establishing a database comprising a plurality of records of information each representative of the immune status of an individual in the population, each of said records including (1) current information from one or more assays for the presence of a biochemical, and (2) individual specific information comprising one or more of said individual's medical history, said individual's doctors' observations and historical, demographic, lifestyle, and familial information relating to said individual. The method further includes processing the information in said database to find trends or patterns relating to the immune status of individuals in said patient population; and using the said trends or patterns as part of a health care related decision making process. |
| US10964412B2 |
Population-based medical rules via anonymous sharing
A computer system may iteratively modify a local medical rule that is based on an initial sub-population. In particular, after information specifying the local medical rule and sharing instructions are received from a user of the computer system, the computer system may iteratively apply the local medical rule to one or more additional sub-populations that are associated with other users of the computer system based on the sharing instructions without sharing PHI associated with the initial sub-population. Then, the computer system may aggregate results for the one or more additional sub-populations, and may generate the population-based medical rule by modifying the local medical rule based on the aggregated results and one or more quality metrics. Moreover, the computer system may selectively provide the population-based medical rule to the user without sharing PHI associated with the one or more additional sub-populations. |
| US10964411B2 |
Method for quantitative analysis of complex proteomic data
This invention is a novel method for analysis of data that is produced by test equipment. The preferred embodiment is data produced by liquid chromatography tandem mass spectrometry (LC-MS/MS) equipment, using industry standard methods to generate the initial data from the test equipment. The invention is a method for processing of the data to promptly produce accurate, reliable, and meaningful data that can be used for critical decisions. The unique benefit of the method is to correct the multiple measurement and calculation errors that are inherent in the operation of laboratory equipment. Prior methods result in errors based on circumstances that are difficult to control, accuracy-related errors in machine measurements, and fundamental mathematical errors in the data processing software that used with the laboratory equipment. As an added benefit, this novel method allows comprehensive simultaneous measurement and calculation of correlation of any and all peptide pairs in a single measurement, with the capability to support repeated measurements with changed conditions over time. This novel method allows robust, detailed, and comprehensive measurements of peptide activity and function, which results in substantial improvements over prior methods in accuracy, reliability, and efficiency. |
| US10964410B2 |
System and method for detecting gene fusion
The present disclosure pertains to a system, a method of using such a system, and a non-transitory computer-readable medium containing instructions to such a system for generating annotated gene fusion data from processing both a patient's DNA and RNA sequence information thereby filtering out weak candidate gene fusions. Thus the annotated gene fusion data contains clinically relevant information and accurate gene fusion detections (low false-positives) for use in clinical and/or R&D settings. The system, method and computer-readable medium allows a user to generate gene fusion data by detecting breakpoints from a patient's DNA-SEQ and RNA-SEQ, creating candidate breakpoint data by combining matching breakpoints from the DNA-SEQ and RNA-SEQ breakpoint data, determining confidence levels of the candidate breakpoint, identifying corresponding gene fusions, and annotating clinically relevant information about the gene fusions. |
| US10964405B2 |
Memory initialization reporting and control
A memory module performs a memory readiness test, and reports results to a host system. The memory module initializes a status register with an initial ready time value and a memory readiness status. The memory module conducts the memory readiness test, and while conducting the memory readiness test, estimates a new ready time based on the progress of the memory readiness test. The memory module updates the ready time value in the status register based on the new ready time. After finishing the memory readiness test, the memory module updates the memory readiness status in the status register. |
| US10964399B2 |
One-time programmable (OTP) memory devices and methods of testing OTP memory devices
A one-time programmable (OTP) memory device including: a cell array circuit including an OTP cell array and dummy cell block, the OTP cell array includes OTP memory cells coupled to bit-lines, read word-lines and voltage word-lines and the dummy cell block is coupled to the read word-lines and voltage word-lines; a row decoder coupled to the dummy cell block and the OTP cell array through the read word-lines and voltage word-lines; a column decoder coupled to the OTP cell array through the bit-lines; a write-sensing circuit coupled to the column decoder; and a control circuit to control the cell array circuit, row decoder and write-sensing circuit based on a command and address, the cell array circuit further includes an isolation circuit to cut off first and second voltages which are transferred to the OTP cell array from the row decoder, in response to control codes in a test mode. |
| US10964396B2 |
Semiconductor memory device
A semiconductor memory device includes first and second bit lines, first and second memory transistors connected to the respective first and second bit lines, a source line connected to the first and second memory transistors, and a word line connected to gate electrodes of the first and second memory transistors. In an erase operation that erases data in the first and second memory transistors: a first erase voltage application operation is performed; an erase verify operation is performed on only one of the first and second memory transistors; and a second erase voltage application operation is performed without performing the erase verify operation on another of the first and second memory transistors. |
| US10964385B1 |
Restoring memory cell threshold voltages
Methods, systems, and devices for restoring memory cell threshold voltages are described. A memory device may perform a write operation on a memory cell during which a logic state is stored at the memory cell. Upon detecting satisfaction of a condition, the memory device may perform a read refresh operation on the memory cell during which the threshold voltage of the memory cell may be modified. In some cases, the duration of the read refresh operation may be longer than the duration of a read operation performed by the memory device on the memory cell or on a different memory cell. |
| US10964380B1 |
Integrated device comprising memory bitcells comprising shared preload line and shared activation line
A memory circuit that includes a memory bitcell. The memory bitcell includes a six-transistor circuit configuration, a first transistor coupled to the six-transistor circuit configuration, a second transistor coupled to the first transistor, a third transistor coupled to the second transistor, and a capacitor coupled to the second transistor and the third transistor. The memory circuit includes a read word line coupled to the third transistor, a read bit line coupled to the third transistor, and an activation line coupled to the second transistor. The memory bitcell may be configured to operate as a NAND memory bitcell. The memory bitcell may be configured to operate as a NOR memory bitcell. |
| US10964373B2 |
Memory cells with capacitive logic based on electromechanically controlled variable-capacitance capacitors
A memory cell in capacitive logic, including a bistable system including a fixed element and a mobile element capable of taking one or the other of two stable positions with respect to the fixed element; a read device including a variable-capacitance capacitor including a first fixed electrode and a second mobile electrode rigidly fixed to the mobile element; and an electrically controllable write device for placing the mobile element in one or the other of its two stable positions. |
| US10964369B2 |
Memristor circuit, memristor control system, analog product-sum operator, and neuromorphic device
A memristor circuit that can increase a maximum rate of change of a conductance of the memristor circuit while maintaining linearity and symmetry in the change in the conductance is provided. A memristor circuit includes: a first magnetoresistance effect element including a first resistance change unit configured to change a resistance value thereof based on a current flowing therein, a first electrode provided at a first end of the first resistance change unit, and a second electrode provided at a second end of the first resistance change unit; and a first field effect transistor including a gate electrode, the gate electrode being connected to a transmission path between the first electrode connected to a power supply and the power supply. |
| US10964366B2 |
Magnetic memory, recording method of magnetic memory, and reading method of magnetic memory
There is provided a magnetic memory that can suppress the increase in manufacturing costs while recording multivalued information in one memory cell, the memory including first and second tunnel junction elements each having a laminated structure including a reference layer with a fixed magnetization direction, a recording layer with a reversible magnetization direction, and an insulating layer sandwiched between the reference layer and the recording layer, a first selection transistor electrically connected to first ends of the first and second tunnel junction elements, a first wire electrically connected to a second end of the first tunnel junction element, and a second wire electrically connected to a second end of the second tunnel junction element. |
| US10964363B2 |
Delay tracking method and memory system
A delay tracking method and a memory system are provided. The delay tracking method is applied to a memory system supporting a low-frequency-mode (LFM) and a high-frequency-mode (HFM) of an operating clock. The delay tracking method includes the steps of selecting a LFM oscillator for obtaining a LFM delay value when the operating clock is in the HFM; and selecting a HFM oscillator for obtaining a HFM delay value when the operating clock is in the LFM. |
| US10964360B2 |
Memory device including on-die-termination circuit
A memory device includes; a first memory chip including a first on-die Termination (ODT) circuit comprising a first ODT resistor, a second memory chip including a second ODT circuit comprising a second ODT resistor, at least one chip enable signal pin that receives at least one chip enable signal, wherein the at least one chip enable signal selectively enables at least one of the first memory chip and the second memory chip, and an ODT pin commonly connected to the first memory chip and the second memory chip that receives an ODT signal, wherein the ODT signal defines an enable period for at least one of the first ODT circuit and the second ODT circuit, and in response to the ODT signal and the at least one chip enable signal, one of the first ODT resistor and the second ODT resistor is enabled to terminate a signal received by at least one of the first memory chip and the second memory chip. |
| US10964359B2 |
Shift register, driving method thereof, gate driving circuit and display device
Shift register includes input sub-circuit coupling input terminal to first node responsive to signal of first clock terminal in input stage, control sub-circuit transmitting signal of second clock terminal to intermediate output terminal according to level at first node and controlling potential of third node according to potential of intermediate output terminal and signal of third clock terminal in input, output and reset stages, pull-up sub-circuit coupling second level terminal to final output terminal responsive to potential of intermediate output terminal in output stage, first voltage stabilization sub-circuit stabilizing voltage between final output terminal and third node responsive to signal of next-stage node connection terminal, pull-down transistor having gate electrode coupled to third node, first electrode coupled to first level terminal, and second electrode coupled to final output terminal. First voltage stabilization sub-circuit lowers potential of third node to level lower than signal of first level terminal in reset stage. |
| US10964358B2 |
Apparatuses and methods for scatter and gather
The present disclosure includes apparatuses and methods related to scatter/gather in a memory device. An example apparatus comprises a memory device that includes an array of memory cells, sensing circuitry, and a memory controller coupled to one another. The sensing circuitry includes a sense amplifier and a compute component configured to implement logical operations. A channel controller is configured to receive a block of instructions, the block of instructions including individual instructions for at least one of a gather operation and a scatter operation. The channel controller is configured to send individual instructions to the memory device and to control the memory controller such that the at least one of the gather operation and the scatter operation is executed on the memory device based on a corresponding one of the individual instructions. |
| US10964356B2 |
Compute-in-memory bit cell
A charge sharing Compute In Memory (CIM) may comprise an XNOR bit cell with an internal capacitor between the XNOR output node and a system voltage. Alternatively, a charge sharing CIM may comprise an XNOR bit cell with an internal capacitor between the XNOR output node and a read bit line. Alternatively, a charge sharing CIM may comprise an XNOR bit cell with an internal cap between XNOR and read bit line with a separate write bit line and write bit line bar. |
| US10964354B1 |
Oxidizing or reducing atmosphere for heat-assisted magnetic recording
A heat-assisted magnetic recording device is disposed in a hermetically sealed enclosure. The device includes a slider comprising a reader, a writer, and an optical waveguide configured to couple light from a light source to a near-field transducer situated at or near an air bearing surface of the slider. The near-field transducer comprises an enlarged portion and a peg extending from the enlarged portion in a direction of the air bearing surface. A fill gas is provided within the enclosure. The fill gas comprises a mixture of a low-density, inert gas and at least one gas that oxidizes carbon, where the total carbon oxidizing gas concentration of the fill gas is 3-50% by volume. In certain embodiments, the fill gas comprises a hydrogen concentration sufficient to retard oxidation of the peg when the peg is at an operating temperature associated with write operations. |
| US10964351B2 |
Forensic video recording with presence detection
At a high level, embodiments of the invention relate to augmenting video data with presence data derived from one or more proximity tags. More specifically, embodiments of the invention generate forensically authenticated recordings linking video imagery to the presence of specific objects in or near the recording. One embodiment of the invention includes video recording system comprising a camera, a wireless proximity tag reader, a storage memory and control circuitry operable to receive image data from the camera receive a proximity tag identifier identifying a proximity tag from the proximity tag reader, and store an encoded frame containing the image data and the proximity tag identity in the storage memory. |
| US10964348B2 |
Recording control apparatus, recording apparatus, recording control method, and recording control program
A recording control apparatus includes a video data acquisition unit configured to acquire video data obtained by shooting an area around a vehicle, an event detection unit configured to detect an occurrence of a predetermined event in the vehicle, a changing-point determination unit configured to determine whether or not the vehicle has passed a changing point on a traveling road based on a current position information of the vehicle, and a recording control unit configured to, when the event detection unit detects the occurrence of the event, record the video data including a first period as an event recording file in a recording unit, the first period being from a passing time point of the changing point to a detecting time point of the event, the changing point being a point that the vehicle has passed at least a first time earlier than the detecting time point of the event. |
| US10964345B1 |
Parallel servo control in a data storage device
A data storage device includes a first data storage surface and a second data storage below the first data storage surface. The data storage device also includes a first micro-actuator coupled to a first arm that supports a first head over the first data storage surface, and a second micro-actuator coupled to a second arm that supports a second head over the second data storage surface. The data storage device further includes a coarse actuator, to which the first and second arms are coupled, that positions the first head and the second head between corresponding first and second tracks on the respective first and second data storage surfaces. Micro-actuator drive circuitry finely positions the first head over the first track and the second head over the second track by concurrently driving the first micro-actuator and the second micro-actuator in opposite directions. |
| US10964341B2 |
Magnetoresistive effect element, magnetic head, sensor, high-frequency filter, and oscillator
A nonmagnetic spacer layer in a magnetoresistive effect element includes a nonmagnetic metal layer that is formed of Ag and at least one of a first insertion layer that is disposed on a bottom surface of the nonmagnetic metal layer and a second insertion layer that is disposed on a top surface of the nonmagnetic metal layer. The first insertion layer and the second insertion layer include an Fe alloy that is expressed by FeγX1-γ. Here, X denotes one or more elements selected from a group consisting of O, Al, Si, Ga, Mo, Ag, and Au, and γ satisfies 0 |
| US10964340B1 |
Heat-assisted recording head having sub wavelength mirror formed of first and second materials
A recording head has a near-field transducer proximate a media-facing surface of the recording head. The near-field transducer extends a first distance away from the media-facing surface. A waveguide overlaps and delivers light to the near-field transducer. Two subwavelength focusing mirrors are at an end of the waveguide proximate the media-facing surface and extend a second distance away from the media-facing surface that is less than the first distance. The subwavelength mirrors are on opposite crosstrack sides of the near-field transducer and separated from each other by a crosstrack gap. The subwavelength focusing mirrors each include a first material at the media-facing surface; and a second material facing away from the media facing surface and in contact with the first material. The second material includes a plasmonic material, and the first material is more mechanically robust than the second material. |
| US10964339B2 |
Low-complexity voice activity detection
Many processes for audio signal processing can benefit from voice activity detection, which aims to detect the presence of speech as opposed to silence or noise. The present disclosure describes, among other things, leveraging energy-based features of voice and insights on first and second formant frequencies of vowels to provide a low-complexity and low-power voice activity detector. A pair of two channels is provided whereby each channel is configured to detect voice activity in respective frequency bands of interest. Simultaneous activity detected in both channels can be a sufficient condition for determining that voice is present. More channels or pairs of channels can be used to detect different types of voices to improve detection and/or to detect voices present in different audio streams. |