| Document | Document Title |
|---|---|
| US10681336B2 |
Depth map generation
Aspects of the disclosure relate generally to generating depth data from a video. As an example, one or more computing devices may receive an initialization request for a still image capture mode. After receiving the request to initialize the still image capture mode, the one or more computing devices may automatically begin to capture a video including a plurality of image frames. The one or more computing devices track features between a first image frame of the video and each of the other image frames of the video. Points corresponding to the tracked features may be generated by the one or more computing devices using a set of assumptions. The assumptions may include a first assumption that there is no rotation and a second assumption that there is no translation. The one or more computing devices then generate a depth map based at least in part on the points. |
| US10681334B2 |
Device and method to reconstruct face and body in 3D
The device and method are intended for reconstructing in 3-Dimensions comprehensive representations of the head and torso of subject (S) with a portable stereophotogrammetry device which can operate at, at least, two predefined positions (A3, A4).The device is composed of a camera body (1), a double optics (2) and a measuring distance system (34) enabling the repositioning of subject (S) at position (A3) or (A4). The user can operate a switch (5) to select one of these at least two pre-defined positions.The method is further to process the stereo-pairs of the subject to reconstruct 3-Dimensional surfaces (400), match them (500) and then stitch them (600) in a comprehensive representation of the subject. By selecting a distance corresponding to a field of view of respectively approximately A4 dimension the device and method is enabling reconstructing the face and of approximately A3 dimension is enabling reconstructing the torso of subject (S). |
| US10681333B2 |
3D video encoding and decoding methods and apparatus
Methods and apparatus relating to encoding and decoding stereoscopic (3D) image data, e.g., left and right eye images, are described. Various pre-encoding and post-decoding operations are described in conjunction with difference based encoding and decoding techniques. In some embodiments left and right eye image data is subject to scaling, transform operation(s) and cropping prior to encoding. In addition, in some embodiments decoded left and right eye image data is subject to scaling, transform operations(s) and filling operations prior to being output to a display device. Transform information and/or scaling information may be included in a bitstream communicating encoded left and right eye images. The amount of scaling can be the same for an entire scene and/or program. |
| US10681327B2 |
Systems and methods for reducing horizontal misalignment in 360-degree video
A computing device for reducing horizontal misalignment in a 360-degree video converts the 360-degree video to a rectilinear 360-degree video. At least a pair of views of rectilinear images from the rectilinear 360-degree video are generated and displayed. A user interface for facilitating adjustment of a view angle is generated, the user interface displaying the at least the pair of views of the rectilinear images from the rectilinear 360-degree video. The computing device obtains vertical reference object is obtained in one of the views of rectilinear images; at least one of: a roll angle adjustment, a pitch angle adjustment, and a yaw angle adjustment for aligning the vertical reference object with a vertical axis; and a view angle adjustment corresponding to reduction of the horizontal misalignment. A panoramic 360-degree video is then generated. |
| US10681326B2 |
360 degree video system with coordinate compression
In a system for 360 degree video capture and playback, 360 degree video may be captured, stitched, encoded, decoded, rendered, and played-back. In one or more implementations, a video capture device captures 360 degree video in a first projection format, and an encoding device encodes the captured 360 degree video into a 360 degree video bitstream. In some aspects, the 360 degree video bitstream is encoded with an indication of the first projection format. In one or more implementations, a rendering device converts the decoded 360 degree video bitstream from the first projection format to a second projection format based on the indication. In one or more implementations, a processing device generates projection maps where each is respectively associated with a different projection format, and a rendering device renders the decoded 360 degree video bitstream using one of the projections maps. |
| US10681323B2 |
Methods, systems, and media for generating a summarized video using frame rate modification
Methods, systems, and media for generating a summarized video using frame rate modification are provided. In some embodiments, a method for editing a video is provided, the method comprising: receiving, using a hardware processor, a video file; identifying a plurality of frames at a playback frame rate from the video file; generating an edited video file by extracting a subset of the plurality of frames, wherein the extracted frames in the subset of the plurality of frames are separated by a predetermined length in the plurality of frames and wherein extracting the subset of the plurality frames modifies a frame rate of at least a portion of the video file to an effective frame rate; storing the edited video file; and presenting the edited video file at the playback frame rate. |
| US10681321B2 |
Suppress pixel coloration errors in HDR video systems
The present disclosure is directed to a process to partially or fully suppress, or limit, pixel coloration errors. These pixel coloration errors, represented by small noise values, can be introduced during signal processing of high dynamic range (HDR) video signals. Converting visual content to a half precision floating point representation, for example, FP16, can introduce small amounts of signal noise due to value rounding. The noise can be multiplied and accumulated during HDR signal processing resulting in visual artifacts and degraded image quality. The disclosure can detect these noise amounts in pixel color component values, and suppress, or partially suppress, the noise to prevent the noise from accumulating during subsequent HDR signal processing. |
| US10681317B2 |
Color correction method, system, and computer-readable medium
In a color correction method, a reference area is selected in a document page, which is rendered to produce image data. The reference area can be a company logo, a letter or character in a line of text, or other graphic object. The reference area need not be a set calibration chart. The image data is used by a projector to display the document page on a screen. Ambient light may cause colors in the displayed document page to be noticeably different from the intended colors specified in the document page. A camera takes a picture of the displayed document page, and a target area is identified in the camera image based on a characteristic of the reference area that was previously selected. Corrected image data is generated based on a color difference between the reference area and the target area. The projector uses the corrected image data to display the document page, this time with colors that are closer to or the same as the intended colors. The cycle may be repeated on the next document page, in which case the reference and target areas may differ from those of the previous cycle. |
| US10681315B2 |
Image display apparatus, image display system, and method for controlling image display apparatus
A projector includes an image projection section that displays an image based on image information, a communication section that communicates with another projector, an input operation section that accepts operation for executing a light source color adjustment process, a light source color adjustment section that executes the light source color adjustment process based on the operation accepted by the input operation section, and a control section that causes the communication section to transmit, based on the operation accepted by the input operation section, control information that causes the other projector to perform the light source color adjustment process to the other projector. |
| US10681311B1 |
Semi-automated, distributed, interactive relationship counseling system
The current document is directed to a semi-automated, distributed, interactive relationship-counseling system. The currently disclosed interactive relationship-counseling system employs, in one configuration, two smart phones, tablets, or other personal, processor-controlled, video-enabled electronic devices and one or more server computer systems. A relationship-counseling session, in a disclosed implementation, includes a discussion, by two participants, during which the participants are isolated from one another physically, but during which each participant hears and views a real-time video of his or her partner participant on his or her video-enabled electronic device. During the discussion, each participant may be monitored by one or more physiological sensors. This stored data, along with additional input data provided by each participant when viewing a playback of the discussion, is used by analysis and processing subsystems within the server computer system to identify, evaluate, and diagnose aspects of the relationship between the two participants, following which the participants may receive reports, counseling, advice, and other information to assist the participants in understanding and improving the relationship. |
| US10681308B2 |
Electronic apparatus and method for controlling thereof
Disclosed is an electronic apparatus for providing a video conference, and a method of controlling the same. The electronic apparatus includes a plurality of cameras, and a processor configured to execute instructions to: control to obtain, through a first camera from among the plurality of cameras, first video of a plurality of users who perform the video conference, determine a first user who is currently speaking among the plurality of users on a basis of the first video that is obtained through the first camera, control to obtain, through a second camera from among the plurality of cameras, second video of the determined first user, determine a second user who is expected to speak after the first user on a basis of the first video that is obtained through the first camera, control to obtain, through a third camera from among the plurality of cameras, third video of the determined second user, and control to output a screen in which the second video is simultaneously displayed with the third video. |
| US10681303B2 |
Multi-camera serial video data conversion for graphics processing unit (GPU) interface
Systems, methods, and apparatus for converting serial video data for a graphics processing unit (GPU) interface are disclosed. In one or more embodiments, a disclosed method comprises receiving, by each of a plurality of gigabit multimedia serial link (GMSL) conversion modules, n-bit length serial video data from a plurality of high-resolution cameras respectively. The method further comprises converting, by each of the GMSL conversion modules, the n-bit length serial video data to m-bit length serial GMSL video data, where n is equal to twice m. Also, the method comprises receiving, by a GMSL to camera series interface (CSI) conversion unit, the m-bit length serial GMSL video data from each of the GMSL conversion modules. Further, the method comprises converting, with the GMSL to CSI conversion unit, the m-bit length serial GMSL video data to m-bit length serial CSI video data, which is compatible with the GPU interface. |
| US10681301B2 |
Display device
A display device includes a signal processor, a display component, a substrate, and a conductive housing. The signal processor includes an oscillator that outputs oscillation signal, the signal processor processing signal whose frequency is higher than a specific threshold. The display component displays video. The substrate has a ground component, the signal processor being disposed on the substrate. The conductive housing is connected to a first site of the ground component and to a second site that is different from the first site. The first site and the second site are disposed at positions where a first area of the housing that is an odd-numbered multiple of ¼ wavelength of the oscillation signal away from the first site overlaps at least part of a second area of the housing that is a multiple of ¼ wavelength of the oscillation signal away from the second site. |
| US10681300B1 |
Split screen for video sharing
A video stream of image or a first video stream generated by a first application is captured by a second application. The first and the second application run on the same device. The first video stream or a video stream generated from the image of the first application is sent from a first communication device by the second application to a second communication device. A second video stream that is generated by the second application is sent to the second communication device too. The first video stream and the second video stream are transmitted to the second communication device and there displayed. |
| US10681295B2 |
Time of flight camera with photon correlation successive approximation
A time of flight camera includes a light source, a first pixel, a time-to-digital converting, and a controller. The light source is configured to emit light towards an object to be reflected back to the time of flight camera as image light. The first pixel includes a photodetector to detect the image light and to convert the image light into an electric signal. The time-to-digital converter is configured to generate timing signals representative of when the light source emits the light and when the photodetector detects the image light. The controller is coupled to the light source, the first pixel, and the time-to-digital converter. The controller includes logic that when executed causes the time of flight camera to perform operations. The operations include determining a detection window for a round-trip time of the image light based, at least in part, on the timing signals and first pulses of the light. The operations also include determining the round-trip time based, at least in part, on the timing signals and second pulses of the light detected within the detection window. |
| US10681293B2 |
Image sensing device and method for driving the same
An image sensing device includes: a pixel array suitable for generating a plurality of pixel signals corresponding to incident light; a comparison block suitable for comparing the pixel signals with a ramp signal to generate a plurality of comparison signals; a logic block suitable for adjusting slew rates of the respective comparison signals to generate a plurality of logic signals; a global count block suitable for generating a global count signal; and a storing block suitable for storing counted values of the global count signal based on the logic signals received from the logic block. |
| US10681287B2 |
Apparatus and method for displaying AR object
A method and electronic device for displaying an augmented reality (AR) object recognized by the electronic device are provided. The electronic device includes a display, a memory including stored instructions, and at least one processor. The at least one processor is coupled with the memory and the display. The at least one processor is configured to execute the stored instructions so as to identify a first object on a preview acquired from a first camera, and display a first AR object related with the first object on the preview, and in response to obtaining an input for converting from the first camera to a second camera, store information about the first AR object, and display a second AR object which is related with a second object comprised in a preview of the second camera and the information about the first AR object, on the preview of the second camera. |
| US10681285B2 |
Unmanned aerial vehicle and multi-ocular imaging system
An unmanned aerial vehicle (UAV) includes a vehicle body and a multi-ocular imaging assembly. The multi-ocular imaging assembly includes at least two imaging devices disposed in and fixed to the vehicle body. |
| US10681283B2 |
Imaging system, imaging apparatus, and imaging method
There is provided an imaging technology using a speckle, which is capable of eliminating cross-talk. In the present technology, there is provided an imaging system including: a first light source that irradiates an imaging target with coherent light of a first wavelength band; a second light source that irradiates the imaging target with incoherent light of a second wavelength band; an image capturing unit that captures a speckle image and a non-speckle image, the speckle image being obtained from scattered light of the imaging target irradiated with the coherent light, the non-speckle image being obtained from reflected light of the imaging target irradiated with the incoherent light; and a cross-talk elimination unit that eliminates cross-talk that occurs between the captured speckle image and the captured non-speckle image. |
| US10681280B2 |
Camera component location indicator on display
One embodiment provides a method, including: determining, using a processor, a camera of an information handling device is active; identifying, using a processor, a location of an at least one lens of the camera on the information handling device; and providing, on a display screen of the information handling device, an indication of the location of the at least one lens of the camera. Other aspects are described and claimed. |
| US10681274B2 |
Imaging apparatus and control method thereof
An imaging apparatus includes a CPU and an angular velocity sensor that detects an angular velocity of the imaging apparatus. The CPU acquires a motion vector of an object and calculates an angular velocity of the object based on the motion vector on the image plane of the object and the angular velocity of the imaging apparatus. Additionally, the CPU determines whether or not a panning shot is to be assisted depending on the reliability of the angular velocity of the imaging apparatus and the angular velocity of the object. |
| US10681272B2 |
Device for providing realistic media image
A device for providing a realistic media content, includes: inward facing image acquisition unit configured to acquire multiple inward facing images that are taken by an inward method using multiple cameras arranged around an object; an outward facing image acquisition unit configured to acquire multiple outward facing images that are taken by an outward method using the multiple cameras arranged around a point; a background image generation unit configured to generate a 360° cylindrical image by stitching the multiple outward facing images and then convert the 360° cylindrical image into a 360° spherical image to generate a background image; a 3D object reconstruction unit configured to extract a region of the object from the multiple inward facing images to generate a 3D object; and a combined image transmission unit configured to combine the background image with the 3D object and transmit the combined image to a display device. |
| US10681269B2 |
Computer-readable recording medium, information processing method, and information processing apparatus
A non-transitory computer-readable recording medium stores therein an information processing program that causes a computer to execute a process including: acquiring images photographed with a first angle of view and a second angle of view wider than the first angle of view; specifying a position and an attitude of a camera that photographed the image photographed with the first angle of view based on the image photographed with the second angle of view; stitching a plurality of images photographed with the first angle of view to generate a panoramic image; correcting the position on the generated panoramic image, of the image photographed with the first angle of view based on the specified position and attitude of the camera; and mapping the panoramic image to a three-dimensional model by texture mapping based on the corrected position. |
| US10681268B2 |
Imaging system, imaging apparatus, and system
An imaging system includes an imaging unit, a detecting unit, a recording unit, a correcting unit, and a video generating unit. The imaging unit captures images of a plurality frames. The detecting unit detects a tilt of the imaging unit with respect to a reference direction. The recording unit records time-series data of the tilt detected by the detecting unit. The correcting unit applies tilt correction to an image of each of the frames captured by the imaging unit, based on the time-series data of the tilt recorded by the recording unit and additional information unique to the imaging unit. The video generating unit generates video data based on the image of each of the frames corrected by the correcting unit. |
| US10681267B2 |
Systems and methods for increasing resolution of images captured by a camera sensor
Systems, methods, and non-transitory computer readable media can obtain information relating to a bias associated with a camera sensor. A plurality of images of a scene captured by the camera sensor can be obtained, where the plurality of images are captured at a resolution supported by the camera sensor. A plurality of weights for each image of the plurality of images can be determined based at least in part on the bias. A combined image of the scene can be generated based on the plurality of images and the determined weights, the combined image having a resolution higher than the resolution supported by the camera sensor. |
| US10681264B2 |
Directed image capture
A process is provided for graphically guiding a user of a capture device (e.g., smartphone) to more accurately capture a series of images of a building. Images are captured as the picture taker moves around the building—taking a plurality (e.g., 4-16) of images from multiple angles and distances. Before capturing an image, a quality of the image may be determined to prevent low quality images from being captured or to provide instructions on how to improve the quality of the image capture. The series of captured images are uploaded to an image processing system to generate a 3D building model that is returned to the user. The returned 3D building model may incorporate scaled measurements of building architectural elements and may include a dataset of measurements for one or more architectural elements such as siding (e.g., aluminum, vinyl, wood, brick and/or paint), windows, doors or roofing. |
| US10681261B2 |
Inspection system
A front-end image acquisition component acquires photographs and/or videos of various goods, vehicles, vessels, and/or real estate fixtures. In one aspect, an image acquisition system comprises a hub with outwardly extending arms and supports for coupling to an upper support structure. Cameras are affixed to the hub and the arms for acquiring image data of a subject substantially simultaneously. |
| US10681257B2 |
Methods and systems for traffic monitoring
A system and method for determining a dimension of a target. The method includes: determining a camera parameter, the camera parameter including at least one of a focal length, a yaw angle, a roll angle, a pitch angle, or a height of one or more cameras; acquiring a first image and a second image of an target captured by the one or more cameras; generating a first corrected image and a second corrected image by correcting the first image and the second image; determining a parallax between a pixel in the first corrected image and a corresponding pixel in the second corrected image; determining an outline of the target; and determining a dimension of the target based at least in part on the camera parameter, the parallax, and the outline of the target. |
| US10681255B2 |
Holder for camera module and camera module with holder
A holder for a camera module includes first and second surfaces, an optical filter receiving groove is recessed from the first surface to the second surface to form a step portion and a glue receiving portions extend from angled abutments of the step portion. A sensor receiving groove is recessed from the second surface to the first surface, and the sensor receiving groove communicates with the optical filter receiving groove. At least one escape passage is defined in the holder, the at least one escape passage communicates with the optical filter receiving groove and the sensor receiving groove. The at least one escape passage abuts the glue receiving portions and provides an escape path for captured moisture and gases expanding or shrinking because of temperature variations. |
| US10681253B1 |
Modular camera apparatus
A modular camera apparatus with a discontinuous snap joint is provided for snap-fitting a lens ring to a camera module enclosed in a main case of the camera apparatus, thereby improving the manufacture and assembly efficiency. |
| US10681251B2 |
Camera module
A camera module comprising: a housing; a lens assembly that is fixed to the housing and comprises at least one lens; a circuit board that is arranged inside the housing and comprises a first circuit board and a second circuit board, on which image sensors arranged to face the lens are mounted, respectively; and a first shield can arranged inside the housing so as to support edges of the first and second circuit boards. |
| US10681246B2 |
Image reading apparatus, image forming apparatus, and reading control method
An image reading apparatus includes: a light source; a reference sheet that reflects light emitted from the light source; a light-receiving lens that converges the reflected light; a reading sensor that reads the light converged by the light-receiving lens; and a hardware processor that: based on first white data obtained when the reading sensor reads the reference sheet for the first time, determines whether the reference sheet or the reading sensor has dust; in response to determining that the reference sheet or the reading sensor has dust, produces ideal initial white reference data by complementing the first white data with second white data obtained when the reading sensor reads the reference sheet for the second and subsequent times; and with the ideal initial white reference data, complements third white data obtained when the reading sensor reads the reference sheet right before reading an image of a job. |
| US10681244B2 |
Image forming apparatus cropping a plurality of image data
An image forming apparatus includes an image reader unit and a control unit. The image reader unit generates read data. The control unit generates output data of image data cropped from the read data. When cropping a plurality of image data, the control unit sets one side of the read data to a first reference side and sets another side perpendicular to the first reference side to a second reference side, and for each of the plurality of image data, the control unit detects a first distance between the first reference side and the image data in a direction parallel to the second reference side, and a second distance between the second reference side and the image data in a direction parallel to the first reference side, and sets an output order of the plurality of image data based on the first distances and the second distances. |
| US10681241B2 |
Information processing apparatus capable of acquiring and transmitting device information, communication system, communication method, and non-transitory computer-readable storage medium storing program
An information processing apparatus includes a wireless interface configured to perform communication with an image forming apparatus, and at least one controller configured to function as a unit configured to acquire device information of the image forming apparatus from the image forming apparatus through the wireless interface, and a unit configured to selectively accept one of a first instruction to transmit the acquired device information to an external destination and a second instruction not to transmit the acquired device information to the external destination. The controller also functions as a unit configured to transmit, in a state where the first instruction has been accepted, the acquired device information to the external destination, and hold, in a state where the second instruction has been accepted, the acquired device information without transmitting the acquired device information to the external destination. |
| US10681240B2 |
Reading module, and image reading device and image forming apparatus therewith
According to the present disclosure, a reading module includes a light source, an optical system, and a sensor. The optical system images, as image light, reflection light of light with which the light source has irradiated a document. The sensor converts the thus imaged image light into an electric signal. The optical system includes a mirror array in which a plurality of reflection mirrors are connected together, and a plurality of aperture stop portions. The reflection mirrors each reflect light at an angle that is different, as seen in a main scanning direction, from an angle at which an adjacent one of the reflection mirrors reflects light. The plurality of aperture stop portions are disposed on one side of the mirror array with respect to an orthogonal direction which is orthogonal to the main scanning direction. |
| US10681239B2 |
Image forming apparatus for embedding error detection information within a scanned image
An image forming apparatus includes an image forming unit, an image reading unit, an image inspecting unit and a history generating unit. The image forming unit forms an image on a sheet. The image reading unit reads a sheet face on which the image is formed, thereby generating a scan image. The image inspecting unit compares the generated scan image with a normal image to detect an error in the scan image. When the image inspecting unit detects the error, the history generating unit generates detection information on the detected error and embeds the generated detection information in the scan image, thereby generating a history image. |
| US10681238B2 |
Image forming apparatus
An image forming apparatus includes: a light source that irradiates a document with light; a hardware processor that controls lighting of the light source; a cover that is opened and closed with respect to a document platen on which a document is placed; and a detector that detects a person. When the detector detects a person and when an open angle of the cover is a predetermined angle or less, the hardware processor turns on the light source. |
| US10681234B2 |
Image processing apparatus and image processing method
An image processing apparatus includes a platen on which a document to be read is placed, an image input unit configured to read, at a time, one or a plurality of documents placed on the platen, an individual image extraction unit configured to extract individual images of the one or the plurality of documents read at a time, an individual image location judgment unit configured to determine whether the extracted individual images are each located within one of areas set in a reading area of the platen depending on the number of documents to be read, and an individual image selection unit configured to, in a case where one or a plurality of the extracted individual images are located within a particular area, select one individual image as an image to be captured in the area based on a predetermined selection criterion. |
| US10681232B2 |
Image processing apparatus, method for controlling the same, and storage medium
A multifunction peripheral (MFP) acquires a display setting of an operation unit in the MFP, which is associated with a user at a client terminal, when accessed from the client terminal. The MFP performs control so that display of an operation screen of the MFP in the client terminal becomes display according to the acquired display setting of the operation unit. |
| US10681225B1 |
Image and augmented reality based networks using mobile devices and intelligent electronic glasses
A mobile communication system based on digital content including images and video that may be acquired, processed, and displayed using a plurality of mobile devices, smartphones, tablet computers, stationary computers, intelligent electronic glasses, and servers. |
| US10681221B1 |
Method and a system for detecting telephone numbers used by SIM boxes for soliciting telephone calls
The invention relates to a method (100) of detecting a “soliciting” telephone number that is being used fraudulently for soliciting calls to “target” numbers.The method (100) comprises a plurality of iterations of a detection stage (104) comprising the following steps: sending (106) a telephone call to at least one target number; receiving (108) at least one message; detecting (110) at least one soliciting number from said received message; and detecting a new target number in said received message; the method being characterized in that it includes a new iteration of the detection stage (104) using said new target number when said target number is a new number. The invention also provides a system for performing such a method (100). |
| US10681215B1 |
Multi-dimensional attribute-based routing
Methods for routing customers to an agent include receiving a communication from a customer; assigning or retrieving a plurality of mandatory and optional customer attributes; matching the plurality of mandatory and optional customer attributes to a plurality of attributes of available agents; calculating a first affinity score for each available agent that possesses the mandatory customer attributes; determining for each available agent a number of attributes matching the optional customer attributes; ranking the available agents based on the number of matched optional customer attributes; selecting a predetermined number of available agents from the ranked available agents; calculating a second affinity score for each of the selected predetermined number of available agents; combining the first affinity and second affinity score; determining which available agent has the highest combined first affinity and second affinity score; and routing the communication to the available agent having the highest combined score. |
| US10681211B2 |
Remote information retrieval and display for an IVR system
The invention herein disclosed provides the display of stored information when creating a dialstring for use with mobile smartphones and other computer-enabled telephones. A software app recognizes input from the user (such as the initial digits of a phone number) that identifies the organization to be called, and accesses remotely stored representations of information about the organization along with the IVR phone tree information for that organization. The app then presents a graphical representation of all or part of the retrieved information on a display. The user can then respond to the graphical representation by providing selective inputs that cause the synthesis all or part of the dialstring needed to navigate the phone tree to the desired destination. Once a dialing option has been synthesized, the user may provide additional input that the system interprets as an instruction to open a phone call and dial the synthesized number. |
| US10681207B1 |
Caller identity verification based on unique multi-device signatures
Communication source identifier verification system mechanisms are provided. The mechanisms receive communication information for a communication initiated between a source communication system and a destination communication system. The communication information comprises a source identifier and a local device identifier signature specifying zero or more local device identifiers of devices local to the source communication system. The mechanisms retrieve valid device identifier information for an authorized communication source corresponding to the identifier of the source communication system. The mechanisms execute a verification operation that verifies whether the source identifier is validly associated with the source communication system based on the retrieved valid device identifier information and the local device identifier signature. The mechanisms send a verification notification along with the communication information, in response to results of executing the verification operation, to the destination communication system. |
| US10681203B2 |
Method and apparatus for automatically setting alarms and notifications
A processor-based personal electronic device (such as a smartphone) is programmed to automatically respond to data sent by various sensors from which the user's activity may be inferred. One or more alarms on the device may be temporarily disabled when sensor data indicates that the user is asleep. One or more of the sensors may be worn by the user and remote from the device. A wireless communication link may be used by the device to obtain remote sensor data. Data from on-board sensors in the device—such as motion sensors, location sensors, ambient light sensors, and the like—may also be used to deduce the user's current activity. User data (such as calendar entries) may also be used to determine likely user activity and set alarms accordingly. Biometric data from a second, nearby person may also be used to automatically select certain alarm modes on a first person's device. |
| US10681202B2 |
Methods and systems for processing an ephemeral content message
Exemplary embodiments relate to techniques for transmitting ephemeral content messages. A sending client may establish an end-to-end encrypted session with possible recipients of the message, using a first decryption key during initial session setup. The client may send an ephemeral content message, including encrypted content and a second key, to the recipients through a server. The server may be unable to retrieve the encrypted content due to a lack of the second key. The server may filter a list of intended recipients, and may forward the ephemeral content message to the recipients on the filtered list. The recipients may retrieve the second key from the message, and use the first and second keys to decrypt the encrypted content. The sending client may change the second key each time the recipient list changes from the perspective of the sending client, as determined at the time the ephemeral content message is transmitted. |
| US10681200B2 |
Message processing method and system, and related device
Example embodiments of the present disclosure disclose message processing methods and systems, and related devices. One example method includes receiving a message, and determining a distance between a user equipment and a wearable device connected with the user equipment. When the distance between the user equipment and the wearable device is greater than a preconfigured distance, information of the message is recorded without providing the information of the message. When the distance between the user equipment and the wearable device is less than the preconfigured distance, the information of the message is provided. |
| US10681194B2 |
Mobile terminal
A mobile terminal including a foldable case having a front case and rear case and configured to be in one of an opened flat state in which a protrusion of the rear case is slid inward into a sliding area of the front case, a folded state in which the protrusion of the rear case is slid outward from the sliding area, and an intermediate state between the opened flat state and the folded state; a flexible display on a surface of the foldable case; and electrical components between the front case and the rear case. |
| US10681193B2 |
Mobile terminal
A mobile terminal includes a first body and a second body. The first body includes a main body portion, a first extension and a second extension connected to opposite sides of the main body portion. The first extension is provided with a first functional component and the second extension is provided with a second functional component. The second body is slidably stacked on the first body and selectively slide to a first position, a second position or a third position. The second body covers the main body portion, the first functional component and the second functional component at the first position, the second body exposes the first functional component at the second position, and the second body exposes the second functional component at the third position. |
| US10681192B2 |
Electronic device
An electronic device includes a first body and a second body movably connected to the first body via a connecting component. The first body includes at least a first display screen having a display area that is exposed from a first surface of the first body. The second body includes at least a second display screen that is exposed from a first surface of the second body and an acquisition apparatus that acquires images via at least a first window of the second body. The first window is arranged at a surface of the second body that is different from the first surface of the second body. The second body is movable from a first relative position with respect to the first body to a second relative position with respect to the first body. |
| US10681188B2 |
Reducing transmission pathway lengths within a distributed network
A solution for reducing transmission pathway lengths within a distributed network, as embodied in various systems, methods, and non-transitory computer-readable storage media, may include migrating a TCP socket from a request server to a data server. The solution may further include reprogramming one or more routers to recognize a new packet route based on the migrated socket. The solution may include the one or more routers subsequently communicating directly with the data server while bypassing the request server. |
| US10681186B2 |
Apparatus and method for transmitting and receiving signal in multimedia system
A transmitting apparatus and an operating method for the apparatus in a multimedia system are provided. The operating method includes inputting at least one network layer packet, generating a link layer packet based on the at least one network layer packet, and transmitting the link layer packet. The link layer packet includes a header including information indicating a packet type of the at least one network layer packet, information indicating whether the link layer packet includes a single network layer packet, and information indicating an identifier related to the at least one network layer packet. |
| US10681184B2 |
Method and device for transmitting a message in a vehicle
A method for transmitting a message in a vehicle, in which the message is received according to a source protocol, a communication mechanism which is used by the message and corresponds to the source protocol is converted in such a way that the communication mechanism corresponds to a canonical protocol, the communication mechanism corresponding to the canonical protocol is converted in such a way that the communication mechanism corresponds to a predefined target protocol, and the message is transmitted according to the target protocol. |
| US10681183B2 |
Platform for constructing and consuming realm and object featured clouds
A computer-implemented method of providing a server-based feature cloud model of a realm includes receiving by a server a series of digital contributions that collectively originate from a plurality of remote computing devices, characterizing portions of the realm. The method also includes processing by the server the received digital contributions to associate them with a global coordinate system and storing the processed contributions in a realm model database as components of the feature cloud model of the realm. Finally, the method includes, in response to a query message over the Internet from a computing device of an end-user, serving, over the Internet by the server to the computing device, digital data defining a selected portion of the feature cloud model for integration and display by the computing device. |
| US10681170B2 |
Systems and methods for determining the popularity of a user based on aggregated popularity measurements of other users
A method for determining a popularity of a user includes identifying an online identity for which a popularity measurement is to be determined, and identifying one or more other online identities based, at least in part, on their being within a specified number of degrees of separation of the online identity. Popularity measurements for the other users are accessed and aggregated, and a popularity measurement for the user is determined based on at least the aggregated popularity measurements for the other online identities. A graphical user interface includes a first identifier specification mechanism that enables specification of an identifier of a first online identity, and a second identifier specification mechanism that enables specification of an identifier of a second online identity. The graphical user interface includes a display of an indication of whether a popularity of the first online identity exceeds a popularity of the second online identity. |
| US10681169B2 |
Social plugin reordering on applications
In one embodiment, a method includes receiving a request from an application installed on a client system for one or more interactive elements associated with a respective platform for sharing content to a website associated with the platform, wherein the request includes a user identifier and a content identifier; calculating a ranking score for each of a plurality of interactive elements based on profile information associated with the user identifier; and sending to the application a personalized set of the interactive elements, each of the interactive elements in the personalized set having a ranking score above a threshold value. |
| US10681168B2 |
Internet-wide professional identity platform
According to various exemplary embodiments, professional identity content associated with a member of a social network service is identified, based on a network search for online content that contains online content attributes that match member profile attributes included in member profile data associated with the member. Thereafter, a display of a prompt is generated, via a user interface in a device, wherein the prompt invites the member to update a member profile page associated with the member, based on the identified professional identity content. |
| US10681167B2 |
Distributed computing resources in an information centric network
System and techniques for distributed computing resources in an information centric network (ICN) are described herein. A request may be received at a node in the ICN. The request may include identification of a computing resource set and a timing threshold. Resources that correspond to a member of the computing resource set may be locked. The node may communicate a response to the request. The response may include an indication that performance of the member of the computing resource is possible and a time-period in which confirmation may be received. |
| US10681165B2 |
System architecture for enabling efficient inter-application communications
A system architecture can be used to facilitate communication among applications that are native and/or non-native to an application environment. The system architecture can include a first application environment executed on a client-side computing device. The first application environment can execute software applications that are native thereto. The first application environment can further execute software applications that are native thereto, but which software applications themselves comprise second application environments of types different from the first application environment, and which software applications can therefore execute additional software applications that are non-native to the first application environment. The first application environment can further execute a “proxy” software application that may coordinate and/or manage communication among various software applications in the first application environment. |
| US10681163B2 |
Email notification system
Examples described herein include systems and methods for providing push notifications to a third-party application executing on a client device. An example can include encrypting user credentials, generating a callback Uniform Resource Locator (“URL”) with at least a portion of the encrypted credentials embedded into the URL, and requesting notifications from an email service to be provided at the callback URL. Upon receiving a notification at the callback URL, a system component can decrypt the credentials within the URL using a private key and log into the email account using those decrypted credentials. The system component can then generate a push notification based on any changes found in the email account and cause the notification to be delivered to the third-party application on the client device. |
| US10681161B2 |
Trend detection in a messaging platform
A system and method for trend detection in a messaging platform. A trend detection model is selected and a time series having a plurality of instances of social data is received, wherein the instances of social data share a countable parameter. A count is made of occurrences of countable parameters in each instance of social data assigned to that bin and a trend detected based at least in part on the trend detection model and on the count for each bin. |
| US10681155B1 |
Presenting user activity timeline in a colloquial style
To generating a presentation of user activities occurring over a period of time, location history data that indicates multiple locations a user visited, along with the respective visit times, is received from the user. Using the location history data, a continuous event that begins on a first calendar day and ends on a second calendar day is determined. A representation of the first calendar day as a colloquial day is generated, where the colloquial day includes the entire event, and where the colloquial day at least partially overlaps with the calendar day but does no coincide with the calendar day. The colloquial day is displayed via a user interface. |
| US10681154B2 |
Gateway device allowing multiple infrastructural services to access multiple IoT devices
A method, a computer program product, and a computer system for allowing multiple infrastructural services to access multiple IoT (Internet of Things) devices. A gateway device connects the multiple infrastructural services and the multiple IoT devices. The gateway device receives a use request from a first application of a first infrastructural service. Among the multiple IoT devices, the gateway device identifies an IoT device that meets one or more requirements in the use request. The gateway device determines whether the IoT device is being used by a second application of a second infrastructural service. The gateway device assigns to the first application an exclusive right to use the IoT device, in response to determining that the IoT device is not being used by the second application. The first application has a right to refer to data and a right to execute available commands without restriction. |
| US10681152B2 |
Method and device for supporting service by using application service platform in wireless communication system
The present specification relates to a method by which a device supports a service by using an application service platform (ASP) in a wireless communication system, and the service supporting method can comprise the steps of: performing a service discovery for a first service by using the ASP; and performing a service connection on the basis of a result of the service discovery, wherein when the ASP supports a plurality of service discovery interfaces and a plurality of service connection interfaces, the service discovery is performed using at least one of the plurality of service discovery interfaces, and the service connection can be performed using at least one of the plurality of service connection interfaces. |
| US10681151B2 |
Notification framework for wireless networks
Discovery of services between devices is provided prior to establishing a connection between devices, including wireless-enabled devices or devices that are communicatively coupled to wireless access points or other wireless communication devices. Discovering services prior to establishing a connection may facilitate finding a desired service. The services that may be discovered may be, for example, print services, camera services, PDA services or any other suitable services. Services may be discovered using 802.11, Bluetooth, UWB or any other suitable wireless technology. A graphical user interface is provided that enables a user to select a desired service. |
| US10681150B2 |
Systems and methods for management plane—control plane interaction in software defined topology management
Embodiments of the present invention provide systems and methods for a Session-level SDT component in the control plane to handle setup, recovery and mobility of individual session requests in real time. The Session-level SDT component may comprise path management that performs either stateless of stateful path switching for an ongoing session, whether download or uplink, according to the stateful requirements of the session. The path management may be in conjunction with user equipment mobility management operation; it may also be in conjunction with network scalability and automation operation, such as load balancing. |
| US10681147B2 |
URLs for acquiring or transmitting data
A method, reception apparatus, and computer-readable medium for communicating with a server to download or upload data. The method includes acquiring a URI (Uniform Resource Identifier) message that includes a DNS (Domain Name System) name registered with the IANA (Internet Assigned Numbers Authority). A URL (Uniform Resource Locator) is generated based on the registered DNS name in the acquired URI message and a predetermined domain name. The data is downloaded from, or uploaded to, the server using the generated URL. |
| US10681146B2 |
Method and apparatus for isolating page cookie
The present invention discloses a method and an apparatus for isolating a page cookie. The method includes: when a predetermined login account logs in, assigning an independent cookie storage for the predetermined login account; after a request of creating a page associated with the predetermined login account is acquired, establishing a mapping relation table for storing a mapping relation between a page view identification of the page associated with the predetermined login account and the independent cookie storage; when the page associated with the predetermined login account is loaded, looking up the mapping relation table; and initiating, according to the independent cookie storage corresponding to the page view identification of the page associated with the predetermined login account found in the mapping relation table, a request of loading the page associated with the predetermined login account. In this manner, isolation between the page view of the page associated with the predetermined login account and a cookie of a page being logged into by another account in the same domain name is implemented, thereby improving user experiences. |
| US10681143B2 |
Establishment of a secure connection for a communication session
A system, method, node, user equipment and computer program for establishment of a secure connection between a user equipment (100) and a media gateway (130) at setup of a communication session with another party (150) is described. The media gateway (130) is controlled by a control server (120). The control server (120) receives a communication session setup request from the user equipment (100) and determines an indication of a security certificate of the media gateway (130). The control server (120) then sends the indication of the security certificate of the media gateway (130) to the user equipment (100), wherein the indication is sent before or in parallel to sending the communication session setup request towards said other party (150). The user equipment (100) then initiates a negotiation of security related parameters, based on the received indication of the security certificate of the media gateway (130). Then the secure connection between the user equipment (100) and the media gateway (130) is established, utilizing the negotiated security related parameters. |
| US10681141B2 |
Using in-home location awareness
Techniques for suggesting accessory devices controlled by an application executing on a mobile device are disclosed. A method includes measuring one or more sensor values to determine a data point at each of a plurality of first times, associating an accessory device with each of the data points, clustering the data points within a threshold distance of each other to create a plurality of clusters. The method also includes, after clustering the data points, measuring one or more sensor values to determine one or more current data points at a second time, determining that one or more current data points at the second time corresponds to a first cluster of the plurality of clusters, identifying a first accessory device associated with one or more of the data points in the first cluster, and providing a message using the application. |
| US10681138B2 |
Storing and retrieving multi-format content in a distributed storage network
A method begins by a processing module of a dispersed storage network (DSN) receiving content from a data source for storage in the DSN. The method continues with the processing module transforming the content into a plurality of formats of a set of set of formats according to a formatting scheme and dispersed storage error encoding each format of the plurality formats to produce a corresponding plurality of sets of encoded data slices. The method continues with the processing module generating a logical address for each format, and generating a corresponding plurality of sets of slice names for each logical address. The method continues with the processing unit facilitating storage of the corresponding set of encoded data slices in a set of storage units using the corresponding plurality of sets of slice names. |
| US10681133B2 |
Methods and systems for endpoint device operating system in an asset intelligence platform
In embodiments of the present disclosure improved capabilities are described for an asset intelligence platform for organizing information collected and stored on or with respect to large fleets of asset, such as used in connection with the Internet of Things, with capabilities for providing improved intelligence and security in the local environment of an asset, in the network and in remote locations, such as in the cloud. |
| US10681125B2 |
Systems and methods of supporting parallel processor message-based communications
A method of message-based communication is provided which includes executing, on one or more accelerated processing units, a plurality of groups of work items, receiving a first message from a first group of work items of the plurality of groups of work items executing on the one or more accelerated processing units and storing the first message at a first segment of memory allocated to a second group of work items of the plurality of groups of work items executing on the accelerated processing unit. |
| US10681124B2 |
Content distribution storage management
Obligatorily-acquired digital content items are stored under service control in one or more local storage machines of a computer based on service commands provided by a centralized management service; and voluntarily-acquired digital content items are stored under user control in the one or more local storage machines of the computer based on user commands. The obligatorily-acquired digital content items are protected from user-commanded deletion. The obligatorily-acquired digital content items are deleted from the one or more local storage machines based on service commands provided by the centralized management service. However, the voluntarily-acquired digital content items are deleted from the one or more local storage machines based on user commands. |
| US10681119B2 |
Establishing nodes for global routing manager
Embodiments of the present disclosure include an Orchestrator to commission a point of presence (PoP) node based on receiving an internet protocol (IP) address, the IP address associated with a geographic location; and a global routing manager for assigning a client device to a PoP node based on the received IP address. Embodiments also include a performance manager to acquire performance information about each PoP node. |
| US10681118B2 |
Method and apparatus for distributed data processing
Embodiments of the present disclosure provide a method and apparatus for distributed data processing. The method comprises: receiving from an upstream node an input message attached with a shared count, the shared count being used for determining a processing status of a root message associated with the input message; processing the input message to generate one or more new messages; allocating to each of the one or more new messages a respective new shared count based on the received shared count; and transmitting the one or more new messages to one or more downstream nodes respectively. Compared with the prior art, the methods and apparatuses for distributed data processing according to the embodiments of the present disclosure can effectively reduce network traffic overheads and the consumed CPU and memory resources, and would be scalable for different topologies of various distributed data processing systems. |
| US10681117B2 |
Automated dynamic load balancing across virtual network interface controller fast switchover devices
Automated dynamic load balancing across VNIC fast switchover devices including monitoring, by a resource monitor, resource utilization metrics of at least one resource used to send data along a first communications path through a hypervisor; in response to detecting, by the resource monitor based on the resource utilization metrics, that the at least one resource crosses a resource utilization threshold, sending a notification to a rebalancer, wherein the notification comprises a subset of the resource utilization metrics; generating, by the rebalancer based on the subset of the resource utilization metrics, a resource optimized mapping for the at least one resource used to send data along the first communications path; and issuing, by the rebalancer, the resource optimized mapping to the hypervisor, wherein the hypervisor reconfigures, based on the resource optimized mapping, the at least one resource used to send data along the first communications path. |
| US10681114B2 |
Reception apparatus, reception method, transmission apparatus, and transmission method for transmission or reception using a signaling message
A reception apparatus and a reception method, by which a file is received in an MMT system. On a transmission side, a resource constituting an application, information mapping a URL, which indicates a location in an application, on a location on an MMT transmission path of broadcasting or the like, and information indicating a unit of display and a link relationship in the application are transmitted. On a receiver side, access ranges to hierarchical file data when a data broadcasting application is executed, and location information and size of the file data in each access range are acquired, and the application is effectively pre-cached. |
| US10681113B2 |
Geographically distributed highly available mailbox
A geographically distributed highly available mailbox system that includes at least first and second data centers servicing different geographical locations. A payload is received by at least one server of the first data center from a first user to be later accessed by a second user. A server from a second data center replicates the payload from the server of the first data center and the first server of the first data center sends notification to the first user that a payload has been uploaded successfully and sends out notification to the second user that the payload has been uploaded. When the second user sends a request to access the payload, the second user is directed to either the first data center or the second data center based on which data center can provide the second user with the quickest access to the payload. |
| US10681112B2 |
Method for providing functions within an industrial automation system, and an automation system
The invention relates to a method functions within an industrial automation system. In a method for providing functions within an industrial automation system, the functions are made available by a web application of at least one control unit and provided on the client side during execution of a control program via a Single-Page Application (SPA) as a web client at a client-side user interface. The functions are provided by a standardized data model of the web application which represents the at least one control unit and data that can be made available by the control unit. The standardized data model is accessed via a generic data interface of the web application. |
| US10681106B2 |
Entropy sharing across multiple compression streams
According to one or more embodiments, multiple related data streams are compressed jointly, such that substantive similarities between the multiple related streams are leveraged to reduce the overall size of the resulting compressed data. Specifically, given the compressed version of a primary data stream, a secondary data stream may be highly compressed by utilizing portions of the compressed version of the primary data stream to represent similar portions of the secondary data stream. A compression application is configured to receive (either concurrently or separately) information identifying multiple related input streams. For each input stream provided to the compression application, the application outputs one output stream. The computing system writes the output streams of the compression application to storage. Embodiments allow the size of the compressed version of a secondary data stream to be greatly reduced compared to the size of the stream compressed without reference to a primary data stream. |
| US10681098B2 |
Transmitting apparatus, receiving apparatus, and control methods thereof
A transmitting apparatus is provided. The transmitting apparatus includes: an L1 signaling generator configured to generate L1 signaling including first information and second information; a frame generator configured to generate a frame including a payload including a plurality of sub frames; and a signal processor configured to insert a preamble including the L1 signaling in the frame and transmit the frame. The first information includes information required for decoding a first sub frame among the plurality of sub frames. Therefore, a processing delay in a receiving apparatus is reduced. |
| US10681096B2 |
Multicasting content
Aspects of the disclosure relate to multicasting content throughout a distribution network. For example, a content server may generate content fragment packets and attribute packets, and transmit the content fragment packets and attribute packets via a multicast transmission to deliver content to one or more user devices. The multicast transmission may conform to a particular protocol suitable for multicasting content fragments. |
| US10681094B2 |
Control system, communication control method, and program product
A disclosed control system configured to control transmission of content data between communication terminals includes one or more processors, and a memory storing instructions that, when executed by the one or more processors, cause the control system to receive a transmission request including attribute information indicating an attribute of the content data for transmitting the content data from a first communication terminal, and perform control for transmitting the content data to a second communication terminal specified based on the destination information in response to the attribute information being in a predetermined format, the predetermined format including destination information indicating a destination of the content data and to perform control for transmitting the content data to a third communication terminal that has requested reception of the content data having the attribute indicated by the attribute information in response to the attribute information not being in the predetermined format. |
| US10681090B2 |
Method for telecommunication and communication terminal
A communication connection can be controlled and/or by use of a function address in the form of a protocol element. The protocol element can be configured to serve as the target address for a message to a server to call up a function. |
| US10681087B2 |
Method of managing system utilities access control
An access control system includes a memory, a processor, a host operating system (OS) executing on the processor, a container on the host OS, and a security manager running on the host OS. The container has a set of access control rules and includes a containerized utility. The security manager receives a request to run the utility to complete a transaction, retrieves credentials associated with the user, and determines a status of the credentials. The status of the credentials is privileged if the credentials are included in the set of access control rules and is non-privileged if the credentials are not included in the access control rules. Responsive to determining the status as privileged, the security manager executes an RBD command for the transaction to obtain a target RBD image, retrieves the target RBD image, and records the transaction. |
| US10681079B2 |
Method for mitigation of cyber attacks on industrial control systems
Methods and systems for detecting a potential compromise of cyber security in an industrial network are disclosed. These methods and systems comprise elements of hardware and software for generating and analyzing vectors indicative of network behavioral states to establish thresholds for anomalous behavior in the industrial network. |
| US10681077B2 |
Time based triggering of dynamic templates
Systems and methods are described for using a template for simulated phishing campaigns based on predetermined date from a date associated with a user. The predetermined date may by an event, an anniversary or a milestone associated with employment of the user with a company. The campaign controller may identify a date associated with the user and based on the identification of the date associated with the user, the campaign controller may select one or more templates for one or more simulated phishing campaigns to be triggered by a predetermined date related to the date associated with the user. |
| US10681072B2 |
Method and system for user plane traffic characteristics and network security
A method at a network element for monitoring user plane traffic for a user equipment, the method including configuring a set of characteristics and a range of values for each of the set of characteristics for user plane traffic between the user equipment and the network element; monitoring user plane traffic for the user equipment at the network element, the monitoring determining whether at least one characteristic of the user plane traffic falls outside of the configured range of a values, resulting in a characteristic violation; and if the at least one characteristic of the user plane traffic falls outside the configured range of a values, performing an action resulting from the characteristic violation. |
| US10681068B1 |
System and method for analyzing data and using analyzed data to detect cyber threats and defend against cyber threats
A system and method for joining various cyber security threat data sources into a single threat data model, analyzing this threat data and storing the data as a specific data model, processing the data to standardize, minimize, interpret and catalogue the threat data, creating a meta-model based on the cyber threat data model, creating executable models based on this cyber threat data enabling simulations of this cyber threat's behavior, enabling execution of these simulations to capture quantifiable data observations of cyber threat behavior in the context of logical configurations of networks, devices and systems which may be specified as models of information environments and IT infrastructures, interpreting the results of the simulations; and generating output based on the results of the simulations. |
| US10681061B2 |
Feedback-based prioritized cognitive analysis
An automated method for processing security event data in association with a cybersecurity knowledge graph having nodes and edges. It begins by receiving from a security system (e.g., a SIEM) information representing an offense. An offense context graph is built. Thereafter, and to enhance the offense context graph, given nodes and edges of the knowledge graph are prioritized for traversal based on an encoding captured from a security analyst workflow. This prioritization is defined in a set of weights associated to the graph nodes and edges, and these weights may be derived using machine learning. The offense context graph is then refined by traversing the nodes and edges of the knowledge graph according to a prioritization tailored at least in part by the encoding. In addition to using security analyst workflow to augment generation of weights, preferably the machine learning system provides recommendations back to the security analysts to thereby influence their workflow. |
| US10681059B2 |
Relating to the monitoring of network security
The present invention provides a target centric monitoring of a network enabling a likelihood score for the existence of an attack to be calculated. The score is calculated by monitoring a plurality of network nodes for a range of symptoms. Detected symptoms are then profiled using a classical Bayesian-based framework such that a node score is calculated for every node. The node scores are compared against reference activity so as to identify deviations from reference activity. The reference activity may comprise peer analysis comparing the node scores against the nodes scores or per nodes and discord analysis comparing the node score of a particular node against historical behaviour. Based on the deviations, the method can enable the calculation of a likelihood of suspicious activity for each node. |
| US10681058B2 |
Systems, methods, and devices to defend against attacks
Systems, methods, and/or techniques for mitigating attacks on an IoT device at a gateway device may be provided. The gateway device may receive a communication directed to an Internet of Things (IoT) device and forward it to the IoT device. The IoT device may indicate to the gateway device that the communication is associated with an attack and send the gateway device a sleep time period and a request to change a filtering rule set at the gateway device. The gateway device may change the filtering rule set and receive another communication directed to the IoT device. If the another communication is valid based on the filtering rule set with the change and a number of valid packets is less than a threshold, and the sleep time period has expired, the gateway device may send another communication to the IoT device. |
| US10681055B2 |
System for controlling access to target systems and applications
A method for controlling access to one or more of a plurality of target systems includes receiving profile data that defines one or more features associated with a plurality of individuals with one or more entitlements of those individuals. Each entitlement is indicative of target system access. The method further includes generating a model that relates the one or more features and the one or more entitlements of the plurality of individuals. Profile data that defines one or more features associated with a target individual is received from a first user management system. A listing that includes one or more entitlements associated with the target individual, and confidence values associated with the one or more entitlements is generated based on the profile data and the model. Each confidence value is indicative of whether the target individual should be granted a corresponding entitlement. For each entitlement having a corresponding confidence value higher than a predetermined threshold, an instruction is communicated to a target system associated with the entitlement to allow the target individual access to the target system. |
| US10681054B2 |
Enabling a multi-dimensional collaborative effort system
Methods to provide, by a processor, a user interface allowing a first user access to a collaborative effort system. Responsive to the first user utilizing the user interface, the methods, systems, and computer program products generate a plurality of threads within the collaborative effort system for a single discussion group of the collaborative effort system; authorize a second user access to at least a first thread of the plurality of threads after the generation of the plurality of threads; associate the second user with a user group after the generation of the plurality of threads; and authorize the user group access to at least a second thread of the plurality of threads. The methods generate a plurality of icons displayed in the user interface for the plurality of threads. The methods also displays in the user interface a priority of a problem to be solved through the collaborative effort system. |
| US10681053B2 |
Hierarchical permissions model within a document
Case management systems and techniques are disclosed. In various embodiments, a hierarchical document permission model is received, the model describing a document hierarchy comprising a plurality of hierarchically related document nodes and defining for each of at least a subset of said document nodes one or more document roles and for each such role one or more document permissions with respect to that document node. The hierarchical document permission model is used to determine and enforce permissions with respect to case management instances to which the hierarchical document permission model applies. |
| US10681051B2 |
Selective processing of application permissions
An application permissions processing system and method for processing application permission requests is provided. The method includes the steps of detecting that an application has been downloaded to a computing system, receiving one or more permission requests from the application for resources located on the computing system, determining that at least one of the one or more permission requests is a required permission of the application, prompting the user to decide the one or more permission requests, receiving a denial of the required permission from the user, in response to the prompting, and responding to the application by providing spoofed resources to the application to satisfy the required permission of the application. |
| US10681049B2 |
Authentication, authorization and accounting in managed cloud computing services
In an embodiment, a computer implemented method comprises receiving, at a first computing device associated with a managing entity, a request to perform an operation of a managed service; publishing to a first block of a distributed ledger system, by the first computing device associated with the managing entity, identification information of the managing entity; identifying, by a second computing device associated with the managed service, the identification information published to the first block of the distributed ledger system; publishing to a second block of the distributed ledger system, by the second computing device associated with the managed service, acknowledgement information comprising an indication that the identification information of the managing entity published to the first block was received and verified; publishing to a third block of the distributed ledger system, by the second computing device associated with the managed service, management request information comprising an operation request for the managing entity; identifying, by the first computing device associated with the managing entity, the management request information published to the third block of the distributed ledger system; publishing to a fourth block of the distributed ledger system, by the first computing device associated with the managing entity, management request acknowledgment information comprising an indication that the management request information of the third block was received; and in response to a performance of an operation included in the management request information published to the third block, publishing to a fifth block of the distributed ledger system, by the first computing device associated with the managing entity, management operation record information including a history of operations performed by the managing entity. |
| US10681047B2 |
Shared terminal that authenticates a user based on a terminal identifier
A shared terminal includes: circuitry to control a display to display an image to a plurality of users, the plurality of users sharing a use of the shared terminal, and obtain, from a first privately-owned terminal owned by a first user of the plurality of users, first terminal identification information for identifying the first privately-owned terminal; a transmitter to transmit, to a terminal management server, an authentication request for authenticating the first privately-owned terminal to allow login of the first user into the shared terminal, the authentication request including the first terminal identification information of the first privately-owned terminal; and a receiver to receive an authentication result indicating whether the first privately-owned terminal is authenticated to allow login of the first user, from the terminal management server. When the authentication result indicates that the first privately-owned terminal is a legitimate terminal and login of the first user is successful, the circuitry controls the display to display a screen for allowing the plurality of users including the first user to draw an image. When the authentication result indicates that the first privately-owned terminal is not a legitimate terminal and login of the first user fails, the circuitry controls the display to display a screen with an error message. |
| US10681045B2 |
Multi-TTP-based method and device for verifying validity of identity of entity
Provided are an entity identity validity verification method and device with multiple trusted third parties being involved. In the application, validity of identities of entities performing mutual identity validity verification can only be verified by different trusted third parties. During the verification process, the trusted third parties that are respectively trusted by the two entities interact with each other, and provide services for mutual identity validity verification between the entities, to complete the identity validity verification between the entities. |
| US10681038B1 |
Systems and methods for efficient password based public key authentication
In a method for efficient password based public key authentication between a first user device and a second user device, a shared password is received by a first user device which generates a first hash value of the shared password and a first value, wherein the first value is composed of at least a product of the first hash value and a first unique security constant associated with the first user. The first user device then generates a first random value generated using data from a generator element, and a first blind public key associated with the first user device, wherein the first blind public key is generated using a first public key. The first user device concurrently sends the first value and the first blind public key to the second user device for authentication. |
| US10681037B2 |
Terminal authentication
Methods, systems, and computer program products for authenticating a terminal with a server based on multiple environmental factors. Each of the multiple environmental factors relates to a configurable hardware-independent characteristic of the terminal. Each of the multiple environmental factors is defined at least by an identifier and a value. The identifier identifies a respective environmental factor and the value indicates a state of the respective configurable hardware-independent characteristic. The multiple environmental factors constitute an environmental authentication information for authenticating the terminal with the server. |
| US10681036B2 |
Composite security interconnect device and methods
Various embodiments include composite security interconnect devices and methods. One method embodiment that may be performed by a composite security interconnect device, also referred to herein as a security controller, includes decrypting a first encrypted input received from a peripheral device with a first encryption key to obtain clear text. The first encryption key may be an encryption key established between the security controller and the peripheral device. The method further includes encrypting the clear text with a second encryption key to obtain second encrypted input, the second encryption key being a key of an encryption key pair established with a transaction processing host. |
| US10681033B2 |
Selecting and securing proof delgates for cryptographic functions
The disclosed technology is generally directed to cryptographic functions for smart contracts. In one example of the technology, a request for cryptographic resources is received. The request for cryptographic resources includes a binding identity (ID). Cryptographic resources are fetched from at least one cryptographic resource pool of a plurality of cryptographic resource pools responsive to the request for cryptographic resources. Separate cryptographic resource pools of the plurality of cryptographic resource pools are pools of separate types of cryptographic resources. Which type of proof delegate code is suitable for each fetched cryptographic resource is determined. For each fetched cryptographic resource, the determined type of proof delegate code is injected into the fetched cryptographic resource. |
| US10681028B2 |
Controlling access to resources on a network
Disclosed are various embodiments for controlling access to data on a network. Upon receiving a request comprising a device identifier and at least one user credential to access a remote resource, the request may be authenticated according to at least one compliance policy. If the request is authenticated, a resource credential associated with the remote resource may be provided. |
| US10681027B2 |
Gateway mechanisms to associate a contractor account
A program for light commercial building system (LCBS) solutions. Solutions and other systems may incorporate lightweight alerting service, auto-adjustment of gateway poll rates based on the needs of various consuming applications, detecting loss of space comfort control in a heating, ventilation and air conditioning (HVAC) system, HVAC capacity loss alerting using relative degree days and accumulated stage run time with operational equivalency checks, and HVAC alerting for loss of heat or cool capacity using delta temperature and dependent system properties. Also, incorporated may be triggering a subset of analytics by automatically inferring HVAC equipment details from controller configuration details, ensuring reliability of analytics by retaining logical continuity of HVAC equipment operational data even when controllers and other parts of the system are replaced, and an LCBS gateway with workflow and mechanisms to associate to a contractor account. |
| US10681025B2 |
Systems and methods for securely managing biometric data
Systems and methods for securely managing biometric data are provided. In a method conducted at a secure element which is directly connected to a biometric input, biometric data is received directly from the biometric input. A biometric signature based on the biometric data is obtained. A seed value specific to the biometric data is accessed by obtaining the seed value from the biometric data or biometric signature. The biometric signature is encoded using an obscured algorithm and the seed value to generate a token which is output for secure storage within the secure element or secure transmission to a secure server for registration or authentication of the biometric data. Obtaining the seed value from the biometric data or biometric signature can be repeated reliably to obtain the same the seed value. |
| US10681024B2 |
Self-adaptive secure authentication system
A method, a system, and a non-transitory computer readable program code are disclosed for authenticating users for services. The method includes registering one or more users in an authentication system; assigning a score index to each of the one or more users in the authentication system for one or more services, the score index representing a security level and corresponding authentication required to access each of the one or more services; inputting each request for services from the one or more users into the authentication system to continuously update the score index for each of the one or more users, each of the requests including one or more authenticators or biometric identifiers for the requested service; and requesting the one or more users to register one or more additional authenticators or biometric identifiers with the authentication system upon the score index for a user reaching of a predefined threshold value. |
| US10681023B2 |
Self-service portal for provisioning passwordless access
Methods and apparatuses for managing access to hosts in a computerized system are disclosed. A request for an authenticator for enabling access to at least one host in the computerized system is communicated from an user to a portal. The portal verifies the right of the user to make the request, and in response to positive verification authorizes the user to make the request and sends the request to an authenticator manager to trigger providing of an authenticator for enabling access to at least one host in accordance with the request. The authenticator manager provides the authenticator for enabling access to the at least one host in accordance with the request. Acceptance of the request by an administration process according a predefined rule is required before said providing of the authenticator. |
| US10681021B2 |
Selective admission into a network sharing session
A system and method provide for the selective authorization and admission of a client into a data sharing session with a host. A host may select one or more clients into the sharing session based on the proximity of the clients. When a client is selected, an identifier is provided from the client device to the host device, for example, utilizing an optical identifier such as a bar code or an audible identifier such as an encoded sound. The identifier is then utilized to establish a link between the client and the host. In this fashion any number of client devices may be selectively admitted into the sharing session in a quick and easy process enabling security for the host and anonymity for the client. |
| US10681019B2 |
Secure sharing and collaborative editing of documents in cloud based applications
Collaboratively editing a document in a system of sharee clients includes creating a document change, generating a document token for encrypting the document change, encrypting the document change with the document token, making the encrypted document change available to the other sharee clients, and generating a plurality of copies of the sharee document token. Each sharee document token is encrypted with a respective sharee's public key. Each encrypted sharee document token is distributed to respective sharee clients. Each sharee client is configured to: decrypt a sharee document token using a respective private key, decrypt the encrypted document change using the share document token, and consolidate the document change into a document. |
| US10681016B2 |
Method and apparatus for operating a connected device using a secure element device
A secure element device for use in a connected device includes a first interface configured to enable communication with a communication module and a second interface configured to enable communication with an action module of the connected device. A processor coupled to the first interface and the second interface, executes a first set of computer-readable instructions, stored in a memory of the secure element device, to authenticate, via the first interface, the connected device on the communication network. The processor also executes a second set of computer-readable instructions, stored in the memory, to perform one or both of (i) obtaining, via the second interface, data from the action module, the data to be transmitted over the communication network and (ii) controlling, via the second interface, the action module to cause the action module to perform one or more operations based on an instruction received over the communication network. |
| US10681013B2 |
Methods and systems for concealing information
A retrieving system for retrieving information concealed within a sequence of symbols. The system includes a decoder configurable using rule information and operable when so configured to retrieve the information concealed within the sequence of symbols by applying to the sequence of symbols at least one decoder rule determined by the configuration of the encoder. |
| US10681011B2 |
Preemptive determination of reserved IP conflicts on VPNs
Passive determination of reserved internet protocol (IP) conflicts on one or more hosted virtual private networks (VPNs) extracts configuration information for a plurality of hosting VPNs to build an aggregated list of IP addresses with mask and associated VPN information. A route table is extracted from a router directing traffic to an appropriate VPN host among the plurality of hosting VPNs, and a sorted list with host/network address, subnet mask, and associated VPN information is generated. The configuration information and the route table is used to expand and normalize a set of network entries. |
| US10681009B2 |
Rule swapping in a packet network
In some variations, first and second rule sets may be received by a network protection device. The first and second rule sets may be preprocessed. The network protection device may be configured to process packets in accordance with the first rule set. Packets may be received by the network protection device. A first portion of the packets may be processed in accordance with the first rule set. The network protection device may be reconfigured to process packets in accordance with the second rule set. A second portion of the packets may be processed in accordance with the second rule set. |
| US10681008B1 |
Use of checkpoint restore in user space for network socket management
A computer-implemented system for network socket management includes a host having a plurality of sockets and a hash table (data structure) storing data on network connections corresponding to the sockets; a firewall with a plurality of rules for routing incoming packets to the sockets; a socket image file that stores a state of each suspended socket. A network connection corresponding to the suspended socket is maintained open. A filter that monitors incoming packets and restores suspended sockets to active status when a packet for the suspended socket is received. The filter is implemented as part of the firewall, or as a hardware front end. The sockets, the firewall and the socket image file are all maintained in user space. |
| US10681006B2 |
Application-context-aware firewall
In one embodiment, an agent process associated with a particular application on a computing device intercepts outbound connection calls made by the particular application for a remote target host within a computer network, and determines an application context for the outbound connection call based on the particular application and one or more features of the outbound connection call. The agent process may then compare the application context against a set of application-context-aware firewall policies configured on the agent process, and determines whether to allow or not allow (block) the outbound connection call based on the comparing of the application context to the set of application-context-aware firewall policies. |
| US10681003B2 |
Rebalancing internet protocol (IP) addresses using distributed IP management
A balanced distribution of IP addresses across nodes of a cluster is performed during distributed IP management, wherein IP addresses are dynamically procured and assigned on a first-come, first-serve basis. In one aspect, nodes that participate in distributed IP management can request for IP addresses only if they are determined to be serviceable. A subscription level of a node can be determined based on a maximum number of IP address that can be claimed/owned by the node. As an example, the maximum number of IP address can be evaluated based on a total number of serviceable nodes within the cluster. IP address redistribution can be facilitated to ensure that subscription levels of the nodes are at an optimal level. |
| US10681000B2 |
Assignment of unique physical network addresses for logical network addresses
Some embodiments provide a method for a network controller that manages multiple logical networks implemented by multiple managed forwarding elements (MFEs) operating on multiple host machines. The method receives a notification from a particular MFE that an interface corresponding to a logical port of a logical forwarding element has connected to the particular MFE and has a particular logical network address. The method assigns a unique physical network address to the interface. Each of multiple interfaces connected to the particular MFE is assigned a different physical network address. The method provides the assigned unique physical network address to the particular MFE for the particular MFE to convert data messages sent from the particular logical network address to have the unique physical network address. |
| US10680996B2 |
Method and apparatus for unified message adaptation
A method of message adaptation in the Internet of Things (IoT) including a data center having a plurality of applications, an application gateway, a wide area network, a network of access appliances and a plurality of sensing devices. The method includes receiving at the application gateway a message containing data collected by the plurality of sensors, the message having a message descriptor; parsing at the application gateway the message according to the message descriptor; generating at the application gateway a message template based on the parsed message descriptor; storing at the application gateway the generated message template in memory; integrating context information into the generated message template; and outputting the message with the generated message template from the application gateway to a corresponding application in the data center for content-based processing. |
| US10680990B2 |
Communication system and communication control method
Aspects of the present application provide a communication system that includes a communication unit and a control unit. The communication unit is configured to receive, from a communication source, a scheduling request for scheduling transmission of a message to a specific communication destination. The control unit is configured to perform control such that the communication destination is notified of existence of the message at a predetermined timing in accordance with content of the message and a current or past psychological situation of a user corresponding to the specific communication destination received by the communication unit. |
| US10680988B2 |
Systems and methods for triggering redisplay of a postponed message
A method of postponing an electronic message is performed at a computing device having one or more processors and memory. The memory stores one or more programs configured for execution by the one or more processors. The device displays a first electronic message for a user of the computing device and receives user input to postpone the first electronic message. In response to the user input, the device displays a plurality of postponement locations in a user interface window and receives user selection of a postponement location from the displayed plurality of postponement locations. The device then inhibits display of the first electronic message at the computing device. When it is subsequently determined that the computing device is at the first postponement location, the device redisplays the first electronic message. |
| US10680987B2 |
Proximity discovery system and method
A proximity discovery system enabling a person to quickly and efficiently discover colleagues within their proximity without visual contact. The system comprises a mobile computing device including an antenna and transceiver for exchanging messages with a plurality of other mobile devices nearby the user device, a user detection module for detecting the messages from the other mobile devices, a proximity detector for estimating a distance between the user device and each of the mobile devices, a connection module for sharing biographic and professional information with the plurality of mobile devices based on one of a plurality of connection levels. |
| US10680986B1 |
Stacked chat conversations
Disclosed is a method for automatic arrangement of communications for improved functionality. A client device presents a stacked set of conversation cells on a display of the client device. The stacked set of conversation cells is stacked such that a first conversation cell corresponding to a first chat conversation from the stacked set of conversation cells is a top conversation cell of the stacked set of conversation cells. While presenting the stacked set of conversation cells, the client device receives a first chat communication that is a part of a second chat conversation that is different than the first chat conversation. In response to the receiving of the first chat communication, the client device modifies the presentation of the stacked set of conversation cells such that a second conversation cell corresponding to the second chat conversation is presented as the top conversation cell of the stacked set of conversation cells. |
| US10680982B2 |
Providing contextual alerts
Embodiments generally relate to alerts. In some embodiments, a method includes receiving, from a device of a first user, an alert request for an alert to be sent to the first user when a second user on a communication platform becomes available. The method further includes capturing context information for the first user in response to receiving the alert request. The method further includes associating the context information with the alert request. The method further includes determining that the second user is available on the communication platform. The method further includes sending the alert and the context information associated with the alert request to the computing device of the first user. |
| US10680976B2 |
Technologies for performing switch-based collective operations in distributed architectures
Technologies for performing switch-based collective operations in a fabric architecture include a network switch communicatively coupled to a plurality of computing nodes. The network switch is configured to identify sub-operations of a collective operation of a collective operation request received from one of the computing nodes and identify a plurality of operands for each of the sub-operations. The network switch is additionally configured to request a value for each of the operands from a corresponding target computing node at which the respective value is stored, determine a result of the collective operation as a function of the requested operand values, and transmit the result to the requesting computing node. Other embodiments are described herein. |
| US10680975B2 |
Method of dynamic resource allocation for public clouds
A device comprises a memory storage comprising instructions and one or more processors in communication with the memory. The one or more processors execute the instructions to access data for a plurality of previous time periods for a client of a plurality of clients, the data for each previous time period of the plurality of previous time periods including resource usage data for a plurality of jobs of the client, apply a time series analysis algorithm to the accessed data to predict a distribution of characteristics of resource usage for a future time period for the client, based on the predicted distribution of characteristics of resource usage, simulate a number of future predicted workloads for the future time period for the client, and based on the simulated number of future predicted workloads, automatically reserve a set of resources for the future time period for the client. |
| US10680974B2 |
Method and device for monitoring data processing status
Disclosed are one or more embodiments for monitoring data processing status. An example method includes at least the following steps: receiving processing information fed back by a working node of a last layer, wherein the processing information is fed back when the working node of the last layer completes processing of sub-data, and the sub-data is obtained by processing source data according to preset layers and decomposing the source data by a worker node; updating the processing status of the source data according to the processing information. |
| US10680971B1 |
Providing second content items in association with first content items
Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium, including a method for providing content. A first call for content to be published on a resource associated with a publisher is received from a requesting device. A determination is made when the publisher has authorized additional content item calls to be automatically generated responsive to receipt of the first call. A first content item responsive to the first call is determined. A message including call parameters is generated that define publisher or serving system criteria for the additional content items. The first content item and message responsive to the first call are provided. A second call for content, in conformance with the call parameters, is received after processing the message. A second different content item that is responsive to the second call is provided for publication on the resource along with the first content item. |
| US10680970B1 |
Stack-based resource management system and method for a distributed computing environment
A stack-based resource management system includes a computer-executed tool for managing the resources used to execute a distributed application. The tool uses a distributed computing environment protocol stack having multiple layers that each represents one or more resources used to execute a distributed application. The resources in each layer have one or more inter-layer dependencies to one or more resources of an adjacent layer. When the tool receives configuration instructions to configure one or more resources, it configures that resource, and identifies one or more inter-layer dependencies to resources in adjacent layers to configure those resources in the adjacent layers. The tool then sequentially traverse up and down the adjacent layers of the protocol stack to resolve any of the dependencies among the resources of each adjacent layer of the protocol stack. |
| US10680966B2 |
Intelligent buffering for packet reordering by virtual nodes within a network device
The techniques describe packet reordering for packets flowing on a new path in response to a change in internal forwarding paths in a network device. For example, a network device may dynamically change the selection of an internal forwarding path to achieve fabric path optimization (“OFP”) or to ensure optimized load balancing. Packets forwarded on the new path are buffered such that the transmission of packets forwarded on the new path are delayed for a buffering time period of at least the time in which a packet is being sent from the source packet processor to the initial destination packet processor. |
| US10680963B2 |
Circuit and method for credit-based flow control
A receiving circuit of a communications link comprises: a first data buffer configured to input, under control of a first clock signal, data of a first data stream transmitted by a transmitting circuit, and to generate a credit trigger signal indicating when a data value is read from the first data buffer, wherein data is read from the first data buffer, or from a further data buffer coupled to the output of the first data buffer, under control of a second clock signal; and a credit generation circuit configured to generate, based on the credit trigger signal, a credit signal for transmission to the transmitting circuit under control of the first clock signal, the credit signal indicating that one or more further data values of the first data stream can be transmitted by the transmitting circuit. |
| US10680961B2 |
Using headerspace analysis to identify flow entry reachability
Some embodiments provide a method that uses headerspace analysis. The method receives several flow entries for distribution to a set of forwarding elements that implement a logical network. The method models each of the flow entries as a function that operates on a representation of a packet header. The method uses the modeled functions to identify a set of paths from a packet source to a packet destination. For each particular path of the identified paths, the method uses inverses of the modeled functions to determine a set of packet headers. Packets sent from the packet source with any packet header in the set of packet headers follow the particular path through the flow entries. |
| US10680960B2 |
Dynamic rate limiting for networked resources
Rate limiting systems and methods for regulating access to a shared network resource in a computing device accessed through an application programming interface. A rate limit associated with a shared network resource is assigned to a user for a time period. During the time period, access to the shared network resource is granted or denied repeatedly based upon the rate limit; a cost is calculated using a cost function; and, the rate limit is updated based upon the cost. |
| US10680959B2 |
Metadata extraction
Examples of implementations relate to metadata extraction. For example, a system of privacy preservation comprises a physical processor that executes machine-readable instructions that cause the system to normalize a network traffic payload with a hardware-based normalization engine controlled by a microcode program; parse the normalized network traffic payload, as the network traffic payload passes through a network, by performing a parsing operation of a portion of the normalized network traffic payload with a hardware-based function engine of a plurality of parallel-distributed hardware-based function engines controlled by the microcode program; and provide the hardware-based function engine with a different portion of the normalized network traffic payload responsive to an indication, communicated through a common status interface, that the different portion of the normalized network traffic payload is needed to complete the parsing operation. |
| US10680956B2 |
Small data transmission method and user equipment using the same
A small data transmission method, configured for a User Equipment (UE) to transceive a small data from a control node in a wireless network without establishing a Radio Resource Control (RRC) connection, and the method includes but not limited to the step of: monitoring a paging opportunity (PO) sub frame in a paging frame in an idle mode; when an identifier in the PO sub frame corresponding to the UE is detected, receiving a paging message corresponding to the PO sub frame; and analyzing the paging message, and when the paging message includes a small data indicator, extracting a data from an indicating address, in which the data is the small data. |
| US10680952B2 |
Congestion notification method, related device, and system
A congestion notification method, a related device, and a system, where the method includes receiving, by a network side device, a congestion status of a target network area sent by a radio access network (RAN) congestion awareness function (RCAF) entity, where the target network area is a network area involved in an application service provided by a target application server; and sending, by the network side device, the congestion status of the target network area to the target application server. Hence, an application server may able to learn in time when congestion occurs, and adjust, according to the congestion situation, a related service in an area corresponding to the congestion situation. |
| US10680949B2 |
Systems and methods for implementing a time-stamped controller area network (CAN) bus message
Systems, methods, and apparatuses are provided herein for time-stamping a Controller Area Network (“CAN”) bus message. Control circuitry (e.g., of a network bridge) may receive a CAN message, and may, in response to receiving the CAN message, generate a time stamp. The control circuitry may add an entry to a lookup table stored in memory, wherein the entry correlates a CAN message Identifier (“ID”) corresponding to the CAN message with the time stamp. The control circuitry may encapsulate the CAN message and the time stamp, and may transmit the CAN message according to the time stamp. |
| US10680947B2 |
Methods and apparatus to manage a physical network to reduce network dependencies in a multi-fabric virtual network
A disclosed example of managing a network include receiving a packet at a first top-of-rack (ToR) switch via a first load-based teaming (LBT) port; determining whether a network location of a destination node of the packet is unknown; based on the network location being unknown, setting an LBT egress control value in the packet, the LBT egress control value to indicate that the packet is not to be transmitted via a second LBT port of a second ToR switch; and sending the packet from the first ToR switch to the second ToR switch via an inter-switch link between the first and second ToR switches and from the first ToR switch to at least a first host that is identified in the packet as the destination node. |
| US10680940B2 |
Optimized complex event processing in a software-defined network
Optimized complex event processing in a software-defined network is provided. A computing device receives a rule that identifies a source device and an event notification condition. A network inventory structure that identifies a plurality of nodes in the network and corresponding processing capabilities is accessed. A particular datapath node of the plurality of nodes is identified. A packet flow window criterion and a packet operation are determined based on the event notification condition. A particular virtual network function (VNF) of a plurality of VNFs is identified based on the rule. A controller node datapath configuration command that comprises a source device identifier that identifies the source device, the packet flow window criterion, the packet operation, and a VNF identifier that identifies the particular VNF is generated. The controller node datapath configuration command is sent to a controller node of the plurality of nodes. |
| US10680939B2 |
Hybrid flood-relaying and routing mesh networks
Systems and methods of mesh network communication enabling a relay node to autonomously select a packet propagation mechanism. Upon receiving a packet, which may carry an indication for flooding propagation as set by the edge node originating the packet, or carry no specification for any propagation mode, the relay node determines whether the packet is eligible for routing-propagation based on a number of factors, such as whether there is an existent valid route from the source node to the destination node, whether the packet is originated from a friend edge node, and whether a route discovery process has been initiated. Accordingly, the relay node may change the indication to routing propagation and forward it by routing-relaying. Thus, the packet can be propagated over the mesh network by routing propagation, despite the initial setting for flooding propagation as specified by the edge node or no setting by the edge node. |
| US10680938B2 |
Method and apparatus for information centric networking (ICN) over locator/identifier separator protocol (LISP)
A computer-implemented method of enabling information-centric networking (ICN) over a locator/identifier separation protocol (LISP) comprises receiving, by one or more processors of an ingress tunnel router (ITR), from an endpoint, an ICN interest packet that identifies an interest by name; resolving, by the one or more processors of the ITR, a target egress tunnel router (ETR) in accordance with the name; encapsulating, by the one or more processors of the ITR, the ICN interest packet in a LISP packet; and sending, by the one or more processors of the ITR, the LISP packet to the target ETR. |
| US10680934B2 |
Multipoint-to-multipoint radio data transport
The invention concerns a system for multipoint-to-multipoint radio data transport, comprising a device for switching samples of digitised radio data called samples, transmitted by a device for the digital processing of antenna signals called antenna device (RU1, RU2), via a first data link (DL11, DL12), to a plurality of recipient antenna controller devices (DU1, DU2) identified by a respective plurality of controller identifiers, the switching device (DD) comprising the following modules: interception of first data frames (T11, T12) from the antenna device and intended for the plurality of controller devices, the first frames comprising the samples, demultiplexing the samples from the intercepted first data frames, extracting the controller identifiers from the intercepted first data frames, grouping together the demultiplexed samples by controller identifier, multiplexing the samples by group in second data frames (T21, T22), a second data frame being associated with a controller identifier, transmitting the second data frames via a plurality of second data links (DL21, DL22) associated respectively with the plurality of recipient antenna controller devices. |
| US10680932B1 |
Managing connectivity to synchronously replicated storage systems
Managing connectivity to synchronously replicated storage systems, including: identifying a plurality of storage systems across which a dataset is synchronously replicated; identifying a host that can issue I/O operations directed to the dataset; identifying a plurality of data communications paths between the host and the plurality of storage systems across which a dataset is synchronously replicated; identifying, from amongst the plurality of data communications paths between the host and the plurality of storage systems across which a dataset is synchronously replicated, one or more optimal paths; and issuing, to the host, an identification of the one or more optimal paths. |
| US10680931B2 |
Ingress gateway selection for a shortest path bridging network to support inter domain multicast routing
In a Shortest Path Bridge (SPB) network comprising a plurality of backbone edge bridges (BEBs), a gateway controller of the SPB network, establishes a link using Multicast Source Discovery Protocol (MSDP) with an external network domain; discovers via the link a source of a multicast stream originating outside of the SPB network; and determines a subset of the plurality of BEBs that are able to receive the multicast stream from the source. Once that occurs, the gateway controller selects a one of the subset of the plurality of BEBs to be a sole gateway BEB for the multicast stream; and then transmits to each of the subset of the plurality of BEBs an indication of the sole gateway BEB selected for the multicast stream. |
| US10680924B2 |
Method, a computer program product, and a carrier for indicating one-way latency in a data network
Disclosed herein is a method, a computer program product, and a carrier for indicating one-way latency in a data network (N) between a first node (A) and a second node (B), wherein the data network (N) lacks continuous clock synchronization, comprising: a pre-synchronisation step, a measuring step, a post-synchronisation step, an interpolation step, and generating a latency profile. The present invention also relates to a computer program product incorporating the method, a carrier comprising the computer program product, and a method for indicating server functionality based on the first aspect. |
| US10680922B2 |
Communication control apparatus and communication control method
A communication control apparatus connected to a content-oriented network includes a transmitter, a receiver, a memory, and a processor. The transmitter transmits an interest packet requesting a plurality of pieces of content. The receiver receives a first data packet including (i) a first piece of content, which is one of the pieces of content, and (ii) first PIT information representing a name of a second piece of content, which is another of the pieces of content and which has not been transmitted from a transmission source. The memory stores a transmission PIT in which names of the pieces of content are registered. The processor registers, in response to transmission of the interest packet, the names of the pieces of content registered in the transmission PIT, and deletes, in response to reception of the first data packet, a name of the first piece of content from the transmission PIT. |
| US10680920B2 |
Managing a communications system based on software defined networking (SDN) architecture
Embodiments of the disclosure relate to managing a communications system based on software defined networking (SDN) architecture. An SDN controller is provided in the communications system to manage a wireless distribution system (WDS) and a local area network (LAN) based on SDN architecture. The SDN controller is communicatively coupled to a WDS control system in the WDS and a LAN control system in the LAN via respective SDN control data plane interfaces (CDPIs). The SDN controller analyzes a WDS performance report and a LAN performance report and provides a WDS configuration instruction(s) and/or a LAN configuration instruction(s) to the WDS control system and/or the LAN control system to reconfigure a WDS element(s) and/or a LAN element(s) to improve quality-of-experiences (QoEs) of the communications system. Monitoring and optimizing the WDS and the LAN based on a unified software-based network management platform can improve performance at reduced operational costs and complexity. |
| US10680919B2 |
Eliminating bad rankers and dynamically recruiting rankers in a network assurance system
In one embodiment, a network assurance service that monitors a network detects anomalies in the network by applying one or more machine learning models to telemetry data from the network. The network assurance service ranks feedback from a plurality of anomaly rankers regarding relevancy or criticality of the detected anomalies. The network assurance service clusters the plurality of anomaly rankers into clusters of similar rankers, based on the received ranking feedback. The network assurance service uses the clusters of similar rankers to assign reliability scores to each of the anomaly rankers. The network assurance service selects, based on the reliability scores, a subset of the plurality of anomaly rankers to receive an anomaly detection alert regarding a particular detected anomaly to be ranked. The network assurance service provides the anomaly detection alert to the selected subset of the plurality of anomaly rankers for ranking. |
| US10680916B2 |
Management of network elements in a cloud platform
According to examples, an apparatus may include a processor and a memory on which is stored machine readable instructions that when executed cause the processor to receive first data from a first data provider in a cloud platform, receive second data from a second data provider in the cloud platform, the second data being a different type of data than the first data, and the first data and the second data pertaining to network elements in the cloud platform. The instructions may also cause the processor to normalize the first data and the second data and based on an analysis of the normalized first data and the second data, identify an action to be executed in the cloud platform. The instructions may further cause the processor to instruct a dispatcher to execute the action. |
| US10680914B1 |
Monitoring an IT service at an overall level from machine data
One or more processing devices derive values indicative of various aspects or characteristics of how a particular service in an information technology (IT) environment is existing or performing at a point in time or for a period of time. The values are derived by a search query over machine data associated with the one or more entities that provide the service. The one or more processing devices determine a value for an aggregate key performance indicator (KPI) for the service to indicate or characterize the service overall from values for each of the various aspects. |
| US10680912B1 |
Infrastructure resource provisioning using trace-based workload temporal analysis for high performance computing
A computer-implemented method, a computer program product, and a computer system for infrastructure resource provisioning using trace-based workload temporal analysis. An infrastructure provider receives, from an on-premises infrastructure, scheduler traces of the on-premises infrastructure, one or more scenarios, one or more goals, and one or more constraints of resource deployment on the on-premises infrastructure. The infrastructure provider performs trace-based workload temporal analysis, based on the scheduler traces, the one or more scenarios, the one or more goals, and the one or more constraints. The infrastructure provider generates one or more options of provisioning infrastructure resources, based on the trace-based workload temporal analysis. The infrastructure provider provisions the on-premises infrastructure with the infrastructure resources for running high performance computing (HPC) applications, based on a selection from the one or more options by an on-premises infrastructure administrator. |
| US10680907B1 |
Devices and methods for use in managing access to computer systems
Systems and methods are provided for managing requests for access to one or more systems. One exemplary method includes receiving, through a request interface, a keyword associated with multiple roles and identifying one or more of the multiple roles consistent with the keyword, causing the identified role(s) to be displayed to the user at the communication device in the request interface, and, upon selection of one or more of the identified role(s) by the user, applying at least one access rule to the selected one or more of the identified role(s). The method then also includes issuing a notification to the user, at the request interface, when the selected one or more of the identified role(s) violates the at least one rule, where the notification indicates the violation and the at least one access rule, thereby permitting the user to select one or more different roles from the identified role(s). |
| US10680904B2 |
Determining periodicity of operation status information to predict future operation statuses of resources of the information processing devices
An information processing device includes: a memory configured to store a management program; and a processor coupled to the memory, wherein the processor, based on the management program, performs operations of: collecting operation status information stored in a storage of each of one or more information processing devices and related to an operation status of a calculation resource of each of the one or more information processing devices; determining whether the operation status information has periodicity based on the operation status information and a threshold; producing, when it is determined that the operation status information has periodicity, past activation information related to the operation status in a past duration in which the periodicity is present; and generates a prediction value of the operation status information based on the operation status information and the past activation information. |
| US10680902B2 |
Virtual agents for facilitation of network based storage reporting
Techniques for virtual agent facilitation of network-based storage reporting are provided. A method can comprise determining, by a virtual agent comprising a processor and located at a node, first information indicative of data storage associated with the node, wherein the virtual agent is configured to be instantiated at the node in response to an instantiation instruction, and comprises non-proprietary, publicly available open source software. The method can also comprise outputting, by the virtual agent, the first information for reporting and forecasting of future capacity growth on the node or a network device of a network to which the node is communicatively coupled. |
| US10680897B2 |
Network modification impact prediction
A system may include multiple network devices that communicate within a network domain, and a centralized control device configured to perform operations. The operations may include receive a request to modify one or more policies regarding traffic within the network domain, and in response to receiving the request, capture a snapshot of the network domain before modification of the one or more policies. The operations may also include, in response to receiving the request, generate a prediction of the network domain after modification of the one or more policies, and compare the snapshot of the network domain to the prediction of the network domain. The operations may additionally include, based on the comparison of the snapshot and the prediction, provide a predicted impact on the network domain, and, based on the predicted impact being above a threshold, provide an indication that the predicted impact is above the threshold. |
| US10680895B1 |
Method and system for automatic patterns generation and testing
A method and system provides automatic patterns for implementing cloud based applications. The automatic patterns are extendable to make additional extended patterns. Extended patterns carry the characteristics of the patterns from which they were extended. Updating a base pattern with new security measures causes a cascade effect that updates all extended patterns that descend from the base pattern. |
| US10680894B2 |
Detecting software misconfiguration at a remote machine
Aspects of the present disclosure relate to detecting software misconfiguration at a remote machine. A control server stores, in a data repository, a plurality of antipatterns, each antipattern relating to a misconfiguration of a remote computer system. The control server accesses data of the remote computer system. The control server runs the plurality of antipatterns on the data of the remote computer system to determine one or more misconfigurations of the remote computer system. The control server provides, as a digital transmission, an output representing the determined one or more misconfigurations of the remote computer system. |
| US10680893B2 |
Communication device, system, and method
It is an object of the present invention to achieve improvement of security by a whitelist function and improvement of network reliability by a network redundancy function at the same time. A packet relay device 100 includes packet reception units 200, a packet transfer unit 300, a S/W control unit 400, packet transmission units 500, and an input/output interface 600 and automatically generates a whitelist including an allowed communication rule. It is possible to select whether to perform communication control using the whitelist or to carry out data communication without using the whitelist for each data reception unit 200 that receives data. |
| US10680892B2 |
Managing servers with quality of service assurances
Aspects of an embodiment of the invention disclose a method, computer program product, and system for managing the energy efficiency of servers providing multi-class computing services with Quality of Service (QoS) assurance. Computing resources are clustered into at least three groups, where each group has a separate power management policy (PMP). A plurality of requests are received from a plurality of devices, and are sorted into at least three service classes based on the requests' QoS criteria. Each request is assigned to one of at least three service queues based on the request's service class, and each service group is processed by a group of computing resources. The power management policies are configured such that each group of computing resources may service requests at an energy efficient point while meeting the QoS criteria of the service class. |
| US10680889B2 |
Network configuration change analysis using machine learning
In one embodiment, a network assurance service that monitors one or more networks receives data indicative of networking device configuration changes in the one or more networks. The service also receives one or more performance indicators for the one or more networks. The service trains a machine learning model based on the received data indicative of the networking device configuration changes and on the received one or more performance indicators for the one or more networks. The service predicts, using the machine learning model, a change in the one or more performance indicators that would result from a particular networking device configuration change. The service causes the particular networking device configuration change to be made in the network based on the predicted one or more performance indicators. |
| US10680887B2 |
Remote device status audit and recovery
Systems, methods, and computer-readable media are disclosed for remotely managing and correcting implementation of configuration settings at network devices operating in the network. In one aspect of the present disclosure, a method includes transmitting, by a controller, a request to a network device of the network for a status of operation of the network device with respect at least one configuration setting available at the network device; determining, by the controller, whether the status matches an operation status provided by the at least one configuration setting; and performing, by the controller, a recovery process to adjust the implementation of the at least one configuration setting when the determining determines that the status does not match the operation status. |
| US10680877B2 |
Information transmission, sending, and acquisition method and device
An information transmission, sending, and acquisition method and device. A method includes: using a master and slave relay terminal in an information relay terminal pair at the head of an information relay terminal pair queue to synchronously receive information sent by a sending terminal, and using the master relay terminal to transmit information to a receiving terminal; when a fault occurs in the master or slave relay terminal at the head of the queue, stopping using the master and slave relay terminals to receive information, and deleting the information relay terminal pair from the queue; after the slave or master relay terminal in the deleted terminal pair transmits all the information to the receiving terminal and the fault of the master or slave relay terminal is removed, inserting the terminal pair to the tail of the queue; and meanwhile, when the fault occurs in the master or slave relay terminal, using the next adjacent terminal pair to continue receiving the information. The invention implements strictly-ordered and efficient information transmission. |
| US10680875B2 |
Automatic customer complaint resolution
An analytic application may automatically determine a root cause of an issue with a wireless carrier network and generate a solution for the root cause. Initially, a data management platform may receive performance data regarding user device and network components of a wireless carrier network from multiple data sources. Subsequently, the analytic application may receive an indication of an issue affecting one or more user devices that are using the wireless carrier network. The analytic application may analyze the performance data using a trained machine learning model to determine a root cause for the issue affecting the one or more user devices. The trained machine learning model may employ multiple types of machine learning algorithms to analyze the performance data. The analytic application may provide the root cause or the solution that resolves the root cause for presentation. |
| US10680874B2 |
Network service fault handling method, service management system, and system management module
The method in the embodiments of the present invention includes after a service management system SMS detects that operating performance data of a VNF is abnormal, sending network service association request information to a system management module, where the network service association request information is used by the system management module to query a fault and feed back a network service association response to the SMS. The method also includes performing, by the SMS, fault diagnosis according to the network service fault association response and the operating performance data of the VNF, to obtain a network service fault diagnosis report. Additionally, the method includes sending the network service fault diagnosis report to the system management module, where the network service fault diagnosis report is used by the system management module to perform fault recovery. |
| US10680873B2 |
Transmitting apparatus and mapping method thereof
A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. |
| US10680868B2 |
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
A method and an apparatus for transmitting broadcast signals thereof are disclosed. The method for transmitting broadcast signals, the method comprises encoding service data, encoding signaling data, MIMO (Multiple-Input and Multiple-Output) precoding the encoded service data, building at least one signal frame including the MIMO precoded service data and the encoded signaling data, modulating data in the built at least one signal frame by an OFDM (Orthogonal Frequency Division Multiplex) scheme and transmitting the broadcast signals having the modulated data. |
| US10680864B2 |
System and scheme of scalable OFDM numerology
For a wireless communications system, scalable orthogonal frequency division multiplexing (OFDM) numerology is incorporated in a manner that can apply to radio link transmissions in future wireless network for frequency division duplex (FDD) and time division duplex (TDD) communications. |
| US10680863B2 |
Modulation apparatus
Modulation apparatus, comprising: a first delta-sigma modulator for providing a digital in-phase signal based on a modulation of an in-phase component of a baseband signal; a second delta-sigma modulator for providing a digital quadrature signal based on a modulation of a quadrature component of the baseband signal; a first multiplicative combiner for combining a carrier signal with the digital in-phase signal and for providing an in-phase output signal; a second multiplicative combiner for combining the carrier signal with the digital quadrature signal and for providing a quadrature output signal; a delay component for generating a 90° phase shift between the in-phase output signal and the quadrature output signal; and an additive output combiner for combining the in-phase output signal and the quadrature output signal and generating a transmit signal. |
| US10680859B2 |
Transmitter and methods therein for transmitting overlaid and underlaid signals
A transmitter 108 and a method therein for transmitting overlaid and underlaid signals to a narrowband receiver 112 and a wideband receiver 110. The transmitter and the receivers operate in a wireless communications network 100. The transmitter generates a narrowband signal carrying data for the narrowband receiver. The narrowband signal is generated by: mapping user code bits of the data to a first set of binary symbols; generating a second set of binary symbols by precoding the first set of binary symbols; rotating the binary symbols of the second set resulting in rotated constellation symbols; and filtering the rotated constellation symbols. Further, the transmitter generates a wideband signal carrying data for the wideband receiver. Furthermore, the transmitter overlays the generated narrowband signal over the generated wideband signal and transmits, to the narrowband receiver and the wideband receiver, the overlaid narrowband signal and the underlaid wideband signal, respectively. |
| US10680853B2 |
System for combining wireless sensor networks and method thereof
A system for combining wireless sensor networks includes a first sink transmitting a request to combine (RTC) and first routing-information. First nodes propagate data and instructions in a first wireless sensor network. The first nodes broadcast the RTC when the first nodes are boundary nodes. The first routing-information are established based on first transmission paths between the first sink and the first nodes. A second sink receives the RTC and the first routing-information from the first sink. The second sink transmits second routing-information to the first sink. The second routing-information are established based on second transmission paths between the second sink and the second nodes. The second node relays the RTC to the second sink according to a flag in a packet of the RTC. The first wireless sensor network combines with the second wireless sensor network to exchange the first routing-information and the second routing-information. |
| US10680852B2 |
Configuration of a managed device
Example implementations relate to configuring a managed device. For example, configuration of a managed device may be performed by a services controller. The services controller may comprise a processing resource and a memory resource storing machine readable instructions to cause the processing resource to perform a number of actions. For instance, the services controller may manage configuration of a network using a hierarchical configuration model. The services controller may define a plurality of configuration elements for each of a plurality of managed devices in the hierarchical configuration model, where configuration elements shared among the plurality of managed devices are assigned a same setting from the services controller, and the configuration elements assigned by the services controller are customizable by each of the plurality of managed devices. |
| US10680849B2 |
Built-in apparatus, communication method, and computer readable medium
A built-in apparatus includes a response time buffer (11) that stores a response time, a calculation result buffer (14) that stores a calculated frame, and a transmission part (130). The transmission part (130) obtains second data and start processing for calculating a frame check sequence from the second data, upon receiving a transmission command (310), judges whether frame transmission processing for generating and transmitting the second data and the frame check sequence calculated from the second data as a response frame (320) will be completed within the response time, and transmits the calculated frame stored in the calculation result buffer (14) as the response frame (320) when judging that the frame transmission processing will not be completed within the response time. |
| US10680847B2 |
Gateway device determining whether or not received frame is appropriate
A gateway device for a vehicle network system, the vehicle network system including a bus, a first electronic control unit connected to the bus, and the gateway device connected to the bus. The gateway device comprising: one or more memories; and circuitry which, in operation, performs operations including: receiving a first frame transmitted to the bus by the first electronic control unit; when the first frame is received, including first control information in a second frame, the second frame including information based on content of the first frame, the first control information related to a restriction on processing, the restriction on processing being after a reception of the second frame; and transmitting the second frame to the bus. |
| US10680844B2 |
Apparatus and method for providing information for a wireless network connection using Wi-Fi
An apparatus, method, and system for providing information for a wireless network connection using Wi-Fi. Device information for at least one UPnP device is provided from a plurality of wireless devices including the at least one UPnP device, a device information announcement message including the device information for the at least one UPnP device is generated, and the generated device information announcement message is broadcasted. In this way, information on a UPnP device to which to connect a wireless device is provided in advance, and a user can easily perform a network connection. |
| US10680833B2 |
Obtaining and using time information on a secure element (SE)
A secure element (SE) with a notion of time useful for checking secure items is disclosed herein. Use of Public Key Infrastructure (PKI) with secure elements is improved by verifying secure items used by an SE. Methods of obtaining time information by the SE include push, pull, opportunistic, local interface, and multi-check methods. The SE uses the time information to evaluate arriving and stored public key certificates and to discard those which fail the evaluation. The SE, in some embodiments, uses the time information in cooperation with certificate revocation lists (CRLs) and/or online certificate status protocol (OCSP) stapling procedures. A multi-check architecture is provided herein by which more than entity is involved in checking a time value before the time value reaches the SE. The multi-check architecture uses both PKI and blockchain techniques. |
| US10680819B2 |
Systems and methods for operating secure elliptic curve cryptosystems
Various embodiments of the invention implement countermeasures designed to withstand attacks by potential intruders who seek partial or full retrieval of elliptic curve secrets by using known methods that exploit system vulnerabilities, including elliptic operation differentiation, dummy operation detection, lattice attacks, and first real operation detection. Various embodiments of the invention provide resistance against side-channel attacks, such as sample power analysis, caused by the detectability of scalar values from information leaked during regular operation flow that would otherwise compromise system security. In certain embodiments, system immunity is maintained by performing elliptic scalar operations that use secret-independent operation flow in a secure Elliptic Curve Cryptosystem. |
| US10680817B2 |
Wireless communications device and control method for wireless communications device
A wireless communications device is constituted from a control station and a slave station that perform encryption communication using an encryption key and changes the encryption key in a predetermined procedure, during a call, and the device includes a controller that operates in such a manner that audio is reduced, if the procedure in which the encryption key is changed is not correctly executed, in a case where a change of the encryption key is made. |
| US10680813B2 |
Crypto-erasure resilient to network outage
Providing a server polling component for remote cryptographic key erasure resilient to network outage. A set of keys received from a server are stored on data storage. The data storage sends a status request to the server. If a key enabled status is received, the data storage continues normal operations. If a key disabled status is received, a key failure action is performed. The key failure action includes deleting one or more of the keys in the set of keys or shutting down one or more storage devices of the data storage. If no response is received from the server, the data storage iteratively resends the status request at retry time intervals until a response is received from the server or until a time out period expires. On expiration of the time out period, the key failure action is performed. |
| US10680806B1 |
DNS-based symmetric-key infrastructure
Techniques for distributing a symmetric key using the Domain Name System (DNS) are presented. The techniques can include receiving, at a first key server and from a first computer, a request for first information sufficient for the first computer to obtain, and second information sufficient for a second computer to obtain, a symmetric key for securing at least one communication sent from the first computer to the second computer, and providing, by the first key server and to the first computer, the first information and the second information, such that the first computer secures at least one communication sent from the first computer to the second computer using at least the symmetric key for securing at least one communication sent from the first computer to the second computer. |
| US10680802B2 |
High-rate multi-block-length hash function based on block ciphers
Various embodiments relate to a method of hashing a message M using a block cipher, including: producing N block cipher inputs by XORing message indices i, . . . i+N−1 respectively with state values S0, . . . SN−1, wherein N is an integer greater than 1; producing N block cipher keys by XORing N different blocks of message M and at least one of state values S0, . . . SN−1 for each of the N block cipher keys; encrypting the N block cipher inputs using the respective N block cipher keys to produce N block cipher outputs; combining the N block cipher outputs with N block cipher inputs to produce N block cipher combined outputs Tt, for t=0, . . . , N−1; calculating Y0=T0; calculating Yt=Yt−1⊕Tt, for t=1, . . . , N−1, calculating SN−1′=YN−1<< |
| US10680799B2 |
Secure remote aggregation
The application relates to a method for aggregation of a performance indicator of a device including: concatenating a respective first data item to a plurality of second data items in the device; encrypting the plurality of concatenated second data items relevant for computing the performance indicator using a first encryption key in the device, wherein the first encryption key is based on an additive homomorphic encryption scheme; sending the encrypted concatenated second data items to a computation cluster; computing the performance indicator on the computation cluster using the encrypted concatenated second data items and computing an aggregate value regarding the performance indicator by summing up the encrypted concatenated second data items; sending the aggregate value to a server of a service provider of the device; decrypting the aggregate value using a second encryption key on the server of the service provider; and verifying the decrypted result by checking whether the decrypted sum computed by summing up the encrypted concatenated second data items comprises a predetermined value. The present application also relates to a corresponding system and corresponding computer program product including one or more computer readable media having computer executable instructions for performing the steps of the method. |
| US10680797B2 |
Security-adaptive voltage conversion as a lightweight counter measure against LPA attacks
Methods and systems are provided for a security adaptive (SA) voltage converter that receives input power from a power source and provides power to a cryptographic system. The SA voltage converter triggers countermeasures against leakage power analysis (LPA) attacks that slow down an operating frequency of the cryptographic circuit. When an LPA attack is detected, a discharging resistor sinks redundant current to alter the signature of load power dissipation of at the input to the SA voltage converter system. The SA voltage converter includes a converter reshuffling converter. The power dissipation induced by the discharging resistor, as measured at the input received from the power source, is scrambled by the SA voltage converter to increase noise inserted into the input power and to alter the power profile that is measured for the cryptographic circuit. |
| US10680795B2 |
Quadrature signal generation
Apparatuses and methods for quadrature signal generation are provided. An example includes a quadrature signal generator. The quadrature signal generator is configured to generate, based on a received differential signal, a plurality of quadrature clock signals at a same frequency as that of the received differential signal. The quadrature signal generator is also configured to provide the plurality of quadrature clock signals to a memory system. |
| US10680794B2 |
Sample rate conversion by Gaussian blur
Described herein is an apparatus for the recovery of asynchronous data into a fixed clock domain. A phase-locked loop (PLL) of the known art is replaced by a modified quadrature resolver, and the output from the resolver re-creates the selected frequency component of the input asynchronous data. The zero-crossings of this re-created data clock are used to sample the input data stream. One advantage of this technique is that it operates as a state machine on a single clock, and no analog components such as phase detectors or VCOs are needed. In another embodiment, the samples from the input data stream are changed from pulses to Gaussians, allowing for conversion of the sample rate from one clock domain to another. |
| US10680793B2 |
Synchronising devices using clock signal delay comparison
A circuit for estimating a time difference between a first signal and a second signal, the circuit comprising: a first signal line for receiving the first signal; a delay unit configured to receive the second signal and delay the second signal so as to provide a plurality of delayed versions of the second signal, each delayed version being delayed by a different amount of delay to the other delayed versions; a comparison unit configured to compare each of the delayed versions of the second signal with the first signal so as to identify which of the delayed versions of the second signal is the closest temporally matching signal to the first signal; and a difference estimator configured to estimate the time difference between the first and second signals in dependence on the identified delayed version. |
| US10680790B2 |
Antenna system
An antenna system, including: M transmit antenna pairs, where two transmit antennas of each transmit antenna pair are symmetrically distributed on both sides of a same symmetry axis; N receive antenna pairs, where two receive antennas of each receive antenna pair are symmetrically distributed on both sides of the symmetry axis; M dividing devices, which are one-to-one corresponding to the M transmit antenna pairs, and each dividing device is configured to: divide one transmit signal into two transmit signals and separately send the two transmit signals to a corresponding transmit antenna pair; and N combining devices, which are one-to-one corresponding to the N receive antenna pairs. Each combining device is configured to combine two receive signals received by a corresponding receive antenna pair into one receive signal. One of the dividing device and the combining device is an in-phase dividing device, and the other is an out-of-phase combining device. |
| US10680787B2 |
Method and device for transmitting and receiving data by using multiple carriers in mobile communication system
To solve the above-mentioned problem, the method for transmitting and receiving a signal by user equipment (UE) through one or more cells, according to one embodiment of the present specification, comprises the steps of: receiving, from a base station, a first message indicating whether one or more cells usable by the UE are enabled; determining which cells to enable or disable on the basis of the first message; and enabling or disabling the selected cells. According to the embodiment of the present specification, by aggregating carriers amongst different base stations, a possibility for the UE to transmit and receive high-speed data through carrier aggregation can increase. |
| US10680783B2 |
Method and apparatus for transmitting uplink control signal
The present disclosure provides a method and an apparatus for transmitting an uplink control signal. The method includes: transmitting M predefined sequences on two transmission symbols within a transmission time interval, and determining an acknowledgement (ACK) message or a negative acknowledgement (NACK) message according to the M predefined sequences and mapping patterns of the M predefined sequences in a time domain and a frequency domain, where M is a positive integer. By means of the above technical solution, a problem that a transmission structure for transmitting the ACK message and the NACK message is imperfect when the transmission time interval is equal to the length of two symbols is solved, and the transmitting of the ACK message and the NACK message when the transmission time interval is equal to the length of two symbols is perfected. |
| US10680779B2 |
Method for allocating control resource set, method for acquiring control resource set, base station, user equipment and readable medium
Method for allocating CORESET, method for acquiring CORESET, base station, UE and readable mediums are provided. The method for allocating CORESET includes: configuring time position information of a CORESET, the time position information including: the number of symbols occupied by the CORESET, or the number of symbols occupied by the CORESET and a start position of the CORESET, the symbols including symbols in a numerology used by the CORESET; configuring position information of the CORESET in SFN; transmitting the time position information and the position information to the UE, so that the UE selects the start position of the CORESET based on the time position information and the position information, and a preset table of relation between the number of symbols occupied by the CORESET and the start position of the CORESET. The base station doesn't need to directly indicate the CORESET, which reduces overhead of signaling indicating CORESET. |
| US10680778B2 |
Reducing control channel overhead in 5G or other next generation networks
Controlling and reducing overhead in control channels in 5G or other next generation communication systems is provided herein. In connection with a data transmission between a device and a network node device, an overhead management component (OMC) can analyze one or more factors associated with the device, including speed or Doppler metric(s) of the device, type of service associated with the device, historical HARQ statistics for the device, configured threshold value for CSI estimation, device capability regarding redundancy version support, or another factor(s). Based on analysis results, OMC can determine whether to utilize a single redundancy version state or a multiple redundancy versions state. If the single redundancy version state is selected, OMC can generate control information that does not include redundancy version information, the control information being communicated via a control channel. OMC can communicate RRC signal to the device to indicate the determined redundancy version state. |
| US10680776B2 |
Pilot signal transmission method, base station, and user equipment
This application provides a pilot signal transmission method, a base station, and user equipment. A dedicated demodulation pilot signal and a common demodulation pilot signal in a TTI may be configured on different resource blocks of the TTI. The method in embodiments of the present invention includes: determining, by a base station, a resource location that is in a TTI and that is used to send a pilot signal, where the pilot signal includes a common demodulation pilot signal and a dedicated demodulation pilot signal, and the dedicated demodulation pilot signal and the common demodulation pilot signal are located on different resource blocks of the TTI; and sending, by the base station, the pilot signal at the resource location used to send the pilot signal. |
| US10680774B2 |
Size determination for channel state information (CSI) part one and part two transmission of CSI report
Embodiments of a User Equipment (UE), Next Generation Node-B (gNB) and methods of communication are generally described herein. A channel state information (CSI) report may include a CSI part 1 transmission and may be configurable to include a CSI part 2 transmission. The UE may determine a first number of coded modulation symbols per layer to be used for the CSI part 1 transmission on a physical uplink shared channel (PUSCH) without uplink shared channel (UL-SCH) data. The first number of coded modulation symbols per layer may be determined as: a minimum of a first term and a second term if the CSI report includes the CSI part 2 transmission; and the second term if the CSI report does not include the CSI part 2 transmission. |
| US10680770B2 |
Inter-cell beam coordination scheduling method and related device
The present disclosure relates to inter-cell beam coordination scheduling methods and related devices. One example inter-cell beam coordination scheduling method includes receiving, by a first wireless access device serving a coordinated cell, a coordination scheduling request specific to an edge user terminal of a serving cell, where the coordination scheduling request carries an indication of a downlink narrow-transmission beam set DX1, and the downlink narrow-transmission beam set DX1 is a downlink narrow-transmission beam set that satisfies a principle of minimal interference and that is determined by the edge user terminal through beam training, and in a slot in which downlink scheduling is performed on the edge user terminal in the serving cell, preferably using, by the first wireless access device, a narrow-transmission beam in the downlink narrow-transmission beam set DX1 to schedule a camping user terminal of the coordinated cell in downlink. |
| US10680759B2 |
Data transmission method and apparatus
A data transmission method and apparatus, where a transmission end determines a redundancy time according to a delay requirement of a service, where the redundancy time indicates a time used for transmitting redundant data of native data of the service, and the redundancy time is less than or equal to a time indicated by the delay requirement. The transmission end determines a redundancy quantity N. The transmission end determines N redundancy transmission time intervals according to the redundancy time and the redundancy quantity. After the native data of the service is sent, in case of feedback data is not received within an nth redundancy transmission time interval, transmitting the redundant data of the native data for the nth time according to the nth redundancy transmission time interval. |
| US10680758B2 |
Method and device for operation of user equipment and base station in wireless communication system
The present invention discloses methods for operating a user equipment and a base station in a wireless communication system and devices for supporting the same. More specifically, the present invention provides various embodiments of methods by which a user equipment transmits an uplink signal to a base station and receives feedback information on the uplink signal in order to transmit and receive signals to and from the base station. |
| US10680750B2 |
Transmitting apparatus and mapping method thereof
A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. |
| US10680745B2 |
Blind detection of preempted resources in orthogonal frequency division multiplexing (OFDM) systems
A system and method for blind detection of preempted resources in an orthogonal frequency division multiplexing (OFDM) system is herein disclosed. According to one embodiment, a method for blind detection of resources in an eMBB pre-empted by a URLLC includes receiving soft information including at least one code block, attempting to decode the at least one code block, and running URLLC blind detection on the at least one code block with the decoding attempt fails. |
| US10680743B2 |
Link adaptation based on neighboring cell transmission information
The present disclosure provides a fine-grained link adaptation mechanism that allows for link adaptation at a resource block granularity. To this end, the fine-grained link adaptation mechanism can determine the effective signal-to-interference-plus-noise ratio for individual user equipment in a particular cell at the resource block granularity. This way, the transmitter can use the effective signal-to-interference-plus-noise ratio to adapt the modulation and coding scheme at the resource block granularity. The fine-grained link adaptation mechanism can be introduced to a long term evolution (LTE) network without substantial redesign of the LTE network. |
| US10680730B2 |
Testing wireless networks using random wireless device locations
An apparatus for emulating a wireless network is provided. The apparatus includes processing circuitry configured to: generate a random number corresponding to an angle between a boresight of an antenna of a network node and a direction of a first wireless device, generate a random number corresponding to a path loss between the first wireless device and the antenna of the network node, determine network performance of the first wireless device based at least in part on the generated random number corresponding to the angle between the boresight of the antenna of the network node and the direction of the first wireless device and the generated random number corresponding to the path loss between the first wireless device and the antenna of the network node, and determine performance of the wireless network based at least in part on the determined network performance of the first wireless device. |
| US10680728B2 |
Radio communication system, receiving apparatus, correction apparatus, antenna correction method and program
A radio communication system is provided with: a transmission apparatus that responds to OAM radio communication, a receiving apparatus that responds to OAM radio communication, and a correction apparatus. The correction apparatus corrects antenna axes of the transmission apparatus and the receiving apparatus, based on correlation information that associates: information related to the antennas of the transmission apparatus and the receiving apparatus, and an inter-mode interference pattern that characterizes interference by a transmission mode when the transmission apparatus transmits a signal, on a receiving mode when the receiving apparatus receives a signal. |
| US10680726B2 |
Method and apparatus for antenna phase correction in large-capacity antenna system
The present disclosure relates to a 5G or pre-5G communication system for supporting a higher data transfer rate than a 4G communication system such as LTE. The method is for phase correction of an antenna in a large-capacity antenna system, the method includes grouping large-capacity antennas into a predetermined number of groups; setting a path such that ports of the grouped antennas have a feedback path; outputting a test signal to be outputted to each antenna port of each group by adding a code or sequence having orthogonality; separating signals for each antenna port in the group by using the code or sequence having orthogonality in a signal received through the feedback path; and calculating a calibration value by detecting a phase change of the separated signal. |
| US10680721B2 |
Systems and methods for over-the-horizon communication
A communication system and method is described, including two or more transceivers at different locations, in which a region of the atmosphere at an altitude ranging from 150-350 KM is modified by applying an E-Field strength of 0.2 V/m to create a High-Frequency Ionized Lines/High-Frequency Plasma Lines (HFIL/HFPL) region. The HFIL/HFPL region provides a means for incoming RF transmission signals to be isotropically repeated and received by transceivers at other distant locations within line-of-sight of the HFIL/HFPL region. Incoming RF transmissions into the HFIL/HFPL region may use radio frequencies ranging from 100 MHz-20 GHz. The system described offers a means for users to transmit data from one over-the-horizon location to another at distances up to 4800 km without wires or physical satellites. |
| US10680720B2 |
Optical point source detection locating sensor
A system for processing optical signals comprising a reference optical signal transmission structure configured to receive an optical signal at a first input and to provide the optical signal at a first output to a photodetector. A delay optical signal transmission structure configured to receive the optical signal at a second input and to provide a delayed optical signal at a second output to the photodetector. A signal processor configured to receive a first electric signal corresponding to the optical signal and a second electric signal corresponding to the delayed optical signal and to generate an output as a function of the first electric signal and the second electric signal. |
| US10680718B2 |
Trellis based processing for robust digital multiband transmission
Aspects of the present disclosure are directed in part to a receiver DSP unit including an equalization module. The equalization module includes a trellis-based equalization module that may utilize multiple trellis-based processors (TBP), which can each be individually adaptively configured for performing a trellis-based equalization. The design of the TBPs allows them to be configured for compensating a residual Inter-Symbol Interference (ISI) as well as compensating a residual Phase Noise (PN). ISI is an example of an additive impairment and PN is an example of a multiplicative impairment that communication systems, particularly high speed transmission systems such as coherent optical systems, can suffer from. |
| US10680715B1 |
Digital implementation of closed loop optical modulation amplitude controller for laser diode
An OMA controller circuit utilizes a first ADC with an input coupled for receiving a residual error signal indicating a difference between a monitoring signal and a target data signal. A second ADC has an input coupled for receiving the target data signal. A first digital filter has an input coupled to an output of the first ADC, and a second digital filter has an input coupled to an output of the second ADC. A digital multiplier has a first input coupled to an output of the first digital filter and a second input coupled to an output of the second digital filter. An integrator has an input coupled to an output of the digital multiplier and an output providing an average error signal with sign and magnitude. The digital multiplier uses a four quadrant multiplier to perform a cross-correlation on the residual error and the target data signal. |
| US10680713B2 |
Fiber to the home network incorporating fully connectorized optic fiber tap assembly
A fully connectorized optic fiber tap assembly is described that includes a first upstream connector interface configured to receive a downstream connector of a first upstream optic fiber line, and a first downstream connector interface configured to receive an upstream connector of a first downstream optic fiber line. The tap assembly further includes a set of service drop line connector interfaces. Moreover, an optic fiber tap of the assembly is configured to: receive an optical signal from the upstream connector interface, extract a portion of the optical signal, direct the extracted portion of the optical signal to the set of service drop line connector interfaces, and pass a remaining portion of the optical signal to the downstream connector interface. The fully connectorized optic fiber tap assembly is configured to be connected to the first upstream optic fiber line and the first downstream optic fiber line without splicing. |
| US10680711B2 |
System and method for providing optically coded information
An active optical machine-readable tag (i.e. optical tag) is provided that is addressable and readable within a line-of-sight of a reader device, such as a mobile device equipped with a camera, at substantially large distances. A method and a system are provided for an active optical tag and a camera-based reader thereof that facilitate asynchronous communication at data rates that are sufficiently high for practical uses, while reducing the flicker associated with the low-frequency optical carrier to a level hardly noticeable by people. The optical tag may be formed as an array of light emitting elements, arranged in a single dimension (linear) or two dimension (planar) arrangement. The array may be embodied as part of a large display unit. |
| US10680709B2 |
Debugging method and device for operating point voltage of parallel MZI electro-opticalmodulator
A debugging method and device for an operating point voltage of a parallel MZI electro-optical modulator. The parallel MZI electro-optical modulator comprises a Parent MZI (2) formed by a parallel connection of a Child MZI (3) in an I path and a Child MZI (4) in a Q path. The debugging method comprises: fixing a bias voltage of one Child MZI of the Child MZI (3) in the I path and the Child MZI (4) in the Q path; gradually adjusting a bias voltage of the other Child MZI, testing a parent extinction ratio PER of the Parent MZI (2) when different bias voltages are applied, and finding a corresponding bias voltage as an operating point voltage of the other Child MZI when the PER of the Parent MZI (2) reaches a minimum value, and then finding a corresponding bias voltage as an operating point voltage of the one Child MZI when the PER of the Parent MZI (2) reaches a minimum value; setting the bias voltages of two Child MZIs as operating point voltages corresponding to the two Child MZIs respectively, adjusting a phase modulation voltage of the Parent MZI (2) until the parallel MZI electro-optical modulator reaches an optimum output effect, and determining the phase modulation voltage of the Parent MZI (2). The method and device are simple; and the debugging process thereof is fast and efficient. |
| US10680708B2 |
Systems and methods for locating a single reflection on a transmission line
A system for testing reflections within a data transmission signal includes a data transmission line configured to transmit the signal in a downstream direction, and a test probe configured to electrically contact a contact point on the transmission line and measure a magnitude of a frequency response of the signal therein. The system further includes a spectrum capturing device in operable contact with the test probe, and configured to collect and arrange data of frequency response magnitudes measured by the test probe. The data transmission line includes at least a first impedance mismatch corresponding to a first reflection point along the transmission line, and the spectrum capturing device is configured to determine a severity of the first reflection based on a comparison of a first voltage V1 with a second voltage V2, where V1 represents a DC term, and where V2 represents a reflected energy of a subsequent impulse. |
| US10680706B2 |
Techniques and apparatuses for time division duplex coexistence configuration
A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus may receive, for a citizens broadband radio service (CBRS) band, time division duplex (TDD) configuration preferences. The apparatus may select, based at least in part on the TDD configuration preferences, a TDD configuration, from a plurality of possible TDD configurations. The apparatus may transmit selection information identifying the selected TDD configuration. |
| US10680704B2 |
Layer-2 connectivity from switch to access node/gateway
Methods, systems, and apparatuses for providing layer-2 connectivity through a non-routed ground segment network, are described. A system includes a non-autonomous gateway in communication with a satellite configured to relay data packets. The non-autonomous gateway is configured to receive the data packets from the satellite at layer-1 (L1) of the OSI-model, generate a plurality of virtual tagging tuples within the layer-2 packet headers of the plurality of data packets. The non-autonomous gateway is further configured to transmit, at layer-2 (L2) of the OSI-model, the virtually tagged data packets. Each of the packets may include a virtual tagging tuple and an entity destination. The system further includes a L2 switch in communication with the non-autonomous gateway. The L2 switch may be configured to receive the data packets and transmit the data packets to the entity based on the virtual tuples associated with each of the data packets. |
| US10680699B2 |
Method and apparatus for calculating beamforming based paging occasion in wireless communication system
According to the present invention, a user equipment (UE) calculates its paging occasion based on a specific beam to monitor paging. In detail, the UE selects at least one beam among multiple beams, calculates a paging occasion consisting of the at least one beam, and monitors a paging in the paging occasion. When the paging occasion consists of the multiple beams including the at least one beam, the paging may be monitored in a part of the paging occasion where the at least one beam is transmitted. Alternatively, when the paging occasion only consists of the at least one beam, the paging may be monitored in all of the paging occasion where the at least one beam is transmitted. |
| US10680698B2 |
Uplink control information mapping on a shortened uplink shared channel
Methods, systems, and devices for wireless communications are described. A UE may configure a physical uplink shared channel (PUSCH) using shortened transmission time intervals (sTTIs), which may be referred to as a shortened PUSCH (sPUSCH), to transmit uplink control information (UCI) to a base station or other wireless device. The UE may use mapping rules, which may be based at least in part on a number of data symbols included in the sPUSCH, to map different types of UCI to different resource elements (REs) within the sPUSCH. A base station or other wireless device may use mapping rules, which may be based at least in part on a number of data symbols included in an sPUSCH, to determine one or more REs within the sPUSCH to monitor for different types of UCI. |
| US10680693B1 |
Radio frequency beamforming calibration systems and methods
Systems and methods for improving testing and/or calibration efficiency of radio frequency system. In some embodiments, a testing system includes a beamformer radio frequency system, in which the beamformer radio frequency system includes first transceiver circuitry and a first plurality of antennas coupled to the first transceiver circuitry, a beamformee radio frequency system, in which the beamformee radio frequency system includes second transceiver circuitry and a second plurality of antennas coupled to the second transceiver circuitry, one or more wired connections coupled between the first transceiver circuitry of the beamformer radio frequency system and the second transceiver circuitry of the beamformee radio frequency system, in which each of the one or more wired connections bypasses the first plurality of antennas of the first radio frequency system and the second plurality of antennas of the second radio frequency system. |
| US10680686B2 |
Operation for 3D beam forming in a wireless communication system
Here, operation for 3D beam forming is disclosed. UE, receiving reference signals from one or more base stations (eNBs), may report feedback information comprising precoding matrix information to the one or more eNBs. The precoding matrix information indicates a first type precoding matrix for a horizontal direction and a second type precoding matrix for a vertical direction. eNBs may transmit signals, which are precoded based on a third type precoding matrix for beam forming both on the horizontal direction and the vertical direction. |
| US10680682B2 |
Channel state information feedback for multi-transmission/reception point transmission in new radio
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may determine, based at least in part on a set of channel state information reference signals (CSI-RSs), a plurality of hypotheses associated with a plurality of transmission/reception points (TRPs), wherein the UE is configured to receive non-coherent transmissions across the plurality of TRPs according to at least one of a transparent transmit diversity scheme, a non-transparent transmit diversity scheme, or a closed-loop block diagonal precoder scheme, and wherein a coherent precoder is configured within each of the plurality of TRPs. In some aspects, the UE may determine, based at least in part on the plurality of hypotheses, channel state information (CSI) feedback associated with the plurality of TRPs. Numerous other aspects are provided. |
| US10680676B2 |
Underwater signal conversion
Various embodiments associated with signal conversion while underwater are described. A source can transmit an alternating current signal with a relatively high frequency over a relatively long distance. The alternating current signal with the relatively high frequency can be converted to an alternating current signal with a relatively low frequency. An example of this conversion can be done by converting the alternating current signal with the relatively high frequency into a direct current signal. The direct current signal can then be converted into the alternating current signal with the relatively low frequency. The alternating current signal with the relatively low frequency can be transmitted from a transmission coil to a pick-up coil. After reception by the pick-up coil the alternating current signal with the relatively low frequency can be processed, such as processed to determine a direction of the source of the alternating current signal with the relatively high frequency. |
| US10680675B1 |
Logical to physical mapping of aircraft electronic components
Examples for logical to physical mapping of aircraft electronic components are presented. A system may include aircraft electronic components coupled sequentially to a power wire, corresponding controllers, and a master computing device. The computing device may receive a first identifier for a first component from a first controller in response to the first controller receiving power at a first time from the power wire and a second identifier for a second component from a second controller in response to the second controller receiving power at a second time from the power wire. The second time is subsequent to the first time. The computing device determines locations for the first and second component within the aircraft based on an order of reception of the identifiers. |
| US10680674B2 |
Systems and methods for suppressing radiofrequency noise from a modem
A cord for suppressing noise from a modem includes a hot wire, a neutral wire, and a signal balancing device. The hot wire is configured to connect to a hot power port of a modem. The neutral wire is configured to connect to a neutral power port of the modem. The signal balancing device is configured to connect to an outer conductor of a coaxial radiofrequency (RF) port of the modem and to the neutral wire or a ground wire. The signal balancing device is configured to balance RF signals transmitted through the coaxial RF port. |
| US10680673B2 |
Integrated circuit for self-interference cancellation and method of performing full-duplex radio communication
An electronic circuit for generating a delayed radio signal for use in a radio communication device configured to provide a transmit baseband signal in a baseband, to up-convert the transmit baseband signal into a transmit radio signal in a radio band, to transmit the transmit radio signal in the radio band, and to simultaneously receive a receive radio signal in the same radio band, is provided. The electronic circuit may include a delay circuit configured to delay a copy of the transmit baseband signal by an amount of time to generate a delayed baseband signal, an up-converting circuit configured to shift the frequency spectrum of the delayed baseband signal to the radio band to generate a delayed radio signal, and an output circuit configured to output the delayed radio signal for a cancellation circuit to cancel the delayed radio signal from the receive radio signal. |
| US10680668B2 |
Electronic apparatus
An electronic apparatus includes: a chassis in which a display device is housed; a noise eliminating layer that is positioned between the chassis and the display device, and eliminates noise emitted from the display device; and an antenna for wireless communication that is housed in the chassis, in which the noise eliminating layer has a main body area and an auxiliary antenna area that extends from the main body area to the antenna and assists wireless communication of the antenna, and a portion of the auxiliary antenna area between one end on the side of the antenna and the other end on the side opposite to the one end is spaced apart from the main body area. |
| US10680663B2 |
Electronic device with millimeter wave antennas
An electronic device may be provided with wireless circuitry. The wireless circuitry may include one or more antennas. The antennas may include phased antenna arrays each of which includes multiple antenna elements. Phased antenna arrays may be mounted along edges of a housing for the electronic device, behind a dielectric window such as a dielectric logo window in the housing, in alignment with dielectric housing portions at corners of the housing, or elsewhere in the electronic device. A phased antenna array may include arrays of patch antenna elements on dielectric layers separated by a ground layer. A baseband processor may distribute wireless signals to the phased antenna arrays at intermediate frequencies over intermediate frequency signal paths. Transceiver circuits at the phased antenna arrays may include upconverters and downconverters coupled to the intermediate frequency signal paths. |
| US10680661B2 |
Monopole and slot antenna assembly
The herein described technology provides a hybrid monopole and slot antenna assembly including an electrically-driven monopole antenna and a parasitic slot antenna. The electrically-driven monopole antenna is fed by a feed line coupled to a first metal portion of a device case exterior, and the parasitic slot antenna is capacitively-driven by a radiating feed element embedded in a dielectric material that resonates a second metal portion of the device case exterior. The hybrid monopole and slot antenna assembly further includes a dielectric gap insert electrically separating the first metal portion of the device case exterior from the second metal portion of the device case exterior, and a modem that drives the electrically-driven monopole antenna at a first frequency and the parasitic slot antenna at a second different frequency. |
| US10680659B2 |
System and method for improved decoding using identified recurring side information
Methods and systems for decoding monitored communication signals using previously identified side information. Information, which is used for decoding a given frame and is provided to the decoder not via the main communication channel between a base station and a mobile station, is referred to herein as “side information.” The side information can also be viewed as extrinsic information that was derived during previous decoding operations. The monitoring system holds, for certain frames, a-priori information of one or more data values that are expected in these frames. Decoding using this a-priori information enables an Error Correcting Code decoder to successfully decode such frames, which would otherwise fail to decode. |
| US10680653B2 |
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 3/15 and 4096-symbol mapping, and bit interleaving method using same
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping. |
| US10680652B2 |
Method and apparatus for channel encoding and decoding in communication or broadcasting system
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). A channel encoding method in a communication or broadcasting system includes identifying an input bit size, determining a block size (Z), determining an LDPC sequence for LDPC encoding, and performing the LDPC encoding based on the LDPC sequence and the block size. |
| US10680651B2 |
Signature-enabled polar encoder and decoder
A transmitter and receiver are provided for communication over a noisy channel in a wireless communications system. The transmitter and receiver use polar coding to provide reliability of data transmission over the noisy wireless channel. In addition, signature bits are inserted in some unreliable bit positions of the polar code. For a given codeword, the receiver with knowledge of the signature can more effectively decode the codeword. Cyclic redundancy check (CRC) bits may also included in the input vector to assist in decoding. |
| US10680650B2 |
Data processing device and data processing method
The present technology relates to a data processing device and a data processing method which can ensure high communication quality in data transmission using LDPC codes. In group-wise interleaving, an LDPC code having a code length N of 64800 bits and a coding rate r of 13/15 is interleaved in a unit of a bit group of 360 bits. In group-wise deinterleaving, a sequence of bit groups of the LDPC code which has been subjected to the group-wise interleaving is returned to an original sequence. The present technology can be applied to, for example, a case in which data transmission is performed using LDPC codes. |
| US10680643B2 |
Compression scheme with control of search agent activity
In connection with compression of an input stream, multiple portions of the input stream are searched against previously received portions of the input stream to find any matches of character strings in the previously received portions of the input stream. In some cases, matches of longer character strings, as opposed to shorter character strings, can be selected for inclusion in an encoded stream that is to be compressed. Delayed selection can occur whereby among multiple matches, a match that is longer can be selected for inclusion in the encoded stream and non-selected a character string match is reverted to a literal. A search engine that is searching an input stream to identify a repeat pattern of characters can cease to search for characters that were included in the selected character string match. |
| US10680640B2 |
Power-saving current-mode digital-to-analog converter (DAC)
A digital-to-analog converter (DAC) for an audio system in a media device, such as a portable media device or smart phone, may be operated to turn off portions of the DAC to reduce power consumption. Segments of a segment-able DAC may be powered off when the output level of the DAC is lower than the full scale output of the DAC. For example, DAC elements within a finite impulse response (FIR) DAC may be turned off when a desired output level can be obtained with less than all DAC elements of the FIR DAC. |
| US10680639B2 |
Circuit device, vibration device, electronic apparatus, and vehicle
A circuit device includes an A/D converter circuit that performs A/D conversion by successive approximation using a charge redistribution type D/A converter circuit having capacitor array circuits on the positive electrode side and the negative electrode side, and quantization error hold circuits that hold charges corresponding to a quantization error in the A/D conversion. The quantization error hold circuits include quantization error hold circuits on the positive electrode side and the negative electrode side having one ends connected to sampling nodes of the capacitor array circuits on the positive electrode side and the negative electrode side. The quantization error hold circuits on the positive electrode side and the negative electrode side are placed on a second direction side orthogonal to a first direction in which the capacitor array circuits on the positive electrode side and the negative electrode side are placed. |
| US10680633B1 |
Data acquisition system-in-package
This disclosure describes techniques to perform analog signal conditioning (including filtering and amplification) and analog-to-digital conversion (ADC) on a System-in-package (SIP) assembly technology. In particular, the disclosure combines a programmable gain amplifier (PGA), one or more filter circuits, and an ADC circuit onto the same SIP. These devices are coupled together on the SIP using high-accuracy and precise integrated-passive components. The SIP receives an analog signal, amplifies the analog signal with the PGA on the SIP, filters the amplified analog signal with the filter circuit(s) on the SIP, and then performs analog-to-digital conversion on the filtered amplified analog signal with the ADC circuit on the SIP, The SIP can be configured for various applications based on a variety of inputs and control mechanisms. |
| US10680631B1 |
Converter system and method of converting digital input data
A converter system comprises a digital-to-analog converter that has at least one digital input and at least one analog output. The converter system comprises a sample rate module configured to generate a sample rate used for digital-to-analog conversion of digital input data received via the at least one digital input. The sample rate module is configured to modulate the sample rate. The converter system is configured to manipulate the digital input data with respect to the modulation of the sample rate. Further, a method of converting digital input data into an analog signal is described. |
| US10680630B1 |
System and method to cancel skew mismatch in ADCs
An interleaved analog to digital converter (“ADC”) includes a first ADC having an input for sampling an analog signal during a first time period, an output for providing a digital signal, and a power supply terminal for receiving a first power supply voltage, a second ADC having an input for sampling the analog signal during a second time period, an output for providing a digital signal, and a power supply terminal for receiving a second power supply voltage, a first skew estimator for estimating a skew value of the first ADC, a second skew estimator for estimating a skew value of the second ADC, and a comparator for comparing the skew values, adjusting the first power supply voltage in response to a first output value of the comparator, and adjusting the second power supply voltage in response to a second output value of the comparator. |
| US10680629B2 |
Atomic oscillator and frequency signal generation system
An atomic oscillator includes a light emitting element, an atomic cell, and a light receiving element that receives the light passing through the atomic cell. The atomic cell has a first chamber containing alkali metal atoms in a gas state and having a first wall through which the light from the light emitting element passes, a second chamber containing alkali metal atoms in a liquid state and having a second wall, a passage connecting the first chamber and the second chamber to each other, and a part which is disposed between the first chamber and the second chamber and has a thermal conductivity lower than the thermal conductivity of a material forming the first wall and the thermal conductivity of a material forming the second wall. |
| US10680627B2 |
Phase-locked loop monitor circuit
A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly. |
| US10680624B2 |
Phase-locked loop with filtered quantization noise
This disclosure relates to fractional-N phase-locked loops. A digital filter can filter out quantization noise from a modulator. Separate paths can process an integer part associated with an output signal of the digital filter and a fractional part associated with the output signal of the digital filter. The separate paths can be combined in the fractional-N phase-locked loop, for example, as a weighted sum. |
| US10680619B2 |
Digital phase locked loop frequency estimation
A Digital Phase Locked Loop (DPLL), including a Time-to-Digital Converter (TDC) configured generate quantized phase values of a controlled oscillator signal; and a frequency estimation circuit configured to receive the quantized phase values, determine wraparound phase of the quantized phase values, and estimate a frequency based on the quantized phase values and the wraparound phase. |
| US10680618B2 |
Systems and methods for on-chip temperature stabilization for temperature-sensitive components of integrated circuits
An integrated circuit system is provided. The system includes a ring oscillator including a first plurality of logic gates connected in a ring configuration. The system also includes a second plurality of logic gates used to implement a heater to generate a controlled amount of heat. The second plurality of logic gates is also used to implement a temperature sensor to measure a temperature of the ring oscillator. The system further includes one or more logic circuits coupled to the heater and the temperature sensor. The one or more logic circuits are used to control the heater to heat the ring oscillator only until the temperature of the ring oscillator is one of a plurality of predefined temperatures, during or after which the ring oscillator starts and operate. |
| US10680617B2 |
Direct current powered clockless superconducting logic family using dynamic internal state
Techniques regarding a DSFQ logic family are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a dynamic single flux quantum logic circuit that has a self-resetting internal state and can be powered by direct current. Further, the self-resetting internal state can be characterized by two time constants. |
| US10680616B2 |
Block memory layout and architecture for programmable logic IC, and method of operating same
An integrated circuit comprising a first memory array and programmable/configurable logic circuitry including a plurality of logic tiles wherein each logic tile includes a perimeter, a plurality of external I/O disposed in an I/O layout on the perimeter, wherein the I/O layout of each tile is identical. Each external I/O is configurable as an external I/O to connect to and communicate with external circuitry, or a memory I/O to point-to-point connect to memory located adjacent thereto, or an unused I/O. The first memory array is physically adjacent to a first logic tile on a first portion of the perimeter of the first logic tile which is interior to the periphery of the programmable/configurable logic circuitry, and point-to-point connected to the memory I/O. In operation, circuitry of the first logic tile is configured to read data from and write data to the first memory array via the memory I/O. |
| US10680615B1 |
Circuit for and method of configuring and partially reconfiguring function blocks of an integrated circuit device
A circuit for configuring function blocks of an integrated circuit device is described. The circuit comprises a processing system; a peripheral interface bus coupled to the processing system; and a function block coupled to the peripheral interface bus, the function block having programming registers and a function block core; wherein the programming registers store data determining a functionality of the function block core and comprise programming control registers enabling a configuration of the function block core using the data. A method of configuring function blocks of an integrated circuit device is also described. |
| US10680614B1 |
Circuit and method for ultra-high-voltage to low-voltage level shifting
The present document describes a level-shifter circuit and method to transmit data from a high-voltage domain to a low-voltage domain. The level-shifter circuit has a first current path with a first current control unit to set a first current based on a high-voltage data signal in the high-voltage domain; and a second current path with a second current control unit to set a second current based on the high-voltage data signal. Furthermore, the circuit has an isolation unit to transfer the first current and the second current from the high-voltage domain to the low-voltage domain; and a current comparator unit to compare the first current with the second current to provide a low-voltage data signal in the low-voltage domain, which corresponds to the high-voltage data signal. |
| US10680611B2 |
Key of optical mechanical keyboard comprising a ring lock with a light transmission groove and a photoelectric switch on a circuit board
A key of an optical mechanical keyboard, having a base plate, a circuit board, an optical switch, a rotating member, a key cap, a pressing cylinder, a primary spring, and a secondary spring. A ring-shaped fastening member is provided on the base plate, and a side wall of the ring-shaped fastening member is provided with two opposing first light-admitting slots, and a keystroke impact slot is respectively provided at two sides of and between the opposing first light-admitting slots. The key has a simple structure and is lightweight and slim, and enables generation of a clear sound upon striking a key. |
| US10680610B2 |
Capacitive switch
A capacitive switch according to an embodiment of the present invention includes a switch structure having a first electrode pattern; a substrate having a second electrode pattern and an integrated circuit unit; and an elastic body interposed between the switch structure and the substrate, wherein the integrated circuit unit generates a first output signal by detecting a change in capacitance caused by a user touch input operation through the first electrode pattern, the elastic body, and the second electrode pattern, and generates a second output signal by detecting a change in capacitance caused by a user push input operation. |
| US10680606B1 |
Timing control device and method for high frequency signal system
A timing control device and a timing control method for a high frequency signal system, the timing control method respectively control trigger points of reset signals, and process the controlled reset signals and clock signals to obtain a signal group with having an absolute timing relationship. |
| US10680605B2 |
Bias circuit and method for a high-voltage RF switch
An RF switch includes series-coupled RF switch cells coupled between an RF input and ground, each RF switch cell having an input, and a biasing network having outputs for individually biasing each of the RF switch cell inputs to a distinct bias voltage based upon a rank number of the RF switch cell. |
| US10680601B1 |
Driver for switching insulated-gate bipolar transistors with first pull-down signal and second pull-down signal
A controller circuit for controlling an insulated-gate bipolar transistor (IGBT) is configured to, in response to an IGBT turn off switching event, switch out a first switching element to prevent a pull-up signal from flowing to a gate of the IGBT, switch in a second switching element to create a channel to permit a first pull-down signal to flow to the gate of the IGBT, and switch in a third switching element to create a channel to permit a second pull-down signal to flow to the gate of the IGBT. In response to determining a collector to emitter voltage at the IGBT does not satisfy a threshold, the controller circuit is configured to switch out the third switching element to prevent the second pull-down signal from flowing to the gate of the IGBT. |
| US10680598B2 |
Active gate bias driver
A device includes a gate driver configured to output, to a gate of a switch, a turn-on voltage for activating the switch. The active gate bias driver is configured to actively drive a voltage at the gate of the switch to a first bias voltage during a first dead time of the switch and actively drive the voltage at the gate of the switch to a second bias voltage during a second dead time of the switch. The second bias voltage is different from the first bias voltage. |
| US10680597B2 |
Switching device with active portion configured to switch between insulating state and conducting state
The disclosed technology generally relates to a switching device and more particularly to a switching device based on an active portion capable of switching from an insulating state to a conductive state. In an aspect, a switching device comprises an active portion interposed between two electrodes and capable of switching from an insulating state to a conducting state when a voltage higher than a threshold value is applied between the two electrodes. The threshold value is lowered by a dielectric permittivity distribution which produces a concentration of electrical field at a location within the active portion. Thus, the switching device may be devoid of a third control electrode. |
| US10680594B2 |
Comparator circuit with feedback and method of operation
A comparator circuit includes a first transistor have a control electrode coupled to a first input voltage, a first current electrode coupled to a second input voltage, and a second current electrode coupled to a first circuit node. The circuit also includes a first inverter coupled to a first voltage supply terminal and having a first input coupled to the first circuit node and an output, a second transistor having a control electrode coupled to the output of the first inverter, and an active resistive element coupled in series between the first circuit node and a first current electrode of the second transistor. |
| US10680592B2 |
Quadrature clock correction circuit for transmitters
A quadrature clock correction (QCC) circuit includes: a first pair of clock correction circuits that output in-phase and anti-in-phase clock signals, respectively, of a four-phase clock signal; a second pair of clock correction circuits that output quadrature-phase and anti-quadrature-phase clock signals, respectively, of the four-phase clock signal; a detector circuit configured to detect duty cycle error and in-phase/quadrature-phase (IQ) phase mismatch in the four-phase clock signal; and a calibration circuit configured to supply a first pair of control signals to each the first pair of clock correction circuits, and a second pair of control signals to each of the second pair of clock correction circuits, to correct both the duty cycle error and the IQ phase mismatch based output of the detector circuit. |
| US10680591B2 |
Programmable resistive delay
An example delay circuit is described that includes an input node to receive a first signal, a first circuit path, a second circuit path, an output buffer, and an output node. The first circuit path includes at least one first buffer and a first array of switches. The second circuit path includes at least one second buffer and a second array of switches. The output buffer receives a mixed output of the first circuit path and the second circuit path. The output node transmits a second signal equivalent to the first signal with a programmed delay. |
| US10680590B2 |
Integrated switch and self-activating adjustable power limiter
A fast response time, self-activating, adjustable threshold limiter including a limiting element LE, a first coupling element CE1 electrically connected from a signal node of LE to a control input of LE, and a second coupling element CE2 electrically connected from the control input of LE to a nominal node of LE. An initial bias (control) voltage is also supplied to the control input of LE to dynamically control the limiting threshold for the limiter. Embodiments include usage of self-activating adjustable power limiters in combination with series switch components in a switch circuit in lieu of conventional shunt switches. |
| US10680587B2 |
RC oscillator watchdog circuit
An RC oscillator generates a periodic trigger signal, and a clock generator generates clock edges in response. A stuck-at-fault detection circuit detects a stuck-at-logic state of the periodic trigger signal and causes the RC oscillator to reset and causes a change in logic state of the periodic trigger signal. The RC oscillator includes first and second comparison circuits, a logic circuit receiving output from the first and second comparison circuits and generating the periodic trigger signal, and a clock generation circuit generating a clock signal therefrom. The stuck-at-fault detection circuit includes a capacitive node, charge circuitry charging the capacitive node based upon the periodic trigger signal, discharge circuitry discharging the capacitive node based upon the periodic trigger signal, and triggering circuitry asserting a reset signal to cause the RC oscillator to reset when the charge on the capacitive node indicates a stuck-at-logic state of the periodic trigger signal. |
| US10680585B2 |
Techniques and circuits for time-interleaved injection locked voltage controlled oscillators with jitter accumulation reset
Digital jitter accumulation reduction techniques and circuits are proposed to mitigate jitter accumulation in Voltage Controlled Oscillators (VCOs). In order to reduce jitter accumulation, employing a pair of identical injection locked VCOs is proposed in an interleaved fashion. Further jitter accumulation reductions can be provided by employing a plurality of identical injection locked VCOs selected in a cascading fashion. Yet further jitter accumulation reductions can be provided by resetting the deselected VCO(s). |
| US10680584B2 |
Level shifting circuit and method for operating a level shifter
A level shifting circuit generates a pulse signal, when both of the logic levels of two complementary input signals of a level shifter has changed while both of the logic levels of two output signals of the level shifter present at low logic level, to pull up either one of the output signals of the level shifter to a second high logic level. Once the logic level of both output signals at the first output node and the second output node present complementary, the level shifting circuit stops pulling up the output signal. |
| US10680582B1 |
Single solution impedance matching method
An RF source impedance is raised with an impedance step-up transformer and a matching circuit is coupled between the stepped up impedance RF source and a RF load wherein the RF load impedance can be matched to the stepped up RF source impedance with a matching network comprising a variable capacitor and a variable inductor having single match solutions for all frequencies and impedances so long as the RF load impedance is less that the stepped up RF source impedance. A RF attenuator may be used to provide a better impedance load to the RF source during match determination and adjustment of the variable capacitor and variable inductor. Automatic impedance matching measures the RF source frequency and RF load voltage, current and phase to determine a single match solution for a capacitive value of the variable capacitor and an inductive value for the variable inductor. |
| US10680581B2 |
RF signal switching, phase shifting and polarization control
An apparatus includes first and second electronically tunable transmission lines configured to transmit or receive a signal pair and provide a selected phase delay difference to the signal pair corresponding to a selected polarization, a first attenuation element connected to the first electronically tunable transmission line and a second attenuation element connected to the second electronically tunable transmission line. The first and second attenuation elements may each be configured to selectively attenuate signals carried on the electronically tunable transmission line to which they are connected according to a selected attenuation setting of a plurality of selectable attenuation settings provided by one or more attenuation control signals and thereby provide a selected attenuation to the signal pair that corresponds to the selected polarization. A corresponding method is also disclosed herein. |
| US10680577B2 |
Acoustic wave device, multiplexer, high-frequency front-end circuit, and communication apparatus
An acoustic wave device includes a silicon oxide film, a piezoelectric body made of lithium tantalate, and interdigital transducer electrodes stacked on a supporting substrate made of silicon, in which the values of the wave length-normalized film thickness and the Euler angle of the piezoelectric body made of lithium tantalate, the wave length-normalized film thickness of the silicon oxide film, the wave length-normalized film thickness of the interdigital transducer electrodes in terms of aluminum thickness, the propagation direction of the supporting substrate, and the wave length-normalized film thickness of the supporting substrate are set such that represented by Formula (1) for at least one of responses of first, second, and third higher-order modes is more than about −2.4, and TSi>20. |
| US10680576B2 |
Piezoelectric thin film resonator, filter, and duplexer
A piezoelectric thin film resonator includes: a substrate; a lower electrode located on the substrate; a piezoelectric film that has a step on an upper surface thereof and is located on the lower electrode, a film thickness of the piezoelectric film inside the step being greater than a film thickness of the piezoelectric film outside the step; an upper electrode located on the piezoelectric film so that a resonance region is formed, the lower electrode and the upper electrode facing each other across the piezoelectric film in the resonance region, the resonance region including the step in plan view; and an insertion film located in the piezoelectric film, between the piezoelectric film and the lower electrode, or between the piezoelectric film and the upper electrode in at least a part of an outer peripheral region within the resonance region, and not located in a central region of the resonance region. |
| US10680574B1 |
Automatic impedance matching system, method and apparatus
Automatic impedance matching measures the RF source frequency and RF load voltage, current and phase to determine a single match solution for a capacitive value of the variable capacitor and an inductive value for the variable inductor, and whether a shunt reactance is coupled to the RF source or RF load. Once the capacitance and inductance values for a match solution are determined they are contemporaneously selected without any iterative searching necessary for the match solution. |
| US10680565B2 |
Power amplifier system
A power amplifier system is disclosed. The power amplifier system includes a power amplifier having a first signal input and a first signal output and a main bias circuitry configured to provide a first portion of a first bias signal to the power amplifier through a first bias output coupled to the first signal input. Further included is peak bias circuitry that is configured to provide a second portion of the first bias signal to the power amplifier through a second bias output coupled to the first signal input, wherein the first portion of the first bias signal is greater than the second portion of the first bias signal over a first input power range and the second portion of the first bias signal is greater than the first portion of the first bias signal over a second input power range that is greater than the first input power range. |
| US10680564B2 |
Bias circuit for high efficiency complimentary metal oxide semiconductor (CMOS) power amplifiers
Aspects of this disclosure relate to an adaptive biasing circuit for a power amplifier. The adaptive biasing circuit can include a shunt resistor arrangement and/or a floating gate linearizer arrangement. |
| US10680556B2 |
Radio frequency front-end circuit
A radio frequency (RF) front-end circuit is provided. A power management circuit is configured to output a first modulated voltage, a second modulated voltage, a first bias voltage, and a second bias voltage via a first voltage port(s), a second voltage port(s), a first bias voltage port(s), and a second bias voltage port(s), respectively. An amplifier circuit(s) is configured to amplify an RF signal based on a selected modulated voltage and a selected bias voltage outputted by a selected voltage port and a selected bias voltage port, respectively. The power management circuit can be controlled to dynamically increase the selected bias voltage at the selected bias voltage port in case the selected bias voltage drops below a defined bias voltage threshold. As such, it may be possible to maintain the selected bias voltage at a desirable level, thus enabling the amplifier circuit(s) to operate with improved linearity and efficiency. |
| US10680555B2 |
Bias circuit
A bias circuit includes first and second bipolar transistors, first and second field-effect transistors, and a filter circuit. The first field-effect transistor supplies a bias signal to an amplifier. The filter circuit is connected between a collector terminal of the first bipolar transistor and the ground through a base terminal of the first bipolar transistor. The filter circuit has frequency characteristics for attenuating a high frequency component of an RF signal to be input to the amplifier. |
| US10680552B2 |
On-chip oscillators including shared inductor
Some embodiments include apparatuses and methods of using the apparatuses. One of the apparatuses includes an inductor included in an integrated circuit device, and a first oscillator and a second oscillator included in the integrated circuit device. The first oscillator includes a first terminal coupled to a conductive path of the inductor to provide a first signal. The second oscillator includes a second terminal coupled to the conductive path to provide a second signal. The first and second signals have different frequencies. |
| US10680548B2 |
Clamps for solar system
A solar power system can include a rail and a solar module disposed on the rail. A clamp assembly can couple the solar module to the rail. The clamp assembly can have a clamped configuration in which the solar module is secured to the rail and an unclamped configuration. The clamp assembly can comprise an upper clamp member, a lower clamp member coupled to the rail, and a stabilization member mechanically engaging the upper clamp member and the lower clamp member. The stabilization member can prevent rotation of the lower clamp member relative to the rail when the clamp assembly is in the clamped and unclamped configurations. In the unclamped configuration, the stabilization member can be biased such that the upper clamp member is disposed at a sufficient clearance above the rail to permit the insertion of the solar module between the upper clamp member and the rail. |
| US10680544B2 |
Power conversion device and air conditioner
In order to achieve a power conversion device with which a motor can be stably driven, a power conversion device is provided with: an inverter, which converts supplied DC voltage to an AC output voltage and supplies the AC output voltage to windings, and which, in accordance with the DC voltage, changes the saturation level at which the output voltage is saturated, in order to drive a motor equipped with a stator having the windings and a rotor having permanent magnets; and a controller which, when the output voltage is lower than the saturation level, increases the output current of the inverter such that a magnetic flux that weakens or strengthens the magnetic flux generated by the permanent magnets is generated in the windings. An air conditioner including the power conversion device is also disclosed. |
| US10680541B2 |
Shift range control apparatus
A shift range control apparatus includes: an idling determination portion that determines, based on a motor angle and an output shaft angle, an end of an idling state in which a motor is rotating within a range of a play, the motor angle being a value based on a detected value of a motor rotation angle sensor that detects the rotation of the motor, the output shaft angle being a value based on a detected value of an output shaft sensor that detects rotation of the output shaft; and a target value setting portion that sets a motor angle target value for drive control of the motor using a corrected angle value that is a value corresponding to the motor angle at an end of an idling. |
| US10680540B2 |
Apparatus for controlling motorized vehicle
In an apparatus for controlling a motorized vehicle, a rotary electric machine controller is configured to perform intermittent operation by periodically alternating between a driving period and a coasting period. A torque determiner is configured to determine a first torque during the driving period and a second torque during the coasting period. A transition period determiner is configured to determine whether to set a transition period between the driving period and the coasting period. If the transition period is determined to be set, the torque determiner determines a third torque between the first torque and the second torque and within a predetermined rang. The rotary electric machine controller sets the transition period between the driving period and the coasting period and drive the rotary electric machine with the third torque during the transition period. |
| US10680538B2 |
Emergency braking for a drive system
A system includes a converter operatively connected to an alternating current (AC) power source and a direct current (DC) bus, an inverter operatively connected to a motor and the DC bus, and a controller. The converter includes a first plurality of switching devices in selective communication with each phase of the AC power source and the DC bus. The inverter includes a second plurality of switching devices in selective communication with each phase of the motor and the DC bus. The controller is operable to command dropping of a brake through a passive delay circuit responsive to an emergency stop condition for a load driven by the motor and reduce a voltage on the DC bus by dropping at least one phase of the AC power source and/or using a dynamic braking resistor prior to the brake physically dropping. |
| US10680536B2 |
Fibrous energy harvesting device having corrugated structure and wearable item including the same
A fibrous energy harvesting device having a corrugated structure includes a first fiber layer acting as an electrified body for generation of triboelectric energy, and a second fiber layer acting as an electrified body for generation of triboelectric energy. The first fiber layer is attached to an upper surface of the second fiber layer and has a corrugated structure. |
| US10680524B2 |
Fast-charging voltage generator
A voltage generator includes an oscillator, a charge pump, a smoothing capacitor, and a driving controller. The oscillator has an output. The charge pump has an input and an output, and the input of the charge pump is coupled to the output of the oscillator. The smoothing capacitor is coupled to the output of the charge pump. The driving controller is coupled to the oscillator, and generates an enable signal to adjust an operation frequency of the oscillator. The voltage generator supplies a driving voltage to a switch for driving the switch via the smoothing capacitor. The driving controller generates the enable signal according to the driving voltage. |
| US10680522B2 |
Switching regulator and control device therefor
A control device serves as an agent that controls a switching regulator including an output switch and a synchronous rectification switch. The control device includes: a summator generating a sum sense signal by adding up a first sense signal commensurate with the current passing in the output switch and a second sense signal commensurate with the current passing in the synchronous rectification switch; a smoother generating a smoothed sense signal by smoothing the sum sense signal; and a switch driver driving the output switch and the synchronous rectification switch complementarily through current mode control based on the smoothed sense signal. |
| US10680518B2 |
High speed, efficient SiC power module
A power converter module includes an active metal braze (AMB) substrate, power converter circuitry, and a housing. The AMB substrate includes an aluminum nitride base layer, a first conductive layer on a first surface of the aluminum nitride base layer, and a second conductive layer on a second surface of the aluminum nitride base layer opposite the first surface. The power converter circuitry includes a number of silicon carbide switching components coupled to one another via the first conductive layer. The housing is over the power converter circuitry and the AMB substrate. By using an AMB substrate with an aluminum nitride base layer, the thermal dissipation characteristics of the power converter module may be substantially improved while maintaining the structural integrity of the power converter module. |
| US10680516B2 |
Apparatus and methods for multi-mode charge pumps
Apparatus and methods for multi-mode charge pumps are disclosed herein. In certain configurations, a multi-mode charge pump includes an output terminal, a mode control circuit that operates the multi-mode charge pump in a selected mode, a first switched capacitor, a capacitor charging circuit, and a plurality of switches. The capacitor charging circuit connects a first end of the first switched capacitor to a charging voltage in a first phase of a clock signal, and connects the first end of the first switched capacitor to a reference voltage in a second phase of the clock signal. The charging voltage has a voltage level that changes based on the selected mode. The plurality of switches connect a second end of the first switched capacitor to the reference voltage in the first phase, and connect the second end of the first switched capacitor to the output terminal in the second phase. |
| US10680513B2 |
Pump capacitor configuration for voltage multiplier
A cascade multiplier includes a switch network having switching elements, a phase pump, and a network of pump capacitors coupled with the phase pump and to the switch network. The network of pump capacitors includes first and second capacitors, both of which have one terminal DC coupled with the phase pump, and a third capacitor coupled with the phase pump through the first capacitor. |
| US10680508B2 |
Control to output dynamic response and extend modulation index range with hybrid selective harmonic current mitigation-PWM and phase-shift PWM for four-quadrant cascaded H-bridge converters
A hybrid Cascaded H-Bridge (CHB) converter includes a selective harmonic current mitigation pulse width modulation (SHCM-PWM) unit coupled to an input current and providing an output signal SWSHCM, a phase shift pulse width modulation (PSPWM) unit coupled to the input current and providing an output signal SWPS, a modulation selector coupled to the output signal SWSHCM of the SHCM-PWM unit and the output signal SWPS of the PSPWM unit and providing an output signal SW, and a CHB converter coupled to the output signal SW of the modulation selector. The modulation selector can select one of the output signals (SWSHCM and SWPS) as the output signal SW based on the input current. The hybrid technique is for cascaded multilevel converters which utilizes asymmetric SHCM to mitigate the harmonics generated from PS-PWM to meet harmonic limits with a smaller number of switching transitions and smaller inductance than the conventional PS-PWM technique. |
| US10680507B2 |
Method and apparatus for multiphase regulator with thermal adaptive phase add/drop control
A multiphase regulator having a variable number of phases in operation and nominal current thresholds for indicating when to add or drop a phase is provided. A digital controller for the regulator includes digital circuitry configured to adjust the nominal current thresholds based on a measured or estimated temperature of the regulator, to yield adjusted current thresholds which are a function of temperature. The digital circuitry is further configured to modify the number of phases in operation based on the adjusted current thresholds and a measured or estimated current in the regulator. The regulator can be included in an electronic component having a load, power stages for providing phase currents to the load, and at least one fan for cooling the power stages and load. The digital controller controls operation of the regulator, including adaptive control of the number of phases in operation. Corresponding control methods are also provided. |
| US10680506B2 |
Multi-level inverter
A multi-level inverter having one or more banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle. |
| US10680504B2 |
Bandgap reference circuit and DCDC converter having the same
To provide a bandgap reference circuit capable of shortening a start time at power-on in a circuit lowered in power consumption. There is provided a bandgap reference circuit using an op amplifier to generate a reference voltage, which is equipped with a first current source connected between a power supply terminal and an operating current input terminal of the op amplifier, a second current source having one end connected to the power supply terminal, and a switch connected between the other end of the second current source and the operating current input terminal of the op amplifier, and in which a switch is turned on at power-on and turned off after starting of the reference voltage. |
| US10680503B2 |
Active screening for an electrical machine
An electrical machine including a rotor and a stator, at least one of the rotor and stator being provided with superconducting first electrical windings; and a set of one or more screen electrical windings, provided in the form of one or more further superconducting electrical windings, arranged around and radially outward of the first electrical windings; wherein the set of screen electrical windings is arranged to be supplied with an electrical current for generating a magnetic field of suitable magnitude and phase to reduce the magnitude of the magnetic field, generated at least by the first electrical windings during operation of the electrical machine, radially outwards of the screen electrical windings. |
| US10680502B2 |
Magnetically geared apparatus and a pole piece for such apparatus
A magnetically geared apparatus (400), a pole piece component (420) and a plurality of pole pieces (422) for such apparatus are disclosed. The magnetically geared apparatus (400) comprises the pole piece component (420) and the pole piece component (420) comprises the plurality of pole pieces (422) mounted to a carrier (421), wherein at least one of the pole pieces (500) comprises at least two axially-spaced portions spaced apart by a portion of a higher magnetic reluctance (560) than that of each of the two axially-spaced portions. |
| US10680500B2 |
System and method for wirelessly managing electric motors
A system and method for wirelessly communicating with an HVAC motor or other motor in order to manage the motor with regard to, e.g., identifying a suitable replacement for, programming, monitoring and/or diagnosing, and/or tuning or otherwise reprogramming the motor without physically connecting to the motor. A technician uses a software application on a smartphone, tablet, or other portable device to communicate with the motor controller via a wireless communication device incorporated into the motor assembly. The smartphone may receive relevant information, such as identification, programming, or diagnostic information, and process the information or wirelessly transmit the information to a server for processing. Based on the information, the smartphone may transmit programming instructions to the motor controller via the wireless communication device. Further, the wireless communication device may transmit sensor data associated with the motor to allow for monitoring the motor's performance. |
| US10680498B2 |
Motor and electric equipment with the same
A motor includes a rotor and a stator. The stator includes a stator core, stator windings wound around the stator core and a circuit board fixed relative to the stator core. The circuit board includes a motor control circuit. The motor control circuit includes a magnetic sensor integrated circuit magnetically coupled with the rotor to detect a position of a magnetic pole of the rotor. The magnetic sensor integrated circuit includes a package housing near the magnetic poles of the rotor, an electronic circuit provided in the package housing, and a plurality of pins extending from the package housing and soldered on the circuit board. An electric equipment with the motor is also provided. |
| US10680496B2 |
Motor attachment bracket, motor attachment structure, and substrate processing apparatus
Various examples, relating to motor attachment, a motor attachment structure, substrate processing apparatus are disclosed. The present disclosure exemplifies a motor attachment bracket including a plate-shaped motor mounting portion which an output shaft insertion hole through which an output shaft of a motor is inserted penetrates, and to which the motor the output shaft of which is inserted through the output shaft insertion hole is fixed. A fluid path in which a cooling fluid is circulated is formed in a metal member formed with the motor mounting portion, a motor attachment structure using the motor attachment bracket, and a substrate processing apparatus. |
| US10680494B2 |
Control scheme for power tool having a brushless motor
A power tool is provided including a housing, an electric motor disposed within the housing, a power switch circuit disposed between a power supply and the electric motor, a main controller, and a redundant controller. The main controller is arranged to control a switching operation of the power switch circuit to regulate a speed of the motor, and is configured to monitor at least one of a speed or a rotational direction of the electric motor and deactivate the power switch circuit upon detection of fault condition associated the speed or the rotational direction of the electric motor. The redundant controller is configured to monitor at least one of the speed or the rotational direction of the electric motor independently from the main controller and deactivate the power switch circuit upon detection of fault condition associated the speed or the rotational direction of the electric motor. |
| US10680492B2 |
Variable frequency generator rotor winding support structure
A variable frequency generator (VFG) rotor can include a plurality of windings configured to form a plurality of magnetic poles, each winding comprising a first winding end and a second winding end, and a first winding support structure comprising a plurality of first winding support segments configured to retain a first portion of each winding, each winding support segment being configured to move radially relative to an axis of rotation of the rotor. The first winding end of each winding extends from each winding support segment. The rotor can include at least one flexible bus bar jumper connected to two first winding ends of adjacent windings and configured to flex with radial movement of the winding support segments of respective windings attached to the flexible bus bar jumper. |
| US10680486B2 |
External rotor motor
An external rotor motor, including: a rotary shaft; a plastic-packaged stator including a sleeve base, a stator core, a terminal insulator, coil windings, and a plastic-packaged body; and an external rotor sleeving on the plastic-packaged stator. The terminal insulator is disposed on the end face of the stator core. The coil windings are coiled on the terminal insulator. The sleeve base is disposed in an axle hole in the center of the stator core. The rotary shaft is disposed in the sleeve base. Two ends of the rotary shaft are supported by the bearing. One end of the rotary shaft protrudes out from the sleeve base and is connected to the external rotor. The top of the sleeve base extends outwards to form a plurality of arms, and the plurality of arms each includes an outer end which is provided with a bolt. |
| US10680485B2 |
Encased electronic rotating machine
The invention relates to an electric rotating machine (10) comprising a rotor (7), a stator (1) surrounding the rotor (7), and an air gap (6) between the rotor (7) and the stator (1). In order to obtain high efficiency and a compact design, the stator (1) has stator windings (13) that are encased, and the stator (1) immediately adjoins the air gap (6). |
| US10680484B2 |
Method of protecting lamination stacks of a component of an electric machine and component obtained by the method
A method of protecting ferromagnetic lamination stacks of a component of an electric machine, comprises the following steps: creating a component module by arranging a laminations stack of ferromagnetic sheets into a housing, (b) protecting locations of the component module where coating is unwanted, (c) inserting the component module into a hermetic chamber receiving an ionized gas, (d) polarizing the component module to submit a fixed electric potential to the component module, (e) depositing a thin layer of protective coating on the laminations stack of ferromagnetic sheets through a method of Plasma Enhanced Chemical Vapor Deposition (PECVD) at a temperature lower than 150° C., (f) monitoring the deposition homogeneity and deposition thickness of the thin layer of protective coating until desired thickness, and (g) rectifying the surface of the thin layer of protective coating to have a uniform protective layer. |
| US10680481B2 |
Rotary electric machine
Insulators are respectively disposed such that longitudinal directions of trunk portions are oriented in a radial direction of teeth, and so as to place bottom surfaces of the trunk portions alongside two axial end surfaces of the teeth, concentrated winding coils are configured by winding conductor wires so as to be wound in multiple layers around the teeth so as to pass through a concave space that is formed by the trunk portions and first and second flange portions at two axial ends of the teeth, the second flange portion is disposed on an end surface of a core back of a stator core, and a temperature detecting element is installed by being inserted into an element insertion aperture that is formed on the second flange portion so as to be able to detect a temperature of a coil end of the concentrated winding coils. |
| US10680480B2 |
Motor
A housing portion includes: an end surface portion that is arranged on one end side; an inside surface portion that is formed so as to be extended from the end surface portion to the other end side; an opening portion that is arranged so as to be aligned with the inside surface portion and that makes a second internal space formed with the end surface portion and the inside surface portion and an external space communicate with each other; a first protrusion portion that is formed so as to be protruded from the inside surface portion toward the side and that is formed so as to be inclined to one side; and a second protrusion portion that is formed so as to be protruded from the inside surface portion toward the side of the rotary axis and that is formed so as to be inclined to the other side. |
| US10680479B2 |
System and apparatus for axial field rotary energy device
An axial field rotary energy device can include a rotor having an axis of rotation and a magnet; a stator coaxial with the rotor, the stator can have a printed circuit board (PCB) having a plurality of PCB layers that are spaced apart in an axial direction, each PCB layer can include a coil having only two terminals for electrical connections, each coil is continuous and uninterrupted between its only two terminals, each coil consists of a single electrical phase, and one of the two terminals of each coil is electrically coupled to another coil with a via to define a coil pair; and each coil pair is electrically coupled to another coil pair with another via. |
| US10680477B2 |
Brushless electric motor system comprising a rotor, a stator and power electronic means
A brushless electric motorsystem having integrated power stages, said electric motor system comprising a rotor, a stator, a plurality of power stages, and a cooling system comprising a substantially flat hollow main cool body arranged to support the flowing of a cooling medium inside said hollow main cool body for cooling said main cool body, a base cooling plate connected to a first flat surface of said hollow main cool body and to said plurality of power stages for transferring heat between said plurality of power stages and said base cool plate, heat resistance inserts connected to said base cooling plate and said plurality of electrically excitable coils for transferring heat between said plurality of coils and said base cooling plate wherein said heat resistance inserts provide for a thermal conductivity, thereby creating a thermal buffer such that said electrically excitable coils are cooled less compared to said power stages, by said cooling system. |
| US10680474B2 |
Permanent magnet electrical machine
A permanent magnet electrical machine has a rotor supporting a circumferential row of permanent magnets. The electrical machine further has a stator coaxial with the rotor and having a circumferential row of stator teeth carrying respective coils. The teeth provide paths for magnetic flux produced by the magnets, thereby electromagnetically linking the magnets and the coils when the rotor rotates relative to the stator. The teeth have respective core portions on which the coils are mounted, and respective tip portions located between the core portions and the rotor, neighbouring tip portions being circumferentially spaced from each other by respective gaps. Each pair of neighbouring tip portions has a bridge member and a thermal switching mechanism carried by a first tip portion of the pair. |
| US10680471B2 |
Permanent magnet motor, position estimation apparatus and motor drive control apparatus
A permanent magnet motor is provided, which includes a rotor including a rotation axle and a plurality of magnetized rotor magnets on a periphery, which rotor magnets are magnetized to form alternately N-poles and S-poles; first and second ring-shaped-claw-pole units, whose inner circumferences face the rotor magnets, including a plurality of first and second claw-poles along the inner circumference, the first and the second claw-poles being closely adjacent to each other extending alternately in upward and downward axis directions of the rotation axle, bottom sides of the first and the second claw-poles forming a ring shape. A first opening portion is formed in a first joint surface of the first ring-shaped-claw-pole unit, to be joined to the second ring-shaped-claw-pole unit, and the second opening portion is formed in a second joint surface of the second ring-shaped-claw-pole unit, to be joined to the first ring-shaped-claw-pole unit. |
| US10680470B2 |
Electronic device having wireless power transmitting/receiving conductive pattern
Various embodiments of the present disclosure may provide an electronic device that includes: a first plate directed in a first direction, a second plate directed in a second direction opposite to the first direction, and a side member configured to surround at least a part of the space between the first and second plates; a first printed circuit board (PCB) that is disposed between the first and second plates and includes at least one processor; a second printed circuit board (PCB) that is disposed between the first printed circuit board and the second plate and includes at least one antenna pattern; and a temperature sensor disposed to measure the temperature of at least a part of the second printed circuit board. Other various embodiments are possible. |
| US10680466B2 |
Circuits and systems for wireless power transmission
Circuits and systems for wireless power transmission include a driver circuit having first and second power terminals, a tapped coil, a first resonant tank, and a second resonant tank. The tapped coil includes a first, second, and third coil terminals, a first coil connected between the first and second coil terminals, and a second coil connected between the second and third coil terminals. The first resonant tank is coupled between the first and second power terminals. The second resonant tank is coupled between the first and second power terminals. The driver circuit is configured to provide and/or receive modulated power across the first and second power terminals and operate the device by switching between a first mode wherein the first resonant tank uses the first coil and a second mode wherein the second resonant tank uses the first coil and the second coil. |
| US10680465B2 |
Wireless power transmitter
A wireless power transmitter may comprise: a signal generation unit which generates a differential signal; an amplifier which amplifies the differential signal with a predetermined gain; a resonance unit which generates an electromagnetic wave using the amplified differential signal and radiates the same; and a signal adjustment unit which senses at least one of the current and the voltage of the amplified differential signal at the input terminal of the resonance unit, and adjusts at least one of the phase and the amplitude of the differential signal output from the signal generation unit, on the basis of the result of the sensing. |
| US10680462B2 |
High frequency oscillator and wireless power supply device
A high frequency oscillator has a high frequency generation part, an oscillation part, a matching unit, rectification element parts and switch parts. The oscillation part oscillates high frequency power generated by the high frequency generation part. The matching unit is arranged between the high frequency generation part and the oscillation part, and has one or more capacitors and matching circuits having difference characteristics so as to perform matching between the high frequency generation part and the oscillation part. The rectification element parts and the matching circuits are arranged in one-to-one correspondence. The rectification element parts rectify high frequency power supplied from the high frequency generation part to the oscillation part. The switch part is connected to the corresponding rectification element part to switch the corresponding capacitor connected to the corresponding matching circuit through the corresponding rectification element part. |
| US10680458B2 |
Methods and devices for inductive coupling into power lines
An electronic device is provided, including a housing having a back surface. The device includes a rechargeable battery, a capacitor, an inductor coil connected to the capacitor, the inductor coil being disposed around an axis oriented perpendicular to the back surface, a rectifier circuit connected to the inductor coil to output a direct current (DC), a DC-DC converter connected to the rectifier circuit, configured to trickle charge the battery with current received from the rectifier circuit, a test load switchably connected to the DC-DC converter, and a feedback circuit configured to detect a voltage level of the test load and provide an indication of the voltage level. |
| US10680456B2 |
Wearable device and wearable device charging method
The present disclosure relates to a wearable device and a wearable device charging method. The device includes a connector, a charging module, and a battery. The connector includes a first input end, a second input end, a first output end, and a second output end. The first input end is configured to receive a current signal, and the second input end is configured to receive a voltage signal. The first output end is connected to the charging module, and the charging module and the second output end are connected to the battery. The connector determines, according to the voltage signal of the second input end, whether the current signal is to be transmitted by the first output end or to be transmitted by the second output end to cause the wearable device to charge the battery according to the current signal directly or by the charging module. |
| US10680452B2 |
Zero-power mode
Various systems and methods for implementing zero-power mode are described herein. A battery-powered apparatus includes a non-removable battery for powering processing circuitry of the apparatus, charging pins to connect the apparatus to a charging source, and control circuitry that is separate from the processing circuitry. The control circuitry can perform operations that detect the charging pins are shorted and activate a timer for a predetermined wait interval. The control circuitry can also, upon expiration of the timer, disconnect the battery from powering the processing circuitry to activate a device zero-power mode. Upon detecting the charging pins are no longer shorted, the control circuitry can resume power to the processing circuitry. The non-removable battery is only powering the control circuitry while the battery is disconnected from the processing circuitry. |
| US10680447B2 |
Charge equalization apparatus for a battery string
Provided are a charge equalization apparatus for a battery string. According to the exemplary embodiments of the present invention, the charge equalization apparatus are modularized by being divided into the master unit and the slave unit, such that the charge equalization apparatus may be expanded and contracted independent of the number of batteries, the circuits are separated for each module, such that the circuits may be easily implemented, and when the circuits are damaged, only the damaged module is replaced, such that the effective countermeasure may be performed. |
| US10680444B2 |
Method for providing an energy reserve for an energy supply system
Energy supply system includes at least one local energy supply unit, at least one local energy consumption unit at least one local energy store, and a control unit which controls the energy consumption, by the at least one local energy consumption unit of the energy supply system, of the volume of energy generated by the at least one local energy generation unit, and the volume of energy stored in the at least one energy storage unit. After detecting at least one predictable future event which will influence the volume of energy generable by the energy consumption units and/or the volume of energy which can be drawn from the energy supply network and/or the volume of energy consumed by the energy consumption units, the control unit dynamically adapts an energy reserve, stored in the at least one local energy store, as a function of the detected events. |
| US10680435B2 |
Enhanced electrostatic discharge (ESD) clamp
An enhanced ESD clamp is provided with a resistor connected between the body terminal and the source terminal of a MOSFET device. In one exemplary embodiment, the MOSFET device is a grounded-gate NMOS (ggNMOS) transistor device with the resistor (“body resistor”) connected externally to the MOSFET device. In another embodiment, the MOSFET device is a ggPMOS transistor device. In yet another embodiment, the body resistor is disposed within and connected internally to the MOSFET device. In any event, the resistance value of the body resistor determines the level to which the trigger voltage of the ESD clamp will be reduced when an ESD event occurs. |
| US10680434B2 |
Fault current limiter
A fault current limiter (FCL) includes at least one magnetisable core member and at least one AC magnetomotive force source configured to generate a varying magnetic flux in at least a portion of the at least one magnetisable core member. At least one static magnetomotive force source is positioned to provide a magnetic circuit within at least part of the at least one magnetisable core member and the AC magnetomotive force source and the static magnetomotive force source are relatively positioned to be orthogonal to each other. Typically the static magnetomotive force source may be a permanent magnet and the AC magnetomotive force source configured to generate a varying magnetic flux in both of first and second spaced core members. |
| US10680432B2 |
Over-voltage detection and port protection
Redundancy in over-voltage fault protection may be provided by controlling switches already present in a power path of a port for an information handling system. An external device coupled to a port may be decoupled from the system when an over-voltage condition is detected at another port of the information handling system. To decouple an external device upon detection of an over-voltage condition, a switch coupled to the port and the external device is turned off. A battery may also be decoupled from a port upon detection of an over-voltage condition at another port. |
| US10680431B2 |
Replaceable electrical protection system for equipment under load
The present disclosure relates to an electrical protection system , including a breaker enclosure and associated terminals, and the methods of use therefor that allow for a circuit breaker or other electrical protection device to be safely added or removed from a circuit while power is supplied to at least one of the terminals. The disclosed enclosure and terminals include a series of interrelated safety features that prevent a user from accidentally completing the circuit from one terminal to another when the electrical protection system would be in an unsafe state. The combination of features described herein allow for a replaceable electrical protection device for equipment under load to be realized, thus improving user safety. |
| US10680428B2 |
Energy supply
An energy supply for an electrical circuit breaker includes a current converter with a primary conductor and a secondary winding. The energy supply further has a triac with two main connections and one control connection, the triac being connected electrically in parallel with the secondary winding via the main connections. A series circuit including at least two zener diodes is connected to the control connection of the triac at one end and to a main connection of the triac at the other end. |
| US10680426B2 |
Cable sealing unit with multiple sealing modules
A sealing unit (28) that fits within the sealing unit opening (26) of a housing 22. The sealing unit (28) including a sealant arrangement (32) that define a plurality of cable ports (30). The sealing arrangement is also configured for providing a peripheral seal between the housing (22) and the sealing unit (28). The sealing unit (28) includes an actuation arrangement (31) for pressurizing the sealant arrangement (32) within the sealing unit opening (26). The sealant arrangement (32) includes a plurality of sealing modules (33a-33e) each sized to form only a portion of the pressure actuated sealant arrangement (32). |
| US10680419B2 |
Apparatus and method for cleaning high power transmission lines
An apparatus for autonomous cleaning of an electrical line includes: an inductive pick up coil concentrically disposed around the electrical line which pick up coil derives its power from the electrical line through inductive coupling; a drive motor having a driving wheel in contact with the electrical line; a power conditioning circuit for conditioning the inductively picked up power from the pick up coil, the drive motor being coupled to the power conditioning circuit; at least one rotating brush in contact with the electrical line for cleaning the electrical line; at least one brush motor coupled to the at least one brush to rotate the brush, the brush motor being coupled to the power conditioning circuit; and a control circuit for controlling the operation of the drive motor and brush motor, the control circuit coupled to the power conditioning circuit. |
| US10680417B2 |
Securing system for securing a roof structure in a notch on the roof of a switch cabinet
The invention relates to a securing system for securing a roof structure, in particular a cooling device, in a notch on the roof of a switch cabinet, wherein the securing system comprises a pretensioning device connected to the roof structure for a securing clamp, wherein the securing clamp comprises a fixed end and an end that moves with respect to the fixed end, on which the pretensioning device engages, so that a radius of curvature of the securing clamp can be set via the pretensioning device, wherein in a first position of the pretensioning device, the securing clamp engages underneath an edge of the notch and thereby fixes the roof structure on the switch cabinet, and in a second position of the pretensioning device, the securing clamp releases the notch. |
| US10680406B2 |
Semiconductor laser, electronic apparatus, and method of driving semiconductor laser
In a semiconductor laser according to an embodiment of the present disclosure, a ridge part has a structure in which a plurality of gain regions and a plurality of Q-switch regions are each disposed alternately with each of separation regions being interposed therebetween in an extending direction of the ridge part. The separation regions each have a separation groove that separates from each other, by a space, the gain region and the Q-switch region adjacent to each other. The separation groove has a bottom surface at a position, in a second semiconductor layer, higher than a part corresponding to a foot of each of both sides of the ridge part. |
| US10680401B2 |
Sources of optical radiation and methods for providing low-speckle optical radiation, and systems and methods using them
The present disclosure relates more particularly to active optical fibers, amplified spontaneous emission (ASE) sources using such active optical fibers, and imaging and detection systems and methods using such ASE sources. In one aspect, the disclosure provides an active optical fiber that includes a rare earth-doped gain core configured to emit radiation at at least a peak wavelength emitted wavelength when pumped with pump radiation having a pump wavelength; a pump core surrounding the gain core; and a cladding surrounding the pump core, wherein the value M=16R2(NA)2/λ2 in which R is the gain core radius, NA is the active optical fiber numerical aperture, and λ is the peak emitted wavelength, is at least 50, or at least 100. The present disclosure also provides an optical source that includes the optical fiber coupled to a pump source. |
| US10680397B2 |
Electric connector and illuminating device comprising the electric connector
The present invention relates to an electric connector and an illuminating device comprising this electric connector, wherein the electric connector comprises a housing and an end cap connected to the housing, wherein an conductor which can be connected to a power supply is arranged in the end cap, wherein the conductor comprises a stationary part and a movable part, wherein the conductor is rotatable relative to the housing along with the end cap from a first position to a second position, wherein the movable parts at least partially retract into the stationary part in the first position, and at least one movable part extends out of the stationary part in the second position so as to be in electric connection with a power consumption component arranged in the housing. |
| US10680396B2 |
Interface for connecting portable electronic device with vehicle
An interface device for connecting a portable electronic device to a vehicle includes a holding module having a slot into which a portable electronic device with a display is inserted and a front opening exposing the display of the inserted portable electronic device, and an adaptor module coupled to a rear part of the holding module and connecting the portable electronic device to a vehicle. The holding module is disposed on a center fascia of the vehicle, and the adaptor module is disposed in the center fascia. |
| US10680395B2 |
Universal power interface system and methods to use the same
A power interface system is provided. The power interface system can include a power interface device coupleable to a structure, wherein the power interface device can include a receptacle region and a plurality of pin receiving apertures. The power interface system may include an electrical device module sized and shaped to be received in the receptacle region, the electrical device module having a plurality of contact pins, each of the plurality of contact pins sized and shaped to be coupleably received in one of the pin receiving apertures. The electrical device module can be rotatably moveable with respect to the receptacle region between an uncoupled orientation and a coupled orientation, with the electrical device module being secured to the power interface device in the coupled orientation. Related devices and methods are also provided. |
| US10680394B2 |
Electrical connector having a contact with upper and lower contacting portions
An electrical connector includes: an insulative housing having a front tongue with two opposite surfaces; and plural contacts with contacting portions exposed to the two opposite surfaces of the tongue; wherein the plural contacts are formed from a single contact carrier with each contact having a first contacting portion; and at least one of the plural contacts has a second contacting portion oriented symmetrically with respect to the first contacting portion thereof. A method of making a contact module of the electrical connector is characterized by the steps of: forming the plural contacts from a single contact carrier with each contact having a first contacting portion; and bending at least one of the plural contacts to form a second contacting portion oriented symmetrically with respect to the first contacting portion thereof. |
| US10680390B2 |
Shielding element for a connector and housing assembly having protruding cutting portions
A shielding element for a connector comprises a sheet-shaped section, a passageway formed in the sheet-shaped section, and a contacting tab disposed at the passageway. The contacting tab protrudes from the sheet-shaped section and has a sharp cutting edge at a free end of the contacting tab. |
| US10680389B2 |
Interconnection system
An electrical receptacle connector is mounted within a metallic cage for mating with a QSFP module received within the cage. The contacts of the cable receptacle connector are arranged with two groups, of which one are connected to the printed circuit board on which the cage is mounted, and the other are connected to the wires which are further connected to a board-mount receptacle connector mounted on another printed circuit board on which the CPU (Central Processing Unit) socket is mounted. Each board-mount receptacle connector corresponds to more than one cable receptacle connector. |
| US10680384B2 |
Bidirectional duplex electrical connector
A bidirectional duplex electrical connector includes: two insulation seats; two rows of terminals assembled into the two rows of terminal slots of the two insulation seats in a vertical direction, wherein the terminal is integrally provided with, from front to rear, an elastically movable portion, a fixing portion and a pin, a front section of the elastically movable portion is curved and provided with a projecting contact, the elastically movable portion is vertically elastically movable, a rear section of the elastically movable portion and the fixing portion are on the same level and rest against a bottom surface of the terminal slot, a depth of the terminal slot is greater than a material thickness of the terminal, and the insulation seat is provided with a fixing structure fixing the fixing portions of the one row of terminals; and a metal housing covering the two insulation seats. |
| US10680379B2 |
Electrical connector with metallic shell enclosing and securing magnet via welding
An electrical connector includes an insulative housing, a plurality of contacts retained in the housing, a metallic shell enclosing the housing, and the magnets retained by the shell. The housing includes a pair of longitudinal walls and a pair of end walls commonly forming a mating cavity. The contacts are disposed in the longitudinal walls with corresponding contacting sections exposed in the mating cavity. The shell forms receiving cavities to intimately receive the corresponding magnets, respectively. The magnets are secured to the shell by spot-welding so as to not only assure reliable securement therebetween but also keep the completeness of both the magnet and the shell for superior magnetic and shielding effect thereof. |
| US10680375B2 |
Connection terminal and electrical connector
A connection terminal is provided and includes a body, a welding pin, a first stop, a second stop, and a third stop. The body includes a pair of planar surfaces and a pair of side surfaces. The welding pin extends from an end of the body. The first stop extends outwardly from one of the pair of side surfaces, while the second stop extends outwardly from another of the pair of side surfaces. The third stop protrudes outwardly from one of pair of planar surfaces. |
| US10680374B2 |
Electrical contact
An electrical connector includes an insulative housing retaining a plurality of contacts therein. The contact includes a mating part with a first body and a spring arm extending therefrom for mating a conductive pad of a CPU (Central Processing Unit), and a soldering part with a second body and a solder tail extending therefrom for mounting a solder ball thereon. The spring arm is downwardly pressed by the CPU to contact the soldering part when the CPU is mounted upon the electrical connector The mating part and the soldering part are spaced from each other either without any connection, or alternately linked with each other via a bridge transversely connected therebetween wherein the latter may optionally omit the barbed structure from one of the mating part and the soldering part. |
| US10680373B2 |
Electrical contact of electrical connector
A plurality of contact are received within the corresponding passageways of the insulative housing of an electrical connector, respectively. Each contact has juxtaposed first body and second body angled with each other via a linking section connected therebetween. A resilient spring arm extends upwardly from the first body, and includes a wide plate section adjacent to the first body, a bulged contacting section at a top thereof, and a narrow connecting section therebetween. The spring arm is asymmetric with regard to a centerline of the spring arm for avoiding interference with a standoff around a neighboring passageway in a neighboring row. |
| US10680372B2 |
Electrical contact of electrical connector
A plurality of contact are received within the corresponding passageways of the insulative housing of an electrical connector, respectively. Each contact has juxtaposed first body and second body angled with each other via a connecting section linked therebetween. A resilient contacting section extends upwardly from the first body. A spring arm extends upward from the first body and includes a wide plate section adjacent to the first body and a narrow bulged contacting section at a top thereof. During operation, the plate section is parallel to a top face of the housing in a compressed manner. |
| US10680371B1 |
Connector assembly
A connector assembly for connecting a battery to different electrical components within an electrical device includes a housing, and a plurality of sheet metal contacts coupled to and extending through the housing. The plurality of sheet metal contacts define a plurality of battery contact regions and a plurality of internal contact regions spaced form the plurality of battery contact regions. The plurality of internal contact regions physically contact the plurality of different electrical components. A first one of the plurality of internal contact regions is offset from a second one of the plurality of internal contact regions in a different spatial plane than a spatial plane of the second one of the plurality of internal contact regions. |
| US10680370B1 |
Electrical terminal, electrical connector assembly, and method of forming same
An electrical terminal is presented herein. The electrical terminal includes a base plate, a plurality of contact arms extending from the base plate around a longitudinal axis, and a wire attachment feature extending from the base plate and defining crimp wings configured to mechanically and electrically attach the electrical terminal to a wire cable. The plurality of contact arms form a socket configured to receive a mating electrical terminal. An electrical connector assembly including the electrical terminal and a method of forming the electrical connector assembly is also presented. |
| US10680366B1 |
Connector assembly and jumper connector thereof
A connector assembly and a jumper connector thereof are provided. The jumper connector includes a first jumper connector body case for being coupled to a first board edge connector, a second jumper connector body case for being coupled to a second board edge connector, and conductive terminals. The first and second jumper connector body cases are coupled to each other to form an internal receiving space for accommodating the conductive terminals, and the conductive terminals are movable to correspond in position to the first and second board edge connectors respectively. By such structural design, even if circuit boards incur problems like poor processing quality or position offset, the jumper connector according to the present invention can still effectively bridge and join the board edge connectors on the circuit boards, thereby desirably accomplishing electrical connection between multiple circuit boards on electronic equipment. |
| US10680365B1 |
Plug board module with circuit board
A plug board module with a circuit board, comprising at least one plug board, at least one circuit board and at least one cover. The plug board has a first plug-in area and a board trough, and the first plug-in area is formed with a plurality of first jacks and disposed with least one terminal set. The circuit board is disposed in the board trough and has a side conductive portion and a butt component, and conductive terminals disposed outside the first plug-in area are oppositely disposed in the side conductive portion. The cover covers the plug board and the circuit board, and has a plurality of through holes communicating with the first jacks. Thereby, the plug board can be connected to side conductive slots through the conductive terminals to achieve electrical conduction with the circuit board that is provided for an evaluation board to plug in directly. |
| US10680361B2 |
Card edge connector
The present disclosure provides an electrical connector. The electrical connector comprises an insulative housing, a plurality of conductive terminals and a board fastener. The insulative housing has a mounting surface and a mating surface on opposite sides in a mating direction and a mounting chamber. The mounting chamber has a top accommodating portion and a bottom accommodating portion extending and penetrating the mounting surface from the top accommodating portion in the mating direction, two side walls defining the mounting chamber each are formed with a top limiting surface and a bottom limiting surface which define the top accommodating portion. The fastener has a mounting section accommodated in the top accommodating portion, an intermediate section extending from the mounting section and accommodated in the bottom accommodating portion and a tail section extending out of the mounting surface of the insulative housing from the intermediate section. |
| US10680359B2 |
Plug contact
A plug contact for electrically contacting a printed circuit board by plugging the contact into a contact hole of the printed circuit board, has two contact limbs which are elastic relative to each other, a terminal region, and a connection region. The connection region connects the contact limbs together and to the terminal region, the plug contact being punched out of flat metal material and bent. The plug contact ensures multiple plugging and pulling cycles without the inner wall of the contact hole being damaged by each of the contact limbs being a contacting region which contacts the contact hole in the plugged-in state. The outer contour of each of the contact limbs is shaped as a segment of a circle in a cross-sectional view in the contacting region, the radius of the outer contour being smaller than the radius of the corresponding contact hole of the printed circuit board. |
| US10680358B2 |
Method for securing a terminal within a connector housing of a connector assembly and a connector assembly formed by said method
A method of securing an electrical terminal within a terminal cavity of a connector body is described herein. The method includes the step of deforming a portion of an outer surface of the connector body to fabricate a protrusion that projects from an inner surface of the connector body into the terminal cavity, thereby securing the electrical terminal within the terminal cavity. A connector assembly formed by this method is also described. |
| US10680352B2 |
Branch connector
Provided is a branch connector that can maintain waterproofness with respect to an individual product into which a filler is filled. The branch connector includes a pair of split housings (16, 30) connected by connecting portions (46, 47) and fitted into each other and a filler (70) filled into the pair of split housings (16, 30). The surface shape of the filler (70) is formed into the pair of split housings (16, 30) such that it corresponds to an inner surface shape of the pair of split housings (16, 30). |
| US10680349B2 |
Antenna device and electronic device including the same
An antenna device is provided. The device includes a first antenna unit having a plurality of resonant frequency bands, a second antenna unit configured to shift a resonant frequency of a part of the plurality of resonant frequency bands of the first antenna unit, and a feeding unit configured to connect the first and second antenna units and to supply current thereto. |
| US10680344B2 |
Antenna device
An antenna device includes: a first sub-array antenna provided on a substrate and having a group of first antenna elements, one or more third antenna elements, and a first electrical power line through which electric power is supplied to the group of first antenna elements and the one or more third antenna elements; and a second sub-array antenna provided on the substrate and having a group of second antenna elements, the one or more third antenna elements, and a second electrical power line through which electric power is supplied to the group of second antenna elements and the one or more third antenna elements. The one or more third antenna elements are placed away from the first electrical power line and the second electrical power line. |
| US10680338B2 |
Dielectric resonator antenna
A dielectric resonator antenna having a dielectric substrate with a ground plane and a dielectric resonator element arranged on the ground plane includes a conductive feeding assembly operable to excite one or more dielectric resonator modes of the dielectric resonator element for generation of a first circularly polarized electromagnetic field, and a radiating arrangement operable to produce a second circularly polarized electromagnetic field complementary to the first circularly polarized electromagnetic field. The first and second circularly polarized electromagnetic fields, when combined, are arranged to provide a unilateral circularly polarized electromagnetic field. |
| US10680337B2 |
Antenna device and electrical device including the same
An antenna device for an electronic device for wireless communication is provided. The antenna device includes an antenna area connected to a feeding line and a ground line, such that the antenna area is configured to transmit/receive a signal of a first frequency band; and a branching feeding pattern branching from the feeding line and connected to one side of the antenna area, such that the branching feeding pattern is configured to enable the antenna area to transmit/receive a signal of a second frequency band. |
| US10680331B2 |
Antenna with reversing current elements
An antenna assembly including a first conductive element including a first Q-value and a first impedance value, a second conductive element including a second Q-value and a second impedance value, and a current reversing element in communication with the first conductive element and the second conductive element. |
| US10680327B2 |
Calibration system and method for calibrating an antenna array
A calibration system for calibrating an antenna array comprising antenna elements comprises a measuring unit, and a calibration antenna connected to the measuring unit. The measuring unit sequentially excites each antenna element of the antenna array with an input signal and receives the corresponding output signal through the calibration antenna. Furthermore, the measuring unit measures a transfer function of each antenna element of the antenna array. |
| US10680326B2 |
Robotic intelligent antennas
A device for an intelligent robotic antenna is provided. The intelligent robot antenna can comprise a substrate made from a compliant material, a conductive antenna element disposed on the substrate, a sensor that sense environmental conditions around the antenna, an actuator that transforms the antenna, and artificial intelligence software that can determine an optimal structural geometry of the antenna based upon the environmental characteristics surrounding the antenna, and direct the actuator to transform the structural geometry of the antenna to an optimal structural geometry. |
| US10680325B2 |
Remote electrical tilt unit, base station, and method for managing remote electrical tilt antenna
Embodiments of the present invention provide a remote electrical tilt unit, a base station, and a method for managing a remote electrical tilt antenna. The method includes: receiving, by the remote electrical tilt unit, permission configuration information sent by a first base station through a group of AISG ports of the remote control unit; configuring management permission of the first base station on the remote electrical tilt unit according to the permission configuration information, where the management permission includes at least control permission and query permission, and control permission on the remote electrical tilt unit can be allocated to only one base station. In this way, multiple base stations jointly manage a remote electrical tilt unit in a remote electrical tilt antenna, and a problem that it is difficult to locate and troubleshoot a fault when configuration of the remote electrical tilt unit is incorrect is resolved. |
| US10680324B2 |
Antenna systems and devices and methods of manufacture thereof
Embodiments of the present disclosure provide methods, apparatuses, devices and systems related to the implementation of a multi-layer printed circuit board (PCB) radio-frequency antenna featuring, a printed radiating element coupled to an absorbing element embedded in the PCB. The embedded element is configured within the PCB layers to prevent out-of-phase reflections to the bore-sight direction. |
| US10680323B2 |
Broadband dual-band base station antenna array with high out-of-band isolation
The invention discloses a broadband dual-band base station antenna array with high out-of-band isolation, having at least one high-frequency antenna unit, one low-frequency antenna unit and a floor; when there is one high-frequency antenna unit, it is placed on one side of the floor; when there are more than one high-frequency antenna units, they are placed on both sides of the floor. The high-frequency antenna unit includes multiple dipole arms and a balun, wherein the dipole arms are connected by distributed inductor and fed through the balun; the low-frequency antenna unit including multiple dipole arms and a balun is placed on the middle of the floor, wherein the dipole arms are connected by distributed capacitor and fed through the balun. The balun is provided with a feeder and a H-shape microstrip line. The H-shape microstrip line connects with the feeder. |
| US10680320B2 |
Antenna with anti-interference arrangement and its manufacturing method
An antenna includes a reference ground and at least a radiating source spacedly disposed at the reference ground to define a radiating clearance between the radiating source and the reference ground, wherein the radiating source is electrically connected to the reference ground to ground the radiating source so as to narrow a bandwidth of the antenna. When a electromagnetic excitation signal is received at a feed point of the radiating source, the bandwidth of the antenna is narrowed down to prevent any interference of the electromagnetic wave signal received or generated by the antenna in response to nearby electromagnetic radiation frequency or stray radiation frequency of the adjacent frequency bands. |
| US10680314B2 |
Antenna device of mobile terminal
An apparatus is provided that includes an outer front side having a display disposed therein, and an outer rear side including a conductive part and a non-conductive part. The apparatus also includes a battery disposed between the outer front side and the outer rear side, a circuit board, and an antenna. The antenna includes a radiation unit capable of receiving a signal, at least a portion of the radiation unit being disposed between the outer front side and the non-conductive part of the outer rear side. The antenna also includes a feeding unit which electrically connects the radiation unit to the circuit board. The antenna further includes a ground part which electrically connects the radiation unit to the conductive part of the outer rear side. The ground part is connected to the conductive part at a connection point spaced apart from a ground point connecting the circuit board with the conductive part. |
| US10680313B2 |
Stacked antenna module
The present disclosure relates to an antenna module performing near field communication such as NFC and MST, and disclosed is a stacked antenna module that interposes an electromagnetic wave shielding sheet between a lower stacked flexible sheet and an upper stacked flexible sheet in order to implement performance that is equal to or better than that of the conventional antenna upon mounting on a portable terminal composed of a metal material cover, and implements an antenna pattern that winds an electromagnetic wave shielding sheet in the vertical direction thereof by connecting a first radiation pattern and a second radiation pattern formed on the lower stacked flexible sheet and the upper stacked flexible sheet, respectively, through a connector that penetrates the electromagnetic wave shielding sheet. |
| US10680312B2 |
Coupled multi-bands antennas in wearable wireless devices
A wearable wireless device is disclosed. In one embodiment the wearable wireless device includes a circuit board, a housing body housing the circuit board, the housing body having a front side and a back side, a display located at the front side of the housing body, a first antenna element electrically connected to the circuit board and located on the front side of the housing body and a second antenna element electrically connected to the circuit board and located on the front side of the housing body. |
| US10680311B2 |
Communications terminal
A communications terminal includes a mainboard, a conductor bezel, a first conductor part, and a second conductor part, where a first location on the conductor bezel is electrically connected to a ground terminal on the mainboard, a second location on the conductor bezel is electrically connected to a ground terminal on the mainboard, the second conductor part is electrically connected to a fourth location on the conductor bezel, and a radio frequency port on the mainboard is electrically connected to a third location on the conductor bezel using the first conductor part; and the fourth location and the third location on the conductor bezel are between the first location and the second location. The communications terminal is conducive to reducing antenna assembly complexity and reducing manufacturing costs. |
| US10680309B2 |
Methods and apparatus for inducing a non-fundamental wave mode on a transmission medium
Aspects of the subject disclosure may include, for example, a system for generating first electromagnetic waves and directing instances of the first electromagnetic waves to an interface of a transmission medium to induce propagation of second electromagnetic waves having a dominant non-fundamental wave mode. Other embodiments are disclosed. |
| US10680305B2 |
Signal handling device including a surface integrated waveguide and a resonating cavity formed in multiple substrate layers
A signal handling device includes a first substrate. A plurality of first conductors in the first substrate are arranged to form a substrate integrated waveguide. A second substrate includes a plurality of second conductors arranged to form a resonating cavity near one end of the substrate integrated waveguide. A signal carrier is aligned with the one end of the substrate integrated waveguide. |
| US10680304B2 |
Combiner
Embodiments of this disclosure provide a combiner, which includes an external conductor and an internal conductor, the external conductor and the internal conductor form at least two band-stop filters, and the at least two band-stop filters form at least two passbands; the at least two passbands include a first target combined passband and a second target combined passband, and a frequency of the first target combined passband is lower than a frequency of the second target combined passband; and a signal channel is included between a signal input end and a signal output end of a band-stop filter to which the second target combined passband belongs, the signal channel is formed by the internal conductor, and the internal conductor forming the signal channel includes a capacitor. Implementing the present invention can shorten a length of a main transmission line of the signal channel, and reduce a volume of the combiner. |
| US10680303B2 |
Combiner with a common port and a dually layered cavity
A combiner with a common port and a dually layered cavity includes a cavity, a clapboard used for dividing the cavity into an upper cavity and a lower cavity, a common port, a number of signal posts, and a first coupling disc, said common port and said number of signal ports being disposed at two sides of the cavity respectively. The upper cavity and the lower cavity are each provided with a number of filter paths, and an upper common harmonic post and a lower common harmonic post are disposed at a location close to the common port; a first coupling hole is defined in the clapboard at a location close to the common port, and the first coupling disc is disposed in the first coupling hole and connected with the common port. |
| US10680295B2 |
System and method for separating battery cell cores
The system for separating battery cell cores includes a cell core holder for receiving and holding a battery cell core. A cutter cuts an outer wrapping layer of the battery cell core to form an open loose end. A first roller rotates the battery cell core and a sheet opener engages the open loose end to unroll a laminate, which includes a cathode layer, an anode layer, and a polymer separator layer sandwiched therebetween. A pair of second rollers receive, grip and selectively drive movement of the laminate. A cathode breaker applies breaking force to the cathode layer to produce broken cathode layer pieces, which are then collected. An anode breaker then grasps and vibrates the laminate to produce broken anode layer pieces, which are also collected. Finally, a polymer separator layer cutter selectively cuts the polymer separator layer to produce cut polymer separator layer pieces, which are collected. |
| US10680294B2 |
Method for managing a battery according to its state of health
A method for managing a battery according to a state of health of the battery, comprising, prior to using the battery, predetermining a maximum depth of discharge profile according to the state of health of the battery, the profile being dependent on a technology of the battery, on a nominal energy level to be made available each time the battery is discharged, the nominal energy level being substantially constant over a service life of the battery. While using the battery, a maximum depth of discharge of the battery is adjusted at regular intervals, each time the state of health of the battery decreases by a percentage corresponding to an update interval p % that is equal to p/100, that is, for all state of health values (SOHn) that are equal to SOH0-n×p %, where n is an integer comprised between 0 and 20/p. |
| US10680293B2 |
Device for harvesting mechanical energy through a piezoelectrochemical effect
Mechanical energy harvesting is an increasingly important method of providing power to distributed sensor networks where physical connection to a power source is impractical. Conventional methods use vibrations to actuate a piezoelectric element, coil/magnet assembly, or capacitor plates, thereby generating an electric current. The low charge-density of these devices excludes their application in low frequency and static load sources, with the lowest frequency reported devices limited to 10 Hz. These frequency limitations can be overcome by exploiting the piezoelectrochemical effect, a similar but physically distinct effect from the piezoelectric effect whereby an applied mechanical load alters the thermodynamics of an electrochemical reaction to produce a voltage/current. Piezoelectrochemical energy harvesters are expected to produce orders of magnitude more energy per load cycle than piezoelectrics and comparable power capabilities. These characteristics make piezoelectrochemical energy harvesters ideal for application in low-frequency and static loading scenarios for which conventional mechanical energy harvesting technology is poorly suited. Examples of such load sources include, but are not limited to, human footsteps, vehicular loads, and pressure vessels. |
| US10680289B2 |
Buffering zone for preventing lithium metallization on the anode of lithium ion batteries
Improved anodes and cells are provided, which enable fast charging rates with enhanced safety due to much reduced probability of metallization of lithium on the anode, preventing dendrite growth and related risks of fire or explosion. Anodes and/or electrolytes have buffering zones for partly reducing and gradually introducing lithium ions into the anode for lithiation, to prevent lithium ion accumulation at the anode electrolyte interface and consequent metallization and dendrite growth. Various anode active materials and combinations, modifications through nanoparticles and a range of coatings which implement the improved anodes are provided. |
| US10680284B2 |
Secondary battery, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic apparatus
A secondary battery includes: a cathode, an anode, and an electrolytic solution including a cyano compound. The cathode, the anode, and the electrolytic solution are provided inside a film-like outer package member. |
| US10680283B2 |
Lithium metal battery
A lithium metal battery is disclosed. The lithium battery comprising a Li metal anode, a cathode and an electrolyte in between the Li metal anode and the cathode wherein the electrolyte includes immobilized anions at least at the interface between the Li metal anode and the electrolyte to maintain the anionic concentration at the interface above zero throughout the charge-discharge cycles thereby preventing surface potential instability at the interface of the Li metal anode and electrolyte. |
| US10680275B2 |
Device for charging and discharging and method for charging and discharging battery cell using the same
A charge/discharge pressurizing device includes a first pressurizing jig configured to pressurize one surface of an electrode lead of a battery cell, a second pressurizing jig configured to pressurize an other surface of the electrode lead facing the one surface of the electrode lead, a guide configured to be disposed to be spaced apart from the one surface of the first pressurizing jig by a predetermined distance, and a first pressurizing jig controller configured to be connected to the first pressurizing jig and to move the first pressurizing jig toward the one surface of the electrode lead. |
| US10680272B2 |
Power storage device
A power storage device having a laminated body and a portion of lower mechanical strength than the laminated body. |
| US10680268B2 |
Method and system to maintain electrolyte stability for all-iron redox flow batteries
Methods and systems are provided which maintain the positive and negative electrolyte pH and stability of a redox flow battery through the use of electrochemical rebalancing cells. The electrochemical cells may be activated by applying an electrical load to affect changes to the pH of the electrolytes. The use of the electrochemical cells improves long term performance stability redox flow batteries by decreasing and/or eliminating Fe(OH)3 precipitation formation. |
| US10680267B2 |
Flow battery including separator containing nonionic polymer
A flow battery includes a first liquid containing a first nonaqueous solvent; a first electrode immersed in the first liquid; a second electrode which is a counter electrode to the first electrode; and a separator separating the first electrode from the second electrode. The separator includes a solid electrolyte containing: a metal compound and a nonionic polymer which includes a poly(alkylene oxide) and cross-linking points. At least one of alkylene oxide units forming the poly(alkylene oxide) is composed of a tetramethylene oxide unit. |
| US10680264B2 |
Fuel cell system and control method for fuel cell system
A fuel cell system includes: a fuel cell stack; a fuel gas supply/exhaust unit; an oxidant gas supply/exhaust unit; and a control unit. The control unit determines whether there is a phenomenon in the fuel cell stack resulting from local power generation concentration within a plane of a membrane electrode assembly due to a water distribution. When it is determined that there is the phenomenon, the control unit controls at least one of the fuel gas supply/exhaust unit and the oxidant gas supply/exhaust unit. |
| US10680263B2 |
Methods and systems for operating a redox flow battery system
A method of operating a redox flow battery, may include maintaining a positive electrode compartment pressure greater than a negative electrode compartment pressure, and maintaining a cross-over pressure less than a membrane break-through pressure, wherein the cross-over pressure equals the negative electrode compartment pressure subtracted from the positive electrode compartment pressure. In this way, ionic resistance across the separator can be maintained at a lower level by reducing gas bubbles trapped therein while reducing separator break-through, thereby increasing performance of the redox flow battery system. |
| US10680256B2 |
Sealing member for a fuel cell
Provided is a sealing member for a fuel cell, including a constituent member of a fuel cell and the sealing member bonded to each other through intermediation of an adhesive layer, or including the sealing members bonded to each other through intermediation of the adhesive layer, the sealing member including a cross-linked product of a rubber composition, in which the rubber composition contains the following components (A) to (C): (A) at least one rubber component selected from the group consisting of an ethylene-propylene rubber, an ethylene-propylene-diene rubber, and an ethylene-butene-diene rubber; (B) a cross-linking agent including an organic peroxide; and (C) at least one of a fatty acid potassium or a fatty acid sodium. |
| US10680254B2 |
Redox flow battery
A redox flow battery includes an electrode, a cell frame including a frame body and a bipolar plate and having a fitting recess in which the electrode is fitted, and a membrane disposed so as to sandwich the electrode between the bipolar plate and the membrane. In the redox flow battery, a gap between, among outer peripheral edge surfaces of the electrode, a side edge surface parallel to a direction in which an electrolyte flows and an inner wall surface of the fitting recess, the inner wall surface facing the side edge surface, is 0.1 mm or more and 12 mm or less. |
| US10680253B2 |
Electrochemical power system using aqueous dissolved oxygen
A method of generating an electrical current and a multi-cell electrochemical device. The method includes extracting oxygen from an aqueous ambient environment surrounding an electrochemical system; transporting the extracted oxygen through a selectively oxygen-permeable membrane to an enclosed electrolyte configured to surround an anode and a cathode in the electrochemical system, wherein the electrolyte is separated from the aqueous ambient environment; transporting the oxygenated electrolyte to the cathode; reducing the oxygen at the cathode; and oxidizing a metal at the anode. The device includes a metal anode; a cathode; an enclosed electrolyte configured to surround the cathode and the anode, wherein the electrolyte is separated from an aqueous ambient environment surrounding the electrochemical device; and a selectively oxygen-permeable membrane configured to extract oxygen from the aqueous ambient environment. |
| US10680247B2 |
Positive electrode active material slurry including rubber-based binder and positive electrode prepared therefrom
The present invention relates to positive electrode active material slurry of which degree of non-crystallinity is controlled by including a rubber-based binder in a specific ratio, a positive electrode including a positive electrode active material layer formed therefrom, and a lithium secondary battery including the positive electrode. The positive electrode active material layer formed from the positive electrode active material slurry has enhanced flexibility and rolling property, and internal short circuits, high voltage defects and capacity decline of the lithium secondary battery using the positive electrode including the same are capable of being suppressed. |
| US10680246B2 |
Binder for nonaqueous electrolyte secondary battery electrode, manufacturing method therefor and use therefor
Provided is a binder for a nonaqueous electrolyte secondary battery electrode. The binder contains a crosslinked polymer having a carboxyl group, or salt thereof, a use therefor, and a method for manufacturing a carboxyl group-containing crosslinked polymer or salt thereof for use in the binder. The crosslinked polymer contains a structural unit derived from an ethylenically unsaturated carboxylic acid monomer in the amount of 50 to 100 mass % of total structural units, and after the crosslinked polymer neutralized to a degree of a neutralization of 80 to 100 mol % has been subjected to water swelling in water and then dispersed in a 1 mass % NaCl aqueous solution, the particle diameter thereof is 0.1 to 7.0 μm in a volume-based median diameter. |
| US10680240B2 |
Electrode material for lithium ion battery and lithium ion battery
Embodiments provide an electrode material for a lithium ion battery capable of decreasing a metal elution amount even when an electrode active material having a large specific surface area is used as the electrode material and capable of obtaining a lithium ion battery in which a decrease in a capacity caused by storage at a high temperature in a fully charged state is suppressed and a lithium ion battery. The electrode material for a lithium ion battery includes electrode active material particles and a carbonaceous film that coats surfaces of the electrode active material particles, in which a tap density is 0.95 g/cm3 or more and 1.6 g/cm3 or less, and a volume ratio of micro pores to a total volume that is evaluated from nitrogen adsorption measurement is 1.5% or more and 2.5% or less. |
| US10680236B2 |
High capacity monolithic composite Si/carbon fiber electrode architectures synthesized from low cost materials and process technologies
A composite Si-carbon fiber comprising a carbon matrix material with 1-90 wt % silicon embedded therein. The composite carbon fibers are incorporated into electrodes for batteries. The battery can be a lithium ion battery. A method of making an electrode incorporating composite Si-carbon fibers is also disclosed. |
| US10680234B2 |
Lithium-sulfur battery with polyanthraquinone binder
A cathode for a lithium-sulfur (Li—S) battery is described herein, which comprises elemental sulfur (e.g., S8) and an electroactive polyanthraquinone-containing binder. In some embodiments, the cathode also includes a conductive carbon material in addition to the sulfur and binder. Also described herein is a Li—S battery comprising the cathode, in combination with a metallic lithium-containing anode, a lithium conductive separator membrane between the anode and the cathode, and a liquid electrolyte comprising a lithium salt dissolved in a non-aqueous organic solvent. |
| US10680233B2 |
Method for manufacturing an electrode for an accumulator
The invention relates to a method of manufacturing a separating membrane in gel form, for an alkali metal ion battery, the method consisting of extruding a mix comprising: an alkali metal salt, a dinitrile compound with formula N≡C—R—C≡N, in which R is a hydrocarbon group CnH2n, and n is equal to 1 or 2 and preferably equal to 2, a hot melt support polymer, soluble in the dinitrile compound. |
| US10680230B2 |
Square secondary battery
A battery includes: an electrode body; an electrode current collector; a sealing body; an external terminal; an electrical conductor connected to the external terminal; a deforming plate sealing an opening of the electrical conductor, electrically connected to the electrical conductor and to the current collector, and deformed when an internal pressure reaches a predetermined pressure; and a first insulator between the deforming plate and the current collector. The current collector includes a base, and a lead connecting to the electrode body. First to fourth fasteners fasten the base and the first insulator. Between the first and second fasteners, the base is electrically connected to the deforming plate. The second fastener is closer to the lead than the first fastener. The second fastener is closer to a connection between the deforming plate and the electrode current collector than a position of the first insulator supported toward the sealing body. |
| US10680228B2 |
Electric vehicle battery current collector
Systems and methods for a battery pack to power an electric vehicle are provided. The battery pack can include a plurality of battery modules having a plurality of battery blocks. The battery blocks can include a plurality of cylindrical battery cells. A first current collector can include a conductive layer to couple the first current collector with positive terminals of the plurality of cylindrical battery cells. A second current collector can include a conductive layer to couple the second current collector with negative terminals of the plurality of cylindrical battery cells. The first current collector, second current collector, and an isolation layer can include a plurality of apertures to expose the positive terminals of the plurality of cylindrical battery cells. The positive terminals can extend through the plurality of apertures to couple with the conductive layer of the first current collector. |
| US10680226B2 |
Battery assembly having PCBA with cell monitoring and welding assembly features
A battery assembly includes a battery cell, conductive bus bar, and printed circuit board assembly (PCBA). A cell tab of the battery assembly has a first portion extending from a perimeter edge of a pouch and a second portion arranged orthogonally with respect to the first portion. The bus bar defines a tab slot through which the first portion extends, and has a major surface adjacent to the second portion. The PCBA defines an elongated welding window orthogonal to a longitudinal axis of the PCBA. The PCBA is mounted over the bus bar such that surface area of the second portion is exposed through the welding window, and in turn is welded to the bus bar through and within the welding window. A spring element may be positioned between the carrier frame and the PCBA. A method of making the battery assembly is also provided. |
| US10680225B2 |
Connection apparatus for connecting battery module and electronic device, and method for manufacturing insulating cover
A connection apparatus for connecting a battery module and an electronic device is for connecting a battery module in which a plurality of electric cells are arranged in a line and are connected to each other, and an electronic device arranged on a side of the battery module. The connection apparatus includes: a connection bus bar in which a welding plate to be connected to a connection electrode in the battery module is provided at one end, and the other end portion to be connected to a connecting portion of the electronic device is provided at the other end; and an insulating cover that is made of a synthetic resin and is attached to a lower face of the connection bus bar. |
| US10680224B2 |
Polyolefin multilayer microporous film, method for producing same, and cell separator
A polyolefin multilayer microporous membrane is disclosed. The polyolefin multilayer microporous membrane has a low air permeability value, maintains high porosity and mechanical strength even when formed into a thin film. The polyolefin multilayer microporous membrane also has excellent impedance characteristics. The polyolefin multilayer microporous membrane has excellent battery characteristics when used as a battery separator. |
| US10680217B2 |
Assembled battery, battery module, and manufacturing method for assembled battery
An assembled battery includes: a plurality of batteries; a holder having a holder part configured to hold outer circumferential surfaces of the batteries inserted in the battery through-holes; and a plurality of adhesive bodies that combine the batteries and inner circumferential surfaces of the holder part with each other. Each of the inner circumferential surfaces includes: a posture restricting portion configured to restrict a posture of each battery; a departing portion configured to depart from each battery around the whole circumference of the battery even when the battery takes any posture within the range; and a liquid-pouring groove connected from the second surface to the departing portion, and every adhesive body includes a whole-circumferential combined portion where the departing portion and the departing-portion opposing portion of each battery are combined with each other around the whole circumference. |
| US10680216B2 |
Battery module and vehicle
A battery module includes a first cell group and a second cell group. The first cell group is provided with a plurality of cells each including a top surface on which terminal are arranged, a bottom face, a pair of long side faces, and short side faces shorter than the long side faces, the pair of long side faces being arranged to be opposed to each other. The second cell group is provided with a plurality of cells each including long side faces arranged to be opposed to each other, the cells being arranged at a position parallel with the first cell group. |
| US10680215B2 |
Secondary battery and assembled battery
An assembled battery (10) according to the present invention is constructed by connecting a plurality of chargeable and dischargeable cells (12) in series, this assembled battery (10) including a plurality of cells (12), each cell (12) including a flat-shaped electrode body (80) which has a positive electrode and a negative electrode and a container (14) which houses the electrode body (80) and an electrolyte, wherein the plurality of cells (12) are constrained in a state where the cells (12) are aligned so that flat surfaces of the electrode bodies (80) oppose each other and a load is applied to the cells (12) in an array direction, and a spring constant of the electrode body (80) in the array direction in each of the constrained cells (12) is 10,000 kgf/mm or less. |
| US10680209B2 |
Organic light emitting diode display
An organic light emitting diode (OLED) display includes a substrate where OLEDs are formed and an encapsulation member fixed onto the substrate while covering the OLEDs. The encapsulation member includes a photochromic material so that the encapsulation member is colored by external light. |
| US10680207B2 |
Electroluminescent display device having reflective patterns within depressed portions
An electroluminescent display device includes a first substrate including an emissive area; an overcoat layer disposed over the first substrate and including a plurality of protruding portions and a plurality of depressed portions in the emissive area; a first electrode disposed over the overcoat layer and including an electrode portion which corresponds to each of the plurality of protruding portions and an opening which corresponds to each of the plurality of depressed portions; a light-emitting layer disposed over the electrode portion; a second electrode disposed over the light-emitting layer; and a reflective pattern disposed over each of the plurality of depressed portions. |
| US10680202B2 |
Display device with block members having different heights
A display device and a method of manufacturing the display device are disclosed. In one aspect, the display device includes a substrate including a display region and a peripheral region. A first block member is in the peripheral region and surrounding display structures, the first block member having a first height. A second block member is spaced apart from the first block member in a first direction extending from the display region to the peripheral region, the second block member surrounding the first block member, the second block member having a second height that is greater than the first height. A first encapsulation layer is over the display structures, the first block member, and the second block member. A second encapsulation layer is over the first encapsulation layer, the second encapsulation layer overlapping at least a portion of the first block member in the depth dimension of the display device. |
| US10680199B2 |
Encapsulation film
Provided are an encapsulation film, an organic electronic device including the same, and a method of manufacturing the organic electronic device using the same. Particularly, the encapsulation film, which effectively blocks moisture or oxygen entering the organic electronic device from the outside, and has excellent mechanical properties such as handleability and processability, and the organic electronic device including the same are provided. |
| US10680198B2 |
Display device and method of manufacturing the same
A display device includes a display panel having a display region and a non-display region that is arranged outside the display region, a cover window arranged on the display panel, and a frit coating layer formed on a side surface of the cover window. |
| US10680193B2 |
Photoelectric cells incorporating wrinkles and folds to enhance efficiency and bendability and method of making
A photovoltaic cell and method of making are disclosed. The photovoltaic cell includes a substrate having a surface at least partially covered in wrinkles and folds, the folds dividing the surface into a plurality of domains. A photoactive layer is formed on the substrate. At least one transparent electrode is coupled to the photoactive layer and configured to allow transmission of light into the photoactive layer. The domains may have a wrinkle periodicity of less than 2 μm. The folds may have a fold density of less than 0.25. The transport layer may comprise PEDOT:PSS. The photoactive layer may comprise P3HT:PCBM. The photoactive layer may comprise a bulk heterojunction. |
| US10680192B2 |
Photo-patternable gate dielectrics for OFET
Articles utilizing polymeric dielectric materials for gate dielectrics and insulator materials are provided along with methods for making the articles. The articles are useful in electronics-based devices that utilize organic thin film transistors. |
| US10680186B2 |
Polycyclic aromatic compound and light emitting layer-forming composition
The present invention addresses the problem of providing a polycyclic aromatic compound which has improved solubility in solvents, film formability, wet coatability and in-plane orientation. The above-described problem is solved by a composition for forming a light emitting layer, which contains, as a first component, at least one compound selected from the group consisting of compounds represented by general formula (A-1) and compounds represented by general formula (A-2), as a second component, at least one compound that has a triplet energy (ET) of 1.8-3.0 eV, and as a third component, at least one organic solvent. In the formulae, R represents a hydrogen atom, an aryl group, a heteroaryl group, a diarylamino group, a diheteroarylamino group or an aryl heteroarylamino group. |
| US10680185B2 |
Active matrix enhanced organic light emitting diode displays for large screen graphic display applications
A light emitting photonic crystal composed of chiral liquid crystalline material and having an organic light emitting diode and methods of making the same are disclosed. An organic light emitting diode disposed within a photonic structure having a band-gap, or stop-band, allows the photonic structure to emit light at wavelengths occurring at the edges of the band-gap. |
| US10680184B2 |
Organic electroluminescent materials and devices
The present application includes novel containing xanthene and spiro dixanthene ring structures and alkylated variants thereof. These compounds are useful as host materials with high triplet energies for phosphorescent electroluminescent devices. |
| US10680182B2 |
Fluoranthene compound, and organic electronic device comprising same
The present specification provides a novel fluoranthene compound significantly improving the life span, efficiency, electrical and chemical stability and thermal stability of an organic electronic device, and an organic electronic device that contains the compound in an organic compound layer. |
| US10680180B2 |
Small molecule hole transporting material for optoelectronic and photoelectrochemical devices
The present invention relates to a compound of formula (I) based on carbazole substituted by diphenylamine and used as organic hole conductors or hole transporting material in an optoelectronic or photoelectrochemical device, with (I), D being selected from formula (1) or (2): |
| US10680179B2 |
Organic semiconductors with dithienofuran core monomers
A process includes providing furan-2,5-dicarboxylic dimethyl ester (FDME), reacting the FDME with a Grignard reagent to form a bis-alkylketone furan having R groups selected from the group consisting of a C1-C20 linear alkyl chain, a C2-C24 branched alkyl chain, and a hydrogen atom. An additional process includes mixing a 3,4-dibrominated bis-alkylketone furan with potassium carbonate, and adding ethyl-mercaptoacetate to the mixture. This process also includes stirring the mixture to form a bis-alkyl-DTF diester fused ring structure, which is then brominated to form a dibromo-DTF compound. |
| US10680176B2 |
Method of forming hybrid nanostructure on graphene, hybrid nanostructure, and device including the hybrid nanostructure
A method of forming a hybrid nanostructure on graphene, the method including providing a graphene layer on a substrate; forming a metal layer on the graphene layer; and chemically depositing a nanomaterial on the graphene layer on which the metal layer is formed to form the hybrid nanostructure. |
| US10680172B2 |
Resistive random access memory device
A memory cell includes: a resistive material layer comprising a first portion that extends along a first direction and a second portion that extends along a second direction, wherein the first and second directions are different from each other; a first electrode coupled to a bottom surface of the first portion of the resistive material layer; and a second electrode coupled to the second portion of the resistive material layer. |
| US10680170B2 |
Cross-point memory and methods for forming of the same
The disclosed technology generally relates to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. Line stacks are formed, including a storage material line disposed over lower a conductive line. Upper conductive lines are formed over and crossing the line stacks, exposing portions of the line stacks between adjacent upper conductive lines. After forming the upper conductive lines, storage elements are formed at intersections between the lower conductive lines and the upper conductive lines by removing storage materials from exposed portions of the line stacks, such that each storage element is laterally surrounded by spaces. A continuous sealing material laterally surrounds each of the storage elements. |
| US10680168B2 |
Ion beam etching fabricated sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices
A metal layer and first dielectric hard mask are deposited on a bottom electrode. These are patterned and etched to a first pattern size. The patterned metal layer is trimmed using IBE at an angle of 70-90 degrees wherein the metal layer is reduced to a second pattern size smaller than the first pattern size. A dielectric layer is deposited surrounding the patterned metal layer and polished to expose a top surface of the patterned metal layer to form a via connection to the bottom electrode. A MTJ stack is deposited on the dielectric layer and via connection. The MTJ stack is etched to a pattern size larger than the via size wherein an over etching is performed. Re-deposition material is formed on sidewalls of the dielectric layer underlying the MTJ device and not on sidewalls of a barrier layer of the MTJ device. |
| US10680166B2 |
Semiconductor structure and associated operating and fabricating method
A semiconductor structure is provided. The semiconductor structure includes: a substrate; a magnetic layer over the substrate; a magnetic tunnel junction (MTJ) cell over the magnetic layer; and a non-magnetic conductive layer between the magnetic layer and the MTJ cell. An associated method for fabricating the semiconductor structure is also disclosed. |
| US10680162B2 |
Stiffness control for electroactive actuators
An actuator device is provided having a controllable stiffness profile, wherein an actuator member (12) comprises an electroactive polymer material (16) having light absorbing filler elements (20) embedded therein. The filler elements are adapted to absorb and convert incident light (26) to heat energy to therefore heat surrounding sections of the electroactive material. By selectively controlling an intensity level or spectral composition of a light source (24) directed at the actuator member, a specific degree and spread of heating can be achieved across the member and, as a result, a specific desired stiffness or flexibility profile can be realised across the actuator member. |
| US10680159B2 |
MEMS component having a high integration density
A MEMS component having increased integration density and a method for manufacturing such a component are specified. The component comprises a base wafer and a cover wafer arranged over this. A first cavity is arranged between the base wafer and the cover wafer. A second cavity is arranged over the cover wafer, below a thin-layer covering. The cavities contain component structures. |
| US10680158B2 |
Resonator element, resonator, electronic device, electronic apparatus, mobile body and method of manufacturing resonator element
A resonator element includes: a substrate; and an electrode that includes a first conductive layer provided on a surface of the substrate, and a second conductive layer, provided on the opposite side to the first conductive layer on the substrate side, which is disposed within an outer edge of the first conductive layer when seen in a plan view from a direction perpendicular to the surface. |
| US10680157B2 |
Driving system for piezoelectric pump
A driving system includes a voltage conversion module, a switching module, a detecting module, a voltage dividing module and a microcontroller. The voltage conversion module converts a first DC voltage into a second DC voltage. The switching module converts the second DC voltage into an AC voltage so as to drive a piezoelectric actuator of a piezoelectric pump. The detecting module includes a feedback circuit and a gas pressure sensor, wherein the feedback circuit detects an electric power reference value of the switching module, and the gas pressure sensor detects the gas pressure value of the piezoelectric pump. The microcontroller acquires a working frequency according to the electric power reference value so as to operate the piezoelectric actuator at the working frequency. The microcontroller controls the voltage conversion module to adjust the output voltage. Consequently, a gas pressure in the piezoelectric pump is correspondingly adjusted. |
| US10680151B1 |
Packaged illuminating device
A packaged illuminating device includes a hybrid light emitting device, a first plurality of bonding wires, a linear constant current circuit, a soldering plate, a second plurality of bonding wires and a protection layer. The hybrid light emitting device includes a plurality of illuminating elements having different or partially same luminance properties. The plurality of illuminating elements are disposed in respective proximities. The linear constant current circuit is electrically coupled to the hybrid light emitting device via the first plurality of bonding wires at a first plurality of pins of the linear constant current circuit. The linear constant current circuit powers up the plurality of illuminating elements using a constant DC voltage and controls duty cycles. The protection layer encapsulates the hybrid light emitting device, the first plurality of bonding wires, the linear constant current circuit, and the second plurality of bonding wires with the aid of the soldering plate. |
| US10680147B2 |
Method of producing a lighting device
A method of producing a lighting device includes a radiation-emitting optoelectronic component, including: arranging the component on a carrier, applying a first layer on the carrier, wherein the first layer surrounds the component at least laterally in the form of a circumferential frame, and subsequently applying a second layer on the first layer laterally next to the frame, wherein the second layer includes a greater hardness than the first layer. |
| US10680146B2 |
Light emitting device and method for manufacturing the same
A method for manufacturing a light emitting device includes: preparing a wavelength conversion member; preparing a light emitting element comprising a pair of electrodes at a second face side of the light emitting element; forming a light transmissive member, which includes: disposing a liquid resin material on a second main face of the wavelength conversion member, disposing the light emitting element on the liquid resin material such that (i) a first face of the light emitting element is opposed to the second main face of the wavelength converting member, (ii) a portion of a first lateral face of the light emitting element and a portion of a second lateral face of the light emitting element are covered by the liquid resin material, and (iii) a first corner of the light emitting element is exposed from the liquid resin material, and curing the liquid resin material; and forming a covering member. |
| US10680145B2 |
LED package structure and method for manufacturing same
The present disclosure provides an LED package structure and a method for manufacturing the LED package structure. The LED package structure includes: a chip scale package (CSP) light emitting element and a shading layer, where the CSP light emitting element includes a light emitting chip, and the light emitting chip includes an electrode group located on a bottom surface of the light emitting chip, the shading layer is disposed on a bottom surface and/or a side surface of the CSP light emitting element. An LED package structure according to the present disclosure solves a problem that the blue light leaking from the bottom surface of the LED chip interferes with the emission color of the CSP emitting device, and reduces the luminous efficiency of the emitting device. |
| US10680144B2 |
Quantum dot glass cell and light-emitting device package including the same
Provided are a quantum dot glass cell and a light-emitting device package including the quantum dot glass cell. The quantum dot glass cell may include a quantum dot powder in which quantum dots, inorganic homogenizing particles, and a binder are mixed, a dispersion matrix in which the quantum dot powder is dispersed, and a glass sealing structure surrounding the dispersion matrix. The quantum dot glass cell and the light-emitting device package including the quantum dot glass cell may have improved light emission characteristics and improved reliability. |
| US10680143B2 |
Optical plate, lighting device, and light source module
Disclosed according to one embodiment is a lighting device comprising: a light emitting device having a light emitting chip; and an optical plate corresponding to the light emitting chip, wherein the optical plate comprises: a phosphor layer; a transparent film on the upside and/or downside of the phosphor layer; and a support surrounding the outside of the phosphor layer. |
| US10680142B2 |
Wavelength converted semiconductor light emitting device
A structure according to embodiments of the invention includes a light emitting device for emitting light having a first peak wavelength. A wavelength converting layer is disposed in a path of light emitted by the light emitting device. The wavelength converting layer absorbs light emitted by the light emitting device and emits light having a second peak wavelength. The wavelength converting layer includes a mixture of a wavelength converting material, a transparent material, and an adhesive material, wherein the adhesive material is no more than 15% of the weight of the wavelength converting layer. |
| US10680141B1 |
Light-emitting diode (LED) switching system
A LED switching system, including a multi-chip LED including first and second sets of LED chips, the first set of LED chips associated with a first wavelength band and the second set of LED chips associated with a second wavelength band; a first LED driver in communication with the first set of LED chips; a second LED driver in communication with the second set of LED chips; a LED controller configured to: receive input indicating a selection of one of the wavelength bands; identifying one of the first set and the second set of LED chips associated with the selected wavelength band; and providing a signal to one of the first and the second LED drivers that is in communication with the identified set of LED chips; wherein, in response to the signal, the one of the first and the second LED drivers activates the identified set of LED chips. |
| US10680137B2 |
Electronic device having an intermediate layer disposed between two electrically-conductive layers
An electronic device including: a substrate; a first electrically-conductive layer; a second electrically-conductive layer; and an intermediate layer. The first electrically-conductive layer is disposed on the substrate and composed of aluminum or an aluminum alloy. The second electrically-conductive layer is spaced away from the first electrically-conductive layer. The intermediate layer is disposed between the first electrically-conductive layer and the second electrically-conductive layer, is in contact with both the first electrically-conductive layer and the second electrically-conductive layer, and contains aluminum and fluorine. |
| US10680136B2 |
Light-emitting device with reflective layer
A light-emitting device comprises a semiconductor structure comprising a surface and a side wall inclined to the surface, wherein the semiconductor structure comprises a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, and the second semiconductor layer comprises a first edge and a first area; a reflective layer located on the second semiconductor layer and comprising an outer edge and a second area, wherein a distance between the first edge and the outer edge is greater than 0 μm and is not greater than 10 μm; and a first contact part comprising a metal formed on the reflective layer and the first semiconductor layer, wherein the first contact part comprises a first periphery comprising a first periphery length larger than a periphery length of the active layer from a top-view of the light-emitting device. |
| US10680133B2 |
Light-emitting device and manufacturing method thereof
The present disclosure provides a light-emitting device comprises a substrate with a topmost surface; a first semiconductor stack arranged on the substrate, and comprising a first light-emitting layer separated from the topmost surface by a first distance; a second semiconductor stack arranged on the substrate, and comprising a second light-emitting layer separated from the topmost surface by a second distance; and a third semiconductor stack arranged on the substrate, and comprising third light-emitting layer separated from the topmost surface by a third distance; wherein the first semiconductor stack, the second semiconductor stack, and the third semiconductor stack are configured to emit different color lights; and wherein the second distance is different form the first distance and the third distance. |
| US10680132B2 |
Non-destructive wafer recycling for epitaxial lift-off thin-film device using a superlattice epitaxial layer
The present disclosure relates to methods and growth structures for making thin-film electronic and optoelectronic devices, such as flexible photovoltaic devices, using epitaxial lift-off (ELO). In particular, disclosed herein are wafer protection schemes that preserve the integrity of the wafer surface during ELO and increase the number of times that the wafer may be used for regrowth. The wafer protection schemes use growth structures that include at least one superlattice layer. |
| US10680130B2 |
On-chip integration of MMIC and single photon detectors
A photon detection device and method of fabricating a photon detection device are provided. The photon detection device comprises a first input terminal for receiving a DC input voltage, a second input terminal for receiving an AC input voltage and a bias tee connected to the first and second input terminals and configured to combine the AC and DC input voltages to form a combined voltage on an output of the bias tee. A first single photon detector is connected to the output of the bias tee and configured to receive the combined voltage from the bias tee, register a detection signal based on only a single photon being incident on the first single photon detector and output the detection signal indicative of the detected photon. A first output terminal is connected to an output of the first single photon detector for outputting the detection signal. The photon detection device is formed in a single integrated circuit. |
| US10680129B1 |
Radially stacked solar cells based on 2D atomic crystals and methods for their production
A solar cell for collecting solar radiation can include a barrier layer such as a dielectric barrier layer and a heterostructure including a first light absorbing layer and at least a second light absorbing layer. A method for forming the solar cell can include forming a sacrificial layer on a support substrate and forming the barrier layer on the sacrificial layer. The barrier layer is formed to have a strain gradient through its thickness. The heterostructure is attached to the barrier layer and the sacrificial layer is removed, thereby separating the barrier layer and the heterostructure from the support substrate. During the removal of the sacrificial layer, the strain gradient causes the barrier layer and heterostructure, to roll, curl, or spiral, thereby resulting in a radially stacked heterostructure that provides a light concentrating optical cavity having multiple light absorbing layers with different band gaps. |
| US10680126B2 |
Photovoltaics on silicon
Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material. |
| US10680125B2 |
Iron pyrite nanocrystals
An apparatus includes a nanocrystal. The nanocrystal includes a core including FeS2; and a coating including a ligand component capable of chemically interacting with both an iron atom and a sulfur atom on a surface of the core. |
| US10680122B2 |
Solar cell and method for manufacturing the same
A solar cell and a method for manufacturing the same are disclosed. The solar cell includes a substrate, an emitter layer at a front surface of the substrate, a first anti-reflection layer on the emitter layer, a back surface field layer at a back surface of the substrate, and a second anti-reflection layer on the back surface field layer. The first anti-reflection layer and the second anti-reflection layer overlap may each other. |
| US10680121B2 |
Optical fingerprint sensor and manufacturing method of sensing module thereof
An optical fingerprint sensor is provided. The optical fingerprint sensor includes a sensing module. The sensing module includes a light sensing layer and a light filter layer disposed above the light sensing layer. The light sensing layer includes a plurality of photo detectors arranged in a sensing array. The light filter layer includes a plurality of collimators. The collimators are divided into a plurality of collimator groups corresponding to the photo detectors, and the number of collimator groups is equal to the number of photo detectors. Each of the collimator groups comprises the same number of collimators arranged in a specific pattern and disposed above the corresponding photo detector. The photo detectors receive reflected light from a user's finger through the collimators of the corresponding collimator groups. |
| US10680120B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes a substrate, a well region formed in the substrate, first and second isolation regions formed in the substrate, a dielectric layer formed on the well region, a conductive layer formed on the dielectric layer, a first doped region, an insulating layer, and first and second contact vias. The dielectric layer is disposed between the first and second isolation regions. The first doped region is formed in the well region. The insulating layer is formed on the dielectric layer, the first and second isolation regions, and the first doped region. The first contact via is formed in the insulating layer and electrically connected to the conductive layer. The first contact via is disposed on an overlapping area between the dielectric layer and the conductive layer. The second contact via is formed in the insulating layer and electrically connected to the doped region. |
| US10680119B2 |
Schottky diode including an insulating substrate and a Schottky diode unit and method for making the same
A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode; the second end is located on the surface of the insulating substrate. The semiconducting structure is nano-scale semiconductor structure. The second electrode is located on the second end. |
| US10680118B2 |
Semiconductor integrated circuit device including nano-wire selector and method of manufacturing the same
In a method of manufacturing a semiconductor integrated circuit device, an active region including a nano-wire may be formed on a bulk insulating layer. A hard mask pattern may be formed to partially expose the nano-wire. A work function-controlling region may be formed on the nano-wire exposed through the hard mask pattern. The hard mask pattern may be removed. A gate insulating layer may be formed on the nano-wire. A gate may be formed to surround the nano-wire. |
| US10680116B2 |
Manufacturing method of semiconductor device including oxide semiconductor
The semiconductor device includes a first insulating layer, a second insulating layer, an oxide semiconductor layer, and first to third conductive layers. The first conductive layer and the second conductive layer are connected to the oxide semiconductor layer. The second insulating layer includes a region in contact with the oxide semiconductor layer, and the third conductive layer includes a region in contact with the second insulating layer. The oxide semiconductor layer includes first to third regions. The first region and the second region are separated from each other, and the third region is located between the first region and the second region. The third region and the third conductive layer overlap with each other with the second insulating layer located therebetween. The first region and the second region include a region having a higher carbon concentration than the third region. |
| US10680115B2 |
P-channel oxide semiconductor thin film transistor
Substrates, assemblies, and techniques for enabling a p-channel oxide semiconductor. For example, some embodiments can include an oxide semiconductor, where the oxide semiconductor includes an indium gallium zinc oxide (IGZO) sulfur alloy as a semiconducting material. The semiconducting material can be included in a thin-film-transistor that includes one or more p-channels. |
| US10680113B2 |
Thin-film transistor having a floating gate between a control gate and a gate electrode, manufacturing method thereof, display substrate and display device
A thin-film transistor and a manufacturing method thereof, a display substrate and a display device are disclosed. The thin-film transistor includes a control gate, a floating gate, an injection layer, an active layer, a gate electrode, and a source electrode and a drain electrode, which are provided on the base substrate, in which the source electrode and the drain electrode are opposite to each other and electrically connected to the active layer. The injection layer is provided between the floating gate and the active layer; the active layer is provided between the control gate and the gate electrode; and the floating gate is provided between the control gate and the active layer. |
| US10680112B2 |
Gate all around vacuum channel transistor
A vacuum channel transistor having a vertical gate-all-around (GAA) architecture provides high performance for high-frequency applications, and features a small footprint compared with existing planar devices. The GAA vacuum channel transistor features stacked, tapered source and drain regions that are formed by notching a doped silicon pillar using a lateral oxidation process. A temporary support structure is provided for the pillar during formation of the vacuum channel. Performance of the GAA vacuum channel transistor can be tuned by replacing air in the channel with other gases such as helium, neon, or argon. A threshold voltage of the GAA vacuum channel transistor can be adjusted by altering dopant concentrations of the silicon pillar from which the source and drain regions are formed. |
| US10680107B2 |
Nanosheet transistor with stable structure
Sacrificial gate structures are simultaneously formed in isolation regions that are wider than the sacrificial gate structures formed in the active region. The wider sacrificial gate structures are formed by taking advantage of a smaller lateral etch of p-type silicon than undoped or n-type doped silicon during reactive ion etching. Amorphous or polycrystalline silicon is used as a sacrificial pattern transfer patterning layer in the gate patterning process. The p-type amorphous or polycrystalline silicon increases the sacrificial gate structure length in the isolation region and thus reduces spacing between the sacrificial gate structures in the isolation region. During inner spacer formation, the inner spacers pinch-off all sacrificial gate structures in the isolation region preventing the shallow trench isolation structure to be undercut and thus preventing the collapsing of the sacrificial gate structures in the isolation region. |
| US10680103B2 |
Method of forming semiconductor device with gate
A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate, and the isolation structure surrounds an active region of the semiconductor substrate. The method also includes forming a gate over the semiconductor substrate, and the gate is across the active region and extends onto the isolation structure. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, the end portions are over the isolation structure. The method includes forming a support film over the isolation structure, and the support film is a continuous film which continuously covers the isolation structure and at least one end portion of the gate. |
| US10680102B2 |
Reduction of top source/drain external resistance and parasitic capacitance in vertical transistors
A method of forming a semiconductor device that includes forming at least two semiconductor fin structures having sidewalls with {100} crystalline planes that is present atop a supporting substrate; and epitaxially growing a source/drain region in a lateral direction from the sidewalls of each fin structure. The second source/drain regions have substantially planar sidewalls. A metal wrap around electrode is formed on an upper surface and the substantially planar sidewalls of the source/drain regions. Air gaps are formed between the source/drain regions of the at least two semiconductor fin structures. |
| US10680101B2 |
Power metal-oxide-semiconductor field-effect transistor
A semiconductor device includes: a first semiconductor region disposed over a second semiconductor region, wherein the first and second semiconductor regions have a first doping type and a second doping type, respectively; a first source/drain contact region and a second source/drain contact region having the second doping type and laterally spaced; and a gate electrode disposed laterally between the first and second source/drain contact regions, wherein the gate electrode comprises a first sidewall relatively closer to the first source/drain region and a second sidewall relatively closer to the second source/drain region, and wherein respective cross-sectional areas of the first and second sidewalls of the gate electrode are different from each other. |
| US10680098B2 |
High voltage tolerant LDMOS
An LDMOS device in FinFET technology is disclosed. In one aspect, the device includes a first region substantially surrounded by a second region of different polarity. The device further includes a first fin in the first region, extending into the second region, the first fin including a doped source region connected with a first local interconnect. The device further includes a second fin in the second region, including a doped drain region connected with a second local interconnect. The device further includes a third fin parallel with the first and second fins including a doped drain region connected with the second local interconnect. The device further includes a gate over the first fin at the border between the first and second regions. A first current path runs over the first and second fins. A second current path runs over and perpendicular to the first fin towards the third fin. |
| US10680093B2 |
HEMT having conduction barrier between drain fingertip and source
A High Electron Mobility Transistor (HEMT) includes an active layer on a substrate, and a Group IIIA-N barrier layer on the active layer. An isolation region is through the barrier layer to provide at least one isolated active area including the barrier layer on the active layer. A gate is over the barrier layer. A drain includes at least one drain finger including a fingertip having a drain contact extending into the barrier layer to contact to the active layer and a source having a source contact extending into the barrier layer to contact to the active layer. The source forms a loop that encircles the drain. The isolation region includes a portion positioned between the source and drain contact so that there is a conduction barrier in a length direction between the drain contact of the fingertip and the source. |
| US10680091B2 |
Semiconductor device
In a semiconductor device having a heterojunction type superjunction structure, a drain portion and a source portion are electrically connected to one of a two-dimensional electron gas layer and a two-dimensional hole gas layer, and a gate portion is prevented by an insulating region from directly contacting the one of the two-dimensional election gas layer and the two-dimensional hole gas layer. |
| US10680086B2 |
Radio frequency silicon-on-insulator integrated heterojunction bipolar transistor
A heterojunction bipolar transistor is integrated on radio frequency (RF) dies of different sizes. The heterojunction bipolar transistor includes an emitter on a first-side of a semiconductor-on-insulator (SOI) layer of an SOI substrate. The emitter is accessed from the first-side while a collector is accessed from a second-side of the SOI substrate. One or more portions of a base of the heterojunction bipolar transistor is between the emitter and one or more portions of the collector. The heterojunction bipolar transistor also includes a compound semiconductor layer between the collector and the emitter. The compound semiconductor layer carries a charge between the emitter and the collector. |
| US10680085B2 |
Transistor structure with varied gate cross-sectional area
Aspects of the present disclosure include finFET structures with varied cross-sectional areas and methods of forming the same. Methods according to the present disclosure can include, e.g., forming a structure including: a semiconductor fin positioned on a substrate, wherein the semiconductor fin includes: a gate area, and a terminal area laterally distal to the gate area, a sacrificial gate positioned on the gate area of the semiconductor fin, and an insulator positioned on the terminal area of the semiconductor fin; removing the sacrificial gate to expose the gate area of the semiconductor fin; increasing or reducing a cross-sectional area of the gate area of the semiconductor fin; and forming a transistor gate on the gate area of the semiconductor fin. |
| US10680082B2 |
Vertical FET process with controlled gate length and self-aligned junctions
Method and structure of forming a vertical FET. The method includes depositing a bottom source-drain layer over a substrate; depositing a first heterostructure layer over the bottom source-drain layer; depositing a channel layer over the first heterostructure layer; depositing a second heterostructure layer over the channel layer; forming a first fin having a hard mask; recessing the first and the second heterostructure layers to narrow them; filling gaps with an inner spacer; laterally trimming the channel layer to a narrower width; depositing a bottom outer spacer over the bottom source-drain layer; depositing a high-k layer on the bottom outer spacer, the first fin, and the hard mask; and depositing a metal gate layer over the high-k and top outer spacer to produce the vertical FET. Forming another structure by recessing the metal gate layer below the second inner spacer. |
| US10680081B2 |
Vertical transistors with improved top source/drain junctions
A method of fabricating a top source/drain junction of a vertical transistor includes forming a structure including a bottom source/drain, a fin channel extending vertically from the bottom source/drain, and a gate arranged around the fin channel, the gate including a dielectric layer, a gate metal, and spacers arranged on top and bottom surfaces of the gate; etching to form a recess in a top surface of the fin, the recess having sidewalls that form oblique angles with respect to sidewalls of the fin; forming a top source/drain on the fin and within the recess; doping the top source/drain with a dopant; and annealing to diffuse the dopants from the top source/drain into the fin. |
| US10680079B2 |
Semiconductor structure and fabrication method thereof
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes forming a gate structure on a base substrate and forming a first dielectric layer on the base substrate. The first dielectric layer has a top lower than the gate structure and exposes a sidewall portion of the gate structure. The method also includes forming an isolation sidewall spacer on the exposed sidewall portion of the gate structure. |
| US10680078B2 |
Semiconductor arrangement and formation thereof
A semiconductor arrangement and method of formation are provided. The semiconductor arrangement comprises a conductive contact in contact with a substantially planar first top surface of a first active area, the contact between and in contact with a first alignment spacer and a second alignment spacer both having substantially vertical outer surfaces. The contact formed between the first alignment spacer and the second alignment spacer has a more desired contact shape then a contact formed between alignment spacers that do not have substantially vertical outer surfaces. The substantially planar surface of the first active area is indicative of a substantially undamaged structure of the first active area as compared to an active area that is not substantially planar. The substantially undamaged first active area has a greater contact area for the contact and a lower contact resistance as compared to a damaged first active area. |
| US10680075B2 |
Semiconductor device including source/drain epitaxial layer having facets and manufacturing method thereof
A semiconductor device includes a fin structure disposed over a substrate, wherein the fin structure including a channel layer and extending in a first direction, a gate structure including a gate electrode layer and a gate dielectric layer, sidewall spacers disposed on opposite side faces of the gate structure, and a source/drain structure including an epitaxial layer having at least seven facets in a cross section along the first direction. |
| US10680074B2 |
Tunable breakdown voltage RF FET devices
A tunable breakdown voltage RF MESFET and/or MOSFET and methods of manufacture are disclosed. The method includes forming a first line and a second line on an underlying gate dielectric material. The second line has a width tuned to a breakdown voltage. The method further includes forming sidewall spacers on sidewalls of the first and second line such that the space between first and second line is pinched-off by the dielectric spacers. The method further includes forming source and drain regions adjacent outer edges of the first line and the second line, and removing at least the second line to form an opening between the sidewall spacers of the second line and to expose the underlying gate dielectric material. The method further includes depositing a layer of material on the underlying gate dielectric material within the opening, and forming contacts to a gate structure and the source and drain regions. |
| US10680072B2 |
Semiconductor device and manufacturing method thereof
The reliability of resistive field plate part-containing semiconductor device is improved. In peripheral region of semiconductor chip, the outer circumference end of internal circulation wire is separated from outer circumference end of first conductor pattern of resistive field plate part toward element region. Inner circumference end of external circulation wire is separated from inner circumference end of second conductor pattern of resistive field plate part toward outer circumference of the chip. First conductor pattern of resistive field plate part is partially extended to over thin insulation film to form first lead-out part, and internal circulation wire and first lead-out part of first conductor pattern are electrically coupled via first coupling hole. Second conductor pattern of resistive field plate part is partially extended to over thin insulation film to form second lead-out part, external circulation wire and second lead-out part of second conductor pattern are electrically coupled via second coupling hole. |
| US10680070B2 |
Trench gate manufacturing method
A trench gate manufacturing method includes the following steps: Step 1, forming a trench in the surface of a semiconductor substrate; Step 2, forming a first oxide layer; Step 3, selecting a coating according to the depth-to-width ratio of the trench and forming the coating completely filling the trench; Step 4, etching back the coating through a dry etching process; Step 5, conducting wet etching on the first oxide layer with the coating reserved at the bottom of the trench as a mask so as to form a gate bottom oxide; Step 6, removing the coating; and Step 7, growing a gate oxide. By adoption of the trench gate manufacturing method, a BTO can be realized at a low cost, and can be well-formed in trenches with smaller depth-to-width ratios and thus is suitable for forming BTOs in trenches with various depth-to-width ratios, thereby having a wider application range. |
| US10680067B2 |
Silicon carbide MOSFET device and method for manufacturing the same
The present disclosure discloses a self-aligned silicon carbide MOSFET device with an optimized P+ region and a manufacturing method thereof. The self-aligned silicon carbide MOSFET device is formed by a plurality of silicon carbide MOSFET device cells connected in parallel, and these silicon carbide MOSFET device cells are arranged evenly. The silicon carbide MOSFET device cell comprises two source electrodes, one gate electrode, one gate oxide layer, two N+ source regions, two P+ contact regions, two P wells, one N− drift layer, one buffer layer, one N+ substrate, one drain electrode and one isolation dielectric layer. By optimizing the P+ region, the present disclosure forms a good source ohmic contact, reduces the on-resistance, and also shorts the source electrode and the P well to prevent the parasitic transistor effect of the parasitic NPN and PiN, which may take both conduction characteristics and the breakdown characteristics of the device into consideration, and may be applied to a high voltage, high frequency silicon carbide MOSFET device. The self-aligned manufacturing method used in the present disclosure simplifies the process, controls a size of a channel accurately, and may produce a lateral and vertical power MOSFET. |
| US10680066B2 |
Graphene device, methods of manufacturing and operating the same, and electronic apparatus including the graphene device
Example embodiments relate to a graphene device, methods of manufacturing and operating the same, and an electronic apparatus including the graphene device. The graphene device is a multifunctional device. The graphene device may include a graphene layer and a functional material layer. The graphene device may have a function of at least one of a memory device, a piezoelectric device, and an optoelectronic device within the structure of a switching device/electronic device. The functional material layer may include at least one of a resistance change material, a phase change material, a ferroelectric material, a multiferroic material, multistable molecules, a piezoelectric material, a light emission material, and a photoactive material. |
| US10680062B2 |
III-V semiconductor layers, III-V semiconductor device and methods of manufacturing thereof
A gate-all-around field effect transistor (GAA FET) includes an InAs nano-wire as a channel layer, a gate dielectric layer wrapping the InAs nano-wire, and a gate electrode metal layer formed on the gate dielectric layer. The InAs nano-wire has first to fourth major surfaces three convex-rounded corner surfaces and one concave-rounded corner surface. |
| US10680059B2 |
High voltage metal oxide semiconductor device and manufacturing method thereof
A high voltage MOS device includes: a well, a drift region, a gate, a source, a drain, and plural buried columns. A part of the gate is stacked on a part of the well, and another part of the gate is stacked on a part of the drift region. The source connects the well in a lateral direction. The drain connects the drift region in the lateral direction. The drain and the source are separated by the well and the drift region, and the drain and the source are located at different sides of the gate. The plural buried columns are formed beneath the top surface by a predetermined distance, and each buried column does not connect the top surface. At least a part of every buried column is surrounded by the drift region, and the buried columns and the drift region are arranged in an alternating manner. |
| US10680058B2 |
Semiconductor device having regions of different concentraton of lifetime killer impurity provided in a silicon carbide layer
A semiconductor device of the embodiment includes: a first region provided in a silicon carbide layer; and a second region provided around the first region in the silicon carbide layer, the second region having a higher concentration of at least one kind of a lifetime killer impurity selected from the group consisting of B (boron), Ti (titanium), V (vanadium), He (helium) and H+ (proton) than a concentration of a lifetime killer impurity in the first region. |
| US10680057B2 |
Methods of forming a capacitor comprising ferroelectric material and including current leakage paths having different total resistances
A memory cell comprises a capacitor having a first conductive capacitor electrode having laterally-spaced walls that individually have a top surface. A second conductive capacitor electrode is laterally between the walls of the first capacitor electrode, and comprises a portion above the first capacitor electrode. Ferroelectric material is laterally between the walls of the first capacitor electrode and laterally between the second capacitor electrode and the first capacitor electrode. The capacitor comprises an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the ferroelectric material. A parallel current leakage path is between an elevationally-inner surface of the portion of the second capacitor electrode that is above the first capacitor electrode and at least one of the individual top surfaces of the laterally-spaced walls of the first capacitor electrode. The parallel current leakage path is circuit-parallel the intrinsic current leakage path and of lower total resistance than the intrinsic current leakage path. Other aspects, including methods, are disclosed. |
| US10680051B2 |
Display device including dual gate oxide semiconductor transistor
A display device includes a driving transistor and an organic EL element. The driving transistor includes an oxide semiconductor layer; a first gate electrode that includes a region overlapping the oxide semiconductor layer; a first insulating layer between the first gate electrode and the oxide semiconductor layer; a second gate electrode that includes a region overlapping the oxide semiconductor layer and the first gate electrode; a second insulating layer between the second gate electrode and the oxide semiconductor layer; and a first and a second transparent conductive layer that are provided between the oxide semiconductor layer and the first insulating layer and each include a region contacting the oxide semiconductor layer. The organic EL element includes a first electrode; a second electrode; a light emitting layer between the first electrode and the second electrode; and an electron transfer layer between the light emitting layer and the first electrode. |
| US10680050B2 |
Display device
A display device is provided. The display device includes a substrate and an insulating layer disposed on the substrate and having a recess. The display device also includes an organic layer disposed on the insulating layer. The display device also includes at least one light emitting unit disposed in the recess and a conductive layer disposed on the light emitting unit. |
| US10680046B2 |
Luminescent display panel
A luminescent display panel having a structure improving an encapsulation capability is discussed. The luminescent display panel includes a first electrode positioned on a substrate, a bank overlapping at least a portion of the first electrode, a first body positioned on the bank, a second body positioned on the first body, a first organic layer positioned on the substrate and overlapping the first electrode and the bank, and a second electrode positioned on the substrate and overlapping the first electrode, the bank, and the first organic layer. The first body has a positive side slope, and the second body has a negative side slope. |
| US10680045B2 |
Organic light emitting display device, head mounted display including the same and method of fabricating the same
An organic light emitting display device includes: an insulating layer; first electrodes on the insulating layer and spaced from each other by a gap; an organic light emitting layer on the first electrodes; and a second electrode on the organic light emitting layer, wherein the insulating layer includes a trench between the first electrodes, wherein the organic light emitting layer includes a first stack on the first electrodes, a charge generating layer on the first stack, and a second stack on the charge generating layer, wherein each of the first and second stacks includes a hole transporting layer, at least one emitting material layer and an electron transporting layer, and wherein the first stack has a discontinuous portion in the trench. |
| US10680042B2 |
Display device including integrated circuit ports connected to sub-pixels using cross diagonal wires
A display including a pixel structure, an integrated circuit, and diagonal wires. The pixel structure includes a plurality of units. Each unit includes first and second pixel units. The first pixel unit is axial symmetrical to the second pixel unit. The arrangement of the pixel structure is RGBBGR. The integrated circuit has a plurality of ports arranged in a form of sequential red sub-pixel port, green sub-pixel unit port, and blue sub-pixel port repeatedly. The diagonal wires includes first and second crossing diagonal wires arranged crosswise. The first crossing diagonal wire is configured to connect a data line of a column where the red sub-pixel (R) of the second pixel unit is positioned, to the red sub-pixel port, and the second cross diagonal wire is configured to connect a data line of a column where the green sub-pixel (G) of the second pixel unit is positioned, to the green sub-pixel port. |
| US10680037B2 |
Cross-point memory and methods for fabrication of same
A cross-point memory array includes a plurality of variable resistance memory cell pillars. Adjacent memory cell pillars are separated by a partially filled gap that includes a buried void. In addition, adjacent memory cell pillars include storage material elements that are at least partially interposed by the buried void. |
| US10680035B1 |
Micro light-emitting diode display device and micro light-emitting diode driving circuit
A micro light-emitting diode display device including a driving transistor and a micro light-emitting diode is provided. The driving transistor includes a substrate, a gate, a gate insulator, a semiconductor layer, a drain electrode, and a source electrode. The gate insulator has a thickness less than or equal to about 500 angstroms. The micro light-emitting diode has a lateral length less than or equal to about 50 μm and is electrically connected to one of the source electrode and the drain electrode. A current injection channel is extended within one of a first type semiconductor layer and a second type semiconductor layer of the micro light-emitting diode and is spaced apart from a side surface of the micro light-emitting diode. A lateral length a light-emitting portion of an active layer of the micro light-emitting diode is less than or equal to about 10 μm. |
| US10680024B2 |
Concave reflector for complementary metal oxide semiconductor image sensor (CIS)
In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall. |
| US10680023B2 |
Optoelectronic modules having a silicon substrate, and fabrication methods for such modules
Optoelectronic modules include a silicon substrate in which or on which there is an optoelectronic device. An optics assembly is disposed over the optoelectronic device, and a spacer separates the silicon substrate from the optics assembly. Methods of fabricating such modules also are described. |
| US10680019B2 |
Selective polysilicon doping for gate induced drain leakage improvement
Some embodiments of the present disclosure relate to a method of forming a transistor. The method includes forming a gate dielectric over a substrate and forming a gate over the gate dielectric. The gate includes polysilicon extending between a first outermost sidewall and a second outermost sidewall of the gate. A mask is formed over the gate. The mask exposes a first gate region extending to the first outermost sidewall and covers a second gate region extending between the first gate region and the second outermost sidewall. Dopants are selectively implanted into the first gate region according to the mask. Source and drain regions are formed within the substrate. The source region and the drain region are asymmetric with respect to an interface of the first gate region and the second gate region and extend to substantially equal distances past the first and second outermost sidewalls of the gate, respectively. |
| US10680016B2 |
Flexible display panel, method for fabricating the same, and flexible display device
The disclosure provides a flexible display panel, a method for fabricating the same, and a flexible display device. A flexible display panel according to an embodiment of the disclosure includes at least one bendable area; a neutral layer adjusting structure arranged in the at least one bendable area, and configured to adjust the position of a neutral layer in the bendable area where the neutral layer adjusting structure is located; and a flexible element located in the bendable area, and configured to be approximately located at the neutral layer. |
| US10680012B2 |
Semiconductor device
According to one embodiment, there is provided a semiconductor device including a stacked body, a semiconductor columnar member, an insulating film, and a structure. The stacked body is disposed above a semiconductor substrate. In the stacked body, a conductive film and an insulating layer are alternately disposed in a stacking direction. The semiconductor columnar member penetrates the stacked body in the stacking direction. The insulating film surrounds the semiconductor columnar member and penetrates the stacked body in the stacking direction. The structure is disposed in a peripheral circuit region on the semiconductor substrate. The peripheral circuit region is a region including a plurality of circuit blocks. The structure has a plate-shaped portion extending at least between the plurality of circuit blocks. |
| US10680007B2 |
Semiconductor device
A semiconductor device includes gate electrodes stacked along a direction perpendicular to an upper surface of a substrate, the gate electrodes extending to different lengths in a first direction, and each gate electrode including subgate electrodes spaced apart from each other in a second direction perpendicular to the first direction, and gate connection portions connecting subgate electrodes of a same gate electrode of the gate electrodes to each other, channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, and dummy channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, the dummy channels including first dummy channels arranged in rows and columns, and second dummy channels arranged between the first dummy channels in a region including the gate connection portions. |
| US10680002B2 |
Method to reduce kink effect in semiconductor devices
In some embodiments, a method for forming a semiconductor device is provided. The method includes forming a pad stack over a semiconductor substrate, where the pad stack includes a lower pad layer and an upper pad layer. An isolation structure having a pair of isolation segments separated in a first direction by the pad stack is formed in the semiconductor substrate. The upper pad is removed to form an opening, where the isolation segments respectively have opposing sidewalls in the opening that slant at a first angle. A first etch is performed that partially removes the lower pad layer and isolation segments in the opening so the opposing sidewalls slant at a second angle greater than the first angle. A second etch is performed to round the opposing sidewalls and remove the lower pad layer from the opening. A floating gate is formed in the opening. |
| US10679999B2 |
Capacitor-coupled N-type transistor-based one-time programmable device
A capacitor-coupled N-type transistor-based one-time programmable (OTP) device is disclosed. The OTP includes a transistor and a coupling capacitor both formed in a p-well and isolated from each other by field oxide or shallow trench isolation (STI). The transistor is constructed of a gate, a source region and a drain region composed of heavily-doped N-region. The coupling capacitor has a top plat formed of polysilicon on substrate surface, and a bottom plate constructed of an NLDD region and a heavily-doped N-region in the NLDD region. In order to achieve maximum capacitance utilization, the top plate of the coupling capacitor has a width not greater than the NLDD implantation region or twice a lateral junction depth of the heavily-doped n-region. The gate of the transistor may not be wider than the top plate of the coupling capacitor such that capacitance coupling ratio of the coupling capacitor to the transistor is optimized. |
| US10679998B2 |
Vertical field effect transistor including integrated antifuse
A vertical field effect transistor (FET) includes a vertical semiconductor channel having a first end that contacts an upper surface of a substrate and an opposing second end that contacts a source/drain region. An electrically conductive gate encapsulates the vertical semiconductor channel. The vertical FET further includes a split-channel antifuse device between the source/drain region and the electrically conductive gate. The split-channel antifuse device includes a gate dielectric having a thickness that varies between the source/drain region and the electrically conductive gate. |
| US10679997B2 |
Semiconductor device comprising work function metal pattern in boundary region and method for fabricating the same
A semiconductor device and method for fabricating the same are provided. The semiconductor device includes a substrate including a cell region, a core region, and a boundary region between the cell region and the core region, a boundary element isolation layer in the boundary region of the substrate to separate the cell region from the core region, a high-k dielectric layer on at least a part of the boundary element isolation layer and the core region of the substrate, a first work function metal pattern comprising a first extension overlapping the boundary element isolation layer on the high-k dielectric layer, and a second work function metal pattern comprising a second extension overlapping the boundary element isolation layer on the first work function metal pattern, wherein a first length of the first extension is different from a second length of the second extension. |
| US10679995B2 |
Semiconductor device and method
A semiconductor device including a cap layer and a method for forming the same are disclosed. In an embodiment, a method includes epitaxially growing a first semiconductor layer over an N-well; etching the first semiconductor layer to form a first recess; epitaxially growing a second semiconductor layer filling the first recess; etching the second semiconductor layer, the first semiconductor layer, and the N-well to form a first fin; forming a shallow trench isolation region adjacent the first fin; and forming a cap layer over the first fin, the cap layer contacting the second semiconductor layer, forming the cap layer including performing a pre-clean process to remove a native oxide from exposed surfaces of the second semiconductor layer; performing a sublimation process to produce a first precursor; and performing a deposition process wherein material from the first precursor is deposited on the second semiconductor layer to form the cap layer. |
| US10679991B2 |
Methods and apparatuses including a boundary of a well beneath an active area of a tap
Apparatuses and methods are disclosed. One such apparatus includes a well having a first type of conductivity formed within a semiconductor structure having a second type of conductivity. A boundary of the well has an edge that is substantially beneath an edge of an active area of a tap to the well. |
| US10679990B2 |
Multi-fin device and method of making same
A multiple-fin device includes a substrate and a plurality of fins formed on the substrate. Source and drain regions are formed in the respective fins. A dielectric layer is formed on the substrate. The dielectric layer has a first thickness adjacent one side of a first fin and having a second thickness, different from the first thickness, adjacent an opposite side of the fin. A continuous gate structure is formed overlying the plurality of fins, the continuous gate structure being adjacent a top surface of each fin and at least one sidewall surface of at least one fin. By adjusting the dielectric layer thickness, channel width of the resulting device can be fine-tuned. |
| US10679989B2 |
Enlarging spacer thickness by forming a dielectric layer over a recessed interlayer dielectric
An exemplary semiconductor device includes first spacers disposed along sidewalls of a first gate structure and second spacers disposed along sidewalls of a second gate structure. A source/drain region is disposed between the first gate structure and the second gate structure. A first ILD layer is disposed between the first spacers and the second spacers. A portion of the first ILD layer has a first recessed upper surface. A dielectric layer is disposed over the first spacers, the second spacers, and the first recessed upper surface of the first ILD layer. A portion of the dielectric layer has a second recessed upper surface that is disposed over the portion of the first ILD layer having the first recessed upper surface. A second ILD layer is disposed over the dielectric layer. A contact extends through the second ILD layer, the dielectric layer, and the first ILD layer to the source/drain region. |
| US10679988B2 |
Semiconductor device including FinFETS having different channel heights and manufacturing method thereof
In a method of manufacturing a semiconductor device, a fin structure protruding from a first isolation insulating layer is formed. A second isolation insulating layer made of different material than the first isolation insulating layer is formed so that a first upper portion of the fin structure is exposed. A dummy gate structure is formed over the exposed first upper portion of the first fin structure. The second isolation insulating layer is etched by using the dummy gate structure as an etching mask. The dummy gate structure is removed so that a gate space is formed. The second isolation insulating layer is etched in the gate space so that a second upper portion of the fin structure is exposed from the first isolation insulating layer. A gate dielectric layer and a gate electrode layer are formed over the exposed second portion of the fin structure. |
| US10679986B2 |
Isolated circuit formed during back end of line process
A semiconductor die is disclosed upon which is formed direct current (DC) isolated first and second circuits. The first circuit is configured for electrical connection to a first ground. The second circuit is configured for electrical connection to a second ground. The first and second grounds can be at different potentials. The first and second circuits were formed using front end of line (FEOL) and back end of line (BEOL) processes. The first circuit includes a plurality of first devices, such as transistors, which were formed during the FEOL process, and the second circuit includes only second devices, such as transistors, which were formed during the BEOL process. |
| US10679982B2 |
Circuit-protection devices
Circuit-protection devices may include first and second circuit-protection units, a first gate having a first source/drain connected to a first node of the first circuit-protection unit, and a second gate having a first source/drain connected to a first node of the second circuit-protection unit, wherein a second source/drain of the first gate is connected to a second source/drain of the second gate. |
| US10679977B2 |
3D microdisplay device and structure
A 3D micro display, the micro display including: a first single crystal layer including at least one LED driving circuit; and a second single crystal layer including a plurality of light emitting diodes (LEDs), where the second single crystal layer overlays the first single crystal layer, where the second single crystal layer includes at least ten first LED pixels, and where the second single crystal layer and the first single crystal layer are separated by a vertical distance of less than ten microns. |
| US10679975B2 |
Lighting device with UV LED
The present invention relates to a lighting device comprising a plurality of light emitting diodes, LEDs. The plurality of LEDs is disposed on a substrate for emitting visible light from at least one first light output surface in an outgoing light direction. The lighting device includes also at least one ultra violet light emitting diode, UV LED, for emitting UV light from a second light output surface in the outgoing light direction. A phosphor layer is disposed on at least the plurality of LEDs such that the LEDs are covered by the phosphor layer. The second light output surface for emitting UV light from the at least one UV LED is mounted at a higher level than the at least first light output surface relative to the substrate in the outgoing light direction. The present invention also relates to a method for manufacturing the lighting device. |
| US10679970B2 |
Semiconductor device assemblies with annular interposers
A semiconductor device package is provided. The package can include a stack of semiconductor dies over a substrate, the substrate including a plurality of electrical contacts, and an annular interposer disposed over the substrate and surrounding the stack of semiconductor dies. The annular interposer can include a plurality of circuit elements each electrically coupled to at least a corresponding one of the plurality of electrical contacts. The package can further include a lid disposed over the annular interposer and the stack of semiconductor dies. |
| US10679964B2 |
Solid-state wafer bonding of functional materials on substrates and self-aligned contacts
A method for integrating III-V semiconductor materials onto a rigid host substrate deposits a thin layer of reactive metal film on the rigid host substrate. The layer can also include a separation layer of unreactive metal or dielectric, and can be patterned. The unreactive metal pattern can create self-aligned device contacts after bonding is completed. The III-V semiconductor material is brought into contact with the thin layer of reactive metal. Bonding is by a low temperature heat treatment under a compressive pressure. The reactive metal and the functional semiconductor material are selected to undergo solid state reaction and form a stable alloy under the low temperature heat treatment without degrading the III-V material. A semiconductor device of the invention includes a functional III-V layer bonded to a rigid substrate via an alloy of a component of the functional III-V layer and a metal that bonds to the rigid substrate. |
| US10679963B2 |
Method for assembling two substrates of different natures via a ductile intermediate layer
A method for manufacturing a heterostructure, including: contacting a first substrate having a first coefficient of thermal expansion and a second substrate having a different second coefficient of thermal expansion; annealing an assembly formed by contacting the first substrate and the second substrate; after annealing, returning the assembly to room temperature; providing, before the contacting, at least one intermediate layer at a surface of at least one of the first and second substrates, the at least one intermediate layer being made of a material which is ductile during the annealing and returning to room temperature; performing the contacting with the at least one intermediate layer sandwiched between the first and the second substrates; upon returning to room temperature, applying an outer pressure to the assembly to maintain it compressed. |
| US10679962B2 |
Capillary jig for wire bonding and method of installing a capillary
A jig for holding a wire bonding capillary includes a first arm and an opening in the first arm, wherein a wire bonding capillary is receivable within the opening. A second arm is pivotally attached to the first arm. The second arm has a surface facing the first arm, wherein the surface is contactable with a capillary mount of a wire bonding machine. |
| US10679961B2 |
Circuit pin positioning structure, fabrication method of soldered circuit elements, and method of forming circuit pins of a stacked package
The invention provides a circuit pin positioning structure, a fabrication method of soldered circuit elements and a method of forming circuit pins of a stacked package, applicable to a semiconductor package structure. A positioning rack and a plurality of conductor elements are used. A plurality of positioning holes are provided on a bottom surface of the positioning rack to form a conductor positioning area, and an operational portion is formed on an opposing surface away from the conductor positioning area, for being mounted with pick and place equipment. The conductor elements are positioned in the positioning holes. When the pick and place equipment loads and moves the positioning rack to preformed circuit contacts of the stacked package, the conductor elements are soldered to the preformed circuit contacts and then the positioning rack is removed. |
| US10679960B2 |
Heat resistant and shock resistant integrated circuit
A heat and shock resistant integrated circuit (IC) of the present invention includes a base material, a metal layer disposed on the base material, a silicon die disposed on the metal layer, additive material disposed on the base material, gas filled filler material disposed between the additive material and the silicon die, and first traces electrically connecting the silicon die to the additive material. Packing of the integrated circuit provides exceptional thermal stress relief and impact protection of circuitry within the packaging. |
| US10679959B2 |
Semiconductor device
A semiconductor device including a semiconductor chip having a first conduction element; a substrate having second and third conduction elements; and external connection elements configured to form an electrical path between the second and third conduction elements via the first conduction element. |
| US10679948B2 |
Semiconductor device and method for manufacturing same
A semiconductor device includes first and second inspection mark regions having the same pattern including a plurality of overlay inspection marks, a first element region having a portion overlapping with the first inspection mark region, and a second element region having a portion overlapping with the second inspection mark region. The first and second element regions are adjacent to each other and have different areas. The first element region includes a first pattern aligned with a plurality of first overlay inspection marks. The second element region includes a second pattern aligned with a plurality of second overlay inspection marks. |
| US10679947B2 |
Chip package and manufacturing method thereof
A chip package includes a redistribution layer, at least one first semiconductor chip, an integrated fan-out package, and an insulating encapsulation. The at least one first semiconductor chip and the integrated fan-out package are electrically connected to the redistribution layer, wherein the at least one first semiconductor chip and the integrated fan-out package are located on a surface of the redistribution layer and electrically communicated to each other through the redistribution layer, and wherein the integrated fan-out package includes at least one second semiconductor chip. The insulating encapsulation encapsulates the at least one first semiconductor chip and the integrated fan-out package. |
| US10679946B2 |
Methods and devices for solderless integration of multiple semiconductor dies on flexible substrates
Methods and devices for solderless integration of multiple semiconductor dies on flexible substrates. In some embodiments, a method for solderless integration of multiple semiconductor dies on flexible substrates includes arranging one or a plurality of semiconductor dies on a first carrier, active side down, and then depositing a sacrificial material over them. In some embodiments, the method further includes removing the first carrier and then building a wafer-level redistribution layer (RDL) over the active side of the one or plurality of semiconductor dies and the sacrificial material. In some embodiments, the method includes patterning the wafer-level RDL to form an outline of a final module footprint and then applying a second carrier to the wafer-level RDL. In some embodiments, the method can also include removing the sacrificial material from the one or plurality of semiconductor dies and the wafer-level RDL to achieve an integration of the one or plurality of semiconductor dies. |
| US10679935B2 |
Structure and method for improving high voltage breakdown reliability of a microelectronic device
A method and structure suitable for, e.g., improving high voltage breakdown reliability of a microelectronic device such as a capacitor usable for galvanic isolation of two circuits. A first dielectric layer has a first dielectric constant located over a semiconductor substrate. A metal structure located over the first dielectric layer has a side surface. A second dielectric layer having a second different dielectric constant is located adjacent the metal structure. A dielectric structure located between the side surface of the metal structure and the second dielectric layer has the first dielectric constant. |
| US10679932B2 |
Semiconductor package and a substrate for packaging
A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination. |
| US10679922B2 |
Composition for heat-dissipating member, heat-dissipating member, electronic instrument, method for producing composition for heat-dissipating member, and method for producing heat-dissipating member
The inventions are: a composition capable of forming a heat-dissipating member that has high thermal conductivity and in which the thermal expansion coefficient can be controlled; and a heat-dissipating member. This composition for a heat-dissipating member comprises a thermally conductive first inorganic filler bonded to one end of a first coupling agent, and a thermally conductive second inorganic filler bonded to one end of a second coupling agent, the composition being characterized in that: at least one of the first coupling agent and the second coupling agent is a liquid crystal silane coupling agent; the other end of the first coupling agent and the other end of the second coupling agent each have a functional group bondable with one another; and the other end of the first coupling agent bonds with the other end of the second coupling agent by a curing treatment. |
| US10679914B2 |
Electronic package and method for manufacturing the same
The disclosure provides an electronic package and a method of manufacturing the same. The method is characterized by encapsulating an electronic component with a packaging layer and forming on an upper surface of the packaging layer a circuit structure that is electrically connected to the electronic component; and forming a stress-balancing layer on a portion of the lower surface of the packaging layer to balance the stress exerted on the upper and lower surfaces of the packaging layer, thereby reducing the overall package warpage and facilitating the manufacturing process. |
| US10679911B2 |
Redundant pixel architecture in ILED displays
Described herein are ILED displays including redundancy in micro-light emitting diode (micro-LED) dies and methods of manufacturing the ILED displays. A micro-LED die emits light of a particular wavelength. The redundancy is added during manufacturing if defective micro-LED dies are identified. Additional micro-LED dies are included in inoperable sub-pixel assemblies to repair the inoperable sub-pixel assemblies that are identified to include defective micro-LED dies. An ILED display therefore includes at least one repaired sub-pixel assembly that includes two defective micro-LED dies and an operable micro-LED die that are coupled to separate branches of a current path from a current source. |
| US10679910B2 |
Packaged wafer processing method
A packaged wafer processing method includes a processing step of processing each division line formed on a packaged wafer by using a laser beam applying unit and a feeding mechanism, and indexing the wafer by a preset index amount “a” corresponding to the pitch of the division lines by using an indexing mechanism, thereby forming a laser processed groove along each division line. A correcting step images the next division line to be processed in an exposed peripheral portion of the wafer and the laser processed groove just formed along the present division line, at any arbitrary time during the processing step. The distance “b” between the next division line and the laser processed groove just formed is determined, and then a correction index amount “c” is calculated by using the deviation corresponding to the difference (a−b) between the preset index amount “a” and the distance “b”. |
| US10679908B2 |
Cleave systems, mountable cleave monitoring systems, and methods for separating bonded wafer structures
Cleave systems for separating bonded wafer structures, mountable cleave monitoring systems and methods for separating bonded wafer structures are disclosed. In some embodiments, the sound emitted from a bonded wafer structure is sensed during cleaving and a metric related to an attribute of the cleave is generated. The generated metric may be used for quality control and/or to adjust a cleave control parameter to improve the quality of the cleave of subsequently cleaved bonded wafer structures. |
| US10679906B2 |
Method of forming nanosheet transistor structures with reduced parasitic capacitance and improved junction sharpness
Nanosheet transistor structures with reduced parasitic capacitance and improved junction sharpness generally include a bilayer spacer adjacent a dummy gate disposed on a nanosheet stack. The bilayer spacer includes an inner spacer layer on sidewalls of the gate and a sacrificial layer on the inner spacer layer. The sacrificial layer can be laterally trimmed to bring the in situ doped source/drain regions closer to the channel, which improves junction sharpness. Additionally, the sacrificial spacer layer can be later removed during the process for forming the transistor so as to form an airgap spacer adjacent the gate, which minimizes parasitic capacitance. |