Document Document Title
US10522899B2 Electronic device provided with an integrated conductor element and fabrication method
An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
US10522898B2 Integration of millimeter wave antennas in reduced form factor platforms
Generally, this disclosure provides systems, devices and methods for integration of millimeter wave antennas in platforms with reduced form factors while maintaining or improving antenna gain. An antenna assembly may include a first planar substrate; a ground plane disposed on the first planar substrate; a second planar substrate disposed on the ground plane; and an antenna radiation element disposed on the second planar substrate. The antenna radiation element may be configured to transmit a signal in the millimeter wave frequency region. The assembly may also include a via to provide a conductive path for the signal from a microstrip feed line, beneath the first planar substrate, to the antenna radiation element. The assembly may further include a dielectric layer disposed on the antenna radiation element to provide increased antenna gain under conditions of reduced air gap between the antenna radiation element and a structural element of an enclosing platform.
US10522893B2 Radar system
A waveguide assembly for use in a radar. The waveguide assembly being fabricated from a di-electric material and comprising a beamsplitter which comprises a right circular cylinder having a quarter wave air gap substantially along a centreline of the right circular cylinder. The waveguide assembly further comprises a waveguide on a port of the beamsplitter. In at least one construction, the waveguide assembly comprises four ports: a transmit input arranged to receive a signal from a source, a receive output arranged to direct a return signal to a receiver, and output port, and a load port.
US10522890B2 Waveguide filter including coupling window for generating negative coupling
A waveguide filter including a coupling window for generating negative coupling includes: a plurality of resonators including a substrate block; and the coupling window provided between the plurality of resonators for coupling, wherein a length of a dimension element of the coupling window is equal to or greater than half a working wavelength of the waveguide filter. The waveguide filter may reverse a coupling polarity between resonators to generate negative coupling.
US10522889B2 Tunable passive enhance Q microwave notch filter
A tunable notch filter comprising a transmission line, a tunable bandstop filter and a tunable bandpass filter. The transmission line has an input port, an output port and a length electrically connecting the input port to the output port and receiving an RF signal at the input port. The tunable bandstop filter comprises a first direct current voltage source, a first coupling line and a first tunable capacitor. The first direct current voltage source provides a first adjustable voltage to the first tunable capacitor. The first tunable capacitor adjusts its capacitance based on the first adjustable voltage. The tunable bandpass filter comprises a second direct current voltage source, a second coupling line and a second tunable capacitor. The second direct current voltage source provides a second adjustable voltage to second tunable capacitor. The second tunable capacitor adjusts its capacitance based on the second adjustable voltage.
US10522883B2 Recycling electrochemical cells and batteries
Methods for separating and recycling battery and electrochemical cell materials are disclosed.
US10522882B2 Semiconductor device, battery pack, and mobile terminal with multi-speed CPU
A semiconductor device includes a voltage measurement unit that measures an output voltage of a battery, a current measurement unit that measures a discharge current of the battery; and a controller that determines, in a first measurement mode, whether to employ a first discharge current as a power calculation current based on a difference between the first and a second discharge current, the second discharge current being the discharge current measured by the current measurement unit before the first discharge current is measured, in which the controller estimates an internal resistance of the battery based on the power calculation current and the output voltage measured in the first measurement mode and the discharge current and the output voltage measured in a second measurement mode, and calculates, based on the internal resistance that is estimated, a maximum power amount that can be output by the battery in the second measurement mode.
US10522880B2 Method of detecting metallic lithium present on an electrode
A method of detecting metallic lithium present on an electrode of a lithium ion secondary battery includes depositing a lithium-reactive solution including an oxidized fluorescent dye onto the electrode to form a coated electrode. Concurrent to depositing, the method includes reducing the oxidized fluorescent dye to form a reduced dye and a plurality of lithium ions. The method further includes, after reducing, drying the coated electrode to again form the oxidized fluorescent dye. After drying, the method includes exposing the oxidized fluorescent dye to ultraviolet radiation having a wavelength of from 100 nm to 500 nm to thereby illuminate and detect the metallic lithium. A lithium ion secondary battery system is also disclosed.
US10522878B2 Method and device for increasing the safety during the use of battery systems
The invention relates to a method for operating a battery system (EB), preferably a lithium-ion battery system, containing at least one battery device, wherein in the case that a safe state of the at least one battery device is brought about from an irregular operating state of the at least one battery device, a current state of the at least one battery device is continuously checked and evaluated by means of at least one component (CSC) of the battery system and the bringing about of the safe state is performed in dependence on the current state of the at least one battery device or an environmental state of the at least one battery device, wherein in particular after the safe state of the at least one battery device has been brought about, hazard information is transmitted to a battery management system (BMS) by means of the at least one component (CSC) of the battery system (EB), wherein the hazard information in particular is hazard information about the current state of the at least one battery device and/or about the environmental state of the at least one battery device and/or about the fact that the safe state of the at least one battery device is present.
US10522870B2 Asymmetric battery having a semi-solid cathode and high energy density anode
Embodiments described herein relate generally to devices, systems and methods of producing high energy density batteries having a semi-solid cathode that is thicker than the anode. An electrochemical cell can include a positive electrode current collector, a negative electrode current collector and an ion-permeable membrane disposed between the positive electrode current collector and the negative electrode current collector. The ion-permeable membrane is spaced a first distance from the positive electrode current collector and at least partially defines a positive electroactive zone. The ion-permeable membrane is spaced a second distance from the negative electrode current collector and at least partially defines a negative electroactive zone. The second distance is less than the first distance. A semi-solid cathode that includes a suspension of an active material and a conductive material in a non-aqueous liquid electrolyte is disposed in the positive electroactive zone, and an anode is disposed in the negative electroactive zone.
US10522867B2 End plate for a fuel cell
An end plate includes a plate body, fastening portions, and ribs. The plate body is rectangular and includes two long sides and two short sides. The plate body is arranged on an end of a cell stack of a fuel cell. The fastening portions are fastened to a case containing the cell stack. The fastening portions extend along edges of the plate body. The ribs are arranged in a grid-like manner on the plate body surrounded by the fastening portions. The ribs are arranged so that recesses defined between the ribs each have a quadrilateral shape in which two diagonals have different lengths. The ribs are arranged so that the recesses extend in a direction in which the ribs extend and so that a longer one of the two diagonals of each of the recesses extends parallel to the short sides of the plate body.
US10522864B1 Ambient reactants fuel cells, methods, and systems
Devices powered by fuel cells can be operated for extended durations when the fuel cells are adapted to extract the necessary reactants for generating power from the surrounding environment and when the concentration of reactants in that environment is maintained at a sufficient level by interaction between the environment and a reactant-enriched atmosphere.
US10522862B2 Thermo-electrochemical converter
A thermo-electro-chemical converter direct heat to electricity engine has a monolithic co-sintered ceramic structure or a monolithic fused polymer structure that contains a working fluid within a continuous closed flow loop. The co-sintered ceramic or fused polymer structure includes a conduit system containing a heat exchanger, a first high density electrochemical cell stack, and a second high density electrochemical cell stack.
US10522859B2 Dynamic low-power control of cell voltage in a fuel cell stack during low-power operating modes
A fuel cell system includes a fuel cell stack and a controller. The fuel cell stack includes a catalyst and a stack voltage. The controller increases efficiency of the fuel cell stack by minimizing or removing an accumulation of oxides on the catalyst during a low-power operating mode of the fuel cell system. The controller executes a method for dynamically controlling the stack voltage during a detected low-power operating mode. The method includes commanding low-voltage/high-power pulses to the fuel cell stack via the controller at a magnitude and frequency sufficient for minimizing or removing the oxides. The system may include a direct current-direct current (DC-DC) boost converter, with the controller programmed to command the power pulses from the DC-DC boost converter. Or, the controller may be configured to command the power pulses by controlling a feed rate of the oxygen and/or the hydrogen.
US10522858B2 Power control apparatus, fuel cell system, and method of calculating amount of used fuel gas
A power control apparatus includes a controller configured to control a fuel cell. The fuel cell generates power and heats water using fuel gas. The fuel gas supplies the power and hot water to a plurality of consumer facilities. The controller obtains an amount of the fuel gas used by the fuel cell. The controller obtains an amount of the hot water supplied to the plurality of consumer facilities. The controller calculates, based on the amount of the fuel gas and the amount of the hot water, an amount of the fuel gas used by each one of the plurality of consumer facilities.
US10522854B2 Digital twin based management system and method and digital twin based fuel cell management system and method
Digital twin based management system and method are disclosed. The management system includes a commissioning digital twin, a commissioning controller, an operational digital twin and an operational controller. The commissioning digital twin corresponds to a physical system and is updated based on commissioning input and output data during commissioning of the physical system. The commissioning controller is initialized based on the commissioning digital twin, and is configured to manage and control the physical system during the commissioning. The operational digital twin is generated based on the commissioning digital twin and is adapted based on operational input and output data during operation of the physical system. The operational controller is initialized by the commissioning controller and adapted based on the operational digital twin and is configured to manage and control the physical system during the operation. Digital twin based fuel cell management system and method are also disclosed.
US10522846B2 Fuel cell end plate with resin layer and protrusion
A fuel cell stack 100 includes a fuel cell stack 10, and an end plate 30 placed at an end of the fuel cell stack 10. The end plate 30 includes a metallic plate-like body 32, and a resin layer 60 formed on a surface 32b of the plate-like body 32. The plate-like body 32 includes flow holes 39 for a reactant gas and a cooling medium, and a stripe-shaped protrusion 38 protruding from the surface 32b and which divides the surface 32b into an inner area containing the flow holes 39 and an outer area outside the inner area. The protrusion 38 includes a vertical portion 38a protruding from the surface 32b, and a jutted portion 38b jutted from a distal end of the vertical portion 38a toward the inner area. The resin layer 60 is formed in the inner area to cover a surface 38as of the vertical portion 38a facing the inner area as well as at least part of the jutted portion 38b.
US10522837B2 Lead-acid battery
A lead-acid battery includes a separator retaining an electrolyte solution, a positive electrode plate, a negative electrode plate, and a container. A negative electrode material contains bisphenols condensate, and a theoretical capacity ratio of the negative electrode material to a positive electrode material is 0.85 or more and 1.2 or less.
US10522836B2 Carbon-lead blends for use in hybrid energy storage devices
The present application is directed to blends comprising a plurality of carbon particles and a plurality of lead particles. The blends find utility in any number of electrical devices, for example, in lead acid batteries. Methods for making and using the blends are also disclosed.
US10522829B2 Method for manufacturing positive electrode for lithium ion secondary battery and positive electrode for lithium ion secondary battery
A method for manufacturing a positive electrode for a lithium ion secondary battery includes preparing lithium manganese complex oxide particles, preparing coated particles by forming a coating including a Li+-conductive oxide on a surface of each lithium manganese complex oxide particle, introducing fluorine into at least a part of the coated particles, preparing a fluid composition by mixing the coated particles at least a part of which fluorine is introduced into, a conductive material, an aqueous binder, and an aqueous solvent, forming a positive electrode mixture layer by disposing the fluid composition on a surface of a collector, and drying the positive electrode mixture layer. The thickness of the coating is 5 nm or more and 10 nm or less. Fluorine is introduced such that the ratio of fluorine to manganese in terms of the number of atoms in the coated particles reaches 1.95 or more and 3.1 or less.
US10522826B2 Manganese oxide nano-rods in the form of a core-shell, a method for producing the same, and an active material for a secondary battery comprising the same
The present disclosure relates to manganese oxide nano-rods in the form of a core-shell, in which the manganese oxide nano-rods are formed in a core-shell structure, the core and the shell each include MnxOy, when x of MnxOy of the core is 1 and y is 2, x of MnxOy of the shell is 2 and y is 3, and when x of MnxOy of the core is 2 and y is 3, x of MnxOy of the shell is 1 and y is 2. According to the present disclosure, in the secondary battery using the manganese oxide, the elution of manganese is inhibited and the structural stability of an active material is increased, thereby increasing the capacity and the cycle life at a high temperature.
US10522825B2 Cathode active material and cathode comprising metal nano particles, and lithium-sulfur battery comprising same
The present disclosure relates to a positive electrode active material and a positive electrode comprising metal nano particles, and a lithium-sulfur battery comprising the same, and in particular, to a positive electrode for a lithium-sulfur battery comprising a positive electrode active material of a sulfur-metal catalyst-carbon composite, and a lithium-sulfur battery comprising the same. The lithium-sulfur battery using a positive electrode comprising metal nano particles according to the present disclosure increases reactivity of sulfur, a positive electrode active material, and increases electrical conductivity of an electrode by the dispersion of the metal nano particles in the electrode so as to increase reactivity and electric capacity of the positive electrode. In addition, battery reaction products such as lithium sulfide (Li2S) are readily decomposed by a catalyst reaction, and therefore, lifespan characteristics can be improved.
US10522816B2 Lithium secondary battery
A lithium secondary battery of the present invention has a positive electrode is provided with a positive electrode mix layer that includes a positive electrode active material and a conductive material. The positive electrode mix layer has two peaks, large and small, of differential pore volume over a pore size ranging from 0.01 μm to 10 μm in a pore distribution curve measured by a mercury porosimeter. A pore size of the smaller peak B of the differential pore volume is smaller than a pore size of the larger peak A of the differential pore volume.
US10522814B2 Battery explosion prevention apparatus, battery pack, and method for operating the same
Provided are a battery explosion prevention apparatus including a battery holder which is installed and fixed to a circumference of a battery module constituted by a plurality of secondary battery cells and on which at least one or more electromagnets are disposed on a lower portion thereof at a predetermined interval and a movable frame which has an opened one side to provide an insertion space into which the battery module is inserted and on which a plurality of punching needles are disposed on a bottom surface of the insertion space, and a battery pack including the battery module.
US10522809B2 Adhesive layer, layer, and composition
An adhesive layer disposed between a separator for a secondary battery and an electrode for a secondary battery, wherein the adhesive layer is obtained by bonding under pressure a layer containing a resin having a structural unit derived from an α-olefin having 2 to 4 carbon atoms, and an occupancy area of the resin in the adhesive layer is 10 to 80%.
US10522803B2 Battery pack including coupling member having assembling guide function
A battery pack that includes a plurality of battery modules arranged adjacent to each other and mounted on a base plate, the base plate including a module receiving part on which the battery modules are mounted, and a cooling assembly that is disposed between the base plate and bottom portions of the battery modules and through which a refrigerant flows so as to cool the battery modules. In order to couple the battery modules to the base plate, bolt fastening grooves are drilled in the height direction of the battery module at respective corners on the horizontal surface of the battery module, and welding nuts are inserted through openings and fitted to the base plate at positions corresponding to the bolt fastening grooves.
US10522799B2 Cell pack and container provided with same
A battery pack that reduces a temperature difference between single cells and can increase a battery capacity per volume and a container provided with the same are provided. A battery pack 100, includes: a battery module 10 including a plurality of single cells 1 arranged in parallel in a line; and a partition member 20 provided on a side surface of the battery module 10 and forming a flow channel 21 through which a gas for exchanging heat with the plurality of single cells 1 is flowable, and the partition member 20 is provided so that the gas flowing through the flow channel 21 and at least two single cells 1 exchange heat and is inclined with respect to a direction orthogonal to an arrangement direction of the plurality of single cells 1 arranged in parallel in a line.
US10522796B2 Battery with front face and rear face contacts
A battery structure has structure anode and cathode contacts on a front face and on a rear face. The battery structure includes a battery having battery anode and cathode contacts only on a front face thereof. A film including a conductive layer and an insulating layer jackets the battery. The conductive layer extends over the battery anode and cathode contacts and is interrupted therebetween. Openings are provided in the insulating layer on the front and rear faces of the battery structure to form the structure anode and cathode contacts of the battery structure.
US10522794B2 Method of active alignment for direct patterning high resolution micro-display
A method of active alignment of a shadow mask to a substrate includes a first alignment by moving the shadow mask and the substrate a first distance in a vertical direction, capturing a first alignment image, determining at least one of a first correction distance and a first rotational correction angle, and aligning the shadow mask and the substrate by moving the first correction distance and rotating the first rotational correction angle. The method further includes performing a first material deposition process on the substrate and continuously capturing a first series of alignment images during the generation of the first material deposition flow. During the generation of the first material deposition flow the first series of alignment images are analyzed to determine a second correction distance and a second rotational correction angle and determining whether second distance and/or rotational correction angle is greater than or equal to a predetermined value to cause a second alignment process to occur.
US10522788B2 Organic light emitting diode
The present specification discloses an organic electroluminescent device including: an anode; a cathode; a light emitting layer provided between the anode and the cathode; and a light scattering layer provided between the light emitting layer and the cathode.
US10522784B2 Method for producing organic electroluminescent device and film deposition apparatus
A method for producing an organic EL device in this disclosure includes the steps of providing an element substrate including a substrate and a plurality of organic EL devices arranged on the substrate; and forming a thin film encapsulation structure over the element substrate. The step of forming the thin film encapsulation structure includes the steps of forming a first inorganic barrier layer over the element substrate; condensing a photocurable resin on the first inorganic barrier layer; irradiating a plurality of selected regions of the photocurable resin with a laser beam to cure at least a part of the photocurable resin, thus to form a photocurable resin layer; removing an uncured part of the photocurable resin; and forming a second inorganic barrier layer, covering the photocurable resin layer, on the first inorganic barrier layer.
US10522778B2 Organic light-emitting diode including an electronic transport layer comprising a three component blend of a matrix compound and two lithium compounds
The present invention relates to an organic light-emitting diode (100) comprising an emission layer (150) and at least one electron transport layer (161), wherein the at least one electron transport layer (161) comprises at least one matrix compound and at least two lithium compounds.
US10522774B2 Solar cell comprising an oxide-nanoparticle buffer layer and method of fabrication
A buffer layer for protecting an organic layer during high-energy deposition of an electrically conductive layer is disclosed. Buffer layers in accordance with the present invention are particularly well suited for use in perovskite-based single-junction solar cells and double-junction solar cell structures that include at least one perovskite-based absorbing layer. In some embodiments, the buffer layer comprises a layer of oxide-based nanoparticles that is formed using solution-state processing, in which a solution comprising the nanoparticles and a volatile solvent is spin coated onto a structure that includes the organic layer. The solvent is subsequently removed in a low-temperature process that does not degrade the organic layer.
US10522772B2 Photoelectric conversion element and solid-state imaging apparatus
A photoelectric conversion element according to an embodiment of the present disclosure includes a first electrode and a second electrode opposed to each other; and a photoelectric conversion layer provided between the first electrode and the second electrode, and including a first organic semiconductor material and a second semiconductor material that have mutually different mother skeletons, in which the first organic semiconductor material is fullerene or a fullerene derivative, and the second organic semiconductor material has a deeper HOMO level than the first organic semiconductor material.
US10522768B2 Use of transition metal carbene complexes in organic light-emitting diodes (OLEDs)
The present invention relates to the use of transition metal-carbene complexes in organic light-emitting diodes (OLEDs), to a light-emitting layer, to a blocking layer for electrons or excitons, or to a blocking layer for holes, each comprising these transition metal-carbene complexes, to OLEDs comprising these transition metal-carbene complexes, to devices which comprise an inventive OLED, and to transition metal-carbene complexes.
US10522767B2 4-oxoquinoline compounds
Provided is a 4-oxoquinoline compounds of the formula (I) (I) wherein A is selected from diradicals of the formulae (A.1), (A.2), (A.3), (A.4), (A.5) and (A.6), (A.1) (A.2) (A.3) (A.4) (A.5) (A.6) wherein R1, R2a, R2b, R3, R3a, if present R4a, R4b, R 5a, R5b, R6a, R6b, R6c, R6d, Rn1, Rn2, Rn3, Rn4, Rm5, Rm6, Rm7, Rm8, R7, R8a, R9 and R9a are as defined in the claims and in the description. Also provided is a method for their preparation and their use.
US10522764B2 Compound, light-emitting element comprising same and electronic device comprising the light-emitting element
The present invention relates to a compound, and a light-emitting element and an electronic device including the same, and, more particularly, to a compound for an organic light-emitting element, and a light-emitting element and an electronic device including the same. The compound according to the present invention can improve hole injection and/or transport abilities.
US10522761B2 Compound for organic optoelectronic device, organic light emitting diode including the same and display including the organic light emitting diode
Provided are a compound for an organic optoelectronic device represented by Chemical Formula 1, an organic light emitting diode including the same, and a display device including the organic light emitting diode. The structure of Chemical Formula 1 is shown in the specification.The compound for an organic optoelectronic device provides an organic light emitting diode having life-span characteristics due to excellent electrochemical and thermal stability, and having high luminous efficiency at a low driving voltage.
US10522759B2 Method for manufacturing a display unit
A method for manufacturing a display unit is provided, and the method includes forming a first insulating film, forming a plurality of first electrodes on the first insulating film, forming a second insulating film on the first electrodes, forming a plurality of openings corresponding to the first electrodes, forming a plurality of organic layers formed in a shape of a stripe having notch parts, forming a second electrode on the organic layer having the notch parts is formed, and forming a protective film on the second electrode.
US10522758B2 Ink for forming functional layer, method of manufacturing ink for forming functional layer, and method of manufacturing organic electro-luminescence element
An ink for forming a functional layer, which is used when any thin film layer among functional layers consisting of a plurality of thin film layers is formed, includes a functional layer forming material and a solvent for dissolving the functional layer forming material, and in which the number of particles of 0.5 μm or more is 7 or less in 10 ml of the ink for forming a functional layer.
US10522757B2 Dual resistive-material regions for phase change memory devices
In various examples, dual resistive-material regions for a phase change material region are fabricated by initially forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, in certain embodiments, the portion of the resistive material proximate to the phase change material region may be used as a heater because of a relatively, high resistance value of the resistive material, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.
US10522749B2 Combined physical and chemical etch to reduce magnetic tunnel junction (MTJ) sidewall damage
A process flow for forming magnetic tunnel junction (MTJ) nanopillars with minimal sidewall residue and minimal sidewall damage is disclosed wherein a pattern is first formed in a hard mask that is an uppermost MTJ layer. Thereafter, the hard mask sidewall is etch transferred through the remaining MTJ layers including a reference layer, free layer, and tunnel barrier between the free layer and reference layer. The etch transfer may be completed in a single RIE step that features a physical component involving inert gas ions or plasma, and a chemical component comprised of ions or plasma generated from one or more of methanol, ethanol, ammonia, and CO. In other embodiments, a chemical treatment with one of the aforementioned chemicals, and a volatilization at 50° C. to 450° C. may follow an etch transfer through the MTJ stack with an ion beam etch or plasma etch involving inert gas ions.
US10522739B2 Perpendicular magnetic memory with reduced switching current
An embodiment includes an apparatus comprising: a substrate; and a perpendicular magnetic tunnel junction (pMTJ) comprising a fixed layer and first and second free layers; wherein (a) the first free layer includes Cobalt (Co), Iron (Fe), and Boron (B), and (b) the second free layer is epitaxial and includes Manganese (Mn) and Gallium (Ga). Other embodiments are described herein.
US10522738B2 Semiconductor memory with a multi-layer passivation layer formed over sidewalls of a variable resistance element
An electronic device includes a semiconductor memory, wherein the semiconductor memory includes a variable resistance element formed over a substrate, and a multi-layer passivation layer positioned over sidewalls of the variable resistance element and having two or more insulating layers formed over the sidewalls of the variable resistance element.
US10522734B2 Device using a piezoelectric element and method for manufacturing the same
An inkjet printing head includes a piezoelectric element having a lower electrode, a piezoelectric film formed above the lower electrode, and an upper electrode formed above the piezoelectric film, a hydrogen barrier film covering an entirety of a side surface of the upper electrode and the piezoelectric film, and an interlayer insulating film that has an opening at an upper surface center of the upper electrode, is laminated on the hydrogen barrier film, and faces the entirety of the side surface of the upper electrode and the piezoelectric film across the hydrogen barrier film.
US10522732B2 Thermoelectric polymer aerogels and methods of fabrication thereof
This disclosure provides systems, methods, and apparatus related to thermoelectric polymer aerogels. In one aspect, a method includes depositing a solution on a substrate. The solution comprises a thermoelectric polymer. Solvent of the solution is removed to form a layer of the thermoelectric polymer. The layer is placed in a polar solvent to form a gel comprising the thermoelectric polymer. The gel is cooled to freeze the polar solvent. The gel is placed in a vacuum environment to sublimate the polar solvent from the gel to form an aerogel comprising the thermoelectric polymer.
US10522731B2 Method of manufacturing light emitting device and light emitting device
A method of manufacturing a light emitting device includes providing molded packages each of which has a recess. A light emitting component is mounted on a bottom surface of the recess. At least one sealing member covering the light emitting component is formed within the recess. A lead frame including a first lead and a second lead is provided, the first lead having a first groove on an upper surface of the first lead the second lead having a second groove on an upper surface of the second lead. Spaces are formed, each of the spaces being surrounded with an upper metal mold, a lower metal mold, and the lead frame by cooperatively holding the lead frame with the upper metal mold and the lower metal mold. The spaces and the first groove and the second groove are filled with a resin.
US10522729B2 Light emitting device
A light emitting device includes a substrate, a light emitting element, and a light reflecting member. The substrate includes a base material having a rectangular planar shape, a connection terminal disposed on a first main surface of the base material, and an outer connection portion disposed on a second main surface of the base material opposite to the first main surface. The connection terminal includes a protruding portion, and the connection terminal is connected to the outer connection portion via a through hole defined in the base material. The light emitting element is connected to the connection terminal on the first main surface of the base material via a molten bonding material. The light reflecting member covers the light emitting element.
US10522726B2 Display device
A display device includes a display and at least one light source. The display displays image. The at least one light source emits light to the display. The at least one light source includes a semiconductor element with a substrate, a translucent sealing resin that covers the semiconductor element, and a reflective layer that is disposed on an upper face of the sealing resin.
US10522724B2 LED packaging material and manufacturing method of the same
A light-emitting diode (LED) packaging material is formed by compounding graphene with silane or epoxy resin, to improve the defects of manufacturing an LED packaging material only of silane or epoxy resin. The addition of graphene helps improve the performance of the LED packaging material. Also provided is a manufacturing method of a LED packaging material.
US10522722B2 Light-emitting diode package with light-altering material
Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly packaged LEDs with light-altering materials are disclosed. A light-altering material is provided in particular configurations within an LED package to redirect light from an LED chip within the LED package and contribute to a desired emission pattern of the LED package. The light-altering material may also block light from the LED chip from escaping in a non-desirable direction, such as large or wide angle emissions. The light-altering material may be arranged on a lumiphoric material adjacent to the LED chip in various configurations. The LED package may include an encapsulant on the light-altering material and the lumiphoric material.
US10522719B2 Color-filter device
A micro-transfer color-filter device comprises a color filter, an electrical conductor disposed in contact with the color filter, and at least a portion of a color-filter tether attached to the color filter or structures formed in contact with the color filter. In certain embodiments, a color filter is a variable color filter electrically controlled through one or more electrodes and can be responsive to heat, electrical current, or an electrical field to modify its optical properties, such as color, transparency, absorption, or reflection. In certain embodiments, A color-filter device includes connection posts and can be provided in or on a source wafer suitable for micro-transfer printing. In some embodiments, a color-filter device is disposed on a device substrate and can include a control circuit for controlling the color filter. An array of micro-transfer color-filter devices can be disposed on a display substrate in order to form a display.
US10522714B2 Device with inverted large scale light extraction structures
An interface including roughness components for improving the propagation of radiation through the interface is provided. The interface includes a first profiled surface of a first layer comprising a set of large roughness components providing a first variation of the first profiled surface having a first characteristic scale and a second profiled surface of a second layer comprising a set of small roughness components providing a second variation of the second profiled surface having a second characteristic scale. The first characteristic scale is approximately an order of magnitude larger than the second characteristic scale. The surfaces can be bonded together using a bonding material, and a filler material also can be present in the interface.
US10522713B2 Light-emitting diode
A light-emitting diode includes an epitaxial-laminated layer, including an n-type ohmic contact layer; a first n-type transition layer; a second n-type transition layer; an n-type confinement layer; an active layer; a p-type confinement layer; a p-type window layer; a first electrode over an upper surface of the epitaxial-laminated layer; and a conductive substrate located over a bottom surface of the epitaxial-laminated layer.
US10522710B2 Printable inorganic semiconductor structures
The present invention provides structures and methods that enable the construction of micro-LED chiplets formed on a sapphire substrate that can be micro-transfer printed. Such printed structures enable low-cost, high-performance arrays of electrically connected micro-LEDs useful, for example, in display systems. Furthermore, in an embodiment, the electrical contacts for printed LEDs are electrically interconnected in a single set of process steps. In certain embodiments, formation of the printable micro devices begins while the semiconductor structure remains on a substrate. After partially forming the printable micro devices, a handle substrate is attached to the system opposite the substrate such that the system is secured to the handle substrate. The substrate may then be removed and formation of the semiconductor structures is completed. Upon completion, the printable micro devices may be micro transfer printed to a destination substrate.
US10522709B1 Method of direct wafer mapping by determining operational LEDs from non-operational LEDs using photo-reactive elastomer deposition
LEDs are manufactured on a substrate layer and picked and placed using a pick-up tool (PUT) onto a target substrate. The PUT typically attaches to an LED via an elastomer layer deposited on a surface of the LED. A given batch of manufactured LEDs may contain operational LEDs as well as non-operational LEDs. In order to separate the operational and non-operational LEDs, the LEDs are placed on a unidirectional conductive film. A photo-curable polymer is deposited on a surface of each LED. A voltage difference is applied across the electrodes of each LED via the unidirectional conductive film, causing the operational LEDs to emit light and cure the photo-curable polymer to form an elastomer layer, while the polymer deposited on the non-operational LEDs will not cure. As such, the PUT will be able to pick up the operational LEDs, while being unable to pick up the non-operational LEDs.
US10522707B2 Tiled solar cell laser process
In an example, the present invention provides a method of separating a photovoltaic strip from a solar cell. The method includes providing a solar cell, placing the front side of the solar cell on a platen such that the backside is facing a laser source, initiating a laser source to output a laser beam having a wavelength from 200 to 600 nanometers and a spot size of 18 to 30 microns, subjecting a portion of the backside to the laser beam at a power level ranging from about 20 Watts to about 35 Watts to cause an ablation to form a scribe region having a depth, width, and a length, the depth being from 40% to 60% of a thickness of the solar cell, the width being between 16 and 35 microns to create a plurality of scribe regions spatially disposed on the backside of the solar cell.
US10522705B2 Solar cell and solar cell module
In one or more embodiments, a solar cell may include: a silicon substrate, which is crystalline; a p-doped silicon oxide layer, which may be disposed on a first principal surface of the silicon substrate and may include phosphorus as an impurity; and an amorphous silicon layer, which may be disposed on the p-doped silicon oxide layer.
US10522701B2 Solar power panel factory and process for manufacturing frame-less encapsulated photo-voltaic (PV) solar power panels by encapsulating solar cell modules within optically-transparent epoxy-resin material coating phenolic resin support sheets
A solar panel factory system and process for manufacturing a frame-less epoxy-resin encapsulated solar panel by encapsulating solar cell modules within optically-transparent epoxy-resin material coating phenolic resin support sheets. During solar panel manufacture, an optically transparent epoxy-resin coating is applied over an array of photo-voltaic (PV) solar cell modules mounted on a sheet of phenolic resin, and supported in a layer of adhesive coating is applied as a liquid with a viscosity and a thickness such that the thickness of the layer of adhesive coating is substantially equal to the thickness of the PV solar cell modules, and cured to a sufficient hardness. The epoxy-resin coating applied over the array of PV solar cell modules, and the cured layer of adhesive coating, reinforce the strength of the sheet of phenolic resin, particularly around the perimeter of the sheet of phenolic resin.
US10522698B2 Method for manufacturing solar cell having selective emitter and solar cell manufactured thereby
The present invention relates to a method for manufacturing a solar cell comprising a selective emitter, the method comprising the steps of: forming an electrode pattern and an alignment mark by performing a first impurity doping locally on one surface of a substrate; and performing a second impurity doping on the entire surface of the first doped substrate, wherein, as a result of the first and second doping, the alignment mark is formed on a first emitter or a second emitter, and the electrode pattern is formed on the second emitter. When manufacturing the selective emitter, the alignment mark is formed by doping processes. The use of the alignment mark may increase the matching of the electrode pattern formed in the selective emitter and the resulting electrode line. Further, a solar cell having the selective emitter has excellent conversion efficiency and a high fill factor value.
US10522697B2 Composition for forming electrode, electrode manufactured using the same and solar cell
A composition for forming an electrode for a solar cell includes a conductive powder, a glass frit, and an organic vehicle, the organic vehicle including a thickener including a structural unit represented by Chemical Formula 1,
US10522695B2 Inorganic multilayer stack and methods and compositions relating thereto
A multilayer stack is described. The multilayer stack includes: (i) one or more inorganic barrier layers for reducing transport of gas or vapor molecules therethrough; (ii) an inorganic reactive layer disposed adjacent to one or more of the inorganic barrier layers, and the reactive layer capable of reacting with the gas or the vapor molecules; and (iii) wherein, in an operational state of the multilayer stack, the vapor or the gas molecules that diffuse through one or more of the inorganic barrier layers react with the inorganic reactive layer, and thereby allow said multilayer stack to be substantially impervious to the gas or the vapor molecules.
US10522694B2 Methods of manufacturing semiconductor device
A semiconductor device includes channel layers disposed over a substrate, a source/drain region disposed over the substrate, a gate dielectric layer disposed on and wrapping each of the channel layers, and a gate electrode layer disposed on the gate dielectric layer and wrapping each of the channel layers. Each of the channel layers includes a semiconductor wire made of a core region, and one or more shell regions. The core region has an approximately square-shape cross section and a first shell of the one or more shells forms a first shell region of an approximately rhombus-shape cross section around the core region and is connected to an adjacent first shell region corresponding to a neighboring semiconductor wire.
US10522685B2 Semiconductor device and method for manufacturing the same
The present disclosure teaches semiconductor devices and methods for manufacturing the same. Implementations of the semiconductor device may include: a semiconductor substrate; a semiconductor fin positioned on the semiconductor substrate; and a gate structure positioned on the semiconductor fin, where the gate structure includes a gate dielectric layer on a part of a surface of the semiconductor fin and a gate on the gate dielectric layer; where the gate includes a metal gate layer on the gate dielectric layer and a semiconductor layer on a side surface of at least one side of the metal gate layer; and where the semiconductor layer includes a dopant, where a conductivity type of the dopant is the opposite of a conductivity type of the semiconductor fin. The present disclosure can improve a work function of the device, thereby improving a current characteristic of the device during a working process, reducing the short channel effect (SCE), and lowering a leakage current.
US10522683B2 Transistors with ballistic or quasi-ballistic carrier behavior and low resistance in source and drain nodes
An embodiment includes an apparatus comprising: a transistor including an epitaxial source, a channel, and an epitaxial drain; a fin that includes the channel, the channel including a long axis and a short axis; a source contact corresponding to the source; and a drain contact corresponding to the drain; wherein (a) an additional axis intersects each of the source contact, the source, the drain, and the drain contact, and (b) the additional axis is parallel to the long axis. Other embodiments are described herein.
US10522682B2 Semiconductor device
A semiconductor device is provided. The semiconductor device includes a fin type pattern, a field insulating film on a part of a sidewall of the fin-type pattern, and a gate electrode intersecting with the fin-type pattern, on the fin-type pattern and the field insulating film. The gate electrode on the field insulating film includes a first portion, a second portion, and a third portion on the field insulating film. A first width of the first portion increases as a first distance from the field insulating film, increases width of the second portion decreases as a second distance from the field insulating film increases, and a third width of the third portion increases or is substantially constant as a third distance from the field insulating film increases.
US10522680B2 Finfet semiconductor device structure with capped source drain structures
A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a first fin structure over the base. The semiconductor device structure includes an isolation layer over the base. The first fin structure is partially in the isolation layer. The semiconductor device structure includes a first gate structure over and across the first fin structure. The semiconductor device structure includes a first source structure and a first drain structure on the first fin structure and on two opposite sides of the first gate structure. The first source structure and the first drain structure are made of an N-type conductivity material. The semiconductor device structure includes a cap layer covering the first source structure and the first drain structure. The cap layer is doped with a Group IIIA element.
US10522679B2 Selective shallow trench isolation (STI) fill for stress engineering in semiconductor structures
The present disclosure relates to semiconductor structures and, more particularly, to selective shallow trench isolation (STI) fill material for stress engineering in semiconductor structures and methods of manufacture. The structure includes a single diffusion break (SDB) region having at least one shallow trench isolation (STI) region with a stress fill material within a recess of the at least one STI region. The stress fill material imparts a stress on a gate structure adjacent to the at least one STI region.
US10522674B2 Semiconductor with unified transistor structure and voltage regulator diode
A semiconductor device includes a semiconductor layer that has a transistor structure including a p type source region, a p type drain region, an n type body region between the p type source region and the p type drain region, and a gate electrode facing the n type body region and a voltage-regulator diode that is disposed at the semiconductor layer and that has an n type portion connected to the p type source region and a p type portion connected to the gate electrode, in which the transistor structure and the voltage-regulator diode are unified into a single-chip configuration.
US10522667B2 Silicon carbide epitaxial wafer, silicon carbide insulated gate bipolar transistor, and method of manufacturing the same
The SiC-IGBT includes a p-type collector layer, an n−-type voltage-blocking-layer provided on the collector layer, p-type base regions provided on the n−-type voltage-blocking-layer, n+-type emitter regions provided in an upper portion of the p-type base region, a gate insulating film provided in an upper portion of the voltage-blocking-layer, and a gate electrode provided on the gate insulating film. The p-type buffer layer has thickness of five micrometers or more and 20 micrometers or less and is doped with Al at impurity concentration of 5×1017 cm−3 or more and 5×1018 cm−3 or less and doped with B at impurity concentration of 2×1016 cm−3 or more and less than 5×1017 cm−3.
US10522666B2 Methods for fabricating anode shorted field stop insulated gate bipolar transistor
A method for fabricating an anode-shorted field stop insulated gate bipolar transistor (IGBT) comprises selectively forming first and second semiconductor implant regions of opposite conductivity types. A field stop layer of a second conductivity type can be grown onto or implanted into the substrate. An epitaxial layer can be grown on the substrate or on the field stop layer. One or more insulated gate bipolar transistors (IGBT) component cells are formed within the epitaxial layer.
US10522662B1 FinFET device with T-shaped fin and method for forming the same
A method of forming a semiconductor device structure is provided. The method includes forming a fin structure protruding from a substrate and forming a first liner layer to cover a top surface and a sidewall of the fin structure. The first liner layer is patterned by performing a wet etching process, so as to remain a portion of the first liner layer that covers the top surface of the fin structure and a portion of the sidewall of the fin structure. The remained portion of the first liner layer is used as an etch mask to remove a portion of the fin structure from the sidewall of the fin structure, so as to form a lateral recess in the fin structure.
US10522658B1 Vertical field effect transistor having improved uniformity
A semiconductor device structure and method for fabricating the same. The semiconductor device structure includes a semiconductor fin and a liner in contact with end portions of the semiconductor fin. A first source/drain contacts the liner and sidewalls of the semiconductor fin. A gate structure is in contact with and surrounds the semiconductor fin. A second source/drain is formed above the first source/drain. The method includes forming, on a substrate, at least one semiconductor fin having a first spacer in contact with an upper portion of the semiconductor fin, and a second spacer in contact with the first spacer and a lower portion of the semiconductor fin. The semiconductor fin is patterned into a plurality of semiconductor fins. A liner is formed on exposed end portions of each semiconductor fin of the plurality of semiconductor fins.
US10522648B2 Method for manufacturing electronic component for heterojunction provided with buried barrier layer
The invention relates to a process for manufacturing a heterojunction electronic component provided with an embedded barrier layer, the process comprising: depositing by epitaxy, in a vapour phase epitaxial growth chamber with an atmosphere exhibiting a first nonzero ammonia concentration, of a GaN precursor layer of the embedded barrier layer, comprising a first layer doped with a Mg or Fe dopant; placing, while maintaining the substrate in the chamber, the atmosphere at a second ammonia concentration at most equal to a third of the first concentration, in order to remove an upper part of the precursor layer; and then after the removal of the said upper part, while maintaining the substrate in the chamber, depositing by epitaxy of a layer of semiconductor material of the heterojunction electronic component to be manufactured, the said precursor layer then forming the embedded barrier layer under the said layer of semiconductor material.
US10522647B2 Sidewall passivation for HEMT devices
Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a first III/V semiconductor layer, and a second III/V semiconductor layer arranged over the first III/V semiconductor layer. Source and drain regions are arranged over the second III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.
US10522646B2 HEMT transistor of the normally off type including a trench containing a gate region and forming at least one step, and corresponding manufacturing method
A HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.
US10522641B2 Gate spacer and methods of forming
Methods and structures for forming devices, such as transistors, are discussed. A method embodiment includes forming a gate spacer along a sidewall of a gate stack on a substrate; passivating at least a portion of an exterior surface of the gate spacer; and epitaxially growing a material in the substrate proximate the gate spacer while the at least the portion of the exterior surface of the gate spacer remains passivated. The passivating can include using at least one of a thermal treatment, a plasma treatment, or a thermal treatment.
US10522639B2 Methods, apparatus and system for stringer defect reduction in a trench cut region of a finFET device
At least one method, apparatus and system disclosed herein involves forming trench in a gate region, wherein the trench having an oxide layer to a height to reduce or prevent process residue. A plurality of fins are formed on a semiconductor substrate. Over a first portion of the fins, an epitaxial (EPI) feature at a top portion of each fin of the first portion. Over a second portion of the fins, a gate region is formed. In a portion of the gate region, a trench is formed. A first oxide layer at a bottom region of the trench is formed. Prior to performing an amorphous-silicon (a-Si) deposition, a flowable oxide material is deposited into the trench for forming a second oxide layer. The second oxide layer comprises the flowable oxide and the first oxide layer. The second oxide layer has a first height.
US10522638B2 Semiconductor chip and power module, and manufacturing method of the same
A semiconductor chip includes a semiconductor substrate made of SiC, a front surface electrode formed in a principal surface of the semiconductor substrate, and a rear surface electrode (drain electrode) formed in a rear surface of the semiconductor substrate. The front surface electrode is bonded to a wire, and includes an Al alloy film containing a high melting-point metal. The Al alloy film contains a columnar Al crystal which extends along a thickness direction of the Al alloy film, and an intermetallic compound is precipitated therein.
US10522634B2 Finfet with self-aligned source/drain
A semiconductor device includes a fin structure, first and second gate structures, a source/drain region, a source/drain contact layer and a separation layer. The fin structure protrudes from an isolation insulating layer disposed over a substrate and extends in a first direction. The first and second gate structures are formed over the fin structure and extend in a second direction crossing the first direction. The source/drain region is disposed between the first and second gate structures. The interlayer insulating layer is disposed over the fin structure, the first and second gate structures and the source/drain region. The first source/drain contact layer is disposed on the first source/drain region. The separation layer is disposed adjacent to the first source/drain contact layer. Ends of the first and second gate structures and an end of the source drain contact layer are in contact with a same face of the separation layer.
US10522633B2 Methods and structures of novel contact feature
A method of fabricating a semiconductor device is disclosed. The method includes forming a fin structure on a substrate; forming a dummy gate over the fin structure; forming spacers on sides of the dummy gate; forming a doped region within the fin structure; replacing the dummy gate with a metal gate; replacing an upper portion of the metal gate with a first dielectric layer; forming a conductive layer directly on the doped region; replacing an upper portion of the conductive layer with a second dielectric layer; removing the first dielectric layer thereby exposing a sidewall of the spacer; removing an upper portion of the spacer to thereby expose a sidewall of the second dielectric layer; removing at least a portion of the second dielectric layer to form a trench; and forming a conductive plug in the trench.
US10522632B2 Semiconductor structure and fabrication method thereof
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes forming a gate structure and a dielectric layer on a substrate; and forming a sidewall spacer on a sidewall surface of the gate structure. The method also includes forming a source and drain doped region in the substrate on both sides of the gate structure. The dielectric layer covers a surface of the sidewall spacer. In addition, the method includes forming a source-drain plug in the dielectric layer. The source-drain plug is connected to the source and drain doped region. Moreover, the method includes forming an isolation opening in the dielectric layer by at least partially removing the sidewall spacer. Further, the method includes forming an isolation structure in the isolation opening, wherein the isolation structure has a dielectric constant less than the sidewall spacer.
US10522625B2 Multi-gate device and method of fabrication thereof
A semiconductor device includes a fin extending from a substrate. The fin has a source/drain region and a channel region. The channel region includes a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer and vertically separated from the first semiconductor layer by a spacing area. A high-k dielectric layer at least partially wraps around the first semiconductor layer and the second semiconductor layer. A metal layer is formed along opposing sidewalls of the high-k dielectric layer. The metal layer includes a first material. The spacing area is free of the first material.
US10522624B2 V-grooved vertical channel-type 3D semiconductor memory device and method for manufacturing the same
A method of fabricating a vertical channel 3D semiconductor memory device is disclosed. In one aspect, the method comprises providing a stack of alternating layers of conductive material and dielectric material on a major surface of substrate, providing in the stack at least one trench, having sloped sidewalls sloping towards the major surface, extending at least below the lowest layer of conductive material, forming, in order, a programmable material, a channel liner, and a filler material on the sidewalls of the trench. Thereby, the method forms a memory string, and an electrode to the channel liner at opposite ends of the memory string.
US10522622B2 Multi-gate semiconductor device and method for forming the same
A multi-gate semiconductor structure includes a plurality of nanowires, a gate structure disposed over the plurality of nanowires, and source/drain structures at two ends of each of the plurality of nanowires. The source/drain structures include a conductor, and a bottom surface of the conductor is lower than the plurality of nanowires.
US10522620B2 Semiconductor device having a varying length conductive portion between semiconductor regions
According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, and a conductive portion. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The gate electrode opposes, in a second direction with a gate insulating layer interposed, the third semiconductor region, the second semiconductor region, and the first semiconductor region. The second direction is perpendicular to a first direction from the second semiconductor region toward the third semiconductor region. The conductive portion includes first and second portions. The first and second portions are respectively arranged with the second and third semiconductor regions. A length of the first portion is longer than a length of the second portion.
US10522613B2 Manufacturing method of a resistance device having a fin
A resistance device includes a substrate, a fin on the substrate, a trench isolation structure formed around the fin. The resistance device further includes at least one first dummy gate structure on the fins, an inter-layer dielectric layer on the trench isolation structure, where the inter-layer dielectric layer covers the fin and the at least one first dummy gate structure. The resistance device further includes a resistance material layer on the inter-layer dielectric layer.
US10522611B2 Display device and method of manufacturing the same
A display device includes a substrate including a bending area, a display area. A plurality of first wires is disposed above the substrate. A second wire is disposed above the plurality of first wires. A third wire is disposed above the second wire. At least a portion of the second wire and at least a portion of the third wire are disposed in the bending area.
US10522607B2 OLED display panel and OLED display apparatus
An OLED display panel and an OLED display apparatus are provided. The OLED display panel includes an array substrate and a cathode plate disposed corresponding to the array substrate. Multiple cathode strips are disposed in parallel on the cathode plate. Each cathode strip is corresponding to a row of pixel regions of the array substrate and used as cathodes of light-emitting units in the row of pixel regions. Multiple cathode switching elements are disposed on the array substrate, a control terminal of each cathode switching element is electrically connected to one corresponding scan line, a first passage terminal of the cathode switching element is connected to a low voltage direct current power supply, and a second passage terminal of the cathode switching element is connected to one corresponding cathode strip. By the above means, the invention can reduce the cathode resistance.
US10522603B2 Organic light emitting display devices
An OLED device and a method of manufacturing the same, the OLED device including a substrate having a pixel area and a transmission area; a pixel circuit on the pixel area; a first electrode on the pixel area and being electrically connected to the pixel circuit; a first organic layer extending continuously on the pixel area and the transmission area and covering the first electrode; an emitting layer selectively on a portion of the first organic layer on the pixel area; a second organic layer extending continuously on the pixel and transmission areas and covering the emitting layer; and a third organic layer selectively on the transmission area, the third organic layer including a non-emitting material that has a different transmittance from that of the emitting layer; and a second electrode extending continuously on the pixel area and the transmission area and covering the second and third organic layers.
US10522599B2 Foldable, flexible display apparatus and method of manufacturing the same
A foldable, flexible display apparatus includes a flexible display panel which displays an image and includes a display side on which the image is displayed and of which portions thereof face each other in a folded state of the flexible display apparatus; a cover window on the display side of the flexible display panel and including: a window film comprising a transparent plastic film having a modulus of elasticity of about 6.3 gigapascals or more; and a coating layer on the window film, and configured to be transparent and to protect the window film from physical damage thereto; and an adhesive layer between the window film and the display side of the flexible display panel, and configured to have elasticity and bond the window film and the flexible display panel to each other.
US10522596B2 Semiconductor storage device comprising resistance change film and method of manufacturing the same
In one embodiment, a semiconductor storage device includes a first interconnect extending in a first direction, a plurality of second interconnects extending in a second direction different from the first direction, and a plurality of first insulators provided alternately with the second interconnects. The device further includes a resistance change film provided between the first interconnect and at least one of the second interconnects and including a first metal layer or a first semiconductor layer that includes a first face provided on a first interconnect side and a second face provided on a second interconnect side, at least any of the first face and the second face having a curved plane shape.
US10522595B2 Memory devices and methods of manufacturing the same
A semiconductor device includes: a first memory cell, a bit line and a second memory cell. The first memory cell has a first stack structure including a first memory layer between a first heater electrode and a first ovonic threshold switching device. The bit line is on the first memory cell. The second memory cell is on the bit line, and has a second stack structure including a second memory layer between a second ovonic threshold switching device and a second heater electrode. The first and second stack structures are symmetrical with respect to the bit line.
US10522593B2 Phase-change memory cell
Two phase-change memory cells are formed from a first conductive via, a second conductive and a central conductive via positioned between the first and second conductive vias where a layer of phase-change material is electrically connected to the first and second conductive vias by corresponding resistive elements and insulated from the central conductive via by an insulating layer. The conductive vias each include a lower portion made of a first metal (such as tungsten) and an upper portion made of a second metal (such as copper). Drains of two transistors are coupled to the first and second conductive vias while sources of those two transistors are coupled to the central conductive via.
US10522592B2 Tunnel magnetoresistive effect element, magnetic memory, and built-in memory
A TMR element includes a base layer that is disposed on an upper surface of a via interconnect part, a magnetic tunnel junction that is disposed on a surface of the base layer, and an interlayer insulation layer that covers a side surface of each of the via interconnect part and the base layer. The base layer includes a stress relieving region. The magnetic tunnel junction includes a reference layer having a magnetization fixed direction, a magnetization free layer, and a tunnel barrier layer disposed between the reference layer and the magnetization free layer. The interlayer insulation layer includes an insulation material.
US10522585B2 Method for manufacturing CMOS image sensor
A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.
US10522584B2 Display panel, manufacturing method thereof and display device
Provided are a display panel, a manufacturing method thereof and a display device. The display panel includes: a first substrate and a second substrate disposed opposite to each other, and a plurality of light-emitting units and a plurality of fingerprint identification units, disposed on one side of the first substrate facing to the second substrate. Each of the plurality of light-emitting units includes a first N-type semiconductor layer and a first P-type semiconductor layer, each of the plurality of fingerprint identification units includes a second N-type semiconductor layer and a second P-type semiconductor layer. The first N-type semiconductor layer and the second N-type semiconductor layer are disposed in a same layer, and the first P-type semiconductor layer and the second P-type semiconductor layer are disposed in a same layer.
US10522582B2 Imaging apparatus
The present technology relates to an imaging apparatus and a manufacturing method which enables sensitivity of an imaging apparatus using infrared rays to be improved. The imaging apparatus includes: a light-receiving element array in which a plurality of light-receiving elements including a compound semiconductor having light-receiving sensitivity in an infrared range are arrayed; a signal processing circuit that processes a signal from the light-receiving element; an upper electrode formed on a light-receiving surface side of the light-receiving element; and a lower electrode that is paired with the upper electrode, in which the light-receiving element array and the signal processing circuit are joined to each other with a film of a predetermined material, the upper electrode and the signal processing circuit are connected to each other through a through-via-hole penetrating a part of the light-receiving element, and the lower electrode is made as an electrode common to the light-receiving elements arrayed in the light-receiving element array. The present technology can be applied to an infrared sensor.
US10522577B2 Image sensor
An image sensor may include: a pixel array having a plurality of pixels arranged in a matrix structure; and an image array including a plurality of image dots which are arranged in a matrix structure, and implemented by output signals of the respective pixels. The position of a first pixel in the pixel array may not correspond to the position of an image dot corresponding to the first pixel in the image array, and the position of a second pixel adjacent to the first pixel in the pixel array may correspond to the position of an image dot corresponding to the second pixel in the image array.
US10522576B2 Wide dynamic range photo sensor
Some embodiments described herein are directed to a photo sensor and a method of operating a photo sensor. In an embodiment, a photo sensor comprises a photo diode, a filter circuit, and an output circuit. The filter circuit has an input node configured to be electrically coupled to an output node of the photo diode, and has an output node. The filter circuit has an adjustable gain, and the adjustable gain is adjustable based on a signal output from the filter circuit. The output circuit has an input node configured to be electrically coupled to the output node of the filter circuit.
US10522574B2 Manufacturing method of display device and manufacturing method of electronic device
A method for manufacturing a display device is provided. The method includes a step of forming a first layer over a first substrate, a terminal electrode over the first layer, a display element over the first layer, and a peeling layer overlapping with the terminal electrode, a step of forming a second layer over a second substrate, a step of attaching the first substrate to the second substrate with a bonding layer therebetween, a step of separating the first substrate from the first layer, a step of attaching a third substrate to the first layer, a step of separating the second substrate from the second layer together with part of the bonding layer, and a step of attaching a fourth substrate to the second layer. At least one of the first layer and the second layer includes an organic film.
US10522572B2 Liquid crystal display device and method for manufacturing the same
Provided is a method to manufacture a liquid crystal display device in which a contact hole for the electrical connection of the pixel electrode and one of the source and drain electrode of a transistor and a contact hole for the processing of a semiconductor layer are formed simultaneously. The method contributes to the reduction of a photography step. The transistor includes an oxide semiconductor layer where a channel formation region is formed.
US10522569B2 High SNR pixel design
Display panels including mirror pixel layouts and power rail bridges are described. In an embodiment, a display panel includes a plurality of power rail bridges joining together a subset of power rails for a plurality of adjacent mirror pixels within a row of mirror pixels.
US10522568B2 Semiconductor device and method for manufacturing the same
It is an object to manufacture and provide a highly reliable display device including a thin film transistor with a high aperture ratio which has stable electric characteristics. In a manufacturing method of a semiconductor device having a thin film transistor in which a semiconductor layer including a channel formation region is formed using an oxide semiconductor film, a heat treatment for reducing moisture and the like which are impurities and for improving the purity of the oxide semiconductor film (a heat treatment for dehydration or dehydrogenation) is performed. Further, an aperture ratio is improved by forming a gate electrode layer, a source electrode layer, and a drain electrode layer using conductive films having light transmitting properties.
US10522567B2 Semiconductor device and display device having a protection layer
According to one embodiment, a semiconductor device includes a first insulating film, a first semiconductor layer formed of polycrystalline silicon, a second semiconductor layer formed of an oxide semiconductor, a second insulating film, a first gate electrode, a second gate electrode, a third insulating film formed of silicon nitride, and a protection layer. The protection layer is located between the second insulating film and the third insulating film, is opposed to the second semiconductor layer, and is formed of either an aluminum oxide or fluorinated silicon nitride.
US10522565B2 Array substrate, display panel and manufacturing method thereof
An array substrate provided comprises a gate insulating layer, touch control element and first conducting wire disposed on a substrate; insulating interlayer covering gate insulating layer, touch control element and first conducting wire; protective wire arranged along the surface periphery of insulating interlayer; planarization layer covering insulating interlayer and protective wire, and second conducting wire disposed on surface of planarization layer; wherein touch control element is insulated from first conducting wire comprising an extension section, and free end of extension section is a first end; protective wire is electrically connected with first end; second conducting wire comprises a second and third end arranged oppositely and a contact position between second and third end; second end is electrically connected with touch control element, and contact position is electrically connected with a portion of first conducting wire inner substrate. A display panel and manufacturing method thereof are further provided.
US10522562B2 Memory device
A memory device includes a plurality of gate electrode layers stacked on a substrate, a plurality of channel layers penetrating the plurality of gate electrode layers, a gate insulating layer between the plurality of gate electrode layers and the plurality of channel layers, and a common source line on the substrate adjacent to the gate electrode layers. The common source line includes a first part and a second part that are alternately arranged in a first direction and have different heights in a direction vertical to a top surface of the substrate. The gate insulating layer includes a plurality of vertical parts and a horizontal part. The plurality of vertical parts surrounds corresponding ones of the plurality of channel layers. The horizontal part extends parallel to a top surface of the substrate.
US10522559B2 Systems including memory cells on opposing sides of a pillar
Systems including a processor and a memory device in communication with the processor include an array of non-volatile memory cells configured in a NAND architecture. The array includes a plurality of series-coupled first non-volatile memory cells, each first non-volatile memory cell curving around a first curved side of a substantially vertical pillar and terminating at an isolation region, and a plurality of series-coupled second non-volatile memory cells, each second non-volatile memory cell curving around a second curved side of the substantially vertical pillar and terminating at the isolation region. Respective ones of the first non-volatile memory cells are respectively at same vertical levels as respective ones of the second non-volatile memory cells.
US10522558B2 Semiconductor device and method of manufacturing semiconductor device
A semiconductor device having a nonvolatile memory cell arranged in a p-type well (active region) PW1 in a memory cell region 1A in a semiconductor substrate 1 and an MISFET arranged in a p-type well PW2 (active region) or an n-type well (active region) in a peripheral circuit region 2A is constructed as follows. The surface of an element isolation region STI1 surrounding the p-type well PW1 is set lower than the surface of an element isolation region STI2 surrounding the p-type well PW2 or the n-type well (H1
US10522554B2 SRAM cells with vertical gate-all-around MOSFETs
A Static Random Access Memory (SRAM) cell includes a first and a second pull-up transistor, a first and a second pull-down transistor forming cross-latched inverters with the first and the second pull-up transistors, and a first and a second pass-gate transistor. Each of the first and the second pull-up transistors, the first and the second pull-down transistors, and the first and the second pass-gate transistors includes a bottom plate as a first source/drain region, a channel over the bottom plate, and a top plate as a second source/drain region. A first isolated active region is in the SRAM cell and acts as the bottom plate of the first pull-down transistor and the bottom plate of the first pass-gate transistor. A second isolated active region is in the SRAM cell and acts as the bottom plate of the second pull-down transistor and the bottom plate of the second pass-gate transistor.
US10522552B2 Method of fabricating vertical transistor device
The disclosed technology generally relates semiconductor devices and more particularly to a vertical transistor device, and a method of fabricating the same. In one aspect, the method includes providing, on a substrate, a fin formed of a stack of a first layer, a second layer and a third layer, wherein the second layer is positioned above the first layer and the third layer is positioned above the second layer. The method additionally includes forming a dielectric on the sidewalls of the first and third layers of the fin selectively against a sidewall of the second layer, and the method additionally includes forming a gate contacting layer for contacting a sidewall of the second layer. The first and third layers define a source region and a drain region, respectively, of the vertical transistor device. The second layer defines a channel region of the vertical transistor device. The dielectric on the sidewalls of the first and third layers electrically isolates the source and drain regions from the gate contacting layer.
US10522550B2 Method for fabricating semiconductor device
A semiconductor device includes a substrate including spaced-apart active regions, and device isolating regions isolating the active regions from each other, and a pillar array pattern including a plurality of pillar patterns overlapping the active regions, the plurality of pillar patterns being spaced apart from each other at an equal distance in a first direction and in a second direction intersecting the first direction, wherein the plurality of pillar patterns include first pillar patterns and second pillar patterns disposed alternatingly in the first direction and in the second direction, a shape of a horizontal cross section of the first pillar patterns being different from a shape of a horizontal cross section of the second pillar patterns.
US10522549B2 Uniform gate dielectric for DRAM device
Provided herein are approaches for forming a gate dielectric layer for a DRAM device, the method including providing a substrate having a recess formed therein, the recess including a sidewall surface and a bottom surface. The method may further include performing an ion implant into just the bottom surface of the recess, and forming a gate dielectric layer along the bottom surface of the recess and along the sidewall surface of the recess. Once formed, a thickness of the gate dielectric layer along the sidewall surface is approximately the same as a thickness of the gate dielectric layer along the bottom surface of the recess. In some embodiments, the gate dielectric layer is thermally grown within the recess. In some embodiments, the ion implant is performed after a mask layer atop the substrate is removed.
US10522548B2 Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes: forming a first conductive layer; forming a second conductive layer over the first conductive layer; forming a conductive line by etching the second conductive layer; etching a portion of the first conductive layer to form a plug head having the same critical dimension as the conductive line; forming a first spacer that covers the conductive line and the plug head; etching the remaining first conductive layer to form a plug body that is aligned with the first spacer, wherein the plug body have a greater critical dimension than the plug head; and forming a second spacer by performing a selective oxidation onto a side wall of the plug body.
US10522547B2 Methods and apparatuses including an active area of a tap intersected by a boundary of a well
Apparatuses and methods are disclosed. One such apparatus includes a well having a first type of conductivity formed within a semiconductor structure having a second type of conductivity. A boundary of the well intersects an active area of a tap to the well.
US10522544B2 Techniques providing metal gate devices with multiple barrier layers
A semiconductor device with a metal gate is disclosed. An exemplary semiconductor device with a metal gate includes a semiconductor substrate, source and drain features on the semiconductor substrate, a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes a HK dielectric layer formed over the semiconductor substrate, a plurality of barrier layers of a metal compound formed on top of the HK dielectric layer, wherein each of the barrier layers has a different chemical composition; and a stack of metals gate layers deposited over the plurality of barrier layers.
US10522542B1 Double rule integrated circuit layouts for a dual transmission gate
Exemplary embodiments of an exemplary dual transmission gate and various exemplary integrated circuit layouts for the exemplary dual transmission gate are disclosed. These exemplary integrated circuit layouts represent double-height, also referred to as double rule, integrated circuit layouts. These double rule integrated circuit layouts include a first group of rows from among multiple rows of an electronic device design real estate and a second group of rows from among the multiple rows of the electronic device design real estate to accommodate a first metal layer of a semiconductor stack. The first group of rows can include a first pair of complementary metal-oxide-semiconductor field-effect (CMOS) transistors, such as a first p-type metal-oxide-semiconductor field-effect (PMOS) transistor and a first n-type metal-oxide-semiconductor field-effect (NMOS) transistor, and the second group of rows can include a second pair of CMOS transistors, such as a second PMOS transistor and a second NMOS transistor. These exemplary integrated circuit layouts disclose various configurations and arrangements of various geometric shapes that are situated within an oxide diffusion (OD) layer, a polysilicon layer, a metal diffusion (MD) layer, the first metal layer, and/or a second metal layer of a semiconductor stack. In the exemplary embodiments to follow, the various geometric shapes within the first metal layer are situated within the multiple rows of the electronic device design real estate and the various geometric shapes within the OD layer, the polysilicon layer, the MD layer, and/or the second metal layer are situated within multiple columns of the electronic device design real estate.
US10522538B1 Using source/drain contact cap during gate cut
Parallel fins are formed (in a first orientation), and source/drain structures are formed in or on the fins, where channel regions of the fins are between the source/drain structures. Parallel gate structures are formed to intersect the fins (in a second orientation perpendicular to the first orientation), source/drain contacts are formed on source/drain structures that are on opposite sides of the gate structures, and caps are formed on the source/drain contacts. After forming the caps, a gate cut structure is formed interrupting the portion of the gate structure that extends between adjacent fins. The upper portion of the gate cut structure includes extensions, where a first extension extends into one of the caps on a first side of the gate cut structure, and a second extension extends into the inter-gate insulator on a second side of the gate cut structure.
US10522537B2 Integrated circuit device
An integrated circuit device includes a substrate including a device active region, a fin-type active region protruding from the substrate on the device active region, a gate line crossing the fin-type active region and overlapping a surface and opposite sidewalls of the fin-type active region, an insulating spacer disposed on sidewalls of the gate line, a source region and a drain region disposed on the fin-type active region at opposite sides of the gate line, a first conductive plug connected the source or drain regions, and a capping layer disposed on the gate line and extending parallel to the gate line. The capping layer includes a first part overlapping the gate line, and a second part overlapping the insulating spacer. The first and second parts have different compositions with respect to each other. The second part contacts the first part and the first conductive plug.
US10522526B2 LTHC as charging barrier in InFO package formation
A method includes forming a release film over a carrier, forming a polymer buffer layer over the release film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, and decomposing a first portion of the release film. A second portion of the release film remains after the decomposing. An opening is formed in the polymer buffer layer to expose the metal post.
US10522519B2 Display module, display device and methods of assembling and disassembling display module
Provided are a display module, a display device, and method of assembling and disassembling the display module. The display module includes a cabinet, a light-emitting diode (LED) panel mounted on the cabinet, and a coupling device configured to detachably mount the LED panel on the cabinet, wherein the coupling device comprises a first coupling member and a second coupling member, and at least one of the first coupling member and the second coupling member is configured to be moved by mutual magnetic force.
US10522518B2 Light source with tunable CRI
A light-emitting device with at least two light-emitting dies encapsulated with two different types of the wavelength-converting materials is disclosed. Each of the wavelength-converting materials is configured to produce a visible light from a narrow band light near UV region produced by the light-emitting dies, but with different correlated color temperatures (CCT) and different spectral contents. The combination of the two visible light forms the desired visible white light. The Color rendering index of the light-emitting device is tunable by adjusting the supply current to the light-emitting dies. In another embodiment, a light module with tunable CRI for an illumination system is disclosed.
US10522517B2 Half-bridge power semiconductor module and manufacturing method therefor
A module (1) includes an insulating substrate (15), a power semiconductor device (13HT), a power semiconductor device (13LT), a bridge terminal (14B), a high-side terminal (14H), and a low-side terminal (14L). The bridge terminal extends from a surface wiring conductor (12B) at a position between the power semiconductor devices (13HT, 13LT). The high-side terminal extends from a high-side rear surface wiring conductor (17H) at a position between the power semiconductor devices (13HT, 13LT). The low-side terminal extends from a low-side rear surface wiring conductor (17L) at a position between the power semiconductor devices (13HT, 13LT). A surface electrode of the power semiconductor device (13HT) and a rear electrode of the power semiconductor device (13LT) are connected to the surface wiring conductor (12B).
US10522514B2 3DIC structure and methods of forming
A structure and a method of forming are provided. The structure includes a first dielectric layer overlying a first substrate. A first connection pad is disposed in a top surface of the first dielectric layer and contacts a first redistribution line. A first dummy pad is disposed in the top surface of the first dielectric layer, the first dummy pad contacting the first redistribution line. A second dielectric layer overlies a second substrate. A second connection pad and a second dummy pad are disposed in the top surface of the second dielectric layer, the second connection pad bonded to the first connection pad, and the first dummy pad positioned in a manner that is offset from the second dummy pad so that the first dummy pad and the second dummy pad do not contact each other.
US10522511B2 Semiconductor packages having indication patterns
A semiconductor package includes a package substrate, a first semiconductor chip on the package substrate, an encapsulant layer covering the first semiconductor chip, bar patterns disposed within the package substrate, each bar pattern having a first end and a second end. An encapsulant layer formed to cover at least the bar patterns and the first semiconductor chip, wherein the semiconductor package having the encapsulant layer has a side surface with exposing one or more second ends of the bar patterns, wherein the bar patterns having different lengths are positioned substantially along a predetermined direction with respect to the first semiconductor chip such that the one or more second ends of the bar patterns exposed through the side surface of the semiconductor package indicate a distance between the side surface and the first semiconductor chip.
US10522503B2 Method of manufacturing stacked wafer assembly
A stacked wafer assembly is made by forming a grid of grooves corresponding to projected dicing lines in a face side of each of two wafers, thereby forming demarcated areas on the face side of each of the two wafers. One of the wafers is installed with demarcated areas face upwardly, and thereafter liquid is supplied to the demarcated areas in a quantity just enough to stay on upper surfaces of the demarcated areas without overflowing. The other wafer is placed over the one wafer with demarcated areas of the other wafer facing the respective demarcated areas of the one wafer, thereby bringing respective central positions of the facing demarcated areas of the wafers into self-alignment with each other under the surface tension of the liquid sandwiched between the facing demarcated areas. The liquid is removed to bring the wafers into intimate contact with each other.
US10522502B2 Anisotropic conductive film and connected structure
Anisotropic conductive films, each including an insulating adhesive layer and conductive particles insulating adhesive layer in a lattice-like manner. Among center distances between an arbitrary conductive particle and conductive particles adjacent to the conductive particle, the shortest distance to the conductive particle is a first center distance; the next shortest distance is a second center distance. These center distances are 1.5 to 5 times the conductive particles' diameter. The arbitrary conductive particle, conductive particle spaced apart from the conductive particle by the first center distance, conductive particle spaced apart from the conductive particle by first center distance or second center distance form an acute triangle. Regarding this acute triangle, an acute angle formed between a straight line orthogonal to a first array direction passing through the conductive particles and second array direction passing through conductive particles being 18 to 35° . These anisotropic conductive films have stable connection reliability in COG connection.
US10522499B2 Bonded structures
A bonded structure can include a first element having a first interface feature and a second element having a second interface feature. The first interface feature can be bonded to the second interface feature to define an interface structure. A conductive trace can be disposed in or on the second element. A bond pad can be provided at an upper surface of the first element and in electrical communication with the conductive trace. An integrated device can be coupled to or formed with the first element or the second element.
US10522492B2 Semiconductor package and semiconductor process
A wiring structure includes a dielectric layer and a first patterned conductive layer on the dielectric layer. The dielectric layer has a first region and a second region. The first patterned conductive layer includes a number of fine conductive lines and a number of dummy conductive structures. The number of conductive lines include a first number of conductive lines on the first region and a second number of conductive lines on the second region, and the number of dummy conductive structures include a first number of dummy conductive structures on the second region. The first number of conductive lines occupy a first area on the first region, and the second number of conductive lines and the first number of dummy conductive structures occupy a second area on the second region. A ratio of the second area to the first area is greater than or equal to about 80%.
US10522491B2 Semiconductor device and bump formation process
A semiconductor device includes a solder bump overlying and electrically connected to a pad region, and a metal cap layer formed on at least a portion of the solder bump. The metal cap layer has a melting temperature greater than the melting temperature of the solder bump.
US10522490B2 Semiconductor package and method of forming the same
An embodiment is a method including forming a first passive device in a first wafer, forming a first dielectric layer over a first side of the first wafer, forming a first plurality of bond pads in the first dielectric layer, planarizing the first dielectric layer and the first plurality of bond pads to level top surfaces of the first dielectric layer and the first plurality of bond pads with each other, hybrid bonding a first device die to the first dielectric layer and at least some of the first plurality of bond pads, and encapsulating the first device die in a first encapsulant.
US10522486B2 Connector formation methods and packaged semiconductor devices
Methods of forming connectors and packaged semiconductor devices are disclosed. In some embodiments, a connector is formed by forming a first photoresist layer over an interconnect structure, and patterning the first photoresist layer. The patterned first photoresist layer is used to form a first opening in an interconnect structure. The patterned first photoresist is removed, and a second photoresist layer is formed over the interconnect structure and in the first opening. The second photoresist layer is patterned to form a second opening over the interconnect structure in the first opening. The second opening is narrower than the first opening. At least one metal layer is plated through the patterned second photoresist layer to form the connector.
US10522485B2 Electrical device and a method for forming an electrical device
An electrical device includes a redistribution layer structure, an inter-diffusing material contact structure and a vertical electrically conductive structure located between the redistribution layer structure and the inter-diffusing material contact structure. The vertical electrically conductive structure includes a diffusion barrier structure located adjacently to the inter-diffusing material contact structure. Further, the diffusion barrier structure and the redistribution layer structure comprise different lateral dimensions.
US10522481B2 Post-passivation interconnect structure
A semiconductor device includes a semiconductor substrate, a passivation layer overlying the semiconductor substrate, and an interconnect structure overlying the passivation layer. The interconnect structure includes a landing pad region and a dummy region electrically separated from each other. A protective layer is formed on the interconnect structure and has a first opening exposing a portion of the landing pad region and a second opening exposing a portion of the dummy region. A metal layer is formed on the exposed portion of landing pad region and the exposed portion of the dummy region. A bump is formed on the metal layer overlying the landing pad region.
US10522480B2 Packaging devices and methods of manufacture thereof
Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a method of manufacturing a packaging device includes forming an interconnect wiring over a substrate, and forming conductive balls over portions of the interconnect wiring. A molding material is deposited over the conductive balls and the substrate, and a portion of the molding material is removed from over scribe line regions of the substrate.
US10522478B2 Semiconductor device with circumferential structure and method of manufacturing
A circumferential embedded structure is formed by laser irradiation in a semiconductor substrate, which is of a semiconductor material. The embedded structure includes a polycrystalline structure of the semiconductor material, and surrounds a central portion of a semiconductor die. The semiconductor die including the embedded structure is separated from the semiconductor substrate.
US10522477B2 Method of making package assembly including stress relief structures
A method of making a semiconductor package structure includes bonding a plurality of dies to a substrate, wherein a first die of the plurality of dies is larger than a second die of the plurality of dies. The method further includes adhering a first stress relief structure to the substrate at a corner of the substrate, wherein a distance between the first stress relief structure to a closest die of the plurality of dies to the first stress relief structure is a first distance. The method further includes adhering a second stress relief structure to the substrate along a single edge of the substrate, wherein a distance between the second stress relief structure to a closest die of the plurality of dies to the second stress relief structure is the first distance.
US10522475B2 Vertical interconnects for self shielded system in package (SiP) modules
A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.
US10522473B2 Alignment mark design for packages
A package includes a device die, a molding material molding the device die therein, a through-via penetrating through the molding material, and an alignment mark penetrating through the molding material. A redistribution line is on a side of the molding material. The redistribution line is electrically coupled to the through-via.
US10522469B2 Split rail structures located in adjacent metal layers
A first metal layer of a semiconductor device includes a plurality of first metal lines that each extend along a first axis, and a first rail structure that extends along the first axis. The first rail structure is physically separated from the first metal lines. A second metal layer is located over the first metal layer. The second metal layer includes a plurality of second metal lines that each extend along a second axis orthogonal to the first axis, and a second rail structure that extends along the first axis. The second rail structure is physically separated from the second metal lines. The second rail structure is located directly over the first rail structure. A plurality of vias is located between the first metal layer and the second metal layer. A subset of the vias electrically interconnects the first rail structure to the second rail structure.
US10522463B2 Semiconductor structure
A semiconductor structure is provided and includes a base substrate including a device region and a peripheral region surrounding the device region, the base substrate including a base interconnection structure formed in each of the device region and the peripheral region; a medium layer on the base substrate; a first interconnection structure through the medium layer and on the base interconnection structure in the device region; and a second interconnection structure through the medium layer and on the base interconnection structure in the peripheral region. The first interconnection structure includes: a first portion over the base interconnection structure, and a second portion partially on the first portion and partially on a portion of the medium layer.
US10522460B2 Memory device and method for manufacturing same
A memory device includes a first conductive layer; a second conductive layer provided above the first conductive layer; a plurality of electrode layers stacked above the second conductive layer; a semiconductor pillar extending through the plurality of electrode layers and the second conductive layer, and connected to the first conductive layer; and a third conductive layer provided above the first conductive layer. The third conductive layer is positioned at a level substantially same as a level of the second conductive layer in an extension direction of the semiconductor pillar, and is made of a material same as a material of the second conductive layer. The third conductive layer is electrically isolated from the second conductive layer, and is electrically connected to the first conductive layer.
US10522457B2 Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates
In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, one or more conductive features (120E.A, 120E.B, or both) are provided above the substrate that wrap around the conductive vias' protrusions (114′) to form capacitors, electromagnetic shields, and possibly other elements. Other features and embodiments are also provided.
US10522456B2 Capacitor structure and semiconductor device including the same
A capacitor structure includes a substrate including an electrode pad and a ground pad, a plurality of dielectric layers on the substrate, the plurality of dielectric layers being at different levels on the substrate, a plurality of conductive pattern layers in at least two dielectric layers of the plurality of dielectric layers, the at least two dielectric layers of the plurality of dielectric layers being first dielectric layers, a plurality of via plugs connecting the plurality of conductive pattern layers to each other, and at least one contact layer in at least one second dielectric layer of the plurality of dielectric layers, the at least one second dielectric layer being different from the at least two first dielectric layers, and the at least one contact layer electrically connecting the plurality of conductive pattern layers to the electrode pad and the ground pad.
US10522453B2 Substrate structure with filling material formed in concave portion
Provided is a substrate structure including a substrate body, electrical contact pads and an insulating protection layer disposed on the substrate body, wherein the insulating protection layer has openings exposing the electrical contact pads, and at least one of the electrical contact pads has at least a concave portion filled with a filling material to prevent solder material from permeating along surfaces of the insulating protection layer and the electric contact pads, thereby eliminating the phenomenon of solder extrusion. Thus, bridging in the substrate structure can be eliminated even when the bump pitch between two adjacent electrical contact pads is small. As a result, short circuits can be prevented, and production yield can be increased.
US10522452B2 Packaging methods for semiconductor devices including forming trenches in workpiece to separate adjacent packaging substrates
Packaging methods for semiconductor devices are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates.
US10522450B1 Pillar based socket
An electronic device may include a semiconductor package, that may include a package substrate. The package may include a semiconductor die. A plurality of package interconnects may include a first pillar extending from a surface of the package substrate. The electronic device may include a socket that may be configured to couple with the semiconductor package. The socket may include a plurality of socket interconnects configured to engage with the package interconnects. The plurality of socket interconnects may include a first contact, and the first contact may include an arm. The arm of the first contact may be configured to engage with the first pillar, and the arm may be configured to laterally displace when engaged with the first pillar. The engagement of the arm with the first pillar may establish an electrical communication pathway between the semiconductor package and the socket.
US10522449B2 Packages with Si-substrate-free interposer and method forming same
A method includes forming a plurality of dielectric layers, forming a plurality of redistribution lines in the plurality of dielectric layers, etching the plurality of dielectric layers to form an opening, filling the opening to form a through-dielectric via penetrating through the plurality of dielectric layers, forming a dielectric layer over the through-dielectric via and the plurality of dielectric layers, forming a plurality of bond pads in the dielectric layer, bonding a device die to the dielectric layer and a first portion of the plurality of bond pads through hybrid bonding, and bonding a die stack to through-silicon vias in the device die.
US10522447B2 Chip package and a wafer level package
Various embodiments provide for a chip package including a carrier; a layer over the carrier; a further carrier material over the layer, the further carrier material comprising a foil; one or more openings in the further carrier material, wherein the one or more openings expose at least one or more portions of the layer from the further carrier material; and a chip comprising one or more contact pads, wherein the chip is adhered to the carrier via the one or more exposed portions of the layer.
US10522444B2 Surface treatment method and apparatus for semiconductor packaging
A surface treatment and an apparatus for semiconductor packaging are provided. In an embodiment, a surface of a conductive layer is treated to create a roughened surface. In one example, nanowires are formed on a surface of the conductive layer. In the case of a copper conductive layer, the nanowires may include a CuO layer. In another example, a complex compound is formed on a surface of the conductive layer. The complex compound may be formed using, for example, thiol and trimethyl phosphite.
US10522440B2 Package structure and method of manufacturing the same
A package structure and a method of manufacturing the same are provided. The package structure includes a die, a first encapsulant, a second encapsulant, a protection layer, a RDL structure and a connector. The first encapsulant is aside a first sidewall of the die, at least encapsulating a portion of the first sidewall of the die. The second encapsulant is aside a second sidewall of the die, encapsulating the second sidewall of the die. The protection layer is aside the first sidewall of the die and on the first encapsulant. The RDL structure is on a first surface of the die. The connector is electrically connected to the die through the RDL structure.
US10522437B2 Methods and apparatus for package with interposers
An interposer may comprise a metal layer above a substrate. A dam or a plurality of dams may be formed above the metal layer. A dam surrounds an area of a size larger than a size of a die which may be connected to a contact pad above the metal layer within the area. A dam may comprise a conductive material, or a non-conductive material, or both. An underfill may be formed under the die, above the metal layer, and contained within the area surrounded by the dam, so that no underfill may overflow outside the area surrounded by the dam. Additional package may be placed above the die connected to the interposer to form a package-on-package structure.
US10522432B2 Semiconductor chip
According to various embodiments, a semiconductor chip may include: a semiconductor body region including a first surface and a second surface opposite the first surface; a capacitive structure for detecting crack propagation into the semiconductor body region; wherein the capacitive structure may include a first electrode region at least partially surrounding the semiconductor body region and at least substantially extending from the first surface to the second surface; wherein the capacitive structure further may include a second electrode region disposed next to the first electrode region and an electrically insulating region extending between the first electrode region and the second electrode region.
US10522427B2 Techniques providing semiconductor wafer grouping in a feed forward process
A method for processing a plurality of semiconductor wafers includes acquiring a process parameter measurement for each of the semiconductor wafers, associating each of the semiconductor wafers with one of a plurality of groups based on a respective process parameter measurement for each of the semiconductor wafers, where each respective group corresponds to a respective recipe, and for each one of the groups, processing ones of the semiconductor wafers associated with that group together according to a respective recipe.
US10522421B2 Nanosheet substrate isolated source/drain epitaxy by nitrogen implantation
Parasitic transistor formation under a semiconductor containing nanosheet device is eliminated by implantation of nitrogen into physically exposed surfaces of a semiconductor substrate after formation of a nanosheet stack of alternating nanosheets of a sacrificial semiconductor material nanosheet and a semiconductor channel material nanosheet on a portion of the semiconductor substrate. The nitrogen doped semiconductor region that is created by the nitrogen implantation is subsequently converted into a semiconductor nitride region (i.e., an isolation region) prior to the epitaxial growth of a semiconductor material that provides S/D regions from physically exposed sidewalls of each semiconductor channel material stack. The presence of the semiconductor nitride region prevents bottom up growth of the semiconductor material that provides the S/D regions.
US10522419B2 Stacked field-effect transistors (FETs) with shared and non-shared gates
A semiconductor device includes a plurality of stacked gate regions spaced apart from each other on a substrate, a plurality of first epitaxial source/drain regions between the plurality of stacked gate regions, wherein the first epitaxial source/drain regions extend from sides of the plurality of stacked gate regions in a first doped region, a plurality of second epitaxial source/drain regions between the plurality of stacked gate regions and positioned over the first epitaxial source/drain regions, wherein the second epitaxial source/drain regions extend from sides of the plurality of stacked gate regions in a second doped region, and a contact region extending through a second epitaxial source/drain region of the plurality of second epitaxial source/drain regions to a first epitaxial source/drain region of the plurality of first epitaxial source/drain regions.
US10522412B2 Gate structures with various widths and method for forming the same
Embodiments of a semiconductor device structure and a method for forming the same are provided. The semiconductor device structure includes a substrate and a first metal gate structure formed over the substrate. The first metal gate structure has a first width. The semiconductor device structure further includes a first contact formed adjacent to the first metal gate structure and a second metal gate structure formed over the substrate. The second metal gate structure has a second width smaller than the first width. The semiconductor device structure further includes an insulating layer formed over the second metal gate structure and a second contact self-aligned to the second metal gate structure.
US10522411B2 Method for forming semiconductor device structure with gate
A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The substrate has a fin structure, and the dielectric layer has a trench exposing a portion of the fin structure. The method includes forming a gate material layer in the trench. The method includes forming a planarization layer over the gate material layer. The planarization layer includes a first material that is different from a second material of the gate material layer and a third material of the dielectric layer. The method includes performing an etching process to remove the planarization layer and a first upper portion of the gate material layer so as to form a gate in the trench.
US10522408B2 FinFET device and method of forming same
A FinFET device and a method of forming the same are provided. A method includes forming a fin over a substrate. An isolation region is formed adjacent the fin. A dummy gate structure is formed over the fin. The fin adjacent the dummy gate structure is recessed to form a first recess. The first recess has a U-shaped bottom surface. The U-shaped bottom surface is below a top surface of the isolation region. The first recess is reshaped to form a reshaped first recess. The reshaped first recess has a V-shaped bottom surface. At least a portion of the V-shaped bottom surface comprises one or more steps. A source/drain region is epitaxially grown in the reshaped first recess.
US10522407B2 FinFET channel on oxide structures and related methods
A method for fabricating a semiconductor device having a substantially undoped channel region includes forming a plurality of fins extending from a substrate. In various embodiments, each of the plurality of fins includes a portion of a substrate, a portion of a first epitaxial layer on the portion of the substrate, and a portion of a second epitaxial layer on the portion of the first epitaxial layer. The portion of the first epitaxial layer of each of the plurality of fins is oxidized, and a liner layer is formed over each of the plurality of fins. Recessed isolation regions are then formed adjacent to the liner layer. The liner layer may then be etched to expose a residual material portion (e.g., Ge residue) adjacent to a bottom surface of the portion of the second epitaxial layer of each of the plurality of fins, and the residual material portion is removed.
US10522402B2 Grid self-aligned metal via processing schemes for back end of line (BEOL) interconnects and structures resulting therefrom
Grid self-aligned metal via processing schemes for back end of line (BEOL) interconnects are described. In an example, a method of fabricating an interconnect structure for a semiconductor die includes forming a lower metallization layer including alternating metal lines and dielectric lines above a substrate, the dielectric lines raised above the metal lines. A hardmask layer is formed on the metal lines of the lower metallization layer, between and co-planar with the dielectric lines of the lower metallization layer. A grating structure is formed above and orthogonal to the alternating metal lines and dielectric lines of the lower metallization layer. A mask is formed above the grating structure. Select regions of the hardmask layer are removed to expose select regions of the metal lines of the lower metallization layer. Metal vias are formed on the select regions of the metal lines of the lower metallization layer.
US10522397B2 Manufacturing method of semiconductor device
A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.
US10522396B1 Methods of fabricating integrated circuit devices having reduced line end spaces
Methods of fabricating an integrated circuit device are provided. The method includes depositing a dielectric layer and a first hard mask layer in sequence over a substrate. The method also includes forming a patterned second hard mask on the first hard mask layer, and forming a third hard mask portion in an opening of the patterned second hard mask. The method further includes removing the patterned second hard mask to leave the third hard mask portion on the first hard mask layer, and etching the first hard mask layer to form a patterned first hard mask. In addition, the method includes etching the dielectric layer by using the patterned first hard mask as an etching mask to form trenches in the dielectric layer, and filling the trenches with a conductive material to form conductive lines.
US10522395B1 Methods of forming a pattern
A metal pattern comprising interconnected small metal segments, medium metal segments, and large metal segments. At least one of the small metal segments comprises a pitch of less than about 45 nm and the small metal segments, medium metal segments, and large metal segments are separated from one another by variable spacing. Semiconductor devices comprising initial metallizations, systems comprising the metal pattern, and methods of forming a pattern are also disclosed.
US10522394B2 Method of creating aligned vias in ultra-high density integrated circuits
A method of forming vias aligned with metal lines in an integrated circuit is provided. The method includes: forming a stacked dielectric, capped, hard mask, and first film and photoresist layers; patterning first photoresist layer to provide metal line masks; etching hard mask layer based on patterned first photoresist layer to form metal line masks; ashing first photoresist and film layers; forming second film and photoresist layers on hard mask layer; patterning second photoresist layer to form via masks across opposing sides of metal line masks; etching second film and capped layers based on patterned second photoresist layer; ashing second photoresist and film layers; etching dielectric and capped layers based on a pattern of hard mask layer to provide via and metal line regions; etching hard mask and capped layers; and performing dual damascene process operations to form vias and metal lines in via and metal line regions.
US10522392B2 Semiconductor device and method of fabricating the same
A semiconductor device includes an active region in a semiconductor substrate. A gate electrode is disposed over and crossing the active region. The active region includes a channel region, a source region and a drain region. A bottom conductive feature is disposed on the active region. A helmet layer is disposed on the gate electrode. A contact etch stop layer is disposed on a portion of the helmet layer. A first contact plug is disposed on the bottom conductive feature and the remaining portion of the helmet layer. A hard mask is disposed on the gate electrode. An etching selectivity between the helmet layer and the hard mask is larger than approximately 10.
US10522389B2 Transfer printing method
A transfer printing method provides a first wafer having a receiving surface, and removes a second die from a second wafer using a die moving member. Next, the method positions the second die on the receiving surface of the first wafer. Specifically, to position the second die on the receiving surface, the first wafer has alignment structure for at least in part controlling movement of the die moving member.
US10522382B2 Method of manufacturing a semiconductor device
A system and method for a semiconductor wafer carrier is disclosed. An embodiment comprises a semiconductor wafer carrier wherein conductive dopants are implanted into the carrier in order to amplify the coulombic forces between an electrostatic chuck and the carrier to compensate for reduced forces that result from thinner semiconductor wafers. Another embodiment forms conductive layers and vias within the carrier instead of implanting conductive dopants.
US10522381B2 Aligner apparatus and methods
Described herein are aligners and methods of aligning workpieces. A workpiece aligner apparatus comprises an aligner chuck including an arm having a first end and a second end, a first edge gripping element on the first end and a second edge gripping element on the second end, the first edge gripping element and the second edge gripping element spaced apart to hold a workpiece at edges thereof, and a central workpiece handling element located in a central region of the arm, wherein the central workpiece handling element has a height such that the central workpiece handling element extends higher than the first edge gripping element and second edge gripping element.
US10522380B2 Method and apparatus for determining substrate placement in a process chamber
Methods for determining substrate placement in a process chamber are provided herein. In some embodiments, a method for determining substrate placement in a process chamber includes receiving sensor readings from a plurality of sensor arrays attached to the calibration substrate, calculating locations of a plurality of edge locations of a support member beneath the sensors based on the sensor readings, calculating a center point location of the support member based on the locations of the plurality of edge locations of the support member and determining an offset between the center point location and a location of the center of the calibration substrate.
US10522376B2 Multi-step image alignment method for large offset die-die inspection
A die-die inspection image can be aligned using a method or system configured to receive a reference image and a test image, determine a global offset and rotation angle from local sections on the reference image and test image, and perform a rough alignment de-skew of the test image prior to performing a fine alignment.
US10522375B2 Monitoring system for deposition and method of operation thereof
A monitoring and deposition control system and method of operation thereof including: a deposition chamber for depositing a material layer on a substrate; a sensor array for monitoring deposition of the material layer for changes in a layer thickness of the material layer during deposition; and a processing unit for adjusting deposition parameters based on the changes in the layer thickness during deposition.
US10522370B2 Substrate processing apparatus
A substrate processing apparatus includes a substrate stage that supports a substrate, a follower stage disposed on a same plane as the substrate stage, a first driving unit that moves the follower stage in parallel with a first direction, and a second driving unit that moves the substrate stage in parallel with the first direction. The second driving unit includes a voice magnet member disposed on the substrate stage, and a voice coil member disposed on the follower stage and spaced apart from the voice magnet member.
US10522364B2 Method of manufacturing semiconductor device and semiconductor device by the same
A method including forming hard mask patterns on a substrate; forming etch stop patterns surrounding the hard mask patterns; forming spacer patterns covering sidewalls of the etch stop patterns; removing the etch stop patterns; etching the substrate to form active and dummy fins; forming a block mask pattern layer surrounding the active and dummy fins and forming mask etch patterns on a top surface of the block mask pattern layer; etching the block mask pattern layer to form block mask patterns surrounding the active fins; etching the dummy fins; removing the block mask patterns surrounding the active fins; and depositing a device isolation film on the substrate such that the device isolation film is not in contact with the upper portions of the active fins, wherein a spacing distance between the active fin and the dummy fin is greater than an active fin spacing distance between the active fins.
US10522362B2 Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes: preparing a substrate; forming an isolation layer defining an active region in the substrate; forming a first insulation structure over the substrate, the first insulation structure defining a line-type opening that exposes the isolation layer and the active region; forming a plug pad through a Selective Epitaxial Growth (SEG) process over the exposed active regions; forming a second insulation structure inside the line-type opening, the second insulation structure defining a contact hole landing on the plug pad; and filling the contact hole with a contact plug.
US10522361B2 Atomic layer deposition method
An atomic layer deposition method is provided. The atomic layer deposition method includes the following steps. A substrate is placed in a reaction chamber. At least one deposition cycle is performed to deposit a metal film on the substrate. The at least one deposition cycle includes the following steps. A metal precursor is introduced in the reaction chamber. A hydrogen plasma is introduced to be reacted with the metal precursor adsorbed on the substrate to form the metal film. An annealing process is performed on the metal film. The at least one deposition cycle is performed in a hydrogen atmosphere under UV light irradiation.
US10522357B2 Transistor, protection circuit, and method of manufacturing transistor
Both an improvement of on-current and suppression of leakage current of a transistor are achieved. A transistor includes a drain, a source, a gate, and a gate insulating film. In the transistor, the gate insulating film is disposed between the source and the drain. In addition, in the transistor, the gate has a plurality of regions provided on a surface of the gate insulating film. In addition, in the gate, the plurality of regions provided on the gate insulating film have different work functions.
US10522353B2 Semiconductor epitaxy bordering isolation structure
A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.
US10522352B2 Direct-bonded native interconnects and active base die
Direct-bonded native interconnects and active base dies are provided. In a microelectronic architecture, active dies or chiplets connect to an active base die via their core-level conductors. These native interconnects provide short data paths, which forgo the overhead of standard interfaces. The system saves redistribution routing as the native interconnects couple in place. The base die may contain custom logic, allowing the attached dies to provide stock functions. The architecture can connect diverse interconnect types and chiplets from various process nodes, operating at different voltages. The base die may have state elements for drive. Functional blocks aboard the base die receive native signals from diverse chiplets, and communicate with all attached chiplets. The chiplets may share processing and memory resources of the base die. Routing blockages are minimal, improving signal quality and timing. The system can operate at dual or quad data rates. The architecture facilitates ASIC, ASSP, and FPGA ICs and neural networks, reducing footprint and power requirements.
US10522347B2 Method for manufacturing sputtering target, method for forming oxide film, and transistor
A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.
US10522346B2 Production of a semiconductor support based on group III nitrides
The invention relates to a method for producing a support for the production of a semiconductor structure based on group III nitrides, characterised in that the method comprises the steps of: formation (100) of a buffer layer (20) on a substrate (10), said buffer layer comprising an upper surface layer based on group III nitrides, and deposition (200) of a crystalline layer (30) on the buffer layer, said crystalline layer being deposited from silicon atoms so as to cover the entire surface of the upper layer based on group III nitrides. The invention also relates to a support obtained by the method, to a semiconductor structure based on the support, and to the method for the production thereof.
US10522345B2 Lattice-mismatched semiconductor substrates with defect reduction
A method includes receiving a semiconductor substrate including a first semiconductor material; etching a portion of the semiconductor substrate, thereby forming a recess, a bottom portion of the recess having a first sidewall and a second sidewall intersecting with each other, one of the first and second sidewalls exposing a (111) crystallographic plane of the semiconductor substrate; and epitaxially growing a second semiconductor material in the recess, the second semiconductor material having lattice mismatch to the first semiconductor material, dislocations in the second semiconductor material due to the lattice mismatch propagating from the first sidewall to the second sidewall in a direction parallel to a top surface of the semiconductor substrate.
US10522344B2 Integrated circuits with doped gate dielectrics
Examples of an integrated circuit with a gate structure and a method for forming the integrated circuit are provided herein. In some examples, a workpiece is received that includes a substrate having a channel region. A gate dielectric is formed on the channel region, and a layer containing a dopant is formed on the gate dielectric. The workpiece is annealed to transfer the dopant to the gate dielectric, and the layer is removed after the annealing. In some such examples, after the layer is removed, a work function layer is formed on the gate dielectric and a fill material is formed on the work function layer to form a gate structure.
US10522342B2 Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacer
A semiconductor device including a gate structure present on at least two suspended channel structures, and a composite spacer present on sidewalls of the gate structure. The composite spacer may include a cladding spacer present along a cap portion of the gate structure, and an inner spacer along the channel portion of the gate structure between adjacent channel semiconductor layers of the suspended channel structures. The inner spacer may include a crescent shape with a substantially central seam.
US10522341B2 Composition and method for removing residue from chemical-mechanical planarization substrate
Described is a post-CMP cleaning solution and methods useful to remove residue from a CMP substrate or to prevent formation of residue on a surface of a CMP substrate.
US10522336B2 Trap fill time dynamic range enhancement
A method of mass and/or ion mobility spectrometry is disclosed that comprises accumulating ions for a first period of time (T1) one or more times so as to form one or more first groups of ions, accumulating ions for a second period of time (T2) one or more times so as to form one or more second groups of ions, wherein the second period of time (T2) is less that the first period of time (T1), analysing the one or more first groups of ions to generate one or more first data sets, analysing the one or more second groups of ions to generate one or more second data sets, and determining whether the one or more first data sets comprise saturated and/or distorted data. If it is determined that the one or more first data sets comprise saturated and/or distorted data, then the method further comprises replacing the saturated and/or distorted data from the one or more first data sets with corresponding data from the one or more second data sets.
US10522335B2 Mass spectrometry data processing apparatus, mass spectrometry system, and method for processing mass spectrometry data
A mass spectrometry data processing apparatus includes a data processing part and a calculation part. The calculation part calculates differences in mass among all pieces of the peak data from the peak list, calculates an intensity ratio that is a ratio of intensity between two pieces of the peak data used in calculating the difference, and generates difference-intensity ratio data. Further, the calculation part retrieves difference-intensity ratio data having the difference included in a section, calculates a sum of the intensity ratio of the retrieved difference-intensity ratio data, and calculates difference-intensity ratio distribution data.
US10522333B2 Vacuum processing apparatus
A vacuum processing apparatus includes a vacuum processing chamber, an upper electrode, a lower electrode, a first high-frequency power source, a second high-frequency power source, a first matching box, a second matching box, a copper plate for connecting an electrode shaft of the lower electrode with the second matching box, a drive base on which the electrode shaft of the lower electrode and the second matching box are mounted, a drive unit for ascending or descending the drive base, and an exhaust unit disposed at a position equally distanced from an exhaust outlet by a distance.
US10522332B2 Plasma processing system, electron beam generator, and method of fabricating semiconductor device
A chamber has an upper housing and a lower housing and receives a reaction gas. A first plasma source includes electron beam sources providing electron beams into the upper housing to generate an upper plasma. A second plasma source includes holes generating a lower plasma within the holes connecting the upper housing and the lower housing. Radicals of the upper plasma, radicals of the lower plasma, and ions of the lower plasma are provided, through the holes, to the lower housing so that the lower housing has radicals and ions at a predetermined ratio of the ions to the radicals in concentration. The second plasma source divides the chamber into the upper housing and the lower housing. A wafer chuck is positioned in the lower housing to receive a wafer.
US10522328B2 Method of performing dose modulation, in particular for electron beam lithography
A method for transferring a pattern onto a substrate by direct writing by means of a particle or photon beam comprises: a step of producing a dose map, associating a dose to elementary shapes of the pattern; and a step of exposing the substrate according to the pattern with a spatially-dependent emitted dose depending on the dose map; wherein the step of producing a dose map includes: computing at least first and second metrics of the pattern for each of the elementary shapes, the first metric representative of features of the pattern within a first range from the elementary shape and the second metric representative of features of the pattern within a second range, larger than the first range, from the elementary shape; and determining the emitted dose associated to each of the elementary shapes of the pattern as a function of the metrics. A computer program product is provided for carrying out such a method or at least the step of producing a dose map.
US10522322B2 System and method for generating and analyzing roughness measurements
Systems and methods are disclosed that remove noise from roughness measurements to determine roughness of a feature in a pattern structure. In one embodiment, a method for determining roughness of a feature in a pattern structure includes generating, using an imaging device, a set of one or more images, each including measured linescan information that includes noise. The method also includes detecting edges of the features within the pattern structure of each image without filtering the images, generating a biased power spectral density (PSD) dataset representing feature geometry information corresponding to the edge detection measurements, evaluating a high-frequency portion of the biased PSD dataset to determine a noise model for predicting noise over all frequencies of the biased PSD dataset, and subtracting the noise predicted by the determined noise model from a biased roughness measure to obtain an unbiased roughness measure.
US10522320B2 Charged particle beam device and method for adjusting charged particle beam device
The objective of the present invention is to propose a charged particle beam device with which an imaging optical system and an irradiation optical system can be adjusted with high precision. In order to achieve this objective, provided is a charged particle beam device comprising: a first charged particle column which serves as an irradiation optical signal; a deflector that deflects charged particles which have passed through the inside of the first charged particle column toward an object; and a second charged particle column which serves as an imaging optical system. The charged particle beam device is provided with: a light source that emits light toward the object; and a control device that obtains, on the basis of detection charged particles generated according to irradiation of light emitted from the light source, a plurality of deflection signals which maintain a certain deflection state, and that selects or calculates, from the plurality of deflection signals or from relationship information produced from the plurality of deflection signals, a deflection signal that satisfies a predetermined condition.
US10522317B2 X-ray radiation generator
An X-ray tube includes an anode that conducts a high voltage that can be greater than 120 kV, and in particular greater than 300 kV, and heats up during operation. The anode is connected in a thermally conductive way to a heat sink, which has a base body composed of a metal with a heat absorbing surface for coupling to the anode as a heat source and a heat dissipating surface that is enlarged by means of heat dissipating elements that are connected to the base body. The heat dissipating elements are composed of an electrically insulating material having a thermal conductivity on the same order of magnitude as that of the metal of the base body, and have a height (H) starting from the base body of the heat sink so that there is a sufficient insulation breakdown resistance relative to the surroundings of the X-ray tube.
US10522314B2 Magnetic trip device for circuit breaker
A magnetic trip device comprises an actuator coil part having a plunger; an output plate configured to rotate in a first direction by the pressing of the plunger; a micro switch configured to output an electrical signal indicating a state of the circuit breaker; a switch driving lever mechanism configured to rotate to a first position for pressing the operation lever portion and a second position for releasing the operation lever portion; a driving lever bias spring for elastically pressing the switch driving lever mechanism; an automatic reset mechanism for pressing the plunger to the retracted position; a driving lever latch configured to rotate to a restraining position for preventing the switch driving lever mechanism from rotating to the first position, and a release position; and an avoiding portion formed on the output plate to avoid contacting with the switch driving lever mechanism.
US10522312B1 Movable spring plate and relay thereof
A movable spring plate structure for defining an open or closed state with respect to a fixed contact includes a rigid spring plate contact portion, a soft spring plate warp portion, a soft spring plate force-applying portion and a movable contact. The soft spring plate warp portion is coupled to the rigid spring plate contact portion, and a first deformation gap is formed between the rigid and soft spring plate contact portions. The rigid spring plate contact portion is harder than the soft spring plate warp portion. The soft spring plate force-applying portion is disposed at the soft spring plate warp portion, and the movable contact is disposed at the rigid spring plate contact portion. A force applied to the soft spring plate force-applying portion drives the movable and fixed contacts into a closed state.
US10522308B2 Multi-operating switch unit for vehicles
Provided is a multi-operating switch device for a vehicle, including: a housing unit; a substrate; a switch shaft unit; a rotary switch unit; a directional switch unit; and a push switch unit. The directional switch unit includes: a directional slide part within the housing unit; a directional switch disposed on the substrate, and configured to be operated by a change in the position of the directional slide part to generate a signal indicating the change in the position of the directional slide part; and a directional return part. The directional switch includes: a directional switch housing; and a directional switch knob partially exposed to the outside from one surface of the directional switch housing to contact with the directional slide part so that when the directional switch knob is pressedly rotated pivotally about an axis parallel with the substrate, it is received in the directional switch housing.
US10522306B2 System and method of causing a zero-current crossing in an electrical circuit
Disclosed herein are methods and systems for causing a zero-current crossing in an electrical circuit. The circuit can be a DC circuit in which case a switch is caused to open at or nearly at the zero crossing. Alternatively, the circuit can be an AC circuit.
US10522305B2 Power switch enclosure
A power switch including a contact configured to selectively electrically connect a line input to a load output, a switch configured to selectively control the contract, and an indicator. The contact has a closed position in which the line input is electrically connected to the load output, and an open position in which the line input is not electrically connected to the load output. The switch has an on position wherein the contact is controlled to be in the closed position, and an off position wherein the contact is controlled to be in the open position. The indicator provides a normal on status, a normal off status, and an error on status.
US10522302B2 Power storage device, light-emitting device, and electronic device
To provide a flexible, highly reliable power storage device or light-emitting device. The device includes a battery unit or a light-emitting unit and a member with rubber elasticity. The battery unit includes a secondary battery. The light-emitting unit includes a light-emitting element. The member with rubber elasticity is provided with a first projection and a second projection. The first projection and the second projection are arranged on a first surface of the battery unit or the light-emitting unit. The first projection and the second projection come in contact with each other when the power storage device is bent such that the first surface of the battery unit faces inward.
US10522300B2 Metallic surface with karstified relief, forming same, and high surface area metallic electrochemical interface
A metal foil with a karstified topography having a surface morphology in which a maximum peak height minus a maximum profile depth is greater than 0.5 μm and extends into the surface at least 5% of the foil thickness, a root mean square roughness is at least about 0.2 μm measured in a direction of greatest roughness, and an oxygen abundance is less than 5 atomic %. The foil may be composed of aluminum, titanium, nickel, copper, or stainless steel, or an alloy of any thereof, and may have a coating composed of nickel, nickel alloy, titanium, titanium alloy, nickel oxide, titanium dioxide, zinc oxide, indium tin oxide, or carbon, or a mixture or composite of any thereof. The foil may form part of a metal electrode, current collector, or electrochemical interface. Further described is a method for producing the foil by laser ablation in a vacuum.
US10522297B2 Power storage device and manufacturing method thereof
A power storage device has a power storage element and an electrolytic solution. The power storage element includes an anode body, a cathode body opposed to the anode body, and a separator interposed between the anode body and the cathode body. The separator includes a separator base material and a conductive polymer deposited on the separator base material. The power storage element is impregnated with the electrolytic solution. The separator has a first surface layer, which includes a first surface opposed to the anode body, and a second surface layer, which includes a second surface opposed to the cathode body. An amount of the conductive polymer deposited in a first separator half body, which is a part from a center of the separator to the first surface, is greater than an amount of the conductive polymer deposited in a second separator half body, which is a part from the center of the separator to the second surface.
US10522291B2 Multilayer ceramic capacitor and manufacturing method of multilayer ceramic capacitor
A multilayer ceramic capacitor includes: a ceramic multilayer structure having ceramic dielectric layers and internal electrode layers alternately stacked, the internal electrode layers being mainly composed of a transition metal other than an iron group, end edges of the internal electrode layers being alternately exposed to a first end face and a second end face; and a pair of external electrodes provided on the first end face and the second end face, wherein the external electrode includes a base conductive layer that includes glass of less than 7 weight % and is mainly composed of a transition metal other than an iron group or a noble metal, and a first plated film that covers the base conductive layer, has a thickness that is half of a thickness of the base conductive layer or more and is mainly composed of a transition metal other than an iron group.
US10522287B2 Multilayer ceramic electronic component having inorganic matter at an interface between an external electrode and the ceramic body
A multilayer ceramic electronic component in which an interface of an edge region of an external electrode that extends around to a side surface of a ceramic body and the ceramic configuring a surface of the ceramic body, an inorganic matter is present containing 26 mol % or more and less than 45 mol % of SiO2 and having a molar ratio (TiO2+ZrO2)/(SiO2+TiO2+ZrO2) of 0.154 or more, or an inorganic matter is present containing 45 mol % or more of SiO2 and having a molar ratio (TiO2+ZrO2)/(SiO2+TiO2+ZrO2) of 0.022 or more. Furthermore, the inorganic matter may contain B2O3 having a molar ratio relative to SiO2 within 0.25≤B2O3/SiO2≤0.5.
US10522286B2 Dielectric film and film capacitor
A dielectric film for a film capacitor includes a center portion made of a polymer and composite oxide particles and end portions made of only a polymer. The end portions are provided on both sides of the center portion.
US10522285B2 Multilayer ceramic capacitor and board having the same
A multilayer ceramic capacitor (MLCC) includes a body including first dielectric layers and second dielectric layers, the body including first to sixth surfaces, a second surface, a third surface, a fourth surface, a fifth surface and a sixth surface; first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces; second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces; first dielectric patterns disposed in at least a portion of the first spaces, and second dielectric patterns disposed in at least a portion of the second spaces; and lateral insulating layers.
US10522282B2 High isolation integrated inductor and method thereof
An inductor having a first coil of metal trace configured in an open loop topology and placed in a first metal layer; a second coil of metal trace configured in an open loop topology and placed in the first metal layer; and a third coil of metal trace configured in a closed loop topology and placed in a second metal layer, wherein: the first coil of metal trace is laid out to be substantially symmetrical with respect to a first axis, the second coil of metal trace is laid out to be approximately a mirror image of the first coil of metal trace with respect to a second axis, and the third coil of metal trace is laid out to enclose a majority portion of both the first coil of metal trace and the second coil of metal trace from a top view perspective.
US10522280B2 Integrated connector module for automation optimization
The subject disclosure relates to improved integrated connector module (ICM) designs for Ethernet applications. Some aspects provide an improved integrated connector module transformer (ICMt), including a wafer configured to hold a plurality of toroid elements, wherein the wafer is comprised of two or more mechanically coupled wafer portions. The ICMt can include one or more Electro Magnetic Interference (EMI) fingers that are configured to contact a ground pad of a printed circuit board (PCB) in order to provide a low-inductance connection between the ICMt and the ground pad of the PCB.
US10522277B1 Diamagnetic levitation system for medical use
A diamagnetic levitation system having an open torus magnet segment with a pair of arms extending from a central base. The ends of the arms form a gap. The arms are superconducting magnets and the base is an electromagnet. The magnet segment creates a planar magnetic field which forms a flat ellipse as the planar magnetic field crosses from one arm to the other and which is positioned only across the gap. The electromagnet oscillates the planar magnetic field. The magnet segment levitates a diamagnetic object within and/or above the gap. A plurality of magnet segments can be arranged in series to form a levitation system of defined length. The magnet segments are rotatable so that the planar magnetic field may be tilted.
US10522275B2 Method for producing nanoheterostructured permanent magnet
A method for producing a nanoheterostructured permanent magnet includes a first step of preparing a raw material solution by dissolving, in a solvent, (1) a block copolymer comprising polymer block components that are immiscible but linked to each other, (2) a first inorganic precursor which is one of a hard magnetic material precursor and a soft magnetic material precursor, and (3) a second inorganic precursor which is the other of the hard magnetic material precursor and the soft magnetic material precursor, and a second step including a phase-separation treatment for forming a nanophase-separated, a conversion treatment for converting the hard magnetic material precursor and the soft magnetic material precursor to a hard magnetic material and a soft magnetic material, respectively, and a removal treatment for removing the block copolymer from the nanophase-separated structure.
US10522273B2 Insulated joystick assembly
A joystick assembly is disclosed. In embodiments, the joystick controls a boom and aids in insulating a user from potential electric shock. Handle utilized by the operator may be made of, or at least one surface coated or covered in, material highly-resistant to electric current. The highly-resistant material may also extend to other components such as, a connecting rod, and a mounting base. The highly-resistant components may separate the operator from electrically charged components. As well as separating the operator from potentially electrically charged components, the rod may be received at the base by force measuring sensors, or strain measuring sensors may be attached to the rod. This allows the handle and rod to be stationary and, in embodiments, rigid, and only the applied force to be measured, thus decreasing the number of components needed in the assembly.
US10522272B2 Method of manufacturing a twisted pair wire cable and a twisted pair wire cable formed by said method
A method of manufacturing a twisted pair wire cable includes the step of arranging a first wire cable in a parallel orientation with a second wire cable. The first and second wire cables each have a conductive inner core and an insulative jacket surrounding the inner core. The method further includes the steps of applying a curable adhesive, such as a urethane acrylate oligomer based adhesive, to the jackets of the first and second wire cables, twisting the first and second wire cables one about the other, and curing the adhesive.
US10522268B2 Rolled copper foil, method of manufacturing a rolled copper foil, flexible flat cable, and method of manufacturing a flexible flat cable
A rolled copper foil comprises one of copper and a copper alloy. The rolled copper foil has a rolled surface and two side surfaces adjacent to the rolled surface. Each of the side surfaces being a non-sheared surface that is not a sheared surface. An area ratio of crystal grains oriented at a deviation angle of less than or equal to 13° from Cube orientation is greater than or equal to 6%.
US10522265B2 Solid insulation material
The invention relates to a solid, in particular strip-shaped insulation material, to the use thereof in a vacuum impregnation method and a thus produced insulation system and to an electric machine using the insulation system, in particular for the medium and high voltage range, that is for medium and high voltage machines, in particular rotating electric machines in the medium and high voltage range and to semi-finished products for electric switching systems. According to the invention, the curing catalyst is a covalently-bridged di-imidazol derivative and/or a covalently-bridged di-pyrazol derivative.
US10522264B2 Foamed polymer separator for cabling
A cable separator comprising a preshaped article having a longitudinal length, wherein said preshaped article is substantially entirely formed of a foamed polymer material having a glass transition temperature greater than 160° C. and being halogen-free is provided. A data communications cable comprising a plurality of conductors and the cable separator of the present invention, wherein said cable separator separates the plurality of conductors is provided. A method of manufacturing a cable comprising the separator of the invention is also provided.
US10522263B2 Aluminum alloy wire, aluminum alloy strand wire, covered electrical wire, and terminal-equipped electrical wire
An aluminum alloy wire composed of an aluminum alloy, wherein the aluminum alloy contains more than or equal to 0.03 mass % and less than or equal to 1.5 mass % of Mg, more than or equal to 0.02 mass % and less than or equal to 2.0 mass % of Si, and a remainder of Al and an inevitable impurity, Mg/Si being more than or equal to 0.5 and less than or equal to 3.5 in mass ratio, and the aluminum alloy wire has a dynamic friction coefficient of less than or equal to 0.8.
US10522262B2 Dynamic beam aperture control to reduce radiation dose using collimator
An apparatus to perform a CT scan of an object of interest with a reduced radiation dose including: an X-ray source configured to circularly rotate about the object of interest, the X-ray source configured to generate an X-ray beam; a detector assembly configured to move in tandem with the X-ray source on the opposite side of the X-ray source with respect to the object of interest, wherein the detector assembly is fixed with respect to the X-ray source and configured to detect the X-ray beam on a side of the object of interest opposite to the X-ray source after the X-ray beam passes through the object of interest; a 6-DOF collimator coupled to the X-ray source and comprising a plate with a hole disposed within the plate, wherein an aperture of the X-ray beam is dynamically adjusted by controlling a 3-D pose of the plate.
US10522256B2 Emergency and back-up cooling of nuclear fuel and reactors and fire-extinguishing, explosion prevention using liquid nitrogen
A nuclear reactor chamber comprises an inlet portion. The chamber is a part of a nuclear power plant. At least one container contains liquid nitrogen and cold nitrogen vapor and includes an outlet portion. At least one thermally activated release mechanism is respectively connected between one of the at least one container and the inlet portion. Each thermally activated release mechanism is configured to release the liquid nitrogen from a connected container into the inlet portion when a predetermined safety threshold temperature is reached, so that the released liquid nitrogen produces an expanding volume of cold nitrogen vapor within the nuclear reactor chamber.
US10522252B2 Opioid management system
A system may include a data processor and a memory storing instructions. The instructions may result in operations when executed by the data processor. The operations may include determining, based on location data from a positioning system, a presence of a cartridge at a location. The cartridge may include a substance. A quantity of the substance may be determined based on content data from a content meter at the location. Diversion of the substance may be detected based on the cartridge being present at the location and/or the quantity of the substance. Related methods and articles of manufacture, including apparatuses and computer program products, are also disclosed.
US10522251B2 Infrared detectors and thermal tags for real-time activity monitoring
Methods and systems for activity monitoring include capturing an infrared image of an environment that comprises at least one patient being monitored and at least one infrared-emitting tag. A relationship between the patient being monitored and the at least one infrared-emitting tag is determined. An activity conducted by the patient being monitored is determined based on the relationship between the patient being monitored and the at least one infrared-emitting tag. A course of treatment for the patient being monitored is adjusted based on the determined activity.
US10522249B2 Multiple computer server system for organizing healthcare information
A method of providing changes in healthcare policy information is provided, including: providing a first database, the first database containing a plurality of records, each record containing a copy of a website and tags associated with the website, the website pertaining to healthcare policy information; retrieving current versions of tags associated with the websites on the Internet; for each website, determining if the tags associated with the website have changed by comparing the current version of the tags to the copy of the tags in the first database; if the tags have changed, updating the copy of the website associated with the tags in the first database; determining the changes in the website, and providing access to reports generated to reflect changes in the website.
US10522246B2 Concepts for extracting lab data
Computer program products, methods, systems, apparatus, and computing entities for extracting lab result data from lab reports are provided. In one example embodiment, an example computing device receives a lab report. The computing device identifies one or more relevant portions of the lab report. The computing device then generates parsed lab report data from only the identified one or more relevant portions of the lab report. Subsequently, the computing device extracts patient information and lab results from the parsed lab report data. Using various embodiments of the present invention, patient information and lab results can be efficiently extracted for incorporation into structured data sets maintained, for example, by a healthcare company.
US10522245B2 Systems and methods for detecting infectious diseases
Systems, methods, and devices for detecting infections in a clinical sample are provided. Small-volume clinical samples obtained at a point-of-service (POS) location and may be tested at the POS location for multiple markers for multiple diseases, including upper and lower respiratory diseases. Samples may be tested for cytokines, or for inflammation indicators. Dilution of samples, or levels of detection, may be determined by the condition or past history of a subject. Test results may be obtained within a short amount of time after sample placement in a testing device, or within a short amount of time after being obtained from the subject. A prescription for treatment of a detected disorder may be provided, and may be filled, at the POS location. A bill may be automatically generated for the testing, or for the prescription, may be automatically sent to an insurance provider, and payment may be automatically obtained.
US10522244B2 Bioinformatic processing systems and methods
The present disclosure relates to systems and methods for facilitating trusted handling of genomic and/or other bioinformatic information. Certain embodiments may facilitate policy-based governance of access to and/or use of bioinformatic information, improved interaction with and/or use of distributed bioinformatic information, parallelization of various processes involving bioinformatic information, and/or reduced user involvement in bioinformatic workflow processes, and/or the like. Further embodiments may provide for memoization processes that may persistently store final and/or intermediate results of computations performed using genomic data for use in connection with future computations.
US10522243B2 Sparse identity spaces in droplet sequencing
A method for determining a sequence of a target nucleic acid is described. The method uses a plurality of control oligonucleotides with known sequence and unique identifications to map hybridization signals associated with a plurality of sequencing probes to a loosely packed multi-dimensional dye space, such that a region in the dye space can be associated with one or more sequencing probes. When a detected target hybridization signal of a sequencing probe and a target nucleic acid is mapped to the multi-dimensional dye space, the sequencing probe and thus the corresponding nucleotides in the target nucleic acid can be determined based on the one or more sequencing probes associated with the region that the detected target hybridization signal is mapped to.
US10522235B2 Repair fuse latches using static random access memory array
Various embodiments, disclosed herein, include apparatus and methods of using the apparatus having a core array of memory cells arranged as data storage elements; and an array of latches to store repair information for the core array. Each latch can be structured as a static random access memory cell. Additional apparatus, systems, and methods are disclosed.
US10522234B2 Bit tagging method, memory control circuit unit and memory storage device
A bit tagging method, a memory control circuit unit and a memory storage device are provided. The method includes: reading first memory cells according to a first reading voltage to generate a first codeword and determining whether the first codeword is a valid codeword, and the first codeword includes X bits; if not, reading the first memory cells according to a second reading voltage to generate a second codeword and determining whether the second codeword is the valid codeword, and the second codeword includes X bits; and if the second codeword is not the valid codeword and a Yth bit in the X bits of the first codeword is different from a Yth bit in the X bits of the second codeword, recording the Yth bit in the X bits as an unreliable bit, and Y is a positive integer less than or equal to X.
US10522231B2 Semiconductor memory device
According to one embodiment, a semiconductor memory device includes, a memory cell array, a first clock signal line, a second clock signal line to which first and second input/output buffer circuits are coupled in the order from one end toward the other end, a first buffer coupled to the one end of the second clock signal line, and a second buffer coupled to the other end of the second clock signal line. When a write operation is performed, a clock signal is input to the first and second input/output buffer circuits through the first buffer, and when a read operation is performed, a clock signal is input to the first and second input/output buffer circuits through the second buffer.
US10522227B2 Semiconductor memory device applying different voltages to respective select gate lines
According to one embodiment, a semiconductor memory device includes: a memory string including first and second select transistors and memory cell transistors; a bit line connected to the first select transistor; word lines which are connected to gates of the memory cell transistors, respectively; first and second select gate lines which are connected to gates of the first and second select transistors, respectively; a first contact plug connected to the first select gate line; a first wiring layer provided on the first contact plug; a second contact plug connected to the second select gate line; a second wiring layer provided on the second contact plug; and a row decoder connected to the first and second wiring layers. The row decoder applies different voltages to the first select gate line and the second select gate line.
US10522226B2 Method and apparatus for high voltage generation for analog neural memory in deep learning artificial neural network
Numerous embodiments are disclosed for a high voltage generation algorithm and system for generating high voltages necessary for a particular programming operation in analog neural memory used in a deep learning artificial neural network. Different calibration algorithms and systems are also disclosed. Optionally, compensation measures can be utilized that compensate for changes in voltage or current as the number of cells being programmed changes.
US10522225B1 Semiconductor device with non-volatile memory
A semiconductor device, the device including: a plurality of non-volatile memory cells, where at least one of the non-volatile memory cells includes at least one channel facet, where the at least one channel facet is modified by at least two gates, where the at least one channel facet includes at least two storage locations oriented perpendicular to the at least two gates.
US10522224B2 Circuitry and methods for programming resistive random access memory devices
A method for programming a ReRAM cell including a ReRAM device connected in series with an access transistor includes biasing the ReRAM cell with a programming potential that configures the access transistor in a common-source configuration and applying at least one programming voltage pulse to a gate of the access transistor, the programming voltage pulse having a magnitude selected to limit programming current to a preselected value.
US10522222B2 Semiconductor device and error correction method
A device with error correction is provided. The device includes a plurality of memory cells, and reference read write circuit, a plurality of sense amplifiers, and an error-correction code control block. The reference read write circuit is configured to generate a reference voltage in response to data stored in at least one of the plurality of memory cells. A plurality of sense amplifiers are each coupled to a respective memory cell of the plurality of memory cells. An error-correction code (ECC) control block may output an error signal when the ECC control block detects that it is unable to correct error data in one or more respective memory cells. The reference read write circuit may overwrite data in the at least one of the plurality of memory cells in response to the error signal.
US10522221B2 Storage array programming method and device for resistive random access memory
A storage array programming method and device for a resistive random access memory (RAM) are proposed. The resistive RAM comprising a storage array, the storage array comprising a group of storage units to which data is to be written. The programming method comprises: reading the currently stored data in the group of storage units and comparing bit by bit the currently stored data with the data to be written to determine whether the currently stored data is consistent with the data to be written, and generating a data write state according to the determination result; determining the data write state, and by a set operation or a reset operation, writing the data to be written only to the storage units where the currently stored data is inconsistent with the data to be written; checking whether any storage unit having a write failure exists during the set operation or the reset operation; if so, then repeating the previous steps until the writing is completed. The programming method can avoid repetitive writing, thus not only reducing write interference with a unit to improve writing efficiency of the unit, but also reducing power consumption of writing.
US10522220B2 Phase change memory device with selector MOS transistors and source line clustering
According to one embodiment, a PCM memory device includes a memory matrix having memory cells of the phase-change type organized in a plurality of word lines and bit lines. Each memory cell has a storage element and an access element including at least one MOS transistor, which is controlled to allow access to the storage element and to carry out read/programming storage operations, in which source terminals of the MOS transistors of access elements of the memory cells of the same word line are connected to the same source line. The source lines of the memory matrix are electrically short-circuited in groups. A single source line driver element for each group of source lines is configured in such a manner as to generate a respective source line driver signal in order to bias in a corresponding manner all the source lines of the respective group.
US10522214B2 Robust negative bit-line and reliability aware write assist
A reliability aware negative bit-line write assist (RA-NBL) circuit comprises a coupling capacitor to provide a negative bump for write assist, and a control input generator control charging of the coupling capacitor, such that the negative bump is high at a low voltage, and the negative bump is low at a high voltage.
US10522210B2 Apparatuses and methods for subarray addressing
Systems, apparatuses and methods related to subarray addressing for electronic memory and/or storage are described. Concurrent access to different rows within different subarrays may be enabled via independent subarray addressing such that each of the subarrays may serve as a “virtual bank.” Accessing the different rows as such may provide improved throughput of data values accessed from the respective rows being sent to a destination location. For instance, one such apparatus includes a plurality of subarrays within a bank of a memory device. Circuitry within the bank is coupled to the plurality of subarrays. The circuitry may be configured to activate a row at a particular ordinal position in a first subarray during a time period and a row at a different ordinal position in a second subarray of the plurality of subarrays during the same time period.
US10522208B1 Apparatuses and methods for drivers with reduced noise
Embodiments of the disclosure are drawn to apparatuses and methods for drivers with reduced voltage noise. Clock signals may be provided to semiconductor devices, and may be distributed throughout the device. Drivers are provided along signal paths within the device which may act as buffers for the clock signals. Each clock signal may be coupled to multiple driver circuits within the driver. Each of the multiple driver circuits may be coupled to a different pair of power supply voltage lines. The driver circuits may all have a similar delay to each other.
US10522204B1 Memory signal phase difference calibration circuit and method
A memory signal phase difference calibration circuit includes: a clock generator providing clocks allowing a physical layer (PHY) circuit of DDR SDRAM to generate a data input/output signal (DQ) and a data strobe signal (DQS) for accessing a storage circuit; a calibration control circuit outputting a phase control signal according to an adjustment range to adjust the phase of a target signal (DQ or DQS), and outputting a calibration control signal; an access control circuit reading storage data representing predetermined data from the storage circuit according to the calibration control signal; a comparison circuit comparing the predetermined data with the storage data to output a result allowing the calibration control circuit to alter the adjustment range accordingly; and a phase controller outputting a clock control signal according to the phase control signal to set the phase of a target clock used for the PHY circuit generating the target signal.
US10522200B2 Two pin serial bus communication interface
A two pin communication interface bus and control circuits are used with circuit boards, integrated circuits, or embedded cores within integrated circuits. One pin carries data bi-directionally and address and instruction information from a controller to a selected port. The other pin carries a clock signal from the controller to a target port or ports in or on the desired circuit or circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is minimal. The bus is used for communication, such as serial communication related to the functional operation of an IC or core design, or serial communication related to test, emulation, debug, and/or trace operations of an IC or core design.
US10522198B2 Semiconductor memory device
A semiconductor memory device includes a sense amplifier, a voltage supply circuit and a voltage supply control circuit. The sense amplifier may be activated by receiving driving voltages from first to third voltage supply lines to detect and amplify voltage levels of a data line and a data bar line. The voltage supply circuit may apply the driving voltages to the first to third voltage supply lines in response to first to third voltage supply signals and a bias control signal. The voltage supply control circuit may generate the first to third voltage supply signals and the bias control signal in response to an active signal.
US10522197B2 Memory device, memory system, and method of controlling memory device
In one embodiment, the method includes sensing, by a memory device, a temperature of the memory device; and generating, by the memory device, a response to a single received command. The response includes temperature information, and the temperature information provides information on the sensed temperature. In one embodiment, the single received command is a read status request command, the read status request command requests status information on the memory device, and the status information includes the temperature information.
US10522193B2 Processor with host and slave operating modes stacked with memory
A system, method, and computer program product are provided for a memory device system. One or more memory dies and at least one logic die are disposed in a package and communicatively coupled. The logic die comprises a processing device configurable to manage virtual memory and operate in an operating mode. The operating mode is selected from a set of operating modes comprising a slave operating mode and a host operating mode.
US10522191B2 Controlling fan speed based on hard disk assembly position
Embodiments of the present disclosure provide a method for managing a storage device and a storage device, the storage device including a chassis and a hard disk assembly. The method comprises: receiving a signal indicating a position of the hard disk assembly relative to the chassis, the hard disk assembly being slidably coupled to the chassis, and the signal being generated by an electromechanical element disposed on the hard disk assembly; and controlling a rotating speed of a fan based at least in part on the signal, the fan being disposed in the chassis and configured to blow wind to the hard disk assembly.
US10522181B2 High density optical recording medium having multiple recording layers
Provided is an optical recording medium including two or more recording layers, and a light irradiation surface that is irradiated with light for recording an information signal on the two or more recording layers. Among the two or more recording layers, at least one layer other than a layer located on the deepest side from the light irradiation surface includes an oxide of a metal A, an oxide of a metal B, and an oxide of a metal C. The metal A is at least one kind among W, Mo, and Zr, the metal B is Mn, and the metal C is at least one kind among Cu, Ag, and Ni. Ratios of the metal A, the metal B, and the metal C satisfy a relationship of 0.46≤x1 (provided that, x1=a/(b+0.8c), a representing an atomic ratio [atom %] of the metal A with respect to the sum of the metal A, the metal B, and the metal C, b representing an atomic ratio [atom %] of the metal B with respect to the sum of the metal A, the metal B, and the metal C, and c representing an atomic ratio [atom %] of the metal C with respect to the sum of the metal A, the metal B, and the metal C.
US10522177B1 Disc locked clock-based servo timing
Systems and methods are disclosed for timing servo operations within a channel based on a counter for a disc locked clock. In certain embodiments, an apparatus may comprise a servo channel configured to lock a frequency of a servo channel clock to a rotational velocity of a disc data storage medium, and maintain a counter of clock cycles for the servo channel clock. The servo channel may perform operations to read servo data from a servo sector on the disc data storage medium at a first counter value selected relative to a target counter value corresponding to an expected location of a servo timing mark (STM).
US10522170B2 Voice activity modification frame acquiring method, and voice activity detection method and apparatus
A method for acquiring the number of modified frames for active sound, and a method and apparatus for voice activity detection are disclosed. Firstly, a first voice activity detection decision result and a second voice activity detection decision result are obtained (501), the number of hangover frames for active sound is obtained (502), and the number of background noise updates is obtained (503), and then the number of modified frames for active sound is calculated according to the first voice activity detection decision result, the number of background noise updates and the number of hangover frames for active sound (504), and finally, a voice activity detection decision result of a current frame is calculated according to the number of modified frames for active sound and the second voice activity detection decision result (505).
US10522167B1 Multichannel noise cancellation using deep neural network masking
A system configured to improve beamforming by using deep neural networks (DNNs). The system can use one trained DNN to focus on a first person speaking an utterance (e.g., target user) and one or more trained DNNs to focus on noise source(s) (e.g., wireless loudspeaker(s), a second person speaking, other localized sources of noise, or the like). The DNNs may generate time-frequency mask data that indicates individual frequency bands that correspond to the particular source detected by the DNN. Using this mask data, a beamformer can generate beamformed audio data that is specific to a source of noise. The system may perform noise cancellation to isolate first beamformed audio data associated with the target user by removing second beamformed audio data associated with noise source(s).
US10522163B2 System for maintaining reversible dynamic range control information associated with parametric audio coders
On the basis of a bitstream (P), an n-channel audio signal (X) is reconstructed by deriving an m-channel core signal (Y) and multichannel coding parameters (a) from the bitstream, where 1≤m
US10522162B2 Signal processing apparatus, signal processing method, and program
The present technology relates to a signal processing apparatus, a signal processing method, and a program by which, in reproducing transmitted encoded data in real time, buffer overflow can be prevented from occurring on a reception apparatus side even if it is transmitted with a compression rate of the encoded data being varied in a manner that depends on communication condition. Encoded data including transmitted audio data is buffered by a reception buffer. At this time, the quantity of encoded data buffered by the reception buffer is managed in units of processing according to an encoding method. The present technology is applicable to a real-time content reproduction system utilizing a communication system.
US10522159B2 Method and device for decoding an audio soundfield representation
Soundfield signals such as e.g. Ambisonics carry a representation of a desired sound field. Methods and apparatus for improved decoding an audio soundfield representation for audio playback comprise receiving, by a processor configured to decode the audio soundfield representation, the audio soundfield representation, receiving, by the processor, a decode matrix for decoding the audio soundfield representation to determine a decoded audio signal. The decode matrix is based on an inverse of a mode matrix, and the coefficients of the mode matrix relate to information for a panning based on positions of loudspeakers over a unit sphere. The mode matrix is further based on an order N. The decoded audio signal is determined based on a multiplication of the decode matrix and the audio soundfield representation.
US10522156B2 Apparatus, method and computer program for generating a representation of a bandwidth-extended signal on the basis of an input signal representation using a combination of a harmonic bandwidth-extension and a non-harmonic bandwidth-extension
An apparatus for generating a representation of a bandwidth-extended signal on the basis of an input signal representation includes a phase vocoder configured to obtain values of a spectral domain representation of a first patch of the bandwidth-extended signal on the basis of the input signal representation. The apparatus also includes a value copier configured to copy a set of values of the spectral domain representation of the first patch, which values are provided by the phase vocoder, to obtain a set of values of a spectral domain representation of a second patch, wherein the second patch is associated with higher frequencies than the first patch. The apparatus is configured to obtain the representation of the bandwidth-extended signal using the values of the spectral domain representation of the first patch and the values of the spectral domain representation of the second patch.
US10522151B2 Conference segmentation based on conversational dynamics
Various disclosed implementations involve processing and/or playback of a recording of a conference involving a plurality of conference participants. Some implementations disclosed herein involve analyzing conversational dynamics of the conference recording. Some examples may involve searching the conference recording to determine instances of segment classifications. The segment classifications may be based, at least in part, on conversational dynamics data. Some implementations may involve segmenting the conference recording into a plurality of segments, each of the segments corresponding with a time interval and at least one of the segment classifications. Some implementations allow a listener to scan through a conference recording quickly according to segments, words, topics and/or talkers of interest.
US10522149B2 Call control system and call control method
An information processor requests a recognition result manager to transmit recording information about a call including a keyword and a recognition result of speech recognition using an extension number as a key. The manager transmits the recording information about the call including the keyword corresponding to the extension number and the recognition result of the speech recognition to the processor. The processor displays a recognition result of speech recognition of the call including the keyword on a display unit. Upon receiving an input of an instruction to perform speech playback, the processor transmits recording information in association with text displayed on the display unit to a recorder. The recorder transmits speech data corresponding to the recording information to the processor. The processor plays back speech data corresponding to the recording information.
US10522147B2 Device and method for generating text representative of lip movement
A device and method for generating text representative of lip movement is provided. One or more portions of video data are determined that include: audio with an intelligibility rating below a threshold intelligibility rating; and lips of a human face. A lip-reading algorithm is applied to the one or more portions of the video data to determine text representative of detected lip movement in the one or more portions of the video data. The text representative of the detected lip movement is stored in a memory. A transcript that includes the text representative of the detected lip movement may be generated. Captioned video data may be generated from the video data and the text representative of detected lip movement.
US10522141B2 Vehicle voice recognition including a wearable device
A system includes a wearable device including a memory and a processor. The processor receives a verbal input for a vehicle from a user. The processor interprets the verbal input to locate in the memory at least one datum predetermined to be interpretable by the vehicle computer. The processor generates a message corresponding to the verbal input including the at least one datum, and sends the message to the vehicle.
US10522139B2 Electronic device and control method thereof
According to one embodiment, an electronic device determines whether one or more devices should be controlled based on a second utterance input subsequent to a first utterance input from outside in accordance with the first utterance. The electronic device includes a management unit and a controller. The management unit prepares and manages a determination audio data item for determining whether the first utterance is a desired utterance by utterances input from outside at a plurality of times, and determines whether the first utterance is the desired utterance using the prepared and managed determination audio data item. The controller controls the one or more devices based on the second utterance.
US10522134B1 Speech based user recognition
Systems, methods, and devices for verifying a user are disclosed. A speech-controlled device captures a spoken command, and sends audio data corresponding thereto to a server. The server performs ASR on the audio data to determine ASR confidence data. The server, in parallel, performs user verification on the audio data to determine user verification confidence data. The server may modify the user verification confidence data using the ASR confidence data. In addition or alternatively, the server may modify the user verification confidence data using at least one of a location of the speech-controlled device within a building, a type of the speech-controlled device, or a geographic location of the speech-controlled device.
US10522133B2 Methods and apparatus for correcting recognition errors
Techniques for error correction using a history list comprising at least one misrecognition and correction information associated with each of the at least one misrecognitions indicating how a user corrected the associated misrecognition. The techniques include converting data input from a user to generate a text segment, determining whether at least a portion of the text segment appears in the history list as one of the at least one misrecognitions, if the at least a portion of the text segment appears in the history list as one of the at least one misrecognitions, obtaining the correction information associated with the at least one misrecognition, and correcting the at least a portion of the text segment based, at least in part, on the correction information.
US10522128B2 Sound attenuation device and method
An attenuation device for attenuating sound waves, and a corresponding system and method, generated by a source emitting sound waves having frequencies between f1 and f2 and wherein the pressure levels are between n1 and n2. The attenuation device comprising at least one acoustic absorber comprising at least one non-linear membrane; the attenuation device being configured in such a way that the first face of the absorber is in acoustic communication with the source. The attenuation device also comprises at least one coupling element for coupling the second face with the source, the coupling element being configured to transmit to the second face sound waves according to the sound waves emitted by the source, and of which the phase and/or the amplitude leads to a pressure differential of the sound waves arriving respectively on the first and second face at the same time.
US10522127B2 Conversion-to-note apparatus, electronic wind instrument and conversion-to-note method
A conversion-to-note apparatus includes: a key which is operated by a user; and a processor. The processor obtains, from a memory, first information and second information. The first information is information to associate a key operation on the key with an open/close state of a tone hole or virtual tone hole. The second information is information to associate the open/close state of the tone hole or virtual tone hole with a note. Further, the processor identifies, based on the first information, the open/close state of the tone hole or virtual tone hole for the key operation detected. Further, the processor determines, based on the second information, the note for the identified open/close state of the tone hole or virtual tone hole.
US10522126B1 Hum-cancelling system
A hum-cancelling system includes two or more hum-cancelling coils configured in a distributed manner, connected in series with each other. The hum-cancelling coils form a series circuit that is electrically connected to at least one pickup. Each hum-cancelling coil includes a top plate, a bottom plate, and a coil of wire wrapped between the top plate and the bottom plate.
US10522122B2 Music box apparatus
Provided is a novel music box device that can play music for a long time and can also suppress a thickness.The present invention relates to a music box device including: a sheet that has a playing engagement part and is rotated by a driving means; a star wheel arranged oppositely to the sheet and having two or more claws on an outer peripheral surface; and a vibration valve arranged adjacent to the star wheel. In the music box device, as the sheet is rotated by the driving means, the playing engagement part is linked with one claw to rotate the star wheel while another claw plucks the vibration valve to play music, and the sheet has a helical plate shape.
US10522114B2 Programmable controller and command cache for graphics processors
In accordance with some embodiments, a command streamer may use a cache of programmable size to cache commands to improve memory bandwidth and reduce latency. The size of the command cache may be programmably set by the command streamer.
US10522113B2 Light field displays having synergistic data formatting, re-projection, foveation, tile binning and image warping technology
Systems, methods and apparatuses may provide for technology to reduce rendering overhead associated with light field displays. The technology may conduct data formatting, re-projection, foveation, tile binning and/or image warping operations with respect to a plurality of display planes in a light field display.
US10522112B2 Systems and techniques for aggregation, display, and sharing of data
Systems and techniques for aggregation, display, and sharing of data. One or more content rules define the content of a data package. Data objects are associated with the data package based on the content rules. Each data object is also associated with a respective source channel and a respective time when the data object was made available on the associated channel. The channels correspond to different third-party communication applications. Graphic items are displayed on timelines, where each timeline is associated with a respective channel and each graphic item represents one or more of the data objects made available on the channel. Each graphic item is displayed on the corresponding timeline at a position corresponding to the one or more times associated with the data objects represented by the graphic item.
US10522107B2 Data driver and method of driving the data driver
A data driver includes shift registers, sampling latches, holding latches, and a data sensing unit. The shift registers generate sampling pulses by shifting a source start pulse in response to a source sampling clock. Each of the sampling latches receives current data and stores the current data in response to each of the sampling pulses. Each of the holding latches receives the current data stored in each of the sampling latches, and stores the received current data in response to a source output enable signal. The data sensing unit receives the current data corresponding to an i-th sampling latch of the sampling latches or an i-th holding latch of the holding latches (i is a positive integer) and previous data stored in the i-th sampling latch or the i-th holding latch, compares the current data with the previous data, and generates control data based on the comparison result.
US10522089B2 Display device
A display device has a substrate with a first pixel area and a second pixel area smaller than the first pixel area. First pixels in the first pixel area are connected with first scan lines. Second pixels in the second pixel area are connected with second scan lines. A first scan driver supplies a first scan signal to the first scan lines, and a second scan driver supplies a second scan signal to the second scan lines. A first signal line supplies a first driving signal to the first and second scan drivers. The first signal line includes first sub signal line to supply the first driving signal to the first scan driver, a second sub signal line to supply the first driving signal to the second scan driver, and a first load matching resistor connected between the first sub signal line and the second sub signal line.
US10522082B2 Organic light emitting display device and method for driving the same
Disclosed is an OLED device which is capable of preventing a source voltage of a driving transistor so as to compensate for a deterioration of an organic light emitting diode from being out of a sensing voltage range of an analog-to-digital converter, and a method for driving the same, wherein a sensing timing is controlled in such a way that the source voltage of the driving transistor sensed for a sensing mode is included within the sensing voltage range. Accordingly, it is possible to prevent the source voltage of the driving transistor from being out of the sensing voltage range of the analog-to-digital converter.
US10522081B2 Electroluminescent display capable of uniformly implementing image quality of entire screen and driving device thereof
An electroluminescent display and a driving device of the electroluminescent display are discussed. The electroluminescent display includes first and second active areas divided from a screen, a first timing controller configured to transmit the pixel data of the first active area to be displayed on the first active area to a first driving circuit writing pixel data to pixels of the first active area, a second timing controller configured to transmit the pixel data of the second active area to be displayed on the second active area to a second driving circuit writing pixel data to pixels of the second active area, and a bridge circuit configured to distribute an input image to the first and second timing controllers, detect a logo data block from the input image, and transmit the logo data block to the first and second timing controllers.
US10522079B2 Display panel, pixel driving circuit, and drving method thereof
The present application provides a pixel driving circuit, which comprises a driving transistor, a first switch, a second switch, a third switch, a fourth switch, a first capacitor, a second capacitor, an initial-voltage-signal terminal, a data-voltage-signal terminal, and a driving-voltage-signal terminal. The driving transistor comprises a gate terminal, a source terminal, and a drain terminal. The first switch is disposed between the gate terminal and the drain terminal. The gate terminal is connected with the initial-voltage-signal terminal via the second switch. The source terminal is connected with the driving-voltage-signal terminal and the data-voltage-signal terminal via the third switch and the fourth switch, respectively. The first capacitor is connected between the gate terminal and a ground terminal. The second capacitor is connected between the gate terminal and the source terminal. The present application further provides a pixel driving method and a display panel.
US10522077B2 Current integrator and organic light-emitting display comprising the same
An organic light-emitting display can include a display panel including sensing lines connected to pixels; a current integrator configured to receive current from a pixel through a sensing line connected to a first input terminal, receive a reference voltage through a reference voltage line connected to a second input terminal, and swap a path through which the current applied through the first input terminal flows and a path through which the reference voltage applied through the second input terminal is supplied; a sampling part including a first sample and hold circuit for sampling a first output voltage of the current integrator and a second sample and hold circuit for sampling a second output voltage of the current integrator, subsequent to the first output voltage, which outputs the first and second output voltages sampled by the first and second sample and hold circuits simultaneously through a single output channel.
US10522062B2 Three-dimensional display module
A three-dimensional display module includes a substrate, a display layer, a first electrode layer, a liquid-crystal layer, a second electrode layer, and a drive unit. The substrate has first electrodes and second electrodes. The display layer is disposed on the substrate and includes light-emitting elements. The first electrode layer is disposed on the display layer. The liquid-crystal layer is disposed on the display layer. The second electrode layer is disposed on the liquid-crystal layer. The drive unit drives the first electrodes and the first electrode layer to supply power to the light-emitting elements, such that the light-emitting elements generate light passing through the liquid-crystal layer to form a display image. The drive unit drives the second electrodes and the second electrode layer to produce an electric field on the liquid-crystal layer to change focal length of the liquid-crystal layer so as to control depth of field of the display image.
US10522061B2 Vehicle smart mirror system with heads-up display
In one embodiment, a vehicle mirror includes a heads-up display (HUD) projector, an on-board diagnostics (OBD) transceiver, and one or more processors. The processors access OBD data received by the OBD transceiver from an OBD port of a vehicle. The processors further determine an identification of the vehicle from the accessed OBD data and determine one or more calibration parameters for the HUD projector based on the determined identification of the vehicle. The one or more calibration parameters are operable to position a displayed image from the HUD projector onto a HUD reflector within a line-of-sight of a driver of the vehicle. The processors further send one or more instructions based on the one or more calibration parameters to the HUD projector.
US10522060B2 Cover window and display device using the same
Disclosed are a cover window in which both a folding area and a non-folding area are formed using the same kind of material, thereby matching the indices of refraction thereof with each other, having the same heat resistance, and ensuring easy surface hard coating thereof, and a display device using the same. The cover window, having at least one folding area and a non-folding area, includes a hard portion located to correspond to the non-folding area, a soft portion located to correspond to the folding area, the soft portion being flexible, and a hard coating layer configured to cover the hard portion and the soft portion.
US10522058B2 Garment badge holder
A garment generally includes a badge that can accessible from an interior of the garment and visible from an exterior of the garment. The garment includes a flap portion formed from a portion of the garment. The flap portion is folded over to form an edge that defines at least a portion of a hole formed in the garment. The garment also includes a generally transparent badge holder having a pocket operable to receive the badge. A fastener attaches the badge holder to the interior of the garment. The badge holder is attached to an interior surface of the garment so that the hole in the garment is disposed on a surface of the badge holder that is opposite the pocket.
US10522055B2 System for characterizing manual welding operations
A system for characterizing manual welding exercises and providing valuable training to welders that includes components for generating, capturing, and processing data. The data generating component further includes a fixture, workpiece, at least one calibration devices each having at least two point markers integral therewith, and a welding tool. The data capturing component further includes an imaging system for capturing images of the point markers and the data processing component is operative to receive information from the data capturing component and perform various position and orientation calculations.
US10522053B2 Speech clarity systems and techniques
Embodiments of a system and method for improving conference call speech clarity are generally described herein. A method may include receiving presenter speech from a presenter to be cast to one or more participants. The method may include transcribing the speech to text and determining a readability score of the text. The method may include displaying the readability score, using a speech clarity indicator, to the presenter used as a metric to gauge participants' understanding.
US10522049B2 Image synchronous display method and device
A synchronous displaying method and a synchronous displaying apparatus are provided. An ability to transmit at any time is possessed by intercepting screen content at regular time and performing compression, which improves transmission effects and shortens transmission time. A comparison of the intercepted screen content and intelligent determining on the synchronous image is performed by using eigenvalues parsed and obtained during image compression. In addition, synchronous transmission is realized automatically without manual operations. Moreover, the transmission of repeated screen content is avoided to the greatest extent, which reduces storage pressure on student user terminals and ensures content comprehensiveness. Further, marking and judging on the screen image content improve the efficiency of student reviews. For example, students can directly see the last few pages of each blackboard-writing during reviews.
US10522046B2 Position reporting for vehicles
In some examples, a system for transmitting a location of an ownship vehicle is configured to be mounted on the ownship vehicle and includes a positioning system configured to receive positioning signals. In some examples, the system also includes a cellular transceiver, a surveillance transceiver, and processing circuitry configured to determine a position of the ownship vehicle based on the positioning signals. In some examples, the processing circuitry is further configured to determine that the ownship vehicle is located in an identified risk volume based on the position of the ownship vehicle and to cause the surveillance transceiver and the cellular transceiver to simultaneously transmit surveillance signals and cellular signals indicating the position of the ownship vehicle in response to determining that the ownship vehicle is located in the identified risk volume.
US10522044B2 Dispatch platform for road, travel, or home assistance
The following application is related to the fields of dispatching vehicles on the basis of location; monitoring the location of vehicles belonging to a group; and/or registering the workings of vehicles communicating information to a remotely located station.
US10522042B2 Exterior mirror assembly with blind zone indication module
A vehicular exterior rearview mirror assembly includes a blind zone indication module that includes a plastic housing having a front end configured for attaching the blind zone indication module at the rear side of the mirror reflective element. When at least one light emitting diode of the blind zone indication module is electrically powered, light emitted by the light emitting diode exits the blind zone indication module via a light-transmitting portion of the front end of the plastic housing of the blind zone indication module. With the blind zone indication module disposed at the mirror reflective element, and with the light-transmitting portion of the front end of the plastic housing juxtaposed with a light-transmitting aperture of the mirror back plate, light emitted by the light emitting diode passes through the mirror reflective element.
US10522041B2 Display device control method and display device
A display control method includes displaying the detection state of a detector on a display device using an agent displayed on the display device. The detector detects a surrounding object. This method further includes determining the detection state of the detector on the basis of the detection result of the detector and setting the facial expression of the agent on the basis of the detection state of the detector.
US10522040B2 Real-time video analytics for traffic conflict detection and quantification
A video analytics algorithm, system, and method for use in real time allowing accurate, reliable, and timely warnings that facilitate traffic safety and efficiency. The system and method are readily implemented with minimal computational resources, providing broad applicability. In an embodiment, a video analytics method may include (a) obtaining a sequence of real-time images as input from a traffic monitoring system; (b) identifying a plurality of vehicles within a pre-defined region of interest; (c) tracking vehicles within the predefined region of interest; and (d) detecting a conflict event when the vehicles are located within a pre-determined maximum separation threshold based on each vehicles coordinates in a spatial-temporal domain.
US10522035B2 Navigation systems for a vehicle and an auxilliary vehicle
A navigation system for a vehicle and an auxiliary vehicle comprises a processing module configured to obtain information on an energy level of a power source in the auxiliary vehicle and determine a remaining traveling range of the auxiliary vehicle based on the energy level; and a navigation module configured to suggest at least one stop for the vehicle between a starting place and a destination based on the remaining traveling range of the auxiliary vehicle and an environment condition.
US10522034B2 Glare detection system and methods for automated vehicular control
Aspects of the present disclosure describe systems, methods, and devices for automated vehicular control based on glare detected by an optical system of a vehicle. In some aspects, automated control includes controlling the operation of the vehicle itself, a vehicle subsystem, or a vehicle component based on a level of glare detected. According to some examples, controlling the operation of a vehicle includes instructing an automatically or manually operated vehicle to traverse a selected route based on levels of glare detected or expected along potentials routes to a destination. According to other examples, controlling operation of a vehicle subsystem or a vehicle component includes triggering automated responses by the subsystem or the component based on a level of glare detected or expected. In some additional aspects, glare data is shared between individual vehicles and with a remote data processing system for further analysis and action.
US10522032B2 Driving-state data storage apparatus
In a driving-state data storage apparatus, a collector collects, from each of vehicles on a target travelling road, a value of data indicative of a driving state of the corresponding vehicle to correspondingly obtain driving-state data values for the target road. A data allocator divides, based on similarity among the driving-state data values, the target traveling road into a plurality of traveling segments, and extracts, from the driving-state data values, data values for each of the divided travelling segments. The data values extracted for each of the travelling segments are similar to each other. The data allocator allocates a distribution of the extracted data values for each of the divided travelling segments to the corresponding one of the divided travelling segments as a feature distribution. A storage unit stores the feature distribution allocated for each of the travelling segments.
US10522028B2 Method, device and storage medium for seeking help and smart footwear
The present disclosure relates to a method, a device and a computer-readable storage medium for seeking help and a smart footwear. The method includes detecting a user operation with respect to the smart footwear, and executing a help seeking operation using the smart footwear when the user operation matches a predefined alarm operation.
US10522024B2 Safety device, system and method of use
A safety device that is worn by a worker in a manufacturing facility is presented. The safety device includes a microprocessor, memory, an antenna and transceiver and a plurality of sensors that sense environmental conditions surrounding the worker such as light levels, noise levels, temperature, humidity, air quality and CO levels. The safety device also tracks the position of the worker and includes an accelerometer that detects trips and falls. The safety device also includes an event trigger which can be activated by the worker when a notable event or near miss occurs. The environmental information recorded by the safety device is used to both track accidents and near misses and is aggregated in a database for datamining purposes so as to predict future accidents and near misses. This information is also used to create correlations and better understand the root cause of accidents and near misses.
US10522022B2 User-centric event reporting with follow-up information
The invention provides a system and method for receiving hazard and event information in a mobile unit and using that information to warn a user of an event or future hazard with reference to the mobile unit's location and/or intended direction of travel. A hazard location algorithm compares a forecast location of each mobile unit with a forecast hazard and transmits a warning to each mobile unit that is predicted to encounter the hazard. As the mobile unit moves, its actual position is updated in an event center, and a revised warning is transmitted to the mobile unit as applicable. Warnings include audio warnings for playback and/or visual warnings for display on the mobile device. Users may also wirelessly report events or hazards to a central server in an event center by sending data to the event center via a wireless communications network. Secondary information may be included, based on the selected event type.
US10522018B1 Energy production system with intelligent intrusion detection
A system includes an energy production device, a tampering detection system comprising a plurality of sensors, and a control system in communication with the plurality of sensors. The control system is configured to detect a candidate for a tampering event, determine if the candidate is a tampering or a normal operational error by comparing a first order condition to a predetermined threshold, and, when the predetermined threshold is not met, comparing the candidate to a subsequent order condition until the threshold is met, and direct an undertaking of a countermeasure when the candidate is a determined tampering or undertaking a maintenance when the candidate is a determined normal operational error.
US10522014B2 Monitoring smart devices on a wireless mesh communication network
A surveillance system and method with at least one wireless input capture device ICD(s) and a corresponding digital input recorder (DIR) and/or another ICD, including the steps of providing the base system; at least one user accessing the DIR via user interface either directly or remotely; the DIR and/or ICD searching for signal from the ICD(s) and establishing communication with them, and the system providing for input capture and data transmission prioritization, thereby providing a secure surveillance system having wireless communication for monitoring a target environment with prioritization capabilities.
US10522010B2 Method and apparatus for mobile cash transportation
A device designed to validate and transport paper currency in a protected fashion. While being transported, the device monitors for tampering or break-in attempts and subsequently generates warning notifications, or sounds an alarm depending on configuration and the type of tampering detected. The transport case provides end-to-end cash accountability from a location where a bill is inserted into the case, to the bank or cash destination, where the transport case is delivered. Additionally, a docking station accessory is described in which the transport case can be securely fixed while at a point of sale.
US10522009B1 Systems and methods for automatically responding to a fire
Methods and systems for generating a response to detecting a fire on a property are provided. In certain aspects, a smart home controller (or other smart controller) may analyze data received from smart devices disposed on, within, or proximate to a property. If it is determined that a fire is present on the premises of the property, the smart home controller may determine a location of the fire as compared to the smart devices. The smart home controller may then generate and transmit instructions causing a portion of the smart devices to perform a set of actions to mitigate risks associated with the presence of the fire on the property. The smart home controller may also compare the location of the fire with a location of an occupant, and generate an escape route for the occupant. Insurance policies, premiums, or discounts may be adjusted based upon the fire response/mitigation functionality.
US10522006B2 Methods and systems for interactive gaming
A computer implemented interactive gaming tournament system includes generating match content in response to a request inquiry from a user device that is associated with a user, the match content includes payment attribute information and tournament attribute information, content is generated for the user device that includes the payment attribute information and tournament attribute information. The system includes sending a request for validation to a payment service in response to an entrance request from the user device, the entrance request includes selected tournament attribute information. The system includes sending population content based on the selected tournament attribute information in response to receiving validation content from the payment service, the validation content includes confirmation that a user account associated with the user contains funds that are equal to or greater than a fee associated with the selected payment attribute information.
US10522002B2 Systems and methods for automatically tracking tokens dropped into a drop box
Systems and methods described herein are for use with a gaming table including an opening, below which is located a drop box, and that is covered by a door when the door is in a closed position. A camera is positioned relative to the door to capture an image of tokens resting on the door. A camera trigger detects when the door is being moved from a closed position to an open position, and selectively triggers the camera to capture an image of tokens resting on the door before they drop into the drop box. Processor(s) analyze images, stored in memory, of the tokens resting on the door to determine a value of each of the tokens, calculate a total value of the tokens dropped into the drop box, and attribute to dealers a subtotal of the total value of the tokens dropped into the drop box by the dealer.
US10521992B2 Method for providing a visitor controlled access into a building
The present invention proposes a method for providing a visitor controlled access into a building. Initially, entrance identification information is provided to a mobile device of the visitor when the mobile device is in close proximity of an entrance of the building. The mobile device then sends the entrance identification information to a remote server. In response the server sends back a list of residents of the building to the mobile device based on the entrance identification information, and the mobile device presents the list of residents to the visitor. The visitor then selects a resident from the list, and subsequently a link is established between the mobile device and a remote device associated with the selected resident. Finally, access grant information is provided to an access control means adapted to control access of the visitor into the building via the entrance.
US10521990B2 Digital key system
In a digital key system, each of a digital key and a digital lock include two terminals and an electric circuit to superimpose and separate a high-frequency signal and a DC current. A microcomputer is operated by DC current supplied from a battery of the digital key through the electric circuit when the digital key is connected to the digital lock, thereby causing an NFC unit to perform communication by the high-frequency signal with the digital key through the electric circuit, read unlocking authority information from a non-contact memory, and authenticate the read unlocking authority information.
US10521989B2 Electronic access control and location tracking system
A method and system that allows authorized individuals access into controlled access locations and the ability to grant temporary and limited access to guests into these locations. The method and system allow for navigational services to be provided to members and guests, and real-time tracking and confirmation to members and administrators that guests have arrived at their destination and did not enter any unauthorized areas. The method preferably can work through a system of wireless radio, sound and/or light-based beacons communicating with member and guest's electronic devices. Members and administrators can send one or more temporary electronic access keys to a guest's smartphone or other electronic device. Wireless radio, sound and/or light-based beacons provide an access control and location tracking system with real-time data about the member and guest whereabouts, allowing for the confirmation and tracking.
US10521984B1 Challenge-response badge
Techniques described and suggested in the present document include access-card systems and methods that are resistant to attack. In certain implementations, a card reader transmits a challenge message to an access card. When the access card receives the challenge message, the access card validates the challenge message, and then generates a response message based at least in part on the information contained in the challenge message. A security server validates the response message, and when the security server determines that the response is secure, valid, and from an authorized access card, the security server grants access to a physical space. In some implementations, the challenge and response messages are digitally signed using a cryptographic key. Additional implementations include various tests that, when performed on the challenge and/or response messages detect and defeat many attempts to compromise the access-card system.
US10521983B1 Driver performance ratings
Methods, computer-readable media, software, and apparatuses that may facilitate communications to rate driver performance and provide a driver rating to a driver in a competitive manner are provided. Driver computing devices may collect drive data (e.g., vehicle telematics data) to determine whether conditions are met (i.e., whether a driver speeds, brakes hard, or drives at night). The system may generate a driver rating based on these conditions. The rating may be used in a competitive manner (such as by sharing ratings with friends) and rewards given for good performance (such as new levels for display in a social environment, or financial incentives such as charitable donation or sweepstakes entry).
US10521980B2 Method of diagnosing oil leak of engine clutch in hybrid electric vehicle
The present disclosure provides a method of diagnosing an oil leak of an engine clutch in a hybrid electric vehicle including: when the engine starts up in the hybrid electric vehicle, operating a hydraulic actuator provided in the engine clutch, wherein the hydraulic actuator is configured to perform engagement or disengagement between an engine and a motor; determining displacement of a piston provided in the hydraulic actuator and pressure for any displacement of a plurality of the displacements of the piston; calculating a pressure gradient based on the displacement of the piston and the pressure for any displacement of the plurality of the displacements of the piston; and determining the oil leak of the engine clutch based on the pressure gradient.
US10521979B2 Fleet analytic services toolset
A system for providing fleet analytic services for a fleet includes a fleet interface to receive fleet data associated with operation and maintenance of the fleet; a memory to store the fleet data; a processor to implement a plurality of fleet analytic services modules to process and analyze fleet data for opportunities to improve maintenance, operations, costs, readiness, health and supply/logistics; a user input/output interface to receive commands from a user and output results of the plurality of fleet analytic services modules.
US10521978B2 Electrical load management system
An electrical load life-cycle management and analysis system and method are disclosed. In the system and method, a database module stores electrical system configuration data and electrical system requirements, and an electrical system analysis module determines electrical system performance characteristics as a function of and based on the electrical system configuration data. In addition, an electrical system configuration management module manages at least one change to the electrical system configuration data, and compares the electrical system performance characteristics to the electrical system requirements to enable optimal performance and to provide compliance information.
US10521976B2 Vehicle data collection device and method thereof
The present disclosure relates to a vehicle data collection device and a method thereof. The vehicle data collection device includes: a data receiver configured to receive vehicle data through a vehicle network; a data collector configured to collect the vehicle data based on a collection information table and a collection status table; a storage configured to store the vehicle data; a controller configured to set a field value in the collection information table, and update the collection status table when the data collector collects the vehicle data and when the vehicle table is transmitted; and a transmitter configured to transmit the vehicle data to a head unit.
US10521973B2 System for monitoring and enforcement of an automated fee payment
A method, a computer program product, and a computer system for monitoring and enforcing an automated fee payment in an infrastructure. A mobile device on a verifier's vehicle monitors a record of a transaction of a payment on a distributed ledger. The payment is paid for using a service of the infrastructure and by a mobile device on an infrastructure user's vehicle. The mobile device on the verifier's vehicle captures information of the transaction of the payment and the infrastructure user's vehicle. The information is broadcasted by the mobile device on the infrastructure user's vehicle. The mobile device on the verifier's vehicle determines whether there is a valid transaction of the payment for the service. The mobile device on the verifier's vehicle sends a violation record to an offense reporting address of an infrastructure provider, in response to determining that there is no valid transaction of the payment.
US10521965B2 Information processing apparatus, method and non-transitory computer-readable storage medium
An information processing apparatus configured to execute an augmented reality (AR) processing, the information processing apparatus includes a display device, and a processor configured to acquire image data, detect an AR marker included in the image data, identify a content corresponding to the AR marker, and position information indicating a display position of the content in the display device, determine whether a part of the content is not within a display area of the display device, when it is determined that the part of the content is not within a display area of the display device, determine, based on attribute information of the content, whether the content is to be displayed on the display device, and when it is determined that the part of the content is to be displayed on the display device, display the content including the part of the content on the display device.
US10521964B1 Switching among disparate simultaneous localization and mapping (SLAM) methods in virtual, augmented, and mixed reality (xR) applications
Techniques for switching among disparate Simultaneous Localization and Mapping (SLAM) methods in virtual, augmented, and mixed reality (xR) applications are described. In some embodiments, an Information Handling System (IHS) may include a host processor and a memory coupled to the host processor, the memory having program instructions stored thereon available that, upon execution, cause the IHS to: identify a plurality of SLAM devices available to a virtual, augmented, or mixed reality (xR) application, wherein each of the plurality of SLAM devices implements a corresponding one of a plurality of SLAM methods; designate a primary SLAM method among the plurality of SLAM methods; and use the primary SLAM method to execute the xR application.
US10521954B2 Analysis and manipulation of panoramic surround views
Various embodiments of the present invention relate generally to systems and methods for analyzing and manipulating images and video. According to particular embodiments, the spatial relationship between multiple images and video is analyzed together with location information data, for purposes of creating a representation referred to herein as a surround view. In particular embodiments, a surround view can be generated by combining a panoramic view of an object with a panoramic view of a distant scene, such that the object panorama is placed in a foreground position relative to the distant scene panorama. Such combined panoramas can enhance the interactive and immersive viewing experience of the surround view.
US10521945B2 Text-to-articulatory movement
According to an embodiment of the present invention, a computer-implemented method for modeling text-to-articulatory movement conversion is provided. In the method, text features are generated for a plurality of texts, wherein the text feature comprises a phoneme. Articulatory features are determined for the plurality of texts from a plurality of audio signals and a plurality of visual signals, wherein the audio signals record speeches of the plurality of texts, the visual signals record three-dimensional images of an articulator when speaking the plurality of texts, and the articulatory features indicate articulatory positions of the articulator in the speeches. A text-to-articulatory movement model is established with the text features as inputs and the articulatory features as outputs.
US10521944B2 Repositioning user perspectives in virtual reality environments
Optimizations are provided for facilitating optimal viewing positions for viewing virtual objects in VR environments. Initially, user selection of a virtual object being rendered in a VR display is detected. Subsequently, an optimal viewing position is dynamically calculated based on one or more characteristic of the virtual object to be viewed. A predetermined triggering event is also detected, and in response to the predetermined triggering event, a scene which is arranged to display the selected virtual object from the optimal viewing position is rendered in the VR display.
US10521942B2 Low power virtual reality presence monitoring and notification
Systems and methods for low power virtual reality (VR) presence monitoring and notification via a VR headset worn by a user entail a number of aspects. In an embodiment, a person is detected entering a physical location occupied by the user of the VR headset during a VR session. This detection may occur via one or more sensors on the VR headset. In response to detecting that a person has entered the location, a representation of the person is generated and displayed to the user via the VR headset as part of the VR session. In this way, the headset user may be made aware of people in their physical environment without leaving the VR session.
US10521941B2 System and method for displaying virtual image through HMD device
Provided are a system and method for displaying a virtual image through a head mounted display (HMD) device. A method by which a device displays a virtual image through an HMD device includes: receiving, from the HMD device, an object image of a real space captured through a camera included in the HMD device; determining a virtual image to be displayed at a particular position around the captured object; determining an operation of the virtual image corresponding to the object and the particular position; and providing the virtual image and operation information about the determined operation to the HMD device, wherein the provided virtual image is displayed through the HMD device.
US10521940B2 Avatar-enforced spatial boundary condition
A method, apparatus, and computer product for: determining that the location of a user satisfies at least one spatial boundary condition; and in response to said determination, causing the presentation of an avatar to the user, wherein the presentation of the avatar comprises presenting an instruction given by the avatar to the user.
US10521937B2 Vector graphics based live sketching methods and systems
Vector format based computer graphics tools have become very powerful tools allowing artists, designers etc. to mimic many artistic styles, exploit automated techniques, etc. and across different simulated physical media and digital media. However, hand-drawing and sketching in vector format graphics is unnatural and a user's strokes rendered by software are generally unnatural and appear artificial. In contrast to today's hand-drawing and sketching which requires significant training of and understanding by the user of complex vector graphics methods embodiments of the invention lower the barrier to accessing computer graphics applications for users in respect of making hand-drawing or sketching easier to perform. Accordingly, the inventors have established a direct vector-based hand-drawing/sketching entry format supporting any input methodology.
US10521934B2 Method, X-ray unit and computer program product for determining a three-dimensional image data set
A method for determining a three-dimensional image data set from a plurality of two-dimensional projection images of an object under examination applies at least one morphological operation to each projection image in order to provide a processing image associated with the respective projection image. At least one respective imaging segment is segmented, in which a highly absorbent region is mapped, depending on the associated processing image, and a respective mask image is generated in which pixels belonging to the imaging segment are marked. An associated synthetic image for each projection image is determined, the image data of which within the imaging segment is set to predetermined values. The projection images and the synthetic images are separately filtered. The three-dimensional image data set is determined by backprojecting the mask images to determine a mask value for each voxel of the image data set.
US10521929B2 Determination of toolpiece position
A system for determining the location of a toolpiece, wherein: the toolpiece is carried by a tool and the tool comprises an imaging device for capturing images of the environment around the tool; and the system comprises an image processor communicatively coupled to the imaging device for receiving images therefrom and having access to one or more reference images of an expected environment, the image processor being configured to compare an image captured by the imaging device with at least one reference image to identify a match therebetween and to determine in dependence on characteristics of that match the location of the toolpiece.
US10521928B2 Real-time gesture recognition method and apparatus
Disclosed are methods, apparatus and systems for real-time gesture recognition. One exemplary method for the real-time identification of a gesture communicated by a subject includes receiving, by a first thread of the one or more multi-threaded processors, a first set of image frames associated with the gesture, the first set of image frames captured during a first time interval, performing, by the first thread, pose estimation on each frame of the first set of image frames including eliminating background information from each frame to obtain one or more areas of interest, storing information representative of the one or more areas of interest in a shared memory accessible to the one or more multi-threaded processors, and performing, by a second thread of the one or more multi-threaded processors, a gesture recognition operation on a second set of image frames associated with the gesture.
US10521926B1 Tileable non-planar structured light patterns for wide field-of-view depth sensing
A head-mounted display (HMD) system includes a projector assembly configured to emit a structured light (SL) pattern onto one or more objects in a local area, the projected SL pattern comprises at least a first SL pattern having a first field of view (FOV) corresponding to a first tileable boundary, and a second SL pattern having a second FOV corresponding to a second tileable boundary. The first and second SL patterns are projected such that the first and second tileable boundaries share at least one edge and collectively define a non-planar surface. A detector assembly is configured to capture one or more images of the one or more objects in the local area illuminated by the tiled SL pattern, such that a location of the HMD may be determined using the one or more captured images.
US10521925B1 Using multiple image verification challenges to determine object location in an image
Multiple image verification challenges can be used to identify the location of an object within an initial image. For instance, a first set of tiles is generated using the initial image. This first set is provided to a client computing device for display in a first verification challenge requesting that the user select tiles including the object. In response, a user selection of tiles of the first set is received. These selected tiles are then used to generate a second set of tiles corresponding to a sub-portion of the initial image. The second set of tiles is provided to a client computing device for display in a second verification challenge. In response to the second verification challenge, a user selection of tiles of the second set is received. This user selection of tiles of the second set is then used to determine a location of the object in the image.
US10521923B2 Part program generating device of surface texture measuring apparatus
A part program generating device includes a CAD data memory storing CAD data of a work piece, a measurement condition definer receiving an input operation performed by a user and defining a measurement procedure, and a part program generator converting the measurement procedure defined by the measurement condition definer into a part program language. The measurement condition definer provides the user with, as a graphical user interface, an editing window capable of editing the measurement procedure in an editing language and a command icon providing a command to be used for defining the measurement procedure as an icon. The command icon includes a circumvention move command icon instructing to overcome a barrier when displacing a sensor from a start point to a target point.
US10521920B2 Reducing textured IR patterns in stereoscopic depth sensor imaging
Systems, devices, and techniques related to removing infrared texture patterns used for depth sensors are discussed. Such techniques may include applying a color correction transform to raw input image data including a residual infrared texture pattern to generate output image data such that the output image data has a reduced IR texture pattern residual with respect to the raw input image data.
US10521917B2 Image processing apparatus and image processing method for object tracking
Tracking a target object to be tracked included in a plurality of consecutively captured images is performed by an image processing apparatus. The image processing apparatus comprises an image acquisition unit and a tracking unit. The image tracking unit is configured to acquire an image. The tracking unit is configured to detect a target object to be tracked included in the image by matching and acquire over a plurality of the images an amount of movement of the target object to be tracked and a direction of the movement of the target object to be tracked. The tracking unit performs first matching by using a first template corresponding to the target object to be tracked, and performs second matching by using a second template, which is different in size or shape from the first template, in a case where a score of a result of the first matching is lower than a first threshold value.
US10521915B2 Distance measurement device and distance measurement method
A distance measurement device includes a memory, and a processor coupled to the memory and configured to detect a plurality of edge lines from image data received from a camera mounted on a moving object, identify a plurality of first edge lines that are among the detected plurality of edge lines and have a characteristic of a predetermined target object, search coordinates of a second edge line located at the lowest position from among the identified plurality of first edge lines, and measure a distance from the moving object to the predetermined target object based on the searched coordinates of the second edge line and a parameter of the camera.
US10521912B2 Image processing apparatus
An image processing apparatus according to an embodiment includes processing circuitry. The processing circuitry is configured to acquire pieces of change information indicating temporal changes in computed tomography (CT) values of a myocardium and a right ventricular of a subject based on a plurality of chronologically consecutive images that are generated by an X-ray CT apparatus by scanning the subject to which a contrast agent is administered. The processing circuitry is configured to correct the piece of change information on the myocardium based on the piece of change information on the right ventricular.
US10521908B2 User interface for displaying simulated anatomical photographs
Methods and systems for generating and displaying a simulated anatomical photograph based on a medical image generated by an imaging modality. The system comprises an electronic processor configured to receive the medical image, determine an anatomical structure in the medical image, and automatically generate the simulated anatomical photograph based on the anatomical structure, wherein the pixels of the simulated anatomical photograph represent a simulated cross-sectional anatomical photograph of the anatomical structure. The electronic processor is also configured to determine a degree of confidence of a portion of the simulated anatomical photograph, compare the degree of confidence to a threshold, and, in response to the degree of confidence of the portion of the simulated anatomical photograph failing to satisfy the threshold, display the portion of the simulated anatomical photograph differently from another portion of the simulated anatomical photograph.
US10521907B2 Image processing apparatus, program, and radiation image capturing apparatus
The apparatus is equipped with an intersection identification unit configured to generate a pixel value profile which is a profile indicating relevance between a position of each pixel in a pixel array crossing a contour and a lung field of a subject and a corresponding pixel value and a moving average profile which is a profile indicating relevance between the position of each target pixel and a moving average of a corresponding pixel value and search an intersection of both the profiles located at a position where the pixel value profile surpasses the moving average profile from a direction from a rear end to a front end of the pixel array.
US10521905B2 Digital pathological slide scanning system
The present invention discloses a digital pathological section scanning system and relates to the field of a section scanning technology. The system comprises a scanning end, an image processing end, a remote server, a first client end and a second client end; wherein, the scanning end scans a pathological section to form an original pathological section image and transmits the original pathological section image to the image processing end for processing; the image processing end processes the original pathological section image to form a digital pathological section image and sends the digital pathological section image to the remote server; the first client end transmits medical record information including attending physician information to the remote server; the remote server associates the digital pathologic section image with the attending physician information and saves the digital pathological section image in the storage unit corresponding to the attending physician information.
US10521901B2 Image processing apparatus
An image processing apparatus has an image data obtaining means configured to obtain image data acquired by photographing biological tissue, a score calculating means configured to calculate a score representing severity degree of lesion of the biological tissue photographed in an image represented by the image data for each pixel based on the image data, a reliability evaluation means configured to evaluate reliability of the score based on the image data, and a score reliability calculating means configured to calculate score reliability which represents a ratio of pixels of which scores having predetermined reliability to all the pixels of the image data.
US10521894B2 Apparatus for presenting support images to a driver and method thereof
An image recognition unit recognizes an object in each image captured by a plurality of imaging devices each imaging a partial overlapped imaging region surrounding a vehicle. An image synthesis unit generates a synthesized image by partially overlapping and joining converted images viewed from preset virtual viewpoints, when an imaging region including the recognized object is an overlapping region of which any one of two imaging devices performs imaging. The image synthesis unit synthesizes each converted image area in the overlapping image regions, using a preset blend ratio when an image of the converted images which are joined to partially overlap is generated. An image-setting unit sets the blend ratio of each converted image in the overlapping image regions for recognition results of an object, and a driving support image synthesized with the set blend ratio is output to a display apparatus.
US10521893B2 Image processing apparatus, imaging system and image processing method
An image processing apparatus includes: an acquisition unit configured to acquire band images of an object, using filters of which transmission center wavelengths are different from each another; a detection unit configured to select a first band image from the band images, and detect a target region that is to be improved with respect to visibility; a selection unit configured to select a second band image, which includes information, originated from a structure of the object, within the target region, from among the band images other than the first band image; and a generation unit configured to generate a spectral image from a band image. The generation unit uses at least a band image that has been captured using a same filter as the second band image, upon generating a spectral image of the object.
US10521892B2 Image lighting transfer via multi-dimensional histogram matching
Embodiments of the present invention provide systems, methods, and computer storage media directed at relighting a target image based on a lighting effect from a reference image. In one embodiment, a target image and a reference image are received, the reference image includes a lighting effect desired to be applied to the target image. A lighting transfer is performed using color data and geometrical data associated with the reference image and color data and geometrical data associated with the target image. The lighting transfer causes generation of a relit image that corresponds with the target image having a lighting effect of the reference image. The relit image is provided for display to a user via one or more output devices. Other embodiments may be described and/or claimed.
US10521890B2 Static soiling detection and correction
A method and device for detecting image artifacts. Pixel transition values of camera images are computed in a first direction by comparing intensity differences between neighboring pixels with an upper threshold and a lower threshold and setting a corresponding pixel transition value. A low pass filter with respect to time and a spatial filter are applied to the pixel transition values. Pixels of potential artifact regions are identified by comparing magnitude values of the smoothed pixel transition values with a predetermined detection threshold.
US10521883B1 Image turbulence correction using tile approach
System and method for image turbulence correction includes: receiving a plurality of consecutive image frames; demosaicing previous, current and preceding image frames into a plurality of same size overlapping video tiles; determining a displacement of each of the video tiles; converting the video tiles of the current image frame, the previous image frame, and the plurality of preceding image frames into a frequency domain; iteratively processing the video tiles of the previous image frame, the current image frame and the plurality of preceding image frames for turbulence correction in the frequency domain; converting the turbulence corrected video tiles into a spatial domain, wherein the converted turbulence corrected video tiles form a single video frame tile including turbulence degradation correction; and mosaicing the single video frame tiles including turbulence degradation correction together to generate a full field of view turbulence correct video stream.
US10521881B1 Error concealment for a head-mountable device
In various implementations, a method includes obtaining a first frame that is characterized by a first resolution associated with a first memory allocation. In some implementations, the method includes down-converting the first frame from the first resolution to a second resolution that is lower than the first resolution initially defining the first frame in order to produce a reference frame. In some implementations, the second resolution is associated with a second memory allocation that is less than a target memory allocation derived from the first memory allocation. In some implementations, the method includes storing the reference frame in a non-transitory memory. In some implementations, the method includes obtaining a second frame that is characterized by the first resolution. In some implementations, the method includes performing an error correction operation on the second frame based on the reference frame stored in the non-transitory memory.
US10521877B2 Apparatus and method for speculative buffer reservations with cancellation mechanism
An apparatus, a method, a method of manufacturing and apparatus, and a method of constructing an integrated circuit are provided. The apparatus includes a reservation logic device that receives a plurality of primitive types in a data pipeline, wherein the plurality of primitive types includes a binning (BIN) primitive and a setup (SU) primitive; a combinatorial logic device connected to the reservation logic device; an allocation logic device connected to the combinatorial logic device; a plurality of BIN buffers connected to the reservation logic device and the allocation logic device; and a plurality of SU buffers connected to the reservation logic device and the allocation logic device, wherein the allocation logic device determines whether a primitive type is allocated to a BIN buffer or a SU buffer, wherein the reservation logic device requests a reservation of one of the plurality of BIN buffers and the plurality SU buffers based on a corresponding indication of available BIN buffers and available SU buffers and the primitive type.
US10521874B2 Method and apparatus for a highly efficient graphics processing unit (GPU) execution model
An apparatus and method are described for executing workloads without host intervention. For example, one embodiment of an apparatus comprises: a host processor; and a graphics processor unit (GPU) to execute a hierarchical workload responsive to one or more commands issued by the host processor, the hierarchical workload comprising a parent workload and a plurality of child workloads interconnected in a logical graph structure; and a scheduler kernel implemented by the GPU to schedule execution of the plurality of child workloads without host intervention, the scheduler kernel to evaluate conditions required for execution of the child workloads and determine an order in which to execute the child workloads on the GPU based on the evaluated conditions; the GPU to execute the child workloads in the order determined by the scheduler kernel and to provide results of parent and child workloads to the host processor following execution of all of the child workloads.
US10521869B2 Luggage management system
Disclosed embodiments provide techniques for managing luggage within a premises such as an airport. A group identifier is established that includes multiple travelers. Each traveler in the group has one or more pieces of luggage that are being checked at a destination airport for a flight. When the travelers arrive, the luggage is reclaimed at the baggage claim area of the arrival airport. The group identifier is associated with each piece of luggage belonging to the group. Thus, any member of the group can properly remove luggage belonging to the group from the baggage area, thereby simplifying the airport exit procedure.
US10521865B1 Structural characteristic extraction and insurance quote generation using 3D images
An insurance server for generating a quote associated with an object pictured in a three-dimensional (3D) image may be provided. The insurance server may include a processor in communication with a memory. The insurance server may be configured to receive the 3D image including the object from a structural analysis computing device, and analyze the received 3D image. The insurance server may also be configured to determine a value of the object based upon the analysis, and generate a quote associated with the object based upon the determined value of the object. The insurance server may be further configured to transmit the quote for display at the structural analysis computing device for the customer's review and/or approval.
US10521864B1 Systems and methods for using tokenized icons to provide insurance policy quotes
An insurance server for using a tokenized icon to provide an insurance quote or submit an insurance claim may include a processor programmed to receive an image from a user application, and data associated with the image, wherein at least a portion of the obtained data is associated as metadata with the tokenized icon. The processor may instruct the user application to use an icon associated with the tokenized icon as a first graphical object, and to modify, in response to an association of the first graphical object with a second graphical object in the user application, the metadata of the tokenized icon based upon data associated with the second graphical object. The processor may transmit the virtual quote or proposed insurance claim to the user application, the virtual quote or proposed insurance claim being based upon the modified metadata. As a result, the online customer experience may be enhanced.
US10521858B2 Reprice-to-block order
A reprice-to-block order and related market center and process are disclosed which automatically reprice a posted limit order to the price of a block trade executed at an inferior price on a market away from the market center that posted the limit order.
US10521857B1 System and method for identity-based fraud detection
A method for determining a likelihood of fraud associated with an input identity record is disclosed herein. The disclosed method contemplates determining characteristics of the input identity record by examining content of one or more fields of the input identity record. Historical identity records related to the input identity record may then be retrieved so as to define a set of linked identity records. The method further includes computing one or more network-based features of the set of linked identity records. A fraud score may then be generated based upon the characteristics of the input identity record and the one or more network-based features.
US10521855B2 Method, device, and computer program product for searching and displaying product images
Embodiments of the present application relate to a method and system searching for and displaying product images to a user. The method includes acquiring an initial product image set for a user, wherein the initial product image set includes a product image corresponding to a product purchased by the user, a product image characterized as interesting by the user, a product image bookmarked by the user, or a combination thereof; searching for product images that are similar in one or more characteristics to initial product images in the initial product image set; and sending found product images to be displayed to the user.
US10521852B2 Network-based grocery store
The present invention is a method and system for a network-based grocery store. The invention provides for network-based order placement, fulfillment, and delivery.
US10521850B2 Object driven newsfeed
Object driven newsfeeds supporting interest-based social networks aid in the formation of relationships based on similar domains of user interest. A space efficient graphical user interface (GUI) enables access to an object driven newsfeed of contextual and relevant information to aid a consumer/user in making buying decisions in an e-commerce environment.
US10521847B2 Method for providing occasional in-home care addressing trust and safety
Disclosed are systems, media, and methods to provide a coarse qualification process, the coarse qualification process comprising specifying filters and associated ranking characteristics for service providers, the filters comprising at least location, availability, and skills, and resolving practical concerns by displaying candidate service providers based on the filters and ranked based on the ranking characteristics; provide a qualification refinement process, the qualification refinement process comprising modifying the filters and ranking characteristics, applying the refined filters and ranking characteristics, and displaying refined candidate service providers; and provide a service provider booking process, the service provider booking process comprising resolving emotional concerns by viewing service provider video clips, wherein the time to resolve emotional concerns is less than an optimal customer review period, and resolving rational concerns by viewing service provider qualifications.
US10521845B2 Systems and methods for network product identification and service delivery
A product registration system that enables manufacturers to track products, log user interactions with the products, and provide services to those users interacting with products. This is handled by provisioning a Uniform Resource Identifier (URI), which is embedded on products a manufacturer would like to track and service. Interrogation of the URIs by users are logged and services provided over the network based on the manufacturer's needs.
US10521844B2 Computer vision product recognition
A system for computer-aided visual recognition of products may be used by a customer operating a mobile computing device having a camera. A customer can direct the camera at a targeted product for which the customer desires to purchase or learn information. Image recognition operations can be carried out to compare the captured image against images from a prepopulated product image store of known products. Upon a positive match, information regarding the identified product may be gathered and transmitted to the customer and displayed on the mobile computing device. The customer may be presented with various options regarding the identified product, including adding the product to a shopping list, a to-do list, a wish list, or other types of lists.
US10521839B2 System and method for find and deliver service
This disclosure describes systems, methods and apparatus for finding and delivering a desired item, including unique or hard-to-find items. In one example, there is provided a method that includes receiving a request to find the item and broadcasting the request. The method includes receiving responses to the broadcasted request, the responses indicating a finding of the item and including a bid to sell the item. The method includes providing purchase options for the item to a source of the request based on the received responses, and receiving, from the source of the request, a selection of a purchase option from among the purchase options provided to the source. The method includes providing instructions to a provider of the selected purchase option based on the received selection.
US10521835B2 Content viewing options when advertisements are blocked
A digital medium environment includes a content provider that receives a request for content and provides the requested content to a computing device. An improved advertisement detection method implemented by the content provider comprises determining whether the requesting computing device is blocking advertisements provided with the content. If the requesting computing device is blocking advertisements, the content provider may prevent the requested content from being displayed unless a user of the requesting device selects an alternate option for viewing the requested content. Alternate options for viewing the requested content include purchasing a subscription to the content provider, paying the content provider to view only the requested content, or enabling display of advertisements at the requesting computing device. The improved advertisement detection method protects content provider revenue streams and informs users of alternate options for viewing content from a trusted content source.
US10521821B2 Search and subscribe advertising system and methods
Search and subscribe advertising systems and methods are disclosed. An advertising system includes at least one identification, location and authentication system associated with a physical venue, each including a master sensor node connected to a broadband network channel and a plurality of sensors in the physical venue. The advertising system further includes a cloud-based advertisement service hosted by and associated with an identification, location and authentication system. The cloud-based advertisement service is communicatively coupled to the master sensor node and stores advertising data associated with the physical venue. The advertising system includes an advertising application installed on a mobile device, which transmits a search request for a local service to the cloud-based advertisement service, and receives and displays advertising data, which is selected based on the mobile device location, the physical venue location, and at least one search keyword.
US10521820B1 Systems and methods for providing transaction affinity information
In certain aspects, the disclosed implementations include methods and systems for dynamically generating and providing transaction affinity recommendation data. In certain implementations, the transaction affinity recommendation data may include information that identifies a target merchant and associated merchant promotion data that may be generated based on a dynamic analysis of transaction data corresponding to an account record. The disclosed implementations may determine temporal relationships between pairs of sequential transactions corresponding to the account record, and based on such relationships, may identify pairs of transactions involving separate merchants. The disclosed implementations may determine affinity relationships associated with one or more pairs of the temporally related transactions and a target merchant, and based on such relationships, generate and provide the transaction affinity recommendation data.
US10521819B2 Systems and methods for analytics in a cooperative data exchange
A method is provided comprising aggregating, at a first node, transactional data and a transaction identification code associated with a consumer and a transaction, and historical transactional data associated with the consumer to form a transactional profile. The method further comprises calculating, at the first node, a characteristic of the consumer based upon the transactional profile, and determining, at the first node, a business strategy for dealing with the consumer based upon the characteristic.
US10521815B1 Apparatus and method for utilizing immediate gratification promotions
An apparatus, computer program product, and method are disclosed for generating immediate gratification promotions. An example apparatus includes communications circuitry configured to receive contextual data regarding a set of consumer devices, wherein the contextual data identifies locations of each consumer device of the set of consumer devices, receive resource management data regarding a set of merchant locations, transmit, to a consumer device of the set of consumer devices, a message indicating terms of an immediate gratification promotion redeemable at a merchant location of the set of merchant locations, wherein the immediate gratification promotion comprises a promotion for which purchase automatically initiates redemption, and receive, from the consumer device, a message requesting purchase of the immediate gratification promotion. The example apparatus further includes design circuitry configured to generate the terms of the immediate gratification promotion based on the received contextual data and the received resource management data.
US10521813B2 System and method for incentives
The invention relates generally to systems and methods for the non-public creation, distribution and redemption of incentive offers. More particularly, the system and method generates incentives based on parameters selectable by merchants. The system and method constructs non-public incentive offers that are delivered to one or more program registrants satisfying a designated targeting profile and associated with one or more electronic payment instruments. Incentive offers may be redeemed confidentiality by the program registrant tendering an electronic payment instrument satisfying the parameters of the incentive offer. The invention further relates to systems and methods for participants to exert control over the volume and kind of incentives received through the system and by third party entities.
US10521812B2 Method and system for upgrading a previously purchased media asset
Systems, graphical user interfaces and methods for upgrading from one or more digital media assets to a set of digital media assets over a network are described. A potential purchaser can be notified of available upgrade opportunities that are available for purchase. The potential purchaser can elect to pursue an upgrade opportunity so as to purchase a set of digital media assets. Upon upgrading to the set of digital media assets, the digital media assets within the set of digital media assets are made available to the purchaser. According to one aspect, a graphical user interface facilitates presenting and requesting upgrade opportunities. According to another aspect, equivalency rules and/or eligibility rules can be used to control which sets of digital media assets are available for upgrade by respective potential purchasers.
US10521811B2 Optimizing allocation of configuration elements
Systems and methods for optimizing allocation of configuration elements in a service engagement. A plurality of Service Level Agreements (SLAs) corresponding to a service engagement is received. A Service Level Agreement (SLA) of the plurality of Service Level Agreements (SLAs) includes a plurality of configuration elements and a plurality of SLA compliances. A model is created by allocating a subset of the plurality of configuration elements to meet the SLA. The model is simulated to verify the plurality of SLA compliances being met by the subset allotted. Based on the simulation, a time series data indicating behavior of the model is obtained. The model is optimized to obtain an optimal allocation of the plurality of configuration elements. The model is optimized by allocating another subset of the plurality of configuration elements to meet the SLA.
US10521806B2 Blockchain-based system and method for supply chain control
A blockchain-based method includes: receiving, by a smart label via accessing a block of a blockchain stored on a computer system, a cold chain requirement for a product, wherein the smart label is affixed to a package containing the product, the cold chain requirement for the product is specified and stored by a manufacturer of the product in the block of the blockchain; storing, by the smart label, the cold chain requirement in a memory of the smart label; receiving, by the smart label, from a temperature sensor a temperature of the product, wherein the temperature sensor is affixed to the package containing the product; comparing, by the smart label, the temperature of the product with a temperature range of the product specified in the cold chain requirement; and adding, by the smart label, the temperature of the product and a time at which the temperature of the product is received by the smart label, to the blockchain, if the temperature of the product is outside of the temperature range specified in the cold chain requirement.
US10521799B1 System and method for creating automatic expiring transactions for a credit card
A system and method are disclosed in which a user engaging in an online or in-person transaction with a merchant may create automatic expiring transactions for a credit card. The user provides the credit card information to an online interface or a point-of-sale device but specifies an expiration date that is on or before the actual expiration date of the credit card, known as an artificial expiration date. A token for the merchant is generated with the artificial expiration date. The issuing bank will honor the transaction with the artificial expiration date using the merchant-specific token, and the token may continue to be used with the online merchant until the artificial expiration date.
US10521798B2 Digital financial transaction system
A method for conducting financial transactions includes storing a first set of data comprising a portion of a user's identification information. An identity of a user is unidentifiable from the portion of the user's identification information. The method also includes receiving a second set of data and sending a new pass code to a first computer system when the first set of data matches the second set of data. The method approves a transaction associated with the user in response to receiving the new pass code from a second computer system.
US10521785B1 Systems and devices controlled responsive to data bearing records
A device (12, 312, 494) operates to cause financial transfers responsive to data read from data bearing records. The device includes a reader (20, 314) that is usable to read check data from financial checks. The reader is also usable to read record document data associated with goods provided to a purchaser. At least one circuit (54, 332) of the device is operative to cause a determination to be made that check data and/or record document data corresponds to stored data. Responsive to the determination, check data and record data are made available to a payee terminal (346).
US10521775B2 Secure processing of electronic transactions by a decentralized, distributed ledger system
A method and system are provided to support a decentralized distributed ledger in which transactions are recorded by parties to the transactions without the use of a blockchain. A distributed ledger system provides a protocol framework that supports the development of protocol flows. A protocol flow is computer code that controls the performance of a transaction by the party or parties to the transaction. Protocol flows can be developed for different types of transactions. The distributed ledger system allows transactions to be proposed, accepted, and notarized by a notary and stored without the use of a blockchain ledger. The distributed ledger system can avoid the expense of the computational and storage resources needed to redundantly verify a transaction and store evidence on the many nodes of a blockchain distributed ledger.
US10521769B1 Stakeholder impact analysis and optimization
The embodiments describe computer implemented systems and methods for stakeholder analysis and classification, which may be used within knowledge ecosystems. The embodiments may include the selection and implementation of one or more stakeholder analysis models, where one or more variables describing one or more relevant stakeholder aspects may be used to assess and classify one or more stakeholders. The analysis may be used to determine the relative impact and influence of the one or more stakeholders on a project and the impact that one or more projects may have on one or more stakeholders. This analysis may consequently improve stakeholder relationships through the creation of suitable stakeholder policies.
US10521768B1 RFID loss-prevention based on transition risk
An RFID loss-prevention system (LPS) may monitor RFID-tagged items in a facility. An RFID reader transmits a first inventory command configured to cause tags in a first state to respond, receive a reply from a first tag, determine that the first tag has a low transition risk, and cause the first tag to switch to a second state. The reader may also receive a reply from a second tag, determine that the second tag has a high transition risk, and cause the second tag to remain in the first state. The reader may then transmit a second inventory command configured to cause tags in the first state to respond, receive a reply from the second tag in response to the second inventory command, determine that the second tag has inappropriately exited the facility, and issue an alert.
US10521764B1 Multiserver reconfiguration from buffer and stop controls
Multi-server control processes including receiving controls from various control memory structures, comparing the received controls, transitioning a machine state based upon those comparisons, and sending further control signals to affect the operation of one or more servers.
US10521757B2 System and method of hotel tray and trolley retrieval
A system and method of hotel tray and trolley retrieval including a notification device and a computing system wirelessly connected by a network. When in use, the notification device is assigned to a room number of a hotel room via software running on the computing system. A tray and/or a trolley is delivered to the hotel room with the notification device. The hotel patron may then activate the activation device of the notification device. The notification device then sends a wireless communication to the computing system over the network indicating that the tray and/or trolley is ready for pickup from the hotel room.
US10521756B2 Managing delivery of environmentally sensitive products
A method, executed by one or more processors, includes identifying at least one product for delivery and create a shipping manifest for the at least one product. The method includes extracting from the shipping manifest, a required amount of storage space for the at least one product and one or more environmental conditions required for storage of the at least one product at the receiving location. Furthermore, the method includes identifying a storage space location for storage of the at least one product at the receiving location, wherein the identified storage space location provides the required amount of storage space and the one or more environmental conditions required for the at least one product.
US10521753B2 Usage description language
A computer-implemented method includes incorporating a usage model in a business application hosted on a computing device. The usage model describes anticipated usages of the business application by a user and is specified using a formal machine readable language. The method includes providing an adapter configured to automatically translate the usage model in the business application to a UI profile consistent with a UI technology available on the computing device on which the business application is hosted.
US10521746B2 Recovery workflow for processing subscription orders in a computing infrastructure system
A recovery workflow related to processing the cancellation of a subscription order is determined. A request for cancelling processing of the subscription order is received. A provisioning task related to the service, a stage related to the provisioning task and a state of execution related to the provisioning task is identified. A recovery workflow is executed based on the provisioning task related to the service, the stage related to the provisioning task and the state of execution related to the provisioning task.
US10521738B2 Automated collaboration workflow generation in thing-sourcing environments
Provided is a computer system that includes a processor and a memory coupled to the processor, the memory including computer readable program code embodied therein that, when executed by the processor, causes the processor to generate a catalog that identifies a plurality of tasks that a plurality of network resources are available to perform, the network resources including Internet-of-things devices and human network resources and to generate, in response to receiving a request to perform a complex project, a solution path that includes an ordered list corresponding to selected ones of the plurality of tasks that are capable of aggregately performing the complex project, wherein the selected ones of the plurality of tasks define the solution path in an edge graph that include the plurality of tasks represented as edges therein.
US10521735B2 System for round trip engineering of decision metaphors
A testing framework associated with a decision metaphor model tool reads table profile files to generate requests for a test of a decision metaphor. The testing framework sends the requests for the test to a decision engine and receives responses for the requests for comparison against expected values and possible errors. The testing framework also outputs an output file that includes a result of the test, where the output file is formatted in a computer-displayable and user-readable graphical format.
US10521734B2 Machine learning predictive labeling system
A computing device predicts an event or classifies an observation. A trained labeling model is executed with unlabeled observations to define a label distribution probability matrix used to select a label for each observation. Unique combinations of observations selected from the unlabeled observations are defined. A marginal distribution value is computed from the label distribution probability matrix. A joint distribution value is computed between observations included in each combination. A mutual information value is computed for each combination as a combination of the marginal distribution value and the joint distribution value computed for the respective combination. A predefined number of observation vector combinations is selected from the combinations that have highest values for the computed mutual information value. Labeled observation vectors are updated to include each observation vector included in the selected observation vector combinations with a respective obtained label.
US10521730B1 Computing instance launch workflow
A technology is described for determining a launch workflow for launching multiple computing instances on a physical host in a computing service environment using a predicted launch time. An example method may include receiving a launch plan to launch a plurality of computing instances on a physical host within a computing service environment. A first launch workflow and a second launch workflow may then be determined for the launch plan where the first launch workflow and the second launch workflow may specify different sequences of operations performed to launch the computing instance on the physical host. Predicted launch times for the first launch workflow and the second launch workflow may be obtained and the predicted launch times may be compared to determine a launch workflow used in executing the launch plan.
US10521729B2 Neural architecture search for convolutional neural networks
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for determining neural network architectures. One of the methods includes generating, using a controller neural network having controller parameters and in accordance with current values of the controller parameters, a batch of output sequences. The method includes, for each output sequence in the batch: generating an instance of a child convolutional neural network (CNN) that includes multiple instances of a first convolutional cell having an architecture defined by the output sequence; training the instance of the child CNN to perform an image processing task; and evaluating a performance of the trained instance of the child CNN on the task to determine a performance metric for the trained instance of the child CNN; and using the performance metrics for the trained instances of the child CNN to adjust current values of the controller parameters of the controller neural network.
US10521727B2 System, method, and storage medium for generating hypotheses in data sets
A method for generating hypotheses in a corpus of data comprises selecting a form of ontology; coding the corpus of data based on the form of the ontology; generating ontology space based on coding results and the ontology; transforming the ontology space into a hypothesis space by grouping hypotheses; weighing hypotheses included in the hypothesis space; and applying a science-based sorting algorithm configured to model a science-based treatment of the weighted hypotheses.
US10521725B2 Systems and methods for event prediction using schema networks
A system for event prediction using schema networks includes a first antecedent entity state that represents a first entity at a first time; a first consequent entity state that represents the first entity at a second time; a second antecedent entity state that represents a second entity at the first time; and a first schema factor that couples the first and second antecedent entity states to the first consequent entity state; wherein the first schema factor is configured to predict the first consequent entity state from the first and second antecedent entity states.
US10521721B2 Generating a solution for an optimization problem
A method, system and computer program product for generating a solution to an optimization problem. A received structured set of data is analyzed with the prescriptive domains to identify one or more prescriptive domains that match the received structure set of data in data structure and/or semantic terms. A user selection of one of the presented possible prescriptive intentions from the intention templates in the identified one or more prescriptive domains that match the received structure set of data in data structure and/or semantic terms is received. A prescriptive model is then generated from the prescriptive domain containing the selected prescriptive intention. The prescriptive model is translated into a technical prescriptive model using a set of mapping rules. Furthermore, the technical prescriptive model is translated into an optimization model. The optimization model is solved and an output defining a solution from the solved optimization model is presented.
US10521720B2 Monitoring unit for the electronic monitoring of sensor signals within the framework of the monitoring of sepsis and a corresponding process
A electronic sensor signals monitoring unit (10), system and computer program, for sepsis monitoring, includes an interactive visualization status calculation monitor (M), a sensor data acquisition interface (11), acquiring time-critical status-relevant sensor signals from medical devices (G), a rule engine interface (12) to a memory or a data bank (DB) with stored rules for analyzing and processing status-relevant parameters and/or sensor signals, and a computer-assisted control unit (S), configured to dynamically control the interactive visualization on the monitor (M) and including an arithmetic unit (RW). The arithmetic unit (RW) is supplied with the acquired sensor signals via the sensor data acquisition interface (11) and is intended for the status calculation with the rules stored in the data bank (DB). The status calculation includes an overview display, a detail view and a logbook view. A display of the course of status-relevant sensor signals over time is visualized in the detail view.
US10521719B1 Systems and methods to identify neural network brittleness based on sample data and seed generation
Systems and methods for determining neural network brittleness are disclosed. For example, the system may include one or more memory units storing instructions and one or more processors configured to execute the instructions to perform operations. The operations may include receiving a modeling request comprising a preliminary model and a dataset. The operations may include determining a preliminary brittleness score of the preliminary model. The operations may include identifying a reference model and determining a reference brittleness score of the reference model. The operations may include comparing the preliminary brittleness score to the reference brittleness score and generating a preferred model based on the comparison. The operations may include providing the preferred model.
US10521717B2 Representation of weight values in an artificial neural network using inter-group indexing
A computer-implemented method for representation of weight values in an artificial neural network using inter-group indexing may include, in an artificial neural network that includes neurons and synaptic connections between the neurons with each of the synaptic connections including a weight, arranging the weights in ascending order. The method may also include dividing the arranged weights into groups based on approximately linear patterns of the weights. The method may further include designating a base group and the other groups as dependent groups. The method may also include storing in memory values of the weights in the base group. The method may further include storing in the memory a group index for each of the dependent groups. The method may also include storing in the memory an index for each of the weights in the dependent groups corresponding to one of the weights in the base group without storing in the memory values of the weights in the dependent groups.
US10521716B2 Computer-assisted analysis of a data record from observations
Computer-assisted analysis of a data record from observations is provided. The data record contains, for each observation, a data vector that includes values of input variables and a value of a target variable. A neuron network structure is learned from differently initialized neuron networks based on the data record. The neuron networks respectively include an input layer, one or more hidden layers, and an output layer. The input layer includes at least a portion of the input variables, and the output layer includes the target variable. The neuron network structure outputs the mean value of the target variables of the output layers of the neuron networks. Sensitivity values are determined by the neuron network structure and stored. Each sensitivity value is assigned an observation and an input variable. The sensitivity value includes the derivative of the target variable of the assigned observation with respect to the assigned input variable.
US10521714B2 Multi-compartment neurons with neural cores
Embodiments of the invention provide a neural core circuit comprising a synaptic interconnect network including plural electronic synapses for interconnecting one or more source electronic neurons with one or more target electronic neurons. The interconnect network further includes multiple axon paths and multiple dendrite paths. Each synapse is at a cross-point junction of the interconnect network between a dendrite path and an axon path. The core circuit further comprises a routing module maintaining routing information. The routing module routes output from a source electronic neuron to one or more selected axon paths. Each synapse provides a configurable level of signal conduction from an axon path of a source electronic neuron to a dendrite path of a target electronic neuron.
US10521713B2 Methods and apparatus for automatic dentification wristband
An apparatus for automatic radio-frequency identification (RFID). In an embodiment, the apparatus comprises a flexible strap comprising a plurality of holes and a buckle configured to buckle to any one of the plurality of holes, such that, when the buckle is buckled to one of the plurality of holes, the strap forms a closed loop. The apparatus further comprises one or more tag enclosures. Each tag enclosure comprises one or more buckles and a RFID tag configured to communicate identifying data to a reader device. The one or more buckles of each tag enclosure are each configured to buckle to any one of the plurality of holes on the strap such that the tag enclosure may be attached to the strap at any one of a plurality of positions on the strap.
US10521712B2 Antenna, method of manufacturing the antenna, and wireless IC device
An antenna includes first and second radiation portions including one lead wire that is folded back into a loop shape to define a folded-back portion and that includes a first power feed portion at a first end and a second power feed portion at a second end. The lead wire portion extending toward the folded-back portion and the lead wire portion extending through the folded-back portion are close enough to each other near each of the first and second power feed portions in the first and second radiation portions, respectively, to be electromagnetically coupled to each other. The power feed portions of the antenna are coupled to a wireless IC chip. The power feed portions may be coupled to a feed circuit in a feed circuit board coupled to a wireless IC.
US10521707B2 Printing apparatus for adjusting width of object and printing method
A printing apparatus includes a reception unit that receives outline information representing an outline of a character, a generation unit that generates, using the outline information, a bitmap including pixels corresponding to the character, the pixels being associated with a graphic attribute, a changing unit that refers an attribute associated with a pixel adjacent to one of the pixels corresponding to the character, and changes a density value of the adjacent pixel associated with the referred attribute being different from a graphic attribute and a character attribute to a density which is based on a density value of the one pixel, and a printing unit that prints an image based on the bitmap after the change.
US10521698B2 Global visual vocabulary, systems and methods
Systems and methods of generating a compact visual vocabulary are provided. Descriptor sets related to digital representations of objects are obtained, clustered and partitioned into cells of a descriptor space, and a representative descriptor and index are associated with each cell. Generated visual vocabularies could be stored in client-side devices and used to obtain content information related to objects of interest that are captured.
US10521696B2 Convolutional neural network system and operation method thereof
An operation method of a convolutional neural network system includes executing convolution loops to determine a correlation between at least one kernel and an input feature map; determining a maximum position on the input feature map, the maximum position corresponding to a maximum value of an output feature produced based on the convolution loops; and processing first data of a first area of the input feature map through a convolution loop using the at least one kernel, the first area being associated with the maximum position. The processing of the first data includes skipping a convolution operation of second data of a second area of the input feature map, the second area being unassociated with the maximum position.
US10521681B1 Method for determining correct scanning distance using augmented reality and machine learning models
A smart device is provided with an application program for displaying a video feed received from the smart device's camera. The application can determine the coordinates for an intersection point, which is a point on the ground where the smart device is pointing at. The application can display a target on the visual representation of the intersection point. Based on whether the smart device is at an appropriate distance from the intersection point, the user interface can superimpose an indicator on the video feed received from the camera. This can inform the user whether the smart device is at an optimal scan distance from the intersection point (or an object) so that the object can be identified by a machine learning model.
US10521679B2 Human detection device, human detection system, human detection method, and human detection program
A human detection device comprises an image acquiring unit configured to acquire an image captured by an imaging device, a human detecting unit configured to detect a human from the acquired image, a ground contact position identifying unit configured to identify a ground contact position of the human on the basis of a lower end portion of the detected human, a feature portion extracting unit configured to extract a feature portion of the detected human, a ratio calculating unit configured to calculate a ratio of the feature portion on the basis of a vertical size of the detected human and a vertical size of the extracted feature portion and a correction determining unit configured to determine whether the identified ground contact position is to be corrected on the basis of the identified ground contact position or the calculated ratio.
US10521678B2 Vision system and method for a motor vehicle
A vision system (10) for a motor vehicle including an imaging system (11) adapted to capture images from a surrounding of the motor vehicle and a data processing device (14) establishing an object detector (15) adapted to detect an object in images captured by the imaging system (11) through image processing. The object detector (15) includes a wheel detector (20) adapted to detect a wheel (22; 27), a wheel-like structure, or a characteristic part thereof, of another vehicle.
US10521675B2 Systems and methods of legibly capturing vehicle markings
A system and method for legible capture of vehicle identification data includes video cameras and a computer. Recording attributes such as gain, gain shutter speed, and white balance are adjusted throughout ranges to maximize the likelihood of capturing at least one frame in which characters, such as those on the license plate, are legible. Successful capture of a legible frame may trigger storage of the data, while unsuccessful capture may trigger additional scans.
US10521671B2 Methods and systems of spatiotemporal pattern recognition for video content development
Providing enhanced video content includes processing at least one video feed through at least one spatiotemporal pattern recognition algorithm that uses machine learning to develop an understanding of a plurality of events and to determine at least one event type for each of the plurality of events. The event type includes an entry in a relationship library detailing a relationship between two visible features. Extracting and indexing a plurality of video cuts from the video feed is performed based on the at least one event type determined by the understanding that corresponds to an event in the plurality of events detectable in the video cuts. Lastly, automatically and under computer control, an enhanced video content data structure is generated using the extracted plurality of video cuts based on the indexing of the extracted plurality of video cuts.
US10521670B2 Video content summarization and class selection
A system includes a plurality of summarization engines, each summarization engine to receive video content, via a processing system, and to provide a summary of the video content, thereby providing a plurality of summaries of the video content. The system includes a plurality of meta-algorithmic patterns, each meta-algorithmic pattern to be applied to at least two of the summaries to provide, via the processing system, a meta-summary of the video content using the at least two summaries, thereby providing a plurality of meta-summaries of the video content. The system includes an evaluator to evaluate the plurality of summaries and the plurality of meta-summaries and to determine similarity measures of the video content over each given class of a plurality of classes of video content, and to select a class of the plurality of classes based on the determined similarity measures.
US10521663B1 Iterative image position determination
Herein is disclosed an image location iteration system comprising one or more processors configured to receive from one or more unmanned aerial vehicles a plurality of images and corresponding detected positions; determine an alignment of the plurality of images according to one or more image features; calculate a first set of measured locations for the plurality of images according to the alignment and the detected positions; and calculate a second set of measured locations the plurality of images according to the alignment and a first subset of the detected positions.
US10521660B2 Image processing method and image processing device
The image processing method includes a luminance value information obtaining step of obtaining effective radiance values from a subject, and an image generating step of generating a picture image as a set of unit regions each of which has a luminance value obtained by at least partially removing a regular reflection light component on a surface of the subject from the effective radiance values.
US10521656B2 Method and system for assessing similarity of documents
Systems and methods for assessing similarity of documents are provided. Embodiments of the systems and methods include extracting a reference document text from a reference document, extracting an archived document text from an archived document, and quantifying the reference document and the archived document. The systems and methods may also include determining a document similarity value of the quantified reference document and the archived document. Determining the document similarity value includes calculating a set of vector similarity values for a set of combinations of a reference document text vector and an archived document text vector, and calculating the document similarity value, including a sum of the plurality of vector similarity values.
US10521655B1 Generating and provisioning of additional content for biased portion(s) of a document
Implementations described herein determine, for a given document generated by a given source, one or more portions of content (e.g., phrase(s), image(s), paragraph(s), etc.) of the given document that may be influenced by bias of the given source. Further, implementations determine one or more additional resources that are related to the given source and that are related to the portion(s) of content of the given document. Yet further, implementations utilize the additional resource(s) to determine additional content that provides context for the portion(s) that may be influenced by bias. A relationship, between the additional resource(s) and the portions of the given document, can be defined. Based on the relationship being defined, the additional content can be caused to be rendered at a client device in response to the client device accessing the given document.
US10521654B2 Recognition of handwritten characters in digital images using context-based machine learning
Methods and apparatuses are described for of recognizing handwritten characters in digital images using context-based machine learning. A server captures an image of a document that comprises one or more handwritten data fields, the document associated with a user identifier. The server identifies a field type for each handwritten data field in the image. The server creates a pixel intensity array for each character in each handwritten data field and determines whether a user-specific character map exists for the user identifier. If a map exists, the server retrieves the map and generates digital form data by executing a user-specific handwriting classifier using the map, the pixel intensity arrays, and the field types. If a map does not exist, the server builds a map based upon the pixel intensity arrays and generates digital form data by executing a baseline handwriting classifier using the map, the pixel intensity arrays, and the field types.
US10521653B2 Image processing device, image processing method, and storage medium
The present invention is directed to reducing a calculation amount for human body detection to achieve high speed processing. Detection processing is executed to detect a predetermined object in an image captured by an image capturing unit. When the predetermined object is detected using a pattern having a predetermined size, a partial area of the image is excluded from a processing region in which the detection processing of detecting the predetermined object is executed using the pattern having the predetermined size, based on a position at which the predetermined object is detected.
US10521651B2 High definition camera and image recognition system for criminal identification
A system for high definition (HD) image recognition of criminals is disclosed. The system includes a plurality of cameras, an image recognition server, investigator user devices, a computing device, a database, and a network. At least one processor of the image recognition server is configured to receive a plurality of photographs of a first individual, perform image processing of the plurality of photographs to extract a first set of physical features, store feature data regarding the first set of physical features in the database, receive suspect data regarding a suspected individual from a first investigator user device, match the suspect data with the feature data stored in the database, and transmit an alert to the computing device in the prison, wherein the alert activates a mobile application on each investigator user device to display match data identifying the suspected individual as the first individual based on the feature data.
US10521646B2 Monitoring shelves with pressure and light sensors
A system for monitoring planogram compliance on a store shelf is disclosed. The system may include a plurality of detection elements and a processor. The processor may be configured to receive first signals from a first subset of detection elements after a plurality of products are placed on the store shelf, and use the first signals to identify at least one pattern associated with a product type of the products. The processor may further be configured to receive from a second subset of detection elements second signals indicative of no products being placed on at least one area of the store shelf, and use the second signals to determine at least one empty space on the store shelf. The processor may also be configured to determine, based on the at least one pattern and the at least one empty space, at least one aspect of planogram compliance.
US10521641B2 Secure human fingerprint sensor
Devices, systems, and techniques are provided for performing human fingerprint detection and authentication for authenticating a request to access a locked mobile device equipped with a fingerprint detection module. In one aspect, responsive to detecting a contact from an object with the fingerprint detection module, described technique can be used to determines whether the contact from the object is from human skin. When determined that the detected contact from the object is from human skin, a presence of a human fingerprint can be detected from the object making contact. The detected fingerprint data can be obtained from the object and compared against stored fingerprint profiles associated with an authorized user of the locked mobile device. Based on the comparing, the request to access the locked mobile device can be granted.
US10521634B2 System and method for switching between hands-free and handheld modes of operation in an imaging reader
A method and apparatus for switching an optical imaging reader between a hands-free mode and a handheld mode using two or more tactile sensors, both of which are actuated by cutaneous contact in order to switch from the hands-free mode to the handheld mode, and which switches from the handheld mode to the hands-free mode if one of the tactile sensors is no longer actuated by cutaneous contact.
US10521633B2 Multi-level distribution and tracking systems and methods
A multi-level distribution and tracking system is described. Processing equipment processes multi-level distribution items, the multi-level distribution items being associated with first, second, and third level entities. The multi-level distribution items include a computer readable code thereon. The processing equipment captures an image of the multi-level distribution item, reads a computer readable code associated with the first level entity, sender information for the second level entity, and destination address information for the third level entity. The processing equipment generates tracking information based on the processing of the multi-level distribution item, and can send the tracking information to the first level entity.
US10521632B2 Multi-level distribution and tracking systems and methods
A distribution item includes a first item with a container having an outer surface defining an enclosed space. A computer-readable code is disposed on the outer surface. The computer-readable code is associated with a first level entity. The first item also includes destination information associated with a second level entity disposed on the outer surface. The distribution item also includes one or more second items removably positioned within the enclosed space of the first item. Each of the one or more second items includes the computer-readable code associated with the first level entity.
US10521630B2 Imaging reader for, and method of, reading a target by image capture through a sealed window integrated with an optical system
A window environmentally seals an imaging reader operative for reading a target by image capture. An integrated optical system having one or more optical elements is formed of one-piece construction with the window for optically modifying an aiming light and/or an illuminating light passing through the optical elements.
US10521628B2 Barcode scanner with PCB
A barcode scanning apparatus that includes a single printed circuit board (PCB) is disclosed. The apparatus includes a housing having a head portion and a handle portion. The handle portion extends generally along a handle axis. The single PCB extends along a PCB plane and is positioned at least partially within the housing. The apparatus includes an image sensor having a plurality of photo-sensitive elements that form a substantially flat surface. The single PCB may have a first portion and a second portion, where the image sensor is positioned on the first portion and is further positioned to capture light entering the housing through a window of the head portion. The apparatus includes a frame positioned at least partially within the housing, where the frame includes an oblique angle formed between a front portion and a rear portion, where the PCB is secured by or to the frame's rear portion.
US10521627B2 RFID module for through boundary location accuracy
A method and data processing device for detecting and tracking objects in a space. The method includes transmitting an inquiry signal that traverses into the space, which is behind a physical barrier and is pre-configured with a plurality of radio frequency identification (RFID) tags. The method includes transmitting, via a RFID module, a second signal at a second frequency range. The method includes monitoring for a RFID response signal, which is a backscatter signal generated in response to the second signal impinging on the RFID tag and one or more objects in the space. The method includes identifying and extracting an interference reflection signal from the response signal to determine a presence of an unknown object. The method includes tracking the unknown object within the space and providing more specific position data of the unknown object within the space, to a display of an electronic device.
US10521622B2 Test card for automated retail financial transaction system
In some embodiments, apparatuses and methods are provided herein useful to a test card for use in automated testing of a POS terminal. In some embodiments, the test card comprises a substrate including at least one track, wherein the substrate is configured to interact with a magnetic card reader, an electrical contact configured to receive magnetic stripe data from a database, and an electrical trace, wherein the electrical trace is programmable with respect to the received magnetic stripe data, wherein the electrical trace forms a continuous conductive pathway, wherein the electrical trace forms a stair step configuration comprising a plurality of linear segments including a first set of linear segments and a second set of linear segments, wherein the second set of linear segments includes at least one segment, and wherein the at least one segment connects ones of the first set of linear segments.
US10521621B2 POS device
The present invention relates to a POS device, the POS device (1) having improved characteristics, largely comprising: a saving device attachment/detachment structure (100); a card reader bidirectional mounting structure (200); a display frame (300) integrally formed with an input/output port mounting portion; and a hinge-coupling structure (400).
US10521619B2 Method and RFID reader for obtaining a backscatter modulated receive signal
The disclosed subject matter relates to a method for obtaining a backscatter modulated receive signal in an radio-frequency identification (RFID) system, comprising the steps: providing a carrier wave by a local oscillator; generating a transmit signal based on the carrier wave and an input signal; transmitting said transmit signal; receiving a backscatter modulated receive signal; and combining the receive signal with a cancel signal; wherein the method further comprises the step of determining a phase shift and an amplitude adjust from the corrected receive signal; wherein the determined phase shift is applied as a phase rotation when generating the transmit signal; and wherein the cancel signal is based on the un-shifted carrier wave and the determined amplitude adjust. The disclosed subject matter further relates to an RFID reader configured to perform said method.
US10521616B2 Remote re-enrollment of physical unclonable functions
As a PUF device ages, the response characteristics of the device change. Thus, mappings made on the original PUF outputs can drift and become invalid. Re-enrollment or re-mapping of hidden values to PUF response characteristics can resolve the changing nature of the PUF. Unfortunately, an adversary may tamper with the PUF during re-enrollment compromising security of the PUF. Accordingly, techniques of securely and remotely re-enrolling a PUF device are described. During an initial enrollment of the PUF device, multiple sets of enrollment values of the PUF device can be generated. For remote re-enrollment, a first initial set of enrollment values can be used to authenticate the PUF device. Upon authentication using the first initial set, the PUF device can re-enroll the PUF device and account for changes in PUF characteristics. A second set of initial enrollment values can then be used to verify that the PUF device is unaltered.
US10521612B2 Hybrid on-premises/software-as-service applications
Provided is a process, including: obtaining, within a trusted computing environment, data comprising confidential values and non-confidential values; replacing, within the trusted computing environment, the confidential values with obfuscated identifiers; sending, from the trusted computing environment, into an untrusted computing environment, an obfuscated representation of the data; transforming, in the untrusted computing environment, the obfuscated representation of the data; sending, from the untrusted computing environment, the obfuscated transformed data into the trusted computing environment; and replacing, within the trusted computing environment, obfuscated identifiers in the obfuscated transformed data with confidential values.
US10521607B2 Contextual content sharing in a video conference
A method, a system, and a computer program product for contextually sharing content with at least one receiving participant during a video conference. The method includes identifying content to be shared by a sharing participant within a shared space of the video conference that is viewable by the at least one receiving participant. The method further includes determining at least one sharing parameter that defines participant access to view the content and determining sharing credentials for each receiving participant of the video conference. The method further includes comparing the at least one sharing parameter to the sharing credentials of each receiving participant to individually determine which receiving participants are authorized to view the content. The method further includes, in response to the comparison indicating that a receiving participant is not authorized to view the content, omitting or rendering the content unreadable within the shared space for the unauthorized receiving participant.
US10521605B1 Tagging and auditing sensitive information in a database environment
Access to sensitive information in a database can be restricted to improve security and enable efficient auditing. A security engine receives a request from a requesting entity to access data in the database and determines that the requested data includes sensitive information. In response to the requesting entity being authorized to access the data, the security engine retrieves the requested data from the database and modifies the retrieved data by modifying metadata of the retrieved data to include a tag indicating that the retrieved data includes sensitive information. The security engine provides the modified data to the requesting entity and modifies a data access log to identify each attempted access to the modified data. When sensitive data is requested, an interface can include an obscuring element, requiring a user to manually select the element to view the data, enabling the logging of the explicit access request by the user.
US10521603B2 Virtual reality system for providing secured information
A virtual reality (VR) or augmented reality (AR) system can be implemented for providing secured access to information and that is navigable using head or eye movements. The system can provide a three-dimensional environment that includes scenes with information that is available to all of the scenes and with secured information from an external source. Head or eye movements can allow a user to make selections, insert commands, etc. Security features can prevent a third party from viewing the secured information.
US10521602B2 System and method of encrypting folder in device
Provided are a system and method of encrypting a folder in a device. The device for controlling access to the folder includes a communication part configured to transmit, to a server, an encryption key generation request with respect to the folder, and receive, from the server, an encryption key associated with the folder that is generated in response to the encryption key generation request, wherein the encryption key generation request includes an identification of the folder and authentication data of a user who accesses the folder is an authorized user; and a controller configured to authenticate the user by using the encryption key.
US10521601B2 System and method for data governance
A system for determining information about a resource. The system includes a profiler to generate a targeted subset of users for at least one selected resource according to at least one of: a pre-defined goal and usage statistics of the resource with respect to the goal; an addresser to request from the subset of users information regarding the goal and a collector to collect and analyze the information and to update attributes of the resource according to the information.
US10521598B2 System and method for autonomous or remote controlled destruction of stored information or components
A system and method are provided for the destruction of electronically stored information and/or components that incorporated sensitive technology or that contain sensitive information upon the occurrence of one or more predetermined events. The system and method of the present invention is particularly suited for the safeguarding of electronically stored information and/or classified technology in systems deployed in an operational environment. The system and method of the present invention be incorporated into drones, full size aircraft, any type of vehicle, mines, missiles, torpedos, bombs, phones, cameras, robots, satellites or other spacecraft, computers, hard drives, thumb drives, switches, routers, bugs, brief cases, safes, and generally any device that utilizes components on which sensitive data is stored or components that utilize technology that should only be accessed by authorized personnel.
US10521594B2 Verifying proper operation of the instruction execution protection architecture
A computer-implemented method includes executing one or more tests on a computing device. The computing device has Instruction Execution Protection (IEP), and each test of the one or more tests includes selectively setting one or more IEP bits of one or more page tables, where each IEP bit prevents code in a respective storage block from being executed. During the one or more tests, an IEP exception is detected, by a computer processor, each time an attempt is made to execute code in a storage block for which a respective IEP bit is set. Test results of the one or more tests are determined based on the detecting. A remedial action is performed in response to the test results of the one or more tests.
US10521593B2 Security assessment incentive method for promoting discovery of computer software vulnerabilities
In one aspect, the disclosure provides: A method comprising: assessing a plurality of researchers as a precondition for receiving an invitation to be a researcher of a distributed plurality of researchers, resulting in the distributed plurality of researchers wherein each researcher is associated with one or more tags in records that identify the researcher for one or more attributes; inviting a subset of the distributed plurality of researchers to participate in one or more computer vulnerability research projects directed to identifying computer vulnerabilities of one or more computers that are owned or operated by a third party, the subset of the distributed plurality of researchers selected based on the one or more tags in records that identify the researcher and a description of the computer vulnerabilities of the one or more computers; using a computer that is communicatively coupled to a particular researcher among the subset of the distributed plurality of researchers and a network under test among the one or more computers, monitoring communications between the particular researcher and the particular third party computer, wherein the communications relate to attempting to identify a candidate security vulnerability of the particular third party computer; in response to a report of the candidate security vulnerability of the particular third party computer that is received from the particular researcher, evaluating the report of the candidate security vulnerability.
US10521592B2 Application translocation
In one embodiment, a software application that is downloaded from an untrusted source is marked, based on the untrusted classification of the source, to be translocated when the software application is launched. When the software application is launched it is translocated, through a mirroring file system, to a random mount point that is a partial bind mount to the real file system that stores the image of the software application (e.g. the image of the software application's bundle).
US10521590B2 Detection dictionary system supporting anomaly detection across multiple operating environments
A detection dictionary system provides a framework for describing, detecting, and reporting anomalies across multiple operating environments each including multiple computing devices. An anomaly in an operating environment refers to one or more operations or activities in the operating environment that may be indicative of an attack on the operating environment by a malicious user or program. The framework includes guarantees, detections, properties, and detection instances. Guarantees are promises or assertions made to an entity (e.g., a business or other organization) that describes what the detection dictionary system will detect and alert on when a particular trend or anomaly is identified. A detection is a set of metadata describing how to fulfill a given guarantee. A property describes how to map the detection to a particular detection instance. A detection instance is a specific implementation of a detection as applied to a property.
US10521587B1 Detecting code obfuscation using recurrent neural networks
A method includes generating an index representation of characters of code of a given file and mapping the index representation to a vector space providing contextual representation of the characters utilizing an embedding layer of a recurrent neural network (RNN). The method also includes identifying one or more code features in the mapped index representation utilizing at least one hidden layer of the RNN, detecting sequences of the identified code features in the mapped index representation utilizing a plurality of memory units of a recurrent layer of the RNN, and generating a classification result for the given file based on the detected sequences of code features utilizing one or more classification layers of the RNN. The method further comprises utilizing the classification result to determine if the given file contains code of a designated code type, and modifying access by a given client device to the given file responsive to the determination.
US10521586B2 Secured comparative processing method
The invention relates to a secured comparative processing method of the type in which a processor of an electronic component compares a set of proof data received by the processor as an input with main secret data stored in said electronic component, characterised in that the processor executes, in parallel with the comparison with the secret data, a series of complementary operations on the set of proof data which generate on the electronic component a variation in behaviour which is a function of the proof data which the component receives as an input and which is added to the variation in behaviour linked to the comparison with the main secret data, the series of complementary operations including a series of base operations repeated K times, and the execution of said series being preceded by an adjustment of execution parameters of said series, the parameters including: the identifier of the series of base operations to be executed, the series of base operations being comprised within a set of predefined base operations, and the number K of executions of the set of base operations, the set of adjusted execution parameters being specific to the set of proof data received by the electronic component.
US10521583B1 Systems and methods for remote detection of software through browser webinjects
Computer-implemented methods and systems are provided for the detection of software presence remotely through the web browser by detecting the presence of webinjects in a web browser that visits a detection webpage. The methods can include delivering a detection webpage to a web browser, in which the detection webpage has detection code configured to detect a presence of the webinject in the detection webpage; and inspecting, by the detection code, rendering of content of the detection webpage in the browser to detect webinject content in the detection webpage by the webinject, the webinject content including one or more Hypertext Markup Language (HTML) components. The method can further include, if webinject content is detected, generating a fingerprint for each of the one or more HTML components; transmitting the one or more fingerprints to an external server; and classifying, by the external server, the webinject based on the one or more fingerprints.
US10521582B2 Integrated robotics and access management for target systems
An access management robot facilitation system facilitates a robot to execute access management tasks on a target system.
US10521581B1 Web client authentication and authorization
Systems, methods, and apparatus for authenticating and authorizing clients. A client certificate is used to authenticate and authorize a client (or user). When the client certificate is received, the certificate is authenticated. If the certificate is valid, a username included in the certificate is used to authorize the client. This may be done based on privileges or permissions associated with the user name. Once the client or user is authenticated and authorized, operations requested by the client can be performed as long as permitted by the privileges or permissions.
US10521578B2 Authentication using prism member
A prism member of an authentication apparatus includes a living body contact surface in contact with a visible light-radiated living body, and an imaging surface opposed to the living body contact surface and formed at a position in generally parallel therewith. The prism member includes a reflection surface in contact with the living body contact surface and the imaging surface, and to totally reflect light reflected off from the living body contact surface toward the imaging surface. The reflection surface is at an angle such that light from an inside of the prism member is totally reflected at the living body contact surface in an optical path running from the imaging surface and reaching the living body contact surface via the reflection surface. A first imaging unit captures an image including at least a part of said body contact surface and at least a part of the reflection surface.
US10521577B2 Method for unlocking screen of terminal having fingerprint identification sensors and terminal
A method and a terminal for unlocking a screen of a terminal having fingerprint sensors are provided. The method includes the following. A press instruction on a designated unlocking area of the terminal is acquired. A press interrupt request is initiated according to the press instruction and fingerprint data are collected at a press position corresponding to the press instruction. The fingerprint data are compared with fingerprint verification data pre-stored in the terminal. Based on a determination that the fingerprint data and the fingerprint verification data are matched, a screen interface of the terminal is enabled and the screen of the terminal is lit up when a response instruction of the press interrupt request is received.
US10521574B2 Portable electronic device
The present invention relates to a portable electronic device and corresponding method allowing control of a remotely positioned electronic arrangement, allowing for improved user convenience and security improvements when combining gesture identification with fingerprint authentication.
US10521572B2 Systems and methods for improving KBA identity authentication questions
Certain implementations include systems and methods for improving knowledge-based-authentication (KBA) identity authentication questions. A method is provided that includes receiving a set of identity information associated with a subject; querying one or more databases; receiving personally identifiable information; determining, from the personally identifiable information, at least one subject characteristic; producing, with a predictive model and based on the personally identifiable information and on the at least one subject characteristic, at least one knowledge based authentication (KBA) identity proofing question having a personally identifiable correct answer; sending, for display on a first computing device associated with the subject, the at least one KBA identity proofing question; receiving, responsive to the sending, a response answer; and responsive to a match between the response answer and the personally identifiable correct answer, sending, for display on the first computing device associated with the subject, a first indication of authentication.
US10521567B2 Digital image processing for element removal and/or replacement
Techniques and systems are described to support digital image processing through use of an image repository, e.g., a stock image database or other storage. In one example, a plurality of candidate digital images are obtained from an image repository based on a target digital image. A plurality of transformations are generated to be applied to the target digital image, each transformation based on a respective candidate digital image. Semantic information is employed as part of the transformations, e.g., blending, filtering, or alignment. A plurality of transformed target digital images are generated based at least in part through application of the plurality of transformations to the target image.
US10521561B1 Electronic compliance system and associated methods
An electronic drug compliance monitoring system and associated methods utilize a pill having an electronic transmission capability and external means for receiving that transmission to sense the presence of the pill in the patient's body or digestive tract.
US10521560B2 Method and system for remote medication management, audit and compliance system
A remote medication management system for monitoring remote access to medication interfaced with a medication dispensing apparatus includes: a container database configured to store container records related to physical containers stored in the medication dispensing apparatus, each including inventory data entries related to medication stored therein, each inventory data entry including a medication identifier; an input device configured to receive a specific medication identifier; a detection module configured to detect access to a specific physical container stored in the medication dispensing apparatus; a querying module configured to identify a specific container record related to the accessed specific physical container; a determination module configured to determine that the specific medication identifier is not included in any of the inventory data entries included in the identified specific container record; and a memory configured to store a data entry in an event log related to the access to the specific physical container.
US10521558B2 Systems and methods for delivering remedy frequencies
A method of providing a remedy is described. The method includes: (i) receiving, from a client device, answers to one or more of sets of questions that are relevant to one or more ailments and/or one or more unique expressions of the ailments; (ii) grading the answers using one or more remedy appropriateness values to produce graded answers, and wherein an remedy appropriateness value quantifies clinical importance of a remedy with respect to a question that is answered; (iii) scoring one or more remedies based on the graded answers to arrive at one or more remedy scores and identifying one or more top remedies that have high remedy scores; (iv) choosing, from a library of frequency files, one or more frequency files that correspond to one or more of the top remedies; and (v) presenting the frequency file as a remedy to the client device.
US10521553B2 Method, system and computer program for determining the porosity of a flexible porous structure subjected to deformation
A method, system and computer program are provided for determining the porosity of a flexible porous structure when it is subjected to deformation. The method performs the following steps by processing representative data of the flexible porous structure: a) generates a first function (Fs) defining how the flexible porous structure changes shape when it is subjected to deformation; b) generates a second function (Fp) defining how a covered surface of the flexible porous structure changes when it is subjected to changes in shape, wherein the second function (Fp) is directly linked with porosity of the flexible porous structure; c) obtains reference porosity values of a reference region (CU-R) of the flexible porous structure in a reference configuration via the first function (Fs); and d) calculates the porosity of at least one deformed region (CU-D) of the flexible porous structure, from said reference porosity values and from the second function (Fp).
US10521543B1 Systems and methods for estimating the future electrical resistance of a wire of a partially routed net
Disclosed herein are embodiments of systems, methods, and products for dynamically determining and rendering a target resistance of a partially routed net between two circuit devices in an integrated circuit (IC) design and automatically resizing a wire segment being edited in real time based on the target resistance such that the fully routed net satisfies the maximum resistance constraint. Therefore, the embodiments disclosed herein simplify the circuit designer's job and improves design productivity. Unlike conventional systems, an EDA tool disclosed herein does not have to route the full net between two circuit devices to run design rule checking (DRC). Thus, the EDA tool does not require multiple iterations of fully routing a net and checking for DRC violations such that the maximum resistance constraint is not violated.
US10521534B2 Simulation circuit apparatus and method for simulating electrical load for use in testing power control device
A simulation device for simulating a peripheral circuit arrangement that can be connected to a control device, wherein the simulation device can be electrically connected to the control device, and the simulation device has a first control element for influencing a first simulation current that can be passed from a first load terminal of the control device to a first control element output of the first control element. The first control element contains a first multistage converter that includes a first converter output, which is electrically connected to a terminal on the converter side of a first inductive component at whose terminal on the control device side the first control element output is implemented. A direction of flow of the first simulation current is reversible, and the simulation device also includes a computing unit for execution of model code.
US10521532B1 Segmented memory instances
Various implementations described herein refer to a method. The method may include selecting a target memory instance to characterize for timing file generation, determining a number of segments for the target memory instance based on user defined accuracy, and partitioning the target memory instance into the number of segments based on a physical architecture of the target memory instance. The method may also include generating test-bench data based on the number of segments and simulating the test-bench data, obtaining simulation data for the target memory instance associated with each segment in the number of segments, and generating a timing file by reporting timing data for each segment in the number of segments.
US10521530B2 Data-dependent delay circuits
A method of designing a logic circuit with data-dependent delays is performed using an electronic design automation system. The logic circuit includes logic paths from logic inputs to at least one logic output. The method includes: obtaining an initial circuit design; specifying respective delays for multiple logic paths in the initial circuit design such that at least some of the outputs switch at different times within a clock cycle for different combinations of logic input levels; and forming a second circuit design having the specified respective delays along the respective logic paths by adding delay elements to the initial circuit design based on the specified respective delays.
US10521529B2 Simulation method for mixed-signal circuit system and related electronic device
A simulation method for a mixed-signal circuit system includes: detecting a plurality of registers and a clock signal included in the mixed-signal circuit system; performing a timing analysis converting operation upon a circuit block coupled between any two register of the plurality of registers to obtain a converted circuit system; and performing a Static Timing Analysis operation upon the converted circuit system; wherein when the circuit block is convertible into a combinational circuit block, the timing analysis converting operation includes: converting the circuit block to the combinational circuit block, wherein the combinational circuit block is logic gate-level.
US10521523B2 Computer simulation of animal training scenarios and environments
A method is described herein that comprises selecting a training objective, wherein the training objective comprises an objective to teach an animal to perform a behavior in an environment. The method includes testing the animal to determine a profile. The method includes identifying an optimal training product for the animal based on the profile. The method includes identifying an optimal training protocol for the animal based on the profile. The method includes simulating an experience of teaching the animal the behavior in a virtual training environment using the optimal training product and the optimal training protocol, the simulating including one or more applications running on a computing device for providing a virtual training environment, wherein the virtual training environment mimics the environment.
US10521521B2 Shared repository of simulation models
A system simulates a process entity. Software instructions stored on a memory device and executable by a processor create a plurality of entity type objects that generically represents a type of process entity. Instructions store the plurality of entity type objects in a shared repository. Additionally, instructions enable a plurality of users to access the plurality of entity type objects in the shared repository simultaneously.
US10521520B2 Highly scalable cluster engine for hosting simulations of objects interacting within a space
A highly scalable cluster of computing nodes simulates large numbers of objects interacting in a space defined by an octree of cubical elements. Each cube of the octree is enclosed within a corresponding padding sphere. Interacting objects are quickly identified by determining which of the padding spheres are candidate spheres that satisfy an interaction criterion, considering candidate objects located in the cubes that correspond to the candidate spheres, and determining which of the candidate objects meet the interaction criterion. The computing workload can be efficiently parallelized among nodes of the cluster by assigning the objects to the nodes in approximately equal numbers, each node being responsible for managing the objects assigned thereto. Inter-node data traffic can be minimized by reassigning frequently interacting objects to the same node. The cluster can be scaled simply by adding more nodes to the cluster, and redistributing the objects equally among the nodes.
US10521514B2 Interest notification apparatus and method
An apparatus for notification of speech of interest to a user includes a voice analyzer configured to recognize speech, evaluate a relevance between a result of the speech recognition and a determined user's topic of interest, and determine whether to provide a notification; and an outputter configured to, in response to the voice analyzer determining to provide the notification, generate and output a notification message.
US10521512B2 Dynamic text-to-speech response from a smart speaker
A method of operating a situationally aware speaker associated with a virtual personal assistant (VPA) service provider that comprises receiving an indication of at least one parameter of an environment proximate the situationally aware speaker, and delivering the response to the vocal query to the user formatted as speech through an audio output of the situationally aware speaker, at least one audio parameter of the response set based on the indication of the at least one parameter.
US10521511B2 Text conversion and representation system
Disclosed is a method of phonetically encoding a text document. The method comprises providing, for a current word in the text document, a phonetically equivalent encoded word comprising one or more syllables, each syllable comprising a sequence of phonemes from a predetermined phoneme set, the sequence being phonetically equivalent to the corresponding syllable in the current word, and adding the phonetically equivalent encoded word or the current word at a current position in the phonetically encoded document. Each phoneme in the phoneme set is associated with a base grapheme that is pronounced as the phoneme in one or more English words.
US10521506B2 Memory preserving parse tree based compression with entropy coding
A method, computer program product, and system includes a processor obtaining data including values and generating a value conversion dictionary by applying a parse tree based compression algorithm to the data, where the value conversion dictionary includes dictionary entries that represent the values. The processor obtains a distribution of the values and estimates a likelihood for each based on the distribution. The processor generates a code word to represent each value, a size of each code word is inversely proportional to the likelihood of the word. The processor assigns a rank to each code word, the rank for each represents the likelihood of the value represented by the code word; and based on the rank associated with each code word, the processor reorders each dictionary entry in the value conversion dictionary to associate each dictionary entry with an equivalent rank, the reordered value conversion dictionary comprises an architected dictionary.
US10521503B2 Authenticating a respondent to an electronic survey
This disclosure generally covers systems and methods that, in some embodiments, provide an electronic survey template for creating a user customizable electronic survey including authentication features. Those authentication features include, in some embodiments, authenticating questions with elements that capture a digitally drawn signature, digital image, fingerprint, or voiceprint. Certain embodiments of the disclosed systems and methods provide a graphical user interface comprising an electronic survey template with a menu of survey question types, including an option to create authenticating questions within the electronic survey template. Some embodiments of the disclosed systems and methods also provide functions and features that allow users to preview a customized electronic survey template as an interactive electronic survey or to preview individual electronic survey questions as interactive electronic survey questions.
US10521501B2 Apparatus and method for editing table in terminal
An apparatus and a method for editing a table in a terminal which can edit a table intuitively and easily are provided. The apparatus includes a display unit that simultaneously displays a row number adjusting UI and a column number adjusting UI in a table editing mode, and a controller that performs a control so that a plurality of handlers are displayed on the table when the table displayed in a specific application is selected, a conversion to the table editing mode is performed when a specific handler among the plurality of handlers is selected, and respective UIs that can adjust the number of rows and the number of columns of the table in the table editing mode are simultaneously displayed.
US10521498B2 Systems and methods for managing suggested edits in a collaborative document editing environment
A document editor may manage suggested edits in a collaborative document. The document editor may instantiate a document model associated with the collaborative document. When a first editing suggestion is received for the collaborative document, a first suggestion command is associated with the first editing suggestion based on a type of the first editing suggestion and a type of the document model. The document editor may apply the first suggestion command on the document model to present the first editing suggestion within the collaborative document. When an acceptance indication for the first editing suggestion is received, the document model can be updated with the first suggestion command in response to the received acceptance indication.
US10521497B2 Maintaining semantic information in document conversion
The present disclosure is directed toward systems and methods for maintaining semantic information in a document from a web page. For example, one or more embodiments described herein encode unique colors into an HTML DOM associated with a web page prior to passing the HTML DOM through an existing rendering engine. In response to receiving a color-coded graphical objects representative of the HTML DOM, systems and method described herein apply the original semantic attributes of the web page into the graphical objects based on the unique color encoding.
US10521495B2 Authenticated access to accredited testing services
A service control system controls access to secured online testing services, such as accredited or standardized tests, examinations in educational courses, tutoring services, and continuing professional development courses or seminars. The secured services may be published by an educational publishing platform and made available to users through online configured browser applications executing on the users' devices. Based on access conditions associated with a secured testing service and the capturing and processing of one or more images, the service control system determines how users are authorized to access the services. When users have been authorized to access a service or a subset of the service, the service may be distributed through the browser applications executing on the users' devices.
US10521489B2 Machine learning to predict numerical outcomes in a matrix-defined problem space
Systems and methods for predicting feature values in a matrix are disclosed. In example embodiments, a server accesses a matrix, the matrix having multiple dimensions, one dimension of the matrix representing features, and one dimension of the matrix representing entities. The server separates the matrix into multiple submatrices along a first dimension, each submatrix including all cells in the matrix for a set of values in the first dimension. The server provides the multiple submatrices to multiple machines. The server computes, using each machine, a correlation between values in at least one second dimension of the matrix and a value for a preselected feature in the matrix, the correlation being used to predict the value for the preselected feature based on other values along the at least one second dimension. The server provides an output representing the computed correlation.
US10521488B1 Dynamic partitioning
A matrix computation unit includes a systolic array of cells arranged along a first and second dimension, in which the systolic array of cells includes a first multiple of cells, each cell of the first multiple of cells including: a weight register configured to store a weight input; multiple activation registers, each activation register of the multiple activation registers configured to store a corresponding activation input; multiplexer circuitry communicatively coupled to the multiple activation registers and configured to select, from the multiple activation registers, one of the activation inputs as a selected activation input; and multiplication circuitry communicatively coupled to the weight register and to the multiplexer, in which the multiplication circuitry is configured to output a product of the weight input and the selected activation input.
US10521485B1 Measuring page value
Techniques and solutions for measuring web page value are described. For example, web page content information for a web page can be obtained. The web page can be decomposed into web page content components based on the web page content information. Content types can be determined for the web page content components. The web page content components can be weighted based on the content types and/or based on other criteria. Web page resources can be obtained in advance for web pages and/or content components based on the weights.
US10521484B1 Typeahead using messages of a messaging platform
A method and system for facilitating typeahead. The method can include: identifying a set of topics and/or connected accounts; storing, based on one or more signals associated with a user account, a portion of the topics and/or connected accounts in a cache; and using the cache to provide typeahead suggestions to a client in response to a request associated with the user account.
US10521482B2 Finding members with similar data attributes of a user for recommending new social connections
Methods, systems, and computer programs are presented for recommending new connections based on profile similarity and existing interconnections within a social network. One method includes an operation for detecting a request for new connections for a member of the social network, where the profile of the member includes values for certain attributes. Additionally, the method includes operations for identifying members that have at least one equal attribute to the attributes of the member, and for calculating a connection score for each identified member based on the respective values of the identified members attributes. Members are selected from the identified members based on the connection scores, and a ranking score for each selected member is obtained utilizing a machine learning algorithm that utilizes similarity analysis of the attributes to calculate the ranking score. The selected members are presented to the member as the possible new connections based on the ranking scores.
US10521479B2 Evaluating semantic interpretations of a search query
The present disclosure relates to evaluating different semantic interpretations of a search query. One example method includes obtaining a set of search results for a particular search query submitted to a search engine; obtaining a set of semantic interpretations for the particular search query; obtaining, for each semantic interpretation of the set, a canonical search query; generating a modified search query based at least in part on the particular search query and the canonical search query for the semantic interpretation; obtaining a set of search results for the modified search query for the semantic interpretation; and determining, for each semantic interpretation of the set, a degree of similarity between (i) the set of search results of the modified search query for the semantic interpretation, and (ii) the set of search results for the particular search query.
US10521477B1 Optimized location identification
Disclosed are various embodiments for optimizing location searches using geohash codes. A common prefix for a plurality of geohash codes associated with a respective one of a plurality of bounding boxes is identified, wherein each of the plurality of bounding boxes represents a geographic area. A location identifier from another computing device is received. A geohash code based at least in part on the location identifier is identified. The geohash code is then compared with the common prefix for each of the plurality of bounding boxes. Next, a list of common prefixes that match the geohash code. A list of respective geographic areas is returned to the other computing device based at least in part on the list of common prefixes.
US10521476B2 Dynamically updatable offline grammar model for resource-constrained offline device
An offline semantic processor of a resource-constrained voice-enabled device such as a mobile device utilizes an offline grammar model with reduced resource requirements to parse voice-based queries received by the device. The offline grammar model may be generated from a larger and more comprehensive grammar model used by an online voice-based query processor, and the generation of the offline grammar model may be based upon query usage data collected from one or more users to enable a subset of more popular voice-based queries from the online grammar model to be incorporated into the offline grammar model. In addition, such a device may collect query usage data and upload such data to an online service to enable an updated offline grammar model to be generated and downloaded back to the device and thereby enable a dynamic update of the offline grammar model to be performed.
US10521473B2 Shortest path computation in large networks
Embodiments disclosed herein provide systems, methods, and software for determining the shortest distance between vertices in relatively large graphs. In an embodiment a method includes identifying an original graph comprising a plurality of nodes and a plurality of edges, identifying a plurality of hub nodes from within the original graph, creating a hub matrix comprising the plurality of hub nodes and the shortest distance between the plurality of hub nodes, and determining a shortest distance between the at least two nodes using the original graph and/or the hub matrix.
US10521471B1 Method for using extracted features to perform an action associated with selected identified image
Methods and systems to perform methods comprising receiving, at a computer system from a first electronic device a first electronic media work; extracting one or more features therefrom; determining that at least a portion of the first electronic media work corresponds to a first reference media work based on a matching of the extracted features against a database of reference features; receiving, from a second electronic device, a query related to the first electronic media work; linking the query to action information in an action database based upon determining that at least a portion of the first electronic media work corresponds to the first reference media work; generating machine-readable instructions associated with the action to be performed based at least in part on the linking of the query to the action information; transmitting, to the second electronic device, the machine-readable instructions; and logging an event associated with the machine-readable instructions.
US10521467B2 Using cinematic techniques to present data
The present invention extends to methods, systems, and computer program products for using cinematic techniques to present data. Embodiments of the invention can be used to infer and generate cinematic techniques or combinations thereof based on a model and user action. Cinematic techniques can be used to meet the data exploration and analysis requirements of a user. As such, embodiments of the invention permit users (including non-programmers) to employ cinematic techniques (possibly in combination with other techniques) to gain insights into their data and also convey appropriate emotional messages.
US10521466B2 Data driven natural language event detection and classification
Systems and processes for operating a digital assistant are provided. In accordance with one or more examples, a method includes, at a user device with one or more processors and memory, receiving unstructured natural language information from at least one user. The method also includes, in response to receiving the unstructured natural language information, determining whether event information is present in the unstructured natural language information. The method further includes, in accordance with a determination that event information is present within the unstructured natural language information, determining whether an agreement on an event is present in the unstructured natural language information. The method further includes, in accordance with a determination that an agreement on an event is present, determining an event type of the event and providing an event description based on the event type.
US10521465B2 Deep reinforced model for abstractive summarization
A system for text summarization includes an encoder for encoding input tokens of a document and a decoder for emitting summary tokens which summarize the document based on the encoded input tokens. At each iteration the decoder generates attention scores between a current hidden state of the decoder and previous hidden states of the decoder, generates a current decoder context from the attention scores and the previous hidden states of the decoder, and selects a next summary token based on the current decoder context and a current encoder context of the encoder. The attention scores penalize candidate summary tokens having high attention scores in previous iterations. In some embodiments, the attention scores include an attention score for each of the previous hidden states of the decoder. In some embodiments, the selection of the next summary token prevents emission of repeated summary phrases in a summary of the document.
US10521450B2 Distributed storage system with replica selection
Replicas are selected in a large distributed network, and the roles for these replicas are identified. In one example, the role of voting is assigned to a number of computing clusters. To make this selection, a task assigning service finds a candidate leader and M computing clusters to be used as voters. This selection may be based on finding latencies between the M computing clusters and the leader.
US10521449B1 Cross-region replication architecture
One or more computing nodes located in a first region may maintain a first collection of data items. A second set of one or more computing nodes in a second region may maintain a collection of data items that is at least a partial replica of the first collection. Notifications of changes to the first collection may be transmitted, via a broadcast communications channel, to a replication module, which may be included in a client application. The replication module may transmit requests to update the second collection of data based on changes to the first collection. Conflicts may be resolved through a last-write wins policy.
US10521448B2 Application of actionable task structures to disparate data sets for transforming data in the disparate data sets
Transformation pipelines are applied to disparate data sets and domains. An existing transformation pipeline is configured as a stored actionable task structure with a predefined plurality of sequenced tasks for transforming a first data set having a first set of attributes into a modified data set. The existing transformation pipeline is then applied to a different data set having a different set of attributes. Compatibility and operability for implementing the tasks of the actionable data set on the second data set are then determined, based at least in part on the stored attributes of the tasks and the second data set. Interface elements are also utilized to reflect the compatibility and operability of the tasks in the visual representation of the actionable task structure. Some elements are also utilized to provide suggestions for improving the compatibility of the actionable task structure.
US10521442B1 Hierarchical value-based governance architecture for enterprise data assets
An apparatus in one embodiment comprises at least one processing platform accessible to a plurality of user devices over at least one network. The processing platform implements a hierarchical value-based governance system for data assets of an enterprise. The hierarchical value-based governance system comprises a data asset governance controller, a technical metadata hub, a business metadata hub and a data asset catalog. The data asset catalog is coupled to the technical metadata hub and the business metadata hub and provides integrated technical metadata and business metadata for each of a plurality of the data assets of the enterprise. The data asset governance controller is configured to generate analytics actions for one or more analytics workspaces based at least in part on the integrated technical metadata and business metadata of the data asset catalog. The analytics actions may comprise visualizations providing actionable insights into the corresponding data assets.
US10521441B2 System and method for approximate searching very large data
The invention provides efficient searching with fuzzy criteria in very large information systems. The technique of the present invention uses the Pigeonhole Principle approach. This approach can be utilized with different embodiments, but the most effective realization would be to amplify some already given intrinsic approximate matching capabilities, like those in the FuzzyFind method [1][2]. Considering the following problem, data to be searched is presented as a bit-attribute vector. The searching operation includes finding a subset of this bit-attribute vector that is within particular Hamming distance. Normally, this search with approximate matching criteria requires sequential lookup for the whole collection of the attribute vector. This process can be easily parallelized, but in very large information systems this still would be slow and energy consuming. The present invention provides approximate search in very large files using the Pigeonhole Principle, circumvents the sequential search operations and reduces the calculations tremendously.
US10521440B2 High performance data profiler for big data
A method for profiling a dataset includes: querying, by a data profiler executed on a distributed computing system, a metadata storage to obtain table information; allocating, by the data profiler, system resources based on the obtained table information; profiling, by the data profiler, the dataset to obtain profiling results, wherein profiling the dataset includes shuffling and repartitioning data blocks of the dataset with respect to a plurality of nodes of the distributed computing system, and computing aggregates based on the shuffled and repartitioned data blocks; and outputting, by the data profiler, the profiling results.
US10521439B2 Method, apparatus, and computer program for data mining
One or more data mining processes may be executed based on control parameters to discover a plurality of result patterns in a data set. The discovered result patterns are presented to a user. Information on one or more selected result patterns, where the selection involves the user's subjective interest, is received. The control parameters are automatically updated based on the received information on the selected result patterns.
US10521437B2 Resource portfolio processing method, device, apparatus and computer storage medium
The invention provides a resource portfolio processing method, device, apparatus, and computer storage medium. The method comprises: acquiring search popularity ratings to which respective network resources belong, based on search volume data of the respective network resources in a network resource portfolio; evaluating the portfolio value of the network resource portfolio to obtain an evaluation result, based on the search popularity ratings to which the respective network resources belong; determining whether or not the network resource portfolio needs to be adjusted based on the evaluation result. The technical solutions of the invention solves the problem of how to determine whether it is necessary to adjust a network resource portfolio so as to facilitate the timely adjustment of the network resource portfolio and give full play to the advantages of network resources.
US10521435B2 Scaling dynamic authority-based search using materialized subgraphs
A method that includes generating, in a query pre-processor, a set of pre-computed materialized sub-graphs by executing a pre-processing dynamic random-walk based search for a bin of terms. The method also includes receiving, in a query processor, a search query having at least one search query term. In response to receiving the search query, the method includes accessing the set of pre-computed materialized sub-graphs. The accessing includes accessing a text index based on the search query term to retrieve a corresponding term group identifier and accessing the corresponding pre-computed materialized sub-graph based on the term group identifier. The method also includes executing a dynamic random-walk based search on only the corresponding pre-computed materialized sub-graph and based on the executing, retrieving nodes in the dataset and transmitting the nodes as results of the query.
US10521434B2 Population of context-based data gravity wells
A computer system includes processors that execute instructions stored on storage media to sort data using a data gravity well membrane. When executed, the program instructions: convert raw data into a first logical address that describes metadata about a first payload data; compare the first logical address to a second logical address for a second payload data to derive a Hamming distance between the first and second logical addresses; create a data vector for the second payload data that includes the Hamming distance between the first and second logical addresses; sort data vectors into specific data gravity wells on a data gravity wells membrane according to the Hamming distance stored in the data vector; incorporate a context object and a non-contextual data object into the data vector for the second payload data; and sort the second payload data into specific data gravity wells on the data gravity wells membrane.
US10521431B2 Relational conversion of multiprovider operations in a calculation scenario for executing a query
A calculation engine of a database management system is described. In an exemplary implementation, the calculation engine receives a calculation scenario. The calculation scenario includes one or more relational operations and one or more non-relational operations of a multiprovider, the multiprovider utilizing a plurality of database partitions. The calculation engine processes the one or more non-relational operations via the multiprovider. After processing the one or more non-relational operations, the calculation engine converts the one or more relational operations. This converting comprises filtering first data from the plurality of partitions to form second data and forming third data by performing a union operation on the second data. Thereafter, the third data is filtered to form fourth data. Related systems, methods, and articles of manufacture are also described.
US10521429B2 Interactive graphical system for estimating body measurements
Utilizing graphical elements representing human bodies to estimate physical measurements of a user is described. In at least one example, a service provider can access a database storing a plurality of data items. The service provider can cause a set of data items of the plurality of data items to be presented to the user. Data items in the set of data items are associated with at least one graphical element representing a human body with individual magnitudes corresponding to individual dimensions of a plurality of dimensions. The service provider can receive data indicating a selection of a data item associated with a first magnitude associated with a first dimension and a second magnitude associated with a second dimension. The service provider can estimate physical measurements associated with the user based partly on a first magnitude and/or the second magnitude.
US10521425B2 Generating faster and efficient database query execution plans
A computer-implemented method of generating faster and more efficient database query execution plans includes receiving a database query, generating an optimized query execution plan, and initiating execution of the optimized plan. Database can include table columns with associated column dictionaries. Database query can have statements with conditions. Generating the optimized query execution plan involves comparing contents of a column dictionary semantics of the statements, omitting statements which will always be TRUE and omitting conditions which will always be FALSE. Related apparatus, systems, techniques, methods and articles are also described.
US10521422B2 Question pre-processing in a question and answer system
Mechanisms are provided for assembling natural language user inputs into questions for a question-and-answer (QA) system. The mechanisms initialize a timer to a threshold amount of time, receive a first input of content-bearing natural language from a user computing device, and initiate running of the timer in response. The mechanisms determine whether a second input of content-bearing natural language is received from the user computing device prior to the threshold amount of time being reached by the timer. If so, the second input is grouped with the first input to generate a question comprising content of both the first input and the second input, and the timer is reset. In response to the timer reaching the threshold without further input from the user computing device, the question is provided to the QA system as an input question for processing by the QA system.
US10521421B2 Analyzing search queries to determine a user affinity and filter search results
According to embodiments of the present invention, machines, systems, computer-implemented methods and computer program products for retrieving information pertaining to an affinity of a user are provided. In some embodiments, a search query is received from a user. The search query is analyzed to determine a bias of the user. The social media activity of the user is evaluated to determine affinity indicators for the user. Prior searches and selection of search results by the user is evaluated to detect patterns of the user. An affinity of the user is determined based on the bias, affinity indicators, and patterns. Initial search results are generated that satisfy the search query, and the initial search results are filtered based on the determined affinity of the user to produce search results in accordance with the determined affinity of the user.
US10521420B2 Analyzing search queries to determine a user affinity and filter search results
According to embodiments of the present invention, machines, systems, computer-implemented methods and computer program products for retrieving information pertaining to an affinity of a user are provided. In some embodiments, a search query is received from a user. The search query is analyzed to determine a bias of the user. The social media activity of the user is evaluated to determine affinity indicators for the user. Prior searches and selection of search results by the user is evaluated to detect patterns of the user. An affinity of the user is determined based on the bias, affinity indicators, and patterns. Initial search results are generated that satisfy the search query, and the initial search results are filtered based on the determined affinity of the user to produce search results in accordance with the determined affinity of the user.
US10521419B1 Identifying an issue associated with data
A data intelligence platform may include a role-based workbench component configured to control access to or use of the data intelligence platform to identify an issue associated with data associated with an organization. The data intelligence platform may include a data intelligence component configured to: process the data to identify the issue related to the data, or perform a set of actions related to fixing the issue related to the data based on a result of processing the data. The data intelligence platform may include a data management component configured to facilitate access to a corpus component or to a source of the data. The data intelligence platform may include the corpus component configured to facilitate processing of the data to identify the issue or to perform the set of actions.
US10521416B2 Incrementally retrieving data for objects to provide a desired level of detail
A computer-implemented method is provided, for retrieving data and metadata according to a data harvesting criteria into an indexed repository, comprising providing a user interface allowing a user to define data harvesting criteria for adjusting a subset of data and metadata on an indexed repository. Responsive to a user utilizing the user interface by defining the data harvesting criteria, the subset of data and metadata on the indexed repository is adjusted according to the data harvesting criteria.
US10521415B2 Method and system for providing weighted evaluation
Systems and methods are disclosed for providing weighted evaluation. The system may comprise one or more processors and a memory storing instructions that, when executed by the one or more processors, cause the system to obtain a plurality of data point groups, obtain an inbound rank of each data point group based on one or more inbound ranks of one or more data groups linking to the data point group, obtain an outbound rank of the each data point group based on one or more outbound ranks of one or more data groups linked from the each data point group, obtain a group rank of the each data point group based on the inbound rank and the outbound rank of the each data point group, and process the data point groups according to the corresponding group ranks.
US10521413B2 Location-based recommendations using nearest neighbors in a locality sensitive hashing (LSH) index
Software for a website hosting short-text services creates an index of buckets for locality sensitive hashing (LSH). The software stores the index in an in-memory database of key-value pairs. The software creates, on a mobile device, a cache backed by the in-memory database. The software then uses a short text to create a query embedding. The software map the query embedding to corresponding buckets in the index and determines which of the corresponding buckets are nearest neighbors to the query embedding using a similarity measure. The software displays location types associated with each of the buckets that are nearest neighbors in a view in a graphical user interface (GUI) on the mobile device and receives a user selection as to one of the location types. Then the software displays the entities for the selected location type in a GUI view on the mobile device.
US10521412B2 Complex multi-layer token apportionment stack for token assignment within multiple-tiered data structures
A token apportionment stack may include multiple layers. A data structure layer of the token apportionment stack may access configuration memory to determine nodes and node attributes for a multiple-tier data structure. The data structure layer may send a message to a token assignment later of the token apportionment stack that indicates the determined nodes and attributes. Responsive to the message, the token assignment layer may assign tokens to a first node and recursively assign an apportionment of the assigned tokens to a second node. The token assignment layer may send a message with the assignments to the data structure layer. An interface interaction layer of the token apportionment stack may receive and handle query regarding token assignment by accessing token assignment data stored at the data structure layer.
US10521411B2 Systems, methods, and data structures for high-speed searching or filtering of large datasets
An inline tree data structure and one or more auxiliary data structure encode a multitude of data records of a dataset; data fields of the dataset define a tree hierarchy. The inline tree comprises one binary string for each data record that are all the same length, are arranged in an ordered sequence that corresponds to the tree hierarchy, and include an indicator string indicating position in the tree hierarchy of each data record relative to an immediately adjacent data record. A search program is guided through the dataset by interrogating each indicator string in the inline tree data structure so as to reduce unnecessary interrogation of data field values.
US10521406B2 Merging along object hierarchies
Some embodiments of the present invention include a method for merging nodes in hierarchies and include receiving, by a database system, a request to merge a first node in a first hierarchy of a plurality of nodes into a second node, the first node in the first hierarchy having child nodes; determining, by the database system, whether the merge request violates each of a plurality of constraints, the plurality of constraints comprising circular dependency of nodes, deleted node and ordering of nodes; and re-parenting, by the database system, in response to a determination that the merge request does not violate each of the plurality of constraints, the child nodes of the first node in the first hierarchy of nodes to the second node in response to the merging of the first node into the second node.
US10521404B2 Data transformations with metadata
A system may receive a request to derive an output variable from a source variable. The request may include proposed logic to derive the output variable from the source variable. The system may then compare the proposed logic to existing logic to determine the proposed logic is new. In response to the proposed logic being new, the system may generate transformation code configured to execute the proposed logic. The system may further schedule the transformation code for execution at a predetermined time, and then execute the transformation code to generate data for the output variable.
US10521403B1 System and method of providing fault-tolerant file replication
Systems and methods are provided for fault-tolerant file replication. A request including an operation and a file identifier is received. It is determined if the operation is of a predetermined type of operations. If the operation is of a predetermined type of operation, a target local replica file is identified. It is determined whether the target local replica file is a primary replica. If the target local replica file is the primary replica, the operation included in the request is executed. Otherwise, one or more of the set of storage devices on which remote replica files associated with the file identifier are stored are identified. In turn, the remote replica file that is the primary replica is identified. The request is transmitted to storage device on which the identified remote replica file that is the primary replica is stored.
US10521398B1 Tracking version families in a file system
A technique for facilitating file system operations in a data storage system provides multiple version family databases. Each version family database identifies members of a respective version family, i.e., a respective set of files in a file system that are related by file snapping. When a snap of a file is created, the file system updates a version family database for the version family that includes the file, such that the version family database identifies both the file and the snap.
US10521393B2 Remote direct memory access (RDMA) high performance producer-consumer message processing
A method, system and computer program product for remote direct memory access (RDMA) optimized producer-consumer message processing in a messaging hub is provided. The method includes initializing a shared memory region in memory of a host server hosting operation of a messaging hub. The initialization provides for a control portion and one or more data portions, the control portion storing an index to an available one of the data portions. The method also includes transmitting to a message producer an address of the shared memory region and receiving a message in one of the data portions of the shared memory region from the message producer by way of an RDMA write operation on a network interface of the host server. Finally, the method includes retrieving the message from the one of the data portions and processing the message in the messaging hub in response to the receipt of the message.
US10521391B1 Chip to chip interface with scalable bandwidth
A system and method for efficiently transporting data across lanes. A computing system includes an interconnect with lanes for transporting data between a source and a destination. When a source receives an indication of a bandwidth requirement change from a first data rate to a second data rate, the transmitter in the source sends messages to the receiver in the destination. The messages indicate that the data rate is going to change and reconfiguration of one or more lanes will be performed. The transmitter selects one or more lanes for transporting data at the second data rate. The transmitter maintains data transport at the first data rate while reconfiguring the selected one or more lanes to the second data rate. After completing the reconfiguration, the transmitter transports data at the second data rate on the selected one or more lanes while preventing data transport on any unselected lanes.
US10521389B2 Method and apparatus for accessing non-volatile memory as byte addressable memory
Described herein is a method and system for accessing a block addressable input/output (I/O) device, such as a non-volatile memory (NVM), as byte addressable memory. A front end processor connected to a Peripheral Component Interconnect Express (PCIe) switch performs as a front end interface to the block addressable I/O device to emulate byte addressability. A PCIe device, such as a graphics processing unit (GPU), can directly access the necessary bytes via the front end processor from the block addressable I/O device. The PCIe compatible devices can access data from the block I/O devices without having to go through system memory and a host processor. In an implementation, a system can include block addressable I/O, byte addressable I/O and hybrids thereof which support direct access to byte addressable memory by the host processor, GPU and any other PCIe compatible device.
US10521387B2 NAND switch
In a memory system, a switch is connected between a controller and multiple non-volatile storage units, where the switch comprises first and second pins, a data bus, and a plurality of enable outputs. Each of the enable outputs of the switch is connected to an enable input of one of the non-volatile storage units. The switch is configured to transmit a signal to enable a communication path between the controller and one of the non-volatile storage units and to receive data over the data bus to be stored in one of the non-volatile storage units when the first and second pins are not asserted. In addition, the switch is configured to receive a command to be executed by one of the non-volatile storage units when the first pin is not asserted and the second pin is asserted. The switch is also configured to receive an address of a storage location within one of the non-volatile storage units when the first pin is asserted and the second pin is not asserted.
US10521376B1 Enclosure management over PCIE
An apparatus may include a baseboard management controller (BMC) configured to monitor one or more statuses of a storage array enclosure of the BMC. The BMC may further communicate with a host device of a PCIe network topology via a PCIe port of the BMC including performing a direct memory access (DMA) write to store status information of the enclosure to a memory of the host device via the PCIe network topology and performing a DMA read to retrieve control information from the memory of the host device via the PCIe network topology. In addition, the BMC may control one or more devices of the storage array enclosure based on the retrieved control information.
US10521374B2 Semiconductor integrated circuit device and method for comparing data
Data on a memory space are compared without using a CPU, and an interrupt is generated in an interrupt condition based on at least one of the number of times of the comparison and the number of times of coincidence with a comparison condition. An interrupt controller outputs an interrupt signal to a first CPU core or a second CPU core. A DMAC transfers data on the memory space to at least one of a first buffer and a second buffer. A comparison circuit compares the data of the first buffer with the data of the second buffer. A condition coincidence frequency counter counts the number of times at which the comparison in the comparison circuit coincides with a comparison condition. An interrupt request circuit outputs an interrupt request to the interrupt controller, based on at least one of a value of the condition coincidence frequency counter and a value of a comparison frequency counter.
US10521373B2 Input device with multi-host switching
Embodiments of the present invention provide a method and system of switching a wireless connection between a plurality of input devices and a first host device to at least a second host device. Embodiments of the invention are directed to systems and methods for switching multiple, independently connected data input devices from a first host computing device to a second host computing device together based on a single command or operation.
US10521371B2 Cache system and associated method
Embodiments of the present disclosure provide a cache system and associated method. The cache system includes a first pipeline module including a first plurality of sequential processing phases for executing a plurality of operations. The first plurality of operations is executed in response to Input/Output (I/O) requests of a first plurality of types for the persistent storage device, and each of the first plurality of operations is a common operation for the I/O requests of at least two of the first plurality of types. The cache system also includes a control module configured to: determine a first type of a first pending processing I/O request for the persistent storage device, and in response to the first type being one of the first plurality of types, cause the first pipeline module to be executed to process the first pending processing I/O request.