Document Document Title
US10312657B2 Coherent combining pulse bursts in time domain
A beam combining and pulse stacking technique is provided that enhances laser pulse energy by coherent stacking pulse bursts (i.e. non-periodic pulsed signals) in time domain. This energy enhancement is achieved by using various configurations of Fabry-Perot, Gires-Tournois and other types of resonant cavities, so that a multiple-pulse burst incident at either a single input or multiple inputs of the system produces an output with a solitary pulse, which contains the summed energy of the incident multiple pulses from all beams. This disclosure provides a substantial improvement over conventional coherent-combining methods in that it achieves very high pulse energies using a relatively small number of combined laser systems, thus providing with orders of magnitude reduction in system size, complexity, and cost compared to current combining approaches.
US10312656B1 Wavelength tuning for diffractive optical elements of structured light projectors
A wavelength tuning system determines a temperature calibrated to a DOE of a structured light (SL) projector. The wavelength tuning system includes a camera and controller. The camera captures images of a SL pattern projected by the SL projector. The controller generates tuning instruction. The tuning instructions cause a wavelength regulator of the SL projector to set a light source of the SL projector to different temperatures. The tuning instruction also cause the camera to capture images of the structured light pattern at each of the different temperatures. Using at least some of the captured images, the controller determines the temperature calibrated to the DOE. In one embodiment, the temperature calibrated to the DOE corresponds to a wavelength of light emitted by the light source that result in an estimated minimum power of a zeroth order diffracted beam of the SL pattern.
US10312653B2 Hydraulic tool
A hydraulic tool. The hydraulic tool includes a tool working end and a tool main section operably coupled to the tool working end. The tool main section comprising a ram assembly, the ram assembly includes a pretensioned return spring. A tool transmission end is operably coupled to the tool main section for hydraulically operating the tool working end.
US10312652B2 Mounting assembly for an electrically-powered device
A mounting assembly for electro-mechanically connecting an electrically-powered device to a structure includes a housing, a first printed circuit board, an adapter, and a second printed circuit board. The housing has a shape defining a front opening and a first mating structure. The first printed circuit board is located within the housing and has a first plurality of electrical contacts facing the front opening. The adapter is attachable to the device and has a second mating structure that removably engages with the first mating structure of the housing. The second printed circuit board is coupled with the adapter and has a second plurality of electrical contacts exposed on its back surface to electrically connect to the first plurality of electrical contacts when the first mating structure of the housing engages with the second mating structure of the adapter.
US10312647B2 Circular power connectors
A circular power connector that can accommodate plugs of varying diameters includes a plurality of electrical terminals that include a contact beam extending from and monolithic with base, where the contact beam includes a contact portion, and a mounting portion that extends from and monolithic with a base for mounting the terminal to a substrate. The terminals are cylindrically arranged to receive a plug. Alternatively, each electrical terminal includes a frame portion, a first contact beam extending from the frame in a first direction, and a second contact beam extending from the frame in a second direction. Multiple electrical terminals are oriented so that the first and second contact beams for one terminal extend at an angle, preferably perpendicular, to the first and second contact beams of another electrical terminal, in a still further embodiment, an electrical terminal having two halves is provided.
US10312642B2 Protector and wire harness
A protector includes a main unit having an inside in which wires W are wired and a connector holder. The connector holder removably holds a female connector that is exposed to the outside of the main unit from a wiring opening formed in the main unit. The connector holder includes an insertion opening in which the connector is inserted and a housing space that houses and holds the connector inserted from the insertion opening. The insertion opening is formed to be exposed to the outside of the main unit.
US10312638B2 High performance cable termination
A cable assembly comprising a termination with at least one conductive, compressible member and a conductive ground shield. The conductive, compressible member may be held within a connector module forming the termination such that the conductive compressive member is pressed against, and therefore makes electrical contact with, both an outer conductive layer of the cable and ground structures within the connector module. In some embodiments, these connections may be formed using a conductive, compressible member with an opening configured to receive the end of the cable therethrough. The conductive ground shield may be configured to compress the conductive, compressible member, and to cause the conductive, compressible member to electrically contact the cable's conductive layer. The conductive, compressible member may be formed from a compressible material and may comprise a plurality of conductive particulates configured to provide electrically conductive paths.
US10312637B2 Electrical connector having seamless shielding shell and single row of contacts
An electrical connector includes: an insulative housing; a single row of contacts secured to the insulative housing and each having a soldering tail; and a shielding shell enclosing the insulative housing and having an annular part and a pair of soldering portions; wherein the shielding shell annular part is seamless; and the soldering tails of the single row of contacts are arranged alternately in two rows within an outer profile of the shielding shell annular part.
US10312634B2 Electronic device card socket
Disclosed is an electronic device card socket capable of preventing the breakage of a hinge and preventing noise (static), which is caused by movement between respective parts, in the tray-type card socket. The electronic device card socket according to one embodiment of the present disclosure includes a socket housing, a socket cover, an ejecting hinge part, and ejecting bar, and a movement preventing means. The socket housing has a space into which a tray equipped with a card is inserted. The socket cover is provided at the upper part of the socket housing. The ejecting hinge part is rotatably hinge-coupled to one side of the socket housing so as to push the tray forward and separate the same when the ejecting hinge part rotates. The ejecting bar is provided at the other side of the socket housing so as to move in the forward and backward directions, and is connected to the ejecting hinge part so as to rotate the ejecting hinge part when the ejecting bar moves forward and backward. The movement preventing means prevents the movement of the ejecting hinge part and/or the ejecting bar when vibration is generated between the parts of the card socket.
US10312632B2 Connector
A lock arm includes a pair of guide rails protruding toward side walls, extending in a detachment direction, and formed to have a part on the detachment direction side facing a direction away from a main body. A detection member includes a rib positioned on the detachment direction side of an abutment surface and positioned to be sandwiched between the main body and a locking protrusion, and is relatively movable with respect to a housing between a fixing position and the main locking position, the fixing position at which a distal end of a detection arm opposes a locking portion in the engagement direction, the locking protrusion is sandwiched between the rib and the main body while opposing the abutment surface in an insertion and removal direction, and a protruding body is positioned to oppose the part of the guide rail on the detachment direction side.
US10312625B2 Secured body for memory card reader
A memory card reader body of a generally parallelepiped shape has a slot for insertion of a memory card and a housing to receive a memory card connector. The reader body has an upper cover and a lower base. The upper cover is made out of metal and the reader body further includes a printed-circuit board affixed to an upper face of the upper cover. The printed-circuit board includes at least one protection element.
US10312614B2 Adaptive card and motherboard having the same
An adaptive card is provided. The adaptive card is adapted to a motherboard with a connecting slot. The adaptive card includes a main body, a first connector, a second connector, a plurality of first fixing holes, a plurality of second fixing holes and a port. The main body includes a first surface, a second surface and a side edge. The first connector is configured on the first surface. The second connector is configured on the second surface. A plurality of first fixing holes are formed on the first surface and arranged along a direction corresponding to an insertion direction of the first connector. A plurality of second fixing holes are formed on the second surface and arranged along a direction corresponding to an insertion direction of the second connector. A port is configured on the side edge and used to be connected to the connecting slot.
US10312613B2 Interposer assembly and method
An interposer assembly including a plate and a plurality of metal contacts extending through passages in the plate for forming electrical connections with pads on overlying and underlying substrates. The contacts include a number of contact units with elastic cantilever and torsion springs. Current flows through the contact units with minimum resistance.
US10312609B2 Low profile electrical connector
A connector and a connector assembly for electrically connecting an electrical cable to a circuit board is described. The connector includes an insulative housing and a plurality of self-supporting terminals. Each of the self-supporting terminal has a retaining portion retained in a corresponding receiving through hole disposed through the housing, a contact portion extending from an upper end of, and perpendicular to the retaining portion such that the contact portion is disposed on an upper surface of the housing and a press-fit portion extending from a lower end of, and substantially parallel to the retaining portion, wherein the press-fit portion extends down from the lower surface of the housing. The connector electrically and physically connecting a conductive wire of an electrical cable with a conductive via of a circuit board by inserting each press-fit portion of the self-supporting terminals into said conductive via.
US10312602B2 Antenna system and method
A device comprising a plurality of metallic conical radiators, said conical radiators substantially hollow having a vertex end and a base end, a first cylindrical portion disposed annularly about the base end of the conical portion, a metallic second cylindrical portion coupled to the vertex of the conical portion, said cylindrical portion having a threaded aperture, and an antenna feed coupled to the threaded aperture. The device may have patches disposed on a substrate as a one or multi-dimensional array. An RF feed may be coupled to the radiators.
US10312601B2 Combination antenna element and antenna array
A combination antenna element is provided. A first antenna element, for example a waveguide antenna, may be coupled to a waveguide feed such as a Substrate Integrated Waveguide (SIW). The waveguide antenna may be formed as an aperture at a terminus of the SIW and disposed within a Printed Circuit Board (PCB) internal layer. A second antenna element, for example a microstrip patch antenna (MPA), may be provided on an outer PCB layer, the MPA defining an interior region, the interior region being positioned in line with the first antenna element. Also in some embodiments, the second antenna element is coupled to another antenna feed such as a transmission line feed which propagates signals in a different electromagnetic propagation mode than the waveguide. The transmission line feed may be a stripline located within the waveguide. An antenna array incorporating the combination antenna element is also provided.
US10312600B2 Free space segment tester (FSST)
Methods and apparatuses are disclosed for a free space segment tester (FSST). In one example, an apparatus includes a frame, a first horn antenna, a second horn antenna, a controller, and an analyzer. The frame has a platform to support a thin film transistor (TFT) segment of a flat panel antenna. The first horn antenna transmits microwave energy to the TFT segment and receives reflected energy from the TFT segment. The second horn antenna receives microwave energy transmitted through the TFT segment. The controller is coupled to the TFT segment and provides at least one stimulus or condition to the TFT segment. The analyzer measures a characteristic of the TFT segment using the first horn antenna and the second horn antenna. Examples of a measured characteristic includes a measured microwave frequency response, transmission response, or reflection response for the TFT segment. In one example, the TFT segment is used for integration into a flat panel antenna if the measured characteristic of the TFT segment indicates the TFT segment is acceptable.
US10312596B2 Dual-polarization, circularly-polarized, surface-wave-waveguide, artificial-impedance-surface antenna
A dual-polarization, circularly-polarized artificial-impedance-surface antenna has two adjacent tensor surface-wave waveguides (SWGs), a waveguide feed coupled to each of the two SWGs and a hybrid coupler having output ports, each output port of the hybrid coupler being connected to the waveguide feeds coupled to the two SWGs, the hybrid coupler, in use, combining the signals from input ports of the 90° hybrid coupler with phase shifts at its output ports.
US10312590B2 Small UWB antennas and method of designing the same
A method is provided for designing an ultra-wide band conical antenna having a bulb shape with a conical feed point having a predetermined input feed resistance. The method includes: choosing a charge distribution cone angle, ψ, for the predetermined input feed resistance; choosing the length of the charge distribution, κ; determining a desired resistance, capacitance and a Q-factor via a quasistatic antenna design algorithm based on ψ and κ; and selecting an ultra-wide band conical antenna design having a bulb shape with a conical feed point, from among the set of ultra-wide band conical antenna designs having a bulb shape with a conical feed point, that produces the desired resistance, capacitance and Q-factor.
US10312589B2 Antenna directivity control system and radio device
An antenna directivity control system includes an antenna including a plurality of antenna elements, feeding points for the plurality of antenna elements being mutually different; and a controller for controlling weight for each of the plurality of antenna elements, wherein each of the plurality of antenna elements includes a feed element connected to the feed point, and a radiating element that functions, upon power being fed by establishing electromagnetic field coupling with the feed element, as a radiating conductor, and wherein the controller controls a directivity of the antenna by adjusting an amplitude of a signal at each of the feeding points.
US10312587B1 Designing an antenna array to meet specified performance criteria
An antenna array can be quickly and efficiently designed to meet specified performance criteria. A system can be configured to receive various performance criteria as inputs, and from these inputs, identify how elements of an antenna array should be arranged so that the antenna array will meet the performance criteria. An iterative process can be performed to identify at least one arrangement of elements that will best meet the performance criteria while also complying with specified structural constraints.
US10312584B2 Dual antenna device
A dual antenna device comprises a substrate, a first antenna, a second antenna and an isolation element. The substrate comprises an installation surface, the first antenna and the second antenna protrude from the installation surface and respectively couple to the installation surface by the first grounding edge and the second grounding edge. The isolation element comprises a first isolation portion protruding from the installation surface and coupling to the installation surface by a bottom side of the first isolation portion so that the first antenna and the second antenna respectively locate at both sides of the isolation element. The first antenna and the isolation element form a first interval in the extension direction of the first grounding edge. The second antenna and the isolation element form a second interval in the extension direction of the second grounding edge. The design of the isolation element improves the isolation magnitude.
US10312582B2 Closed loop aperture tunable antenna
An apparatus comprises a radio frequency (RF) antenna circuit; an antenna aperture tuning circuit; an antenna impedance measurement circuit; and a processor circuit electrically coupled to the tunable antenna aperture circuit and the impedance measurement circuit. The processor circuit is configured to: set the antenna aperture tuning circuit to an antenna aperture tuning state according to one or more parameters of an RF communication network; initiate an antenna impedance measurement; and change the antenna aperture tuning state to an antenna aperture tuning state indicated by the antenna impedance.
US10312580B1 Class of nanomaterial-based tunable antennas
A tunable antenna structure including a substrate and at least one radiating element configured on the substrate. The antenna structure further includes a plurality of nanomaterial-based phase changing material (PCM) switches configured in the radiating element so that current flowing through the radiating element passes through the PCM switches. The antenna structure also includes a heating device, such as a laser or a resistive heater, configured relative to the PCM switches and being operable to selectively heat the PCM switches to switch the PCM switches between an on crystalline state and an off amorphous state, where once the heat is removed, the PCM switch remains in the particular state.
US10312579B2 Array antenna device
An array antenna device according to an embodiment of the present invention includes an array antenna, a core layer, and a first adhesive layer. The array antenna has a first surface on which one or more radiating elements are disposed. The core layer is disposed facing the first surface. The first adhesive layer is present between the array antenna and the core layer and bonds the array antenna and the core layer to each other. The first adhesive layer includes one or more first openings and one or more radiating elements are disposed inside the first opening.
US10312578B2 Radar device, radar transmission method, and transmission timing control method
There is provided a radar device with which the density of transmitted signals can be made uniform in relation to orientation even if the rotation rate of an antenna fluctuates, and interference removal processing can be given a simpler configuration. A radar device that transmits and receives signals while rotating an antenna comprises a motor, a transmission pulse generator, and a transmitter. The motor rotates the antenna (antenna main body). The transmission pulse generator generates transmission timing pulses for transmission signals from the antenna based on the rotational angle of the antenna main body. The transmitter transmits transmission signals via the antenna according to the transmission timing pulses generated by the transmission pulse generator.
US10312575B2 Wearable device antennas
Antennas for wearable wireless devices are provided. A wearable wireless device antenna may include a primary radiating element configured to form at least a portion of a wearable device body and a secondary radiating element configured to couple to the primary radiating element. Each of the primary and secondary radiating elements may be configured to radiate in differing frequency ranges. Wearable device antennas as provided may further be configured as directional antennas.
US10312571B2 Electronic device having isolated antenna structures
An electronic device may be provided with wireless circuitry. The wireless circuitry may include multiple antennas and transceiver circuitry. The antenna structures at a first end of the electronic device may include an inverted-F antenna resonating element for a first antenna formed from portions of a peripheral conductive electronic device housing structure and an antenna ground that is separated from the antenna resonating element by a gap. The inverted-F antenna resonating element arm may have a first end adjacent a first dielectric-filled gap and an opposing second end adjacent a second dielectric-filled gap. A second antenna may include an additional antenna resonating element arm and the antenna ground. A second end of the additional antenna resonating element arm may be interposed between the first dielectric-filled gap and a first end of the additional antenna resonating element arm. This type of arrangement may ensure the first and second antennas are isolated.
US10312570B2 Long-distance radio frequency anti-metal identification tag
A long-distance radio frequency anti-metal identification tag is provided. When a bottom surface of an insulating spacer plate is attached to the surface of a metal object and an electronic tag reading device is used to read a radio frequency identification chip on a second antenna. A resonant cavity is formed between a slot of a first antenna and the surface of the metal object through the isolation of the insulating spacer plate, such that the second antenna located at the position of the resonant cavity resonates with an electromagnetic wave signal reflected on the surface of the metal object by the first antenna. The electromagnetic wave signal is transmitted to the radio frequency identification chip, or the feedback signal of the radio frequency identification chip is transmitted out. The overall UHF electronic tag is resistant to a metal interference and has the performance of long-distance reading.
US10312558B2 Battery packaging and insert molding for electric vehicles
A battery pack for an electric vehicle may include a plurality of battery cells arranged in on or more rows, a coolant loop, and a molded insert that encompasses the plurality of cells and the coolant loop such that the plurality of cells and the coolant loop are fixed relative to each other. The molded insert may cover a large portion of the coolant loop and/or the individual battery cells of the battery pack. An injection mold can be used as a fixture to hold the individual battery cells in place relative to the coolant loop, and the molded insert can be injected around the battery and coolant loop assembly.
US10312554B2 Battery cooling channel with integrated cell retention features
A battery cooling and retainer assembly according to an exemplary aspect of the present disclosure includes, among other things, a first retainer section that includes a first retention feature, a second retainer section that includes a second retention feature, and a cooling channel disposed between the first retainer section and the second retainer section.
US10312550B2 Molten lithium-sulfur battery with solid electrolyte and method of manufacturing the same
This invention relates to a lithium-sulfur battery and a method of manufacturing the same, and more particularly, to a molten salt-based lithium-sulfur battery and a method of manufacturing the same, in which a metal foam including lithium or a lithium alloy, as an anode active material, and sulfur or metal sulfide, as a cathode active material, is used as a support and a current collector, and a solid-state electrolyte is used to thus improve energy density and power output characteristics.
US10312547B2 Cross-woven electrode assembly
A electrode assembly includes an electrode pair having a positive electrode and a negative electrode that are arranged crosswise and each z-folded while being cross-woven together in a continuous manner. The electrode assembly includes an electrode stack in which portions of the positive electrode are stacked along a stack axis so as to alternate with portions of the negative electrode.
US10312541B2 Polyol-based compositions comprising cationic group-functionalized polyphenylene polymers
Disclosed herein are embodiments of compositions comprising polyols and cationic group-functionalized polyphenylene polymers suitable for use in electrochemical systems. The disclosed composition exhibit improved dispersion properties and further provide anion exchange polymer membranes exhibited improved chemical and mechanical properties. Also disclosed herein are methods of making and using the disclosed compositions.
US10312540B2 Multi-layered layer arrangement for a solid electrolyte
A cathode-electrolyte-anode unit for an electrochemical functional device, in particular a high-temperature fuel cell. The unit has a multi-layer solid-state electrolyte arranged between a porous anode and a porous cathode. The solid-state electrolyte is produced by a vapor deposition process and has a sandwich-type structure consisting of at least one first layer with a lower oxygen content, and at least one second layer with a higher oxygen content. The individual layers have substantially the same composition, with the exception of oxygen.
US10312539B1 System and method for storage and retrieval of energy
A system and method for storage and retrieval of energy includes storage of energy by performing electrolysis of water and directing the resulting hydrogen gas and oxygen gas to respective storage tanks. Energy is retrieved by directing hydrogen gas and oxygen gas from the storage tanks to a fuel cell where the hydrogen and oxygen are reacted to produce electricity and water. Water from the fuel cell is directed to a reservoir for subsequent electrolysis.
US10312536B2 On-board aircraft electrochemical system
An onboard electrochemical system of an electrochemical cell including a cathode and an anode separated by an electrolyte separator is selectively operated in either of two modes. In a first mode of operation, water or air is directed to the anode, electric power is provided to the anode and cathode to provide a voltage difference between the anode and the cathode, and nitrogen-enriched air is directed from the cathode to an aircraft fuel tank or aircraft fire suppression system. In a second mode of operation, fuel is directed to the anode, electric power is directed from the anode and cathode to one or more aircraft electric power-consuming systems or components, and nitrogen-enriched air is directed from the cathode to a fuel tank or fire suppression system.
US10312535B2 Fuel cell system including control of rotation speed of a gas pump
There is provided a fuel cell system. The fuel cell system includes a gas pump that is configured to have a rotating body and circulate an exhaust gas discharged from a fuel cell and is provided in a circulation passage configured to connect a discharge passage of the exhaust gas with a fuel gas supply passage. When temperature of the fuel cell is higher than a reference temperature that is a temperature that allows water to be introduced in a supercooled state into the gas pump, the fuel cell system controls the rotation speed of the rotating body of the gas pump to a first rotation speed corresponding to a power generation demand for the fuel cell. When the temperature of the fuel cell is not higher than the reference temperature, the fuel cell system controls the rotation speed of the rotating body of the gas pump to a second rotation speed that is lower than the first rotation speed. The second rotation speed is a rotation speed in a low rotation speed range that allows the water in the supercooled state introduced into the gas pump to be extended between the rotating body and a rotating body-surrounding housing wall. This configuration suppresses freezing of the gas pump in the circulation passage of the exhaust gas at a start-up time of the fuel cell.
US10312530B2 Fuel cell device and system
A fuel cell device is provided having an active central portion with an anode, a cathode, and an electrolyte therebetween. At least three elongate portions extend from the active central portion, each having a length substantially greater than a width transverse thereto such that the elongate portions each have a coefficient of thermal expansion having a dominant axis that is coextensive with its length. A fuel passage extends from a fuel inlet in a first elongate portion into the active central portion in association with the anode, and an oxidizer passage extends from an oxidizer inlet in a second elongate portion into the active central portion in association with the cathode. A gas passage extends between an opening in the third elongate portion and the active central portion. For example, the passage in the third elongate portion may be an exhaust passage for the spent fuel and/or oxidizer gasses.
US10312529B2 Fuel cell stack
A fuel cell stack is constituted by stacking fuel cells including a membrane electrode assembly constituted by sandwiching an electrolyte membrane with a pair of electrodes and a pair of separators that have flow passages through which gas to be supplied to the membrane electrode assembly flows, the pair of separators being arranged across the membrane electrode assembly. The fuel cell stack includes a welded portion where the separators adjacent to one another in a stacking direction of the fuel cell are welded. The separator in the stacking direction at the welded portion has a height lower than a height of the separator other than the welded portion.
US10312524B2 Electrical connection structure
The present invention provides a means for improving the output performance of a battery.An electrical connection structure of the present invention includes a current collector which includes a conductive resin layer containing a polymer material and a conductive filler and a conductive member which is in electrical contact with the conductive filler.
US10312523B2 Lithium ion secondary battery
A lithium ion secondary battery includes: a positive electrode including a positive electrode active material layer; a negative electrode; and an electrolyte. The positive electrode active material layer contains Lia(M)b(PO4)c (M=VO or V, 0.9≤a≤3.3, 0.9≤b≤2.2, 0.9≤c≤3.3) as a first positive electrode active material, and additionally contains a fluorine compound of 1 to 300 ppm in terms of fluorine with respect to a weight of the positive electrode active material layer.
US10312520B2 Non-aqueous electrolyte secondary battery
According to the invention, a non-aqueous electrolyte secondary battery including a positive electrode, a negative electrode, and a non-aqueous electrolyte is provided. The negative electrode contains a negative electrode active material, a conductive material, and a binder. When an average particle size of the conductive material is referred to as De, and an average particle size of the binder is referred to as Db, Db≤De is satisfied. In other words, the average particle size Db of the binder is equal to or smaller than the average particle size De of the conductive material.
US10312519B2 Method for manufacturing electroconductive paste, and electroconductive paste
A method for producing an electrically conductive paste, including a step of manufacturing paste A by exerting a cavitation effect in mixed liquid A containing multi-walled carbon nanotubes and a solvent, a step of manufacturing paste B from mixed liquid B containing carbon black particles, graphitized carbon nanofibers and a solvent, and a step of mixing paste A and paste B.
US10312518B2 Anode and method of manufacturing the same, and secondary battery
An anode and a secondary battery capable of improving the charge and discharge efficiency are provided. The anode includes an anode current collector, and an anode active material layer provided on the anode current collector. The anode active material layer has a plurality of anode active material particles containing at least one of a simple substance of silicon, a compound of silicon, a simple substance of tin and a compound of tin, and has a coat containing an oxo acid salt in at least part of the surface of the anode active material particles.
US10312516B2 Negative-electrode active material for non-aqueous electrolyte secondary battery, and non-aqueous electrolyte secondary battery
A negative-electrode active material for a non-aqueous electrolyte secondary battery containing a silicon material, wherein the negative-electrode active material can constitute a non-aqueous electrolyte secondary battery having high charge capacity, high initial charge/discharge efficiency, and good cycle characteristics. A negative-electrode active material particle according to an embodiment includes a lithium silicate phase represented by Li2zSiO(2+z) {0
US10312515B2 Lithium sulfur cell with dopant
Among other things, the present disclosure provides a particle comprising a form of sulfur and/or lithium sulfide (Li2S) that is doped with a group VIA element, such as selenium (e.g. Se34), tellurium (e.g. Te52), or polonium (e.g. Po84). The present disclosure also provides a cell comprising a negative electrode, a separator, and a positive electrode comprising the particles of the present disclosure.
US10312512B2 Cathode of three-dimensional lithium secondary battery and method of fabricating the same
A cathode of a three-dimensional lithium secondary is defined by a sintered body including a cathode active material, in which a thickness of the sintered body is in a range of about 5 μm to about 30 μm, and an electrode density of the sintered body is in a range of about 3.7 g/cc to about 4.6 g/cc. The cathode active material may include a lithium cobalt oxide.
US10312508B2 Lithium metal composite oxide powder
A positive electrode active material comprising a lithium metal composite oxide having a layered crystal structure provides a novel lithium metal composite oxide powder which can suppress the reaction with an electrolytic solution and raise the charge-discharge cycle ability of a battery, and can improve the output characteristics of a battery. A lithium metal composite oxide powder comprises a particle having a surface portion where one or a combination of two or more (“surface element A”) of the group consisting of Al, Ti and Zr is present, on the surface of a particle comprising a lithium metal composite oxide having a layered crystal structure, wherein the amount of surface LiOH is smaller than 0.10% by weight, and the amount of surface Li2CO3 is smaller than 0.25% by weight; in an X-ray diffraction pattern, the ratio of an integral intensity of the (003) plane of the lithium metal composite oxide to that of the (104) plane thereof is higher than 1.15; and the amount of S obtained by a measurement using ICP is smaller than 0.10% by weight of the lithium metal composite oxide powder (100% by weight).
US10312502B2 Lithium electrode and lithium secondary battery comprising same
A lithium electrode including a porous carbon body; and a lithium metal inserted into pores of the porous carbon body is provided. The lithium electrode may include a lithium ion conductive protective layer formed on at least one surface of the porous carbon body. The lithium electrode can be used as a negative electrode in a lithium secondary battery.
US10312490B2 Vent devices for electrified vehicle battery packs
A battery pack according to an exemplary aspect of the present disclosure includes, among other things, an enclosure that houses at least one battery cell and a vent device comprised of a polymeric material and adapted to discharge battery vent byproducts vented by the battery cell to a location external to the enclosure while preventing ingress of environmental fluids into the enclosure.
US10312489B2 Service panel for accessing a serviceable part
A battery assembly according to an exemplary aspect of the present disclosure includes, among other things, an enclosure assembly defining an interior and a service panel integrally formed in the enclosure assembly. The service panel includes a ductile portion that is removable to access the interior.
US10312485B2 Battery assembly array plate
A battery pack according to an exemplary aspect of the present disclosure includes, among other things, an array plate including a first engagement feature configured to engage a second engagement feature when the first engagement feature is positioned proximate another structure equipped with the second engagement feature.
US10312483B2 Double locking mechanism on a battery latch
A double locking battery latch typically includes a fixed end having a fastening portion, a free end opposite the fixed end having a cover contacting latch, and a battery contacting latch positioned between the fastening portion and the cover contacting latch. The double locking battery latch may include a fasting portion which extends in a first plane. The double locking batter latch may also include a first transition extending continuously from the fastening portion to the battery contacting latch.
US10312474B2 Organic electroluminescent device comprising a plurality of light emissive units
An organic electroluminescent device includes at least two light-emissive units provided between a cathode electrode and an anode electrode opposed to the cathode electrode, each of the light-emissive units including at least one light-emissive layer. The light-emissive units are partitioned from each other by at least one charge generation layer, the charge generation layer being an electrically insulating layer having a resistivity of not less than 1.0×102 Ωcm.
US10312468B2 Light emitting device, electronic appliance, and method for manufacturing light emitting device
To provide a light emitting device that has a structure in which a light emitting element is sandwiched by two substrates to prevent moisture from penetrating into the light emitting element, and a method for manufacturing thereof. In addition, a gap between the two substrates can be controlled precisely. In the light emitting device according to the present invention, an airtight space surrounded by a sealing material with a closed pattern is kept under reduced pressure by attaching the pair of substrates under reduced pressure. A columnar or wall-shaped structure is formed between light emitting regions inside of the sealing material, in a region overlapping with the scaling material, or in a region outside of the sealing material so that the gap between the pair of substrates can be maintained precisely.
US10312464B2 Active OLED display, method of operating an active OLED display and compound
An active OLED display, comprising a plurality of OLED pixels, each of the OLED pixels comprising an anode, a cathode, and a stack of organic layers, wherein the stack of organic layers is provided between and in contact with the cathode and the anode and comprises an electron transport layer, a hole transport layer, and a light emitting layer provided between the hole transport layer and the electron transport layer, and a driving circuit configured to separately driving the pixels of the plurality of OLED pixels, wherein, for the plurality of OLED pixels, a common hole transport layer is formed by the hole transport layers provided in the stack of organic layers of the plurality of OLED pixels, the common hole transport layer comprising a hole transport matrix material and at least one electrical p-dopant, and the electrical conductivity of the hole transport material being lower than 1×10−3 S·m−1 and higher than 1×10−8 S·m−1.
US10312463B2 Light emitting microcapsule, method of preparing the same and OLED display device comprising the same
The present invention, which belongs to the technical field of display technology, provides a microcapsule, a method of preparing the same, and an OLED (organic light emitting diode) display device comprising the same. The OLED display device comprises a microcapsule having a phosphorescent material as a core material, which reduces the probability of the phosphorescence self-quenching and is isolated from water and oxygen, thereby improving the display quality and extending the service life of the OLED display device. Therefore, the OLED display device can solve the problem that the phosphorescence OLED display device in the prior art has a low brightness and short service life.
US10312461B2 Flexible OLED display panel having a substrate with a titanium layer and method for manufacturing same
The present disclosure provides a flexible organic light-emitting diode (OLED) display panel including a flexible substrate and a plurality of thin film transistor (TFT) devices disposed on the flexible substrate. The flexible substrate comprises: a first polyimide (PI) layer; a first inorganic barrier layer disposed on a surface of the first PI layer; a titanium metal layer disposed on a surface of the first inorganic barrier layer; a second PI layer disposed on a surface of the titanium metal layer; and a second inorganic barrier layer disposed on a surface of the second PI layer. The TFT devices are disposed on a surface of the second inorganic barrier layer.
US10312459B2 Compound and organic electronic device using the same
Provided are a novel compound and an organic electronic device using the same. The novel compound is represented by the following Formula (I):
US10312454B2 Compound for organic optoelectric device, organic optoelectric device and display device
The present invention relates to a compound for an organic optoelectric device, an organic optoelectric device, to which the compound is applied, and a display device, wherein the compound is represented by chemical formula 1. The detailed contents regarding chemical formula 1 are the same as defined in the specification.
US10312451B2 Compound for organic electroluminescent device
The present invention generally discloses an organic compound and organic electroluminescence (herein referred to as organic EL) device using the organic compound. More specifically, the present invention relates to an organic EL device employing the organic compound as fluorescent emitting host or phosphorescent emitting host which can display long lifetime, high efficiency.
US10312447B2 Organic semiconductor element, manufacturing method thereof, compound, organic semiconductor composition, organic semiconductor film, and manufacturing method thereof
Objects of the present invention are to provide an organic semiconductor element in which carrier mobility is high, variation of mobility is suppressed, and temporal stability under high temperature and high humidity is excellent, and a manufacturing method thereof, to provide a novel compound suitable for an organic semiconductor, and to provide an organic semiconductor film in which mobility is high, variation of mobility is suppressed, and temporal stability under high temperature and high humidity is excellent, a manufacturing method thereof, and an organic semiconductor composition that can suitably form the organic semiconductor film.The organic semiconductor element according to the present invention is an organic semiconductor layer containing a compound having a constitutional repeating unit represented by Formula 1 and having a molecular weight of 2,000 or greater. D-A  (1)
US10312441B1 Tunable resistive element
A tunable resistive element, comprising a first terminal, a second terminal, a dielectric layer and an intercalation layer. The dielectric layer and the intercalation layer are arranged in series between the first terminal and the second terminal. The dielectric layer is configured to form conductive filaments of oxygen vacancies on application of an electric field. The intercalation layer is configured to undergo a topotactic transition comprising an oxygen intercalation in combination with a change in the resistivity of the intercalation layer. A related memory device and a related neuromorphic network comprise resistive memory elements as memory cells and synapses respectively and a corresponding design structure.
US10312437B2 Memory devices including phase change material elements
Memory devices having a plurality of memory cells, with each memory cell including a phase change material having a laterally constricted portion thereof. The laterally constricted portions of adjacent memory cells are vertically offset and positioned on opposite sides of the memory device. Also disclosed are memory devices having a plurality of memory cells, with each memory cell including first and second electrodes having different widths. Adjacent memory cells have the first and second electrodes offset on vertically opposing sides of the memory device. Methods of forming the memory devices are also disclosed.
US10312436B2 Ground state artificial skyrmion lattices at room temperature
A method for fabricating artificial skyrmions and skyrmion lattices with a stable ground state at room temperature and in the absence of magnetic fields is provided. The lattices are formed by patterning vortex-state nanodots over macroscopic areas on top of an underlayer with perpendicular magnetic anisotropy (PMA); and preparing artificial skyrmion lattices using ion irradiation to suppress PMA in the underlayer and allow imprinting of the vortex structure from the nanodots to form the skyrmion lattices. Alternatively the skyrmions can be formed by ion-irradiating select asymmetric nanodot regions of the PMA underlayer, leading to planar skyrmions without nanodot protrusions. These artificial skyrmions can be used for low dissipation information storage, such as magnetic memory, logic devices and sensors.
US10312429B2 Magnetoelectric macro fiber composite fabricated using low temperature transient liquid phase bonding
A composite material fabricated using a novel process and materials. The piezoelectric and magnetostrictive layers of the composite material are coated, layered, and bonded using a process known as LTTLP bonding. The resulting magnetoelectric composite fibers are bonded to a polyimide film based copper flexible circuit using a room temperature curing epoxy. The sensor that results is an MEMFC that outperforms conventionally fabricated MEMFCs.
US10312428B2 Piezoelectric thin film, piezoelectric thin film device, target, and methods for manufacturing piezoelectric thin film and piezoelectric thin film device
A piezoelectric thin film does not easily generate a heterogeneous phase and exhibits good piezoelectric characteristics. The piezoelectric thin film contains a composition represented by a general formula: (1-n) (K1-xNax)mNbO3-nCaTiO3, wherein m, n, and x in the general formula are within the ranges of 0.87≤m≤0.97, 0≤n≤0.065, and 0≤x≤1.
US10312418B2 Semiconductor nanoparticle-based light emitting materials
A light emitting layer including a plurality of light emitting particles embedded within a host matrix material. Each of said light emitting particles includes a population of semiconductor nanoparticles embedded within a polymeric encapsulation medium. A method of fabricating a light emitting layer comprising a plurality of light emitting particles embedded within a host matrix material, each of said light emitting particles comprising a population of semiconductor nanoparticles embedded within a polymeric encapsulation medium. The method comprises providing a dispersion containing said light emitting particles, depositing said dispersion to form a film, and processing said film to produce said light emitting layer.
US10312416B2 Radiation-emitting semiconductor device
A radiation-emitting semiconductor device includes a housing body having a chip mounting area, a chip connection region, a radiation-emitting semiconductor chip, and a light-absorbing material, wherein the radiation-emitting semiconductor chip is fixed to the chip connection region, the chip connection region is covered with the light-absorbing material at selected locations at which the chip connection region is not covered by the radiation-emitting semiconductor chip, the radiation-emitting semiconductor chip is free of the light-absorbing material in selected locations, the housing body has a cavity in which the at least one radiation-emitting semiconductor chip is arranged, the chip mounting area is a surface of the housing body which abuts the cavity, and the chip mounting area is free of the light-absorbing material in selected locations remote from the chip connection region.
US10312413B2 Optoelectronic semiconductor component and method for producing the same
A component with a semiconductor body, a first metal layer and a second metal layer is disclosed. The first metal layer is arranged between the semiconductor body and the second metal layer. The semiconductor body has a first semiconductor layer, a second semiconductor layer, and an active layer. The component has a plated-through hole, which extends through the second semiconductor layer and the active layer for the electrical contacting of the first semiconductor layer. The second metal layer has a first subregion, and a second subregion, spaced apart laterally from the first subregion by an intermediate space. The first subregion is electrically connected to the plated-through hole and is assigned to a first electrical polarity of the component. In plan view, the first metal layer laterally completely bridges the intermediate space and is assigned to a second electrical polarity of the component which differs from the first electrical polarity.
US10312406B2 Method of forming gigantic quantum dots
Provided is a method of forming gigantic quantum dots including following steps. A first precursor by mixing zinc acetate (Zn(ac)2), cadmium oxide (CdO), a surfactant, and a solvent together and then performing a first heat treatment is provided. The first precursor includes Zn-complex having the surfactant and Cd-complex having the surfactant. A second precursor containing elements S and Se and trioctylphosphine (TOP) is added into the first precursor to form a reaction mixture. A second heat treatment is performed on the reaction mixture and then cooling the reaction mixture to form the gigantic quantum dots in the reaction mixture.
US10312404B2 Semiconductor light emitting device growing active layer on textured surface
In accordance with embodiments of the invention, at least partial strain relief in a light emitting layer of a III-nitride light emitting device is provided by configuring the surface on which at least one layer of the device grows such that the layer expands laterally and thus at least partially relaxes. This layer is referred to as the strain-relieved layer. In some embodiments, the light emitting layer itself is the strain-relieved layer, meaning that the light emitting layer is grown on a surface that allows the light emitting layer to expand laterally to relieve strain. In some embodiments, a layer grown before the light emitting layer is the strain-relieved layer. In a first group of embodiments, the strain-relieved layer is grown on a textured surface.
US10312400B2 Multi-junction solar cell
A multi-junction solar cell comprising a high-crystalline silicon solar cell and a high-crystalline germanium solar cell. The high-crystalline silicon solar including a first p-doped layer and a n+ layer and the high-crystalline germanium solar cell including a second p layer and a heavily doped layer. The multi-junction solar cell can also be comprised of a heavily doped silicon layer on a non-light receiving back surface of the high-crystalline germanium solar cell and a tunnel junction between the high-crystalline silicon solar cell and the high-crystalline germanium solar cell.
US10312395B2 Luminescent solar concentrator comprising disubstituted benzoheterodiazole compounds
Luminescent solar concentrator (LSC) comprising at least one disubstituted benzoheterodiazole compound of general formula (I), in which: —Z represents a sulfur atom, an oxygen atom, a selenium atom; or an NR6 group in which R6 is selected from linear or branched C1-C20, preferably C1-C8, alkyl groups, or from optionally substituted aryl groups; —R1, R2 and R3, which are the same or different, represent a hydrogen atom; or are selected from linear or branched C1-C20, preferably C1-C8, alkyl groups, optionally containing heteroatoms, optionally substituted cycloalkyl groups, optionally substituted aryl groups, optionally substituted linear or branched C1-C20, preferably C1-C8, alkoxyl groups, optionally substituted phenoxyl groups, or —COOR7 groups or —OCOR7 groups in which R7 is selected from linear or branched C1-C20, preferably C1-C8, alkyl groups, or is a cyano group, provided that when the substituents R1 represents a hydrogen atom, at least one of the substituents R2 and R3 represents an optionally substituted aryl group or an optionally substituted phenoxyl group; —or R1 and R2, can optionally be linked together so as to form, together with the carbon atoms to which they are linked, a saturated, unsaturated or aromatic cyclic ring or a polycyclic system containing from 3 to 14 carbon atoms, preferably from 4 to 6 carbon atoms, optionally containing one or more heteroatoms such as, for example, oxygen, sulfur, nitrogen, silicon, phosphorus, selenium; —or R2 and R3 can optionally be linked together so as to form, together with the carbon atoms to which they are linked, a saturated, unsaturated or aromatic cyclic ring or a polycyclic system containing from 3 to 14 carbon atoms, preferably from 4 to 6 carbon atoms, optionally containing one or more heteroatoms such as, for example, oxygen, sulfur, nitrogen, silicon, phosphorus, selenium; —R4 and R5, which are the same or different, represent a hydrogen atom; or are selected from linear or branched C1-C20, preferably C1-C8, alkyl groups, optionally containing heteroatoms, optionally substituted cycloalkyl groups, optionally substituted aryl groups, optionally substituted linear or branched C1-C20, preferably C1-C8, alkoxyl groups, —COOR7 groups or —OCOR7 groups in which R7 is selected from linear or branched C1-C20, preferably C1-C8, alkyl groups, or is a cyano group; or R4 and R5, can optionally be linked together so as to form, together with the carbon atoms to which they are linked, a saturated, unsaturated, or aromatic cyclic ring or a polycyclic system containing from 3 to 14 carbon atoms, preferably from 4 to 6 carbon atoms, containing one or more heteroatoms such as, for example, sulfur, nitrogen, silicon, phosphorus, selenium.
US10312392B2 Multi-junction solar cell for space applications
A multi-junction solar cell includes a first main surface and a second main surface opposite to the first main surface of a semiconductor body. A topmost pn-junction of a plurality of pn-junctions stacked on top of each other adjoins to the first main surface. A cell edge of the semiconductor body defines a shape of the first and the second main surfaces. An encapsulant on the first main surface provides an environmental protection of the semiconductor body. A mesa groove is provided on the first main surface and penetrates at least the topmost pn-junction. The mesa groove is located adjacent to the cell edge and is created around the circumference of the semiconductor body for providing an inner cell area and a mesa wall, the mesa wall being created between the mesa groove and the cell edge. The mesa groove is filled with the encapsulant.
US10312387B2 Single photon detection using a resonator with an absorber
A single photon detector (SPD) includes a resonator to store probe photons at a probe wavelength and an absorber disposed in the resonator to absorb a signal photon at a signal wavelength. The absorber is also substantially transparent to the probe photons. In the absence of the signal photon, the resonator is on resonance with the probe photons, thereby confining the probe photons within the resonator. Absorption of the signal photon by the absorber disturbs the resonant condition of the resonator, causing the resonator to release multiple probe photons. A photodetector (PD) then detects these multiple probe photons to determine the presence of the signal photon.
US10312385B2 Solar cell substrate made of stainless steel foil and method for manufacturing the same
Provided are a solar cell substrate made of stainless steel foil which contains 7% to 40% by mass Cr and has a coefficient of linear expansion of 12.0×10−6/° C. or less at 0° C. to 100° C. and a thickness of 20 μm to 200 μm is subjected to the preparatory heat treatment for stress relief in an atmosphere consisting of one or more selected from an N2 gas, an H2 gas, an Ar gas, an AX gas, and an HN gas within the range of 250° C. to 1,050° C.; a back-contact made of a Mo layer is formed on a surface of the stainless steel foil subjected to the preparatory heat treatment or an insulating coating is formed on a surface of the stainless steel foil followed by forming the back-contact including the Mo layer thereon; and an absorber layer made of Cu(In1-xGax)Se2 is formed on the back-contact by performing coating formation heat treatment.
US10312383B2 High-frequency photoelectric detector encapsulation base tank-packaged by using multi-layer ceramic
The present invention applies to the technical field of photoelectric detectors and provides a high-frequency photoelectric detector encapsulation base can-packaged by using a multi-layer ceramic, comprising a laminated multi-layer ceramic substrate, wherein the multi-layer ceramic substrate is welded with pins at a bottom and provided with a metal ring at a top; an upper surface and a lower surface of each layer of the ceramic substrate are both plated with a conductive metal layer; circuit connection holes are distributed in each layer of the ceramic substrate; the upper surface of the multi-layer ceramic substrate is provided with two power contacts and two differential signal contacts; and the power contacts and the differential signal contacts penetrate through each layer of the ceramic substrate to be connected to the corresponding pins. The photoelectric detector encapsulation base is a tank-type base of a multi-layer ceramic structure, the upper and lower surfaces of each layer of the ceramic substrate are electroplated with a conductive metal layer to constitute a co-plane waveguide structure; and a differential signal transmission design being adopted in a high-speed signal line can solve the transmission problem of a signal of higher than 20 GHz in bandwidth, with a small transmission loss.
US10312382B2 Quenching circuit
Disclosed is a quenching circuit including an avalanche photodiode and a quenching diode applying a bias voltage to the avalanche photodiode. Since the quenching circuit includes the quenching diode instead of a quenching resistor, the avalanche photodiode can quickly recover to linear mode from Geiger mode, and the bias voltage applied to the avalanche photodiode is stably maintained even though a current level of the avalanche photodiode fluctuates according to the intensity of incident light.
US10312380B2 Semiconductor diode and electronic circuit arrangement herewith
A semiconductor diode includes a semiconductor body, having a first main area formed from an inner area, on which a first contact layer is arranged, and from an edge area, a current path from the first contact layer to a second contact layer arranged on a second main area situated opposite the first main area, wherein the semiconductor diode, by virtue of the configuration of the first contact layer or of the semiconductor body, is formed such that upon current flow, such current flows through a current path having the greatest heating per unit volume, and which proceeds from a further partial area of the inner area, wherein the further partial area is arranged on the other side of a boundary of an inner partial area of the inner area, said inner partial area preferably being arranged centrally, with respect to an outer partial area adjoining said inner partial area.
US10312376B2 Thin film transistor and method for manufacturing the same
The present provides a thin film transistor, which comprises: a gate on the substrate; a gate insulating layer; the embossed portion defining a first end in which a first active layer is formed, and a second end in which a second active layer is formed; a first source connected to the first active layer and a second source connected to the second active layer; a passivation layer; a first through hole and a second through hole defined in the passivation layer; and a drain formed on the passivation layer and extending through the first and second through hole to interconnect the first and second active layers, respectively. By this arrangement, a first distance defined between the drain with respect to a first contact surface of the first source layer located on the flattened portion of the embossed portion will equal to the height of the embossed portion. In addition, a second distance defined between the drain with respect to a second contact surface of the second source layer located on the flattened portion of the embossed portion will equal to the height of the embossed portion as well. By implementation of the technology provided by the present invention, a thin film transistor of shortened channel can be realized such that the thin film transistor is benefited with a larger aspect ratio so as to entertain a larger on-state current.
US10312370B2 Forming a sacrificial liner for dual channel devices
Semiconductor devices and methods of forming the same include forming a liner over one or more channel fins on a substrate. An etch is performed down into the substrate using the one or more channel fins and the liner as a mask to form a substrate fin underneath each of the one or more channel fins. An area around the one or more channel fins and substrate fins is filled with a flowable dielectric. The flowable dielectric is annealed to solidify the flowable dielectric. The anneal oxidizes at least a portion of sidewalls of each substrate fin, such that each substrate fin is narrower in the oxidized portion than in a portion covered by the liner.
US10312367B2 Monolithic integration of high voltage transistors and low voltage non-planar transistors
High voltage transistors spanning multiple non-planar semiconductor bodies, such as fins or nanowires, are monolithically integrated with non-planar transistors utilizing an individual non-planar semiconductor body. The non-planar FETs may be utilized for low voltage CMOS logic circuitry within an IC, while high voltage transistors may be utilized for high voltage circuitry within the IC. A gate stack may be disposed over a high voltage channel region separating a pair of fins with each of the fins serving as part of a source/drain for the high voltage device. The high voltage channel region may be a planar length of substrate recessed relative to the fins. A high voltage gate stack may use an isolation dielectric that surrounds the fins as a thick gate dielectric. A high voltage transistor may include a pair of doped wells formed into the substrate that are separated by the high voltage gate stack with one or more fin encompassed within each well.
US10312365B1 Laterally diffused MOSFET on fully depleted SOI having low on-resistance
Laterally diffused MOSFETs on fully depleted SOI are provided. A laterally diffused MOSFET includes a substrate and a first semiconductor layer disposed on the substrate. The laterally diffused MOSFET also includes a buried oxide layer disposed on the first semiconductor layer. A second semiconductor layer that comprises a first gate region, a drain region, and a source region is disposed on the buried oxide layer. The first gate region is positioned between the source and drain regions. A first shallow trench isolation is disposed between the drain region and the first semiconductor layer. A second gate region is disposed on the first semiconductor layer away from the second semiconductor layer and between the first shallow trench isolation and a second shallow trench isolation. A gate node is coupled to the first and second gate regions to apply a gate voltage to the first and second gate regions.
US10312364B2 Semiconductor device and fabrication method thereof
A semiconductor device includes a first dielectric layer on a substrate, a hard mask layer on the first dielectric layer, a trench in the hard mask layer and the first dielectric layer, a first source/drain electrode layer on a sidewall of the trench, a second dielectric layer on the first source/drain electrode layer in the trench, a second source/drain electrode layer on the second dielectric layer in the trench, a third dielectric layer on the second source/drain electrode layer in the trench, a 2D material layer overlying the hard mask layer, the first source/drain electrode layer, the second dielectric layer, the second source/drain electrode layer, and the third dielectric layer, a gate dielectric layer on the 2D material layer, and a gate electrode on the gate dielectric layer.
US10312363B1 Semiconductor device having improved edge trench, source electrode and gate electrode structures
A semiconductor device may include a device region having one or more active trenches, a field termination region having an edge trench. A depth of the edge trench is larger than a depth of the one or more active trenches. A thickness of an insulation layer in the edge trench is larger than a thickness of an insulation layer in the one or more active trenches. In some embodiments, the first depth is from 1.2 to 2.0 times larger than the second depth, and a first width of the edge trench is 1.5 to 4.0 times larger than a second width of the one or more active trenches. In a cross-sectional view, a gate electrode of the edge trench is laterally offset from the source electrode in a depth direction of the edge trench such that the gate electrode and the source electrode do not overlap.
US10312362B2 Switching element having inclined body layer surfaces
A switching element includes a semiconductor substrate that includes a first n-type semiconductor layer, a p-type body layer constituted by an epitaxial layer, and a second n-type semiconductor layer separated from the first n-type semiconductor layer by the body layer, a gate insulating film that covers a range across the surface of the first n-type semiconductor layer, the surface of the body layer, and the surface of the second n-type semiconductor layer, and a gate electrode that faces the body layer through the gate insulating film. An interface between the first n-type semiconductor layer and the body layer includes an inclined surface. The inclined surface is inclined such that the depth of the body layer increases as a distance from an end of the body layer increases in a horizontal direction. The inclined surface is disposed below the gate electrode.
US10312360B2 Method for producing trench high electron mobility devices
A method for producing a solid state device, including forming a first dielectric layer over an epitaxial layer at least partially covering the a silicon substrate and depositing a photoresist material there-over, removing a predetermined portion first dielectric layer to define an exposed portion, implanting dopants into the exposed portion to define a doped portion, preferentially removing silicon from the exposed portion to generate trenches having V-shaped cross-sections and having first and second angled sidewalls defining the V-shaped cross-section, wherein each angled sidewall defining the V-shaped cross-section is a silicon face having a 111 orientation, and forming a 2DEG on at least one sidewall.
US10312356B1 Heterojunction bipolar transistors with multiple emitter fingers and undercut extrinsic base regions
Device structures and fabrication methods for heterojunction bipolar transistors. Trench isolation regions are arranged to surround a plurality of active regions, and a collector is located in each of the active regions. A base layer includes a plurality of first sections that are respectively arranged over the active regions and a plurality of second sections that are respectively arranged over the trench isolation regions. The first sections of the base layer contain single-crystal semiconductor material, and the second sections of the base layer contain polycrystalline semiconductor material. The second sections of the base layer are spaced in a vertical direction from the trench isolation regions to define a plurality of cavities. A plurality of emitter fingers are respectively arranged on the first sections of the base layer.
US10312354B2 Method for making thin film transistor
A method of making a thin film transistor, the method including: forming a gate insulating layer on a gate electrode; placing a semiconductor layer on the gate insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises one nanowire; forming one opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, the conductive film layer is divided into two regions, one region is used as a source electrode, the other region is used as a drain electrode.
US10312352B2 Gate structure of field effect transistor with footing
In some embodiments, a field effect transistor structure includes a first semiconductor structure and a gate structure. The first semiconductor structure includes a channel region, and a source region and a drain region. The source region and the drain region are formed on opposite ends of the channel region, respectively. The gate structure includes a central region and footing regions. The central region is formed over the first semiconductor structure. The footing regions are formed on opposite sides of the central region and along where the central region is adjacent to the first semiconductor structure.
US10312349B2 Reducing resistance of bottom source/drain in vertical channel devices
During a fabrication of a semiconductor device, a recess is created in a substrate material disposed along a direction of a plane of fabrication. A layer of a removable material is formed in the recess. A bottom layer is formed above the layer of removable material. A vertical channel above the bottom layer is formed in a direction substantially orthogonal to the direction of the plane of fabrication. A gate is formed using a metal above the bottom layer and relative to the vertical channel. A tunnel is created under the bottom layer by removing the removable material from under the bottom layer such that the backside of the bottom layer forms a ceiling of the tunnel. The tunnel is filled using a conductive material such that the conductive material makes electrical contact with the backside of the bottom layer.
US10312348B1 Semiconductor device gate spacer structures and methods thereof
A semiconductor device includes a substrate having a channel region; a gate stack over the channel region; a seal spacer covering a sidewall of the gate stack, the seal spacer including silicon nitride; a gate spacer covering a sidewall of the seal spacer, the gate spacer including silicon oxide, the gate spacer having a first vertical portion and a first horizontal portion; and a first dielectric layer covering a sidewall of the gate spacer, the first dielectric layer including silicon nitride.
US10312343B2 Device and device manufacturing method
A device includes a vertical semiconductor switch including (i) a gate terminal and a first terminal provided on a substrate and (ii) a second terminal provided on the substrate, where the vertical semiconductor switch is configured to electrically connect or disconnect the first terminal and the second terminal, a first insulative film provided on the substrate, a second insulative film provided on the substrate, where the second insulative film is in contact with the first insulative film and thinner than the first insulative film, and a zener diode formed on the first insulative film and the second insulative film, where the zener diode includes a first portion that is formed on the first insulative film and connected to the first surface of the substrate and a second portion that is formed on the second insulative film and connected to the gate terminal.
US10312340B2 Semiconductor devices having work function metal films and tuning materials
A semiconductor device includes a first transistor comprising a first dielectric film on a substrate and a first work function metal film of a first conductivity type on the first dielectric film, a second transistor comprising a second dielectric film on the substrate and a second work function metal film of the first conductivity type on the second dielectric film, and a third transistor comprising a third dielectric film on the substrate and a third work function metal film of the first conductivity type on the third dielectric film. The first dielectric film comprises a work function tuning material and the second dielectric film does not comprise the work function tuning material. The first work function metal film has different thickness than the third work function metal film. Related methods are also described.
US10312339B2 Semiconductor device
In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an interface with a second nitride semiconductor layer. In plan view, an electrode portion is provided between a first electrode and a second electrode with a space between the first electrode and the second electrode, and a space between the second electrode and the electrode portion is smaller than the space between the first electrode and the electrode portion. An energy barrier is provided in a junction surface between the electrode portion and the second nitride semiconductor layer, the energy barrier indicating a rectifying action in a forward direction from the electrode portion to the second nitride semiconductor layer, and a bandgap of the second nitride semiconductor layer is wider than a bandgap of the first nitride semiconductor layer.
US10312338B2 Gate structure and method of fabricating the same
A gate structure includes at least one spacer defining a gate region over a semiconductor substrate, a gate dielectric layer disposed on the gate region over the semiconductor substrate, a first work function metal layer disposed over the gate dielectric layer and lining a bottom surface of an inner sidewall of the spacer, and a filling metal partially wrapped by the first work function metal layer. The filling metal includes a first portion and a second portion, wherein the first portion is between the second portion and the semiconductor substrate, and the second portion is wider than the first portion.
US10312337B2 Fabrication of nano-sheet transistors with different threshold voltages
A method of forming two or more nano-sheet devices with varying electrical gate lengths, including, forming at least two cut-stacks including a plurality of sacrificial release layers and at least one alternating nano-sheet channel layer on a substrate, removing a portion of the plurality of sacrificial release layers to form indentations having an indentation depth in the plurality of sacrificial release layers, and removing a portion of the at least one alternating nano-sheet channel layer to form a recess having a recess depth in the at least one alternating nano-sheet channel layers, where the recess depth is greater than the indentation depth.
US10312336B2 Memory transistor with multiple charge storing layers and a high work function gate electrode
Semiconductor devices including non-volatile memory devices and methods of fabricating the same are provided. Generally, the memory device includes a gate structure, a channel positioned between and electrically connecting a first diffusion region and a second diffusion region, and a tunnel dielectric layer, a multi-layer charge trapping layer, and a blocking dielectric layer disposed between the gate structure and the channel. In one embodiment, the multi-layer charge trapping layer includes a first dielectric layer disposed abutting a second dielectric layer and an anti-tunneling layer disposed between the first and second dielectric layers. The anti-tunneling layer includes an oxide, and the first and the second dielectric layers include a nitride. Other embodiments are also disclosed.
US10312332B2 Semiconductor device and method of forming the same
A semiconductor device is provided, which includes a substrate, a gate and a gate contact. The substrate has a well region, which has a source, a drain and a channel region extending between the source and the drain. The gate is on the well region and extends across the channel region. The gate contact is directly on the gate and vertically overlaps with the channel region. The gate contact has a strip shape of which a ratio of a length to a width is at least 2. The gate contact includes a gate conductive plug and a gate contact dielectric. The gate conductive plug directly contacts the gate. The gate contact dielectric surrounds side surfaces of the gate conductive plug and has a frame shape. A dielectric constant of the gate contact dielectric is substantially greater than 4.9.
US10312329B2 Semiconductor device and manufacturing method therefor
The present disclosure relates to the technical field of semiconductor processes, and discloses a semiconductor device and a manufacturing method therefor. The manufacturing method includes: providing a substrate structure including a substrate and a first material layer on the substrate, wherein a recess is formed in the substrate and the first material layer includes a nanowire; forming a base layer on the substrate structure; selectively growing a graphene layer on the base layer; forming a second dielectric layer on the graphene layer; forming an electrode material layer on the substrate structure to cover the second dielectric layer; defining an active region; and forming a gate by etching at least a portion of a stack layer to at least the second dielectric layer so as to form a gate structure surrounding an intermediate portion of the nanowire, where the gate structure includes a portion of the electrode material layer and the second dielectric layer. The present disclosure incorporates graphene into the semiconductor process and makes use of the features of graphene in a dual-gate structure.
US10312326B1 Long channels for transistors
A method includes forming a gate on a first fin, a second fin, and a third fin arranged on a substrate. The method includes depositing a semiconductor material on the first fin, the second fin, and the third fin. The method further includes depositing an interlayer dielectric (ILD) on the first fin, the second fin, and the third fin. The method further includes forming a first trench and a second trench through the ILD on a first side of the gate, and a third trench and a fourth trench through the ILD on a second side of the gate, the second trench coupling the second fin to the third fin, and the third trench coupling the first fin to the second fin. The method includes depositing a metal in the first trench, the second trench, the third trench, and the fourth trench.
US10312322B2 Power semiconductor device
A power semiconductor device includes a substrate including a first epitaxial layer, a second epitaxial layer, and a base substrate where the first epitaxial layer is disposed between the second epitaxial layer and the base substrate. The power semiconductor device includes an anode electrode and a cathode electrode disposed on the substrate, a well region disposed inside the substrate in a lower portion of the anode electrode, and having p-type conductivity. The power semiconductor device includes an NISO region disposed in a lower portion of the well region inside the substrate, and having a first n-type impurity concentration. The power semiconductor device includes an n-type buried layer disposed in a lower portion of the NISO region, and having a second impurity concentration greater than the first n-type impurity concentration, inside the substrate.
US10312321B2 Trigate device with full silicided epi-less source/drain for high density access transistor applications
After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure overlying a deep trench capacitor embedded in a substrate and forming a gate stack straddling a body region of the semiconductor fin, source/drain regions are formed in portions the semiconductor fin located on opposite sides of the gate stack by ion implantation. Next, a metal layer is applied over the source/drain region and subsequent annealing consumes entire source/drain regions to provide fully alloyed source/drain regions. A post alloyzation ion implantation is then performed to introduce dopants into the fully alloyed source/drain regions followed by an anneal to segregate the implanted dopants at interfaces between the fully alloyed source/drain regions and the body region of the semiconductor fin.
US10312320B2 Semiconductor device
The semiconductor device includes: a semiconductor layer in which a trench is formed having a side surface and a bottom surface; a second conductivity-type layer formed on the semiconductor layer on the side surface and the bottom surface of the trench; a first conductivity-type layer formed on the semiconductor layer so as to contact the second conductivity-type layer; a first electrode electrically connected to the first conductivity-type layer; a second electrode embedded in the trench and electrically connected to the second conductivity-type layer; and a barrier-forming layer which is arranged between the second electrode and the side surface of the trench and which, between said barrier-forming layer and the second conductivity-type layer, forms a potential barrier higher than the potential barrier between the second conductivity-type layer and the second electrode.
US10312316B2 Display apparatus and method of manufacturing the same, package cover plate
A display apparatus includes a display substrate, a package cover plate on the display substrate, and a plurality of FPCs; at one end of the FPC is a driver IC, and the other end of the FPC is connected to the display substrate; a groove is at the edge of the surface away from the display substrate, and the opening direction of the groove deviates from the display substrate; the groove includes a first groove wall, and a second and third groove walls, wherein the first groove wall is located within the package cover plate and the two sides of which are connected to one side of each of the second and third groove walls, respectively, while the other side of each of the second and third groove walls extends to the edge of the package cover plate.
US10312314B2 Display device, method of manufacturing the same, and electronic apparatus
There is provided a display device including: a light emitting element; and a drive transistor (DRTr) that includes a coupling section (W1) and a plurality of channel sections (CH) coupled in series through the coupling section (W1), wherein the drive transistor (DRTr) is configured to supply a drive current to the light emitting element.
US10312313B2 Display device
A display device according includes a display panel configured to display an image, a first flexible printed circuit film, and a second flexible printed circuit film. The display panel has a first pad area and a second pad area, the first flexible printed circuit film has a third pad area and a fourth pad area, and the second flexible printed circuit film has a fifth pad area and a sixth pad area. The third pad area is bonded to the first pad area, the sixth pad area is bonded to the second pad area, and the fifth pad area is bonded to the fourth pad area. An integrated circuit chip is mounted on the first flexible printed circuit film.
US10312310B2 OLED display and method of fabrication thereof
According to the present specification there is provided an active matrix OLED display and a method of fabrication thereof, the method comprising: providing a backplane and an OLED assembly and then joining the two together. The backplane comprises a plurality of controllable gated electronic components each at a predetermined position on or directly beneath a surface of the backplane substrate. The controllable gated electronic components are configured to control one or more pixels of the active matrix OLED display. The OLED assembly comprises one or more pixel regions each having one or more pixel contacts. In addition, the OLED assembly is formed separately from the backplane on an OLED substrate different from the backplane substrate. The joining comprises electrically connecting one or more of the pixel contacts to the corresponding controllable gated electronic components.
US10312308B2 Organic light emitting device and method for manufacturing same
A light emitting device includes: a base substrate; banks extending in a direction along a surface of the base substrate; and light emitting elements extending along the direction in groove regions defined by the banks. Each light emitting element includes one or more functional layers between a pair of electrodes. Within at least one of the groove regions: a sub-bank extends along the one direction and has a height equal to or smaller than a height of the banks; for each of the one or more functional layers in the groove regions, portions of each of the one or more functional layers on each side of the sub-bank are made of a same material; and a thickness of the one or more functional layers is smaller than a height of the sub-bank.
US10312304B2 Organic light-emitting diode panel and manufacturing method using the same
An organic light-emitting diode panel and a manufacturing method using the same are provided in the present invention. The OLED panel includes at least a pixel. The pixel includes an anode conducting layer, an insulation layer, an emitting layer (EML), a cathode layer and a reference voltage layer. The anode conducting layer is disposed on a transparent substrate. The insulation layer is disposed on the anode conducting layer and has a first cavity and a second cavity, wherein there is a distance between the first anode layer and the bottom of second cavity. There are a hole injection layer (HIL) and a hole transmission layer (HTL). The HIL is disposed on the first anode conducting layer. The HTL is disposed on the HIL. There are a cathode layer, an electronic injection layer (EIL) and an electronic transmission layer (ETL) in the second cavity. The cathode layer is exposed by the bottom of the second cavity. The EIL is disposed on the cathode layer. The ETL is disposed on the EIL. The EML is disposed on the insulation layer. The reference voltage layer is disposed on the EML.
US10312303B2 Display device and method of manufacturing the same
A display device includes a base substrate, a plurality of pixels disposed on the base substrate, a light collecting member disposed on the plurality of pixels, and an encapsulation member disposed on the light collecting member and facing the base substrate to cover the plurality of pixels, where the light collecting member includes a light collecting layer including a protrusion pattern disposed on an upper surface of the light collecting layer and the protrusion pattern is protruded in one direction to change an optical path of a light passing through the light collecting layer.
US10312302B2 Flexible display device
A flexible display device including a display panel including a base surface, a first touch sensor disposed on the base surface, and a second touch sensor disposed on the base surface and intersecting the first touch sensor. The first touch sensor includes first sensor parts, each of the first sensor parts comprising first conductive lines, and a first crossing part connecting two adjacent first sensor parts, the first crossing part comprising second conductive lines. The second touch sensor includes second sensor parts, each of the second sensor parts including third conductive lines, and a second crossing part including fourth conductive lines disposed between the second conductive lines, and a first connection electrode connecting the third conductive lines to the fourth conductive lines and insulated from the second conductive lines.
US10312298B2 Organic light emitting display and method of fabricating the same
Disclosed are an organic light emitting display, which may achieve weight reduction and slimming, and a method of fabricating the same. An encapsulation part of the organic light emitting display includes a plurality of inorganic encapsulation layers and at least one organic encapsulation layer disposed between the inorganic encapsulation layers, and a plurality of touch electrodes disposed on one of the inorganic encapsulation layers and the at least one organic encapsulation layer of the encapsulation part, each touch electrode having electrically independent self capacitance, thereby achieving weight reduction and slimming of the organic light emitting display.
US10312297B2 Organic light emitting display device and touch sensing method for the same
Disclosed is an organic light emitting display device and a touch sensing method for the same. The organic light emitting display device includes a first driving electrode disposed on a portion of a first area of a display device, a second driving electrode disposed on a portion of a second area of the display device and connected to the first driving electrode, a first sensing electrode disposed on another portion of the first area and configured to correspond to the first driving electrode, and a second sensing electrode disposed on another portion of the second area and configured to correspond to the second driving electrode. An organic light emitting display device in which a thinner thickness is implemented and calculation of a touch point is performed more quickly by effectively transmitting a driving signal and a touch sensing method for the same is provided.
US10312295B2 Display device, electro-optical device, electric equipment, metal mask, and pixel array
A metal mask for making a display device. The display device includes a plurality of pixels, each of the pixels including sub-pixels of a first color, a second color, and a third color, the sub-pixels of the first and second colors being color in a column, and the sub-pixel of the third color being in a row with respect to the sub-pixels of the first and second colors. The metal mask forms the sub-pixels of the third color and includes a plurality of first openings in a first column and a plurality of second openings in a second column next to the first column, where each of the first openings has a first side that is directly opposite, in a direction perpendicular to the first column, respective parts of second sides of both of an adjacent pair of the second openings.
US10312294B2 Display substrate, display panel and display apparatus
A display substrate, a display panel and a display apparatus are provided. The display substrate includes a plurality of sub pixel units, the plurality of sub pixel units is arranged in an array, each row or each column of sub pixels includes a first sub pixel and a second sub pixel, a line segment formed by the row of sub pixels has a midpoint in a row direction or a line segment formed by the column of sub pixels has a midpoint in a column direction, the first sub pixel and the second sub pixel are configured for displaying a same color, a distance from the first sub pixel to the midpoint is less than a distance from the second sub pixel to the midpoint and an aperture area of the first sub pixel is greater than that of the second sub pixel.
US10312291B2 Photoelectric conversion device and imaging device
According to one embodiment, a photoelectric conversion device includes a first electrode, a second electrode, a photoelectric conversion layer provided between the first electrode and the second electrode, and a first layer provided between the second electrode and the photoelectric conversion layer, the first layer including a phenyl pyridine derivative. The phenyl pyridine derivative is represented by formula (1) below, Rings A, B, C, and D in the formula (1) are pyridine rings. Each of R1 to R11 in the formula (1) is one selected from the group consisting of hydrogen, a straight-chain alkyl group, a branched alkyl group, an aryl group, and an electron-withdrawing heteroaryl group.
US10312290B2 Optoelectronic component and method for producing an optoelectronic component
Various embodiments may relate to an optoelectronic component, including an optoelectronic structure formed for providing an electromagnetic radiation, a measuring structure formed for measuring the electromagnetic radiation, and a waveguide formed for guiding the electromagnetic radiation. The optoelectronic structure and the measuring structure are optically coupled to the waveguide. The waveguide includes scattering centers distributed in a matrix, wherein the scattering centers are distributed in the matrix in such a way that part of the electromagnetic radiation is guided from the optoelectronic structure to the measuring structure.
US10312288B2 Switching element, semiconductor device, and semiconductor device manufacturing method
In the cases of performing programming by forming a two-terminal-type variable resistance element on a semiconductor device, it has been difficult to control the programming, and malfunctions have often occurred. This switching element includes at least a first variable resistance element, a second variable resistance element, a first rectifying element, and a second rectifying element, one end of the first variable resistance element and one end of the second variable resistance element are respectively connected to one end of the first rectifying element and one end of the second rectifying element, and each of the rectifying elements has two terminals.
US10312283B2 Imaging device and method of producing the same
An imaging device includes a pixel circuit region that includes a plurality of pixel circuits arranged in an array therein and a plurality of light guide portions. The imaging device also includes a peripheral circuit region that is positioned at a periphery of the pixel circuit region and includes a peripheral circuit. The imaging device also includes an intermediate region that is positioned between the pixel circuit region and the peripheral circuit region, forms a boundary with the pixel circuit region and the peripheral circuit region, and includes a plurality of dummy light guide portions and a plurality of contacts through which a reference potential of the plurality of pixel circuits is supplied.
US10312279B2 High dynamic range pixel with in-pixel light shield structures
Multi-photodiode image pixels may include sub-pixels with differing light sensitivities. Microlenses may be formed over the multi-photodiode image pixels so that light sensitivity of sub-pixels in an outer group of sub-pixels is enhanced. To prevent high angle light incident upon one of the sub-pixels of the image pixel from generating charges in a photosensitive region of another sub-pixel of the image pixel, intra-pixel isolation structures may be formed. Intra-pixel isolation structures may surround, and in some embodiments, overlap the light collecting region of an inner photodiode. When the intra-pixel isolation structures have a different index of refraction than light filtering material formed adjacent to the isolation structures, high angle light incident upon the isolation structures may be reflected back into the sub-pixel it was initially incident upon. Intra-pixel isolation structures may be formed entirely from optically transparent materials or a combination of optically transparent and opaque materials.
US10312276B2 Image sensor package to limit package height and reduce edge flare
An image sensor package, comprising a silicon substrate; an image sensor pixel array that is formed on the silicon substrate; a peripheral circuit region that is formed around the image sensor pixel array on the silicon substrate; a redistribution layer (RDL) that is electrically coupled to the peripheral circuit region; at least one solder ball that is electrically coupled to the RDL; and a cover glass that is coupled to the RDL. No part of the RDL is located directly above or below the image sensor pixel array. No part of the at least one solder ball is located directly above or below the silicon substrate. A dark material layer is implemented to prevent an edge flare effect of the image sensor pixel array.
US10312275B2 Single-photon avalanche diode image sensor with photon counting and time-of-flight detection capabilities
A back side illuminated image sensor may operate using the single-photon avalanche diode (SPAD) concept in a Geiger mode of operation for single photon detection. The image sensor may be implemented using two layer stacking with a silicon on insulator (SOI) chip. The chip-to-chip electrical connections between the top level image sensing chip and the second level ASIC circuit chip may be realized at each pixel with a single bump connection per pixel. A light level signal may be obtained from pixels that have photon counting capabilities while a distance measurement signal for 3-dimensional imaging may be obtained from pixels that have time-of-flight (ToF) detection capabilities. Both types of pixels may be integrated within the same array and use the same SPAD structure placed on the top chip.
US10312274B1 Single photon avalanche diode (SPAD) with variable quench resistor
A photosensitive diode has an anode terminal and a cathode terminal. A passive quench resistance circuit includes a resistor with a variable resistance that is controlled by a control signal. The resistor is electrically connected to the cathode terminal. The resistor of the passive quench resistance circuit is formed by a first semiconductor region. The control signal is applied to a control gate of the passive quench resistance circuit. The control gate is formed by a second semiconductor region that is insulated from the first semiconductor region and extends parallel to the first semiconductor region. The voltage of the control signal applied to the control gate controls the variable resistance.
US10312273B2 Low temperature poly-silicon TFT substrate structure and manufacture method thereof
A method for manufacturing a LTPS TFT substrate is provided. Buffer layers are respectively provided in a drive TFT area and a display TFT area and have different thicknesses, such that the thickness of the buffer layer in the drive TFT area is larger than the thickness of the buffer layer in the display TFT area so that different temperature grades are formed in a crystallization process of poly-silicon to achieve control of the grain diameters of crystals. A poly-silicon layer that is formed in the drive TFT area in the crystallization process has a large lattice dimension to increase electron mobility thereof. Fractured crystals can be formed in a poly-silicon layer of the display TFT area in the crystallization process for ensuring the uniformity of the grain boundary and increasing the uniformity of electrical current. Accordingly, the electrical property demands for different TFTs can be satisfied.
US10312271B2 Array substrate, manufacturing method thereof and display device
An array substrate, a manufacturing method thereof and a display device. The array substrate includes a substrate, a thin film transistor on the substrate, and including an active layer including a source region, a drain region and a channel region between the source region and the drain region; a heat dissipation layer disposed between the substrate and the drain region; and the orthographic projection of the heat dissipation layer on the substrate at least covers the orthographic projection of a part of the source region and a part of the drain region on the substrate. The manufacturing method is for the manufacturing of the array substrate. The array substrate can improve the sizes and uniformity of the crystal particles.
US10312270B2 Array substrate assembly and method of manufacturing the same
A method of manufacturing an array substrate assembly and an array substrate assembly manufactured by the method are disclosed. The method includes: manufacturing a gate metal layer on a substrate, the gate metal layer including a gate line and a common electrode signal line spaced from each other; forming a gate insulating layer, an active layer, a source-drain electrode layer, a passivation layer, and a protective pattern on the gate metal layer; and forming, in the passivation layer and the gate insulating layer, a via hole configured for a connection to the common electrode signal line. An orthogonal projection of the protective pattern on the substrate and an orthogonal projection of the via hole on the substrate partly coincide with each other, and the orthogonal projection of the protective pattern on the substrate and an orthogonal projection of the gate line on the substrate partly coincide with each other.
US10312267B2 Semiconductor device and electronic device
An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 μm is 1 aA or less.
US10312260B2 GaN transistors with polysilicon layers used for creating additional components
A GaN transistor with polysilicon layers for creating additional components for an integrated circuit and a method for manufacturing the same. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer.
US10312259B2 Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing same
Multiple threshold voltage devices on hybrid oriented substrates, and methods of manufacturing same are disclosed. A method for manufacturing a semiconductor device comprises performing a single epitaxy step on a hybrid orientation substrate including a first region having a first crystallographic orientation and a second region having a second crystallographic orientation different from the first crystallographic orientation, wherein the single epitaxy step forms a first layer disposed on the first region and a second layer disposed on the second region, the first layer has the first crystallographic orientation and a first composition, and the second layer has the second crystal orientation and a second composition different from the first composition.
US10312257B2 Semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device includes forming a first semiconductor layer, forming a stacked body including alternately formed first and second layers on the first semiconductor layer, forming a hole from an upper surface of the stacked body to the first semiconductor layer to expose the first semiconductor layer therein. A first insulating layer is formed on the inner wall of the hole, and a second semiconductor layer is formed on the first insulating layer within the hole, wherein the second semiconductor layer is electrically connected to the first semiconductor layer. A metal layer is provided in contact with at least one of the first and second semiconductor layers. The stacked body, semiconductor layers, insulating layer and metal layer are exposed to an annealing temperature sufficient to cause migration of metal in the metal layer into one of the first and second semiconductor layers.
US10312255B2 Semiconductor device and method for manufacturing same
According to one embodiment, the plurality of charge storage films are separated in a stacking direction with a second air gap interposed. The plurality of insulating films are provided on side surfaces of electrode layers opposing the charge storage films, on portions of surfaces of the electrode layers continuous from the side surfaces and opposing a first air gap between the electrode layers, and on corners of the electrode layers between the portions and the side surfaces. The plurality of insulating films are divided in the stacking direction with a third air gap interposed and without the charge storage films being interposed. The third air gap communicates with the first air gap and the second air gap between the first air gap and the second air gap.
US10312253B2 Three-dimensional memory device and method of forming the same
A method of forming a three-dimensional memory device is provided. Insulating layers and sacrificial layers are stacked alternatively on a substrate. At least one first opening is formed through the insulating layers and the sacrificial layers. Protection layers are formed on surfaces of the sacrificial layers exposed by the sidewall of the first opening. A charge storage layer is formed on the sidewall of the first opening and covers the protection layers. A channel layer is formed on the charge storage layer. The sacrificial layers and the protection layers are replaced with electrode layers. A three-dimensional memory device is further provided.
US10312249B2 Method for forming a semiconductor device
A method for forming a semiconductor device is provided, including providing a substrate having a first area comprising first semiconductor structures and a second area, wherein one of the first semiconductor structures comprises a memory gate made of a first polysilicon layer, and a second semiconductor structure comprises a second polysilicon layer disposed within the second area on the substrate; forming an organic material layer on the first semiconductor structures within the first area and on the second polysilicon layer within the second area; and patterning the organic material layer to form a patterned organic material layer, and the organic material layer exposing the memory gates of the first semiconductor structures, wherein a first pre-determined region and a second pre-determined region at the substrate are covered by the patterned organic material layer.
US10312248B2 Virtual ground non-volatile memory array
A memory device with memory cell pairs each having a single continuous channel region, first and second floating gates over first and second portions of the channel region, an erase gate over a third portion of the channel region between the first and second channel region portions, and first and second control gates over the first and second floating gates. For each of the pairs of memory cells, the first region is electrically connected to the second region of an adjacent pair of memory cells in the same active region, and the second region is electrically connected to the first region of an adjacent pair of the memory cells in the same active region.
US10312247B1 Two transistor FinFET-based split gate non-volatile floating gate flash memory and method of fabrication
A non-volatile memory cell formed on a semiconductor substrate having an upper surface with an upwardly extending fin with opposing first and second side surfaces. First and second electrodes are in electrical contact with first and second portions of the fin. A channel region of the fin includes portions of the first and second side surfaces that extend between the first and second portions of the fin. A floating gate extends along the first side surface of a first portion of the channel region, where no portion of the floating gate extends along the second side surface. A word line gate extends along the first and second side surfaces of a second portion of the channel region. A control gate is disposed over the floating gate. An erase gate has a first portion disposed laterally adjacent to the floating gate and a second portion disposed vertically over the floating gate.
US10312245B2 Laser spike annealing for solid phase epitaxy and low contact resistance in an SRAM with a shared pFET and nFET trench
Embodiments are directed to a method of forming a semiconductor device and resulting structures having a shared SRAM trench and a common contact having a low contact resistance. The method includes forming a first semiconductor fin opposite a surface of a substrate and forming a second semiconductor fin opposite the surface of the substrate and adjacent to the first semiconductor fin. A doped region is formed over portions of each of the first and second semiconductor fins and a dielectric layer is formed over the doped regions. A shared trench is formed in the dielectric layer exposing portions of the doped regions. The exposed doped regions are then amorphized and recrystallized.
US10312244B2 Bi-stable static random access memory (SRAM) bit cells that facilitate direct writing for storage
Bi-stable static random access memory (SRAM) bit cells that facilitate direct writing for storage are disclosed. In one aspect, a bi-stable SRAM bit cell includes source and drain regions, and a gate region formed over a well region between the source and drain regions, which results in two (2) bipolar junction transistors (BJTs) formed within a bi-stable SRAM bit cell. A base tap region and a collector tap region are employed to provide voltages for read and write operations. The base tap region is formed beside a shallow trench isolation (STI) region having a bottom surface higher in a Y-axis direction in the well region than a bottom surface of the well region. The collector tap region is formed on one side of an STI region having a bottom surface lower in the Y-axis direction in the substrate than the bottom surface of the well region.
US10312233B2 Semiconductor device
A semiconductor device includes a base region of second conductivity type formed on a drift layer of first conductivity type, a source region of first conductivity type located in the base region, a trench passing through the base region and the source region and dividing cell regions in plan view, a protective diffusion layer of second conductivity type disposed on a bottom of the trench, a gate electrode embedded in the trench with a gate insulating film therebetween, a source electrode electrically connected to the source region, and a protective contact region disposed at each of positions of three or more cell regions and connecting the protective diffusion layer and the source electrode to each other. The protective contact regions are disposed such that a triangle whose vertices are centers of three protective contact regions located closest to one another is an acute triangle.
US10312228B2 Display device
A display device includes a light-emitting unit and a light conversion layer. The light conversion layer is disposed on the light-emitting unit, and the light conversion layer includes plural quantum dot portions and a first shielding portion surrounding the plural quantum dot portions. One of the plural quantum dot portions has a surface and at least a part of the surface is a curved surface.
US10312227B2 Power semiconductor module
First and second element pairs formed by connecting FWDs and MOSFETs in antiparallel are connected in series and sealed by resin to configure a core module. In the core module, a first drain electrode, a first source electrode, a second drain electrode, and a second source electrode are exposed to the surface. A cover with terminals is put on the core module. At this time, each of the direct-current positive electrode terminal, the direct-current negative electrode terminal, and the alternating-current terminal of the cover with terminals is electrically connected to each of the first drain electrode, the second source electrode, and the first source electrode and the second drain electrode.
US10312226B2 Semiconductor devices comprising protected side surfaces and related methods
Methods of protecting semiconductor devices may involve cutting partially through a thickness of a semiconductor wafer to form trenches between stacks of semiconductor dice on regions of integrated circuitry of the semiconductor wafer. A protective material may be dispensed into the trenches and to a level at least substantially the same as a height of the stacks of semiconductor dice. Material of the semiconductor wafer may be removed from a back side thereof at least to a depth sufficient to expose the protective material in the trenches. A remaining thickness of the protective material between the stacks of semiconductor dice may be cut through.
US10312224B2 High density pixelated LED and devices and methods thereof
At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
US10312217B2 Method for low temperature bonding and bonded structure
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2. The surfaces to be bonded are polished to a high degree of smoothness and planarity. VSE may use reactive ion etching or wet etching to slightly etch the surfaces being bonded. The surface roughness and planarity are not degraded and may be enhanced by the VSE process. The etched surfaces may be rinsed in solutions such as ammonium hydroxide or ammonium fluoride to promote the formation of desired bonding species on the surfaces.
US10312209B2 Manufacturing method of semiconductor package
The present disclosure provides a semiconductor package, which includes a substrate, a passivation layer, a post-passivation interconnect (PPI) having a top surface; and a conductive structure. The top surface of the PPI includes a first region receiving the conductive structure, and a second region surrounding the first region. The second region includes metal derivative transformed from materials made of the first region. The present disclosure provide a method of manufacturing a semiconductor package, including forming a first flux layer covering a portion of a top surface of a PPI; transforming a portion of the top surface of the PPI uncovered by the first flux layer into a metal derivative layer; removing the first flux layer; forming a second flux layer on the first region of the PPI; dropping a solder ball on the flux layer; and forming electrical connection between the solder ball and the PPI.
US10312207B2 Passivation scheme for pad openings and trenches
An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer.
US10312205B2 Fan-out semiconductor package
A fan-out semiconductor package includes a semiconductor chip having an active surface, the active surface having a connection pad disposed thereon, and an inactive surface opposing the active surface; an encapsulant encapsulating at least a portion of the semiconductor chip; an insulating layer disposed on the active surface of the semiconductor chip; and a redistribution layer disposed on the insulating layer and electrically connected to the connection pad. The insulating layer includes a low tan delta (Df) dielectric material.
US10312199B2 Semiconductor device and manufacturing method thereof
A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.
US10312197B2 Method of manufacturing semiconductor device and semiconductor device
According to one embodiment, a method of manufacturing a semiconductor device includes forming a sealing resin layer containing an inorganic filler so as to seal a semiconductor chip, removing a portion of the surface of the sealing resin layer by dry etching such that a portion of the inorganic filler is exposed, and forming a shield layer so as to cover at least the sealing resin layer.
US10312196B2 Semiconductor packages including indicators for evaluating a distance and methods of calculating the distance
A semiconductor package may include a package substrate to which a first semiconductor chip is attached, an encapsulant covering the first semiconductor chip, and an indicator disposed within the semiconductor package. A side surface of the indicator is exposed at a side surface of the semiconductor package, and a width of a vertical section of the indicator parallel with the exposed side surface of the indicator varies as the vertical section of the indicator becomes farther from the side surface of the semiconductor package.
US10312193B2 Package comprising switches and filters
A package includes a redistribution portion, a first portion, and a second portion. The first portion is coupled to the redistribution portion. The first portion includes a first switch comprising a plurality of switch interconnects, and a first encapsulation layer that at least partially encapsulates the first switch. The second portion is coupled to the first portion. The second portion includes a first plurality of filters. Each filter includes a plurality of filter interconnects. The second portion also includes a second encapsulation layer that at least partially encapsulates the first plurality of filters. The first portion includes a second switch positioned next to the first switch, where the first encapsulation layer at least partially encapsulates the second switch. The second portion includes a second plurality of filters positioned next to the first plurality of filters, where the secod encapsulation layer at least partially encapsulates the second plurality of filters.
US10312191B2 Integrated circuit devices including a vertical memory device
Provided is an integrated circuit device including a plurality of word lines overlapping each other, in a vertical direction, on a substrate, a plurality of channel structures extending in the vertical direction through the plurality of word lines on an area of the substrate, a plurality of bit line contact pads on the plurality of channel structures, and a plurality or bit lines, wherein the plurality of bit lines include a plurality of first bit lines extending parallel to each other at a first pitch in a center region of the area, and a plurality of second bit lines extending at a second pitch in an edge region of the area, the second pitch being different from the first pitch.
US10312187B2 Multi-row wiring member for semiconductor device and method for manufacturing the same
A multi-row wiring member for semiconductor device configured of a plurality of wiring members arrayed in a matrix includes a resin layer, a first plating layer forming internal terminals, a plating layer forming wiring portions and a second plating layer forming external terminals. The first plating layer is formed in the resin layer with lower faces thereof uncovered in the bottom surface of the resin layer. The plating layer forming wiring portions is formed on the first plating layer in the resin layer. The second plating layer is formed on partial areas within areas of the plating layer forming wiring portions, with upper faces thereof being uncovered on a top-surface side of the resin layer. On a bottom-surface side of the resin layer, a resin frame is integrally formed with the resin layer at the margin around an aggregate of individual wiring members for semiconductor devices arrayed in a matrix.
US10312186B2 Heat sink attached to an electronic component in a packaged device
A method for forming a packaged electronic device includes providing a substrate comprising a lead and a pad. The method includes attaching a thermally conductive structure to the pad and attaching an electronic component to one of the thermally conductive structure or the pad. The method includes electrically coupling the electronic component to the lead, and forming a package body that encapsulates the electronic component and at least portions of the lead, the pad, and the thermally conductive structure, wherein the package body has a first major surface and a second major surface opposite to the first major surface, and one of the first bottom surface of the thermally conductive structure or the bottom surface of the pad is exposed in the first major surface of the package body.
US10312185B2 Inductively coupled microelectromechanical system resonator
An integrated circuit package includes a first die that has a microelectromechanical system (MEMS) resonator coupled to a coil. A second die includes a coil fabricated on a top surface of the second die, and an electronic circuit with tank circuit terminals fabricated on the second die and coupled to the second coil. The second die is positioned adjacent the first die such that the first coil is operable to electromagnetically couple to the second coil.
US10312184B2 Semiconductor systems having premolded dual leadframes
A dual leadframe (100) for semiconductor systems comprising a first leadframe (110) having first metal zones separated by first gaps, the first zones including portions of reduced thickness and joint provisions in selected first locations, and further a second leadframe (120) having second metal zones separated by second gaps, the second zones including portions of reduced thickness and joint provisions (150) in selected second locations matching the first locations. The second leadframe is stacked on top of the first leadframe and the joint provisions of the matching second and first locations linked together. The resulting dual leadframe may further include insulating material (140) filling the first and second gaps and the zone portions of reduced thickness, and has insulating surfaces coplanar with the top and bottom metallic surfaces.
US10312177B2 Thermal interface materials including a coloring agent
The present disclosure provides thermal interface materials that are useful in transferring heat from heat generating electronic devices, such as computer chips, to heat dissipating structures, such as heat spreaders and heat sinks. The thermal interface material also includes a coloring agent selected from the group consisting of: an iron based inorganic pigment; and an organic pigment.
US10312176B2 Semiconductor device
A semiconductor device comprises: a substrate; a multi-layer semiconductor layer located on the substrate, the multi-layer semiconductor layer being divided into an active area and a passive area outside the active area; a gate electrode, a source electrode and a drain electrode all located on the multi-layer semiconductor layer and within the active area; and a heat dissipation layer covering at least one portion of the active area and containing a heat dissipation material. In embodiments of the present invention, a heat dissipation layer covering at least one portion of the active area is provided in the semiconductor device. The arrangement of the heat dissipation layer adds a heat dissipation approach for the semiconductor device in the planar direction, thus the heat dissipation effect of the semiconductor device is improved.
US10312175B1 Diamond air bridge for thermal management of high power devices
A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.
US10312174B2 Thermal management system
A thermal management system is described. The thermal management system being well suited for electronic devices having limited size and operational components that produce excess heat. The thermal management system includes a thermal transport mechanism formed of material having anisotropic thermal conducting properties such that heat is transported from a heat source to a heat sink using a directed heat path. The directed heat path provided by regions having a first thermal conductivity embedded within a substrate characterized as having a second thermal conductivity that is less than the first thermal conductivity.
US10312173B2 Packaged semiconductor components having substantially rigid support members and methods of packaging semiconductor components
Packaged semiconductor components having substantially rigid support member are disclosed. The packages can include a semiconductor die and a support member proximate to the semiconductor die. The support member is at least substantially rigid. The packages can further include an adhesive between the support member and the semiconductor die and adhesively attaching the support member to the semiconductor die. The packages can also include a substrate carrying the semiconductor die and the support member attached to the semiconductor die.
US10312158B2 Method for forming semiconductor device structure with gate structure
A method for forming a semiconductor device structure is provided. The method includes forming a first amorphous layer over a substrate. The substrate has a base portion and a first fin portion over the base portion, and the first amorphous layer covers the first fin portion. The method includes annealing the first amorphous layer to crystallize the first amorphous layer into a first polycrystalline layer. The method includes forming a second amorphous layer over the first polycrystalline layer. The method includes removing a first portion of the second amorphous layer and a second portion of the first polycrystalline layer under the first portion. The remaining second amorphous layer and the remaining first polycrystalline layer together form a first gate structure over and across the first fin portion.
US10312154B2 Method of forming vertical FinFET device having self-aligned contacts
A vertical FinFET includes a semiconductor fin formed over a semiconductor substrate. A self-aligned first source/drain contact is electrically separated from a second source/drain contact by a spacer layer that is formed over an endwall of the fin. The spacer layer, which comprises a dielectric material, allows the self-aligned first source/drain contact to be located in close proximity to an endwall of the fin and the associated second source/drain contact without risk of an electrical short between the adjacent contacts.
US10312150B1 Protected trench isolation for fin-type field-effect transistors
Methods of forming a fin-type field-effect transistor. A gate structure is formed that extends across a plurality of semiconductor fins. A spacer layer composed of a dielectric material is conformally deposited over the gate structure, the semiconductor fins, and a dielectric layer in gaps between the semiconductor fins. A protective layer is conformally deposited over the spacer layer. The protective layer over the dielectric layer in the gaps between the semiconductor fins is masked, and the protective layer is then removed from the gate structure and the semiconductor fins selective to the dielectric material of the spacer layer.
US10312146B2 Method for fabricating semiconductor device
A method for fabricating a semiconductor structure includes forming a plurality of mandrels over a substrate, wherein the substrate comprises a semiconductor substrate as a base. Then, a first dielectric layer is formed to cover on a predetermined mandrel of the mandrels. A second dielectric layer is formed over the substrate to cover the mandrels. The mandrels are removed, wherein a remaining portion of the first dielectric layer and the second dielectric layer at a sidewall of the mandrels remains on the substrate. An anisotropic etching process is performed over the substrate until a top portion of the semiconductor substrate is etched to form a plurality of fins corresponding to the remaining portion of the first dielectric layer and the second dielectric layer.
US10312144B2 Method of dividing a wafer by back grinding
A wafer processing method for divides a wafer into individual device chips along a plurality of division lines. The method includes forming a dividing groove along each division line formed on the front side of the wafer, the dividing groove having a depth corresponding to the finished thickness of each device chip, thinning the wafer to expose the dividing groove to the back side of the wafer, thereby dividing the wafer into the individual device chips, applying a liquid resin for die bonding to the back side of the wafer and next solidifying the liquid resin applied to the back side of the wafer, thereby forming a die bonding resin film having a predetermined thickness on the back side of each device chip, and isolating each device chip from the wafer.
US10312142B2 Method of forming superconductor structures
A method of forming a superconductor structure is provided. The method comprises forming a superconducting element in a first dielectric layer that has a top surface aligned with the top surface of the first dielectric layer, forming a second dielectric layer over the first dielectric layer and the superconducting element, and forming an opening in the second dielectric layer to a top surface of the superconducting element. The method also comprises performing a cleaning process on the top surface of the superconducting element to remove oxides formed on the top surface of the superconducting element at a first processing stage, forming a protective barrier over the top surface of the superconducting element, and moving the superconductor structure to a second processing stage for further processing.
US10312141B2 Preclean methodology for superconductor interconnect fabrication
A method is provided of forming a superconductor device interconnect structure. The method includes forming a first dielectric layer overlying a substrate, and forming a superconducting interconnect element in a first dielectric layer, such that the superconducting interconnect element has a top surface aligned with a top surface of the first dielectric layer to form a first interconnect layer. The method also includes performing a plasma clean on a top surface of the first interconnect layer, and depositing a second dielectric layer over the first dielectric layer.
US10312138B2 Semiconductor devices
A semiconductor device includes a comprise a substrate including a main zone and an extension zone, vertical channels on the main zone, and an electrode structure including gate electrodes stacked on the substrate. The vertical channel structures extend in a first direction perpendicular to a top surface of the substrate. The gate electrodes include line regions and contact regions. The line regions extend from the main zone toward the extension zone along a second direction the second direction that is perpendicular to the first direction. The contact regions are on ends of the line regions and are thicker than the line regions. A spacing distance in the second direction between the contact regions is greater than a spacing distance in the first direction between the line regions.
US10312136B2 Etch damage and ESL free dual damascene metal interconnect
Some embodiments relate to a semiconductor device manufacturing process. In the process, a substrate is provided, and a sacrificial layer is formed over the substrate. An opening is patterned through the sacrificial layer, and the opening is filled with conductive material. The sacrificial layer is removed while the conductive material is left in place. A first dielectric layer is formed along sidewalls of the conductive material that was left in place.
US10312134B2 High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm; a Group IVA nitride layer in contact with the semiconductor handle substrate, the Group IVA nitride layer selected from the group consisting of carbon nitride, silicon carbon nitride, and a combination thereof; a dielectric layer in contact with the Group IVA nitride layer; and a semiconductor device layer in contact with the dielectric layer.
US10312130B2 LTPS array substrate, method for manufacturing the same, and display device
An LTPS array substrate, a method for manufacturing the same, and a display device are disclosed. According to the method, a flat layer is formed on an electrode. The flat layer is formed through washing, baking to remove water, hydrophobization treatment, photoresist coating, drying in vacuum, pre-baking, exposing, developing, baking, and aching procedures in sequence, and the baking procedure comprises at least baking for twice with different temperatures. According to the method, the organic film of the flat layer can be preliminarily solidified. In this manner, the problem that the taper angle at via hole position is too small, which is resulted from the liquidity of photoresist material of the flat layer, can be solved.
US10312128B2 Chemical-mechanical polish (CMP) devices, tools, and methods
Chemical-mechanical polishing (CMP) devices, tools, and methods are disclosed. In some embodiments, a device for a CMP tool includes a carrier and an embedded dummy disk coupled to the carrier. The embedded dummy disk comprises a substrate and a film disposed over the substrate. The carrier is coupleable to an arm of a handler of the CMP tool. The carrier and the embedded dummy disk are adapted to be embedded within a housing of the CMP tool. The embedded dummy disk is adapted to be polished by the CMP tool in preparation for a polishing process for a wafer.
US10312127B2 Compliant robot blade for defect reduction
Embodiments of substrate transfer robot blades to engage and support a substrate during transfer are provided herein. In some embodiments, a substrate transfer robot may include a blade body having a blade support surface; and a plurality of compliant pads, each comprising a contact surface and an opposite bottom surface supported by the body and arranged to support a substrate when disposed on the substrate transfer robot blade.
US10312123B2 Method for compensating probe misplacement and probe apparatus
A method for compensating probe misplacement and a probe apparatus are provided. The method is applicable to a probe module which includes a probe and a fixing base. The probe includes a probe body section and a probe tip section. The probe body section is fixed on the fixing base. The method includes: measuring a temperature of a probe body of the probe body section of the probe; calculating, according to the temperature of the probe body, thermal expansion amount of the probe along a length direction of the probe body section; calculating a compensation value according to the thermal expansion amount; moving the probe or a to-be-tested element according to the calculated compensation value, to align a probe tip of the probe tip section with the to-be-tested element or align the to-be-tested element with the probe tip of the probe tip section.
US10312120B2 Position and temperature monitoring of ALD platen susceptor
Apparatus and methods of measuring and controlling the gap between a susceptor assembly and a gas distribution assembly are described. Apparatus and methods for positional control and temperature control for wafer transfer purposes are also described.
US10312116B2 Methods and apparatus for rapidly cooling a substrate
Methods and apparatus for changing the temperature of a substrate are provided. In some embodiments, a method includes: placing a substrate onto a support surface of a substrate support disposed within an inner volume of a cooling chamber; moving at least one of the substrate support or a plate disposed in the cooling chamber opposite the substrate support from a first position, in which the substrate is placed onto the support surface, to a second position, in which a second volume is created between the support surface and the plate, the second volume being smaller than and substantially sealed off from a remaining portion of the inner volume; flowing a gas into the second volume to increase a pressure within the second volume; and flowing a coolant through a plurality of channels disposed in at least one of the substrate support or the plate to cool the substrate.
US10312115B2 Substrate processing apparatus
A processing liquid is supplied from a supply tank to a processing liquid nozzle of a processing unit, and the processing liquid is supplied from the processing liquid nozzle to a substrate. The processing liquid used in the processing unit is collected and selectively supplied to first and second replenishment tanks. In a period in which the used processing liquid is supplied to the first replenishment tank, the supply tank is replenished with the processing liquid in the second replenishment tank, and the processing liquid in the first replenishment tank circulates while being heated by a heater. In a period in which the used processing liquid is supplied to the second replenishment tank, the supply tank is replenished with the processing liquid in the first replenishment tank and the processing liquid in the second replenishment tank circulates while being heated by the heater.
US10312110B2 Method for manufacturing an SGT-including semiconductor device
A method for manufacturing a semiconductor device includes forming an SGT in a semiconductor pillar on a semiconductor substrate and forming a wiring semiconductor layer so as to contact a side surface of an impurity region present in a center portion of the semiconductor pillar or a side surface of a gate conductor layer. A first alloy layer formed in a side surface of the wiring semiconductor layer is directly connected to the impurity region and the gate conductor layer and is connected to an output wiring metal layer through a contact hole formed on an upper surface of a second alloy layer formed in an upper surface and the side surface of the wiring semiconductor layer.
US10312107B2 Forming interconnect structure using plasma treated metal hard mask
A method includes forming a metal hard mask over a low-k dielectric layer. The step of forming the metal hard mask includes depositing a sub-layer of the metal hard mask, and performing a plasma treatment on the sub-layer of the metal hard mask. The metal hard mask is patterned to form an opening. The low-k dielectric layer is etched to form a trench, wherein the step of etching is performed using the metal hard mask as an etching mask.
US10312104B2 Sacrificial mandrel structure with oxide pillars having different widths and resulting fins arrangements
A method of fabricating semiconductor fins, including, patterning a film stack to produce one or more sacrificial mandrels having sidewalls, exposing the sidewall on one side of the one or more sacrificial mandrels to an ion beam to make the exposed sidewall more susceptible to oxidation, oxidizing the opposite sidewalls of the one or more sacrificial mandrels to form a plurality of oxide pillars, removing the one or more sacrificial mandrels, forming spacers on opposite sides of each of the plurality of oxide pillars to produce a spacer pattern, removing the plurality of oxide pillars, and transferring the spacer pattern to the substrate to produce a plurality of fins.
US10312102B2 Method of quasi-atomic layer etching of silicon nitride
A method of etching is described. The method includes providing a substrate having a first material containing silicon nitride and a second material that is different from the first material, forming a first chemical mixture by plasma-excitation of a first process gas containing H and optionally a noble gas, and exposing the first material on the substrate to the first chemical mixture. Thereafter, the method includes forming a second chemical mixture by plasma-excitation of a second process gas containing N, F, O, and optionally a noble element, and exposing the first material on the substrate to the second plasma-excited process gas to selectively etch the first material relative to the second material.
US10312096B2 Methods for titanium silicide formation using TiCl4 precursor and silicon-containing precursor
The present disclosure generally relates to methods of selectively forming titanium silicides on substrates. The methods are generally utilized in conjunction with contact structure integration schemes. In one embodiment, a titanium silicide material is selectively formed on a substrate as an interfacial layer on a source/drain region. The titanium silicide layer may be formed at a temperature within range of about 400 degrees Celsius to about 500 degrees Celsius.
US10312094B2 AlOx/InOx gate insulator for HEMT
A semiconductor device includes: a first semiconductor layer formed, on a substrate, of a nitride semiconductor; a second semiconductor layer formed, on the first semiconductor layer, of a nitride semiconductor; a source electrode formed on the second semiconductor layer; a drain electrode formed on the second semiconductor layer; a metal oxide film formed, between the source electrode and the drain electrode, on the second semiconductor layer; and a gate electrode formed on the metal oxide film. The metal oxide film includes AlOx and InOx. AlOx/InOx in the metal oxide film is greater than or equal to 3.
US10312093B2 Semiconductor device having a surface insulator layer and manufacturing method therefor
The present disclosure relates to the technical field of semiconductors, and discloses a semiconductor device and a manufacturing method therefor. The manufacturing method includes: providing a semiconductor structure, where the semiconductor structure includes an active region and a gate structure located in the active region, the gate structure at least including a gate electrode, and the active region exposing an upper surface of the gate electrode; forming a surface insulator layer on the upper surface of the gate electrode; forming a patterned interlayer dielectric layer on the semiconductor structure, where the interlayer dielectric layer covers the surface insulator layer, and has a first through hole exposing a portion of the active region; and forming a conductive contact layer passing through the first through hole and contacting with the active region. The present disclosure may reduce a leakage current which is possibly generated between the conductive contact layer and the gate electrode, so as to improve the performance of the device.
US10312090B2 Patterning method
A patterning method is disclosed. A substrate having a hard mask layer and a first material layer formed thereon is provided. The first material layer is patterned into first array patterns and first peripheral patterns. The first array patterns are further transferred into first spacer patterns. Subsequently, a planarization layer and a second material layer are successively formed on the substrate. The second material layer is patterned into second array patterns and second peripheral patterns. The second array patterns are further transferred into second spacer patterns. The second spacer patterns partially overlap the first spacer patterns. The second peripheral patterns do not overlap the first peripheral pattern. The first spacer patterns not overlapped by the second spacer patterns are removed to obtain third array patterns. The hard mask layer is then etched using the third array patterns, the second peripheral patterns and the first peripheral patterns as an etching mask.
US10312089B1 Methods for controlling an end-to-end distance in semiconductor device
Embodiments of the present disclosure may be used for patterning a layer in a 5 nm node or beyond fabrication to achieve an end-to-end distance below 35 nm. Compared to the state of the art technology, embodiments of the present disclosure reduce cycle time and cost of production from three lithographic processes and four etching processes to one lithographic process and three etch processes.
US10312085B2 Tone inversion integration for phase change memory
Embodiments of the invention are directed to methods and resulting structures for forming a storage element using phase change memory (PCM). In a non-limiting embodiment of the invention, a PCM layer is formed over a surface of a bottom electrode. A top electrode is formed over the PCM layer using a tone inversion process that includes a sacrificial layer. A PCM pillar is then formed by patterning the PCM layer to expose a surface of the bottom electrode. The tone inversion process enables a sub-50 nm PCM pillar diameter.
US10312082B2 Metal based nanowire tunnel junctions
Semiconductor light emitting diodes (LEDs) formed as (Al)GaN-based nanowire structures have a first semiconductor layer, a second semiconductor layer, and a thin metallic layer fabricated therebetween. The structures, operating in the deep ultraviolet (UV) spectral range, exhibit high photoluminescence efficiency at room temperature. The structures may be formed of an epitaxial metal tunnel junction operating as a reflector that enhances carrier transport to and from the semiconductor alloy layers, capable of producing external quantum efficiencies at least one order of magnitude higher than convention devices.
US10312080B2 Method for forming amorphous silicon multuple layer structure
The present invention provides a method for forming an amorphous silicon multiple layer structure, the method comprises the flowing steps: first, a substrate material layer is provided, next, a first amorphous silicon layer is formed on the substrate material layer, wherein the first amorphous silicon layer includes a plurality of hydrogen atoms disposed therein, afterwards, an UV curing process is performed to the first amorphous silicon layer, so as to remove the hydrogen atoms from the first amorphous silicon layer, finally, a second amorphous silicon layer is formed on the first amorphous silicon layer.
US10312079B2 Etching method
An etching method includes: disposing a target substrate which includes silicon and silicon-germanium in a chamber; supplying the chamber with processing gas which comprises H2 gas and Ar gas in an excited state; and selectively etching the silicon with respect to the silicon-germanium by the processing gas which is in the excited state. Due to this configuration, silicon can be etched, with high selectivity, with respect to the silicon-germanium.
US10312078B2 Nitride film forming method and storage medium
There is provided a nitride film forming method which includes: performing a pretreatment in which a chlorine-containing gas is supplied while heating a substrate to be processed having a first base film and a second base film formed on the substrate to a predetermined temperature, and is adsorbed onto a surface of the first base film and a surface of the second base film; and forming a nitride film on the first base film and the second base film subjected to the pretreatment, by an ALD method or a CVD method, using a raw material gas and a nitriding gas, while heating the substrate to be processed to a predetermined temperature.
US10312077B2 Method for forming aluminum-containing dielectric layer
The present disclosure provides a method of forming an aluminum-containing layer. The method includes providing a substrate in an atomic layer deposition (ALD) process chamber; and performing a cycle of a first step and a second step one or more times in the ALD process chamber to provide a composite layer, wherein performing the first step of the cycle includes: applying a first precursor that includes a non-aluminum-based component having a first molecular weight onto the substrate; and applying a second precursor that that includes an aluminum-based component having a second molecular weight onto the substrate, wherein the second molecular weight is lower than the first molecular weight; and wherein performing the second step of the cycle includes applying the first precursor onto the substrate.
US10312076B2 Application of bottom purge to increase clean efficiency
Apparatus and methods for depositing a film in a PECVD chamber while simultaneously flowing a purge gas from beneath a substrate support are provided herein. In embodiments disclosed herein, a combined gas exhaust volume circumferentially disposed about the substrate support, below a first volume and above a second volume, draws processing gases from the first volume down over an edge of a first surface of the substrate support and simultaneously draws purge gases from the second volume upward over an edge of a second surface of the substrate support. The gases are than evacuated from the combined exhaust volume through an exhaust port fluidly coupled to a vacuum source.
US10312073B2 Selective removal of carbon-containing and nitrogen-containing silicon residues
A semi-aqueous wet clean system and method for removing carbon-containing silicon material (e.g., plasma residue) or nitrogen-containing silicon material (e.g., plasma residue) includes a hydroxyl-terminated organic compound, a diol, and a fluoride ion donor material. The system is configured to protect silicon oxide and amorphous silicon during a post-dry-etch wet clean. The wet clean system is configured to selectively remove carbon-containing or nitrogen-containing plasma residue. pH of the wet clean system can be modified to tune selectivity for removal of carbon-containing or nitrogen-containing plasma residues. As a result, positive TEOS recession of less than about 3 nanometers may be achieved. Additionally, the wet clean system can be adapted for reclamation and subsequent reuse.
US10312072B2 Structure for FinFET devices
A semiconductor device and a method of forming the same are disclosed. The semiconductor device includes a semiconductor substrate; a fin extending from the semiconductor substrate; a first charged dielectric layer covering a bottom portion of the fin, the first charged dielectric layer having net fixed first-type charges; a second charged dielectric layer covering the first charged dielectric layer, the second charged dielectric layer having net fixed second-type charges, the second-type charges being opposite to the first-type charges; and a gate structure engaging a top portion of the fin.
US10312069B2 Dual mode ionization device
An ion source is disclosed that alternates between ionizing analytes in a sample by electrospray ionization and impact ionization.
US10312067B2 Imaging mass analysis data processing method and imaging mass spectrometer
If spatial measurement point intervals in imaging mass analysis data of two samples to be compared are different and the degrees of spatial distribution spreading of substances are compared, one of the data is defined as a reference, the measurement point intervals in the other of the data are redefined so as to be equalized to the reference, and a mass spectrum at each virtual measurement point set as a result of the redefinition is obtained through interpolation or extrapolation based on a mass spectrum at an actual measurement points. If the arrays of the m/z values of mass spectra are different for each sample, the m/z value positions of the mass spectrum in one of the data are defined as a reference, and the intensity values corresponding to the reference m/z values are obtained through interpolation or extrapolation for the mass spectrum of the other of the data.
US10312064B2 Extinguishing arcs in a plasma chamber
A power supply system includes a digital-to-analogue converter (DAC) configured to generate an analogue signal and an amplifier path on which the analogue signal is amplified to generate a high-frequency power signal to be provided to a plasma chamber for supplying a plasma process with high-frequency power. The DAC is configured to be connected to an arc detection device that is configured to monitor the plasma chamber for arcs and be controlled by the arc detection device to modify the analogue signal in response to detecting an occurrence of an arc.
US10312060B2 Plasma generating apparatus using mutual inductive coupling and substrate treating apparatus comprising the same
Provided are a plasma generating apparatus using mutual inductive coupling and a substrate treating apparatus including the same. According to an embodiment of the present invention, a plasma generating apparatus includes: an RF power supply providing an RF signal; a plurality of electromagnetic field applying units inducing an electromagnetic field by receiving the RF signal; and a reactance element connected to a ground terminal of the electromagnetic field applying unit, wherein each of the electromagnetic field applying units may include a plurality of mutually-inductively coupled coils.
US10312058B2 Plasma uniformity control by gas diffuser hole design
Embodiments of a method of depositing a thin film on a substrate is provided that includes placing a substrate on a substrate support that is mounted in a processing region of a processing chamber, flowing a process fluid through a plurality of gas passages in a diffuser plate toward the substrate supported on the substrate support, wherein the diffuser plate has an upstream side and a downstream side and the downstream side has a substantially concave curvature, and each of the gas passages are formed between the upstream side and the downstream side, and creating a plasma between the downstream side of the diffuser plate and the substrate support.
US10312057B2 Plasma processing apparatus
A plasma processing apparatus includes a processing chamber, a table disposed in the processing chamber, a dielectric window provided at the processing chamber, and a surrounding body made of a dielectric material surrounding a processing space between the table and the dielectric window. The dielectric window and the surrounding body are separated from each other in a vertical direction with a predetermined gap therebetween.
US10312055B2 Method of depositing film by PEALD using negative bias
A method of forming a film on a substrate by PEALD includes deposition cycles, each including (i) feeding a precursor in a pulse to a reaction space to adsorb a precursor on a surface of a substrate; (ii) after step (i), applying RF power to a second electrode to generate in the reaction space a plasma to which the precursor-adsorbed surface is exposed, thereby forming a sublayer on the surface; and (iii) applying a bias voltage to the second electrode while applying RF power in step (ii), which bias voltage is negative with reference to a potential on a surface of the first electrode, wherein the cycle is repeated to deposit multiple sublayers until a film constituted by the sublayers has a desired thickness.
US10312050B2 Holder device for electron microscope
Disclosed is a holder device for an electron microscope, which efficiently collects light emitted when electrons collide with a sample inside the electron microscope and is selectively usable in various electron microscopes since it can be easily attached to and detached from the electron microscopes. The holder device includes a frame; a sample support block configured to be supported on the frame and comprising a sample mounting portion to support an edge of a sample; a mirror unit configured to comprise an upper mirror and a lower mirror respectively arranged above and below the sample and reflect light radiating from the sample, which is mounted to the sample mounting portion and to which an electron beam is emitted, in a predetermined direction; a condensing lens configured to condense light from the mirror unit on a predetermined target; and an optical fiber configured to collect light from the condensing lens.
US10312039B2 Generator button for electronic devices
One embodiment of the present disclosure includes an electronic device. The electronic device includes an enclosure and a button connected to the enclosure and movable relative thereto. The button includes a button cap defining a user input surface, a first magnetic element operably associated with one of the button cap or the enclosure, and a coil operably associated with the other of the button cap or the enclosure. Movement of the button cap relative to the enclosure, such as due to a user input force, causes the first magnetic element to induce a current in the coil and the induced current is correlated to a user input to the button cap.
US10312036B2 Keyboard device
A keyboard device includes plural key structures, a switch circuit board, an elastic cover and a seal element. The switch circuit board includes a hollow region. The elastic cover is disposed on the switch circuit board. The hollow region is covered by the elastic cover, so that a foreign liquid is prevented from entering the switch circuit board. The seal element is disposed on sidewalls of the switch circuit board. Consequently, a sealed region is formed between the switch circuit board and the elastic cover. When the inner gas within the switch circuit board is changed, the elastic cover is subjected to expansion or contraction. Consequently, the switch circuit board is not subjected to deformation in response to the volume change of the inner gas.
US10312035B2 Luminous keyboard
The present invention relates to a luminous keyboard, including a key, a support plate, a switch circuit board, a light guide plate, and a direct-type light emitting element capable of generating a beam. The support plate is located below the key, and the switch circuit board is disposed on the support plate. The light guide plate is located below the support plate and includes a concave structure, and the concave structure forms a reflective surface inside the light guide plate. The direct-type light emitting element is located below the concave structure. When the beam enters the light guide plate, the beam is reflected by the reflective surface to be fully reflected in the light guide plate, and the light guide plate guides the beam to be projected to a peripheral area of a key.
US10312034B1 Keyboard device
A keyboard device includes plural keys, a supporting plate and a membrane switch circuit member. The membrane switch circuit member includes a first board, a second board, a third board and a fourth board. The first board includes plural first contacts. The second board includes plural second contacts and plural first openings. The third board includes plural third contacts and plural second openings. The fourth board includes plural fourth contacts. The plural first contacts, the plural first openings and the plural third contacts are collaboratively defined as a first key matrix. The plural second contacts, the plural second openings and the plural fourth contacts are collaboratively defined as a second key matrix.
US10312028B2 Electrochemical energy storage devices and manufacturing methods
An ultra-thin electrochemical energy storage device is provided which utilizes electrode material with multi-layer current collectors and with an organic electrolyte between the electrodes. Multiple cells may be positioned in a plurality of stacks and all of the cells may be in series, parallel or some combination thereof. The energy storage device can be constructed at less than 0.5 millimeters thick and exhibit very low ESR and higher temperature range capabilities.
US10312026B2 High energy density capacitor with high aspect micrometer structures and a giant colossal dielectric material
A high density energy storage system including a giant-colossal dielectric thin film material electrically insulating between two electrodes configured to have increased overlapping surface area.
US10312019B2 Method for producing a permanent magnet and permanent magnet
A method for producing a permanent magnet, comprising the step: (a) providing a powder of a magnetic material, (b) coating the powder particles with a coating of a diamagnetic or paramagnetic coating material, (c) compressing the coated particles to form a pressed part, (d) heat treatment to sinter the coating material at a temperature less than a temperature suitable for sintering the magnetic material, while the coating material transfers to a matrix of a diamagnetic or paramagnetic material, which embeds the particles of the magnetic material, and (e) magnetizing the magnetizable material in an external magnetic field, wherein the steps (c), (d) and (e) are carried out in any order successively or at the same time in any desired combination. The nanostructured permanent magnet that can be produced by mean of said method comprises cores of a permanently magnetic material having a mean particle diameter of no more than 1 μm and a matrix of a diamagnetic or paramagnetic material in which the cores are embedded.
US10312017B2 Symmetrical step-up and step-down autotransformer delta topology
A multi-phase autotransformer (10) is disclosed. The exemplary transformer includes primary windings PWA, PWB, PWC) and secondary windings (SWA1-SWA4, SWB1-SWB4, SWC1-SWC4). The primary windings are connected in a delta configuration and to a three-phase input voltage source. Each secondary winding is electrically connected to a primary winding but is magnetically coupled to a different primary winding. Three sets of secondary windings provide three three-phase outputs (350A, 350B, 350C), each of which has a voltage which is less than the three-phase input voltage, the three-phase output of each set being phase-shifted with respect to the other sets. These three sets also, collectively, provide a multi-phase output (325). Another set of secondary windings, in conjunction with the input voltage, provides another multi-phase phase output (360) which has approximately the same voltage as the three-phase input voltage.
US10312012B2 Transformer and power supply device including the same
A transformer includes a magnetic core, a first coil unit and a second coil unit. The first coil unit is disposed within the magnetic core and includes a laminated board having layers laminated therein and conductive patterns. Respective ones of the conductive patterns are disposed on the laminated layers. The second coil unit includes a conductive wire spaced apart from the conductive patterns of the laminated board by an insulating distance. The conductive wire includes a triple-insulated wire surrounded by three sheets of insulating paper to maintain the insulating distance from the conductive patterns.
US10312011B2 Aluminum coil assembly having galvanic corrosion prevention structure for car electromagnetic clutch
An aluminum coil assembly includes: a steel housing; an aluminum electromagnetic coil electrically connected to the steel housing and having an aluminum lead coil and a copper ground coil connected to the aluminum lead coil by means of soldering or a terminal; and a brass ground ring adapted to be press-fitted to a ring hole formed on the steel housing and having a ground hole formed on the center thereof in such a manner as to insert the copper ground coil connected to the aluminum lead coil thereinto, a cylindrical portion having a cut line adapted to be reduced when coupled to the ring hole of the steel housing to support the copper ground coil inserted into the ground hole, and an inclined portion formed on the underside of the cylindrical portion to allow easy press-fitting to the ring hole formed on the steel housing.
US10312010B2 Coil component
In an embodiment, a coil component 10 has a drum core 20 housed in a through hole 32 of a ring core 30, and two types of securing parts are provided in a gap G between an outer circumference of one flange part 24 of the drum core 20 and an inner circumference of the through hole 32. Terminal electrodes 50A, 50B connecting to ends 46A, 46B pulled out from a winding wire 40 wound around the drum core 20 are assembled to the ring core 30. Second securing parts 60A, 60B are arranged to opposite to each other with respect to a center C of the flange part 24, and first securing parts 62A, 62B are provided to cover an outer side of the second securing parts 60A, 60B. A hardness of the second securing part is higher than that of the first securing part.
US10312007B2 Inductor formed in substrate
A method and device includes a first conductor formed on a first dielectric layer as a partial turn of a coil. A second conductor is formed on a second dielectric layer that covers the first dielectric layer and first conductor, the second conductor forming a partial turn of the coil. A vertical interconnect couples the first and second conductors to form a first full turn of the coil. The interconnect coupling can be enhanced by embedding some selective magnetic materials into the substrate.
US10312005B2 Gapped core, coil component using same, and method for manufacturing coil component
The present invention provides a gapped core that facilitates adjustment of DC bias characteristics, has little variation in those characteristics, and also allows for excellent manufacturing efficiency. A gapped core (10) according to the present invention has a main body (30) and a segment (40) that are obtained by a molded core (20) including an annular magnetic body made of a magnetic material and a resin covering part that covers the magnetic body being cut at a first cutting part and a second cutting part that transect an outer peripheral surface and an inner peripheral surface and approach each other toward an inner periphery of the molded core, the main body (30) having a main body-side first end face formed by cutting at the first cutting part and a main body-side second end face formed by cutting at the second cutting part, and the segment (40) having a segment side first end face formed by cutting at the first cutting part and a segment-side second end face formed by cutting at the second cutting part, the segment being disposed in a cutout part (31) formed between the main body-side first end face and the main body-side second end face of the main body, and the main body-side first end face and the segment-side first end face and/or the main body-side second end face and the segment-side second end face opposing each other across a gap (11).
US10312001B2 Patterned overcoated nanowire transparent conducting coatings
A composite layer including first and second layers is described. The first layer includes a plurality of metallic nanowires and the second layer includes a polymeric overcoat disposed on the nanowires. In top plan view, the composite layer has at least one first region and at least one second region, where the nanowires in each first region form an interconnected network of the nanowires, and each second region includes a plurality of nanotrenches through the second layer into the first layer.
US10312000B2 Heat dissipating cable jacket
A cable is provided, configured for tandem communication and power transmission. The cable has a plurality of twisted pair conductors and a jacket surrounding said twisted pair conductors. The jacket includes a plurality of either ridges, valleys or both, disposed substantially perpendicular to the longitudinal axis of the cable, the ridges and/or valleys are dimensioned and spaced apart in a manner sufficient to create an air passage when the cable is arranged adjacent to and abutting other cables.
US10311999B2 Cable having multipurpose space area
A cable having a multipurpose space area comprises pods formed at both side ends of a cable and accommodating support members; electric cable insertion portions formed at the center of the cable between the pods and accommodating electric cables; support members inserted into the pods; and multiple electric cables inserted into the electric cable insertion portions. The electric cable insertion portion is partitioned into a plurality of areas by a plurality of joining portions and fusion portions to which fusible materials fused by heat are applied are formed at inner sides of the respective areas of the electric cable insertion portion.
US10311994B2 Quantum dot ink
A quantum dot ink, a manufacturing method thereof and a quantum dot light emitting diode device are provided. The quantum dot ink includes a non-polar organic solvent, a surface tension modifier and a hydrophobic quantum dot, the quantum dot ink further includes a carrier transport material, wherein phase separation is present between the hydrophobic quantum dot and the carrier transport material. After completing ink-jet printing the quantum dot ink, phase separation occurs between the hydrophobic quantum dot and the carrier transport material. Thus, the two-layer structure of a hydrophobic quantum dot layer and a carrier transport material layer is formed through one process. Not only a quantum dot light emitting device is manufactured by the method of ink-jet printing, but also the operation is simplified, and the manufacturing cost of the quantum dot light emitting device is reduced.
US10311992B2 Transparent conducting films including complex oxides
Transparent conducting films including an alkaline earth, transition metal oxide and their optimization of electrical conductivity and optical transparency by aliovalent substitution, which are useful as electrodes for semiconductors and other electronic devices are disclosed. Such materials include thin films of an aliovalent substituted transition metal oxides of Formula (I): A1-xA′xB1-yB′yO3-d (I) or a transition metal oxide of Formula (II): (ABO3-d)m(A′B′O3-d′)n.
US10311990B2 Photosensitive reducible silver ion-containing compositions
A photosensitive reducible silver ion-containing composition can be used to provide electrically-conductive silver metal in thin film or patterns on a substrate after irradiation with UV-visible light. The composition comprises: a) a non-hydroxylic-solvent soluble silver complex represented by the following formula (I): wherein L represents an α-oxy carboxylate; P represents a primary alkylamine; a is 1 or 2; b is 1 or 2; and c is 1, 2, 3, or 4, provided that when a is b, b is 1, and when a is 2, b is 2; b) optionally, a photosensitizer that can either reduce the reducible silver ion or oxidize the α-oxy carboxylate; and c) a solvent medium comprising at least one non-hydroxylic solvent.
US10311989B2 System for storage container with removable shield panels
Disclosed herein are systems and methods for a modular reconfigurable shielding system for one or more storage containers in temporary or long term storage. The system comprises shield panels which may be used to shield external faces of containers in a storage configuration to reduce the overall amount of shielding required in a storage facility. Reducing the amount of shielding reduces the storage footprint of each container thus increasing storage capacity and efficiency of the storage facility. The modularity of the shield panels allows storage containers to be easily added and removed from the storage configuration. Additionally, modular shielding allows the amount and type of shielding to be easily reconfigured for differing requirements and storage contents.
US10311984B2 Shaft sealing structure and reactor coolant pump
The shaft sealing structure includes a seal ring that has abutment portions formed by dividing the seal ring along the axial direction and that is provided around a main shaft in a ring-like manner; a support member that is provided in the seal ring along the circumferential direction of the main shaft; and a thermoswitch that is connected to the support member between the abutment portions and that presses the support member toward the center of the main shaft when the temperature rises to a temperature higher than that during normal operation, in which the seal ring is fixed at a position separated from the main shaft during the normal operation and is moved by the support member toward the center of the main shaft when the temperature rises to a temperature higher than that during the normal operation.
US10311977B2 Proactive disease state management system
A proactive disease state management system including network elements, computer elements and software elements operable to support a plurality of subscriber devices each under a subscription plan in which the subscriber device requests the collection of electronic medical records of a patient for evaluation by a proactive disease state management engine which interrelates patient information, patient medical information and patient laboratory information included in the electronic medical record of a patient to generate engine result data and populate the fields of a request reply to the subscriber device.
US10311972B2 Medical device system performance index
A distributed network system and method includes a processing unit configured to manage safety data for a plurality of medical devices, a database software component in communication with the processing unit, and a monitoring software component in communication with the processing unit. The monitoring software component is configured to monitor a number of messages between a number of medical devices and the processing unit, to process performance parameters to generate an overall performance index, and to generate an output that is viewable by a user. The output includes relative contributions of each of the performance parameters to the overall performance index, where the overall performance index is generated using a weighting factor associated with each of the performance parameters. The performance parameters include the number of messages waiting to be processed, which has the largest weighting factor, and a disk queue length, which has the smallest weighting factor.
US10311970B2 Renal therapy machine and system with blood pressure monitor
A renal therapy machine with a blood pressure monitor is disclosed. In an example, a renal therapy machine includes a dialysis fluid pump a control processor for controlling a treatment performed by the dialysis fluid pump, and a user interface in operable communication with the control processor. The renal therapy machine also includes a blood pressure monitor in operable communication with the control processor. The blood pressure monitor includes a blood pressure cuff positioned and arranged to receive air pressurized from within the renal therapy machine for the purpose of taking a patient's blood pressure.
US10311969B2 Medical measuring device and medical measuring system
In a housing configured to mount thereon a biosensor in an attachable and detachable manner in which the biosensor is configured to have a liquid sample of a biological object deposited thereon, the medial measuring device includes a measuring component operable to measure biological information from the liquid sample of the biological object, a recording component operable to store a result measured by the measuring component, and an information protection component operable to determine an access limitation to personal information data stored in the recording component. With this configuration of the device, it is possible to properly protect personal information stored in the device.
US10311965B2 Semiconductor circuit
According to one embodiment, a semiconductor circuit includes a plurality of memories. The memories are connected to one another in series such that an output node of the memory of the first stage is connected to an input node of the memory of the second stage. The semiconductor circuit includes a test circuit that outputs test data to an input node of the memory of the first stage among the plurality of memories, and a comparison circuit that compares data output from an output node of the memory of the final stage among the plurality of memories with expectation value data.
US10311963B2 Data processing
A data processing apparatus comprises at least one memory configured to store data; processing circuitry to access data in the at least one memory. Memory built-in self-test (MBIST) circuitry has an interface to access the at least one memory and is configured to perform a test procedure for testing at least one target memory location of the at least one memory. The test procedure involves at least writing test data to the target memory location. Diagnostic circuitry executes a diagnostic procedure to generate diagnostic data in response to processing operations carried out by the processing circuitry. The MBIST circuitry is configured to control writing of the diagnostic data generated by the diagnostic circuitry to memory locations in a temporarily reserved memory region comprising at least a portion of the at least one memory.
US10311960B2 Shift register, semiconductor device, display device, and electronic device
The invention provides a semiconductor device and a shift register, in which low noise is caused in a non-selection period and a transistor is not always on. First to fourth transistors are provided. One of a source and a drain of the first transistor is connected to a first wire, the other of the source and the drain thereof is connected to a gate electrode of the second transistor, and a gate electrode thereof is connected to a fifth wire. One of a source and a drain of the second transistor is connected to a third wire and the other of the source and the drain thereof is connected to a sixth wire. One of a source and a drain of the third transistor is connected to a second wire, the other of the source and the drain thereof is connected to the gate electrode of the second transistor, and a gate electrode thereof is connected to a fourth wire. One of a source and a drain of the fourth transistor is connected to the second wire, the other of the source and the drain thereof is connected to the sixth wire, and a gate electrode thereof is connected to the fourth wire.
US10311957B2 Apparatuses and methods for performing multiple memory operations
The disclosed technology relates to a memory device configured to perform multiple access operations in response to a single command received through a memory controller and a method of performing the multiple access operations. In one aspect, the memory device includes a memory array comprising a plurality of memory cells and a memory controller. The memory controller is configured to receive a single command which specifies a plurality of memory access operations to be performed on the memory array. The memory controller is further configured to cause the specified plurality of memory access operations to be performed on the memory array.
US10311956B2 Semiconductor memory device and operating method thereof
Disclosed are a semiconductor memory device and a method of operating the same. The semiconductor memory device includes a memory cell array including a plurality of memory cells which are programmed to a plurality of program states, a peripheral circuit configured to perform a program operation on the memory cell array, and a control logic configured to control the peripheral circuit to divide the plurality of program states into two or more program groups and sequentially program the two or more program groups during the program operation, wherein the control logic controls the peripheral circuit to simultaneously program the memory cells which are to be programmed to program states included in the same program group among the plurality of memory cells.
US10311951B2 Refresh architecture and algorithm for non-volatile memories
Methods and systems to refresh a nonvolatile memory device, such as a phase change memory. In an embodiment, as a function of system state, a memory device performs either a first refresh of memory cells using a margined read reference level or a second refresh of error-corrected memory cells using a non-margined read reference level.
US10311943B2 Semiconductor integrated circuit device and wearable device
To provide a semiconductor device which can be stably operated while achieving a reduction of the power consumption.A semiconductor device includes a CPU, a system controller which designates an operation speed of the CPU, P-type SOTB transistors, and N-type SOTB transistors. The semiconductor device is provided with an SRAM which is connected to the CPU, and a substrate bias circuit which is connected to the system controller and is capable of supplying substrate bias voltages to the P-type SOTB transistors and the N-type SOTB transistors. Here, when the system controller designates a low speed mode to operate the CPU at a low speed, the substrate bias circuit supplies the substrate bias voltages to the P-type SOTB transistors and the N-type SOTB transistors.
US10311940B2 Nullifying incorrect sampled data contribution in decision feedback equalizer at restart of forwarded clock in memory system
An apparatus includes a receiver circuit and a data buffer. The receiver circuit may comprise a decision feedback equalizer (DFE). The data buffer circuit may be configured to initialize a condition of the receiver circuit in response to a control signal prior to reception of a command sequence associated with a directed access to a memory system. The control signal generally indicates detection of a non-consecutive clock associated with a start of the command sequence. The data buffer circuit may generate one or more tap enable signals configured to determine a number of clock cycles during which a contribution of one or more taps of the decision feedback equalizer (DFE) are delayed.
US10311939B2 Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system
A system, includes a controller comprising a plurality of first external terminals configured to supply a command and an address, and communicate a data, and communicate a strobe signal related to the data; and a semiconductor memory device including a plurality of second external terminals corresponding to the plurality of first external terminals, at least one of the plurality of first external terminals and at least one of the plurality of second external terminals each being capable of supplying an information specifying a length of a preamble of the strobe signal before the semiconductor memory device communicates the data between the controller and the semiconductor memory device, the semiconductor memory device further including a preamble register configured to be capable of storing the information.
US10311938B2 Compact system with memory and PMU integration
One or more integrated circuits including at least one integrated circuit that is fabricated in a DRAM fabrication process. Capacitors in the DRAM-fabricated integrated circuit can be used for decoupling for logic components of the integrated circuits, and may be used for fine-grain on-chip PMUs. Embedded DRAM memories can be used instead of SRAM memories, with increased density and reduced leakage. More compact systems can be implemented using the integrated circuits.
US10311935B2 Semiconductor device and method of driving the same
A semiconductor device according to an embodiment includes a plurality of memory regions suitable for performing a refresh operation based on a row address signal; an initialization circuit suitable for generating an initialization pulse signal for each refresh period during which a refresh pulse signal toggles as many times as the number of the memory regions; a control circuit suitable for activating a control pulse signal based on the refresh pulse signal and a plurality of memory address signals corresponding to the memory regions, and deactivating the control pulse signal based on the initialization pulse signal; and a row address generation circuit suitable for sequentially generating the row address signal based on the control pulse signal.
US10311934B2 Cell-specific reference generation and sensing
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A portion of charge of a memory cell may be captured and, for example, stored using a capacitor or intrinsic capacitance of the memory array that includes the memory cell. The memory cell may be recharged (e.g., re-written). The memory cell may then be read, and a voltage of the memory cell may be compared to a voltage resulting from the captured charge. A logic state of the memory cell may be determined based at least in part on the voltage comparison.
US10311932B2 Magnetic memory device
According to one embodiment, a magnetic memory device includes a magnetic portion, a first magnetic layer, a first nonmagnetic layer, a first element portion, first to third interconnects, and a controller. In a first operation, the controller sets the first interconnect to a first potential, the second interconnect to a second potential, and the third interconnect to a third potential. An absolute value of a difference between the second potential and the third potential is greater than that between the first potential and the third potential. In a second operation, the controller sets the first interconnect to a fourth potential, the second interconnect to a fifth potential, and the third interconnect to a sixth potential. An absolute value of a difference between the fifth potential and the sixth potential is less than that between the fourth potential and the sixth potential.
US10311931B2 Semiconductor memory device
According to one embodiment, a semiconductor memory device comprises a first memory cell including a first resistance change element; and a write circuit configured to write data to the first memory cell. The write circuit includes a first circuit including a first input terminal supplied with a first signal based on read data from the first memory cell and a second input terminal supplied with a second signal based on write data to the first memory cell; and a second circuit including a first input terminal supplied with a third signal from an output terminal of the first circuit and a second input terminal supplied with a fourth signal.
US10311929B2 Resistance change memory
According to an embodiment, a resistance change memory includes a semiconductor substrate, a transistor having a control terminal, a first terminal and a second terminal, the transistor provided on the semiconductor substrate, an insulating layer covering the transistor, a first conductive line connected to the first terminal and provided on the insulating layer, a second conductive line provided on the insulating layer, and a resistance change element connected between the second terminal and the second conductive line. The first conductive line has a width greater than a width of the second conductive line in a direction in which the first and second conductive lines are arranged.
US10311921B1 Multiple-mode current sources for sense operations
A bit line read voltage generator may operate in a high drive strength or current mode to drive a selected bit line voltage to a read selected bit line voltage at a high level, and then may switch to operating in a low drive strength or current mode. Doing so may control, such as by limiting, the amount of cell current if the selected memory cell turns on, reducing the likelihood of false writes. Also, a word line read voltage generator may operate in a high drive strength or current mode to ramp up a selected word line voltage level, and then may switch to operating in a low drive strength or current mode to shorten the time for a global selected word line voltage to decrease to below a trip level and/or to control an amount of the cell current when the selected memory cell turns on.
US10311920B2 Apparatus and method for controlling memory device
An apparatus for controlling a memory device may include: a table storing information of a plurality of read voltages; an error correction unit suitable for correcting an error of read data; and a processor functionally coupled to the RR table and the error correction unit. The processor selects a default read voltage among the plurality of read voltages from the table when a read fail for the memory device is recognized, sets a shift direction of the default read voltage based on the number of read cells of the memory device read by the default read voltage, and controls a read retry operation of the memory device based on at least one read voltage in the set shift direction in the table.
US10311918B1 System, media, and method for synchronization of independent sensors and recording devices
Systems, methods, and media for synchronization of independent sensors and recording devices are provided. A method includes recording, through a synchronizing sensor, sensor data detected from an event. The method may further output from the synchronizing sensor, the sensor data from the event and a periodic synchronizing signal. The method also generates, from a recorder, recorded event data comprising the periodic synchronizing signal and first additional data recorded from the event. The method outputs the recorded event data from the recorder. The method receives the sensor data from the event and the recorded event data. The method synchronizes according to the periodic synchronizing signal, at the computing device, the recorded event data and the sensor data from the event.
US10311915B2 Image processing apparatus and method for controlling the same
Grain noise and scratches are applied to an input image as random noise to generate a combined image. When applying grain noise clipped from two-dimensional noise data to the input image, each time clipping is performed, a positional difference from a last clipping position is evaluated. When the positional difference is determined to be small, a current clipping position is changed. When applying scratches clipped from noise data of a plurality of patterns to an input image, when a condition for successively applying scratches for a predetermined time period is selected, a positional difference from a last pasting position is evaluated. When the positional difference is determined to be large, the application of scratches is invalidated.
US10311911B2 Method and apparatus for comprehensive vehicle system state capture
A system includes a processor configured to receive a capture instruction from a vehicle user. The processor is also configured to capture a plurality of center-stack display-related states responsive to the capture instruction. The processor is further configured to capture a predetermined amount of audio from a currently playing media source responsive to the capture instruction. The processor is additionally configured to store the captured center-stack related states and predetermined amount of audio in a record file and, responsive to selection of the record file, recreate a center stack display and audio output by respective reference to the display-related states and predetermined amount of audio stored in the record file.
US10311910B2 Media playback apparatus and shutter mechanism
A cam projection sliding in a cam slot of an arm causes the arm to proceed to an arm when a shutter is in the closed position or the open position and to recede from the arm when the shutter is sliding between the open position and the closed position. A spring is thereby considerably displaced, providing a satisfactory operation of the shutter.
US10311908B2 Magnetic recording medium
A magnetic recording medium includes a flexible substrate, an amorphous seed layer, an under layer containing Ru, and a recording layer having a granular structure. The seed layer is provided between the substrate and the under layer. The under layer has a thickness in a range of 5 to 50 nm.
US10311903B2 Method and system of testing slider body of thermally-assisted magnetic head
A method of testing dynamic performances for a slider body of a thermally-assisted magnetic head includes: providing a slider body which is disconnected with a light source unit; removably mounting the slider body to a test head suspension assembly; keeping to provide a flat top beam to the slider body, the flat top beam being aligned with the optical waveguide, and a projection of an incident end of the optical waveguide being located within a light spot of the flat top beam; and testing the dynamic performance of the slider body. It can save the material cost and labor cost, and eliminate a precise optical alignment between an input light and an optical waveguide in the slider body to improve testing efficiency.
US10311901B1 Anisotropy field induced self pinned recessed antiferromagnetic reader
The present disclosure generally relates to data storage devices, and more specifically, to a magnetic media drive employing a magnetic read head. The magnetic read head includes an antiferromagnetic layer recessed from the MFS, a reference layer disposed over the antiferromagnetic layer, a free layer disposed over the reference layer, and a thermally conductive structure disposed over the reference layer. The thermally conductive structure is recessed from the MFS. The thermally conductive structure includes a first portion and a second portion. The first portion of the thermally conductive structure extends from the second portion of the thermally conductive structure towards the MFS. The first portion of the thermally conductive structure is aligned with the free layer in a stripe height direction. With the thermally conductive structure, thermal stabilization of the read head is achieved.
US10311900B1 Magnetic core and coil design for double perpendicular magnetic recording (PMR) writers
A dual PMR writer is disclosed wherein the better of the two writers on a slider is integrated into a head gimbal assembly to improve area density capability mean and sigma values, and the other writer is disabled. Each of a driving coil (DC) and bucking coil (BC) have two outer portions that form a U shape with a front side, and have a center portion connected to each of the two outer portions with a narrow arm in which direct current resistance (DCR) is enhanced during a write process. As a result, when writer (coil) induced write gap (WG) protrusion is overlaid on the dynamic fly height (DFH) protrusion profile, the net WG protrusion profile has a maximum value at a cross-track position aligned with a main pole tip in the better writer thereby substantially minimizing magnetic spacing loss compared with conventional dual PMR writers.
US10311891B2 Post-processing gains for signal enhancement
A method, an apparatus, and logic to post-process raw gains determined by input processing to generate post-processed gains, comprising using one or both of delta gain smoothing and decision-directed gain smoothing. The delta gain smoothing comprises applying a smoothing filter to the raw gain with a smoothing factor that depends on the gain delta: the absolute value of the difference between the raw gain for the current frame and the post-processed gain for a previous frame. The decision-directed gain smoothing comprises converting the raw gain to a signal-to-noise ratio, applying a smoothing filter with a smoothing factor to the signal-to-noise ratio to calculate a smoothed signal-to-noise ratio, and converting the smoothed signal-to-noise ratio to determine the second smoothed gain, with smoothing factor possibly dependent on the gain delta.
US10311890B2 Estimation of background noise in audio signals
The invention relates to a background noise estimator and a method therein, for supporting sound activity detection in an audio signal segment. The method comprises reducing a current background noise estimate when the audio signal segment is determined to comprise music and the current background noise estimate exceeds a minimum value. This is to be performed when an energy level of an audio signal segment is more than a threshold higher than a long term minimum energy level, lt_min, which is determined over a plurality of preceding audio signal segments, or, when the energy level of the audio signal segment is less than a threshold higher than lt_min, but no pause is detected in the audio signal segment.
US10311889B2 Audio signal processing for noise reduction
A headphone, headphone system, and speech enhancing method is provided to enhance speech pick-up from the user of a headphone and includes receiving a plurality of signals from a set of microphones and generating a primary signal by array processing the microphone signals to steer a beam toward the user's mouth. A noise reference signal is also derived from one or more microphones, and a voice estimate signal is generated by filtering the primary signal to remove components that are correlated to the noise reference signal.
US10311888B2 Voice quality conversion device, voice quality conversion method and program
A voice conversion device includes: a parameter learning unit in which a probabilistic model that uses speech information, speaker information, and phonological information as variables to thereby express relationships among binding energies between any two of the speech information, the speaker information and the phonological information by parameters is prepared, wherein the speech information is obtained based on a speech, the speaker information corresponds to the speech information, and the phonological information expresses the phoneme of the speech, and in which the parameters are determined by performing learning by sequentially inputting the speech information and the speaker information into the probabilistic model; and a voice conversion processing unit that performs voice conversion processing of the speech information obtained on the basis of the speech of an input speaker, based both on the parameters determined by the parameter learning unit and on the speaker information of a target speaker.
US10311887B2 Personal audio assistant device and method
A server includes one or more processors, and a computer readable memory coupled to the one or more processors. The computer readable memory contains instructions which when executed by the one or more processors causes the one or more processors to perform the operations of receiving captured audio via an microphone of a mobile or wearable device at a location remote from the server via a communications module operatively coupled to the mobile or wearable device, analyzing the captured audio to provide analyzed captured audio, and sending information to the communications module in response to the analyzed captured audio, the information including instructions to initiate control of media content or initiate operations of the mobile or wearable device. A method operating at the server and other embodiments are disclosed.
US10311886B2 Resampling output signals of QMF based audio codecs
An apparatus for processing an audio signal includes a configurable first audio signal processor for processing the audio signal in accordance with different configuration settings to obtain a processed audio signal, wherein the apparatus is adapted so that different configuration settings result in different sampling rates of the processed audio signal. The apparatus furthermore includes n analysis filter bank having a first number of analysis filter bank channels, a synthesis filter bank having a second number of synthesis filter bank channels, a second audio processor being adapted to receive and process an audio signal having a predetermined sampling rate, and a controller for controlling the first number of analysis filter bank channels or the second number of synthesis filter bank channels in accordance with a configuration setting.
US10311874B2 Methods and systems for voice-based programming of a voice-controlled device
A method for voice-based programming of a voice-controlled device includes executing, by a voice-controlled device, an application for recognizing spoken programming commands, the application including a plurality of keyword phrases each associated with an action. The method includes receiving, by a voice-controlled device, an audio signal representing a user utterance. The method includes identifying, by the voice-controlled device, within the received audio signal, one of the plurality of keyword phrases and data for use in taking the action associated with the one of the plurality of keyword phrases. The method includes modifying, by the voice-controlled device, at least one data structure stored by the voice-controlled device responsive to the identified one of the plurality of keyword phrases and data.
US10311872B2 Utterance classifier
Methods, systems, and apparatus, including computer programs encoded on computer storage media for classification using neural networks. One method includes receiving audio data corresponding to an utterance. Obtaining a transcription of the utterance. Generating a representation of the audio data. Generating a representation of the transcription of the utterance. Providing (i) the representation of the audio data and (ii) the representation of the transcription of the utterance to a classifier that, based on a given representation of the audio data and a given representation of the transcription of the utterance, is trained to output an indication of whether the utterance associated with the given representation is likely directed to an automated assistance or is likely not directed to an automated assistant. Receiving, from the classifier, an indication of whether the utterance corresponding to the received audio data is likely directed to the automated assistant or is likely not directed to the automated assistant. Selectively instructing the automated assistant based at least on the indication of whether the utterance corresponding to the received audio data is likely directed to the automated assistant or is likely not directed to the automated assistant.
US10311870B2 Computerized device with voice command input capability
A computerized device with voice command capability processed remotely includes a low power processor, executing a loose algorithmic model to recognize a wake word prefix in a voice command, the loose model having a low false rejection rate but suffering a high false acceptance rate, and a second processor which can operate in at least a low power/low clock rate mode and a high power/high clock rate mode. When the first processor determines the presence of the wake word, it causes the second processor to switch to the high power/high clock rate mode and to execute a tight algorithmic model to verify the presence of the wake word. By using the two processors in this manner, the average overall power required by the computerized device is reduced, as is the amount of waste heat generated by the system.
US10311869B2 Method and system for automation of response selection and composition in dialog systems
A dialog system includes a processor. The system can further include a dialog manager. The dialog manager can be configured to receive input from a user using the processor. The system can further include a user category classification and detection module, which is configured to identify categories for the user from the received input. The system can further include a user mood detection and tracking module configured to identify a mood of the user. The system can further include a user physical and mind state and energy level detection module configured to identify a mental status of the user. The system can further include a user acquaintance module configured to identify an acquaintance status of the user. The system can further include user personality detection and tracking module configured to identify a personality status of the user. The system can further include a conversational context detection and response generation module.
US10311868B2 Method and apparatus for using image data to aid voice recognition
A device performs a method for using image data to aid voice recognition. The method includes the device capturing (302) image data of a vicinity of the device and adjusting (304), based on the image data, a set of parameters for voice recognition performed by the device (102). The set of parameters for the device performing voice recognition include, but are not limited to: a trigger threshold of a trigger for voice recognition; a set of beamforming parameters; a database for voice recognition; and/or an algorithm for voice recognition. The algorithm may include using noise suppression or using acoustic beamforming.
US10311867B2 Tagging support apparatus and method
According to an embodiment, a tagging support apparatus includes a first acquirer, an estimator, a first storage, a second acquirer, and a presenter. The first acquirer acquires a spoken sentence concerning an utterance of a user. The estimator estimates an utterance intention of the spoken sentence to obtain one or more intention candidates of the utterance intention. The first storage stores an intention system having a hierarchical structure of intentions used in a dialog system. The second acquirer acquires, based on the intention candidates, part of the intention system as one or more hierarchical intention candidates. The presenter presents the hierarchical intention candidates.
US10311866B2 Digital device and method for controlling same
The present specification discloses various embodiments of a digital device and a method for controlling the same. A method for controlling a digital device according to an embodiment of the present invention may comprise the steps of: connecting to a repeater; sensing an external device located within a preconfigured distance and connected to the repeater; receiving an audio reference data transmission request from the sensed external device; and transmitting the requested audio reference data to the external device.
US10311859B2 Material selection for language model customization in speech recognition for speech analytics
A method for extracting, from non-speech text, training data for a language model for speech recognition includes: receiving, by a processor, non-speech text; selecting, by the processor, text from the non-speech text; converting, by the processor, the selected text to generate converted text comprising a plurality of phrases consistent with speech transcription text; training, by the processor, a language model using the converted text; and outputting, by the processor, the language model.
US10311858B1 Method and system for building an integrated user profile
A system and method are provided for adding user characterization information to a user profile by analyzing user's speech. User properties such as age, gender, accent, and English proficiency may be inferred by extracting and deriving features from user speech, without the user having to configure such information manually. A feature extraction module that receives audio signals as input extracts acoustic, phonetic, textual, linguistic, and semantic features. The module may be a system component independent of any particular vertical application or may be embedded in an application that accepts voice input and performs natural language understanding. A profile generation module receives the features extracted by the feature extraction module and uses classifiers to determine user property values based on the extracted and derived features and store these values in a user profile. The resulting profile variables may be globally available to other applications.
US10311846B2 Keyboard musical instrument and method of acquiring correction information in keyboard musical instrument
A keyboard musical instrument is provided in which variations in the detection mechanism is corrected so that an appropriate musical sound control can be performed. Detection sections SW1, SW2, and SW3 detect an object at detection positions pSW1, pSW2, and pSW3. On the basis of a detection timing (rT2) by the detection section SW2, a detected key depression speed (V21), and a detection timing (rT3) by the detection section SW3 in a case where the key is depressed in a derivation mode, after a rST32 value is calculated, a stroke correction value calST32 is derived as correction information J and stored in a memory 57. In the performance mode, the musical sound is controlled on the basis of the detection timing by the detection sections SW1, SW2, and SW3 and the stroke correction value calST32.
US10311842B2 System and process for embedding electronic messages and documents with pieces of digital music automatically composed and generated by an automated music composition and generation engine driven by user-specified emotion-type and style-type musical experience descriptors
An automated music composition and generation system and process allowing system users to produce and deliver electronic messages and documents, such as text, SMS and email, augmented with automatically-composed music generated using user-selected emotion-type and style-type musical experience descriptors. The automated music composition and generation system includes an automated music composition and generation engine operably connected to a system user interface, and the infrastructure of the Internet. Mobile and desktop client machines provide text, SMS and/or email services supported on the Internet. Each client machine has a text application, SMS application and/or email application augmented by the addition of automatically-composed music by systems users using the automated music composition and generation engine. By selecting and providing musical emotion and style descriptors to the engine, music is automatically composed, generated, and embedded in text, SMS and/or email messages for delivery to other client machines over the infrastructure of the Internet.
US10311840B2 Curved pedal
A curved pedal having a pedal reference plane and having a width direction and a length direction may comprise an actuatable region disposed at a top surface of the curved pedal; and at least one curvature profile in the length direction within at least one portion of the actuatable region. Slope at the top surface relative to the pedal reference plane may vary smoothly within the at least one portion of the actuatable region. Radius of curvature of the top surface within the at least one portion of the actuatable region may, for example, be not less than one-half of the length of the actuatable region. The actuatable region may comprise at least one first convexity, at least one first concavity, and/or at least one second convexity. Where present, the at least one first concavity may be disposed centrally in the length direction between the at least one first convexity and the at least one second convexity. The curved pedal may be mounted in a pedal assembly and used to operate a drum or other such percussion instrument, or any of a wide variety of foot-actuated devices.
US10311839B1 Half-demon guitars
In effect, the Sculptured Neck Guitar comprises of purposefully structured fret shapes depicting a three-dimensional pyramid or top half of a circle into the entire guitar neck; face, sides, and the back uniformly. This structure of frets allows drastically improved string bending and also affords multiple variations of string and fret contact points to achieve multiple pitches sounded from one originating fret. Each fret position is enabled to produce a myriad of pitches opening multiple dimensions of pitch options on any or every fret. These structural modifications alone enable the musician a myriad of mobility and multiple new playing techniques adding new sound options within every fret when played while also maintaining the standard functionality and traditional sounds the guitar offers. To simplify, the invention affords a musician the ability to produce multiple notes with one finger on one fret by dramatically bending one string.
US10311838B2 Guitar neck joint
A neck joint for an electric guitar, comprising an elongated protrusion with rounded corners fitting into a similar-shaped pocket with similarly rounded corners, which creates a strong enough connection between the neck and the body that the neck no longer requires a heel, improving the range of the guitar and the sound of the instrument.
US10311834B2 Device for arranging in a motor vehicle, motor vehicle having a device, and method for operating a device
A motor vehicle includes a display device designed for depicting objects, a computing device for controlling the display device, and a stowage unit in which a first end region of the display device is inserted. In a stowage position of the display device, the entire display device is inserted in the stowage unit, and, starting from the stowage position, a useful region of the display device is extendable out of the stowage unit by a predeterminable use distance. The display device is lockable at different length values of the use distance, and therefore a plurality of different use positions results, and the computing device is designed to adjust the depiction of the objects depending on the current length value of the use distance.
US10311833B1 Head-mounted display device and method of operating a display apparatus tracking an object
A method tracks a pose of an object in a field of view of a camera; derives movement of the display apparatus or movement in the field of view using at least one of: the sensor data and the image data; determines, using the processor, whether or not the derived movement exceeds a first threshold; if the derived movement exceeds the first threshold, continues tracking the pose of the object; and if the movement does not exceed the first threshold: (1) stops tracking the pose of the object and (2) displays, using the display, the image based on a previously derived pose of the object.
US10311832B2 System-on-chip (SoC) devices, display drivers and SoC systems including the same
A system-on-chip (SoC) device includes: a display controller configured to receive a trigger signal, and to output image data based on the trigger signal; and a transceiver configured to receive a first interrupt. In a first mode, the display controller is configured to output the image data in synchronization with a pulse of the trigger signal. In a second mode, which is different from the first mode, the display controller is configured to output the image data in synchronization with a pulse included in the trigger signal only after receiving the first interrupt.
US10311827B2 Integrated circuit board and display apparatus
There is provided an IC board and a display apparatus. Switching components (01; 02) are added between the internal interfaces (J1, J2 . . . Jn; j1, j2 . . . jn) corresponding to the backend data processing chips (U2; U3) and the frontend data processing chip (U1), or a switching component (02) is added between the internal interfaces (j1, j2 . . . jn) corresponding to the backend data processing chip (U2) and another backend data processing chip (U3). The switching components (01; 02) can ensure normal signal transmission between the backend data processing chips (U2; U3) and the frontend data processing chip (U1) or between the backend data processing chips (U2; U2) when no external test signal is input into the internal interfaces, i.e., when the IC board operates normally; and interrupt the signal transmission between the backend data processing chips (U2; U3) and the frontend data processing chip (U1) or between the backend data processing chips (U2; U3) when the internal interfaces j1, j2 . . . jn are input with an external test signal such that the impedance of the signal transmission path in the backend data processing chips (U2; U3) during the external testing remains consistent to avoid abnormal transmission of the external test signals and the signals during normal operation.
US10311819B2 CMOS GOA circuit
The invention provides a CMOS GOA circuit, comprising a signal processing module having a first and a second TFTs, the first TFT having a gate connected to a first control signal, a source connected to an output node and a drain connected to a third node; the second TFT having a gate and a source connected to a second control signal, and a drain connected to the third node; the first and second control signals having opposite phases, the first and second control signals controlling the first and second TFTs to turn on alternatingly inputting a voltage signal of the output node or a second control signal to the third node. Compared to the known technique using NAND circuit, the invention reduces the number of TFTs required by latch module without affecting operation of the circuit, and facilitates the implementation of the ultra-narrow border or borderless display products.
US10311805B2 System and method for driving electrowetting display device
A system and method of driving an electrowetting display device including a plurality of sub-pixels are presented. A sub-pixel in the plurality of sub-pixels is determined to be in an open state or a closed state and a target reflectance value is determined for the sub-pixel. For the sub-pixel in the open state, the target reflectance value is determined to be less than a first threshold value, and a reflectance value of the sub-pixel is set to either a minimum reflectance value or the first threshold value. For the sub-pixel in the closed state, the target reflectance value is determined to be less than a second threshold value, and the reflectance of the sub-pixel is set to either the minimum reflectance value or the second threshold value.
US10311799B2 Display device and method for controlling peak luminance of the same
A display device according to example embodiments includes an image analyzer configured to calculate contrast and load of an image of a frame based on R, G, and B image data input corresponding to the frame, an image processor configured to control a peak control coefficient applied to W image data to adaptively control peak luminance based on the contrast and the load, and to respectively generate R′, G′, and B′ image data by subtracting a product of the W image data and the peak control coefficient from each of the R, G, and B image data, a display panel including a plurality of pixels, a data driver configured to generate a data signal based on the R′, G′, B, and W image data, and to provide the data signal to the display panel, and a scan driver configured to provide a scan signal to the display panel.
US10311798B2 Organic light emitting diode display and method for controlling luminance thereof
An organic light emitting diode display includes pixels in which an amount of current flowing in an organic light emitting diode of each pixel is determined depending on a difference between a data voltage and a reference voltage, a control signal generator differently generating a screen brightness control signal depending on a driving mode, a register adjusting unit independently adjusting a reference voltage register value and a gamma register value at each of red (R), green (G), and blue (B) pixels depending on the screen brightness control signal, a reference voltage generator generating the reference voltage of each of the R, G, and B colors based on the reference voltage register value, and a data voltage generator generating the data voltage of each of the R, G, and B colors based on the gamma register value.
US10311797B2 Display panel for employing an external compensation technique and display device having the same
A display panel includes a pad electrically connected to an external device, a data line electrically connected to the pad, a pixel at a crossing region of the data line, a feedback line, and a scan line, and a transferring circuit block configured to provide an initialization voltage to the feedback line in response to an initialization control signal, and configured to electrically connect the feedback line with the data line in response to a first sensing control signal.
US10311796B2 Scan driving circuit and display device
Provided are a scan driving circuit and a display device. Each driving unit comprises a first signal input end receiving a trigger signal or a former stage scan signal, a second signal input end receiving a latter stage scan signal, a first signal output end and a second signal output end connected to a multiplexing circuit; each multiplexing unit comprises a first signal receiving end and a second signal receiving end respectively connected to the first signal output end and the second signal output end, a third signal receiving end receiving the former stage scan signal, a fourth signal receiving end receiving the latter stage scan signal, a fifth signal receiving end receiving a clock signal, a scan signal output end outputting a scan signal for simplifying the circuit and saving the space, which is beneficial for the narrow frame design of the display device.
US10311795B2 Shift register unit, gate driver circuit and display device
A shift register unit is disclosed which includes an input module, a reset module, a node control module, a first output module and a second output module. Each of the shift register units can output two scan signals that have a phase difference with respect to each other. Also disclosed are a gate driver circuit and a display device.
US10311793B2 Display apparatus having a simple pixel structure and method of driving the same
A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.
US10311791B2 Pixel circuit, display device, and method for driving same
The purpose of the present invention is to suppress the fluctuation of a data line voltage that occurs when an analog voltage signal is sampled and held in a data line in a display device provided with a current-driven display element. Transistors (SWr, SWG, SWb) of each demultiplexer (252) are successively switched on, for each predetermined period, in a selection period of a write control line (SW_LR(i)). In a period when the transistor (SWr) is switched on, an analog video signal (Dj) from a data voltage output unit circuit (211d) is applied to a data line (SLrj) and a pixel circuit (50r). When the transistor SWr is then switched off, the voltage held by the data line (SLrj) decreases below the voltage of the analog video signal (Dj) due to a parasitic capacitance (Cssdr). However, the voltage of a voltage fluctuation compensation line (G3_Cnt (i)) changes from a low level to a high level within the selection period. This causes the voltage of the data line (SLrj) to rise via a capacitor (Ccnt), and the decrease in voltage to be compensated for.
US10311788B2 Organic light-emitting display and driving method thereof
An organic light-emitting display includes a driving transistor that drives an organic light-emitting diode, a first transistor connected between a data line supplying a data voltage and a gate electrode of the driving transistor, a second transistor connected between a reference voltage input line and a source electrode of the driving transistor, and a third transistor that directly charges the gate electrode of the driving transistor with a reference voltage supplied from the reference voltage input line, in response to a black data control signal, wherein the third transistor directly receives the reference voltage by being turned on for a certain period of time after the gate electrode of the driving transistor is programmed with the data voltage in one frame before receiving a data voltage in the next frame.
US10311784B2 Pixel driver circuit, display device and pixel driving method
A pixel driver circuit includes a driving transistor T1 connected in series to a light-emitting element, a capacitor C, a first end of which is connected to a gate electrode of T1 and a second end of which is connected to a source electrode of T1, and a charging circuit at least including a current source and configured to charge C at a charging stage. Within at least a part of time period of the charging stage, an intensity of a charging current for charging C is greater than an intensity of a target current, and after the charging stage, a voltage difference across C is equal to a target voltage difference. When the light-emitting element emits light at a preset brightness value at a light-emitting stage, the target voltage difference is a gate-to-source voltage difference of T1 and the target current is a current flowing through T1.
US10311780B2 Systems and methods of optical feedback
What is disclosed are systems and methods of optical feedback for pixel identification, evaluation, and calibration for active matrix light emitting diode device (AMOLED) and other emissive displays. Optical feedback is utilized to calibrate pixel whose output luminance exceeds a threshold difference from a reference value, and may include the use of sparse pixel activation to ensure pixel identification and luminance measurement, as well as a coarse calibration procedure for programming the starting calibration data for a fine calibration stage.
US10311777B2 Control system and method for data transmission, chip array and display
Disclosed are a control system and method for data transmission, and a chip array and a display. The control system for data transmission comprises: a chip array, comprising a plurality of rows of chip assemblies, wherein any row of chip assembly includes at least two chip sets, all chips in each chip set are cascaded with each other; and a controller, configured to receive display data, and generate, according to the display data, a plurality of sets of display signals corresponding to the plurality of rows of chip assemblies, wherein any set of display signal is divided into at least two sub-display signals corresponding to the at least two chip sets, any sub-display signal accesses to a signal input end of a first chip in a corresponding chip set. The control system and method for data transmission, and a chip array and a display solve the technical problem in the related art that electromagnetic radiation increases when a data transmission range is enlarged.
US10311775B2 Display device
A display device includes a display panel and a control circuit board configured to provide a driving signal to the display panel. The display panel includes a plurality of pixel structures of which pixel structures arranged in one row are connected to one gate line. Pixel structures arranged in one column are connected to one data line. The control circuit board includes a driving chip, an end portion of each of the gate lines and an end portion of each of the data lines are respectively provided with panel pins. The control circuit board is provided with circuit board pins to be electrically connected with the panel pins, and connecting lines through which pins of the control circuit board are connected to the circuit board pins. A spacing between adjacent circuit board pins is larger than a spacing between adjacent pins of the driving chip connected with the circuit board pins.
US10311773B2 Circuitry for increasing perceived display resolutions from an input image
Circuits for displaying an input image in improved perceived resolution are described. A circuit includes memory cells, a horizontal decoder and a vertical decoder. Each of the memory cells is provided to store a pixel value to drive a pixel element on a display. The horizontal decoder (X-decoder) includes horizontal switches, each of the horizontal switches provided to address at least two rows of the cells simultaneously. Each of the horizontal switches is controlled by a horizontal switch signal to toggle among three rows of the cells with the middle row of the cells always selected. The vertical decoder (Y-decoder) includes vertical switches, each of the vertical switches provided to address at least two columns of the cells simultaneously. Each of the vertical switches is controlled by a vertical switch signal to toggle among three columns of the cells with the middle column of the cells always selected.
US10311769B2 Image processing providing uniformity correction data generation for color signals
A uniformity correction data generation unit generates uniformity correction data for an R signal, a G signal, and a B signal. A multiplier multiplies pixel signals of the R signal, the G signal, and the B signal by the uniformity correction data for the R signal, the G signal, and the B signal. The multiplier shifts, from one another, positions of pixels at a time of multiplying the pixel signals of the R signal, the G signal, and the B signal by the uniformity correction data for the R signal, the G signal, and the B signal.
US10311766B2 Test circuit for in-cell touch screen
A test circuit which is configured to test an in-cell touch screen includes a plurality of cascaded scanning circuits. The scanning circuit includes a test signal input terminal, a test signal output terminal connected to the touch electrode correspondingly through a first signal line and configured to input a test signal to the corresponding touch electrode, and a short-circuit feedback terminal connected to the touch electrode which the test signal output terminal of the scanning circuit at a previous stage is connected to.
US10311762B2 Label-holder element for electric wires
Label-holder element for electrical wires (200), comprising a body (410; 510) extending in a longitudinal lengthwise direction (X-X), transverse widthwise direction (Y-Y) and vertical thickness direction (Z-Z), with a front face (10a) provided with a seat (20) for labels (30), side faces (410b) and a rear face (410c), said seat (20) having opposite top (20a) and bottom (20b) edges which extend in the transverse direction (Y-Y), are arranged opposite each other in the longitudinal direction (X-X) and are formed in the manner of engaging means (21,22) for retaining a label (30); means for coupling with an electrical wire (200) comprising at least one pair (440; 540) of teeth (441; 541) extending outwards from the rear surface (410c; 510c) in the vertical direction (Z-Z), the teeth (441; 541) of one pair having a free end (441a; 541a) directed towards the other tooth in the transverse direction (Y-Y) and being arranged staggered in the longitudinal direction (X-X) for mounting on/engagement with a wire (200).
US10311759B2 Pressure compensation label for sticking to a surface, and method
A pressure compensation label for sticking to a surface, provided with a pressure compensation opening, of a housing or some other article, has a first film for sticking to a surface provided with a pressure compensation opening, and an outer, second film and also an air-permeable membrane film which is arranged between the first film and the second film. The first film has a cutout, intended for positioning over a pressure compensation opening, and a number of ventilation ducts. Each of the ventilation ducts is separated from the cutout by a film region of the first film. The membrane film covers the cutout and each of the film regions between the cutout and the number of ventilation ducts. The outer, second film extends laterally beyond the membrane film, at least regionally covers the number of ventilation ducts of the first film laterally outside the membrane film, and spans a ventilation path which leads from that surface of the membrane film that faces the second film to the number of ventilation ducts in the first film.
US10311754B2 Resettable auto injector training device with a releasably locking shield and a resetting cap
A resettable injection training device having an outer shell including a proximal end and a distal end, the outer shell defining a chamber there within, an actuation member near a proximal end, and a plunger slidable within the chamber is provided in an embodiment herein. The embodiment further including a safety shield having an extended locked position, an extended unlocked position and a retracted position, a locking sleeve configured to interact with the safety shield, and a reset shuttle disposed within the safety shield at a distal end of the device, wherein the reset shuttle is slidable relative to the safety shield, such that movement of the reset shuttle toward the proximal end of the device unlocks the safety shield.
US10311752B2 Compressed edge map representation for image aided navigation
A method of generating a map for image aided navigation comprises detecting one or more edges in one or more terrain images, and obtaining a compressed edge representation of the one or more edges. The compressed edge representation is obtained by a method comprising fitting a geometric form or other mathematical model to the one or more edges, calculating one or more coefficients based on the fitted geometric form or other mathematical model, and storing the one or more coefficients in a database for use in generating the map for image aided navigation.
US10311751B2 Systems and methods for accessible widget selection
Methods and systems are disclosed for enabling item selection in a widget. An example method comprises receiving at an electronic device, from a server, code instructing the electronic device to display a widget having a grid comprising one or more cells configured for point-and-click selection. The method further comprises displaying the grid in accordance with the received code and sending information associated with a currently selected cell to an assistive system on the electronic device. The method further comprises configuring the electronic device for keystroke operation of the widget. The method further comprises identifying a non-entry keystroke, and in response, determining a new cell associated with the grid, selecting the new cell, and sending information associated with the new cell to the assistive system for output to the user. The method further comprises identifying an entry keystroke and, responsive thereto, sending information associated with the new cell to the server.
US10311747B2 Empirical expert determination and question routing system and method
The system collects location tracking data about each user and analyzes the location tracking data to determine the level of expertise a user has for a specific venue/event or a specific geographic region at a particular scale on a map. The system receives questions about a specific venue/event or about a category of venue/event in a specific geographic region at a particular scale on a map and routes those questions in real time to one or more experts for the specific venue/event or the category of venue/event in the specific geographic region. The system receives a response to the question from at least one of the one or more experts and routes the response back to the requestor, also in real time. The system also efficiently represents the location of a plurality of venues/events and/or users within a specific geographic region on a displayed map at a plurality of scales.
US10311740B2 Aggregation and distribution of real-time data
A system for data aggregation and distribution comprises a context builder that receives a data request from a consumer, and a producers locator that communicates with producers. A producers filter receives a list of producers and selects producers capable of providing data relevant to context information. A data requests formatter receives the context information, and sends the data request to the selected producers. A data responses validator validates data responses from producers, and a data responses processor processes validated data responses. A data predictor receives processed data responses and context information, and generates data prediction information. A data fusion module receives processed data responses, context information, data prediction information, and data history. The data fusion module combines processed data responses with data prediction information to generate a consolidated data response for the consumer. The data fusion module also considers data prediction information upon receiving a request for predicted data when real-time data is unavailable.
US10311737B2 Systems and methods for selecting and designating ADS-B traffic
Various navigation and other instrumentation systems may benefit from appropriate methods for selection of traffic. For example, certain avionics may benefit from systems and methods for selecting and designating ADS-B or similar traffic. An apparatus can include a display and a processor. The processor and the display can be configured to permit selection of at least one target aircraft identified on the display.
US10311735B2 Vehicle display system and method of controlling vehicle display system
A vehicle display system includes a display device, a determiner, and a display controller. The display device is mounted on a vehicle. The determiner is configured to determine whether a person present outside the vehicle enters a blind spot of a driver of the vehicle. The display controller is configured to control, when the person enters the blind spot, the display device to display a warning to the person.
US10311734B2 Operation control apparatus
An operation control apparatus mounted in a vehicle includes a dangerous region determination section which sets a dangerous region in a vehicle travel direction from the vehicle in accordance with the travel speed of the vehicle, and when an obstacle is detected in the dangerous region, determines that it is dangerous to operate an in-car electrical component equipped in the vehicle; an operation detection section which detects that an operation of the in-car electrical component is done; and a dangerous operation recognition section which, when it is determined in the dangerous region determination section that an operation of the in-car electrical component is dangerous, and it is detected in the operation detection section that an operation of the in-car electrical component is done, recognizes a dangerous operation and outputs a signal for issuing an alarm.
US10311728B2 Method and apparatus for providing a confidence-based road event message
An approach is provided for a confidence-based road event message. For example, the approach involves aggregating road event reports (e.g., slippery road event reports) from vehicles traveling in an area of interest. The approach also involves retrieving weather data records for the area of interest for a time period corresponding to the reports. The approach may further involve determining a data freshness parameter based on an age of the reports, and a number of vehicle generating the reports. The approach further involves calculating a confidence level for the road event based on the weather data records, data freshness parameter, number of the one or more vehicles, or a combination thereof.
US10311725B2 Systems and methods for detection of travelers at roadway intersections
A system and method that enables individual travelers, including pedestrians or individuals on smaller conveyances, to communicate their location and direction of travel to signal light controllers at an intersection, enables traffic networks to receive this communication and output the detected data to the corresponding intersection traffic-signal controller to allow for individuals not in standard motor vehicles to be detected by traffic detection systems and to allow for priority of traveler flow either independent of vehicle use, or based on specifics of the vehicle used.
US10311722B2 Vehicle identification and/or monitoring system
An apparatus is disclosed which is operable to detect and identify vehicles, where individual vehicles each have at least one RFID communication device mounted thereon close to the surface on which the vehicle travels, and a vehicle's RFID communication device(s) is/are operable to transmit to the apparatus a signal indicating that vehicle's identity, the apparatus including an RFID reader, the RFID reader having an antenna which is operable to be positioned on or in the surface on which the vehicles travel, and the antenna (which may be an “adapted dipole” antenna) is operable to transmit a signal to a vehicle's RFID communication device(s) and to receive a backscattered modulated signal from a RFID communication device on that vehicle indicating that vehicle's identity, such that that vehicle is thereby detected and identified by the apparatus.
US10311718B2 Image display device for displaying images on a road surface
An image display device includes an illuminator and a communicator. The illuminator is configured to send out light on a road surface around a first vehicle as an own vehicle, to display a first notification image on the road surface. The first notification image notifies information to surroundings of the first vehicle. The communicator is configured to perform inter-vehicle communication with a second vehicle other than the first vehicle. The illuminator is configured to display the first notification image on the basis of the inter-vehicle communication performed by the communicator.
US10311711B2 Method and system for configurable security and surveillance systems
A method and system for a configurable security and surveillance system are provided. A configurable security and surveillance system may comprise at least one programmable sensor agent and/or at least one programmable content analysis agent. A plurality of processing features may be offered by the configurable security and surveillance system by programming configurable hardware devices in the programmable sensor agents and/or the programmable content analysis agents via a system manager. Device programming files may be utilized to program the configurable hardware devices. The device programming files may be encrypted and decryption keys may be requested to enable the programming of different processing features into the programmable sensor agents and/or the programmable content analysis agents. The device programming files and/or the decryption keys may be received via a network transfer and/or via a machine-readable media from an e-commerce vendor.
US10311709B2 Emergency communication system and method
An emergency communication system comprises at least two distributed servers. Each of the servers is an independently functioning device configured to operate cooperatively with another server, store personal data of users, duplicate data, and so forth. The servers are connected to a dispatch center, user devices of users, and personal devices of responders through two or more communications networks. The servers are further configured to implement a method including the steps of: receiving an alert signal initiated by a user during an emergency, determining a geographical location of the user based on the alert signal, identifying an emergency type associated with the user based on the alert signal, selecting at least one responder to address the emergency based at least on the emergency type and the geographical location of the user, and sending an emergency signal, including the geographical location of the user, to the at least one responder.
US10311699B2 Swimming pool entrance detector
A swimming-pool entrance detector (10a), including: means (50) for disposing the swimming-pool entrance detector (10a) in water of a swimming pool (12) above the ground (56) thereof; and a first optical sensor (30), for receiving optical rays (40a1, 40a2), thereby receipt of the optical rays (40a1, 40a2) may indicate presence of at least one opening (14a) in a cover (18) of the swimming pool (12).
US10311697B2 Allergy warning and protection system with beacon enhanced wearable for proactive transmission and communication of allergy information
An allergy warning and protection system and method to proactively warn a user and protect a dependent individual, such as a child, suffering from allergies. The system comprises a beacon housed within a wearable, such as a bracelet, that is worn by the dependent. The beacon has an associated identifier that is linked to data stored on a server that corresponds to the allergy and sensitivity levels of the dependent individual with an allergy, indicating that the child is allergic to peanuts, eggs, gluten and/or other allergens. When in use, the beacon transmits identification data to a handheld device operated by a user which is utilized to retrieve the allergy and other confidential information, such as emergency contact information, from the server and to issue an alert notification to the user. In a preferred embodiment, a layer of privacy is provided so that a user must first be “trusted” before receiving confidential information about a person with allergies.
US10311694B2 System and method for adaptive indirect monitoring of subject for well-being in unattended setting
A system is provided for event-based monitoring of a subject's well-being within an unattended setting. A plurality of sensors are disposed within the setting for sensing disparate events, and an analytics processing portion is coupled to the sensors to collectively acquire sensing data therefrom, and map a plurality of sensed data points for a selected combination of disparate events to a conduct adaptively characterized for the subject. The mapping occurs according to a set of pre-established reference event patterns, relative to which each characterized conduct is screened for excessive aberration. The analytics processing portion actuates generation of a graphic user interface displaying at least one reporting page. The reporting page contains for each characterized conduct certain graphic indicia determined responsive to the screening thereof. At least one wirelessly coupled monitoring device actuates responsive to the analytics processing portion to render the graphic user interface for a remotely monitoring user.
US10311693B1 Vehicle and a method for controlling the same
A vehicle and a method for controlling the vehicle include generating a warning message for passenger confirmation such that a driver of the vehicle confirms whether at least one passenger safely alights from the vehicle by recognizing the warning message. The method for controlling the vehicle includes: primarily confirming a presence or absence of a passenger having not yet exited the vehicle on a basis of opening/closing information of doors; generating a primary warning message for passenger confirmation on a basis of a result of the primary confirmation regarding the presence or absence of the passenger; secondarily confirming the presence or absence of the passenger having not yet exited the vehicle using a human detection sensor; and generating a secondary warning message for passenger confirmation on a basis of a result of the secondary confirmation.
US10311692B2 Method and information system for security intelligence and alerts
The method and information system provides for receiving, verifying, analyzing, and monitoring data streams from various news feeds, web services and social media posts to alert and coordinate security services of possible terrorist events, major crimes, active shooters, public protests and other developing incidents. The method and information system provides for the transmission of real-time actionable intelligence instantaneously directly to security service personnel through SMS messaging using smart phone and similar mobile devices. Based on the relevant intelligence transmitted through SMS messages on smart phones and devices, individual security personnel can be coordinated and instructed to revise post orders, lock down doors or call for backup to provide timely responses to help ensure the safety and security of the assets and personnel they are contracted to protect.
US10311690B2 Systems and methods for detecting motion based on a video pattern
Some systems and methods for detecting motion based on a video pattern can include creating a motion image from a sequence of raw images, masking the motion image with a lens pattern associated with a PIR sensor and an associated Fresnel lens, splitting each of a plurality of blocks of the lens pattern into first and second negative areas, identifying a positive area pixel value as a sum of all pixels in the motion image aligned with the first positive area in the plurality of blocks, identifying a negative area pixel value as a sum of all pixels in the motion image aligned with the second negative area in the plurality of blocks, identifying a motion image response value as a difference between the positive and negative area pixel values, and identifying a presence of motion when the motion image response value exceeds a predetermined value.
US10311686B2 Automatic and unique haptic notification
Disclosed herein is an apparatus for automatically generating unique haptic effects. An embodiment of the apparatus comprises a haptic actuator. Memory stores a hash function and a haptic control module programmed to generate a haptic control signal related to a hash value generated by the hash function. A controller is communicatively associated with the haptic actuator and the memory. The controller is configured to receive information, execute the hash function on at least a portion of the information to generate the hash value, generate a haptic signal related to the hash value, and control the haptic actuator to generate a haptic effect, the haptic effect related to the hash value and the haptic signal. A method of automatically generating a unique haptic effect also is disclosed.
US10311682B1 Counterfeit detection apparatus
Embodiments disclosed herein generally relate to an apparatus for counterfeit detection and a method implementing the same. In one embodiment, as apparatus is disclosed herein. The apparatus includes a first end, a second end, an elongated body, an ink cartridge, a controller, and a trigger. The elongated body extends from the first end to the second end. The elongated body defines a cavity therein. The ink cartridge is disposed in the cavity. The controller is positioned within the cavity. The controller is configured to communicate with at least one computing system remote from the apparatus. The trigger is in electronic communication with the controller. The trigger extends at least partially though the elongated body. The trigger is actionable between a first position and a second position. A change from the first position to the second position transmits an electronic signal to the controller.
US10311681B2 Electronic table game platform with secondary random event displays
A gaming system for enabling enhancement of wagering outcomes includes: a) multiple gaming sites having a game play surface with a light display element on the game play surface at a player position; b) a processor; c) a player input control at the player position, the player input control in communication with the processor; and d) a random number generator in communication with the processor. The light display on the game play surface at the player hand position has lights, and a power source in communication with the lights; the processor, in response to random selections for the light display element at the player position, is configured to direct that the lights at the player hand position are randomly lit. Lights may also be present at a dealer hand position. The lights indicate at least one of an immediate award, multiplier or bonus event, including a progressive jackpot.
US10311673B2 Wager recognition system having ambient light sensor and related method
A gaming table apparatus has a gaming table with a gaming table support surface. A token sensor assembly includes a container having a height and side walls that define an inside and outside perimeter of the container, and a top surface and bottom surface, a translucent cover disposed on the top surface of the side walls, a circuit board secured to the inside perimeter of the container, a plurality of lights disposed on a top side of the circuit board, and a passive ambient light sensor disposed on the top side of the circuit board. The passive ambient light sensor and the translucent cover may operate within predetermined wavelength ranges for receiving and passing light, respectively. A condition of the passive ambient light sensor may not be polled if the plurality of lights is emitting light.
US10311671B2 Method of modifying a primary game of an existing legacy gaming machine to include secondary game features
Secondary gaming functionality is provided for a casino gaming machine by a secondary controller of the casino gaming machine. The secondary gaming functionality may function to provide a multi-game experience at the gaming machine or remotely at another gaming machine or other device, e.g., a smart phone, tablet, personal computer, and the like. The multi-game experience may comprise one or more additional instances of a wager-based video game provided by the primary gaming functionality of the gaming machine. The secondary gaming functionality of the gaming machine may cause the one or more additional instances of the wager-based video game to be presented at another device either directly or indirectly via a server, such as a social media server or a server-based gaming system's server. The secondary gaming functionality may provide betting scenarios other, additional than those provided by the primary gaming functionality, which betting scenarios may permit the player to wager on a wager-based video game provided by the primary gaming functionality.
US10311668B1 Gaming system and method having award enhancements based on stored symbols
Various embodiments of a gaming system and method are disclosed as having awards or award enhancements based on a plurality of storage symbols. The gaming system enables the plurality of storage symbols to be collected and stored over multiple games. In some embodiments, the gaming system collects a wager for at least one or more of the games. In some embodiments, when the gaming system determines that a quantity of stored plurality of storage symbols is equal to or greater than a predetermined quantity of storage symbols, the gaming system evaluates the stored plurality of storage symbols for winning conditions. In some embodiments, the gaming system provides one or more awards or award enhancements associated with the winning conditions.
US10311666B2 Control device, control system, control method and program
A prediction value calculator calculates a prediction value of an electricity fee based on the amount of electric power supplied from a commercial electric power source to electric equipment within an electricity fee calculation period. A selector selects, as a first-stage control, either one control of an electric power saving control for the electric equipment and a charge-discharge control in which the electric power supplied from the commercial electric power source is stored in a storage battery in a first time slot and the electric power stored in the storage battery is supplied to the electric equipment in a second time slot in which the unit cost of the electric power supplied from the commercial electric power source is greater than that in the first time slot. A controller executes the first-stage control selected by the selector when the prediction value calculated by the prediction value calculator is greater than a targeted value of the electricity fee.
US10311663B2 Vehicle door control device
A vehicle door control device controls opening/closing of door members provided in entrances of a vehicle. The vehicle door control device includes a selective instruction portion that is provided on a vehicle exterior side of each of the door members and that is configured to selectively issue a closing instruction to close the door members and a closing and locking instruction to close and lock the door members.
US10311661B2 Device for controlling locking/unlocking and/or starting of a vehicle
The present invention relates essentially to a device for controlling locking/unlocking and/or starting of a vehicle (V) comprising a first communication device (COM1) mounted in the vehicle (V), said first communication device (COM1) being linked to the control unit (ECU) of the vehicle (V), and a second communication device (COM2) disposed in a mobile apparatus (SP), the first communication device (COM1) and the second communication device (COM2) being able to communicate with one another according to a first mode of communication so as to carry out an authentication of the mobile apparatus (SP) by the vehicle (V), said authentication authorizing the locking/unlocking and/or starting of the vehicle (V), characterized in that the first communication device (COM1) and the second communication device (COM2) are able to communicate also according to a second mode of communication, so as to determine data representative of the position of the mobile apparatus (SP) with respect to the vehicle (V), and in that the execution, by the control unit (ECU), of the command for locking/unlocking and/or starting the vehicle (V), is dependent on said data representative of the position of the mobile apparatus (SP) with respect to the vehicle (V).
US10311659B2 Method of analyzing variations of at least one indicator of the behavior of a mechanism fitted to an aircraft
A method of analyzing variations of an indicator of the behavior of a mechanism fitted to an aircraft, the indicator being determined from measurements of a physical operating parameter of the mechanism during a mission of the aircraft. The Method includes a storage step of storing the measurements of the physical operating parameter in a storage unit; a first transmission step of transmitting the measurements of the physical operating parameter contained in the storage unit to a communication station; a second transmission step of transmitting the measurements of the physical operating parameter from the communication station to an analysis center; an indicator generation step of generating the indicator performed on the basis of the measurements of the physical operating parameter; and an analysis step of analyzing variations of the indicator.
US10311653B2 Hybrid vehicle
A use index IDX indicative of a degree of use of external charging is calculated and transmitted to a vehicle external system. The vehicle external system provides a service or imposes a penalty based on the use index IDX. In a case where the degree of use of external charging is determined to be low based on the use index IDX, if the vehicle external system provides a non-preferential service or imposes a heavy penalty as compared with a case where the degree of use of external charging is determined to be high, a driver or an owner of a vehicle takes an action by which the use index is determined to indicate a high degree of use of external charging. As a result, the use of external charging can be promoted.
US10311652B2 Method and device for modifying the configuration of a driving assistance system of a motor vehicle
A method for updating a driving assistance system of a motor vehicle includes operating a central communications platform to receive data transmitted wirelessly from the vehicle, the data logged onboard the vehicle during operation of the driving assistance system and relating to driving conditions existing when a driver of the vehicle makes a control input that is counter to vehicle control directed by the driving assistance system. The method may include determining a modified configuration for the driving assistance system based on the data, and transmitting the modified configuration from the central communications platform to the driving assistance system, the modified configuration being used to update decision logic of the driving assistance system.
US10311649B2 Systems and method for performing depth based image editing
Systems and methods for the manipulation of captured light fields and captured light field image data in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, a system for manipulating captured light field image data includes a processor, a display, a user input device, and a memory, wherein a depth map includes depth information for one or more pixels in the image data, and wherein an image manipulation application configures the processor to display a first synthesized image, receive user input data identifying a region within the first synthesized image, determine boundary data for the identified region using the depth map, receive user input data identifying at least one action, and perform the received action using the boundary data and the captured light field image data.
US10311646B1 Dynamic configuration of an augmented reality overlay
A device may detect, in a field of view of a camera, one or more components of an automated teller machine (ATM) device using a computer vision technique based on generating a three dimensional model of the one or more components. The device may identify the ATM device as a particular device or as a particular type of device based on the one or more components of the ATM device, or first information related to the ATM device. The device may identify a set of tasks to be performed with respect to the ATM device. The device may provide, for display via a display associated with the device, second information associated with the set of tasks as an augmented reality overlay. The device may perform an action related to the set of tasks, the ATM device, or the augmented reality overlay.
US10311635B2 Method and apparatus for detecting repetitive structures in 3D mesh models
Discovering repetitive structures in 3D models is a challenging task. A method for detecting repetitive structures in 3D models comprises sampling the 3D model using a current sampling step size, detecting repetitive structures and remaining portions of the model, determining a representative for each of the one or more repetitive structures, and as long as the detecting step yields one or more repetitive structures, reducing the current sampling step size and repeating the steps of sampling and detecting for each detected representative of a detected repetitive structure and for the remaining portions of the model, wherein the reduced sampling step size is used. The described method and device can e.g. be used for 3D model compression, 3D model repairing, or geometry synthesis.
US10311623B2 Real-time animation method for hair-object collisions
Disclosed is a real-time motion simulation method for hair and object collisions, which is based on a small amount of pre-computation training data and generates a self-adaptive simplified model for virtual hair style for real-time selection and interpolation and collision correction, thereby realizing real-time high-quality motion simulation for hair-object collisions. The method comprises the following steps: 1) reduced model pre-computation: based on pre-computation simulation data, selecting representative hairs and generating a reduced model; 2) real-time animation and interpolation: clustering the representative hairs simulated in real time; selecting the reduced model and interpolating; and 3) collision correction: detecting collision and applying a correction force on the representative hairs to correct the collisions. The present invention proposed a real-time simulation method for hair-object collision, which achieves similar effect as off-line simulation and reduces the computation time cost.
US10311618B2 Virtual viewpoint position control device and virtual viewpoint position control method
A display assistance device detects the steering angle of a vehicle by using a steering angle sensor, and changes the position of a virtual viewpoint behind the host vehicle based on the detected steering angle. Then, the display assistance device converts images captured using a plurality of cameras such as a front camera and a rear camera into an overhead image of a downward view from the virtual viewpoint, and displays the converted overhead image on a display with a host vehicle icon superimposed on the overhead image, the host vehicle icon indicating the position of the vehicle.
US10311616B2 Methods and apparatus to define augmented content regions for augmented reality systems
Methods and apparatus to generate augmented content regions for augmented reality (AR) systems are disclosed. An example method includes receiving from a plurality of AR devices data representing a plurality of sight lines captured using the plurality of AR devices, identifying a plurality of commonalities of the plurality of sight lines based on the data representing the plurality of sight lines, and defining an augmented content region based on the plurality of commonalities.
US10311614B2 Customized realty renovation visualization
Applications and services providing customized realty renovation visualization are described. A realty renovation visualization service can, in response to receiving a request to customize a renovation visualization, query a data resource for a set of inspirational room images. The set of inspirational room images can be images of inspirational rooms with similar spatial characteristics as the room that is the subject of the customized renovation visualization. The request can include information about at least a room depicted in the renovation visualization and the data resource can be queried using parameters of a definite region of the room obtained from the information about at least the room. At least one customized room image can then be generated from the set of inspirational room images using one or more customizing criteria, and the at least one customized room image provided to the source of the request to include in the renovation visualization.
US10311611B2 Aggregating tags in images
In one embodiment, a method includes rendering an image comprising a plurality of tags, wherein each tag is associated with a particular location within the image, and wherein at least two tags of the plurality of tags are aggregated into an aggregated tag, calculating for each tag the distance of the location of the tag from the location of every other tag of the image responsive to the first user changing a zoom level for the image, and updating the aggregated tag based on the calculated distance of the locations of the tags to each other such that if the change in zoom level is zooming in, then the updated aggregated tag is aggregated with at least one fewer tag, and if the change in zoom level is zooming out, then the updated aggregated tag is aggregated with at least one more tag.
US10311609B2 Method and system for the making, storage and display of virtual image edits
Embodiments for a method and system for the making, storage and display of virtual image edits are disclosed. Source/linked image(s) (201a) in a web or other computer device (100a) environment may be virtually edited and/or combined with one another (102), by individual users, in collaboration with others or an automated program. Only the virtual edit alteration code, including the source image location information, are displayed (108) and saved (410), eliminating image redundancy, as the source images are not truly edited, copied or resaved, but instead remain stored at the copyright holder's disclosed location. Just as the House Of Mirrors in an amusement park changes ones reflection without changing the person, separating the image(s) from the virtual edits improves image load speeds and saves storage space. The said display is dynamically affected should the image copyright holder change or delete one of the source images.
US10311604B2 System and method for generating attenuation map
A method for generating attenuation map is disclosed. The method includes acquiring an anatomic image and PET data indicative of a subject, wherein the anatomic image comprises a plurality of voxels. The method also includes fetching a reference image to register the anatomic image, the reference image includes voxel segmentation information. The method further includes segmenting the anatomic image into a plurality of regions based on the voxel segmentation information. The method further includes generating a first attenuation map corresponding to the anatomic image by assigning attenuation coefficients to the plurality of regions. The method further includes calculating a registration accuracy between the anatomic image and the reference image. The method further includes determining a probability distribution of attenuation coefficient. The method further includes updating the first attenuation map iteratively based on the probability distribution of attenuation coefficient and the PET data to obtain a final attenuation map.
US10311601B2 3D motion correction using 3D deformable registration and patient respiratory signals
Embodiments can provide a computer-implemented method for 3D motion correction for diffusion weighted imaging images, the method comprising acquiring a series of image slices from a medical imaging device; binning the series of image slices into bins, each bin comprising a plurality of slice locations; identifying, for each of the B-values, a dominating breathing state wherein at least one of the plurality of slice locations of the dominating breathing state contains an image slice from the series of images; identifying, for each of the B-values, one or more non-dominating breathing states; and registering, for each of the B-values, all of the one or more non-dominating breathing states to the dominating breathing state.
US10311600B2 Method and system for setting interface element colors
Setting interface element colors is disclosed including rendering an interface element, determining first color values, assigning a value to a color attribute of the interface element based on the first color values, and updating the interface element according to the assigned value.
US10311598B2 Fully automated localization of electroencephalography (EEG) electrodes
A method for fully automated localization and channel identification of electroencephalography (EEG) electrodes. The electrode locations are automatically identified from three dimensional images stored in an electronic format, wherein the images may be derived from magnetic resonance imaging (MRI) that render the electrodes visible and object shapes and properties are used to locate the electrodes in the three dimensional images. The three dimensional images also show the brain in detail, such that the relationship of the electrodes to the brain is available, thereby making it possible to better identify electrical sources within the brain that create the EEG signals.
US10311594B2 Method for verifying positions of a plurality of monitoring devices
A method for verifying positions of a plurality of monitoring devices includes selecting a second monitoring device by a first monitoring device. A first number of monitoring devices out of the plurality of monitoring devices is supervised, the plurality of monitoring devices being positioned such that each monitoring device of the plurality of monitoring devices can be monitored by at least one other monitoring device of the plurality of monitoring devices. Correct positions of the plurality of monitoring devices have been determined and stored prior to verification, and security information for secure communication has been exchanged between two of the plurality of monitoring devices for all of the plurality of monitoring devices.
US10311593B2 Object instance identification using three-dimensional spatial configuration
A system for identifying specific instances of objects in a three-dimensional (3D) scene, comprising: a camera for capturing an image of multiple objects at a site; at least one processor executable to: use a location and orientation of the camera to create a 3D model of the site including multiple instances of objects expected to be in proximity to the camera, and generate multiple candidate clusters each representing a different projection of the 3D model, detect at least two objects in the image, and determine a spatial configuration for each detected object; and match the detected image objects to one of the multiple candidate cluster using the spatial configurations, associate the detected objects with the expected object instances of the matched cluster, and retrieve information of one of the detected objects that is stored with the associated expected object instance; and a head-wearable display configured to display the information.
US10311589B2 Model-based three-dimensional head pose estimation
One embodiment of the present invention sets forth a technique for estimating a head pose of a user. The technique includes acquiring depth data associated with a head of the user and initializing each particle included in a set of particles with a different candidate head pose. The technique further includes performing one or more optimization passes that include performing at least one iterative closest point (ICP) iteration for each particle and performing at least one particle swarm optimization (PSO) iteration. Each ICP iteration includes rendering the three-dimensional reference model based on the candidate head pose associated with the particle and comparing the three-dimensional reference model to the depth data. Each PSO iteration comprises updating a global best head pose associated with the set of particles and modifying at least one candidate head pose. The technique further includes modifying a shape of the three-dimensional reference model based on depth data.
US10311584B1 Estimation of absolute depth from polarization measurements
A head mounted display comprises an eye tracking system configured to enable eye tracking using polarization. The eye tracking system includes one or more illumination sources and an optical detector comprising polarization sensitive pixels. The one or more illumination sources are configured to illuminate a user's eye and generate reflections directed towards the optical detector. The eye tracking system determines, for each polarization sensitive pixel in a subset of the polarization sensitive pixels, one or more estimation parameters. The eye tracking system determines, for the subset of the polarization sensitive pixels, depth information for one or more glints associated with one or more surfaces of the eye, based in part on the polarization of the reflections and the one or more estimation parameters. The determined depth information is used to update a model of the eye. The eye tracking system determines eye tracking information based on the updated model.
US10311583B2 Eye motion detection method, program, program storage medium, and eye motion detection device
Provided is a method to easily detect eye motions in the eye moving direction, which has resistance to a fluctuation in background light and to a displacement of the position of a camera. The method includes the steps of: detecting a white area of the eye from the eye area; determining a blood vessel image to be used for a template blood vessel image in the white area of the eye; detecting a nth blood vessel image, which matches the template blood vessel image; calculating a nth moving amount of the eye based on a difference between the reference position and the detection position of the nth blood vessel image, which matches the template blood vessel image; and calculating a nth rotation angle of the eye to detect eye motions in the information processing apparatus.
US10311581B2 Display control and image processing of a cell image
Apparatus and methods for display control and image processing that enable easy and noninvasive observation of an object are described. Display control of a cell image may include generating a motion amount for subregions of the cell image and displaying the motion amount superimposed on the cell image. Image processing of a cell image may include generating a motion amount for subregions of a cell image and evaluating a state of propagation of the motion of the cells.
US10311573B2 Training and machine learning classification of mold in digital microscopy images
Systems, methods, and devices for classifying or detecting mold samples or training computer models (such as neural networks), are disclosed. A method includes obtaining a microscopy image of a mold sample. The method includes determining a classification of the mold sample based on non-image data corresponding to the mold sample. The method further includes training a computer model based on the microscopy image and a label indicating the classification.
US10311571B2 Image analysis method supporting illness development prediction for a neoplasm in a human or animal body
The present invention relates to an image analysis method for providing information for supporting illness development prediction regarding a neoplasm in a human or animal body. The method includes receiving for the neoplasm first and second image data at a first and second moment in time, and deriving for a plurality of image features a first and a second image feature parameter value from the first and second image data. These feature parameter values being a quantitative representation of a respective image feature. Further, calculating an image feature difference value by calculating a difference between the first and second image feature parameter value, and based on a prediction model deriving a predictive value associated with the neoplasm for supporting treatment thereof. The prediction model includes a plurality of multiplier values associated with image features. For calculating the predictive value the method includes multiplying each image feature difference value with its associated multiplier value and combining the multiplied image feature difference values.
US10311570B1 Medical image based distortion correction mechanism
A mobile device to provide a medical image based distortion correction mechanism is described. An image analysis application, executed by the mobile device, captures a digital copy of the medical image with a camera component in response to a user action. Distortion(s) associated with the digital copy are identified by processing the digital copy with deep neural network (DNN) model(s). Next, a manual correction description is determined to correct the distortion(s) in relation to the camera component and the medical image. Furthermore, a notification to recapture the digital copy is provided to the user. The notification includes the manual correction description. Additionally, in response to another user action to correct the distortion(s) or a failure to detect the user execute manual correction(s) associated with the distortion(s) within a time period, the distortion(s) within the digital copy are corrected and the corrected digital copy is provided to the user.
US10311566B2 Methods and systems for automatically determining image characteristics serving as a basis for a diagnosis associated with an image study type
Methods and systems for automatically determining image characteristics serving as a basis for a diagnosis associated with an image study type. One system includes a server including an electronic processor and an interface for communicating with at least one data source. The electronic processor is configured to receive an image study from the at least one data source over the interface. The image study being of the image study type and including a plurality of images. The electronic processor is also configured to determine an image characteristic for each of the plurality of images and determine whether each of the plurality of images was used to establish a diagnosis. The electronic processor is also configured to store the image characteristic for each of the plurality of images and an indicator of whether each of the plurality of images was used to establish the diagnosis in a data structure.
US10311565B2 Cell site equipment verification using 3D modeling comparisons
Systems and method for verifying a cell site utilizing an Unmanned Aerial Vehicle (UAV) include providing an initial point cloud related to the cell site to the UAV; developing a second point cloud based on current conditions at the cell site, wherein the second point cloud is based on data acquisition using the UAV at the cell site; detecting variations between the initial point cloud and the second point cloud; and, responsive to detecting the variations, determining whether the variations are any of compliance related, load issues, and defects associated with any equipment or structures at the cell site.
US10311564B2 Image processing device, image sensor, and image processing method
An image processing device is provided with a storage unit configured to store for each model among a plurality of models, a model template obtained by reducing a model image; an image reduction unit configured to reduce an input image by the reduction ratio for each model; and a search unit configured to search for the location of a model in an input image on the basis of a reduced input image and a model template. The storage unit stores model templates for at least two of the models wherein said model templates are obtained by reducing the model images by the same reduction ratio; and The image reduction unit processes the at least two models jointly. The image processing device is hereby capable of high-speed identification and recognition of a plurality of models from an input image.
US10311559B2 Information processing apparatus, information processing method, and storage medium
To present a determination result with respect to input data and also a reason of the determination result to a user, an extraction unit configured to extract a plurality of feature amounts from an image including an inspection target object, a determination unit configured to determine an anomaly degree of the inspection target object on the basis of the extracted feature amounts, and an image generation unit configured to generate a defect display image representing a defect included in the inspection target object on the basis of contribution degrees of the respective feature amounts with respect to the determined anomaly degree are provided.
US10311558B2 Efficient image processing on content-adaptive PQ signal domain
An image processing device receives one or more forward reshaped images that are generated by an image forward reshaping device from one or more wide dynamic range images based on a forward reshaping function. The forward reshaping function relates to a backward reshaping function. The image processing device performs one or more image transform operations on the one or more forward reshaped images to generate one or more processed forward reshaped images without performing backward reshaping operations on the one or more reshaped images or the one or more processed forward reshaped images based on the backward reshaping function. The one or more processed forward reshaped images are sent to a second image processing device.
US10311557B2 Automated tonal balancing
A system for automated tonal balancing, comprising a rectification server that groups and processes images for use in tone-matching and provides them to a tone-matching server, that then performs tone-matching operations on the images and provides them as output for review or storage, and methods for tonal balancing using the system of the invention.
US10311548B2 Scaling render targets to a higher rendering resolution to display higher quality video frames
Examples described herein improve the quality of the video frames that are rendered and displayed. A system is configured to generate render targets based on instructions received from a source of video content. The system is configured to create and/or access a selection parameter and use the selection parameter to identify one or more of the render targets to be scaled. Once identified, the system scales a native size (e.g., a native resolution) of an identified render target to a larger size (e.g., based on a predetermined scaling factor), thereby generating a higher density render target. The higher density render target, or a corresponding higher density render target texture (RTT), can be used in a rendering pipeline to produce a video frame in a higher output resolution (e.g., 4k resolution) compared to the output resolution specified in the instructions (e.g., 720p resolution).
US10311546B2 Edge detection apparatus and edge detection method
An edge detection apparatus according to the present invention, includes: a detection unit configured to detect a dispersion degree of gradation values of input image data; a determination unit configured to determine detection sensitivity, which is edge detectability, based on the dispersion degree detected by the detection unit; and an edge detection unit configured to detect an edge from an input image based on the input image data, at the detection sensitivity determined by the determination unit, wherein in a case where the dispersion degree is low, the determination unit determines a lower detection sensitivity, compared with a case where the dispersion degree is high.
US10311543B2 Virtual object movement
A method for moving a virtual object includes displaying a virtual object and moving the virtual object based on a user input. Based on the user input attempting to move the virtual object in violation of an obstacle, displaying a collision indicator and an input indicator. The collision indicator is moved based on user input and movement constraints imposed by the obstacle. The input indicator is moved based on user input without movement constraints imposed by the obstacle.
US10311536B1 System and method for automating pharmacy processing of electronic prescriptions
A method and system may provide an automated pharmacy processing system which automatically processes an electronic prescription by converting the electronic prescription into a pharmacy prescription record. In this way, an electronic prescription can be filled by a pharmacist without manual data entry. The system receives an electronic prescription and compares data from the electronic prescription with entries in one or more pharmacy database(s). When there is a match between the electronic prescription data and an entry in the one or more pharmacy database(s), the system populates the pharmacy prescription record with data from the matching pharmacy database entry. If all of the data fields from the pharmacy prescription record have been populated the pharmacist can fill the electronic prescription.
US10311529B1 Systems, media, and methods of applying machine learning to create a digital request for proposal
Disclosed herein are systems, media, and methods of applying machine learning to create a digital request for proposal for use in property construction and improvement. Consumers are enabled by the systems, media, and methods disclosed herein to compose property improvement proposals and generate electronic documentation to assist contractors in evaluating said proposals and providing bids for the completion of the proposed property improvement.
US10311524B2 Hashtag segmentation
Segmenting hashtags is provided. A selection of a sub-hashtag contained within a hashtag is received from a client device via a network. A set of content linked only to the selected sub-hashtag within the hashtag is retrieved. The set of content linked only to the selected sub-hashtag is sent to the client device via the network.
US10311522B1 System and method for managing and editing accounting periods
Embodiments of the present methods and systems are directed to a system and method for managing and editing accounting periods. Particularly, the embodiments are directed to a financial management system that allows for the recordation of financial transactions without first requiring the creation of a user-defined accounting period, and that further allows for the creation, modification, and closure of defined accounting periods.
US10311520B1 System and methods related to term life insurance
An exemplary aspect comprises a computer system with a receiving component that receives application information for an insurance policy that extends the term of an existing life insurance product, and is pre-paid for by a third party, the third party to be paid fees based on the customer's selection of one of a first option providing the customer with the right of first refusal to continue the insurance policy, and a second option providing the third party with the right of first refusal to continue the insurance policy; an underwriting component that determines whether the customer qualifies for the insurance policy; a pricing component that calculates the fees to be paid by the customer to the third party; and a closing component that provides relevant closing documentation for the insurance policy to at least the customer, the insurance company, and the third party.
US10311519B2 Computerized method and system for accumulation and distribution of securities
Disclosed embodiments include computer-implemented methods and systems that permit a market participant to automatically trade a relatively large order block order to accumulate or distribute securities as multiple, relatively smaller, component orders based on order parameters and subject to conditions for the placing and/or execution of such component orders. The component orders may continue automatically, without the need for further intervention from the market participant, until the total quantity specified by the market participant is accumulated or distributed.
US10311517B1 Exchange-traded TBA options
A computer-implemented method for creating an option on a TBA mortgage backed security, including determining an option position is marked to market daily, where the option position is long or short, determining the option position increased in value by an increased amount on a given day and adding the increased value to a customer's margin account, determining the option position decreased in value by a decreased amount on the given day and subtracting the decreased value from the customer's margin account, and when funds in the margin account are below a predetermined margin requirement, requesting the customer deposit additional funds in the margin account, receiving a request to exercise the option on the TBA mortgage backed security from a customer owning the option on the TBA mortgage backed security.
US10311513B2 Method and system for facilitating access to recorded data
The present invention relates to a method and system for facilitating access to recorded data. The system comprises an interface and a processing device. The interface is arranged to receive data and the processing device is arranged to separate the received data in data subsets, compress each data subset and assign an identifier to each compressed data subset, thereby creating data units each comprising a compressed data subset and an associated identifier, the processing device further being arranged to establish an index on the basis of the assigned identifiers.
US10311508B2 Garment modeling simulation system and process
The present invention is directed to a system and method of simulating modeling a garment, comprising the steps of receiving a user image, a garment selection, and a user profile. A photo extraction module extracts the head and neck region from the user image. A colorization module extracts color frequency data from the user image for application to a base figure framework. The system selects and scales a base figure framework in response to user profile input. A stitching module joins said extracted head and neck region to the neck region of the selected base figure framework to output a base user model. A model display module overlays and scales the selected garment on the base user model. The model display module renders a near three dimensional user model, shading the user model based on colorization module data, whereby the system simulates the user wearing the selected garment.
US10311507B2 Reconfigurable user interface for product analysis
A device may include one or more processors. The one or more processors may obtain product information relating to one or more products. The product information may be obtained from a set of web sites on which the one or more products are offered. The one or more processors may normalize the product information to determine normalized product information. The one or more processors may determine one or more product metrics based on the normalized product information. The one or more processors may generate a user interface based on the one or more product metrics. The user interface may provide information relating to the one or more product metrics. The user interface may permit a user to interact with the information relating to the one or more product metrics. The one or more processors may provide the user interface for display.
US10311496B2 Web-based automated product demonstration
The innovations described in this disclosure include distinct differences that create a marketing and sales advantage. For convenience, these features are organized into several innovations, but the features described can be combined and implemented in various ways, both within a given innovation and across two or more innovations. Each innovation is unique in itself. Taken as a whole the innovations establish a demonstration category called “Demo Automation” or “Demonstration automation”. The innovations include, but are not limited to, automated self-configuring video content density and sequence based on personalization responses; automated responsive locked document library; sending a product demo that allows you to see who the recipient shared it with; and product demonstration analytics.
US10311495B2 Customizable product housing
A personalized housing for a consumer product, such as a speaker, includes a customizable cover at least partially covering the product and a set of at least two end caps coupled to the product. The end caps are oriented in at least partial opposition to each other and installed using an interference fit. A vibration dampening connector or buffer couples the end caps to the product. The buffer is arranged such that urging the end caps onto the product couples the end caps in a releasable interference fit, and the cover remains coupled to the product when the end caps are pulled from the cover. The cover allows access to controls located on the product, for example volume and input controls, may be made of a front panel covering only the front of the product, and a corresponding enclosure that covers the top, rear and sides of the product.
US10311488B2 System and method for providing automatic high-value listing feeds for online computer users
A system and method for providing automatic high-value listing feeds for online computer users is disclosed. A particular embodiment includes obtaining publisher information corresponding to a plurality of publisher content items from a plurality of publisher sites; obtaining merchant information including value information corresponding to the plurality of publisher content items; using a processor, the publisher information, and the merchant information to generate a set of high-value feeds for transfer to the plurality of publisher sites, the set of high-value feeds each being ranked corresponding to a quality score computed for each listing item of each high-value feed; and transferring the set of high-value feeds to corresponding publisher sites of the plurality of publisher sites.
US10311486B1 Computer-implemented systems and methods for response curve estimation
Systems, methods, and computer-readable media are disclosed for calculating input-output relationships using, for example, spline functions. In accordance with one implementation, a computer-implemented method is provided that includes determining at least one price-volume point comprising a price and associated volume, transforming the price, and using the transformed price to calculate values along a spline function to obtain a price-volume curve weight factor. The method further includes transforming a second price, calculating values along the spline function and the first derivative of the spline function using the transformed second price to obtain a volume estimate and volume rate at the second price, and recalculating the spline function based on the calculated price-volume curve weight factor, volume estimate, volume estimate and volume rate.
US10311483B2 Energy-efficient content serving
Various technologies described herein pertain to prefetching content units. A prefetch request is transmitted to a server from a client device. The prefetch request includes data indicative of probabilities of slots for content units being available during an upcoming time period. The probabilities can be based on likely interaction with application(s) executed by the client device during the upcoming time period. Prefetched content units assigned to the client device for the upcoming time period can be received from the server responsive to the prefetch request. One or more of the prefetched content units can be served for display on a display screen of the client device during execution the application(s). Further, statuses of the prefetched content units can be monitored, and information that specifies a subset of the prefetched content units that are unlikely to be displayed on the display screen prior to corresponding deadlines for expiration can be transmitted.
US10311481B1 Methods, systems, and media for identifying automatically refreshed advertisements
Methods, systems, and media for identifying automatically refreshed advertisements are provided. In some embodiments, a method for modifying advertisement spending is provided, the method comprising: receiving advertisement delivery information associated with a plurality of advertisements displayed on a web page; generating a distribution of an amount of time that the plurality of advertisements were displayed on the web page using the advertisement delivery information; identifying a deviation in the generated distribution; determining whether the deviation correlates to an automatic refresh command performed by one or more browser applications; and providing an indication corresponding to the plurality of advertisements that were displayed on the web page in response to the automatic refresh command based on the determination.
US10311479B2 System for producing promotional media content and method thereof
A system for producing promotional media content includes a strategic meta information analysis processing unit configured to process various types of pieces of strategic meta information in various formats to an unstructured data batch having a certain weight value, a media content analysis processing unit configured to classify and analyze each meta information by similarity by using meta information of various types of media content or meta information actively extracted by analyzing each media content, an association analyzing unit configured to calculate association between strategic meta information processed through the strategic meta information analysis processing unit and the media content processed through the media content analysis processing unit, and a media content synthesizing unit configured to finally synthesize promotional media content by using the various types of strategic meta information, the media content, and the association information calculated by the association analyzing unit.
US10311477B2 Method for processing a mobile advertisement, proxy server, and terminal
A method for processing a mobile advertisement, a proxy server, and a terminal are provided. The method includes: receiving, by a proxy server, an advertisement request sent by a proxy software development kit (SDK) embedded into an application, where the advertisement request information carries an identifier of the application; obtaining identifiers of corresponding advertisement networks and traffic allocation of the advertisement networks according to the identifier of the application; selecting an identifier of an advertisement network according to the traffic allocation, and sending an advertisement information request to the corresponding advertisement network according to the selected identifier of the advertisement network; and receiving advertisement information returned by the corresponding advertisement network according to the advertisement information request, and sending the advertisement information to the proxy SDK, so that the proxy SDK displays the advertisement information in an advertisement position of the application.
US10311476B2 Recommending magazines to users of a digital magazine server
A digital magazine server identifies content items for recommendation to a user based on content items with which the user previously interacted. Based on key phrases and terms in content items with which the user previously interacted, topics are associated with the content items and used to generate a vector for each content item. The vectors are used to generate clusters including one or more content items. A characteristic vector is generated for each cluster based on the vectors generated for content items within a cluster. Candidate content items are retrieved and topics included in the candidate content items are used along with the characteristic vectors to determine a measure of similarity between candidate content items and various clusters. Candidate content items with at least a threshold measure of similarity to a cluster are selected for presentation to the user.
US10311471B2 Graph-based compression of data records
In general, embodiments of the present invention provide systems, methods and computer readable media for data record compression using graph-based techniques.
US10311467B2 Selecting digital advertising recommendation policies in light of risk and expected return
Systems and methods for selecting optimal policies that maximize expected return subject to given risk tolerance and confidence levels. In particular, methods and systems for selecting an optimal ad recommendation policy—based on user data, a set of ad recommendation policies, and risk thresholds—by sampling the user data and estimating gradients. The system or methods utilize the estimated gradients to select a good ad recommendation policy (an ad recommendation policy with high expected return) subject to the risk tolerance and confidence levels. To assist in selecting a risk-sensitive ad recommendation policy, a gradient-based algorithm is disclosed to find a near-optimal policy for conditional-value-at-risk (CVaR) risk-sensitive optimization.
US10311463B2 Method and apparatus for encouraging consumption of a product
A method and apparatus for engaging consumers in the performance of predetermined action. The method comprises the steps determining performance of a predetermined action, providing feedback related to the determined performance of the predetermined action, and broadcasting confirmation of performance of the predetermined action along with at least a portion of the provided feedback. An incentive be provided based upon performance of the predetermined action, or upon broadcasting. The predetermined action may include eating a candy or other edible item. The feedback may include material related to an advertising campaign, or otherwise related to the candy or edible item.
US10311462B2 Music streaming for athletic activities
Example embodiments relate to systems, methods, apparatuses, and computer readable media relating to a user interface, that may for example, initiate transmission of a stream of audio data comprising a plurality of audio tracks from a music streaming service, and receive athletic activity data relating to a performance of an athletic activity by a user during an activity time period that includes a plurality of time intervals. For each of the plurality of time intervals, an athletic activity level is determined from the athletic activity data, a target audio track intensity corresponding to the athletic activity level is determined, and a playback of a streamed audio track corresponding to the target audio track intensity is initiated.
US10311461B2 System and method to visually present assets and access platforms for the assets
A method includes generating a display that includes an option to prohibit delivery of tangible items and, for each of a plurality of assets, information identifying the asset and an icon corresponding to an access platform associated with the asset. A first icon of a first asset is included in the display in response to determining that a first access platform associated with the first asset includes a delivery option. The first asset includes a tangible asset. The delivery option is associated with delivery of the tangible asset. The method also includes sending the display to a display device. The method further includes, in response to a selection of the option to prohibit delivery of tangible items, removing the association between the first access platform and the first asset and updating the display to reflect the removal.
US10311457B2 Computerized method and system for automating rewards to customers
A computerized reward mechanism system is proposed which makes use both of presently collected data relating to the customer, and a database of historical data relating to the customer. Using this information, the system performs a customer preference analysis, which results in selecting rewards which are adapted to the customers' personal needs. In one form, the system is positioned at a shopping center, and includes cameras for recognising past customers by image processing. This may be done without requiring customers to participate in a process of signing up to use the system. The presently collected data include responses to questions put to the customer relating to his present shopping experience. Customer honesty is considered in the step of determining which rewards to offer the consumer, to encourage the consumers to express their feelings more clearly.
US10311456B2 Dispensation delay prediction systems and methods
Provided herein are systems and methods relating to prediction in a context of first and second client devices related to a provider facility (a drive-through that sells comestible goods, e.g.) wherein the first client device is aboard a first vehicle and predictive data relating to the first client device is improved by retaining data relating to the second client device (having visited the provider facility on a prior same-type day, e.g.).
US10311449B2 Systems and methods for targeted advertising
Systems and methods for targeted advertising are described. The systems and methods identify a series of events that may be related to a transaction for goods and services. The systems and methods may select at least one future event from the series of events. The systems and methods may generate an account with information about goods and services, and parties to the transaction. The systems and methods may use the information contained in the account about the goods and services and at least one future event as a selection criteria and trigger for sending targeted advertisements to a customer.
US10311447B2 Storage medium for storing program capable of ensuring that evaluation of content is made after watching thereof, information processing device, and information processing system
When distribution of a content from a distribution server is started, a CPU carries out streaming-play of the received content. When reproduction of the content ends, the CPU determines whether a vote history brought in correspondence with a corresponding motion picture ID is stored in a flash memory or not. When the vote history brought in correspondence with the corresponding motion picture ID is not stored in the flash memory, the CPU causes a monitor to display a user evaluation input screen so as to accept evaluation of the content. A process does not proceed to next processing until evaluation is input.
US10311441B2 Device including image with multiple layers
A mobile device is disclosed. The mobile device includes an image including a transactional image layer and a master image layer. The mobile device can be used to conduct transactions.
US10311440B2 Context-aware deterrent and response system for financial transaction device security
The disclosure provides systems and methods for increasing the security of financial transaction devices and other places of value. Increased security is provided by analysis of a plurality of sensor and other inputs, and formulation of context-sensitive response plan involving the most probably effective response agents.
US10311439B2 Systems and methods for facilitating offline payments
Systems and methods are provided for secure offline transactions using a mobile device. The mobile device may include an encrypted data store in which encrypted payment processing data is stored, a risk assessment engine configured to retrieve the encrypted payment processing data and determine, based on the encrypted payment processing data, whether an offline payment is authorized, and a transaction pool configured to store the offline payment after the offline payment has been provided to a recipient. The mobile device may provide the offline payment that has been performed to a payment provider server for completion and/or funding when the mobile device obtains a network connection to the payment provider server following the offline payment.
US10311437B2 Voice phone-based method and system to authenticate users
Provided is a method and a telephone-based system with voice-verification capabilities that enable a user to safely and securely conduct transactions with his or her online financial transaction program account over the phone in a convenient and user-friendly fashion, without having to depend on an internet connection.
US10311432B1 Intelligent authentication
Systems, methods, and other embodiments associated with intelligent authentication. According to one embodiment, a system includes a transaction logic configured to receive transaction metadata associated with an attempted transaction. The transaction logic is also configured to identify a user attempting the attempted transaction. The system further includes an activity logic configured to access an activity log associated with the user. The activity log includes values corresponding to previous transactions made by the user and any additional information provided by 3rd party feeds. The activity logic is also configured to compare transaction metadata to the values. The system also includes an authentication logic configured to select an authentication level for the transaction based, at least in part, on the comparison.
US10311431B2 Method and apparatus for staging send transactions
A method for performing transactions comprises receiving registration information and transaction specifications, generating a distribution profile based on the registration information, and storing the transaction specifications in the distribution profile. The distribution profile is identified based on an initiation instruction and associated user authentication data, and one of the transaction specifications in the distribution profile is identified based on the initiation instruction. Payment source status is verified and a send transaction is initiated, based on the payment source status.
US10311429B2 Computing system implementing a network transaction service
A computer system can implement a network transaction service by receiving, over the one or more wireless networks, request data from mobile computing devices of requesting users of the network transaction service. The request data can identify the requesting user and include a transaction request to utilize the network transaction service at a merchant location of a registered merchant. In response to receiving the request data, the system can determine a merchant account of the registered merchant linked to the network transaction service, and identify a customer account of the requesting user. The computer system may then initiate fund transfers between a shared fund account of the network transaction service, the merchant account, and the customer account to fulfill the transaction request.
US10311427B2 Method and system for monitoring secure application execution events during contactless RFID/NFC communication
A system (211) and method (300) for reliable monitoring of secure application execution events is provided. The system can include a Near Field Communication (NFC) modem (140) for communicating transaction events of a secure contactless transaction (358) with a NFC reader (170), a secure controller (200) for monitoring state transitions caused by the transaction events, and a mobile host communicatively coupled to the secure controller for receiving hardware event notifications of the state transitions. The secure controller can generate message using a hardware interrupt to a mobile host based on secure applet state transition monitoring by setting up the events flag such as a Transaction Completion Flag (TCF) (372) into an Events Status Register (232) to identify a status of a secure contactless transactions.
US10311426B2 Integrated communications network for transactions
An integrated communications network may be integrated with existing payment systems to provide for more efficient and secure payment related communications. The integrated communications network may use mobile network protocol encapsulation to provide more efficient, faster, and more robust payment related communications to a payment processor across a mobile network. The integrated communications network may implement a location-aware network communications system that may allow a payment processor to obtain additional information about a consumer using a location-aware header of a network communication.
US10311418B2 Check-out system, including merchandise registration apparatus and payment apparatus, and electronic receipt management server
A check-out system includes a registration apparatus and a plurality of payment apparatuses. The registration apparatus receives input of merchandise information and receives input of a user code in connection. The registration apparatus generates payment identification based on the input merchandise information. The registration apparatus transmits the payment information. If the user code is input in the registration apparatus, the payment information is transmitted in correspondence with the user code. One of the payment apparatuses receives input of the user code. In response to the user code being input, the payment apparatus transmits a request for the payment information that was transmitted in correspondence with the user code. The payment apparatus receives the payment information that was transmitted in correspondence with the user code. The payment apparatus processes payment with respect to the received payment information.
US10311412B1 Method and system for providing bundled electronic payment and remittance advice
According to one embodiment, the present invention relates to a method and a system for transmitting bundled electronic payment and remittance advice for facilitating settlement of claim payments between payers (e.g., insurance companies) and providers (e.g., doctors, hospitals) or suppliers. According to an embodiment of the present invention, the method comprises the steps of receiving an electronic transmission from the payer wherein the electronic transmission comprises payment information and remittance advice; separating the payment information and the remittance advice; routing the payment information to a depository associated with the provider for making a payment authorized by the payer; transmitting the remittance advice to an intended recipient; and confirming the payment and transmission of remittance advice to the payer and the provider.
US10311411B2 System, method and computer program arranged to facilitate a transaction
A computing device for facilitating transactions between one or more remote devices, the device comprising a processing module arranged to interact with the one or more remote devices via a communications network and a database arranged to contain information regarding the state of one or more transaction channels in relation to an account, wherein the module is arranged to receive instructions via the communications network from the one or more remote devices and provide information regarding the state of the one or more transaction channels is disclosed.
US10311410B2 Money transfer system and messaging system
A system for transferring funds from a sender to a recipient with a recorded message is disclosed. In one step the method includes receiving a request for a fund transfer from the sender. The sender may make the request for a fund transfer at a transaction processing device. In another step a payment is received from the sender for the fund transfer and a payment confirmation is transmitted to the host computer system. An identifier may then be assigned to the fund transfer. A recorded message from the sender may be received and at least a copy of the recorded message may be transmitted to a host computer system. The recorded message may then be associated with the fund transfer. A request, including the identifier, may be received from the recipient to receive the recorded messaged. In another step the recorded message may be sent to the recipient.
US10311409B1 Detection and interpretation of visual indicators
Devices, systems and methods are disclosed that detect and interpret the meaning of visual and/or audio indicators of devices, and provide information, solutions to potential malfunctions, and/or automatic ordering of consumable products to users. For example, sequences of visual indicators (such as LEDs) and/or audio indicators (such as speakers that output beeps) generated by home electronics and other devices may be monitored using an image capture component (such as a camera) or audio capture component (such as a microphone), and the sequences may be interpreted to provide users with information of what is wrong with a device, how to fix a device, purchase a new device, offer repair services, etc. The systems and methods may also provide users with notifications relating to such indicators when the user is away from home.
US10311408B2 Electronic mail wrong transmission determination apparatus, electronic mail transmission system, and recording medium
An electronic mail wrong transmission determination apparatus includes: a feature information creation unit which creates feature information related to contents of an electronic mail that is a transmission object; an accumulation unit which accumulates feature information related to contents of a transmitted electronic mail and a destination of the transmitted electronic mail in association with each other; a destination candidate selection unit which selects destination candidates that are similar in appearance to a destination of the electronic mail that is the transmission object, from destinations of transmitted electronic mails; a similarity model creation unit which creates a similarity model for each destination accumulated in the accumulation unit based on the feature information accumulated in the accumulation unit in association with the destination and based on the feature information accumulated in the accumulation unit in association with other destinations that differ from the destination; wherein the similarity model serves as a criterion of determination as to whether or not feature information related to contents of an arbitrary electronic mail belongs to a certain feature information region in the word space, which is defined according to the contents of the electronic mails transmitted to the destination so far; and a reliability calculation unit which calculates respective reliabilities of a destination and destination candidates of the electronic mail that is the transmission object, based on feature information related to contents of the electronic mail that is the transmission object, based on the similarity model related to the destination of the electronic mail that is the transmission object, and based on the similarity models related to the destination candidates.
US10311407B1 Symbol-based communication routing
A method includes receiving an indication that a communication is to be sent from the first party to a second party, and, for the communication from the first party to the second party, generating a code that encodes an indication of a communication routing between the first party and the second party. The computer-implemented method further includes embedding the code into the communication such that the code is sent with the communication from the first party to the second party, receiving a response to the communication, wherein the response to the communication includes the embedded code, and decoding the embedded code to determine the communication routing between the first party and the second party. Still further, the computer-implemented method includes causing the response to the communication to be routed to the first party based on the determined communication routing.
US10311406B2 System and method having increased security using simple mail transfer protocol emails verified by SPF and DKIM processes
A system and method to facilitate transactions between a customer and a vendor utilizing an advertising campaign reaching a plurality of potential customers is provided. The method includes receiving a request from the vendor for a bulk token for use in the advertising campaign, generating the bulk token, transmitting the bulk token to the vendor to embed into the advertising campaign associated with a mailto link, the bulk token being sent as part of the advertising campaign to at least one of the plurality of potential customer, receiving a reply SMTP email from a customer from the plurality of potential customers indicating a request for a transaction responsive to the advertising campaign by selecting the mailto link, decoding the bulk token to verify the transaction, performing an SPF and DKIM validation of the received SMTP email to validate the transaction, and processing the verified and validated transaction.
US10311404B1 Software product development defect and issue prediction and diagnosis
According to an example, with respect to software product development defect and issue prediction and diagnosis, worker profile information and worker state information for a plurality of workers involved in development of a product may be ascertained. A general worker signature that includes a plurality of clusters for all of the plurality of workers may be generated. For each of the plurality of workers, an individual worker signature vector that represents at least one cluster of the plurality of clusters that an individual worker is aligned to may be generated. A product signature vector may be generated based on product state information. Further, an output that includes an explanation for a defect associated with the development of the product may be generated based on a neural network model based analysis of the individual worker signature vectors and the product signature vector over a temporal dimension.
US10311401B2 System for custom configuring personal protection equipment
Embodiments relate generally to a system having one or more computerized kiosks (102, 150, 160, 180, 192) operable to associate a personal protection device (104) to a worker's personal information. In some embodiments, the kiosk (102, 150, 160, 180, 192) can use the worker's personal information to custom configure the personal protection device (104), so that the device (104) will better suit the needs of the specific worker.
US10311399B2 Apparatus and method for maintaining multi-referenced stored data
A system collects and manages sets of asset data that are indicative of operational performance of physical assets disposed at multiple physical locations in a plant. The system includes a database that associates each set of asset data to (1) a location at which the data was collected, (2) the asset for which the data was collected, and (3) the monitoring device that was used to collect the data. In this way, each location has its own history of all asset data ever collected on all assets disposed at that location, and its own history of all monitoring devices used to collect data at that location. Also, each asset has its own history of all asset data collected on that asset at all locations at which it was disposed and for all monitoring devices. This sort of asset data is referred to herein as multi-referenced data.
US10311397B1 Automatic discovery of endpoint devices
This disclosure describes techniques for automatically identifying endpoint devices based on differing power loads drawn by the endpoint devices. In some instances, the endpoint devices are distributed about one or more facilities, such as item handling facilities, and may comprise an array of sensors for tracking inventory items within, into, and out of these facilities. These sensors may include cameras, weight sensors, RFID readers, microphones, and the like. Further, multiple ones of these sensors may couple to a power injector (e.g., a power-over-Ethernet (POE) injector) that provides both data and power to each sensor over a cable. The power injector may in turn couple to a network switch and/or a controller, which may identify the endpoint devices based on their modulated power loads.
US10311395B2 Inventory data management system
An inventory data management system manages information related to items, such as implants, used during a medical procedure. The inventory data management system includes multiple sensing devices for reading set identification information from a container in which the set of items is disposed. The sensing devices are connected to a communication network and are placed in multiple locations, where each location is associated with a particular status of the set of items. The system also includes an inventory management computer that executes an inventory management application for receiving the set identification information from the communication network, and associating the set identification information with set status information based on the location of the sensing device that read the set identification information. An item inventory database stores the set identification information in association with the set status information.
US10311389B2 Management computer, management method, and computer-readable non-transitory storage medium
A management computer for managing a management target system comprises an operation situation evaluating part, an operation situation displaying part, an amelioration plan generating part, and an amelioration plan displaying part. The amelioration plan generating part identifies, as an amelioration plan, a business system configuration that ameliorates the operation situation of the business system that is in operation, based on operation situation value calculated by the operation situation evaluating part. The amelioration plan displaying part displays an operation situation that is expected in a case where a business system configuration identified by the amelioration plan generating part is applied, in association with the operation situation of the business system that is in operation.
US10311384B2 Automatic creation and maintenance of a taskline
Methods and systems are provided for automatically generating a dynamic taskline. Initially, sources are accessed to retrieve contextual information associated with a user. From this contextual information, a user task is detected that comprises subtasks. Subtasks are identified, where the subtasks are associated with the user task. The subtasks are ranked based, in part, on the contextual information associated with the user. A taskline is automatically generated based on the ranking of the subtasks. The taskline is dynamically modified based on a particular point in time or updated contextual information associated with the user, to constantly provide the user with relevant and useful information.
US10311381B2 Tool and method for conductive trace generation in a 3D model for a hybrid electro-mechanical 3D printer
Methods, systems, and apparatus, including medium-encoded computer program products, for combining electronic circuitry with mechanical structures using a design tool to build hybrid electro-mechanical three-dimensional circuits for 3D printed devices. In some implementations, the design tool facilitates creation and placement of components and traces, and print preparation for additive manufacturing systems.
US10311380B2 Systems for culture cartography
A system provides quantification and mapping of cultural characteristics. An analytic engine collects and organizes cultural attribute information by binary score and by cultural tendency. A cultural score engine coupled to the analytic engine receives cultural attribute information by category and scores the cultural attribute data for each cultural attribute to create scored data. A map engine receives the scored data and maps the cultural attribute data to a graphic output. An assessment engine quantifies areas, organization priorities, or cultural tendencies associated with each graphic output. A comparison engine compares a plurality of graphic outputs in a single comparison graphic output of cultural tendencies.
US10311379B1 Isolation of frequency multiplexed microwave signals using cascading multi-path interferometric josephson isolators with nonoverlapping bandwidths
A cascading microwave isolator (cascade) includes a set of Josephson devices, each Josephson device in the set having a corresponding operating bandwidth of microwave frequencies. Different operating bandwidths have different corresponding center frequencies. A series coupling is formed between first Josephson device from the set and an nth Josephson device from the set. The series coupling causes the first Josephson device to isolate a signal at a first frequency from a frequency multiplexed microwave signal (multiplexed signal) in a first signal flow direction through the series coupling and the nth Josephson device to isolate a signal at an nth frequency from the multiplexed signal in the first signal flow direction through the series.
US10311377B2 Categorization of user interactions into predefined hierarchical categories
User interactions are categorized into predefined hierarchical categories by classifying user interactions, such as queries, during a user interaction session by labeling text data into predefined hierarchical categories, and building a scoring model. The scoring model is then executed on untagged user interaction data to classify the user interactions into either action-based or information-based interactions.
US10311376B2 System and method for creating biologically based enterprise data genome to predict and recommend enterprise performance
Briefly described, embodiments of the present invention pertains to a key performance indicator (KPI)-driven digital genome system or framework as well as various systems and methods of use and interaction therewith. Unlike conventional stand-alone KPI applications or pure-play centralized KPI solutions, embodiments of the present invention provide an automated way to codify the organizational objectives, goals, behavior, and motivations by continuously measuring, correlating, and discovering hidden relationships among various metrics, attributes, causal relationships, and networks display genomic findings via business applications without a priori knowledge of machine learning or statistical techniques.
US10311367B2 User-powered recommendation system
Recommendation systems are widely used in Internet applications. In current recommendation systems, users only play a passive role and have limited control over the recommendation generation process. As a result, there is often considerable mismatch between the recommendations made by these systems and the actual user interests, which are fine-grained and constantly evolving. With a user-powered distributed recommendation architecture, individual users can flexibly define fine-grained communities of interest in a declarative fashion and obtain recommendations accurately tailored to their interests by aggregating opinions of users in such communities. By combining a progressive sampling technique with data perturbation methods, the recommendation system is both scalable and privacy-preserving.
US10311366B2 Procedurally generating sets of probabilistically distributed styling attributes for a digital design
The present disclosure is directed toward systems and methods for automatically generating combinations of styling values for application to a digital design. Each of the generated styling value combinations includes styling values selected from one or more probabilistically distributed sets of styling values. One or more embodiments described herein utilize a scoring system to ensure that, when applied to the digital design, the styling values included in the probabilistically distributed sets of styling values will make the digital design look professional and aesthetically pleasing.
US10311364B2 Predictive intelligence for service and support
Embodiments regard predictive intelligence for service and support. An embodiment of a method includes receiving at an interface for a database system data entered in one or more data fields regarding service of a first case for a first client, the data being received from the first client or from an agent entering data regarding the first case; automatically comparing by the database system the data for the first case with data for other cases stored in a data store of the database system; identifying by the database system one or more similar cases based on the comparison of data; automatically generating by a predictive intelligence algorithm applied by the database system one or more predictive actions for the first case based on the identified one or more similar cases; and transmitting data regarding the one or more predictive actions to the first client or agent.
US10311363B1 Reasoning on data model for disease monitoring, characterization and investigation
A method comprises processing metagenomics sequencing results from a plurality of metagenomics sequencing centers associated with respective data zones, configuring a data model based at least in part on the metagenomics sequencing results, performing one or more reasoning operations over the data model to infer relationships between entities of the data model that are not directly expressed by the data model, and updating the data model based at least in part on the inferred relationships. The method further comprises repeating the processing, configuring, performing and updating for additional metagenomics sequencing results from one or more of the metagenomics sequencing centers. One or more portions of the data model illustratively comprise respective profiles each characterizing at least one of a disease, infection or contamination based at least in part on the metagenomics sequencing results.
US10311362B1 Identification of trending content using social network activity and user interests
Network accessible content, including but not limited to web pages, can be analyzed to identify characteristics of the content. Historical content requests associated with users and/or other user-specific information can be analyzed to identify user interests. Content can then be provided or recommended to users based on content characteristics and user interests. The content that is provided or recommended may be trending content that has at least a threshold level of popularity, became popular recently, and/or is associated with a threshold level of social network activity.
US10311360B1 System and method for building and using robotic managers
In one embodiment, the present invention may be implemented as a software platform, data model and method to build robotic managers (RM). A robotic manager is, in one embodiment, a computer system that automates tasks performed by a human manager. A MAP RM has a skillset which may be divided into two categories: 1) basic skills such as visual recognition, voice command processing, data visualization, unstructured search, and 2) expert skills such as finance, risk management, cyber security, and information technology. Expert skills may be categorized by domain.
US10311359B2 Home wireless discovery
In one implementation, a method for detecting a configuration of wireless sensors within a vicinity includes a method of assessing wireless sensors in the vicinity of an application computing system. The application computing system is operated in a listen mode to receive and record wireless transmissions produced by one or more wireless sensors producing wireless transmissions in the vicinity of the application computing system. The recorded wireless transmissions are evaluated using a rule set that embodies normal operating characteristics of various types of wireless sensors in an operating environment to generate a conclusion regarding at least one attribute of at least one wireless sensor that produced the recorded wireless transmissions. The generated conclusion can be used so that the at least one wireless sensor is utilized in the application computing system.
US10311358B2 Systems and methods for multi-objective evolutionary algorithms with category discovery
Systems and methods are provided to engage in multi-tiered optimization where there may be a first multi-objective optimization and a second constraint optimization. The multi-objective optimization may be used to drive to one or more goals of the optimization problem. The constraint optimization or minimization may be used to drive towards a reduced and/or no constraint situation where the solution to the overall problem is feasible or near-feasible.
US10311354B2 Methods of operation of an RFID tag assembly for use in a timed event
An assembly and method of manufacture of a radio frequency identification (RFID) assembly having a passive RFID semiconductor chip and a two sided planar antenna and a spacer composed of an electrically non-conducting foam material that is configured for non-absorbing of a substantial amount of energy at the predetermined operating frequency, the spacer having a predetermined thickness and that is configured for non-absorbing of a substantial amount of radio frequency energy at the predetermined operating frequency wherein the RFID tag assembly is configured to receive at a first side of the two sided planar antenna a first portion of the radio frequency energy as direct energy and is configured to receive at a second side of the planar antenna a second portion of the radio frequency energy as indirect energy responsive to the absorbing by the absorbing material body.
US10311351B1 RFID integrated circuits with antenna contacts on multiple surfaces
Embodiments are directed to a Radio Frequency Identification (RFID) integrated circuit (IC) having a first circuit block electrically coupled to first and second antenna contacts. The first antenna contact is disposed on a first surface of the IC and the second antenna contact is disposed on a second surface of the IC different from the first surface. A substrate of the RFID IC, or a portion of the IC substrate, electrically couples the first circuit block to at least one of the first and second antenna contacts. The IC includes one or more interfaces or barrier regions that at least partially electrically isolate the first circuit block from the rest of the IC substrate.
US10311350B2 Transaction card having internal magnetic stripe
A transaction card is provided. The transaction card includes a card frame having a card inlay and a card housing. The transaction card also includes a magnetic stripe disposed inside the card frame between the card inlay and the card housing.
US10311343B2 Apparatus and method for surface and subsurface tactile sensation imaging
A tactile sensor, computer readable medium, methods of using and manufacturing the tactile sensor, and methods and apparatuses for processing the information generated by the tactile sensor. The tactile sensor includes a planar optical waveguide comprised of a flexible and transparent layer; a light configured to direct light into the optical waveguide; a light sensor or an imager facing the optical waveguide and configured to generate signals from light scattered out of the optical waveguide; and a controller which may be configured to generate an image of the object and characteristics of the object. The waveguide may be configured so that some of the light directed into the optical waveguide is scattered out of the waveguide if the waveguide is deformed by being pressed against the object. A finite element and a neural network are used to estimate mechanical characteristics of the objects.
US10311342B1 System and methods for efficiently implementing a convolutional neural network incorporating binarized filter and convolution operation for performing image classification
Systems, apparatuses, and methods for efficiently and accurately processing an image in order to detect and identify one or more objects contained in the image, and methods that may be implemented on mobile or other resource constrained devices. Embodiments of the invention introduce simple, efficient, and accurate approximations to the functions performed by a convolutional neural network (CNN); this is achieved by binarization (i.e., converting one form of data to binary values) of the weights and of the intermediate representations of data in a convolutional neural network. The inventive binarization methods include optimization processes that determine the best approximations of the convolution operations that are part of implementing a CNN using binary operations.
US10311341B1 System and method for online deep learning in an ultra-low power consumption state
Described is a system and method for ultra-low power consumption state deep online learning. The system operates by filtering an input image to generate one or more feature maps. The one or more feature maps are divided into non-overlapping small regions with feature values in each small region pooled to generate decreased size feature maps. The decreased size feature maps are divided into overlapping patches which are joined together to form a collection of cell maps having connections to the decreased sized feature maps. The collection of cell maps are then divided into non-overlapping small regions, with feature values in each small region pooled to generate a decreased sized collection of cell maps. The decreased sized collection of cell maps are then mapped to a single cell, which results in a class label being generated as related to the input image based on the single cell.
US10311338B1 Learning method, learning device for detecting lanes on the basis of CNN and testing method, testing device using the same
A learning method of a CNN capable of detecting one or more lanes is provided. The learning method includes steps of: a learning device (a) applying convolution operations to an image, to generate a feature map, and generating lane candidate information; (b) generating a first pixel data map including information on pixels in the image and their corresponding pieces of first data, wherein main subsets from the first data include distance values from the pixels to their nearest first lane candidates by Using a direct regression, and generating a second pixel data map including information on the pixels and their corresponding pieces of second data, wherein main subsets from the second data include distance values from the pixels to their nearest second lane candidates by using the direct regression; and (c) detecting the lanes by inference to the first pixel data map and the second pixel data map.
US10311337B1 Method and device for providing integrated feature map using ensemble of multiple outputs from convolutional neural network
A method for providing an integrated feature map by using an ensemble of a plurality of outputs from a convolutional neural network (CNN) is provided. The method includes steps of: a CNN device (a) receiving an input image and applying a plurality of modification functions to the input image to thereby generate a plurality of modified input images; (b) applying convolution operations to each of the modified input images to thereby obtain each of modified feature maps corresponding to each of the modified input images; (c) applying each of reverse transform functions, corresponding to each of the modification functions, to each of the corresponding modified feature maps, to thereby generate each of reverse transform feature maps corresponding to each of the modified feature maps; and (d) integrating at least part of the reverse transform feature maps to thereby obtain an integrated feature map.
US10311333B2 Terminal device, information processing device, object identifying method, program, and object identifying system
A device, apparatus, and method provide logic for processing information. In one implementation, a device may include an image acquisition unit configured to acquire an image, and a transmission unit configured to transmit information associated with the image to an information processing apparatus, such as a server. The server may be associated with a first feature quantity dictionary. The device also may include a receiving unit configured to receive a second feature quantity dictionary from the server in response to the transmission. The second feature quantity dictionary may include less information than the first feature quantity dictionary, and the server may generate the second feature quantity dictionary based on the image information and the first feature quantity dictionary. The device may include an identification unit configured to identify an object within the image using the second feature quantity dictionary.
US10311325B2 Image processing method and image processing apparatus
An image processing apparatus performs an image recognition process, such as pattern matching or contour detection, on image data supplied from an image pickup device, and stores history data of the image recognition process in an external storage apparatus. In this case, an extraction image is extracted from an extraction region determined in accordance with the image recognition process performed on the input image data and is stored in the external storage device as history data. Furthermore, the history data logged in the external storage device may include a compressed image that is obtained by compressing, using lossy compression, the entire image data subjected to the image processing performed by the image processing apparatus.
US10311324B1 Learning method, learning device for detecting objectness by detecting bottom lines and top lines of nearest obstacles and testing method, testing device using the same
A method for learning parameters of CNNs capable of identifying objectnesses by detecting bottom lines and top lines of nearest obstacles in an input image is provided. The method includes steps of: a learning device, (a) instructing a first CNN to generate first encoded feature maps and first decoded feature maps, and instructing a second CNN to generate second encoded feature maps and second decoded feature maps; (b) generating first and second obstacle segmentation results respectively representing where the bottom lines and the top lines are estimated as being located per each column, by referring to the first and the second decoded feature maps respectively; (c) estimating the objectnesses by referring to the first and the second obstacle segmentation results; (d) generating losses by referring to the objectnesses and their corresponding GTs; and (f) backpropagating the losses, to thereby learn the parameters of the CNNs.
US10311322B2 Character information recognition method based on image processing
The present invention relates to a character information recognition method based on image processing. The method comprises: collecting images to obtain a target character image; then sequentially comparing the target character image with character template images in a character template library to find a maximum of a coincidence area of the character in the target character image with the character templates in the character template images; and when the coincidence area meets a preset condition, determining the target character to be recognized as the character in the corresponding character template image. The character templates are designed to include not only a coincidence-permitted region but also a coincidence-restricted region. The coincidence-restricted region is set, so that the direct comparing and matching of the character templates can be more accurately carried out, thereby improving the recognition speed.
US10311321B1 Learning method, learning device using regression loss and testing method, testing device using the same
A method for learning parameters of a CNN based on regression losses is provided. The method includes steps of: a learning device instructing a first to an n-th convolutional layers to generate a first to an n-th encoded feature maps; instructing an n-th to a first deconvolutional layers to generate an n-th to a first decoded feature maps from the n-th encoded feature map; generating an obstacle segmentation result by referring to a feature of the decoded feature maps; generating the regression losses by referring to differences of distances between each location of the specific rows, where bottom lines of nearest obstacles are estimated as being located per each of columns of a specific decoded feature map, and each location of exact rows, where the bottom lines are truly located per each of the columns on a GT; and backpropagating the regression losses, to thereby learn the parameters.
US10311318B2 Reference line setting device, reference line setting method and reference line setting program
A reference line setting device includes an image acquisition means to acquire an image containing a character region, a recognition means to recognize characters from the character region of the image by a specified recognition method, a line position information acquisition means to acquire line position information of a plurality of characters out of the characters recognized by the recognition means with reference to a storage means storing, for each character, line position information concerning a position which at least two reference lines pass through in a vertical direction of characters, the reference lines being lines drawn in an alignment direction of characters, along which a certain part of each character is to be placed, and a setting means to set each of the reference lines to the image based on a plurality of line position information for each reference line acquired by the line position information acquisition means.
US10311317B2 Teacher data generation method
Provided is a method for generating teacher data for image recognition while reducing the number of images used as the basis. A captured image is obtained by imaging an object by an imaging device C arranged at a first designated position Pi. A basic image region Si is extracted from the captured image. The teacher data is generated as a result of coordinate transformation of the basic image region Si from one image coordinate system to a coordinate system of a captured image by the imaging device C on the assumption that the imaging device C is arranged at a second designated position Pj which is different from the first designated position Pi.
US10311313B2 In-vehicle passive entry lighting control system
An in-vehicle equipment control system includes a mobile terminal configured to receive a request signal and transmit a response signal; and in-vehicle equipment having: an imaging part that images surroundings of the vehicle; an illumination part that radiates light; a transmission/reception part that periodically transmits a request signal to the surroundings of the vehicle and receive a response signal from the mobile terminal; an imaging controller that causes the imaging part to image an outside of the vehicle when the response signal is received by the transmission/reception part; an object recognition part that recognizes a presence of a hazardous object on the basis of the captured image; and an illumination controller that controls the illumination part to perform illumination in different ways when the hazardous object is recognized by the object recognition part and when the hazardous object is not recognized.
US10311310B2 Method and apparatus for providing increased obstacle visibility
A surround view system includes at least at least one camera pair formed by two cameras with overlapping fields of view adapted to generate camera images with an overlapping area. The system also includes and a processing unit configured to compute surround view images including overlapping areas with respect to each camera and to extract features from the computed surround view images resulting in binary images for each overlapping area. Priority in visualization is given to the camera image of the overlapping area generated by the camera of the respective camera pair where a calculated sum of binary values within the resulting binary image is highest.
US10311307B2 Methods and apparatus for video wall with feed indicators
Methods and apparatus for processing video feed metadata for respective video feeds and controlling an indicator for at least one the video feeds on a video wall. The video stream indicator can allow a viewer of the video wall to reduce the likelihood of missing an event of interest in the video feeds.
US10311306B2 Methods and systems enabling access by portable wireless handheld devices to data associated with programming rendering on flat panel displays
Flat panel displays can broadcast their identity for discovery by handheld devices interested in obtaining data associated with video programming displayed on the displays. An application can be downloaded and activated on smartphones that will enable them to capture an image of the video programming and recognize is with the help of a remote server, or wirelessly obtain a list of available (discovered) flat panel displays (multiple screens, depending on venue) that allow wireless access to data associated with video programming displayed (or previously displayed and stored in a queue) on flat panels. Video programming rendering on a flat panel of interest can be identified via the smartphone and the smartphone can access additional data either directly from the flat panel or from a remote server once the data has been identified and/or engage in an interactive session in association with the displayed programming or data.
US10311304B2 Mobile device accident avoidance system
A system, method and program product for providing accident avoidance for a mobile device having a camera integrated therein. A system is disclosed that includes: a camera orientation device that is mountable on a mobile device and includes a mechanism to reorient a line of sight of the camera in response to detected position information of the mobile device; and an image feed manager adapted to run on the mobile device, wherein the image feed manager includes: an orientation system that detects position information of the mobile device and communicates the position information to the camera orientation device; an image analysis system that analyzes an image feed from the camera to identify hazards; an overlay system that displays the image feed onto a display area of the mobile device; and a warning system that issues an alert in response to an identified hazard.
US10311301B2 Image monitoring system and image monitoring program
An image monitoring system includes: recording means for recording an image captured by a camera via a network; control means for controlling the system so as to display the present image captured by the camera or a past image recorded on the recording means on display means; and moving-object detecting means for detecting a moving object from the image captured by the camera; wherein the moving-object detecting means includes resolution conversion means for generating an image with a resolution lower than the resolution of the image captured by the camera, positional-information output means for detecting a moving object from the image generated by the resolution conversion means and outputting positional information on the detected moving object, and information merging means for merging the positional information of the moving object with the image captured by the camera on the basis of the positional information of the moving object output by the positional-information output means.
US10311300B2 Iris recognition systems and methods of using a statistical model of an iris for authentication
The present disclosure describes systems and methods of using iris data for authentication. A biometric encoder may translate an image of the iris into a rectangular representation of the iris. The rectangular representation may include a plurality of rows corresponding to a plurality of annular portions of the iris. The biometric encoder may extract an intensity profile from at least one of the plurality of rows, the intensity profile modeled as a stochastic process. The biometric encoder may obtain a stationary stochastic component of the intensity profile by removing a non-stationary stochastic component from the intensity profile. The biometric encoder may remove at least a noise component from the stationary component using auto-regressive based modeling, to produce at least a non-linear background signal, and may combine the non-stationary component and the at least the non-linear background signal, to produce a biometric template for authenticating the person.
US10311298B2 Biometric camera
Exemplary embodiments for a biometric camera system for a mobile device, comprise: a near infrared (NIR) light source on the mobile device that flashes a user of the mobile device with near infrared light during image capture; a biometric camera located on the mobile device offset from the NIR light source, the biometric camera comprising: an extended depth of field (EDOF) imaging lens; a bandpass filter located adjacent to the EDOF imaging lens to reject ambient light during image capture; and an imaging sensor located adjacent the bandpass filter that converts an optical image of an object into an electronic signal for image processing; and a processor configured to receive video images of an iris of a user from the image sensor, and attempt to match the video images of the iris with previously registered images stored in an iris database, wherein if a match is found, the user is authenticated.
US10311296B2 Method of providing handwriting style correction function and electronic device adapted thereto
A method of providing a handwriting style correction function and an electronic device adapted to the method are provided. The electronic device includes: a touch screen; a processor electrically connected to the touch screen; and a memory electrically connected to the processor. The memory stores instructions which, when executed by the processor, cause the processor to perform operations comprising: displaying at least one reference character on the touch screen; receiving a touch gesture via the touch screen; displaying a track of the received touch gesture on the touch screen; recognizing the track of the touch gesture as at least one input character corresponding to at least one reference character; identifying at least one reference character and at least one input character, as at least one stroke, based on a preset standard; comparing corresponding strokes of at least one reference character with at least one input character, and determining errors by strokes; and summing the errors by strokes of each of at least one reference character, and determining errors by characters.
US10311293B2 Photonic fence
A system for tracking airborne organisms includes an imager, a backlight source (such as a retroreflective surface) in view of the imager, and a processor configured to analyze one or more images captured by the processor to identify a biological property of an organism.
US10311287B2 Face recognition system and method
A face recognition system for recognizing face in two stages includes a processor and a camera. The camera captures a face image. The processor includes a image locating unit, an image recognition unit, a first feature extraction unit, a second feature extraction unit, and a comparison unit. The image locating unit locates a face in the face image. Facial landmarks are recognized by the image recognition unit and the first feature extraction unit extracts a deep-learning based facial feature. The second feature extraction unit extracts a hand-crafted facial feature. The comparison unit compares the deep-learning based facial feature and the hand-crafted facial feature with a predetermined facial samples library to output a result of facial comparison. A face recognition method is also provided.
US10311282B2 Depth from time of flight camera
Region of interest detection in raw time of flight images is described. For example, a computing device receives at least one raw image captured for a single frame by a time of flight camera. The raw image depicts one or more objects in an environment of the time of flight camera (such as human hands, bodies or any other objects). The raw image is input to a trained region detector and in response one or more regions of interest in the raw image are received. A received region of interest comprises image elements of the raw image which are predicted to depict at least part of one of the objects. A depth computation logic computes depth from the one or more regions of interest of the raw image.
US10311281B2 Quantitative structural assay of a nerve graft
Techniques are described for determining the quality of a nerve graft by assessing quantitative structural characteristics of the nerve graft. Aspects of the techniques include obtaining an image identifying laminin-containing tissue in the nerve graft; creating a transformed image using a transformation function of an image processing application on the image; using an analysis function of the image processing application, analyzing the transformed image to identify one or more structures in accordance with one or more recognition criteria; and determining one or more structural characteristics of the nerve graft derived from a measurement of the one or more structures.
US10311276B2 Under display optical fingerprint sensor arrangement for mitigating moiré effects
A system and method for an electronic device for imaging a biometric object having structural features of interest is disclosed. The electronic device includes a display including rows of pixel elements, the rows of pixel elements being parallel a first primary direction along a first axis and an optical sensor mounted underneath the display, the optical sensor being parallel to a second primary direction along a second axis. The second axis is rotated at an angle relative the first axis to adjust a moiré pattern outside of a frequency range of the features of interest.
US10311274B2 Reader for optical indicia presented under two or more imaging conditions within a single frame time
The present invention embraces an optical indicia reader, e.g., barcode scanner, that captures images of optical indicia under multiple imaging conditions within the span of a single frame. The reader includes an image sensor having selectively-addressable pixels that can be divided into groups having regions of interest (ROIs) within the reader field of view. Each pixel group is shuttered separately to obtain independent partial frame images under separate imaging conditions.
US10311272B2 Method and system for tracking the delivery of an object to a specific location
System and method for collecting object identification data from a plurality of objects that interact with a vehicle during operation of the vehicle, where the vehicle interacts with specific objects at specific geographical positions. An identification sensor is attached to a particular object that is to be delivered to specific location. A record for the object is generated, the record including the identification of the object, the position of the vehicle when the interaction between the object and the vehicle occurs, and the time of the interaction. The record also includes a specific target location for delivery of the object. Exemplary interactions include loading/unloading an object from the vehicle. The record may also include additional data about a parameter of the object (such as the object's weight, volume, or temperature). An alert is sent to a driver of the vehicle when he approaches a location that is adjacent to the delivery location of the vehicle.
US10311269B2 Method and system for improving the reading efficiency of RFID tags
A method and structure improves a reading efficiency for RFID tags located in a reading zone of a RFID reading apparatus. A structure is interposed between the RFID tag(s) and the RFID reading apparatus. The structure is essentially electrically non-conductive and comprises a network of RFID antennas. The network of RFID antennas network is positioned on the structure in a pattern whose periodicity in two dimensions is less than half an operating RFID wavelength, so as to create a three dimensional interferometric pattern with peaks of electromagnetic field intensities. The RFID reading apparatus or the at least one RFID tag is set in motion, relatively to one another. The at least one RFID tag is read by the RFID reading apparatus during the relative motion within the reading zone so that the three dimensional interferometric pattern shifts and thereby improves the reading efficiency.
US10311267B2 Beacon tracking throughout an event area
Tracking beacons throughout an event area by a network of mobile computing devices distributed throughout the event area. In an embodiment, location and time data of the beacons is transformed into behavioral data representing the location of an associated event attendee through the event area during a period of time.
US10311266B2 Card reader
A card reader to read information in an integrated circuit (IC) card includes a housing, a first antenna, a control circuit, and a switch unit. The first antenna is disposed inside of the housing to communicate with the IC card. The control circuit communicates with the IC card within a communication range of the first antenna and performs at least a process that acquires data from a memory in the IC card. The switch unit includes a radio frequency (RF) tag having a second antenna and functions as a switch that performs a predetermined function by causing the RF tag to communicate with the control circuit via the second antenna and the first antenna when a predetermined condition is satisfied. The second antenna of the switch unit is in a side lobe of the first antenna.
US10311265B2 Universal mounting ring
A universal mounting ring has an arcuate or curved upper portion and a plurality of downwardly depending tabs. The universal mounting ring is configured to interface with an electrical enclosure, such as conventional electrical junction boxes to permit a radio frequency identification (RFID) reader to be secured within the enclosure and mate with a wide variety of enclosure cover assemblies manufactured by third parties. The downwardly depending mounting tabs are provided with multiple mounting positions such that the reader may be securely mounted at a plurality of positions relative to a cover assembly.
US10311264B1 Printed RFID tag antenna array with interfering subarrays
A radio frequency identification (RFID) technique is disclosed. The technique includes a printed RFID antenna array including at least three printed RFID antenna elements and an RFID reader device with at least one RFID reader antenna sized to transmit excitation energy to a number N>1 of printed RFID antenna elements of the printed RFID antenna array, where N is less than a total number of printed RFID antenna elements of the printed RFID antenna array. The RFID reader antenna is configured to receive a plurality of compound signals from respective subarrays consisting of N of the printed RFID antenna elements of the printed RFID antenna array. The RFID reader device also includes a demodulator, a decoder, and an output interface.
US10311261B2 Systems and methods to selectively connect antennas to receive and backscatter radio frequency signals
Systems and methods to selectively attach and control antennas via diodes. In one embodiment, a system includes: a reader having a plurality of reader antennas of different polarizations to transmit radio frequency signals; and at least one radio frequency device. The radio frequency device includes: a plurality of tag antennas of different polarizations; a plurality of diodes coupled to the plurality of tag antennas respectively; a receiver coupled to the plurality of diodes to receive the radio frequency signals from the tag antennas when the diodes are forward biased; and a set of one or more current controllers coupled to the plurality of diodes. In a receiving mode the controllers selectively forward bias the diodes to receive the signals from the reader. In a transmitting mode the controllers selectively change the state of the tag antennas to transmit data via backscattering the radio frequency signals.
US10311260B2 Display apparatus, image display system, and information providing server
The present disclosure facilitates the establishment of near field communication with a mobile terminal while also preventing malfunctions and an increase in burden of maintenance. A display apparatus (10) includes: at least one antenna (140) for carrying out near field communication with a mobile terminal (20), the at least one antenna being provided so as to positionally overlap with a display section (160). In a case where the mobile terminal comes into proximity to the display section, the display section is caused to display a guide for bringing the mobile terminal in proximity to at least one of the at least one antenna.
US10311258B2 Methods and systems for an electronic shelf label system
An electronic shelf label system comprising a plurality of electronic shelf labels is provided. A central computing system transmits data transmissions to the plurality of electronic shelf labels at a first power level. A candidate electronic shelf label from the plurality of electronic shelf labels periodically activate from a sleep mode to identify whether there is an existing master electronic shelf label from the plurality of electronic shelf labels. The candidate electronic shelf label becomes a new master electronic shelf label based on a set of specified conditions to transmit programming instructions received from the central computing system to one or more electronic shelf labels.
US10311257B2 Laboratory instrument
The invention relates to a laboratory device, in particular to a peristaltic pump, having an accessory part, in particular a pump head, that is removably arranged at the laboratory device; and having an apparatus for an automatic recognition of the accessory part from a plurality of accessory parts, in particular mutually different pump heads, removably arrangeable at the laboratory device, wherein the recognition apparatus has a coding at the accessory side and a detection unit for detecting the coding at the laboratory device side.
US10311254B2 Electronic apparatus and information access control method thereof
An electronic apparatus and an information access control method thereof are provided. The information access control method includes receiving a user input for a first application on a touch screen, and limiting execution of at least some of remaining applications except for the first application of the electronic apparatus when the user input is a preset first information access control mode input.
US10311253B2 Method for protecting an integrated circuit against unauthorized access
A method for protecting an integrated circuit against unauthorized access to key registers, wherein functions and/or applications of the integrated circuit are unlocked and/or activated via data stored in key registers, such as during the start-up of the integrated circuit and/or during ongoing operation, where if such a key register is accessed, the data word used to perform the access is compared with specified key data, and if access via a data word deviating from the specified key data is detected, the access is marked as unauthorized, the access marked as unauthorized is then recorded and evaluated, and after the analysis, appropriate protective measures are triggered to prevent further unauthorized access such that a key register method for protecting sensitive data is expanded in a simple manner and hacker attacks are quickly detected and thwarted.
US10311245B2 Cyber security system and method for transferring data between servers without a continuous connection
A cybersecurity system includes a controller that functions as a gateway between an end user device and an offline data storage device. When the end user device wants to access a file on the offline data storage device the controller severs a connection between a temporary storage memory and the end user device, establishes a connection with the offline data storage device, pulls the data from the offline data storage device to a temporary storage memory, then severs the connection with the offline data storage device, then establishes the connection with the end user device and communicates the data from the temporary storage memory to the end user device before overwriting the data in the temporary storage memory.
US10311243B2 Method and apparatus for secure communication
Secrecy scheme systems and associated methods using list source codes for enabling secure communications in communications networks are provided herein. Additionally, improved information-theoretic metrics for characterizing and optimizing said secrecy scheme systems and associated methods are provided herein. One method of secure communication comprises receiving a data file at a first location, encoding the data file using a list source code to generate an encoded file, encrypting a select portion of the data file using a key to generate an encrypted file, and transmitting the encoded file and the encrypted file to an end user at a destination location, wherein the encoded file cannot be decoded at the destination location until the encrypted file has been received and decrypted by the end user, wherein the end user possesses the key.
US10311240B1 Remote storage security
Aspects of the subject technology relate to systems and methods for remote storage security. An encryption key is generated based at least on data stored locally by a computing device. The encryption key is bound to a context of the computing device. Data is encrypted using the encryption key. The encrypted data and information associated with the binding of the encryption key are provided for transmission to another computing device.
US10311238B2 System and method for performing sensitive geo-spatial processing in non-sensitive operator environments
Methods and systems are disclosed including dividing a sensitive geographic region into three or more work regions; selecting geo-referenced aerial images for each particular work region such that at least a portion of the particular work region is depicted; transmitting, without information indicative of the geographic location depicted, a first of the images for a first of the work regions to an operator user device; receiving, from the device, at least one image coordinate selected within the first image by the operator, wherein the image coordinate is a relative coordinate based on a unique pixel location within the image raster content of the first image; and transmitting, without information indicative of the geographic location depicted, a second of the images for a second of the work regions to the operator user device, wherein the first and second work regions are not geographically contiguous.
US10311235B2 Systems and methods for malware evasion management
A method for emulating at least one resource in a host computer to a querying hosted code. The method comprises monitoring a plurality of operating system (OS) queries received from a plurality of code executed on a monitored computing unit, the plurality of OS queries are designated to an OS of the monitored computing unit, detecting among the plurality of OS queries at least one query for receiving at least one characteristic of at least one resource of the monitored computing unit among the plurality of OS queries, the at least one query is received from querying code of the plurality of code, preparing a response of the OS to the at least one query, the response comprising a false indication at least one false characteristic of the at least one resource, and sending the response to the querying code in response to the at least one query.
US10311232B2 Embedded systems monitoring systems and methods
Methods and systems for detection and prevention of exploitation of embedded devices. A sensing component is configured to detect a plurality of emanated analog signals and generate one or more synchronization events. The synchronization events are used to perform one or more attestation analyzes, including execution attestation, integrity attestation, and control-flow reconstruction, the results of which may be used to generate security events.
US10311230B2 Anomaly detection in distributed ledger systems
In various implementations, a method of identifying anomalies is performed by a first network node that is configured to maintain a distributed ledger in coordination with a plurality of network nodes. In various implementations, the first network node includes one or more processors, a non-transitory memory, and one or more network interfaces. In various implementations, the method includes determining a characteristic value based on information associated with the distributed ledger. In some implementations, the distributed ledger stores blocks of transactions that were added to the distributed ledger based on a consensus determination between the plurality of network nodes. In various implementations, the method includes determining whether a current transaction satisfies the characteristic value. In various implementations, the method include indicating whether there is an anomaly based on a function of the current transaction in relation to the characteristic value.
US10311228B2 Using a fine-grained address space layout randomization to mitigate potential security exploits
A data processing system can use a method of fine-grained address space layout randomization to mitigate the system's vulnerability to return oriented programming security exploits. The randomization can occur at the sub-segment level by randomizing clumps of virtual memory pages. The randomized virtual memory can be presented to processes executing on the system. The mapping between memory spaces can be obfuscated using several obfuscation techniques to prevent the reverse engineering of the shuffled virtual memory mapping.
US10311227B2 Obfuscation of an address space layout randomization mapping in a data processing system
A data processing system can use a method of fine-grained address space layout randomization to mitigate the system's vulnerability to return oriented programming security exploits. The randomization can occur at the sub-segment level by randomizing clumps of virtual memory pages. The randomized virtual memory can be presented to processes executing on the system. The mapping between memory spaces can be obfuscated using several obfuscation techniques to prevent the reverse engineering of the shuffled virtual memory mapping.
US10311221B2 System and method for controlling user access to an electronic device
A method and system for authenticating a user to access a computer system. The method comprises communicating security information to the computer system, and providing the computer system with an implicit input. The method further comprises determining whether the security information and implicit input match corresponding information associated with the user. The method further comprises granting the user access to the computer system in the event of a satisfactory match. When authenticating the user, the method and system consider the possibility of the user being legitimate but subject to duress or force by a computer hacker.
US10311210B2 Systems and methods for providing an inducement of a purchase in conjunction with a prescription
Systems and methods for providing targeted content to a patient who has received a prescription for medication. The systems and methods generally provide the content prior to the Point of Sale (POS) of the actual prescription to allow patients to review the content and possibly act on it prior to actually obtaining the medication. Depending on embodiment, the content may be provided by a pharmacy at or around the time of dispensing or by a physician at or around the time of prescribing.
US10311206B2 Electronic medical record summary and presentation
Methods, devices, and systems (for outputting a case summary) receive an electronic medical record (EMR) for the medical patient, extract medical data from the EMR, provide a list of medical problems relevant to the EMR, identifying relations between the medical problems and the medical data using a question-answering (QA) system, and output the clinical summary for the EMR. The clinical summary comprises the list of medical problems, the medical data, and the relations.
US10311202B2 Probabilistic load and damage modeling for fatigue life management
A fatigue life management system for determining a remaining fatigue life of a component of an aircraft. The fatigue life management system may generate probability density functions of minimum load, maximum load, and timeframe damage for predetermined time intervals based on selected flight data of the aircraft and regression models for probabilistic prediction of minimum load, maximum load, and timeframe damage of the component. The fatigue life management system may further compute an accumulated fatigue damage estimation based on the probability density functions and a probabilistic fatigue strength model. The fatigue life management system may then generate a distribution of the accumulated fatigue damage estimation of the component. If desired, the processing circuit may compare the distribution of the accumulated fatigue damage estimation with a reliability requirement to determine the remaining fatigue life of the component.
US10311200B2 Pre-silicon design rule evaluation
Roughly described, a method for developing a set of design rules for a fabrication process in development includes, for each of several candidate DRUTs for the fabrication process, laying our a logic cell based on the DRUT, the logic cell having at least one transistor and at least one interconnect, simulating fabrication of the logic cell according to the fabrication process and the layout, simulating behavior of the logic cell structure, including characterizing the combined behavior of both the first transistor and the first interconnect, evaluating performance of the logic cell structure in dependence upon the behavior as characterized, and recording in a database, in association with an indication of the DRUT, values indicating performance of the logic cell. The database can be used to select the best DRUT for the fabrication process.
US10311198B2 Overlay design optimization
A sample comprising an overlay target is presented. The overlay target comprises at least one pair of patterned structures, the patterned structures of the pair being accommodated in respectively bottom and top layers of the sample with a certain vertical distance h between them, wherein a pattern in at least one of the patterned structures has at least one pattern parameter optimized for a predetermined optical overlay measurement scheme with a predetermined wavelength range.
US10311196B1 Method and apparatus for performing symbolic timing analysis with spatial variation
A method for designing a system on a target device includes placing the system on the target device. Timing analysis is performed on the placed system to model delays by using a plurality of localized functions that overlap.
US10311195B2 Incremental multi-patterning validation
A computer-implemented method for validating a design characterized by a multi-patterning layer is presented. The method includes receiving the multi-patterning layer in a memory of the computer when the computer is invoked to validate the design. The method further includes correcting, using the computer, a first error in a first shape of the multi-patterning layer in accordance with a first rule thereby forming a corrected layer. The method further includes incrementally validating, using the computer, a first portion of the corrected layer in accordance with the first error and a first connected component of a first graph associated with the multi-patterning layer.
US10311194B2 Method of resolving multi-patterned color conflicts for multi-row logic cells
According to one general aspect, a method may include dividing circuit cells into colorable sub-portions, wherein each circuit cell includes one or more colorable sub-portions. The method may include determining if a violating colorable sub-portion is to be re-colored. The method may include indicating that the violating colorable sub-portion is to be at least partially re-colored.
US10311190B2 Virtual hierarchical layer patterning
Identifying the interactions of a selected cell across a hierarchical diagram of an integrated circuit and mapping the ways in which the cell can interact with other structures in the hierarchy reduces the computational load for design rule checking (DRC) and design rules for manufacturing (DRM). To this end, a cell and multiple instances of the cell are identified within hierarchical design levels of the chip. The interactions between the cell and other cells within the hierarchy are subtracted from the cell boundary, and the results of the subtracting are merged in the cell boundary. By subtracting the results of the merging, identical interactions are identified across the multiple instances of the cell. The results of the subtracting are used to generate a virtual hierarchical layer identical (VHLi) which aids in the simulation and verification of the chip.
US10311189B2 Simulation method and simulation apparatus
Three-dimensional electromagnetic field analysis is performed for a plurality of positional patterns of a first wiring board internal structure model including one glass cloth on the upper side of differential lines and also for a plurality of positional patterns of a second wiring board internal structure model including one glass cloth on the lower side of differential lines to calculate skews, and the calculated skews are summed relating to a plurality of wiring board patterns configured by combining a plurality of combination patterns obtained by combining the plurality of positional patterns of the first model and a plurality of combination patterns obtained by combining the plurality of positional patterns of the second model to calculate a total skew and then a skew distribution in a wiring board having a certain line length is acquired based on the total skew.
US10311188B2 Circuit design support apparatus, circuit design support method, and computer readable medium
A binding data acquiring unit acquires binding data describing a plurality of memory modules as functional modules of a design target circuit. A memory module selecting unit selects an external memory module to be implemented as an external memory outside of the design target circuit from the memory modules described in the binding data on the basis of a constraint condition on the design target circuit.
US10311186B2 Three-dimensional pattern risk scoring
Methodologies and a device for assessing integrated circuit and pattern for yield risk based on 3D simulation of semiconductor patterns are provided. Embodiments include generating, with a processor, a 3D simulation of semiconductor patterns; obtaining critical dimensions of distances between layers or within a layer of the 3D simulation of semiconductor patterns; comparing the set of critical dimensions with predefined minimum dimensions; and yield scoring each of the semiconductor patterns of the 3D simulation based on the comparing step.
US10311185B2 Model-building method and model-building system
A model-building method and a model-building system for executing the method are disclosed. The method includes the following steps: reading a first netlist; extracting a netlist between an input and an initial-stage clock multi-vibrator and extracting a netlist between a final-stage clock multi-vibrator and an output from the first netlist; extracting a netlist between the input and the output from the first netlist; extracting a netlist between a first clock multi-vibrator and a second clock multi-vibrator from the first netlist; extracting netlists between the first clock input and the initial-stage clock multi-vibrator and the first clock multi-vibrator from the first netlist; extracting netlists between the second clock input and the final-stage clock multi-vibrator and the second clock multi-vibrator from the first netlist; and generating a second netlist based on extracted netlists.
US10311181B2 Methods and systems for creating computerized mesh model for layered shell-like structure
Methods and systems for creating a computerized model representing a layered shell-like structure are disclosed. 2-D reference mesh model and a user-specified definition of a layered shell-like structure are received in a computer system. The 2-D reference mesh model contains a plurality of reference nodes connected by a plurality of 2-D reference elements for representing the layered shell-like structure's mid-plane in the 2-D reference mesh model's thickness direction and the user-specified definition includes the number of layers and each layer's characteristics. A set of new nodal locations along respective reference nodes' normal vectors are calculated according to a set of rules derived from the user-specified definition. New nodes for defining a computerized model that represents the layered shell-like structure are created by reproducing the reference nodes at each corresponding new nodal location. And corresponding finite elements of the computerized model at respective layers are formed according to the user-specified definition.
US10311179B2 Physical modeling of electronic devices/systems
A method for modeling a material at least partially-defined by atomic information includes, for each of a plurality of configurations of the material, determining energy moments for a density of states of the respective configuration of the material, and generating a tight binding Hamiltonian matrix for the respective configuration of the material. The method further includes, for each of the plurality of configurations of the material, forming a tight binding model of the configuration of the material by resolving a linking of (i) the energy moments for the density of states of the material to (ii) the tight binding Hamiltonian matrix for the material. Still further the method includes, based on the tight binding models for each of the configurations of the material, forming an environmentally-adapted tight binding model.
US10311178B2 Method for estimating the spatial distribution of the hazardousness of radiation dose for individuals surrounded by source(s) of radiation
A method for estimating a spatial distribution of the hazardousness of radiation doses for individuals evolving in a medical operating room defining a three-dimensional environment surrounding at least one source of radiation. First a three-dimensional model of the environment is obtained. Then a simulation of radiation doses attributable to ionizing radiation emitted from the source and scattered by the environment is computed in the model. Then, an image indicating the spatial distribution of the hazardousness for an individual of the radiation doses is generated and displayed. The three-dimensional model comprises models of individuals when the individuals are present in the environment and the image is a three-dimensional image generated for at least a portion of the model including said models of individuals.
US10311177B1 Enhancements to parameter fitting and passivity enforcement
A model synthesizer generates a state-space model of a structure from frequency domain parameters of the structure using a selected number of significant eigenvalues of a matrix derived from the frequency-domain parameters such that the quality of the fit of the model is improved. A matrix of the frequency-domain parameters is reshaped so as to improve performance of determination of the fit quality. Passivity violations in the model can be removed via regularization and error control such that the fit quality of the model after removal of the passivity violations is within a specified tolerance. Cholesky factorization can improve the performance of passivity violation detection. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
US10311175B2 Computer-implemented method for defining the points of development of supporting elements of an object made by means of a stereolithography process
Computer-implemented method for defining, on a three-dimensional model of an object (1), the points of development (6) of supporting elements (7) of the object (1) during its production through a stereolithography process. The method includes the steps of defining the surfaces or portions of surfaces (2) of the object (1) whose points are oriented towards a reference plane (π); of tracing a predefined grid of points (3) on each one of the surfaces or portions of surfaces (2); of identifying, for each one of the surfaces or portions of surfaces (2), the presence of at least one local minimum point (5) with respect to the reference plane (π); of adapting, for each one of said surfaces or portions of surfaces (2), the grid of points (3) so that one of the points of the grid (3) substantially coincides with the local minimum point (5); and of identifying the points of the adapted grid (3) as points of development (6) of the supporting elements (7) for each one of said surfaces or portions of surfaces (2).
US10311173B2 Multiphase flow simulator sub-modeling
A method can include receiving a model of a fluid production network where the model includes a plurality of sub-models; synchronizing simulation of the plurality of sub-models with respect to time; and outputting values for fluid flow variables of the model.
US10311170B2 System for providing infrastructure impacts on an urban area
A system for providing infrastructure impacts on an urban area is provided. Area specific content data of a selected urban area is loaded from a database, and infrastructure impacts on the selected urban area are calculated by a calculation unit depending on the loaded area specific content data and technology parameters of predefined infrastructure levers set by a user.
US10311168B2 Method and system for right-sizing function-specific blocks in a healthcare building with a given architectural parti to support a specific space program
A computer-implemented method for right-sizing function-specific blocks in a healthcare building with a given architectural parti to support a specific space program is disclosed. In an embodiment, the method involves describing the relative locations of function-specific blocks using a coordinate system, wherein the function-specific blocks are placed in particular locations within the building relative to a circulation pattern, describing constraints related to the areas of the function-specific blocks, and adjusting the areas and/or aspect ratios of the function-specific blocks to find a solution that maintains the relative locations of the function-specific blocks while meeting the area constraints.