最新美国发明专利第2018-01-02期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09860218B2	Information processing terminal, information processing method, and information processing system A system software unit performs a first authentication operation with an external device using a first key that is registered in advance. A secure software unit determines whether or not system software satisfies a soundness condition. A dedicated memory unit is used to store a second key. While performing a reregistration operation for reregistering the first key, a system software unit requests the secure software unit to read the second key. When the system software satisfies the soundness condition, the secure software unit generates verification data using the second key. When a second authentication operation performed with the external device using the verification data is successful, the system software unit performs the reregistration operation.
US09860217B2	Encrypted streams to receivers Techniques to ensure that a content stream will be encrypted prior to it being served it to the stream receiver if either the stream receiver returned an initial status to the stream caster indicating that only encrypted streams will be accepted or if the user of the stream caster optioned that only encrypted streams will be cast. A stream casting device is capable of locally sourcing and encrypting streams. A content stream server is capable of sourcing encrypted streams and encrypting streams on the fly. A stream receiver device is also described. The system manages key exchanges, encryption, and decryption across the devices serving streams, and stream receiving devices. The casted streams, residing on either a content stream server or on the stream casting devices will be encrypted prior to being served.
US09860211B2	Data leak protection Methods and systems for Data Leak Prevention (DLP) in an enterprise network are provided. According to one embodiment, a network security device maintains a filter database containing multiple filtering rules. Each filtering rule specifies a watermark hash value, a set of network services for which the filtering rule is active and an action to be taken. Network traffic directed to a destination residing outside of an enterprise network, associated with a particular network service and containing a file is received. A watermark hash value embedded within the file is identified. When there exists a filtering rule specifying a matching watermark hash value and for which the filtering rule is active for the particular network service, the action specified by the filtering rule is performed.
US09860208B1	Bridging a virtual clone of a target device in a honey network to a suspicious device in an enterprise network Techniques for bridging a honey network to a suspicious device in a network (e.g., an enterprise network) are disclosed. In some embodiments, a system for bridging a honey network to a suspicious device in an enterprise network includes a device profile data store that includes a plurality of attributes of each of a plurality of devices in the target network environment; a virtual clone manager executed on a processor that instantiates a virtual clone of one or more devices in the target network environment based on one or more attributes for a target device in the device profile data store; and a honey network policy that is configured to route an internal network communication from a suspicious device in the target network environment to the virtual clone for the target device in the honey network.
US09860202B1	Method and system for email disambiguation A system comprises email processing circuitry and network interface circuitry. The email processing circuitry is operable to receive an email message to be sent by the email processing circuitry using simple mail transfer protocol (SMTP). The email processing circuitry is operable to parse the inbound email message. The email processing circuitry is operable to, in response to detecting that the inbound email message is intended for multiple recipients and comprises the particular custom processing rule in its header fields and/or message body, parse the inbound email message into the multiple outbound email messages, where each of the outbound email messages has a different SMTP envelope. The network interface circuitry is operable to send the multiple outbound email messages into a network using SMTP.
US09860199B1	Analysis of content sharing in a messaging platform A system and method for message analysis, including: receiving, from a client device, a reporting request identifying a first broadcasted message authored by a context account of a messaging platform; identifying, by a computer processor, engagement data corresponding to engagement with the first broadcasted message by a set of engaging accounts of the messaging platform that engaged with the first broadcasted message; generating, using the engagement data and by the computer processor, propagation data representing propagation of the first broadcasted message in a connection graph of the messaging platform; and providing the propagation data for the client device in response to the reporting request, where the client device is operable to display a visual representation of the propagation data.
US09860198B1	Apparatus and method for message reference management A method for referencing a message comprises the steps of receiving selection of an area or object associated with the message on a display, optionally providing an indication that the selection of the area or object has been received, allowing a further message to be formed with a link to the message, wherein the link is associated with the further message responsive to the selection, and causing display of the information associated with the message responsive to selection of a further area or portion.
US09860197B2	Automatic buffer sizing for optimal network-on-chip design The present disclosure relates to automatic sizing of NoC channel buffers of one or more virtual channels to optimize NoC design, SoC design, and to meet defined performance objectives. The present disclosure further relates to a NoC element such as a router or a bridge having input ports associated with input virtual channels, and output ports associated with output virtual channels, wherein, aspects of the present disclosure enable sizing of any or a combination of the width of the input virtual channel(s), width of the output virtual channel(s), buffer(s) associated with input virtual channels, and buffer(s) associated with output virtual channels. In another aspect, the sizing can be performed based on one or a combination of defined performance objectives, throughputs of the input virtual channels, and throughputs of the output virtual channels, load characteristics, bandwidth characteristics of each input/output channel, among other like parameters.
US09860195B2	Method and system of providing carrier grade NAT (CGN) to a subset of a subscriber base A method and system are disclosed for providing a service to bypass carrier grade network address translation (NAT), or CGN. A first and second range of private IPv4 addresses are generated for mapping to public IPv4 addresses. Subscribers to the service are provided terminals with a status code which indicates its status with respect to the service. The terminal is assigned a private internet protocol (IP) subnet within the first range of private IPv4 addresses, if the status code is indicative of a bypass status and the terminal identifies a bypass device that requires access to inbound traffic from the public network. Each bypass device is assigned a private IPv4 address from the first range, and the bypass device's private IPv4 address is mapped to a public IPv4 address. Inbound traffic having a matching public IPv4 destination address is subsequently directed to the bypass device.
US09860194B1	Resource management methods and apparatus Methods and apparatus for managing resource utilization in a distributed system are described. Devices, e.g., servers, which use resources, e.g., processing cores, act as individual policy enforcement points. Individual servers retrieve and maintain local copies of resource lease records which are stored in a centralized data storage system. The individual server compares locally stored lease records to the retrieved lease records to check for any tampering in the centralized data storage and multiple states are supported to take into consideration transitory conditions and/or communications delays. Verification states include, e.g., a Pending Active state and a Pending Inactive State, in addition to an Active state and Inactive state, to delay licensing enforcement to account for centralized storage system eventual consistency delays.
US09860193B2	Reallocating resource capacity among resource pools in a cloud computing environment In general, the embodiments of the present invention provide an approach for rebalancing/reallocating cloud resource capacities between resource pools that provide variable customer assurances and delivery penalties when assurances are not met. The variables that are considered hereunder include, overall ‘reservations’, total current capacity, remaining capacity against unused reservations and penalties that apply for failing to satisfy ‘reservation’ commitments. The approach uses a rate of capacity consumption to calculate the risk of consuming the available capacity in each resource pool (e.g., resource pools allocated to satisfy different levels of service with different SLA failure penalties). Based on the relative available capacity in each pool (as determined by the pool rate of consumption), resources are reallocated to maximize revenue (e.g., reduce financial penalty) across a resource pool set.
US09860189B2	Systems and methods to enable network communications for management controllers Systems and methods are provided that may be implemented to use memory as a shared interface between a management controller (e.g., such as embedded baseboard management controller “BMC”, embedded service processor, non-embedded management controller, etc.) and a network controller of an information handling system (e.g., such as a server) in order to achieve a relatively high speed data path between a network and the management controller, and without requiring the use and/or presence of a high speed physical connection to and/or from a sideband interface of the network controller.
US09860187B2	Enrolling a mobile device with an enterprise mobile device management environment Embodiments of the present application relate to a method, apparatus, and system for enrolling a mobile device with an enterprise network. The method includes receiving, from a mobile device, a request to access an enrollment address. In response to receiving the request to access the enrollment address, determining whether the mobile device is pre-enrolled with the enterprise network, and in the event that the mobile device from which the request to access the enrollment address is received corresponds to the mobile device that is pre-enrolled with the enterprise network, pushing user-specific settings to the mobile device.
US09860184B2	Fast friendly start for a data flow Disclosed is a method and apparatus for a packet data flow to use markings on packets (93, 94) that indicate the longest instantaneous queue length on a path in order to rapidly increase the flow rate up to an available capacity of a network node without overshoot, in order to avoid the TCP Slow start process.
US09860177B2	Managing network load using device application programs Concepts and technologies are described herein for managing network load using device application programs. An illustrative method includes receiving, at a mobile device, a list of preferred combinations of location area codes (“LACs”), cell identifiers (“CIDs”), and times that data access by the mobile device is to be incentivized, determining a current LAC associated with a location area within which the mobile device is currently located, determining a current CID associated with a base transceiver station to which the mobile device is currently connected, determining a current time, and determining if the current LAC, the current cell ID, and the current time are included as a preferred combination in the list. The method also includes providing an indication that data access by the mobile device is incentivized if the current LAC, the current cell ID, and the current time are included in the list as a preferred combination.
US09860176B2	Data packet processing The present invention relates to data packet processing in a data network, and provides a method and system for processing data packets. The method comprising: dividing flows containing data packets into elephant flows and mice flows according to a particular division parameter, wherein, an elephant flow contains more data packets than a mice flow; transmitting the divided elephant flows and mice flows to a virtual switch in a server; processing the mice flows at the virtual switch, and transmitting the elephant flows and the processed mice flows to a hardware switch in network; and processing the elephant flows at the hardware switch, and forwarding the received mice flows and the processed elephant flows. With the method and system, network performance may be effectively improved.
US09860175B2	Methods, systems, and computer program products for processing a packet A system for processing a packet may include, for each of a network interface controller and a central processing unit, a measurement of the processing time, a determination of the amount of energy consumed to process a unit of information in the packet, and a measurement of the load. A user may provide the system with signals to perform networking processes for the packet in a manner to reduce the processing time of the system or in a manner to reduce the amount of energy consumed by the system for processing the packet. A portion of the system may receive at least one of the measurements, determinations, and signals and may cause one of the network interface controller and the central processing unit to perform networking processes for the packet. The networking processes may include establishing a connection to a network.
US09860165B2	Method and apparatus for detecting and avoiding interference in a communications network A wireless mesh communication network includes a plurality of wireless routers which can be managed in a hierarchical manner with respect to one another and all of the routers are capable of detecting and avoiding interference on channels over which they communicate with one another. Depending upon whether a channel is active or inactive, a wireless router can either passively detect interference and then switch channels to avoid it or actively detect interference and then switch channels to avoid it.
US09860164B2	Flow based virtual network function orchestration A method for computing device management includes receiving a first incoming packet by a first computing device, analyzing the first incoming packet to identify a virtual network function (VNF) needed to process the first incoming packet, transmitting, to a software defined network controller and in response to the first incoming packet, an orchestration request requesting to orchestrate the VNF on the first computing device, and orchestrating the VNF on the first computing device. The method further includes processing a second incoming packet using the VNF on the first computing device.
US09860161B2	System and method for computing a backup ingress of a point-to-multipoint label switched path A method of Path Computation Element (PCE) Communication Protocol (PCEP) communication includes sending, to a path computation element (PCE), a request to compute a backup ingress node for a Point-to-Multipoint (P2MP) Label Switched Path (LSP) in a network, and receiving, from the PCE, the backup ingress node for the P2MP LSP in accordance with the request.
US09860158B2	Path information exchange method, communication node, communication system, and communication node program The purpose of the present application is to provide a technique for the exchange of path information between different routing domains, which, while reducing the exchange of useless path information in the stage for constructing a hierarchical structure, can maintain robustness of path recognition that tolerates network partition. Of the management communication node identifiers which are described in hierarchical information included in a path control message received from a neighboring communication node and in hierarchical information held by the local communication node and which indicate a communication node that manages each level of the hierarchicalized network structure, the identifier indicating the highest level communication node and the identifier indicating the transmission source communication node are used to identify whether the routing domain to which the aforementioned neighboring communication node belongs is the same as the routing domain of the local communication node, and if the routing domain to which the aforementioned neighboring communication node belongs is different from the routing domain of the local communication node, the path information held by the local communication node is made known.
US09860155B1	Code coverage and data analysis Techniques described herein provide for real-time observation of utilization of one or more resources by a system in response to an input. The real-time observation by a system may occur in an environment in which end users supply inputs to the system (e.g., a production environment). In various embodiments, a server system may provide a service to a client system. A client system may take advantage of this service by sending an input to the server system. In response, the server system may perform the provisioned service using the input from the client system. In connection with the service, the utilization of resources (e.g., by a process) and/or the client system-supplied input may be recorded, such as when resources are utilized in an unexpected or interesting manner. These records may be used at a later time for testing and analysis.
US09860148B2	Geographic segmentation systems and methods Methods and systems for segmenting traffic based on geography include assigning coordinate location data received with respect to members of a plurality of computing devices to analytics data associated with a plurality of requests for content received from respective ones of the plurality of computing devices. A geographical location of interest is defined. The defining the geographical location of interest includes designating a plurality of points defining boundaries of the geographical location of interest. Respective ones of a plurality of traffic segments are assigned to the plurality of requests for content based in part upon a comparison of the geographical location of interest to coordinate location data assigned to respective ones of the plurality of requests for content. Network traffic metrics are generated for ones of the plurality of traffic segments. The request traffic metrics describe request behavior associated with particular segments of the plurality of traffic segments.
US09860146B2	Method and apparatus for estimating available capacity of a data transfer path A method and apparatus for estimating available capacity of a data transfer path (16) that transfers data between data communication nodes (12, 14) of a data communication system (10). The method comprising: receiving (305) probe packets (15) that traverse the data transfer path (16) during real-time operation of the data transfer path (16); providing (310) measured data (zU, zE) indicating strain of the received probe packets for use in estimating the available capacity of the data transfer path (16); classifying (320) the measured data based on the strain of the received probe packets; filtering (325) the classified measured data into a discrete representation of a probability density function of available capacity; and estimating (330) the available capacity by using the discrete representation of the probability density function.
US09860140B2	Dynamically adjusting a set of monitored network properties using distributed learning machine feedback In one embodiment, techniques are shown and described relating to dynamically adjusting a set of monitored network properties using distributed learning machine feedback. In particular, in one embodiment, a learning machine (or distributed learning machines) determines a plurality of monitored network properties in a computer network. From this, a subset of relevant network properties of the plurality of network properties may be determined, such that a corresponding subset of irrelevant network properties based on the subset of relevant network properties may also be determined. Accordingly, the computer network may be informed of the irrelevant network properties to reduce a rate of monitoring the irrelevant network properties.
US09860139B2	Passive monitoring of live virtual desktop infrastructure (VDI) deployments In one embodiment, a client device configured to remotely access a desktop hosted by a server system determines an event related to a user input for a desktop operation directed to the desktop. The client device receives a plurality of updates to a desktop graphical user interface (GUI) from the desktop hosted by the server system. Then, the client device correlates the event to an update in the plurality of updates to the desktop GUI based on a rule in a set of rules correlating events to updates. A metric is monitored for the update and information measured for the metric is stored.
US09860138B2	Bandwidth on demand in SDN networks Bandwidth-on-Demand (BoD) as a network service (BoD-as-a-Service) is integrated into applications that end-users can flexibly purchase when and for however long they need it. A centralized Software Defined Networking (SDN) controller and distributed SDN controller agents that may be seen in a Service Provider, Enterprise or distributed computing environment with remote and mobile end-users is provided. The end-user initiates the BoD request using an application via desktop, cloud, smartphone or tablet. The BoD Service Provider, Enterprise, has a controller-based centralized view of the complete SDN service topology. On receiving the request, the BoD provider dynamically computes the optimal end-to-end path through the SDN topology that best suits the end-user requested traffic types and service level requirements. It then translates that optimal path into flow computations that are dynamically pushed down to the controller agents to provision the BoD network path in real-time. An on-demand and real-time bandwidth service for consumers are herein provided where it was previously too costly or too time consuming to set up.
US09860137B1	Intelligent provisioning of service policy rules A method and corresponding system to help facilitate the application of service policy rules for client devices while reducing the amount of signaling between network entities is disclosed. In accordance with one example, the wireless network may evaluate the extent to which the service policy rules defined by the UE's service profile have been applied by the wireless network. Based on this evaluating, the network may identify a subset of service policy rules that have been applied to greater than a threshold extent by the network for the given UE. And in response to this identifying, the network may cause the PDP to provision the PEP, with the subset of service policy rules, rather than provision the PEP with every possible service policy rule. As a result, the PDP and PEP may refrain from engaging in excess signaling, and the wireless network, in turn, may enjoy reduced congestion.
US09860136B2	Providing network congestion information to mobile devices for sponsored data A third-party application, executing at a mobile device, may be provided with information describing congestion levels in a network, such as a cellular wireless network through which the mobile device connects. In one implementation, the third-party application may select, based on the information describing the congestion levels, a data flow, from a number of data flows, to use when communicating with a destination device, each of the data flows being associated with different quality of service (QoS) parameters and being associated with different charging rates. The mobile device may communicate, through a proxy server, and using the selected data flow, with the destination device. The communication with the destination device may be implemented using sponsored data that is not charged to an account associated with an owner of the mobile device.
US09860135B2	Bulk device preparation A method and a system for preparing a plurality of installed field devices for operation in a process control network. In some embodiments, a computing device provides a visual summary of the installed field devices to a user via a user interface. A configuration database stores predefined device preparation scopes, each scope being indicative of one or more of the installed field devices. Based on a user selection of one or more predefined device preparation scopes in the user interface, the computing device implements each of the predefined device preparation scopes by, among other things, retrieving configuration information from the configuration database for each installed field device indicated by each predefined device preparation scope and transmitting the information to each respective installed field device for updating the device configuration.
US09860134B2	Resource provisioning using predictive modeling in a networked computing environment An approach is provided for allowing a network computing (e.g., cloud computing) infrastructure to modify its resource allocation plan (e.g., an instance count) by using a Kth derivative vector plot, which may be generated using historical logs. Among other things, this approach enables an infrastructure to project an allocation forecast for a specified duration and adapt to changes in network traffic.
US09860131B2	System and method for policy-based geolocation services for virtual servers A method for automated policy-based localization of one or more virtual servers within a distributed network comprising a plurality of data centers includes the steps of: (i) receiving a policy, the policy defining at least one rule regarding localization of a virtual server within the network; (ii) storing the defined policy in a policy database; (iii) calculating, using a policy engine and the defined policy, a current policy score for a virtual server within the distributed network; (iv) optimizing, using a re-deployment engine and the defined policy, the calculated policy score for the virtual server by relocating the virtual server to a new data center within the distributed network; and (v) creating an alert, if the defined policy is violated by relocating the virtual server.
US09860129B2	Systems, methods and devices for networking over a network The present disclosure is related to systems, methods, and processor readable media for distributing digital data over networks. Certain embodiments relate to systems, methods, and devices used within such networks where at least a substantial portion of the interconnected devices are capable of interacting with one or more neighboring devices, and then to form such a network either with no gateway and/or control point, with a single gateway and/or control point or with a number of gateways and/or control points.
US09860128B2	Automated command and discovery process for network communications The embodiments disclose a method for automatically communicating a command, received from a command server, to a set of nodes from a plurality of nodes on a network, executing the command on each node in the set of nodes and sending a response message from each node in the set of nodes to the command server indicating a type of executed action, wherein the set of nodes form a plurality of response messages.
US09860127B2	Method for configuring a network The present invention relates to a method for configuring a network comprising a maintenance entity and a plurality of nodes, the method comprising at the maintenance entity, the steps of: (a) detecting a potential presence in the network of at least one limited node, said limited node being able to receive data only within time periods; (b) determining that an updated network configuration parameter value is required, said network configuration parameter being common to the at least one limited node and to the plurality nodes of the network; (c) postponing a transmission of a signal for updating the network configuration parameter value at the plurality of nodes, based on the detection of the potential presence of the at least one limited node in the network; (d) transmitting a triggering signal for triggering delivery of the updated network configuration parameter value to the limited device; (e) transmitting the signal for updating the updated network configuration parameter value at the plurality of nodes.
US09860126B2	Method and system for coordinating cellular networks operation A SON element which is operative to carry out at least two different SON functions is provided, wherein each of the SON functions is associated with at least one SON related action, and wherein a SON related action, initiated by triggering a SON function, would have been adversely affected by another SON related action, initiated by triggering another SON function, had the SON element not affected a modification in operating conditions of the cellular network, wherein the SON element is operative to: (a) assign priorities to the different SON functions; (b) assign different weights to the SON related actions; and (c) coordinate execution of SON related actions, that when executed are carried out in a way that does not breach the priorities hierarchy and the weights' order assigned to the SON related actions, thereby improving operation of the cellular network.
US09860124B2	Configurable cloud-based routing A system for adaptive cloud-based work routing comprising a work router for assigning work tasks and a routing configuration server for configuring operation or monitoring performance of a work router, and a graphical user interface for configuration of a cloud-based work router.
US09860108B2	Device and method for remote computer operation A network device having a processor, an interface for emulating a human interface device, a video input, a data storage for storing data from a target device or transferring data to the target device, a first network interface, wherein the network device is configured to provide control of a target device, through the interface for emulating a human interface device.
US09860106B2	Multi-source sensor stream virtualization Systems and methods for data stream virtualization are generally described herein. One or more embodiments of such a system can include a stream processing node, a physical sensor stream, a management node, a virtual sensor stream, or pairing logic.
US09860104B2	QPSK demodulator A novel quadrature phase-shift keying (QPSK) demodulator, called the bowknot quadrature phase-shift keying (BQPSK) demodulator, is disclosed. The BQPSK demodulator uses a delay circuit to delay a BQPSK signal and mixes the delayed BQPSK signal with the undelayed BQPSK signal to output an I-channel data signal and a Q-channel data signal. The BQPSK demodulator further uses a phase rotation circuit to demodulate the orthogonal data signals and obtain a recovery clock signal. The BQPSK demodulator neither uses an A/D converter nor uses a quadrature oscillator, featuring high data rate, low power consumption, simple architecture and superior reliability. The BQPSK demodulator can be realized by digital circuits and analog circuits.
US09860102B2	Method for transmitting signal in communication system Disclosed is a method for transmitting signal in a communication system. A method for transmitting signal comprises generating a short training field (STF) comprising a cyclic prefix (CP) and an effective symbol period including four RP regions; generating a long training field (LTF) comprising a cyclic prefix (CP) and an effective symbol period including two RP regions; generating a frame comprising the STF and the LTF; and transmitting the frame. Thus, efficiency of the communication system may be enhanced by using the method.
US09860090B2	Method of transporting data with embedded clock A method for transporting data to a display device includes: receiving image data having a first part data and a second part data; determining a coding information of a header according to a bit number of the image data with consecutively same bit value, wherein the coding information indicates whether the second part data in bits is to be inverted or not; coding the image data according to the coding information; and packing the header and the coded image data to a packet for transporting to the display device.
US09860088B1	Inferring sampled data in decision feedback equalizer at restart of forwarded clock in memory system An apparatus includes a detector circuit and a data buffer. The detector circuit may be configured to (i) identify a start of a command sequence associated with a directed access to a memory system and (ii) generate a control signal indicating a non-consecutive clock associated with the start of the command sequence. The data buffer circuit may be configured to initialize a condition of a receiver circuit in response to the control signal prior to reception of a first data bit associated with the command sequence.
US09860086B1	Equalizer circuit and optical module An equalizer circuit includes: a pair of input terminals: a differential amplification circuit outputs, to a pair of output terminals, first signals obtained by amplifying a difference in levels of input signals supplied to the pair of input terminals; and a differential differentiation amplification circuit that outputs, to the pair of output terminals, second signals obtained by amplifying a time-varying change in the difference in the levels of the input signals supplied to the pair of input terminals.
US09860083B2	Channel estimation method, apparatus, and device and multichannel microwave communications system The present invention discloses a channel estimation method, apparatus, and device and a multichannel microwave communications system. According to the channel estimation method, a first vector group corresponding to a transmit end and a second vector group corresponding to a receive end are first obtained according to a transmit-receive array size; then a subchannel estimation procedure is performed multiple times according to the transmit-receive array size, the first vector group, and the second vector group, to obtain multiple corresponding subchannel estimated coefficients; and finally, a real channel matrix is determined according to the first vector group, the second vector group, and an estimation matrix consisting of the multiple subchannel estimated coefficients.
US09860081B2	General user network interface (UNI) multi-homing techniques for shortest path bridging (SPB) networks A method, apparatus and computer program product for providing multi-homing techniques for SPB networks is presented. A set of UNI nodes that receive multicast packets are determined based on Backbone Media Access Control-Destination Address (BMAC-DA)/I-Tag Service Identifier (I-SID) of received multicast packets for multicast packets within a transport network. A separate Egress Port Mask is determined for each Backbone-Virtual Local Area Network (B-VLAN) of the transport network, wherein the Egress Port Mask is determined such that only one UNI node of the set of UNI nodes forwards said multicast packets. A set of UNI copies of said multicast packets are filtered out by applying the Egress Port Mask, wherein copies that are not in the Egress Port Mask are dropped. Copies of multicast packets that are not dropped are sent out.
US09860080B2	Method and device for implementing hierarchical virtual private LAN service Provided are a method and device for implementing hierarchical virtual private LAN service, the method comprising: acquiring the group attribute information of at least one remote provider edge (PE), each group attribute information carrying a group identifier of the corresponding remote PE; according to the group identifier of each PE, determining a pseudo wire (PW) group where a PW between PEs belongs, the PW group comprising a horizontal split group or a redundancy protection group; according to the PW group, determining a service forwarding path, thus solving the problem of a complex configuration process and high cost in the implementation of HVPLS via BGP-AD; in addition, when a network topology changes, the PW between the remote PEs is automatically added to the corresponding horizontal split group or the redundancy protection group without any configuration change or static addition, that is, without manual configuration.
US09860079B2	Redirecting packets for egress from an autonomous system using tenant specific routing and forwarding tables A redirector within an Autonomous System (AS) is configured to access a set of Routing and Forwarding (RF) tables associated with a respective set of tenants. A current packet, addressed to a private IP address of a private tenant network outside the AS, is received by the redirector. The redirector executes a look up of the private IP address in a RF table, from the set of RF tables, that corresponds to the tenant associated with the packet. The redirector selects an egress interface of a egress gateway of the AS based on the look up. The redirector encapsulates the current packet and an identifier of the egress interface within an outer packet and transmits the outer packet to the egress gateway. The egress gateway transmits the packet toward the private IP address of the private tenant network using the egress gateway selected by the redirector.
US09860074B2	Group communication In order to facilitate group communication using characteristics of a pre-arranged group but not involving all members of the pre-arranged group, a parameter indicating that the group communication is not intended to all members of the pre-arranged group is added by an inviting group member sending a request to a group server, and the group server, in response to the parameter, is configured to not to invite all members to the group communication.
US09860072B2	System with sleep and wake up control over DC path A system includes a master and a slave coupled via a wire pair for transmitting differential data. The master and slave are each powered by a local DC power supply. In a normal mode, a DC voltage and differential data are supplied over the same wire pair. The differential data is processed by a PHY AC-coupled to the wire pair. To enter a low power sleep mode, such as due to a temporary non-use of the system, the master interrupts the DC voltage on the wire pair, which signals to the slave to enter the sleep mode. The system is woken up by reapplying the DC voltage to the wire pair to signal to the slave to wake up. Only the DC path, and not the data path, is used for signaling the sleep mode and awake mode, so the data path can be disabled to conserve power.
US09860069B2	Group signature using a pseudonym The invention relates to a method for signing a message (m), implemented by processing means of a user device of a member (Mi) belonging to a group of members (G), said user device having a secret signature key (ski), said method including a step of generating (E301) a group signature (σ) for the message (m), enabling said member (Mi) to prove his membership in the group (G), and a step of generating (E302) a pseudonym (nymij) identifying the member (Mi) within a domain (Dj) of a service provider (SPj), said domain including a set of terminals in communication with a server of said service provider, said signature (σ) being designed such that said member (Mi) can prove, by signing the message (m), his knowledge of said secret signature key without disclosing it, said group signature (σ) being designed such that the membership of the member (Mi) in the group is verifiable independently from the pseudonym (nymij), said pseudonym and said signature being a function of a portion (xi) of said secret signature key of the member (Mi) and being designed so as to prove that the member identified by the pseudonym is the signatory of the message (m) and said pseudonym (nymij) of said member (Mi) being specific to the domain (Dj).
US09860067B2	Cryptographically signing an access point device broadcast message An access point device that broadcasts a signal including a publicly known PLMN code is conventionally assumed by user equipment devices to be a legitimate access point device deployed by the communication provider associated with that PLMN. User equipment devices associated with that provider may attempt to attach to that access point device, even if the access point device is in reality a rogue access point device. During this exchange of information, the rogue access point device can compromise the user equipment device in numerous ways and can do so despite strong encryption/authentication associated with modern LTE standards. Architectures are disclosed that provide cryptographically signed information in a broadcast message so an access point can be authenticated before selection, attempting to attach, accepting instructions, and/or transmitting any information to the access point device.
US09860066B2	Location control of cloud data stores Embodiments of the present invention utilize a data hash and an associated geotag for authentication of geolocation policies for data object storage in a cloud system. The geotag may be an alphanumeric identifier such as a city name, postal (ZIP) code, and/or latitude-longitude pair. Embodiments include a post-authenticate process, in which, after a data object is retrieved from a BMS, the geographic location of the source is confirmed to ensure the location policies have not been violated. Additionally, embodiments include a pre-authenticate process, in which, prior to storing a data object in a BMS, the geographic location of the BMS that is to receive the data object is confirmed to ensure the location policies will not be violated. Embodiments may use pre-authenticate, post-authenticate, or both pre-authenticate and post-authenticate, in order to implement and verify the location policies.
US09860065B2	Side-channel-protected masking The invention provides a method, in a processor, for executing a cryptographic computation. Upon the execution of the computation there is applied a base masking through which intermediate values are incorporated into the computation as masked intermediate values. Upon the execution of the computation a secondary masking is additionally applied, wherein for each intermediate value masked by means of the base masking the one's complement of the masked intermediate value is formed, the masked intermediate value and the one's complement of the masked intermediate value are made available, and randomly the computation is executed either with the masked intermediate value or with the one's complement of the masked intermediate value.
US09860063B2	Code analysis tool for recommending encryption of data without affecting program semantics Systems, methods and computer program products are described that analyze the code of an application and, based on the analysis, identify whether data elements (e.g., columns) referenced by the code can be encrypted, and for those data elements that can be encrypted, recommend an encryption scheme. The recommended encryption scheme for a given data element may be the highest level of encryption that can be applied thereto without affecting the semantics of the application code. The output generated based on the analysis may not only include a mapping of each data element to a recommended encryption scheme, but may also include an explanation of why each recommendation was made for each data element. Such explanation may include, for example, an identification of the application code that gave rise to the recommendation for each data element.
US09860061B2	Methods and systems of securely storing documents on a mobile device A method of encrypting information using a computational tag may include, by a mobile electronic device, detecting a computational tag within a near field communication range of the mobile electronic device, identifying a document to be encrypted by the mobile electronic device, transmitting the document to the computational tag by the mobile electronic device, receiving, from the computational tag, an encrypted document, wherein the encrypted document comprises an encrypted version of the document that was to be encrypted, and storing the encrypted document in a memory of the mobile electronic device.
US09860054B1	Real-time phase synchronization of a remote receiver with a measurement instrument A measurement instrument for measuring electrical characteristics of a device under test (DUT) includes a synchronization signal generator for generating a synchronization signal transmittable to a receiver, a voltage controlled phase shifter (VCPS) connected with the synchronization signal generator and a phase-to-voltage converter configured to drive the VCPS. The synchronization signal is transmitted via a duplexer configured to transmit the synchronization signal from the measurement instrument to the receiver via a fiber optic cable and retransmit the received synchronization signal from the receiver to the measurement instrument via the fiber optic cable. The phase-to-voltage converter receives as inputs the synchronization signal input to the VCPS, the synchronization signal output from the VCPS and the retransmitted synchronization signal received at the measurement instrument from the receiver. An output of the phase-to-voltage converter is provided as input to the VCPS.
US09860051B2	Method and apparatus for management of frequency-division-duplex and time-division-duplex carrier aggregation A method and apparatus may predict a link quality. The method may also include determining a primary cell for a user equipment based on the predicted link quality. The determining the primary cell comprises determining whether the user equipment should be served by a time-division-duplex carrier or by a frequency-division-duplex carrier. The method may also include determining a carrier aggregation to be used by the user equipment based on the predicted link quality.
US09860049B2	Downlink channel time domain position determination method and device A downlink control channel time-domain position determination method and device are disclosed. The method includes: a terminal determining a way for acquiring a time-domain position of a downlink control channel and/or a time-domain starting position of a downlink data channel corresponding to the downlink control channel according to a number of repetitions of resources corresponding to the downlink control channel and/or a downlink channel type; the terminal obtaining the time-domain position of the downlink control channel and/or the time-domain starting position of the downlink data channel in accordance with the way.
US09860044B2	PUCCH resource allocation for carrier aggregation in LTE-advanced Systems and methods of signaling uplink control information in a mobile communication network using carrier aggregation are provided. In one exemplary embodiment, a method may include scheduling downlink transmissions to a first user terminal on a single downlink component carrier (CC) associated with a primary cell and scheduling downlink transmissions to a second user terminal on multiple downlink CCs or on a downlink CC associated with a non-primary cell. Further, the method may include receiving, on a first set of radio resources, control information associated with the downlink transmissions to the first user terminal. In addition, the method may include receiving, on a second set of radio resources, control information associated with the downlink transmissions to the second user terminal.
US09860042B2	Method and apparatus for transmitting ranging signal in wireless communication system A method of a mobile station for transmitting a ranging signal in a wireless communication system which supports Fractional Frequency Reuse (FFR) and an apparatus for performing the method are provided. The method includes receiving information of ranging resource allocation, from a base station, based on the information of the ranging resource allocation, determining a cell identifier and a Frequency Partition (FP) location for uplink control channels, determining a subband index for the ranging resource allocation based on the cell identifier and a number of subbands allocated to the FP location for the uplink control channels, and transmitting a ranging signal based on the subband index for the ranging resource allocation. Thus, interference to a neighboring cell may be reduced in the ranging channel transmission.
US09860041B2	Radio base station, user terminal and radio communication method The present invention is designed so that, in a communication system to employ massive MIMO, data signals to which beamforming is applied can be transmitted adequately. A radio base station transmits a data signal to a user terminal by applying beamforming using a plurality of antenna elements, and has a determining section that determines the type of a weight to apply to the data signal for beamforming, a generating section that generates a reference signal which the user terminal uses in channel estimation, a weight control section that controls weights to apply to transmitting signals, and a transmitting section that transmits the data signal and the reference signal, and the weight control section determines whether or not to apply a weight to the reference signal based on the type of the weight.
US09860037B2	Method and apparatus for ordering sub-fields of VHT-SIG-A and VIT-SIG-B fields Certain aspects of the present disclosure relate to a technique of ordering sub-fields within Signal (SIG) fields of a preamble in Very High Throughput (VHT) wireless communications systems and to a technique of managing sizes of these sub-fields.
US09860033B2	Method and apparatus for antenna diversity in multi-input multi-output communication systems Transmission schemes that can flexibly achieve the desired spatial multiplexing order, spatial diversity order, and channel estimation overhead order are described. For data transmission, the assigned subcarriers and spatial multiplexing order (M) for a receiver are determined, where M≧1. For each assigned subcarrier, M virtual antennas are selected from among V virtual antennas formed with V columns of an orthonormal matrix, where V≧M. V may be selected to achieve the desired spatial diversity order and channel estimation overhead order. Output symbols are mapped to the M virtual antennas selected for each assigned subcarrier by applying the orthonormal matrix. Pilot symbols are also mapped to the V virtual antennas. The mapped symbols are provided for transmission from T transmit antennas, where T≧V. Transmission symbols are generated for the mapped symbols, e.g., based on OFDM or SC-FDMA. Different cyclic delays may be applied for the T transmit antennas to improve diversity.
US09860027B2	Method for sharing resources using individual HARQ processes The network node of a cellular network assigns a first part of a shared radio resource to a first User Equipment, UE, for uplink transmissions in the cell, and instructs the first UE to apply a first UE-specific Hybrid Automatic Repeat Request, HARQ, process for transmitting on the assigned first part. The network node also assigns a second part of the shared radio resource to a second UE for uplink transmissions in the cell, and instructs the second UE to apply a second UE-specific HARQ process for transmitting on the assigned second part, the second HARQ process being separate from the first HARQ process. The network node then receives data transmitted from the first UE on the assigned first part based on the first HARQ process and data transmitted from the second UE on the assigned second part based on the second HARQ process.
US09860025B2	Method for transmitting/receiving signal and device therefor The present invention relates to a wireless communication system. More particularly, the present invention relates to a method and a device for a terminal to transmit an uplink signal according to a normal HARQ operation in a wireless communication system supporting a carrier merge, the method comprising the steps of: forming a first cell set with a FDD and a second serving cell set with a TDD; receiving a PHICH signal from a subframe #(n−m−p) of the first serving cell, or receiving a PDCCH signal from a subframe #(n−m) of the first serving cell; and transmitting a PUSCH signal from a subframe #n of the second serving cell, in correspondence to the PHICH signal or the PDCCH signal, wherein n is an integer greater than or equal to 0, m is an integer greater than or equal to 1, and p is an integer greater than or equal to 1.
US09860018B2	Apparatus and method for performing channel decoding operation based on effective noise in mobile communication system A method and apparatus are provided for performing a channel decoding operation based on effective noise in a mobile communication system. The method includes detecting effective noise including additive noise that occurs in a channel environment between the signal receiving apparatus and a signal transmitting apparatus and channel estimation noise that occurs during a channel estimating operation the signal receiving apparatus; generating a log likelihood ratio (LLR) based on the detected effective noise; and performing channel decoding based on the generated LLR.
US09860016B2	Digital broadcast system for transmitting/receiving digital broadcast data, and data processing method for use in the same The present invention is directed to a digital broadcast system and a data processing method. A broadcast signal in which mobile service data and main service data are multiplexed is transmitted and received. Then, in a broadcasting receiver, the program table information including information about a service or a program of an ensemble is parsed according to an identifier of the ensemble in which the mobile service data are multiplexed, in the received broadcast signal. And a mobile service is outputted by using the mobile service data and the parsed program table information.
US09860013B2	Time division multiplexed orbital angular momentum based communication Optical signals with different orbital angular momentum (OAM) modes are used to multiplex data directed to different receiver together using time division multiplexing. The OAM based multiplexing may be used in addition to other multiplexing schemes such as time division multiplexing, polarization multiplexing and so on. Capacity of existing optical network infrastructure can be increased significantly using OAM modulation, and data communication can be secured at the same time.
US09860007B2	User terminal, radio base station, and radio communication method For the purpose of preventing transmission of UL signals in a subframe other than a UL subframe during the fallback operation in Dynamic TDD communication, the present invention provides a user terminal for communicating in Dynamic TDD, the user terminal having: a reception section that receives control information including an indication to dynamically change a subframe configuration of a Dynamic TDD cell and a control section that controls not to perform specific resource transmission in flexible subframes in the fallback operation based on the subframe configuration of Dynamic TDD cell signaled by higher layers or SIB1.
US09860002B2	Audio signal processing apparatus and storage medium An audio signal in a plurality of input channels each including an equalizer and a dynamics as a first signal processing part is taken out as a cue signal by a cue switch 126, and the cue signal is outputted to a monitoring output terminal via a cue output channel 160. In the cue output channel, there are provided an equalizer 163 and a dynamics 164, as a second signal processing part, which perform signal processing common to the first signal processing part of the input channel in accordance with values of second parameters which are editable independently from first parameters used by the first signal processing part. In this configuration, it is preferable that the values of the second parameters may be reflected onto signal processing in the input channel in accordance with an instruction by a user.
US09859996B2	Adaptive RF system testing system and method A system and method for testing an adaptive RF system in an emulated RF environment using a feedback control module to efficiently and accurately evaluate the performance of the RF system under test in the search space.
US09859992B1	Dynamic range extended interference canceler A multi-tier interference canceler includes a first canceler, a second canceler, and a third canceler. The first canceler samples radio frequency (RF) interference generated from a linear signal using a non-linear process. The RF interference includes linear interference and non-linear interference. The first canceler cancels the linear interference from the sampled RF interference based on the linear signal to produce a first non-linear interference sample. The second canceler receives an amplitude scaled, time-shifted version of the RF interference and cancels the linear interference from the received RF interference based on the linear signal to produce a second non-linear interference sample. The third canceler cancels the non-linear interference from the second non-linear interference sample using the first non-linear interference sample, to produce a receive signal that is substantially free of the non-linear interference and the linear interference.
US09859989B2	Interference processing in wireless communication A method for processing interference in wireless communication at a base station, wherein at least some of a plurality of (Radio Frequency) RF channels in the base station operates at a current operating frequency point assigned to the base station includes detecting interference of one or more candidate frequency points by using at least one RF channel, wherein the one or more candidate frequency points are different from the current operating frequency point; reporting result of detecting interference of the one or more candidate frequency points to a resource manager; and in response to the resource manager assigning one of the one or more candidate frequency points to the base station, notifying a user to switch from the current operating frequency point to the assigned candidate frequency point.
US09859986B2	Optical receiver, active optical cable, and control method for optical receiver The present disclosure includes a photodetector element (11) that converts an optical signal into an electric current signal; a transimpedance amplifier (12a) that converts the electric current signal into a voltage signal; a differential amplifier (12d) that converts the voltage signal into a differential signal, by performing differential amplification of a difference between the voltage signal and a threshold voltage; an LOS detection circuit that detects a no-signal section of the optical signal; and an MCU that repeatedly executes offset cancellation processing, the offset cancellation processing including threshold voltage change processing in which the threshold voltage is changed such that an offset voltage of the differential signal is reduced, the MCU 13 skipping the threshold voltage change processing in the no-signal section.
US09859985B2	Optical transmitter, optical transmission system and optical communication control method An optical transmitter has an electrical signal generator configured to generate an electrical drive signal based upon input data; an optical modulator configured to modulate an input light by the electrical drive signal, the optical modulator having a first waveguide pair, a second waveguide pair, and a phase shifter that provides a phase difference between light waves travelling through the first waveguide pair and the second waveguide pair; and a controller configured to set the phase difference at the phase shifter to 0+n*π radians, where it is an integer, when a modulation scheme of the optical modulator is changed from a first scheme using four or more phase values to a second scheme using two phase values.
US09859980B2	Information processing program, reception program, and information processing apparatus A computer-implemented method is provided, in which a plurality of luminance change frequencies of a light emitter is determined by coding one of a plurality of transmission information sources. The light emitter transmits a transmission information source by a change in luminance according to each of the plurality of luminance change frequencies. A signal, which controls the change in luminance of the light emitter according to each of the plurality of luminance change frequencies, is output to the light emitter. The plurality of luminance change frequencies include a first frequency and a second frequency. A signal of the first frequency and a signal of the second frequency respectively cause the light emitter to change in luminance according to the first frequency during a first time period and to change in luminance according to the second frequency during a second time period after the first time period has elapsed.
US09859977B2	Method for estimating channel power, method for monitoring frequency spectrum characteristic, apparatus and system A method, apparatus and system estimating channel power, and monitoring a frequency spectrum characteristic. A method for estimating channel power includes extracting frequency spectrum information from a received signal, so as to obtain a frequency spectrum of the received signal, estimating power of a central channel in the frequency spectra according to a power value of a flat area of the central channel, and estimating power of a neighboring channel in the frequency spectra according to a power value of a flat area of the neighboring channel. With the embodiments of the present disclosure, the power of the central channel and the power of the neighboring channel may be estimated by using only frequency spectrum information obtained by a single optical receiver, so as to quantitatively evaluate influence of a power imbalance effect, thereby ensuring precision of the power estimation, and reducing effects of nonideal factors on the estimated values.
US09859974B2	Rerouting bus data signals from faulty signal carriers to existing healthy signal carriers A first set of signal carriers of a plurality of signal carriers may be determined to be faulty. The first set of signal carriers may be for transmitting a first set of respective lane signals of a plurality of lane signals. A second set of signal carriers of the plurality of signal carriers may be identified as not faulty. The second set of signal carriers may be for transmitting a second set of lane signals of the plurality of lane signals. Based on the determining and identifying, one or more of the first set of lane signals may be routed from the first set of signal carriers through a first subset of the second set of signal carriers, the routing of the one or more of the first set of lane signals may cause a bandwidth capacity to increase to a highest available bandwidth.
US09859971B2	Apparatus and method for communicating with satellite based on analog network coding Disclosed are an apparatus and method for communicating with satellite based on analog network coding. A method for satellite communication, according to one embodiment of the present invention, is a method for satellite communication of a satellite terminal and comprises the steps of: receiving transmission data from a feeder that directly transmits the transmission data to a satellite; receiving a superposed signal, in which the transmission data and reception data corresponding to the transmission data have been analog network coded, from the satellite; and extracting the reception data from the superposed signal using the superposed signal and the received transmission data.
US09859968B2	Efficient CQI signaling in multi-beam MIMO systems The present invention relates to the signaling of channel quality information in a multi-beam transmission system, wherein a plurality of beams are simultaneously transmitted and a plurality of sets of channel quality information are transmitted for controlling independently the transmission rate on the different beams. Determined are beams with a different quality resulting in different effects of errors in the transmissions of the channel quality information for the beams. Said different effects are exploited for reducing a signaling overhead of the channel quality information for the beams.
US09859966B2	Apparatus, system and method of beamforming Some demonstrative embodiments include apparatuses, devices, systems and methods of beamforming. For example, a first wireless station may process transmission of a first plurality of Beam Refinement Phase (BRP) frames to a second wireless station during a BRP, one or more duration fields of one or more respective BRP frames of the first plurality of BRP frames being according to an end time; and may process reception of a second plurality of BRP frames from the second wireless station during the BRP, one or more duration fields of one or more respective BRP frames of the second plurality of BRP frames being according to the end time.
US09859963B2	Methods and apparatus for overlapping MIMO physical sectors A system is provided comprising: a first wireless part with a multiple-input-multiple-output (MIMO) capability; a second wireless part with a multiple-input-multiple-output (MIMO) capability; and circuitry in communication with the first wireless part with the multiple-input-multiple-output (MIMO) capability and the second wireless part with the multiple-input-multiple-output (MIMO) capability. The system is configured such that the first wireless part with the multiple-input-multiple-output (MIMO) capability selects a channel based on one or more channel characteristics and initiates a first transmission to a first multiple-input-multiple-output (MIMO)-capable portable wireless device via the first wireless protocol, and further initiates a second transmission to a second multiple-input-multiple-output (MIMO)-capable portable wireless device.
US09859957B2	Antenna module for communication and power transmission There is provided an antenna module including a non-contact power transmission coil, and a proximity radio communication antenna formed coaxially with the non-contact power transmission coil.
US09859955B2	System and method for power output control in wireless power transfer systems This disclosure provides systems, methods and apparatus for wireless power transfer and particularly wireless power transfer to remote system such as electric vehicles. In one aspect a circuit for wireless power transfer is provided. The circuit comprises an inductive element for receiving wireless power from a magnetic field associated with a wireless power transfer transmitter device. The circuit further comprises an output configured to be connected to a load. The circuit further comprises a voltage detector configured to detect the voltage across the load. The circuit further comprises at least one switching element between the inductive element and the output. The circuit further comprises a controller configured to maintain a current in the inductive element substantially constant as the voltage detected across the load varies.
US09859953B2	Systems, methods, and computer program products for identifying remote computing systems Systems, methods, and computer program products are provided for using proximity sensing systems, such as Bluetooth low energy (LE) beacons, to uniquely identify remote computing systems, such as point of sale terminals. A mobile device includes an antenna, a baseband modem, and a contactless frontend, and is able to perform near-field communication transactions. The mobile device antenna receives radio communications from one or more Bluetooth LE beacons, the transmissions including data packets with a unique identifier. The mobile device calculates the signal strength of the one or more Bluetooth LE beacons at a time proximate to when a near-field communication transaction is initiated. The mobile device stores in its memory the data packet associated with the Bluetooth LE beacon broadcasting the strongest signal.
US09859952B2	Methods and apparatus relating to measurement instruments Methods and apparatus are for storing and retrieving data related to the installation, service, repair or performance of an industrial flow meter or other measurement instrument. Methods and apparatus are also for other processes associated with measurement instruments.
US09859950B2	Wireless power receiver with magnetic data transaction capability A transmitter/receiver that includes a wireless power receiving mode and a data transmission mode. In the wireless power receiving mode, the transmitter/receiver receives wireless power through and coil and provides power to a load. In data transmission mode, the transmitter/receives drives the coil according to data to transmit data.
US09859948B2	Spread spectrum communication device A microprocessor includes a memory, an input/output port and a switch controller. Transmission data, a spread code and an inverted code are stored in the memory. The switch controller generates a spread spectrum signal by calling up either of the spread code or the inverted code in accordance with a bit of the transmission data. A switch connected to the input/output port is switched on and off based on the spread spectrum signal. In addition, an antenna is connected to the input/output port via a coupler. An oscillation circuit includes a reference oscillator and a BPF and inputs a harmonic of a reference signal to the coupler as a carrier wave.
US09859944B2	Power density matching for power amplifiers Circuits and methods related to power amplifiers. In some implementations, a bias circuit includes a reference device connectable to receive a first electrical supply level, the reference device arranged to produce an electrical bias condition using the first electrical supply level, and the reference device connectable to provide the electrical bias condition to an amplifier device connectable to a second electrical supply level. The bias circuit also includes a power density translating circuit connectable between the reference device and the amplifier device, the power density matching circuit provided to substantially set a first power density associated with the reference device and a second power density associated with the amplifier device relative to one another, the first power density being a function of the first electrical supply level and the second power density being a function of the second electrical supply level.
US09859939B2	Microscope with wireless radio interface and microscope system A microscope has a microscope control unit including at least one radio system having a wireless radio interface. The at least one radio system of the microscope control unit comprises: at least one first radio system configured to furnish at least one first radio characteristic and at least one second radio system configured to furnish at least one second radio characteristic, at least one radio system configured to furnish a first and a second radio characteristic in a predetermined time cycle, or both.
US09859935B1	HS-SCCH order recovery in multi-subscriber identity module (SIM) wireless communication devices Examples described herein relate to managing communications on a first subscription and a second subscription of a multi-Subscriber Identity Module (SIM) wireless communication device via a Radio Frequency (RF) resource, including, but not limited to, tuning the RF resource away from the second subscription to the first subscription, detecting a network-set activation state of a secondary cell associated with the first subscription, and adjusting the activation state of the secondary cell based on the network-set activation state.
US09859931B2	Receiving apparatus and signal processing method thereof A receiving apparatus is provided. The receiving apparatus may include a receiver, a PN sequence remover, and a zero padding performing unit. The receiver may be configured to receive a frame signal. The PN sequence remover may be configured to remove a first PN sequence from a first frame detected from the frame signal corresponding to a first path to generate a PN removed first frame and remove a second PN sequence from a second frame detected from the frame signal corresponding to a second path to generate a PN removed second frame. The zero padding performing unit may be configured zero pad the first PN removed frame to a size of a discrete Fourier transform (DFT) and zero pad the PN removed second frame to the size of the DFT.
US09859926B2	Systems and methods for frequency and bandwidth optimization with a single-wire multiswitch device This disclosure relates to a devices and methods related to satellite information broadcasting. Example embodiments may include frequency shifting an intermediate frequency (IF) signal down-conversion from the microwave-band. As an example, down-conversion involving local oscillators may lead to frequency drift due to varying temperature and/or humidity conditions. Correcting for the frequency drift may provide an opportunity to remove or filter excess bandwidth. Further embodiments may include receiving, in a tuning request, information about a transponder type. A frequency translation module may be adjusted based, at least in part, on the transponder type related to the IF signal being input into the frequency translation module. Such frequency-shifting and transponder-specific filtering may allow Single-Wire Multiswitch (SWM) devices to provide output signals with narrower bandwidth, which may improve signal quality, cable run length, reduce power demands, etc.
US09859925B2	Low-complexity flash memory data-encoding techniques using simplified belief propagation Technologies and implementations for encoding and storing data in a solid-state memory device with a reduced number of erasures using a simplified belief-propagation algorithm that includes a set of message-calculation rules that have a low computational complexity are generally disclosed. Additionally, technologies and implementations for decoding data and for error correction are generally disclosed.
US09859920B2	Encoder and decoder An encoder for encoding input data to generate corresponding encoded data is provided. The encoder identifies substantial reoccurrences of data blocks and/or data packets within at least a portion of the input data. The encoder then identifies, in respect of individual elements, where elements are unchanged and/or changed within the substantially reoccurring data blocks and/or data packets. Subsequently, the encoder encodes unchanged elements in the encoded data by employing at least one corresponding symbol, or at least one corresponding bit, for example a single bit, indicating an absence of change in the unchanged elements relative to corresponding elements in a reference data block and/or data packet. Moreover, the encoder encodes changed elements in the encoded data.
US09859919B2	System and method for data compression The transmission of broadcast data, such as financial data and news feeds, is accelerated over a communication channel using data compression and decompression to provide secure transmission and transparent multiplication of communication bandwidth, as well as reduce the latency. Broadcast data may include packets having fields. Encoders associated with particular fields may be selected to compress those particular fields.
US09859917B2	Enhanced data compression for sparse multidimensional ordered series data Disclosed are methods and systems for significantly compressing sparse multidimensional ordered series data comprised of indexed data sets, wherein each data set comprises an index, a first variable and a second variable. The methods and systems are particularly suited for compression of data recorded in double precision floating point format.
US09859911B1	Successive approximation register analog-to-digital converter and analog-to-digital signal conversion method thereof A successive approximation register (SAR) analog-to-digital converter (ADC) comprises a comparator for generating a comparison value according to an analog signal; a SAR, coupled to the comparator, comprises N memory units, each memory unit storing a control value and the N control values being related to the comparison value, N being an integer greater than two; and a thermometer-coded DAC, which generates the analog signal and is coupled to the comparator and the SAR. The thermometer-coded DAC comprises N capacitors. The N capacitors are respectively coupled to the N memory units. The N terminal voltages of the N capacitors are respectively controlled by the N control values.
US09859909B1	Analog to digital conversion yielding exponential results A method and system of an analog to digital conversion having an exponential result are provided. An analog input signal is received by the ramp ADC. The analog input signal is converted into an N-bit digital signal having a linear relationship with the analog input signal. An internal gated clock signal is generated based on the received first clock signal. The gated clock signal is used as an input to an M-bit register. An output of the M-bit register is multiplied by a predetermined factor. The product of the multiplication is provided as an input to the M-bit register. The output of the M-bit register provides an M-bit output having an exponential relationship with the analog input signal.
US09859907B1	Systems and methods for removing errors in analog to digital converter signal chain An analog to digital converter (ADC) system includes two signal paths in parallel with each other, where the signal paths include separate ADC circuits to separately operate on a same input signal and output separate digital signals. A difference signal is calculated as a difference of the digital signals output from the two signal paths to determine an error present in one or both of the signal paths. The error may be modulated in one or both of the signal paths and demodulated from the difference signal according to a same digital modulation pattern to compute an error compensation signal to compensate for at least one of the modulated error and a secondary error resulting from the modulation of the error.
US09859899B2	Integrated circuit device having an injection-locked oscillator A variable injection-strength injection-locked oscillator (ILO) is described. The variable injection-strength ILO can output an output clock signal based on an input clock signal. The variable injection-strength ILO can pause, restart, slow down, or speed up the output clock signal synchronously with respect to the input clock signal in response to receiving power mode information. Specifically, the variable injection-strength ILO can be operated under relatively strong injection when the input clock signal is paused, restarted, slowed down, or sped up.
US09859893B1	High speed voltage level shifter In one embodiment, a voltage level shifter includes a first NOR gate having a first input configured to receive a first input signal in a first power domain, a second input configured to receive an enable signal in a second power domain, a third input, and an output. The voltage level shifter also includes a second NOR gate having a first input configured to receive a second input signal in the first power domain, a second input configured to receive the enable signal in the second power domain, a third input coupled to the output of the first NOR gate, and an output coupled to the third input of the first NOR gate. The first and second NOR gates are powered by a supply voltage of the second power domain.
US09859890B1	Method of preventing unauthorized use of analog and mixed-signal integrated circuits A method for protecting analog or mixed signal ICIP uses adjustment requirements of analog circuits to provide an obfuscated mechanism for preventing unauthorized use of an analog or mixed-signal IC (“AIC”) by disabling the AIC until application of an adjustment signal that is within a narrow enabling subrange. Embodiments significantly increase the adjustment range beyond the enabling subrange, and/or omit AIC tuning outputs that are not required for operation of the IC. Embodiments include “clipping” circuits that render the AIC outputs unresponsive to tuning signals outside of the enabling subrange. Information regarding the enabling subrange and/or a separate enabling IC can be provided to authorized users, and/or enabling bits of a digital adjustment input can be permanently set by the ICIP owner after AIC manufacture. The ICIP can be further protected by a security feature that can be unique to each AIC, and/or by using a two-foundry production method.
US09859889B2	Ultra low voltage digital circuit and operation method thereof An Ultra Low Voltage (ULV) digital circuit includes a logic circuit comprising a plurality of logic gates and a plurality of buffered interconnects for connecting between the plurality of logic gates, a temperature sensor configured to detect a temperature of the logic circuit, and a voltage controller configured to control a driving voltage provided to the logic circuit in order to reduce a power consumption of the logic circuit based on the detected temperature. Each of the plurality of logic gates and buffered interconnects reduces a signal delay as a temperature increases.
US09859888B2	Transmitter with feedback terminated preemphasis A transmitter is disclosed with a pull-up feedback circuit and a feedback circuit. The transmitter includes an output driver for driving an output terminal.
US09859887B2	Impedance-to-digital converter, impedance-to-digital converting device, and method for adjustment of impedance-to-digital converting device An impedance-to-digital converter is provided. A sensible impedance range of the impedance-to-digital converter is adjustable by changing magnitudes of signals inputted thereto.
US09859882B2	High voltage composite semiconductor device with protection for a low voltage device There are disclosed herein various implementations of composite semiconductor devices including a voltage protected device. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor having a first output capacitance, and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device, the LV device having a second output capacitance. A ratio of the first output capacitance to the second output capacitance is set based on a ratio of a drain voltage of the normally ON III-nitride power transistor to a breakdown voltage of the LV device so as to provide voltage protection for the LV device.
US09859880B2	Delay cell and delay line having the same A delay cell includes first through fifth inversion circuits. The first inversion circuit inverts an input signal, and an output electrode of the first inversion circuit is coupled to a first node. The second inversion circuit is turned on in response to a control signal, and inverts the input signal when turned on. An output electrode of the second inversion circuit is coupled to the first node. The third inversion circuit inverts a signal at the first node, and an output electrode of the third inversion circuit is coupled to a second node. The fourth inversion circuit is turned on in response to the control signal, and inverts the signal at the first node when turned on. An output electrode of the fourth inversion circuit is coupled to the second node. The fifth inversion circuit inverts a signal at the second node to generate an output signal.
US09859879B2	Method and apparatus to clip incoming signals in opposing directions when in an off state A MOSFET active-disable switch is configured to clip an incoming signal in opposing directions when in an off state. By one approach the clipping is symmetrical and accordingly the switch clips both positive and negative peaks of the incoming signal. In many application settings it is useful for the clipping to serve to decrease a predetermined kind of resultant distortion such as even order distortion. In the on state this MOSFET active-disable switch is configured to not clip the incoming signal in opposing directions.
US09859876B1	Shared keeper and footer flip-flop An apparatus is provided which comprises: a clock node; a first inverter having an input coupled to the clock node; a data node; a master latch with a shared p-type keeper coupled to an output of the first inverter, the master latch coupled to the data node; and a slave latch coupled to an output of the master latch, the slave latch having a shared p-type keeper and a shared n-type footer, wherein the shared p-type keeper and the shared n-type footer of the slave latch are coupled to the clock node and the input of the first inverter.
US09859875B2	Latch and frequency divider A latch and a frequency divider are provided. The latch includes: a first logic unit coupled between a power supply and a ground wire, wherein the first logic unit includes a first input terminal and a first output terminal; a second logic unit having a structure symmetrical to that of the first logic unit, wherein the second logic unit includes a second input terminal and a second output terminal; and a first feedforward control unit adapted for cutting off a first current path, wherein the first feedforward control unit includes a first clock signal input terminal adapted for receiving a first clock signal, a third output terminal coupled to the first output terminal, and at least two feedforward control terminals, at least one of which is coupled to the first input terminal or the second input terminal. Power consumption of the latch and the frequency divider can be reduced.
US09859873B2	Minimization of bias temperature instability (BTI) degradation in circuits A circuit structure is provided. The circuit structure includes first pfet device. The circuit structure further includes a first nfet device connected to the pfet device. The circuit structure further includes a keeper nfet device that reduces stress associated with the first nfet device by keeping the first nfet device off during its functional state. The circuit structure further includes a keeper pfet device that reduces stress associated with the first pfet device by keeping the first pfet device off during its functional state.
US09859870B2	Control facility with adaptive fault compensation A control facility for controlling a controlled system experiencing a disturbance includes a front nodal point receiving a target value and an actual value outputted by the controlled system and supplying a difference value corresponding to a difference between the target value and the actual value to a compensation circuit. The compensation circuit supplies a frequency-filtered and time-delayed signal formed as the sum of the weighted difference value and a weighted feedback signal as an input to a controller for the controlled system. The sum of a filter delay time and of first and second propagation delays is an integer multiple of the cycle duration of the disturbance, and a sum of the filter delay time and the first propagation delay is an integer multiple of the cycle duration minus a propagation time, which elapses until a change in the target value causes a change in the actual value.
US09859869B1	Output circuit using calibration circuit, and semiconductor device and system including the same A semiconductor device may include a calibration circuit and an output circuit. The calibration circuit may generate a calibration code by performing an impedance calibration operation, and may generate a correction calibration code by inverting or maintaining logic levels of the calibration code based on the calibration code. The output circuit may generate an output signal based on an input signal and the correction calibration code.
US09859867B2	Tunable LC filter An inductor-capacitor (LC) filter designed to comply with EMC (Electromagnetic Compatibility) standards comprises capacitors; switches for coupling capacitors; differential-mode inductors for coupling capacitors and switches; and common-mode inductors or a combination of differential-mode inductors and common-mode inductors, where an input signal changes the inductance of differential-mode inductors in the LC filter to modify a frequency response of the LC filter. In the LC filter, differential-mode inductors further comprise identical multiple-winding inductors, and the input signal, which biases the plurality of differential-mode inductors, includes a DC signal or a combination of DC and AC signals. A corner-frequency of the LC filter is adjusted and approximated as: fc=1/(2×pi×sqrt(L×C)), where fc is the corner-frequency, L is a composite value of inductance, and C is a composite value of capacitance.
US09859866B2	Switching power supply, EMI filter, common mode inductor and wrapping method for the common mode inductor The present disclosure provides a switching power supply, an EMI filter, a common mode inductor and a wrapping method for the common mode inductor. The common mode inductor includes: a magnetic core; two multilayered coil windings symmetrically wrapped around the magnetic core; and two isolation gaps each of which is formed in respective one of the two multilayered coil windings, and is configured to divide, by beginning from a first layer, the respective one of the multilayered coil windings into two wrapping areas.
US09859864B2	Noise filter and harness A noise filter includes a filter device and a filter retainer. The filter device includes a device unit having at least one capacitor provided therein, an input side lead wire extending from the device unit, an output side lead wire extending from the device unit, and a ground connection portion provided on the device unit. The filter device forms the noise filter that uses a mutual inductance between the input side lead wire and the output side lead wire. The filter retainer has a holding structure configured to maintain an arrangement of the input side lead wire and the output side lead wire. The arrangement forms an overlapping section in which the lead wires are closely opposed to each other. The noise filter may be attached to a harness.
US09859863B2	RF filter structure for antenna diversity and beam forming Radio frequency (RF) front-end circuitry that includes control circuitry and an RF filter structure that includes a plurality of resonators are disclosed. In one embodiment, a first tunable RF filter path is defined by a first set of the plurality of resonators such that the first tunable RF filter path has a first amplitude and a first phase. A second tunable RF filter path is defined by a second set of the plurality of resonators such that the second tunable RF filter path has a second amplitude and a second phase. To provide antenna diversity and/or beam forming/beam steering, the control circuitry is configured to set a first amplitude difference between the first amplitude and the second amplitude to approximately a first target amplitude difference and set a first phase difference between the first phase and the second phase to approximately a first target phase difference.
US09859862B2	Gain peaking techniques in high-frequency passive low pass filters Techniques to maintain gain flatness in the frequency response of a passband signal over a circuit chain. The techniques may be employed in the receive chain of a millimeter wave band wireless receiver, in the transmit chain of a millimeter wave band wireless transmitter, or in both the receive chain and the transmit chain of a millimeter wave band wireless transceiver. The techniques include mismatching the input and output impedance of a passive low pass filter used in the chain to peak the gain of the passband signal at or near the cutoff frequency (Fc) of the filter.
US09859860B1	Compressor system with EQ The utility model provides a compressor system with an equalizer (EQ). The compressor system includes a signal input device in signal communication with the EQ and a compressor. The compressor system further includes a signal output device in signal communication with the compressor. The compressor includes a signal detection module. In the system, an electrical level threshold of a full-band audio signal is setup in the compressor, and the value of electrical level of the input signal is detected by the signal detection module. After comparison of electrical level threshold and the value of electrical level, the system determines whether the compressor is activated or deactivated. The system can achieve the technology effect of effectively compressing and limiting the audio signal of a different frequency.
US09859855B2	Class-D amplifiers and methods A Class-D amplifier includes an analog-to-digital converter (ADC) having a first input node. The ADC receives a first analog input signal and a first feedback signal at the first input node and generates a first digital signal based on the first analog input signal and the first feedback signal. A digital filter generates a second digital signal based on the first digital signal. An output circuit includes a first output node, the output circuit being configured to generate a first output signal at the first output node based on the second digital signal. A first feedback unit generates the first feedback signal as the first output signal scaled by a gain factor having a constant value in the Z-domain.
US09859848B2	Variable voltage generation circuit and memory device including the same A variable voltage generation circuit includes a first amplification circuit and a second amplification circuit. The first amplification circuit generates a first output voltage based on a reference voltage, a first feedback voltage, a temperature-varied voltage and a temperature-fixed voltage such that the first output voltage is varied in a first voltage range according to a variation of the operational temperature. The first amplification circuit generates the first feedback voltage based on the first output voltage. The second amplification circuit generates a second output voltage based on the first feedback voltage, a second feedback voltage, the temperature-varied voltage and the temperature-fixed voltage such that the second output voltage is varied in a second voltage range wider than the first voltage range according to the variation of the operational temperature. The second amplification circuit generates the second feedback voltage based on the second output voltage.
US09859846B2	Apparatus and methods for capacitive load reduction in a mobile device Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a mobile device includes a supply control circuit that controls a voltage of a supply network, a plurality of radio frequency circuits that receive power from the supply network and are selectively enabled by a plurality of enable signals, a plurality of switchable capacitors electrically connected to the supply network, a plurality of field-effect transistors operatively associated with the plurality of switchable capacitors, and a bias control circuit that generates a plurality of control signals that bias the plurality of field-effect transistors based on a state of the plurality of enable signals. Each of the plurality of control signals are operable to selectively bias a corresponding one of the plurality of field-effect transistors in a cutoff mode to provide high impedance or as a dampening resistor to suppress oscillations.
US09859843B2	Device for controlling a capacitor having an adjustable capacitance A first capacitor has a capacitance adjustable to a set point value by application of a bias voltage. A second capacitor also has a capacitance adjustable to a set point value by application of a bias voltage. The first and second capacitors are arranged to receive the same bias voltage generated by a control circuit. The control circuit receiving the set point value as an input and generates that bias voltage in response to a quantity representative of a capacitance of the second capacitor.
US09859842B2	Device and method for testing a concentrated photovoltaic module The disclosure relates to a device and method for testing a concentrated photovoltaic module comprising a plurality of sub-modules, which comprises: light sources; and parabolic mirrors coupled with the light sources so as to reflect the light from each source in quasi-collimated light beams toward the module to be tested, perpendicular to the module. Each light source comprises: an optical system comprising two parallel lenses on either side of a diaphragm; a lamp on an optical axis of the optical system; a reflector arranged on the axis, on the side opposite the optical system relative to the lamp, and translatably movable along the axis; and a housing containing the optical system, the lamp and the reflector and including an outlet opening for the light beam on the axis.
US09859837B2	Negative voltage protection system for reducing an intensity of negative voltage A negative voltage protection system includes a negative voltage comparison circuit, a signal processing circuit, a driving circuit, a driving output circuit, a power device, and a coil module. When the coil module generates a back electromotive force, the coil module outputs a negative voltage. When an intensity of the negative voltage detected by the negative voltage comparison circuit is greater than a predetermined value, the signal processing circuit generates a control signal to the driving circuit. The driving circuit controls the driving output circuit and the power device to reduce the intensity of the negative voltage according to the control signal.
US09859834B2	Slack compensator A slack compensator includes a stator fixedly attachable to a base and a shuttle. The shuttle is selectably movable from a first position on the stator to a second position on the stator. The shuttle is selectably releasably attached to the stator in the first position. The shuttle is to be permanently captured upon reaching the second position. The slack compensator is attachable to an SMA wire for removing slack that develops in the SMA wire during a plurality of break-in cycles.
US09859832B2	Multiphase electric motor control device A multiphase electric motor control device includes: a bridge circuit including phase circuits each including a high potential side switching element, a low potential side switching element, and a current detector, a PWM control unit that outputs PWM signals to the switching elements; a control unit that acquires phase current values at a timing synchronized with a triangle wave; and a current value estimation unit that estimates a phase current value of one phase based on phase current values of other phases. In a case where an ON time of the PWM signal output to the low potential side switching element of the one phase from the PWM control unit is shorter than a predetermined time, the control unit acquires the phase current values which are detected by shifting the timing by using the current detectors of at least the other phases.
US09859825B2	Centralized motor controller A centralized motor controller for receiving commands from an application system controller and for controlling operation of a plurality of independent motors. The centralized motor controller includes: a power supply; a microprocessor; and an interface circuit for motor control including at least two inverter units and two rotor position detection units. The power supply supplies power for each circuit part. The motors are controlled by the microprocessor via the interface circuit for motor control. The number of the motors is equal to or more than three, in which, at least two of the motors are permanent magnet synchronous motors in the absence of a motor controller. The permanent magnet synchronous motors are driven by the microprocessor via the inverter units, respectively. Rotor position data of the permanent magnet synchronous motors are transmitted to the microprocessor via the rotor position detection units, respectively.
US09859824B2	Drive circuit for a brushless motor having an AC/AC boost converter An AC/AC boost converter comprising input terminals, output terminals, an inductor, a bridge arm comprising a pair of bi-directional switches, a capacitor and a control circuit for controlling the switches. The bridge arm and the capacitor are connected in parallel across the output terminals. The inductor has a first end connected to one of the input terminals and a second end connected to one of an end and a junction of the bridge arm, the junction being located between the two switches. Another of the input terminals is then connected to the other of the end and the junction of the bridge arm. An AC power supply supplies an AC input voltage at the input terminals, and the control circuit controls the switches of the bridge arm such that an AC output voltage is supplied at the output terminals, the AC output voltage being greater than the AC input voltage.
US09859821B2	Motor control apparatus having a function of determining start of machine protecting operation A motor control apparatus includes: a rectifier converting AC power into DC power; a smoothing capacitor provided for a DC link; an inverter connected to the DC link and mutually converts power between DC power and AC power; an AC voltage detector detecting voltage of a power supply; a voltage amplitude calculator converting the AC voltage value into a power supply voltage amplitude value; a power failure detector detecting a state of power failure when the power supply voltage amplitude value has continued to be equal to or lower than a first threshold for a predetermined period; a DC voltage detector detecting the DC voltage of the smoothing capacitor; and, a protecting operation start determining unit notifying the inverter of the actuation of axis stoppage or axis retraction when a power failure is detected and when the DC voltage value is equal to or lower than a second threshold.
US09859820B2	Converter and method for operating same A converter having at least one converter module, which includes a primary circuit connected to a power supply, a secondary circuit connected to a load, and a DC link circuit having an intermediate circuit capacitance, is operated according to the disclosed method by controlling the primary circuit such that the intermediate circuit voltage dropping across the intermediate circuit capacitance is adjusted to a predetermined desired voltage value which depends on the direction of the power flow in the secondary circuit.
US09859815B2	Energy storage system An energy storage system including a plurality of loads each converting direct current (DC) power stored in a battery thereof into alternating current (AC) power and outputting the AC power, a plurality of slave power controllers detecting zero crossing points of AC voltage signals output from one of the plurality of loads and controlling the plurality of loads in accordance with a control signal received from a master power controller, and the master power controller controlling the plurality of slave power controllers so as to control the plurality of loads in accordance with the control signal received from the master power controller after a preset time has lapsed since the detected zero crossing point.
US09859811B2	Adjusting power consumption of a load An electronic device receives a voltage from an AC-DC adapter that is separate from the electronic device. The electronic device detects a change in the voltage from the AC-DC adapter. In response to detecting the change, the electronic device determines an amount of current from the AC-DC adapter. The electronic device adjusts a power consumption of a load in the electronic device based on the determined current.
US09859801B2	Fuel cell system in a bipolar high-voltage network and method for operating a bipolar high-voltage network A bipolar high-voltage network for an aircraft or spacecraft. The network includes at least one DC-DC converter having two unipolar input connections and two bipolar output connections as well as a reference potential connection, at least two fuel cell stacks which are coupled in series between the two unipolar input connections, and at least two discharge diodes, each connected in parallel with the output connections of one of the at least two fuel cell stacks. The DC-DC converter is operable selectively in a step-up converter mode of operation or a step-down converter mode of operation, as a function of an input voltage between the unipolar input connections.
US09859800B2	Circuit structure and method for reducing power consumption of device including active module and passive module Embodiments of the present invention disclose a circuit structure and a method for reducing power consumption of a device including an active module and a passive module. The circuit structure comprises: an active module (22) comprising a main output voltage (221) for powering a load (26) via a first current control device (222) which is configured to control a current passing through the load (26), and an passive module (24) comprising a main output voltage (241) for when the active module (22) fails, powering the load (26) via a second current control device (242) which is configured to control a current passing through the load (26). The passive module (24) further comprises an auxiliary output voltage (243) for when the passive module (24) is in a backup state, powering the second current control device (242) so as to enable the second current control device (242) to be in a switching-on state. Further, the auxiliary output voltage (243) of the passive module (24) is configured to be smaller than the main output voltage (241) of the passive module (24).
US09859794B2	Semiconductor device and motor control unit A semiconductor device includes a first switching element, a pre-driver, a coil, a second switching element and a capacitor. The first switching element is connected between a power and a load driving circuit and includes a parasitic diode having cathode adjacent to the load driving circuit. The pre-driver drives the first switching element. The coil is connected between the power and the first switching element. The second switching element includes an output terminal connected to a first connection point between the power and the coil, an input terminal connected to a second connection point between the first switching element and the pre-driver, and a control terminal connected to ground. The capacitor has one end connected to a point between the first switching element and the load driving circuit and another end connected to ground. Even when power supply voltage decreases, the semiconductor device can restrict breakage of switching element.
US09859793B2	Switched power stage with inductor bypass and a method for controlling same The disclosure relates to a method of generating an output voltage from a high input voltage and a command signal, the method comprising: providing an inductor having a first terminal and a second terminal linked to a low voltage by a capacitor, the second inductor terminal supplying the output voltage to a load, the low voltage being lower than the high input voltage; and connecting the first inductor terminal either to the high input voltage or to the inductor second terminal, as a function of the command signal.
US09859789B2	Rubber-tyred gantry crane (RTG) dual power energy saving system The present invention discloses a double-power energy saving system of rubber tire gantry crane (RTG), which is composed of a controller, a battery pack, a generator set and so on. The system changed the power supply mode of traditional RTG which is powered by a single generator set or a superposition of a generator set and a battery pack. Both the battery pack and the generator set of the system can support the RTG operations independently, forming the double-power energy saving system to improve the equipment reliability. The battery pack is used as the primary power source for RTG and the output power can be highly matched with the demanded power, which reduces the reactive loss and increases the energy efficiency. The generator set is shut down and the power is supplied by the battery pack when the electricity of the battery pack is high; the generator set is started to supply power directly for RTG when the electricity of the battery pack is low, and the surplus energy can charge the battery pack. Once the battery pack is put into operation, it will run in the best economical fuel consumption area to achieve the highest fuel efficiency. The feedback energy of RTG can be fully recovered because the charging power of the battery pack is larger than the maximum feedback energy power of RTG. It is not required to replace the original generator set of RTG when the system is applied to RTG transformations.
US09859787B2	Life of a semiconductor by reducing temperature changes therein via reactive power Provided is a system for regulating temperature change of semiconductor components within a converter. The system includes a temperature regulator in communication with at least one semiconductor within the converter and a power source, the temperature regulator comprising a controller. Also included is a peak detector in communication with at least one of the semiconductors and configured to identify a maximum temperature of each semiconductor when the semiconductor conducts high current.
US09859783B1	Voltage converter controller and voltage converter circuit A voltage converter controller, adapted to a voltage converter circuit, includes a power switch controller and a dead-time determining circuit. The power switch controller receives a PWM signal and outputs a high-side control signal and a low-side control signal accordingly to control the conduction and cut-off of a high-side power switch and a low-side power switch respectively. When the power switch controller starts to control the low-side power switch cut-off, after a first dead-time, the power switch controller starts to control the high-side power switch conducting. The dead-time determining circuit detects a current of the low-side power switch to be larger or smaller than a threshold current when the low-side power switch is conducted, and determines the first dead-time to be a first value or a second value accordingly.
US09859781B2	Vibration motor A vibration motor includes a fixed member, a vibration unit, and an elastic member. The fixed member includes a housing having a receiving space and a coil received in the receiving space and assembled with the housing. The vibration unit includes a first weight, a second weight, and a magnet sandwiched by the first and second weights. The motor further includes a positioning guiding member including a first weight guiding rail formed on the first weight, a base guiding rail formed on the bottom wall of the base, a movement rail formed cooperatively formed by the first weight guiding rail and the base guiding rail, and a plurality of rolling members received in the movement rail for restricting the vibration unit to move along the movement rail.
US09859780B2	Vibration motor A vibration motor includes a first vibrator, a second vibrator and a fixing member having a part located between the first and second vibrators. The first and second vibrators are suspended by a number of guiding members each having a guide and a spring wound around the guide. The first and second vibrators are capable of vibrating along two perpendicular directions.
US09859777B2	Axial flux switching permanent magnet machine An electric machine includes a rotor, a first and second stator, a first and second plurality of permanent magnets, a first and second winding, a third and fourth winding. The first stator and the second stator are mounted axially relative to the rotor. A first permanent magnet and a second permanent magnet of the first plurality of permanent magnets have opposite polarities. A first permanent magnet and a second permanent magnet of the second plurality of permanent magnets have opposite polarities. The first winding, the second winding, the third winding, and the fourth winding are connected in series. An absolute value of an angle offset between the first winding and the third winding and between closest poles of the first plurality of poles and the second plurality of poles is 180 electrical degrees.
US09859775B2	Method for forming a concentric winding coil A method for forming a concentric winding coil in which a coil end portion protruding from an axial end face of a stator core has a plurality of different nonlinear shapes, from a rectangular conductor wound in a predetermined number of turns, the method including forming the coil end portion into the plurality of different nonlinear shapes in one step by causing a die to make a stroke movement in a predetermined direction with respect to the rectangular conductor being set.
US09859774B2	Linear actuator A linear actuator especially for adjustable furniture comprises a spindle (16) with a spindle nut (16a) for bringing about the adjustment of the article of furniture. At the end of the spindle (16) there is a bearing (17) for mounting of this in the actuator. The spindle/spindle nut (16,16a) is driven by an electric motor (27) through a transmission (28). For preventing accidents and/or damage during the adjustment of the article of furniture the actuator is equipped with a squeeze protection based on a piezo element (22). This piezo element (22) is arranged in connection with the bearing (17) for registering the forces or deflections of the forces affecting the spindle (16). In that the piezo element (22) has a through-going hole for the spindle the mounting of the piezo element (22) is simplified and further it has turned out that a particularly good signal/noise ratio is obtained.
US09859765B2	Winding insulation structure of stator of electromagnetic motor A winding insulation structure of a stator of an electromagnetic motor is provided, in which windings are wound inside slots of a stator iron core of the electromagnetic motor formed of a stator and a rotor with an insulation member therebetween, and in which an insulation sheet insertion portion for inserting an insulation sheet is formed between the stator iron core and the insulation member on a slot opening portion side of the stator iron core.
US09859764B2	Rotary electric machine with distributed armature winding A U-phase coil that constitutes the armature winding includes four (first through fourth) small coil groups U101, U102, U201, and U202 that make approximately one round circumferentially that are formed by connecting in series in order of circumferential arrangement winding bodies that are housed in slot pairs that are separated by 360 electrical degrees. The U-phase coil is configured by consecutively or alternately connecting the four first through fourth small coil groups U101, U102, U201, and U202 in series such that two of the small coil groups that are housed in identical slots are positioned.
US09859762B2	Electric machine with pole arrangement An electric machine can include a stator, a rotor frame and a pole arrangement with: plural segment pieces disposed circumferentially around, and fastened to, the rotor frame; permanent magnet pieces positioned on inclined side edges of each segment piece; and plural pole pieces disposed circumferentially around the rotor frame and disposed alternatingly with the segment pieces. The magnet pieces are pressed between inclined side edges of the pole pieces and the inclined side edges of the segment pieces. The segment pieces, the permanent magnet pieces and the pole pieces form a closed ring around the outer surface of the rotor frame, with plural such rings being arranged after each other in an axial direction. An axial air channel can pass through the rings, and at least one radial air duct (R1, R2) between the rings.
US09859757B1	Antenna tile arrangements in electronic device enclosures A system for wireless power transmission is provided. The system comprises a speaker enclosure and a plurality of tiles positioned along the speaker enclosure. At least one of the tiles comprises an antenna and a radio frequency integrated circuit (RFIC) coupled to the antenna and the RFIC is configured to engage the antenna such that the antenna emits a plurality of wireless power waves defining a pocket of energy.
US09859756B2	Transmittersand methods for adjusting wireless power transmission based on information from receivers The embodiments described herein include a transmitter that transmits a power transmission signal (e.g., radio frequency (RF) signal waves) to create a three-dimensional pocket of energy. At least one receiver can be connected to or integrated into electronic devices and receive power from the pocket of energy. The transmitter can locate the at least one receiver in a three-dimensional space using a communication medium (e.g., Bluetooth® technology). The transmitter generates a waveform to create a pocket of energy around each of the at least one receiver. The transmitter uses an algorithm to direct, focus, and control the waveform in three dimensions. The receiver can convert the transmission signals (e.g., RF signals) into electricity for powering an electronic device. Accordingly, the embodiments for wireless power transmission can allow powering and charging a plurality of electrical devices without wires.
US09859750B2	Power distribution control apparatus, electricity storage system, and power distribution control method A power distribution control apparatus includes a power source switcher that switches a power source for supplying electric power to a plurality of load groups between a commercial power source and a battery, control circuitry that controls the power source switcher and a plurality of switches provided in power supply paths between the power source switcher and each of the load groups, and a memory that stores positions of the plurality of switches in the order of priority. When the power source switcher switches to the commercial power source and a power saving time zone in which commercial power consumption is to be reduced is reached, the control circuitry controls the switches to be in a non-conducting state, switches the power source from the commercial power source to the battery using the power source switcher, and sequentially controls the switches in a conducting state in the order of priority.
US09859748B2	Outdoor multifunctional solar energy foldable table An outdoor multifunctional solar energy foldable table includes a table plate, a foldable stand connected beneath the table plate, a vertical column for supporting the foldable stand, and table legs fixed to a lower end of the vertical column. The table plate includes an exterior frame with a control panel, an interior frame inside the exterior frame, a wireless charger positioned on a support on an internal side of the interior frame, inclined support tubes that intersect and connect to the internal side of the interior frame, fixed tubes connected to the inclined support tubes to form a framework structure, a photovoltaic chip positioned on the framework structure, a glass table plate for covering the photovoltaic chip, and a circuit cable box connected to a fixed tube. The circuit cable box includes fourth generation wireless network transmitter/receiver modules, a storage battery, a control chip, and direct current/alternating current circuits.
US09859747B2	Garment device and system having wireless charging function, and charging method using the same The embodiments herein achieve a system including a first mobile device; a second mobile device; a garment device; and a control unit. The garment device includes a first connection unit formed in a first area corresponding to a position on which the first mobile device is worn, a second connection unit formed at a position on which the second mobile device is worn, and a fabric cable electrically connected with the first connection unit and the second connection unit. Further, the control unit is configured to control one of a charging of the second mobile device from the first mobile device, and a charging of the first mobile device from the second mobile device based on a charging direction, wherein the charging direction is determined based on a battery information of one of the first mobile device and the second mobile device.
US09859741B1	Active power management A method for security and/or automation systems is described. In one embodiment, the method may include receiving, at a power adapter, power from a power supply, routing a first portion of the power received from the power supply to the doorbell unit, and routing a second portion of the power received from the power supply to both the device of the doorbell unit and the doorbell chime when the doorbell button is being actuated. In some cases, the power adapter is wired, via doorbell wiring, to at least one of a doorbell chime, a doorbell unit, and the power supply. In one example, the first portion of power is routed to power a device of the doorbell unit when a doorbell button of the doorbell unit is not being actuated.
US09859738B2	Battery system controller A battery system controller is provided which is used for a battery system including a generator, electrical loads, a lead storage battery, a high performance storage battery which has higher-power and higher-energy density, and an opening and closing switch which switches the generator and the lead storage battery, and the high performance storage battery to an electrically conducting state or an interrupted state, a terminal voltage of the high performance storage battery being controlled so as to be lower than a terminal voltage of the lead storage battery. The battery system controller includes a control unit which allows the opening and closing switch to switch from an electrically conducting state to an interrupted state on the condition that charging current flowing to the high performance storage battery is smaller than a determination value, the larger an internal resistance of the lead storage battery, the smaller the determination value is set.
US09859736B2	Battery control method based on ageing-adaptive operation window A battery control method based on ageing-adaptive operation window is provided, including: performing a multi-dimensional electrochemical impedance spectrum method to obtain a three-dimensional Nyquist-vs-SoC relation diagram; using an equivalent circuit model to analyze the Nyquist-vs-SoC diagram to obtain at least a major ageing factor; defining an operation window stress index, and based on the stress index defining a plurality of control reference points for the battery operation window; and based on the plurality of control points, performing the control of battery discharging.
US09859735B2	Supply and demand adjustment system, supply and demand adjustment method, and supply and demand adjustment program A supply and demand adjustment system, that utilizes characteristics of a supply-and-demand adjustment apparatuses and precisely matches the total supply-and-demand adjustment amount with a required adjustment amount, when adjusting supply and demand, is provided. The supply and demand adjustment system that includes a central control apparatus and one or more supply-and-demand adjustment apparatuses, the central control apparatus including, supply-and-demand-adjustment-apparatus-state-collection unit that collects information with regard to a state of each supply-and-demand adjustment apparatus, allocation band calculation unit that calculates a frequency band and an intensity of a fluctuation of supply and demand adjustment to be allocated to the supply-and-demand adjustment apparatus based on the information of the state, and a supply-and-demand-adjustment-amount-calculation-unit that calculates a supply-and-demand adjustment amount for each supply-and-demand adjustment apparatus based on the frequency band and the intensity of the fluctuation of supply and demand adjustment to be allocated to the supply-and-demand adjustment apparatus.
US09859732B2	Half bridge power conversion circuits using GaN devices GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Both the high side and the low side devices may have one or more integrated control, support and logic functions. Some devices employ electro-static discharge circuits and features formed within the GaN-based devices to improve the reliability and performance of the half bridge power conversion circuits.
US09859730B2	Mobile terminal charger and vehicle equipped with same In control means (10), a position of a mobile terminal (15) on an upper surface of a mobile terminal installation plate (6) is detected a plurality of times by a position detection coil (14) used as detection means, and when a previous detected position and a subsequent (referred to as next) detected position are the same, a charging coil (8) is moved by motors (28), (33) used as driving means to a charging position opposed to the previous detected position or the next detected position detected by the position detection coil (14), and the charging is then started.
US09859729B1	Universal cell charging station system A container has a bottom panel, left and right side panels, front and rear panels, and an open top to facilitate the removable receipt of individual objects. A lower support tray is positionable upon a recipient surface. The tray has a front edge, a rear edge, and laterally spaced side edges. An intermediate chamber has a front, a back, lateral sides, a top and a bottom. Wires have interior ends within the chamber. Each wire has an exterior end in proximity to the tray for charging electronic devices.
US09859721B2	Storage battery management device, method, and computer program product A storage battery management device manages a plurality of battery units in a storage battery system including the battery units having a plurality of battery cells and a power adjustment device connected to the battery units via respective contactors and connected to a main circuit. The storage battery management device includes a minimum value determination unit and a controller. The minimum value determination unit, from the battery units in which a difference between a maximum cell voltage and a minimum cell voltage of the battery cells forming each of the battery units is equal to or less than a certain value, determines a minimum value of the minimum cell voltage. The controller controls a cell balance process of the battery unit managed by itself, by using the minimum value of the minimum cell voltage determined by the minimum value determination unit as a cell balance target voltage.
US09859720B2	Power transmission device and wireless power transmission system In a power transmission device including a power transmission coil that is disposed to oppose an installation surface of the power transmission device on which a power receiving device is installed and that is capable of being electromagnetically coupled with the power receiving coil. A magnetic substance is disposed at least outside the power transmission coil to oppose the installation surface via the power transmission coil and to be electromagnetically coupled with the power transmission coil. A object detecting circuit detects a metal object existing at least outside the power transmission coil by supplying first AC power to the power transmission coil and detecting a change in at least one of a voltage, a current, and a frequency of the first AC power or a voltage or current of a DC component of the first AC power.
US09859719B2	Method and apparatus for wireless power transfer In accordance with an example embodiment of the present invention, an apparatus (200) comprises a wireless power transmitter (241) connectable to a power supply interface (201) and to a battery (204); power supply detection circuitry (213) configured to determine whether the power supply interface (201) is capable of powering the wireless power transmitter (241); wireless power control circuitry (220) configured to, in response to determining that the power supply interface (201) is capable of powering the wireless power transmitter (241), enable power delivery from the power supply interface (201) to the wireless power transmitter (241).
US09859714B2	Multiple input three-phase inverter with independent MPPT and high efficiency Systems, methods, and devices relating to power converters. A power conditioning system uses multiple DC/DC power converter blocks. The output of each of the converter blocks is received by an energy storage and combiner block. The output of the combiner block is then received by a DC/AC inverter. The various components of the power conditioning system are controlled by a central controller. The power semiconductors within each DC/DC converter are controlled by a subsystem of the central controller and MPPT is also provided by the central controller. Also provided for are a novel three-phase DC/AC inverter topology with reduced output ripple and a control scheme for controlling the power semiconductors in the DC/AC inverter.
US09859713B2	Parallel inverters connected to one inductor An inductor device has a plurality of inductor windings arranged on a common magnetic core and electrically connected, parallel to one another, to a common connection at one end of the inductor windings. The inductor windings are implemented by a one-part coil form arranged on the common magnetic core and comprising the common connection of the inductor windings. The inductor windings are wound around their common connection and the common magnetic core.
US09859712B2	Power electronics device, device detection method, and program According to one embodiment, there is provided a power electronics device including: a connector connected to a power line; a power controller; a connection detection processor; and a collision monitor. The power controller performs at least one of generating an electric signal to the power line and detecting an electric signal on the power line via the connector. The connection detection processor performs a connection detection process with use of the power controller to detect another power electronics device connected to the power line. The collision monitor monitors whether or not collision of electric signals occurs on the power line during the connection detection process and controls the connection detection processor according to a monitoring result of whether or not the collision of electric signals occurs.
US09859710B2	Line impedance compensation system The present invention relates to a power plant controller (23), controlling at least one electrical parameter of a wind power plant at a first point (201), the power plant controller receiving at least one measured electrical parameter at a point of measurement (204a, b), the point of measurement being different from the first point, and estimating a delta value of a difference of the at least one electrical parameter between the first point and the point of measurement, wherein estimating of the delta value is calculated based on an impedance between the point of measurement and the first point, and at least one reference value of the power plant controller, and the power plant controller controls the at least one electrical parameter on the basis of the at least one measured electrical parameter and the delta value.
US09859703B2	Method for using chemical thermodynamics to buffer the voltage of electric circuits and power systems A method for buffering the voltage of an electric system that undergoes transient voltage changes includes the step of placing a new load upon the electric system by electrically connecting at least one electrochemical device to the electric system so that electrical current flows from the electric system to the electrochemical device. Also included are the steps of causing at least one electrochemical reaction to occur within the at least one electrochemical device; varying the new load placed upon the electric system as transient voltage changes in the electric system occur; and changing the electrical current from the electric system to the electrochemical device in a manner that retards transient voltage changes in the electric system that would occur in the absence of the steps of placing, causing, and varying. The step of causing electrochemical reactions may include using water electrolysis to produce a product that is a fuel, and the method may further include producing electric power and delivering it to the electric system. The electrochemical devices used in the method may apply chemical thermodynamics to retard increasing and decreasing electric system voltage transients and cause the transient electric system voltage to remain within a pre-specified voltage range. The method may also include connecting one or more voltage support units to provide electric power.
US09859702B2	Interruption of a current A method for interrupting a current of an electrical power supply line includes integrating a supply line signal of the electrical power supply line over a predetermined time period to obtain an integrated signal, determining whether the integrated signal meets a predetermined condition, and using a current interrupting element to interrupt the current if the integrated signal meets the predetermined condition.
US09859701B2	Connection of at least four electric conductors A connection element for electrically conductive connections of at least four electric conductors. The connection element has a metallic electrode which has a cavity for merging the conductors and an opening into the cavity for each conductor. At least the outer surface of the electrode is surrounded with a paper insulation.
US09859700B2	Resilient cross arm assembly A synthetic cross arm is provided for use in structural support of conductors on utility poles in an electrical grid. The synthetic cross arm consists of a flexible housing and a cable positioned within a chamber of the flexible housing. The cable is configured to prevent pieces of the synthetic cross arm from separating, falling, or pulling down or breaking utility lines or adjacent cross arms upon a break to the synthetic cross arm. A collar is provided for connecting two cross arms in a horizontal position on a vertical utility pole. A cross arm assembly is provided that includes a collar and first and second cross arms connected thereto. The cross arm assembly is configured so that the first and second cross arms may flex, deform, and rebound, thus reducing or preventing damage to the cross arm assembly.
US09859698B2	Floor box cover A cover assembly for a floor box includes a base and a cover. The base defines a central opening for accessing the floor box. The cover is moveable with respect to the base and is sized to close the central opening. A hinge body is connected to the cover and pivotally connected to the base. A hinge pin is connected to the hinge body through an interference fit and connected to the base. A cord access opening is provided in the cover. An access door is connected to the cover and moveable between an open position and a closed position. A biasing member applies a force against the access door to retain the access door in a desired position.
US09859697B1	Watertight electrical compartment for use in irrigation devices and methods of use A watertight electrical compartment for use in an irrigation device can include a compartment body with a chamber, a sealing section mounted with one or more sealing rings, and external threads. A sealing cap mate with the sealing section and/or the sealing rings to seal the chamber. A cap retainer can be advanced over at least a portion of the sealing cap and can have internal threads to be screwed onto the external threads of the compartment body. The cap retainer can also have a stopping feature to keep the sealing cap in its sealed position. The watertight electrical compartment can be used in a wireless flow sensor assembly, a battery operated irrigation controller, and/or a battery-operated central controller device, to provide irrigation control, and/or sensor information, without the need for AC power.
US09859695B2	Insulating structure A structure for supporting a wire includes a first portion extending along a first axis. The first portion includes a body portion and an alignment portion. The alignment portion is removably coupled to the body portion. The first alignment opening extends between a first side and a second side of the alignment portion. The first side has a first surface portion and a second surface portion. The first surface portion is separated a first distance from the first axis. The second surface portion is separated a second distance from the first axis. The first distance is different than the second distance. The structure includes a second portion defining a second alignment opening through which the second portion receives the fastener. The second portion is spaced a distance from the body portion to define a wire opening into which the wire is received for support by the structure.
US09859693B2	Conveyance member removal method and device Described is a device (410) for use in removing a conveyance member from a material. The device (410) includes a displacement element (412) for being placed at least partly around a conveyance member and for displacing material as the device is advanced along a conveyance member. The device (410) also includes a driven component for receiving a driving force for driving the device through material. The device can include a coupling element (418) for coupling the device to a shaft and a material loosener (414) including a drilling element. The material loosener can be operable to loosen material ahead of the displacement element as the device is advanced along a conveyance member. The drilling element can be coupled to a first wheel (436) and the coupling element can include a second wheel (434) cooperating with the first wheel to transfer rotational movement of a shaft to the drilling element.
US09859692B1	Electric load center An electrical load center for residential and commercial buildings includes an enclosure, a cover assembly, and a panelboard. The panelboard includes an insulated base, first and second bus bars, each of the first and second bus bars having an elongated main member, a plurality of connecting members, each of which is integrally formed from an edge of the main member, and a plurality of conducting members integrally formed from each of the connecting members. The panelboard further includes at least one neutral bar. The neutral bar is preferably I-shaped and includes a generally vertical main body, and transverse upper and lower members. The transverse upper member is preferably thicker than the transverse lower member and includes an outward taper from a top surface to a bottom of the transverse upper member to provide a greater contact surface area.
US09859684B2	Grating element and external-resonator-type light emitting device A grating device includes a support substrate, an optical material layer 11 disposed on the support substrate and having a thickness of 0.5 μm or more and 3.0 μm or less, a ridge optical waveguide formed by a pair of ridge grooves in the optical material layer and having a light-receiving surface for receiving a semiconductor laser light and a light-emitting surface for emitting light having a desired wavelength, a Bragg grating 12 comprising convexes and concaves formed in the ridge optical waveguide, and a propagating portion 13 disposed between the light-receiving surface and the Bragg grating. The relationships represented by the following Formulas (1) to (4) are satisfied: 0.8 nm≦ΔλG≦6.0 nm (1); 10 μm≦Lb≦300 μm (2); 20 nm≦td≦250 nm (3); and nb≧1.8 (4).
US09859683B2	Distributed feedback semiconductor laser element A DFB laser element includes an active layer 4 having a multiple quantum well structure including a plurality of well layers 4B having different thicknesses, a diffraction grating layer 6 that is optically coupled to the active layer 4, and a pair of cladding layers with the active layer 4 and the diffraction grating layer 6 interposed therebetween. An effective refractive index of the diffraction grating layer 6 is high, and a thickness of the well layer 4B increases as a distance from the diffraction grating layer 6 increases. In this structure, it is possible to reduce dependence on temperature when the DFB semiconductor laser element is miniaturized.
US09859682B2	Luminescent diode, method for manufacturing the luminescent diode and wavelength tunable external cavity laser using the luminescent diode In a luminescent diode and a method for manufacturing the same, a planar buried heterostructure (PBH) and a ridge waveguide structure are combined, so that the luminescent diode can be operated to generate a high output of 100 mW or more at low current. Further, it is possible to reduce electro-optic loss. In addition, the luminescent diode is applied to a wavelength tunable external cavity laser, so that it is possible to provide an external cavity laser having excellent output characteristics.
US09859680B2	Shock resistant laser module Laser modules are provided having electrical connections that are resistant to damage caused by transient or higher order accelerations.
US09859678B2	Communications device with optical injection locking source and related methods A communications device may include a remote device having a first E/O modulator to modulate an optical carrier signal with an input signal having a first frequency, an optical waveguide coupled to the remote device, and a local device coupled to the optical waveguide. The local device may include an optical source to generate the optical carrier signal, a second E/O modulator to modulate the optical carrier signal with a reference signal to generate a modulated reference signal, an OIL source coupled to the second E/O modulator and to amplify the modulated reference signal, and an O/E converter coupled to the OIL source and to generate an output signal including a replica of the input signal at a second frequency based upon the reference signal.
US09859668B2	Quick one-way connection system A one-way connection system with a female connection element having a female contact mounted at one end of a first electrical cable, and a male connection element having a male contact mounted at one end of a second electrical cable. The system further includes a central unitary module with a longitudinal through-hole configured to receive the male connecting element on a first surface and the female connecting element on a second surface so that the male contact of the male connection element is aligned with the female contact of the female connection element to make an electrical connection between the two connection elements.
US09859666B1	Illuminated latch release for cable A cable connector is provided. The cable connector includes a housing with a proximal end and a distal end. The distal end is configured for insertion into a data port of a computer chassis. The proximal end is configured to receive at least one data cable. The cable connector includes a pull tab comprising an optically transparent material. The pull tab includes a body with a distal end connected to the housing and a proximal end extending past the proximal end of the housing. The pull tab includes a shank protruding from the body. The shank includes a polished surface aligned with a light output of the computer chassis when the distal end of the housing is inserted into the data port such that light from the light output enters the shank through the polished surface and is distributed through the transparent material to illuminate the pull tab.
US09859665B2	High voltage and high current power outlet According to one aspect, embodiments herein provide a power distribution device including a power outlet comprising a receptacle including an internal conductor configured to be coupled to a power source and to an external conductor inserted into the receptacle, a switch configured to provide an indication of whether the external conductor has been sufficiently inserted within the receptacle, a relay configured to form a first connection between the external conductor and the power source, a transistor configured to be coupled in parallel with the relay, to form a second connection between the external conductor and the power source, and a controller configured to determine, based on the switch, that the external conductor is being removed, in response to the external conductor being removed, control the relay to sever the first connection, and in response to opening the relay, control the transistor to sever the second connection after a predetermined delay.
US09859664B2	Medium voltage connection A medium voltage connection has: a first conductor and a second conductor electrically attached to each other; a first isolating layer arranged around the first conductor and a second isolating layer arranged around the second conductor, leaving an air gap between both isolating layers; an isolating rubber sleeve arranged between the first isolating layer and the second isolating layer to fill the air gap between the two isolating layers. A conducting layer is arranged on the first isolating layer and the rubber sleeve is provided with a conducting portion, which overlaps with the conducting layer.
US09859660B2	Memory card adapter A memory card adaptor may include a plurality of card-side terminals arranged to contact terminals of a memory card, a plurality of socket-side terminals arranged in a first direction to contact terminals of a host socket and including at least two socket-side ground terminals, wiring lines configured to electrically connect the plurality of card-side terminals to the plurality of socket-side terminals in a one-to-one correspondence, a ground frame configured to electrically connect the at least two socket-side ground terminals to each other, and a housing that accommodates the plurality of card-side terminals, the plurality of socket-side terminals, and the wiring lines. The memory card adaptor may have good electrical characteristics, and thus may be able to stably operate even during fast data transmission.
US09859659B2	Wafer connector with grounding clamp A wafer connector is disclosed in which a plurality of twin-axial wires are terminated to the tails of ground and signal terminals of the connector. Each twin-axial wire includes a pair of signal wires enclosed in a conductive sheath. A conductive grounding clamp is provided that contacts the sheaths of the twin-axial wires and holds them together as a unit to facilitate the attachment of the wires to the connector terminal tails. The clamp has two opposing halves that cooperatively define openings which receive the twin-axial wires and flat, interconnecting portions extending between the openings that provide contact points where the grounding clamp may be attached to the connector terminal tails.
US09859657B2	Connector apparatus with first and second connectors and including two latching mechanisms that enable detection of an unengaged state A connector apparatus includes first and second connectors. The first connector includes a first latching part, a second latching part, and an arm supporting the second latching part, and visible from an exterior. The second connector includes a first latched part to be latched with the first latching part, and a second latched part to be latched with the second latching part. The second connector is to be engaged with the first connector. In accordance with an advancement of the engagement between the first connector and the second connector, as the first latched part is latched by the first latching part, the second latching part is guided by the second latched part and the arm is deflected, and after the latching between the first latching part and the first latched part, as the second latched part is latched by the second latching part, the deflection of the arm is canceled.
US09859655B2	Smart plug system and method A smart plug system includes, in an embodiment, a smart plug that may be securable to an electrical outlet by way of an anti-theft device. The anti-theft device may include in an embodiment: a body securable to the electrical outlet; and a protrusion that extends from the body and which may extend into an aperture of the smart plug to secure the smart plug to the electrical outlet when the smart plug is plugged into an electrical outlet. In an embodiment, the smart plug may be configured to be customizable in appearance by including a plurality of different covers that may be secured to a face of the smart plug.
US09859650B2	Plug element with locking seal The invention relates to a plug element (2, 2′) of a plug connector (1) for a sealed electrical plug-and-socket connection extending through a hole (4) in a wall (5), having a protective housing (9, 9′), which comprises an inner chamber (46), which at least in places forms a mating plug receptacle (45) for a mating plug element (3) complementary to the plug element (2, 2′), having a locking device (11, 11′), which is actuatable from outside the protective housing (9) and may be moved from an unlocked position (T) into a locked position (R), the locking device (11, 11′) extending at least in the locked position (R) into the inner chamber (46) and overlapping the mating plug receptacle (45) at least in places, and having at least one sealing element (18, 18′) resting against the protective housing (9, 9′) at least in a final plugged-together position of the plug connector (1), by means of which sealing element the mating plug receptacle (45) may be sealed relative to the external environment of the plug connector (1). In order to provide a sealed plug connector (1) with the smallest possible dimensions, provision is made according to the invention for at least one sealing element (18, 18′) to be arranged sealingly between the protective housing (9, 9′) and the locking device (11, 11′) at least in the locked position (R).
US09859646B2	Electrical connector and method for mounting electrical connector on circuit board Provided is an electrical connector mounted on a circuit board and including: a first connection terminal whose one end is electrically connected to the circuit board; a housing for supporting the first connection terminal while having the other end of the first connection terminal surrounded by lateral walls and disposed inside the housing, and having an opening toward an upper part opposite to a bottom part where the housing makes contact with the circuit board; a second connection terminal whose one end is electrically connected to the other end of the first connection terminal and whose other end is electrically connected to an external connection terminal inserted in the electrical connector; a lid for engaging the opening of the housing and covering the other end of the first connection terminal and the second connection terminal. The lid has a penetration hole configured to ventilate the housing.
US09859645B2	Connector including a terminal retainer A connector includes a tubular connector housing inside which a terminal accommodating room is formed, a terminal that is inserted into the terminal accommodating room from behind, and a retainer that retains the terminal which is accommodated in the terminal accommodating room by being mounted to the connector housing from a direction crossing the inserting direction of the terminal, wherein the retainer is formed with a terminal contact part which is inserted from an opening, with which a wall of the terminal accommodating room of the connector housing is formed, to touch the terminal which is accommodated in the terminal accommodating room, and the terminal contact part is formed into such a shape to push the terminal toward the front side of the terminal accommodating room in a process that the retainer moves to a regular position of the connector housing.
US09859642B2	Connector and method for using connector A connector includes a first connector portion having a first contact point extending in a fitting direction and a second connector portion having a curved surface capable of inverting between a convex surface and a concave surface and a second contact point extending from the curved surface, the second contact point moving between a non-contacting position and a contacting position through inversion of the curved surface between the convex surface and the concave surface, the first connector portion being aligned with the second connector portion, with the second contact point being located at the non-contacting position, and the curved surface of the second connector portion being inverted so that the second contact point is switched to the contacting position, whereby the second contact point comes into contact with the first contact point to establish electrical connection between the first connector portion and the second connector portion.
US09859638B2	Connector A connector is disclosed. The connector comprises a housing and at least one conductive terminal received in the housing. The housing has a flange mounted on a first surface of a circuit board and a body extending through the circuit board beyond an opposite second surface of the circuit board. The body has an insertion hole. The at least one conductive terminal has a pair of resilient contact arms contacting a wire inserted through the insertion hole, a pair of solder feet soldered to the circuit board and electrically connected to the pair of resilient contact arms, and a releasing mechanism adapted to move the pair of resilient contact arms away from each other to release the wire.
US09859635B1	Electrical connector having lossy blocks An electrical connector includes a housing and plural contact modules stacked adjacent to each other and held by the housing. Each contact module includes a contact array, a dielectric holder, and lossy blocks. The contact array includes signal contacts and ground contacts arranged in alternating pairs along a length of a column. The dielectric holder surrounds and engages the signal and ground contacts along intermediate segments thereof to secure the signal and ground contacts in place. The lossy blocks are mounted to the intermediate segments of the ground contacts within the dielectric holder. Each lossy block is associated with a corresponding pair of ground contacts and engages at least one of the ground contacts in the pair. The lossy blocks are composed of a lossy material that has a greater loss tangent than a low loss material that forms the dielectric holder.
US09859633B2	Board connector A board connector has a housing (11) with legs (16) on a lower surface (13) facing a surface side of a circuit board (30). A locking portion (21) is provided on a tip end of the leg (16) and protrudes in a direction intersecting with a projecting direction from the lower surface (13) and can be locked to an underside of the circuit board (30). A base end of the leg portion (16) is defined by a displacement allowing space (25) recessed in from the lower surface (13) of the housing (11).
US09859631B2	Coaxial cable connector with integral radio frequency interference and grounding shield A coaxial cable connector for coupling a coaxial cable to an equipment port is disclosed. The coaxial cable connector comprises a tubular post, a coupler and a body. The coupler has a first end rotatably secured over the second end of the tubular post, and an opposing second end. The coupler includes a central bore extending therethrough. A portion of the central bore is proximate the second end of the coupler and adapted for engaging the equipment port. The body is secured to the tubular post and extends about a first end of the tubular post for receiving an outer conductor of the coaxial cable. A portion of at least one of the tubular post, the coupler and the body provides a spring-like force on the surface of at least one of the other of the tubular post, the coupler and the body to establish an electrically conductive path therebetween.
US09859627B2	Connection structure of terminal fitting and connection method of terminal fitting A terminal fitting includes a terminal body and a plurality of terminal connection sections. A connection terminal is connected to an electric wire. The connection terminal has a holding space defined by a pair of fastening caulking pieces provided on both side sections of the connection terminal and upper end sections of the pair of fastening caulking pieces which are folded back inwardly. A pair of caulked pieces is provided so as to stand upright on both side sections of the terminal connection section and is configured to be accommodated in the holding space. A provisional engaging mechanism that is detachably engaged with the pair of fastening caulking pieces when the pair of caulked pieces is accommodated in the holding space and is provided between the pair of caulked pieces and the pair of fastening caulking pieces.
US09859622B2	Array antenna An array antenna includes: a feed line provided on a first surface of a substrate; a plurality of antenna elements that are provided on the first surface at predetermined gap along the feed line and that are electromagnetically coupled with the feed line; and a conductor plate that is provided on a second surface of the substrate different from the first surface and that is ground for the feed line and the plurality of antenna elements, the plurality of antenna elements including a first antenna element having a shape that resonates at a first frequency and a second antenna element having a shape that resonates at a second frequency different from the first frequency.
US09859620B1	Increasing energy efficiency of a small cell antenna Increased energy efficiency of a small cell antenna is provided. Electromagnetic energy radiated outside the desired radiation pattern of a small cell antenna is wasted. An antenna is provided which includes a circular set of antenna elements having a plurality of radio-frequency (RF) reflectors positioned within and around the circumference of the set of antenna elements facing substantially outward. Each RF reflector is configured to reflect the RF signal transmitted from the ring outwardly from a corresponding antenna element at an angle with respect to the plane of the circular set of antenna elements. By adjusting the angles of the reflectors, the signal may be reflected downward toward target areas that are nearer or farther from the small cell.
US09859619B2	Segmented structure, in particular for a satellite antenna reflector, with combined rotation and translation deployment device A segmented structure includes at least two panels, a so-called main panel and a so-called secondary panel, as well as at least one deployment device configured to move the connected secondary panel into a storage position or into a deployed position. The deployment device includes a translation system provided with at least one helical geared motor configured to translate the secondary panel relative to the main panel. The translation system further includes a rotation system configured to rotate the translation system and the secondary panel connected to the translation system, relative to said main panel.
US09859617B1	Active antenna structure maximizing aperture and anchoring RF behavior An antenna methodology where a set of antennas are formed that take the shape of a mobile wireless device and can be integrated into the outer housing of the mobile device. Tuning points are integrated into the design to provide the capability to compensate for hand effects and loading while the mobile device and antenna are touched by the user. The body then becomes a part of the antenna and acts as an anchor for the poles within the matching circuit. These antennas are actively tuned based on detection criteria while dynamically tracking system performance. The structure is based on a loaded loop coupled to an isolated magnetic dipole (IMD) element. The loop is actively tuned according to design rules residing in a processor in the mobile device.
US09859616B2	Antenna-equipped film and touch panel The antenna-equipped film includes: a film base; an antenna pattern formed on the film base; and a number-of-winding setting circuit connected to the antenna pattern. The antenna pattern is formed as a plurality of linear loops. The number-of-winding setting circuit includes: first wiring connected to the antenna pattern to constitute a spiral circuit; jumper switches intervening by two each in each lap of the spiral circuit; second wiring connected to the end portion of the innermost lap of the spiral circuit and a position between the two jumper switches in each lap excluding the innermost lap and the outermost lap of the spiral circuit; third wiring connected in common to the other ends of the second wiring; and jumper switches intervening in the second wiring. The outer end of the spiral circuit and the third wiring constitute a pair of terminals.
US09859613B2	Radar sensor including a radome A radar sensor for motor vehicles includes a printed circuit board which carries the mass and antenna structures of the radar sensor, and includes a housing accommodating the printed circuit board, the housing being formed on a transmit and receive side of the radar sensor by a radome which is transparent to radar radiation, characterized in that the radome has an essentially plane wall oriented obliquely to the printed circuit board.
US09859611B2	Ultra-wideband dual-band cellular basestation antenna Ultra-wideband dual-band cellular dual-polarization base-station antennas and low-band radiators for such antennas are disclosed. The low-band radiator comprises a dipole and an extended dipole configured in a crossed arrangement, a capacitively coupled feed connecting the extended dipole to an antenna feed, and a pair of auxiliary radiating elements. The dipole comprises two dipole arms, each of approximately λ/4, for connection to the antenna feed. The extended dipole has anti-resonant dipole arms of approximately λ/2. The auxiliary radiating elements are configured in parallel at opposite ends of the extended dipole. The radiator is adapted for the frequency range of 698-960 MHz and provides a horizontal beamwidth of approximately 65 degrees. The dual-band base-station antenna comprises high-band radiators configured in at least one array and low-band radiators interspersed amongst the high-band radiators at regular intervals.
US09859608B2	Antenna module An antenna module applicable to a mobile device is provided in the present disclosure. The antenna module includes a metal frame, a circuit board surrounded by the metal frame, and an antenna portion on the circuit board. The circuit board includes a main board and a ground board placed on the main board. The antenna portion includes at least one low frequency (LF) ground point and at least one high frequency (HF) ground point arranged on the ground board, and a feed point arranged on the main board. The at least one LF ground point and the at least one HF ground point contact the metal frame; a first current path length between the feed point and the at least one LF ground point is greater than a second current path length between the feed point and the at least one HF ground point.
US09859597B2	Partial dielectric loaded septum polarizer In an example embodiment, a waveguide device comprises: a first common waveguide; a polarizer section, the polarizer section including a conductive septum dividing the first common waveguide into a first divided waveguide portion and a second waveguide divided portion; a second waveguide coupled to the first divided waveguide portion of the polarizer section; a third waveguide coupled to the second divided waveguide portion of the polarizer section; and a dielectric insert. The dielectric insert includes a first dielectric portion partially filling the polarizer section. The conductive septum and the dielectric portion convert a signal between a polarized state in the first common waveguide and a first polarization component in the second waveguide and a second polarization component in the third waveguide.
US09859593B2	Vehicle component A vehicle component (1) is provided for cooling a traction battery (101) that has at least one battery module (102) with at least one battery cell (103). The vehicle component (1) has a cooling device (2) with a duct system (3) through which a cooling medium can flow. The duct system (3) runs along the battery module (102) for absorbing heat. The battery module (102) has a first cooling duct (13) and a second cooling duct (23). The cooling device (2) is suitable and designed for charging the first and second cooling ducts (13, 23) with the coolant in parallel.
US09859590B2	Battery A battery is provided. The battery includes a positive electrode; a negative electrode; a separator between the positive and negative electrodes; a polymeric layer between the separator and one or both of the positive electrode and the negative electrode, the polymeric layer including an electrolytic solution comprising 13% by mass to 25% by mass of an electrolyte salt; and an exterior member housing the positive electrode, the negative electrode, the separator, and the polymeric layer, wherein the battery has a maximum attained temperature not higher than 100° C. based on a nail piercing safety test.
US09859586B2	Flexible secondary battery having a flexible member A flexible secondary battery includes an electrode stack assembly including a first electrode layer, a second electrode layer, and a separator between the first and second electrode layers; wherein the electrode stack assembly has a first end portion and a second end portion located opposite to the first end portion; and a fixing member fixing the first electrode layer, the separator, and the second electrode layer together; wherein the electrode stack assembly includes a fixing member region in which the fixing member is formed, the fixing member region being located between the first and second end portions of the electrode stack assembly in a first direction, and wherein the first electrode layer, the separator, and the second electrode layer are flexible at both sides of the fixing member.
US09859581B2	Fuel cell A fuel cell includes a membrane electrode assembly, a frame arranged on an outer periphery portion of the membrane electrode assembly, and a separator defining a gas flow channel between the separator and the membrane electrode assembly and between the separator and the frame. A diffuser portion which is a part of the gas flow channel, is formed between the separator and the frame. An electrode layer includes a metal porous body which is an electrode surface layer and has gas permeability. The metal porous body has at an end portion thereof, an extension part covering a region corresponding to the diffuser portion of the frame.
US09859579B2	Apparatus and method for diagnosing failure of air supply system of fuel cell system An apparatus and method for diagnosing failure of an air supply system of a fuel cell system are provided to accurately and promptly sense various fault states of an air supply system and provide such fault sensing information to a driver in advance to allow the driver to recognize the necessity of fixing the system, thus enhancing driving safety. The apparatus for diagnosing failure of an air supply system of a fuel cell system includes a flow rate sensor installed in an air supply line and configured to measure an air flow rate, a power sensor configured to measure power consumed for driving an air blower, and a controller electrically connected to the flow rate sensor and the power sensor and configured to determine whether the air supply system has a fault by using the air flow rate measured by the flow rate sensor and the power consumption measured by the power sensor.
US09859577B2	Hydrogen feed and recirculation device for fuel cell system A hydrogen feed and recirculation device for a fuel cell system supplies hydrogen from a hydrogen tank and unreacted recirculated hydrogen discharged from a stack to the stack. The hydrogen feed and recirculation device can supply hydrogen to the stack through a first nozzle when hydrogen supply pressure is low and supply the hydrogen to the stack through a second nozzle using a Coanda Effect other than the first nozzle when the hydrogen supply pressure is high to satisfy a required hydrogen supply amount through an entire operating area of the fuel cell and prevent nozzle vibration and noise generation.
US09859575B2	Humidifier, in particular for a fuel cell A humidifier is provided with a housing and a stacked unit inserted into the housing that is provided with water vapor-permeable membranes and frame parts, wherein the frame parts are stacked on each other and the water vapor-permeable membranes are arranged between the frame parts, respectively, so that the water vapor-permeable membranes are stacked on top of each other and are spaced apart from each other. The housing has supports that hold the stacked unit. The supports and the frame parts are connected to each other by a connection that is made of laterally projecting connecting tabs and a receiving groove extending in vertical direction, wherein the connecting tabs engage the receiving groove.
US09859573B2	Membrane electrode assembly with integrated frame and fuel cell Disclosed is a membrane electrode assembly provided with a polymer electrolyte membrane; a catalyst layer (A) which is laminated onto one surface of the polymer electrolyte membrane; a gas diffusion layer (A) which is laminated onto the catalyst layer (A); a catalyst layer (B); and a gas diffusion layer (B). The outer circumferential section of the catalyst layer (A) is the membrane electrode assembly with an integrated frame which comprises a membrane electrode assembly that protrudes from the gas diffusion layer (A) and a frame adhered to the outer circumferential section of the catalyst layer (A), whereby said frame surrounds the edge of the membrane electrode assembly. The surface that is adhered to the frame in the outer circumferential section of the catalyst layer (A) comprises a plurality of cracks.
US09859571B2	Activation and operation mode system for an electro chemical battery for the propulsion of marine, in particular submarine means An activation and operation mode system for an electrochemical battery for the propulsion of marine craft, in particular for torpedoes; the system being equipped with an inlet valve for the inflow of water from the outside environment, a flow rate regulator of the flow input through the inlet valve, an outlet valve for the outflow of the liquids and gases produced by the chemical reaction, and a mode valve movable from a discharge position, in which the fluid produced by the chemical reaction is conveyed to the outlet valve, and a recirculation position, in which said fluid is made to recirculate through the electrochemical cells of the battery; the inlet valve, the outlet valve, the flow rate regulator and the mode valve being grouped in a single external body so as to define a compact monolithic assembly.
US09859570B2	Electronic apparatus and associated methods An apparatus comprising an insulating substrate (101); at least two charge collectors (102, 103) spaced apart on the substrate (101) surface; a proton-generating electrode layer (104) configured to generate proton charge carriers; a proton-accepting electrode layer (105) configured to accept the generated proton charge carriers, wherein each of the proton-generating electrode layer (104) and proton-accepting electrode layer (105) are configured to be electrically connected to a different one of the respective charge collectors (102, 103), and to overlap in a junction region such that the charge carriers of the layers can be transferred between the proton-generating (104) and proton-accepting (105) electrode layers to thereby generate a voltage.
US09859569B2	Method and device for manufacturing film-wrapped electrical device Provided is a method for manufacturing a film-wrapped electrical device, including: a first injection step of depressurizing, to a given pressure lower than atmospheric pressure, the inside of an injection chamber (2) in which a bag-shaped laminate film wrapping member (29) is placed, the laminate film wrapping member (29) having an opening portion (29a) and housing an electrode assembly (21′) including a positive electrode and a negative electrode stacked with a separator therebetween, and injecting part of a predetermined injection amount of an electrolyte solution (20) into the wrapping member (29) through the opening portion (29a); and a second injection step of, after the first injection step, pressurizing the inside of the injection chamber (2) to a pressure higher than the given pressure and injecting the rest of the predetermined injection amount of the electrolyte solution (20).
US09859568B2	Fuel cell electrode and method for manufacturing membrane-electrode assembly using the same The present invention provides a fuel cell electrode, which has increased physical and chemical durability, and a method for manufacturing a membrane-electrode assembly (MEA) using the same. According to the present invention, the fuel cell electrode is manufactured by controlling the amount of platinum supported on a first carbon support used in an anode to be smaller than that used in a cathode to increase the mechanical strength of a catalyst layer and maintain the thickness of the catalyst layer after prolonged operation and by adding carbon nanofibers containing a radical scavenger to a catalyst slurry to decrease deterioration of chemical durability.
US09859566B2	Rechargeable secondary battery A rechargeable secondary battery including: a case; an electrode assembly accommodated in the case, the electrode assembly including an active material coating portion and an active material non-coating portion; a light absorbing member coupled to the electrode assembly; and a collector plate welded to the electrode assembly and contacting the active material non-coating portion.
US09859564B2	Positive electrode for nonaqueous electrolyte secondary batteries, and nonaqueous electrolyte secondary battery A positive electrode for nonaqueous electrolyte secondary batteries having a positive electrode current collector and a positive electrode mixture layer that is formed on the positive electrode current collector. The positive electrode for nonaqueous electrolyte secondary batteries is: the positive electrode mixture layer comprises a first mixture layer that contains a positive electrode active material and a reaction inhibitor which inhibits a thermal reaction between the positive electrode active material and a nonaqueous electrolyte, and a second mixture layer that contains the positive electrode active material; the positive electrode is obtained by sequentially laminating the positive electrode current collector, the first and the second mixture layer in this order; and the concentration of the reaction inhibitor contained in the positive electrode mixture layer is high in the vicinity of the positive electrode current collector in comparison to that in the surface layer portion of the positive electrode mixture layer.
US09859556B2	Hydrogen absorption alloy powder, negative electrode, and nickel-hydrogen secondary cell Hydrogen storage alloy powder, an anode, and a nickel-hydrogen rechargeable battery are provided, which are excellent in low-temperature characteristics and both in initial activity and cycle life at the same time, which properties are trading-off in conventional nickel-hydrogen rechargeable batteries. The alloy powder has a composition represented by formula (1) R1-aMgaNibAlcMd (R: rare earth elements including Sc and Y, or the like; 0.005≦a≦0.40, 3.00≦b≦4.50, 0≦c≦0.50, 0≦d≦1.00, 3.00≦b+c+d≦4.50), and has an arithmetical mean roughness (Ra) of the powder particle outer surface of not less than 2 μm, or a crushing strength of not higher than 35,000 gf/mm2.
US09859548B2	Shared control of thermistor and dual purpose thermistor line A battery pack can include a temperature sensor that can provide an output that is indicative of a temperature associated with the battery pack. A battery management unit can directly measure the temperature sensor when the battery pack is by itself or engaged with a tool. A charger can directly read the temperature sensor when the battery pack is engaged with the charger. Thus, the temperature sensor can be shared by the battery pack and the charger. The battery pack can utilize a same terminal that provides access to the temperature sensor to indicate a stop-charge signal. The charger can read the stop-charge signal on the same terminal used to directly access the temperature sensor.
US09859545B2	Power supply device A power supply device includes: a battery assembly including stacked battery cells and electrodes of the battery cells, the electrodes of the adjacent battery cells being arranged to face each other; a connecting portion of an electric wire for voltage detection directly connected to a pair of the electrodes of the adjacent battery cells arranged to face each other; and an insulating block body disposed on a side on which the electrodes of the battery assembly project, including the electric wire for voltage detection wired in the insulating block body, and configured to hold the connecting portion of the electric wire for voltage detection.
US09859542B2	Battery element, a battery and a method for forming a battery A battery element includes a substrate with a plurality of trenches extending into the substrate. At least a part of each trench of the plurality of trenches is filled with a solid state battery structure. Further, the battery element includes a front side battery element electrode arranged at a front side of the substrate and electrically connected to a first electrode layer of the solid state battery structures within the plurality of trenches. Additionally, the battery element includes a backside battery element electrode arranged at a backside of the substrate and electrically connected to a second electrode layer of the solid state battery structures within the plurality of trenches.
US09859541B2	Rechargeable lithium battery and method of fabricating same In an aspect, a rechargeable lithium battery that includes a positive electrode; negative electrode; a separator interposed between the positive electrode and the negative electrode and including a porous substrate and a coating layer formed on at least one side of the porous substrate; and an electrolyte including a lithium salt, a non-aqueous organic solvent, and an additive is provided.
US09859540B2	Separator and nonaqueous electrolyte battery A separator is provided and includes a functional resin layer containing a resin material and an inorganic oxide filler, having a porous interconnected structure in which many pores are mutually interconnected and having a contact angle against an electrolytic solution of not more than 11 degrees.
US09859536B2	Nonaqueous electrolyte battery including a sealed case, battery pack and storage battery apparatus A nonaqueous electrolyte battery of the embodiment includes: an electrode group; a pair of electrode leads connected electrically to the positive electrode and the negative electrode of the electrode group; a battery case comprising an electrode group-housing part which houses the electrode group, a terminal-housing part which communicates with the electrode group-housing part and houses the respective electrode leads, and a welded sealing part which seals the electrode group-housing part and the terminal-housing part, wherein a through hole exposing a part of the respective electrode leads is formed on the terminal-housing part; and a resin sealant which seals a space between the terminal-housing part and the electrode leads exposed by the through hole, wherein the resin sealant is circularly provided in the through hole along the peripheral part of the through hole and is formed of a resin composition having a coefficient of thermal expansion within 8-50 (×10−6/K) at 0° C. to 100° C.
US09859531B2	Alkaline and non-aqueous proton-conducting pouch-cell batteries Provided are sealed pouch-cell batteries that are alkaline batteries or non-aqueous proton-conducing batteries. A pouch cell includes a flexible housing such as is used for pouch cell construction where the housing is in the form of a pouch, a cathode comprising a cathode active material suitable for use in an alkaline battery, an anode comprising an anode active material suitable for use in an alkaline battery, an electrolyte that is optionally an alkaline or proton-conducting electrolyte, and wherein the pouch does not include or require a safety vent or other gas absorbing or releasing system as the anode active material and the cathode active material do not increase the internal atmospheric pressure any more than 2 psig during cycling. The batteries provided function contrary to the art recognized belief that such battery systems were impossible due to unacceptable gas production during cycling.
US09859526B2	Flexible display device A flexible display device includes: a flexible substrate; a display unit on the flexible substrate and including a display area capable of displaying an image; and a thin film encapsulating layer encapsulating the display unit and including at least one inorganic encapsulating film and at least one organic encapsulating film, where the organic encapsulating film includes at least one first organic region including a first organic material and at least one second organic region including a second organic material that is different from the first organic material, and the at least one first organic region extends in a first direction, the at least one first organic region and the at least one second organic region are aligned with each other, and a first Young's modulus of the at least one first organic region is different from a second Young's modulus of the least one second organic region.
US09859524B2	Optoelectronic component and method for producing an optoelectronic component Various embodiments may relate to an optoelectronic component, including an optically active region formed for taking up and/or for providing electromagnetic radiation, at least one first contact structure, wherein the optically active region is electrically conductively coupled to the first contact structure, and an encapsulation structure with a second contact structure, wherein the encapsulation structure is formed on or above the optically active region and the first contact structure, and an electrically conductive structure formed for electrically conductively connecting the first contact structure to the second contact structure, wherein the encapsulation structure is at least partly formed by an electrically insulating molding compound, wherein the electrically insulating molding compound at least partly surrounds the electrically conductive structure.
US09859520B2	Organic light-emitting display device and method of manufacturing the same Provided are an organic light-emitting display device and method of manufacturing the same. An organic light-emitting display device includes: a thin-film transistor on a substrate, an auxiliary electrode member in a contact area on the substrate, the auxiliary electrode member being spaced apart from the thin-film transistor, an insulating member on the thin-film transistor and the auxiliary electrode member, the insulating member including an opening through which at least a part of the auxiliary electrode member is exposed in the contact area, and an organic light-emitting element on the insulating member, the organic light-emitting element including: an anode, an organic light-emitting layer, and a cathode, wherein a side surface of the opening is disposed closer to the inside of the opening than a side surface of the auxiliary electrode member, such that the cathode is in contact with the auxiliary electrode member without a reverse-tapered partitioning wall thereover.
US09859519B2	Organic light emitting display device An organic light emitting display device comprises first and second electrodes facing each other on a substrate; and three emission portions arranged between the first electrode and the second electrode, wherein at least one among the three emission portions includes two emitting layers, and the first, second and third emission portions being collectively configured as a TOL-FESE (Thickness of Organic Layers between the First Electrode and the Second Electrode) structure in which thicknesses of organic layers between the first electrode and the second electrode are different from one another, each organic layer having a specified thickness that provides the organic light emitting display device having the TOL-FESE structure with improved red efficiency or blue efficiency and minimized color shift rate with respect to a viewing angle, when compared to an organic light emitting display device that lacks the TOL-FESE structure.
US09859518B2	Organic light-emitting device An organic light-emitting device includes a first electrode and a second electrode, a first organic emission layer disposed between the first electrode and the second electrode and comprising a first dopant, and a second organic emission layer disposed between the first electrode and the second electrode and comprising a second dopant. The maximum luminescence wavelength of the first dopant may be larger than the maximum luminescence wavelength of the second dopant. The difference between the maximum luminescence wavelength of the first dopant and the maximum luminescence wavelength of the second dopant is 10 nm or less.
US09859510B2	Organic electroluminescent materials and devices Novel ligands for metal complexes containing five-membered ring fused on pyridine or pyrimidine ring combined with partially fluorinated side chains exhibiting improved external quantum efficiency and lifetime are disclosed.
US09859504B2	Diamine compounds for phosphorescent diazaborole metal complexes and electroluminescent devices The present disclosure generally relates to diamine compounds, which may be used as precursors in preparing diazaborole compounds and phosphorescent diazaborole metal complexes. The present disclosure also relates to diazaborole compounds, diazaborole metal complexes, and electroluminescent emission materials and electronic devices thereof. The present disclosure further relates to processes for preparing the diamine compounds and diazaborole metal complexes.
US09859500B2	Formation of carbon nanotube-containing devices A method of fabricating a carbon nanotube based device, including forming a trench having a bottom surface and sidewalls on a substrate, selectively depositing a bi-functional compound having two reactive moieties in the trench, wherein a first of the two reactive moieties selectively binds to the bottom surface, converting a second of the two reactive moieties to a diazonium salt; and reacting the diazonium salt with a dispersion of carbon nanotubes to form a carbon nanotube layer bound to the bottom surface of the trench.
US09859499B2	Polymer comprising an unsymmetric diarylaminofluorene unit A polymer comprising one or more optionally substituted repeat units of formula (I): (I) wherein each Ar1 independently represents a substituted or unsubstituted aromatic or heteroaromatic group; each Ar2 independently represents a substituted or unsubstituted aromatic or heteroaromatic group; n and m in each occurrence is at least 1; and R1 and R2 are substituents wherein R1 and R2 are different.
US09859494B1	Nanoparticle with plural functionalities, and method of forming the nanoparticle A nanoparticle includes a cuboid base including a semiconductor material, and a plurality of surfaces formed on the base and including a plurality of functionalities, respectively.
US09859493B2	Variable resistance memory device and method of manufacturing the same A variable resistance memory device and a method of manufacturing the same are provided. The variable resistance memory device may include a multi-layered insulating layer formed on a semiconductor substrate, on which a lower electrode is formed. The multi-layered insulating layer may include a first hole and a second hole, concentrically formed therein, to expose the lower electrode, wherein a diameter of the first hole is larger than a diameter of the second hole. A variable resistance material layer may be formed in the second hole to contact the lower electrode, and an upper electrode may be formed in the first hole to contact the variable resistance material layer.
US09859490B2	Electronic device including a semiconductor memory having multi-layered structural free layer This technology provides an electronic device. An electronic device in accordance with an implementation of this document includes semiconductor memory, and the semiconductor memory includes a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer interposed between the pinned layer and the free layer, wherein the free layer includes: a first ferromagnetic material; a second ferromagnetic material having a coercive force smaller than that of the first ferromagnetic material; and an amorphous spacer interposed between the first ferromagnetic material and the second ferromagnetic material.
US09859485B1	Method for packaging thermoelectric module A method for packaging a thermoelectric module may include thermoelectric module accommodation, of accommodating at least one thermoelectric module in a housing having a base and a sidewall, electric wire sealing, of sealing an electric wire of the thermoelectric module with a sealing tube, bonding member interposing, of placing a cover having a top portion and a sidewall on top of the housing and interposing a bonding member between the sidewall of the housing and the sidewall of the cover, and bonding, of bonding the sidewall of the housing and the sidewall of the cover that are hermetically sealed by the bonding member, in which the bonding member may be formed of a resin material.
US09859484B2	Light emitting apparatus A ceramic insulating film (150) having a heat conducting property and a light reflecting property is formed on a front surface of a substrate (100), and a light emitting element (110) is provided on the ceramic insulating film. This makes it possible to improve a heat dissipation characteristic and a light utilization efficiency of a light emitting apparatus (10) having the light emitting element (101) provided on the substrate (110).
US09859483B2	Flip-chip light emitting diode and method for manufacturing the same This invention relates to a flip-chip light-emitting diode and a method for manufacturing the same. The flip-chip light-emitting diode comprises a packaging body and a conductor layer. At least one light-emitting diode chip is encapsulated in the packaging body. The light emitting diode chip has a positive electrode and a negative electrode which are exposed on a side surface of the packaging body. The conductor layer is disposed on the side surface of the packaging body and directly in contact with the positive electrode and the negative electrode of the light-emitting diode chip. The conductor layer has circuit patterns and an insulating portion insulating the positive electrode and the negative electrode of the light-emitting diode chip from each other.
US09859481B2	Light emitting device A light emitting device includes: a package equipped with a lead that has an upper surface and a lower surface, and has a metal board and a plating layer formed on a surface of the metal board, the plating layer including a first plating layer provided to an upper surface of the metal board, and a second plating layer provided to a lower surface of the metal board, the first plating layer including nickel plating layer, gold plating layer and silver plating layer, and the second plating layer including no nickel plating layer and gold plating layer, and a molded resin that holds the lead; a light emitting element mounted in the package; and a sealing member that seals the light emitting element.
US09859478B2	Light emitting device having micro epitaxial structures and manufacturing method thereof A light emitting device includes a first substrate, a second substrate and a plurality of micro epitaxial structures. The second substrate is disposed opposite to the first substrate. The micro epitaxial structures are periodically disposed on the substrate and located between the first substrate and the second substrate. A coefficient of thermal expansion of the first substrate is CTE1, a coefficient of thermal expansion of the second substrate is CTE2, a side length of each of the micro epitaxial structures is W, W is in the range between 1 micrometer and 100 micrometers, and a pitch of any two adjacent micro epitaxial structures is P, wherein W/P=0.1 to 0.95, and CTE2/CTE1=0.8 to 1.2.
US09859468B2	Small-sized light-emitting diode chiplets and method of fabrication thereof Diode includes first metal layer, coupled to p-type III-N layer and to first terminal, has a substantially equal lateral size to the p-type III-N layer. Central portion of light emitting region on first side and first metal layer includes first via that is etched through p-type portion, light emitting region and first part of n-type III-N portion. Second side of central portion of light emitting region that is opposite to first side includes second via connected to first via. Second via is etched through second part of n-type portion. First via includes second metal layer coupled to intersection between first and second vias. Electrically-insulating layer is coupled to first metal layer, first via, and second metal layer. First terminals are exposed from electrically-insulating layer. Third metal layer including second terminal is coupled to n-type portion on second side of light emitting region and to second metal layer through second via.
US09859467B2	Optoelectronic device and method for manufacturing the same An optoelectronic device, comprising: a first semiconductor layer comprising four boundaries, a corner formed by two of the neighboring boundaries, a first surface, and a second surface opposite to the first surface; a second semiconductor layer formed on the first surface of the first semiconductor layer; a second conductive type electrode formed on the second semiconductor layer; and two first conductive type electrodes formed on the first surface, wherein the first conductive type electrodes are separated and formed a pattern.
US09859463B2	Optoelectronic semiconductor device An optoelectronic semiconductor device has a semiconductor body including a semiconductor layer sequence with an active region that generates radiation, a semiconductor layer and a further semiconductor layer, wherein the active region is arranged between the semiconductor layer and the further semiconductor layer, a current spreading layer is arranged on a radiation exit face of the semiconductor body, the current spreading layer connects electrically conductively with a contact structure for external electrical contacting of the semiconductor layer, in a plan view of the semiconductor device the current spreading layer adjoins the semiconductor layer in a connection region, and the current spreading layer includes a patterning with a plurality of recesses through which radiation exits the semiconductor device during operation.
US09859458B2	Bond and release layer transfer process Embodiments transfer thin layers of material utilized in electronic devices (e.g., GaN for optoelectronic devices), from a donor to a handle substrate. Certain embodiments employ bond-and-release system(s) where release occurs along a cleave plane formed by implantation of particles into the donor. Some embodiments may rely upon release by converting components from solid to liquid under carefully controlled thermal conditions (e.g., solder-based materials and/or thermal decomposition of Indium-containing materials). Some embodiments utilize laser-induced film release processes using epitaxially grown or implanted regions as an optically absorptive region. A single bond-and-release sequence may involve processing an exposed N-face of GaN material. Multiple bond-and-release sequences (involving processing an exposed Ga-face of GaN material) may be employed in series, for example utilizing a temporary handle substrate as an intermediary. Particular embodiments form template blanks of high quality GaN suitable for manufacturing High Brightness-Light Emitting Diode (HB-LED) devices.
US09859454B2	Photoelectric conversion device and fabrication method thereof In a thin film photoelectric conversion device fabricated by addition of a catalyst element with the use of a solid phase growth method, defects such as a short circuit or leakage of current are suppressed. A catalyst material which promotes crystallization of silicon is selectively added to a second silicon semiconductor layer formed over a first silicon semiconductor layer having one conductivity type, the second silicon semiconductor layer is partly crystallized by a heat treatment, a third silicon semiconductor layer having a conductivity type opposite to the one conductivity type is stacked, and element isolation is performed at a region in the second silicon semiconductor layer to which a catalyst material is not added, so that a left catalyst material is prevented from being diffused again, and defects such as a short circuit or leakage of current are suppressed.
US09859451B2	Thin film photovoltaic cell with back contacts Photovoltaic cells, photovoltaic devices, and methods of fabrication are provided. The photovoltaic cells include a transparent substrate to allow light to enter the photovoltaic cell through the substrate, and a light absorption layer associated with the substrate. The light absorption layer has opposite first and second surfaces, with the first surface being closer to the transparent substrate than the second surface. A passivation layer is disposed over the second surface of the light absorption layer, and a plurality of first discrete contacts and a plurality of second discrete contacts are provided within the passivation layer to facilitate electrical coupling to the light absorption layer. A first electrode and a second electrode are disposed over the passivation layer to contact the plurality of first discrete contacts and the plurality of second discrete contacts, respectively. The first and second electrodes include a photon-reflective material.
US09859450B2	CIGS/silicon thin-film tandem solar cell A method of making a CIGS/inorganic thin film tandem semiconductor device including the steps of depositing a textured buffer layer on an inexpensive substrate, depositing a metal-inorganic film from a eutectic alloy on the buffer layer, the metal being selected from a group of CIGS elements, and adding the remaining CIGS elements to the metal, thereby growing a CIGS film on the inorganic film for the tandem semiconductor device.
US09859447B2	Diode device and manufacturing method thereof A diode device and manufacturing method thereof are provided. The diode device includes a substrate, an epitaxial layer, a trench gate structure, a Schottky diode structure and a termination structure. An active region and a termination region are defined in the epitaxial layer. The Schottky diode structure and the trench gate structure are located in the active region and the termination structure is located in the termination region. The termination structure includes a termination trench formed in the epitaxial layer, a termination insulating layer, a first spacer, a second spacer and a first doped region. The termination insulating layer is conformingly formed on inner walls of the termination trench. The first and second spacers are disposed on two sidewalls of the termination trench. The first doped region formed beneath the termination trench has a conductive type reverse to that of the epitaxial layer.
US09859444B2	Semiconductor device, display device, input/output device, and electronic device A self-aligned transistor including an oxide semiconductor film, which has excellent and stable electrical characteristics, is provided. A semiconductor device is provided with a transistor that includes an oxide semiconductor film, a gate electrode overlapping with part of the oxide semiconductor film, and a gate insulating film between the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a first region and second regions between which the first region is positioned. The second regions include an impurity element. A side of the gate insulating film has a depressed region. Part of the gate electrode overlaps with parts of the second regions in the oxide semiconductor film.
US09859443B2	Field-effect transistor, and memory and semiconductor circuit including the same Provided is a field-effect transistor (FET) having small off-state current, which is used in a miniaturized semiconductor integrated circuit. The field-effect transistor includes a thin oxide semiconductor which is formed substantially perpendicular to an insulating surface, a gate insulating film formed to cover the oxide semiconductor, and a gate electrode which is formed to cover the gate insulating film. The gate electrode partly overlaps a source electrode and a drain electrode. The source electrode and the drain electrode are in contact with at least a top surface of the oxide semiconductor. In this structure, three surfaces of the thin oxide semiconductor are covered with the gate electrode, so that electrons injected from the source electrode or the drain electrode can be effectively removed, and most of the space between the source electrode and the drain electrode can be a depletion region; thus, off-state current can be reduced.
US09859441B2	Semiconductor device and method for manufacturing the same In an active matrix display device, electric characteristics of thin film transistors included in a circuit are important, and performance of the display device depends on the electric characteristics. Thus, by using an oxide semiconductor film including In, Ga, and Zn for an inverted staggered thin film transistor, variation in electric characteristics of the thin film transistor can be reduced. Three layers of a gate insulating film, an oxide semiconductor layer and a channel protective layer are successively formed by a sputtering method without being exposed to air. Further, in the oxide semiconductor layer, the thickness of a region overlapping with the channel protective film is larger than that of a region in contact with a conductive film.
US09859439B2	Semiconductor device and method for manufacturing the same To provide a transistor having highly stable electric characteristics and also a miniaturized structure. Further, also high performance and high reliability of a semiconductor device including the transistor can be achieved. The transistor is a vertical transistor in which a first electrode having an opening, an oxide semiconductor layer, and a second electrode are stacked in this order, a gate insulating layer is provided in contact with side surfaces of the first electrode, the oxide semiconductor layer, and the second electrode, and a ring-shaped gate electrode facing the side surfaces of the first electrode, the oxide semiconductor layer, and the second electrode with the gate insulating layer interposed therebetween is provided. In the opening in the first electrode, an insulating layer in contact with the oxide semiconductor layer is embedded.
US09859435B2	Thin film transistor and display substrate having the same A display substrate includes a base substrate, a semiconductor active layer disposed on the base substrate, a gate insulating layer disposed on the semiconductor active layer, a first conductive pattern group disposed on the gate insulating layer and including at least a gate electrode, a second conductive pattern group insulated from the first conductive pattern group and including at least a source electrode, a drain electrode, and a data pad. The second conductive pattern group includes a first conductive layer and a second conductive layer disposed on the first conductive layer to prevent the first conductive layer from being corroded and oxidized.
US09859432B2	Semiconductor devices having spacer protection pattern A semiconductor device may include a pair of active patterns spaced apart from each other in a first direction, a pair of gate electrodes intersecting the pair of the active patterns in a second direction crossing the first direction, gate spacers on sidewalls of the pair of the active patterns, source/drain regions on the pair active patterns between the pair of the gate electrodes, and a spacer protection pattern between the pair of the gate electrodes and between the pair of the active patterns. The spacer protection pattern may be commonly connected to the gate spacers.
US09859430B2	Local germanium condensation for suspended nanowire and finFET devices A semiconductor wafer is provided, where the semiconductor wafer includes a semiconductor substrate and a hard mask layer formed on the semiconductor substrate. Fins are formed in the semiconductor substrate and the hard mask layer. A spacer is formed on an exposed sidewall of the hard mask layer and the semiconductor substrate. The exposed portion of the semiconductor substrate is etched. A silicon-germanium layer is epitaxially formed on the exposed portions of the semiconductor substrate. An annealed silicon-germanium region is formed by a thermal annealing process within the semiconductor substrate adjacent to the silicon-germanium layer. The silicon-germanium region and the silicon-germanium layer are removed. The hard mask layer and the spacer are removed.
US09859429B2	FinFET device and method of fabricating same An integrated circuit structure includes a semiconductor substrate, and isolation regions extending into the semiconductor substrate, wherein the isolation regions have opposite sidewalls facing each other. A fin structure includes a silicon fin higher than top surfaces of the isolation regions, a germanium-containing semiconductor region overlapped by the silicon fin, silicon oxide regions on opposite sides of the germanium-containing semiconductor region, and a germanium-containing semiconductor layer between and in contact with the silicon fin and one of the silicon oxide regions.
US09859427B2	Semiconductor Fin FET device with epitaxial source/drain A semiconductor device includes a substrate, a fin structure disposed over the substrate and including a channel region and a source/drain region, a gate structure disposed over at least a portion of the fin structure, the channel region being beneath the gate structure and the source/drain region being outside of the gate structure, a strain material layer disposed over the source/drain region, the strain material layer providing stress to the first channel region, and a contact layer wrapping around the first strain material layer. A width of the source/drain region is smaller than a width of the channel region.
US09859426B1	Semiconductor device including optimized elastic strain buffer According to yet another non-limiting embodiment, a fin-type field effect transistor (finFET) including a strained channel region includes a semiconductor substrate extending along a first axis to define a length, a second axis perpendicular to the first axis to width, and a third direction perpendicular to the first and second axes to define a height. At least one semiconductor fin on an upper surface of the semiconductor substrate includes a semiconductor substrate portion on an upper surface of the semiconductor substrate, a strain-inducing portion on an upper surface of the semiconductor substrate portion, and an active semiconductor portion defining a strained channel region on an upper surface of the strain-inducing portion. A first height of the semiconductor substrate portion is greater than a second height of the strain-inducing portion.
US09859423B2	Hetero-channel FinFET A hetero-channel FinFET device provides enhanced switching performance over a FinFET device having a silicon channel, and is easier to integrate into a fabrication process than is a FinFET device having a germanium channel. A FinFET device featuring the heterogeneous Si/SiGe channel includes a fin having a central region made of silicon and sidewall regions made of SiGe. A hetero-channel pFET device in particular has higher carrier mobility and less gate-induced drain leakage current than either a silicon device or a SiGe device. The hetero-channel FinFET permits the SiGe portion of the channel to have a Ge concentration in the range of about 25-40% and permits the fin height to exceed 40 nm while remaining stable.
US09859420B1	Tapered vertical FET having III-V channel A vertical field effect transistor includes a first source/drain region formed on or in a substrate. A tapered fin is formed a vertical device channel and has a first end portion attached to the first source/drain region. A second source/drain region is formed on a second end portion of the tapered fin. A gate structure surrounds the tapered fin.
US09859419B1	Stacked-gate super-junction MOSFET A MOSFET having a stacked-gate super-junction design and novel termination structure. At least some illustrative embodiments of the device include a conductive (highly-doped with dopants of a first conductivity type) substrate with a lightly-doped epitaxial layer. The volume of the epitaxial layer is substantially filled with a charge compensation structure having vertical trenches forming intermediate mesas. The mesas are moderately doped via the trench sidewalls to have a second conductivity type, while the mesa tops are heavily-doped to have the first conductivity type. Sidewall layers are provided in the vertical trenches, the sidewall layers being a moderately-doped semiconductor of the first conductivity type. The shoulders of the sidewall layers are recessed below the mesa top to receive an overlying gate for controlling a channel between the mesa top and the sidewall layer. The mesa tops are coupled to a source electrode, while a drain electrode is provided on the back side of the substrate.
US09859417B2	High-voltage metal-oxide-semiconductor transistor and fabrication method thereof A high-voltage MOS transistor includes a semiconductor substrate, a gate oxide layer on the semiconductor substrate, a gate on the gate oxide layer, a spacer covering a sidewall of the gate, a source on one side of the gate, and a drain on the other side of the gate. The gate includes at least a first discrete segment and a second discrete segment. The first discrete segment is not in direct contact with the second discrete segment. The spacer fills into a gap between the first discrete segment and the second discrete segment.
US09859416B2	Semiconductor device having a buried electrode and manufacturing method thereof An object of the present invention is to further improve electric characteristics such as ON-resistance or an ON-breakdown voltage in a semiconductor device having a lateral MOS transistor.In a semiconductor device having a lateral MOS transistor, a buried electrode is formed at a part of an isolation insulating film located between a drain region and a gate electrode. The buried electrode includes a buried part. The buried part is formed from the surface of the isolation insulating film up to a depth corresponding to a thickness thinner than that of the isolation insulating film. The buried electrode is electrically coupled to the drain region.
US09859413B2	Nitride semiconductor device and method of manufacturing the same A nitride semiconductor device including a substrate, a channel layer, a carbon-poor barrier layer having a recess, a carbon-rich barrier layer disposed over the recess and the carbon-poor barrier layer, and a gate electrode above the recess, wherein the carbon-poor and carbon-rich barrier layers have bandgaps larger than that of the channel layer, the upper surface of the carbon-rich barrier layer includes a first main surface including a source electrode and a drain electrode, and a bottom surface of a depression disposed along the recess, and side surfaces of the depression connecting the first main surface to the bottom surface of the depression, and among edges of the depression of the carbon-rich barrier layer which are boundaries between the first main surface and the side surfaces of the depression, the edge of the depression of the carbon-rich barrier layer closest to the drain electrode is covered with the gate electrode.
US09859411B2	Field effect transistor A field-effect transistor (a GaN-based HFET) includes a gate electrode, a gate electrode pad, a first wiring line connecting one end of the gate electrode and the gate electrode pad, a second wiring line connecting the other end of the gate electrode and the gate electrode pad, and a resistance element that is connected to the first wiring line and is capable of adjusting the impedance of the first wiring line.
US09859409B2	Single-electron transistor with wrap-around gate Transistors and methods of forming the same include forming a fin having an active layer between two sacrificial layers. A dummy gate is formed over the fin. Spacers are formed around the dummy gate. The dummy gate is etched away to form a gap over the fin. Material from the two sacrificial layers is etched away in the gap. A gate stack is formed around the active layer in the gap. Source and drain regions are formed in contact with the active layer.
US09859407B2	IGBT having deep gate trench There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) with buried depletion electrode. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. The IGBT also includes a plurality of deep insulated trenches with a buried depletion electrode and at least one gate electrode disposed therein. In addition, the IGBT includes an active cell including an emitter adjacent the gate electrode, and an implant zone, situated between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type. In one implementation, the IGBT may also include a dummy cell neighboring the active cell.
US09859405B1	Heterojunction bipolar transistor An HBT includes a semiconductor substrate having first and second principal surfaces opposite each other; and a collector layer, a base layer, and an emitter layer stacked in this order on the first principal surface side of the semiconductor substrate. The collector layer includes a first semiconductor layer with metal particles dispersed therein, the metal particles each formed by a plurality of metal atoms bonded with each other.
US09859395B2	Semiconductor device with a passivation layer A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact electrode. The passivation layer includes a layer stack with an amorphous semi-insulating layer on the first surface, a first nitride layer on the amorphous semi-insulating layer, and a second nitride layer on the first nitride layer.
US09859389B1	Sidewall protective layer for contact formation A method for forming a semiconductor device comprises forming a sacrificial gate stack on a substrate, spacers adjacent to the sacrificial gate stack, and a source/drain region on the substrate. A first insulator layer is formed on the source/drain region. A portion of the first insulator layer is removed to expose portions of the spacers. Exposed sidewall portions of the spacers are removed to reduce a thickness of the exposed portions of the spacers. A protective layer is deposited over the exposed sidewalls of the spacers and a second insulator layer is deposited over the protective layer. The sacrificial gate is removed to expose a channel region of the substrate. A gate stack is formed over the channel region of the substrate. Exposed portions of the first insulator layer and the second insulator layer are removed to expose the source/drain region, and a conductive is formed on the source/drain region.
US09859387B2	Semiconductor device having contact plugs A semiconductor device includes a substrate having an upper surface, a plurality of active fins on the substrate, a gate electrode crossing the plurality of active fins, and at each side of the gate electrode, a source/drain region on the plurality of active fins. The source/drain region may include a plurality of first regions extending from the active fins, and a second region between each of the plurality of first regions. The second region may have a second germanium concentration greater than the first germanium concentration. The source/drain region may be connected to a contact plug, and may have a top surface that has a wave shaped, or curved surface. The top surface may have a larger surface area than a top surface of the contact plug.
US09859386B2	Self aligned contact scheme An embodiment is a method including forming a first gate over a substrate, the first gate having first gate spacers on opposing sidewalls, forming a first hard mask layer over the first gate, forming a second hard mask layer over the first hard mask layer, the second hard mask layer having a different material composition than the first hard mask layer, forming a first dielectric layer adjacent and over the first gate, etching a first opening through the first dielectric layer to expose a portion of the substrate, at least a portion of the second hard mask layer being exposed in the first opening, filling the first opening with a conductive material, and removing the second hard mask layer and the portions of the conductive material and first dielectric layer above the first hard mask layer to form a first conductive contact in the remaining first dielectric layer.
US09859383B2	Schottky diode with reduced forward voltage A semiconductor component includes a semiconductor body of a first conduction type and a metal layer on the semiconductor body, wherein the metal layer forms with the semiconductor body a Schottky contact along a contact surface. A doping concentration of the first conduction type on the contact surface varies along a direction of the contact surface.
US09859382B2	Integrated CMOS wafers The present disclosure relates to semiconductor structures and, more particularly, to integrated CMOS wafers and methods of manufacture. The structure includes: a chip of a first technology type comprising a trench structure on a front side; a chip of a second technology type positioned within the trench structure and embedded therein with an interlevel dielectric material; and a common wiring layer on the front side connecting to both the chip of the first technology type and the chip of the second technology type.
US09859379B2	Graphene layer transfer A method to transfer a layer of graphene from one substrate to another substrate is provided. The method includes providing a first layered structure including, from bottom to top, a copper foil, a layer of graphene, an adhesive layer and a carrier substrate. The copper foil is removed exposing a surface of the layer of graphene. Next, an oxide bonding enhancement dielectric layer is formed on the exposed surface of the layer of graphene. A second layered structure including a receiver substrate and a dielectric oxide layer is provided. Next, an exposed surface of the dielectric oxide layer is bonded to an exposed surface of the oxide bonding enhancement dielectric layer. The carrier substrate and the adhesive layer are removed exposing the layer of graphene.
US09859377B2	Isolation structure integrated with semiconductor device and manufacturing method thereof A method for manufacturing an isolation structure integrated with semiconductor device includes following steps. A substrate is provided. A plurality of trenched gates is formed in the substrate. A first insulating layer and a second insulating layer are sequentially deposited on the substrate. A first etching process is performed to remove portions of the second insulating layer to expose portions of the first insulating layer. A second etching process is then performed to remove the exposed second insulating layer to expose the trenched gates and to define at least an active region.
US09859372B2	Semiconductor device, related manufacturing method, and related electronic device A semiconductor device may include the following elements: a first doped portion; a second doped portion; an enclosing member, which encloses both the first doped portion and the second doped portion; a first barrier, which directly contacts the first doped portion; a second barrier, which directly contacts the second doped portion; a dielectric member, which is positioned between the first barrier and the second barrier and directly contacts each of the first barrier and the second barrier; a third barrier, which directly contacts the first doped portion; and a device component, wherein a portion of the device component is positioned between the dielectric member and the third barrier.
US09859370B2	Schottky barrier diode A Schottky barrier diode includes a semiconductor layer having a plurality of trenches formed by digging in from a top surface and having mesa portions formed between adjacent trenches, and a Schottky metal formed to contact the top surface of the semiconductor layer including inner surfaces of the trenches.
US09859367B2	Stacked strained and strain-relaxed hexagonal nanowires A method for forming nanowires includes forming a plurality of epitaxial layers on a substrate, the layers including alternating material layers with high and low Ge concentration and patterning the plurality of layers to form fins. The fins are etched to form recesses in low Ge concentration layers to form pillars between high Ge concentration layers. The pillars are converted to dielectric pillars. A conformal material is formed in the recesses and on the dielectric pillars. The high Ge concentration layers are condensed to form hexagonal Ge wires with (111) facets. The (111) facets are exposed to form nanowires.
US09859366B2	Process for fabricating silicon nanostructures A process for etching a substrate comprising polycrystalline silicon to form silicon nanostructures includes depositing metal on top of the substrate and contacting the metallized substrate with an etchant aqueous solution comprising about 2 to about 49 weight percent HF and an oxidizing agent.
US09859365B2	High voltage device and method for fabricating the same A high voltage device includes drift regions formed in a substrate, an isolation layer formed in the substrate to isolate neighboring drift regions, wherein the isolation layer has a depth greater than that of the drift region, a gate electrode formed over the substrate, and source and drain regions formed in the drift regions on both sides of the gate electrode.
US09859357B1	Magnetic inductor stacks with multilayer isolation layers A magnetic laminating structure and process includes alternating layers of a magnetic material and a multilayered insulating material, wherein the multilayered insulating material is intermediate adjacent magnetic material layers and comprises a first insulating layer abutting at least one additional insulating layer, wherein the first insulating layer and the at least one additional insulating layer comprise different dielectric materials and/or are formed by a different deposition process, and wherein the layers of the magnetic material have a cumulative thickness greater than 1 micron.
US09859356B2	Semiconductor integrated circuit A semiconductor integrated circuit includes an inductor and a plurality of high permeability patterns. The inductor includes one conductive loop. The high permeability patterns are disposed adjacent to the conductive loop.
US09859353B2	Semiconductor device Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.
US09859352B2	Transparent organic light emitting display device and method of manufacturing the same Disclosed is a transparent organic light-emitting display (OLED) device having improved resolution by changing the layout of sub-pixel regions in a light-emitting area. The device comprises: a substrate having a plurality of pixels, each pixel including: a light emitting area including a first sub-pixel region, a second sub-pixel region, and a third sub-pixel region; and a transmissive area through which external light passes, wherein the transmissive area is surrounded by edges of the first, second and third sub-pixel regions of the pixel; and an organic light-emitting element on thin film transistors in each of the sub-pixel regions, wherein the first sub-pixel region is arranged on a first line of the pixel extending in a first direction, the second sub-pixel region is arranged on a second line parallel to the first direction, and the third sub-pixel region is arranged on a third line extending in a second direction.
US09859350B2	Array substrate, fabrication method thereof and display device An array substrate of an organic light-emitting display device, a fabrication method thereof and an organic light-emitting display device are provided. The array substrate comprises a plurality of pixel units arranged in array, wherein, at least one of the pixel units includes: an organic light-emitting diode (40) and a first thin film transistor (20) for controlling the organic light-emitting diode (40) which are formed on a base substrate (10), wherein, the organic light-emitting diode (40) includes a first electrode (107), a second electrode (110) and a light-emitting layer (109) located between the first electrode (107) and the second electrode (110), the first electrode (107) of the organic light-emitting diode (40) being connected with a drain electrode (104) of the first thin film transistor (20); and a conductive layer (111) and an insulating layer (112) formed between the first thin film transistor (20) and the organic light-emitting diode (40), wherein, the first electrode (107) of the organic light-emitting diode (40), the insulating layer (111) and the conductive layer (112) form a capacitor, and the conductive layer (111) is connected with a first gate electrode (100) of the first thin film transistor (20). The array substrate of the organic light-emitting display device, the fabrication method thereof and the organic light-emitting display device can effectively increase a storage capacitance value of a pixel unit, so as to improve display quality.
US09859343B2	Display device A display device includes a flexible substrate having a display region including a plurality of pixels, each of the plurality of pixels having a pair of electrodes and a display element therebetween; a first electrode layer provided on the plurality of pixels; a second electrode layer provided on the first electrode layer; a third electrode layer provided on the second electrode layer; a piezoelectric material layer provided between the first electrode layer and the second electrode layer; and a flexible material layer provided between the second electrode layer and the third electrode layer.
US09859339B2	Display substrate, manufacturing method and driving method thereof, and display device A display substrate, a manufacturing method and a driving method thereof, and a display device are provided. The display substrate includes a substrate, a gate layer disposed on the substrate, a gate insulating layer disposed on the gate layer, a pixel defining layer disposed on the gate insulating layer, the pixel defining layer includes a plurality of defining regions, a light emitting layer in the defining regions of the pixel defining layer disposed on the gate insulating layer, wherein the light emitting layer includes an electron excitation layer, a light excitation layer and a hole excitation layer, and a source/drain layer disposed on the light emitting layer. According to an embodiment of the present disclosure, light emission and control of light emission can be realized merely by a three-layer structure of a gate layer, a light emitting layer and a source/drain layer, and compared with the OLED light emitting structure of the prior art, the layer structure is simpler, the light emitted is less blocked, and luminous efficiency is higher.
US09859334B2	Display apparatus A display apparatus includes a protective layer, a substrate including a non-display area adjacent to a display area, and a sub-pixel in the display area and including a conductive layer, an inorganic insulating layer on the conductive layer, an organic insulating layer on the inorganic insulating layer, and a display device connected to the conductive layer. The display apparatus further includes a power supply line including a first power supply line and a second power supply line electrically connected to the sub-pixel; and an insulating dam as at least one layer in the non-display area. The non-display area includes the insulating dam, the power supply line are placed, and a spaced area which does not include the organic insulating layer. The protective layer covers an exposed portion of the power supply line.
US09859333B2	Magnetic memory devices having a perpendicular magnetic tunnel junction A magnetic memory device may include a free magnetic structure and a reference magnetic structure that are separated from each other by a tunnel barrier. The free magnetic structure may include an exchange-coupling layer, and first and second free layers that are separated from each other by the exchange-coupling layer. The first free layer may be provided between the second free layer and the tunnel barrier. A thickness of the first free layer may be greater than a first maximum anisotropy thickness, being the thickness at which the first free layer has maximum perpendicular anisotropy. A thickness of the second free layer may be smaller than a second maximum anisotropy thickness, being the thickness at which the second free layer has maximum perpendicular anisotropy. A magnetic tunnel junction having two free layers with different thicknesses can enable a magnetic memory device that has increased MR ratio and reduced switching current.
US09859328B2	Method of manufacturing a metal-oxide-semiconductor image sensor A method for manufacturing semiconductor devices includes following steps. A substrate having a pixel region and a periphery region defined thereon is provided, and at least a transistor is formed in the pixel region. A blocking layer is formed on the substrate, and the blocking layer includes a first opening exposing a portion of the substrate in the pixel region and a second opening exposing a portion of the transistor. A first conductive body is formed in the first opening and a second conductive body is formed in the second opening, respectively. The first conductive body protrudes from the substrate and the second conductive body protrudes from the transistor. A portion of the blocking layer is removed. A first salicide layer is formed on the first conductive body and a second salicide layer is formed on the second conductive body, respectively.
US09859327B2	Optoelectronic modules that have shielding to reduce light leakage or stray light, and fabrication methods for such modules Various optoelectronic modules are described that include an optoelectronic device (e.g., a light emitting or light detecting element) and a transparent cover. Non-transparent material is provided on the sidewalls of the transparent cover, which, in some implementations, can help reduce light leakage from the sides of the transparent cover or can help prevent stray light from entering the module. Fabrication techniques for making the modules also are described.
US09859325B2	Complementary metal-oxide-semiconductor (CMOS) image sensor with silicon and silicon germanium A complementary metal-oxide-semiconductor (CMOS) image sensor with silicon and silicon germanium is provided. A silicon germanium layer abuts a silicon layer. A photodetector is arranged in the silicon germanium layer. A transistor is arranged on the silicon layer with a source/drain region that is buried in a surface of the silicon layer and that is electrically coupled to the photodetector. A method for manufacturing the CMOS image sensor is also provided.
US09859317B2	Optical apparatus including optical functional layer having high refractive index and method of manufacturing the optical apparatus An optical apparatus including an optical functional layer having a high refractive index and a method of manufacturing the optical apparatus are provided. The optical functional layer includes a phase change material that has a first refractive index during heat treatment in a first temperature range and has a second refractive index, which is higher than the first refractive index, during heat treatment in a second temperature range that is higher than the first temperature range. The optical functional layer may be configured to have the second refractive index by using a micro-heater without having to be deposited at a high temperature.
US09859314B2	Image sensor bending by induced substrate swelling A curved image sensor chip has a first side and a second side opposite the first side. The second side includes light sensors configured to generate electrical signals in response to receiving light. A substrate is in contact with the first side of the curved image sensor chip and is configured to increase in volume so as to apply a bending force to form the curved image sensor chip.
US09859313B2	Complementary metal-oxide-semiconductor depth sensor element A complementary metal-oxide-semiconductor depth sensor element comprises a photogate formed in a photosensitive area on a substrate. A first transfer gate and a second transfer gate are formed respectively on two sides of the photogate in intervals. A first floating doped area and a second floating doped area are formed respectively on the outer sides of the first transfer gate and the second transfer gate. The first and second floating doped regions have dopants of a first polarity and the semiconductor area has dopants of a second polarity opposite to the first polarity. Since the photogate and at least parts of the first and second transfer gates connect to the same semiconductor area and no other dopants of polarity opposite to the second polarity. Therefore, the majority carriers from the photogate excited by lights drift, but not diffuse, to transfer to the first and second transfer gates.
US09859310B2	Display panel and display device A display panel and a display device including the display panel are provided. The display panel includes data lines and scan lines arranged to be intersected, and a sensing antenna. The data lines and the scan lines are located in a display region of the display panel, and define multiple sub-pixels. The sensing antenna includes multiple sensing coils and is at least partly located in the display region of the display panel, and projections of the data lines and/or the scan lines cover projections of the sensing coils in a direction perpendicular to a surface of the display panel, in order to avoid affection on an aperture ratio of the display panel caused by the sensing coils located in the display region.
US09859307B2	Display panel and manufacturing method for the same A display panel and manufacturing method. The method includes: forming a source electrode, a drain electrode and a channel on a substrate; depositing a first insulation layer; forming multiple color photoresists on the first insulation layer, and the source electrode, the drain electrode and the channel are located between two adjacent color photoresists; forming a gate electrode and a common electrode by a same process, and the gate electrode is located on the first insulation layer, and the common electrode is located on the photoresist; forming a second insulation layer having a through hole communicated with the source electrode on the gate electrode and the common electrode; forming a pixel electrode on the second insulation layer. The pixel electrode contacts with the source electrode through the through hole, and a storage capacitor is formed. The storage capacitor can be increased and the current leakage of the pixel electrode improved.
US09859302B1	Fin-type field-effect transistor This invention relates to a fin field-effect transistor semiconductor structure. The method of forming the semiconductor structure can include patterning a plurality of precursor fins on a semiconductor layer having a layer portion A and a layer portion B. The semiconductor layer can be located on a substrate. The layer portion B can be selectively etched to form B fins and a top half of precursor fins. The layer portion A can be selectively etched to form A fins and the substrate can be etched to form a bottom half of the decoupling fins. The precursor fins can be removed to expose the A fins, the decoupling fins, and the B fins. One of the A fins and the B fins can form n-type fins and the other can form p-type fins.
US09859301B1	Methods for forming hybrid vertical transistors A method for forming a hybrid semiconductor device includes growing a stack of layers on a semiconductor substrate. The stack of layers includes a bottom layer in contact with the substrate, a middle layer on the bottom layer and a top layer on the middle layer. First and second transistors are formed on the top layer. A protective dielectric is deposited over the first and second transistors. A trench is formed adjacent to the first transistors to expose the middle layer. The middle layer is removed from below the first transistors to form a cavity. A dielectric material is deposited in the cavity to provide a transistor on insulator structure for the first transistors and a bulk substrate structure for the second transistors.
US09859300B2	Light-emitting device and input/output device To provide a light-emitting device or an input/output device with little unevenness in display luminance or high reliability and to provide an input/output device with high detection sensitivity, a light-emitting device is configured to include a first substrate, a light-emitting element over the first substrate, a first conductive layer over the light-emitting element, a first insulating layer over the first conductive layer, a second conductive layer over the first insulating layer, and a second substrate over the second conductive layer. The light-emitting element includes a first electrode over the first substrate, a layer containing a light-emitting organic compound over the first electrode, and a second electrode over the layer containing a light-emitting organic compound. The second electrode is electrically connected to the first and second conductive layers. The first conductive layer and the second electrode transmit light emitted from the light-emitting element. The resistance of the second conductive layer is lower than that of the second electrode.
US09859295B2	Method for forming flash memory structure Methods for forming semiconductor structures are provided. The method for forming the semiconductor structure includes forming a word line cell over a substrate and forming a dielectric layer over the word line cell. The method further includes forming a conductive layer over the dielectric layer and polishing the conductive layer until the dielectric layer is exposed. The method further includes forming an oxide layer on a top surface of the conductive layer and removing portions of the conductive layer not covered by the oxide layer to form a memory gate.
US09859291B2	Non-volatile memory and manufacturing method thereof A non-volatile memory having memory cells is provided. A stacked gate structure has gate dielectric layer, assist gate, insulation layer, and erase gate disposed in order. The floating gate is disposed on a first sidewall of the stacked gate structure, the floating gate has a corner portion at the top portion, and erase gate covers the corner portion. The tunneling dielectric layer is disposed under the floating gate. The erase gate dielectric layer is disposed between the erase gate and the floating gate. The assist gate dielectric layer is disposed between the assist gate and the floating gate. The source region and the drain region are respectively disposed at two sides of the stacked structure and the floating gate. The control gate is disposed on the source region and the floating gate. The inter-gate dielectric layer is disposed between the control gate and the floating gate.
US09859290B1	Memory device and method for fabricating the same A method for fabricating memory device includes the steps of: providing a substrate; forming a tunnel oxide layer on the substrate; forming a first gate layer on the tunnel oxide layer; forming a negative capacitance (NC) insulating layer on the first gate layer; and forming a second gate layer on the NC insulating layer. Preferably, the second gate layer further includes a work function metal layer on the NC insulating layer and a low resistance metal layer on the work function metal layer.
US09859288B2	Semiconductor devices including an air-gap and methods of manufacturing the same A semiconductor device including a substrate having a trench formed therein, a plurality of gate structures, an isolation layer pattern and an insulating interlayer pattern. The substrate includes a plurality of active regions defined by the trench and spaced apart from each other in a second direction. Each of the active regions extends in a first direction substantially perpendicular to the second direction. Each of the plurality of gate structures includes a tunnel insulation layer pattern, a floating gate, a dielectric layer pattern and a control gate sequentially stacked on the substrate. The isolation layer pattern is formed in the trench. First isolation layer pattern has at least one first air gap between sidewalls of at least one adjacent pair of the floating gates. The insulating interlayer pattern is formed between the gate structures, and the first insulating interlayer pattern extends in the second direction.
US09859287B2	Semiconductor device and voltage transfer unit A semiconductor device may include a first active region including a first main region and a first protruding part. The semiconductor device may include a second active region including a second main region and a second protruding part. The semiconductor device may include a first transistor formed on the first active region. The semiconductor device may include a second transistor formed on the second active region. The semiconductor device may include a connecting structure connecting the first protruding part and the second protruding part to each other.
US09859286B2	Low-drive current FinFET structure for improving circuit density of ratioed logic in SRAM devices A method of fabricating an SRAM semiconductor device includes forming first and second FinFETs on an upper surface of a bulk substrate. The first FinFET includes a first source/drain region containing first dopants, and the second FinFET includes a second source/drain region containing second dopants. The method further includes selectively controlling a temperature of the second FinFET with respect to a temperature of the first FinFET during an anneal process to activate the first and second dopants such that the second source/drain region is formed having a different electrical resistance with respect to the first source/drain region.
US09859282B1	Semiconductor structure A high-density semiconductor structure includes a substrate, a bit line and a first memory unit. The bit line, disposed on the substrate, has a first side and a second side. The first memory unit includes a first transistor, a first capacitor, a second transistor and a second capacitor. The first transistor disposed on the substrate has a first terminal and a second terminal. The first terminal connects the bit line. The first capacitor connects the second terminal of the first transistor. The second transistor disposed on the substrate has a third terminal and a fourth terminal. The third terminal connects the bit line. The second capacitor connects the fourth terminal of the second transistor. The first capacitor and the second capacitor are separated from the bit line in a direction perpendicular to an extending direction of the bit line and located on the first side of the bit line.
US09859279B2	High-k gate dielectric and metal gate conductor stack for fin-type field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor material An electrical device that includes at least one n-type field effect transistor including a channel region in a type III-V semiconductor device, and at least one p-type field effect transistor including a channel region in a germanium containing semiconductor material. Each of the n-type and p-type semiconductor devices may include gate structures composed of material layers including work function adjusting materials selections, such as metal and doped dielectric layers. The field effect transistors may be composed of fin type field effect transistors. The field effect transistors may be formed using gate first processing or gate last processing.
US09859276B2	FinFET semiconductor device having fins with stronger structural strength A semiconductor device including at least one fin disposed on a surface of a semiconductor substrate is provided. The fin includes a main portion extending along a first direction, and at least one secondary portion extending outward from the main portion along a second direction not collinear with the first direction.
US09859275B2	Silicon nitride fill for PC gap regions to increase cell density A semiconductor device is provided comprising a substrate, two or more semiconductor fins, and one or more gates. A flowable oxide layer is deposited on the semiconductor device. An area between the two or more semiconductor fins is etched such that the substrate is exposed. An insulating layer is deposited within the etched area. At least the flowable oxide layer is removed.
US09859273B2	Semiconductor structure and manufacturing process thereof A process of manufacturing a semiconductor structure is provided. The process begins with forming a work function metal layer on a substrate, and a hardmask is covered over the work function metal layer. A trench is formed to penetrate the hardmask and the work function metal layer, and an isolation structure is filled in the trench.
US09859268B2	Content addressable memory A content addressable memory has many elements in one memory cell; thus, the area of one memory cell tends to be large. In view of the above, it is an object of an embodiment of the present invention to reduce the area of one memory cell. Charge can be held with the use of a channel capacitance in a reading transistor (capacitance between a gate electrode and a channel formation region). In other words, the reading transistor also serves as a charge storage transistor. One of a source and a drain of a charge supply transistor is electrically connected to a gate of the reading and charge storage transistor.
US09859266B2	Method of forming 3D integrated circuit package with panel type lid Presented herein is a package comprising a carrier device of a device stack and at least one top device of the device stack mounted on a first side of the carrier device. A lid is mounted on the first side of the carrier device, with a first portion of the lid attached to the carrier device and a second portion of the lid extending past and overhanging a respective edge of the carrier device. The lid comprises a recess disposed in a first side, and the at least one top device is disposed within the recess. A thermal interface material disposed on the top device and contacts a surface of the recess.
US09859263B2	Semiconductor package A semiconductor package includes a package base substrate including bonding pads and a connection pads respectively on an upper surface and a lower surface of the package base substrate, four semiconductor chips attached onto the package base substrate, including a 1A semiconductor chip, a 1B semiconductor chip, a 2A semiconductor chip, and a 2B semiconductor chip, and each including a plurality of chip pads that are adjacent to a first edge of an upper surface of each of the 1A semiconductor chip, the 1B semiconductor chip, the 2A semiconductor chip, and the 2B semiconductor chip, and a bonding wire electrically connecting the chip pad and the bonding pad to each other, wherein the four semiconductor chips are disposed on the package base substrate such that first edges of the four semiconductor chips respectively face edges of the package base substrate that are different from each other.
US09859259B2	Light emitting apparatus The present invention provides a light emitting apparatus comprising a three-color light emitting device unit including at least three light emitting diode (LED) chips for respectively emitting red, green and blue light; a white light emitting device unit including at least one blue LED chip with a fluorescent substance formed thereon; and a substrate provided with a first electrode connected in common to ends of the LED chips and second electrodes formed to correspond respectively to the LED chips. Further, the present invention provides a light emitting apparatus comprising a plurality of LED chips; a substrate provided with a first electrode connected in common to ends of the plurality of LED chips and second electrodes formed to correspond respectively to the plurality of LED chips; an upper package formed on the substrate to surround the plurality of LED chips and to have a partition crossing the first electrode at the center of the upper package; and a molding member that encapsulates the plurality of LED chips and is divided by the partition of the upper package.
US09859257B2	Flipped die stacks with multiple rows of leadframe interconnects Stacked microelectronic packages comprise microelectronic elements each having a contact-bearing front surface and edge surfaces extending away therefrom, and a dielectric encapsulation region contacting an edge surface. The encapsulation defines first and second major surfaces of the package and a remote surface between the major surfaces. Package contacts at the remote surface include a first set of contacts at positions closer to the first major surface than a second set of contacts, which instead are at positions closer to the second major surface. The packages are configured such that major surfaces of each package can be oriented in a nonparallel direction with the major surface of a substrate, the package contacts electrically coupled to corresponding contacts at the substrate surface. The package stacking and orientation can provide increased packing density.
US09859256B1	Ink printed wire bonding An integrated circuit package with improved reliability and methods for creating the same are disclosed. More specifically, integrated circuit packages are created using one or more sacrificial layers that provide support for ink printed wires prior to package processing, but are removed during package processing. Once each of the sacrificial layers is removed, molding compound is placed around each ink printed wire, which may have a substantially rectangular cross section that can vary in dimension along a length of a given wire. While substantially surrounding each wire in and of itself improves reliability, removing non-conductive paste, fillets, or other adhesive materials also minimizes adhesion issues between the molding compound and those materials, which increases the bond of the molding compound to the package and its components. The net result is a more reliable integrated circuit package that is less susceptible to internal cracking and wire damage.
US09859254B1	Semiconductor structure and a manufacturing method thereof A semiconductor structure includes a substrate including a first surface, a second surface opposite to the first surface and a recess extending from the first surface towards the second surface, a first die at least partially disposed within the recess and including a first die substrate and a first bonding member disposed over the first die substrate, a second die disposed over the first die and including a second die substrate and a second bonding member disposed a second die substrate and the second die substrate, a redistribution layer (RDL) disposed over the second die, and a conductive bump disposed over the RDL, wherein the first bonding member is disposed opposite to and is bonded with the second bonding member.
US09859252B2	Cooling channels in 3DIC stacks An integrated circuit structure includes a die including a semiconductor substrate, dielectric layers over the semiconductor substrate, an interconnect structure including metal lines and vias in the dielectric layers, a plurality of channels extending from inside the semiconductor substrate to inside the dielectric layers, and a dielectric film over the interconnect structure and sealing portions of the plurality of channels. The plurality of channels is configured to allow a fluid to flow through.
US09859251B2	Semiconductor device having a chip under package A semiconductor device package includes an electronic component and an electrical interconnect. The electronic component is attached to the electrical interconnect. The electrical interconnect is configured to electrically couple the electronic component to external terminals of the semiconductor device package. The electrical interconnect has a first main face facing the electronic component and a second main face opposite the first main face. The semiconductor device package further includes a first semiconductor chip facing the second main face of the electrical interconnect.
US09859245B1	Chip package structure with bump and method for forming the same A chip package structure is provided. The chip package structure includes a redistribution substrate. The chip package structure includes a first chip structure over the redistribution substrate. The chip package structure includes a first solder bump arranged between and electrically connecting the redistribution substrate and the first chip structure. The chip package structure includes a first molding layer surrounding the first chip structure. The first molding layer and the first chip structure are both spaced apart from the redistribution substrate by the first solder bump, thereby defining a gap there-between. The chip package structure includes a second chip structure over the first chip structure. The chip package structure includes a second molding layer surrounding the second chip structure. The chip package structure includes a third molding layer surrounding the first molding layer, the second molding layer, and the first solder bump, and filled into the gap.
US09859234B2	Methods and structures to repair device warpage A method of processing an interconnection element can include providing a substrate element having front and rear opposite surfaces and electrically conductive structure, a first dielectric layer overlying the front surface and a plurality of conductive contacts at a first surface of the first dielectric layer, and a second dielectric layer overlying the rear surface and having a conductive element at a second surface of the second dielectric layer. The method can also include removing a portion of the second dielectric layer so as to reduce the thickness of the portion, and to provide a raised portion of the second dielectric layer having a first thickness and a lowered portion having a second thickness. The first thickness can be greater than the second thickness. At least a portion of the conductive element can be recessed below a height of the first thickness of the second dielectric layer.
US09859231B2	Radio frequency integrated circuit module To reduce radio frequency losses during operation of a radio frequency integrated circuit module, the radio frequency integrated circuit module is fabricated such that at least one of an edge of the wirebond pad on the copper trace and a sidewall of the copper trace is free from high-resistivity plating material. The unplated portion provides a path for the radio frequency current to flow around the high-resistivity material.
US09859229B2	Package structure and method for forming the same Package structures and methods for forming the same are provided. The package structure includes an integrated circuit die and a first shielding feature over a base layer. The package structure also includes a package layer encapsulating the integrated circuit die and the first shielding feature. The package structure further includes a second shielding feature extending from the side surface of the base layer towards the first shielding feature to electrically connect to the first shielding feature. The side surface of the second shielding feature faces away from the side surface of the base layer and is substantially coplanar with the side surface of the package layer.
US09859228B2	Device and method for generating identification key Provided is a device for generating an identification key using a process variation during a manufacturing process of a conductive layer. The device for generating an identification key may include a conductive layer, which is disposed between a first node and a second node in a semiconductor chip, and which has a width that is at least a first threshold value but not more than a second threshold value, the first threshold value and the second threshold value being less than the minimum width according to the design rules that can ensure that the conductive layer is patterned such that the first node and the second node are electrically short-circuited, and a reader which provides an identification key by identifying if there is a short circuit between the first node and the second node.
US09859225B2	Backside cavity formation in semiconductor devices Fabrication of radio-frequency (RF) devices involves providing a field-effect transistor (FET) formed over an oxide layer formed on a semiconductor substrate, removing at least part of the semiconductor substrate to expose at least a portion of a backside of the oxide layer, applying an interface material to at least a portion of the backside of the oxide layer, removing at least a portion of the interface material to form a trench, and covering at least a portion of the interface material and the trench with a substrate layer to form a cavity.
US09859224B2	Registration mark formation during sidewall image transfer process Methods of forming a registration mark such as an alignment mark or overlay mark during formation of sub-lithographic structures are provided. Methods may include forming a plurality of mandrels over a hard mask over a semiconductor layer, each mandrel including a spacer adjacent thereto. At least one mandrel is selected of the plurality of mandrels and a mask is formed over the at least one selected mandrel. The plurality of mandrels are removed leaving the spacers, the mask preventing removal of the at least one selected mandrel. The mask is removed. A first etching patterns the sub-lithographic structures and the registration mark into the hard mask using the spacers as a pattern of the sub-lithographic structure and the at least one selected mandrel and adjacent spacer for the registration mark. A second etching forms the sub-lithographic structures in the semiconductor layer using the patterned hard mask and to form the registration mark in the semiconductor layer using the at least one selected mandrel and the patterned hard mask.
US09859223B2	Dicing structures for semiconductor substrates and methods of fabrication thereof Dicing structures for semiconductor substrates and methods of fabrication thereof are described. In one embodiment, a semiconductor wafer includes a first chip disposed in a substrate, a second chip disposed adjacent the first chip and disposed in the substrate, and a dicing street disposed between the first and the second chip. A first and a second metal level are disposed over the dicing street, wherein the second metal level is disposed above the first metal level. A first alignment mark is disposed in the first metal level above a first portion of the dicing street, and first metal features disposed in the second metal level above the first portion of the dicing street.
US09859221B2	Multilayer wiring board with built-in electronic component A multilayer wiring board with built-in electronic components includes a substrate including an insulating material and having multiple opening portions, a first conductor layer formed on a surface of the substrate and having an opening portion such that the substrate has the opening portions inside the opening portion of the first conductor layer, multiple electronic components positioned in the opening portions of the substrate, and an insulating layer formed on the substrate such that the insulating layer is formed on the electronic components and on the first conductor layer. The opening portions are formed in the substrate such that the opening portions include two opening portions and that the substrate has a partition wall formed between the two opening portions.
US09859217B1	Middle of the line (MOL) metal contacts Integrated circuit (IC) structure embodiments and methods of forming them with middle of the line (MOL) contacts that incorporate a protective cap, which provides protection from damage during back end of the line (BEOL) processing. Each MOL contact has a main body in a lower portion of a contact opening. The main body has a liner (e.g., a titanium nitride layer) that lines the lower portion and a metal layer on the liner. The MOL contact also has a protective cap in an upper portion of the contact opening above the first metal layer and extending laterally over the liner to the sidewalls of the contact opening. The protective cap has an optional liner, which is different from the liner in the lower portion, and a metal layer, which is either the same or different than the metal in the main body.
US09859215B1	Formation of advanced interconnects A method for fabricating an advanced metal conductor structure is described. A pattern in a dielectric layer is provided. The pattern includes a set of features in the dielectric for a set of metal conductor structures. An adhesion promoting layer is created over the patterned dielectric. A ruthenium layer is deposited over the adhesion promoting layer. Using a physical vapor deposition process, a cobalt layer is deposited over the ruthenium layer. A thermal anneal is performed which reflows the cobalt layer to fill the set of features to form a set of metal conductor structures. In another aspect of the invention, an integrated circuit device is formed using the method.
US09859206B2	Photoactive compound gradient photoresist A system and method for forming photoresists over semiconductor substrates is provided. An embodiment comprises a photoresist with a concentration gradient. The concentration gradient may be formed by using a series of dry film photoresists, wherein each separate dry film photoresist has a different concentration. The separate dry film photoresists may be formed separately and then placed onto the semiconductor substrate before being patterned. Once patterned, openings through the photoresist may have a tapered sidewall, allowing for a better coverage of the seed layer and a more uniform process to form conductive materials through the photoresist.
US09859205B2	Semiconductor device having an airbridge and method of fabricating the same A semiconductor device and a method of forming an airbridge extending from a conductive area of the semiconductor device are provided. The semiconductor device includes a device pattern formed on a semiconductor substrate, a seed layer formed on the device pattern, and an airbridge formed on the seed layer, where the airbridge includes a plated conductive material and defines an opening exposing a portion of the device pattern. The semiconductor device further includes an adhesion layer formed on the airbridge layer and extending over at least a portion of sidewalls of the opening defined by the airbridge, and an insulating layer formed on the adhesion layer, where the adhesion layer enhances adhesion of the insulating layer to the plated conductive material of the airbridge.
US09859204B2	Semiconductor devices with redistribution pads Semiconductor devices with redistribution pads are disclosed. The semiconductor device includes a plurality of electric pads provided on a semiconductor substrate, and a plurality of redistribution pads electrically connected to the electric pads and an outer terminal. The plurality of redistribution pads includes a plurality of first redistribution pads constituting a transmission path for a first electrical signal and at least one second redistribution pad constituting a transmission path for a second electrical signal different from the first electrical signal. The first redistribution pads are arranged on the semiconductor substrate to form at least two rows, and the at least one second redistribution pad is disposed between the at least two rows of the first redistribution pads.
US09859197B2	Integrated circuit package fabrication A method of making an integrated circuit (“IC”) device includes forming a lead frame in a lead frame strip. Only portions of the lead frame are plated with a conductor. A die pad is attached to an unplated portion of said lead frame.
US09859194B2	Semiconductor device and method for manufacturing the same A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.
US09859192B2	Semiconductor structure with through-silicon via A semiconductor structure includes a semiconductor substrate and a conductive element formed in a portion of the semiconductor substrate. The semiconductor structure further includes a plurality of insulating elements formed in portions of the semiconductor substrate at a first region surrounding the conductive element and a semiconductor device formed over a portion of the semiconductor substrate at a second region adjacent to the first region. The first region is formed between the conductive element and the second region.
US09859190B2	Resin structure, and electronic component and electronic device using the structure Provided herein is a resin structure having high heat dissipation, and desirable adhesion at the interface with a heat generating device. The resin structure is provided on a substrate to dissipates heat of the substrate to outside, and includes: a water-based coating material layer provided on the substrate and including a water-based coating material, and fillers having an average particle size of 30 μm to 150 μm; and a resin layer provided on the water-based coating material layer and containing a thermosetting resin. The fillers have a far-infrared emissivity of 0.8 or more, and an average aspect ratio of 1 to 12 as measured as a ratio of lengths along the long axis and the short axis through the center of gravity of the fillers. At least 80% of the total number of fillers has a length that is at least 1.7 times longer than the total thickness of the water-based coating material of the water-based coating material layer and the thermosetting resin of the resin layer, as measured along the long axis through the center of gravity of the fillers.
US09859188B2	Heat isolation structures for high bandwidth interconnects A die interconnect system having a plurality of connection pads, a heat generating element thermally isolated from the die, one or more leads extending from the die to the heat generating element, each lead having a metal core with a core diameter, a dielectric layer surrounding the metal core with a dielectric thickness, and an outer metal layer attached to ground, wherein one or more leads are exposed to ambient conditions and/or are convectively or contact cooled for at least a portion of their length to minimize heat transfer from the heat generating element to the die.
US09859186B2	Heat sink for a semiconductor chip device A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.
US09859185B2	Semiconductor packaging structure and package having stress release structure A semiconductor packaging structure includes a copper heat-sink with a shim projection which provides a stress release structure. The heat-sink with the shim projection may be used in conjunction with a pedestal in order to further reduce the thermal stress produced from the mismatch of thermal properties between the copper heat-sink metal and the ceramic frame. The copper heat-sink with a shim projection may also be part of the semiconductor package along with a lead frame, the ceramic frame, a semiconductor device, a capacitor, a wire bond and a ceramic lid or an encapsulation. The copper heat-sink, the ceramic frame and the lead frame are all chosen to be cost effective, and chosen such that the packaging process for the semiconductor device is able to achieve a smaller size while maintaining high reliability, low cost, and suitability for volume manufacturing.
US09859184B2	Method of making a plurality of semiconductor devices A method of making a plurality of semiconductor devices comprising a chip scale packages. The method includes providing a semiconductor wafer having a major surface and a backside. The method also includes forming a plurality of contacts on the major surface. The method further includes forming a plurality of trenches in the major surface of the substrate. The method also includes forming a plurality of openings in the wafer between the backside and the trenches in the major surface. The method further includes depositing an encapsulant on the backside of the wafer. At least some of the encapsulant passes through the openings in the wafer to at least partially fill the trenches in the major surface. The method also includes singulating the wafer to produce a plurality of chip scale packages having a major surface including one or more contacts and side walls at least partially covered with said encapsulant.
US09859182B2	Semiconductor device The semiconductor device includes a semiconductor element, a main lead and a resin package. The semiconductor element includes an obverse surface and a reverse surface spaced apart from each other in a thickness direction. The main lead supports the semiconductor element via the reverse surface of the semiconductor element. The resin package covers the entirety of the semiconductor element. The resin package covers the main lead in such a manner that a part of the main lead is exposed from the resin package. The semiconductor element includes a part that does not overlap the main lead as viewed in the thickness direction.
US09859176B1	Semiconductor device, test system and method of the same A semiconductor device is disclosed. The semiconductor device includes: a System on Chip (SoC) die; an integrated passive device (IPD); and a first switch, coupled between the SoC die and the IPD; wherein the IPD and the SoC die are disposed in different wafers and bonded together, and the first switch is controlled to disconnect the IPD from the SoC die when the IPD is under a test; and the first switch is controlled to connect the IPD with the SoC die when the IPD is not under the test. A test system for testing an IPD of a semiconductor device and an associated method are also disclosed.
US09859172B1	Bipolar transistor compatible with vertical FET fabrication Integrated chips and methods of forming the same include forming a gate stack around a first semiconductor fin and a second semiconductor fin. The gate stack around the second semiconductor fin is etched away. An extrinsic base is formed around the second semiconductor fin in a region exposed by etching away the gate stack.
US09859170B2	Method of forming semiconductor structure A method of forming a semiconductor structure is provided. A substrate having a memory region is provided. A plurality of fin structures are provided and each fin structure stretching along a first direction. A plurality of gate structures are formed, and each gate structure stretches along a second direction. Next, a dielectric layer is formed on the gate structures. A first patterned mask layer is formed, wherein the first patterned mask layer has a plurality of first trenches stretching along the second direction. A second patterned mask layer on the first patterned mask layer, wherein the second patterned mask layer comprises a plurality of first patterns stretching along the first direction. Subsequently, the dielectric layer is patterned by using the first patterned mask layer and the second patterned mask layer as a mask to form a plurality of contact vias. The contact holes are filled with a conductive layer.
US09859168B1	Method of fabricating DMOS and CMOS transistors A method of fabricating a semiconductor device including a diffused metal-oxide-semiconductor (DMOS) transistor, an n-type metal-oxide-semiconductor (NMOS) transistor, and a p-type metal-oxide-semiconductor (PMOS) transistor includes forming separation regions in a semiconductor substrate, forming a gate insulating film, forming a DMOS gate electrode on the gate insulating film, forming a first mask pattern on the semiconductor substrate, performing a first ion implantation process, forming a second mask pattern on the semiconductor substrate, performing a second ion implantation process, forming a third mask pattern on the semiconductor substrate and performing a third ion implantation process into the semiconductor substrate, and forming a fourth mask pattern on the semiconductor substrate and performing a fourth ion implantation process.
US09859167B2	CMOS device with decreased leakage current and method making same A complementary metal oxide semiconductor (CMOS) device includes a p-channel metal oxide semiconductor (PMOS) transistor unit and an n-channel metal oxide semiconductor (NMOS) transistor unit. A semiconductor layer of the PMOS transistor unit between source and drain electrodes thereof is divided into a first tapered region having an ion concentration of CP/e and a first flat region having an ion concentration of CP/f. A semiconductor layer of the NMOS transistor unit between source and drain electrodes thereof is divided into a second tapered region having an ion concentration of CN/e, a second flat region having an ion concentration of CN/f−2 and a third flat region located between the second tapered region and second flat region and having an ion concentration of CN/f−1, wherein the ion concentrations have a relationship of CP/e
US09859166B1	Vertical field effect transistor having U-shaped top spacer A method is presented for forming a semiconductor structure. The method includes forming a plurality of fins over a source/drain region, forming a first spacer within troughs defined by the plurality of fins and depositing a high-k dielectric layer, a work function material layer, and a conducting layer. The method further includes etching the high-k dielectric layer, the work function material layer, and the conducting layer to form recesses between the plurality of fins, depositing a liner dielectric, and etching portions of the liner dielectric to form a plurality of second spacers having a U-shaped configuration. The method further includes forming an epitaxial layer over the plurality of fins such that a gap region is defined between the plurality of second spacers and the epitaxial layer.
US09859165B1	Planarization process for forming semiconductor device structure A method for forming a semiconductor device structure is provided. The method includes receiving a structure having a first portion and a second portion, and a top surface of the first portion is higher than a top surface of the second portion. The method also includes forming a first material layer over the first portion and the second portion of the structure and forming a first material layer over the first portion and the second portion of the structure. The method further includes thinning the second material layer until the first material layer is exposed and removing a portion of the second material layer over the second portion of the structure to expose the first material layer thereunder. In addition, the method includes thinning the first material layer to expose the structure.
US09859164B1	Method for manufacturing fins A method for manufacturing fins includes following steps. A substrate including a plurality of fins formed thereon is provided. At least an ion implantation is performed to the fins. A thermal process is performed after the ion implantation. An insulating layer is formed on the substrate, and the fins are embedded in the insulating layer. Thereafter, a portion of the insulating layer is removed to form an isolation structure on the substrate, and the fins are exposed from a top surface of the isolation structure. The insulating layer is formed after the ion implantation and the thermal process. Or, the isolation structure is formed before the ion implantation, or between the ion implantation and the thermal process.
US09859158B2	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device includes forming a device isolation layer in a substrate to define an active region, forming a gate insulating layer covering at least a portion of the active region, forming a gate electrode on the gate insulating layer, and forming an interlayer insulating layer on the gate electrode. The gate insulating layer includes a first portion overlapping with the active region and a second portion overlapping with the device isolation layer. The forming of the gate insulating layer includes etching at least a part of the second portion of the gate insulating layer to thin the part of the second portion of the gate insulating layer.
US09859157B1	Method for forming improved liner layer and semiconductor device including the same A method for manufacturing a semiconductor device includes conformally depositing a liner layer on a top surface of a dielectric layer, and on sidewall and bottom surfaces of an opening in the dielectric layer, annealing the liner layer, wherein the annealing is performed in at least one of a nitrogen (N2) and ammonia (NH3) ambient, at a temperature of about 60° C. to about 500° C., and at a power of about 200 Watts to about 4500 Watts, and forming a conductive layer on the liner layer on the top surface of the dielectric layer, and on the liner layer in a remaining portion of the opening.
US09859152B2	Protecting layer in a semiconductor structure A method for forming a protecting layer includes determining an expected concentration of metal ions in a dielectric layer. The method also includes determining a thickness of the protecting layer based on the expected concentration of metal ions. The method also includes forming the protecting layer at the determined thickness and in contact with the dielectric layer. The protecting layer can include at least one of silicon doped nitride, carbon nitride, silicon nitride, or silicon carbon.
US09859149B2	Method of producing bonded wafer with uniform thickness distribution Method of producing bonded wafer including thin film on base wafer, including: implanting at least one gas ion selected from hydrogen ion and rare gas ion into bond wafer from surface of bond wafer to form layer of implanted ion; bonding surface from which ion is implanted into bond wafer and surface of base wafer directly or through insulator film; and then performing heat treatment to separate part of bond wafer along layer of implanted ion, wherein before bond wafer and base wafer are bonded, thickness of bond wafer and base wafer is measured, and combination of bond wafer and base wafer is selected such that difference in thickness between the wafers is less than 5 μm, and selected bond and base wafers are bonded. This method can inhibit variation in thickness in marble pattern that occurs in thin film and produce bonded wafer including thin film with uniform thickness.
US09859143B2	Adhesion detecting method An adhesion detecting method detects the degree of adhesion of a protective tape having an adhesive layer to a wafer having devices on the front side. A protective tape is attached to the front side of the wafer with the adhesive layer facing the wafer. The protective tape is then peeled from the front side of the wafer. An arbitrary specific region on the front side of the wafer is imaged to detect a first height difference of first unevenness. A corresponding region on the adhesive layer of the peeled protective tape is imaged to detect a second height difference of second unevenness formed on the adhesive layer. The first height difference and the second height difference are compared with each other to determine whether or not the second height difference falls within an allowable range with respect to the first height difference.
US09859133B2	Mold release film and process for producing semiconductor package A mold release film, which is excellent in releasability and capable of suppressing contamination of a mold or a resin-encapsulation portion by the mold release film and forming a resin-encapsulation portion excellent in adhesion to an ink layer, is provided. The mold release film is disposed on a cavity surface of a mold, in which a semiconductor element is disposed and encapsulated with a curable resin to form a resin-encapsulation portion. The mold release film has a first surface in contact with the curable resin when the resin-encapsulation portion is formed, and a second surface in contact with the cavity surface. At least the first surface is made of a fluororesin. The mold release film has an F/Al ratio of from 0.2 to 4, or an F/(C+F+O) ratio of from 0.1 to 0.3. A process for producing a semiconductor package using the mold release film is also provided.
US09859121B2	Multiple nanosecond laser pulse anneal processes and resultant semiconductor structure Semiconductor structures and methods of fabricating the same using multiple nanosecond pulsed laser anneals are provided. The method includes exposing a gate stack formed on a semiconducting material to multiple nanosecond laser pulses at a peak temperature below a melting point of the semiconducting material.
US09859117B2	Oxide and method for forming the same An oxide that can be used for a semiconductor in a transistor or the like is formed. After a sputtering gas is supplied to a deposition chamber, a plasma including ions of the sputtering gas in the vicinity of a target. The ion of the sputtering gas is accelerated and collides with a target, so that flat-plate particles and atoms included in the target are separated from the target. Surfaces of the plurality of flat-plate particles are negatively charged in plasma. One of the flat-plate particles negatively charged is deposited with a surface facing a substrate. Another flat-plate particle is deposited in a region apart from the one flat-plate particle over the substrate while repelling the one flat-plate particle. An atom and an aggregate of atoms are inserted in a gap between the one flat-plate particle and the another flat-plate particle and grow in the lateral direction in the gap between the flat-plate particles, so that the gap between the one flat-plate particle and the another flat-plate particle is filled.
US09859113B2	Structure and method of semiconductor device structure with gate A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a gate stack over the semiconductor substrate. The semiconductor device structure includes spacers over opposite sidewalls of the gate stack. The spacers and the gate stack surround a recess over the gate stack. The semiconductor device structure includes a first insulating layer over the gate stack and an inner wall of the recess. The semiconductor device structure includes a second insulating layer over the first insulating layer. Materials of the first insulating layer and the second insulating layer are different, and a first thickness of the first insulating layer is less than a second thickness of the second insulating layer.
US09859110B2	Substrate cleaning method and substrate cleaning apparatus An ultrasonic wave applying liquid is supplied to one principal surface of a substrate while a liquid film of a first liquid being formed on another principal surface of the substrate. The ultrasonic wave applying liquid is obtained by applying ultrasonic waves to a second liquid. Ultrasonic vibration is transmitted to the other principal surface and the liquid film, thereby ultrasonically cleaning the other principal surface. The first liquid has a higher cavitation intensity, which is a stress per unit area acting on the substrate by cavitation caused in the liquid when ultrasonic waves are transmitted to the liquid present on the principal surface of the substrate, than the second liquid.
US09859105B2	Multiple ion gate method and apparatus A second gate in an Ion Mobility Spectrometer is used to select or block different time windows of the ion mobility spectrum. A second gate in the Ion Mobility Mass Spectrometer is used to modulate peak intensities in the IMS spectrum, allowing each peak in the IMS spectrum to be unambiguously matched with its set of fragment ions in a subsequent MS-MS mass spectrum.
US09859099B2	Exposure apparatus and exposure method Complex and fine patterns may be formed by an exposure apparatus that decreases movement error of a stage including a beam generating section that generates a charged particle beam, a stage section that has a sample mounted thereon and moves the sample relative to the beam generating section, a detecting section that detects a position of the stage section, a predicting section that generates a predicted drive amount obtained by predicting a drive amount of the stage section based on a detected position of the stage section, and an irradiation control section that performs irradiation control for irradiating the sample with the charged particle beam, based on the predicted drive amount.
US09859090B2	Self-cleaning linear ionizing bar and methods therefor A self-cleaning linear ionizer with at least one ionizing electrode, at least one electrode-cleaner, and at least two spool assemblies is disclosed. The electrode has opposing ends and defines an axial working length with a surface that produces an ion cloud and develops degradation products with use. Although the working length of the electrode is stationary, the electrode is movable. The electrode-cleaner is also stationary and selectively engages the electrode along its working length. The opposing ends of the electrode are fixed to the opposing spool assemblies which selectively move the ionizing electrode such that the electrode-cleaner removes at least some of the surface degradation products from the electrode during movement. Methods of using the disclosed ionizer have self-cleaning and ionization modes of operation, which may occur cyclically, alternately, or simultaneously, are also disclosed.
US09859086B2	Ion source According to one embodiment, there is provided an ion source. The ion source includes a vacuum-exhausted vacuum chamber, a target which is set in the vacuum chamber and generates a plurality of valences of ions by irradiation of a laser beam, an acceleration electrode which is applied with voltage in order to accelerate the ions generated by the target, and an intermediate electrode which is provided between the target and the acceleration electrode and is applied with reverse voltage of the voltage applied to the acceleration electrode.
US09859081B2	Circuit breaker with movable terminal barrier A circuit breaker includes a housing having a bottom containing a first cavity, a second cavity and a trip mechanism disposed in the housing. A first terminal is electrically connected to the trip mechanism and located in the first cavity and a second terminal is electrically connected to the trip mechanism and located in the second cavity. A first terminal barrier is connected to the housing and is movable from a first position covering the first cavity to a second position at least partially exposing the first cavity and a second terminal barrier is connected to the housing and is movable from a first position covering the second cavity to a second position at least partially exposing the second cavity.
US09859080B2	Molded case circuit breaker Provided is a molded case circuit breaker eliminating the necessity to install a communication unit and a particular communication medium and allowing for checking an fault type from a front indication operation panel of an enclosure of a power distributing board or from a remote area by simply connecting two signal lines for transmitting a relay switching signal as an accident current indication signal, the circuit breaker comprises a relay assembly including a plurality of fault indicating relays installed in the circuit breaker and configured to generate a fault current indication signal by opening or closing a contact when the indication command signal of a fault current is received from the electronic trip unit, and a signal output terminal configured to output a fault type indication signal of the fault indicating relays to the outside of the circuit breaker.
US09859076B2	Encapsulated micro-electromechanical system switch and method of manufacturing the same Encapsulated MEMS switches are disclosed along with methods of manufacturing the same. A first sacrificial layer is used to form the actuation member of the MEMS switch. A second sacrificial layer is used to form the enclosure that encapsulates the MEMS switch.
US09859073B2	Tactile button device, tactile button assembly and single-use product A tactile button device is provided and is suitable to be sterilized. The tactile button device has at least one receptacle that is adapted to be filled at least partly with a material and further is configured so that the material filled into the receptacle is displaced when subjected to a pressure. At least one duct is connected to the receptacle and allows the pressure exerted to the material to be transmitted. A connector is connected to the at least one duct and is connectable to a detection device so that the pressure on the material is transmitted to the detection device.
US09859071B2	Method, apparatus, and system for controlling electric current A method for switching on and off electric current includes detecting a verification condition, switching on the electric current responsive to the detected verification condition, establishing a communication via a communication network after switching on the electric current, detecting a switch-off condition via the established communication, and switching off the electric current responsive to the detected switch-off condition. An apparatus and a system are described for controlling switching on and off electric current.
US09859067B2	Limit switch A limit switch includes fixed contacts and a movable contact, the fixed contacts and the movable contact formed from an Au—Ni metal alloy of no less than 97% Au by weight. The limit switch detects position, change, movement, number of passes, or the like and outputs an “on” signal or an “off” signal depending on whether a detection occurred.
US09859066B2	Atomic capacitor This invention describes a capacitor that formed by a charge or species specific membrane material filled with aqueous or non-aqueous liquid with soluble salts dissolved and non-dissolved in solution and contained within the membrane material. When charged, the oppositely charged ion will leave the structure, leaving behind a charged atomic capacitor.
US09859065B1	High voltage capacitor with increased anode surface area and method of making same An electrolytic capacitor is disclosed having a housing in an arced-trapezoidal shape. Disposed within the housing are one or more anodes, one or more cathodes, one or more separators disposed between anodes that are adjacent anodes cathodes, and an electrolyte disposed around the one or more anodes, the one or more cathodes, and the one or more separators within the housing. The housing of the electrolytic capacitor includes front and back walls shaped as arced-trapezoids and four sidewalls that substantially follow the outline of the front and back walls. The electrolytic capacitor is configured to connect in series with one or more electrolytic capacitors of the same shape to form a capacitor assembly. In the capacitor assembly, electrolytic capacitors are placed such that sidewalls are adjacent to each other to form a D-shaped capacitor assembly.
US09859064B2	Method for producing activated carbon sheet and method for improving impregnation of activated carbon sheet with electrolyte solution A method for producing an activated carbon sheet having high electrolyte impregnation capacity and high mechanical strength is provided. The method for producing an activated carbon sheet includes a sheet preparation step of preparing a sheet including an activated carbon, an electrically conductive carbon material, and a fibrous fluorocarbon resin binder, which fluorocarbon resin is polytetrafluoroethylene and/or modified polytetrafluoroethylene; and a light irradiation step of performing light irradiation of at least one side of the sheet such that the cumulative irradiation dose on the sheet surface is 50 to 1000 mJ/cm2.
US09859063B2	High surface area nano-structured graphene composites and capacitive devices incorporating the same A carbon composite material, including a plurality of spaced graphene sheets, each respective sheet having opposed generally planar surfaces, and a plurality of functionalized carbonaceous particles. At least some functionalized carbonaceous particles are disposed between any two adjacent graphene sheets, and each respective at least some functionalized carbonaceous particle is attached to both respective any two adjacent graphene sheets. Each respective graphene sheet comprises at least one layer of graphene and at least portions of respective any two adjacent graphene sheets are oriented substantially parallel with one another.
US09859060B1	Capacitor with multiple elements for multiple replacement applications An apparatus includes a case having an elliptical cross-section capable of receiving a plurality of capacitive elements. One or more of the capacitive elements provide at least one capacitor having a first capacitor terminal and a second capacitor terminal. The apparatus also includes a cover assembly that includes a deformable cover mountable to the case, and, a common cover terminal having a contact extending from the cover. The cover assembly also includes at least three capacitor cover terminals, each of the at least three capacitor cover terminals having at least one contact extending from the deformable cover. The deformable cover is configured to displace at least one of the at least three capacitor cover terminals upon an operative failure of at least one of the plurality of the capacitive elements. The cover assembly also includes at least four insulation structures. One of the four insulation structures is associated with one of the at least three capacitor cover terminals. The apparatus also includes a first conductor capable of electrically connecting the first capacitor terminal of a capacitor provided by one of the plurality of capacitive elements to one of the at least three capacitor cover terminals and a second conductor capable of electrically connecting the second capacitor terminal of the capacitor provided by one of the plurality of capacitive elements to the common cover terminal.
US09859059B2	Multilayer ceramic capacitor A multilayer ceramic capacitor includes a multilayer unit, thickness-direction first and second outer layer sections, length-direction first and second outer layer sections, and width-direction first and second outer layer sections. A dimension of the thickness-direction second outer layer section is greater than a dimension of the thickness-direction first outer layer section. The thickness-direction second outer layer section includes an inner portion and an outer portion. A composition ratio of Si to Ti in a ceramic dielectric layer included in the outer portion is higher than that in the inner portion. A boundary portion between the outer portion and the inner portion has a larger Si content than the outer portion. The inner portion has a higher composition ratio of Mn to Ti than the outer portion. Each of minimum dimensions in the length direction of the length-direction first and second outer layer sections is greater than both dimensions in the width direction of the width-direction first and second outer layer sections.
US09859058B2	Multilayer ceramic capacitor and board having the same A multilayer ceramic capacitor includes a ceramic body including an active portion including dielectric layers and internal electrodes that are alternately stacked and a margin portion disposed on outer surfaces of the active portion; and external electrodes disposed on outer surfaces of the ceramic body. The margin portion includes an inner half adjacent to the active portion and an outer half adjacent to the edge of the ceramic body, and a porosity of the inner half is greater than a porosity of the outer half.
US09859053B2	Electronic device for reducing interference between a charging coil and an antenna An electronic device is provided. The electronic device includes a battery; a non-contact near field communication antenna; a wireless charging coil; and a case covering the battery, wherein the wireless charging coil is positioned between the battery and the case, and wherein one of the non-contact near field communication antenna and the wireless charging coil is positioned to surround the other one of the non-contact near field communication antenna and the wireless charging coil.
US09859048B2	Coil component The sum of the area of a region occupied by a top surface of a first flange portion and the area of a region occupied by a top surface of a second flange portion is ⅔ or larger the area of an imaginary quadrangle defined by two vertices on the side of the outer periphery of the top surface of the first flange portion, and two vertices on the side of the outer periphery of the top surface of the second flange portion.
US09859046B2	Method and system for controlling chemical reactions between superconductors and metals in superconducting cables A method, system, and apparatus for fabricating a high-strength Superconducting cable comprises pre-oxidizing at least one high-strength alloy wire, coating at least one Superconducting wire with a protective layer, and winding the high-strength alloy wire and the Superconducting wire to form a high-strength Superconducting cable.
US09859045B2	Superconducting magnet A superconducting magnet is provided for magnetic resonance imaging (MRI) or spectroscopy (MRS). The magnet has a plurality of discrete Niobium-Titanium superconductor coils arranged longitudinally along a common central axis, the Niobium-Titanium superconductor coils generating a first magnetic field when in use, the first magnetic field having high field regions of at least 5 Tesla radially inward of the discrete coils. At least two Niobium-Tin superconductor coils are located along the common central axis, each of which is located in a said high field region of the first magnetic field, the Niobium-Tin superconductor coils each generating a respective second magnetic field when in use, which combines with the first magnetic field to produce a resultant magnetic field which is of higher field strength than that of the first magnetic field at a location on the common central axis. The magnet is arranged to have a radial separation between each Niobium-Tin coil and the closest Niobium-Titanium coil to the respective Niobium-Tin coil, and there is an axial bore through the coils having a diameter of at least 150 mm.
US09859043B2	Magnetic components and methods of manufacturing the same Magnetic component assemblies including moldable magnetic materials formed into magnetic bodies, at least one conductive coil, and termination features are disclosed that are advantageously utilized in providing surface mount magnetic components such as inductors and transformers.
US09859037B2	Downhole cables and methods of making the same A downhole cable that has a cable core with an inner jacket located about it. The inner jacket has a shell located thereabout, and a pair of strength member layers surrounds the inner shell. Interstitial spaces of the strength member layers are filled with bonding layers. One of the strength member layers is at a contra-helical lay angle to the other. An outer jacket is located about one of the strength member layers, and the outer jacket is bonded with the bonding layers.
US09859031B2	Cu—Ni—Si based copper alloy A rolled Cu—Ni—Si based copper alloy having excellent strength, electric conductivity, and bending coefficient is provided. The rolled copper alloy comprises 1.2 to 4.5% by mass Ni, 0.25 to 1.0% by mass Si, and the balance Cu with inevitable impurities. In the direction transverse to the rolling direction, the rolled copper alloy has a bending coefficient of 130 GPa or more and an electrical conductivity of 30% ICAS or more.
US09859029B2	X-ray laser microscopy sample analysis system and method Improved system and method of X-ray laser microscopy that combines information obtained from both X-ray diffraction and X-ray imaging methods. At least one sample is placed in an ultra-cold, ultra-low pressure vacuum chamber, often using a sample administration device configured to present a plurality of samples. The sample is exposed to brief bursts of coherent X-ray illumination, often further concentrated using X-ray mirrors and pinhole collimation methods. Higher resolution data from the samples is obtained using hard X-ray lasers, such as free electron X-ray lasers, and X-ray diffraction methods. Lower resolution data from the same samples can be obtained using any of hard or soft X-ray laser sources, and X-ray imaging methods employing nanoscale etched zone plate technology. In some embodiments both diffraction and imaging data can be obtained simultaneously. Data from both sources are combined to create a more complete representation of the samples.
US09859028B2	Method of producing a Fresnel Zone Plate for applications in high energy radiation The invention concerns to a method of producing a Fresnel Zone Plate (1) for applications in high energy radiation including the following steps: supply of a substrate (2) transparent for high energy radiation, deposition of a layer (3) of a metal, a metal alloy or a metal compound on a planar surface (4) of the substrate (2), calculating a three dimensional geometrical profile (5) with a mathematical model, setting up a dosage profile (6) for an ion beam of the ion beam lithography inverse to the calculated three dimensional geometrical profile (5) and milling a three dimensional geometrical profile (5) with concentric zones into the layer (3) with ion beam lithography by means of focused ion beam.
US09859027B2	Multi stage safety injection device and passive safety injection system having the same The present disclosure may disclose a multi stage safety injection device, including a safety injection tank formed to contain coolant to be injected into a reactor vessel by a gravitational head of water when an accident occurs in which the pressure or water level of the reactor vessel is decreased, a pressure balance line connected to the reactor vessel and safety injection tank to form a pressure balance between the reactor vessel and the safety injection tank, and a set of safety injection lines connected to the safety injection tank and the reactor vessel to inject coolant to the reactor vessel in a pressure balance state between the reactor vessel and the safety injection tank, and connected to the safety injection tank with different heights to reduce a flow rate of coolant injected into the reactor vessel step by step according to the water level reduction of the safety injection tank in order to inject coolant to the reactor vessel at multi stages.
US09859016B2	Semiconductor device and method for writing thereto A semiconductor device (1001) includes: a memory cell; and a writing control circuit (107), wherein the memory cell includes a memory transistor (10A) which has an active layer (7A), the active layer (7A) including a metal oxide, the memory transistor (10A) is a transistor which is capable of being irreversibly changed from a semiconductor state where a drain current Ids depends on a gate-source voltage Vgs to a resistor state where the drain current Ids does not depend on the gate-source voltage Vgs, and the writing control circuit (107) is configured to control voltages applied to a drain electrode, a source electrode and a gate electrode such that Vgs≧Vds+Vth is satisfied where Vth is a threshold voltage of the memory transistor (10A) and Vds is a drain-source voltage of the memory transistor (10A), whereby writing in the memory transistor (10A) is performed.
US09859014B2	Semiconductor memory device including multi-level cell and programming method thereof There are provided a semiconductor memory device and an operating method thereof. A semiconductor memory device may include a memory cell array, a peripheral circuit, a control logic, and one or more programs. The memory cell array may include a plurality of memory cells. The peripheral circuit may perform a program operation on the memory cell array. The control logic may control the peripheral circuit to program the memory cell array. The one or more programs are configured to be executed by the control logic. The programs may include an instruction for pre-programming one or more memory cells to be programmed to one or more target program states to have threshold voltage distributions lower than the target program state.
US09859006B1	Algorithmic N search/M write ternary content addressable memory (TCAM) The present disclosure relates to a content addressable memory (CAM), and more particularly, to an algorithmic ternary content addressable memory (TCAM) that instantiates multiple copies of X-Y TCAMs. The structure includes a content addressable memory (CAM) and an array which instantiates multiple replicated copies of the CAM in a row direction and a column direction of the array.
US09859005B2	Memory device Disclosed is a method of selecting a data candidate having a maximum value from a plurality of data candidates stored in columns in a memory array. The method includes computing marker bit values for each row of data in the memory array, and performing a Boolean OR operation on the marker bit values to generate a responder signal value. Also disclosed is a memory device including a memory array of memory cells arranged in rows and columns, and responder signal circuitry to generate a responder signal responsive to positive identification of a data candidate in the memory array.
US09859001B2	Method for switching memory resistance by near-infrared laser beam A method for switching a memory resistance, including: changing a memory resistance of an oxide thin film of a semiconductor device by irradiating a near-infrared laser beam onto the oxide thin film, the semiconductor device having the oxide thin film formed on a substrate and two terminals formed at both ends of the oxide thin film.
US09859000B1	Apparatus for providing adjustable reference voltage for sensing read-out data for memory A data sensing apparatus adapted for sensing read-out data of a memory apparatus includes a sensing reference voltage generator, a sensing reference current generator, and a sense amplifier. The sensing reference voltage generator receives a reference voltage, generates a reference current according to the reference voltage and a control signal, and generates a sensing reference voltage according to the reference current. The sensing reference current generator receives the sensing reference voltage, and generates a sensing reference current according to the sensing reference voltage and the control signal. The sense amplifier receives the sensing reference current and a read-out current from the selected memory cell, and senses a current difference between the sensing reference current and the read-out current to generate the read-out data.
US09858998B2	Semiconductor storage device and control method of semiconductor storage device with detecting levels of a multi-ary signal According to one embodiment, there is provided a semiconductor storage device including N word lines, M bit lines, multiple memory cells, and a read circuit. N is an integer of four or greater. M is an integer of two or greater. The M bit lines intersect with the word lines. The multiple memory cells are placed at positions where the word lines and the bit lines intersect. The memory cell stores binary data. The read circuit is connected to the M bit lines. The read circuit is able to detect levels of a multi-ary signal.
US09858995B1	Method for operating a memory device A memory device includes N word lines, wherein the word lines include an ith word line coupled to an ith memory cell and an (i+1)th word line coupled to an (i+1)th memory cell which is disposed adjacent to the ith memory cell and is a programmed memory cell, and i is an integer from 0 to (N−2). A method of operating such a memory device method includes a reading step. In the reading step, a read voltage is provided to the ith word line, a first pass voltage is provided to the (i+1)th word line, and a second pass voltage is provided to the others of the word lines, wherein the second pass voltage is lower than the first pass voltage.
US09858983B2	Memory device having latency control circuit for controlling data write and read latency A memory device may include a latency control circuit configured to control a write latency and a read latency. The memory device compensates a write latency corresponding to a write command in response to a clock signal for a delay time on a data input path, and generates a write latency control signal. Write data input to a data bus in response to the write latency control signal is immediately aligned with the clock signal and latched and provided to a memory cell array.
US09858982B1	Refresh control device A refresh control device may include, an address processing circuit configured to divide an input address into a plurality of partial addresses, and generate an updated partial address input count based on an input count for each partial address value. The refresh control device also includes a target refresh address generation circuit configured to generate a target refresh address based on the updated partial address input count, and a target refresh circuit configured to perform a refresh operation on a word line corresponding to the target refresh address.
US09858979B1	Reprogrammable non-volatile ferroelectric latch for use with a memory controller Methods, systems, and apparatuses related to a reprogrammable non-volatile latch are described. A latch may include ferroelectric cells, ferroelectric capacitors, a sense component, and other circuitry and components related to ferroelectric memory technology. The ferroelectric latch may be independent from (or exclusive of) a main ferroelectric memory array. The ferroelectric latch may be positioned anywhere in the memory device. In some instances, a ferroelectric latch may be positioned and configured to be dedicated to single piece of circuitry in the memory device.
US09858978B2	Offset compensation for ferroelectric memory cell sensing Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Offsets in the threshold voltage of switching components (e.g., transistors) connected to digit lines may be compensated by using various operating techniques or additional circuit components, or both. For example, a switching component connected to a digit line may also be connected to an offset capacitor selected to compensate for a threshold voltage offset. The offset capacitor may be discharged in conjunction with a read operation, resulting in a threshold voltage applied to the switching component. This may enable all or substantially all of the stored charge of the ferroelectric memory cell to be extracted and transferred to a sense capacitor through the transistor. A sense amplifier may compare the voltage of the sense capacitor to a reference voltage in order to determine the stored logic state of the memory cell.
US09858968B2	Mobile terminal and controlling method thereof A mobile terminal, including a touchscreen and a controller configured to display a playing image of a first video as a main image in a first region of the touch screen, display a video list in a second region of the touchscreen different than the first region while the playing image of the first video is displayed in the first region, the video list including a first thumbnail image representing the first video and a second thumbnail image representing a second video, display a playing image of the second video in a first size as a preview image in the second region while the playing image of the first video is displayed in the first region, such that the playing image of the first video in the first region and the playing image of the second video in the second region are simultaneously displayed, in response to a first proximity touch input to the second thumbnail image, and display the playing image of the second video in a second size larger than the first size, in response to a first contact touch input to the second thumbnail image. In addition, the preview image of the second video is larger than the second thumbnail image.
US09858966B2	Digital video recorder options for editing content A system for providing digital video recorder options for editing content is disclosed. In particular, the system may include receiving requests for a first version of media content and providing access to the first version of the media content. A user that accesses the first version of the media content may select a portion of the media content, and indicate whether, for example, the portion should be skipped, modified, or emphasized when the media content is accessed on a subsequent occasion. The system, based on the selection and indication, may edit the first version of the media content to create a second version of the media content. When a subsequent attempt is made to access the first version of the media content, the system may provide the user with the option to access the second version of the media content.
US09858959B2	Adaptively mounting and unmounting removable storage media based on monitoring requests and states of storage drives and the storage media A storage system is proposed which comprises a data storage device including a number N of removable storage media for storing data, with N≧2, and a number m of drives, with m≧1, wherein each of the m drives is configured to drive one of the removable storage media mounted to the drive. The storage system includes a server being coupled to the data storage device and configured to serve requests from clients, and a controller which is configured to control the data storage device to adaptively unmount the removable storage media based on a monitoring information of the requests at the data storage device, states of the drives, and states of the removable storage media.
US09858958B2	High density hybrid storage system A computer-implemented method includes receiving a request for data; determining whether the data is stored in a linear storage media tier and/or in a second storage tier having higher performance than the linear storage media tier. The linear storage media tier includes: reels having linear media thereon, a rest area for storing the reels when not in use, linear media drive(s) configured for reading and/or writing the linear media, and mobile robot(s) for transporting the linear storage media between the rest area and the linear media drive(s). The method also includes instructing the mobile robot to transport one of the reels having the data thereon to one of the linear media drives in the linear storage media tier when the data is stored in the linear storage media tier; receiving the data from the one of the linear media drives; and sending the data.
US09858955B1	Disturbance compensation for dual-stage servo system using vibration sensor An apparatus includes a microactuator controller configured to generate a microactuator control signal, a feedforward microactuator compensator configured to generate a microactuator compensation signal, and a microactuator model filter configured to filter a modified microactuator control signal. The microactuator compensation signal is configured to be injected into the microactuator control signal to generate the modified microactuator control signal. The microactuator model filter generates a filtered modified microactuator control signal and injects the filtered modified microactuator control signal into a position error signal to generate a modified position error signal.
US09858950B1	Dual-layer magnetic recording A method and apparatus for increasing storage capacity on magnetic media. A dual-layer magnetic recording apparatus receives, a write operation instruction, bit position and bit value where the bit position includes a media surface position and magnetic media layer identifier. The dual-layer magnetic recording apparatus accesses a dual-layer magnetic media where the dual-layer magnetic media includes a first magnetic media layer with a thermally controllable coercivity, a second magnetic media layer and a separation layer. The magnetic layer identifier is determined to associated with be the first magnetic media layer or the second magnetic media layer. When the magnetic layer identifier is the second magnetic media layer, the bit value is written based on magnetically charging the second magnetic media layer and when the magnetic layer identifier is the first magnetic media layer the bit value is written based on heating and magnetically charging the first magnetic media layer.
US09858945B2	Subband block based harmonic transposition The present document relates to audio source coding systems which make use of a harmonic transposition method for high frequency reconstruction (HFR), as well as to digital effect processors, e.g. exciters, where generation of harmonic distortion add brightness to the processed signal, and to time stretchers where a signal duration is prolonged with maintained spectral content. A system and method configured to generate a time stretched and/or frequency transposed signal from an input signal is described. The system comprises an analysis filterbank configured to provide an analysis subband signal from the input signal; wherein the analysis subband signal comprises a plurality of complex valued analysis samples, each having a phase and a magnitude. Furthermore, the system comprises a subband processing unit configured to determine a synthesis subband signal from the analysis subband signal using a subband transposition factor Q and a subband stretch factor S. The subband processing unit performs a block based nonlinear processing wherein the magnitude of samples of the synthesis subband signal are determined from the magnitude of corresponding samples of the analysis subband signal and a predetermined sample of the analysis subband signal. In addition, the system comprises a synthesis filterbank configured to generate the time stretched and/or frequency transposed signal from the synthesis subband signal.
US09858944B1	Apparatus and method for linear and nonlinear acoustic echo control using additional microphones collocated with a loudspeaker Apparatus for linear and nonlinear acoustic echo control includes loudspeaker, first, second, and third microphone, beamformer, and first echo canceller. The loudspeaker outputs a loudspeaker signal that includes reference signal. The first microphone and the second microphone are collocated with the loudspeaker, receive at least one of: a near-end speaker signal from a near-end speaker and the loudspeaker signal, and generate first and second microphone uplink signals, respectively. The third microphone receives the near-end speaker signal and generates a third microphone uplink signal. The beamformer receives the first and second microphone uplink signals, directs a beam towards the loudspeaker and drives a null towards the near-end speaker, and generates a beamformer output. The first echo canceler receives the third microphone uplink signal and the beamformer output, and cancels echoes in the third microphone uplink signal based on the beamformer output to generate an echo cancelled signal. Other embodiments are described.
US09858943B1	Accessibility for the hearing impaired using measurement and object based audio A setup application in a TV, sound bar, surround sound speaker system, or AVR creates a hearing profile for a user, calibrating various frequencies according to an interactive calibration step. Then, object-based audio, which may include metadata describing the key aspects of the audio, is used to identify the key aspects so that they can be emphasized, using the calibration information, to allow for increased intelligibility and the most natural listening experience possible for the hearing-impaired. EQ calibration for each speaker also may be effected for each user.
US09858941B2	Selective phase compensation in high band coding of an audio signal A method includes determining, at an encoder, phase adjustment parameters based on a high-band residual signal. The method also includes inserting the phase adjustment parameters into an encoded version of the audio signal to enable phase adjustment during reconstruction of the audio signal from the encoded version of the audio signal.
US09858936B2	Methods and systems for selecting layers of encoded audio signals for teleconferencing In some embodiments, a method for selecting at least one layer of a spatially layered, encoded audio signal. Typical embodiments are teleconferencing methods in which at least one of a set of nodes (endpoints, each of which is a telephone system, and optionally also a server) is configured to perform audio coding in response to soundfield audio data to generate spatially layered encoded audio including any of a number of different subsets of a set of layers, the set of layers including at least one monophonic layer, at least one soundfield layer, and optionally also at least one metadata layer comprising metadata indicative of at least one processing operation to be performed on the encoded audio. Other aspects are systems configured (e.g., programmed) to perform any embodiment of the method, and computer readable media which store code for implementing any embodiment of the method or steps thereof.
US09858935B2	Audio decoder for wind and microphone noise reduction in a microphone array system An audio system encodes and decodes audio captured by a microphone array system in the presence of wind noise. The encoder encodes the audio signal in a way that includes beamformed audio signal and a “hidden” representation of a non-beamformed audio signal. The hidden signal is produced by modulating the low frequency signal to a high frequency above the audible range. A decoder can then either output the beamformed audio signal or can use the hidden signal to generate a reduced wind noise audio signal that includes the non-beamformed audio in the low frequency range.
US09858932B2	Processing of time-varying metadata for lossless resampling Embodiments are directed to a method of representing spatial rendering metadata for processing in an object-based audio system that allows for lossless interpolation and/or re-sampling of the metadata. The method comprises time stamping the metadata to create metadata instances, and encoding an interpolation duration to with each metadata instance that specifies the time to reach a desired rendering state for the respective metadata instance. The re-sampling of metadata is useful for re-clocking metadata to an audio coder and for the editing audio content.
US09858929B2	Computer-implemented system and method for transcription error reduction A computer-implemented system and method for transcription error reduction is provided. A transcribed value is assigned to each utterance obtained from a user during a call and a confidence score is assigned to each transcribed value. An accuracy threshold is applied to the confidence scores and the transcribed values that satisfy the accuracy threshold are incorporated in a message. A grouping is generated for at least one of the utterances associated with one such transcribed value that fails to satisfy the accuracy threshold. The grouping includes the at least one utterance and related utterances from other calls. Further transcribed values for at least a portion of the utterances in the grouping are received from human transcribers. The remaining utterances in the grouping are provided to the human transcribers when the further transcribed values differ. The further transcribed value for the at least one utterance is incorporated in the message.
US09858928B2	Location-based responses to telephone requests A method for receiving processed information at a remote device is described. The method includes transmitting from the remote device a verbal request to a first information provider and receiving a digital message from the first information provider in response to the transmitted verbal request. The digital message includes a symbolic representation indicator associated with a symbolic representation of the verbal request and data used to control an application. The method also includes transmitting, using the application, the symbolic representation indicator to a second information provider for generating results to be displayed on the remote device.
US09858927B2	Processing spoken commands to control distributed audio outputs A system that is capable of controlling multiple entertainment systems and/or speakers using voice commands. The system receives voice commands and may determine audio sources and speakers indicated by the voice commands. The system may generate audio data from the audio sources and may send the audio data to the speakers using multiple interfaces. For example, the system may send the audio data directly to the speakers using a network address, may send the audio data to the speakers via a voice-enabled device or may send the audio data to the speakers via a speaker controller. The system may generate output zones including multiple speakers and may associate input devices with speakers within the output zones. For example, the system may receive a voice command from an input device in an output zone and may reduce output audio generated by speakers in the output zone.
US09858925B2	Using context information to facilitate processing of commands in a virtual assistant A virtual assistant uses context information to supplement natural language or gestural input from a user. Context helps to clarify the user's intent and to reduce the number of candidate interpretations of the user's input, and reduces the need for the user to provide excessive clarification input. Context can include any available information that is usable by the assistant to supplement explicit user input to constrain an information-processing problem and/or to personalize results. Context can be used to constrain solutions during various phases of processing, including, for example, speech recognition, natural language processing, task flow processing, and dialog generation.
US09858923B2	Dynamic adaptation of language models and semantic tracking for automatic speech recognition Generally, this disclosure provides systems, devices, methods and computer readable media for adaptation of language models and semantic tracking to improve automatic speech recognition (ASR). A system for recognizing phrases of speech from a conversation may include an ASR circuit configured to transcribe a user's speech to a first estimated text sequence, based on a generalized language model. The system may also include a language model matching circuit configured to analyze the first estimated text sequence to determine a context and to select a personalized language model (PLM), from a plurality of PLMs, based on that context. The ASR circuit may further be configured to re-transcribe the speech based on the selected PLM to generate a lattice of paths of estimated text sequences, wherein each of the paths of estimated text sequences comprise one or more words and an acoustic score associated with each of the words.
US09858922B2	Caching speech recognition scores Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for caching speech recognition scores. In some implementations, one or more values comprising data about an utterance are received. An index value is determined for the one or more values. An acoustic model score for the one or more received values is selected, from a cache of acoustic model scores that were computed before receiving the one or more values, based on the index value. A transcription for the utterance is determined using the selected acoustic model score.
US09858916B2	Sound processing method and terminal device A method comprising acquiring an analog first sound signal, performing analog-to-digital conversion on the first sound signal to generate a digital second sound signal, performing reverberation processing, at a system bottom layer, on the second sound signal to generate a digital third sound signal, performing digital sound mixing processing on the third sound signal and a background sound signal sent from an application layer to generate a digital fourth sound signal, performing digital-to-analog conversion on the fourth sound signal to generate an analog fifth sound signal, performing analog sound mixing processing on the first sound signal and the fifth sound signal to generate an analog sixth sound signal, and playing the sixth sound signal.
US09858913B2	Noise removal system A system for noise removal is coupled to a signal unit that provides a digital signal. The noise removal system includes a transformation module to transform the digital signal into an f-digital signal, a threshold filter to generate a noiseless signal from the f-digital signal based on a threshold profile, and a signal synthesizer to provide a gain to the noiseless signal and to transform the noiseless signal into an output signal.
US09858910B2	Method, client and computer storage medium for processing information The present disclosure discloses a method, a client and a computer storage medium for processing information, wherein the method includes: triggering a first operation; downloading a first audio file and a first text file matching the first audio file in response to the first operation; partly truncating the first audio file to obtain a first audio clip according to first indication information for identifying a truncating start position and second indication information for identifying a truncating end position; triggering a second operation; playing the first audio clip and dynamically displaying a text information part in the first text file corresponding to the first audio clip synchronously in response to the second operation; acquiring voice information of a user while playing the first audio chip; and synthesizing the first audio clip and the voice information into a first acquisition result.
US09858906B2	Musical instrument case having an adjustable supporting means The present invention relates to a musical instrument case (10) for storing a musical instrument, comprising a case body (12) having an inner wall (16), a cover (18) is attached to the case body (12), an adjustable supporting means (24) is affixed on the inner wall (16) wherein the adjustable supporting means (24) comprising at least one of cushioning unit (26) and each cushioning unit (26) is connectable by a rope (28), wherein the cushioning unit (26) is expanded to securely grip the musical instrument when the rope (28) is pulled and can be adjusted to fit with various sizes of the musical instruments.
US09858904B1	Insertable percussion system A drumming system includes a percussion instrument; an inserting/retracting coupled to the percussion instrument for moving the first percussion instrument to a desired position with respect to a second percussion instrument; the inserting/retracting mechanism including a motor, an input device for receiving an operation instruction and generating an operation signal based on the operation instruction, a feedback mechanism for obtaining position information of the first percussion instrument and generating a feedback signal representative of the position information, and a controller electrically coupled to the input device, the motor, and the feedback mechanism for actuating the motor based on the operation signal and the feedback signal.
US09858899B2	Managing transitions of adaptive display rates for different video playback scenarios To manage dynamic adjustment of the refresh rate of a computer display, the operating system defines at least two playback modes: one or more custom modes that can be selected by applications, and a standard mode which is a default setting for the system that can be expected by applications. The operating system provides an application programming interface that enables an application to request using a custom mode. If approved to use the custom mode, then the application presents frames for display based on the custom mode. The operating system stores timing data for each buffered frame indicating how to play the frame in both standard mode and the custom mode. If a transition back to the standard mode occurs, the operating system uses the timing data to properly present frames of video until the application stops generating frames of video in the custom mode.
US09858897B2	Display driver integrated circuit including a plurality of timing controller-embedded drivers for driving a plurality of display regions in synchronization and a display device including the same A display device includes at least one display panel and a display driver integrated circuit (DDI). The at least one display panel includes a first display region and a second display region. The DDI includes a first timing controller-embedded driver (TED) and a second TED. The first TED is configured to process a first image data to provide a first display data to the first display region and the second TED is configured to process a second image data to provide a second display data to the second display region. The first TED is configured to control display timings of the first display data and the second display data.
US09858895B2	Method for adjusting screen brightness and system thereof A method for adjusting screen brightness and system thereof are described. The method comprises: acquiring an attribute parameter of a screen image and a current screen brightness in a smartphone; comparing the attribute parameter of the screen image of the smartphone to the current screen brightness; and decreasing a screen display brightness when the attribute parameter is greater than the screen brightness; and increasing the screen display brightness when the attribute parameter is less than the screen brightness.
US09858892B2	Method and computing device for identifying a pixel visibility loss condition A method, a computing device and a computer program product are provided to identify an instance in which a pixel visibility loss condition exists following window leveling. In the context of a method, window and level values and corresponding minimum and maximum values for a window are identified. The method then determines whether the pixel visibility loss condition exists based upon one or more of the window and level values, the minimum value or the maximum value. In this regard, the method determines whether a pixel visibility loss condition exists by determining whether there is a gray scale loss, a gray scale compression or a lack of perceptible distinctiveness between pixels within the window. In an instance in which the pixel visibility loss condition exists, the method causes an indication to be provided to a user.
US09858887B2	Pen-type drug injector with dose encoder having piezoelectric transducers and alphanumeric segmented electronic display therefor A display arrangement for e.g. a medical substance delivery device includes a movable control member, at least one transducer responsive to movement of the control member to convert mechanical energy into electrical energy to output an electrical signal, a drive circuit for receiving the electrical signal and for outputting an output drive signal, and a display device for receiving the output drive signal and displaying a variable image that varies consequent on the relative movement. The display may be a bistable display, so that the display function is self-powered without a requirement for a battery or the like. The parameter displayed for a medical substance delivery device may be a dose volume, a count of doses delivered, progress and/or completion of a dose. The drive circuit is an absolute position encoder and detects the actual position of the control member and does not deduce the position by counting pulses.
US09858886B2	Method, apparatus, and storage medium for compensating for defective pixel of display Provided is a method for compensating for a defective pixel of a display. The method includes identifying at least one of a plurality of pixels of a display as a defective pixel and compensating for a function of the defective pixel by using at least one pixel from a first pixel group located in a first partial region corresponding to the defective pixel and a second pixel group located in a second partial region located adjacent to the first partial region among a plurality of partial regions, each partial region comprising some adjacent pixels among the plurality of pixels.
US09858884B2	Source driver and display apparatus including the same Disclosed is a display driver including an input pad configured to receive a supply voltage, a wiring line connected to the input pad, a digital-to-analog converter configured to output analog signals based on digital-to-analog conversion results of data, a plurality of output buffer units configured to buffer the analog signals, and a plurality of bias controllers connected to different positions of the wiring line. Each of the bias controllers independently controls a bias voltage of a corresponding one of the output buffer units based on the supply voltage supplied through the wiring line.
US09858883B2	Display driver IC for driving with high speed and controlling method thereof A display apparatus includes a source driver printed circuit board (PCB) to provide a control signal, a panel to receive the control signal for controlling display of an image, a connector between the source driver PCB and the panel, and a source driver integrated circuit (IC) attached to the connector. The source driver IC provides a pixel voltage which corresponds to an output signal. The pixel voltage is output during a first predetermined time and is different from a data voltage corresponding to an input signal.
US09858882B2	Display apparatus with waveform adjuster generating switch control signal by switching between grounded state and ungrounded state By a simple circuit configuration, luminance unevenness is suppressed, and charge remaining after a power source supply is interrupted is suppressed. A slope control unit (52) generates a switch control signal (Von) having a waveform with a falling slope, by switching between a grounded state of being connected to a ground and an ungrounded state, and modulating the waveform of a high voltage (VGH), and in a case where a power supply from the outside is interrupted, the slope control unit (52) is in the ungrounded state.
US09858881B2	Array substrate, its driving method and display device The present disclosure provides an array substrate, its driving method and a display device. The array substrate includes a plurality of gate lines, a plurality of data lines, and a plurality of subpixels defined by the gate lines and the data lines crossing each other. At least one additional line for providing an additional data signal is arranged between the subpixels in two adjacent columns, the subpixels in an identical column correspond to at least one additional line, and at least one subpixel among the subpixels in an identical column is driven by the additional line corresponding to the at least one subpixel.
US09858879B2	Driving circuit with a feed through voltage compensation and array substrate A driving circuit with a feed through voltage compensation includes multiple gate scanning lines, multiple storage capacitance lines and multiple stages of common driving units. The common driving unit includes a gate driver and a storage capacitance driver, where the gate driver is connected to a gate scanning line to output a gate scanning signal, and the storage capacitance driver is connected to a storage capacitance line to output a storage capacitance signal. The storage capacitance signal outputted from the storage capacitance driver is adapted to compensate the gate scanning signal output from the gate driver. The driving circuit with the feed through voltage compensation allows a large gate-to-drain parasitic capacitance of the pixel, and the width of the black matrix may become smaller; therefore the pixel aperture ratio may be increased, the cost may be reduced, or the power consumption may be reduced.
US09858877B2	Active device array substrate and method for inspecting the same An active device array substrate is provided. The active device array substrate includes multiple pixel structures, a drive circuit, multiple signal lines and a control line. The pixel structures are disposed in a display area. The drive circuit is disposed outside the display area. The signal lines are electrically connected to the drive circuit and the pixel structures corresponded to the signal lines. The control lines are intersected with the signal lines. A method adapted for inspecting defects on the active device array substrate is also provided. First, a tested signal line is selected from the signal lines, and the control line and the tested-signal line are conducted. Second, a test signal is input from the control line to the tested-signal line to determine a location of a defect. Finally, the control line and the tested signal line are isolated.
US09858873B2	Liquid crystal display panel A flicker-reduced liquid crystal display panel diminishing resistance-capacitance phenomena includes a plurality of parallel scanning lines and a plurality of parallel data lines, all lines intersecting with each other at the crosses. The liquid crystal display panel further includes a pulse control circuit and a gate driver. The pulse control circuit receives a pulse signal and reduces the time of the pulse signal under control of a control signal, the control signal controlling the start and finish of the time reduction. A reduced pulse signal is output. The gate driver receives the pulse signal which is output and issues scanning signals to the plurality of scanning lines.
US09858868B2	Display apparatus for displaying an image outside of a covered region Provided is a display apparatus which allows a user to easily confirm the contents of an image during displaying, when a cover covering a display region is present, even without removing the cover. The display apparatus having a pixel region including a plurality of pixels is configured to, by a display control unit, determine whether the cover covering a part of the pixel region is present, and if it is determined that the cover is present, display the image in the pixels of the remaining part which is not covered by the cover.
US09858866B2	Organic light-emitting display device An organic light-emitting display device includes: an organic light-emitting panel comprising a plurality of pixel regions, each pixel region comprising a scan line and a data line crossing each other, each pixel region further comprising an organic light-emission element and a drive transistor configured to drive the organic light emission element; and a circuit configured to sense a threshold voltage of the drive transistor in a sensing interval and control a light emission of the organic light emission element within the pixel region in a display interval.
US09858861B2	Method of driving a display device A method of driving a display device with a plurality of pixels including a video signal wire, a first power supply wire supplied with a first potential, a second power supply wire supplied with a second potential different to the first potential, a light emitting element arranged between the first power supply wire and the second power supply wire, a drive transistor controlling a value of a current supplied to the light emitting element, and a switch arranged between the video signal wire and the drive transistor, and inputting a signal of the video signal wire to a gate terminal of the drive transistor, wherein a minimum gradation level potential is supplied to the video signal wire after a video signal is written to the capacitor of an Nth row pixel until a video signal is written to the capacitor of an Mth (N
US09858857B2	Signal processor and organic light-emitting diode display having reduced luminance deviation including the same A signal processor and an OLED display including the same are disclosed. In one aspect, the display includes a plurality of pixels and a luminance deterioration calculator configured to receive input image data and calculate luminance deterioration values of the pixels. A data compensator is configured to calculate compensation coefficients for each of the pixels based at least in part on the luminance deterioration values, adjust a compensation margin based at least in part on the maximum value of the compensation coefficients, and generate compensation image data for each of the pixels based at least in part on the compensation coefficients and the compensation margin. A panel driver is configured to generate data signals based at least in part on the compensation image data and transmit the data signal to the pixels and a timing controller configured to control the panel driver.
US09858852B2	Driving circuit, display, and method of driving the display There is provided a driving circuit driving pixels each including an electro-optical device and a memory, in a display. The driving circuit includes: a dividing section dividing one frame period into subblocks composed of subfields, the subfields corresponding to respective bits of gray-scale data and having period lengths commensurate with weights of the corresponding bits; and an ON-OFF period control section controlling a ratio of an ON period or an OFF period to one frame period by bringing an electro-optical device of the pixel into an on state or an off state according to a corresponding bit in each of the subfields. On a subblock by subblock basis, the ON-OFF period control section selects scan lines whose number is less by one than a number of the subfields included in a relevant subblock, and again selects one of the selected scan lines during a same subblock period.
US09858844B2	Display device and color conversion method A display device includes an image display unit and a conversion processing unit that receives a first input signal including first color information which is obtained based on an input video signal and which is for displaying at a predetermined pixel, and outputs a second input signal including second color information in which a hue of the first color information is varied by an amount of hue variation within a range defined such that hue variation falls within a predetermined range.
US09858839B2	Naked eye three-dimensional display panel and overdriving method thereof The disclosure is related to a naked eye three-dimensional display panel and an overdriving method. The overdriving method comprises: obtaining target voltages and overdriving voltages of driving electrodes; searching overdriving periods corresponding to the target voltages and the driving voltages in a preset look-up table, wherein mapping relations for different values of the target voltages, the overdriving voltages and the overdriving periods are stored in the preset look-up table; generating overdriving signals according to the obtained target voltages, the obtained driving voltages and the searched overdriving periods; and driving the liquid crystal prism. The disclosure can avoid the issues of insufficient overdriving and excessive overdriving and the naked eye three-dimensional displaying effect using the overdriving technology can be assured.
US09858838B1	Fan stick An apparatus for spinning a rally towel comprising a body section comprising with a first end and a second end, an outer housing extending from the first end to the second end with the outer housing having knobs at the second end, an inner cylindrical tube, at least a pair of spheres comprising a first attaching means, a second attaching means, a gripping means, a noise creating means, and a towel such that the towel is inserted in corners of said spheres between said gripping means with said second attaching means in closed position for the insertion. Further the apparatus provided plastic noise knobs that create clicking noise when flap comes in contact with plastic noise knobs. The apparatus is used as a cheering device for fans to twirl around during a sport to support the respective favorite team.
US09858836B2	Panels A panel 1 comprises a frame 2 having first and second frame portions 2a, 2b each provided with a longitudinal channel 7. The panel also comprises sheet material 4 extending across the frame 2 between the frame portions 2a, 2b. A first edge portion of the sheet material is inserted into the channel of the first frame portion 2a and a second edge portion of the sheet material is inserted into the channel of the second frame portion 2b. The first edge portion of the sheet material has a region of stiffened edging 6 that is located within the channel 7 of the first frame portion 2a. The second edge portion of the sheet material 4 is gripped within a resilient slot formed by a gripper member 5 that provides at least one resilient gripper element 5b in the channel 7 of the second frame portion 2b.
US09858825B2	Conflict detection and resolution using predicted aircraft trajectories A method of detecting conflicts between aircraft passing through managed airspace, and resolving the detected conflicts strategically. The method may include obtaining intended trajectories of aircraft through the airspace, detecting conflicts in the intended trajectories, forming a set of the conflicted aircraft, calculating one or more revised trajectories for the conflicted aircraft such that the conflicts are resolved, and advising the conflicted aircraft subject to revised trajectories of the revised trajectories.
US09858821B2	Autonomous vehicle passenger locator A system of one or more computers configured to perform particular operations or actions by virtue of having software, firmware, hardware, or a combination of them installed on the system that in operation causes or cause the system to perform the actions. One general aspect includes a first computer having a processor and a memory, the memory storing instructions executable by the processor such that the first computer is programmed to send parameters describing a target passenger to a mobile drone. The system instructs said drone to circumnavigate an area while searching said area for the target passenger with an image capturing device. The system receives communications from the drone and confirms a match to the target passenger and instructs the drone to guide the target passenger to a destination.
US09858820B2	Transportation services providing method and user device and server using the same A transportation services providing method and an user device and a server using the same are provided. The transportation services providing method includes following steps: providing a service platform connecting with at least one community website; collecting a status message, related to an event information and posted on the community website, so as to show the collected status messages on the service platform; obtaining an event location of the event information; and establishing a transportation service link on the status message, where the transportation service link provides a transportation service interface indicating the event location and a plurality of transportation requirement settings.
US09858817B1	Method and system to allow drivers or driverless vehicles to see what is on the other side of an obstruction that they are driving near, using direct vehicle-to-vehicle sharing of environment data In a vehicle communication system of vehicles, vehicles share environment data such as their location data and 360 degree view of the world with other vehicles using direct vehicle-to-vehicle (V2V) real-time data streams. A displayable map of potentially dangerous obstructions on the surrounding roadway is formed using in vehicle environment sensors allowing a driver or the controls of a driverless vehicle to be warned of the danger. A map of blind spots is built up to speed up the processing of incoming data in order to create a more complete picture of surrounding vehicles. Shared data is used to position each vehicle relative to the target vehicle. By sharing obstruction maps between vehicles, a more complete picture of the roadway can be displayed—and one vehicle can in effect “see” through another vehicle or an obstruction.
US09858813B2	Method for providing sound detection information, apparatus detecting sound around vehicle, and vehicle including the same A method for providing sound detection information producing a result of sound detection based on sound data generated by detecting sound generated around a host vehicle, may include determining an opposite lane vehicle detection index based on the result of sound detection, the opposite lane vehicle detection index forming a basis of determination of presence or absence of an opposite lane vehicle, and controlling a notification of a neighboring vehicle travelling around the host vehicle or controlling the host vehicle according to the opposite lane vehicle detection index, wherein the result of sound detection is information about the probability of presence of the neighboring vehicle for respective angles in frames consecutive over time.
US09858810B2	Arrangement and method for controlling and/or monitoring a subsea device An arrangement for controlling and/or monitoring at least one subsea device may include: a first level node communicatively, in particular electrically and/or fiberoptically connectable to an equipment above a sea surface of a sea; at least one second level node communicatively, e.g., electrically and/or fiberoptically connected to the first level node and electrically connectable to the at least one subsea device, wherein the first level node and the at least one second level node are arrangeable at a sea bottom of the sea. A corresponding method is also disclosed.
US09858807B2	Wireless control system for vehicle handle A wireless control system for controlling a remotely controlled device is disclosed. The wireless control system comprises a circuit assembly. The circuit assembly comprises a transceiver circuit and an input device in communication with a control circuit. The control circuit is configured to control the transceiver circuit in response to an input received from the input device. The circuit assembly forms a profile shape configured to be significantly disposed within a handle portion of a vehicle.
US09858804B2	Remote controller, remote device, multimedia system and the controlling method thereof Disclosed is a handheld device capable of being used as a remote controller, a remote device, a multimedia system and a corresponding controlling method. The handheld device being used as a remote control device for remotely controlling the remote device comprises: a communication unit, for establishing connection with a remote device and performing communication; an operation unit, for operating a specific procedure in the remote device by a user operation; a mode change unit, for switching the operation mode of the handheld device according to feedback information related to the specific procedure which is fed back by the remote device in response to the operation in the operation unit; a sensor data obtaining unit, for obtaining a sensor data, the sensor data being associated with the user hand's action in association with specific coordinate axes; and a sensor data transmission unit, for transmitting the obtained sensor data to the remote device through the communication unit. With the handheld device and remote device in the present invention, a more nature and comfortable remote operation experience can be provided for the user.
US09858802B2	Apparatus for testing fire alarm systems An apparatus for testing fire alarm systems allows for the remote resetting of a fire alarm system without being present proximal to a fire alarm control panel (FACP). The apparatus may also be used to test one or multiple notification appliances. The apparatus includes a portable control unit that is connected to the wiring of multiple notification appliances through a plurality of notification appliance circuit (NAC) connection terminals on the FACP or directly to a single notification appliance. An actuator for resetting a fire alarm system reset switch may be mounted to the FACP through an adjustable bracket. The length of the adjustable bracket may be adjusted in order to increase the versatility of the apparatus. A transmitter and a receiver may be utilized to remotely activate the fire alarm system reset switch as well as to activate one or multiple notification appliances during testing.
US09858799B1	Wearable device configuration interaction A method and system for interacting with a wearable device is provided. The method includes detecting, by a first wearable device of a first user, a body attachment band of a second wearable device of a second user physically interlinked with a body attachment band of the first wearable device. In response, operational attributes of the first wearable device are activated and a specified configuration between the body attachment band of the first wearable device and the body attachment band of the second wearable device is detected. Specified actions associated with the operational attributes are determined and a specified action is executed with respect to a first operational attribute. The specified action is executed with respect to the first wearable device and the second wearable device.
US09858785B2	Battery-powered device having a battery and loud sound detector using passive sensing A communication device comprises a processing circuit having at least two modes, a sleep mode and an awake mode, a wireless communications circuit that can wirelessly send a message as to whether an alarm has been triggered, and a passive sensor, powered by audio signals impinging on the passive sensor, that provides at least an approximation of an audio signal to the processing circuit so as to cause the processing circuit to switch between the at least two modes. The communication device can be housed in a housing sized to fit into a battery compartment.
US09858782B2	Alarm system and method for triggering an alarm signal The disclosure relates to an alarm system with a portable identification device and a portable alarm device, wherein the identification device is configured to receive an enquiry signal and in reaction thereto to emit an identification signal, and the alarm device comprises: a touch-sensitive sensor device, an enquiry device, which is configured to emit the enquiry signal and to receive the identification signal, and a control device, the control device being configured: in reaction to the touch signal to emit the enquiry signal by way of the enquiry device, to compare the identification signal received as a reaction to the enquiry signal with a predefined identification in order to carry out an identity check, and to emit an alarm signal if the identity check is negative. The disclosure also relates to a method for triggering an alarm signal.
US09858781B1	Architecture for access management Disclosed are techniques that render a graphical user interface on a display device for performing transactions with a security system. The techniques include listening by a user device for a beacon from the security system, the beacon including a message and imitating by the user device the transaction with the security system in response to the message, with the message causing the user device to render a graphical user interface that has fields for entering an email address and a password to register the user device with a security server, with the graphical user interface rendering on the display a public key stored in a user digital wallet and a user digital wallet identification and sending in response to the message, a user's public key that is stored in the user's wallet and which is embedded in a code.
US09858779B2	Firearm alarm The Firearm Alarm is a pressure-plate activated alarm switch to provide a functional and operational response to handguns being handled in a home. The design of the Firearm Alarm allows for mobility and placement in almost any type of setting. The alarm is a high decibel alarm that can access any part of most homes, even through closed doors and walls. The Firearm Alarm also allows for a tiered defense of a firearm such as using it in conjuncture with trigger locks and weapon safes.
US09858777B2	System, method and computer readable medium for managing mobile devices A system, method and computer readable medium are for managing display devices using manager devices. A communication link is established between display subsystems and manager subsystems. Alarm conditions are detected and reported, and alarm events are triggered within the display devices. The display devices have restricted access to applications, settings, or networks. User-generated media is deleted from the display devices. When idle or when user activity is detected, audiovisual media is presented from the display devices. Powering of the display devices is regulated. Metrics and data associated with the display devices is collected.
US09858773B2	Wearable computer having a skin-stimulating interface Techniques are described herein that are capable of providing electrical stimuli to skin of a user to convey information to the user. For instance, the electrical stimuli may inform the user of an event, a condition, etc. Examples of an event include but are not limited to receipt of a message (e.g., an email, an instant message (IM), a short message service (SMS) message, or a transcribed voicemail), receipt of an alarm (e.g., an alarm clock alarm or a warning), receipt of a phone call, occurrence of a time of day, etc. The electrical stimuli may inform the user of a condition of clothing that is worn by the user. The electrical stimuli may inform the user that a physical positioning of the user is to be changed.
US09858770B2	Projected doorbell switch notifications A doorbell switch including a projector is described. The doorbell switch can be configured to provide a first or automated display state of the projector based on one or more rules or predefined conditions defined at a client device, state conditions of a security system, or another backend the computing system, as well as various time of day, sensor, and other conditions. The automated display state can change over time in response to changes in the operation and/or status of various systems. Additionally, the doorbell switch can be configured to provide a second or actuated display state in response to the actuation of the doorbell switch.
US09858767B2	Systems and methods for outputting a representation of betting event information for a card game In accordance with some embodiments, systems, methods and articles of manufacture (e.g., non-transitory computer readable medium) provide for outputting a status (or progress in) betting for a hand (or round of a hand) of an electronic card game. For example, a betting progress indicator may comprise a visual indicator of betting for the hand and may progress from player to player during a hand (or round of a hand) as players Call or Fold but may be reset once a player Raises, thus efficiently indicating to all players that the player who Raised has re-opened betting for the hand (or round of a hand) and that any player after that player who has not previously Folded will need to make another betting decision in the current hand (or round of a hand).
US09858761B2	Real time betting system and method including a jackpot for short time interval events A real-time betting system includes an event control server enabled to communicate data via a network. The event control server communicates gaming event information to various system components and an event control database for collecting and storing event data. A real-time betting system server communicates in operative communication with the event control server and includes an odds transformation module for transforming probabilities to odds. The system has a bookmaker server and a plurality of betting devices in operative communication with the event control server. The real-time betting system server enables a jackpot payout possibility for each bet enabled by the bookmaker server. The betting devices receive event information, including odds. Bets placed at the betting devices are communicated to the bookmaker server. The events having a short time interval and are selectively communicated to the betting devices to enable bets to be placed.
US09858758B2	Bonus round items in an interleaved wagering system An interleaved wagering system is disclosed. The system includes an interactive controller constructed to communicate application telemetry associated with an interactive application provided by the interactive controller. The system also includes a wager controller constructed to communicate a wager result associated with a received wager request. The system also includes the application controller operatively connected to the interactive controller and the wager controller, and constructed to: receive application telemetry; upon receiving application telemetry, determine whether to trigger a supplementary mode; when triggering the supplementary mode is determined, communicate a notification to provide a supplementary mode session. The interactive controller is further constructed to: provide the supplementary mode session upon receiving the supplementary mode notification; communicate results of the supplementary mode session. The application controller is further constructed to: receive the results of the supplementary mode session; and when the received results are successful, communicate a request for benefits.
US09858753B2	Digital spread spectrum technique for electromagnetic emission reduction Techniques for reducing electromagnetic (EM) emission in a wager-based gaming machine. A gaming machine includes one or more processors configured to generate a bus clock signal having a fundamental frequency and fundamental spectral components at harmonics of the fundamental frequency. The fundamental spectral components each have a fundamental amplitude. A signal processor is configured to generate a spread spectrum clock signal having a nominal frequency substantially equivalent to the fundamental frequency of the bus clock signal as well as nominal spectral components at harmonics of the nominal frequency. However, the nominal spectral components each have a nominal amplitude less than the fundamental amplitude of a fundamental spectral component at the same harmonic. A bus connects the signal processor with one or more elements and carries the spread spectrum clock signal to the one or more elements, thereby reducing EM emissions from the bus.
US09858749B2	Gaming device and methods of allowing a player to play a gaming device having reels with symbol selection areas A method for allowing a player to play a slot game with a gaming device is described herein. The method includes randomly generating an outcome of the game, wherein the outcome includes a first outcome and a second outcome. The method includes spinning and stopping the plurality of reels to display the first outcome, detecting an appearance of a symbol selection area in the first outcome, and responsively selecting at least one symbol for display in the symbol selection area. The method also includes displaying the second outcome including the first outcome and the selected at least one symbol being displayed in the symbol selection area and providing an award to the player as a function of the second outcome.
US09858746B2	Controller for gaming devices A controller (100) for gaming devices comprises interfaces (109, 110) connectable to various devices of the gaming device, such as a gaming processor (103), at least one screen (101, 02), which is optionally configured as a touch screen, and a loud speaker (113). Each interface (109, 110) comprises a plurality of connectors selected from a video input connector, a video output connector, an audio input connector, an audio output connector, a touch screen signal input connector, a touch screen signal output connector, a command line connector and/or a data connector. The controller routes signals received at an input connector of a first interface (109, 110) to an output connector of a second interface (110, 09) being assigned to said signal. When necessary, the controller translates a communication protocol used by the signals received at the input connector of the first interface to a communication protocol used by the output connector of the second interface.
US09858745B1	Mind controlled casino game A computerized method for an electronic game includes starting a round of play of the electronic game, and monitoring a user's brain activity. The method includes determining whether at least one component of the user's brain activity exceeds a threshold level, and changing a chance of winning the round of play if the at least one components of the user's brain activity exceeds the threshold level. Changing the chance of winning the round of play may include increasing the chance of winning the round of play.
US09858742B2	Ultrasonic sensor for detecting double sheets and method of detecting double sheets using the same The present invention relates to an ultrasonic sensor for detecting double sheets and a method of detecting double sheets using the same, in which in configuring the ultrasonic sensor for detecting double sheets of banknotes passing through a transfer path, the ultrasonic sensor is configured to include an ultrasonic wave generator and an ultrasonic wave receiver provided in pair to face each other in a direction perpendicular to a transfer direction of the banknotes with the transfer path for transferring the banknotes interposed therebetween, and periodicity of a reception signal detected by the ultrasonic wave receiver is determined to detect whether a zero sheet, a single sheet or double sheets of the banknotes pass through the transfer path according to generation or not of the periodic signal and/or a frequency of the generation.
US09858741B2	Electronic access control and location tracking system A method and system that allows authorized individuals access into controlled access locations and the ability to grant temporary and limited access to guests into these locations. The method and system allows for navigational services to be provided to members and guests, and real-time tracking and confirmation to members and administrators that guests have arrived at their destination and did not enter any unauthorized areas. The method preferably can work through a system of wireless radio, sound and/or light-based beacons communicating with member and guest's electronic devices. Members and administrators can send one or more temporary electronic access keys to a guest's smartphone or other electronic device. Wireless radio, sound and/or light-based beacons provide an access control and location tracking system with real-time data about the member and guest whereabouts, allowing for the confirmation and tracking.
US09858740B2	Access control communication device, method, computer program and computer program product It is presented an access control communication device comprising: a short distance radio communication module; a cellular radio communication module; and a controller arranged to communicate access rights associated with a key device, using the cellular radio communication module, with an access control device over a cellular communication network, the communicating comprising sending a request for access management data associated with the lock device, and receiving access management data associated with the lock device; and the controller further being arranged to transmit the access management data to the key device for transfer to the lock device, the communicating and transmitting being arranged to be performed upon the access control device being in communication with the key device using the short distance radio communication module. A corresponding method, computer program and computer program product area also presented.
US09858739B1	Home monitoring system triggered rules In some implementations, a system can trigger an action to be performed at a property based on satisfaction of criteria related to location information and a connection status of a mobile computing device. Location information of the mobile computing device relative of a pre-defined geographic region including at least a portion of the property is initially obtained. A connection status of the mobile computing device for a short range wireless connection with a communication-enabled device within the property is then obtained. Criteria for an action at the property is then determined to be satisfied by the location information and the connection status of the mobile computing device. The action is finally triggered to be performed at the property in response to determining that criteria for the action is satisfied.
US09858737B2	Methods and systems for enabling a temporary user to gain temporary access to a locked space of a vehicle The present disclosure relates to a method for enabling a temporary user to gain temporary access to a locked space of a vehicle. The vehicle is configured to communicate with an intermediate system adapted to remotely control functionality of the vehicle. The intermediate system is configured to receive, from a user device associated with the temporary user, a request message to open a remotely operable lock of the locked space and further configured to, based on the request message, transmit an unlock message to the vehicle to open the lock. The request message from the user device includes access parameters to enable the lock to be unlocked, the access parameters received by the user device from a permission message transmitted by an owner device directly or indirectly to the user device.
US09858736B2	Password setting method and system, and lockset matching method and system A password setting method includes the following steps of: providing a lock body, which is configured with identification data; providing a reset device including a RFID, which has characteristic data; accessing the RFID to obtain the characteristic data; transmitting the characteristic data to the lock body; comparing the characteristic data and the identification data; and when the characteristic data matches the identification data, enabling a password setting function of the lock body. In addition, a password setting system and a lockset matching method and system are also disclosed.
US09858733B2	Vehicle diagnostic data collecting apparatus, vehicle diagnostic data collecting method, vehicle diagnostic machine, and vehicle diagnosing method A data collecting apparatus sets types of target ECUs, and stores, in a storage unit, driving parameter data items, which are capable of being output by a plurality of ECUs, in association with IDs of the plurality of ECUs. Subsequently, for each of the aforementioned types, a query is made to a vehicle as to whether an installed ECU exists, and the installed ECU is identified as a target ECU. Thereafter, based on the ID of the installed ECU, driving parameter data items capable of being output by the installed ECU that was identified as the target ECU are set as collection items.
US09858726B2	Range of focus in an augmented reality application A computer-implemented augmented reality method includes receiving one or more indications, entered on a mobile computing device by a user of the mobile computing device, of a distance range for determining items to display with an augmented reality application, the distance range representing geographic distance from a base point where the mobile computing device is located. The method also includes selecting, from items in a computer database, one or more items that are located within the distance range from the mobile computing device entered by the user, and providing data for representing labels for the selected one or more items on a visual display of the mobile computing device, the labels corresponding to the selected items, and the items corresponding to geographical features that are within the distance range as measure from the mobile computing device.
US09858725B2	Server and method for three-dimensional output The present invention is to provide a server and a method for three-dimensional output that easily determines the user's line of sight in a virtual reality space. The server for three-dimensional output being communicatively connected with a head mounted display outputting full dome three-dimensional space data as virtual or augmented reality corresponding to a user's line of sight sequentially transmits screen data to be output to and displayed on the head mounted display; receives data on the turn in the yaw direction and the pitch direction of the head mounted display from the head mounted display; changes the screen data based on the received turn in the yaw direction and the pitch direction of the head mounted display; and changes avatar data on the user of the head mounted display based on the received turn in the yaw direction and the pitch direction of the head mounted display.
US09858724B2	Augmented reality design system An augmented reality design system is disclosed. The augmented reality design system allows a user to create a design for an article in real time using a proxy. The system can be configured using a head mounted display for displaying at least one virtual design element over a proxy located in a real-world environment. The system can also be configured using a projector that projects at least one virtual design element onto a proxy located in the real world.
US09858720B2	Three-dimensional mixed-reality viewport An application running on a computing platform that employs three-dimensional (3D) modeling is extended using a virtual viewport into which 3D holograms are rendered by a mixed-reality head mounted display (HMD) device. The HMD device user can position the viewport to be rendered next to a real world 2D monitor and use it as a natural extension of the 3D modeling application. For example, the user can interact with modeled objects in mixed-reality and move objects between the monitor and the viewport. The 3D modeling application and HMD device are configured to exchange scene data for modeled objects (such as geometry, lighting, rotation, scale) and user interface parameters (such as mouse and keyboard inputs). The HMD device implements head tracking to determine where the user is looking so that user inputs are appropriately directed to the monitor or viewport.
US09858719B2	Blended reality systems and methods Systems and methods are provided for generating a blended reality view to a user, the blended reality view combining images reflected by a mirror with images transmitted from a screen behind the mirror. Systems for generating blended reality views can include a display device with a screen positioned behind a mirror. The display device can generate a pattern of illumination and non-illumination on the screen so that the illuminated portions of the screen substantially transmit through the mirror. Projectors can be used to illuminate objects in front of the mirror so that the illuminated objects are reflected by the mirror. In combination, the portions of the screen transmitted through the mirror and the illuminated objects reflected by the mirror can provide a blended reality view to a user viewing the mirror.
US09858718B2	Dynamically adaptable virtual lists Examples are disclosed that relate to displaying lists on augmented reality and virtual reality display devices in such a manner as to avoid list occlusion and resulting user input errors. One disclosed example provides a computing device including an image sensor, a display device, a logic device configured to execute instructions, and a storage device comprising instructions executable by the logic device. The instructions are executable to generate a representation of the list, compare the representation of the list to a topology of a three-dimensional environment viewable via the display device to determine whether the representation of the list intersects any object in the topology, and if the representation of the list intersects an object in the topology of the three-dimensional environment, then adjust one or more of a position and orientation of each of one or more items of the list to adapt to the object in the topology.
US09858716B2	Fast three-dimensional visualization of object volumes without image reconstruction by direct display of acquired sensor data Embodiments of the present invention address deficiencies of the art in respect to 3D visualization of object volumes and provide a method, system and computer program product for fast 3D visualization of object volumes without image reconstruction by direct display of acquired sensor data. In an embodiment of the invention, a method for fast 3D visualization of object volumes without image reconstruction can be provided. The method can include acquiring a 3D dataset from an scanner of a 3D object volume, slicing the acquired sensor data without image reconstruction to produce a sequence of 2D images in Radon space and playing back the sequence of 2D images in a movie player to provide a rotating view of the 3D object volume.
US09858714B2	Shape optimization analyzing method and apparatus therefor Shape optimization analyzing methods according to aspects of the present invention are analysis methods for optimizing part of a structure model using plane elements or three-dimensional elements. The methods include a design-space defining step of defining a portion of the structure model that is to be optimized as a design space, an optimization-block-model generating step of generating an optimization block model in the defined design space, the optimization block model being formed of three-dimensional elements and analyzed for optimization, a coupling step of coupling the generated optimization block model with the structure model, and an analyzing step of performing analysis in accordance with input of an analytic condition to calculate an optimal shape of the optimization block model.
US09858713B2	Method and device for constructing graph representation for a 3D object It is provided a method for constructing a graph representation for a 3D object, wherein comprising the steps of generating an initial graph representation for the 3D object, wherein a node in the initial graph representation corresponds to a component of the 3D object and a symmetric indication value uniquely identifying a symmetric group is associated with a symmetric node; selecting two nodes from one symmetric group that has the most symmetric nodes, wherein the distance between the two nodes are the largest among distance between any other two nodes within the symmetric group; obtaining two set of nodes by expanding separately from the two nodes to their directly connected nodes, wherein if a node is connected directly to both two nodes, the node is excluded from the two set of nodes; and if determining that the two sets of nodes match, updating the graph representation by grouping each set of nodes into one node.
US09858708B2	Convex polygon clipping during rendering In one example, a graphic computing device may apply a clipping technique to accurately and efficiently render a graphic data set. A central processing unit may generate a convex polygonal clip from a two-dimensional polygon. The central processing unit may calculate a clipping plane for a convex polygonal clip based on an edge of the convex polygonal clip. A graphics processor may apply the convex polygonal clip in a pixel shader.
US09858705B2	Image data processing A method for processing image data includes obtaining a first set of 3D volumetric image data. The 3D volumetric image data includes a volume of voxels. Each voxel has an intensity. The method further includes obtaining a local voxel noise estimate for each of the voxels of the volume. The method further includes processing the volume of voxels based at least on the intensity of the voxels and the local voxel noise estimates of the voxels. An image data processor (124) includes a computer processor that at least one of: generate a 2D direct volume rendering from first 3D volumetric image data based on voxel intensity and individual local voxel noise estimates of the first 3D volumetric image data, or registers second 3D volumetric image data and first 3D volumetric image data based at least one individual local voxel noise estimates of second and first 3D volumetric image data sets.
US09858703B2	System, device and method for providing user interface for a virtual reality environment A device connectable to a near eye display or to a virtual reality headset and to a portable computing platform having a processor is provided herein. The device may include: an illuminator configured to illuminate a proximity of a user wearing the headset or the near eye display with patterned light; and an IR camera configured to capture reflections of said patterned light coming from at least one object located in the proximity of the user, wherein the processor is configured to: establish data and power connection between the device and said portable computing platform and said near eye display; and generate a depth map of said object based on the reflections.
US09858701B2	Computer animation of artwork using adaptive meshing Systems and methods disclosed herein improve the quality and speed of computing deformations used to animate artwork. One aspect provides adaptive meshing that creates a mesh adapted to handle locations and weights associating the handles with the mesh vertices. Portions of the mesh requiring smaller triangles with more densely positioned vertices are identified based on the handle locations and associated weights and resolution is added only to those portions of the mesh in which finer resolution is required. A second aspect involves creating a mesh using a coarse-to-fine iterative approach. This involves generating a mesh and the weights associating each handle to each vertex in the mesh and iteratively refining the mesh to add resolution until a refinement criteria is satisfied.
US09858698B2	Text resizing within an embedded image A computer receives user preferences. The computer receives a document, wherein the document includes an image. The computer determines that the image contains embedded text. The computer determines that the embedded text does not satisfy the received user preferences. The computer modifies the embedded text to satisfy user preferences.

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