| Document | Document Title |
|---|---|
| US09819416B2 |
High-speed pluggable optical transceivers with advanced functionality
Integrated performance monitoring (PM); optical layer operations, administration, maintenance, and provisioning (OAM&P); alarming; amplification, and the like is described in optical transceivers, such as multi-source agreement (MSA)-defined modules. A pluggable optical transceiver defined by an MSA agreement can include advanced integrated functions for carrier-grade operation which preserves the existing MSA specifications allowing the pluggable optical transceiver to operate with any compliant MSA host device with advanced features and functionality, such as Forward Error Correction (FEC), framing, and OAM&P directly on the pluggable optical transceiver. The advanced integrated can be implemented by the pluggable optical transceiver separate and independent from the host device. |
| US09819413B2 |
Methods for determining receiver coupling efficiency, link margin, and link topology in active optical cables
A method for determining receiver coupling efficiency includes varying optical power inputted into a half active optical cable to determine a maximum optical power at which the TIA squelches and determining a receiver coupling efficiency by calculating a ratio of a threshold optical power to the maximum optical power at which the TIA squelches. A method of determining link loss in a channel includes varying optical power of a light source to determine the maximum optical power at which the TIA squelches and determining the link loss in the channel by subtracting the maximum optical power from the threshold optical power. A method of determining link topology includes selecting a pattern of optical powers and matching a pattern of squelched and non-squelched outputs with the pattern of optical power. An active optical cable includes memory storing a value related to an initial link loss of the active optical cable. |
| US09819412B1 |
Transmitter gain imbalance and skew optimization for coherent transmitters
The present invention is directed to communication systems and techniques thereof. More specifically, embodiments of the present invention provide a calibration system for optical transmitter. The calibration system provides a predetermined set of operating parameters to the optical transmitter and measures the second harmonic value of the transmitter output. A calibrated set of parameters is determined by selecting operating parameters associated with the minimum second harmonic value. There are other embodiments as well. |
| US09819411B2 |
Signal to noise ratio estimation in optical communication networks
Optical signal to noise ratio within a band of interest (in-band OSNR) is calculated by using a reference signal for noise estimation. In-band noise at a node along the optical communication path is estimated by subtracting the reference signal contribution from the received in-band signal energy. Contribution from the reference signal is calculated using an effective transfer function of the optical communication path using either a direct method in which measurements are made a priori on an equivalent optical system or an indirect method in which the effective transfer function is calculated using computerized simulations. The selection of which method to use may be based on the desired resolution bandwidth for the estimation of transfer function. |
| US09819408B2 |
Transmission method, transmission device, receiving method, and receiving device
A transmitting device and a receiving device wherein, on the transmitting side, a signal creation unit creates, as its output, a signal generated adding up the signals assuming that different data has passed through multiple virtual channels and, on the receiving side, oversampling is performed, the sampled data is distributed, and signals are detected assuming that the distributed data is the output of multiple virtual reception antennas. |
| US09819407B2 |
Pre-compensation of the phase shifting error
In this disclosure, methods for pre-compensation of the phase shifting error, and apparatuses for the same are disclosed. In one example, a device performs precoding of a digital signal, while acquiring information on an error caused by a phase shifting of the precoding. Then, the device performs phase compensation on the digital signal based on the acquired information. This phase compensated-digital signal is converted to an analog signal, and is transmitted to a receiver. |
| US09819398B2 |
Power supply apparatus, control method, and recording medium
A power supply apparatus includes a power supply unit that wirelessly supplies power to an electronic apparatus, a communication unit that performs wireless communication for acquiring status information from the electronic apparatus, a detection unit that detects an external apparatus different from the electronic apparatus, and a control unit that causes the communication unit to disconnect wireless communication with the electronic apparatus in response to a detection of the external apparatus by the detection unit if the power supply unit is wirelessly supplying power to the electronic apparatus based on the status information acquired from the electronic apparatus, and causes the communication unit to perform wireless communication with the external apparatus to determine whether the external apparatus is able to wirelessly receive power. |
| US09819396B2 |
Managing contactless communications
Communicating via near field communication (NFC) between a reader and an application on an NFC-enabled device. A point of sale (POS) device and a consumer's mobile communication device establish an NFC session in accordance with each of the protocol layers of both International Organization for Standardization (ISO)/International Electrotechnical Commission (IEC) 14443 and ISO/IEC 7816 standards. A commerce application executing on the consumer's mobile communication device at a protocol layer above the ISO/IEC 14443 and ISO/IEC 7816 standards communicates a plurality of NFC application protocol data units (APDUs) to the POS device. At least one such APDU includes a consumer identifier. The consumer identifier includes a portion identifying the commerce application. |
| US09819394B2 |
Method for controlling an antenna network quality factor of a near field communication device without changing matching network, and associated apparatus
A method for controlling an antenna network quality factor of an NFC device includes: determining whether a first data rate or a second data rate should be used for data communication during different time intervals, respectively; and when it is determined that the first data rate should be used during a first time interval of the time intervals, controlling a set of internal resistors positioned within a chip of the NFC device to have a first configuration during the first time interval, in order to adjust the antenna network quality factor. More particularly, the method further includes: when it is determined that the second data rate should be used during a second time interval of the time intervals, controlling the set of internal resistors to have a second configuration during the second time interval, in order to adjust the antenna network quality factor. An associated apparatus is also provided. |
| US09819392B2 |
Data encoder for power line communications
In a disclosed embodiment, a power line communication (PLC) transmitter includes a forward error correction (FEC) encoder that receives payload data and adds parity information to the data to create an encoded output, a fragmenter that receives the encoded output from the FEC encoder and segments the encoded output into a plurality of fragments, a fragment repetition encoder that receives the plurality of fragments from the fragmenter and copies each of the fragments a selected number of times, and an interleaver that receives the copies of the plurality of fragments from the fragment repetition encoder and interleaves the copies of the plurality of fragments for transmission on a power line. |
| US09819391B2 |
Wired, wireless, infrared, and powerline audio entertainment systems
A method and system for communicating audio, video, and/or control signals within a home entertainment system. One or more signals are communicated between an input device and one or more output devices via one or more networks. The output device can include loudspeakers, display devices, and headphones. In some embodiments an output device, for example a center channel loudspeaker, transmits signals to other output devices. For example, the center channel loudspeaker can transmit a combined audio signal and control signal to a remote loudspeaker over a first network and transmit a video signal to a display device over a second network. The display device displays the video signal. The networks can be wireless, wired, infrared, RF, and powerline. |
| US09819385B2 |
Method and apparatus for interference cancellation
A method for interference cancellation is provided. The method includes: determining, by a first base station, a channel parameter from a transmit antenna of a second base station to a receive antenna of the first base station; receiving, by the first base station, a first signal using a first resource, where the first signal includes: a first interference signal and an uplink wanted signal, and the first interference signal is an interference signal generated when a downlink second signal is sent by the second base station by using the first resource; receiving, by the first base station, reconstruction information that is of the second signal and that is sent by the second base station; and determining, by the first base station, the first interference signal in the first signal according to the channel parameter and the reconstruction information of the second signal, and canceling the first interference signal. |
| US09819380B2 |
Docking station for portable electronic device
A docking station support system for a portable electronic device is disclosed. The docking station includes a housing with apertures to receive a portable electronic device and provide access to the touch sensitive display of such device. In certain embodiments, the docking station is invertible, and is supported by a leg or clips on top of, or at the edge of a surface, such as a table. The docking station can also be connected to a surface with hook and loop fasteners. The invention includes a gutter and spout system for catching food, beverages and other substances, and directing them away from the portable electronic device. |
| US09819378B2 |
Methods for forming fiber composite structures
An accessory unit includes a front flap and a rear cover. The rear cover includes a recessed portion that defines a chamber and a frame that extends about an opening of the chamber. The chamber is configured to receive a consumer electronic device, and the frame is configured to hold the consumer electronic device therein. For example, the frame may define a multi-sided cross-section with an inner edge thereof configured to engage a chamfered edge of the consumer electronic device. The front flap may include segments formed from panels with folding regions therebetween, which allow the front flap to fold. Further, an end region of the front flap hingedly couples the front flap to the rear cover, such that the front flap may be moved between open and closed configurations. |
| US09819377B1 |
Cell phone holder
The cell phone holder is an adjustable casing. The cell phone holder contains a cellular phone. The cell phone holder is removably attached to an automobile. The dimensions of the cell phone holder are adjustable such that the cell phone holder will accommodate cellular phones of various sizes. The cell phone holder comprises a first spring, a second spring, a first side panel, a second side panel, a rear panel, and a bottom panel. The first side panel attaches to the first spring. The second side panel attaches to the second spring. The bottom panel, the first spring, and the second spring attach to the rear panel. |
| US09819374B2 |
Advanced device locking criteria
Systems and methods for providing additional control over user equipment (UE) using standardized features of a subscriber identity module (SIM) is provided. The UE can impose SIMLocking criteria based on subscriber related attributes (such as rate plan, prepay, postpay, etc.). The SIM module can comprise multiple unique entries and one value for each entry. One or more entries on the SIM can be subdivided to provide additional values with each value made up of a subset of bits from a particular entry. Thus, a single entry can provide a plurality of values to make up a SIM configuration. The SIM configuration can be compared to a UE SIMLock configuration with the same, or similar, entries to determine if the SIM is compatible for use with the UE. The SIM configuration can be updated dynamically to reflect changes in the account associated with the UE or the SIM. |
| US09819373B2 |
Systems and methods for increasing the effectiveness of digital pre-distortion in electronic communications
Various embodiments of communication systems and methods in which the communication system is operative to find, record, and use sets of pre-distortion parameters in conjunction with a pre-distortion procedure, in which each set of pre-distortion parameters is operative to specifically counter distortions produced in a power amplifier by a specific combination of level of input signal power and level of analog gain associated with a transmission path of the communication system. In some embodiments, there is a modulator, a transmission chain, a distortion analysis mechanism, and a pre-distortion mechanism, operative to analyze and modify signals so as to counter signal distortion. |
| US09819368B2 |
Integrated radio frequency filters for multiband transceivers
A system and method integrates signal filters in a multiband transceiver. A preferred embodiment comprises an amplifier with a first tunable capacitor coupled to a signal input and a tunable filter. The tunable filter comprises an input stage with a first pair of inductors arranged in a dipole configuration and a second tunable capacitor coupled in parallel to the first pair of inductors and an output stage inductively coupled to the input stage, the output stage includes a second pair of inductors also arranged in a dipole configuration and a third tunable capacitor coupled in parallel to the second pair of inductors. The inductors are realized using bond wire or any other high Q material. The first tunable capacitor, the second tunable capacitor, and the third tunable capacitor can be tuned using a master-slave tuning configuration to adjust the operating frequency of the amplifier and the tunable filter to enable frequency band compatibility with multiple communications protocols. |
| US09819366B2 |
Wireless communications device and wireless signal processing method
A wireless communication device including: a mixer configured to generate two mixed signal in a lower frequency band than a frequency of a local signal and two mixed signals in a higher frequency band than the frequency of the local signal by mixing the local signal with two intermediate frequency signals, and a filter configured to pass one of the two mixed signal in the lower frequency band and one of the two mixed signal in the higher frequency band. |
| US09819364B2 |
Apparatus and method for transmitting/receiving signal in communication system supporting bit-interleaved coded modulation with iterative decoding scheme
The present disclosure relates to a pre-5th-generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-generation (4G) communication system such as a long term evolution (LTE). A method for transmitting a signal in a signal transmitting apparatus in a communication system supporting a bit-interleaved coded modulation with iterative decoding (BICM-ID) scheme is provided. The method includes performing an outer encoding operation; performing an interleaving operation on the outer code corresponding to an interleaving scheme which is based on a preset generation matrix to generate an interleaved signal; performing an inner encoding operation; performing a modulating operation; and transmitting the modulated signal, wherein the generation matrix is generated by applying at least one of a preset column permutation rule and a preset row permutation rule to a generation matrix for a quasi-cyclic (QC) interleaver. |
| US09819361B2 |
List decoding method for polar code and memory system using the same
A list decoding method for a polar code includes generating a tree-type decoding graph for input codeword symbols; the generating a tree-type decoding graph including, generating a decoding path list to which a decoding edge is added based on a reliability of a decoding path, the decoding path list being generated such that, among decoding paths generated based on the decoding edge, decoding paths within a threshold number of critical paths survive within the decoding path list in an order of high likelihood probability, and determining an estimation value, which corresponds to a decoding path having a maximum likelihood probability from among decoding paths of the decoding path list, as an information word. |
| US09819357B1 |
Current removal for digital-to-analog converters
The present disclosure describes aspects of current removal for digital-to-analog converters (DACs). In some aspects, a circuit for converting a digital input to an analog output includes a first resistor ladder having first resistors connectable to respective current sources and connected to a first output of the circuit. The circuit also includes second resistor ladder having second resistors connectable to the respective current sources and connected to a second output of the circuit. A common node is formed between common resistor terminals of the first resistor ladder and the second resistor ladder. Current removal circuitry is connected to the common node and referenced to an amount of current provided by the respective current sources. By removing current from the common node of the resistor ladders, common-mode current at outputs of the circuit can be reduced with minimal degradation of differential performance of the circuit. |
| US09819356B2 |
Injection locked ring oscillator based digital-to-time converter and method for providing a filtered interpolated phase signal
Apparatus and methods for a digital-to-time converter (DTC) are provided. In an example, a DTC can include a phase interpolator and a ring oscillator. The phase interpolator can be configured to receive digital representations of two or more distinct phase signals, and to interpolate the digital representations of the two or more distinct phase signals to provide an interpolated output phase signal. The ring oscillator can be configured to receive the interpolated phase signal, to lock on to a frequency and a phase of the interpolated output phase signal, and to provide a filtered phase signal. |
| US09819355B2 |
Capacitive sensing system and method
A capacitive sensing system operates according to a method which uses an ADC. The analog signal to be digitized is modulated with a triangular or saw-tooth modulating signal, so that a modulated analog signal is obtained, which is sampled with the ADC. The triangular or saw-tooth signal is chosen to have a peak-to-peak amplitude corresponding at least approximately to an integer multiple L, with L≧1, of the quantization step size of the ADC. The saw-tooth or triangular signal has a number M, of periods per each sequence of N samples. M and N are chosen such that M>1 and M≠N and such that R=r*N/(k*gcd(N, M)*L), where gcd(M, N) is the greatest common divisor of N and M and where k=2 if the modulating signal is a saw-tooth signal and k=4 if the modulating signal is a triangular signal. |
| US09819353B2 |
Apparatus and method for testing an analog-to-digital converter
A method for use in testing an analog-to-digital converter. The method includes providing a set of bins, varying a voltage, taking samples of the voltage, providing a selection flag, associating each sample with one bin of the set of bins, and observing a number of samples associated with the bins. An apparatus includes an analog-to-digital converter configured to convert a voltage at an input node to a digital representation provided at an output node. The input node is configured to be coupled to a voltage generator. A sample select unit is configured to determine if a voltage at the input node at least equals a first threshold level and does not exceed a second threshold level. The apparatus is configured, based on the determining, to selectively associate the digital representation with a bin of a set of bins. |
| US09819352B2 |
Clock generation circuit and semiconductor device provided therewith
It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where there is no supplied signal in a circuit which performs negative feedback control so that the supplied signal and the feedback signal can maintain a fixed phase relationship between the signals. The present invention provides a configuration including a PLL circuit and an oscillator circuit, where a switch for switching an output between a signal from the PLL circuit and a signal from the oscillator circuit to the signal output portion is provided to switch from a connection to the PLL circuit to a connection to the oscillator circuit in a case where there is no received signal. |
| US09819349B2 |
Method and apparatus for controlling mismatch in a voltage controlled oscillator array
A method and system are provided for reducing mismatch between oscillators in an LC VCO array. In an implementation, a method comprises measuring the mismatch between the driver strengths, by measuring the corresponding oscillation amplitudes, and a mismatch between the resonance frequency of each LC VCO in the array of VCOs, and adjusting each LC VCO to reduce the measured amplitude and frequency mismatches. In an implementation, the measuring and adjusting is performed once to calibrate the array of VCOs. In another implementation, the system measures and adjusts the array of VCOs repeatedly. In another implementation, the LC VCO array has a master VCO and a plurality of slave VCOs connected to the master VCO by slave PLLs to reduce phase noise caused by mismatches. |
| US09819346B2 |
PLC system
In some embodiments, a PLC system includes a memory unit configured to back up user data stored in a MCU thereto when the power supply from the power module is interrupted, a capacitor configured to be charged by the power module and supply accumulated power to the memory unit when the power from the power module to the MCU is interrupted, a variable resistor unit configured to be coupled between the power module and the capacitor, and a switching unit configured to alternatively couple either the power module or the capacitor to the memory unit depending on a state of power being supplied from the power module. Some embodiments may provide advantages that a PLC system can supply much more power while reducing a charging period of time of an auxiliary power supply for supplying power with urgency when an abnormality occurs in a power module of the PLC system. |
| US09819344B2 |
Dynamic element matching of resistors in a sensor
An apparatus comprising: a sensor; and a resistor array comprising a set of resistors; wherein on a first cycle: at least one first of said resistors is configured to provide a first resistance value; and on a second cycle: at least one second of said resistors is configured to provide said first resistance value. |
| US09819342B2 |
Hand-operated safety switch with time delay
An hand-operated safety switch with time delay (1) comprises a switching device (2) adapted to be anchored to a fixed part of the protection and provided with switching means (5) adapted to be connected to a plant to be controlled, an operating device (3) adapted to be anchored to a movable part of the protection for interacting with the switching means (5) upon the closing of the movable part. The switching device (2) comprises a locking mechanism (9) associated with the switching means (5) and adapted to selectively hold/release the operating device (3) and hand-operable unlocking means (10) operatively coupled with the locking mechanism (9) for unlocking the operating device (3) with a predetermined time delay with respect of the switching of the power supply circuit by the switching means (5). The switching device (2) has sensor means (13) operatively coupled with the switching means (5) for modifying their operative condition in function of an inlet signal. The operating device (3) also comprises a transmitter (14) adapted to send a proximity signal to be received as input by the sensor means (13) for controlling the switching means (5) when said transmitter (14) is place at a predetermined minimum distance from the sensor means (13). The locking mechanism (9) also comprises an inner passage (29) adapted to allow the passage of means for connecting the sensor means (13) with the switching means (5) avoiding the interference with the unlocking means (10). |
| US09819340B2 |
P-channel MOSFET high voltage driver
In accordance with one or more aspects of the disclosed embodiments, a drive circuit having a source of modulation for producing a modulated signal, a level shifter configured to receive the modulated signal and produce a level-shifted driver signal, an inverter circuit configured to receive the level-shifted driver signal and produce a MOSFET control signal, and at least one p-channel metal oxide semiconductor field effect transistor (MOSFET) configured to receive the MOSFET control signal and modulate an application of high current to a load, where the MOSFET control signal is supplied directly to the p-channel MOSFET through the inverter circuit. |
| US09819337B2 |
Semiconductor switching circuit
A semiconductor switching circuit includes a main current branch which includes at least one main semiconductor switching element and through which current flows in a first direction when the or each main semiconductor switching element is switched on. The semiconductor switching circuit also includes an auxiliary current branch that is connected in parallel with the main current branch. The auxiliary current branch includes at least one auxiliary semiconductor switching element. One or more control units are configured to switch on the or each auxiliary semiconductor switching element as the or each main semiconductor switching element is switched on to selectively create an alternative current path via the auxiliary current branch whereby current flowing in the first direction through the main current branch is diverted instead to flow through the alternative current path to reduce the rate of change of current flowing through the or each main semiconductor switching element. |
| US09819336B2 |
Bridge circuits and their components
A half bridge is described with at least one transistor having a channel that is capable in a first mode of operation of blocking a substantial voltage in at least one direction, in a second mode of operation of conducting substantial current in one direction through the channel and in a third mode of operation of conducting substantial current in an opposite direction through the channel. The half bridge can have two circuits with such a transistor. |
| US09819331B2 |
Fast pre-station list representation in a single FM tuner system
Embodiments are disclosed of methods and systems for providing information in a single FM tuner system. An example method according to the disclosure provides station information in a single FM tuner system, and comprises receiving radio data system (RDS) data/radio broadcast data system (RBDS) data by the single FM tuner system; extracting frequency information regarding receivable stations from the received RDS/RBDS data and displaying a list of the receivable frequencies; extracting additional information regarding the receivable stations from the received RDS/RBDS data, and displaying the extracted additional information regarding the receivable stations in correspondence with the respective receivable frequencies in the list. Further a single FM tuner system is provided for carrying out the method. |
| US09819329B2 |
Ladder-type surface acoustic wave filter including series and parallel resonators
A ladder-type surface acoustic wave filter assembly includes a plurality of series resonators formed on a substrate and connected between an input terminal and an output terminal. A first series resonator has a lowest resonance frequency among the plurality of series resonator. A parallel resonator formed on the substrate and connected between the plurality of series resonators and the ground terminal. A dielectric film is coupled to at least one of the plurality of series resonators and has an inverse temperature coefficient of frequency to that of the substrate. A film thickness of the dielectric film in a region where the second series resonator is formed is smaller than a film thickness of the dielectric film in a region where the first series resonator is formed. |
| US09819328B2 |
Tuning-fork type quartz vibrator
A tuning-fork type quartz vibrator is disclosed that includes excitation electrodes and a tuning-fork type vibrating reed that is made of quartz and in which first and second vibrating arm sections are integrally joined to a base section. In each of the first and second vibrating sections, a plurality of through-holes and two or more crosspieces are provided. Further, an effective excitation electrode ratio is no more than 0.97, the effective excitation electrode ratio being expressed by (a total area of the excitation electrodes in a cross-section orthogonal to a second direction as a width direction of each of the first and second vibrating arm sections)/(an area of a region where the plurality of through-holes are provided in the cross-section orthogonal to the second direction as the width direction of each of the first and second vibrating arm sections). |
| US09819325B2 |
Time delay filters
A time delay filter comprising a substrate comprising a first surface and a second surface opposite the first surface; a first LC resonator coupled to the substrate and comprising a first coupling point, a first capacitive element electrically coupled between the first coupling point and the first conductive region, and a first inductive element coupled between the first coupling point and the first conductive region, and comprising a first and second inductor tap; and a second LC resonator coupled to the substrate and comprising a second coupling point, a second capacitive element electrically coupled between the second coupling point and the first conductive region, and a second inductive element electrically coupled between the second coupling point and the first conductive region wherein the system group delays a signal output at a second coupling point relative to a signal input at the first coupling point. |
| US09819322B2 |
Wireless communication device and method of operating the same
A method is provided for operating a radio frequency (RF) receiver including a transimpedance amplifier, a capacitor selectively connected in parallel with the transimpedance amplifier, a channel selection filter unit connected to an output terminal of the transimpedance amplifier, and a variable gain amplification unit selectively connected in parallel with the channel selection filter unit. The method includes measuring signal-to-noise ratio from an output of the RF receiver, and comparing the measured signal-to-noise ratio with a reference signal-to-noise ratio. When the measured signal-to-noise ratio is greater than the reference signal-to-noise ratio, the capacitor is electrically disconnected from being connected in parallel with the transimpedance amplifier and a variation in the measured signal-to-noise ratio is measured. When the measured variation is in tolerance, the channel selection filter is bypassed to select the variable gain amplification unit. |
| US09819321B2 |
Method and apparatus for automatically controlling gain based on sensitivity of microphone in electronic device
The present disclosure relates to a method and an apparatus for automatically controlling a gain in an electronic device based on a sensitivity of microphone. The method according to an embodiment of the present disclosure includes outputting a reference audio to a speaker and obtaining a sound signal output by the speaker through a microphone, comparing a parameter of the obtained sound signal with a stored parameter, and adjusting a gain of the microphone based on a result of the comparing. |
| US09819320B1 |
Coaxial amplifier device
A coaxial amplifier having at least one electron beam is provided. The amplifier may include a conductive rod, a plurality of parallel discs on the rod, a cathode array for producing at least one electron beam. When a plurality of electron beams are formed they are arranged in an annular configuration around said rod and disks, and directed along said rod and coaxially thereof. A first waveguide may apply electromagnetic wave energy to one end of said disc and rod assembly to induce propagation of said energy along said assembly. A second waveguide may extract the amplified electromagnetic energy from the other end of the disc and rod assembly. |
| US09819319B2 |
Method and system for a pseudo-differential low-noise amplifier at Ku-band
Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA comprises differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may comprise: a first inductor with a first terminal capacitively-coupled to a gate terminal of a first transistor of the differential pair transistors and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first transistor of the differential pair transistors, the fourth inductor may be coupled to a source terminal of the second transistor of the differential pair transistors, and the third inductor may be capacitively-coupled to a gate terminal of the second transistor of the differential pair transistors and also to ground. The second inductor may be embedded within the first inductor. |
| US09819318B2 |
Architecture of a low bandwidth predistortion system for non-linear RF components
Systems and methods for compensating for non-linearity of a non-linear subsystem using predistortion are disclosed. In one embodiment, a system includes a non-linear subsystem and a predistorter configured to effect predistortion of an input signal of the non-linear subsystem such that the predistortion compensates for a non-linear characteristic of the non-linear subsystem. In addition, the system includes a narrowband filter that filters a feedback signal that is representative of an output signal of the non-linear subsystem to provide a filtered feedback signal, and an adaptor that adaptively configures the predistorter based on the filtered feedback signal and a reference signal that is representative of an input signal of the non-linear subsystem. By utilizing the filtered feedback signal, rather than the feedback signal, a complexity, and therefore, cost of the adaptor is substantially reduced. |
| US09819307B2 |
Low power current re-using transformer-based dual-band voltage controlled oscillator
A dual-band voltage controlled oscillator (VCO) includes: a first oscillator circuit including a first inductor; a second oscillator circuit including a second inductor; a first mode switch configured to electrically connect or disconnect a first output terminal of the first oscillator circuit and a first output terminal of the second oscillator circuit; a second mode switch configured to electrically connect or disconnect a second output terminal of the first oscillator circuit and a second output terminal of the second oscillator circuit; a third mode switch configured to electrically connect or disconnect a first terminal of the first inductor and a first terminal of the second inductor; and a fourth mode switch configured to electrically connect or disconnect a second terminal of the first inductor and a second terminal of the second inductor. |
| US09819302B2 |
Module attachment apparatus and method
Exemplary systems and methods described herein can be used to secure a rail to a module or the rail to a support using a nut that can be inserted at a desired point of mounting. Another exemplary system describes a flashing to be inserted under a roof shingle, wherein the flashing is secured to a support for a rail or module. Yet another exemplary system describes a clamp that secures a rail or module and is adjustable along the length of a post. Spacers can be added to the post to extend the adjustment range of the clamp. |
| US09819300B2 |
Machine learning apparatus for learning operation conditions of cooling device, motor control apparatus and motor control system having the machine learning apparatus, and machine learning method
A machine learning apparatus according to the present invention, which learns the operation conditions of a cooling device for cooling a motor or a motor control apparatus, includes a state observer for observing a state variable including at least one of temperature data of the motor and the motor control apparatus at a specific position during operation of the cooling device; a determination data acquisition unit for acquiring determination data that determines a margin of acceptable value of a loss in each of the motor, the motor control apparatus, and the cooling device and a margin of acceptable value of the temperature of each of the motor and the motor control apparatus at the specific position; and a learner for learning the operation conditions of the cooling device in accordance with a training data set constituted of a combination of the state variable and the determination data. |
| US09819299B2 |
Inverter device and electric vehicle
Provided are an inverter device deterring PWM voltage error even if high inverter output frequencies are used for overmodulation driving and an electric vehicle equipped with the inverter device. In an angular section where the output voltage from an inverter device is linearly approximated with the zero cross point as the center thereof, a PWM generator in the inverter device changes either the time interval between the centers of PWM ON pulses or the time interval between the centers of PWM OFF pulses depending on the inverter operation state. An electric vehicle is equipped with the inverter device, which drives a motor. |
| US09819297B2 |
Power conversion device, motor including the same, air conditioner having the motor incorporated therein, and ventilation fan having the motor incorporated therein
A power conversion device includes a printed circuit board, whose mounting surface is opposite to an annular surface formed by an annular stator that constitutes a motor, arranged to be separated from the annular surface with a predetermined distance, and mounted with a Hall element that detects a rotation position of a rotor of the motor on a mounting surface on a side of the stator; an inverter IC that is mounted on the mounting surface on the side of the stator of the printed circuit board to supply a high-frequency current to the stator; and an overheat detection unit that is mounted on the mounting surface on the side of the stator of the printed circuit board and detects an overheated state of the inverter IC. When the overheat detection unit detects an overheated state, the inverter IC restricts or stops a current to be supplied to the stator. |
| US09819295B2 |
Time control system and time control method for multiple motors
A time control system for multiple motors is provided in the present disclosure. The time control system includes an event generating module for generating event information corresponding to an event, a control module for analyzing the event information, a signal selecting module for selecting vibrating information according to the event information, a motor module comprising multiple motors, and a driving module for driving the multiple motors in the motor module to vibrate. The control module is further configured for determining whether the vibrating information need to be delayed, and the time control system further includes a delay module for delaying the vibrating information for a time period before sending the vibrating information to the driving module to delay driving the motor module. |
| US09819294B2 |
Inverter control apparatus and control method thereof
An inverter control apparatus and a control method thereof are provided. The inverter control apparatus and a control method thereof stably operate a three-phase motor using a capacitor having a small capacitance for a DC link. The inverter control apparatus includes a current sensor to sense an output current of the inverter, a voltage sensor to sense a DC-link voltage of the inverter, and a controller to generate an average of a periodically varying rotor based q-axis current boundary value based on the output current and the DC-link voltage to generate a current reference on the basis of the average of the rotor based q-axis current boundary value, and to drive a three-phase motor based on the current reference. Stabilized variable speed control of a motor by using a small-capacitance capacitor for a DC link of an inverter is performed and reliability of an inverter circuit improved. |
| US09819293B2 |
Voltage sensor abnormality diagnosis apparatus
A voltage sensor abnormality diagnosis apparatus is applied to a motor controller operating switching of inverter by a switching signal for complementary on and off and diagnoses abnormality of input voltage sensor. An input voltage estimated value calculation section calculates input voltage estimated value by multiplying voltage command amplitude deviation by conversion coefficient, the voltage command amplitude deviation being obtained by subtracting theoretical voltage command amplitude, which is amplitude of theoretical voltage command calculated by using a motor model expression, from a control voltage command amplitude, which is an amplitude of a control voltage command calculated by feedback control and has been corrected by the dead time correction amount. An abnormality determination section determines that the input voltage sensor is abnormal if an absolute value of a difference between an input voltage sensor value and the input voltage estimated value is larger than a voltage threshold value. |
| US09819291B2 |
Direct-current motor control device
A direct-current (DC) motor control device includes first and second switches, a conducting element and a power storage element. The power storage element, the conducting element and the second switch are connected to each other and form a loop, and the first switch is connected to a common node between the power storage element and the conducting element. When the DC electric power source is normally connected to the DC motor control device, the first switch is turned on, and the conducting element establishes a unidirectional conduction from a DC motor to the power storage element while the second switch is turned off. |
| US09819281B2 |
Power conversion control device
A voltage period calculator obtains an oscillation period of a voltage. A power source impedance estimating unit obtains an estimated value of a power source impedance from the oscillation period, an inductance, and a capacitance. A gain setting unit sets a control gain using the estimated value, the inductance, the capacitance, and a desired attenuation coefficient command, and outputs the control gain. A multiplier obtains a product of the control gain and the voltage. A subtractor subtracts the product from a command value to obtain a voltage control ratio command. |
| US09819277B2 |
Isolated buck converter, switched mode power supply, and method of transferring digital data from a primary side to an isolated secondary side of an isolated buck converter
An isolated buck converter for converting an analog input voltage to an analog output voltage is capable of transferring digital data from the primary side to the secondary side. The converter comprises, on a primary side, a primary winding and a non-isolated buck connected in series, and a pair of switches switchable between a forward phase and a fly-buck phase. A secondary winding, on a secondary side, is inductively coupled to the primary winding, and a first capacitive element is connected over the secondary winding. The output voltage is achieved as the voltage over the first capacitive element. Further, the converter comprises, at the secondary side, supplementary circuitry by aid of which digital data can be transferred from the primary side to the secondary side. |
| US09819268B2 |
DC-DC switching converter with enhanced switching between CCM and DCM operating modes
An electronic device includes first and second transistors coupled in series between first and second source voltage levels. An inductor is coupled between a node coupling the first and second transistors and a load. Control logic is operative to generate control pulses operative to switch the first and second transistors. The controller generates the control pulses as a continuous stream of control pulses in a continuous conduction mode, and skips generation of some control pulses in a discontinuous conduction mode in response to a pulse skipping signal. A pulse skipping circuit is operative to generate a sense voltage as a function of an inductor current in the inductor, compare the sense voltage to ground, and generate a pulse skipping signal to the control logic when the sense voltage is below ground. |
| US09819267B2 |
Switched mode power supply
A switched mode power supply (100) comprises a reactive element (10) and a control signal generator (30) is arranged to generate a first control signal at a first output (31) of the control signal generator (30) and a second control signal at a second output (32) of the control signal generator (30). The first output (31) of the control signal generator (30) is coupled to a first input (21) of a switching stage (20) by means of a first control signal path (40) and the second output (32) of the control signal generator (30) is coupled to a second input (22) of the switching stage (20) by means of a second control signal path (50). The switching stage (20) is arranged to, responsive to the first and second control signals, alternately charge and discharge the reactive element (10) by coupling it alternately to first and second supply voltages. A delay detector (60) is arranged to generate a delay indicator signal indicative of a relative delay between the first control signal at the first input (21) of the switching stage (20) and the second control signal at the second input (22) of the switching stage (20). An adjustable delay stage (53) in one of the first and second signal paths (40, 50) is arranged to, responsive to the delay indicator signal, control an adjustable delay so that a first delay experienced by the first control signal passing from the first output (31) of the control signal generator (30) to the first input (21) of the switching stage (20) is substantially equal to a second delay experienced by the second control signal passing from the second output (32) of the control signal generator (30) to the second input (22) of the switching stage (20). |
| US09819266B2 |
Digitally controlled zero current switching
Generally, this disclosure describes an apparatus. The apparatus includes switch controller circuitry and zero crossing logic circuitry. The switch controller circuitry is to control a conduction state of a high side switch and a low side switch in a DC to DC converter. The zero crossing logic circuitry includes phase comparator circuitry, a first clocking circuitry and a second clocking circuitry. Each clocking circuitry includes one or more delay elements. The zero crossing logic circuitry is to monitor a switch node voltage, Vsw, and to determine whether Vsw is greater than a reference, Vref. The switch controller circuitry is to turn off a low side switch if Vsw is greater than Vref while the low side switch is turned on, Vsw greater than Vref corresponding to a negative inductor current. |
| US09819261B2 |
Central control system
Provided is a structure which is capable of central control of an electric device and a sensor device and a structure which can reduce power consumption of an electric device and a sensor device. A central control system includes at least a central control device, an output unit, and an electric device or a sensor device. The central control device performs arithmetic processing on information transmitted from the electric device or the sensor device and makes the output unit output information obtained by the arithmetic processing. It is possible to know the state of the electric device or the sensor device even apart from the electric device or the sensor device. The electric device or the sensor device includes a transistor which includes an activation layer using a semiconductor with the band gap wider than that of single crystal silicon. |
| US09819257B2 |
DC-to-DC converter input node short protection
Embodiments described herein relate to a circuit including a DC-to-DC converter and a switching device to selectively isolate an input voltage from an input node of the DC-to-DC converter. The circuit also includes a controller coupled to the input node and to the switching device. The controller is configured to apply a test voltage to the input node, to enable the switching device to be switched from a non-conductive state to a conductive state if a voltage on the input node is above a threshold while the test current is applied to the input node, and to restrict the switching device from being switched from the non-conductive state to the conductive state if the voltage on the input node is below the threshold while the test current is applied to the input node. |
| US09819255B2 |
LCL filter resonance mitigation technique for voltage source converters
Control apparatus, techniques and computer readable mediums are presented to mitigate LCL filter resonance issue for voltage source converters. Two level voltage source converter with and without passive damping of LCL filter are selected for the comparative study. Control algorithms are presented to estimate the source impedance based on variable carrier PWM. Estimated source impedance is used to tune the control of the VSC to avoid the resonance of LCL filter has been presented. In situations in which LCL resonance cannot be avoided by tuning the control parameters, energy efficient techniques are disclosed to provide selective passive damping to facilitate continued power conversion system operation without significant adverse impact on system performance. |
| US09819252B2 |
Method of molding resin casing and motor
A method of molding a resin casing covering a stator of a motor may include preparing first and second molds; disposing the stator in the first mold; combining the molds; pouring a resin into the cavity; curing the resin; separating the molds; and taking the stator and resin casing from the mold. The stator may include a core, an insulator, and a coil. The core may include a core back surrounding and teeth that extend inward from the core back. The insulator may include wall portions inside the coil. The wall portions may be provided around the teeth and extend toward one side in an axial direction. One of the molds may include cylindrical surfaces contacting inner end faces of the teeth. The first mold may include wall supporting surfaces contacting or facing the inner surfaces of the wall portions. The wall supporting surfaces may be outside the cylindrical surfaces. |
| US09819251B2 |
Resin sealing method of motor core
Provided is a resin sealing method of a motor core having a rotor core and a stator core formed in such a way that a plurality of iron core pieces is laminated. The resin sealing method includes pressing the rotor core and the stator core from a direction of lamination by using a set of an upper die and a lower die, then extruding a resin stored in a resin reservoir pot provided in one or both of the upper die and the lower die by using a plunger and allowing a magnet-insert hole formed in the direction of lamination of the rotor core and a connection hole formed in the direction of lamination of the stator core to be filled with the resin and harden the resin. |
| US09819248B2 |
Assemblies and methods for cooling electric machines
Cooling assemblies and methods, including, for example, at least one bar (e.g., electrically insulated and/or thermally conductive bar(s)), members (e.g., i-beams, rectangular members, and the like), stator laminations, rotor laminations, and/or combinations thereof, such as those configured to cool electric machines (e.g., electric motors and generators). |
| US09819246B2 |
Electrical machine and controller and methods of assembling the same
An electrical machine includes a fan guard having a first air flow channel. A stator assembly is coupled to the fan guard and includes a stator yoke having a cylindrical outer surface and a stator pole shoe. The stator pole shoe includes a plurality of stator poles coupled to the stator yoke. The stator assembly includes a second air flow channel defined between the stator yoke and an adjacent pair of the stator poles. A rotor assembly is positioned inside the stator assembly. The rotor assembly includes a rotatable shaft and a rotor. The rotatable shaft defines a rotation axis. A control electronics board includes a plurality of heat making components and is enclosed in a housing having a vented base and a closure. The housing is coupled to the stator assembly opposite the fan guard. The vented base includes a plurality of vent openings opened toward the fan guard. |
| US09819243B2 |
Rotor for wound rotor synchronous motor
A rotor of a wound rotor synchronous motor includes: a rotor body coupled to a rotation shaft and around which a rotor coil is wound; and a slip ring module mounted on one portion of the rotation shaft, the slip ring module comprising a brush contact portion configured to contact a brush, a terminal mounting portion connected to the brush contact portion, and a fusing terminal mounted at an exterior circumferential surface of the terminal mounting portion and connected to the rotor coil. |
| US09819239B2 |
End winding support and heat sink for liquid-cooled generator
Embodiments of an end winding support and heat sink for a pole of a generator are provided. An aspect includes a flat plate portion, the flat plate portion comprising an internal cooling liquid channel that routes coolant through the flat plate portion. Another aspect includes a plurality of fins extending out from the flat plate portion, wherein wires of the windings of the generator are supported by the plurality of fins. |
| US09819238B2 |
Rotary electric machine having stator with coil conductors having different cross-sectional width
Obtain a rotary electric machine by which a share of coil slots for a stator winding in slots, which are formed in a stator core, can be increased, and heat generation at a central portion of a stator can be decreased. The stator winding is composed of coil slots, which are inserted to the slots, and coil ends extended toward the outside in the axis direction of the stator core; and the coil conductors of the coil slots are configured in such a way that cross-sectional areas at central portions in the axis direction are wider cross-sectional areas at both end portions, and the cross-sectional areas of the coil conductors are reduced along the coil slots from the central portions to the both end portions. |
| US09819235B2 |
Rotator of rotational electric machine
A rotor core has a regular decagon base portion in its cross section relative to a shaft center and ten convex portions each of which is located between each angle of the regular decagon base portion. Each convex portion has a first convex curve having a single curvature radius. Each permanent magnet is a curved plate and has a concave curve and a second convex curve. Each permanent magnet is provided so that the concave curve adheres on the first convex curve. When each permanent magnet moves in circumferential direction relative to the rotor core, the concave curve slides on the first convex curve of the rotor core. A position of the smallest gap clearance between the second convex curve and the stator does not change. A magnetic-flux-strength maximum position is not changed easily. |
| US09819229B2 |
Apparatus for receiving non-contact energy and controlling method therefor
The present invention provides an apparatus for receiving non-contact energy that includes; a receiving unit that is spaced from a transmitting unit and receives thermal or light energy from the transmitting unit; an energy converting unit that converts the thermal or light energy received from the receiving unit into electric energy and supplies electric energy to a target device; and an auxiliary power that receives electric energy from the receiving unit or the energy converting unit and supplies electric energy to the target device when the energy transmitted from the receiving unit or the energy converting unit to the target device is cut off, and a method of controlling the device. According to the present invention, it is possible to stably supply energy that is not harmful to the human body and, has a wide transmission region. |
| US09819227B2 |
State trajectory prediction in an electric power delivery system
Disclosed is state trajectory prediction in an electric power delivery system. Electric power delivery system information is calculated from measurements by intelligent electronic devices (IEDs), and communicated to a state trajectory prediction system. The state trajectory prediction system may be configured to generate a load prediction profile. The load prediction profile may provide a predicted response of a load at a future time. Further, the state trajectory prediction system may be configured to generate a generator prediction profile that provides a predicted response of a generator at a future time. The state trajectory prediction system may generate a state trajectory prediction based, at least in part, on the load prediction profile and the generator prediction profile. The state trajectory prediction may represent a future state of the electric power delivery system. |
| US09819226B2 |
Load power device and system for real-time execution of hierarchical load identification algorithms
A load power device includes a power input; at least one power output for at least one load; and a plurality of sensors structured to sense voltage and current at the at least one power output. A processor is structured to provide real-time execution of: (a) a plurality of load identification algorithms, and (b) event detection and operating mode detection for the at least one load. |
| US09819221B2 |
Online uninterruptible power supply topology
An uninterruptible power supply (UPS) includes a rectifier circuit coupled to an AC input and configured to produce a DC voltage between first and second DC buses, an inverter circuit coupled to the first and second DC buses and configured to produce an AC voltage at the AC output. The UPS further includes an auxiliary power circuit comprising third and fourth DC buses configured to be coupled to a DC power source and third and fourth capacitors coupled between respective ones of the third and fourth DC buses and the neutral and respective first and second switches configured to couple and decouple respective ones of the third and fourth DC buses to and from respective ones of the first and second DC buses. The third and fourth capacitors may have capacitances greater than capacitances of the first and second capacitors. |
| US09819217B2 |
Electronic device, display method in electronic device, and non-transitory computer readable recording medium
An electronic device, a display method in an electronic device, and a non-transitory computer readable recording medium are disclosed. A charging coil generates induced electromotive force by interlinkage of a magnetic field from an external charger coil with the charging coil. A battery is to be charged with the induced electromotive force. A display includes a display region, a position that coincides with the center of the charging coil being located inside an outline of the display region in plan view. At least one processor displays, in the display region, a charging screen including information that indicates the center of the charging coil in the position when an operation is performed on the operation unit while the battery is charged with the induced electromotive force. |
| US09819213B2 |
Power reception apparatus, power transmission apparatus, non-contact power supply system, power reception method, and power transmission method
A power reception apparatus includes a power receiving circuit to be connected to a power reception side resonance circuit including a power reception side coil and a power reception side capacitance, for generating an output power based on power received by the power reception side coil utilizing magnetic resonance, a changing/short-circuiting circuit configured to change a resonance frequency of the power reception side resonance circuit from a reference frequency that is the resonance frequency when receiving the power, or to short-circuit the power reception side coil, before receiving the power. |
| US09819211B2 |
Wireless charging assembly for a vehicle
A wireless charging assembly for a passenger compartment of a vehicle includes a vehicle component, a wireless charger and a connection structure. The wireless charger includes a charger housing and at least one primary induction coil disposed in the charger housing. A support structure is connected to the charger housing for securing the portable electronic device to the charger housing. The connection structure movably connects the charger housing to the vehicle component such that the charger housing is movable between a stowed position and an in-use position. |
| US09819208B2 |
Battery management circuit having cell connections for batteries and a plurality of corresponding windings and diodes
A battery management circuit maintains voltage balance during charging and discharging of a multi-cell, series connected battery stack. The circuit prevents any cell voltage from dropping below a voltage at which degradation of the battery can start. Each of the battery connections are connected with a first polarity across one secondary winding of a transformer through a first diode and connected with a polarity opposite to the first polarity across another secondary winding of the transformer through a second diodes, where, for the cell connections corresponding to each battery except the last in the series, the secondary winding connected through the corresponding first diode is the same as the secondary winding connected through the second diode to the cell connections corresponding to the subsequent battery in the series. The circuit also provides high efficiency voltage balancing during charging of the battery stack. |
| US09819200B2 |
Authorization in a networked electric vehicle charging system
Networked electric vehicle charging stations for charging electric vehicles are coupled with an electric vehicle charging station network server that performs authorization for charging session requests while the communication connection between the charging stations and the server are operating correctly. When the communication connection is not operating correctly, the networked electric vehicle charging stations enter into a local authorization mode to perform a local authorization process for incoming charging session requests. |
| US09819195B2 |
Multipath current source switching device
The present disclosure discloses a multipath current source switching device, including a switching control unit, N current paths, and N loads. Each current path is formed by a constant current source circuit and a switching circuit. One terminal of a first load is coupled to a load power supply, and the other terminal of the first load is coupled to an output terminal of a constant current source circuit of a first current path and one terminal of a second load; one terminal of an ith load is coupled to the other terminal of an (i−1)th load and an output terminal of a constant current source circuit of an ith current path; and the switching control unit controls an output current of a corresponding constant current source circuit through a corresponding switching circuit. When the circuits are switched, an output voltage of a switching circuit of a current path to be switched off is decreased to zero according to a preset voltage variation quantity, and an output voltage of a switching circuit of a current path to be switched on is increased to a highest operating voltage according to the preset voltage variation quantity, such that a current on a load does not exceed a preset current and is not zero during switching. N is an integer not less than 2, and i is equal to 2, 3, 4, . . . , N. |
| US09819193B2 |
Waste heat recovery system
Connected in parallel to an expander and a condenser of a Rankine cycle are n sets each including a different expander and a different condenser. Devices are provided for stopping operations of the expanders in sets connected in parallel, and a pressure sensor and a temperature sensor are installed respectively in an inlet and outlet of an evaporator. An electronic control unit sets or releases at least one of the operation stopping devices such that a measured value of the temperature sensor reaches a prescribed temperature value which is equal to or less than a thermal decomposition temperature of a refrigerant and which is set in advance, and the electronic control unit controls a rotational speed of a refrigerant pump such that a measured value of the pressure sensor reaches a prescribed pressure value set in advance. |
| US09819190B2 |
Islanding a plurality of grid tied power converters
A power system having a plurality of power converters coupled together at a point of common coupling (PCC). The power converters are coupled to a load and provide a combined power converter output to the load. A switch is coupled in series between the PCC and an external grid. When the switch is closed, the power system is in a grid-tied configuration and when the switch is open, the power system is in a microgrid configuration. A control system coupled to the power converters enables the switch to open and close in response to a signal received from one or more sensors monitoring the external grid, enables the power converters to operate in a current control mode when the switch is closed, and transitions the power converters from grid-tied mode to microgrid mode and synchronize the power converters such that the converters share the load. |
| US09819189B2 |
Area and power efficient switchable supply network for powering multiple digital islands
A switchable supply network for powering multiple digital islands. In one embodiment, a first digital island includes a first power collapsible circuit and a first retention circuit, and a second digital island includes a second power collapsible circuit and a second retention circuit. In a normal mode of operation, the first digital island is provided a first supply voltage and a second digital island is provided a second supply voltage higher than the first supply voltage. In a transition mode the second power collapsible circuit is powered down and the second supply voltage is lowered and provided to the second retention circuit. When the second supply voltage falls below the first supply voltage, the first power collapsible circuit is powered down. The second supply voltage is now provided only to the retention circuits, and is furthered lowered in a retention mode to a final retention voltage. |
| US09819187B2 |
Device for supplying power to HVDC converter
A power supply device for HVDC controller is provided. The power supply device comprises: a first High Voltage Direct Current (HVDC) converter unit connected to an active power grid; a second HVDC converter unit connected to a passive power grid, the second HVDC converter unit being capable of receiving first DC power from the first HVDC converter unit by being connected to the first HVDC converter unit via a Direct Current (DC) transmission line; and an HVDC controller, arranged in the second HVDC converter unit, for receiving the first DC power, applied from the first HVDC converter unit to the second HVDC converter unit, by being connected to the DC transmission line that connects the first HVDC converter unit with the second HVDC converter unit. |
| US09819183B2 |
Power distribution system
The invention relates a power distribution system (1) like a track lighting system comprising a power supply (2), a power bar (3) comprising several electrical conductors (4, 5, 6) for distributing the power, an electrical load (12) to be powered by the power of the power distribution system, a selector switch (11) connected to the several electrical conductors and to the electrical load, wherein the selector switch is adapted to select via which electrical conductor the power is to be received by the electrical load, and a controlling device (10) for automatically controlling the selector switch. This kind of power distribution system provides a relatively large variability of adapting the power consumption to an actual load situation, which can lead to an improved performance of the power distribution system. In particular, power balancing can be provided in a relatively simple way by automatically controlling the selector switch accordingly. |
| US09819178B2 |
Bypass mechanism
A bypass mechanism for a photovoltaic module which switches out the electronics and switches in a bypass mechanism. |
| US09819177B2 |
Protective device with non-volatile memory miswire circuit
The present invention is directed to an electrical wiring device that includes a processing circuit is configured to determine the wiring state based on detecting a wiring state parameter at the plurality of line terminals during a predetermined period after the tripped state has been established. The processing circuit is configured to store a wiring state indicator in a wiring state register based on a wiring state determination. The wiring state register being preset to trip the circuit interrupter when the AC power source is applied by an installer to the plurality of line terminals or the plurality of load terminals for the first time. |
| US09819176B2 |
Low capacitance transient voltage suppressor
A low capacitance transient voltage suppressor is disclosed. The transient voltage suppressor comprises a first diode with a first anode thereof coupled to an I/O port. A first cathode of the first diode and a second cathode of a second diode are respectively coupled to two ends of a resistor. A second anode of the second diode is coupled to a low-voltage terminal. A third anode and a third cathode of a third diode are respectively coupled to the second cathode and the resistor. The third diode induces a third parasitic capacitance smaller than a first capacitance of the first diode and a second parasitic capacitance of the second diode, and the third parasitic capacitance in series with the first and second parasitic capacitances dominate a small capacitance in a path during normal operation. |
| US09819174B2 |
Hotswap operations for programmable logic devices
Techniques are provided to control hotswap operations with programmable logic devices (PLDs). In particular, a MOSFET is provided to limit an in-rush current drawn from a power supply by capacitive components of an electronic assembly when it is plugged into the live, power supply. A controller with an algorithm is provided to control the MOSFET based on the in-rush current detected at the MOSFET. As such, a feedback control loop is established to selectively bias the gate of the MOSFET based on the detected in-rush current. The algorithm may limit the in-rush current based on a Safe Operating Area (SOA) of the MOSFET. The hotswap process may include multiple phases each with a voltage and/or current limit modeling the voltages and currents of the SOA. The algorithm may transition through the phases with the respective current and/or voltage limits during the hotswap process. |
| US09819173B2 |
Overheat protection circuit and voltage regulator
To provide an overheat protection circuit which is not affected by a leak current while being low in current consumption and good in detection accuracy, and a voltage regulator equipped with the overheat protection circuit. An overheat protection circuit is configured to include a leak current detection circuit which detects that a leak current has flowed at a high temperature, a bias circuit which allows a bias current to flow in response to an output signal of the leak current detection circuit, and a temperature detection circuit operated by the bias current. |
| US09819169B2 |
Electrical junction box
An electrical junction box with a waterproof property where a box body and a lower cover are fitted to each other is provided. An electrical junction box includes a box body having a peripheral wall formed in a frame shape and a lower cover with which a lower opening portion of the box body is covered. A lower end portion of the peripheral wall is provided with a double wall portion in which an inner wall and an outer wall extending in a peripheral direction are arranged with a clearance therebetween. An insertion wall portion provided on a tip end portion of a peripheral wall of the lower cover is inserted between the inner wall and the outer wall. In such an electrical junction box, a flange portion that projects toward the outer wall is provided on a projecting end portion of the insertion wall portion of the lower cover. |
| US09819168B2 |
Electrical junction box
An electrical junction box in which the interference between an inner wall of a rotating upper cover and an outer wall of a box body can be more reliably prevented and a waterproof property can be secured, while also meeting the demand for reduction in size of the electrical junction box. In a state in which an upper cover is attached to a box body, on one end side of the box body and one end side of the upper cover, an outer wall of the box body is located on an inner side with respect to an outer wall of the upper cover, an inner wall of the upper cover is located on an inner side with respect to the outer wall of the box body, and an inner wall of the box body is located on an inner side with respect to the inner wall of the upper cover. |
| US09819166B1 |
Weather-proof junction box with pan for circuit board
A curb and cap junction box assembly protecting joined electrical conductors includes a curb member with a planar flashing and central housing extending upwardly from the flashing, forming an enclosed space. The central housing has top and bottom openings. A plate, secured over the bottom opening has a knockout section and a mounting pan for circuit boards. A cap member has a planar top and peripheral edge extending downward. The cap member reversibly fastens over the top opening of the central housing. The junction box assembly is secured to a structure by the flashing and receives an electrical conductor from the structure through the knockout aperture in the plate member. The electrical conductor extends through the top opening of the central housing and under the downward extending peripheral edge of the cap member and outside the junction box assembly. The junction box provides enclosure for high voltage applications. |
| US09819159B2 |
Low profile variable frequency controller with cooling and process
A housing for a variable frequency drive and its transformer, which housing has two compartments, one each for a VFD and transformer. The housing is box shaped with enclosures attached to the rear wall of each compartment, which enclosures communicate through openings in the compartments to their interiors. The VFD compartment has an exterior side wall communicating enclosure. Cooling components are disposed in each enclosure. Each compartment has inner and outer doors. The inner door of the VFD compartment has a recessed cabinet with VFD controls therein and on its door. The inner door of the transformer compartment has a grill, while its outer door has both interior and exterior louvers. The transformer compartment also holds the main circuit breaker. |
| US09819158B2 |
Integrated electrical assembly for housing modular units and related components thereof
Exemplary embodiments of the present invention are directed to an integrated electrical assembly that may include an enclosure having a frame, a mounting flange extending around a periphery of the frame, a swing door coupled to the frame by a hinge, a first gasket coupled to the frame that engages a perimeter of the swing door when the swing door is in a closed position, a second gasket coupled to a perimeter of the mounting flange, and a master tub within the enclosure. The master tub may include a plurality of coupled enclosures that may be configured to receive at least one electrical component. |
| US09819156B2 |
Spark plug having a seal made of an at least ternary alloy
A spark plug having a housing, an insulator disposed in the housing, a center electrode situated in the insulator, a ground electrode disposed on the housing, and at least one sealing element, the at least one sealing element being situated on the housing, in particular between the insulator and the housing, wherein the at least one sealing element is made from an at least ternary alloy, and the alloy contains copper as the main constituent. |
| US09819155B2 |
Spark plug
A spark plug includes a housing, an insulator inside the housing, a center electrode inside the insulator, and a connecting pin inside the insulator. At least one fillet is formed at a change of cross section at the housing, at the insulator, at the center electrode, and/or at the connecting pin. The fillet, viewed in cross section, includes a first leg and a second leg at an angle to the first leg. The length of the first leg is greater than the length of the second leg. |
| US09819150B2 |
Surface-emitting ring-cavity quantum cascade laser with ring-shaped phase shifter and related methods
A ring-cavity surface emitting quantum cascade laser (RCSE-QCL) may include a ring-shaped active region having first and second opposing facets. One of the first and second opposing facets may define a radiation emitting facet. The RCSE-QCL may also include a ring-shaped phase shifter aligned with the radiation emitting facet and having a spiraled surface. |
| US09819148B2 |
Method for controlling tunable wavelength laser
A driving condition for causing the tunable wavelength laser to conduct laser oscillation at a first wavelength is acquired. a driving condition for causing the tunable wavelength laser to conduct laser oscillation at the second wavelength is calculated. The tunable wavelength laser is driven based on the driving condition of the second wavelength, feedback control that changes the driving condition of the tunable wavelength laser based on a difference between an output of the wavelength sensing unit and the target value is performed, and the tunable wavelength laser is caused to oscillate at the second wavelength. The driving condition of the tunable wavelength laser obtained by the feedback control when oscillation has occurred at the second wavelength is stored in the memory. Thereafter, the tunable wavelength laser is driven with reference to the stored driving condition of the tunable wavelength laser. |
| US09819142B2 |
Modular, high energy, widely-tunable ultrafast fiber source
A modular, compact and widely tunable laser system for the efficient generation of high peak and high average power ultrashort pulses. Peak power handling capability of fiber amplifiers is expanded by using optimized pulse shapes, as well as dispersively broadened pulses. Dispersive pulse stretching in the presence of self-phase modulation and gain results in the formation of high-power parabolic pulses. To ensure a wide tunability of the whole system, Raman-shifting of the compact sources of ultrashort pulses in conjunction with frequency-conversion in nonlinear optical crystals can be implemented, or an Anti-Stokes fiber in conjunction with fiber amplifiers and Raman-shifters are used. Positive dispersion optical amplifiers are used to improve transmission characteristics. An optical communication system utilizes a Raman amplifier fiber pumped by a train of Raman-shifted, wavelength-tunable pump pulses, to thereby amplify an optical signal which counterpropagates within the Raman amplifier fiber with respect to the pump pulses. |
| US09819134B2 |
Tool for stripping and crimping a wire
A tool for stripping and crimping a wire includes a housing. The tool also includes a wire holding system defining a wire holding area and comprising a set of teeth configured to hold the wire as the wire is stripped and crimped. At least a portion of the wire holding system is contained within the housing. The tool further includes a wire stripping system defining a wire stripping area and comprising at least one stripping member configured to penetrate at least a portion of the wire. At least a portion of the wire stripping system is contained within the housing. The wire stripping area is adjacent to the wire holding area. Additionally, the tool includes a lug retainer system configured to position a lug on the wire in the wire stripping area. |
| US09819131B2 |
RJ-45 communication plug with plug blades received in apertures in a front edge of a printed circuit board
Communications plugs are provided which include a printed circuit board having a plurality of elongated conductive traces and a plurality of plug blades. Each plug blade has a first section that extends along a top surface of the printed circuit board and a second section that extends along a front edge of the printed circuit board. Additionally, each plug blade may have a thickness that is at least twice the thickness of the elongated conductive traces. The plug blades may be low profile plug blades that are manufactured separately from the printed circuit board. |
| US09819121B2 |
Screwless terminal block
A screwless terminal block allows easy insertion and removal of a wire. A housing (2) includes a fixture insertion opening (23) through which a rod-like fixture (6) is inserted to come in contact with a contact pressure spring (4) and deform the spring (4) away from a wire (5). When the fixture (6) is inserted through the fixture insertion opening (23), an acute angle of 45° or less is formed by an axis of the fixture (6) and a straight line connecting a contact point A between the housing (2) and a part of the fixture (6) adjacent to the wire insertion opening (24) and a contact point B between the housing (2) and a part of the fixture (6) adjacent to the spring (4) at a cross-section taken along a plane including the axis of the fixture (6) and parallel to a pressing direction of the spring (4). |
| US09819120B2 |
Connector
A connector C to be mounted on a case of a device includes a coated wire 10 formed such that a core 11 is coated with an insulation coating 12, a terminal fitting 20 to be fit and connected to a mating terminal, a flexible conductor 15 interposed between the terminal fitting 20 and an end of the coated wire 10, and a housing 30 made of synthetic resin and accommodating the terminal fitting 20 together with the flexible conductor 15. The core 11 of the coated wire 10 is provided with a core fixing portion 25 integrated with the core 11 and the core fixing portion 25 is embedded in the housing 30 by molding. |
| US09819117B2 |
Power connector, and electrical connection element and assembly method therefor
An electrical connection element is for a power connector. The power connector has an electrical component including a first insulative housing and a first mating assembly having a number of first electrical mating members structured to be substantially enclosed by the first insulative housing. The electrical connection element includes a second insulative housing; and a second mating assembly comprising a number of second electrical mating members structured to be electrically connected to the number of first electrical mating members. The second mating assembly is structured to move between a first position corresponding to the number of second electrical mating members being substantially enclosed by the second insulative housing, and a second position corresponding to the number of second electrical mating members being partially disposed external the second insulative housing. |
| US09819114B2 |
Break-away tractor-trailer cable connector
An electrical connector for connecting a tractor-trailer electrical cable to a truck tractor or a trailer electrical system includes a housing defining an interior space and having a mounting flange extending radially therefrom at a head end, at least one locking tab at the head end, and a wall dividing the interior space into a head end space and a foot end space, the wall having a plurality of holes in an array, a plurality of terminal pins secured against movement in the holes in the wall and extending from the foot end space into the head end space and a connector body having an outer wall configured to slide into the head end space of the housing. |
| US09819113B2 |
Electrical connection apparatus
A clamp for establishing an electrical connection with a conductor is provided. The clamp comprises a first body and a second body. The second body is pivotally coupled to the first body. The first and second bodies define a receiving region therebetween for receiving a conductor. The first and second bodies are biased towards each other at the receiving region to clamp a conductor. The clamp also comprises a shutter, movably coupled to one of the first body and the second body. The shutter is biased into a restricting position in which entry into the receiving region is restricted. |
| US09819112B2 |
Retaining block and modular plug insert
A retaining block for a modular plug insert is disclosed. The retaining block for a modular plug insert comprises a first retaining block having a first plug-end surface, a first cable-end surface, a first outside contour surrounding the first plug-end surface and the first cable-end surface, and a first receiving opening receiving a contact, the first receiving opening extending from the first plug-end surface to the first cable-end surface and open to the first outside contour. |
| US09819110B2 |
Separable clasp connectors and die sets and methods for locking and unlocking such connectors
A separable clasp connector is provided that has first and second parts that are pivotable with respect to one another by a die set. The clasp connector includes one or more die alignment features to ensure proper alignment with the die set so as to apply an unlocking force in a predetermined direction. Die sets and methods also provided to move a separable clasp connector back-and-forth among a locked position and an unlocked position. |
| US09819107B2 |
Advanced panel mount connector and method
A panel mount connector and method involve a connector shell assembly that is configured to be received in an opening that is defined by a panel with the connector shell defining a through passage. A flexible circuit board is supported within the through passage and defines a first external connection interface at one end for external electrical access from one side of the panel when the connector shell assembly is installed in the panel and at least the first external connection interface is supported for independent movement relative to the connector shell. |
| US09819106B2 |
Male strip connector
A male strip connector having a support element made of insulating material that has a base area section, a retaining section protruding transversely therefrom and, on the side of the retaining section that is opposite the base area section, a fixing section, and having a plurality of contact pins that have a plug contact section and a connection contact section angled off with respect thereto, is described. The retaining section has a plurality of insertion openings, arranged next to one another, for inserting a plug contact section of a contact pin. The fixing section has a plurality of recesses for holding a respective connection contact section of a contact pin. The retaining section has a plurality, corresponding to the number of insertion openings, of fingers that are separated from one another by free spaces and in which the insertion openings are made. |
| US09819104B2 |
Connector and electronic equipment
A connector is attachable to an object having a lock portion. The connector includes a housing and a frame. The housing has a press portion and a support portion. The housing is fixed to the object under an attached state where the connector is attached to the object. The frame has a supported portion, a pressed portion and a locked portion. When the connector is in the attached state, the supported portion is positioned between the pressed portion and the locked portion in a front-rear direction and is supported from below by the support portion in an up-down direction perpendicular to the front-rear direction. Under the attached state, the pressed portion is pressed by the press portion from above. Under the attached state, the locked portion applies a force to the lock portion from below. |
| US09819103B2 |
Washable intelligent garment and components thereof
The present relates to a washable interconnection patch, a connection assembly, and an intelligent washable garment equipped therewith. The patch receives and interconnects wires to a cable. The patch comprises two matching pieces interlocking together so as to define there between two opposite apertures. One of the apertures is adapted to receive and hold the wires, and the other aperture is adapted to receive and hold the cable. One of the two matching pieces defines on an interior face a channel to interconnect the wires to the cables. The connection assembly comprises a male connector and a female connector. The male connector defines a series of independent connection points along a length thereof. The female connector is adapted to receive the male connector, and defines along a length of an inner surface thereof a series of contact points. When the male connector is inserted within the female connector, the connection points and the contact points are aligned and in contact together. |
| US09819100B1 |
Insulating apparatus for metallic busbar
An insulating apparatus for a metallic busbar is disposed on an interconnection part of a first strip and a second strip of the metallic busbar. The insulating apparatus includes a first insulated member, a second insulated member and a securing member. The first insulated member is formed with at least one slot. The second insulated member overlaps the first insulated member. The securing member passes through the second insulated member and the slot of the first insulated member to be slidably disposed in the slot, so that the first insulated member and the second insulated member are movable in a telescopic manner. The first insulated member and the second insulated member can cover the interconnection part of the first and second strips. The insulating problem of the interconnection part of a metallic busbar is solved, shortening the manufacturing period and manufacturing conveniently with lower cost. |
| US09819098B2 |
Antenna-in-package structures with broadside and end-fire radiations
Package structures are provided having antenna-in-packages that are integrated with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter wave (mmWave) frequency range with radiation in broadside and end-fire directions. |
| US09819095B2 |
Wideband wide beamwidth MIMO antenna system
A two antenna assembly for use in MIMO systems is described where wide beamwidth performance is achieved over wide frequency ranges while maintaining high isolation and low envelope correlation between the antenna elements in a low profile, small form factor. This MIMO antenna system is optimal for use in DAS systems for in-building applications where a MIMO antenna system is required and a low profile is desirable for ceiling and wall mount applications. The antenna assembly is designed to maintain low Passive Intermodulation (PIM) characteristics across multiple cellular frequency bands. Each antenna in the pair of elements is configured to cover multiple cellular frequency bands to provide a single port per antenna for use with multiple transceivers. A single conductor radiator design for the antenna elements simplifies manufacturing of the antenna. A tuned parasitic element is positioned between the antenna elements to enhance isolation at specific portions of the frequency range. |
| US09819094B2 |
Lensed base station antennas
A lensed antenna system is provided. The lensed antenna system includes a first column of radiating elements having a first longitudinal axis and a first azimuth angle, and, optionally, a second column of radiating elements having a second longitudinal axis and a second azimuth angle, and a radio frequency lens. The radio frequency lens has a third longitudinal axis. The radio frequency lens is disposed such that the longitudinal axes of the first and second columns of radiating elements are aligned with the longitudinal axis of the radio frequency lens, and such that the azimuth angles of the beams produced by the columns of radiating elements are directed at the radio frequency lens. The multiple beam antenna system further includes a radome housing the columns of radiating elements and the radio frequency lens. There may be more or fewer than two columns of radiating elements. |
| US09819091B2 |
Portable terminal and slot antenna thereof
Embodiments of the present invention disclose a portable terminal and a slot antenna thereof, and relate to the field of mobile communications technologies, which can effectively reduce a space occupied by the antenna and at the same time meet various bandwidth requirements. The slot antenna of the portable terminal includes: a large-area conductor plane laid on a printed circuit board, a battery with a bulk conductor, and a first feeding part, where a slot is formed between the conductor plane and the battery, the conductor plane is radio-frequency coupled to the bulk conductor in the battery through the slot, and the first feeding part is located in the slot. The present invention is applied in designing the antenna of the portable terminal. |
| US09819085B2 |
NFC antenna module and portable terminal comprising same
Disclosed are a NFC antenna module which maximizes antenna performance by mounting a radiation sheet in such a manner as to partially overlap with an antenna sheet and a portable terminal comprising the same. The disclosed NFC antenna module comprises: an electromagnetic wave shielding sheet; an antenna sheet laminated on the electromagnetic wave shielding sheet and having a radiation pattern formed along the outer periphery of a central portion thereof; and a radiation sheet laminated on the antenna sheet so as to form an overlapping area with the radiation pattern and having a recess formed therein, through which the central portion is exposed. |
| US09819082B2 |
Hybrid electronic/mechanical scanning array antenna
A hybrid electronic/mechanical scanning array antenna including an outer housing and a cold plate rotatable therein. A waveguide aperture including an array of antenna elements is mounted to a top surface of the cold plate and a multi-layer circuit board is mounted to a bottom surface of the cold plate. A plurality of amplifier modules are mounted to the cold plate, where the circuit board includes a plurality of openings that allow the amplifier modules to be directly mounted to the cold plate, and the cold plate includes a plurality of RF signal channels that allow RF signals from the amplifier modules to travel through the cold plate. The amplifier modules are controlled to provide phase-weighting for electronic signal scanning in an elevation direction and rotation of the cold plate allows signal scanning in an azimuth direction. |
| US09819080B2 |
Methods and systems for antenna switching based on uplink metrics
This disclosure provides systems, methods, and apparatus for antenna switching for simultaneous communication. In one embodiment, a wireless communication apparatus is provided. The wireless communication apparatus includes a plurality of antennas including a first antenna and a second antenna. The wireless communication apparatus further includes a plurality of transmit circuits including a first transmit circuit. The wireless communication apparatus further includes a controller configured to selectively switch the first transmit circuit from transmitting wireless communications via the first antenna to transmit wireless communications via the second antenna based on one or more uplink performance characteristics of at least one of the first antenna and the second antenna. Other aspects, embodiments, and features are also claimed and described. |
| US09819079B2 |
Modular antenna for near field coupling integration into metallic chassis devices
Described herein are techniques related to near field communication and wireless power transfers. A portable device may include a modular antenna that offers consistent characteristics independent of integration environment. The modular antenna may include a continuous loop of coil antenna and a ferrite material that are encapsulated by a shield. The shield may form a “U” shape configuration to encapsulate the top layer coil antenna and the middle layer ferrite material in all three sides, which are defined by a bottom portion, an outer wall, and an inner wall. Furthermore, the shield may include an outer rim and an inner rim to maintain the same coil antenna characteristics in the modular antenna. |
| US09819075B2 |
Body communication antenna
An electromagnetic induction wireless communication system including: a magnetic antenna; an electric antenna; a tuning capacitor coupled to the magnetic antenna configured to tune the magnetic antenna; a controller configured to control the operation of the communication system; a signal source coupled to the controller configured to produce a communication signal used to drive the magnetic antenna and the electric antenna; a voltage control unit coupled to the signal source configured to produce one of an amplitude difference, phase difference, and an amplitude and a phase difference between the communication signal used to drive the magnetic antenna and electric antenna. |
| US09819073B2 |
Electronic apparatus including antenna device
An electronic apparatus is provided. The electronic apparatus includes at least one first antenna radiator, a main board including a feed part that is spaced apart from at least one portion of the at least one first antenna radiator to overlap the at least one portion of the at least one first antenna radiator and feeds an electric current to the at least one first antenna radiator according to an indirect feed method, at least one second antenna radiator disposed on a housing of the electronic apparatus, at least one first connection member for electrically connecting the at least one first antenna radiator to the at least one second antenna radiator, and at least one second connection member for electrically connecting a ground part formed on the main board to the at least one second antenna radiator. Also, other various exemplary may be implemented. |
| US09819071B2 |
Antenna apparatus and method of making same
A housing defines a face bounded by opposed longitudinal and opposed lateral sidewalls. At least one conductive portion of at least one longitudinal sidewall is electrically isolated from at least one conductive portion of at least one of the lateral sidewalls by at least one corner section that is non-conductive or electrically floating. At least one antenna element internal to the housing is electrically coupled to radio frequency circuitry; and a conductor configured to electrically couple the at least one conductive portion of the at least one lateral sidewall between the opposed longitudinal portions to a ground plane. In a specific embodiment, there are two opposed corner sections each defined by first and second gaps, and the lateral conductive portion between the corner sections parasitically couples to the antenna element when transmitting or receiving. The corner sections may each have a corner conductive portion which are isolated by the gaps. |
| US09819068B2 |
Time delay unit comprising a spirally wound meandering line pattern
An electronic stripline circuit includes a flexible dielectric film having a three-dimensional coiled shape that defines a spiraled inner core. At least one electrically conductive signal trace is formed on a first surface of the flexible dielectric film. The signal trace extends along a signal path to define a trace length configured to control a time delay of a coiled time delay unit. |
| US09819067B2 |
Planar-transmission-line-to-waveguide adapter
A planar-transmission-line-to-waveguide adapter is provided, to reduce limitations on bandwidth expansion. The planar-transmission-line-to-waveguide adapter includes a planar transmission line structure includes at least a planar transmission line, a dielectric substrate, and a metal ground having a coupling gap. a gradient waveguide structure includes m dielectric waveguides with gradient sizes, and any dielectric waveguide is surrounded by metal via holes in a dielectric substrate, where m is a positive integer not less than 2. a1st dielectric waveguide in the m dielectric waveguides with gradient sizes is coupled with the coupling gap in the planar transmission line structure. Adjacent dielectric waveguides are connected by using a metal ground, and a radiation patch is disposed between the adjacent dielectric waveguides. A metal ground and a radiation patch are disposed on a surface on which an mth dielectric waveguide comes into contact with a standard waveguide. |
| US09819052B2 |
Electrolyte and secondary battery
A secondary battery capable of safely improving a battery performance is provided. An electrolyte with which a separator 13 is impregnated contains an alkyl sulfone and a low-polar solvent (a solvent having a relative permittivity of 20 or less) together with an aluminum salt. The alkyl sulfone facilitates the redox reaction of aluminum, and further reduces the reactivity of the electrolyte. Additionally, the low-polar solvent suppresses the block of the redox reaction of aluminum. In charge and discharge, it becomes easy to electrochemically efficiently precipitate and dissolve aluminum, and further to inhibit the corrosion of a metallic exterior package member or the like. |
| US09819049B2 |
Battery and electronic apparatus
A battery includes a plurality of unit batteries arranged in a stacking direction, each unit battery including a battery element portion and at least one connection portion extending from a side of the battery element portion. A plurality of the connection portions extend from a first side of the unit batteries, and a distance in the stacking direction between at least two of said connection portions decreases as said connection portions extend away from the sides of the respective battery element portions. |
| US09819047B2 |
Assembled battery
In a state where battery cells (2) are sandwiched from both ends by a pair of end plates (3) comprising a plurality of plates, the pair of end plates (3) are secured by metal bands (4). The end plates (3) are secured by bolts to a base, at the inside end of the plates as seen from the battery cells (2). Then, elongation of the assembled battery (1) can be kept to a small range, even when the battery cells (2) are swollen. |
| US09819044B2 |
Apparatus comprising a fuel cell unit and a component, and a stack component for use in such an apparatus
A fuel cell unit with a plurality of fuel cells defining a longitudinal axis and a main flow direction coaxial to the longitudinal axis. Fuel cell inlets and fuel cell outlets are arranged at opposite ends of the fuel cell unit and in line with the main flow direction. Also, a component comprising first fluid conduits arranged parallel to the main flow direction, the first fluid conduits comprising first fluid inlets and first fluid outlets arranged at opposite ends of the component and in line with the main flow direction. The component is arranged adjacent the fuel cell unit such that at least one of the first fluid inlets and the first fluid outlets of the component are arranged adjacent at least one of the fuel cell outlets and the fuel cell inlets such that a fluid flow may flow substantially parallel to the longitudinal axis of the apparatus in the first fluid conduits of the component and in the fuel cell unit and when passing from the component to the fuel cell unit or vice versa. |
| US09819042B2 |
Fuel cell integration within a heat recovery steam generator
Systems and methods are provided for incorporating molten carbonate fuel cells into a heat recovery steam generation system (HRSG) for production of electrical power while also reducing or minimizing the amount of CO2 present in the flue gas exiting the HRSG. An optionally multi-layer screen or wall of molten carbonate fuel cells can be inserted into the HRSG so that the screen of molten carbonate fuel cells substantially fills the cross-sectional area. By using the walls of the HRSG and the screen of molten carbonate fuel cells to form a cathode input manifold, the overall amount of duct or flow passages associated with the MCFCs can be reduced. |
| US09819040B2 |
Printed fuel cell with integrated gas channels
A printed fuel cell having integrated gas channels, and having an anode layer, where a first gas diffusion electrode layer is periodically fixed to the anode layer, wherein the periodically fixed first gas diffusion electrode layer defines hydrogen flow field channels. A first catalyst material is coated or infused to the first gas diffusion electrode layer. An electrolyte membrane covers portions of the anode layer and first gas diffusion electrode layer with the first catalyst material. A second catalyst material is coated or infused to the electrolyte membrane. A second gas diffusion electrode layer is in operative association with the electrolyte membrane and second catalyst material, on a surface of the electrolyte membrane different from a surface of the electrolyte membrane which is in contact with the first gas diffusion electrode layer, and a perforated cathode is in contact with the second gas diffusion electrode layer. |
| US09819034B2 |
Stack for simulating cell voltage reversal behavior in fuel cell
Disclosed is a stack for simulating a cell voltage reversal behavior in a fuel cell. The stack is configured to have a structure in which a separator of a portion of a plurality of cells in the stack have an inlet of a hydrogen flow field partially blocked to induce hydrogen starvation only in the portion of the plurality of cells. |
| US09819029B2 |
Method of making a fuel cell component
An illustrative example method of making a fuel cell component includes mixing a catalyst material with a hydrophobic binder in a solvent to establish a liquid mixture having at least some coagulation of the catalyst material and the hydrophobic binder. The liquid mixture is applied to at least one side of a porous gas diffusion layer. At least some of the solvent of the applied liquid mixture is removed from the porous gas diffusion layer. The catalyst material remaining on the porous gas diffusion layer is dried under pressure. |
| US09819027B2 |
Method for producing battery and battery
A method for producing a battery resulting from the joining with a plurality of weld nuggets therebetween of a foil layered part, at which foil exposed portions exposing an aluminum foil overlap, and a positive terminal member made of aluminum, includes: a formation step for forming at the foil layered part a foil welded part at which are formed, by welding aluminum foils together by means of ultrasonic welding, a first high-position part at at least a section of a surface to be joined, and a plurality of first low-position parts distributed at scattered points within the first high-position part; and a resistance-welding step for contacting the first high-position part to the positive terminal member, generating weld nuggets at the first low-position part by flowing an electric current, and resistance-welding the foil welded part and the positive terminal member with the weld nuggets therebetween. |
| US09819024B2 |
Solid state catholytes and electrolytes for energy storage devices
The present invention provides an energy storage device comprising a cathode region or other element. The device has a major active region comprising a plurality of first active regions spatially disposed within the cathode region. The major active region expands or contracts from a first volume to a second volume during a period of a charge and discharge. The device has a catholyte material spatially confined within a spatial region of the cathode region and spatially disposed within spatial regions not occupied by the first active regions. In an example, the catholyte material comprises a lithium, germanium, phosphorous, and sulfur (“LGPS”) containing material configured in a polycrystalline state. The device has an oxygen species configured within the LGPS containing material, the oxygen species having a ratio to the sulfur species of 1:2 and less to form a LGPSO material. The device has a protective material formed overlying exposed regions of the cathode material to substantially maintain the sulfur species within the catholyte material. Also included is a novel dopant configuration of the LiaMPbSc (LMPS) [M=Si, Ge, and/or Sn] containing material. |
| US09819023B2 |
Conductive primer compositions including phosphorus based acid bound to water soluble polymer for a non-aqueous electrolyte electrical energy storage device
A conductive coating composition for use in electrical energy storage devices, which contain a non-aqueous electrolyte, is provided comprising an organic polymeric binder comprising one or more water-soluble polymers; water; solid conductive particles dispersed in the binder; and phosphorus based acid bound to at least one of the water-soluble polymers and present in a range of 0.025-10.0% by weight of the water-soluble polymers, as well as methods of making and using said conductive coating composition, coated current collectors and electrical energy storage devices made therefrom. |
| US09819022B2 |
Battery cell and method of operating the same
A battery cell includes a negative electrode and a positive electrode. The battery cell also contains a thermally expandable graphite intercalation compound. |
| US09819020B2 |
Few-layered TiS2 as Li-ion battery anode
An electrochemical cell having an anode containing few-layered transition metal dichalcogenide is disclosed. The few-layered configuration of the transition metal dichalcogenide causes the material to have relatively low electric potential, enabling its use opposite a wide variety of cathode materials. In general, the few-layer configuration allows deployment as anode material of transition metal dichalcogenides that would typically otherwise be limited to use as cathode materials. |
| US09819019B2 |
All solid secondary battery and method of preparing all solid secondary battery
An all solid secondary battery including: an exterior body; a cathode including a cathode active material including a transition metal oxide, an anode; and a solid electrolyte layer disposed between the cathode and the anode, wherein the cathode, the anode, and the solid electrolyte layer are disposed in the exterior body, wherein the transition metal oxide is a lithium composite transition metal oxide that contains nickel and at least one metal element other than nickel that belongs to Group 2 to Group 13 of the periodic table, and wherein the total of partial pressures of carbon dioxide and oxygen in the exterior body is 200 pascals or less. |
| US09819018B2 |
Lithium ion secondary battery
There is provided a lithium ion secondary battery with a high capacity and having excellent cycle characteristics. The lithium ion secondary battery, including a positive electrode, a negative electrode, a separator and a nonaqueous electrolyte liquid. Here, the positive electrode comprises a positive electrode material in which a surface of particles of a positive electrode active material is coated with an Al-containing oxide. The Al-containing oxide has an average coating thickness of 5 to 50 nm. The positive electrode active material contained in the positive electrode material comprises a lithium cobalt oxide comprising Co and at least one kind of an element M1 selected from the group consisting of Mg, Zr, Ni, Mn, Ti and Al. The negative electrode comprises a material S including SiOx (0.5≦x≦1.5) as a negative electrode active material, wherein in 100 mass % of a total of the negative electrode active material included in the negative electrode, the materials S is included in the negative electrode active material at a content of 10 mass % or more. |
| US09819017B2 |
Sealed battery and battery jacket can
There is provided a sealed battery having excellent corrosion resistance and sealing performance. The sealed battery 1 includes a battery jacket can 2 having a bottom and being in a cylindrical or polyhedral shape. The battery jacket can 2 also serves as a collector of one of the electrodes. The battery jacket can 2 has an opening pointing upwards and accommodates active parts (3, 4, 5 and 20). The opening is sealed by a sealing part 10 that includes a flat metal sealing plate 6, a gasket 9 made of an insulator, and a terminal part 7 of the other electrode. In the sealing part, the terminal part is attached to the sealing plate 6 using the gasket 9. The sealing plate has a planar shape that matches a shape of the opening of the battery jacket can. The sealing plate is in a saucer shape whose edge section is bent upwards. An upper end of the edge section of the sealing plate is laser-welded to an upper end of the battery jacket can while the sealing plate being inserted inside the opening of the battery jacket can. The battery jacket can is made of ferritic stainless steel to which Tin (Sn) is added. |
| US09819011B2 |
Electrode material for a lithium cell
An electrode material for an electrochemical energy store, in particular for a lithium cell, includes at least one first lithiatable active material, which is based on a transition metal oxide, and at least one second lithiatable active material, which is based on a doped transition metal oxide, the doped transition metal oxide of the second lithiatable active material being doped with at least one redox-active element. Also described is a method for manufacturing an electrode of this type. |
| US09819005B2 |
Secondary battery
A secondary battery including an electrode assembly, the electrode assembly including a first electrode, a second electrode, and a separator; a case accommodating the electrode assembly therein; a cell cover sealing the case; and a first terminal unit having one end that is electrically connected to the first electrode of the electrode assembly and having another end extracted to an outside of the case, wherein the first terminal unit includes a first collector in the case and electrically connected to the first electrode of the electrode assembly, the first collector having a fuse area; and an arc cutting block adjacent to the fuse area of the first collector, the arc cutting block being movable to a position previously occupied by the fuse area in the event that the fuse area is cut off, and cutting an arc generation path. |
| US09819004B2 |
Current interruption device and electricity storage device including same
A current interruption device includes: a first conducting plate 90 configured to be electrically connected to a terminal; and a second conducting plate 88 disposed to face the first conducting plate and configured to be electrically connected to the electrode assembly. A center portion of the first conducting plate 90 and a center portion of the second conducting plate 88 are joined by a first welding portion. The second conducting plate 88 is configured to be fractured so as to interrupt the current flowing between the terminal and the electrode assembly when the internal pressure of the casing exceeds the preset pressure. The first welding portion has a fuse function of interrupting the current flowing between the terminal and the electrode assembly by fusion of the first welding portion when the current flowing between the terminal and the electrode assembly exceeds a preset current. |
| US09819001B2 |
Laminated lithium battery module
The present invention provides a battery module, comprising a battery cell and a current collector sheet, the battery cell is provided with a positive electrode tab and a negative electrode tab, the positive electrode tab and the negative electrode tab are located at the opposite ends of the battery cell, the adjacent battery cells form a Z-type arrangement through the current collector sheet by putting the tabs in series, the said positive electrode tab of the battery cell is an aluminum foil tab or a copper foil tab, the negative electrode tab is a copper foil tab or an aluminum foil tab, and the material of the positive electrode tab and that of the negative electrode tab are not the same, the said current collector sheet is a combined current collector sheet, the current collector sheet is combined by an aluminum sheet and a copper sheet. |
| US09818995B2 |
Battery pack system
The present invention relates to a battery pack system, comprising: a plurality of battery cells, sealing fluid and a battery pack case. The battery cells are immersed in the sealing fluid in the battery pack case, which includes a box and a top cover. The case is equipped with an inlet port and an outlet port. The outlet port is connected with the inlet port through a circulation pump and a buffer vessel, forming a circular route; some sensors are configured in the buffer vessel. When an electrolyte leakage occurs in the battery pack, it is confined in the sealing fluid, preventing the electrolyte to be exposed to air and further catch on fire. When the mixed fluid circulates through the buffer vessel, the sensors detect the leakage at once and send out warnings to the battery system to increase its safety level. The leaked flammable gases are separated from the circulation channel and get released to avoid too high internal pressure and consequently break the battery box. |
| US09818992B2 |
Battery pack
A battery pack includes a plurality of battery cells, each of the battery cells extending in a lengthwise direction between a first end and a second end; and a battery case accommodating the plurality of battery cells, wherein the battery case includes a holder unit protruding in the lengthwise direction of the plurality of battery cells and fixing the plurality of battery cells within the case. |
| US09818991B2 |
Secondary battery
Provided is a secondary battery, which can improve a coupling force between a case and a cap plate and can improve stability of the secondary battery, by forming a coupling protrusion on a side surface of the cap plate and forming a coupling groove corresponding to the coupling protrusion on an inner surface of the case. The secondary battery includes an electrode assembly, a case accommodating the electrode assembly, and a cap plate coupled to an opening of the case. A coupling protrusion protruding toward an inner surface of the case is formed on a side surface of the cap plate, and a coupling groove corresponding to the coupling protrusion is formed on the inner surface of the case. |
| US09818989B2 |
Rechargeable battery and manufacturing method thereof
A rechargeable battery and a manufacturing method of the same are provided, which can aid in preventing an electric short from occurring between electrode plates by forming a cutting portion of each on the electrode plates in the shape of a curved surface or a bead having a uniform thickness and/or a diameter sufficient to prevent or substantially prevent the cutting portion from piercing a separator separating the electrode plates from each other. In a present embodiment, the electrode assembly includes an electrode plate having a current collector plate, a coating portion having an electrically active material coated on the current collector plate, a non-coating portion formed at an edge of the current collector plate and not coated with the electrically active material, a cutting portion inwardly formed from the non-coating portion, and a curved portion formed along the cutting portion in a thickness direction of the non-coating portion. |
| US09818986B2 |
Thin film transistor array structure
Disclosed is a TFT array structure including a visibility supplementary layer which is disposed between a TFT and a plate on which the TFT is disposed, for reducing or preventing light from being reflected. The TFT array structure includes a plate having transparency, a TFT substrate facing the plate, and a visibility supplementary layer disposed between the TFT substrate and the plate in a structure covering a portion of the TFT substrate to reduce or prevent an external light from being reflected by a line of the TFT substrate. |
| US09818985B2 |
Organic light emitting diode display device
An organic light emitting diode (“OLED”) display device includes: a substrate; a reflective layer disposed on the substrate; a refractive index anisotropic layer disposed on the reflective layer; a first electrode disposed on the refractive index anisotropic layer; an organic light emitting layer disposed on the first electrode; and a second electrode disposed on the organic light emitting layer. |
| US09818982B2 |
Optoelectronic assembly and method for producing an optoelectronic assembly
An optoelectronic assembly includes an optoelectronic component having a surface light source for emitting a light on a substrate which is at least partly transmissive for the light emitted by the surface light source, wherein the optoelectronic component includes at least one first main emission surface and a second main emission surface wherein the second main emission surface is situated opposite the first main emission surface, and a reflective structure which is arranged at least partly in the beam path of the light emitted by the surface light source and is designed to reflect at least part of the light impinging on the reflective structure in the direction of the substrate, such that a laterally offset image of the surface light source is generatable. The reflective structure and the optoelectronic component are arranged at a distance from one another in a range of approximately 1 mm to approximately 1000 mm. |
| US09818981B2 |
Organic light-emitting device and organic display apparatus
A display panel includes an EL panel part, a CP panel part, and a resin layer. Light is extracted from a luminous part including an organic luminous layer in the EL panel part in a direction of an arrow. The CP panel part includes a circular polarizing film. The resin layer is formed to cover an upper surface of the EL panel part, has a layer thickness of 15 μm, and includes a resin part and a plurality of getter particles dispersed in the resin part. The getter particles are dispersed at a density at which the getter particles do not overlap one another in plan view. |
| US09818973B2 |
Display device
There is provided a display device including a display panel configured to display an image, a window above the display panel and including a display area configured to transmit an image therethrough, a non-display area around the display area, a window base facing the display panel, a printed layer below the window base, and a low refractive-index zone between the window base and the printed layer, and an adhesive layer between the display panel and the window. |
| US09818972B2 |
Organic light emitting device and method for preparing the same
An organic light-emitting device with a sealing layer covering a light-emitting diode, wherein the sealing layer comprises n number of sealing units, each comprising a sequential stack of an organic film and an inorganic film, wherein n is an integer of 1 or greater and a method of manufacturing the same. |
| US09818970B2 |
Organic light emitting diode display panel, manufacturing method thereof and mask plate
The present disclosure provides an OLED display panel, a manufacturing method thereof and a mask plate. The OLED display panel includes an emitting layer and a cathode located at a light-exiting side of the emitting layer. The cathode is provided with gaps. Light emitted from the emitting layer may directly transmit through positions corresponding to the gaps, and then the cathode may have a decreased absorption and reflection against light emitted from the emitting layer as comparing with a cathode formed as a whole layer in the related art, thereby improving the light extracting rate of the OLED display panel, weakening the micro-cavity effect and solving the problem that the display color of the OLED display panel changes with different viewing angles. |
| US09818967B2 |
Barrier covered microlens films
Optical components and devices are provided that include a substrate, a microlens array, and a barrier film system conformally covering the microlens array. An OLED may be optically coupled to the microlens array. The barrier film may provide protection to the microlens array or other components, without having a significant negative impact on outcoupling of light from the coupled OLED by the microlens array. |
| US09818963B1 |
Organic electric memory device based on phosphonic acid or trichlorosilane-modified ITO glass substrate and preparation method thereof
The invention discloses an organic electric memory device based on phosphonic acid or trichlorosilane-modified ITO glass substrate and a preparation method thereof. The preparation method comprises the following steps of 1) cleaning the ITO glass substrate; 2) forming a phosphonic acid or trichlorosilane modified layer; 3) forming an organic coating film layer; and 4) forming an electrode, and finally obtaining the organic electric memory device. By adoption of the method, a series of sandwich-type organic electric memory devices are prepared; meanwhile, the preparation method is simple, convenient, fast, and easy to operate; compared with the conventional device, the turn-on voltage of the organic electric memory device is lowered, the yield of the multi-level system is improved, and the problem of relatively low ternary productivity at present is solved; and therefore, the organic electric memory device has extremely high application value in the future memory fields. |
| US09818959B2 |
Metal-assisted delayed fluorescent emitters containing tridentate ligands
Tridentate platinum, palladium, and gold complexes of Formulas A-I and A-II and tridentate iridium and rhodium compounds of Formulas B-I, B-II, and B-III suitable for delayed fluorescent and phosphorescent or phosphorescent emitters in display and lighting applications. |
| US09818946B2 |
Film and organic semiconductor device containing the film
A film comprising a polymer compound and a low molecular weight compound having carrier transportability, wherein the content of the low molecular weight compound is 5 to 40 parts by mass with respect to 100 parts by mass of the sum of the polymer compound and the low molecular weight compound, the diffraction intensity A specified by the following measuring method A is 3 to 50, and the intensity ratio (A/B) of the diffraction intensity A specified by the following measuring method A to the diffraction intensity B specified by the following measuring method B is 30 or less: (Measuring method A) the diffraction intensity A is the maximum diffraction intensity in a range of scattering vector of 1 nm−1 to 5 nm−1 in a profile obtained by an Out-of plane measuring method using a film X-ray diffraction method; (Measuring method B) the diffraction intensity B is the maximum diffraction intensity in a range of scattering vector of 10 nm−1 to 21 nm−1 in a profile obtained by an In-plane measuring method using a film X-ray diffraction method. |
| US09818944B2 |
Organic semiconductor doping process
The present invention relates to the doping of organic semiconductors and processes for producing layers of p-doped organic semiconductors. Disclosed is a process for p-doping organic semiconductors comprising treating the organic semiconductor with an oxidized salt of the organic semiconductor. A process for producing a layer of a p-doped organic semiconductor comprising producing a p-doped organic semiconductor by treating the organic semiconductor with an oxidized salt of the organic semiconductor; disposing a composition comprising a solvent and the p-doped organic semiconductor on a substrate; and removing the solvent is also described. Also disclosed is a process for producing a layer of a p-doped organic semiconductor comprising: disposing a composition comprising a solvent, the organic semiconductor and a protic ionic liquid on a substrate; and removing the solvent. A process for producing a semiconductor device comprising a process for doping an organic semiconductor according to the invention is also described. Finally, a high purity p-dopant composition is described. |
| US09818940B2 |
Large-sized AMOLED display substrate and manufacturing method thereof
A method for fabricating an Organic Light-Emitting Diode (OLED) display panel is provided. The method includes arranging Thin-Film Transistor (TFT) devices on one side of a substrate and a function layer on the other side of the substrate to form a laminate including both the TFT devices and the function layer, attaching the laminate onto a loading platform such that the function layer included in the laminate faces towards the loading platform, and conducting a process on the laminate to form an organic electroluminescent material layer on surfaces of the TFT devices. |
| US09818934B2 |
Hall effect device
A hall effect device includes an active Hall region in a semiconductor substrate, and at least four terminal structures, each terminal structure including a switchable supply contact element and a sense contact element, wherein each supply contact element includes a transistor element with a first transistor terminal, a second transistor terminal, and a control terminal, wherein the second transistor terminal contacts the active Hall region or extends in the active Hall region; and wherein the sense contact elements are arranged in the active Hall region and neighboring to the switchable supply contact elements. |
| US09818933B2 |
6F2 non-volatile memory bitcell
An apparatus including an array of memory cells arranged in a grid defined by word lines and bit lines in a generally orthogonal orientation relative to one another, a memory cell including a resistive memory component and an access transistor, wherein the access transistor includes a diffusion region disposed at an acute angle relative to an associated word line. A method including etching a substrate to form a plurality of fins each including a body having a length dimension including a plurality of first junction regions and a plurality of second junction regions that are generally parallel to one another and offset by angled channel regions displacing in the length dimension an end of a first junction region from the beginning of a second junction region; removing the spacer material; and introducing a gate electrode on the channel region of each of the plurality of fins. |
| US09818930B2 |
Size-controllable opening and method of making same
A support structure includes an internal cavity. An elastic membrane extends to divide the internal cavity into a first chamber and a second chamber. The elastic membrane includes a nanometric-sized pin hole extending there through to interconnect the first chamber to the second chamber. The elastic membrane is formed of a first electrode film and a second electrode film separated by a piezo insulating film. Electrical connection leads are provided to support application of a bias current to the first and second electrode films of the elastic membrane. In response to an applied bias current, the elastic membrane deforms by bending in a direction towards one of the first and second chambers so as to produce an increase in a diameter of the pin hole. |
| US09818929B2 |
Ultrasonic device, method for manufacturing the same, electronic device and ultrasonic imaging device
An ultrasonic device includes a substrate having a first opening, a second opening and a wall part partitioning the first opening and the second opening; a first vibration film and a second vibration film which close the first opening and the second opening respectively; a first piezoelectric element and a second piezoelectric element which are formed on surfaces of the first vibration film and the second vibration film opposite to the substrate; an acoustic matching layer which is disposed within the first opening and the second opening so as to come into contact with the first vibration film and the second vibration film. |
| US09818927B2 |
Vibration element, method for manufacturing same, and vibration-type driving device
A vibration element includes: a substrate; a ceramic layer containing molten glass and provided on the substrate; and a piezoelectric element fixed to the substrate with the ceramic layer therebetween, wherein the piezoelectric element includes a first electrode layer provided in contact with the ceramic layer, a second electrode layer, and a piezoelectric layer provided between the first electrode layer and the second electrode layer, and the first electrode layer has a thickness larger than that of the second electrode layer. |
| US09818922B2 |
Light emitting diode package having frame with bottom surface having two surfaces different in height
Provided is a light emitting device package. It is a substrate comprising a top and a bottom surfaces being substantially parallel to each other; a light emitting diode chip on the substrate; a frame disposed around the light emitting diode chip and configured to reflect light emitted from the light emitting diode chip, the frame having an opening; a first metal layer disposed on the top surface of the substrate; a second metal layer disposed on the top surface of the substrate; a third metal layer disposed on the bottom surface of the substrate; a through hole connected between the first metal layer and the third metal layer; a material being filled in the opening of the frame; and a lens disposed on the material, wherein the substrate and the frame are separate from each other. |
| US09818920B2 |
LED system
A non-hermetically sealed LED system containing an active composition having an amount between 0.06 and 2.5 mg per cm2 of the system optical window area is described. The active composition contains an active material in powder form, wherein at least 75 wt % of the active material is chosen from one or more of active carbons, silver, copper, zinc, copper oxide, zinc oxide, calcium oxide, and silver oxide. |
| US09818912B2 |
Ultraviolet reflective contact
A contact including an ohmic layer and a reflective layer located on the ohmic layer is provided. The ohmic layer is transparent to radiation having a target wavelength, while the reflective layer is at least approximately eighty percent reflective of radiation having the target wavelength. The target wavelength can be ultraviolet light, e.g., having a wavelength within a range of wavelengths between approximately 260 and approximately 360 nanometers. |
| US09818909B2 |
LED light extraction enhancement enabled using self-assembled particles patterned surface
A light emitting diode (LED) containing device including a light emitting diode (LED) structure, and a light transmissive substrate in contact with the LED structure. The light transmissive substrate has a texture surface tuned to include features with dimensions greater than a wavelength of light produced by the LED structure. In some embodiments, increasing the feature size of the texture to be comparable to the wavelength of light produced by the LED increases light extraction from the LED in comparison to when the feature size of the texture is substantially less or substantially larger than the wavelength of light. |
| US09818908B2 |
Method and apparatus for molding encapsulant of light emitting device
Disclosed is an apparatus for forming an encapsulation material for a light emitting device. The apparatus for forming an encapsulation material comprises: an upper mold on which is mounted a substrate having a plurality of optical semiconductors; a lower mold arranged opposite the upper mold; a resin-capture space for capturing a resin between the upper mold and the lower mold; and an ejector pin for dividing the resin-capture space into a plurality of spaces at the position where the encapsulating material is formed, thereby dividing the encapsulation material into a plurality of parts formed on the substrate. |
| US09818907B2 |
LED element
Provided is an LED element that ensures horizontal current spreading within an active layer, improving light-emission efficiency, without causing problems due to lattice mismatch in an n-type semiconductor layer adjacent to the active layer. This LED element is obtained by inducing c-axis growth of nitride semiconductor layers on a support substrate, and comprises a first semiconductor layer constituted of an n-type nitride semiconductor, a current-diffusion layer, an active layer constituted of a nitride semiconductor, and a second semiconductor layer constituted of a p-type nitride semiconductor. The current-diffusion has a hetero-structure having a third semiconductor layer constituted of InxGa1-xN (0 |
| US09818906B2 |
Web based chemical bath deposition apparatus
Methods and systems for forming a layer from a fluid mixture on a web are provided. The system includes a fluid delivery apparatus for delivering the fluid mixture onto the web. The fluid delivery apparatus includes a cascade device and a chemical dispenser device. The system also includes a fluid stirring apparatus comprising at least one fan positioned over the web and configured to generate a flow pattern that stirs the fluid mixture on the web while the layer is being formed, without the at least one fan contacting the fluid mixture. The system further includes a fluid removal apparatus having a rinsing device and a suction device. The rinsing device is configured to dispense a rinsing fluid onto the web. The suction device is configured to remove by suction the rinsing fluid and a remaining portion of the fluid mixture remaining on the web after formation of the layer. |
| US09818904B2 |
Method of manufacturing solar cell
In a processing of immersing substrates in a chemical solution, and agitating the chemical solution by as bubbles or liquid, the gas bubbles or liquid is supplied so as to bring about alternate occurrence of a first state and a second state. The first state is a state in which an amount of the gas bubbles or the liquid supplied to first side in one direction of each substrate is greater than an amount of the gas bubbles or the liquid supplied to a second side in the one direction of the substrate. The second state is a state in which the amount of the gas bubbles or the liquid supplied to the first side in the one direction of the substrate is smaller than the amount of the gas bubbles or the liquid supplied to the second side in the one direction of the substrate. |
| US09818902B2 |
Solar cell and method for manufacturing the same
Disclosed are a solar cell and a method for manufacturing the same. The solar cell includes a substrate, a back electrode layer on the substrate, a light absorbing layer on the back electrode layer, a buffer layer on the light absorbing layer, and a window layer on the buffer layer. The buffer layer is formed through a chemical equation of (AxZn1-x)O(0≦x≦1), in which the A represents a metallic element. |
| US09818894B2 |
Photodetector with nanowire photocathode
A photodetector assembly for ultraviolet and far-ultraviolet detection includes an anode, a microchannel plate with an array of multichannel walls, and a photocathode layer disposed on the microchannel plate. Additionally, the photocathode may include nanowires deposited on a top surface of the array of multichannel walls. |
| US09818893B2 |
Microstructure enhanced absorption photosensitive devices
Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as holes, effectively increase the absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more. Their thickness dimensions allow them to be conveniently integrated on the same Si chip with CMOS, BiCMOS, and other electronics, with resulting packaging benefits and reduced capacitance and thus higher speeds. |
| US09818891B2 |
Solar cell module and method for manufacturing the same
A solar cell module and a method for manufacturing the same are disclosed. The method for manufacturing the solar cell module includes applying a low melting point metal on an electrode included in each of a plurality of solar cells, melting the low melting point metal to form a contact layer on the electrode, generating an ultrasonic vibration in the contact layer to remove a surface oxide layer formed on a surface of the electrode, melting a surface metal of the electrode and the contact layer to form a metal connection layer on the surface of the electrode, and connecting the metal connection layer to an interconnector. |
| US09818889B2 |
Composition for solar cell electrodes and electrode fabricated using the same
A composition for solar cell electrodes, a solar cell electrode prepared from the composition, a solar cell, and a method of manufacturing the same, the composition including silver powder; silver iodide; glass frit; and an organic vehicle, wherein the silver iodide is present in an amount of about 0.1 wt % to about 30 wt %, based on a total weight of the composition. |
| US09818882B2 |
Semiconductor device
A semiconductor device or the like capable of preventing malfunction of a driver circuit is provided. In a driver circuit for driving a power device used for current supply, a transistor including an oxide semiconductor is used as a transistor in a circuit (specifically, for example, a level shift circuit) requiring a high withstand voltage. In addition, a transistor (for example, a silicon transistor or the like) capable of higher operation than a transistor including an oxide semiconductor is preferably used as a transistor in a circuit (specifically, for example, a buffer circuit, a flip-flop circuit, or the like) requiring a lower withstand voltage than the level shift circuit. |
| US09818879B2 |
Integrated circuit devices
An IC device includes a substrate including a device region having a fin-type active region and a deep trench region; a gate line that extends in a direction intersecting the fin-type active region; and an inter-device isolation layer that fills the deep trench region. The gate line includes a first gate portion that extends on the device region to cover the fin-type active region and has a flat upper surface at a first level and a second gate portion that extends on the deep trench region to cover the inter-device isolation layer while being integrally connected to the first gate portion and has an upper surface at a second level that is closer to the substrate than the first level. |
| US09818876B1 |
Method for fabricating a finFET metallization architecture using a self-aligned contact etch
A method of fabricating a FinFET device includes a self-aligned contact etch where a source/drain contact module is performed prior to a replacement metal gate (RMG) module. In particular, the method involves forming a sacrificial gate over the channel region of a fin, and an interlayer dielectric over adjacent source/drain regions of the fin. An etch mask is then used to protect source/drain contact regions and enable the removal of the interlayer dielectric from outside of the protected area, e.g., between adjacent fins. |
| US09818874B2 |
Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures
Methods of forming a semiconductor structure include providing a multi-layer substrate having an epitaxial base layer overlying a strained primary semiconductor layer above a buried oxide layer. Elements within the epitaxial base layer are used to alter a strain state in the primary semiconductor layer within a first region of the multi-layer substrate without altering a strain state in the primary semiconductor layer within a second region of the multi-layer substrate. A first plurality of transistor channel structures are formed that each comprise a portion of the primary semiconductor layer within the first region of the multi-layer substrate, and a second plurality of transistor channel structures are formed that each comprise a portion of the primary semiconductor layer within the second region of the multi-layer substrate. Semiconductor structures fabricated by such methods may include transistor channel structures having differing strain states. |
| US09818873B2 |
Forming stressed epitaxial layers between gates separated by different pitches
Various embodiments include methods and integrated circuit structures. In some cases, a method of forming an integrated circuit structure can include: forming a doped silicon layer over a substrate; forming a plurality of fin structures from the doped silicon layer; forming a plurality of gate structures over the plurality of fin structures, each of the plurality of gate structures separated from a neighboring gate structure by a first pitch; forming a mask over the plurality of gate structures, exposing at least one of the plurality of gate structures; removing the at least one of the plurality of gate structures, wherein two of the remaining gate structures after the removing are separated by a second pitch larger than the first pitch; and forming an epitaxial region over the substrate between the two of the remaining gate structures. |
| US09818870B2 |
Transistor structure with variable clad/core dimension for stress and bandgap
An apparatus including a heterostructure disposed on a substrate and defining a channel region, the heterostructure including a first material having a first band gap less than a band gap of a material of the substrate and a second material having a second band gap that is greater than the first band gap; and a gate stack on the channel region, wherein the second material is disposed between the first material and the gate stack. A method including forming a first material having a first band gap on a substrate; forming a second material having a second band gap greater than the first band gap on the first material; and forming a gate stack on the second material. |
| US09818866B2 |
Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the same
A method for semiconductor devices on a substrate includes using gate structures which serve as active gate structures in a MOSFET region, as dummy gate structures in a JFET region of the device. The dummy gate electrodes are used as masks and determine the spacing between gate regions and source/drain regions, the width of the gate regions, and the spacing between adjacent gate regions according to some embodiments, thereby forming an accurately dimensioned transistor channel. |
| US09818865B2 |
Semiconductor device including a pipe channel layer having a protruding portion
Disclosed is a semiconductor device, including: a first pipe gate; a second pipe gate on the first pipe gate; a stacked structure on the second pipe gate; a first channel layer including a first pipe channel layer positioned within the first pipe gate and first cell channel layers connected to the first pipe channel layer; a second channel layer including a second pipe channel layer positioned within the second pipe gate, and second cell channel layers connected to the second pipe channel layer; and a slit insulating layer passing through the stacked structure and positioned between the adjacent second cell channel layers, wherein the second pipe channel layer has a body portion and a protrusion portion extending below the body portion at a position below the slit insulating layer. |
| US09818863B2 |
Integrated breakdown protection
A device includes a semiconductor substrate having a first conductivity type, a device isolating region in the semiconductor substrate, defining an active area, and having a second conductivity type, a body region in the active area and having the first conductivity type, and a drain region in the active area and spaced from the body region to define a conduction path of the device, the drain region having the second conductivity type. At least one of the body region and the device isolating region includes a plurality of peripheral, constituent regions disposed along a lateral periphery of the active area, each peripheral, constituent region defining a non-uniform spacing between the device isolating region and the body region. The non-uniform spacing at a respective peripheral region of the plurality of peripheral, constituent regions establishes a first breakdown voltage lower than a second breakdown voltage in the conduction path. |
| US09818859B2 |
Quasi-vertical power MOSFET and methods of forming the same
A MOSFET includes a semiconductor substrate having a top surface, a body region of a first conductivity type in the semiconductor substrate, and a double diffused drain (DDD) region having a top surface lower than a bottom surface of the body region. The DDD region is of a second conductivity type opposite the first conductivity type. The MOSFET further includes a gate oxide, and a gate electrode separated from the body region by the gate oxide. A portion of the gate oxide and a portion of the gate electrode are below the top surface of the body region. |
| US09818858B1 |
Multi-layer active layer having a partial recess
A transistor with a multi-layer active layer having at least one partial recess is provided. The transistor includes a channel layer arranged over a substrate. The channel layer has a first bandgap. The transistor includes a first active layer arranged over the channel layer. The first active layer has a second bandgap different from the first band gap such that the first active layer and the channel layer meet at a heterojunction. The transistor includes a second active layer arranged over the first active layer. The transistor also includes a dielectric layer arranged over the second active layer. The transistor further includes gate electrode having gate edges that are laterally adjacent to the dielectric layer. At least one gate edge of the gate edges is laterally separated from the second active layer by a first recess. |
| US09818857B2 |
Fault tolerant design for large area nitride semiconductor devices
A fault tolerant design for large area nitride semiconductor devices is provided, which facilitates testing and isolation of defective areas. A transistor comprises an array of a plurality of islands, each island comprising an active region, source and drain electrodes, and a gate electrode. Electrodes of each island are electrically isolated from electrodes of neighboring islands in at least one direction of the array. Source, drain and gate contact pads are provided to enable electrical testing of each island. After electrical testing of islands to identify defective islands, overlying electrical connections are formed to interconnect source electrodes in parallel, drain electrodes in parallel, and to interconnect gate electrodes to form a common gate electrode of large gate width Wg. Interconnections are provided selectively to good islands, while electrically isolating defective islands. This approach makes it economically feasible to fabricate large area GaN devices, including hybrid devices. |
| US09818851B2 |
Semiconductor device and manufacturing method thereof
An improvement is achieved in the performance of a semiconductor device. The semiconductor device includes a first trench gate electrode and second and third trench gate electrodes located on both sides of the first trench gate electrode interposed therebetween. In each of a semiconductor layer located between the first and second trench gate electrodes and the semiconductor layer located between the first and third trench gate electrodes, a plurality of p+-type semiconductor regions are formed. The p+-type semiconductor regions are arranged along the extending direction of the first trench gate electrode in plan view to be spaced apart from each other. |
| US09818850B2 |
Manufacturing method of the semiconductor device
The semiconductor device is manufactured through the following steps: after first heat treatment is performed on an oxide semiconductor film, the oxide semiconductor film is processed to form an oxide semiconductor layer; immediately after that, side walls of the oxide semiconductor layer are covered with an insulating oxide; and in second heat treatment, the side surfaces of the oxide semiconductor layer are prevented from being exposed to a vacuum and defects (oxygen deficiency) in the oxide semiconductor layer are reduced. |
| US09818849B2 |
Manufacturing method of semiconductor device with conductive film in opening through multiple insulating films
A first insulating film in contact with an oxide semiconductor film and a second insulating film are stacked in this order over an electrode film of a transistor including the oxide semiconductor film, an etching mask is formed over the second insulating film, an opening portion exposing the electrode film is formed by etching a portion of the first insulating film and a portion of the second insulating film, the opening portion exposing the electrode film is exposed to argon plasma, the etching mask is removed, and a conductive film is formed in the opening portion exposing the electrode film. The first insulating film is an insulating film whose oxygen is partly released by heating. The second insulating film is less easily etched than the first insulating film and has a lower gas-permeability than the first insulating film. |
| US09818848B2 |
Three-dimensional ferroelectric FET-based structures
Exemplary embodiments of the present disclosure are directed to three-dimensional (3D) Ferroelectric-gated FET (FeFET) structures that can be used to implement circuitry include memory cells, memory arrays, and/or other logic-based circuitry. For example, in exemplary embodiments, 3D FeFET AND memory arrays with vertical and horizontal channel structures are provided. |
| US09818847B2 |
Non-planar III-V field effect transistors with conformal metal gate electrode and nitrogen doping of gate dielectric interface
A high-k gate dielectric interface with a group III-V semiconductor surface of a non-planar transistor channel region is non-directionally doped with nitrogen. In nanowire embodiments, a non-directional nitrogen doping of a high-k gate dielectric interface is performed before or concurrently with a conformal gate electrode deposition through exposure of the gate dielectric to liquid, vapor, gaseous, plasma, or solid state sources of nitrogen. In embodiments, a gate electrode metal is conformally deposited over the gate dielectric and an anneal is performed to uniformly accumulate nitrogen within the gate dielectric along the non-planar III-V semiconductor interface. |
| US09818845B2 |
MOS-driven semiconductor device and method for manufacturing MOS-driven semiconductor device
A mask used to form an n+ source layer (11) is formed by a nitride film on the surface of a substrate before a trench (7) is formed. At this time, a sufficient width of the n+ source layer (11) on the surface of the substrate is secured. Thereby, stable contact between the n+ source layer (11) and a source electrode (15) is obtained. A CVD oxide film (12) that is an interlayer insulating film having a thickness of 0.1 micrometer or more and 0.3 micrometer or less is formed on doped poly-silicon to be used as a gate electrode (10a) embedded in the trench (7), and non-doped poly-silicon (13) that is not oxidized is formed on the CVD oxide film (12). Thereby, generation of void in the CVD oxide film (12) is suppressed and, by not oxidizing the non-doped poly-silicon (13), a semiconductor apparatus is easily manufactured. |
| US09818844B2 |
High-voltage junctionless device with drift region and the method for making the same
The present invention discloses a method of forming a high voltage junctionless device with drift region. The drift region formed between the semiconductor channel and the dielectric layer enables the high voltage junctionless device to exhibit higher punch-through voltages and high mobility with better performance and reliability. |
| US09818841B2 |
Semiconductor structure with unleveled gate structure and method for forming the same
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a fin structure formed over a substrate and a gate structure formed across the fin structure. In addition, the gate structure includes a gate dielectric layer formed over the substrate and a work function metal layer formed over the gate dielectric layer. The gate structure further includes a gate electrode layer formed over the work function metal layer. In addition, a top surface of the gate electrode layer is located at a position that is higher than that of a top surface of the gate dielectric layer, and the top surface of the gate dielectric layer is located at a position that is higher than that of a top surface of the work function layer. |
| US09818840B2 |
Semiconductor device and manufacturing method of semiconductor device
A semiconductor device includes a first semiconductor layer formed on a substrate; a second semiconductor layer and a third semiconductor layer formed on the first semiconductor layer; a fourth semiconductor layer formed on the third semiconductor layer; a gate electrode formed on the fourth semiconductor layer; and a source electrode and a drain electrode formed in contact with the second semiconductor layer. The third semiconductor layer and the fourth semiconductor layer are formed in an area immediately below the gate electrode, the fourth semiconductor layer is formed with a p-type semiconductor material, and the second semiconductor layer and the third semiconductor layer are formed with AlGaN, and the third semiconductor layer has a lower composition ratio of Al than that of the second semiconductor layer. |
| US09818835B2 |
Semiconductor device
In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an interface with a second nitride semiconductor layer. In plan view, an electrode portion is provided between a first electrode and a second electrode with a space between the first electrode and the second electrode, and a space between the second electrode and the electrode portion is smaller than the space between the first electrode and the electrode portion. An energy barrier is provided in a junction surface between the electrode portion and the second nitride semiconductor layer, the energy barrier indicating a rectifying action in a forward direction from the electrode portion to the second nitride semiconductor layer, and a bandgap of the second nitride semiconductor layer is wider than a bandgap of the first nitride semiconductor layer. |
| US09818834B2 |
Semiconductor device structure and method for forming the same
A method for forming a semiconductor device structure is provided. The method includes forming a gate stack, a spacer layer, and a dielectric layer over a substrate. The method includes removing a first portion of the dielectric layer to form a first hole in the dielectric layer. A second portion of the dielectric layer is under the first hole. The method includes forming a first protection layer over the gate stack and the spacer layer. The method includes forming a second protection layer over the first protection layer. The second protection layer includes a metal compound material, and the first protection layer and the second protection layer includes a same metal element. The method includes removing the second portion of the dielectric layer to form a through hole. The method includes forming a conductive contact structure in the through hole. |
| US09818833B2 |
Semiconductor device
A semiconductor device includes a first planar semiconductor (e.g., silicon) layer, first and second pillar-shaped semiconductor (e.g., silicon) layers, a first gate insulating film, a first gate electrode, a second gate insulating film, a second gate electrode, a first gate line connected to the first and second gate electrodes, a first n-type diffusion layer, a second n-type diffusion layer, a first p-type diffusion layer, and a second p-type diffusion layer. A center line extending along the first gate line is offset by a first predetermined amount from a line connecting a center of the first pillar-shaped semiconductor layer and a center of the second pillar-shaped semiconductor layer. |
| US09818832B2 |
Semiconductor device
Provided is an integrated circuit having a LOCOS-drain type MOS transistor mounted thereon in which, even in the case of poor pattern formation, a withstand voltage is not lowered and a poor withstand voltage does not result. A drain oxide film thicker than a gate oxide film is formed on an active region on a drain side of the LOCOS-drain type MOS transistor, to thereby prevent the withstand voltage of the MOS transistor from being lowered even if the gate electrode reaches the active region on the drain side. |
| US09818830B2 |
Recessed contact to semiconductor nanowires
A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds the semiconductor nanowire, and an electrode ohmically contacting the top surface of the semiconductor nanowire. A contact of the electrode to the semiconductor material of the semiconductor nanowire is dominated by the contact to the top surface of the semiconductor nanowire. |
| US09818821B2 |
Integrated RF front end system
Systems and methods are disclosed for integrating functional components of front-end modules for wireless radios. Front-end modules disclosed may be dual-band front-end modules for use in 802.11ac-compliant devices. In certain embodiments, integration of front-end module components on a single die is achieved by implementing a high-resistivity layer or substrate directly underneath, adjacent to, and/or supporting SiGe BiCMOS technology elements. |
| US09818819B2 |
Defect reduction using aspect ratio trapping
Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations in the films to the sidewalls. |
| US09818818B2 |
Power semiconductor device including trench gate structures with longitudinal axes tilted to a main crystal direction
A semiconductor device includes a semiconductor body with a first main crystal direction parallel to a horizontal plane. Longitudinal axes of trench gate structures are tilted to the first main crystal direction by a tilt angle of at least 2 degree and at most 30 degree in the horizontal plane. Mesa portions are between neighboring trench gate structures. First sidewall sections of first mesa sidewalls are main crystal planes parallel to the first main crystal direction. Second sidewall sections tilted to the first sidewall sections connect the first sidewall sections. |
| US09818817B2 |
Metal-insulator-metal capacitor over conductive layer
A method of fabricating a metal-insulator-metal (MIM) capacitor reduces the number of masks and processing steps compared to conventional techniques. A conductive redistribution layer (RDL) is patterned on a semiconductor chip. A MIM dielectric layer is deposited over the RDL. A first conductive layer of a MIM capacitor is deposited over the MIM dielectric layer. The MIM dielectric layer is patterned using a MIM conductive layer mask. The conductive redistribution layer includes two RDL nodes that extend under the first conductive layer of the MIM capacitor. A conductive via or bump extends through the MIM dielectric layer and couples one of the RDL nodes to the first conductive layer of the MIM capacitor. |
| US09818815B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate having a main surface; a first coil formed on the main surface; a first insulating film formed over the first coil and having a first main surface; a second insulating film formed on the first main surface of the first insulating film and having a second main surface; and a second coil formed on the second main surface of the second insulating film, wherein the first main surface of the first insulating film has a first area on which the second insulating film is formed, and has a second area without the first area in a plan view, and wherein the second insulating film is surrounded with the second area in the plane view. |
| US09818812B2 |
Organic light-emitting display apparatus and method of manufacturing the same
An organic light-emitting display apparatus includes a buffer layer formed on a substrate; a gate insulating layer formed over the buffer layer; an interlayer insulating layer formed over the gate insulating layer; a first opening formed through the gate insulating layer and the interlayer insulating layer; a first organic insulating layer formed over the interlayer insulating layer and including a second opening that overlaps with the first opening; a pixel electrode formed in the second opening, and directly contacting the buffer layer; a light emission layer formed over the pixel electrode; and an opposite electrode formed over the light emission layer. |
| US09818809B2 |
Bank repair for organic EL display device
An examination is performed of whether or not a bank having a defect portion is present. When a bank having a defect portion is present, the bank having the defect portion is repaired by forming a dam in each of adjacent concave spaces between which the bank having the defect portion is located. A dam formed in a concave space partitions the concave space into a first space in a vicinity of the defect portion and a second space outside the vicinity of the defect portion. The dam, at a portion thereof with lowest height, satisfies (h/H)+0.1W≧1.5, 0.5≦(h/H)≦2.0, and 5≦W≦50, where a ratio of the height h of the dam to a height H of the banks is denoted as h/H, and a width of the dam is denoted as W μm. |
| US09818808B2 |
Organic electroluminescence display panel and method of manufacturing the same
An organic EL display panel including: a substrate; a first lower electrode and a second lower electrode disposed over the substrate with a gap therebetween in a first direction; a wall separating a space above the first lower electrode and a space above the second lower electrode from one another; organic light-emitting layers respectively disposed in the spaces; and an upper electrode extending over the organic light-emitting layers. The wall includes a first portion disposed over the gap and two second portions each of which is disposed over a different one of the first lower electrode and the second lower electrode. The first portion is between the two second portions in the first direction, and at least a part of a bottom face of the first portion is positioned higher than a bottom face of the second portion. |
| US09818806B2 |
Multi-functional active matrix organic light-emitting diode display
A multi-functional active matrix display comprises a transparent front sheet, a semi-transparent layer of light emissive devices adjacent the rear side of the front sheet and forming a matrix of display pixels, and a solar cell layer located behind the light emissive devices for converting both ambient light and internal light7 from the light emissive devices into electrical energy, the solar cell layer including an array of electrodes on the front surface of the solar cell layer for use in detecting the location of a change in the amount of light impinging on a portion of the front surface of the solar cell layer. |
| US09818804B2 |
Hybrid display
A hybrid pixel arrangement for a full-color display is provided, which includes an inorganic LED in at least one sub-pixel, and an organic emissive stack in at least one other sub-pixel. In an embodiment, a first sub-pixel is configured to emit a first color, and includes an inorganic LED, a second sub-pixel is configured to emit a second color, and includes a first portion of a first organic emissive stack configured to emit an initial color different from the first color. A third sub-pixel is configured to emit a third color different from the initial color, and includes a second portion of the first organic emissive stack, and a first color altering layer disposed in a stack with the second portion of the first organic emissive stack. |
| US09818803B2 |
Pixel arrangement structure for organic light emitting display device
A pixel arrangement structure of an OLED display is provided. The pixel arrangement structure includes: a first pixel having a center coinciding with a center of a virtual square; a second pixel separated from the first pixel and having a center at a first vertex of the virtual square; and a third pixel separated from the first pixel and the second pixel, and having a center at a second vertex neighboring the first vertex of the virtual square. |
| US09818801B1 |
Resistive three-dimensional memory device with heterostructure semiconductor local bit line and method of making thereof
A three-dimensional resistive memory device includes an alternating stack of electrically conductive layers and insulating layers. Resistive memory elements are provided between the electrically conductive layers and a semiconductor local bit line. The semiconductor local bit line includes a heterostructure of an inner semiconductor material layer having an inner-material band gap and an outer semiconductor material layer having an outer-material band gap that is narrower than the inner-material band. A gate dielectric is located between a gate electrode and the inner semiconductor material layer. |
| US09818798B2 |
Vertical thin film transistors in non-volatile storage systems
Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and method of fabricating are described. The vertically-oriented TFT may be used as a vertical bit line selection device to couple a global bit line to a vertical bit line. A select device pillar includes a body and upper and lower source/drain regions. At least one gate is separated horizontally from the select device pillar by a gate dielectric. Each gate is formed over the gate dielectric and a base that extends horizontally at least partially between adjacent pillars. The base is formed with notches filled with the gate dielectric. The select device is fabricated using a conformally deposited base dielectric material and conformal hard mask layer that is formed with a larger bottom thickness than horizontal thickness. The base thickness is defined by the deposition thickness, rather than an uncontrolled etch back. |
| US09818795B2 |
CMOS compatible thermopile with low impedance contact
In described examples, an integrated circuit containing CMOS transistors and an embedded thermoelectric device may be formed by forming active areas which provide transistor active areas for an NMOS transistor and a PMOS transistor of the CMOS transistors and provide n-type thermoelectric elements and p-type thermoelectric elements of the embedded thermoelectric device. Stretch contacts with lateral aspect ratios greater than 4:1 are formed over the n-type thermoelectric elements and p-type thermoelectric elements to provide electrical and thermal connections through metal interconnects to a thermal node of the embedded thermoelectric device. The stretch contacts are formed by forming contact trenches in a dielectric layer, filling the contact trenches with contact metal and subsequently removing the contact metal from over the dielectric layer. The stretch contacts are formed concurrently with contacts to the NMOS and PMOS transistors. |
| US09818794B2 |
Solid-state image sensor and camera
An image sensor including a first semiconductor region of a first conductivity type that is arranged in a substrate, a second semiconductor region of a second conductivity type that is arranged in the first semiconductor region to form a charge accumulation region. The second semiconductor region includes a plurality of portions arranged in a direction along a surface of the substrate. A potential barrier is formed between the plurality of portions. The second semiconductor region is wholly depleted by expansion of a depletion region from the first semiconductor region to the second semiconductor region. A finally-depleted portion to be finally depleted, of the second semiconductor region, is depleted by the expansion of the depletion region from a portion of the first semiconductor region, located in a lateral direction of the finally-depleted portion. |
| US09818788B2 |
Vertical transfer gate structure for a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using global shutter capture
A method for manufacturing a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor with a vertical transfer gate structure for improved quantum efficiency (QE) and global shutter efficiency (GSE) is provided. A sacrificial dielectric layer is formed over a semiconductor region. A first etch is performed into the sacrificial dielectric layer to form an opening exposing a photodetector in the semiconductor region. A semiconductor column is formed in the opening. A floating diffusion region (FDR) is formed over the semiconductor column and the sacrificial dielectric layer. A second etch is performed into the sacrificial dielectric layer to remove the sacrificial dielectric layer, and to form a lateral recess between the FDR and the photodetector. A gate is formed filling the lateral recess and laterally spaced from the semiconductor column by a gate dielectric layer. The BSI CMOS image sensor resulting from the method is also provided. |
| US09818785B2 |
Semiconductor device, manufacturing method thereof, and electronic apparatus
A semiconductor device having a first semiconductor section including a first wiring layer at one side thereof; a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other; a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication; and an opening, other than the opening for the conductive material, which extends through the first semiconductor section to the second wiring layer. |
| US09818776B2 |
Integrating bond pad structures with light shielding structures on an image sensor
An imaging system may include an image sensor that may be a backside illuminated (BSI) image sensor. The BSI sensor may be bonded to an inactive silicon substrate or bonded to an active silicon substrate like a digital signal processor (DSP). Through-oxide vias (TOVs) may be formed in the image sensor die. A bond pad region may be formed on a light shielding layer to facilitate coupling the light shield to a ground source or other power sources. Color filter housing structures may be formed over active image sensor pixels on the image sensor die. In-pixel grid structures may be integrated with the color filter housing structures to help reduce crosstalk. The light shielding layer may also be formed over reference image sensor pixels on the image sensor die. The TOVs, the in-pixel grid structures, and the light shielding structures may be formed simultaneously. |
| US09818771B2 |
Display device
A display device made of a TFT substrate and a driver IC is configured to eliminate bad connection between them. On the driver IC connected to the TFT substrate, a first principal surface has first bumps formed along a first side having a first edge and second bumps formed along a second side opposite to the first side and having a second edge. The TFT substrate has first terminals and second terminals connected to the first and the second bumps, respectively. On a cross section taken perpendicularly to the first and the second sides, the first principal surface has a first area between the first and the second bumps and a second area between the second bumps and the second edge. The first and the second areas are bent toward the TFT substrate. |
| US09818768B2 |
Array substrate for display device
The array substrate for display device includes: a substrate; a signal line disposed on the substrate; a first color filter disposed on one side of the signal line; a second color filter disposed on the other side of the signal line; and an overlapping portion disposed to overlap part of the first color filter and part of the second color filter. The first color filter extends to overlap the signal line and the overlapping portion is disposed on the other side of the signal line so as not to overlap the signal line. |
| US09818766B2 |
Thin film transistor and organic light emitting diode display including the same
A thin film transistor includes a substrate, a semiconductor layer on the substrate, a first insulating layer covering the substrate and the semiconductor layer, a first gate electrode on the first insulating layer and overlapping the semiconductor layer, a second insulating layer covering the first gate electrode and the first insulating layer, a second gate electrode on the second insulating layer and overlapping the semiconductor layer and the first gate electrode, a third insulating layer covering the second gate electrode, a first contact hole defined in the first insulating layer, the second insulating layer and the third insulating layer, and through which a portion of the semiconductor layer is exposed, and a source electrode and a drain electrode connected to the semiconductor layer through the first contact hole. |
| US09818764B2 |
Flexible display device with side crack protection structure and manufacturing method for the same
There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display. |
| US09818763B2 |
Display device and method for manufacturing display device
A highly flexible display device and a method for manufacturing the display device are provided. A transistor including a light-transmitting semiconductor film, a capacitor including a first electrode, a second electrode, and a dielectric film between the first electrode and the second electrode, and a first insulating film covering the semiconductor film are formed over a flexible substrate. The capacitor includes a region where the first electrode and the dielectric film are in contact with each other, and the first insulating film does not cover the region. |
| US09818762B2 |
Arrangement of passivation layers in a pixel unit of an array substrate and display device
An array substrate and a display device are disclosed. The array substrate includes: a TFT, a pixel electrode layer driven by the TFT, a data line, a first passivation layer and a common electrode layer disposed on a substrate, the data line is for driving the TFT, the first passivation layer is disposed between the pixel electrode layer and the common electrode layer, the array substrate further includes a second passivation layer disposed between the common electrode layer and the data line and located in a region corresponding to the data line. |
| US09818757B2 |
Semiconductor device
This semiconductor device comprises a plurality of first conductive layers arranged above a substrate in a first direction intersecting an upper surface of the substrate. The conductive layers includes a portion in which positions of ends of the first conductive layers made different from each other in a second direction intersecting the first direction. Furthermore, this semiconductor device comprises a transistor electrically connected to the portion of the conductive layers. That transistor comprises: a channel layer extending in the first direction; a gate electrode layer disposed in a periphery of the channel layer; and a gate insulating layer disposed between the channel layer and the gate electrode layer. |
| US09818755B1 |
Split-gate flash cell formed on recessed substrate
A semiconductor device including a non-volatile memory (NVM) cell and method of making the same are disclosed. The semiconductor device includes a metal-gate logic transistor formed on a logic region of a substrate, and the NVM cell integrally formed in a first recess in a memory region of the same substrate, wherein the first recess is recessed relative to a first surface of the substrate in the logic region. Generally, the metal-gate logic transistor further including a planarized surface above and substantially parallel to the first surface of the substrate in the logic region, and the NVM cell is arranged below an elevation of the planarized surface of the metal-gate. In some embodiments, logic transistor is a High-k Metal-gate (HKMG) logic transistor with a gate structure including a metal-gate and a high-k gate dielectric. Other embodiments are also disclosed. |
| US09818753B2 |
Semiconductor memory device and method for manufacturing the same
In general, according to one embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first sub-conductive layer, a first insulating film. One portion of the first conductive layer overlaps at least one portion of the first sub-conductive layer in the first direction. One other portion of the first conductive layer overlaps at least one portion of the second conductive layer in the first direction. One portion of the first insulating film overlaps at least one portion of the second conductive layer in the second direction. The One portion of the first insulating film overlaps one portion of the first sub-conductive layer in the second direction. The second conductive layer overlap one other portion of the first insulating film in a direction intersecting the second direction. |
| US09818749B2 |
Storage element, storage device, and signal processing circuit
A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage element, data stored in a first storage circuit corresponding to a nonvolatile memory can be held by a first capacitor provided in a second storage circuit. With the use of a transistor in which a channel is formed in an oxide semiconductor layer, a signal held in the first capacitor is held for a long time. The storage element can accordingly hold the stored content (data) also in a period during which the supply of the power supply voltage is stopped. A signal held by the first capacitor can be converted into the one corresponding to the state (the on state or off state) of the second transistor and read from the second storage circuit. Consequently, an original signal can be accurately read. |
| US09818748B2 |
Semiconductor device and fabricating method thereof
A semiconductor device is provided. A substrate includes a first region and a second region. A first wire pattern, extending in a first direction, is formed at a first height from the substrate of the first region. A second wire pattern, extending in a second direction, is formed at a second height from the substrate of the second region. The first height is different from the second height. A first gate electrode, surrounding the first wire pattern, extends in a third direction crossing the first direction. A second gate electrode, surrounding the second wire pattern, extends in a fourth direction crossing the second direction. A first gate insulation layer is formed along a circumference of the first wire pattern and a sidewall of the first gate electrode. A second gate insulation layer is formed along a circumference of the second wire pattern and a sidewall of the second gate electrode. |
| US09818744B2 |
Leakage current suppression methods and related structures
A method and structure for suppressing band-to-band tunneling current in a semiconductor device having a high-mobility channel material includes forming a channel region adjacent to and in contact with one of a source region and a drain region. A tunnel barrier layer may be formed such that the tunnel barrier layer is interposed between, and in contact with, the channel region and one of the source region and the drain region. In some embodiments, a gate stack is then formed over at least the channel region. In various examples, the tunnel barrier layer includes a first material, and the channel region includes a second material different than the first material. In some embodiments, the semiconductor device may be oriented in one of a horizontal or vertical direction, and the semiconductor device may include one of a single-gate or multi-gate device. |
| US09818742B2 |
Semiconductor device isolation using an aligned diffusion and polysilicon field plate
An isolation structure prevents inter-device and intra-device leakage in first and second adjacent semiconductor devices in a substrate. The first and second semiconductor devices each include a gate region and at least one active region. A first channel stop region is configured to surround the first semiconductor device. A second channel stop region is configured to surround the second semiconductor device. A first field plate is located above at least part of the first channel stop region, and overlaps the gate region of the first semiconductor device in a first overlap region. A second field plate is located above at least part of the second channel stop region, and overlaps the gate region of the second semiconductor device in a second overlap region. |
| US09818741B2 |
Structure and method to prevent EPI short between trenches in FINFET eDRAM
After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion. |
| US09818732B2 |
Chip-on-film package and device assembly including the same
Chip-on-film packages and device assemblies including the same may be provided. The device assembly includes a film package including a semiconductor chip, a panel substrate connected to one end of the film package, a display panel disposed on the panel substrate, and a controlling part connected to another end of the film package. The film package includes a film substrate, a first wire disposed on a top surface of the film substrate, and a second wire disposed on a bottom surface of the film substrate. |
| US09818728B2 |
Interconnect structure with redundant electrical connectors and associated systems and methods
Semiconductor die assemblies having interconnect structures with redundant electrical connectors are disclosed herein. In one embodiment, a semiconductor die assembly includes a first semiconductor die, a second semiconductor die, and an interconnect structure between the first and the second semiconductor dies. The interconnect structure includes a first conductive film coupled to the first semiconductor die and a second conductive film coupled to the second semiconductor die. The interconnect structure further includes a plurality of redundant electrical connectors extending between the first and second conductive films and electrically coupled to one another via the first conductive film. |
| US09818727B2 |
Semiconductor package assembly with passive device
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first substrate. A first semiconductor die is disposed on the first substrate. A passive device is located directly on the first semiconductor die. The passive device is disposed within a boundary of the first semiconductor die in a plan view. |
| US09818726B2 |
Chip stack cooling structure
An apparatus comprises a first die, a thermal cooler formed over at least a portion of the first die, a second die formed over at least a portion of the thermal cooler, and a plurality of through-silicon vias providing electrical connections between the first die and the second die. The thermal cooler comprises a plurality of fluid channels for fluid cooling of the first die and the second die, the plurality of fluid channels being formed horizontally through the thermal cooler. The plurality of through-silicon vias are formed vertically through the first die, the thermal cooler and the second die. |
| US09818725B2 |
Inorganic-light-emitter display with integrated black matrix
An inorganic-light-emitter display includes a display substrate and a plurality of spatially separated inorganic light emitters distributed on the display substrate in a light-emitter layer. A light-absorbing layer located on the display substrate in the light-emitter layer is in contact with the inorganic light emitters. Among other things, the disclosed technology provides improved angular image quality by avoiding parallax between the light emitters and the light-absorbing material, increased light-output efficiency by removing the light-absorbing material from the optical path, improved contrast by increasing the light-absorbing area of the display substrate, and a reduced manufacturing cost in a mechanically and environmentally robust structure using micro transfer printing. |
| US09818718B2 |
Conductive paste and die bonding method
Provided are: a conductive paste in which sinterability of silver particles the conductive paste can be easily controlled by using silver particles having predetermined crystal transformation characteristics defined by an XRD analysis, and after a sintering treatment, excellent electrical conductivity and thermal conductivity can be stably obtained; and a die bonding method using the conductive paste.Disclosed is a conductive paste which includes silver particles having a volume average particle size of 0.1 to 30 μm as a sinterable conductive material, and a dispersing medium for making a paste-like form, and in which when the integrated intensity of the peak at 2θ=38°±0.2° in the X-ray diffraction chart obtainable by an XRD analysis before a sintering treatment of the silver particles is designated as S1, and the integrated intensity of the peak at 2θ=38°±0.2° in the X-ray diffraction chart obtainable by an XRD analysis after a sintering treatment (250° C., 60 minutes) of the silver particles is designated as S2, the value of S2/S1 is adjusted to a value within the range of 0.2 to 0.8. |
| US09818715B2 |
Semiconductor integrated circuit device
A semiconductor integrated circuit chip, in which multi-core processors are integrated, is usually mounted over an organic wiring board by FC bonding to form a BGA package by being integrated with the substrate. In such a structure, power consumption is increased, and hence the power supplied only from a peripheral portion of the chip is insufficient, so that a power supply pad is also provided in the chip central portion. However, because of an increase in the wiring associated with the integration of a plurality of CPU cores, etc., there occurs a portion between the peripheral portion and the central portion of the chip, where a power supply pad cannot be arranged. According to the outline of the present application, in a semiconductor integrated circuit device such as a BGA, etc., in which a semiconductor chip is mounted over an interposer, such as a multilayer organic wiring board, in a face-up manner, a first group of metal through electrodes, which are provided in the semiconductor chip to supply a power supply potential to a core circuit, etc., and a first metal land over the interposer are interconnected by a first conductive adhesive member film. |
| US09818712B2 |
Package with low stress region for an electronic component
A device package includes a substrate having an active surface. Electrical connection bumps are deposited on the active surface and are arranged in an array having a perimeter. At least one electronic component is formed at a region of the active surface, where the region is located outside of the perimeter of the array of electrical connection bumps. When the device package is coupled with external circuitry via the electrical connection bumps, the region at which the electronic component is formed is suspended over the electronic circuitry. This region is subject to a lower stress profile than a region of the active surface circumscribed by the perimeter. Thus, stress sensitive electronic components can be located in this lower stress region of the active surface. |
| US09818709B2 |
Semiconductor device and manufacturing method thereof
A flip-chip mounting technique with high reliability is provided in flip-chip mounting using a Cu pillar. In a semiconductor device to be coupled to a mounting board via a Cu pillar, the Cu pillar is caused to have a laminated structure including a pillar layer, a barrier layer, and a bump in this order from below, and the bump is formed to be smaller than the barrier layer. |
| US09818708B2 |
Semiconductor device with thin redistribution layers
A semiconductor device with thin redistribution layers is disclosed and may include forming a first redistribution layer on a dummy substrate, electrically coupling a semiconductor die to the first redistribution layer, and forming a first encapsulant layer on the redistribution layer and around the semiconductor die. The dummy substrate may be removed thereby exposing a second surface of the first redistribution layer. A dummy film may be temporarily affixed to the exposed second surface of the redistribution layer and a second encapsulant layer may be formed on the exposed top surface of the semiconductor die, a top surface and side edges of the first encapsulant layer, and side edges of the first redistribution layer. The dummy film may be removed to again expose the second surface of the first redistribution layer, and a second redistribution layer may be formed on the first redistribution layer and on the second encapsulant layer. |
| US09818706B2 |
Moisture-resistant electronic component, notably microwave, and method for packaging such a component
A component comprises at least one support on which is fixed at least one electronic circuit, for example a circuit of MMIC type, one or more layers of organic materials stacked on the support according to a technique of printed circuit type and forming a pre-existing cavity containing the electronic circuit, the cavity being filled with a material of low permeability to water vapor such as LCP. |
| US09818698B2 |
EMI package and method for making same
An integrated circuit structure includes a substrate, a photosensitive molding on a first side of the substrate, a via formed in the molding, and a conformable metallic layer deposited over the first side of the substrate and in the via. A through via may be formed through the substrate aligned with the via in the molding with an electrically conductive liner deposited in the through via in electrical contact with the conformable metallic layer. The integrated circuit structure may further include a connector element such as a solder ball on an end of the through via on a second side of the substrate opposite the first side. The integrated circuit structure may further include a die on the first side of the substrate in electrical contact with another through via or with a redistribution layer. |
| US09818691B2 |
Semiconductor device having a fuse element
A corrosion resistant semiconductor device includes fuse elements that can be cut by laser light. An upper portion of the fuse elements is covered with a porous insulating film so that, when laser light irradiated from a rear surface of a semiconductor substrate is collected at selected fuse elements, the fuse elements generate heat, expand, and rupture. A metal lattice having a plurality of windows is disposed over the fuse elements to permit rapid expansion of the fuse elements when irradiated with the laser light. Alternatively, a metal array having a plurality of independent light-shielding portions may be disposed over the fuse elements to prevent the laser light from adversely affecting circuitry on the front surface side of the semiconductor device. |
| US09818688B2 |
Dielectric region in a bulk silicon substrate providing a high-Q passive resonator
Structures and methods of making a dielectric region in a bulk silicon (Si) substrate of a mixed-signal integrated circuit (IC) provide a high-Q passive resonator. Deep trenches within the bulk Si substrate in <100> directions are expanded by wet etching to form contiguous cavities, which are filled by Si oxide to form a dielectric region. The dielectric region enhances the quality (Q) of an overlying passive resonator, formed in metallization layers of the mixed-signal IC. |
| US09818686B2 |
Semiconductor modules and methods of forming the same
Electronic modules, and methods of forming and operating modules, are described. The modules include a capacitor, a first switching device, and a second switching device. The electronic modules further include a substrate such as a DBC substrate, which includes an insulating layer between a first metal layer and a second metal layer, and may include multiple layers of DBC substrates stacked over one another. The first metal layer includes a first portion and a second portion isolated from one another by a trench formed through the first metal layer between the two portions. The first and second switching devices are over the first metal layer, a first terminal of the capacitor is electrically connected to the first portion of the first metal layer, and a second terminal of the capacitor is electrically connected to the second portion of the first metal layer, with the capacitor extending over the trench. |
| US09818685B2 |
Semiconductor device with redistribution layers on partial encapsulation and non-photosensitive passivation layers
A semiconductor device with redistribution layers on partial encapsulation is disclosed and may include a semiconductor die having a first surface, a second surface opposite to the first surface, and side surfaces between the first and second surfaces; an encapsulant encapsulating the side surfaces of the semiconductor die; a contact pad on the first surface of the semiconductor die; and a redistribution layer coupled to the contact pad The redistribution layer may include a linear portion and a circular pad, and a hemispherical conductive bump on the circular pad may include a protruding part extending toward the linear portion and having a radius less than the hemispherical conductive bump. The second surface of the semiconductor die may be coplanar with a surface of the encapsulant. A dielectric layer may cover a portion of the first surface of the semiconductor die and a first surface of the encapsulant. |
| US09818681B2 |
Wiring substrate
A wiring substrate includes a first substrate and an electronic component mounted on an upper surface of the first substrate. A first pad is formed on an uppermost wiring layer of the first substrate. A connection terminal is formed on the electronic component and is located proximate to the first pad in a plan view. The wiring substrate further includes a connection member formed on the first pad to electrically connect the first pad and the connection terminal. The connection member includes a rod-shaped core and a solder layer, which is coated around the core and joined to the first pad. The solder layer includes a bulge that spreads from the core of the connection member in a planar direction. The bulge is joined to the connection terminal of the electronic component. |
| US09818680B2 |
Scalable semiconductor interposer integration
Semiconductor packages are described which increase the density of electronic components within. The semiconductor package may incorporate interposers with cavities formed into the top and/or bottom. The cavities may then be used as locations for the electronic components. Alternatively, narrow spacer interposers may be used to space apart standard more laterally elongated interposers to form the indentations used to house the electronic components. The semiconductor package designs described herein may be used to reduce footprint, reduce profile and increase electronic component and transistor density for semiconductor products. |
| US09818679B2 |
Semiconductor device
This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate. |
| US09818678B2 |
Semiconductor device
To improve reliability of a semiconductor device, in a flip-chip bonding step, a solder material that is attached to a tip end surface of a projecting electrode in advance and a solder material that is applied in advance over a terminal (bonding lead) are heated and thereby integrated and electrically connected to each other. The terminal includes a wide part (a first portion) with a first width W1 and a narrow part (a second portion) with a second width W2. When the solder material is heated, the thickness of the solder material arranged over the narrow part becomes smaller than the thickness of the solder material arranged in the wide part. Then, in the flip-chip bonding step, a projecting electrode is arranged over the narrow part and bonded onto the narrow part. Thus, the amount of protrusion of the solder material can be reduced. |
| US09818673B2 |
Cooler
A cooler includes a cooling pipe having a cooling surface in contact with a heat-exchanged component, and a refrigerant passage. A pair of outer passages are formed between a pair of opposed inner wall surfaces which are located at both ends of an inner wall surface of the cooling pipe in a perpendicular direction and which constitute the refrigerant passage, and a pair of partition walls that are located at both ends of an inner fin in the perpendicular direction. At least one flow-regulating rib is formed in the refrigerant passage to project into the refrigerant passage at a position inward of the pair of outer passages in the perpendicular direction and at a position outward of an inflow hole and a discharge hole in the perpendicular direction as well as at a position outward of the inner fin in an arrangement direction and at a position inward of the inflow hole and the discharge hole in the arrangement direction. The flow-regulating rib is configured to restrict flow rates of refrigerant through the pair of outer passages. |
| US09818671B2 |
Liquid-cooled heat sink for electronic devices
A heat sink includes a heat absorption module, a liquid transport module and a heat exchange module. The transport module includes one inlet and outlet tubes, each having a first end connected spatially with the heat absorption module. The heat exchange module includes a fin assembly, one fan unit and several connection passages extending through the fin assembly. One end portion of the fin assembly defines a liquid storage chamber, which is divided into several first chambers therein such that first ends of the connection passages extend respectively into the first chambers. The other end portion of the fin assembly defines two second chambers such that second ends of the connection passages extend respectively into the second chambers while a second end of each inlet and outlet tubes is connected spatially with a first and second pump units, which are in spatially communicated with the first chambers. |
| US09818670B2 |
Cooling device installation using a retainer assembly
A system includes a retainer assembly to align each of a group of cooling devices with a corresponding electrical component of a group of electrical components that are mounted to a circuit board, where the retainer assembly includes a group of apertures, such that each of the cooling devices protrudes through a corresponding aperture when the retainer assembly is installed on the circuit board, and where the retainer assembly includes a group of retaining springs, each of which is associated with a corresponding aperture, that applies a respective force, of a group of forces, to a corresponding one of the cooling devices when the retainer assembly is installed on the circuit board. The system also includes a set of fasteners to mount the retainer assembly to the circuit board, such that the cooling devices dissipate heat that is generated by the electrical components. |
| US09818668B2 |
Thermal vias disposed in a substrate without a liner layer
A method relating generally to a substrate is disclosed. In such a method, the substrate has formed therein a plurality of vias. A liner layer is located on the substrate, including being located in a subset of the plurality of vias. At least one of the plurality of vias does not have the liner layer located therein. A thermally conductive material is disposed in the at least one of the plurality of vias to provide a thermal via structure. |
| US09818661B2 |
Semiconductor unit and test method
A semiconductor unit includes: a substrate made of a semiconductor; and a device group formed on the substrate and configured of a plurality of first capacitors, in which the device group includes one or a plurality of first conductive layers and a second conductive layer, the first and second conductive layers provided to be superimposed on each other in part or as a whole with an insulating film in between, the first conductive layer includes an edge extending along one direction, the second conductive layer includes a plurality of sub-conductive layers having substantially same shapes as one another, and the plurality of sub-conductive layers are arranged in relatively different positions with respect to the edge of the first conductive layer. |
| US09818650B2 |
Extra gate device for nanosheet
A method for forming semiconductor devices includes forming a highly doped region. A stack of alternating layers is formed on the substrate. The stack is patterned to form nanosheet structures. A dummy gate structure is formed over and between the nanosheet structures. An interlevel dielectric layer is formed. The dummy gate structures are removed. SG regions are blocked, and top sheets are removed from the nanosheet structures along the dummy gate trench. A bottommost sheet is released and forms a channel for a field effect transistor device by etching away the highly doped region under the nanosheet structure and layers in contact with the bottommost sheet. A gate structure is formed in and over the dummy gate trench wherein the bottommost sheet forms a device channel for the EG device. |
| US09818649B2 |
Method and structure for FinFET isolation
A semiconductor device includes a substrate having first and second fins extending lengthwise generally along a same line; a first gate stack over the substrate and engaging the first fin; a second gate stack over the substrate and engaging the second fin; a first isolation structure disposed between the first and second fins; and spacer features on sidewalls of the first and second gate stacks and on sidewalls of an upper portion of the first isolation structure. |
| US09818645B2 |
Through electrode, manufacturing method thereof, and semiconductor device and manufacturing method thereof
Embodiments provided are a through electrode that can be manufactured by a method not including the step of removing a side-wall insulating film formed at the bottom part of the through hole and so having improved electrical characteristics and mechanical reliability and a manufacturing method thereof as well as a semiconductor device and a manufacturing method thereof. A through electrode is disposed in a semiconductor substrate, and includes: a conductive layer; a side-wall insulating film that is disposed between the conductive layer and the semiconductor substrate, the side-wall insulating film being represented by the following chemical formula (1), and a tubular semiconductor layer disposed between the conductive layer and the semiconductor substrate, the semiconductor layer including a same material as the material of the semiconductor substrate. |
| US09818644B2 |
Interconnect structure and manufacturing method thereof
The present disclosure provides an interconnect structure, including a substrate, a first conductive feature over the substrate, a second conductive feature over the first conductive feature, and a dielectric layer surrounding the first conductive feature and the second conductive feature. A width of the first conductive feature and a width of the second conductive feature are between 10 nm and 50 nm. The present disclosure also provides a method for manufacturing an interconnect structure, including (1) forming a via opening and a line trench in a dielectric layer, (2) forming a 1-dimensional conductive feature in the via opening, (3) forming a conformal catalyst layer over a sidewall of the line trench, a bottom of the line trench, and a top of the 1-dimensional conductive feature, and (4) removing the conformal catalyst layer from the bottom of the line trench and the top of the 1-dimensional conductive feature. |
| US09818643B2 |
Semiconductor interconnect structure and manufacturing method thereof
The present disclosure provides an interconnect structure, including a low k dielectric layer with an air gap region and a non-air gap region. A first conductive line is positioned in the air gap region, and a second conductive line is positioned in the non-air gap region of the low k dielectric layer. A height of the first conductive line is different from a height of the second conductive line. The present disclosure also provides a method for manufacturing a semiconductor interconnect structure, including forming a photoresist layer over a hard mask layer with openings exposing a low k dielectric layer; treating a region of the low k dielectric layer to increase hydrophilicity through the openings of the hard mask layer, and removing the treated low k dielectric region to form an air gap in the air gap region. |
| US09818635B2 |
Carrier structure, packaging substrate, electronic package and fabrication method thereof
An electronic package is provided, including: a circuit structure having opposite first and second surfaces, wherein first and second circuit layers are formed on the first and second surfaces of the circuit structure, respectively, the first circuit layer having a minimum trace width less than that of the second circuit layer; a separation layer formed on the first surface of the circuit structure; a metal layer formed on the separation layer and electrically connected to the first circuit layer; an electronic element disposed on the first surface of the circuit structure and electrically connected to the metal layer; and an encapsulant formed on the circuit structure to encapsulate the electronic element. By disposing the electronic element having high I/O function on the circuit structure, the invention eliminates the need of a packaging substrate having a core layer and thus reduces the thickness of the electronic package. |
| US09818632B2 |
Tray for semiconductor devices
A tray for semiconductor devices includes a base with a positioning unit. The positioning unit includes a plurality of tiered projections which jointly define and surround an enclosed space for receiving a semiconductor device. Each tiered projection is a two-tier structure including an inclined surface portion and an upright surface portion connected to the inclined surface portion, and a semiconductor device can be received, and limited in position, between the upright surface portions. When the tray bounces due external vibrations such that the semiconductor device received in the enclosed space is moved away from the upright surface portions to the inclined surface portions, the inclined surface portions of the tiered projections can guide and adjust the semiconductor device, returning the semiconductor device to between the upright surface portions, in order for the tray to carry the semiconductor device stably. |
| US09818628B2 |
Curing apparatus and method using the same
A UV curing apparatus includes a processing chamber, a UV light source disposed above the processing chamber, a window disposed between the processing chamber and the UV light source for allowing a UV light from the UV light source passing through and entering the processing chamber, a sealing ring disposed between the processing chamber and the window for sealing the processing chamber, and a light shading kit disposed between the UV light source and the sealing ring for preventing the sealing ring from being exposed of the UV light. Therefore the sealing ring is not exposed of UV light directly, and the bonding of the rubber sealing ring would not be destroyed. |
| US09818626B2 |
Substrate processing apparatus and substrate processing method
When a substrate W is processed, a ring-shaped protective wall is located above the substrate held by the substrate holding unit and extends in a circumferential direction of the substrate. A radial position of an external periphery of a lower end of the protective wall is the same as a radial position of an internal periphery of a peripheral portion of an upper surface of the substrate held by a substrate holding unit, or is located at a radial outside. A first gap is formed between the protective wall and an upper surface of the substrate, a second gap is formed between the protective wall and a wall that defines the upper opening of the cup, and when the interior space of the cup is exhausted, a gas present above the substrate is introduced through the first gap and the second gap into the interior space of the cup. |
| US09818625B2 |
Stacked semiconductor die assemblies with thermal spacers and associated systems and methods
Stacked semiconductor die assemblies with thermal spacers and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a thermally conductive casing defining a cavity, a stack of first semiconductor dies within the cavity, and a second semiconductor die stacked relative to the stack of first dies and carried by a package substrate. The semiconductor die assembly further includes a thermal spacer disposed between the package substrate and the thermally conductive casing. The thermal spacer can include a semiconductor substrate and plurality of conductive vias extending through the semiconductor substrate and electrically coupled to the stack of first semiconductor dies, the second semiconductor die, and the package substrate. |
| US09818624B2 |
Methods and apparatus for correcting substrate deformity
Embodiments of methods and apparatus for correcting substrate deformity are provided herein. In some embodiments, a substrate flattening system includes: a first process chamber having a first substrate support and a first showerhead, wherein the first substrate support does not include a chucking mechanism; a first heater disposed in the first substrate support to heat a substrate placed on a first support surface of the first substrate support; a second heater configured to heat a process gas flowing through the first showerhead into a first processing volume of the first process chamber; and a second process chamber having a second substrate support, wherein the second substrate support is not heated, and wherein the first process chamber and the cooling chamber are both non-vacuum chambers. |
| US09818620B2 |
Manufacturing method of semiconductor device
In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components. |
| US09818615B2 |
Systems and methods for bidirectional device fabrication
Methods and systems for double-sided semiconductor device fabrication. Devices having multiple leads on each surface can be fabricated using a high-temperature-resistant handle wafer and a medium-temperature-resistant handle wafer. Dopants can be introduced on both sides shortly before a single long high-temperature diffusion step diffuses all dopants to approximately equal depths on both sides. All high-temperature processing occurs with no handle wafer or with a high-temperature handle wafer attached. Once a medium-temperature handle wafer is attached, no high-temperature processing steps occur. High temperatures can be considered to be those which can result in damage to the device in the presence of aluminum-based metallizations. |
| US09818613B1 |
Self-aligned double spacer patterning process
A method includes forming a mask layer over a target layer. A merge cut feature is formed in the mask layer. A first mandrel layer is formed over the mask layer and the merge cut feature. The first mandrel layer is patterned to form first openings therein. First spacers are formed on sidewalls of the first openings. The first openings are filled with a dielectric material to form plugs. The first mandrel layer is patterned to remove portions of the first mandrel layer interposed between adjacent first spacers. The merge cut feature is patterned using the first spacers and the plugs as a combined mask. The plugs are removed. The mask layer is patterned using the first spacers as a mask. The target layer is patterned, using the mask layer and the merge cut feature as a combined mask, to form second openings therein. |
| US09818610B2 |
Trench and hole patterning with EUV resists using dual frequency capacitively coupled plasma (CCP)
A method for treating a substrate is disclosed. The method includes forming a film stack on the substrate, the film stack comprising an underlying layer, a coating layer disposed above the underlying layer, and a patterning layer disposed above the coating layer. In the method, portions of the patterning layer are removed to form sidewalls of the patterning layer and expose portions of the coating layer, a carbon-containing layer is deposited on the exposed portions of the coating layer and non-sidewall portions of the patterning layer, and the carbon-containing layer and a portion of the coating layer are removed to expose other portions of the coating layer and the patterning layer. The method further includes repeating the deposition and removal of the carbon-coating layer at least until portions of the underlying layer are exposed. |
| US09818609B2 |
Epitaxial-silicon-wafer manufacturing method and epitaxial silicon wafer
A manufacturing method of an epitaxial silicon wafer including a silicon wafer doped with boron and having a resistivity of 100 mΩ·cm or less and an epitaxial film formed on the silicon wafer includes: growing the epitaxial film on the silicon wafer; and applying a heat treatment on the epitaxial silicon wafer at a temperature of less than 900 degrees C. |
| US09818604B2 |
Method for depositing insulating film on recessed portion having high aspect ratio
Provided is a method of depositing an insulation layer on a trench in a substrate, in which the trench having an aspect ratio of 5:1 or more is formed, including: an insulation layer deposition step of performing an adsorption step of adsorbing silicon to the substrate by injecting a silicon precursor into the inside of a chamber into which the substrate is loaded, a first purge step of removing the unreacted silicon precursor and reaction byproducts from the inside of the chamber, a reaction step of forming the adsorbed silicon as an insulation layer including silicon by supplying a first reaction source to the inside of the chamber, and a second purge step of removing the unreacted first reaction source and reaction byproducts from the inside of the chamber; and a densification step of forming a plasma atmosphere in the inside of the chamber by applying an radio frequency (RF) power and densifying the insulation layer including silicon by using the plasma atmosphere, wherein a frequency of the RF power is in a range of 400 kHz to 2 MHz. |
| US09818603B2 |
Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes providing a substrate, the substrate includes a first fin, a second fin, and an isolation region disposed between the first fin and the second fin. The second fin includes a different material than a material of the substrate. The method includes forming an oxide over the first fin, the second fin, and a top surface of the isolation region at a temperature of about 400 degrees C. or less, and post-treating the oxide at a temperature of about 600 degrees C. or less. |
| US09818602B2 |
Method of depositing a resin material on a semiconductor body with an inkjet process
A method a described which includes depositing a first component of a multicomponent system by means of an inkjet process, and depositing a second component of the multicomponent system by means of an inkjet process. |
| US09818600B2 |
Substrate processing apparatus and method of manufacturing semiconductor device
A substrate processing apparatus includes: a plasma generating unit to excite a process gas into plasma state; a process chamber where a substrate is processed using the process gas excited in plasma state; a loading port installed at a sidewall of the process chamber, wherein the substrate is passed through the loading port when the substrate is loaded into the process chamber; a substrate support supporting the substrate in the process chamber; an electrode unit installed in the substrate support and including a plurality of divided electrodes; an impedance adjusting unit electrically connected to each of the plurality of electrodes to adjust an impedance thereof; and a control unit to control the impedance of the impedance adjusting unit so as to adjust the electrical potentials of the respective electrodes of the electrode unit. The substrate processing apparatus improves the uniformity of a substrate during a substrate processing process using plasma. |
| US09818598B2 |
Substrate cleaning method and recording medium
An object of the present invention is to be able to obtain a high removing performance of particles. The substrate processing method according to the exemplary embodiment comprises a film-forming treatment solution supply step and a removing solution supply step. The film-forming treatment solution supply step comprising supplying to a substrate, a film-forming treatment solution containing an organic solvent and a fluorine-containing polymer that is soluble in the organic solvent is supplied. The removing solution supply step comprises supplying to a treatment film formed by solidification or curing of the film-forming treatment solution on the substrate, a removing solution capable of removing the treatment film. |
| US09818597B2 |
Lucent waveguide plasma light source
A lucent waveguide plasma light source has a quartz waveguide body with a central through bore. The bore has orifices at its opposite ends, opening centrally of flat, end faces of the body. Between these the body has a circular cylindrical periphery. A drawn quartz tube is inserted into the body. The tube has its one end closed and a collar which locates the tube in the bore and is fused to the faces at the orifices of the bore. The tube is evacuated and charged with excitable material and closed as a sealed void. A Faraday cage and an antenna in a bore in the body are provided for feeding microwave energy to the light source. When powered with microwaves, resonance is established in the wave guide and a plasma is established in the void, wherein Light radiates and leaves the waveguide and Faraday cage radially of the periphery. |
| US09818596B2 |
Arc lamp and substrate heating apparatus having the arc lamp
An arc lamp includes an arc tube configured to receive a reaction gas therein, and an anode and a cathode disposed opposite one another within the arc tube and configured to generate an electrical arc. The anode includes an anode head portion extending inwardly from an end portion of the arc tube, and an anode tip portion bonded to the anode head portion and comprising a trench extending in a top surface along a peripheral region of the anode tip portion. |
| US09818595B2 |
Systems and methods for ion isolation using a dual waveform
A mass spectrometer includes a radio frequency ion trap; and a controller. The controller is configured to cause an ion population to be injected into the radio frequency ion trap; supply a first isolation waveform to the radio frequency ion trap for a first duration, and supply a second isolation waveform to the radio frequency ion trap for a second duration. The first isolation waveform has at least a first wide notch at a first mass-to-charge ratio, and the second isolation waveform has at least a first narrow notch at the first mass-to-charge ratio. The first and second isolation waveforms are effective to isolate one or more precursor ions from the ion population. |
| US09818590B2 |
Data quality after demultiplexing of overlapped acquisition windows in tandem mass spectrometry
Systems and methods are provided for identifying missing product ions after demultiplexing product ion spectra produced by overlapping precursor ion transmission windows in sequential windowed acquisition tandem mass spectrometry. Overlapping sequential windowed acquisition is performed on a sample. A first precursor mass window and the corresponding first product ion spectrum are selected from a plurality of overlapping stepped precursor mass windows and their corresponding product ion spectra. A product ion spectrum is demultiplexed for each overlapped portion of the first precursor mass window producing two or more demultiplexed first product ion spectra for the first precursor mass window. The two or more demultiplexed first product ion spectra are added together producing a reconstructed summed demultiplexed first product ion spectrum. Missing product ions are identified in the summed demultiplexed first product ion spectrum by comparing the summed demultiplexed first product ion spectrum and the first product ion spectrum. |
| US09818589B2 |
Time shift for improved ion mobility spectrometry or separation digitisation
A method of analyzing ions is disclosed comprising: (i) separating ions according to a physico-chemical property in a separator; (ii) transmitting ions which emerge from the separator through a transfer device with a first transit time t1, energizing a pusher electrode or orthogonal acceleration electrode and obtaining first data; (iii) transmitting ions which subsequently emerge from the separator through the transfer device with a second greater transit time t2, energizing the pusher electrode or orthogonal acceleration electrode and obtaining second data; and (iv) repeating steps (ii) and (iii) one or more times. The pusher electrode or orthogonal acceleration electrode is energized with a period t3, wherein t2−t1 is arranged to equal t3/2. The first and second data are combined to form a composite data set. |
| US09818588B2 |
Method and arrangement for the control of measuring systems, corresponding computer program and corresponding computer-readable storage medium
Disclosed herein is a method and an arrangement for the control of measuring systems such as a mass spectrometer or nuclear magnetic resonance (NMR) instrument, the control being based on an online data analysis of the current measurements. Depending on the measurement experiment, the combined result of the data analysis can have either a direct influence on the next measurement or result in a dynamically organized sequence of measurements. The measuring systems may be controlled by establishing a database that comprises information on the objects to be measured, the measurement data which can be detected during the measurement experiments using the measuring systems, and information regarding the relationships between or among items of the measurement data. |
| US09818577B2 |
Multi mode system with a dispersion X-ray detector
A method for evaluating a specimen, the method can include positioning an energy dispersive X-ray (EDX) detector at a first position; scanning a flat surface of the specimen by a charged particle beam that exits from a charged particle beam optics tip and propagates through an aperture of an EDX detector tip; detecting, by the EDX detector, x-ray photons emitted from the flat surface as a result of the scanning of the flat surface with the charged particle beam; after a completion of the scanning of the flat surface, positioning the EDX detector at a second position in which a distance between the EDX detector tip and a plane of the flat surface exceeds a distance between the plane of the flat surface and the charged particle beam optics tip; and wherein a projection of the EDX detector on the plane of the flat surface virtually falls on the flat surface when the EDX detector is positioned at the first position and when the EDX detector is positioned at the second position. |
| US09818573B2 |
Particle beam transport apparatus
The present invention is related to an apparatus for transporting a charged particle beam. The apparatus may include means for scanning the charged particle beam on a target, a dipole magnet arranged upstream of the means for scanning, at least three quadrupole lenses arranged between the dipole magnet and the means for scanning and means for adjusting the field strength of said at least three quadrupole lenses in function of the scanning angle of the charged particle beam. The apparatus can be made at least single achromatic. |
| US09818566B2 |
Frictionless switching device for opening and closing an electrical line, with improved operating accuracy
A switching device for opening and closing an electrical line, including: two fixed contact terminals separated from one another, an operating member, comprising a contact piece, at least one flexible strip comprising at least one end part attached to a fixed support, the flexible strip or strips being adapted to exert a return force on the contact piece to return it from its closed position to its open position in the absence of a motive force on the operating member, the operating member comprising two electrically insulating pusher arms, spaced apart from one another and each attached to an end part of the contact piece; each flexible strip comprising two other end parts, each attached to one of the two push arms or to a part of the operating member that is itself attached to, or forms an integral part of, one of the pusher arms. |
| US09818565B2 |
Human-machine interface for a self-supplied relay
A design of a protection relay, and interface with an operator of a protection relay, are disclosed. The protection relay can include a base relay for measurement of line current and for generation of a trip signal, a base Human Machine Interface (HMI) for user specifying of a base setting of an operating parameter of the protection relay, and an optionally active Human Machine Interface (HMI) unit having a processing unit to manage plural activities with controlled power consumption. |
| US09818562B2 |
Switch
Provided is a reliable switch having a contact surface that is prevented from being roughened. To solve the problem, there is provided a switch including a plurality of switching units 2 and 3 each including a fixed electrode and a movable electrode that is disposed to be opposed to the fixed electrode and is closed or opened with respect to the fixed electrode, the switch being characterized in that the switching units 2 and 3 each make or break a current to be applied to the switch, the switching units 2 and 3 are electrically connected in series to each other, and the switching units 2 and 3 are each configured such that a first switching unit 3 is first closed, and then a second switching unit 2 is closed. |
| US09818560B2 |
Molded-case circuit breaker
Provided is a molded case circuit breaker including a front space, a rear space divided from the front space, a fixed contact unit provided on one side of the front space and in electric contact with one of a power supply and a load, a movable contact unit installed in the front space to be movable and in contact with the fixed contact unit, a switching device installed in the rear space and operating to allow the movable contact unit to be in selective contact with the fixed contact unit, an operation device installed in the front space and the rear space and transferring the movable contact unit according to operation of the switching device, an arc extinguishment chamber installed on the one side of the front space and extinguishing an arc induced while the fixed contact unit is being separated from the movable contact unit, and a barrier preventing backward movement of the arc from at least one position of a moving way of the movable contact unit, the position separate from the fixed contact unit. |
| US09818558B2 |
Snap action switch
An actuator is allowed to move toward +A direction and toward −A direction. A movable contact engages with the actuator. A fixed contact touch the movable contact with electrical connection when the movable contact is located at an ON position, and are apart from the movable contact with electrical isolation when the movable contact is located at positions other than the ON position. An arc prevention mechanism prevents arc between the movable contact and the fixed contact. |
| US09818556B2 |
Waterproof structure for button of electronic product and waterproof mobile phone using the same
A waterproof structure for a button includes a casing, a button, and an elastic member. The elastic member is arranged on the casing and is contacted by the elastic member. The elastic member is integrated with the casing. The elastic member includes a tubular structure arranging an arc-shaped structure protruding towards interior of the tubular structure. The elastic wall allows a range of elastic travel to activate the switch under the button. The elastic member is a built-in component. |
| US09818547B1 |
Multilayer ceramic electronic component and board having the same
A multilayer ceramic electronic component includes a ceramic body including a plurality of dielectric layers stacked on each other and having first and second surfaces opposing each other in a first direction, third and fourth surfaces opposing each other in a second direction, parallel to a stacking direction and connected to the first and second surfaces, and fifth and sixth surfaces opposing each other in a third direction and connected to the first to fourth surfaces, first and second external electrodes disposed on the first and second surfaces of the ceramic body, respectively, first and second conductive thin films disposed on at least one of the third and fourth surfaces, connected to the first and second external electrodes, respectively, and having a thickness lower than that of the first and second external electrodes, and first and second solder preventing films disposed on the first and second external electrodes, respectively. |
| US09818543B2 |
Electronic component, method of producing the same, and circuit substrate
An electronic component includes: a chip having first and second end surfaces oriented in a direction of a first axis, first and second main surfaces oriented in a direction of a second axis orthogonal to the first axis, first and second side surfaces oriented in a direction of a third axis orthogonal to the first and second axes, and first and second external electrodes respectively covering the first and second end surfaces and each extending to the first and second main surfaces and side surfaces; a covering portion covering the chip from the first main surface toward the second main surface; and exposed portions provided to the second main surface, including regions where the first and second external electrodes are exposed without being covered with the covering portion, and being pushed out toward the first main surface along ridges connecting the first and second end surfaces and side surfaces. |
| US09818537B2 |
Capacitor
A capacitor includes a dielectric layer, a first conductive layer, a second conductive layer, first inner electrodes, second inner electrodes, a first external power electrode layer, a second external power electrode layer, a first outer electrode, and a second outer electrode. The first and second inner electrodes and first and second second outer electrodes are a conductive material. The dielectric layer has through-holes connecting with a first main surface and a second main surface. The first inner electrodes are in a first set of the through-holes and connected to the first conductive layer. The second inner electrodes are in a second set of the through-holes and connected to the second conductive layer. The first outer electrode is on the first external power electrode layer and some side-faces of the dielectric layer. The second outer electrode is on the second external power electrode layer and some side-faces of the dielectric layer. |
| US09818535B2 |
Systems and methods for locally reducing oxides
In the systems and methods for synthesizing a thin film with desired properties (e.g. magnetic, conductivity, photocatalyst, etc.), a metal oxide film may be deposited on a substrate. The metal oxide film may be achieved utilizing any suitable method. A reducing agent may be deposited before, after or both before and after the metal oxide layer. Oxygen may be removed or liberated from the deposited metal oxide film by low temperature local or global annealing. As a result of the annealing to remove oxygen, one or more portions of the metal oxide may be transformed into materials with desired properties. As a nonlimiting example, a metal oxide film may be treated to provide a magnetic multilayer film that is suitable for bit patterned media. |
| US09818524B2 |
Coupling element for differential hybrid coupler
A coupling element is disclosed, comprising four coils that are arranged such that each one of the coils extends both in a first layer and a second layer. The first layer and the second layer are stacked with respect to each other and separated by an intermediate dielectric layer. The layout of each layer is configured to provide a transformer coupling between a first one and a third one of the coils, and between a second one and a fourth one of the coils. Further, the first coil and the second coil, and the third coil and the fourth coil, respectively, are routed so as to allow a differential signaling. A semiconductor device and a differential hybrid coupler comprising the coupling element are also disclosed. |
| US09818520B2 |
Rare-earth nanocomposite magnet
The invention provides a nanocomposite magnet, which has achieved high coercive force and high residual magnetization. The magnet is a non-ferromagnetic phase that is intercalated between a hard magnetic phase with a rare-earth magnet composition and a soft magnetic phase, wherein the non-ferromagnetic phase reacts with neither the hard nor soft magnetic phase. A hard magnetic phase contains Nd2Fe14B, a soft magnetic phase contains Fe or Fe2Co, and a non-ferromagnetic phase contains Ta. The thickness of the non-ferromagnetic phase containing Ta is 5 nm or less, and the thickness of the soft magnetic phase containing Fe or Fe2Co is 20 nm or less. Nd, or Pr, or an alloy of Nd and any one of Cu, Ag, Al, Ga, and Pr, or an alloy of Pr and any one of Cu, Ag, Al, and Ga is diffused into a grain boundary phase of the hard magnetic phase of Nd2Fe14B. |
| US09818519B2 |
Soft magnetic mixed powder
Provided is soft magnetic powder used to manufacture a dust core having good mechanical strength and superior formability while iron loss is reduced. The soft magnetic powder for dust cores according to the invention is soft magnetic mixed powder that includes pure iron powder and soft magnetic iron-base alloy powder, wherein the proportion of the soft magnetic iron-base alloy powder in the mixture is 5 to 60 mass %, the ratio of the modes of the particle size distributions of the soft magnetic iron-base alloy powder and the pure iron powder ((the mode of the particle size distribution of the soft magnetic iron-base alloy powder)/(the mode of the particle size distribution of the pure iron powder)) is 0.9 or more and less than 5, and the ratio Rover/Runder is 1.2 or more, where Rover is the mass proportion of soft magnetic iron-base alloy powder in mixed powder with a particle size of D50 or more based on the mass fraction, and Runder is the mass proportion of soft magnetic iron-base alloy powder in mixed powder with a particle size of less than D50 based on the mass fraction. |
| US09818518B2 |
Composite magnetic sealing material
Disclosed herein is a composite magnetic sealing material includes a resin material and a filler blended in the resin material in a blended ratio of 30 vol. % or more to 85 vol. % or less. The filler includes a magnetic filler containing Fe and 32 wt. % or more and 39 wt. % or less of a metal material contained mainly of Ni, thereby a thermal expansion coefficient of the composite magnetic sealing material is 15 ppm/° C. or less. |
| US09818513B2 |
RFeB-based magnet and method for producing RFeB-based magnet
Provided is a combined type RFeB-based magnet, including: a first unit magnet; a second unit magnet; and an interface material that bonds the first unit magnet and the second unit magnet, in which the first unit magnet and the second unit magnet are RFeB-based magnets containing a light rare earth element RL that is at least one element selected from the group consisting of Nd and Pr, Fe, and B, in which the interface material contains at least one compound selected from the group consisting of a carbide, a hydroxide, and an oxide of the light rare earth element RL, and in which an amount of a heavy rare earth element RH that is at least one element selected from the group consisting of Dy, Tb and Ho in the second unit magnet is more than that in the first unit magnet. |
| US09818512B2 |
Thermally sprayed thin film resistor and method of making
A thin film resistor formed using thermal spraying techniques in the manufacturing process is provided. A thin film resistor and method of manufacturing a thin film resistor are disclosed including a thermally sprayed resistive element. An alloy bond layer may be applied to a substrate and a thermally sprayed resistive layer is applied to the alloy bond layer by a thermal spraying process to form a thermally sprayed resistive element. The alloy bond layer and the thermally sprayed resistive layer may have the same chemical composition. |
| US09818511B2 |
Electronic component and method for manufacturing the same
In an electronic component, an outer electrode includes a sintered layer including a sintered metal, a reinforcement layer not containing Sn but including Cu or Ni, an insulation layer, and a Sn-containing layer. The sintered layer extends from each end surface of an element assembly onto at least one main surface thereof to cover each end surface of the element assembly. The reinforcement layer extends on the sintered layer and covers the sintered layer entirely. The insulation layer is directly provided on the reinforcement layer at each end surface of the element assembly, extends in a direction perpendicular or substantially perpendicular to a side surface of the element assembly, and defines a portion of a surface of the outer electrode. The Sn-containing layer covers the reinforcement layer except for a portion of the reinforcement layer that is covered by the insulation layer, and defines another portion of the surface of the outer electrode. |
| US09818506B2 |
Flexible low impedance power bus
Systems, methods, and apparatus are disclosed for implementing power buses. Apparatus may include a first plurality of connectors, a second plurality of connectors, and a first plurality of conductive sheets configured to electrically couple the first plurality of connectors with the second plurality of connectors. The first plurality of conductive sheets may include a first conductive sheet and a second conductive sheet. The first conductive sheet may conduct a first current in a first direction. The second conductive sheet may provide a return path for the first current in a second direction. The apparatus may also include a second plurality of conductive sheets. The second plurality of conductive sheets may include a third conductive sheet and a fourth conductive sheet. The third conductive sheet may conduct a second current in the first direction. The fourth conductive sheet may provide a return path for the second current in the second direction. |
| US09818501B2 |
Multi-coated anodized wire and method of making same
An insulated electric conductor having a copper core, a layer of aluminum formed on the copper core, and a second layer of aluminum in the form of high-purity aluminum is disclosed. The copper core may be a solid core or may be formed from a plurality of copper strands. The layer of aluminum formed over the copper core is at least partially anodized to form an aluminum oxide dielectric layer. The layer of high-purity aluminum may be formed by evaporation deposition, sputter deposition, or co-extrusion. Once the layer of high-purity aluminum is formed, it is anodized. More than two layers of aluminum may be formed over the copper core. |
| US09818495B2 |
Containment vessel and nuclear power plant
A containment vessel has an inner shell covering a reactor pressure vessel and an outer shell forming an outer well which is a gas-tight space covering the horizontal outer periphery of the inner shell. The inner shell has a first cylindrical side wall surrounding the horizontal periphery of the reactor pressure vessel, a containment vessel head which covers the upper part of the reactor pressure vessel, and a first top slab connecting in a gas-tight manner the periphery of the containment vessel head and the upper end of the first cylindrical side wall. The outer shell has a second cylindrical side wall surrounding the outer periphery of the first cylindrical side wall, and also has a second to slab connecting in a gas-tight manner the vicinity of the upper end of the second cylindrical side wall and the first cylindrical side wall. |
| US09818491B2 |
Memory device and operating method thereof
A memory device includes a plurality of memory cells for storing data; a plurality of memory cells for storing data; a non-volatile memory unit; a test control unit suitable for detecting weak memory cells among the plurality of memory cells; a program control unit suitable for controlling addresses of the detected weak memory cells to be programmed in the non-volatile memory unit; and a refresh control unit suitable for refreshing the addresses stored in the non-volatile memory unit more frequently than other memory cells. |
| US09818490B2 |
Semiconductor device
A semiconductor device includes a word line coupled to a mask ROM memory cell, a bit line pair coupled to the memory cell, a differential sense amplifier for amplifying the potential difference of the bit line pair, and a logic circuit for detecting whether the logic states of the bit line pair match or not. In this way, when there is a failure in the memory cell, it is possible to prevent the semiconductor device from passing the test as a result of the determination that the actual value is the same as the expected value in the test even if there is no potential difference in the bit line pair. |
| US09818489B2 |
Semiconductor memory device
A semiconductor memory device according to the present invention includes a first memory cell, a second memory cell, a dummy transistor, and a voltage control circuit. The first memory cell has a first transistor that is coupled to a first word line, a first source line, and a bit line. The second memory cell has a second transistor that is coupled to a second word line, a second source line, and the bit line. The dummy transistor has the same structure as the first transistor and is coupled to a dummy word line, a dummy source line, and a dummy bit line. When a predetermined voltage for writing data into the first memory cell is to be applied to the first word line, the voltage control circuit couples the dummy bit line to the second source line and applies the predetermined voltage to the first dummy word line. |
| US09818488B2 |
Read threshold voltage adaptation using bit error rates based on decoded data
A read threshold voltage for a memory is adjusted based on a bit error rate based on decoded data for a plurality of read threshold voltages. The read threshold voltage can be adjusted by reading the memory at a current read threshold voltage to obtain a read value; applying a hard decision decoder to the read value; determining if the hard decision decoder converges for the read value to a converged word; storing bits corresponding to the converged word as reference bits and, if the hard decision decoder converges, (i) computing a bit error rate for the current read threshold voltage based on the reference bits; (ii) adjusting the current read reference voltage to a new read threshold voltage; and (iii) reading the memory at the new read threshold voltage to obtain a new read value, until a threshold is satisfied; and once the threshold is satisfied, selecting the read threshold voltage based on the bit error rates. |
| US09818482B2 |
Volatile memory, memory module including the same, and method for operating the memory module
A memory module includes an emergency power supplier, a plurality of ranks each including one or more volatile memories, a non-volatile memory, and a controller suitable for backing up data of the ranks into the non-volatile memory by using the emergency power supplier during a power failure, wherein the ranks are sequentially backed up, and while one rank is backed up among the ranks, the other ranks are controlled in a self-refresh mode. |
| US09818479B2 |
Switchable macroscopic quantum state devices and methods for their operation
Discloses is an electronic device and a method for its operation. The device has first and second electrodes and an active material. The active material has selectable and stable first and second macroscopic quantum states, such as charge density wave ordered states, having respectively first and second values of electrical resistivity ρ1 and ρ2 at the same temperature. ρ1 is at least 2 times ρ2. The method includes the step of switching between the first and second macroscopic quantum states by injection of current via the electrodes. |
| US09818478B2 |
Programmable resistive device and memory using diode as selector
Building programmable resistive devices in contact holes at the crossover of a plurality of conductor lines in more than two vertical layers is disclosed. There are plurality of first conductor lines and another plurality of second conductor lines that can be substantially perpendicular to each other, though in two different vertical layers. A diode and/or a programmable resistive element can be fabricated in the contact hole between the first and second conductor lines. The programmable resistive element can be coupled to another programmable resistive device or shared between two programmable devices whose diodes conducting currents in opposite directions and/or coupled to a common conductor line. The programmable resistive memory can be configured to be programmable by applying voltages to conduct current flowing through the programmable resistive element to change its resistance for a different logic state. |
| US09818475B2 |
Method of programming nonvolatile memory device
In method of programming a nonvolatile memory device including a plurality of multi-level cells that store multi-bit data according to example embodiments, a least significant bit (LSB) program operation is performed to program LSBs of the multi-bit data in the plurality of multi-level cells. A most significant bit (MSB) program operation is performed to program MSBs of the multi-bit data in the plurality of multi-level cells. To perform the MSB program, an MSB pre-program operation is performed on first multi-level cells, from among the plurality of multi-level cells, that are to be programmed to a highest target program state among a plurality of target program states, and an MSB main program operation is performed to program the plurality of multi-level cells to the plurality of target program states corresponding to the multi-bit data. |
| US09818473B2 |
Semiconductor device including stacked circuits
This invention provides a semiconductor device with high speed operation and reduced size. A circuit includes a circuit including a memory circuit and a circuit including a logic circuit; thus, the circuit functions as a memory device having a function of storing data and a function of performing logic operation. The circuit can output, in addition to data stored in the circuit, data corresponding to a result of logic operation performed using data stored in the circuit as an input signal. The circuit can directly obtain a result of logic operation from the circuit, and thus, the frequency of input/output of a signal performed between the circuit and the circuit can be reduced. |
| US09818465B2 |
Self-referenced memory device and method using spin-orbit torque for reduced size
A self-referenced MRAM cell comprises a first portion of a magnetic tunnel junction including a storage layer; a second portion of the magnetic tunnel junction portion including a tunnel barrier layer, a sense layer and a seed layer; the seed layer comprising a material having high spin-orbit coupling such that passing a sense current along the plane of the sense layer and/or seed layer exerts a spin-orbit torque adapted for switching a sense magnetization of the sense layer. A memory device comprising a plurality of the MRAM cells and a method for operating the memory device are also disclosed. |
| US09818461B1 |
Semiconductor memory device and operating method thereof
A semiconductor memory device includes a memory cell array; a memory cell array; a data receiver suitable for receiving a plurality of data sequentially inputted from an exterior, the plurality of data including previous data and current data; a data driving controller suitable for detecting the number of toggling values of the current data in comparison with the previous data and generating first to fourth driving control signals based on the number of toggling values; and a driver suitable for receiving input data through the data receiver and driving the input data or inverted input data to data transfer lines in response to the first to fourth driving control signals. |
| US09818451B1 |
Frame selection of video data
A system and method for selecting portions of video data from preview video data is provided. The system may extract image features from the preview video data and discard video frames associated with poor image quality based on the image features. The system may determine similarity scores between individual video frames and corresponding transition costs and may identify transition points in the preview video data based on the similarity scores and/or transition costs. The system may select portions of the video data for further processing based on the transition points and the image features. By selecting portions of the video data, the system may reduce a bandwidth consumption, processing burden and/or latency associated with uploading the video data or performing further processing. |
| US09818450B2 |
System and method of subtitling by dividing script text into two languages
A method of subtitling comprises the steps of obtaining an audio file of dialogue in a first language, obtaining a file of script text corresponding to the dialogue in the audio file in the same first language, determining a timing correspondence between dialogue in the audio file and words in the script text, detecting at least a first pause during performance of the dialogue in the audio file, defining a respective breakable point in the script text corresponding to the or each detected pause, and dividing the script text out into a sequence of subtitle lines of text responsive to the location of one or more of the defined breakable points. |
| US09818447B1 |
Measuring transition shifts due to laser power variation in a heat-assisted magnetic recording device
A method comprises writing a waveform on a magnetic recording medium using a heat-assisted magnetic recording apparatus which includes a laser. The method also comprises reading back the waveform from the medium, and detecting one or more transition shifts in the readback waveform indicative of a mode hop of the laser. The method further comprises measuring a metric of the one or more transition shifts. |
| US09818445B2 |
Magnetic storage device readers
Implementations described and claimed herein includes a storage device comprising a plurality of readers, including a first subset of readers configured to read a first subset of tracks and a second subset of readers configured to read a second subset of tracks, the first subset of tracks being wider than the second subset of tracks. In another implementation, the readers in the first subset of readers are wider than the readers in the second subset of readers. The wider readers may be configured to recover servo information and the narrow readers may be configured to recover data information. The storage devices may include two-dimensional magnetic recording, conventional perpendicular magnetic recording, shingled magnetic recording, multi-sensor magnetic recording, and interlaced magnetic recording. |
| US09818443B2 |
Magnetic recording medium having specific underlayer features
The magnetic recording medium has a nonmagnetic layer satisfying: the ratio of the total area accounted for by voids observed to the area of the observed region falls within a range of 13.0% to 25.0% in a sectional image taken by SEM; R+σr is 58.0 nm or less and R−σr is 21.0 nm or greater when denoting the average value of the diameters of corresponding circles for voids observed in the sectional image as R, denoting the standard deviation of the diameters of the corresponding circles as σr; N+σn is 185 voids/μm2 or less and N−σn is 120 voids/μm2 or greater when denoting the average number of voids observed per μm2 unit area of the observed region in the sectional image as N, denoting the standard deviation of this number as σn; and the thickness of the nonmagnetic layer is 0.20 μm or greater. |
| US09818442B2 |
Magnetic media having improved magnetic grain size distribution and intergranular segregation
A method and system provide a magnetic recording media usable in a magnetic storage device. The magnetic recording media includes a substrate, at least one intermediate layer and a magnetic recording stack for storing magnetic data. The intermediate layer(s) include a majority phase having a first diffusion constant and a secondary phase having a second diffusion constant greater than the first diffusion constant. The magnetic recording stack residing on the intermediate layer such that the at least one intermediate layer is between the substrate and the magnetic recording stack. |
| US09818440B1 |
Heat assisted magnetic recording system having at least three possible magnetic configurations per physical bit
According to one embodiment, a heat assisted magnetic recording system includes a magnetic recording medium comprising a magnetic recording layer, where the magnetic recording layer includes a plurality of physical bits. Each physical bit has a perpendicular magnetic anisotropy and one of at least three magnetic states, where the at least three magnetic states include a +1 magnetic state, a 0 magnetic state, and a −1 magnetic state. |
| US09818439B1 |
Determining gamma of a read/write head based on active gain control and test signal amplitude measurements
A change in servo active gain control values is determined from a beginning of a writing of a test region of a recording medium to an end of the writing of the test region. The servo active gain control values are read from servo marks by a read transducer of a read/write head during the writing. After writing of the test region, the test region is read by the read transducer to determine a change in recorded amplitude from the beginning of the writing to the end of the writing. A gamma value of the read/write head is determined based on the change in servo active gain control values and the change in recorded amplitude. |
| US09818438B1 |
Skew compensation in a patterned medium
A system may compensate for skew in a patterned medium, such as but not limited to a self-assembling bit patterned medium, with a write pole separated from a data storage medium by an air bearing. The write pole being connected to a controller. The data storage medium can have a plurality of magnetic islands arranged in data tracks with each data track having a track center. The write pole may be selectively shifted from the track center by the controller to compensate for a skewed write pole configuration. |
| US09818432B2 |
Method and computer system for performing audio search on a social networking platform
Methods and computer systems for audio search on a social networking platform are disclosed. The method includes: while running a social networking application, receiving a first audio input from a user of the computer system, the first audio input including one or more search keywords; generating a first audio confusion network from the first audio input; determining whether the first audio confusion network matches at least one of one or more second audio confusion networks, wherein a respective second audio confusion network was generated from a corresponding second audio input associated with a chat session of which the user is a participant; and identifying a second audio input corresponding to the at least one second audio confusion network that matches the first audio confusion network, wherein the identified second audio input includes the one or more search keywords that are included in the first audio input. |
| US09818429B2 |
Apparatus, medium and method to encode and decode high frequency signal
A method and apparatus to encoding or decoding an audio signal is provided. In the method and apparatus, a noise-floor level to use in encoding or decoding a high frequency signal is updated according to the degree of a voiced or unvoiced sound included in the signal. |
| US09818427B2 |
Automatic self-utterance removal from multimedia files
Embodiments of a system and method for removing speech by a user from audio frames are generally described herein. A method may include receiving a plurality of frames of audio data, extracting a set of frames of the plurality of frames, the set of frames including speech by a user with a set of remaining frames in the plurality of frames not in the set of frames, suppressing the speech by the user from the set of frames using a trained model to create a speech-suppressed set of frames, and recompiling the plurality of frames using the speech-suppressed set of frames and the set of remaining frames. |
| US09818426B2 |
Echo canceller
Disclosed is an echo canceller 10 including: mixers 11A and 11B each to mix output signals outputted by speakers 7FL and 7FR with an instructed mixing ratio, and to generate reference signals for microphones 8A and 8B; an adaptive filter 12 to generate two pseudo echo signals from the two reference signals generated by the mixers 11A and 11B; subtractors 13A and 13B to subtract the two pseudo echo signals from input signals from the microphones 8A and 8B, and to generate two echo eliminated signals; residual echo detectors 14A and 14B to detect residual amounts of echo remaining in the echo eliminated signals obtained from the microphones 8A and 8B; and a mixing ratio changer 15 to instruct a change of the mixing ratios of the mixers 11A and 11B in accordance with the residual amounts of echo. |
| US09818425B1 |
Parallel output paths for acoustic echo cancellation
An echo cancellation system that generates multiple output paths, enabling Automatic Speech Recognition (ASR) processing in parallel with voice communication. For single direction AEC (e.g., ASR processing), the system prioritizes speech from a single user and ignores other speech by selecting a single directional output from a plurality of directional outputs as a first output path. For multi-directional AEC (e.g., voice communication), the system includes all speech by combining the plurality of directional outputs as a second output path. The system may use a weighted sum technique, such that each directional output is represented in the combined output based on a corresponding signal metric, or an equal weighting technique, such that a first group of directional outputs having a higher signal metric may be equally weighted using a first weight while a second group of directional outputs having a lower signal metric may be equally weighted using a second weight. |
| US09818423B2 |
Method of improving sound quality and headset thereof
Disclosed is a headset including at least one in-ear microphone; at least one out-ear microphone; a control unit including an in-ear signal processing module for extracting low frequency components from a signal sensed through the in-ear microphone, an out-ear signal processing module for extracting high frequency components from a signal sensed through the out-ear microphone, and a mixing module for mixing the extracted low frequency components and high frequency components and outputting the mixed signal; and a communication unit for transmitting the signal output from the mixing module of the control unit to an external device, and sound quality can be improved by removing noises in a voice signal of a user transferred through the headset and creating a signal close to the voice of the user. |
| US09818416B1 |
System and method for identifying and processing audio signals
A method for phoneme identification. The method includes receiving an audio signal from a speaker, performing initial processing comprising filtering the audio signal to remove audio features, the initial processing resulting in a modified audio signal, transmitting the modified audio signal to a phoneme identification method and a phoneme replacement method to further process the modified audio signal, and transmitting the modified audio signal to a speaker. Also, a system for identifying and processing audio signals. The system includes at least one speaker, at least one microphone, and at least one processor, wherein the processor processes audio signals received using a method for phoneme replacement. |
| US09818413B2 |
Method for compressing a higher order ambisonics signal, method for decompressing (HOA) a compressed HOA signal, apparatus for compressing a HOA signal, and apparatus for decompressing a compressed HOA signal
A method for compressing a HOA signal being an input HOA representation with input time frames (C(k)) of HOA coefficient sequences comprises spatial HOA encoding of the input time frames and subsequent perceptual encoding and source encoding. Each input time frame is decomposed (802) into a frame of predominant sound signals (XPS(k−1)) and a frame of an ambient HOA component ({tilde over (C)}AMB (k−1)). The ambient HOA component ({tilde over (C)}AMB (k−1)) comprises, in a layered mode, first HOA coefficient sequences of the input HOA representation (cn(k−1)) in lower positions and second HOA coefficient sequences (cAMB,n(k−1)) in remaining higher positions. The second HOA coefficient sequences are part of an HOA representation of a residual between the input HOA representation and the HOA representation of the predominant sound signals. |
| US09818405B2 |
Dialog management system
A dialog management system functioned by a special search algorithm, the search algorithm comprises the rule of recognizing the phrase directly, converting the words into terms, filtering the adjacency terms and recognizing, the dynamic field the Dialog Management System comprises: an application conducting a predefined operation between a user and a terminal; an input unit receiving an utterance from the user; recognition unit recognizing and converting the received utterance from sound into sequential words in a written text; processor; wherein the processor comprises dynamic field recognition unit; conversion unit, filter unit, a matching unit; a database storing a dictionary that includes the all of the definition of words and the word-term list. |
| US09818404B2 |
Environmental noise detection for dialog systems
Embodiments are directed to receiving a speech signal representative of audible speech, processing the speech signal to interpret the speech signal by a dialog system implemented at least partially in hardware, determining, by the dialog system, that the speech signal cannot be correctly interpreted, receiving a noise signal representative of audible background noise, identifying a noise level from the noise signal, determining, by the dialog system, that the noise level is too high for the speech signal to be correctly interpreted, and providing, by the dialog system, a message indicating that the noise level is too high for the speech signal to be correctly interpreted. |
| US09818400B2 |
Method and apparatus for discovering trending terms in speech requests
Systems and processes are disclosed for discovering trending terms in automatic speech recognition. Candidate terms (e.g., words, phrases, etc.) not yet found in a speech recognizer vocabulary or having low language model probability can be identified based on trending usage in a variety of electronic data sources (e.g., social network feeds, news sources, search queries, etc.). When candidate terms are identified, archives of live or recent speech traffic can be searched to determine whether users are uttering the candidate terms in dictation or speech requests. Such searching can be done using open vocabulary spoken term detection to find phonetic matches in the audio archives. As the candidate terms are found in the speech traffic, notifications can be generated that identify the candidate terms, provide relevant usage statistics, identify the context in which the terms are used, and the like. |
| US09818398B2 |
Detecting potential significant errors in speech recognition results
In some embodiments, recognition results produced by a speech processing system (which may include two or more recognition results, including a top recognition result and one or more alternative recognition results) based on an analysis of a speech input, are evaluated for indications of potential errors. In some embodiments, the indications of potential errors may include discrepancies between recognition results that are meaningful for a domain, such as medically-meaningful discrepancies. The evaluation of the recognition results may be carried out using any suitable criteria, including one or more criteria that differ from criteria used by an ASR system in determining the top recognition result and the alternative recognition results from the speech input. In some embodiments, a recognition result may additionally or alternatively be processed to determine whether the recognition result includes a word or phrase that is unlikely to appear in a domain to which speech input relates. |
| US09818397B2 |
Method and system for translating speech
An electronic communication device (104) receives a first set of digital audio signals via radio frequency signaling, translates the first set of digital audio signals from speech of a first language (e.g. English) into translated speech of a second language (e.g., French), and emits the translated speech of the second language via a loudspeaker (226). The electronic communication device (104) also receives a second set of digital audio signals, which it translates from speech of the second language into translated speech of the first language. The electronic communication device (104) transmits, via radio frequency signaling, a third set of digital audio signals. The third set of digital audio signals represents the translated speech of the first language. |
| US09818395B2 |
Acoustic diaphragm
An acoustic diaphragm which has excellent Young's modulus and internal loss (tan δ) values is provided. The acoustic diaphragm according to the present invention is made from papermaking material substantially solely including cellulose nanofibers. In one embodiment, the cellulose nanofibers are unoxidized cellulose nanofibers. |
| US09818392B2 |
Suction unit
A suction unit includes a suction motor for generating air flow; a noise reduction unit which surrounds the suction motor and acts as a resonator in order to reduce noise generated during the operation of the suction motor; and a motor chamber which surrounds the noise reduction unit. The noise reduction unit includes an air flow path which provide a path of air flowing by the suction motor, a noise reduction chamber for eliminating the noise of at least one frequency band, and at least one communicating hole which causes sound wave of the noise to enter the noise reduction chamber. The air flow path is divided from the noise reduction chamber and thus the sound wave of the noise enters the noise reduction chamber through the communicating hole during a process in which air passes through the air flow path. |
| US09818390B1 |
Memory device, waveform data editing method
Provided are a memory device and waveform data editing method and editing program thereof. Waveform data obtained by sampling a musical sound is acquired, and a difference between a harmonic frequency of an nth harmonic of the waveform data and a resonance sound frequency of the nth harmonic sound of a resonance sound generation circuit is calculated, and if the difference is 1 Hz or more, a waveform of a frequency component of 20 Hz centered on a central of the frequency of the nth harmonic of a frequency spectrum is clipped. The difference calculated in regard to the clipped waveform is reduced. The waveform and the clipped original waveform are combined to edit the waveform data. Thus, in the waveform data, the difference between the harmonic frequencies of the resonance characteristic is eliminated, and resonance is facilitated and occurrence of beat of the sound is prevented. |
| US09818386B2 |
Interactive digital music recorder and player
A digital multi-media device provides features for a user unskilled in musical arts or sound handling techniques that provides automatic musical score composition in accordance with contained composition instructions. Stored sound samples and interfaces for obtaining external signals provide signals for merger with visual and sound presentations to obtain altered presentations either time shifted or in real time. In this fashion the user can create simulated radio stations for playback of prearranged and composed audio material. Further, the automatically composed musical score may be mixed with synthesized, digitized signals from the stored sound samples and external signals obtained through the device interfaces. |
| US09818383B2 |
Methods and systems for non-destructive analysis of objects and production of replica objects
In one aspect, the present disclosure provides a method including rotating a rotatable surface with an object positioned thereon to a plurality of angular positions. The method also includes capturing, via an x-ray microtomography device at each of the plurality of angular positions, a tomograph of the object. The method also includes summing each tomograph of the object to create a three-dimensional image of the object. The method also includes using an additive manufacturing machine to create a three-dimensional replica of the object using the three-dimensional image of the object. |
| US09818381B1 |
Self-release and self-locking string locking mechanism
A self-releasing and self-locking string locking mechanism for adjusting a string includes a fixed seat mounted on a stringed instrument, a worm shaft, a worm gear, a rotating shaft and a sleeve. The worm shaft drives and rotates the worm gear, and is installed on the fixed seat. The rotating shaft, pivotally connected on the fixed seat and secured on the worm gear, includes a self-releasing thread having a pitch thread between 1.25 mm and 1.6 mm and applied with a lubricant, and a locking pin. The sleeve is for the locking pin to be inserted therein, and internally includes an inner thread corresponding to the self-releasing thread and a lower surface for the locking pin to abut against. The sleeve is further provided with a through opening for the string to pass through near the lower surface. |
| US09818379B2 |
Pixel data transmission over multiple pixel interfaces
Embodiments are disclosed relating to a method of driving a display panel. In one embodiment, the method includes sending a stream of pixels from a display engine to a first pixel interface and a second pixel interface, transmitting a first subset of the stream of pixels from the first pixel interface to the display panel, and transmitting a second subset of the stream of pixels from the second pixel interface to the display panel. |
| US09818377B2 |
Projection system, image processing apparatus, and correction method
A projection system includes projection units collectively projecting an image as a whole on a projection area; a generation unit generating correction images including correction points which are used for detecting distortions of projection images based on designated relationships; and a compensation coefficient calculation unit calculating compensation coefficients, based on correction captured images acquired from the correction images on the projection area. Further, margin parts are generated in the correction images in a manner so that parts defining the correction points in the correction images are projected within the projection area while the parts defining correction points in the correction images corresponding to the projection units that are next to each other are overlapped. |
| US09818375B2 |
Liquid-crystal display device and drive method thereof
Provided are a liquid crystal display device and a drive method thereof, capable of promptly making an afterimage, which is visually recognized during pause drive, visually unrecognizable while suppressing power consumption. When updated image data is transmitted, a first refresh is performed by used of this image data, and a refresh pauses based on Ref_int just in the next two-frame period. Then, the second and third refreshes are consecutively performed, and a refresh pause is repeated until the next updated image data is transmitted. In this case, since a refresh can be performed three times in a short period after reception of the updated image data, it is possible to make liquid crystal molecules oriented in a direction corresponding to an applied voltage in a short time and make an afterimage visually unrecognizable. |
| US09818373B2 |
Data processing device for display device, display device equipped with same and data processing method for display device
A unit equivalent value acquiring unit acquires a normal-temperature unit equivalent use time Δtn by using a temperature sensor, first to third LUTs, and a first multiplying unit. An integration unit acquires an equivalent cumulative use time to by integrating the normal-temperature unit equivalent use time Δtn. A maximum value detecting unit detects a maximum equivalent cumulative use time tnmax. A dividing unit acquires a correction coefficient Kcmp by dividing total degradation E(tnmax,Tn) acquired by a fourth LUT by total degradation E(tn,Tn) acquired by a fifth LUT. Accordingly, there is provided a data processing device for a display device capable of preventing burn-in while suppressing time degradation of an electro-optical element and increase in the number of wires. |
| US09818371B2 |
Method of correcting complexion color shift of LCD and a system thereof
The present invention discloses a method of correcting complexion color shift of LCD including obtaining accounting ratio of a complexion region of an image which will be shown in the LCD; comparing the accounting ratio of a complexion region to a predetermined value; and applying a first gamma value to conduct gamma correction of the data of red color, green color, and blue color if the accounting ratio is larger than the predetermined value; wherein the first gamma value is larger than 2.2. The present invention also discloses a system of correcting complexion color shift of LCD. The gamma value of front viewing angle of the LCD is increased. Accordingly, the gamma value of the image of big viewing angle approaches the curve of gamma value 2.2 more in the LCD and wash out of the complexion of the image of big viewing angle is eliminated. |
| US09818368B2 |
Pixel structure and control method thereof and display panel
Embodiments of the present invention provide a pixel structure and a control method thereof and a display panel. The pixel structure comprises a plurality of sub-pixels, and a plurality of gate lines and a plurality of data lines that are crossed with each other, wherein the gate lines comprise a plurality of first gate lines and a plurality of second gate lines, each sub-pixel comprises a first part and a second part, and each sub-pixel comprises a first thin film transistor and a second thin film transistor, the first part is connected to a corresponding data line through the first thin film transistor, a gate of the first film transistor is connected to a corresponding first gate line, the first part and the second part of each sub-pixel are connected with each other through the second thin film transistor, and a gate of the second film transistor is connected to a corresponding second gate line. |
| US09818355B2 |
Display panel and display device
A display device has a display panel. The display panel comprises multiple pixels arranged in a matrix. A TFT corresponding to the pixels is driven by AC voltage. Each pixel includes a first color sub-pixel, a second color sub-pixel and a third color sub-pixel arranged in sequence along a first direction. The first color sub-pixel includes a first sub-sub pixel and a second sub-sub pixel arranged along a second direction. The second color sub-pixel includes a third sub-sub pixel and a fourth sub-sub pixel arranged along the second direction. The third color sub-pixel includes a fifth sub-sub pixel and a sixth sub-sub pixel arranged along the second direction. The adjacent sub-sub pixels are supplied different voltages with opposite polarities. The sum of the brightness of the two sub-sub pixels of each sub-pixel are the same before and after the polarity of the voltage is changed. |
| US09818353B2 |
Scan driver adn display device using the same
Disclosed is a display device that may include a display panel, a data driver configured to supply a data signal to the display panel, and a scan driver formed in a non-display area of the display panel, including a shift register composed of a plurality of stages and a level shifter formed outside the display panel, and configured to supply a scan signal to the display panel using the shift register and the level shifter, wherein the shift register is arranged in an output terminal of an N-th stage circuit unit formed in a first non-display area and an output terminal of an N-th compensation circuit unit formed in a second non-display area opposite the first non-display area are paired to be connected to an N-th scan line, wherein the N-th compensation circuit unit outputs a compensation signal to the N-th scan line in response to a node voltage of a neighboring stage circuit unit. |
| US09818352B2 |
Display apparatus and electronic device with sub-pixels having respective areas
Disclosed herein is a display apparatus including: a first pixel including three sub-pixels for displaying three primary colors respectively; and a second pixel including three sub-pixels for displaying two colors selected among the three primary colors and a predetermined color other than the three primary colors, wherein, in the first pixel, the size of the display surface of a sub-pixel for displaying a specific color included in the three primary colors as a specific color missing from the second pixel is larger than each of the sizes of the display surfaces of the two other sub-pixels for displaying the two other primary colors respectively. |
| US09818350B2 |
Method of synchronizing a driving module and display apparatus performing the method
A method of synchronizing a driving module includes applying a plurality of original data enable (“DE”) signals to a plurality of timing controller of the driving module, respectively, generating a synch DE signal from the driving module based on the earliest signal among the original DE signals, and transferring the synch DE signal to the plurality of timing controllers in a cascade mode. |
| US09818346B2 |
Display device and control method for same
On the basis of the image data obtained by the image data acquisition section, a target luminance calculation section calculates a target luminance, which is a target value for the luminance of emitted light for each segment region. An inverse filter acquisition section acquires an inverse filter of a light emission distribution function which represents light emission distribution characteristics of the light source for each segment region. A setting value calculation section calculates a setting value for the luminance of emitted light of the light source for each segment region by performing a convolution operation on the target luminance for each segment region with the inverse filter. On the basis of the setting value for each segment region calculated by the setting value calculation section, a light source control section controls the luminance of emitted light of the light source for each segment region. |
| US09818342B2 |
Display device and transistor structure for the same
Disclosed are a transistor structure for a display and an organic light emitting display device. The transistor structure includes: a voltage line positioned in one direction and configured to supply voltage to pixels; and two or more transistors which share one of drains and sources which are formed integrally with the voltage line and respectively include the other of the drains and sources which are individually formed and connected with different nodes directly or through a connection pattern. |
| US09818332B2 |
Image display method and electronic device
An image display method, adapted to an electronic device having a screen, an image capturing unit, and a light sensor, includes the following steps. A preview image captured by the image capturing unit is received and processed so as to generate a plurality of pixel luminance values of the preview image. A light illumination of an ambient light detected by the light sensor is received. An output Gamma lookup table among a plurality of Gamma lookup table is selected according to the pixel luminance values and the light illumination of the ambient light. An adjusted pixel luminance value corresponding to each of the pixel luminance values is generated based on the output Gamma lookup table so as to accordingly display the preview image on the screen with sunlight readability. An electronic device is further provided in the invention to implement the above method. |
| US09818329B2 |
Data driving circuit, display device having the same and operating method thereof
Provided is a data driving circuit of a display device, the data driving circuit including a first receiving circuit which receives an external first image control signal at the start of power being supplied, a second receiving circuit which receives a second image control signal in response to an activated data packet detection signal, and a data packet detection circuit which activates the data packet detection signal when a line start field included in the first image control signal is detected. |
| US09818326B2 |
Display driving apparatus, method for driving display panel and display panel
A display panel including a plurality of pixels, a plurality of scan lines and a plurality of data lines is provided. The pixels are arranged in an array, and the array includes columns and rows. Each of the scan lines is coupled to the pixels located on the same row. Each of the data lines is coupled to the pixels located on the same column. The data lines are grouped into a plurality of data line groups, and each of the data line groups includes three or more data lines. The data line groups are respectively located between the pixels on the same row. The data line groups are configured to write display data into the pixels when the pixels are turned on. A display driving apparatus and a method for driving the display panel are also provided. |
| US09818325B2 |
Data processor and method for displaying data thereby
A novel data processor which can display a plurality of images arranged in a predetermined order, a novel method for displaying data, or a novel program is provided. The data processor includes an input/output unit which supplies operation instructions, an arithmetic unit which determines data marked as a starting point according to the operation instructions to generate image data, and a display portion which displays the image data. |
| US09818322B2 |
Method and system for obtaining color measurement of a display screen
The present invention is directed to systems and methods to implement improved and more accurate measurements of the color display characteristics of a display device under analysis. Specifically, the apparatus and method of the present invention are configured to reduce the amount of off-axis light in such a way as to limit the impact of such light on the measurement of color values generated by the display device. The reduction is achieved by causing the display to emit a target radiation only the size and shape of the active area of the sensor. |
| US09818320B2 |
Device and method for testing transparency effect of transparent display substrate using a reference object with two kinds of regions of different colors
Embodiments of the present invention provide a device and a method for testing transparency effect of a transparent display substrate. The device comprises a transparency identification module, an optical measurement unit and a reference object including two kinds of regions of different colors. The optical measurement unit is able to directly measure brightness of the two kinds of regions of different colors of the reference object to acquire a first brightness difference, and to measure brightness of the two kinds of regions of different colors of the reference object through the transparent display substrate to acquire a second brightness difference. Based on the first brightness difference and the second brightness difference, the transparency identification module calculates identification degree ID of the transparent display substrate according to the equation: ID = Δ L 2 Δ L 1 × 100 % , where ΔL1 is the first brightness difference and ΔL2 is the second brightness difference. Embodiments of the present invention may eliminate the influence of ambient light on the test and increase the test accuracy of the transparent display substrate. |
| US09818319B2 |
Wearable device and control method thereof
A wearable device apparatus, comprises: a first and second housings configured to be connected with each other; a plurality of light emitters configured to be separately located and configured to emit a light through the first housing; a light guide configured to guide a direction of the light emitted from the plurality of light emitters; a plurality of force detection sensor configured to detect a force applied to a certain point of the first housing; and a control board configured to control the plurality of light emitters through detection of the plurality of force detection sensors. |
| US09818313B2 |
Custom summary views for screen reader
A screen reader software product feature referred to as a custom summary view, or custom summary, has been developed. The custom summary feature solves the major problem faced by blind users when working with large sets of data. That problem occurs as a result of an inefficiency of gleaning important data from within these larger sets. The custom summary provides the ability to gather such data into a summary that can be navigated easily. This ease of navigation greatly levels the playing field in the competitive workplace for blind workers and students alike. Also taught is a feature, referred to as a multiple region support, which allows users to define blocks of contiguous cells containing data as “regions” when a document such as a spreadsheet is displayed by a screen reader. Regions can either be named by the user or be defined simply by the top left and bottom right cell addresses that represent the boundaries of the block of contiguous cells containing data. |
| US09818311B2 |
Importing and analyzing external data using a virtual reality welding system
A real-time virtual reality welding system including a programmable processor-based subsystem, a spatial tracker operatively connected to the programmable processor-based subsystem, at least one mock welding tool capable of being spatially tracked by the spatial tracker, and at least one display device operatively connected to the programmable processor-based subsystem. The system is capable of simulating, in virtual reality space, a weld puddle having real-time molten metal fluidity and heat dissipation characteristics. The system is further capable of importing data into the virtual reality welding system and analyzing the data to characterize a student welder's progress and to provide training. |
| US09818308B2 |
Agricultural machine simulator
A simulator of an agricultural working machine has a computer unit coupled to a display unit and a control unit. The agricultural working machine to be simulated has adjustable working parts and control elements that implement adjustment of the working parts and a software module that is stored in the computer unit. The software module depicts a process model of crop-processing processes to be implemented by the agricultural working machine and depicts the machine behavior resulting from the crop-processing processes. The process model and the machine behavior are visualized in the display unit and can be edited by the control unit. |
| US09818295B2 |
Methods and systems for detecting a closure of a navigable element
A method of detecting the closure of a road element is disclosed; the road element being one of a set of alternative incoming or outgoing elements at a node in a network of navigable elements. A server obtains positional data relating to the position of a plurality of devices with respect to time traversing the node. A count is determined of the number of devices in a consecutive sequence of device selecting a given one of the navigable elements from among the set of elements. The count is compared to a predetermined threshold to determine whether another one of the elements is closed. The threshold is based upon the relative probability of the element to which the count relates being taken from the set of road elements. |
| US09818286B2 |
System for repelling a pet from a predetermined area
A system for repelling a pet from at least one predetermined area includes a first device adapted for positioning at the predetermined area. The first device includes at least one of a first receiver and a first transmitter. A second device is adapted for placement on the pet. The second device includes at least one of a second receiver and a second transmitter. At least one of the first device and the second device is configured to warn the pet when the second device approaches the at least one predetermined area, and thereby train the pet to stay away from the predetermined area. |
| US09818270B1 |
System, method, and apparatus for monitoring audio and vibrational exposure of users and alerting users to excessive exposure
A system, method, and apparatus for monitoring ambient sound and vibration levels at the location of a user allows a determination as to whether the user is exceeding a maximum allowed exposure time as determined by an occupational standard. The sound and vibration level data can be evaluated locally at the mobile communication device, as well as transmitted to a backend system to allow supervision of personnel associated with the backend system as a further assurance that personnel comply with exposure limits. Further, the mobile communication device, in response to ambient conditions, adjusts the settings of its alerting sound and the vibration level of an associated vibration accessory to ensure perception of alerts by the mobile communication device for the user of the mobile communication device. |
| US09818267B2 |
Doorbell system and doorbell chime
A doorbell system comprises a doorbell chime (18), a first doorbell push (10) for sending a first input signal to the doorbell chime (18) in response to the first doorbell push (10) being activated, and a second device, such as a second doorbell push (14), for sending a second input signal to the doorbell chime (18). The doorbell chime (18) is arranged to emit light (24) of a first color in response to receiving the first input signal and light of a second, different, color in response to receiving the second input signal. The light (24) may be emitted around a perimeter of the doorbell chime, such that it creates a halo effect around the part of the door chime located within said perimeter. |
| US09818251B2 |
Unit dose dispensing systems and methods
Mechanisms for dispensing items such as medications and medical supplies. Different mechanisms may be tailored to dispensing different kinds of items, for example medications in single dose packages, vials, syringes, or other similarly-shaped items. The dispensers may be placed in a dispensing unit that includes a lockable restock drawer and a dispense drawer into which items are dispensed by the dispensing mechanisms. The various kinds of dispensing mechanisms may be installed in the restock drawer in any workable proportion and arrangement. The dispensing mechanisms include multiple sensing technologies for tracking and inventory of items and for accurate sensing of items as they are dispensed. |
| US09818245B2 |
Individualized control system utilizing biometric characteristic
A control system including a detection device and a control host is provided. The detection device is configured to detect a biometric characteristic to accordingly identify a user ID, and output an ID signal according to the user ID. The control host is configured to receive the ID signal to accordingly perform an individualized control associated with the user ID. |
| US09818243B2 |
System interaction with a movable barrier operator method and apparatus
A secure communication link is provided between a movable barrier operator and a peripheral system. Information conveyed via this link is used by one, the other, or both such elements to further inform or direct their respective actions. |
| US09818241B2 |
Malfunction diagnosing apparatus for vehicle
An output limiting control is carried out for limiting an output of a driving source when an acceleration pedal as well as a brake pedal is operated at the same time. An acceleration opening degree for a malfunction diagnosis is set based on a detected acceleration opening degree. A required output value for the malfunction diagnosis is calculated based on the acceleration opening degree for the malfunction diagnosis. A malfunction determining threshold is set in accordance with the required output value. An estimated output value of the driving source is compared with the malfunction determining threshold in order to determine whether there is a malfunction in a control system for the driving source. The acceleration opening degree for the malfunction diagnosis is limited to a predetermined limiting value, when the acceleration and brake pedal are operated at the same time. |
| US09818238B2 |
Vehicle state prediction system
A state predicting circuitry predicts a route showing a future change in the vehicle state from among a plurality of routes from a first node to a second node. The first node corresponds to the current vehicle state. The second node corresponds to the vehicle state after having transitioned a predetermined number of times from the first node. The state predicting circuitry predicts a route in which at least one of an accumulated value of the node that exists in the routes and an accumulated value of the link that exists in the routes is greatest, from among the plurality of routes. |
| US09818234B2 |
3D shape reconstruction using reflection onto electronic light diffusing layers
3D shape reconstruction of objects including specular objects in which structured light patterns are projected toward an object which reflects the patterns onto multiple layers of EGlass arranged in spaced-apart relation with each other while each layer is in turn controlled to be in the diffuse mode with all others being in the transparent mode. Images are captured of the structured light pattern as reflected onto the EGlass layers by the mirror-like surface of the specular object. By projecting multiple different patterns, such as multiple different Gray code patterns, and by sequencing through each EGlass layer for each pattern, the 3D shape of the entirety of the visible surface of the object can be reconstructed by analysis of captured images of the distorted reflections of the patterns by the surface of the object. Embodiments are also described which can be used without reconfiguration for surface reconstruction of the shape of diffuse objects. |
| US09818231B2 |
Computer visualization of anatomical items
A computer-implemented medical visualization method includes identifying a three-dimensional model of an anatomical item of a particular mammal; automatically identifying an open path in three-dimensional space through the anatomical item; fitting a smooth curve to the open path; and displaying the anatomical item and a visual representation of the smooth curve to a user on a three-dimensional imaging system. |
| US09818227B2 |
Augmented reality presentations
Technology is generally disclosed for augmented-reality presentations. In some embodiments, the technology can receive an indication of a user's sensitivity to an aspect of a presentation, receive general content relating to the presentation, receive overlay content relating to the presentation, combine the received general content and the received overlay content to create the presentation, and render the presentation. The overlay content may respond to the user's sensitivity. |
| US09818224B1 |
Augmented reality images based on color and depth information
Techniques are described for generating a composite image that depicts a first object with a second object. Two-dimensional images of the first object are captured, along with depth information that includes three-dimensional coordinates of points on the surface of the first object. Based on the depth information, a polygonal model may be determined for the first object including color information determined from the images. The polygonal model of the first object may be placed with a polygonal model of the second object in a virtual scene, and ray tracing operations may generate a plurality of pixels for the composite image. In cases where the first object represents a user and the second object represents a product, the composite image may provide a substantially realistic preview of the user with the product. |
| US09818222B2 |
Tessellation of patches of surfaces in a tile based rendering system
A method and apparatus are provided for tessellating patches of surfaces in a tile based three dimensional computer graphics rendering system. For each tile in an image a per tile list of primitive indices is derived for tessellated primitives which make up a patch. Hidden surface removal is then performed on the patch and any domain points which remain after hidden surface removal are derived. The primitives are then shaded for display. |
| US09818219B2 |
View direction determination
Among other things, one or more techniques and/or systems are provided for defining a view direction for a texture image used to texture a geometry. That is, a geometry may represent a multi-dimensional surface of a scene, such as a city. The geometry may be textured using one or more texture images depicting the scene from various view directions. Because more than one texture image may contribute to texturing portions of the geometry, a view direction for a texture image may be selectively defined based upon a coverage metric associated with an amount of non-textured geometry pixels that are textured by the texture image along the view direction. In an example, a texture image may be defined according to a customized configuration, such as a spherical configuration, a cylindrical configuration, etc. In this way, redundant texturing of the geometry may be mitigated based upon the selectively identified view direction(s). |
| US09818215B2 |
Specular highlights on photos of objects
Systems and methods are presented for recording and viewing images of objects with specular highlights. In some embodiments, a computer-implemented method may include accessing a first plurality of images, each of the images in the first plurality of images including an object recorded from a first position, and a reflection of light on the object from a light source located at a different location than in each of the other images in the first plurality of images. The method may also include generating a first composite image of the object, the first composite image comprising a superposition of the first plurality of images, and wherein each of the images in the first plurality of images is configured to change in a degree of transparency within the first composite image and in accordance with a first input based on a degree of tilt. |
| US09818214B2 |
Systems, processes, and computer program products for creating geo-location-based visual designs and arrangements originating from geo-location-based imagery
Systems, processes, and computer program products for creating visual designs and arrangements that originate from an image or images are provided. In particular, the present subject matter relates to systems, processes, and computer program products for taking captured images of an intended operating environment and creating visual designs that create visual confusion that can be utilized to disguise a recognizable form of a person or an object by breaking up its outline using portions, magnifications and distortions of a single captured image, portions, magnifications and distortions of multiple captured images, and/or disruptive patterns that can projected on an image screen or can be printed on a material. |
| US09818213B2 |
Extensions for modifying a graphical object to display data
A graphical manipulation tool to create and/or make modifications to a graphical object suitable for visually representing data. The graphical manipulation tool analyzes the graphical object to determine parameters of visual characteristics of the graphical object that can be used to visually represent data. A computing system, through the graphical manipulation tool, may generate metadata that defines a capacity for visual characteristics to represent data. In some cases, a preview is displayed on a user interface indicating to a user how the metadata, if incorporated with the graphical object, may result in the visual characteristics of the graphical object being used to visually represent data. If incorporating the metadata with the graphical object is desirable, the user may provide to include the additional metadata with the graphical object. |
| US09818210B2 |
Pixel-aligned drawing to avoid anti-aliasing
A method, system, and computer-readable storage medium are disclosed for boundary-aligned anti-aliasing. In one embodiment, artwork input comprising a first set of one or more graphical elements and a second set of one or more graphical elements may be received. The first set may comprise at least one horizontal or vertical line segment. Each graphical element in the first set of one or more graphical elements may be automatically aligned to pixel boundaries based on a pixel resolution of a target imaging device. An anti-aliasing function may be applied to generate a selectively anti-aliased artwork based on the artwork input. Applying the anti-aliasing function may comprise applying anti-aliasing effects to the second set of one or more graphical elements and not to the first set of one or more graphical elements. The selectively anti-aliased artwork may be displayed on the target imaging device. |
| US09818209B2 |
User interface for radar level gauge analysis
A method for analyzing a level gauge, comprising storing in a storage device a consecutive sequence of data triplets including a time stamp, a filling level measurement, and an echo curve information, plotting a trend line including filling level as a function of time, graphically indicating a pointer in the trend line, displaying an echo curve corresponding to a point in time initially represented by the pointer, receiving user input indicating a set of points along a section of the trend line selected for analysis, and for each point in the set of points, moving the pointer to this point and replacing contents of the second graphical element, such that an echo curve displayed in the second graphical element always corresponds to a point in time represented by a current position of the pointer.The invention enables a user to analyze operation of the level gauge during a time period corresponding to the selected trend line section. |
| US09818208B2 |
Identifying and abstracting the visualization point from an arbitrary two-dimensional dataset into a unified metadata for further consumption
A system and method for determining a set of visualization points from any given two-dimensional dataset to best describe a given visual analytic. A first user selection is received in a data processing apparatus for a chart. A chart type associated with the first user selection is identified for the chart. One or more visualization strategies are accessed from a strategy pool database based on the chart type. A second user selection is received in the data processing apparatus for a two-dimensional dataset from a data provider in communication with the data processing apparatus. The two-dimensional dataset is analyzed to determine a best strategy from the one or more visualization strategies accessed from the strategy pool database. Metadata representing the two-dimensional dataset is generated based on the best strategy, and a display representing the metadata is generated to visualize the two-dimensional dataset according to the best strategy. |
| US09818207B2 |
Method and medical imaging system for compensating for image artifacts in medical imaging
A method compensates for image artifacts in a first imaging device for imaging a first subregion of a body. The image artifacts are caused by a second subregion of the body being disposed outside of a first field of view for the first device. First measured data for the first field of view is acquired by the first device. The first subregion lies in the first field of view. Second measured data are acquired for a second field of view in a second imaging device. Image data representing the subregions in the second device are calculated from the second measured data. A model representing the subregions is calibrated using the calculated image data. The data representing the second subregion in the first device are simulated using a calibrated model. A correction of the first measured data is performed using simulated data for reducing the image artifacts. |
| US09818206B2 |
Display device
A display device includes: a display means that displays a virtual image of a picture by projecting display light representing the picture on a windshield; an identification means that identifies a target outside the vehicle; a control means that causes a first captured image, visually recognized as being superposed on at least a part of the target, to be displayed in the picture; and a vibration detection means that detects the amount of vibration of the vehicle. The control means, when the amount of vibration detected by the vibration detection means exceeds a threshold value, causes a second captured image to be displayed instead of the first captured image. The second captured image is an image of which a color shade difference between pixels configuring an image end and a region outside the image and adjacent to the image end is decreased compared with the first captured image. |
| US09818204B2 |
Method for monitoring, identification, and/or detection using a camera based on a color feature
The present disclosure relates to a method for camera identification and detection on color features. In some aspects, the method comprises: 1) starting the camera, the image processing unit and the display unit at the beginning of testing; 2) using the camera to capture the color characteristic value; and 3) moving the untested object to the detection area of the camera for it to be detected, wherein the image processing unit extracts the mean color characteristic value from the color pixels of the detection area. |
| US09818202B2 |
Object tracking based on distance prediction
Provided is an image processing apparatus including a distance information acquisition unit that acquires distance information on a distance up to an object imaged by an image sensor, a pixel value information acquisition unit that acquires pixel value information of an image corresponding to the object, and a tracking unit that tracks the object that moves, based on the acquired distance information and the acquired pixel value information. |
| US09818200B2 |
Apparatus and method for multi-atlas based segmentation of medical image data
An image data processing apparatus including a data receiver receiving image data to be segmented, and an atlas selection processor accessing a plurality of atlas data sets and selecting a subset of the atlas data sets for use in segmenting the image data, wherein the atlas selection processor is configured to select the subset of atlas data sets in dependence on the positions of one or more anatomical landmarks comprised in the plurality of atlas data sets. |
| US09818195B2 |
Object pose recognition
A method for use in estimating a pose of an imaged object comprises identifying candidate elements of an atlas that correspond to pixels in an image of the object, forming pairs of candidate elements, and comparing the distance between the members of each pair and with the distance between the corresponding pixels. |
| US09818190B2 |
Whole slide image registration and cross-image annotation devices, systems and methods
The disclosure relates to devices, systems and methods for image registration and annotation. The devices include computer software products for aligning whole slide digital images on a common grid and transferring annotations from one aligned image to another aligned image on the basis of matching tissue structure. The systems include computer-implemented systems such as work stations and networked computers for accomplishing the tissue-structure based image registration and cross-image annotation. The methods include processes for aligning digital images corresponding to adjacent tissue sections on a common grid based on tissue structure, and transferring annotations from one of the adjacent tissue images to another of the adjacent tissue images. |
| US09818188B2 |
System and method for connectivity mapping
A processing system for and a method of segmenting a physiological image is provided. Once the physiological image is received, extrinsic data defining extrinsic regions is further received. Additionally, intrinsic data defining at least one intrinsic region, each intrinsic region corresponding to one extrinsic region is received. A primary modification is performed, where a shape and size of at least one extrinsic region having a corresponding intrinsic region is modified based on a shape and size of the corresponding intrinsic region, to form a modified extrinsic data. The physiological image is segmented into segmented regions based on the modified extrinsic data, each segmented region which has a corresponding intrinsic region representing a primary modification based on the corresponding intrinsic region. |
| US09818186B2 |
Method for forming 3D maxillofacial model by automatically segmenting medical image, automatic image segmentation and model formation server performing the same, and storage medium storing the same
Disclosed is a method for forming a three-dimensional (3D) model of skin and mandible by automatic medical image segmentation which is performed in an automatic image segmentation and model formation server. The method includes (a) receiving 3D medical image data that is a set of two-dimensional (2D) images for horizontal planes of a face, (b) obtaining a contrast histogram based on distribution of contrasts of the 3D medical image data, and segmenting the 3D medical image data for the face into multiple regions separated into at least one partial region based on the contrast histogram, (c) extracting only the face by removing portions other than the face from the multiple regions for the face, and extracting a skin region of the face, (d) extracting the mandible from each of the 2D images for the horizontal planes of the face through a 2D detailed segmentation technique using an active contour method based on a level set function, and (e) reconstructing the extracted skin region and mandible as the 3D model. |
| US09818184B2 |
Method for acquiring and processing medical images
Disclosed herein is a method for acquiring and processing a medical image, comprising obtaining the first to n-th sectional images of the first to n-th regions through non-sequential sectional-image acquisition starting from one of the first to n-th regions and sequentially arranging the obtained first to n-th sectional images. |
| US09818182B2 |
X-ray CT device
The present invention prevents aliasing of the X-ray detector from lowering the spatial resolution and enhances the precision of measurement in an X-ray CT device. This has the effect of making it possible to measure finer structures, such as blood vessels, and enhance the diagnostic capability, without having to increase the subject's exposure in, for example, medical CT. |
| US09818181B1 |
Shearogram generation algorithm for moving platform based shearography systems
A system and method are presented for generating shearograms from raw specklegram images which may, for example, be collected from airborne or other mobile shearography equipment. The system and method is used to detect and characterize buried mines, improvised explosive devices (IEDs), and underground tunnels, bunkers, and other structures. Amongst other purposes, the system and method may also be used for rapid scanning of ship hulls and aircraft for hidden structural defects, rapid pipeline inspection, and non-contact acoustic sensing for in-water and underground sources. |
| US09818180B2 |
Image processing device, method, and program
It is possible to determine whether or not a specific shape candidate obtained from a captured standard image has a corresponding shape in an actual space. A shape surrounded by straight lines is detected from a standard image as a candidate having a rectangular shape. A target object image obtained by imaging a target object representing the candidate having the rectangular shape at a viewing angle different from the viewing angle of the standard image is generated. The generated target object image is detected from a reference image obtained by imaging the target object at a different viewing angle. If the target object image is detected, the target object represented by the candidate having the rectangular shape is determined to be a rectangle. |
| US09818174B2 |
Streamlined handling of monitor topology changes
Transitions between monitor configurations may be streamlined by minimizing the tearing down and recreating of render targets and primary frame buffers associated with the monitors. In at least one example, the techniques described herein include identifying at least one render target in a first monitor configuration that is also in a second monitor configuration. In response to identifying the at least one render target in the first monitor configuration that is also in the second monitor configuration, the techniques herein describe maintaining the at least one render target during a transition between the first monitor configuration to second monitor configuration. |
| US09818173B2 |
Displaying representative images in a visual mapping system
Embodiments provide systems and methods for generating a street map that includes a position identifier that identifies a location on the street map. The method and system may also generate and display a plurality of images representative of the location of the position identifier. A user may interact with a position identifier or one of several scroll icons to view images of other locations on the street map and/or to obtain driving directions between two locations. |
| US09818170B2 |
Processing unaligned block transfer operations
This disclosure describes techniques for processing unaligned block transfer (BLT) commands. The techniques of this disclosure may involve converting an unaligned BLT command into multiple aligned BLT commands, where the multiple aligned BLT commands may collectively produce the same resulting memory state as that which would have been produced by the unaligned BLT command. The techniques of this disclosure may allow the benefits of relatively low-power GPU-accelerated BLT processing may be achieved for unaligned BLT commands without requiring a CPU to pre-process and/or post-process the underlying unaligned surfaces. In this way, the performance and/or power consumption associated with processing unaligned BLT commands in an alignment-constrained GPU-based system may be improved. |
| US09818167B2 |
Multi-grid method and apparatus using V cycle
A multi-grid method using a V cycle includes: obtaining a first intermediate solution and a first residual by smoothing a cell of a fine level; obtaining a cell of a coarse level by down-sampling the cell of the fine level and setting the first residual as a second residual of the cell of the coarse level; obtaining a high-frequency component solution of the cell of the fine level and obtaining a smoothed high-frequency component solution by smoothing the high-frequency component solution; obtaining a coarse solution in the cell of the coarse level; up-sampling and transferring the coarse solution to the cell of the fine level and obtaining a corrected intermediate solution by adding the first intermediate solution, the smoothed high-frequency component solution and the coarse solution; and obtaining a second intermediate solution by smoothing the corrected intermediate solution. |
| US09818166B2 |
Graph-based application programming interface architectures with producer/consumer nodes for enhanced image processing parallelism
A flexible representation of fine grain image buffer validity is included in an image graph implementation API to provide a mechanism for a graph node developer to communicate limits of scheduling constraints imposed by a graph's source and destination images. An image graph executor may employ a producer and/or consumer node scoreboard object or function defined through the image graph implementation API to schedule work tasks to hardware resources in a more efficient manner. In some embodiments, an image processing engine is configured to begin processing completed source data blocks (e.g., image tiles) through an image graph before all upstream tasks associated with the source image are complete. In further embodiments, a destination image is to be indicated as at least partially complete so that work dependent on one more completed data blocks may begin before the destination image is fully buffered into memory. |
| US09818163B2 |
Property management system
A computerized property management system enables users to input a service request by placing a problem-type icon on a floor plan and designating a priority or urgency for the service request. The user can select a problem type note and/or input text describing the problem. Additionally, the user can add photographs, voice notes or video. After the service request is submitted, a contractor is notified of the request by email or text, which includes a link to the service request page with the information entered by the user. After the service request task is completed, the contractor can add notes describing what was fixed and indicating that the task has been completed. Subsequently, an email or other communication may be sent to the property manager and the requestor to indicate that the task has been completed. |
| US09818156B2 |
Multiple modular asset constructor apparatuses, methods and systems
The Multiple Modular Asset Class Constructor Apparatuses, Methods and Systems (“MMACC”) transforms collateralized equity obligation structure parameters, asset search, tranche selections inputs via MMACC components into asset income distribution message, principal distribution message outputs. In one embodiment, the MMACC is an apparatus, with a memory having a component collection, including: a capital structure component, a preferred share class component, and a common share class component. The MMACC also has a processor to issue instructions from the component collection including instructions to obtain a capital structure input via said capital structure component from a system user and determine a preferred share class allocation via said capital structure input and said preferred share class component. The MMACC may use the preferred share class allocation derived from said capital structure input and said preferred share class component and determine a common share class allocation via said capital structure input and said common share class component. The MMACC may also output said common share class allocation derived from said capital structure input and said common share class component. |
| US09818151B2 |
Remote vehicle rental systems and methods
A system for renting vehicles is disclosed. The system can comprise a vehicle access communicator (“VAC”) capable of interfacing with one or more functions of a rental vehicle and a user provided portable electronic device. The VAC can control various functions of the vehicle including, but not limited to, the door locks and/or enabling/disabling the vehicle. The VAC can also monitor various functions of the vehicle including, but not limited to, the fuel level and/or the odometer readings. The VAC can connect to the portable electronic device using a suitable connection method to access additional functionality such as, for example and not limitation, locations services, cellular, and/or internet access. The VAC and the portable electronic device can be used to provide a rental system with reduced infrastructure and operating costs. The system can enable the use of “Green Zones” to provide permanent or temporary vehicle rental areas. |
| US09818145B1 |
Providing product recommendations based on user interactions
Recommendations of items may be provided to a customer who purchases items from an online marketplace on behalf of a user account based on the interactions of the customer with the marketplace or with one or more external resources, such as a social network account affiliated with the customer. For example, systems and methods may utilize such interactions to determine which of the purchases of items on behalf of the user account are affiliated with the customer, and which may be affiliated with one or more other individuals. Similarly, the systems and methods may also identify recommendations for customers who have purchased items for delivery to a destination based on other items that have been delivered to the destination, and may further determine when a customer has purchased an item for a recipient who has already received the item from another customer. |
| US09818142B2 |
Ranking product search results
Ranking product search results is disclosed, including: determining a plurality of sample pairs corresponding to a query word; determining a plurality of feature score values corresponding to a set of ranking features associated with the query word for each product associated with each of at least a subset of the plurality of sample pairs; and determining a set of weightings corresponding to the set of ranking features based at least in part on the plurality of feature score values and ranking priority assignments corresponding to the at least subset of the plurality of sample pairs. |
| US09818141B2 |
Pricing data according to provenance-based use in a query
A method, system, and computer program product for pricing data according to provenance-based use in a query are provided in the illustrative embodiments. A set of data cubes is identified. A data cube in the set comprises a quantum of data configured for trading in exchange for a payment, the set being usable for answering the query. A first portion of a price for performing the query is computed, which includes a price of a first data cube computed using a first set of provenance attributes and a first provenance-based pricing adjustment from a first pricing definition, the first data cube being included in the set. A confidence level of a result set of the query is computed. The set of data cubes, the first set of provenance attributes, the first portion of the price, and the confidence level are presented in a pricing preview of the query. |
| US09818139B1 |
Classifying user-provided code
Processes for classifying, and dynamically adjusting, tiers for web services are described. Depending on the classification of the web service, support resources (e.g. servers, storage, bandwidth or other communications resources, etc.) may be configured in different ways, such as, for example, sharing resources among one or more of the web services, or isolating the resources for particular web services from those of other web services. Various electronic storefronts may be provided by a service provider to merchants/customers of the service provider. The service provider may classify each of the electronic storefronts for the merchants to a plurality of tiers. Such classifying may be performed, for example, during an enrollment of the merchant with the service provider, and/or during operation of the electronic storefront. |
| US09818137B1 |
Estimating the operating cost of computing resources provided by a service provider
Data may be collected regarding the configuration and operation of computing resources in a customer network. The collected data may be utilized to identify computing resources available from a computing resource service provider that duplicate functionality provided by the computing resources operating in the customer network. Pricing data may then be utilized to compute an estimated price for operating the identified computing resources available from the service provider. |
| US09818136B1 |
System and method for determining contingent relevance
A system and method providing for communication and resolution of utility functions between participants, wherein the utility function is evaluated based on local information at the recipient to determine a cost value thereof. A user interface having express representation of both information elements, and associated reliability of the information. An automated system for optimally conveying information based on relevance and reliability. |
| US09818131B2 |
Anonymous information management
An anonymous information system (AIS) maintains privacy for internet users by separating personally identifiable information (PII) and user browser history. The AIS may receive a hashed email address from a publisher website. The AIS system may double hash the email address and discard the hashed email address received from the publisher. The double hashed email address is decoupled from user PII and may be used for tracking the number of unique email addresses provided by the publisher website. The AIS system also may associate the hashed email address with a consumer file. The AIS may hash an entity identifier associated with the consumer file to create a non-reversible anonymous identifier (anonymous ID). The anonymous ID may be associated with segment information in the consumer file that does not contain PII about the user. The AIS may send customized information to users based on the segment information. |
| US09818129B2 |
Methods for calculating advertisement effectiveness
One variation of a method for calculating advertisement effectiveness includes: posting an advertisement for a product to a social feed within a social networking system; tracking a view of the advertisement by a user; determining a proximity of the user to a store of a merchant; in accordance with a privacy setting of the user, selecting personal data of the user from data stored in the social networking system, the personal data including an identity of the user and an interest of the user; in response to the determined proximity of the user to the store, transmitting the selected personal data to the store; and, in response to a transaction between the user and the store, assessing an effectiveness of the advertisement according to a determined correlation between the transaction and the view of the advertisement by the user. |
| US09818125B2 |
Systems and methods for information exchange mechanisms for powered cards and devices
A card, or other device (e.g., a mobile telephonic device), may provide transaction, feature information, and/or any other type of information to a merchant terminal based upon check-in options that may be selected by the user on the card. A routing server may receive transaction information, feature information, merchant related information, cardholder information and/or any other type of information and provide the information to networked entities. The networked entities (e.g., websites, social networks, and search engines) may access the information to track the purchasing habits of one or more cardholders. |
| US09818121B2 |
Mobile communications message verification of financial transactions
A system and method for verifying a secure transaction by evaluating the transaction, generating a first verification value for the transaction, sending an electronic mobile message to a wireless device associated with the transaction, receiving a response from the wireless device to the electronic mobile message associated with the transaction and generating a new second verification value for the transaction based on the response is provided. The second verification value may be used to validate or invalidate the secure transaction. |
| US09818120B2 |
Automated at-the-pump system and method for managing vehicle fuel purchases
An automated at-the-pump method manages vehicle fuel purchases at a fuel station. The method includes transmitting driver identification data to a mobile device assigned to a vehicle driver. The driver identification data is electronically verified to confirm that the driver identification data received by the mobile device matches the assigned vehicle driver. Vehicle data is transmitted from a data bus of the vehicle to the mobile device for storage in the memory. The vehicle data and driver identification data are transmitted to a remote terminal. Using the remote terminal, the vehicle data and driver identification data are electronically authenticated. An authorization signal is then transmitted from the remote terminal to an at-the-pump fuel control terminal. |
| US09818119B2 |
Secure elements broker (SEB) for application communication channel selector optimization
Systems and methods for managing concurrent secure elements on a mobile device to coordinate with an application or “app” running on the mobile device and an appropriate communications protocol for conducting transactions using the mobile device include: informing, by the processor, the reader device of a preferred app and a communication protocol usable by the preferred app; receiving, by the processor, information about which apps and communication protocols are supported by a reader for processing a transaction; locating, by the processor, a secure element supporting an app and a communication protocol supported by the reader; channeling the communication protocol for the specific configuration of the app and the supporting secure element; activating the secure element that supports the app; and processing, with the activated secure element, using the supported app and communication channel, the transaction with the reader. |
| US09818103B2 |
Secure exchange of indicia of value and associated information
Secure exchange of value and associated information in financial transactions involving beneficial offers available for customers is provided. Various offers, including discounts, prepaid amounts, and the like may be purchased by customers for use with various merchants. A third party issuer obtains information from the customer in selling the offers and issues some kind of indicium of value having a representation of the value of the offer associated therein. Record of the indicia are maintained and either transmitted to the merchant or kept by the issuer or associated financial institutions. When the customer redeems the offer by presenting the indicium to the merchant, the merchant may either authenticate the indicium using the records received by the issuer, or establish communication with the issuer for the issuer to authenticate the indicium, either by itself or in cooperation with one or more related financial institutions. |
| US09818095B2 |
Taxi payment system
A taxi payment system including a point of sale device and a mounting assembly for mounting the point of sale device inside a taxi, the mounting assembly having at least two operative orientations, a first operative orientation in which the point of sale device is accessible to a taxi passenger and a second operative orientation in which the point of sale device is accessible to a taxi driver. |
| US09818092B2 |
System and method for executing financial transactions
A system for implementing at least one cryptocurrency transaction at a point-of-sale by using a mobile terminal is provided. The system is operable to provide authentication for implementing the one or more cryptocurrency transactions, wherein the system is operable to send at least one authentication request for the at least one cryptocurrency transaction from a payment terminal to a payment service hosted via one or more virtual computing machines, wherein the payment service is operable to provide a request for a PIN code at the mobile terminal; to send the PIN code from the mobile terminal via a secure channel to open a vault in the one or more virtual machines, wherein the vault contains one or more private keys (PKI) which are useable for authenticating the at least one cryptocurrency transaction; and to confirm execution of the at least one cryptocurrency transaction to at least the payment terminal. |
| US09818089B2 |
Instant availability of electronically transferred funds
A system and method for making funds of a transaction available to a user before a funding entry clears is provided. The system may be part of an on-line system configured to facilitate payments or fund transfers from users. In example embodiments, a transaction request from a user is received. A risk score indicating a perceived risk involved with releasing funds before the funding entry clears is computed. Funds of the transaction are caused to be released prior to the funding entry clearing a financial institution based on the risk score exceeding a transfer threshold. |
| US09818080B2 |
Categorizing a use scenario of a product
A method for categorizing a use scenario of a product is disclosed. The method includes extracting, from a text describing the use scenario of the product, at least one feature tuple capable of characterizing the use scenario and performing a latent semantic association analysis on the at least one feature tuple to obtain a latent topic sequence for the use scenario. Further, the method includes determining a product scenario category to which the use scenario belongs according to the latent topic sequence for the use scenario. Additionally, a corresponding apparatus is also disclosed. |
| US09818076B2 |
Visual resource allocation system
A system is provided that visualizes an allocation of resources. The system displays a chart, where the chart includes a list of tasks and a timeline including time units. The system further displays task indicators within the timeline of the chart, where a task indicator includes task indicator segments, and where an area of a task indicator segment is proportional to a work scope of a resource allocated to a corresponding task. The system further receives a user interaction that includes a movement of the task indicator segment from a first task indicator that corresponds to a first task to a second task indicator that corresponds to a second task. The system further allocates the resource from the first task to the second task. The system further modifies the display of at least one task indicator within the timeline of the chart based on the allocation of the resource. |
| US09818071B2 |
Authorization rights for operational components
Various methods and systems include exemplary implementations for a security-activated operational component. Possible embodiments include but are not limited to obtaining access to an object data file configured to implement various functional operation regarding one or more objects; verifying validity of an authorization code associated with the object data file; and controlling operation of the operational component to enable or prevent its activation pursuant to the authorization code in accordance with one or more predetermined conditions. |
| US09818067B2 |
Self-learning log classification system
A self-learning system for categorizing log entries may be provided. A text classifier may identify a log description of a log entry in response to text of the log description being associated with indicators of a word model. A datafield classifier may generate a datafield metrics including an accuracy of the categorical identifiers representing the datafield. A metafield classifier may generate a context metrics for the context of the log entry, the context metrics including an accuracy categorical identifiers representing the metafields. A combination classifier may form a weighted classification set and select a categorical identifier as being representative of the datafield based on the weighted classification set. A categorical controller may identify new categories based on an analysis of the context metrics of the log entry. |
| US09818063B2 |
Forecasting interest in an object over a future period of time using a three-stage time-series analysis process
Information related to a time series can be predicted. For example, a repetitive characteristic of the time series can be determined by analyzing the time series for a pattern that repeats over a predetermined time period. An adjusted time series can be generated by removing the repetitive characteristic from the time series. An effect of a moving event on the adjusted time series can be determined. The moving event can occur on different dates for two or more consecutive years. A residual time series can be generated by removing the effect of the moving event from the adjusted time series. A base forecast that is independent of the repetitive characteristic and the effect of the moving event can be generated using the residual time series. A predictive forecast can be generated by including the repetitive characteristic and the effect of the moving event into the base forecast. |
| US09818061B1 |
Collaboration of audio sensors for geo-location and continuous tracking of multiple users in a device-independent artificial intelligence (AI) environment
Audio sensors collaborate for geo-location and tracking of multiple users. Different users can be independently geo-located and tracked within the AI environment. Location is determined from two or more AI clients of known locations that detect an event such as a human voice command to connect a call with a specific user. Responsive to classification of the event in view of the estimated location, a command for an AI action, such as connecting a call between users, is received for a response to the event at the AI clients that detected the event, or others. |
| US09818059B1 |
Exploiting input data sparsity in neural network compute units
A computer-implemented method includes receiving, by a computing device, input activations and determining, by a controller of the computing device, whether each of the input activations has either a zero value or a non-zero value. The method further includes storing, in a memory bank of the computing device, at least one of the input activations. Storing the at least one input activation includes generating an index comprising one or more memory address locations that have input activation values that are non-zero values. The method still further includes providing, by the controller and from the memory bank, at least one input activation onto a data bus that is accessible by one or more units of a computational array. The activations are provided, at least in part, from a memory address location associated with the index. |
| US09818054B1 |
Tag with tunable retro-reflectors
A data readout device is provided and includes a reflective base, reflective sidewalls disposed about the reflective base and an actuation system. The actuation system is configured to modify relative positioning of one of the reflective base and the reflective sidewalls to either reflect incoming radiation back toward an origin thereof or to reflect the incoming radiation away from the origin thereof. |
| US09818053B2 |
Identification of objects using frequency characteristics of RFID tags
An apparatus that identifies an object includes a frequency detector (112) that detects a frequency over which an RFID tag (102) communicates, and an object identifier (120) that identifies the object based at least in part upon the detected frequency. The frequency detector may detect a plurality of frequencies over which a plurality of RFID tags transmit information. The apparatus also optionally includes a frequency pattern generator that generates a frequency pattern that is indicative of an identity of the object, wherein the object identifier compares the generated frequency pattern with known frequency patterns to determine the identity of the object. |
| US09818052B2 |
Image forming apparatus for printing copy of id card with utlization purpose text overlapped thereon, and image forming method and tangible computer-readable recording medium for the same
Disclosed is an image forming apparatus including: an image obtaining unit configured to obtain an image of an identification card; a printing unit; a utilization purpose entry receiving unit configured to receive an entry of a utilization purpose of a document to be printed by the printing unit; and a control unit configured to overlap a text indicating the utilization purpose received by the utilization purpose entry receiving unit, with the image of the identification card, and to instruct the printing unit to print the overlapped text and the image of the identification card. |
| US09818050B2 |
Image forming apparatus that detects overlap of color material, image processing apparatus and image processing method
An image forming apparatus for forming an image on a recording material by a plurality of color materials, the apparatus includes: a determination unit configured to determine, based on converted data that are converted from image data corresponding to each image formed by the plurality of color materials, values each relating to an area of a respective color material caused to adhere to a recording material; and a detection unit configured to detect, based on the values each relating to the area of the respective color material that the determination unit determines, an overlapping of color materials. |
| US09818046B2 |
Data conversion unit and method
Embodiments relate to a data conversion unit including a color analysis portion configured to determine based on R (red), G (green) and B (blue) data signals among the R, G, B data signals and W (white) data signal for an input image whether or not the input image includes a pure color component; and a brightness adjustment portion configured to adjust brightness of the W data signal according to a hue of the pure color component included in the input image. |
| US09818042B2 |
Method of incident scene focus area determination
Data analytics engines and methods of incident scene focus area determination. The method includes receiving a plurality of directional inputs from a plurality of sources. The method also includes assigning weighting factors to the plurality of directional inputs. The method further includes generating weighted position vectors for each of the plurality of sources based on the plurality of directional inputs and the weighting factors. The method also includes determining when the weighted position vectors for at least two sources of the plurality of sources intersect. The method further includes determining an intersection location and a confidence level based on the weighted position vectors of the at least two sources. The method also includes identifying an incident scene focus area based on the intersection location and the confidence level. |
| US09818040B2 |
Method and device for detecting an object
It is provided a method for detecting an object in a left view image and a right view image, comprising steps of receiving the left view image and the right view image; detecting a coarse region containing the object in one image of the left view image and the right view image; detecting the object within the detected coarse region in the one image; determining a coarse region in the other image of the left view image and the right view image based on the detected coarse region in the one image and offset relationship indicating position relationship of the object in a past left view image and a past right view image; and detecting the object within the determined coarse region in the other image. |
| US09818038B2 |
Image recognition apparatus
An image recognition apparatus includes a memory, an interface and a processor. The memory stores identification information obtained from code information attached to the objects and image information on the objects used for object recognition, the storage storing the identification information and the image information for each of objects to be recognized. The processor which controls to: extract a target object region including an object therein from a photographed image; extract code information in the target object region and recognize the identification information based on extracted code information; and recognize the object based on an image of the target object region and image information on each object, if the processor fails to recognize the object based on the code information. |
| US09818029B2 |
Apparatus and method for computer aided diagnosis (CAD) based on eye movement
An apparatus and a method for Computer Aid Diagnosis (CAD) based on eye movement are provided. The apparatus includes a gaze area detector configured to detect, based on eye movement of a user, a gaze area on a medical image on which a region of interest (ROI) is detected, the gaze area being an area at which the user gazes for a period of time. The apparatus further includes an ROI redetector configured to detect another ROI on the gaze area. |
| US09818028B2 |
Information processing apparatus for obtaining a degree of similarity between elements
An information processing apparatus includes a first acquiring unit, an addition unit, a second acquiring unit, and an extraction unit. The first acquiring unit acquires a first group of elements included in a first image generated by reading a document. The addition unit generates multiple second images by adding noises that differ from each other to the first image. The second acquiring unit acquires second groups of elements included in the respective multiple second images. The extraction unit extracts an element representing characteristics of the document from the first group of elements in accordance with the degrees of similarity between elements included in the first group of elements and elements included in the multiple second groups of elements. |
| US09818027B2 |
Image forming apparatus and image forming system
An image forming apparatus forms only a required entry field on an application form, and, upon the application form in which this location has been filled in being scanned, further forms an additional entry field and prompts the applicant to fill in this entry field. An application form that has been completely filled in by the applicant is created by repeating this processing. |
| US09818025B2 |
Discrimination container generation device and pattern detection device
A discriminator generation device 10 includes a feature quantity extraction unit 13 which, using at least two pattern groups having patterns of different sizes for a detection object, extracts a feature quantity of patterns configuring each pattern group, and a discriminator generation unit 14 which generates a discriminator for detecting a detection object of a size corresponding to each pattern group in an image based on the feature quantity of the patterns of each pattern group. |
| US09818024B2 |
Identifying facial expressions in acquired digital images
A face is detected and identified within an acquired digital image. One or more features of the face is/are extracted from the digital image, including two independent eyes or subsets of features of each of the two eyes, or lips or partial lips or one or more other mouth features and one or both eyes, or both. A model including multiple shape parameters is applied to the two independent eyes or subsets of features of each of the two eyes, and/or to the lips or partial lips or one or more other mouth features and one or both eyes. One or more similarities between the one or more features of the face and a library of reference feature sets is/are determined. A probable facial expression is identified based on the determining of the one or more similarities. |
| US09818022B2 |
Method of detecting object in image and image processing device
At least one example embodiment discloses a method of detecting an object in an image. The method includes receiving an image, generating first images for performing a first classification operation based on the received image, reviewing first-image features of the first images using a first feature extraction method with first-type features, first classifying at least some of the first images as second images, the classified first images having first-image features matching the first-type features, reviewing second-image features of the second images using a second feature extraction method with second-type features, second classifying at least some of the second images as third images, the classified second images having second-image features matching the second-type features and detecting an object in the received image based on results of the first and second classifying. |
| US09818020B2 |
Fingerprint pore analysis for liveness detection
Various examples of systems, methods, and programs embodied in computer-readable mediums are provided for fingerprint liveness detection. Fingerprint liveness may be determined by evaluating pixels of a fingerprint image to identify pores along a ridge segment of the fingerprint image. A circular derivative operator can be used to identify the pores. Liveness of the fingerprint can be determined based upon features of the identified pores. |
| US09818018B2 |
Flexible fingerprint sensor materials and processes
A flexible fingerprint sensor laminate comprising: a layer of flexible substrate having a front surface and a back surface, at least a domain of electrically conductive material deposited on the front surface, a protective hard coating layer that covers the domain of electrically conductive material, and a plurality of sensor electrodes deposited preferably on the back surface and related circuitry (e.g. integrated circuit for driving and sensing). Preferably, the layer of flexible substrate is no greater than 20 μm in thickness, the domain of electrically conductive material has a thickness no greater than 2 μm, the protective hard coating has a thickness no greater than 1 μm, and the laminate has a surface sheet resistance no greater than 200 Ohm per square and surface scratch resistance no less than 3 H. The laminate exhibits good scratch resistance, low sheet resistance, good flexibility and mechanical integrity. The invention also provides a biometric sensor, such as a fingerprint sensor. The invention further provides a process for producing such a sensor laminate. |
| US09818017B2 |
Fingerprint identification module
A fingerprint identification module includes a cover plate, a fingerprint identification sensor, at least one light source, and a plurality of fibers. The cover plate has an inner surface and an outer surface opposite to the inner surface. The fingerprint identification sensor and the at least one light source are located under the inner surface, and the at least one light source is located adjacent to the fingerprint identification sensor. The fibers are arranged in an array and are located between the cover plate and the fingerprint identification sensor, wherein each of the fibers has a light incident surface. The light incident surface faces the inner surface and is inclined relative to the inner surface. |
| US09818015B2 |
Electronic device including movement based artifact removal and related methods
An electronic device may include a finger biometric sensor that includes an array of electric field sensing pixels and image data output circuitry coupled thereto and capable of outputting image data from a plurality of sub-arrays of the array of electric field sensing pixels and processing circuitry coupled to the image data output circuitry. The processing circuitry is capable of determining movement of a user's finger across the array of electric field sensing pixels by comparing image data from borders of adjacent sub-arrays, the movement causing artifacts in the image data, and, when movement of the user's finger is determined, remove the artifacts from the image data. |
| US09818014B2 |
Surface sensor
A sensor unit for measuring surface structures and properties of an object of organic tissue includes a contact surface adapted to have mechanical contact with the object, a first dielectric layer made from a dielectric material, a first conductor layer including at least one shielding electrode essentially covering an area of the dielectric layer facing the contact surface, the at least one shielding electrode surrounding at least one essentially non-conductive aperture defining a sensing region, and a second conductor layer separated from the first conductor layer by the first dielectric layer and comprising a number of conductive wires extending at least partially under the at least one aperture and having a direction essentially perpendicular to the sensing region, each wire having a predetermined width. A sensing area of each wire is defined by the width and the length of each wire extending in the sensing region. |
| US09818013B2 |
Mobile computer configured to read multiple decodable indicia
A device can comprise a processor, a memory, an imaging subsystem configured to acquire an image of decodable indicia, a display, and a communication interface. The device can be configured, responsive to acquiring an image of one or more objects within a field of view of the imaging subsystem, to locate within the image and decode one or more decodable indicia. The device can be further configured to display the image on the display and visually mark the one or more successfully decoded decodable indicia. The device can be further configured, responsive to accepting user input selecting at least one decodable indicia of the displayed one or more decodable indicia, to transmit to an external computer at least one decoded message corresponding to the at least one decodable indicia. |
| US09818010B2 |
Barcode-reading system
This patent specification describes operations of a mobile device with barcode-reading capabilities and an application and license server. A mobile device may include a barcode-reading application downloaded from an application server. The barcode-reading application may operate in a base mode or an enhanced mode. In the base mode, the barcode-reading application may establish a network connection to a licensing server to obtain a license code, and determine at least one operating permission authorized by the license code. In the enhanced mode, the barcode-reading application may implement at least one enhanced barcode-reading function which corresponds to the at least one operating permission authorized by the license code. For example, the enhanced barcode-reading function may be a function of decoding a barcode symbology that the decoder is restricted from decoding in the base mode of operation. |
| US09818008B2 |
RFID tag embedded within an attachable identifier for a molded connector and a tracking system therefor
An electrical asset for distributing power for use with a Radio Frequency Identification (“RFID”) tracking system and middleware. The electrical asset includes at least one attachable identifier defining an external surface and at least one radially extending portion or axially extending portion. An RFID transponder is molded into the attachable identifier and embedded within the radially or axially extending portion, and below the exterior surface of, the attachable identifier. The transponder is configured to transmit a first signal to a transmitting and receiving device and receive a second signal from the transmitting and receiving device. |
| US09818006B1 |
RFID tag programming in a duplexer
A method of programming an RFID tag in an image-forming device is disclosed. The RFID tag is programmed while media is paused in a duplex media path. The RFID tag is programmed using an antenna located between a simplex media path and the duplex media path. Other methods and systems are disclosed. |
| US09817997B2 |
User-generated content permissions status analysis system and method
A method for user-generated content privacy control, including: detecting a trigger event, identifying a post for permissions analysis, determining permissions for the post, and storing the updated permissions in a post indexing system. |
| US09817993B2 |
UICCs embedded in terminals or removable therefrom
The invention proposes several improvements related to the management of secure elements, like UICCs embedding Sim applications, these secure elements being installed, fixedly or not, in terminals, like for example mobile phones. In some cases, the terminals are constituted by machines that communicate with other machines for M2M (Machine to Machine) applications. |
| US09817990B2 |
System and method of encrypting folder in device
Provided are a system and method of encrypting a folder in a device. The device for controlling access to the folder includes a communication part configured to transmit, to a server, an encryption key generation request with respect to the folder, and receive, from the server, an encryption key associated with the folder that is generated in response to the encryption key generation request, wherein the encryption key generation request includes an identification of the folder and authentication data of a user who accesses the folder is an authorized user; and a controller configured to authenticate the user by using the encryption key. |
| US09817985B2 |
Content management system, content management server and management program for server, client terminal and management program for terminal, and removable media
A content management system including a content management server and a client terminal connected to the content management server via a communication network, wherein the content management server transmits, to the client terminal, a management server ID identifying the content management server and a content deletion request, the client terminal receives the management server ID and the content deletion request from the content management server, determines whether or not the received management server ID matches a management server ID saved on the client terminal side, and if they match, deletes the content saved on the client terminal side, in a removable media, the content corresponding to the deletion request. A content, that is saved in various forms on the client terminal side is disabled for playback at an appropriate timing; accordingly, it is possible to reduce risks such as information leakage to ensure security, and also ensure content integrity. |
| US09817983B2 |
Mobile Printing
A method of printing comprising, at an imaging device, receiving a print-by-reference print request and an encryption key from a mobile device, transmitting the print-by-reference print request and the encryption key to a print service, receiving encrypted print content from the print service, receiving a decryption key from the mobile device, decrypting the encrypted print content, creating decrypted print content, and printing the decrypted print content. A method of printing content requested from a mobile device, comprising receiving a print request and encrypted print content, receiving a decryption key from the mobile device, decrypting the encrypted print content, and printing the decrypted print content. |
| US09817972B2 |
Electronic assembly comprising a disabling module
An electronic assembly for an electronic device may include a detection module to detect a security anomaly of a Rich-OS operating system and a disabling module to disable at least one secure function of the electronic device in response to the detection. The disablement nevertheless allows use of the electronic device in fail-soft mode. The electronic assembly may be implemented such that these two modules are dependent on a trusted operating system, and the trusted operating system and the Rich-OS operating system may be stored in a memory of the electronic assembly and executed on the electronic assembly. |
| US09817970B2 |
Method for detecting attacks on virtual machines
The invention relates to a method for detecting attacks on at least one virtual machine in a system including at least one host server (10) hosting a set of virtual machines (VM1, VM2, VM3, etc.), the method including the steps of: receiving (E2) an alert indicating a breakdown in performance in a virtual machine; verifying (E3) that a mechanism for managing resource contention has been implemented for the virtual machine; detecting (E5), over a given time interval, at least one time correlation between the breakdown in performance that occurred in the virtual machine and a variation in the use of at least one resource of the host server by at least one other virtual machine, data representing the use of resources being collected at regular intervals. |
| US09817965B2 |
System and method for authentication with a computer stylus
A method for securing operation of a computing device operated with a stylus includes recognizing a pre-defined gesture performed by a stylus on a touch screen, the pre-defined gesture defined as a user command to lock an item displayed on the touch screen, determining a location of the gesture, determining identity of the stylus, locking an item displayed at the location determined, and recording identity of the stylus. A method for operating a computing device with a stylus includes receiving a command with a stylus to add restricted annotations to a document, receiving identity of the stylus, linking an annotation to the identity, restricting display of the annotation on the document to a computing device receiving input from the stylus; and displaying the document absent the at least one annotation on a computing device on which input from the stylus is not received. |
| US09817963B2 |
User-touchscreen interaction analysis authentication system
A user participating in an e-commerce session can be authenticated based on user-touchscreen interaction analysis. That is, a user requested action can be determined that requires additional authentication. Such authentication can further include, requesting analysis of user-touchscreen interaction for the e-commerce session and receiving a pattern matching score for the session from a computer. The pattern matching score can provide an indication of a comparison between the user's interaction with a touchscreen during the session and a pre-established user-touchscreen interaction profile for the user. A computer can perform a verification action to verify an identity of the user based on the received pattern matching score. Responsive to a successful verification of the identity, the computer can perform the requested action. |
| US09817956B2 |
User authentication and data encryption
A user is authenticated based on feature data of a target such as a body-part or other object obtained by a touchscreen of a computing device. When the user positions the target to interact with the touchscreen, interaction data is gathered. Feature data of the target is determined from the gathered interaction data. The feature data is used to identify one or more of the target and the user. Various actions are executed based on the identification and authentication of the user. |
| US09817951B2 |
System and method for analyzing a device
A system and method for analyzing a device are disclosed. In an aspect, a method can comprise determining a parameter of a device at a kernel level of a software stack associated with the device, analyzing the parameter to determine an event state, comparing the event state to a white list to determine a state of an alert trigger, and generating an alert in response to the determined state of the alert trigger. |
| US09817944B2 |
Systems and methods for analyzing sequence data
The invention provides methods for comparing one set of genetic sequences to another without discarding any information within either set. A set of genetic sequences is represented using a directed acyclic graph (DAG) avoiding any unwarranted reduction to a linear data structure. The invention provides a way to align one sequence DAG to another to produce an alignment that can itself be stored as a DAG. DAG-to-DAG alignment is a natural choice wherever a set of genomic information consisting of more than one string needs to be compared to any non-linear reference. For example, a subpopulation DAG could be compared to a population DAG in order to compare the genetic features of that subpopulation to those of the population. |
| US09817939B2 |
Placing and routing debugging logic
Embodiments relate an emulation environment that places debugging logic in a manner that connections between the debugging logic and logic components outputs can be efficiently routed. In one embodiment, the host system places the debugging logic after placing the logic components of the DUT, but before routing the logic components. In another embodiment, the host system places debugging logic after placing and routing logic components of the DUT. In another embodiment, for one or more emulator FPGAs, the host system places debugging logic units of the debugging logic evenly across the FPGA before placing logic components of the DUT. |
| US09817938B2 |
Apparatus and method for providing arrangement pattern
An apparatus for providing an arrangement pattern includes an input unit configured to receive an input of group information of groups, the groups comprising a plurality of components having the same function and being classified based on a predetermined standard; an arrangement pattern calculation unit configured to determine an arrangement pattern for arranging the plurality of components on a printed circuit board (PCB) so that first components of a first group of the groups are dispersedly arranged amongst the plurality of components based on the group information of the groups; and an output unit configured to output the determined arrangement pattern. |
| US09817928B2 |
Latch-up suppression and substrate noise coupling reduction through a substrate back-tie for 3D integrated circuits
Roughly described, an integrated circuit device has a conductor extending entirely through the substrate, connected on one end to the substrate topside surface and on the other end to the substrate backside surface. In various embodiments the conductor is insulated from all RDL conductors on the backside of the substrate, and/or is insulated from all conductors and device features on any below-adjacent chip in a 3D integrated circuit structure. Methods of fabrication are also described. |
| US09817927B2 |
Hard mask etch and dielectric etch aware overlap for via and metal layers
A method and apparatus for generating a final dielectric etch compensation table and a final hard mask etch compensation table for either OPC or MPC process flows are provided. Embodiments include performing an overlap pattern classification on a wafer; calibrating a dielectric etch bias or a hard mask etch bias based on the pattern classification; comparing either a CD overlap of a via layer with a metal layer and a CD overlap of the via layer with a lower connecting metal layer or a CD overlap of the metal layer with an upper connecting via layer and a CD overlap of the metal layer with the via layer against a criteria; outputting final dielectric etch compensation and hard mask etch compensation tables to either OPC or MPC process flows; and repeating the steps of calibrating, comparing, and outputting for either the via layer or metal layer remaining. |
| US09817925B1 |
Probit method of cumulative distribution function determination of energetic sensitivity
Embodiments of the invention disclose the determination of the actual shape of a cumulative distribution function (CDF) for an energetic composition. Sensitivity tests and historical data are configured for input into an electronic processor. An energetic determination tool is configured to determine the actual shape of the CDF. The actual shape of the CDF is output in a tangible medium. |
| US09817923B2 |
Part made from 3D woven composite material
A method designing a part made of 3D woven composite material, performed by a computer, the method including: obtaining shape data representing an outside surface of the part; for each point of a set of points of the outside surface, determining a distance between the point and a projection of the point onto a target surface, the projection being along a predetermined projection direction; determining a structure of a 3D woven preform as a function of the determined distances; and obtaining projection data specifying a projection direction as a function of a position of a point on the outside surface of the part, wherein the projection direction that is used for at least some of the points of the set of points is determined during the determining a distance, as a function of the projection and as a function of the position of the point. |
| US09817921B2 |
Information processing apparatus and creation method for creating a playlist
An information processing apparatus is disclosed which includes a control portion configured to allow a user to hand-draw and input a picture as a tag to be associated with user-designated contents so as to create a playlist of the contents based on degrees of similarity between the pictures associated with the contents as the tags thereof. |
| US09817920B1 |
Locating meaningful stopwords or stop-phrases in keyword-based retrieval systems
A stopword detection component detects stopwords (also stop-phrases) in search queries input to keyword-based information retrieval systems. Potential stopwords are initially identified by comparing the terms in the search query to a list of known stopwords. Context data is then retrieved based on the search query and the identified stopwords. In one implementation, the context data includes documents retrieved from a document index. In another implementation, the context data includes categories relevant to the search query. Sets of retrieved context data are compared to one another to determine if they are substantially similar. If the sets of context data are substantially similar, this fact may be used to infer that the removal of the potential stopword(s) is not material to the search. If the sets of context data are not substantially similar, the potential stopword can be considered material to the search and should not be removed from the query. |
| US09817919B2 |
Agglomerative treelet restructuring for bounding volume hierarchies
A system, method, and computer program product are provided for modifying a hierarchical tree data structure. An initial hierarchical tree data structure is received, and treelets of node neighborhoods are formed. A processor restructures the treelets using agglomerative clustering to produce an optimized hierarchical tree data structure that includes at least one restructured treelet, where each restructured treelet includes at least one internal node. |
| US09817918B2 |
Sub-tree similarity for component substitution
Systems and methods of determining sub-tree similarity for component substitution. A method includes assigning a similarity metric to a plurality of trees stored in computer-readable media. The method also includes constructing a distance matrix in computer-readable media, the distance being between sub-trees. The method also includes correlating sub-trees in the computer-readable media based on the distance matrix. |
| US09817917B2 |
System integrator and method for mapping dynamic COBOL constructs to object instances for the automatic integration to object-oriented computing systems
A system integrator for modeling an object instance of a COBOL data set, the object instance including representations of OCCURS DEPENDING ON clauses or REDEFINE clauses. The system comprises a client interface module, an import module, an object model module and modeler module. The client interface module generates an interface and receives a copybook selection and a set of REDEFINE criteria. The import module receives the copybook selection and imports a copybook from a database. The object model module receives the copybook and the set of REDEFINE criteria, and creates a customized object model for the copybook. The modeler module receives the customized object model and a set of COBOL data, and forms an object instance equivalent to the set of COBOL data, the object instance including representations of a OCCURS DEPENDING ON clause or REDEFINE clause. |
| US09817910B2 |
Restful service description language
A processing device identifies uniform resource identifiers (URIs) for a RESTful (Representational State Transfer) web service in a server and creates server-side metadata describing each of the URIs without nesting metadata of one of the URIs in metadata of another one of the URIs. The processing device creates a file that includes the URIs and the corresponding server-side metadata for the corresponding URI to describe the RESTful web service. |
| US09817908B2 |
Systems and methods for news event organization
Generally discussed herein are systems, apparatuses, and methods for organizing and/or searching news events. In one or more embodiments, a method can include encoding a news event based on named entities, actors, and actions mentioned in the news event, calculating a locality sensitive hash (LSH) key on the news event encoding, comparing the calculated LSH key to a plurality of LSH keys of respective stories, wherein each story of the respective stories comprises one or more associated news events that include LSH keys that are within a specified distance from each other, and associating the news event with a story of the respective stories that includes an LSH key that has a smallest distance from the LSH key of the received news event and is less than the specified distance. |
| US09817901B1 |
System and method for search with the aid of images associated with product categories
The present application describes performing a user initiated search query comprising receiving user input comprising description details of at least one desired object, retrieving a plurality of objects from a database sharing one or more of the description details of the user input, retrieving an image of the at least one desired object based on one or more of the plurality of objects, generating a contour of the image and comparing the generated contour with other related contours of other images stored in the database, displaying all of the available contours of all of the images that match the generated contour, receiving a selection of one of the available contours from the user and performing the search query based on the user selected contour. |
| US09817900B2 |
Interactive clothes searching in online stores
A clothing search system provides a clothing search to users using a component-based image search. Retailer catalogs are analyzed to determine clothing components within clothing images. Features associated with the components are determined. When a user requests a clothing search, the clothing search system selects clothing based on the components and features requested by the user. The user may also provide an image to the clothing search system. The clothing search system determines components and features of the image and identifies clothing with matching components. |
| US09817894B2 |
Fast search in a music sharing environment
A method, apparatus and system of method and system of directory sharing and management in a group communication environment is disclosed. In one embodiment, a method of a fast-search server includes processing a character of a query of music data, referencing the character with a reverse index of a music database, determining that the character matches a data record of the music database using the reverse index and returning the data record of the music database prior to receiving all characters of the query of music data from a user. The reverse index may be created from a combination of letters appearing as a string in a data field of the music database. The method may include preforking the character of the query of music data along with other processes in the fast-search server to minimize concurrency issues and to minimize threading locks. |
| US09817892B2 |
Automated removal of private information
Systems, methods, and media for the automated removal of private information are provided herein. In an example implementation, a method for automatic removal of private information may include: receiving a transcript of communication data; applying a private information rule to the transcript in order to identify private information in the transcript; tagging the identified private information with a tag comprising an identification of the private information; applying a complicate rule to the tagged transcript in order to evaluate a compliance of the transcript with privacy standards; removing the identified private information from the transcript to produce a redacted transaction; and storing the redacted transcript. |
| US09817889B2 |
Speech-based pronunciation symbol searching device, method and program using correction distance
The present invention relates to a searching device, searching method, and program whereby searching for a word string corresponding to input voice can be performed in a robust manner.A voice recognition unit 11 subjects an input voice to voice recognition. A matching unit 16 performs matching, for each of multiple word strings for search results which are word strings that are to be search results for word strings corresponding to the input voice, of a pronunciation symbol string for search results, which is an array of pronunciation symbols expressing pronunciation of the word string search result, and a recognition result pronunciation symbol string which is an array of pronunciation symbols expressing pronunciation of the voice recognition results of the input voice. An output unit 17 outputs a search result word string which is the result of searching the word strings corresponding to the input voice from the multiple word strings for search results, based on the matching results of the pronunciation symbol string for search results and the recognition result pronunciation symbol string. The present invention can be applied in the case of performing voice searching, for example. |
| US09817887B2 |
Universal text representation with import/export support for various document formats
Disclosed are systems, computer-readable mediums, and methods for representing text. A document that includes text is received in a first format. A universal text representation of the document is created using a first filter associated with the first format. The universal text representation presents the text and supported non-text data and preserves unsupported data with binding to supported data. The universal text representation is modified based upon input from a user using a program in a what you see is what you get (WYSIWYG) mode. The user can see a location of where the supported data and unsupported data are kept. The modified universal text representation is exported using a second filter associated with a second format. The supported and unsupported non-text data are exported. |
| US09817886B2 |
Information retrieval system for archiving multiple document versions
An information retrieval system uses phrases to index, retrieve, organize and describe documents. Phrases are identified that predict the presence of other phrases in documents. Documents ate the indexed according to their included phrases. Index data for multiple versions or instances of documents is also maintained. Each document instance is associated with a date range and relevance data derived from the document for the date range. |
| US09817883B2 |
Event-related media management system
An event-related media management system contextualizes media content. The event-related media management system associates media content with contextual event-related data to associate the media content with the events and information about the events. The contextual event-related data can then be used to provide access to the media content, such as through relevant search results or by presenting the media content in organized displays for contextual browsing and navigation. In some embodiments the event-related media management system generates contextualized media content for contextual search, discovery, and advertising. |
| US09817879B2 |
Asynchronous data replication using an external buffer table
Embodiments of the present invention provide, systems, methods, and computer program products for asynchronously replicating data from source tables of a source computer system to target tables of a target computer system. Embodiments of the present invention implement an external buffer table (EBT) from which changed data statements can be selectively applied to target tables, which can reduce the number of statements applied to the target tables of the target computer system. |
| US09817875B2 |
Methods and systems for automated data characterization and extraction
A system and method for characterizing textual data by generating a first data abstraction based on a set of textual data. The first data abstraction can be presented to a user, and the user can provide instructions to make changes to the first data abstraction to generate a second data abstraction. The textual data can be extracted and characterized from the set of textual data using the second data abstraction. |
| US09817871B2 |
Prioritized retrieval and/or processing of data via query selection
Systems and methods of prioritizing retrieval and/or processing of data related to a subset of attributes based on a prediction of associated values are presented herein. In certain implementations, a request for values associated with respective first attributes may be received. Based on the request, first queries for data related to the first attributes may be performed. Based on the first queries, a first subset of data related to calculating at least some of the associated values may be received. At least some of the associated values may be predicted based on the first subset of data. Based on the prediction of the associated values, retrieval and/or processing of data related to a first subset of the first attributes may be prioritized over retrieval and/or processing of data related to one or more other subsets of the first attributes. |
| US09817858B2 |
Generating hash values
The present disclosure involves systems, software, and computer implemented methods for generating a hash identifier. One example method includes: identifying a record to include in a table, the record associated with two or more primary key fields that are concatenated to create a concatenated key, wherein the table includes one or more hash columns for storing hash identifiers; applying a hash function to the concatenated key to create a new hash value; determining whether a record in the table has a hash value matching the new hash value; in response to determining that a hash value of a record matches the new hash value and the concatenated key of the identified record does not match the concatenated key of any existing record, adding a counter to the new hash value to generate a unique hash ID; and storing the record, including the unique hash ID, in the table. |
| US09817857B2 |
Deep cloning of objects using binary format
Techniques are described herein that are capable of deep cloning (a.k.a. deep copying) objects using a binary format. A deep clone of a designated object includes references to other objects (and potentially copies of the other objects) included in the designated object. A binary representation of each object in an object graph is generated to provide a binary clone of the object graph. Objects created by a dynamic language engine are called dynamic language objects. Objects created by a host (e.g., that hosts the dynamic language engine) are called host objects. Each host object is associated with an intermediate representation thereof via a property bag that describes properties of that host object. Each intermediate representation is understandable by the dynamic language engine. A binary representation of each dynamic language object and each host object may be generated in accordance with the binary format to provide the binary clone. |
| US09817852B2 |
Electronic system with version control mechanism and method of operation thereof
An electronic system includes: a storage device configured to store a descriptor, including a key and a value, having multiple versions linked on the storage device; a storage interface, coupled to the storage device, configured to provide an entry having a location; and retrieve the descriptor, including the key and the value, based on the entry having the location for selecting one of the versions of the descriptor. |
| US09817851B2 |
Dyanmic data-driven generation and modification of input schemas for data analysis
The present disclosure describes methods, systems, and computer program products for dynamic generation and modification of input schemas. One computer-implemented method includes receiving event data from a data source with an event collector, the data source registered with the event collector to transmit event data to the event collector, transmitting the received event data for analysis, saving the transmitted event data, determining whether to create or update a business intelligence view, determining whether to create or update an input schema based on the saved event data, and providing, by a computer, an input schema describing how data is represented in the database to a query generation engine. |