| Document | Document Title |
|---|---|
| US09787583B2 |
Methods and apparatus for implementing connectivity between edge devices via a switch fabric
In some embodiments, an apparatus includes a first edge device that is operatively coupled to a second edge device via a switch fabric. The first edge device and the second edge device collectively define an edge device network operating with a network-address-based protocol. The first edge device communicates with the second edge device via a multiprotocol label switching (MPLS) tunnel through the switch fabric. Furthermore, the first edge device is operatively coupled to the switch fabric such that a node of the switch fabric can be modified without coordination of the edge device network. Additionally, the first edge device is operatively coupled to the second edge device to define the edge device network such that an edge device of the edge device network can be modified without coordination of the switch fabric. |
| US09787582B1 |
Cloud router
A computer implemented method, system, and program product comprising presenting, via cloud router, clouds as a single cloud to a client, wherein the client communicates with the single cloud via a client API of the cloud router. |
| US09787580B2 |
Network system and routing method
In an OpenFlow network, a “proactive type” is attained and hardware (HW) performance problem is solved. Specifically, in the OpenFlow network, each of a plurality of switches executes, on a reception packet that meets a rule of an entry registered in its own flow table, an operation based on an action defined in the entry. A controller registers an entry, in which an identifier unique to a path calculated based on a physical topology of a network composed of the plurality of switches is set as a rule and an output from a predetermined output port as an action, in each of the plurality of switches before communication is started among the plurality of switches. |
| US09787578B2 |
Systems and methods of IPV6 mapping
Example embodiments of the systems and methods of IPv6 mapping disclosed herein involve computing an IPv6 source and/or destination address based on the type of service being used by the user, which is derived from the digits input to the device by the user or system, and the destination phone number input by the user. The mapping is done in second half (for example, 64 bits) of the IPv6 address (the interface ID). The first half of the IPv6 address is a defined subnet (known as a “prefix” in IPv6 terms) for phone number routing. The subnet comprises a global routing prefix and a subnet identification. The interface ID is split into three sections: an identifier, a country code, and an end point number. |
| US09787576B2 |
Propagating routing awareness for autonomous networks
Techniques for propagating routing awareness for autonomous networks are described. In at least some embodiments, routing awareness refers to attributes of autonomous networks that route communication sessions between different endpoints. According to various embodiments, routing awareness indicates whether a particular autonomous network supports a protocol for propagating routing awareness among different autonomous networks. Routing awareness may also include performance attributes of autonomous networks. Such routing awareness enables entities involved in routing communication sessions to make informed decisions regarding routing and handling of communication sessions. |
| US09787571B2 |
Link delay based routing apparatus for a network-on-chip
A router of a network-on-chip receives delay information associated with a plurality of links of the network-on-chip. The router determines at least one link of a data path based on the delay information. |
| US09787566B2 |
Systems and methods for probing wired communication
Various systems and methods for probing a communication channel. These systems and methods transmit an error vector probe packet from a first transmitter while a second transmitter is active and transmitting. A network device may receive the error vector probe packet and measure an error vector magnitude based on the received error vector probe packet. Using the error vector magnitude, the network device estimates channel characteristics such as signal-to-noise ratio, data capacity, etc. The transmission can occur when more than one transmitter is active and transmitting. At least some of the other transmitters are active and transmit an analog zero signal, e.g., all digital zeros on the input to the digital-to-analog converter of a network device when an error vector probe packet is transmitted. |
| US09787565B2 |
Systems and methods for a call over network with a visualized summary
Systems and methods for a call over network (CON) with a visualized summary are provided. In some embodiments, after the call concludes, a visualized summary of the call can be generated. The summary includes any of the recording of the call, transcriptions, scenario information, speaker information and the duration each speaker was talking, etc. Scenario may be generated by comparing the call speaking pattern to known templates of call types. Additionally, participant features employed in the call may be summarized in chronological relation to the calls progression in a visual format. |
| US09787564B2 |
Algorithm for latency saving calculation in a piped message protocol on proxy caching engine
Methods and systems for determining latency in a communication network may be provided. A plurality of commands may be sent in the communication network. A response may be received for each of the plurality of commands from the communication network. A pipeline round trip time may be calculated for each of the plurality of commands based on a time of the response for each of the plurality of commands. A total round trip time for the plurality of commands may be calculated based on the calculated pipeline round trip time. A time saving may be calculated for at least one of the plurality of commands serviced locally. |
| US09787559B1 |
End-to-end monitoring of overlay networks providing virtualized network services
In one example, a network device external to a services complex injects a plurality of probe packets along service chains provided by the services complex, wherein each of the plurality of probe packets includes a first timestamp indicating a time at which the network device sent the respective probe packet. Each of a plurality of service nodes in the services complex modifies each of the plurality of probe packets by inserting a respective second timestamp indicating a respective time at which the respective service node processed the respective one of the plurality of probe packets. An analytics device aggregates probe report information received from each of the plurality of service nodes to determine one or more path monitoring metrics. |
| US09787550B2 |
Establishing a secure wireless network with a minimum human intervention
An example method disclosed herein includes receiving, at a controller device, a user input; based on the user input, displaying a prompt to direct a user to press one or more buttons on a playback device; subsequently, receiving from the playback device over a first network, network information associated with the playback device; determining, based on the received network information, that the playback device is not a part of a secure playback network; based on a determination that the network information is not a part of a secure playback network, generating network parameters for a secure second network; subsequently, (i) joining the secure second network based on the generated network parameters, and (ii) causing the playback device to join the secure second network based on the generated network parameters; and displaying an indication that the controller device and the playback device have joined the secure second network. |
| US09787549B2 |
Server virtualization
A resource requirements method and system is provided. The method includes identifying dependencies and calculating a utilization value for a source server. The source server is mapped to an application and a source infrastructure is compared to a target infrastructure. Deficiencies and differences associated with the target infrastructure are determined and dependency requirements for fulfillment in the target infrastructure are generated. The utilization value is compared to a resource capability of the target server and resource requirements for fulfillment on the target server are generated. |
| US09787548B2 |
Fast service discovery method and apparatus in dynamic resource environment using hierarchical bloom filters
Fast service discovery method and apparatus in a dynamic resource environment using hierarchical Bloom filters. The fast service discovery method includes when resources are discovered, hierarchically classifying the resources based on multiple levels, designing multiple hierarchical Bloom filters for respective pieces of level information to respectively correspond to the multiple levels, and transforming the resources into a resource coordinate system via the Bloom filters, and identifying an available service using the resource coordinate system. |
| US09787546B2 |
Network management system generating virtual network map and related methods
A network management system is for a network having network devices. The network management system includes a display, a memory, and a processor coupled to the display and memory and configured to send queries to the network devices, obtain responses from the network devices based upon the queries, and determine a physical network map for the network devices based upon the responses. The processor is also configured to establish connections with some of the network devices, determine a virtual network map for the network devices based upon the responses and the established connections, store mapping data related to the determined physical network map and virtual network map in the memory, and display an image on the display related to the stored mapping data. |
| US09787545B2 |
Dynamic point to point mobile network including origination device aspects system and method
A computationally implemented system and method that is designed to, but is not limited to: obtain information at least in part regarding one or more first aspects of one or more intermediate electronic communication devices for serving as one or more nodes of one or more standby point-to-point communication networks upon activation thereof for use by an origination electronic communication device to communicate at least in part with a destination electronic communication device, the one or more intermediate electronic communication devices having one or more second aspects as one or more mobile electronic communication devices. In addition to the foregoing, other method aspects are described in the claims, drawings, and text forming a part of the present disclosure. |
| US09787538B2 |
Wireless gigabit-enabled device configuration
A wireless high frequency directed communication-enabled device configured to determine a relative direction of a wireless high frequency directed communication-enabled station (e.g., dock or Access Point), and when in extended desktop mode and without user intervention, is configured with the relative direction of the wireless high frequency directed communication-enabled station. Also, the wireless high frequency directed communication-enabled device determines a relative direction for a wireless high frequency directed communication-enabled station, and is configured to display a direction and/or transmission quality for the wireless high frequency directed communication-enabled station. |
| US09787537B2 |
Customizable mobile broadband network system and method for customizing mobile broadband network
Embodiments of the present invention provide a customizable mobile broadband network system and a method for customizing a mobile broadband network. The mobile broadband network system includes a forwarding layer, a control layer, and a capability opening layer. The forwarding capability and the control capability of the mobile broadband network system according to the embodiments of the present invention are decoupled from each other, and the capability opening layer combines a required capability according to the network customization request, so as to manage the corresponding customized-network instance. Therefore, a mobile network can be customized according to a requirement of a user. |
| US09787536B2 |
Method and apparatus for configuring packet forwarding manner
A method and an apparatus for configuring a packet forwarding manner. The method includes receiving, by a control node (CN), a connection establishment request packet from a client device, and acquiring a user attribute according to the request packet; according to the user attribute and a forwarding policy, acquiring, by the first CN, a packet forwarding manner corresponding to the client device, where the forwarding policy includes a packet forwarding manner corresponding to the user attribute; and after authentication succeeds, sending, by the first CN, a message carrying the acquired packet forwarding manner to a wireless access point (AP) associated with the client device, so as to instruct the wireless AP to create a forwarding entry of the client device, where the forwarding entry includes the packet forwarding manner. The present invention implements user-based control of a packet forwarding manner, simplifying configuration and maintenance. |
| US09787535B2 |
Configuration of security devices using spatially-encoded optical machine-readable indicia
A method and system for configuring security devices on a security network. A mobile computing device reads spatially-encoded optical machine-readable indicia, decodes the indicia, and extracts encoded configuration information for the security devices. The configuration information from the indicia is then transmitted to a monitoring station, which uses the configuration information to configure communication with the security devices on the security network. |
| US09787526B2 |
Method and apparatus for providing mobile IP service through a network address translation gateway
Method and apparatus for providing Mobile internet protocol (IP) service through a network address translation gateway. In one example, a gateway between a local area network (LAN) and a wide area network (WAN) is provided. A foreign agent (FA) module is configured to advertise a care-of address (CoA) on the LAN and process registration and mobile IP communication traffic on the LAN and the WAN side of the gateway. A control module is configured to identify the registration and the mobile IP communication traffic on the LAN and the WAN. The control module sends mobile IP traffic to the FA and other traffic to a network address translation (NAT) module. In this manner, network address translation of mobile IP traffic is advantageously omitted. This allows the IP-in-IP tunnels used by mobile IP to pass through the gateway. |
| US09787525B2 |
Concurrency control in a file system shared by application hosts
A manager program for managing virtual machines includes a process which receives a notification message indicating an occurrence of an event affecting a data storage unit in a data storage system that supports a shared file system. The notification message might have come from a virtual machine host or resulted from a hardware reconfiguration. The manager program then determines whether another virtual machine host is sharing the data storage unit. The manager program might make this determination by polling each of the virtual machine hosts it manages or by checking information previously collected and stored in a database. If another virtual machine host is sharing the data storage unit, the manager program sends a refresh message to that virtual machine host that causes the virtual machine host to update information relating to the data storage unit in a cache associated with the virtual machine host. |
| US09787522B1 |
Data processing system having failover between hardware and software encryption of storage data
A computer of a data processing system includes a software encryption engine and path circuitry that initially provides one or more paths for conveying data of storage I/O requests to and from a storage device, the paths including an encrypting path having a hardware encrypting component. According to a failover technique, in a first operating state, (a) the data of the storage I/O requests is conveyed via the encrypting path with encryption and decryption of the data being performed by the hardware encrypting component, and (b) monitoring is performed for occurrence of an event indicating that the hardware encrypting component has become unavailable for encrypting and decrypting the data of the storage I/O requests. Upon occurrence of the event, if the path circuitry provides a non-encrypting path for conveying the data of the storage I/O requests to and from the storage device, then operation is switched to a second operating state in which the data of the storage I/O requests is conveyed via the non-encrypting path and is encrypted and decrypted by the software encryption engine. A failback technique provides for reverting to hardware-assisted encryption under proper circumstances. |
| US09787513B2 |
Sequence based data transmission with receivers having only sign information
The present invention relates to a transmitter, a receiver and to corresponding methods for transmitting and receiving data utilizing sequences of non-return-to-zero, inverted (NRZI) symbols and symbol rates higher than the Nyquist rate in data transmission systems, thus enabling an enlarged spectral efficiency while utilizing simple receivers only having sign information. |
| US09787510B2 |
Transpositional modulation systems and methods
Systems and methods for transpositional modulation and demodulation are provided. One such method for generating a signal includes the steps of providing a look-up table having a plurality of quarter-cycle waveforms, each of said quarter-cycle waveforms associated with a respective input level; receiving an input signal; and outputting quarter-cycle waveforms associated with levels of the received input signal. Systems for transpositional modulation are also provided. One such system for generating a signal includes a look-up table having a plurality of quarter-cycle waveforms. Each of the quarter-cycle waveforms are associated with a respective input level, and the look-up table is configured to receive an input signal, and output quarter-cycle waveforms associated with levels of the received input signal. |
| US09787509B2 |
Influence clock data recovery settling point by applying decision feedback equalization to a crossing sample
An apparatus including a receiver coupled to receive an input signal from a communication link and operable to employ decision feedback equalization to the input signal of the communication link and generate an edge sample signal. The apparatus also includes a timing recovery module coupled to the receiver and operable to receive the edge sample signal and use the edge sample signal to generate a data sampling phase signal, wherein the edge sample signal influences a settling point of the data sampling phase signal. |
| US09787506B2 |
Equalization circuit, semiconductor apparatus and semiconductor system using the same
An equalization circuit may include a buffer configured to sense an input signal according to a reference voltage. The equalization circuit may include a reference voltage generator configured to generate the reference voltage. The reference voltage may be changed in conformity with noise of the input signal. |
| US09787496B2 |
Communication system, communication apparatus, and protection method
A communication system includes two or more ring networks in which nodes are connected in a ring shape, carries out ERP for each of the ring networks, sets one of the ring networks as a major ring that detects a failure in a shared link, and sets the other ring networks as sub rings. A shared node, which terminates the shared link, includes: a failure monitoring unit that respectively detects, concerning two or more of the ring networks that share the shared link, failures in the ring networks; a switching processing unit that determines, on the basis of a detection result of the failures, the ring network set as the major ring; and ERP processing units that store, when the switching is performed by the switching processing unit, identification information after the switching in an R-APS frame and transfer or transmit the frame. |
| US09787494B2 |
Method for transmitting messages in a computer network, and computer network
The invention relates to a method for transmitting messages in a computer network, and to a computer network of this type. The computer network comprises computing nodes (101-105), said computing nodes (101-105) being interconnected via at least one star coupler (201) and/or at least one multi-hop network (1000), wherein each computing node (101-105) is connected via at least one communication line (110) to the at least one star coupler (201) and/or the at least one multi-hop network (1000), and wherein the computing nodes (101-105) exchange Ethernet messages with one another and with the at least one star coupler (201) and/or the at least one multi-hop network (1000). A set of two or more components are directly connected to one another in each case by two or more communication lines (110, 111), wherein each component in the set is either a computing node (101-105) or a star coupler (201), and sending components in the set of components send to at least two of the two or more communication lines (110, 111) at least a proportion of the Ethernet messages that are to be sent, and receiving components in the set of components then accept and/or forward at least a proportion of the Ethernet messages received via the two or more communication lines (110, 111) only if at least two identical messages are received via at least two different communication lines. |
| US09787493B2 |
Communication apparatus, control apparatus, and program
Control information from a plurality of applications 1000 is written into a shared memory 101 as needed. A communication part 105 transmits the control information written in the shared memory 101 to a DHM 200 in each transmission cycle which is constant. In a management table, a plurality of allowable delay times is defined, the allowable delay time being a delay time allowable at an urgent transmission of the control information. A transmission timing notification part 106 divides a transmission cycle into time slots each of which is equal to or shorter than the shortest allowable delay time defined in the management table. The communication part 105 transmits the control information in the shared memory 101 to the DHM 200 before arrival of the transmission cycle, in a unit of time slot. |
| US09787491B2 |
Interleaved communication with resource providers and a home area network
Systems and methods are disclosed for interleaving communications with a home area network (HAN) and a data network. A gateway device interleaves communications within timeslots of a time slotted channel hopping protocol. A gateway device can be configured to determine, during a first portion of a timeslot, whether the gateway device received a portion of a message from a data network. If the gateway device receives no messages from the data network during the first portion of the timeslot, the gateway device switches to listen for communication from the HAN during a second portion of the timeslot. If the gateway device receives a portion of the message from the HAN, the gateway device continues to receive receives the remainder of the message until one or more trigger conditions that cause the gateway device to listen for communication from the data network. |
| US09787490B2 |
Method of aggregating conventional resources upon losing connectivity to a master system site
Communication systems and methods are presented for aggregating sites when connectivity to a core and zone controller therein is lost. A local controller provides multicast control to sub-sites within a locally aggregated network after detecting loss of connectivity to the core. The local controller assigns different multicast addresses than multicast addresses assigned by the zone controller. A sparse and dense mode protocol is used for multicast traffic outside and within the locally aggregated network, respectively. Conventional resources, but not trunked resources, are assigned addresses and groups. An isolated site is able to connect to the network in the event of core failure so that conventional multicast traffic traverses a direct link between each isolated site and the network, thereby extending the locally aggregated network. Multicast addresses available to be assigned by a local controller within any locally aggregated networks can be the same as those assigned by other local controllers. |
| US09787489B2 |
Identifying an ideal user network
A system, method, and apparatus are provided for identifying an ideal or target network of a member of a professional network or social network, or one or more characteristics of such a network. Based on a type of the member, one or more attributes of a profile of the member, and/or one or more goals of the member, characteristics may be identified that support achievement of those goals or that promote more effective use of the professional network or social network by the member. By way of illustration, an ideal or target user network of a member seeking to improve her future job opportunities may include a minimum number of connections to members employed by different organizations, while an ideal or target user network of a member seeking a mentor may include a maximum number of connections to members holding senior positions within the member's industry or functional area. |
| US09787487B2 |
Facilitating media streaming with social interaction
Disclosed are various embodiments for facilitating social interaction during a media item transmission. A group of participants may be formed based on a variety of factors. A media item is rendered on a first portion of a media player user interface. On a second portion of the media player user interface group members may communicate with each other concurrent with the streaming media item. The entire experience may be stored and replayed at another time. |
| US09787480B2 |
Applying circuit delay-based physically unclonable functions (PUFs) for masking operation of memory-based PUFs to resist invasive and clone attacks
One feature pertains to generating a unique identifier for an electronic device by combining static random access memory (SRAM) PUFs and circuit delay based PUFs (e.g., ring oscillator (RO) PUFs, arbiter PUFs, etc.). The circuit delay based PUFs may be used to conceal either a challenge to, and/or response from, the SRAM PUFs, thereby inhibiting an attacker from being able to clone a memory device's response. |
| US09787478B2 |
Service provider certificate management
A method includes: establishing a telecommunication link between a device and a service provider system via a telecommunication network; receiving a device public key via the telecommunication network from the device at the service provider system, the device public key predating the establishment of the telecommunication link; verifying, at the service provider system, that the device stores a device private key in a secure storage area of the device, the device private key corresponding to the device public key, the device public key and the device private key being a cryptographic key pair; and authorizing, by the service provider system, sign-up of the device for service enrollment in response to verifying that the device stores the device private key in the secure storage area of the device. |
| US09787467B2 |
Calibration and/or adjusting gain associated with voltage-controlled oscillator
Apparatus and methods for adjusting a gain of an electronic oscillator, such as a voltage-controlled oscillator (VCO), are disclosed. In one aspect, an apparatus for compensating for VCO gain variations includes a charge pump controller. The charge pump controller can be configured to select a VCO gain model based on a comparison of a VCO gain indicator and a threshold value stored in a memory, obtain VCO gain model parameters from the memory corresponding to the selected VCO gain model, and compute a charge pump current control value using the VCO gain model parameters. The charge pump current control value can be used to compensate for VCO gain variations. |
| US09787465B1 |
Systems and methods for triggerless data alignment
Certain implementations of the disclosed technology may include systems and methods for data alignment without requiring an external synchronizing trigger. A method is provided that can include receiving a signal that represents a plurality of frames, each of the plurality of the frames include an optional data portion and a predetermined portion. The method includes sampling and buffering at least a portion of the received signal to produce a buffered digital sequence. The method includes processing, by a sequence alignment module, the buffered digital sequence using a known sequence, where the known sequence corresponds to the predetermined portion. The method includes determining, using the sequence alignment module, respective positions of the buffered digital sequence corresponding to the known sequence, comparing the known sequence with the buffered digital sequence at the respective determined positions, and outputting one or more parameters based at least in part on the comparing. |
| US09787461B1 |
One-way packet delay measurement
A method for measuring one-way delays in a communications network, the method comprising: maintaining a virtual clock state comprising information for converting times measured with respect to remote clocks into times as would be measured with respect to a local reference clock; registering, for each packet of the plurality of packets in a communications session between the first and second nodes, a timeset comprising transmission and reception times at the first and second nodes; converting, responsive to the virtual clock, times in the timeset measured with respect to the first node clock or the second node clock, into times as would be measured with respect to the reference clock; calculating, for each packet of the series of packets, a forward one-way delay (FOWD) from the first node to the second node and a reverse one-way delay (ROWD) from the second node to the first node, responsive to the converted timeset. |
| US09787455B2 |
Method for operation of cancelling or mitigating interference and apparatus therefor
The present invention relates to a wireless communication system and, more specifically, to a method for an operation of cancelling or mitigating interference, and an apparatus therefor. A method of cancelling or mitigating interference in a wireless communication system performed by a terminal includes receiving, from a serving cell, restricted configuration information of an enhanced physical downlink control channel (EPDCCH) which a dominant interference cell transmits, detecting the EPDCCH using the restricted configuration information of the EPDCCH, and performing an operation of cancelling or mitigating interference for the dominant interference cell using the detected EPDCCH, wherein the restricted configuration information of the EPDCCH includes a restricted set of parameters related to the EPDCCH configurable by the dominant interference cell. |
| US09787452B2 |
Method and apparatus for transmitting aperiodic channel state information in wireless communication system
A method is presented for receiving aperiodic channel state information (CSI). A base station (BS) transmits a CSI request field which is set to trigger a CSI report to a user equipment (UE). The BS receives CSI through a physical uplink shared channel (PUSCH) from the UE. The CSI request field has a value among a plurality of candidate values. The plurality of candidate values comprises a first value which triggers an aperiodic CSI report for a first set of reference signals and a second value which triggers an aperiodic CSI report for a second set of reference signals. |
| US09787451B2 |
Method and apparatus for transmitting a sounding reference signal by a terminal
Provided is a method for transmitting a sounding reference signal by a terminal, and a terminal using the method. The method comprises the following steps: receiving carrier information indicating the carrier via which a sounding reference signal is to be transmitted; receiving a physical downlink shared channel (PDSCH) through a first downlink component carrier; and transmitting a sounding reference signal through a second downlink component carrier, wherein the second downlink component carrier is determined based on the carrier information. |
| US09787449B2 |
Method for triggering aperiodic sounding reference symbol, base station and user equipment
A method for triggering an aperiodic sounding reference symbol, includes: receiving a Downlink Control Information (DCI) indicating a transmission of an aperiodic Sounding Reference Symbol (SRS) from a base station which configures a resource used for transmission of the aperiodic SRS; maintaining the resource for transmitting the aperiodic SRS when there is at least one of a loss of uplink synchronization when a timer relating to the uplink synchronization expires and a failure in transmission of a scheduling request transmitted more than a predetermined number of times; and executing a random access procedure. |
| US09787445B2 |
System and method for inter-cell interference coordination
A system and method for inter-cell interference coordination is provided. A method for controller operation includes receiving interferer information from a device served by the controller, scheduling a cell edge device based on the received interferer information, and reporting usage information of the subset of resources to neighboring controllers. The cell edge device operates in a periphery of a coverage area of the controller, and the cell edge device is scheduled to a subset of resources. The method also includes from each neighboring controller, receiving neighboring usage information of a neighboring subset of resources reserved for cell edge devices served by the neighboring controller. The method further includes scheduling a cell center device based on the received usage information from the neighboring controllers, and transmitting to scheduled devices over their respective scheduled resources. Cell center device is scheduled to resources not in the subset of resources. |
| US09787444B2 |
Enhanced node B and methods for network assisted interference cancellation with reduced signaling
Embodiments of an enhanced node B (eNB) and methods for network-assisted interference cancellation with reduced signaling in a 3GPP LTE network are generally described herein. In some embodiments, the number of transmission options is reduced by introducing a smaller signaling codebook. In some embodiments, higher-layer feedback from the UE to the eNodeB is established to inform the eNB about certain NA-ICS capabilities of the UE. In some embodiments, the number of signaling options is reduced by providing only certain a priori information. In some embodiments, correlations in the time and/or frequency domain are exploited for reducing the signaling message. In some embodiments, differential information is signaled in the time and/or frequency domain for reducing the signaling message. |
| US09787443B2 |
Techniques for managing transmissions of uplink data over an unlicensed radio frequency spectrum band
Techniques are described for wireless communication. A first method may include performing a clear channel assessment (CCA) on an unlicensed radio frequency spectrum band; transmitting an indication of a time division duplexing (TDD) configuration over the unlicensed radio frequency spectrum band when the CCA is successful; and transmitting downlink data over the unlicensed radio frequency spectrum band in accordance with the TDD configuration when the CCA is successful. A second method may include performing a CCA on an unlicensed radio frequency spectrum band; dynamically determining, based at least in part on at least one grant to a user equipment (UE), and for a period following the CCA, a number of uplink subframes for communication over the unlicensed radio frequency spectrum band; and transmitting downlink data over the unlicensed radio frequency spectrum band in accordance with the timing of the number of uplink subframes when the CCA is successful. |
| US09787431B2 |
Apparatus and method for forward error correction over a communication channel
There are various drawbacks by using existing OTN (Optical Transport Network) frames for communication between OTN cards. Such drawbacks might for example include high latency, low robustness, and/or high coding rate. According to embodiments of the present disclosure, systems and methods are provided for modifying an OTN frame (or creating a new frame with data from the OTN frame) prior to transmission by an OTL (Optical channel Transport Lane) in order to address some or all of the foregoing drawbacks. Note that this embodiment can make use of existing hardware (e.g. hardware used for generating the OTN frame, and the OTL used for transmission). |
| US09787430B2 |
Dynamic setting of FEC in eMBMS video streaming
Dynamic forward error correction (FEC) setting is discussed in which the network determines a FEC percentage for each video segment of a video streaming service, based on consideration of the transfer length of the video segment and the allocated bandwidth. When the transfer length and allocated bandwidth reflect transmission of less than peak bandwidth, the network will determine a higher FEC percentage that uses the otherwise wasted bandwidth to transmit additional redundancy symbols. The additional redundancy symbols increase the error recovery rate when collisions occur between streaming video reception and page monitoring occasions of other networks in multi-network, multi-subscriber identification module (SIM) mobile devices. A network entity may then transmit the dynamic FEC percentage for each video segment in the file description table (FDT) associated with the video streaming service. |
| US09787429B2 |
Forward error correction (FEC) data transmission system
A device implementing a forward error correction data transmission system may include at least one processor circuit. The at least one processor circuit may be configured to perform line encoding on a data stream received from a media access control (MAC) module, and periodically insert alignment markers after every number of blocks of the data stream, where the alignment markers are determined based at least in part on a data rate of an associated port. The at least one processor circuit may be further configured to transcode the data stream, where each alignment marker remains contiguous in the transcoded data stream. The at least one processor circuit may be further configured to add parity information to the transcoded data stream. The at least one processor circuit may be further configured to transmit the transcoded data stream over at least one physical lane of the associated port. |
| US09787421B2 |
Communication system, base station, mobile station, method for mobile station, and method for communication system
A device and method in which plurality of Zadoff-Chu sequences is allocated to a frame, a value of a parameter in the Zadoff-Chu sequence is different among the plurality of Zadoff-Chu sequences, and the Zadoff-Chu sequence allocated to the frame is different among a plurality of cells. |
| US09787416B2 |
Adaptive jitter buffer management for networks with varying conditions
An apparatus and method for detecting and analyzing spikes in network jitter and the estimation of a jitter buffer target size is disclosed. Detected spikes may be classified as jump spikes or slope spikes, and a clipped size of detected spikes may be used in the estimation of the jitter buffer target. Network characteristics and conditions may also be used in the estimation of the jitter buffer target size. Samples may be modified during playback adaptation to improve audio quality and maintain low delay of a receive chain. |
| US09787414B2 |
Over-the air test
A radio channel generator has a radio channel model predistorted on the basis of a predetermined chamber model. An emulator receives the weights of the radio channel model predistorted on the basis of the chamber model. A transmitter feeds a communication signal to the emulator. The emulator weights the communication signal with the radio channel model predistorted on the basis of the chamber model. The over-the-air antennas receive the weighted communication signal and transmit it to a device under test. The chamber model is based on a simulation or a measurement. The chamber model takes into account undesired interactions in the over-the-air chamber for cancelling them during the radio channel emulation. |
| US09787413B2 |
Circuits, systems and methods of hybrid electromagnetic and piezoelectric communicators
Circuits, systems and methods that utilize two transducers, of which at least one is a piezoelectric transducer, adapted and coupled to receive and/or generate signals in the forms of sound waves, mechanical vibrations, and/or electromagnetic energy. In one version, two transducers each receive and/or generate separate vibrational energy signals that bear information. Two or more transducers coupled to a switching circuit may send or receive piezo-electrical circuit output signals that include a carrier wave having different frequencies that are within separate frequency ranges. Two or more transducers may generate output signals that are simultaneously processed by or multiplexed by a switching circuit. |
| US09787411B2 |
Secure open-air communication system utilizing multichannel decoyed transmission
A secure communication system utilizes multiple “decoy” data signals to hide one or more true data signals. The true data signal(s) are encrypted, and received at a scrambling unit according to an original set of channel assignments. The channel assignments are optically switched with multiple decoy data signals to form a multi-channel “scrambled” output signal that is thereafter transmitted across a communication system. The greater the number of decoy signals, the greater the security provided to the open-air system. Further security may be provided by encrypting the decoy signals prior to scrambling and/or by utilizing a spatially diverse set of transmitters and receivers. Without the knowledge of the channel assignment(s) for the true signal(s), an eavesdropper may be able to intercept (and, with time, perhaps descramble) the open-air transmitted signals, will not be able to distinguish the true data from the decoys without also knowing the channel assignment(s). |
| US09787410B2 |
System for use in a reverse powered remote node and method for reverse powering a remote node
System for use in combination with a remote node powered by a first number of lines, each line thereof being capable of providing power to the remote node in an active state of the line and not being capable of providing power to the remote node in a non-active state of the line; said system comprising: a second number of convertors; and a power control part configured for controlling the power provided by each line of said first number of lines to a converter of said second number of converters, in function of the time, depending of the states of the first number of lines. |
| US09787404B2 |
System and method for communication over color encoded light patterns
The present invention includes a light communication method and system wherein messages are transmitted via color code flashes. The light communication includes mechanisms for oversampling the color code flashes to enhance the accuracy of the method and system. |
| US09787399B2 |
Inline optoelectronic converter
An inline optoelectronic converter configured to convert electrical signals to optical signals and to convert optical signals to electrical signals. The converter is external to the avionic computer and connected to the avionic computer at a location spaced apart from the avionic computer. The converter is configured to be integrated into an existing wiring bundle of the avionic computer. Also disclosed is a method of retrofitting an avionic computer by connecting an optoelectronic converter to the computer. The method comprises connecting the converter to an existing wiring bundle of the avionic computer at a location spaced apart from the avionic computer. |
| US09787398B2 |
Beat interference detection and mitigation
An OBI manager provides the reduction/elimination of optical beat interference (OBI). As will be described in more detail below, the OBI manager identifies OBI partners through an identification process performed via an RFoG network. An OBI partner may be two optical networking units (ONUs) that may interfere with one another when transmitting in the same time slot. Once the OBI partners are identified, the OBI manager may perform a mitigation process to mitigate possible OBI. For example, the OBI manager may organize the OBI partners to reduce OBI, such as by guaranteeing no OBI partners transmit at the same time. |
| US09787394B2 |
Method and apparatus for acoustic sensing using multiple optical pulses
An improved technique for acoustic sensing involves, in one embodiment, launching into a medium, a plurality of groups of pulse-modulated electromagnetic-waves. The frequency of electromagnetic waves in a pulse within a group differs from the frequency of the electromagnetic waves in another pulse within the group. The energy scattered by the medium is detected and, in one embodiment, the beat signal may be used to determine a characteristic of the environment of the medium. For example, if the medium is a buried optical fiber into which light pulses have been launched in accordance with the invention, the presence of acoustic waves within the region of the buried fiber can be detected. |
| US09787392B2 |
Satellite communications networking
A method of operating a satellite communication network is disclosed. The network includes a plurality of satellites interconnected by a plurality of satellite-to-satellite communication links. Each of the plurality of satellites is configured to communicate with at least one ground station using respective ground-satellite communication links. The method includes transmitting a routing table to each of the satellites. Each routing table has a list of destination satellites, and defines at least two possible routes leading to it. An alert message identifying a problem communication link is transmitted to a subset of the plurality of satellites. In response to receiving the alert message, subsequent data packets are routed through the communication network by the satellites using their respective routing table to avoid the problem communication link. |
| US09787391B2 |
Vessel communications systems and methods
Vessel communications systems and methods are described. According to one aspect, a vessel communications method includes receiving a first communication including first positional data which indicates a location of a first vessel, receiving a second communication including second positional data which indicates a location of a second vessel, using the first and second positional data, identifying a wireless communications range of the first vessel overlapping with a wireless communications range of the second vessel at a moment in time, as a result of the identifying, controlling only one of the first and second vessels to output wireless communications which include both of the first and second positional data. |
| US09787389B2 |
Transmission device and radio signal transmission method
[Problem] To provide a transmission device that has an enhanced redundant structure in which RF signals having a plurality of frequencies are transmitted to continue transmission even in the event of failure and allows simultaneously both improvement in power efficiency and transmission power and high-speed communication.[Solution] A signal generator 1102 generates RF signals 1201 to 1204. Each of the RF signals 1201 and 1202 is simultaneously input to a broadband/multiband power amplifier 1103, and each of the RF signals 1203 and 1204 are simultaneously input to a broadband/multiband power amplifier 1104. Specifically, the RF signals allocated in two different bands 1211 and 1212 are simultaneously input to each of the power amplifiers. The RF signals 1201 to 1204 are amplified by the broadband/multiband power amplifiers 1103 and 1104 and then transmitted via terminals 1105 and 1106. |
| US09787380B2 |
Method and apparatus for managing control channel in a mobile communication system using multiple antennas
Methods and apparatuses are provided for receiving control information by a terminal. A control channel message is received on a control channel. Control information is extracted from the control channel message. The control information includes a transmission rank and precoding matrix information if a common pilot is used for data demodulation. The control information includes the transmission rank and information about a dedicated pilot if the dedicated pilot is used for the data demodulation. |
| US09787378B2 |
Terminal apparatus, base station apparatus, and method for sharing codebook in communication system
A communication system, a terminal apparatus, a base station apparatus, and a method for sharing a codebook are provided that make it possible to improve system capacity by using precoding according to a cell environment. In a communication system in which beam directivity control is performed by precoding using a codebook that is common between a base station (10) and a terminal (20), the base station (10) notifies the terminal (20) information for codebook determination k including cell (11)-specific information on the base station, and the base station (10) and the terminal (20) generate the common codebook based on the information for codebook determination. |
| US09787366B1 |
Near field communication detection in wireless charging systems
This disclosure describes systems, methods, and apparatus related to near field communication (NFC) detection. A device may determine a first device in proximity to a charging area of the device. The device may detect a presence of a first NFC device in proximity to the charging area of the device. The device may determine the first NFC device is associated with the first device. The device may determine to transition the device to one or more operating modes based at least in part on the presence of the first NFC device. |
| US09787349B2 |
Wireless communication with dielectric medium
An electronic device may include a dielectric substrate, an electronic circuit supported by the substrate, for processing data, and a communication unit having an antenna. The communication unit may be mounted to the substrate in communication with the electronic circuit for converting between a first EHF electromagnetic signal containing digital information and a data signal conducted by the electronic circuit. The electromagnetic signal may be transmitted or received along a signal path by the antenna. An electromagnetic signal guide assembly may include a dielectric element made of a dielectric material disposed proximate the antenna in the signal path. The electromagnetic signal guide may have sides extending along the signal path. A sleeve element may extend around the dielectric element along sides of the dielectric element. The sleeve element may impede transmission of the electromagnetic signal through the sides of the dielectric element. |
| US09787345B2 |
Laser welding of transparent and opaque materials
Welding of transparent material in electronic devices. An electronic device may include an enclosure having at least one aperture formed through a portion of the enclosure. The electronic device may also include a component positioned within the aperture formed through the portion of the enclosure. The component may be laser welded to the aperture formed through the enclosure. Additionally, the component may include transparent material. A method for securing a component within an electronic device may include providing an electronic device enclosure including at least one aperture, and positioning a component within the aperture formed through the enclosure. The component positioned within the aperture may include a transparent material. The method may also include welding the component to the electronic device enclosure. |
| US09787343B2 |
Method and system for dynamic managing of subscriber devices in mobile networks
A system and method for managing subscriber mobile devices comprising: a home network (400) of a first mobile network operator (MNO1), in which data associated with at least one physical SIM of a subscriber device with an embedded SIM card (eUICC) is obtained, and a destination network (300) of a second mobile network operator (MNO2) which the device travels to, obtaining static data and dynamic data associated with at least one virtual SIM (503, 603) of the device. The dynamic data comprise a subscriber authentication key (Ki) and is obtained from a SIM provider platform (500, 600) on which the destination network (300) relies. The static data comprise IMSI/MSISDN identities and is stored in a pool (202) of the destination network (300).For a given virtual SIM, it is checked whether there is an association in a mapping table (106) of the first mobile network operator (MNO1) between the static data from the pool (202) and the physical SIM data from the home network (400). |
| US09787340B2 |
Zero power radio frequency receiver
A zero power radio frequency (RF) activated wake up device is provided. The device is based on a high-Q MEMS demodulator that filters an amplitude-modulated RF tone of interest from the entire spectrum while producing a much higher voltage signal suitable to trigger a high-Q MEMS resonant switch tuned to the modulation frequency of the RF tone. |
| US09787339B2 |
Receiver signal strength indicator meter for automatic antenna alignment in indoor and outdoor mount applications
An antenna RSSI meter includes a microcontroller unit for digitizing an antenna receiver voltage signal, converting the digitized antenna receiver voltage signal into a receiver signal level in accordance with a predefined antenna specification, and converting the receiver signal level into the antenna tuning signal in accordance with the predefined antenna specification. The antenna RSSI meter includes an input communication port for receiving the antenna receiver voltage signal from an antenna and providing the antenna receiver voltage signal to the microcontroller unit, The antenna RSSI meter also includes an output communication port for receiving the antenna tuning signal from the microcontroller unit and providing the antenna tuning signal to an antenna auto-aligning mechanism for adjusting position and orientation of the antenna. |
| US09787331B1 |
Decoding path selection device and method
The present invention discloses a decoding path selection device for decoding codewords generated by convolutional codes or turbo codes encoders in error correction codes, the decoding path selection device comprising: a branch metrics calculation unit for receiving incoming signals and calculating branch metrics values; a programmable generalized trellis router for generating a decoding path control signal according to the turbo code or convolutional code specification employed by one of communications standards; a multiplexer for receiving the branch metrics values from the branch metrics calculation unit and the decoding path control signal from the programmable generalized trellis router and selecting a corresponding branch metrics value; a recursive calculation unit, connected after the multiplexer and for receiving the corresponding branch metrics value from the multiplexer; and an a-posteriori probability calculation unit, connected after the recursive calculation unit and for calculating a final decoding result. |
| US09787330B2 |
Controller having error correction function in accordance with operating state of monitoring target
A controller has an error correction capability by including: a state monitoring unit that analyzes a state of a monitoring target and outputs state information; an error correction processing unit that switches error correction codes so that a correction rate for the respective states becomes a value within a predetermined range; and a correction rate calculation unit that calculates the correction rate for the respective states based on the correction result by the error correction processing unit. |
| US09787329B2 |
Efficient coding with single-error correction and double-error detection capabilities
An apparatus for data coding includes an encoder and a decoder. The encoder is configured to receive input data including one or more m-bit data groups that are associated with respective group indices, to generate a code word that includes the input data and an m-bit redundancy that depends on the data groups and on the respective group indices, and to send the code word over a channel. The decoder is connected to the channel and is configured to produce a syndrome that equals zero when the code word is error-free, and when the code word contains a single error caused by the channel, is indicative of an erroneous group in which the single error occurred, and of a location of the single error within the erroneous group, and to recover the input data by correcting the single error at the location in the erroneous group. |
| US09787328B2 |
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
The present invention provides a method of transmitting broadcast signals. The method includes, formatting, by an input formatting block, input streams into plural PLPs (Physical Layer Pipes); encoding, by an encoder, data in the plural PLPs; processing, by a framing and interleaving block, the encoded data in the plural PLPs to output at least one signal frame; and waveform modulating, by a waveform generation block, data in the at least one signal frame and transmitting, by the waveform generation block, broadcast signals having the waveform modulated data. |
| US09787322B2 |
Content compression and/or decompression
Briefly, methods and/or systems of processing content entries are described. An example may comprise determining equivalent byte values of characters that form the content entries. The content entries may be transformed based, at least in part, on the equivalent byte values and compressed using, for example, delta compression. |
| US09787321B1 |
Point cloud data compression using a space-filling curve
Techniques of data compression involve ordering the points of a point cloud according to distance along a space-filling curve. Advantageously, a space-filling curve has the property that points close in distance along the curve are close together in Euclidean space. Thus, differences between points ordered by distance along such a curve, e.g., a Hilbert curve, will be close. When the curve is fractal, i.e., self-similar at all levels, the differences will be small even when the points are very unevenly clustered throughout the point cloud. Such small differences will provide greatly improved compression to the resulting delta-encoded set of points. |
| US09787316B2 |
System for conversion between analog domain and digital domain with mismatch error shaping
The invention provides a system for conversion between analog domain and digital domain with mismatch error shaping, including a DAC, a first injection circuit coupled to the DAC, and a second injection circuit coupled to the DAC. The DAC generates a first analog value in response to a first digital value, and generates a second analog value in response to a second digital value. The first injection circuit enables an analog injection value to be injected to the second analog value when the DAC generates the second analog value, wherein the analog injection value is converted from a digital injection value formed by a subset of bits of the first digital value. The second injection circuit injects the digital injection value to the second digital value, or combines the digital injection value and a related value obtained according to the second analog value. |
| US09787315B1 |
Control device and analog-to-digital conversion controlling method
A control device according to an embodiment includes a driving unit that supplies, to a control target, a current or a voltage on which an Alternating-Current (AC) component is superimposed, an Analog-to-Digital (AD) converter, and an AD conversion controller. The AD conversion controller causes, in an AC cycle of the AC component, the AD converter to execute a first AD conversion in synchronization with a starting timing of the AC cycle, and then to execute second and subsequent AD conversions at predetermined time intervals in response to a trigger by an internal timer of the AD converter. |
| US09787308B2 |
Reference voltage generating device and method
A reference voltage generating device including a reference voltage source, a charge supplying source, a first switch, a second switch, a charge storage unit and a logic unit is provided. First terminals of the first and second switches are respectively coupled to the output terminal of the reference voltage source and the charge supplying source. When a power on reset signal is received, the first switch is turned off and the second switch is turned on, such that the charge supplying source quickly charges the charge storage unit. When the output voltage is greater than or equal to the reference voltage, the first switch is turned on and the second switch is turned off, such that the reference voltage source maintains the output voltage to the reference voltage. |
| US09787305B2 |
Apparatus and methods for PIN diode switches for radio frequency electronic systems
Apparatus and methods for PIN diode switches for radio frequency electronic systems are provided herein. In certain configurations, a packaged switch including a packaging substrate including a die paddle and a thermally conductive substrate attached to the die paddle, one or more PIN diode switches attached to the thermally conductive substrate, and a driver chip attached to the die paddle and configured to generate a plurality of bias voltages operable to control biasing of the one or more PIN diode switches. The driver chip includes a switching regulator configured to generate a first bias voltage of the plurality of bias voltages and a charge pump configured to generate a second bias voltage of the plurality of bias voltages. |
| US09787303B2 |
Driver circuit and switch driving method
There are provided a driver circuit, a method of driving a power switch, and a ballast circuit. For example, there is provided a driver circuit configured to receive a control signal and operate a power switch. The driver circuit includes a first switch, a second switch, and a capacitor coupled to control terminals of the first and second switches. The driver circuit further includes a first diode coupled to a first bias terminal of the driver circuit and to the capacitor. Furthermore, the driver circuit includes a second diode coupled to a second bias terminal of the driver circuit and to a terminal of the power switch. |
| US09787301B2 |
Semiconductor switching device
Provided is a semiconductor switching device such that there is a reduction in surge or loss in multiple kinds of semiconductor switching element provided in parallel and of differing turn-on/turn-off operation characteristics. The semiconductor switching device includes a switching circuit unit that includes in parallel multiple kinds of semiconductor switching element having different turn-on/turn-off operation characteristics and turns a main current on and off, a driver circuit that includes a current source terminal and a current sink terminal and outputs drive signals that collectively turn the semiconductor switching elements on and off from the current source terminal and the current sink terminal, and an impedance element that is interposed between the current source terminal and the current sink terminal in the driver circuit and causes timings of operations by which the semiconductor switching elements are turned on and off to differ from each other. |
| US09787299B2 |
Switching control systems
We describe a system for controlling very large numbers of power semiconductor switching devices (132) to switch in synchronization. The devices are high power devices, for example carrying hundreds of amps and/or voltages of the order of kilovolts. In outline the system comprises a coordinating control system (110, 120), which communicates with a plurality of switching device controllers (130) to control the devices into a plurality of states including a fully-off state, a saturated-on state, and at least one intermediate state between the fully-off and saturated-on states, synchronizing the devices in the at least one intermediate state during switching. |
| US09787297B2 |
Signal generator, signal generation method, and numerically controlled oscillator
A waveform conversion unit (42) of a numerically controlled oscillator has a cosine table (101) and a sine table (102) in which parameters for cosine wave and sine wave signal generation are stored, a correction mechanism (50) for generating correction values according to the phase of an inputted phase signal, an adder (111) for generating a cosine wave signal from a parameter in the cosine table (101) and a correction value, and an adder (112) for generating a sine wave signal from a parameter in the sine table (102) and a correction value. The correction mechanism (50) uses waveform data which is a kind of parabolic data and whose phase interval is more minute than the phase interval of the parameters in each table (101), (102) to generate correction values for correcting cosine wave and sine wave signals to be found by linear interpolation. |
| US09787296B1 |
Delay circuit
A delay circuit includes: a plurality of delay units that are serially coupled with each other in a form of loop and sequentially delay an input signal of the delay circuit; an input control unit that selects a delay unit to receive the input signal of the delay circuit among the plurality of the delay units; and an output control unit that controls an output signal of a predetermined delay unit among the plurality of the delay units to be outputted as an output signal of the delay circuit, when the output signal of the predetermined delay unit is enabled N times, where N is an integer equal to or greater than 0. |
| US09787294B2 |
Pulse converter circuit
A pulse converter circuit includes a logic circuit to which a first signal is input and from which a second signal is output. The logic circuit includes a p-channel transistor which determines whether a voltage of the second signal is set to a first voltage depending on a voltage of the gate; and an n-channel transistor which determines whether the voltage of the second signal is set to a second voltage, which is higher than the first voltage, depending on a voltage of the gate. The p-channel transistor includes a semiconductor layer containing an element of a group 14. The n-channel transistor includes an oxide semiconductor layer. |
| US09787292B2 |
High performance multiplexed latches
The present disclosure relates to latch structures and, more particularly, to high performance multiplexed latches and methods of use. The multiplexed latch includes: a first latch structured to receive a data signal D0 and comprising a plurality of inverters which receive a respective input clock signal; and a second latch signal structured to receive a data signal D1 and comprising a plurality of inverters which receive a respective input clock signal. |
| US09787282B2 |
Piezoelectric thin film resonator, filter and duplexer
A piezoelectric thin film resonator includes: a substrate; a piezoelectric film provided on the substrate; a lower electrode and an upper electrode that sandwich at least a part of the piezoelectric film and face with each other; and an inserted film that is inserted in the piezoelectric film, is provided on an outer circumference region in a resonance region in which the lower electrode and the upper electrode sandwich the piezoelectric film and face with each other, is not provided in a center region of the resonance region, and has a cutout in the resonance region. |
| US09787281B2 |
Resonator element, resonator, resonator device, oscillator, electronic apparatus, and moving object
A resonator element includes a substrate having a first region performing thickness shear vibration, a second region located in a periphery of the first region and having a smaller thickness than the first region, a fixed end, and a free end opposite to the fixed end in the first region in a plan view. Excitation electrodes are disposed on a front and a rear of the first region and have regions overlapping each other in the plan view. A center of the first region and a center of the regions overlapping each other are located between a center of the substrate and the free end in the plan view. When Cs is a distance between the center of the regions overlapping each other and the center of the substrate in the plan view, a relation of 105 μm |
| US09787277B2 |
Variable filter circuit and wireless communication apparatus
A variable filter circuit includes a serial arm connected between ports (P1-P2), a parallel arm having a resonator connected in series between ports (P1-P3), and another parallel arm having another resonator connected in series between ports (P2-P3). The serial arm includes a capacitor connected between the ports (P1-P2), and the parallel arms include variable capacitances connected in series to the resonators. |
| US09787273B2 |
Smart volume control of device audio output based on received audio input
A method implemented by processing and other audio components of an electronic device provides a smart audio output volume control, which correlates a volume level of an audio output to that of an audio input that triggered generation of the audio output. According to one aspect, the method includes: receiving an audio input that triggers generation of an audio output response from the user device; determining an input volume level corresponding to the received audio input; and outputting the audio output response at an output volume level correlated to the input volume level. The media output volume control level of the device is changed from a preset normal level, including from a mute setting, to the determined output level for outputting the audio output. Following, the media output volume control level is automatically reset to a pre-set volume level for normal media output. |
| US09787271B2 |
Method and system for providing automatic gate bias and bias sequencing for field effect transistors
A feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. A transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. Additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. A gate bias circuit including a bias sequencer and negative voltage deriver for operation of N-channel depletion mode devices. |
| US09787268B2 |
Audio control using auditory event detection
In some embodiments, a method for processing an audio signal in an audio processing apparatus is disclosed. The method includes receiving an audio signal and a parameter, the parameter indicating a location of an auditory event boundary. An audio portion between consecutive auditory event boundaries constitutes an auditory event. The method further includes applying a modification to the audio signal based in part on an occurrence of the auditory event. The parameter may be generated by monitoring a characteristic of the audio signal and identifying a change in the characteristic. |
| US09787266B2 |
Method and an apparatus for processing an audio signal
A method of processing an audio signal is provided. A decoding apparatus receives the audio signal, which includes a plurality of objects. The decoding apparatus further receives object information, object gain information, and object correlation information, preset presence information, preset number information, preset information based on the preset presence information and the preset number information, and preset rendering data. The preset information exists in a header region or in each frame. The decoding apparatus obtains a preset matrix from the user by an input unit of the audio decoding apparatus when the preset type information indicates the preset rendering data is defined by the user, and adjusts an output level of the plurality of objects for an output channel based on the object information and the preset matrix. The decoding apparatus outputs an adjusted audio signal including the plurality of objects with an adjusted output level. |
| US09787264B2 |
Configurable transceiver circuit architecture
Techniques and mechanisms for providing signal communication with a configurable transceiver circuit. In an embodiment, an integrated circuit comprises transceiver circuitry including an output stage and current mirror circuitry. The output stage is coupled to receive a differential signal pair and to provide at least one output signal based on the differential signal pair. In another embodiment, configuration logic is operable to select between a first mode and a second mode of the transceiver circuit. The first mode includes the current mirror circuitry being disabled from providing a current signal to the output stage, and a first circuit path being closed to provide voltage to the output stage. The second mode includes the first circuit path being open and the current mirror circuitry being enabled to provide a current signal to the output stage. |
| US09787261B2 |
Class-D amplifier circuits
Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability while reducing switching power losses. |
| US09787258B2 |
Circuits and devices related to fast turn-on of radio-frequency amplifiers
Circuits, methods and devices are disclosed, related to fast turn-on of radio-frequency (RF) amplifiers. In some embodiments, an RF amplifier circuit includes an amplification path implemented to amplify an RF signal, where the amplification path includes a switch and an amplifier. In some embodiments, each of the switch and the amplifier are configured to be ON or OFF to thereby enable or disable the amplification path, respectively. In some embodiments, the RF amplifier circuit includes a compensation circuit coupled to the amplifier, where the compensation circuit is configured to compensate for a slow transition of the amplifier between its ON and OFF states resulting from a signal applied to the switch. |
| US09787254B2 |
Encapsulated semiconductor device package with heatsink opening, and methods of manufacture thereof
Embodiments include packaged semiconductor devices and methods of manufacturing packaged semiconductor devices. A semiconductor die includes a conductive feature coupled to a bottom surface of the die. The conductive feature only partially covers the bottom die surface to define a conductor-less region that spans a portion of the bottom die surface. The die is encapsulated by attaching the encapsulant material to the bottom die surface (e.g., including over the conductor-less region). The encapsulant material includes an opening that exposes the conductive feature. After encapsulating the die, a heatsink is positioned within the opening, and a surface of the heatsink is attached to the conductive feature. Because the heatsink is attached after encapsulating the die, the heatsink sidewalls are not directly bonded to the encapsulant material. |
| US09787252B2 |
RF amplifier operational in different power modes
Embodiments of a radio frequency (RF) amplification are disclosed. The RF amplification device includes a first RF amplification circuit, a second RF amplification circuit, and power control circuitry operable in a first power mode and a second power mode. The first RF amplification circuit has a cascode amplifier stage configured to amplify an RF signal. The cascode amplifier stage has an input transistor and a cascode output transistor that are stacked in cascode. The second RF amplification circuit is configured to amplify the RF signal. The power control circuitry is configured to bias the first cascode output transistor so that the first cascode output transistor operates in a saturation region in the first power mode and bias the first cascode output transistor so that the first cascode output transistor operates in a triode region in the second power mode. The second RF amplification circuit is assisted without introducing additional loading. |
| US09787244B2 |
Air conditioner
An air conditioner includes an inverter circuit, a control unit that controls the inverter circuit, a compressor having a protection device (a pressure switch), and a phase-voltage detection circuit (a U-phase voltage detection circuit) that detects a voltage at any of three-phase windings (compressor windings) of the compressor. The control unit includes a shutdown-cause specifying unit that determines presence or absence of an operation of the protection device based on a phase voltage value detected by the phase-voltage detection circuit, by turning on any of a plurality of switching elements constituting the inverter circuit, after the compressor has been shut down, and specifies a cause of the shutdown of the compressor. |
| US09787243B2 |
Controller for a brushless direct-current motor
A controller for a brushless direct-current motor having an upstream converter, which has a half-bridge having a pair of switching means for each phase winding of the motor, includes a measuring device or has a signal connection to a measuring device. The measuring device is associated with a half-bridge and by means of the measuring device, the induced voltage, the counterelectromotive force of a phase winding, can be detected for rotor position detection in the current-free state, for which purpose the controller, in an operating mode that causes the braking and in which the switching means cause a short circuit of the phase windings, briefly opens the switching means associated with the measuring device in order to determine a rotor motion. |
| US09787239B2 |
Divided phase AC synchronous motor controller
A circuit includes phase windings, a direct current (DC) power supply, and a power switch circuit. The power switch circuit includes at least one power switch and a voltage regulator in parallel with the at least one power switch, wherein current flows through the voltage regulator when the at least one power switch is on and off. The circuit also includes at least one non-collapsing DC power supply component to prevent the DC power supply from collapsing when the at least one power switch is on and conducting during at least a portion of a cycle. One or more of the DC power supply and power switch circuit may be at a midpoint of the phase windings. |
| US09787237B2 |
Fault tolerant control system for multi-phase permanent magnet assisted synchronous reluctance motors
A fault tolerant control system for a multi-phase permanent magnet assisted synchronous reluctance motor utilizes vector control to provide safe operation under various phase loss fault conditions. Specifically, the vector control of the present invention utilizes a fault tolerant algorithm that receives a torque input and an electrical current feedback signal from the motor. Thus, in the presence of a fault condition, the vector control applies the optimal torque angle to the motor, while reducing the phase currents to an optimized value to lessen the saturation effect in the motor, so as to ensure that the motor delivers maximum torque output in the presence of such faults. As such, the control system allows the motor to operate safely with high reliability, which is highly desirable, such as in electric vehicles and the aerospace industry. |
| US09787233B2 |
Movable object driving device and game machine
A movable body drive device that controls a drive unit configured to drive a movable body arranged on a game machine has a communication unit that receives a control command for regulating a destination position of the movable body, a storage unit that stores a current position of the movable body, and a control unit that determines, based on a difference between the destination position and the current position or a moving direction in an immediately previous action of the movable body, a moving direction in the next action of the movable body and to control the drive unit such that the movable body is moved along the moving direction in the next action until the movable body reaches the destination position. |
| US09787232B1 |
Apparatus and method for controlling a ripple current sensing motor
Provided are an apparatus and method for controlling a ripple current sensing motor. An apparatus for controlling a ripple current sensing motor may include a first shunt resistor having one end connected to one end of a motor and the other end of the first shunt resistor connected to a ground, a second shunt resistor having one end connected to the other end of the motor and the other end of the second shunt resistor connected to the ground, a first amplifying circuit amplifying a first signal from one end of the motor, a second amplifying circuit amplifying a second signal from the other end of the motor, and a detector detecting a rotation amount and a rotation direction of the motor using a change in voltages of a first detection signal from the first amplifying circuit and a second detection signal from the second amplifying circuit. |
| US09787229B2 |
Method of operating a single-stranded electronically commutated motor from a DC voltage source, and motor for carrying out such a method
An electronically commutated motor is operated from a DC voltage source (UB), e.g. from a DC link circuit (46). The motor has a permanent-magnet rotor (28) and a stator having a stator winding strand (26) in which, during operation, an alternating voltage is induced by the permanent-magnet rotor (28). It further has an H-bridge circuit (22) having power semiconductors (T1 to T4). At the beginning of a commutation operation, the presently conductive semiconductor switch of a first bridge half (38) is switched off, in order to interrupt energy delivery from the DC voltage source (UB), so that, in the other bridge half (56), a loop current (i*; −i*) flows through the stator winding strand (26), through the semiconductor switch still controlled to be conductive therein, and through a recovery diode (58; 60) associated with the blocked semiconductor switch of that other bridge half. This loop current converts the energy stored in the magnetic circuit of the motor (20) at least partly into driving energy for the permanent-magnet rotor (28), and in that context the stored energy drops to zero. This currentless state of the stator winding strand (26) is detected in a sensorless manner by measuring the voltage (uind) induced by the rotor (28) in the stator winding strand (26). |
| US09787227B1 |
Controlled inductive sense system
An apparatus includes a driver circuit and a motor control circuit. The driver receives first and second supply voltages and a control signal, and generates a target voltage on an output terminal according to the control signal. The motor control circuit is configured to generate the control signal and measure a rise time of a current of the driver circuit during a period of time in which the output terminal is at the target voltage. A method includes, during a time interval, providing the first supply voltage on an output of a first driver circuit, generating a target voltage on an output of a second driver circuit, and measuring a rise time of a current flowing between the outputs of the first and second driver circuits. For both the apparatus and method, the target voltage is between and substantially different from the first and second supply voltages. |
| US09787226B2 |
Alternating current electric system and control method thereof
When the current flowing through each electric terminal of an AC motor 21 reaches the vicinity of zero, an operation putting the electric terminals of the AC motor 21 into an opened state, or putting an electric terminal into a conductive state via a reflux diode inside an inverter 11, is carried out. Herein, as an operation such that the current flowing through each electric terminal reaches the vicinity of zero, the electric terminals are short-circuited by all upper arm or lower arm switching elements of the inverter 11 being turned on. By so doing, a flow of electromagnetic energy of a reactance component of the AC motor 21, from the AC motor 21 into the inverter 11 side when the drive of the inverter 11 is stopped, is prevented or suppressed. As a result of this, an overvoltage or overcurrent is prevented. |
| US09787223B2 |
Motor control apparatus, image forming apparatus, and motor control method
A motor control apparatus controls a start/stop operation of a motor and includes a counting unit that performs a count-up or count-down operation from a predetermined initial value with a lapse of time in response to receiving an operation start instruction for the motor; a signal output unit that outputs a first state signal in response to receiving the operation start instruction, and outputs a second state signal only when a result of the counting by the counting unit falls outside a predetermined range; and a drive unit that outputs an ON signal to the motor in response to receiving the first state signal from the signal output unit, and outputs an OFF signal to the motor in response to receiving the second state signal from the signal output unit. |
| US09787220B2 |
Energy harvester
An energy harvester comprising a mass that is subjectable to environmental forces for bringing it into the status of a moving mass, and means linked to the mass for converting and storing of energy embodied in the moving mass, which means are arranged for subsequent release of said energy, wherein the mass is part of a compliant system comprising a frame and first and second elastic beams connecting the mass to the frame, wherein the first and second elastic beams are provided with opposite stiffnesses so as to arrange that in a predefined range of excursions of the moving mass, said mass experiences a preselected stiffness. |
| US09787215B2 |
Power source device
A power supply device includes a board that includes an input terminal and an output terminal, and converters disposed on the board. The converters are connected with each other in parallel and convert an input voltage input to the input terminal, and output the converted voltage to the output terminal. Each of the converters includes respective one of voltage conversion functional units including respective one of input parts and respective one of output parts, respective one of input line parts connected to respective one of the input parts. Respective one of output line parts connected to respective one of the output parts, and respective one of current adjustment functional units provided in respective one of the output line parts for balancing currents output from the each of the converters provided in respective one of the output line parts. |
| US09787203B2 |
Power source management method and power source
A power source management method and a power source are provided. The method includes: comparing a feedforward control signal with a feedback control signal by using a logic control circuit, outputting the signals after the comparison, and performing matching, to obtain control signals of switching transistors of a full-bridge topology circuit; and adjusting the control signals of the switching transistors of the full-bridge topology circuit by using the logic control circuit, so that operating duty cycles of two bridge arms on a primary side match, are symmetric within one switch period of the logic control circuit, or match for a long time, to prevent transformer biasing. The power source management method and the power source can achieve good feedforward performance, suppress input disturbance, and additionally prevent transformer biasing, which ensures that the power source works normally. |
| US09787202B2 |
Method for regulating an output voltage using a converter configured to operate in a critical conduction mode and a frequency fold-back mode and structure
In accordance with an embodiment, a converter includes a power factor controller that varies the switching frequency of a switching transistor in accordance with a signal representative of power at the input of the converter. |
| US09787201B2 |
Bidirectional isolated multi-level DC-DC converter and method thereof
A DC-DC converter is operated in a boost mode by operating a plurality of low-voltage side switches with a first fixed duty cycle (greater than 0.5), with cutting off a plurality of the first high-voltage side switches and a plurality of the second high-voltage side switches, with conducting a plurality of the first diodes of the first high-voltage side switches and a plurality of the second diodes of the second high-voltage side switches, and with alternatively conducting and cutting off a bidirectional switch. In a buck mode, the low-voltage side switches are cut off and a plurality of diodes of the low-voltage side switches are conducted. Furthermore, the first high-voltage side switches are complemented and are operated with a second fixed duty cycle (less than 0.5) while the second high-voltage side switches are conducted and cut off alternatively and the bidirectional switch is switched on and off. |
| US09787199B2 |
Power conversion device to control power distribution of input power to multiple outputs
The power reception amount of input power from an AC power supply is controlled through a first switching circuit. DC voltage is controlled through a second switching circuit, to control charge power for a first DC voltage source. DC voltage obtained by a third switching circuit is converted to AC by an inverter, to supply the resultant power to an AC load. DC voltage is controlled through a fourth switching circuit, to control charge power for a second DC voltage source. Thus, distribution control of the input power is performed. In addition, in the distribution control of the input power, operation of the second switching circuit or the fourth switching circuit is stopped to allow stop of the charging for the first DC voltage source or the second DC voltage source. |
| US09787193B2 |
Switching power supply and method for controlling voltage of bulk capacitor in the switching power supply
A switching power supply includes: a rectifying unit; a Bulk capacitor; a converter; a monitoring circuit; a control circuit, controlling discharging of the Bulk capacitor, being configured to perform controls such that the voltage across the Bulk capacitor maintains the peak value after the Bulk capacitor having been charged to a peak value of AC voltage, and to perform controls such that the Bulk capacitor discharges from a peak value when the instantaneous absolute value of the AC voltage is smaller than or equal to the preset voltage. A method for controlling a voltage of a Bulk capacitor in the switching power supply includes detecting an instantaneous absolute value of the AC voltage; comparing the detected instantaneous absolute value of the AC voltage with a preset voltage; and controlling discharging and charging state of the Bulk capacitor according to comparison results. |
| US09787191B2 |
Converter with quasi-resonant mode of operation for supplying power to a load
An example relates to a method for operating a converter comprising (i) determining whether a valley for switching the converter in a quasi-resonant mode is available within a predetermined time range; (ii) selecting the valley if it is available within the predetermined time range; and (iii) changing the mode for operating the converter if the valley is not available within the predetermined time range. |
| US09787190B2 |
Power conversion device and in-vehicle power supply device equipped with same
In a DC/DC converter that performs zero-voltage switching, capacitors are connected respectively in parallel to first and second MOSFETs that are included in an inverter unit in the primary-side of a transformer, and an inductor is connected to an AC output line. In a range of a current being more than a predetermined value, a control circuit controls the inverter unit using a PWM control with a fixed dead time, and in a light load range where the current is equal to or less than the predetermined value, the control unit changes the control to a PFM control and decreases a frequency so that the dead time becomes longer as the current decreases, to thereby keep a duty ratio without change. |
| US09787187B2 |
Dual-constant-time buck-boost switching regulator and control circuit and method thereof
The present invention provides a dual constant time buck-boost switching regulator, and a control circuit and a method thereof. The buck-boost switching regulator converts an input voltage to an output voltage and it includes a buck circuit and a boost circuit. The buck circuit includes an inductor, a buck power switch and a buck power device. The boost circuit includes the inductor, a boost power switch and a boost power device. The present invention controls the buck power switch to be OFF by a constant OFF time in the buck conversion mode, and controls the boost power switch to be ON by a constant ON time in the boost conversion mode. An offset signal ensures that the buck-boost regulator operates only in pure buck conversion mode and pure boost conversion mode, but does not need to operate in a buck-boost conversion mode. |
| US09787181B2 |
Sensor device and monitoring system
A sensor device includes a first sensor unit, a control IC configured to switch a power supply route, a power supply, a DC converter, and a regulator configured to regulate the voltage. A power supply route A and a power supply route B is provided as a power supply route from the power supply to the sensor unit and the control IC. In the power supply route A, the sensor unit is not electrically conducted to the power supply, and the control IC is directly connected to the power supply. In the power supply route B, the power supply, the DC converter, and the regulator are connected in series, output of the regulator is supplied to the sensor unit, and output of the DC converter is supplied to the control IC. The control IC switches between the power supply route A and the power supply route B according to an operating state of the sensor unit. |
| US09787180B2 |
High side switch with current limit feedback
Methods, devices, systems, and integrated circuits are disclosed for switching on an electrical connection to one or more loads. In one example, a switch device includes a voltage source, a power switch circuit block connected to the voltage source, and a current limitation circuit block connected to the voltage source and the power switch circuit block. The switch device further includes a voltage outlet connected to the power switch circuit block. The switch device further includes a current limit feedback circuit connected to the power switch circuit block and the current limitation circuit block. The current limit feedback circuit is configured to enable the switch device to provide a regulated connection between the power switch circuit block and the voltage outlet, wherein the regulated connection defines a current limitation mode, such that the regulated connection reduces the current in the power switch circuit block if the switch device is in the current limitation mode. |
| US09787179B1 |
Apparatus and methods for control of discontinuous-mode power converters
A switching power converter comprising an inductor and one or more switches and configured to operate in a discontinuous operating mode comprises a clamp circuit connected to the ends of the inductor for trapping energy in the inductor during a clamp period. The clamp circuit comprises a first and a second clamp switch connected in series, the clamp circuit arranged and configured to block a voltage of either polarity when both switches are OFF; conduct a current of either polarity when both switches are ON; conduct uni-directionally in one direction when one of the clamp switches is ON; and conduct uni-directionally in the other direction when the other one of the clamp switches is ON. A controller turns the one or more switches ON and OFF to transfer energy from the input to the inductor and from the inductor to the output during an energy transfer phase. |
| US09787174B2 |
Chopper-boosted converter for wind turbines
A converter including a converter control for a wind turbine and a chopper, wherein the converter control includes a dynamic limit value which is allowable for a first tolerance time and a static limit value of the converter. Furthermore, an overcurrent module is provided which includes a limit value expander which is designed to increase the static limit value by a portion of the difference from the dynamic limit value as additional current, and a dynamic module which interacts with the limit value expander in such a way that overcurrents between the static limit value which is increased by the additional current and the dynamic limit value are routed in a first stage to the converter and in a second stage at least partially to the chopper, wherein a switch is made to the second stage after a second tolerance time. |
| US09787166B2 |
Manufacturing method of stator and stator and motor
A manufacturing method of a stator is a method for manufacturing the stator using molds. The stator is constructed so that a stator main body and resin molded portion are integrated. The stator main body includes a terminal portion and a core. The manufacturing method includes: arranging the stator main body such that the terminal portion is located on a top portion of the molds; and filling a cavity with resin. The terminal portion has a gas discharging port configured to discharge gas out of the cavity from inside the cavity in the molds. |
| US09787165B2 |
Motor with simplified winding and reduced brush wear
A motor includes an armature core having m×n teeth (m is an odd number ≧3, and n is a natural number ≧2), a plurality of coils, and a commutator. The motor further includes field magnets including 2n magnetic poles and at least a first-potential brush and at least a second-potential brush. The commutator includes a segment group defined by 2m×n segments. Only the coil defined by winding a continuous conducting wire in a predetermined winding direction is disposed in each of k teeth among the m×n teeth, and only the coil defined by winding the continuous conducting wire in a direction reverse to the predetermined winding direction is disposed in each of teeth disposed at a position separated from each of the k teeth at 360×i degrees (i is a natural number ≦(n−1)) of electric angles. |
| US09787161B2 |
Method and apparatus for near-isothermal compressed gas energy storage
A method and apparatus for gas compression and expansion that simultaneously serves as storage tank for the compressed gas, and heat exchanger for heat transfer to the environment to maintain near-isothermal conditions. |
| US09787160B2 |
Fault-tolerant electrical generator operable with partial power
An electrical machine with a rotor or the stator including a plurality of discrete field modules, and the other one of the rotor and the stator including a plurality of armature coils connected to different power converters. Each field module includes one or more field coils which can be activated independent of the field coils of the neighbouring field modules. When at least one of the field coils is inactivated, e.g. because of a defect, each of the power converters is allowing less power to pass through when an armature coil connected to it is moving over an inactivated field coil, and more power to pass through when the armature coil connected to it is moving over an activated field coil. |
| US09787150B2 |
Rotor of brushless motor
A rotor of a brushless motor used in a fuel pump includes a permanent magnet having first and second ends that are configured to have a thickness ratio so that a degree of margin of those ends, which is a difference between an allowable stress and a temperature stress due to expansion and contraction of a rotor core caused by a temperature change is equal to or greater than a preset value. As a result, a cracking of the permanent magnet on the both ends that is caused by repeated expansions and contractions of the rotor core is prevented. |
| US09787146B2 |
Rotor of rotary electrical machine with interpolar structures
A rotary electrical machine rotor having claw-shaped poles. The machine comprising a plurality of interpolar magnetic assemblies having at least two magnetic assemblies comprising different magnet grades. |
| US09787145B2 |
Power generating apparatus using magnetic force and control method
Provided is a power generation device using magnetic force, the power generation device comprising: a plurality of tunnel-type bodies having unilateral open passages and arranged and fixed at the same intervals on a revolutional orbit, wherein the respective tunnel-type bodies are provided with a plurality of permanent magnets between inner magnetic bodies and outer magnetic bodies, and permanent magnets and the outer magnetic bodies are attached to the outer surface of the inner magnetic bodies such that the permanent magnets facing the inner and outer magnetic bodies can have opposite polarities, thereby forming magnetic fields in inner body spaces; and magnetic border membranes having opposite magnetic poles on the inner and outer sides thereof and formed on entrance sides and exit sides of the tunnel-type bodies. |
| US09787144B2 |
Rotating electrical motor using transverse magnetic flux
According to an embodiment, a rotating electrical machine includes a rotor and a stator. The rotor includes a first coil, first magnetic poles and second magnetic poles. The stator includes a second coil, third magnetic poles and fourth magnetic poles. One of a first magnetic pole and a second magnetic pole opposite to the first magnetic pole is formed such that a leading end of the one of the first magnetic pole and the second magnetic pole lies opposite a central portion of an opposite surface of the stator. One of a third magnetic pole and a fourth magnetic pole opposite to the third magnetic pole is formed such that a leading end of the one of the third magnetic pole and the fourth magnetic pole lies opposite a central portion of an opposite surface of the rotor. |
| US09787142B2 |
Receiver transducer for wireless power transfer
A signal generator generates an electrical signal that is sent to an amplifier, which increases the power of the signal using power from a power source. The amplified signal is fed to a sender transducer to generate ultrasonic waves that can be focused and sent to a receiver. The receiver transducer converts the ultrasonic waves back into electrical energy and stores it in an energy storage device, such as a battery, or uses the electrical energy to power a device. In this way, a device can be remotely charged or powered without having to be tethered to an electrical outlet. |
| US09787141B2 |
Tunable wireless power architectures
Described herein are improved configurations for a wireless power transfer. The parameters of components of the wireless energy transfer system are adjusted to control the power delivered to the load at the device. The power output of the source amplifier is controlled to maintain a substantially 50% duty cycle at the rectifier of the device. |
| US09787140B2 |
Wireless power transfer method and circuit
A power circuit for wirelessly communicating power to a receiving device includes one or more switches for coupling respective ends of different coils of a group of coils together to facilitate selectively connecting the coils in a series configuration, parallel configuration, or combination thereof. The circuit includes a controller configured to control a conduction state of each of the one or more switches, and power terminals in electrical communication with the coils through which a power signal flows. |
| US09787138B2 |
Power reception device and power transmission device
A power reception device includes a first case having an accommodation portion formed therein, a core disposed in the first case, a second coil disposed in the first case and provided on the core, a first electrical device disposed in the first case and connected to the second coil, a first insulation member disposed between an inner surface of the first case and the second coil, and between the inner surface of the first case and the first electrical device, and a cooling device that causes a flow of a coolant to cool the second coil and the first electrical device, the second coil and the first electrical device being attached to the inner surface of the first case with the first insulation member interposed therebetween, the first electrical device being disposed upstream in a flow direction of the coolant from the second coil. |
| US09787134B2 |
Micro power outage compensating module for a server
A micro power outages compensation module for at least one server includes one or more capacitive storage element for storing electrical energy which is releasable for compensating the outages, the module further including a controller for the charging and/or the discharge of the capacitive storage element(s), limiting the charging and/or discharge current of the capacitive storage element(s) sufficiently to enable hot plugging and/or unplugging of the module even during operation of the server. |
| US09787133B2 |
Hot-pluggable uninterruptible power supply module
A hot-pluggable uninterruptible power supply module includes at least one first power supply device, each first power supply device having an end electrically connected with an electronic system and another end electrically connected with an external AC power source; at least one hot-swapping uninterruptible power supply module, each hot-swapping uninterruptible power supply module including a control module, a second power supply device, and a battery that is electrically connected with the second power supply device. The second power supply device is electrically connected with the control module. The control module of each hot-swapping uninterruptible power supply module is electrically connected with each first power supply device. The second power supply device of each hot-swapping uninterruptible power supply module is electrically connected with the electronic system and an end of each first power supply device. |
| US09787132B2 |
Auxiliary power input switch configured to switch between line power and auxiliary power in an emergency
A auxiliary power (AP) input switch includes at least a line power-in terminal, a switched power out terminal, an AC power entry receptacle and a switch actuating element that is switched to an on state to make a connection between the line power-in terminal and the switched power-out terminal, and is switched to an off state to break the connection between line power-in terminal and the switched power-out terminal and to make a connection between the AC power entry receptacle and to the switched power-out terminal. The auxiliary power (AP) input switch that is used as or to replace an emergency cut-off switch for an electrically-driven system, such as a heating system, air conditioning system, refrigeration system, etc., without limitation. |
| US09787124B2 |
Charging device
A charging device includes a plurality of DC charging ports, a detecting circuit and a current output unit. The DC charging ports includes at least one first charging port and at least one second charging port. The output currents provided by the first charging port and the second charging port are lower than or equal to a first current limit and a second current limit, respectively. The detecting circuit is coupled to the DC charging ports to detect the output currents from the DC charging ports. When the current required by the first charging port is lower than the first current limit, the current output unit correspondingly supplies a requested current to the first charging port and distributes a surplus current to the second charging port. A total current limit of the DC charging ports is higher than a supply current limit. |
| US09787123B2 |
Charge/discharge control device and charge/discharge control method
A charge/discharge control device according to an aspect of the present disclosure is equipped with a system frequency measurer 303 that measures a system frequency, a base frequency updater 304 that updates a base frequency, a frequency bias calculator 305 that calculates a frequency bias indicating the difference between the base frequency and the system frequency, a charge/discharge command value decider 306 that uses the frequency bias to decide a power command value, and a charge/discharge controller 307 that causes a power storage system to charge/discharge power. The base frequency updater 304 determines whether or not reverse operation will occur, and in the case of determining that reverse operation will not occur, updates the base frequency so that the base frequency matches a frequency obtained by applying a low-pass filter to a temporal variation of the system frequency, while in the case of determining that reverse operation will occur, updates the base frequency so that the base frequency matches the system frequency. |
| US09787119B2 |
Electric storage device and method for charging same
Provided are: an electric storage device having improved reliability in charging a storage battery; and a charging method. This electric storage device is provided with: an SOC calculation section which calculates a charge rate when a battery voltage reached a predetermined value, in the cases where the battery voltage reached the predetermined value when a lithium ion storage battery is being charged; a voltage difference calculation section, which calculates a battery voltage difference corresponding to a difference between the charge rate and a charge rate at which lithium is deposited; a charge complete voltage calculation means, which calculates a charge complete voltage by adding the voltage difference to the battery voltage obtained when the battery voltage reached the predetermined value; and a charge control means, which completes the charging of the lithium ion storage battery in the cases where the battery voltage reached the charge complete voltage. |
| US09787106B2 |
Method and apparatus for improving cycle life capacity of a battery pack
A method (900) of reducing variation of an energy storage capacity of a battery across its cycle life is disclosed. The method can include the step (901) of monitoring one or more voltages of one or more cells of a battery for a predetermined discharge usage time. Where a profile of the one or more voltages during the predetermined discharge usage time meets a predefined usage criterion, the method can include the step (907) of increasing a discharge voltage limit of the one or more cells. An energy management circuit (614) can be configured with a control circuit (702) operable to increase the discharge limit and to limit discharge of the cells when the discharge limit is reached. |
| US09787105B2 |
Apparatus and method for high efficiency variable power transmission
A high efficiency variable power transmitting apparatus outputs a variable power by modulating, with respect to a time axis, a high frequency signal having a constant amplitude by turning the high frequency signal ON and OFF, amplifying the variable power to satisfy a requested power level of a target device based on a supply voltage having a predetermined level, converting an alternating current (AC) voltage received from a power source to a direct current (DC) voltage, generating the supply voltage having the predetermined level based on the DC voltage, and providing the supply voltage having the predetermined level to the PA. |
| US09787103B1 |
Systems and methods for wirelessly delivering power to electronic devices that are unable to communicate with a transmitter
The embodiments described herein include a transmitter that transmits a power transmission signal (e.g., radio frequency (RF) signal waves) to create a three-dimensional pocket of energy. At least one receiver can be connected to or integrated into electronic devices and receive power from the pocket of energy. The transmitter can locate the at least one receiver in a three-dimensional space using a communication medium (e.g., Bluetooth technology). The transmitter generates a waveform to create a pocket of energy around each of the at least one receiver. The transmitter uses an algorithm to direct, focus, and control the waveform in three dimensions. The receiver can convert the transmission signals (e.g., RF signals) into electricity for powering an electronic device. Accordingly, the embodiments for wireless power transmission can allow powering and charging a plurality of electrical devices without wires. |
| US09787098B2 |
Energy storage system and method to improve energy efficiency of the system
An energy storage system (ESS) includes a battery pack, a power converter, a battery management system (BMS) configured to control and monitor, in real time, the battery pack, a load power controller coupled to the battery pack and an external power source, connected to loads, and an integrated controller configured to control an operation of each component, determine an exclusive supply initiation time based on energy management schedule information including the exclusive supply initiation time, an exclusive supply termination time, and power supply timing information, control power to be supplied to the loads exclusively using power of the battery pack at the exclusive supply initiation time, and, when a current residual charge amount of the battery pack is at least one residual charge amount in the power supply timing information, control power supply to one of the loads set to correspond to the residual charge amount to be cut. |
| US09787096B2 |
Overall dynamic reactive power control in transmission systems
There is provided a method of stabilizing the voltage and reducing power losses in an electric network having a flow of live current and a flow of reactive power, the method comprising reducing the flow of live current by controlling the flow of reactive power within the network. There is also provided an electric network node having a first load point and a second load point, the second load point being at a lower load level than the first load point, the node comprising a reactive power absorber at the first load point and a reactive power generator at the lower load point. An electric network comprising a first substation comprising a first load bus-bar having a first voltage and a second load bus-bar having a second voltage lower than the first voltage; second substations in connection with the first substation, each one comprising a third load bus-bar having a third voltage equal to the second voltage and a fourth load bus-bar having a fourth voltage lower than the third voltage; a reactive power absorber connected to the second load bus-bar; and for each one of the second substations, a reactive power generator connected to the fourth bus-bar. |
| US09787095B2 |
Method for managing the load profile of a low or medium voltage electric network and a control system thereof
The invention relates to a method for managing the load profile of a low or medium voltage electric network that is supplied by at least an electric power source.The electric network comprises one or more electric loads and one or more controllable switching devices for disconnecting/connecting said electric loads from/with said electric power source.The method comprises the step of measuring a time window from a reference instant, the step of determining at least a check instant comprised in said time window and the step of executing a load profile control procedure at said check instant.In a further aspect, the invention relates to a control system for executing the above described method. |
| US09787093B2 |
Local demand side power management for electric utility networks
A demand side electric power supply management system is disclosed. The system comprises an islanded power system having a point of coupling to a supply grid. The islanded power system supplies a plurality of electric loads, each of which is associated with a load controller to control the maximum power demanded by that load. A measuring means associated with the point of coupling measures the total power transfer between the grid and the islanded system, and a system controller monitors the measured power transfer relative to a set point and provides a control signal to a plurality of load controllers. Each load controller receives substantially the same control signal and determines the maximum power which the or each load associated with the load controller is allowed to draw from the islanded power system based on information contained in the control signal. |
| US09787090B2 |
Power packet generation device, power router, and power network
A mixer (power packet generation device) 2 includes switches 21A, 21B, packet generation means 28A, 28B, and a selector 29. The packet generator 28A (28B) causes the switch 21A (21B) to perform ON/OFF operation, based on a target voltage, and a voltage estimated as being applied to a load 4A (4B) in each of a state where a power packet is supplied to the load and a state where no power packet is supplied to the load. The selector 29 performs switching between a state where the packet generators 28A, 28B cause the switches 21A, 21B to perform ON/OFF operation, and a state where the packet generators 28A, 28B maintain the switches 21A, 21B in their OFF states. |
| US09787089B2 |
Apparatus and method for a mobile router to receive power from a plurality of power supplies
The present invention discloses an apparatus and a method for using a plurality of external USB power sources. The electronic apparatus comprises a plurality of USB jacks, a plurality of first diodes, at least one external power source jack, a second diode and a first voltage converter, a processing unit, a main memory, a network interface, at least one SIM card slot, a RF transceiver and a secondary storage. Further when voltage supplied via one or more of the external USB power sources is below a first reference voltage, a first action is performed. |
| US09787088B2 |
Overvoltage protection for NFC devices
The present application relates to a near field communication (NFC) device which has an antenna for receiving NFC signals. The NFC device includes a protection system for protecting a transmit/receive system, and other systems, of the NFC device from potentially damaging voltages that may develop at an output of the antenna if the device enters a strong magnetic field. The protection system includes current control devices that are operative to source or sink current depending upon the polarity of a signal at an output of the antenna, to generate a voltage which at least partially negates a positive or negative voltage at the output of the antenna, thereby reducing the peak voltage at the antenna output. |
| US09787085B2 |
Hot plug device providing turn on FETs with a softstart capability
A hot plug device includes an electronic subsystem and a plurality of main turn on FETs, wherein each main turn on FET includes a gate, a power input for coupling to a power source, and an output for controllably providing power to the electronic subsystem. An auxiliary current path is in parallel with the main turn on FETs and includes a fuse, an impedance element and an auxiliary turn on FET. A turn on controller controls the main turn on FETs and the auxiliary turn on FET. Current is initially through the high impedance auxiliary current path to apply voltage to an output power rail. Subsequently, current is allowed to pass through a plurality of main turn on FETs to the output power rail in response to the output power rail having a voltage exceeding a voltage threshold as a result of using the high impedance auxiliary current path. |
| US09787078B2 |
Ground connection structure for shield wire
A ground connection structure includes: a shield projecting portion being a part of a shield layer of a shield wire projected outside of an exterior covering to be exposed; an annular member for grounding disposed in a position surrounding an outer circumference of the shield wire and including a housing chamber having an opening along an annular shape of the annular member for grounding and being configured to house the shield projecting portion and a ground wire inserted from the opening; and a push-in member inserted from the opening and housed in the housing chamber after insertion of the ground wire and the shield projecting portion to bring the shield projecting portion and the ground wire into close contact with each other. The annular member for grounding includes locking claws configured to project into the housing chamber and lock the push-in member inserted into the housing chamber. |
| US09787077B2 |
Arc proof cover inspection sleeve
An arc proof cover with an integrated window is disclosed. The arc proof cover comprises a body and cover composed of arc and track resistant material. The body includes a first end, second end, and at least one window. In a closed position, the cover is placed over the at least one viewing window. A locking mechanism secures the closed position of the cover. When the locking mechanism is disengaged, the cover can be moved to allow visual inspection of the connectors within the arc proof cover. The body further includes an opening along its length which allows for the wrapping and unwrapping of the arc proof cover around the connectors of an assembled cable accessory. |
| US09787075B2 |
Cable track for scanning head of paper machine or other system
An apparatus includes a cable track configured to be coupled to a moveable object and to be pushed and pulled by the movable object without buckling. The cable track is also configured to transport at least one signal or material to or from the moveable object. The cable track has a curved profile. A cross-section of the cable track showing a height, a width, and a thickness of the cable track can have a “(” shape. The cable track can be configured to be bent in order to create a “U” bend in the cable track, and the cable track can be configured to be pushed and pulled without buckling to change a location of the “U” bend along the cable track. The cable track can be configured to change shape repeatedly between a “J” shape and a “U” shape. |
| US09787071B1 |
Cover for electrical power distribution equipment
A cover for covering at least a portion of electrical power distribution equipment, such as an open end of a conduit riser. The cover has a bottom opening for fitting over the open end of the conduit riser. The cover has an upper opening to allow egress of one or more wires from the open end of the conduit riser. The cover can be configured for fitting over conduit risers of various sizes and/or accommodating different numbers or sizes of wires. The cover can include ventilation openings for permitting egress of heat from the open end of the conduit riser. |
| US09787069B2 |
Structure for mounting retrofit part to cladding member
A structure for mounting a retrofit part to a cladding member may be used to prevent the retrofit part from causing a turn or positional displacement. For example, a clamp structure may include a clamp base and a clamp cover continuous to the clamp base by a hinge. The clamp may further include projections such as spike-shaped portions. The spike-shaped portions are formed and placed on both a mount surface of the clamp base and a mount surface of the clamp cover. The spike-shaped portions may prevent the clamp from causing a turn or positional displacement, and may be each protrusively formed substantially into a pyramid shape with a pointed end. The spike-shaped portions are formed to bite into an exterior surface of a cladding member and that resists external force, such as vibrations, when the clamp is mounted. |
| US09787063B2 |
Sealing ring for a spark plug of an internal combustion engine, spark plug and internal combustion engine
A sealing ring for a spark plug that has an external thread for screwing into an internal combustion engine, a collar and a thread undercut between the external thread and the collar. The sealing ring includes a ring-shaped solid sealing element made from metal. The sealing element has two planar annular sealing surfaces that are arranged parallel to one another. An annular retaining element composed of an elastomer for engaging in the thread undercut of the spark plug in a self-retaining manner is attached to the sealing element on the inner ring side thereof. Also included is a spark plug comprising such a sealing ring, and an internal combustion engine comprising such spark plugs. |
| US09787062B2 |
Vertical cavity surface emitting laser array and method for manufacturing vertical cavity surface emitting laser array
A vertical cavity surface emitting laser array includes a contact layer formed on a substrate; mesa structures formed on the contact layer, each mesa structure including a first semiconductor multilayer reflector of a first conductivity type, an active region on the first semiconductor multilayer reflector, and a second semiconductor multilayer reflector of a second conductivity type on the active region; a first metal layer formed on the contact layer around the mesa structures, a portion of the first metal layer serving as an electrode pad of the first conductivity type; an insulating film formed on the first metal layer; and a second metal layer formed on the insulating film, a portion of the second metal layer serving as an electrode pad of the second conductivity type. The mesa structures are electrically connected in parallel. |
| US09787060B1 |
Magnesium based gettering regions for gallium and nitrogen containing laser diode devices
In an example, the present invention provides a gallium and nitrogen containing laser diode device. The device has a gallium and nitrogen containing substrate material comprising a surface region, which is configured on either a ({10-10}) crystal orientation or a {10-10} crystal orientation configured with an offcut at an angle toward or away from the [0001] direction. The device also has a GaN region formed overlying the surface region, an active region formed overlying the surface region, and a gettering region comprising a magnesium species overlying the surface region. The device has a p-type cladding region comprising an (InAl)GaN material doped with a plurality of magnesium species formed overlying the active region. |
| US09787059B2 |
Semiconductor light emitting element
A semiconductor light-emitting element includes a multilayer body including a first end surface and a second end surface which are opposed to each other, wherein a first semiconductor layer, a light emitting layer, and a second semiconductor layer are stacked; a pair of recesses that are formed on the second semiconductor layer, separated from the second end surface, and separated from each other in the direction parallel to the first and second end surfaces; a ridge portion that is a protrusion between the pair of recesses and extends along the direction perpendicular to the first and second end surfaces; a band-shaped electrode disposed on the ridge portion; and a light guide layer formed on the second semiconductor layer between the ridge portion and the second end surface and guides light from the light emitting layer. |
| US09787057B2 |
Laser diode driver damping circuit
A damping circuit having an input terminal and an output terminal is described. The damping circuit comprises a driver having an input and an output; an RC circuit coupled between the input terminal and the output; and a resistor coupled between the output and the output terminal, wherein the RC circuit delays passing a signal from the output terminal to the input terminal and a low impedance associated with the driver generally reduces ringing. |
| US09787055B2 |
Semiconductor strip laser and semiconductor component
A semiconductor strip laser and a semiconductor component are disclosed. In embodiments the laser includes a first semiconductor region of a first conductivity type of a semiconductor body, a second semiconductor region of a second different conductivity type of the semiconductor body, at least one active zone of the semiconductor body configured to generate laser radiation between the first and second semiconductor regions. The laser further includes a strip waveguide formed at least in the second semiconductor region and providing a one-dimensional wave guidance along a waveguide direction of the laser radiation generated in the active zone during operation, a first electric contact on the first semiconductor region, a second electric contact on the second semiconductor region and at least one heat spreader dimensionally stably connected to the semiconductor body at least up to a temperature of 220° C., and having an average thermal conductivity of at least 50 W/m·K. |
| US09787054B2 |
Optical package providing efficient coupling between DFB-LD and silicon PIC edge couplers with low return loss
An optical package for providing efficient coupling between a distributed feedback laser diode (DFB-LD) and a silicon photonic integrated-circuit chip (Si PIC) edge couplers with low return loss, as well as variations thereof, is described. The optical package may include a DFB-LD, a Si PIC, a single mode fiber or fiber array assembly, a lens and a spacer. The Si PIC may include an input edge coupler and an output edge coupler. The single mode fiber or fiber array assembly may be aligned to the output edge coupler. The lens may be disposed between the DFB-LD and the input edge coupler, and may be configured to minimize a mismatch between an output spot size of the DFB-LD and a spot size of the input edge coupler of the Si PIC. The spacer may be bonded to a facet of the input edge coupler with an index matching fluid. |
| US09787052B2 |
Temperature insensitive external cavity lasers on silicon
A technique related to a semiconductor chip is provided. An optical gain chip is attached to a semiconductor substrate. An integrated photonic circuit is on the semiconductor substrate, and the optical gain chip is optically coupled to the integrated photonic circuit thereby forming a laser cavity. The integrated photonic circuit includes an active intra-cavity thermo-optic optical phase tuner element, an intra-cavity optical band-pass filter, and an output coupler band-reflect optical grating filter with passive phase compensation. The active intra-cavity thermo-optic optical phase tuner element, the intra-cavity optical band-pass filter, and the output coupler band-reflect optical grating filter with passive phase compensation are optically coupled together. |
| US09787051B2 |
Compact optical frequency comb systems
Compact optical frequency sources are described. The comb source may include an intra-cavity optical element having a multi-material integrated structure with an electrically controllable active region. The active region may comprise a thin film. By way of example, the thin film and an insulating dielectric material disposed between two electrodes can provide for rapid loss modulation. In some embodiments the thin film may comprise graphene. In various embodiments of a frequency comb laser, rapid modulation of the CEO frequency can be implemented via electric modulation of the transmission or reflection loss of an additional optical element, which can be the saturable absorber itself. In another embodiment, the thin film can also be used as a saturable absorber in order to facilitate passive modelocking. In some implementations the optical element may be formed on a cleaved or polished end of an optical fiber. |
| US09787049B2 |
Laser oscillator having folding mirror
A laser oscillator configured to limit a mode hopping over a long duration. A laser oscillator has an optical resonator including an output coupler and a rear mirror positioned on an optical axis, at least one folding mirror positioned on the optical axis and between the output coupler and the rear mirror, and a discharge tube positioned between the output coupler or the rear mirror and the folding mirror. At least one folding mirror has a toric surface shape, a saddle surface shape or a cylindrical shape, and is configured to rotate about a straight line as a rotation axis, which extends through one point on a surface of the folding mirror and is perpendicular to the surface of the folding mirror. |
| US09787048B1 |
Fiber encapsulation mechanism for energy dissipation in a fiber amplifying system
The present disclosure relates to a fiber encapsulation mechanism for energy dissipation in a fiber amplifying system. One example embodiment includes an optical fiber amplifier. The optical fiber amplifier includes an optical fiber that includes a gain medium, as well as a polymer layer that at least partially surrounds the optical fiber. The polymer layer is optically transparent. In addition, the optical fiber amplifier includes a pump source. Optical pumping by the pump source amplifies optical signals in the optical fiber and generates excess heat and excess photons. The optical fiber amplifier additionally includes a heatsink layer disposed adjacent to the polymer layer. The heatsink layer conducts the excess heat away from the optical fiber. Further, the optical fiber amplifier includes an optically transparent layer disposed adjacent to the polymer layer. The optically transparent layer transmits the excess photons away from the optical fiber. |
| US09787047B2 |
Sensor and method of producing the same
A sensor includes a sensor element and a conductive wire. The sensing element includes a sensing portion and a terminal wire extending from the sensing portion. The sensing portion has an electrical characteristic that changes in accordance with a change in an atmosphere. The conductive wire is for communicating an electrical signal from the sensor element. The conductive wire includes a plurality of conductors twisted together. The terminal wire and the conductive wire are arranged in a longitudinal direction of the sensor and are connected to each other by welding. The conductive wire includes a first weld portion formed by integrating the plurality of conductors in the longitudinal direction by welding. The terminal wire and the conductive wire are connected to each other through a second weld portion, and the second weld portion is formed only in a region longitudinally overlapping the first weld portion. |
| US09787043B2 |
Hand crimp tool
The invention relates to an hand crimp tool for crimping electrical contact terminals onto electrical cables. This hand crimp tool comprises a crimping frame with two substantially parallel guide rails, and the lever handles configured to be manually operated. The hand crimp tool further comprises a first crimping die and a corresponding second crimping die, at least one of which being mounted to a die carrier. The guide rails are substantially bar-shaped and oriented in a common longitudinal direction. The die carrier is configured to slide in a linear direction parallel to the longitudinal direction of the guide rails, along inner opposite faces of the guide rails, thereby being guided from a cable receiving position to a crimping position. |
| US09787042B2 |
Processing station and method for the automated manufacture of cable harnesses and processing unit for such a processing station
A processing station automatically manufactures a cable harness containing a plurality of individual lines. The processing station has a support unit for holding a line bundle containing the individual lines with a predefined, even branched, routing, and a processing unit for the automated fixing of the individual lines of the line bundle to one another. The processing unit has a fixing unit, which is configured for the automated application of a fixing agent to the line bundle. A manipulator is provided for moving the processing unit relative to the line bundle. |
| US09787040B2 |
Energy-saving power strip
The panel (220), the energy-saving switch (230), and the connector (240) may be formed in a separable module type corresponding to each of the power sockets (130). The separable module type increases usability, because it is possible to use the modules only for necessary ones of the plugs (P) in the power sockets (130) and not to insert them into the power sockets (130) without a plug (P) connected. |
| US09787037B2 |
Power adapter for RF coaxial cable and method for installation
An adapter for coupling a coaxial interface to a power conductor and method for interconnection may be provided as a body with a conductor junction dimensioned to couple with the power conductor and a mating surface dimensioned to couple with the coaxial interface. The conductor junction, an outer conductor contacting portion of the mating surface and an inner conductor contacting portion of the mating surface are electrically coupled together by the body. |
| US09787034B2 |
Cage assembly
A cage assembly comprises a cage, at least one heat sink, at least one clip and at least one light guide. The cage comprises a front end, a rear end, a top wall positioned between the front end and the rear end and a rear wall positioned at the rear end, the cage is formed with at least one port, the port extends from the front end to the rear end. The heat sink is provided on the top wall of the cage and corresponds to one port. The clip comprises a frame engaged with the top wall and fixing the heat sink and a holding piece extending upwardly from the frame. The light guide has a front section and a rear section, the front section is formed with a first post extending rearwardly, the rear section is formed with two second posts respectively extending forwardly, the first post is inserted into a first hole formed to the holding piece of the clip along a front-to-rear direction, the two second posts are respectively inserted into two second holes formed to the rear wall of the cage along a rear-to-front direction. |
| US09787033B2 |
Card connector system with heat dissipation and electromagnetic interference (EMI) shielding
A system according to one embodiment includes opposing slide plates, and opposing guide blocks configured to receive the slide plates therebetween and push the slide plates together during a relative motion between the slide plates and the guide blocks. A system according to another embodiment includes opposing slide plates and a thermal interface material coupled to opposing inner faces of the slide plate. Opposing guide blocks are configured to receive the slide plates therebetween and push the slide plates together during a relative motion between the slide plates and the guide blocks. An interface connector is coupled to at least one of the guide blocks and the slide plates, the interface connector having electrical connectors on opposite ends thereof. |
| US09787030B2 |
Patch cord having a plug contact with a signal injection point in its middle
Patch cords are provided that include a communications cable that has at least first through fourth conductors and a plug that is attached to the cable. The plug includes a housing that receives the cable, a printed circuit board, first through fourth plug contacts, and first through fourth conductive paths that connect the first through fourth conductors to the respective first through fourth plug contacts. The first and second conductors, conductive paths, and plug contacts form a first differential transmission line, and the third and fourth conductors, conductive paths, and plug contacts form a second differential transmission line. Each of the first through fourth plug contacts has a first segment that extends longitudinally along a first surface of the printed circuit board, and the signal current injection point into the first segment of at least some of the first through fourth plug contacts is into middle portions of their respective first segments. |
| US09787029B1 |
High speed connector assembly, receptacle connector and plug connector
A high speed connector assembly is disclosed in this invention, including a receptacle connector and a plug connector. Each receptacle terminal of the receptacle connector disposes a first L-type contact piece, and each plug terminal of the plug connector disposes a second L-type contact piece. When the receptacle connector and the plug connector are electrically engaged, an extension section of the first L-type contact piece is pressed on a straight part of the second L-type contact piece, and an extension part of the second L-type contact piece is pressed on a straight section of the first L-type contact piece. So this engagement can form a double-contacts structure to restrain the short pile effect and reduce the crosstalk and loss at high speed signal transmission. A receptacle connector and a plug connector are also disclosed in this invention. |
| US09787023B2 |
Connector and connector assembly with touch rotection feature
A connector is mateable with a mating connector along a front-rear direction. The mating connector has a mating lock portion. The connector comprises a housing and a contact. The housing has an upper wall and a lower wall. The housing forms a receiving portion. The receiving portion receives the mating connector when the connector and the mating connector are mated with each other. The contact is held by the housing. The contact protrudes in the receiving portion. The receiving portion is positioned between the upper wall and the lower wall in an up-down direction perpendicular to the front-rear direction. An inner surface of the upper wall is provided with a lock portion and a protrusion portion. When the connector and the mating connector are mated with each other, the lock portion locks the mating lock portion to lock a mating of the connector with the mating connector. The protrusion portion protrudes downward in the up-down direction. |
| US09787022B2 |
Methods and systems for magnetic coupling
Systems and methods for magnetic coupling. One system includes an external computing device and a connector having a conductive end. The system also includes a printed circuit board. The printed circuit board includes a connector side opposite a back side. The connector side has a contact pad with an aperture. The printed circuit board also includes a magnet positioned on the back side of the printed circuit board. The magnet provides a magnetic field configured to provide magnetic attraction forces to a connector contacting the contact pad. The printed circuit board also includes a communication terminal. The system also includes a circuit in communication with the printed circuit board through the connector and contact pad. |
| US09787021B2 |
Connector unit
A connector unit for connecting at least two cables includes a male part, a female part, and a shuttle piston. The shuttle piston includes at least one magnetic connecting device for establishing a magnetic connection between the shuttle piston, and at least one magnetic connecting aid of the male part and at least one latching structure for establishing a force-fitting connection between the shuttle piston and the female part. The male part includes the magnetic connecting aid for interaction with the magnetic connecting device of the shuttle piston for establishing the magnetic connection between the shuttle piston and the male part, and an interaction area for interaction in a force-fitting manner with at least one backing latch of the female part. The female part includes the backing latch for establishing the force-fitting connection and for interacting at least with the interaction area of the male part in a force-fitting manner. |
| US09787018B2 |
Watertight connector
A one-piece rubber plug (50) is arranged on a rear end part of a housing (70) and a rear holder (30) to be locked to the housing (70) is arranged behind the rubber plug (50). A receptacle (10) is fit externally to the housing (70) from front and an opening end part of the receptacle (10) is held in close contact with lips (55) of the rubber plug (50). The receptacle (10) includes short side walls (15) that face each other in a first direction and long side walls (14) that face each other in a second direction. Receptacle-side escaping portions (19) retracted more in a front-back direction than inner peripheries of opening end parts of the long side walls (14) are provided on inner peripheries of opening end parts of the short side walls (15). |
| US09787012B2 |
Terminal fitting with resilient pieces having thin plating region and thick plating region
It is aimed to provide a terminal fitting (1) in which thick plating films can be formed on necessary parts without requiring particularly complicated plating. The terminal fitting (10) includes a tubular connecting portion (11) into which a mating male terminal (60) is insertable. The connecting portion (11) includes a plurality of resilient pieces (14) circumferentially divided via expanding slots (13) extending from a tip. Thick film portions (22) with a thicker plating film than in other parts are provided on inner surfaces of the plurality of resilient pieces (14) and contact areas (17) capable of contacting the male terminal (60) are provided on these thick film portions (22). The thick film portions (22) and the contact areas (17) are arranged continuously in a circumferential direction except at the positions of the expanding slots (13) on an inner surface of the connecting portion (11) near a tip. |
| US09787002B1 |
Sealed electric terminal assembly
A wire terminal assembly is disclosed for a cable conductive core of a first metal core. A conductive terminal of a second metal is connected to the conductive cable core along a conductive connection interface. A coating is disposed over the conductive connection interface. The coating includes the free radical addition polymerizate of a coating composition of: (1) an oligomer comprising at least two active unsaturated bonds, and (2) an acrylic monomer. |
| US09786996B2 |
Microstrip patch antenna array
A patch antenna array includes a plurality of patch antenna elements spaced apart from each other and arranged as an array. Each patch antenna element has a substrate, a radiating patch associated with the substrate and a ground plane associated with the substrate. The patch antenna elements are discrete and separate from each other. At least one element frame holds the discrete antenna elements in the array. Each element frame captures and positions at least two patch antenna elements relative to each other. |
| US09786994B1 |
Co-located, multi-element antenna structure
Antenna structures and methods of operating the same of an electronic device are described. One apparatus includes a first radio frequency (RF) feed, a second RF feed and an antenna structure. The antenna structure includes a ground plane, a first antenna element coupled to the first RF feed, a second antenna element coupled to the second RF feed and coupled to the ground plane at a first grounding point located at a distal end of the second antenna element. The first antenna element operates as a first directly-fed element and the second antenna element operates as a first parasitic ground element when RF signals in a first frequency range are applied to the first RF feed. The second antenna element operates as a second directly-fed element when RF signals in a second frequency range are applied to the second RF feed, the second frequency range being higher than the first frequency range. The first antenna element is grounded by the RF short circuit when the RF signals in the second frequency range are applied to the second RF feed. |
| US09786986B2 |
Beam shaping for reconfigurable holographic antennas
A reconfigurable holographic antenna and a method of shaping an antenna beam pattern of a reconfigurable holographic antenna is disclosed. A baseline holographic pattern is driven onto a reconfigurable layer of the reconfigurable holographic antenna while a feed wave excites the reconfigurable layer. An antenna pattern metric representative of a baseline antenna pattern is received. The baseline antenna pattern is generated by the reconfigurable holographic antenna while the baseline holographic pattern is driven onto the reconfigurable layer. A modified holographic pattern is generated in response to the antenna pattern metric. The modified holographic pattern is driven onto the reconfigurable layer of the reconfigurable holographic antenna to generate an improved antenna pattern. |
| US09786985B2 |
Apparatus, system and method of beamforming training
Some demonstrative embodiments include apparatuses, devices, systems and methods of beamforming training. For example, an apparatus may include a transmitter, a receiver, and a controller to repeat a beamforming training sequence including a transmit (Tx) mode and a receive (Rx) mode, at the Tx mode the transmitter is to transmit a directional Tx training signal to a wireless communication device, and at the Rx mode the receiver is to be at an omnidirectional Rx state, wherein subsequent to successful receipt of a directional Rx training signal from the wireless communication device at the receiver, the transmitter is to transmit the directional Tx training signal including an Rx beam indication to indicate a beam direction of the Rx training signal. |
| US09786982B2 |
Electronic device
Provided is an electronic device which includes a body portion including a first radiator and a wearing portion including at least one second radiators, in which the second radiators form capacitive coupling with the first radiator or a ground portion provided in the body portion, thereby providing stable operation characteristics of the first radiator. The electronic device may be implemented variously according to an embodiment. |
| US09786974B2 |
Tunable band-pass filter
The present invention comprises: a conductive chassis having a cavity resonator; a conductive cover to cover the cavity resonator; a resonant element arranged in the cavity resonator, one end of the resonant element being connected with the chassis and the other end being open end; and a movable conductor arranged in a space between the open end of the resonant element and the conductive cover. As a result, a tunable band-pass filter which is inexpensive and of a simple structure and which can change a resonance frequency of a cavity resonator and the coupling amount between cavity resonators easily is realized. |
| US09786969B2 |
Magnetically controlled traction battery thermal plate
A vehicle traction battery assembly is provided. The vehicle traction battery assembly may include an array of battery cells, a thermal plate in thermal communication with the array and defining a coolant path, and an electromagnet. The electromagnet may be positioned proximate to the path and configured to selectively output a magnetic field to influence movement of magnetic particles within coolant flowing through the path to control the flowing. The assembly may also include at least one sensor located proximate to the array and configured to output a signal indicative of a temperature of at least one of the battery cells. A controller may be configured to, in response to the signal, direct the electromagnet to adjust the magnetic field. |
| US09786967B2 |
Battery pack and method of controlling an electric fan in the battery pack
A battery pack is provided. The battery pack includes first and second temperature sensors that are disposed in first and second interior spaces, respectively. The first temperature sensor generates a first signal indicative of a first temperature level of the battery cell. The second temperature sensor generates a second signal indicative of a second temperature level of the DC-DC voltage converter. The battery pack further includes a microprocessor that determines a first desired operational speed value of the electric fan based on the first temperature level, and a second desired operational speed value of the electric fan based on the second temperature level. The microprocessor selects the first desired operational speed value if the first desired operational speed value is greater than the second desired operational speed value. |
| US09786966B2 |
Cold plate assembly for electrified vehicle battery packs
An assembly according to an exemplary aspect of the present disclosure includes, among other things, a cold plate including a cooling circuit, a first end cap attached to the cold plate and a first manifold inside the first end cap and configured to fluidly connect a first fluid channel and a second fluid channel of the cooling circuit. |
| US09786965B2 |
Power source device
A power source device comprises: a battery module having a rectangular parallelepiped shape including a battery stacked body having a plurality of battery cells stacked in one direction, a pair of end plates respectively disposed on a first end surface and a second end surface located at two ends of the battery stacked body, and a constraining member coupled to the pair of the end plates. Further, the power source device comprises: a frame having a fastening surface; fastening members for fastening the battery module in such a state that one surface of the battery module adjacent to the first end face and the second end face faces the fastening surface. The constraining member is formed such that a hardness of the constraining member becomes stronger against an external force applied to a stacked direction of the plurality of battery cells as the constraining member goes away from the fastening surface. |
| US09786964B2 |
Refrigeration cycle device for auxiliary heating or cooling
In an operation mode for heating battery air, a refrigerant passage switching portion switches over to a first refrigerant passage in which a refrigerant including gas refrigerant flowing out of an interior condenser flows into an auxiliary heat exchanger through a first pipe having a relatively large passage cross-sectional area and a liquid refrigerant flowing out of the auxiliary heat exchanger flows to an inlet of an exterior heat exchanger through a second pipe having a relatively small passage cross-sectional area. Meanwhile, in an operation mode for cooling the battery air, the refrigerant passage switching portion switches over to a second refrigerant passage in which a liquid refrigerant flowing out of the exterior heat exchanger flows into the auxiliary heat exchanger through the second pipe and a gas refrigerant flowing out of the auxiliary heat exchanger flows to a suction port of a compressor through the first pipe. |
| US09786958B2 |
Rechargeable battery with temperature-protecting element
A rechargeable battery includes an electrode assembly including a separator, and a first electrode and a second electrode disposed at opposite sides of the separator, a pouch accommodating the electrode assembly and including a terrace portion, first and second lead tabs extending from the first electrode and the second electrode, respectively, through the terrace portion of the pouch, and a temperature protecting element on the terrace portion. The temperature protecting element has a first surface connected to the first lead tab and to a connection tab partially contacting the terrace portion, and a second surface attached to the terrace portion and extending beyond the terrace portion, such that an insulating tape surrounds the terrace portion and covers the first lead tab, the connection tab, and the second surface of the temperature protecting element. |
| US09786956B2 |
Current collector design to reduce granule bed disruption
Apparatus and methods to reduce granule disruption during manufacture of electrochemical cells, such as a metal halide electrochemical cell, are provided. In one embodiment, a current collector can include a diffuser strip extending beneath an aperture configured to receive an injection stream of molten electrolyte. The diffuser strip can be configured to dissipate an injection stream of molten electrolyte when the molten electrolyte is injected into an electrochemical cell. In this way, disruption of a granule bed by the injection of the molten electrolyte during manufacture of the electrochemical cell can be reduced. |
| US09786952B2 |
Lithium secondary cell including an electrolytic solution including cyclic acid anhydrides
An object of the present invention is to provide a high-capacity, long-life lithium secondary cell suppressing a reduction in capacity particularly with respect to use under a high-temperature environment, and having improved cycle properties. The lithium secondary cell comprises a positive electrode active material layer containing a positive electrode active material, a negative electrode active material layer containing a silicon-based material as a negative electrode active material, and an electrolytic solution in which the positive electrode active material layer and the negative electrode active material layer are immersed, the electrolytic solution contains one or more of specific cyclic acid anhydrides. |
| US09786950B2 |
Organic-inorganic silicon structure-containing block copolymer, electrolyte including the same, and lithium battery including the electrolyte
An organic-inorganic silicon structure-containing block copolymer including a first domain including an ion conductive polymer block; and a second domain including a polymer block including a non-conducting polymer and an organic-inorganic silicon structure, wherein the organic-inorganic silicon structure is connected to a side chain connected to a backbone of the non-conducting polymer. |
| US09786945B2 |
Method and apparatus for manufacturing electrode assembly for rectangular battery
In a method of manufacturing an electrode assembly for a rectangular battery, in which positive electrodes and negative electrodes are alternately laminated so that a separator exists between the respective positive and negative electrodes, the manufacturing method includes the steps of: arranging a plurality of guide members in zigzag form in a perpendicular direction; inserting a continuous member of the separator between one and another one rows of the guide members; folding, into zigzag form, the continuous member by intersecting the rows of the guide members in a horizontal direction; inserting alternately the positive electrodes and the negative electrodes in respective valley grooves of the zigzag-folded continuous member; withdrawing the guide members from the respective valley grooves of the continuous member; and pressing, thereafter, the continuous member in the zigzag direction so as to make flat the continuous member. |
| US09786944B2 |
High energy density redox flow device
Redox flow devices are described in which at least one of the positive electrode or negative electrode-active materials is a semi-solid or is a condensed ion-storing electroactive material, and in which at least one of the electrode-active materials is transported to and from an assembly at which the electrochemical reaction occurs, producing electrical energy. The electronic conductivity of the semi-solid is increased by the addition of conductive particles to suspensions and/or via the surface modification of the solid in semi-solids (e.g., by coating the solid with a more electron conductive coating material to increase the power of the device). High energy density and high power redox flow devices are disclosed. The redox flow devices described herein can also include one or more inventive design features. In addition, inventive chemistries for use in redox flow devices are also described. |
| US09786943B2 |
Direct liquid fuel cell having ammonia borane, hydrazine, derivatives thereof or/and mixtures thereof as fuel
A fuel cell system comprising an anode compartment which comprises an anode having a copper catalyst layer, a cathode configured as an air cathode and a separator interposed between said anode and said cathode, operable by an amine-derived fuel and oxygen (or air) is disclosed. Further disclosed are fuel cell systems comprising an anode compartment which comprises an anode having a copper catalyst layer, a cathode and a separator interposed between said anode and said cathode, which are operable by a mixture of two types of amine-derived compounds (e.g., ammonia borane, hydrazine and derivatives thereof). Also disclosed are methods of producing electric energy by, and electric-consuming devices containing and operable by, the disclosed fuel cell systems. |
| US09786942B2 |
Membrane electrode and fuel cell using the same
A membrane electrode includes a first electrode, a second electrode, and a proton exchange membrane sandwiched between the first electrode and the second electrode. The first electrode includes a first gas diffusion layer and a first catalyst layer. The second electrode includes a second gas diffusion layer and a second catalyst layer. The first catalyst layer or the second catalyst layer includes a carbon nanotube-metal particle composite including carbon nanotubes, polymer layer, and metal particles. The polymer layer is coated on a surface of the carbon nanotubes and defines a plurality of pores uniformly distributed; the metal particles are located in the pores. A fuel cell including the membrane electrode is also disclosed. |
| US09786936B2 |
Method for supplying air to a fuel cell
A method for supplying air to a fuel cell (2), using a controllable air conveying device (7) which delivers an air mass flow for a cathode chamber (4) of the fuel cell (2), and using at least one air mass flow sensor (9, 18). The invention is characterized in that, for at least one location (19) in the air flow path which is situated at a distance from the at least one air mass flow sensor (9) in the flow direction, a computed estimate is made of the air mass flow present at that location. |
| US09786935B2 |
Fuel cell system and fuel cell system control method
A controller (control portion) of a fuel cell system is provided with a flow path switching control device that switches a thermostat valve (flow path switching valve) so that, after a fuel cell has stopped generating electric power, coolant is supplied to a radiator circulation path until the coolant temperature becomes a second temperature threshold value that is lower than a first temperature threshold value. |
| US09786929B2 |
Fuel cell and fuel cell stack comprising the same
A fuel cell of the present disclosure includes an electrolyte-layer-electrode assembly, a first separator, a second separator, and one or more gas permeation suppressing sections, the inner surface of the first separator and the inner surface of the second separator have a first region and a second region, the gas permeation suppressing section is provided at least one of a first reactant gas channel and a second reactant gas channel so as to overlap with the first region when viewed in a thickness direction of the first separator, and the gas permeation suppressing section is provided at least one of the first reactant gas channel and the second reactant gas channel so as to overlap with the second region when viewed in the thickness direction of the first separator. |
| US09786926B2 |
Printed silver oxide batteries
An energy storage device, such as a silver oxide battery, can include a silver-containing cathode and an electrolyte having an ionic liquid. An anion of the ionic liquid is selected from the group consisting of: methanesulfonate, methylsulfate, acetate, and fluoroacetate. A cation of the ionic liquid can be selected from the group consisting of: imidazolium, pyridinium, ammonium, piperidinium, pyrrolidinium, sulfonium, and phosphonium. The energy storage device may include a printed or non-printed separator. The printed separator can include a gel including dissolved cellulose powder and the electrolyte. The non-printed separator can include a gel including at least partially dissolved regenerate cellulose and the electrolyte. An energy storage device fabrication process can include applying a plasma treatment to a surface of each of a cathode, anode, separator, and current collectors. The plasma treatment process can improve wettability, adhesion, electron and/or ionic transport across the treated surface. |
| US09786923B2 |
Porous electrode substrate, method for manufacturing same, membrane electrode assembly, polymer electrolyte fuel cell, precursor sheet, and fibrillar fibers
Provided is a porous electrode substrate having excellent thickness precision, gas permeability and conductivity, handling efficiency, low production costs and a high carbonization rate during carbonization. Also provided are a method for manufacturing such a substrate, a precursor sheet and fibrillar fiber used for forming such a substrate, along with a membrane electrode assembly and a polymer electrolyte fuel cell that contain such a substrate. The method for manufacturing a porous electrode substrate includes step (1) for manufacturing a precursor sheet in which short carbon fibers (A) and carbon fiber precursor (b) are dispersed, and step (2) for carbonizing the precursor sheet, and the volume contraction rate of carbon fiber precursor (b) in step (2) is 83% or lower. The present invention also relates to a porous electrode substrate obtained by such a manufacturing method, a precursor sheet and fibrillar fiber used for forming the substrate, along with a membrane electrode assembly and a polymer electrolyte fuel cell containing the substrate. |
| US09786918B2 |
Non-aqueous electrolyte secondary battery
A non-aqueous electrolyte secondary battery in which it is possible to increase a capacity retention rate is provided.A non-aqueous electrolyte secondary battery is provided which includes: a positive electrode layer that includes a positive electrode active material and a conductive material; a negative electrode layer; and a non-aqueous electrolytic solution that is arranged between the positive electrode layer and the negative electrode layer, where an upper limit voltage is equal to or more than 4.5 V with respect to the oxidation-reduction potential of lithium, and the surface of the conductive material is coated with a coating layer mainly formed of P, O, C and H. |
| US09786910B2 |
Synthesized, surface-functionalized, acidified metal oxide materials for energy storage, catalytic, photovoltaic and sensor applications
An acidified metal oxide (“AMO”) material, preferably in monodisperse nanoparticulate form 20 nm or less in size, having a pH<7 when suspended in a 5 wt % aqueous solution and a Hammett function H0>−12, at least on its surface. The AMO material is useful in applications such as a battery electrode, catalyst, or photovoltaic component. |
| US09786909B2 |
Nonaqueous electrolyte battery, battery pack and vehicle
A nonaqueous electrolyte battery includes a positive electrode, a negative electrode and a nonaqueous electrolyte. The negative electrode contains a lithium compound and a negative electrode current collector supporting the lithium compound. A log differential intrusion curve obtained when a pore size diameter of the negative electrode is measured by mercury porosimetry has a peak in a pore size diameter range of 0.03 to 0.2 μm and attenuates with a decrease in pore size diameter from an apex of the peak. A specific surface area (excluding a weight of the negative electrode current collector) of pores of the negative electrode found by mercury porosimetry is 6 to 100 m2/g. A ratio of a volume of pores having a pore size diameter of 0.05 μm or less to a total pore volume is 20% or more. |
| US09786908B2 |
Positive electrode for non-aqueous electrolyte secondary battery and non-aqueous electrolyte secondary battery
An object is to provide a positive electrode for a non-aqueous electrolyte secondary battery and a non-aqueous electrolyte secondary battery that allow a high output characteristic. Included are a positive electrode collector and a positive electrode mixture layer formed on at least one surface of the positive electrode collector. The positive electrode mixture layer contains particles 3 of lithium nickel cobalt manganese oxide represented by LiNi0.55Co0.2OMn0.25O2, erbium oxyhydroxide 1 fixed on the surfaces of the particles of the lithium nickel cobalt manganese oxide 3, tungsten trioxide 2 adhering to the surfaces of the particles of the lithium nickel cobalt manganese oxide 3, and a binder. |
| US09786906B2 |
Composite cathode materials with controlled irreversible capacity loss for lithium ion batteries
Composite materials for a cathode of an electrochemical cell. The composite materials comprise Li[M1−xLix]O2 or yLi2MnO3.(1−y)LiMO2 (M=Ni, Co, Mn, 0 |
| US09786905B2 |
Iron, fluorine, sulfur compounds for battery cell cathodes
Provided herein are energy storage device cathodes with high capacity electrochemically active material including compounds that include iron, fluorine, sulfur, and optionally oxygen. Batteries with active materials including a compound of the formula FeFaSbOc exhibit high capacity, high specific energy, high average discharge voltage, and low hysteresis, even when discharged at high rates. Iron, fluorine, and sulfur-containing compounds may be ionically and electronically conductive. |
| US09786897B2 |
Electrode assembly and rechargeable battery having electrode tab
An electrode assembly and a secondary battery having an electrode tab are disclosed. In one aspect, the electrode assembly includes first and second electrodes which are wound with a separator placed therebetween. The first electrode includes a first coated portion, and a plurality of first electrode tabs T1-Tn not coated with an active material and protruding outwardly from the first coated portion, wherein n is greater than 2. The first electrode, when spread in a plane form, includes first to nth portions on which the first electrode tabs T1-Tn are respectively formed, wherein the first and nth portions respectively define the innermost and outermost portions thereof. The distance between the first electrode tab Tn placed at the outermost portion and the first electrode Tn−1 placed at the second outermost portion is greater than any of the distances between two adjacent ones of the other first electrode tabs T1-Tn−1. |
| US09786896B2 |
Lithium-ion secondary battery
A lithium-ion secondary battery includes: an electrode body in which a positive electrode and a negative electrode are stacked or wound through a separator; a plurality of positive electrode tabs drawn from the electrode body; a plurality of negative electrode tabs drawn from the electrode body; a joint portion between the positive electrode tabs and a positive electrode lead tab; and a joint portion between the negative electrode tabs and a negative electrode lead tab. Apart of a metal plate is disposed on a surface of the positive electrode tab or positive electrode lead tab in the joint portion and on a surface of the negative electrode tab or negative electrode lead tab in the joint portion and joined integrally thereto, and a remaining part of the metal plate is wound around the joint portions. |
| US09786891B2 |
Electrode assembly and lithium secondary battery comprising the same
An electrode assembly, comprises one or more first electrodes comprising a cathode; one or more second electrodes comprising an anode; and a separator sheet having a zigzag form interposed therebetween. The separator sheet comprises a first porous polymer substrate; a first coating layer formed on one surface of the first porous polymer substrate and comprising a polymer binder, the first coating layer being faced with the cathode; and a second coating layer formed on the other surface of the first porous polymer substrate and comprising a mixture a polymer binder and inorganic particles, the second coating layer being faced with the anode and having a composition, a thickness and a porosity different from those of the first porous coating layer. A separator has porous coating layers with a different composition, thickness or porosity formed on each surface thereof. |
| US09786887B2 |
Binders for wet and dry lamination of battery cells
Cell stacks are presented that include binders for wet and dry lamination processes. The cell stacks, when laminated, produce battery cells (or portions thereof). The cell stacks include a cathode having a cathode active material disposed on a cathode current collector. The cell stacks also include an anode having an anode active material disposed on an anode current collector. The anode is oriented towards the cathode such that the anode active material faces the cathode active material. A separator is disposed between the cathode active material and the anode active material and comprising a binder comprising a PVdF-HFP copolymer. In certain instances, an electrolyte fluid is in contact with the separator. Methods of laminating the cell stacks are also presented. |
| US09786885B2 |
Battery separators comprising inorganic particles
Battery separators are generally provided. In some embodiments, the battery separators may comprise a non-woven web including a plurality of inorganic particles (e.g., silica). The non-woven web may include, in some embodiments, a plurality of relatively coarse glass fibers (e.g., having an average diameter of greater than about 1.5 microns), e.g., such that the non-woven web has a particular largest pore size and median pore size. The combination of inorganic particles with a non-woven web having features described herein may exhibit enhanced electrolyte stratification distance and/or reduced electrolyte filling time. In some embodiments, such improvements may be achieved while having relatively minimal or no adverse effects on another property of the battery separator and/or the overall battery. |
| US09786879B2 |
Battery module
A battery module includes a plurality of battery blocks formed by arranging a plurality of unit cells in each block; and a hollow spacer placed between two adjacent battery blocks. The accommodation member and the spacer may be made of the same metal material. The spacer may be formed to include an insulation member for insulating two joined battery blocks from each other. |
| US09786876B2 |
Apparatus for waterproofing battery cover in a portable terminal
An apparatus for waterproofing a battery cover in a portable terminal is provided, in which a rear case includes an opening for accommodating a battery, a battery cover covers the rear case, and a waterproofing module is disposed between the rear case and the battery cover. The waterproofing module is disposed along an inner periphery of the opening, thus sealing a water infiltration path between the battery cover and the rear case. |
| US09786875B2 |
Power storage module including movable means for setting a plurality of power storage elements
The invention relates to a power storage module (10) capable of containing a plurality of power storage elements (14), the module including: a housing (16) including at least a plurality of side walls and two end walls (18A; 18B), the side walls consisting of one piece (20) having a closed outline and being sized so as to surround the power storage elements; a wall (22) for supporting the power storage elements, which is separate from the walls of the housing, and which extends essentially parallel to one of the side walls, referred to as a reference wall (20A); a means (24A-24B) for changing the position of the supporting wall (22) between at least an assembly position, in which the supporting wall is located at a first distance from the reference wall (20A), and an operating position, in which the supporting wall is located at a second distance from the reference wall (20A) that is greater than the first distance. |
| US09786874B2 |
Electrode having round corner
Disclosed herein is an electrode assembly including two or more unit cells, each of which includes a cathode, an anode, and a separator disposed between the cathode and the anode, electrode tabs protruding from the respective electrodes, wherein the unit cells are stacked in a height direction on the basis of a plane, at least two of the unit cells having different planer sizes, and one or more corners of each of the unit cells, which do not tangent to one side of each of the unit cells at which the electrode tabs are formed, are round. |
| US09786873B2 |
Thin film encapsulation for thin film batteries and other devices
An electrochemical device is claimed and disclosed, including a method of manufacturing the same, comprising an environmentally sensitive material, such as, for example, a lithium anode; and a plurality of alternating thin metallic and ceramic, blocking sub-layers. The multiple metallic and ceramic, blocking sub-layers encapsulate the environmentally sensitive material. The device may include a stress modulating layer, such as for example, a Lipon layer between the environmentally sensitive material and the encapsulation layer. |
| US09786872B2 |
Flexible secondary battery
A flexible secondary battery includes: an electrode assembly including a first electrode layer, a second electrode layer, and a separator between the first electrode layer and the second electrode layer; a gasket having flexibility and surrounding edges of the electrode assembly; a first sealing sheet attached to a first surface of the gasket; and a second sealing sheet attached to a second surface of the gasket facing away from the first surface, wherein an uneven pattern is at a bendable area of the gasket. |
| US09786867B2 |
Method of manufacturing an organic light emitting display including a magnetic particle on a first electrode
A method for manufacturing an organic light emitting display device that includes a gate electrode, a source electrode, and a drain electrode in a display area of a display substrate, and an organic light emitting display device, the method including forming an auxiliary electrode in a non-display area of the display substrate; forming a first electrode that is electrically connected with the drain electrode and the auxiliary electrode; providing a magnetic particle on the first electrode in the non-display area of the display substrate, the magnetic particle being carried in an organic material; fixing the magnetic particle to the first electrode using a first electromagnet; removing the organic material; forming an organic light emitting material on the first electrode and the magnetic particle; removing the magnetic particle and the organic light emitting material formed on the magnetic particle using a second electromagnet provided at a distance from the magnetic particle; and forming a second electrode on the first electrode and the organic light emitting material. |
| US09786865B2 |
Optical device
An optical device includes a joining structure in which a first conductive film (110) and a second conductive film (130) are joined to each other. The first conductive film (110), which constitutes the joining structure, is constituted by a transparent conductive material and the like. The second conductive film (130), which constitutes the joining structure, is constituted by a metal material. A dispersing agent, which is constituted by a material different from the transparent conductive material, exists at a portion of the first conductive film (110) which is located at the periphery of the second conductive film (130). |
| US09786864B2 |
Display panel, display device and manufacturing method of display panel
A display panel, a display device and a manufacturing method of the display panel. The display panel includes a display area and a non-display area, the display area includes a plurality of pixel areas, at least one through hole is arranged in at least one of the plurality of pixel areas, and the through hole passes through the display panel along the thickness direction of the display panel. |
| US09786859B2 |
Organic electroluminescent element and lighting device
An organic electroluminescent element including at least three light-emitting units. The at least three light-emitting units include one or more short-wavelength light-emitting units having a weighted average emission wavelength λS of 380 or more and less than 550 nm, and two or more long-wavelength light-emitting units having a weighted average emission wavelength λS of 550 nm or more and 780 nm or less. The two or more long-wavelength light-emitting units are greater in number than the one or more short-wavelength light-emitting units. |
| US09786857B2 |
Floating-gate transistor photodetector
A field effect transistor photodetector that can operate in room temperature includes a source electrode, a drain electrode, a channel to allow an electric current to flow between the drain and source electrodes, and a gate electrode to receive a bias voltage for controlling the current in the channel. The photodetector includes a light-absorbing material that absorbs light and traps electric charges. The light-absorbing material is configured to generate one or more charges upon absorbing light having a wavelength within a specified range and to hold the one or more charges. The one or more charges held in the light-absorbing material reduces the current flowing through the channel. |
| US09786853B2 |
Floating evaporative assembly of aligned carbon nanotubes
High density films of semiconducting single-walled carbon nanotubes having a high degree of nanotube alignment are provided. Also provided are methods of making the films and field effect transistors (FETs) that incorporate the films as conducting channel materials. The single-walled carbon nanotubes are deposited from a thin layer of organic solvent containing solubilized single-walled carbon nanotubes that is spread over the surface of an aqueous medium, inducing evaporative self-assembly upon contacting a solid substrate. |
| US09786852B2 |
Semiconductor device with ballistic gate length structure
Embodiments of the invention include a method of fabrication of a semiconductor structure. The method of fabrication includes: Forming a trench in a first dielectric material down to a first conductive material of a bottom gate. A sidewall of the trench contacts a top surface of the first conductive material. Depositing a second conductive material on the sidewall of the trench, which forms an electrical connection with the first conductive material. Depositing a second dielectric material in the trench, and on the second conductive material. Depositing a gate dielectric material on the second conductive material and the dielectric materials. Forming a channel material on the gate dielectric material. Depositing another conductive material on the channel material and portions of the gate dielectric material to form a source terminal and a drain terminal. |
| US09786850B2 |
Methods and systems for scaffolds comprising nanoelectronic components
The present invention generally relates to nanoscale wires and tissue engineering. Systems and methods are provided in various embodiments for preparing cell scaffolds that can be used for growing cells or tissues, where the cell scaffolds comprise nanoscale wires. In some cases, the nanoscale wires can be connected to electronic circuits extending externally of the cell scaffold. Such cell scaffolds can be used to grow cells or tissues which can be determined and/or controlled at very high resolutions, due to the presence of the nanoscale wires, and such cell scaffolds will find use in a wide variety of novel applications, including applications in tissue engineering, prosthetics, pacemakers, implants, or the like. This approach thus allows for the creation of fundamentally new types of functionalized cells and tissues, due to the high degree of electronic control offered by the nanoscale wires and electronic circuits. |
| US09786844B2 |
Mask assembly, apparatus, and method of manufacturing display device using the mask assembly
Provided is a mask assembly, an apparatus, and a method of manufacturing a display apparatus using such mask assembly and apparatus. The mask assembly deposits a deposition material on a first pixel among a plurality of pixels disposed on a device substrate and including the first pixel and a second pixel includes a mask substrate, a molding layer stacked on the mask substrate and including a hole corresponding to a position of the second pixel, a blocking plate detachably mounted in the hole and configured to block the second pixel from the deposition material by covering the second pixel when the blocking plate is detached from the hole. |
| US09786843B2 |
Methods for fabricating an optoelectronic device
The invention relates to methods for fabricating an optoelectronic device, including: directly applying a printing ink composition to a patterning process, wherein the printing ink composition includes (1) at least one compound selected from the group of compounds represented by Chemical Formula 1, Chemical Formula 2, Chemical Formula 3, and mixtures thereof as disclosed herein in an amount of 0.01-90 wt % based on the total weight of the composition and (2) at least one material for an optoelectronic device. |
| US09786842B1 |
Memory cell with functions of storage element and selector
A single memory cell has the functions of a storage element and a selector. The memory cell includes a P-type layer, a tunneling structure and an N-type layer. The tunneling structure is formed on the P-type layer. The N-type layer is formed on the tunneling structure. The tunneling structure is a stack structure including a first material layer, a second material layer and a third material layer. By adjusting a bias voltage that is applied to the P-type layer and the N-type layer, the tunneling structure is controlled to be in the amorphous state or the crystalline state. Consequently, the memory cell has the memorizing and storing functions. The memory cell has the P-type layer, the tunneling structure and the N-type layer. By adjusting the bias voltage, the function of the selector is achieved. |
| US09786841B2 |
Semiconductor devices with magnetic regions and attracter material and methods of fabrication
A magnetic cell includes an attracter material proximate to a magnetic region (e.g., a free region). The attracter material is formulated to have a higher chemical affinity for a diffusible species of a magnetic material, from which the magnetic region is formed, compared to a chemical affinity between the diffusible species and at least another species of the magnetic material. Thus, the diffusible species is removed from the magnetic material to the attracter material. The removal accommodates crystallization of the depleted magnetic material. The crystallized, depleted magnetic material enables a high tunnel magnetoresistance, high energy barrier, and high energy barrier ratio. The magnetic region may be formed as a continuous magnetic material, thus enabling a high exchange stiffness, and positioning the magnetic region between two magnetic anisotropy-inducing oxide regions enables a high magnetic anisotropy strength. Methods of fabrication and semiconductor devices are also disclosed. |
| US09786839B2 |
3D MRAM with through silicon vias or through silicon trenches magnetic shielding
Emerging memory chips and methods for forming an emerging memory chip are presented. For example, magnetoresistive random access memory (MRAM) chip magnetic shielding and vertical stacking capabilities processed at the wafer-level are disclosed. The method includes providing a magnetic shield in the through silicon vias and/or through silicon trenches surrounding or adjacent to magnetic tunnel junction (MTJ) array within the MRAM region and also at the front side and back side of the chip. Magnetic shield in the through silicon trenches connects front side and back side magnetic shield. Magnetic shield in the through silicon vias provides vertical stacking, magnetic shielding and electrical connection of the MRAM chips to form 3D IC packages. This magnetic shielding method is applicable for both in-plane and perpendicular MRAM chips. The MTJ array is formed in the MRAM region and in between adjacent inter layer dielectric (ILD) levels of the upper ILD layer in the back end of line (BEOL) of the MRAM chip. |
| US09786831B1 |
Suspension having a stacked D33 mode PZT actuator with constraint layer
A microactuator for a dual stage actuated suspension for a hard disk drive is constructed as a longitudinal stack of piezoelectric (PZT) elements acting in the d33 mode, expanding or contracting longitudinally when an electric field is applied across them in the longitudinal direction. The microactuator has interlaced electrode fingers that separate and define the individual PZT elements, and apply the electric field. A stiff constraint layer having a high Young's modulus is affixed to the microactuator on the side opposite the suspension to which the microactuator is bonded. The constraint layer may be a layer of substantially inactive PZT material that is formed integrally with the PZT elements but without electrodes in the inactive PZT layer. The presence of the stiff constraint layer increases the effective stroke length of the microactuator. |
| US09786830B2 |
Thermoelectric generation module
A thermoelectric generation module having: a base material; a plurality of electrodes disposed on the base material; and a thermoelectric conversion layer that coats each of the electrodes individually leaving a portion of the electrode to which a wiring is to be connected, wherein the thermoelectric conversion layer adheres to the base material around the electrode excluding the portion of the electrode to which the wiring is to be connected. |
| US09786829B2 |
Thermocouple device
In one aspect, the present invention relates to a thermocouple device comprising a flexible non-planar substrate, a first printed thermocouple element comprising a first metal containing ink composition applied to the flexible non-planar substrate, and a second printed thermocouple element in electrical contact with the first printed thermocouple element making a thermocouple junction. The second printed thermocouple element comprises a second metal containing ink composition with a Seebeck coefficient sufficiently different from the first metal containing ink composition for the first and second printed thermocouple elements to together produce a thermocouple effect. The present application further relates to medical devices comprising the thermocouple and methods of making such devices. |
| US09786826B2 |
LED light-emitting element
An LED light-emitting element having reduced the occurrence of illuminance unevenness is provided. A light-emitting element comprising a substrate, an LED element mounted on the substrate, a phosphor resin arranged on the substrate so as to seal the LED element and having an emission surface from which light based on light emitted from the LED element is emitted, a reflective resin arranged around the phosphor resin; and a reflecting frame having an opening and at least part of which is arranged on the reflective resin, wherein the reflective resin is arranged directly under the reflecting frame and on the side surface of the phosphor resin, the ratio of the area of the emission surface to the area of an inside area of the reflecting frame is set to 80% or higher, and in the inside area of the reflecting frame, the reflective resin is exposed around the emission surface. |
| US09786820B2 |
Opto-electronic module and method for manufacturing the same
A method for manufacturing a device (1) is suggested. The device comprises at least one opto-electronic module (1), and the method comprises creating a wafer stack (2) comprising a substrate wafer (PW), and an optics wafer (OW); wherein a multitude of active optical components (E) is mounted on the substrate wafer (PW), and the optics wafer (OW) comprises a multitude of passive optical components (L). Each of the opto-electronic modules (1) comprises at least one of the active optical components (E) and at least one of the passive optical components (L). The optics wafer (OW) can comprise at least one portion, referred to as blocking portion, which is at least substantially non-transparent for at least a specific wavelength range, and at least one other portion, referred to as transparent portion, which is at least substantially non-transparent for at least said specific wavelength range. 11. The opto-electronic module comprises a substrate member; an optics member; at least one active optical component mounted on said substrate member; and at least one passive optical component comprised in said optics member. The optics member (OW) is directly or indirectly fixed to said substrate member (PW). The opto-electronic modules (1) can have an excellent manufacturability while being small in dimension and having a high alignment accuracy. |
| US09786819B2 |
Semiconductor light emitting device
A semiconductor light emitting device includes a conductive substrate and a first metal layer disposed on the substrate. The first metal layer is formed so as to be electrically connected with the substrate, and the first metal layer includes an Au based material. A joining layer is formed on the first metal layer. The joining layer includes a second metal layer including Au and a third metal layer including Au. A metallic contact layer and an insulating layer are formed on the joining layer. A semiconductor layer is formed on the metallic contact layer and the insulating layer and includes a red-based light emitting layer. An electrode is formed on the semiconductor layer and is made of metal. The insulating layer includes a patterned aperture, and at least a part of the metallic contact layer is formed in the aperture. |
| US09786818B2 |
Light emitting diode and method for manufacturing the same
A light emitting diode includes a first electrode, a second electrode and an epitaxial structure. The epitaxial structure is arranged on the first electrode, and electrically connects with the first electrode and the second electrode. The second electrode surrounds periphery of the epitaxial structure to reflect light from the epitaxial structure to emit out from the top of the epitaxial structure. This disclosure also relates to a method for manufacturing the light emitting diode. The light emitting diode and the method help solve the problem of low light efficiency of the light emitting diode. |
| US09786816B2 |
Light emitting device, light emitting device package, and lighting apparatus including the package
Embodiments provide a light emitting device including a substrate, a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, disposed under the substrate, a reflective layer disposed under the second conductive semiconductor layer, the reflective layer having at least one first through-hole formed in a first direction, the first direction being a thickness direction of the light emitting structure, a contact layer embedded in at least one second through-hole penetrating the reflective layer, the second conductive semiconductor layer, and the active layer so as to be connected to the first conductive semiconductor layer, and an insulation layer disposed between the contact layer and each of the reflective layer, the second conductive semiconductor layer, and the active layer, the insulation layer being embedded in the first through-hole. |
| US09786810B2 |
Method of fabricating optical devices using laser treatment
A method for forming optical devices. The method includes providing a gallium nitride substrate member having a crystalline surface region and a backside region. The method also includes subjecting the backside region to a laser scribing process to form a plurality of scribe regions on the backside region and forming a metallization material overlying the backside region including the plurality of scribe regions. The method removes at least one optical device using at least one of the scribe regions. |
| US09786805B2 |
Semiconductor ultraviolet (UV)photo-detecting device
An ultraviolet (UV) photo-detecting device, including: a substrate; a first nitride layer disposed on the substrate; a second nitride layer disposed between the first nitride layer and the substrate; a light absorption layer disposed on the first nitride layer; and a Schottky junction layer disposed on the light absorption layer. |
| US09786798B2 |
Connection box
A connection box for a photovoltaic module is provided and includes a housing, a diode, and a pair of connection terminals. The pair of connection terminals are electrically connected to each other through the diode, and each of the pair of connection terminals includes a base, first connection portion, and a second connection portion. The base is mounted on the housing. The first connection portion includes a first end integrally connected with the base and a first connection region connectable with the diode. The second connection portion includes a connection end electrically connected with the base and having a second connection region connectable with a bus bar. |
| US09786796B2 |
Semiconductor device having first and second layers with opposite conductivity types
A semiconductor device having first through third layers. The first layer has a conductivity type that is different from a conductivity type of the second layer. A peak value of an impurity concentration of a portion of the third layer is greater than a peak value of an impurity concentration of the second layer. The semiconductor device allows a decrease in the forward voltage drop and also allows an improvement of the safe operating area tolerance. Thus, it is possible to decrease the forward voltage drop, improve the maximum reverse voltage, and suppress oscillations at the time of recovery. |
| US09786795B2 |
Selector for RRAM
The disclosed technology generally relates to semiconductor devices and more particularly to selector devices for memory devices having a resistance switching element, particularly resistive random access memory (RRAM) devices. In one aspect, a selector device includes a first barrier structure comprising a first metal and a first semiconductor or a first low bandgap dielectric material, and a second barrier structure comprising a second metal and a second semiconductor or a second low bandgap dielectric material. The selector device additionally includes an insulator interposed between the first semiconductor or the first low bandgap dielectric material and the second semiconductor or the second low bandgap dielectric material. The first barrier structure, the insulator, and the second barrier structure are stacked to form a metal/semiconductor or low bandgap dielectric/insulator/semiconductor or low bandgap dielectric/metal structure. |
| US09786788B1 |
Vertical-transport FinFET device with variable Fin pitch
A semiconductor device includes a plurality of vertical-transport fin field effect transistors that are arranged at a locally-variable fin pitch. Within a first region of the device, a first plurality of fins are arranged at a first pitch (d1), and within a second region of the device, a second plurality of fins are arranged as a second pitch (d2) less than the first pitch. The second plurality of fins share merged source, drain and gate regions, while the source, drain and gate regions for the first plurality of fins are unmerged. |
| US09786776B2 |
Vertical semiconductor device and manufacturing method thereof
The present invention discloses a vertical semiconductor device and a manufacturing method thereof. The vertical semiconductor device includes: a substrate having a first surface and a second surface, the substrate including a conductive array formed by multiple conductive plugs through the substrate; a semiconductor layer formed on the first surface, the semiconductor layer having a third surface and a fourth surface, wherein the fourth surface faces the first surface; a first electrode formed on the third surface; and a second electrode formed on the second surface for electrically connecting to the conductive array. |
| US09786759B2 |
Semiconductor device having multiwork function gate patterns
A semiconductor device includes a semiconductor substrate having a first area and a second area, and a first gate pattern on the first area and a second gate pattern on the second area. The first gate pattern includes a first gate insulating pattern on the first area, a first gate barrier pattern on the first gate insulating pattern, and a first work function metal pattern on the first gate barrier pattern. The second gate pattern includes a second gate insulating pattern on the second area, a second gate barrier pattern on the second gate insulating pattern, and a second work function metal pattern on the second gate barrier pattern. The first gate barrier pattern includes a metal material different than the second gate barrier pattern. |
| US09786758B1 |
Vertical Schottky barrier FET
A method for fabricating a vertical Schottky barrier transistor includes forming fin trenches through a dielectric layer and a dummy gate stack on a substrate to expose an underlying semiconductor material. The dummy gate stack includes a bottom spacer, a dummy gate layer and a top spacer layer. Fins are epitaxially grown in the fin trenches from the underlying semiconductor material. The dummy gate layer is removed and forms a gate structure about the fins including a gate dielectric and a gate conductor. An interlevel dielectric (ILD) layer is deposited. A top of the fins is exposed to form a channel contact opening. A contact trench is formed through the ILD layer and into the underlying semiconductor material. A cavity is formed in the underlying semiconductor material below the bottom spacer layer. The cavity, the contact trench and the channel contact opening are filled with a conductive fill. |
| US09786757B2 |
Method of forming horizontal gate all around structure
This disclosure provides a horizontal structure by using a double STI recess method. The double STI recess method includes: forming a plurality of fins on the substrate; forming shallow trench isolation between the fins; performing first etch-back on the shallow trench isolation; forming source and drain regions adjacent to channels of the fins; and performing second etch-back on the shallow trench isolations to expose a lower portion of the fins as a larger process window for forming gates of the fins. |
| US09786753B2 |
Self-aligned dual trench device
A power MOSFET or a power rectifier may be fabricated according to the invention to include a gate trench and a field plate trench. Both trenches can be formed with a two-step etching process as described in detail in the specification. The devices that embody this invention can be fabricated with higher packaging density and better and more tightly distributed device parameters such as the VF, RDSS, and BV. |
| US09786751B2 |
Semiconductor structures with field effect transistor(s) having low-resistance source/drain contact(s)
Disclosed are semiconductor structures comprising a field effect transistor (FET) having a low-resistance source/drain contact and, optionally, low gate-to-source/drain contact capacitance. The structures comprise a semiconductor body and, contained therein, first and second source/drain regions and a channel region. A first gate is adjacent to the semiconductor body at the channel region and a second, non-functioning, gate is adjacent to the semiconductor body such that the second source/drain region is between the first and second gates. First and second source/drain contacts are on the first and source/drain regions, respectively. The second source/drain contact is wider than the first and, thus, has a lower resistance. Additionally, spacing of the first and second source/drain contacts relative to the first gate can be such that the first gate-to-second source/drain contact capacitance is equal to or less than the first gate-to-first source/drain contact capacitance. Also disclosed are associated formation methods. |
| US09786744B2 |
P-doping of group-III-nitride buffer layer structure on a heterosubstrate
An epitaxial group-ill-nitride buffer-layer structure is provided on a heterosubstrate, wherein the buffer-layer structure has at least one stress-management layer sequence including an interlayer structure arranged between and adjacent to a first and a second group-ill-nitride layer, wherein the interlayer structure comprises a group-ill-nitride interlayer material having a larger band gap than the materials of the first and second group-ill-nitride layers, and wherein a p-type-dopant-concentration profile drops, starting from at least 1×1018 cm-3, by at least a factor of two in transition from the interlayer structure to the first and second group-ill-nitride layers. |
| US09786730B2 |
Organic light emitting diode display
An organic light emitting device includes: a first transistor including a source electrode connected to a data line and a gate electrode connected to a scan line; a second transistor including a source electrode connected to a driving voltage and a gate electrode connected to a drain electrode of the first transistor; a capacitor connected between the gate electrode of the second transistor and the source electrode of the second transistor; an organic light emitting diode connected to a drain electrode of the second transistor; and a third transistor connected to the organic light emitting diode and a common voltage. |
| US09786727B2 |
Display substrate and manufacturing method thereof, and flexible display device
The present invention provides a display substrate and a manufacturing method thereof, and a flexible display device including the display substrate, which belong to the field of display technology, and can solve the problem of poor reliability of an existing display substrate due to damage to thin film transistors when the display substrate is bent. In the display substrate provided by the present invention, by providing the stress absorbing units made of a resin material in the display substrate, the stress generated during bending of the display substrate is released through the transparent resin material and the thin film transistors on the display substrate are unlikely to be damaged, thereby improving the reliability of the whole display substrate. |
| US09786725B2 |
Organic light-emitting diode display
An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to provide a scan signal. A data line crossing the scan line is configured to respectively provide a data voltage, and a driving voltage line crossing the scan line is configured to respectively provide a driving voltage. The display includes a switching transistor electrically connected to the scan line and the data line and including a drain electrode configured to output the data voltage. A driving transistor includes a driving gate electrode electrically connected to the drain electrode of the switching transistor. A contact hole is formed between the driving gate electrode and the data line, and the driving voltage line passes through the contact hole to be connected to a conductive layer. |
| US09786722B1 |
Double-side OLED display
The disclosure provides a double-side OLED display, the double-side OLED display includes a first light-emitting substrate, a second light-emitting substrate and a color film layer, the first light-emitting substrate and the second light-emitting substrate are disposed opposite, the color film layer is disposed between the first light-emitting substrate and the second light-emitting substrate, light from the first light-emitting substrate partially penetrates the color film layer and forms a second display image on a side of the second light-emitting substrate, light from the second light-emitting substrate partially penetrates the color film layer and forms a first display image on a side of the first light-emitting substrate. The disclosure is capable of simplifying the process and reducing the thickness of the product, meanwhile images on two sides do not influence each other during display on both sides, and directions of two images on both sides are identical. |
| US09786721B1 |
OLED display panel
The utility model provides an OLED display panel, by disposing a color filter layer on an array substrate, an alignment process of an upper with a lower substrate can be omitted, the manufacturing process of the OLED display panel can be simplified, and a thin film packaging can be carried out on the color filter layer so that the OLED display panel can become more lightweight and thin. |
| US09786720B2 |
Organic light emitting display device
An organic light emitting display device including, according to one embodiment, a substrate having first, second, and third pixel areas; a first hole transporting layer on the substrate; a first emission common layer on the first transport layer; a second emission common layer on the first emission common layer; a third emission common layer on the second emission common layer; a second hole transporting layer between the first hole transporting layer and the first emission common layer, the second hole transporting layer disposed on the first pixel area; a third hole transporting layer between the first and second emission common layers, the third hole transporting layer disposed on the second pixel area; and a fourth hole transporting layer between the second and third emission common layers, the fourth hole transporting layer disposed on the third pixel area. |
| US09786718B1 |
Integrated circuit components incorporating energy harvesting components/devices, and methods for fabrication, manufacture and production of integrated circuit components incorporating energy harvesting components/devices
An integrated circuit system, structure and/or component is provided that includes an integrated electrical power source in a form of a unique, environmentally-friendly energy harvesting element or component. The energy harvesting component provides a mechanism for generating autonomous renewable energy, or a renewable energy supplement, in the integrated circuit system, structure and/or component. The energy harvesting element includes a first conductor layer, a low work function layer, a dielectric layer, and a second conductor layer that are particularly configured to promote electron migration from the low work function layer, through the dielectric layer, to the facing surface of the second conductor layer in a manner that develops an electric potential between the first conductor layer and the second conductor layer. An energy harvesting component includes a plurality of energy harvesting elements electrically connected to one another to increase a power output of the electric harvesting component. |
| US09786714B2 |
Solid-state imaging element, method for manufacturing solid-state imaging element, and electronic device
A solid-state imaging element includes a plurality of pixels which are two-dimensionally arranged and each of which includes a photoelectric conversion element, and a microlens which is provided on one or two or more first pixels out of the plurality of the pixels, in which an optical axis of the microlens extends inside a second pixel which is adjacent to the first pixel. |
| US09786710B2 |
Image sensor device with sub-isolation in pixels
An image sensor device includes a substrate, a color filter layer, at least a pixel, a main isolation structure and a sub-isolation structure. The color filter layer is disposed over the substrate. The color filter layer includes a first color filter having a single one of primary colors. The pixel is disposed in the substrate and aligned with the first color filter. The main isolation structure surrounds the pixel in the substrate. The sub-isolation structure is disposed to divide the pixel into a plurality of sub-first pixels. The sub-pixels correspond to the first color filter having the single one of primary colors, and each of the sub-first pixels includes a radiation sensor. |
| US09786709B1 |
Portable electronic device and image capturing module thereof
A portable electronic device and an image capturing module thereof are disclosed. The image capturing module includes a circuit substrate, a structure reinforcing frame, a plurality of image sensing chips, an adhesive body, and a plurality of lens modules. The circuit substrate has a plurality of first passing openings. The structure reinforcing frame is disposed on the circuit substrate, and the structure reinforcing frame has a plurality of second passing openings respectively communicated with the first passing openings. The image sensing chips is electrically connected with the circuit substrate by wire bonding, and the image sensing chips are coplanarly disposed on a datum plane. The adhesive body is connected between each image sensing chip and the structure reinforcing frame. The lens modules are disposed on the circuit substrate, and the lens modules respectively correspond to the image sensing chips. |
| US09786707B2 |
Image sensor isolation region and method of forming the same
Image sensors comprising an isolation region according to embodiments are disclosed, as well as methods of forming the image sensors with isolation region. An embodiment is a structure comprising a semiconductor substrate, a photo element in the semiconductor substrate, and an isolation region in the semiconductor substrate. The isolation region is proximate the photo element and comprises a dielectric material and an epitaxial region. The epitaxial region is disposed between the semiconductor substrate and the dielectric material. |
| US09786706B2 |
Solid-state imaging unit and electronic apparatus
There is configured a solid-state imaging unit including: a semiconductor base 21 having one surface serving as a circuit formation surface and another surface serving as a light receiving surface; a photoelectric conversion section 22 provided in the semiconductor base 21; a reflection layer 24 provided on the circuit formation surface above the photoelectric conversion section 22; and an insulating section 23 arranged in the reflection layer 24. |
| US09786705B2 |
Solid state image sensor with extended spectral response
Various embodiments are directed to an image sensor that includes a first sensor portion and a second sensor portion coupled to the first sensor portion. The second sensor portion may be positioned relative to the first sensor portion so that the second sensor portion may initially detect light entering the image sensor, and some of that light passes through the second sensor portion and is be detected by the first sensor portion. In some embodiments, the second sensor portion may be configured to have a thickness suitable for sensing visible light. The first sensor portion may be configured to have a thickness suitable for sensing IR or NIR light. As a result of the arrangement and structure of the second sensor portion and the first sensor portion, the image sensor captures substantially more light from the light source. |
| US09786701B2 |
Circuit and method for controlling a SPAD array based on a measured count rate
A circuit may include an array of single photon avalanche diode (SPAD) cells, each SPAD cell configured to be selectively enabled by an activation signal. The circuit may include a control circuit configured to selectively enable a subset of the array of SPAD cells based on a measured count rate of the array of SPAD cells. |
| US09786697B2 |
Thin film transistor substrate and display device using the same
A thin film transistor (TFT) substrate and a display device using the same are disclosed. The TFT substrate includes a first TFT including a polycrystalline semiconductor layer, a first gate electrode, a first source electrode, and a first drain electrode deposited on a substrate, a second TFT separated from the first TFT, the second TFT including a second gate electrode, an oxide semiconductor layer, a second source electrode, and a second drain electrode deposited on the first gate electrode, and a plurality of storage capacitors separated from the first and second TFTs, each storage capacitor including a first dummy semiconductor layer, a first gate insulating layer on the first dummy semiconductor layer, a first dummy gate electrode on the first gate insulating layer, and an intermediate insulating layer on the first dummy gate electrode. |
| US09786692B2 |
Scan driving circuit and NAND logic operation circuit thereof
The invention provides a scan driving circuit for an oxide semiconductor thin film transistor and a NAND logic operation circuit thereof. The NAND logic operation circuit includes: a first inverter and a second inverter applied to a pull-down holding circuit of a GOA circuit, and multiple transistors. The invention uses the combination of NFTF and inverter to replace a function of original PMOS elements and thereby achieves characteristics similar to that of the original CMOS NAND operation circuit. Accordingly, the invention can solve the design problem of IGZO TFT single type of device logic operation circuit and thus is more suitable for integrating a large scale digital integrated circuit on a liquid crystal display device. |
| US09786689B2 |
Display device
An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced. |
| US09786687B2 |
Semiconductor device and manufacturing method thereof
[Summary][Problem]A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high.[Solving Means]By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized. |
| US09786686B2 |
Display device
According to one embodiment, a display device includes a first substrate includes an insulating substrate including a pierced portion, a pad electrode formed on the insulating substrate, and a signal line electrically connected to the pad electrode, a wiring board includes an interconnecting wiring and located under the insulating substrate, and a conductive material provided in the pierced portion and electrically connecting the pad electrode and the interconnecting wiring to each other. |
| US09786683B1 |
Nonvolatile semiconductor memory device and method of manufacturing the same
This nonvolatile semiconductor memory device includes: a memory cell array including a memory cell; a wiring part connecting the memory cell array to an external circuit; and a transistor that connects the wiring part and the external circuit, the transistor including: a first insulating layer including a first region, a second region, and a third region, the second and third regions being disposed on both sides of the first region, and a height of an upper surface of the first region being lower than those of the second region and the third region; a semiconductor layer disposed along upper surfaces of the first region, the second region, and the third region; and a gate electrode layer disposed via the semiconductor layer and a gate insulating film, on an upper part of the second region. |
| US09786681B1 |
Multilevel memory stack structure employing stacks of a support pedestal structure and a support pillar structure
Memory-opening semiconductor material portions and support opening fill structures can be simultaneously formed through a first alternating stack of first insulating layers and first sacrificial material layers. Dopant species that retard or prevent etching of the material of the support opening fill structures can be implanted into an upper portion of each support opening fill structure, while memory-opening semiconductor material portions are masked from implantation. After formation of a second alternating stack and second openings therethrough, the sacrificial material of the memory-opening semiconductor material portions is removed while the support opening fill structures is not removed. Damage to the first sacrificial material layers during formation of the staircase contact region and resulting leakage paths from word lines to the substrate through support pillar structures can be avoided or reduced by not removing the support opening fill structures. |
| US09786678B2 |
Nonvolatile semiconductor memory device and method of manufacturing the same
According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers stacked in a first direction via an inter-layer insulating layer. In addition, the nonvolatile semiconductor memory device comprises: a semiconductor layer having the first direction as a longer direction; a tunnel insulating layer contacting a side surface of the semiconductor layer; a charge accumulation layer contacting a side surface of the tunnel insulating layer; and a block insulating layer contacting a portion facing the conductive layer, of a side surface of the charge accumulation layer. Moreover, the portion facing the conductive layer, of the charge accumulation layer is thinner compared to a portion facing the inter-layer insulating layer, of the charge accumulation layer. |
| US09786676B2 |
Vertical memory devices and methods of manufacturing the same
A vertical memory device includes a channel, a dummy channel, a plurality of gate electrodes, and a support pattern. The channel extends in a first direction perpendicular to an upper surface of a substrate. The dummy channel extends from the upper surface of the substrate in the first direction. The plurality of gate electrodes are formed at a plurality of levels, respectively, spaced apart from each other in the first direction on the substrate. Each of the gate electrodes surrounds outer sidewalls of the channel and the dummy channel. The support pattern is between the upper surface of the substrate and a first gate electrode among the gate electrodes. The first gate electrode is at a lowermost one of the levels. The channel and the dummy channel contact each other between the upper surface of the substrate and the first gate electrode. |
| US09786671B2 |
Niobium-containing film forming compositions and vapor deposition of niobium-containing films
Niobium-containing film forming compositions are disclosed, along with methods of synthesizing the same, and methods of forming Niobium-containing films on one or more substrates via vapor deposition processes using the Niobium-containing film forming compositions. |
| US09786668B2 |
Semiconductor device including multilayer wiring layer
The memory capacity of a DRAM is enhanced. A semiconductor memory device includes a driver circuit including part of a single crystal semiconductor substrate, a multilayer wiring layer provided over the driver circuit, and a memory cell array layer provided over the multilayer wiring layer. That is, the memory cell array overlaps with the driver circuit. Accordingly, the integration degree of the semiconductor memory device can be increased as compared to the case where a driver circuit and a memory cell array are provided in the same plane of a substrate containing a singe crystal semiconductor material. |
| US09786665B1 |
Dual deep trenches for high voltage isolation
A semiconductor device adopts an isolation scheme to protect low voltage transistors from high voltage operations. The semiconductor device includes a substrate, a buried layer, a transistor well region, a first trench, and a second trench. The substrate has a top surface and a bottom surface. The buried layer is positioned within the substrate, and the transistor well region is positioned above the buried layer. The first trench extends from the top surface to penetrate the buried layer, and the first trench has a first trench depth. The second trench extending from the top surface to penetrate the buried layer. The second trench is interposed between the first trench and the transistor well region. The second trench has a second trench depth that is less than the first trench depth. |
| US09786661B2 |
Method of forming epitaxial buffer layer for finFET source and drain junction leakage reduction
A semiconductor device including a gate structure on a channel region portion of a fin structure, and at least one of an epitaxial source region and an epitaxial drain region on a source region portion and a drain region portion of the fin structure. At least one of the epitaxial source region portion and the epitaxial drain region portion include a first concentration doped portion adjacent to the fin structure, and a second concentration doped portion on the first concentration doped portion. The second concentration portion has a greater dopant concentration than the first concentration doped portion. An extension dopant region extending into the channel portion of the fin structure having an abrupt dopant concentration gradient of n-type or p-type dopants of 7 nm per decade or greater. |
| US09786659B2 |
Semiconductor component with dielectric layer stack and voltage divider
A semiconductor component has a semiconductor body zone, a first electrically conductive layer adjacent to the semiconductor body zone, a first dielectric layer with first dielectric properties and a second dielectric layer with second dielectric properties. The first dielectric properties differ from the second dielectric properties. The first dielectric layer and the second dielectric layer are arranged between the semiconductor body zone and the first electrically conductive layer. A second electrically conductive layer is applied between the first dielectric layer and the second dielectric layer. A first voltage divider is switched between the first electrically conductive layer and the semiconductor body zone. The second electrically conductive layer is electrically conductively connected only to the voltage divider. |
| US09786643B2 |
Semiconductor devices comprising protected side surfaces and related methods
Methods of protecting semiconductor devices may involve forming trenches in streets between stacks of semiconductor dice on regions of a semiconductor wafer. A protective material may be positioned between the die stacks and in the trenches, after which the wafer is thinned from a side opposite the die stacks to expose the protective material in the trenches. Semiconductor devices comprising stacks of dice and corresponding base semiconductor dice comprising wafer regions are separated from one another by cutting through the protective material along the streets and in the trenches. The protective material covers at least sides of each die stack as well as side surfaces of the corresponding base semiconductor die. |
| US09786640B2 |
Transistor arrangement
A transistor arrangement comprising an electrically conductive substrate; a semiconductor body including a transistor structure, the transistor structure including a source terminal connected to said substrate; a bond pad providing a connection to the transistor structure configured to receive a bond wire; wherein the semiconductor body includes an RF-return current path for carrying return current associated with said bond wire, said RF-return current path comprising a strip of metal arranged on said body, said strip configured such that it extends beneath said bond pad and is connected to said source terminal of the transistor structure. |
| US09786632B2 |
Semiconductor package structure and method for forming the same
A semiconductor package structure is provided. The semiconductor package structure includes a first electronic component on a substrate. The semiconductor package structure also includes a second electronic component stacked on the first electronic component. The active surface of the first electronic component faces the active surface of the second electronic component. The semiconductor package structure further includes a molding compound on the first electronic component and surrounding the second electronic component. In addition, the semiconductor package structure includes a third electronic component stacked on the second electronic component and the molding compound. |
| US09786626B2 |
Semiconductor device with a wire bonding and a sintered region, and manufacturing process thereof
An electronic device includes: a semiconductor body; a front metallization region; a top buffer region, arranged between the front metallization region and the semiconductor body; and a conductive wire, electrically connected to the front metallization region. The top buffer region is at least partially sintered. |
| US09786623B2 |
Semiconductor device and method of forming PoP semiconductor device with RDL over top package
A PoP semiconductor device has a top semiconductor package disposed over a bottom semiconductor package. The top semiconductor package has a substrate and a first semiconductor die disposed over the substrate. First and second encapsulants are deposited over the first semiconductor die and substrate. A first build-up interconnect structure is formed over the substrate after depositing the second encapsulant. The top package is disposed over the bottom package. The bottom package has a second semiconductor die and modular interconnect units disposed around the second semiconductor die. A second build-up interconnect structure is formed over the second semiconductor die and modular interconnect unit. The modular interconnect units include a plurality of conductive vias and a plurality of contact pads electrically connected to the conductive vias. The I/O pattern of the build-up interconnect structure on the top semiconductor package is designed to coincide with the I/O pattern of the modular interconnect units. |
| US09786622B2 |
Semiconductor package
A semiconductor package includes a workpiece with a conductive trace and a chip with a conductive pillar. The chip is attached to the workpiece and a solder joint region is formed between the conductive pillar and the conductive trace. The distance between the conductive pillar and the conductive trace is less than or equal to about 16 μm. |
| US09786619B2 |
Semiconductor structure and manufacturing method thereof
The present disclosure provides a semiconductor structure. The semiconductor structure comprises a semiconductive substrate and an interconnect structure over the semiconductive substrate. The semiconductor structure also comprises a bond pad in the semiconductive substrate and coupled to the metal layer. The bond pad comprises two conductive layers. |
| US09786618B2 |
Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a die including a die pad disposed over the die; a conductive member disposed over and electrically connected with the die pad; a molding surrounding the die and the conductive member; and a redistribution layer (RDL) disposed over the molding, the conductive member and the die, and including a dielectric layer and an interconnect structure, wherein the interconnect structure includes a land portion and a plurality of via portions, the land portion is disposed over the dielectric layer, the plurality of via portions are protruded from the land portion to the conductive member through the dielectric layer, and each of the plurality of via portions at least partially contacts with the conductive member. |
| US09786616B2 |
Semiconductor apparatus, method for manufacturing the same, electronic device, and moving body
A semiconductor apparatus includes elements formed on a substrate, a first insulation layer, a first pad and a second pad arranged on the first insulation layer and located above the elements, and a second insulation layer that is arranged on the side surfaces and upper surfaces of the first pad and the second pad. The second insulation layer includes openings at upper surfaces of the first pad and the second pad. The thickness of the first pad and the second pad is 2 μm or more, the thickness of the second insulation layer is less than or equal to ⅖ of the thickness of the first pad and the second pad, and the distance between the first pad and the second pad is greater than or equal to four times the thickness of the first pad and the second pad. |
| US09786612B2 |
Methods of processing wafer-level assemblies to reduce warpage, and related assemblies
Wafer-level methods of processing semiconductor devices may involve forming grooves partially through a molding material, the molding material located in streets and at least surrounding stacks of semiconductor dice located on a wafer. Wafer-level methods of preparing semiconductor devices may involve attaching a wafer to a carrier substrate and forming stacks of laterally spaced semiconductor dice on die locations of the wafer. Molding material may be disposed over the die stacks on a surface of the wafer to at least surround the stacks of semiconductor dice with the molding material. Grooves may be formed in the molding material by partially cutting through the molding material between at least some of the stacks of semiconductor dice along streets between the die stacks. The resulting wafer-level assembly may then, when exposed to elevated temperatures during, for example, debonding the wafer from a carrier, exhibit reduced propensity for warping. |
| US09786610B2 |
Semiconductor package and fabrication method thereof
A semiconductor package is provided, which includes: a circuit structure having a first bottom surface and a first top surface opposite to the first bottom surface; at least a semiconductor element disposed on the first top surface of the circuit structure and electrically connected to the circuit structure; an encapsulant formed on the first top surface of the circuit structure to encapsulate the semiconductor element, wherein the encapsulant has a second bottom surface facing the first top surface of the circuit structure and a second top surface opposite to the second bottom surface; and a strengthening layer formed on the second top surface of the encapsulant, or formed between the circuit structure and the encapsulant, or formed on the first bottom surface of the circuit structure, thereby effectively preventing the encapsulant from warping and the semiconductor element from cracking. |
| US09786607B2 |
Interconnect structure including middle of line (MOL) metal layer local interconnect on ETCH stop layer
An interconnect structure includes an insulator stack on an upper surface of a semiconductor substrate. The insulator stack includes a first insulator layer having at least one semiconductor device embedded therein and an etch stop layer interposed between the first insulator layer and a second insulator layer. At least one electrically conductive local contact extends through each of the second insulator layer, etch stop layer and, first insulator layer to contact the at least one semiconductor device. The interconnect structure further includes at least one first layer contact element disposed on the etch stop layer and against the at least one conductive local contact. |
| US09786602B2 |
Interconnection structure and methods of fabrication the same
A device includes a substrate feature disposed over a substrate. The substrate feature has a first length extending along a first direction and a second length extending along a second direction. The first length is greater than the second length. The device also includes a first material feature disposed over the substrate. The first material feature has a first surface in physical contact with the substrate feature and a second surface opposite to the first surface. The first surface has a third length extending along the first direction and a fourth length extending along the second direction. The third length is greater than the fourth length. The second surface has a fifth length extending along the first direction and a sixth length extending along the second direction. The sixth length is greater than the fifth length. |
| US09786601B2 |
Semiconductor device having wires
A semiconductor device includes a semiconductor substrate, a first insulating layer laminated on the semiconductor substrate, a first metal wiring pattern embedded in a wire-forming region of the first insulating layer, a second insulating layer laminated on the first insulating layer, a second metal wiring pattern embedded in a wire-forming region of the second insulating layer and first dummy metal patterns embedded each in a wire-opposed region opposing to the wire-forming region of the second insulating layer and in a non-wire-opposed region opposing to a non-wire-forming region other than the wire-forming region of the second insulating layer, the wire-opposed region and the non-wire-opposed region each in a non-wire-forming region other than the wire-forming region of the first insulating layer. |
| US09786599B2 |
Package structures and method of forming the same
An embodiment is a method including forming a first package. The forming the first package includes forming a through via adjacent a first die, at least laterally encapsulating the first die and the through via with an encapsulant, and forming a first redistribution structure over the first die, the through via, and the encapsulant. The forming the first redistribution structure including forming a first via on the through via, and forming a first metallization pattern on the first via, at least one sidewall of the first metallization pattern directly overlying the through via. |
| US09786597B2 |
Self-aligned pitch split for unidirectional metal wiring
Self-aligned pitch split techniques for metal wiring involving a hybrid (subtractive patterning/damascene) metallization approach are provided. In one aspect, a method for forming a metal wiring layer on a wafer includes the following steps. A copper layer is formed on the wafer. A patterned hardmask is formed on the copper layer. The copper layer is subtractively patterned using the patterned hardmask to form a plurality of first copper lines. Spacers are formed on opposite sides of the first copper lines. A planarizing dielectric material is deposited onto the wafer, filling spaces between the first copper lines. One or more trenches are etched in the planarizing dielectric material. The trenches are filled with copper to form a plurality of second copper lines that are self-aligned with the first copper lines. An electronic device is also provided. |
| US09786596B2 |
Fuse formed from III-V aspect ratio structure
A fuse structure is provided above a first portion of a semiconductor material. The fuse structure includes a first end region containing a first portion of a metal structure having a first thickness, a second end region containing a second portion of the metal structure having the first thickness, and a neck region located between the first and second end regions. The neck region contains a third portion of the metal structure having a second thickness that is less than the first thickness, wherein a portion of the neck region is located in a gap positioned between a bottom III-V compound semiconductor material portion and a top III-V compound semiconductor material portion. |
| US09786594B2 |
Semiconductor device
A plurality of first wiring layers are arranged on a main surface of a substrate, a first insulating film is arranged on upper faces of the plurality of first wiring layers, a second insulating film is arranged on an upper face of the first insulating film, and a plurality of second wiring layers are arranged on the second insulating film. A metal resistive element layer is arranged just below at least one second wiring layer among the plurality of second wiring layers. A plurality of conductive layers extend from the plurality of second wiring layers respectively to the metal resistive element layer in a Z direction perpendicular to the main surface. The metal resistive element layer includes a metal wiring layer. At least one part of a side face of at least one conductive layer among the plurality of conductive layers is connected to the metal wiring layer. |
| US09786592B2 |
Integrated circuit structure and method of forming the same
An integrated circuit structure with a back side through silicon via (B/S TSV) therein and a method of forming the same is disclosed. The method includes the steps of: receiving a wafer comprising a substrate having a front side that has a conductor thereon and a back side; forming a back side through silicon via (B/S TSV) from the back side of the substrate to penetrate the substrate; and filling the back side through silicon via (B/S TSV) with a conductive material to form an electrical connection with the conductor. Thus a back side through silicon via penetrates the back side of the substrate and electrically connects to the conductor on the front side of the substrate is formed. |
| US09786591B2 |
Capacitor in post-passivation structures and methods of forming the same
A device includes a metal pad and a passivation layer having a portion overlapping the metal pad. A capacitor includes a bottom capacitor electrode underlying the passivation layer, wherein the bottom capacitor includes the metal pad. The capacitor further includes a top capacitor electrode over the portion of the passivation layer; and a capacitor insulator including the portion of the passivation layer. |
| US09786584B2 |
Lateral element isolation device
Representative implementations of devices and techniques provide isolation between a carrier and a component mounted to the carrier. A multi-layer device having lateral elements provides electrical isolation at a preset isolation voltage while maintaining a preselected thermal conductivity between the component and the carrier. |
| US09786583B2 |
Power semiconductor package device having locking mechanism, and preparation method thereof
A power semiconductor package device and a method of preparation the device are disclosed. The package device includes a die paddle, a first pin, a second pin, and a semiconductor chip attached to the die paddle. A first electrode, a second electrode and a third electrode of the semiconductor chip are connected to the first pin, the second pin and the die paddle respectively. A plastic package body covers the semiconductor chip, the die paddle, the first pin and the second pin. The first pin and the second pin are located near two adjacent corners of the plastic package body. The bottom surface and two side surfaces of each of the first pin and the second pin are exposed from the plastic package body. Locking mechanisms are constructed to prevent the first pin and the second pin from falling off the power semiconductor package device during a manufacturing cutting process. Portions of the first pin, portions of the second pin, and portions of the plastic package body can be cut off. Therefore, the size of the power semiconductor package device is reduced. |
| US09786582B2 |
Planar leadframe substrate having a downset below within a die area
A leadframe for encasing in a mold material includes a plurality of interconnected support members. A die pad is connected to the support members and includes a bottom surface. The die pad is configured to receive a die. A downset is connected to the die pad and positioned below the bottom surface. The downset includes at least one wall defining an interior volume for receiving a flow of the mold material to reduce the velocity of the mold material flow through the downset. |
| US09786581B2 |
Through-silicon via (TSV)-based devices and associated techniques and configurations
Embodiments of the present disclosure are directed toward through-silicon via (TSV)-based devices and associated techniques and configurations. In one embodiment, an apparatus includes a die having active circuitry disposed on a first side of the die and a second side disposed opposite to the first side, a bulk semiconductor material disposed between the first side and the second side of the die and a device including one or more of a capacitor, resistor or resonator disposed in the bulk semiconductor material, the capacitor, resistor or resonator including one or more TSV structures that extend through the bulk semiconductor material, an electrically insulative material disposed in the one or more TSV structures and an electrode material or resistor material in contact with the electrically insulative material within the one or more TSV structures. |
| US09786580B2 |
Self-alignment for redistribution layer
An apparatus comprising a substrate with multiple electronic devices. An interconnect structure formed on a first side of the substrate interconnects the electronic devices. Dummy TSVs each extend through the substrate and form an alignment mark on a second side of the substrate. Functional TSVs each extend through the substrate and electrically connect to the electronic devices. A redistribution layer (RDL) formed on the second side of the substrate interconnects ones of the dummy TSVs with ones of the functional TSVs. Step heights of the RDL over the functional TSVs are less than a predetermined value, whereas step heights of the RDL over the dummy TSVs are greater than the predetermined value. |
| US09786579B2 |
Imaging device, imaging apparatus, production apparatus and method, and semiconductor device
There is provided an imaging device including a semiconductor having a light-receiving portion that performs photoelectric conversion of incident light, electrically conductive wirings, and a contact group including contacts that have different sizes and connect the semiconductor and the electrically conductive wirings. |
| US09786578B2 |
Orthogonally hinged individualized memory module cooling
A memory module cooling system includes a liquid cooled manifold assembly and a heat spreader assembly rotateably attached to the liquid cooled manifold assembly about an axis perpendicular to the memory module. The liquid cooled manifold assembly includes a manifold, an liquid inlet, and a liquid outlet. The heat spreader assembly includes a base in thermal contact with a heat pipe, and a heat spreader in thermal contact with the heat pipe, the heat spreader configured to thermally engage the memory module. In certain embodiments, thermal bonds are maintained between a plurality of neighboring memory modules when a particular heat spreader assembly is rotated away from an associated memory module. |
| US09786572B1 |
Flip chip ball grid array with low impedance and grounded lid
A contact spring for placement in a gap between an electrical substrate opposite a lid (electrically conductive heat spreader) of an electronic device comprises a spring that both conducts heat from the substrate to the lid and electrically connects the substrate and lid. The spring comprises a flat single element configured as a plurality of polygons, providing contact points, the spring substantially lying in a plane and extending substantially in a straight line, or a spiral. The spring in an electronic device such as a flip chip ball grid array having this lid and an electrical substrate with EMI emitters: (1) provides low impedance electrical connection between the electronic circuit and lid; (2) grounds the lid to the electronic circuit; (3) minimizes EMI in the electronic circuit; (4) conducts heat from the electronic circuit to the lid; or any one or combination of the foregoing features (1)-(4). |
| US09786563B2 |
Fin pitch scaling for high voltage devices and low voltage devices on the same wafer
A semiconductor device is provided that includes a first plurality of fin structures having a first width in a first region of a substrate, and a second plurality of fin structures having a second width in a second region of the substrate, the second width being less than the first width. A first gate structure is formed on the first plurality of fin structures including a first high-k gate dielectric that is in direct contact with a channel region of the first plurality of fin structures and a first gate conductor. A second gate structure is formed on the second plurality of fin structures including a high voltage gate dielectric that is in direct contact with a channel region of the second plurality of fin structures, a second high-k gate dielectric and a second gate conductor. |
| US09786561B2 |
Wafer processing method
A wafer processing method for dividing a wafer into individual device chips along division lines is disclosed. The wafer processing method includes a back grinding step of grinding the back side of the wafer in the condition where a protective tape is attached to the front side of the wafer, thereby reducing the thickness of the wafer to a predetermined thickness, and a reinforcing insulation seal mounting step of mounting a reinforcing insulation seal capable of transmitting infrared light on the back side of the wafer. The wafer processing method further includes a modified layer forming step of applying a laser beam along each division line to thereby form a modified layer inside the wafer along each division line and a wafer dividing step of applying an external force to the wafer to thereby divide the wafer into the individual device chips along each division line. |
| US09786560B2 |
Semiconductor package structure having first and second guard ring regions of different conductivity types and method for forming the same
A method for forming a semiconductor package structure is provided. The method for forming a semiconductor package structure includes providing a substrate, wherein the substrate has a front side and a back side, forming a first guard ring doped region and a second guard ring doped region in the substrate, wherein the first guard ring doped region and the second guard ring doped region have different conductive types, forming a trench through the substrate from a back side of the substrate, conformally forming an insulating layer lining the back side of the substrate, a bottom surface and sidewalls of the trench, removing a portion of the insulating layer on the back side of the substrate to form a through via, and forming a conductive material in the through via, wherein a through silicon via (TSV) interconnect structure is formed by the insulating layer and the conductive material. |
| US09786559B2 |
Process and material for preventing deleterious expansion of high aspect ratio copper filled through silicon vias (TSVs)
Techniques are disclosed for forming through-silicon vias (TSVs) implementing a negative thermal expansion (NTE) material such as zirconium tungstate (ZrW2O8) or hafnium tungstate (HfW2O8). In some cases, the NTE material is disposed between the substrate and conductive core material of the TSV and serves to offset, at least in part, the coefficient of thermal expansion (CTE) mismatch there between, thus reducing heat-induced stresses and/or protrusion (pumping) of the conductive core material. The NTE material also may protect against leakage, voltage breakdown, and/or diffusion of the conductive core material. Furthermore, the NTE material may reduce radial stresses in high-aspect-ratio TSVs. In some cases, techniques disclosed herein may improve TSV reliability, enhance three-dimensional integration, and/or enhance performance in three-dimensional integrated circuits and/or other three-dimensional packages. Other embodiments which can employ techniques described herein will be apparent in light of this disclosure. |
| US09786557B1 |
Two-dimensional self-aligned super via integration on self-aligned gate contact
Techniques relate to contacts for semiconductors. First gate contacts are formed on top of first gates, second gate contacts are on second gates, and terminal contacts are on silicide contacts. First gate contacts and terminal contacts are recessed to form a metal layer on top. Second gate contacts are recessed to be separately on each of the second gates. Filling material is formed on top of the recessed second gate contacts and metal layer. An upper layer is on top of the filling material. First metal vias are formed through filling and upper layers down to metal layer over first gate contacts. Second metal vias are formed through filling and upper layers down to metal layer over terminal contacts. Third metal vias are formed through filling and upper layers down to recessed second gate contacts over second gates. Third metal vias are taller than first. |
| US09786554B1 |
Self aligned conductive lines
A method for forming conductive lines on a wafer comprises forming a first hardmask, a planarizing layer, a second hardmask, a layer of sacrificial mandrel material on the second hardmask, and patterning a mask on the layer of sacrificial material. A first sacrificial mandrel and a second sacrificial mandrel and a gap are formed. A layer of spacer material is deposited in the gap. Portions of the first sacrificial mandrel and the second sacrificial mandrel are removed, and exposed portions of the second hardmask, the planarizing layer and the first hardmask are removed to expose portions of the insulator layer. The second hardmask, the spacers, and the planarizing layer are removed. Exposed portions of the insulator layer are removed to form a trench in the insulator layer, and the trench is filled with a conductive material. |
| US09786546B1 |
Bulk to silicon on insulator device
A method for forming a semiconductor device comprises forming a fin in a bulk semiconductor substrate and depositing a first insulator layer over portions of the bulk semiconductor substrate adjacent to the fin. The method further includes removing portions of the first insulator layer to reduce a thickness of the first insulator layer and expose a sidewall of the fin. An etch stop layer is deposited on the first insulator layer. A gate stack is formed over a channel region of the fin and over portions of the etch stop layer. A portion of the bulk semiconductor substrate is removed to expose portions of the etch stop layer and the fin, and a second insulator layer is deposited over exposed portions of the fin and the etch stop layer. |
| US09786542B2 |
Mechanisms for forming semiconductor device having isolation structure
Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate having an upper surface. The semiconductor device also includes a recess extending from the upper surface into the semiconductor substrate. The semiconductor device further includes an isolation structure in the recess, and the isolation structure has an upper portion and a lower portion. |
| US09786540B2 |
Method of manufacturing a semiconductor device
A system and method for a semiconductor wafer carrier is disclosed. An embodiment comprises a semiconductor wafer carrier wherein conductive dopants are implanted into the carrier in order to amplify the coulombic forces between an electrostatic chuck and the carrier to compensate for reduced forces that result from thinner semiconductor wafers. Another embodiment forms conductive layers and vias within the carrier instead of implanting conductive dopants. |
| US09786535B2 |
Wafer transport system and method for operating the same
The present invention relates to a wafer transport system and a method of operating the same. The wafer transport system comprises at least one semiconductor apparatus, a track, a transfer device, a positioning device, a carrier and a cleaning device. The wafer transport system transports wafers along the at least one semiconductor apparatus via the carrier riding on the track. The transfer device transfers the wafers from the carrier to the at least one semiconductor apparatus. The positioning device identifies and controls the position of the carrier on the track. The cleaning device maintains the cleanliness of the wafers. The present invention provides advantages for improving the yield rate of a wafer, shortening the fabrication time of a wafer, and offering the flexibility and the extendibility to a wafer transport system. |
| US09786533B2 |
Substrate processing apparatus, substrate processing method and storage medium
Provided is a substrate processing apparatus which can efficiently transfer substrates using a conveying mechanism including a plurality of substrate holding members. The substrate processing apparatus transfers a processed substrate to an intermediate conveying unit using a transport mechanism when the processed substrate returns to a substrate receiving unit. When a conveying mechanism withdraws the processed substrate from the intermediate conveying unit and transfers the processed substrate to the substrate receiving unit, a control unit determines whether both of a first substrate processed first among a plurality of substrates withdrawn from the substrate receiving unit as a set and a succeeding substrate processed later than the first substrate should be transferred together after waiting until the succeeding substrate is transferred to the intermediate conveying unit or to transfer the first substrate without waiting for the succeeding substrate, when the first substrate is transferred to the intermediate conveying unit. |
| US09786531B2 |
Gas purge unit, load port apparatus, and installation stand for purging container
A gas purge unit includes an intake nozzle 28, a pivotable body 31, and an O-ring 35. The intake nozzle 28 has a nozzle opening 26 flowing out a cleaning gas. The pivotable body 31 is arranged in a ring shape to surround a cylindrical projection 28b of the nozzle 28, and is provided with a contact part 34 formed on a tip portion of the pivotable body 31 to be able to detachably contact with the intake port 5. The ring-shaped O-ring 35 is held to be compressively elastically deformable along a longitudinal direction of the cylindrical projection 28b between a rear end of the pivotable body 31 and a base portion 28a of the nozzle 28. |
| US09786529B2 |
Pyrometry filter for thermal process chamber
Embodiments of the invention generally relate to pyrometry during thermal processing of semiconductor substrates. More specifically, embodiments of the invention relate to a pyrometry filter for a thermal process chamber. In certain embodiments, the pyrometry filter selectively filters selected wavelengths of energy to improve a pyrometer measurement. The pyrometry filter may have various geometries which may affect the functionality of the pyrometry filter. |
| US09786523B2 |
Method and apparatus for substrate rinsing and drying
A method and apparatus are disclosed for optimizing a rinsing and drying process in semiconductor manufacturing. The optimization seeks to maximize processing throughput while maintaining low defect counts and high device yields, and utilizes simulation and experimental data to set the optimal process parameters for the rinsing and drying process. Improved methods of rinse liquid and purge gas nozzle movement are also disclosed. |
| US09786522B2 |
Substrate treatment method and substrate treatment apparatus
A substrate treatment method is performed by a substrate treatment apparatus including a substrate holding unit which holds a substrate, and a hot plate which heats the substrate from below. The method includes: a treatment liquid supplying step of locating the hot plate at a retracted position at which the hot plate is retracted below the substrate holding unit and, in this state, supplying a treatment liquid to an upper surface of the substrate held by the substrate holding unit; a protection liquid film forming step of forming a liquid film of a protection liquid to cover an upper surface of the hot plate in the treatment liquid supplying step; and a substrate heating step of heating the substrate by the hot plate with the hot plate being located adjacent to a lower surface of the substrate or in contact with the lower surface of the substrate. |
| US09786516B2 |
Power device having reduced thickness
An electronic device includes at least one chip and an insulating body embedding the chip. The electronic device further includes a heat-sink in contact with the chip. The heat-sink includes a plate having a first thickness. A recess is provided in the plate that defines a central portion of the plate having a second thickness less than the first thickness. The chip is mounted to the central region of the heat-sink within the recess. The insulating body includes a surface, such as a mounting surface, including an opening exposing at least a portion of the heat-sink. The device may further include a reophore extending through a side surface of the insulating body, that reophore being in contact with the heat sink. |
| US09786514B2 |
Semiconductor package with sidewall-protected RDL interposer
A semiconductor package includes a redistribution layer (RDL) interposer having a first side, a second side opposite to the first side, and a vertical sidewall extending between the first side and the second side; at least one semiconductor die mounted on the first side of the RDL interposer; a molding compound disposed on the first side and covering the at least one semiconductor die and the vertical sidewall of the RDL interposer; and a plurality of solder bumps or solder balls mounted on the second side of the RDL interposer. |
| US09786508B2 |
Semiconductor device and fabrication method thereof
The present disclosure provides semiconductor devices and fabrication methods thereof. A work function layer is formed on the semiconductor substrate. A buffer layer is formed on the work function layer. The work function layer is doped through the buffer layer with impurity ions. The buffer layer obstructs a flow of the impurity ions to control a concentration of the impurity ions in different regions of the work function layer to regulate a work function of the work function layer in the different regions. |
| US09786505B2 |
FinFET device using dummy fins for smooth profiling
A semiconductor structure includes a substrate, at least one active semiconductor fin, at least one insulating structure, a gate electrode, and a gate dielectric. The active semiconductor fin is disposed on the substrate. The insulating structure is disposed on the substrate and adjacent to the active semiconductor fin. A top surface of the insulating structure is non-concave and is lower than a top surface of the active semiconductor fin. The gate electrode is disposed over the active semiconductor fin. The gate dielectric is disposed between the gate electrode and the active semiconductor fin. |
| US09786500B2 |
Polycrystalline semiconductor layer and fabricating method thereof
The present application discloses a method of fabricating a polycrystalline semiconductor layer, comprising forming a heat storage layer; forming a buffer layer on the heat storage layer; forming a first amorphous semiconductor layer on a side of the buffer layer distal to the heat storage layer; and crystallizing the first amorphous semiconductor layer to form a first polycrystalline semiconductor layer. |
| US09786498B2 |
Method for the production of a nitride compound semiconductor layer
Described is a method for producing a nitride compound semiconductor layer, involving the steps of:—depositing a first seed layer (1) comprising a nitride compound semiconductor material on a substrate (10);—desorbing at least some of the nitride compound semiconductor material in the first seed layer from the substrate (10);—depositing a second seed layer (2) comprising a nitride compound semiconductor material; and—growing the nitride compound semiconductor layer (3) containing a nitride compound semiconductor material onto the second seed layer (2). |
| US09786497B2 |
Double aspect ratio trapping
A semiconductor structure is provided by a process in which two aspect ratio trapping processes are employed. The structure includes a semiconductor substrate portion of a first semiconductor material having a first lattice constant. A plurality of first semiconductor-containing pillar structures of a second semiconductor material having a second lattice constant that is greater than the first lattice constant extend upwards from a surface of the semiconductor substrate portion. A plurality of second semiconductor-containing pillar structures of a third semiconductor material having a third lattice constant that is greater than the first lattice constant extend upwards from another surface of the semiconductor substrate portion. A spacer separates each first semiconductor-containing pillar structure from each second semiconductor-containing pillar structure. Each second semiconductor-containing pillar structure has a width that is different from a width of each first semiconductor-containing pillar structure. |
| US09786495B2 |
Method for evaluating semiconductor film and method for manufacturing semiconductor device
A method for evaluating a semiconductor film of a semiconductor device which is configured to include an insulating film, the semiconductor film, and a conductive film and to have a region where the semiconductor film and the conductive film overlap with each other with the insulating film provided therebetween, includes a step of performing plasma treatment after formation of the insulating film, and a step of calculating a peak value of resistivity of a microwave in the semiconductor film by a microwave photoconductive decay method after the plasma treatment, so that the hydrogen concentration in the semiconductor film is estimated. |
| US09786493B2 |
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A semiconductor device manufacturing method, including: mounting substrates on a mounting table within a processing chamber along a rotation direction of the table; starting to supply a first-element-containing gas to a first region in the chamber along the rotation direction, while rotating the table and exhausting the processing chamber; starting to supply a second-element-containing gas to a second region in the chamber; starting to generate, by a plasma generating unit in the second region, plasma of the second-element-containing gas in the second region to have a first activity; and forming a thin film containing first and second elements on the substrates by rotating the table to cause the substrates to sequentially pass through the first and second regions in turn so that a first-element-containing layer is formed in the first region and is modified in the second region by generating plasma having a second activity higher than the first activity. |
| US09786491B2 |
Formation of SiOCN thin films
Methods for depositing silicon oxycarbonitride (SiOCN) thin films on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a silicon precursor and a second reactant that does not include oxygen. In some embodiments the methods allow for the deposition of SiOCN films having improved acid-based wet etch resistance. |
| US09786490B2 |
Wafer processing method and electronic device
Disclosed herein is a wafer processing method for processing the back side of a wafer having a plurality of devices formed on the front side so as to be separated by a plurality of crossing division lines. The wafer processing method includes a back grinding step of grinding the back side of the wafer to thereby reduce the thickness of the wafer to a predetermined thickness, a back polishing step of polishing the back side of the wafer after performing the back grinding step, thereby removing grinding strain, and a diamond-like carbon film deposition step of forming a diamond-like carbon film on the back side of the wafer after performing the back polishing step. |
| US09786488B2 |
Liquid processing method, memory medium and liquid processing apparatus
A liquid processing method for liquid-processing a substrate includes setting a substrate on a substrate holding device which rotates the substrate such that the substrate is held in horizontal position, supplying processing liquid to center portion of the substrate such that the center portion positioned center side with respect to peripheral portion of the substrate is liquid-processed, positioning a discharge port of a processing liquid nozzle toward downstream side in rotation direction such that the liquid is discharged to the peripheral portion obliquely to surface of the substrate and along tangential direction of the substrate while the substrate is rotated, and discharging gas from a gas nozzle perpendicularly to the surface of the substrate toward position that is adjacent to liquid landing position of the liquid on the surface of the substrate and is on the center side of the substrate, while the liquid is discharged to the peripheral portion. |
| US09786487B2 |
Method for coating cavities of semiconductor substrates
A method for temporary coating of cavities, which at least partially run through a semiconductor substrate and are provided for a permanent coating and/or equipping, with a temporarily applied coating material before processing steps for processing at least one surface of the semiconductor substrate. In addition, a method for removing a temporary coating of cavities of a semiconductor substrate, whereby the coating is applied according to a previously-mentioned method and whereby, in particular immediately afterwards, a permanent coating and/or equipping of the cavities is carried out. |
| US09786484B2 |
Method and apparatus for decoding multiplexed information in a chromatographic system
Implementations of methods and apparatuses are disclosed for decoding multiplexed information in a chromatographic system. Implementations may include the method of pulsing ions from an ion source through an analyzer according to a predetermined multiplexing scheme, each pulse including one or more ions corresponding to a sample, detecting a plurality of ion strikes at a detector, determining a data point for each ion strike, wherein each data point includes an intensity of a detected ion strike and a time of the detected ion strike, maintaining a multiplexed spectrum of the data points, the multiplexed spectrum including the data points, and demultiplexing the time shifted spectrum using the data points of the multiplexed spectrum. |
| US09786478B2 |
Zero voltage mass spectrometry probes and systems
The invention generally relates to zero volt mass spectrometry probes and systems. In certain embodiments, the invention provides a system including a mass spectrometry probe including a porous material, and a mass spectrometer (bench-top or miniature mass spectrometer). The system operates without an application of voltage to the probe. In certain embodiments, the probe is oriented such that a distal end faces an inlet of the mass spectrometer. In other embodiments, the distal end of the probe is 5 mm or less from an inlet of the mass spectrometer. |
| US09786477B1 |
Gas flow assisted ion transfer system with improved transfer efficiency
An ion transfer system includes an ion source coupled to an ion inlet; an ion transfer tube assembly including a concentric ion transfer tube with a porous material that is permeable to a gas, the concentric ion transfer tube coupled to the ion inlet and the ion source, where a first gas that includes an ion stream flows through the concentric ion transfer tube; and a concentric gas tube, the concentric ion transfer tube disposed within the concentric gas tube, where a second gas flows between the concentric ion transfer tube and the concentric gas tube; an ion detection device coupled to a capillary tube that is coupled to the concentric ion transfer tube, where the capillary tube transports the ion stream to the ion detection device; and a pump coupled to at least one of the concentric ion transfer tube or the concentric gas tube. |
| US09786476B2 |
MS/MS data processing
A method of identifying precursor ion species from their fragments comprises obtaining mass spectra of a plurality of precursor ion species and their fragments to high mass accuracy. The fragment mass spectrum, obtained from fragmentation of multiple precursor ion species, is then scanned it identify pairs of fragments whose combined mass matches the mass of one of the precursor ion species. Once pairs of fragment ion shave been matched to precursor ions, the composite fragment ion spectrum is broken down into portions, one per fragment pair. Analysis continues until no further pairs are identified. A simplified fragment ion spectrum is then reconstructed for each precursor sample ion by stitching together the broken down sections of the composite fragment spectrum. The resultant reconstructed, simplified fragment spectra are sent to a search engine which returns a score-sorted list of likely candidates for each synthetic fragment ion spectrum. |
| US09786475B2 |
Systems and methods for plasma processing of microfeature workpieces
Systems and methods for plasma processing of microfeature workpieces are disclosed herein. In one embodiment, a method includes generating a plasma in a chamber while a microfeature workpiece is positioned in the chamber, measuring optical emissions from the plasma, and determining a parameter of the plasma based on the measured optical emissions. The parameter can be an ion density or another parameter of the plasma. |
| US09786474B2 |
Cathodic arc deposition apparatus and method
A cathodic arc coating apparatus includes a vessel, a cathode disposed in the vessel, and a stinger assembly. The stinger assembly includes a first magnetic field generator disposed in a first stinger cup in selective contact with the cathode. The first stinger cup has at least a first electrically conductive cup portion spaced from a second electrically conductive cup portion by a thermally insulating layer therebetween. |
| US09786471B2 |
Plasma etcher design with effective no-damage in-situ ash
In some embodiments, the present disclosure relates to a plasma etching system having direct and localized plasma sources in communication with a processing chamber. The direct plasma is operated to provide a direct plasma to the processing chamber for etching a semiconductor workpiece. The direct plasma has a high potential, formed by applying a large bias voltage to the workpiece. After etching is completed the bias voltage and direct plasma source are turned off. The localized plasma source is then operated to provide a low potential, localized plasma to a position within the processing chamber that is spatially separated from the workpiece. The spatial separation results in formation of a diffused plasma having a zero/low potential that is in contact with the workpiece. The zero/low potential of the diffused plasma allows for reactive ashing to be performed, while mitigating workpiece damage resulting from ion bombardment caused by positive plasma potentials. |
| US09786466B2 |
Micro X-ray tube
The present disclosure may provide a micro X-ray tube with a filter tube to filter X-rays and at the same time to serve as an insulator. For this, the X-ray tube may include a filter tube between a second electrode and a gate electrode, hence separating from each other. The second electrode may have a target and the gate electrode may accelerate an electron-beam to collide with the target. The filter tube includes an alumina (Al2O3). The target is inclined to allow the X-rays to be directed toward the filter tube. |
| US09786465B2 |
Apparatuses and methods for generating distributed x-rays
An apparatus and method to generate distributed x-rays. A hot cathode of an electron gun is used in vacuum to generate electron beams having certain initial movement energy and speed. Periodic scanning is performed with the initial low-energy electron beams, which are thus caused to be reciprocally deflected. A current-limiting device is provided in the travel path of the electron beams along the direction of the reciprocal deflection. Through holes arranged in an array on the current-limiting device, only part of the electron beams targeting specific positions can pass to form sequential electron beam currents distributed in an array. These electron beam currents are accelerated by a high-voltage electric field to obtain high energy, bombard an anode target, and thus sequentially generate corresponding focus spots and x-rays distributed in an array at the anode target. |
| US09786464B2 |
Superconducting multi-cell trapped mode deflecting cavity
A method and system for beam deflection. The method and system for beam deflection comprises a compact superconducting RF cavity further comprising a waveguide comprising an open ended resonator volume configured to operate as a trapped dipole mode; a plurality of cells configured to provide a high operating gradient; at least two pairs of protrusions configured for lowering surface electric and magnetic fields; and a main power coupler positioned to optimize necessary coupling for an operating mode and damping lower dipole modes simultaneously. |
| US09786462B2 |
Master controller
Provided is a master controller that can be adopted in a variety of vehicles in which different current capacities are required for the master controller. A master controller includes a handle (3), cams (2a to 2f) interlocking with the handle (3), cam switches (1a to 1f) connected to or disconnected from the cams (2a to 2f) in accordance with the position of the handle (3), and a relay circuit (6) that outputs output signals in accordance with input signals input through the cam switches (1a to 1f). |
| US09786457B2 |
Systems and methods for freewheel contactor circuits
A circuit for use with a contactor including at least one contact is provided. The circuit includes a first segment including a voltage source, a first coil, a second coil, and a first transistor, wherein the first segment is configured to selectively conduct a closing current through the first coil, the second coil, and the first transistor to close the at least one contact. The circuit further includes a second segment including the first coil, a second transistor, and a first diode, wherein the second segment is configured to selectively conduct a holding current through the first coil, the second transistor, and the first diode to hold the at least one contact closed, and wherein the first diode is arranged such that substantially all current produced by the voltage source flows through the first coil. |
| US09786456B2 |
Fail-safe system for process machine
An apparatus is for a process machine having a process-status switch and a process-control element. The apparatus includes a sensor input signal conditioning circuit, a logic circuit and a power output circuit. The sensor input signal conditioning circuit is configured to provide a logic-converted status signal representing a process-status signal associated with the process-status switch of the process machine. The logic circuit is configured to provide a latched output signal converted from the logic-converted status signal provided by the sensor input signal conditioning circuit. The latched output signal has any one of a first latched state and a second latched state. The power output circuit is configured to execute any one of maintaining and disconnecting a voltage being applied to the process-control element depending on the state of the latched output signal. |
| US09786455B2 |
Actuator device with stable working positions
A device is described wherein an actuator (3, 4; 103, 104) drives a member, such as a rack (6) meshed with a pinion (5), between two stable positions. For this purpose, elements for stopping the movable member are provided, which cooperate with elements present on the outer housing (2, 21), in which the actuator and the movable member (5, 51) are arranged, for holding at least one of said stable conditions. The device of the invention ensures low energy consumption because the actuator (3) only operates for moving the movable member from one stable position to the other. |
| US09786454B2 |
Commutating switch with blocking semiconductor
A mechanical switch that works by commutation of the current to an energy absorbing path or sequence of paths through at least one blocking semiconductor to open the circuit, wherein the commutation is caused by a sliding motion of at least one shuttle electrode over at least one stationary electrode. |
| US09786453B2 |
Rotational operation type switch
A rotational operation type switch includes a frame; a rotational operation button rotatably supported on the frame for rotational operation; a switching contact mechanism disposed below the operation button to face the operation button; and an operation mechanism disposed between the operation button and the switching contact mechanism, to switch the switching contact mechanism in conjunction with the rotational operation of the operation button. The switching contact mechanism includes a printed circuit board, a plurality of fixed contact electrodes disposed on the printed circuit board and spaced a predetermined distance away from each other, and a movable contact having a disc spring shape and disposed bridging between the plurality of fixed contact electrodes. The movable contact deforms to contact and separate from the fixed contact electrodes and switches an electrical connection between the fixed contact electrodes. |
| US09786452B2 |
Modular switching system and method
A switching system may include a body and a set of key elements. The body may be electrically connectable to a first electrical device and a second electrical device, and may have a keypad with key element attachment features to which the key elements can be attached. The key elements may be attachable in various positions and/or combinations on the keypad. The key elements may include one or more buttons of various sizes and/or a rocker. The keypad may have multiple positions to which key elements can be attached, with larger key elements requiring multiple positions. The key element attachment features may be domes, which may be inserted into holes in tabs extending from the key elements to pivotably attach the key elements to the keypad. Each key element may be retained on the keypad independently of any other component aside from the keypad and the key element. |
| US09786451B2 |
Remote control device for toilet device
According to one embodiment, a remote control device for a toilet device includes an operation button and a power generator. The operation button is capable of a push operation and is configured to operate an equipment in response to the push operation. The power generator is configured to generate a power by being pressed in response to the push operation. A direction of the pressing is parallel to a wall surface on which the remote control device is placed. |
| US09786449B2 |
Dome switch stack and method for making the same
Systems and methods for providing input component assemblies for dome switches are provided. In some embodiments, an input component assembly may include a contact area coupled to a circuit board for a switch, a conductive covering for enclosing the circuit board, and a dome positioned over the conductive covering, where the dome is operative to close at least one circuit of the switch when the dome is depressed towards the conductive covering. |
| US09786447B2 |
Mounting assembly for a circuit breaker mechanism
A mounting assembly for a circuit breaker mechanism includes a base and a mid-cover disposed adjacent the base. Also included is a first pair of mounting posts comprising a first mounting post and a second mounting post extending from the base, the first pair of mounting posts each protruding through the mid-cover. Further included is a first mount hole defined by the first mounting post and a second mount hole defined by the second mounting post. Yet further included is a first pin extending through the first mount hole, the second mount hole and a circuit breaker mechanism frame to retain the circuit breaker mechanism to the base. |
| US09786443B2 |
Capacitor and method for charging and discharging the same
Provided is a capacitor in which, even in the case of a high maximum charging voltage, decomposition of the electrolyte can be suppressed and charging and discharging can be performed with stability. The capacitor includes a positive electrode containing a positive-electrode active material, a negative electrode containing a negative-electrode active material, a separator disposed between the positive electrode and the negative electrode, and an electrolyte, wherein the positive-electrode active material contains a porous carbon material, in a volume-based pore size distribution of the porous carbon material, a cumulative volume of pores having a pore size of 1 nm or less accounts for 85% or more of a total pore volume, the porous carbon material has a crystallite size of 1 to 10 nm, the porous carbon material contains an oxygen-containing functional group, and a content of the oxygen-containing functional group is 3.3 mol % or less. |
| US09786441B2 |
Solid electrolytic capacitor package structure and method of manufacturing the same
The instant disclosure provides a solid electrolytic capacitor package structure and method of manufacturing the same. The solid electrolytic capacitor package structure includes a capacitor assembly, at least one electrode pin and a package body enclosing the capacitor assembly and the electrode pin. The electrode pin includes an embedded portion enclosed by the package body and an exposed portion positioned outside the package body. The method of manufacturing the solid electrolytic capacitor package structure includes a protection step including forming a protecting film on the exposed portion; a coating step including depositing a nanomaterial on the solid electrolytic capacitor package structure to form a nanofilm, wherein the nanomaterial penetrates into defects of the solid electrolytic capacitor package structure; and a deprotection step including removing the protecting film. The instant disclosure provides improved air-tight and water-tight properties of the solid electrolytic capacitor package structure, thereby increasing the lifetime thereof. |
| US09786440B2 |
Anode for use in a high voltage electrolytic capacitor
An anode for use in a high voltage electrolytic capacitor is provided. The anode contains a sintered porous pellet and a leadwire extending therefrom in a longitudinal direction. The pellet is multi-layered to the extent that it contains at least a first layer positioned adjacent to a second layer, both of which extend along the length of the anode. The anode leadwire is embedded within the first layer. For this reason, the first layer has a thickness greater than that of the leadwire. Nevertheless, the use of a separate and distinct second layer adjacent to the first layer can allow each of the layers to be independently pressed using a multi-sided compaction device so that the properties of the anode are not significantly impacted by the presence of the relatively large anode leadwire. |
| US09786436B2 |
Tensile stress resistant multilayer ceramic capacitor
A multilayer ceramic capacitor is configured such that “a” is a distance in a height direction between an effective portion and a first principal surface; “b” is a distance in a length direction between a first end surface and the effective portion in the length direction; “c” is a thickness of the thickest portion of a first base layer provided over the first principal surface; “d” is a distance in the length direction between the thickest portion of the first base layer provided over the first end surface and a portion of the first base layer located over the first principal surface and closest to a second end surface; and “e” is a maximum thickness of a portion of the first base layer provided over the first end surface; and f: the height of the ceramic body, and 2≦(c·d+e·f/2)/(a·b)≦6 is satisfied. |
| US09786430B2 |
Space-adaptive wireless power transfer system and method using evanescent field resonance
A magnetic resonance wireless power transfer method according to an aspect of the present invention includes transmitting power from a source coil to the Tx resonant coil using a magnetic induction method, transmitting the power from the Tx resonant coil to an Rx resonant coil, having a resonant frequency identical with that of the Tx resonant coil, via magnetically-coupled resonance, and transmitting the power from the Rx resonant coil to the device coil of an electronic device using the magnetic induction method. The Tx resonant coil and the Rx resonant coil are arranged at a right angle or a specific angle of inclination relative to each other. |
| US09786429B2 |
Bobbin and magnetic module comprising the same
A bobbin for use in a magnetic module is provided. The bobbin comprises a winding body, a first plate and a second plate. The winding body is disposed between the first plate and the second plate, and further comprises a first end, a second end and a through hole. The first end comprises a first buckling portion, and the through hole penetrates the first end and the second end. The first plate includes a second buckling portion and a first opening, while the second buckling portion is adapted to engage with the first buckling portion. The second plate includes a second opening, and the second plate is engaged with the second end of the winding body. |
| US09786428B2 |
Common mode filter and method of manufacturing the same
Disclosed herein is a common mode filter, including: a magnetic substrate; and a body part formed on the magnetic substrate, wherein the body part is configured of an insulating layer surrounding a coil electrode, an outer electrode terminal connected with an end of the coil electrode, and a magnetic resin composite, the insulating layer is formed on the magnetic substrate, having a margin part M disposed at an edge of the magnetic substrate, and the magnetic resin composite is filled in an empty space of the body part including the margin part M, thereby promoting a consecutive flow of magnetic flux that is generated from the coil electrode. |
| US09786424B2 |
Coil component
A coil component includes an insulating layer in which coil conductors are embedded, and a magnetic member disposed on one surface of the insulating layer and having a magnetic core protruding therefrom. The magnetic core is inserted into the insulating layer and has a width which is increased toward a lower portion thereof. |
| US09786421B2 |
Segmentation of winding support structures
The present invention provides a method of manufacturing magnets, including magnets comprising coil windings which may be multiple meters in length. In an embodiment, the support structure comprises a cylinder in which machined grooves are formed to define the magnet conductor path. The segments may consist of a composite material or a metal in the shape of a cylinder, but which need not be manufactured from a single piece of material. Rather, the support structure may be formed in multiple connectable segments which, when connected together, form a completed wiring support structure. Each segment may be of sufficient length to support multiple individual coil turns in a helical configuration. When the segments are connected the helical configuration continues without interruption from connectable segment to connectable segment. The segmented wiring support structure of the invention may be applied to linear or curved magnet geometries. |
| US09786420B2 |
Molecular switch
Photosensitive molecular switch, having a chelate ligand, a metal ion bonded coordinatively to the chelate ligand, the metal ion being selected from the group of metal ions consisting of Mn2+, Mn3+, Fe2+, Fe3+, Co2+ and Ni2+, a photochromic system which is bonded covalently to the chelate ligand and can be isomerized by irradiation, this system being bonded coordinatively to the metal ion in one configuration and not bonded to the metal ion in the other configuration. |
| US09786418B2 |
Cable splitter and video device using same
A cable splitter includes a main body. The main body includes a top wall and an end portion. The top wall defines a splitting slot, a first guide slot, a second guide slot running through the top wall. The end portion includes a first guide arm and a second guide arm extending from the end portion and corresponding to the first guide slot and the second guide slot. |
| US09786411B2 |
Electrical characteristics of shielded electrical cables
A shielded electrical cable includes one or more conductor sets extending along a length of the cable and being spaced apart from each other along a width of the cable. Each conductor set has one or more conductors having a size no greater than 24 AWG and each conductor set has an insertion loss of less than about −20 dB/meter over a frequency range of 0 to 20 GHz. First and second shielding films are disposed on opposite sides of the cable, the first and second films including cover portions and pinched portions arranged such that, in transverse cross section, the cover portions of the first and second films in combination substantially surround each conductor set, and the pinched portions of the first and second films in combination form pinched portions of the cable on each side of each conductor. |
| US09786410B2 |
Transparent conductive film, heater, touch panel, solar battery, organic EL device, liquid crystal device, and electronic paper
There are provided a transparent conductive film, as well as a heater, a touch panel, a solar battery, an organic EL device, a liquid crystal device, and an electronic paper that are provided with the transparent conductive film, the transparent conductive film being capable of easing a decline in optical transmittance when graphene is laminated, and of achieving optical transmittance higher than an upper limit of optical transmittance of a single layer of graphene. The transparent conductive film includes a single-layered conductive graphene sheet. The single-layered conductive graphene sheet includes a first region and a second region, the first region being configured of graphene, and the second region being surrounded by the first region and having optical transmittance that is higher than optical transmittance of the first region. |
| US09786404B2 |
Metal foil and electronic device
There is provided a metal foil suitable for an electrode substrate for an electronic element, which makes it possible to suppress oxidation of the ultra-smooth surface and also prevent roll scratches when wound in a roll. The metal foil of the present invention is made of copper or copper alloy. The front surface of the metal foil has an ultra-smooth surface profile having an arithmetic mean roughness Ra of 30 nm or less as determined in accordance with JIS B 0601-2001. The back surface of the metal has a concave-dominant surface profile having a Pv/Pp ratio of 1.5 or more, the Pv/Pp ratio being a ratio of a maximum profile valley depth Pv to a maximum profile peak height Pp of a profile curve as determined in a rectangular area of 181 μm by 136 μm in accordance with JIS B 0601-2001. |
| US09786403B2 |
Electrical wire and electrical wire with terminal
An electrical wire and an electrical wire with a terminal capable of diminishing the adjustment of a crimping height. There is provided an electrical wire 1 including a conductor part 11 that is made of a precipitation strengthened copper alloy having a cross-sectional area of 0.13 sq in the ISO 6722 standard and is compressed, wherein the conductor part 11 has a rate of elongation of 7% or more, and a tensile strength of 500 MPa or more. In addition, the electrical conductivity of the conductor part is 70% IACS or more. |
| US09786402B2 |
Light shielding apparatus
A light shielding apparatus for blocking light from reaching an electronic device, the light shielding apparatus including left and right support assemblies, a cross member, and an opaque shroud. The support assemblies each include primary support structure, a mounting element for removably connecting the apparatus to the electronic device, and a support member depending from the primary support structure for retaining the apparatus in an upright orientation. The cross member couples the left and right support assemblies together and spaces them apart according to the size and shape of the electronic device. The shroud may be removably and adjustably connectable to the left and right support assemblies and configured to take a cylindrical dome shape so as to form a central space covered from above. The opaque shroud prevents light from entering the central space and contacting sensitive elements of the electronic device. |
| US09786390B2 |
Memory device repairable by soft and hard repair operations and memory system including the same
A memory device includes a non-volatile memory circuit suitable for storing system hard repair data, a temporary memory circuit suitable for storing system soft repair data, a system register circuit suitable for receiving and storing the system hard repair data or the system soft repair data during a boot-up operation, and a memory bank suitable for performing a repair operation based on first data stored in the system register circuit. |
| US09786380B2 |
Semiconductor memory device
A semiconductor memory device includes a memory cell includes a charge storage layer, a word line that is connected to a gate of the memory cell, and a controller that performs a write operation on the memory cell by applying a write voltage to the word line, and a verify operation to verify a threshold voltage of the memory cell after the write operation. The verify operation includes a first verify operation using a first verify voltage, and a second verify operation using a second verify voltage higher than the first verify voltage. |
| US09786372B2 |
Nonvolatile memory device and wordline driving method thereof
According to example embodiments of inventive concepts, a nonvolatile memory device includes a memory cell array, an address decoder, an input/output circuit, a voltage generation circuit, and control logic. The memory cell array includes a plurality of memory blocks on a substrate. Each of the memory blocks includes a plurality of strings connected between bit lines and a common source line. The address decoder is configured to measure impedance information of word lines of a selected memory block. The voltage generation circuit is configured to generate word line voltages to be applied to word lines, and at least one of the word line voltages includes an offset voltage and a target voltage. The control logic is configured to adjust a level of the offset voltage and the offset time depending on the measured impedance information of the word lines. |
| US09786370B2 |
CES-based latching circuits
According to one embodiment of the present disclosure, a device comprises a latching circuitry, where the latching circuitry comprises at least one correlated electron random access memory (CeRAM) element. The latching circuitry further comprises a control circuit coupled to the at least one CeRAM element. The control circuit is configured to receive at least one control signal. Based on the at least one control signal, perform at least one of storing data into the latching circuitry and outputting data from the latching circuitry. |
| US09786367B2 |
Method of reading an electronic memory device including a plurality of memory cells of resistive random access memory type
A method for reading an electronic memory device including N memory cells Ci with 1≧i≧N and N≧2, each cell Ci having a resistance Ri, the method including for each cell Ci, determining a set Ei of resistance values capable of being associated with the resistance Ri of the cell Ci; for each combination of N variables Vi, each variable Vi taking successively each resistance value among the predetermined set Ei, applying a mathematical function to the combination to obtain a resulting resistance value; for each combination of N variables Vi, associating a logic state of the electronic memory device with the resulting resistance value obtained previously, according to a comparison of the resulting resistance value with a same threshold resistance value; associating a resistance value with each resistance Ri to obtain a particular combination of N variables Vi; determining the logic state of the electronic memory device. |
| US09786363B1 |
Word-line enable pulse generator, SRAM and method for adjusting word-line enable time of SRAM
A word-line enable pulse generator for a SRAM is provided. A delay unit receives an enable signal to provide an intermediate signal. A first inverter receives the intermediate signal to provide a word-line enable pulse signal to a plurality of word line drivers of the SRAM. The delay unit includes a first transistor coupled between an input terminal of the first inverter and a first power source, a resistor coupled between the input terminal of the first inverter and a second power source that is different from the first power source, and a second transistor coupled between the input terminal of the first inverter and the resistor. The first transistor and the second transistor form a second inverter. A specific edge of the word-line enable pulse signal is delayed from the specific edge of the enable signal by a delay time corresponding to resistance of the resistor. |
| US09786362B1 |
Memory circuit and data processing system
A memory circuit comprises an array of data storage elements; access circuitry to access a data bit, stored by a data storage element enabled for access, by an access signal for that data storage element; and control circuitry to enable groups of data storage elements for access, the groups having a group size, the group size being one or more, the access signals for data storage elements in a group being combined to provide a combined access signal common to that group of data storage elements; the control circuitry being configured to selectively operate in at least a first mode and a second mode, the group size in the first mode being different to the group size in the second mode. |
| US09786359B2 |
Static random access memory (SRAM) tracking cells and methods of forming same
An embodiment static random access memory (SRAM) array includes a writable SRAM cell disposed in a first row of the SRAM array and an SRAM read current tracking cell in the first row of the SRAM array. The SRAM current tracking cell includes a first read pull-down transistor and a first read pass-gate transistor. The first read pull-down transistor includes a first gate electrically connected to a first positive supply voltage line; a first source/drain electrically connected to a first ground line; and a second source/drain. The first read pass-gate transistor includes a third source/drain electrically connected to the second source/drain and a fourth source/drain electrically connected to a read tracking bit line (BL). The read tracking BL is electrically connected to a read sense amplifier timing control circuit. |
| US09786358B1 |
6T bitcell for single port static random access memories (SRAM) with single-ended read and single-ended write
A 6T bitcell for single port SRAM that performs single ended read and single ended write is described. The presently described bitcell gives huge advantage in terms of area, dynamic power, leakage power and performance over the prior art in the industry. The bitcell and architecture does not have either a write bitline pair or a read bitline for each bitcell. It has only one read bitline per mux. |
| US09786356B2 |
Memory device with adaptive voltage scaling based on error information
A method of operation of a memory device includes, for each operating frequency of multiple operating frequencies, determining a target voltage level of a supply voltage. For example, a first target voltage level for a first operating frequency of the multiple operating frequencies is determined. The method includes accessing first data from the memory device while the memory device is operating at the first operating frequency and is powered by the supply voltage having a first voltage level. The method includes determining a first number of errors associated with the first data. The method further includes, in response to the first number of errors satisfying a threshold, adjusting the supply voltage to a second voltage level that is greater than the first voltage level. |
| US09786354B2 |
Memory module
A memory module that includes: a printed circuit board having a connecting terminal; memory chips arranged on the printed circuit board; data buffers disposed on a first surface of the printed circuit board and corresponding to the memory chips; and resistance units disposed on a second surface of the printed circuit board and corresponding to the data buffers. |
| US09786353B2 |
Reconfigurable clocking architecture
Described is an apparatus which comprises: a comparator to be clocked by a clock signal to be provided by a clocking circuit, wherein the clocking circuit includes: a voltage controlled delay line having two or more delay cells; a multiplexer coupled to the voltage controlled delay line and operable to configure the clocking circuit as a ring oscillator with the voltage controlled delay line forming at least one delay section of the ring oscillator; and select logic coupled to the multiplexer, the select logic is to receive a signal indicating arrival of an input clock, and is to control the multiplexer according to the indication. Described is also an apparatus which comprises: a data path to receive input data; and a clock path to receive an input clock and to provide a preconditioned clock to the data path when the input clock is absent. |
| US09786350B2 |
Memory device
A memory device with a novel structure that is suitable for a register file is provided. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit includes a first logic element and a second logic element each of which is configured to perform logic inversion, a selection circuit, a first switch, a second switch, and a third switch. The second memory circuit includes a first transistor in which a channel formation region is provided in an oxide semiconductor film, a second transistor, and a capacitor to which a potential is supplied through the first transistor. |
| US09786348B1 |
Dynamic adjustment of memory cell digit line capacitance
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be used to store a logic state. The capacitance of a digit line of the ferroelectric memory cell may be dynamically increased prior to, and during a portion of, a read operation used to determine a stored logic state of the cell. The capacitance may be increased by leveraging intrinsic capacitance of digit lines of the array—e.g., by shorting one digit line to another digit line. Increasing the capacitance of the digit line may increase the signal on the digit line that is sensed during the read operation. |
| US09786344B1 |
Programming of magnetic random access memory (MRAM) by boosting gate voltage
A method of programming an MTJ includes selecting the MTJ and an access transistor coupled thereto. The gate of the selected access transistor is coupled to a selected word line (WL), which is raised to a first voltage, Vdd, and is then allowed to float. The first voltage and a second voltage, Vx, are respectively applied to a selected bit line (BL) coupled to the selected MTJ and a selected source line (SL) coupled to the selected access transistor, thereby driving a switching current through the selected MTJ from the selected BL to SL. Alternatively, the switching current may be reversed by applying 0 V and Vdd to the selected BL and SL, respectively. Moreover, the second voltage is applied to other BLs not coupled to the selected MTJ and the first voltage is applied to other SLs not coupled to the selected access transistor, thereby boosting the voltage of the floating WL to above the first voltage. |
| US09786338B2 |
Multiple register memory access instructions, processors, methods, and systems
A processor includes N-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction is to indicate a memory location and a register. The processor includes a memory access unit coupled with the decode unit and with the N-bit registers. The memory access unit is to perform a multiple register memory access operation in response to the multiple register memory access instruction. The operation is to involve N-bit data, in each of the N-bit registers comprising the indicated register. The operation is also to involve different corresponding N-bit portions of an M×N-bit line of memory corresponding to the indicated memory location. A total number of bits of the N-bit data in the N-bit registers to be involved in the multiple register memory access operation is to amount to at least half of the M×N-bits of the line of memory. |
| US09786336B2 |
Memory device capable of operation in wide temperature range and data processing system and method of operating the same
A data processing system includes a first memory, a second memory, a temperature sensor, and a controller. The temperature sensor is configured to sense a temperature at the data processing system and generate a temperature signal. The controller is configured to control whether the first memory is enabled or disabled and whether the second memory is enabled or disabled based on the temperature signal and based on a first temperature threshold associated with the first memory and a second temperature threshold associated with the second memory. |
| US09786335B2 |
Apparatuses and methods for performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry includes a sense amplifier coupled to a pair of complementary sense lines, and a compute component coupled to the sense amplifier. The compute component includes a dynamic latch. The sensing circuitry is configured to perform a logical operation and initially store the result in the sense amplifier. |
| US09786331B1 |
Shielded three-layer patterned ground structure
The present disclosure generally relates to a shielded three-layer patterned ground structure in a PCB. The PCB may be disposed in a hard disk drive. To reduce costs, PCBs are being made with only four total layers separated by dielectric material. Conductive traces in PCBs can have the problem of common mode current flowing through the traces and thus increasing the magnitude of EMI noise. By providing a shielded three-layer patterned ground structure, not only is the cost reduced, but so is the common mode current and the magnitude of EMI noise, all without any negative impact to the differential signal. |
| US09786326B2 |
Method and device of playing multimedia and medium
The present disclosure relates to a method and a device for playing multimedia. The method may comprise: obtaining at least one of audio data and subtitle data of a first preset time length before a pause position of a multimedia; determining a starting position of a complete semantic statement according to at least one of the audio data and the subtitle data; and continuing to play the multimedia according to the starting position when an instruction of continuing to play the multimedia is detected or a condition of continuing to play the multimedia is met. |
| US09786325B2 |
System for visualizing data
A system for visualizing data includes storage means, and a video source arranged for dividing first data to be visualized in one or more banner areas in a plurality of chunks and arranged for outputting the plurality of chunks of the first data to be displayed and for outputting second data to be visualized as a background. A display for visualizing the first and second data is adapted for having information scrolling in the banner areas of the display. A scroll engine is arranged for receiving the first and second data from the video source, and for grabbing chunks of the first data of the plurality of chunks and for storing the grabbed chunks in the storage means. The scroll engine comprises multiplexing means for multiplexing the second data with stored chunks of the first data, and is arranged for forwarding the multiplexed first and second data to the display. |
| US09786323B2 |
Information processing device, information processing method, and program
An information processing device includes: a recording unit that records a flag representing that actual state information as an actual state of contents, which is referred to by reproduction information, is referred to by other reproduction information; a search unit that searches for the actual state information that is deletable by using the flag, in a case where deletion of the reproduction information is instructed; and a deletion unit that deletes the reproduction information of an object to be deleted and the deletable actual state information, in a case where the deletion of the reproduction information is instructed. |
| US09786320B2 |
Systems and methods for missed media sector alignment
A system includes a first sync mark detector circuit operable to apply a first sync mark detection algorithm to search a received media sector and overhead for a second sync mark after a failure to identify a first sync mark. A second sync mark detector circuit operable to apply a second sync mark detection algorithm to search the received media sector and overhead for the second sync mark. An anchor point identification circuit identifies an anchor point in the received media sector. A retry controller circuit causes a re-read of the received media sector and overhead when the first sync mark detector circuit fails to identify the first sync mark, and aligns the received media sector to yield an aligned media sector. A data processing circuit recovers an original user data set from the aligned media sector. |
| US09786318B2 |
Encoding data
Data can be encoded in physical medium and represented by shapes having many various physical attributes. In various examples, data points are encoded and represented by the physical shape, color, size, and/or structure of objects. In one embodiment, holes in memory surface substrates represent data. Various attributes of such holes, including depth, profile size, profile shape, and/or angle can represent data. |
| US09786317B2 |
Recording apparatus and method of controlling recording apparatus
A recording apparatus including: a recording unit configured to record on a recording medium a file that includes sequentially obtained data; a repair unit configured to repair a predetermined file that needs to be repaired out of files recorded on the recording medium; and a control unit configured to control the recording unit so that recording of data is stopped in response to a drop of a free capacity of the recording medium to a predetermined capacity during recording of the data, the control unit being configured to determine the predetermined capacity based on a data amount necessary to repair the predetermined file that is recorded on the recording medium, to thereby control the recording unit so that the recording of the data is stopped in response to a drop of the free capacity of the recording medium to the predetermined capacity during the recording of the data. |
| US09786313B2 |
Optical-information recording/reproducing apparatus and optical-information recording/reproducing method
An optical-information recording/reproducing apparatus of the present invention is capable of carrying out position detection of a reproduction image even if reproduction image data with incomplete alignment marks (markers) is obtained. A relative correlation value is calculated from a first correlation value retained by a first correlation-value retaining unit and a second correlation value retained by a second correlation-value retaining unit, and pass/fail of a position detection result of the marker is judged according to the relative correlation value. The pass/fail of the position detection result is judged by mutually comparing the detection positions of the markers judged as passes by the relative correlation-value judgement, the positions of the markers judged as fail by the relative correlation-value judgement or the mutual position judgement is complemented, and the position of two-dimensional data is detected based on the pass-judged markers and the complemented markers. |
| US09786310B1 |
Data storage device detecting lasing threshold of laser by measuring protrusion effect
A data storage device is disclosed comprising a head actuated over a disk, wherein the head comprises a laser configured to heat the disk while writing data to the disk. At least four different laser powers are applied to the laser and a fly height of the head over the disk is measured at each laser power. A lasing threshold power for the laser is detected based on the measured fly heights. |
| US09786308B1 |
Interconnect interposer attachable to a trailing edge of a slider
A slider of a magnetic recording head comprises a media-facing surface, an upper surface opposing the media-facing surface, a leading edge, and a trailing edge. A plurality of electrical bond pads is disposed in a spaced-apart relationship on the trailing edge of the slider. An interconnect interposer is connected to the trailing edge of the slider. The interposer comprises a back side comprising a plurality of electrical contacts in contact with the plurality of bond pads on the trailing edge of the slider. The interposer also comprises a front side comprising a plurality of electrical interposer pads corresponding in number to the plurality of electrical contacts on the back side. The interposer further comprises a plurality of conductors each of which electrically couples one of the plurality of electrical contacts on the back side with one of the plurality of interposer pads on the front side. |
| US09786307B2 |
Gimbal assembly with a gold tongue/dimple interface and methods of making the same
A gimbal assembly of a single or dual stage actuator is provided with gold at a tongue/dimple interface where a dimple of a supporting loadbeam contacts a tongue on the gimbal assembly. Using gold at the tongue/dimple interface greatly reduces the amount of wear particles formed during assembly and operation of the microactuator. The tongue may include a gold coating on the tongue at the tongue/dimple interface, or the tongue may have a hole etched in a stainless steel layer at the tongue/dimple interface to expose a gold layer disposed below the stainless steel layer. The tongue portion of the tongue/dimple interface may also be formed from a gold-coated copper pad with a polymer coating over the gold. |
| US09786304B1 |
Method for providing heat assisted magnetic recording write apparatus having a near-field transducer with a sloped nose
A method for fabricating a near-field transducer (NFT) for a heat assisted magnetic recording (HAMR) write apparatus is described. The HAMR write apparatus is coupled with a laser for providing energy and has a media-facing surface (MFS) configured to reside in proximity to a media during use. The method includes providing a stack on an underlayer. The stack includes an endpoint detection layer, an optical layer and an etchable layer. The optical layer is between the etchable and endpoint detection layers. The etchable layer is patterned to form a mask. A portion of the optical layer is removed. A remaining portion of the optical layer has a bevel at a bevel angle from the MFS location. The bevel angle is nonzero and acute. The NFT is provided such that the NFT has an NFT front surface adjoining the bevel and at the bevel angle from the MFS location. |
| US09786301B1 |
Apparatuses and methods for providing thin shields in a multiple sensor array
Apparatuses and methods for providing thin shields in a multiple sensor array are provided. One such apparatus is a magnetic read transducer including a first read sensor, a second read sensor, and a shield assembly positioned between the first read sensor and the second read sensor at an air bearing surface (ABS) of the magnetic read transducer, the shield assembly including a first shield layer assembly having a first footprint with a first area, and a second shield layer assembly having a second footprint with a second area, where the second area is greater than the first area. |
| US09786299B2 |
Emotion type classification for interactive dialog system
Techniques for selecting an emotion type code associated with semantic content in an interactive dialog system. In an aspect, fact or profile inputs are provided to an emotion classification algorithm, which selects an emotion type based on the specific combination of fact or profile inputs. The emotion classification algorithm may be rules-based or derived from machine learning. A previous user input may be further specified as input to the emotion classification algorithm. The techniques are especially applicable in mobile communications devices such as smartphones, wherein the fact or profile inputs may be derived from usage of the diverse function set of the device, including online access, text or voice communications, scheduling functions, etc. |
| US09786298B1 |
Audio fingerprinting based on audio energy characteristics
Audio fingerprinting includes obtaining audio samples of a piece of audio, generating frequency representations of the audio samples, identifying increasing and decreasing energy regions in frequency bands of the frequency representations, and generating hashes of features of the piece of audio. Each hash of features corresponds to portions of the identified energy regions appearing in a respective time window. Each feature is defined as a numeric value that encodes information representing: a frequency band of an energy region appearing in the respective time window, whether the energy region appearing in the respective time window is an increasing energy region or whether the energy region appearing in the respective time window is a decreasing energy region, and a placement of the energy region appearing in the respective time window. |
| US09786297B2 |
Identification by sound data
Technologies are generally described for systems, devices and methods effective to identify an individual. In some examples, a microphone may receive sound data such as sound that may be present in a mall. A processor, that may be in communication with the microphone, may determine a name from the sound data. Stated differently, the processor may determine that the name is part of or included in the sound data. The processor may generate a query based on the name and may send the query to a social network database. The processor may receive a response to the query from the social network database and may identify the individual based on the response. |
| US09786294B1 |
Visual indication of an operational state
This disclosure describes architectures and techniques to visually indicate an operational state of an electronic device. In some instances, the electronic device comprises a voice-controlled device configured to interact with a user through voice input and visual output. The voice-controlled device may be positioned in a home environment, such as on a table in a room. The user may interact with the voice-controlled device through speech and the voice-controlled device may perform operations requested by the speech. As the voice-controlled device enters different operational states while interacting with the user, one or more lights of the voice-controlled device may be illuminated to indicate the different operational states. |
| US09786293B2 |
Signal coding and decoding methods and devices
In a signal coding method, bits for coding allocated to different bands of a frequency domain signal obtained from an input signal are adjusted to improve the coding quality. The total available bits for coding are first allocated to the bands of the frequency domain signal according to a predetermined allocation rule. The numbers of bits allocated to the respective bands of the frequency domain signal are then adjusted when a highest frequency of the frequency domain signal to which bits are allocated is greater than a predetermined value. The frequency domain signal is coded according to the adjusted bit allocation for the bands of the frequency domain signal. |
| US09786284B2 |
Dual-band speech encoding and estimating a narrowband speech feature from a wideband speech feature
This document describes various techniques for dual-band speech encoding. In some embodiments, a first type of speech feature is received from a remote entity, an estimate of a second type of speech feature is determined based on the first type of speech feature, the estimate of the second type of speech feature is provided to a speech recognizer, speech-recognition results based on the estimate of the second type of speech feature are received from the speech recognizer, and the speech-recognition results are transmitted to the remote entity. |
| US09786277B2 |
System and method for eliciting open-ended natural language responses to questions to train natural language processors
Systems and methods gathering text commands in response to a command context using a first crowdsourced are discussed herein. A command context for a natural language processing system may be identified, where the command context is associated with a command context condition to provide commands to the natural language processing system. One or more command creators associated with one or more command creation devices may be selected. A first application one the one or more command creation devices may be configured to display command creation instructions for each of the one or more command creators to provide text commands that satisfy the command context, and to display a field for capturing a user-generated text entry to satisfy the command creation condition in accordance with the command creation instructions. Systems and methods for reviewing the text commands using second and crowdsourced jobs are also presented herein. |
| US09786272B2 |
Decoder for searching a digraph and generating a lattice, decoding method, and computer program product
According to an embodiment, a decoder includes a token operating unit, a node adder, and a connection detector. The token operating unit is configured to, every time a signal or a feature is input, propagate each of a plurality of tokens, which is an object assigned with a state of the of a path being searched, according to a digraph until a state or a transition assigned with a non-empty input symbol is reached. The node adder is configured to, in each instance of token propagating, add, in a lattice, a node corresponding to a state assigned to each of the plurality of tokens. The connection detector is configured to refer to the digraph and detect a node that is connected to a node added in an i-th instance in the lattice and that is added in an i+1-th instance in the lattice. |
| US09786270B2 |
Generating acoustic models
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for generating acoustic models. In some implementations, a first neural network trained as an acoustic model using the connectionist temporal classification algorithm is obtained. Output distributions from the first neural network are obtained for an utterance. A second neural network is trained as an acoustic model using the output distributions produced by the first neural network as output targets for the second neural network. An automated speech recognizer configured to use the trained second neural network is provided. |
| US09786268B1 |
Media files in voice-based social media
An apparatus, method and computer program for inserting information into a conversation between two or more devices is provided. In one embodiment, speech data is received at a device. The speech data is analyzed and converted into text utilizing one or more speech-to-text algorithms. The text is examined to locate information that may be related to the text on the data network. |
| US09786267B2 |
Method and apparatus for recording and playing user voice in mobile terminal by synchronizing with text
A method and an apparatus for recording and playing a user voice in a mobile terminal are provided. The method for recording and storing a user voice in a mobile terminal includes entering a page by executing an electronic book, identifying whether a user voice record file related to the page exists, generating a user voice record file related to the page by recording a text included in the page to a user voice if the user voice record file does not exist, and playing by synchronizing the user voice stored in the user voice record file with the text if the user voice record file exists. Accordingly, a user voice can be recorded corresponding to a text of a page when recording a specific record of an electronic book, and the text corresponding to the user voice being played can be highlighted by synchronizing the user voice and the text. |
| US09786264B2 |
Ambient noise reduction arrangements
A feedforward ambient noise reduction arrangement includes, within a housing, a loudspeaker device for directing sound energy into an ear of a listener. Disposed externally of the housing, and positioned to sense ambient noise on its way to the listener's ear, are plural microphone devices capable of converting the sensed ambient noise into electrical signals for application to the loudspeaker to generate an acoustic signal opposing the ambient noise. Importantly, the overall arrangement is such that the acoustic signal is generated by said loudspeaker means in substantial time alignment with the arrival of said ambient noise at the listener's ear. |
| US09786262B2 |
Programmable noise reducing, deadening, and cancelation devices, systems and methods
A noise cancelation device that programs, records, and saves sounds and noises and their respective sound waves, inverts them, and broadcasts the inverted sound waves, thereby reducing, deadening, canceling, or eliminating, the original sounds and noises, and their respective sound waves. Further, the noise cancelation device can save sounds and noises that have a constant, predictable, steady, and recognizable sound quality and their respective sound waves, and preprogram the respective inverted sound waves, which allows for the noise cancelation device to broadcast the preprogrammed inverted sound waves through speakers to reduce, deaden, or cancel the original sounds and noise when they are present. The noise cancelation device is portable and may be used in any location desired, or the noise cancelation device may be is fixed in its location. |
| US09786258B2 |
Apparatus including an instrument holder
In some embodiments, an apparatus may include a hanging element and a frame coupled to the hanging element. The frame may include a shoulder portion and a load-bearing crossbeam coupled to the shoulder portion. The load-bearing crossbeam may include a collar at a center of the load-bearing crossbeam. The collar may be sized to releasably secure a portion of an instrument. In some embodiments, the instrument may be a musical instrument, a tool, or a firearm. |
| US09786252B2 |
Method and apparatus for suppressing background light in time of flight sensor
A background light suppression apparatus and method capable of suppressing influences of background light in a depth sensor includes measuring output signals of sub pixels for a sub integration time shorter than a frame integration time; and integrating differences between the output signals after the sub integration time. |
| US09786249B2 |
Frame timing
A display system includes a processor coupled to receive image data from an image source and a frame timing circuit. The processor is coupled to output the image data and first sync signals, where each one of the first sync signals is output after M number of pixel values of the image data are output from the processor. The frame timing circuit is coupled to the processor to receive the image data and the first sync signals. The frame timing circuit is coupled to output X number of pixel values of the image data and second sync signals to a display, where the X number of pixel values is an integer multiple of the M number of pixel values of the image data. Each one of the second sync signals is output after X number of pixel values of the image data are output from the frame timing circuit. |
| US09786246B2 |
Apparatus for hands-free augmented reality viewing
An apparatus for viewing augmented reality images in a hands-free manner includes a tracker base in which various interchangeable trackers may be placed. The interchangeable trackers include an image specialized to an application framework running on a device with an image capture device in range of the image. An arm connects to and extends from the tracker base, and includes a clasp for holding the device. With the augmented reality application running, the device provides a display of the augmented reality images associated with the image on the interchangeable tracker in a hands-free manner. The tracker base spins, providing different viewpoints of the augmented reality images. The tracking element and the image capture device are held in a fixed spatial relationship with respect to one another, resulting in a stable image. The apparatus provides interactions in a multi-system environment by invoking commands between the device and an external multimedia component. |
| US09786236B2 |
Liquid crystal panels and the driving methods thereof
A liquid crystal panel and the driving method thereof are disclosed. The liquid crystal panel includes at least one storage electrode, a plurality of scanning lines, a plurality of data lines, and a plurality of pixel areas. Each of the pixel areas includes a pixel electrode, a first TFT and a second TFT. The first TFT drives the corresponding pixel electrode. The gate of the second TFT connects with the previous scanning line, and one of the source and the drain of the second TFT connects to the corresponding pixel electrode within the pixel area, and the other one connects with the storage electrode. In this way, the optimal common voltage is applied to the liquid crystal panel when the liquid crystal panel is in a displaying process, and thus the display performance is guaranteed. |
| US09786230B2 |
Device for projecting an image
According to the present invention there is provided a projection device, which is configured to project an image which is co-operable with images projected by one or more other projection devices, wherein the projection device comprises a detector operable to detect characteristics of images projected on a display surface by the projection device and one or more other projection devices, and a controller operable to adjust the projection device and/or to adjust one or more of the other projection devices, based on the characteristics of the images detected by the detector, such that the images projected by each projection device co-operate on the display surfaces. |
| US09786229B2 |
Flexible display device and method for fabricating the same
Provided is a flexible display device including: a display region including pixels to display images, each pixel including an organic light emitting diode (OLED) configured to receive a signal from a signal line and power from a power line to display the images; a non-display region outside the display region where images are not to be displayed, the non-display region including: a circuit mount region including therein a driving circuit configured to supply the signal through the signal line and the power through the power line to each pixel; and a bending region formed between the display region and the circuit mount region and configured to be bent flexibly, wherein the signal line and the power line are formed on a same layer in the bending region. |
| US09786228B2 |
Shift register unit and control method thereof, gate driving circuit, and display device
A shift register unit and a control method thereof, a gate driving circuit, and a display device. The shift register unit includes a signal input module, connected to a signal input terminal, a first clock signal terminal and a control node; a pull-down module, connected to the control node, a first voltage terminal and a signal output terminal; a first pull-up control module, connected to the control node, the pull-up module and a second voltage terminal; a second pull-up control module, connected to the control node, the pull-up module, the first clock signal terminal, the first voltage terminal and a second clock signal terminal; and a pull-up module, connected to the signal output terminal and the second voltage terminal. The problem that it is difficult to realize a narrow display frame by the bonding process due to size increase of the driving circuit can be solved. |
| US09786227B2 |
Organic light emitting display device and driving method thereof
An organic light emitting display device includes: pixels at crossing regions of scan lines and data lines; i (i is a natural number of 2 or more) blocks divided such that each of the blocks includes two or more scan lines; a control driver configured to supply a first control signal to i first control lines coupled, respectively, to the i blocks, and to supply a second control signal to i second control lines coupled, respectively, to the i blocks; a scan driver configured to supply a scan signal to the scan lines; and a data driver configured to supply a data signal to the data lines, wherein the scan driver is configured to supply the scan signals on a block-by-block basis, a sequence of supplying the scan signals being supplied alternately in a first direction and a second direction that is different from the first direction. |
| US09786226B2 |
Display panel module, organic light-emitting diode (OLED) display and method of driving the same
A display panel module, organic light-emitting diode (OLED) display and method of driving the same are disclosed. In one aspect, the module includes a display panel divided into a first portion and a second portion and a plurality of scan and data lines divided into groups arranged in the first and second potions. The module further includes a first scan driver configured to sequentially apply scan signals to each of the first and second scan line groups. The first scan driver is further configured to substantially simultaneously apply the scan signals to corresponding scan lines of the first and second scan line groups. The module also includes a first data driver configured to output first data voltages to the first data line group and a second data driver configured to output second data voltages to the second data line group with the same timing as the first data driver. |
| US09786225B2 |
Organic light emitting diode display
An organic light emitting diode display with improved aperture ratio includes: a substrate; first and second pixels disposed in a first row of the substrate and third and fourth pixels disposed in a second row adjacent to the first row and respectively disposed in the same columns as the first and second pixels; a scan line and a previous scan line applying a scan signal and a previous scan signal, respectively, to the pixel units; a data line and a driving voltage line applying a data signal and a driving voltage, respectively, to the pixel units; and a common initialization voltage line disposed between the first and second pixels and between the third and fourth pixels, commonly connected to the pixel units, and applying an initialization voltage. One common initialization contact hole connected to all pixels units and one initialization voltage line connected to the common initialization contact hole are surrounded by the pixel units. |
| US09786224B2 |
Organic light emitting diode display
An organic light emitting diode display includes: a substrate; a scan line, a first emission control line, and a second emission control line on the substrate; a data line and a driving voltage line crossing the scan line; a switching transistor connected to the scan line and the data line and including a switching drain electrode; a driving transistor including a driving source electrode connected to the switching drain electrode; an organic light emitting diode electrically connected to a driving drain electrode of the driving transistor; an operation control transistor to transmit a driving voltage to the driving transistor; and a first emission control transistor and second emission control transistor to transmit the driving voltage from the driving transistor to the organic light emitting diode, wherein the first emission control line and the second emission control line partially overlap each other. |
| US09786223B2 |
Pixel circuits for AMOLED displays
A system is provided for controlling an array of pixels in a display in which each pixel includes a light-emitting device and a reference voltage source that controllably supplies a reference voltage having a magnitude that turns off the light-emitting device. While the reference voltage is coupled to a drive transistor, a control voltage is supplied to the gate of the drive transistor to cause the drive transistor to transfer to a node common to the drive transistor and the light-emitting device, a voltage that is a function of the threshold voltage and mobility of the drive transistor. During an emission cycle, the current conveyed through the light emitting device via the drive transistor is controlled by a voltage stored in the storage capacitor, which is a function of the threshold voltage and mobility of the drive transistor so that the current supplied to the light-emitting device remains stable. |
| US09786222B2 |
Pixel circuit and organic light-emitting diode display including the same
A pixel circuit and an OLED display including the same are disclosed. The pixel circuit includes a driving transistor having a double gate structure, the driving transistor including a first gate electrode electrically connected to a first node, a second gate electrode electrically connected to a second node, a first electrode electrically connected to a first power supply voltage, and a second electrode electrically connected to the anode of the OLED. The pixel circuit also includes a switching transistor including a gate electrode configured to receive a scan signal, a first electrode configured to receive a data voltage, and a second electrode electrically connected to the first node. The pixel circuit further includes a storage capacitor and a compensation capacitor including a first electrode electrically connected to the second node and a second electrode electrically connected to the first electrode of the driving transistor. |
| US09786218B2 |
Organic light emitting display device including voltage supply units
An organic light emitting display device includes a pixel unit, a first voltage supply unit, a second voltage supply unit, and a selection unit. The pixel unit includes a plurality of pixels coupled to power lines. The first voltage supply unit is configured to output a first voltage. The second voltage supply unit is configured to output a second voltage. The selection unit is configured to supply any one of the first and second voltages to the pixels through the power lines. |
| US09786216B2 |
Display apparatus, light-emitting device, and control method of display apparatus
To reduce the occurrence of flicker in an image with almost no movement and reduce the occurrence motion blur in an image with movement, an image processing apparatus detects movement information from acquired image data. The image processing apparatus causes a display unit to perform first light emission to display a first frame, and also causes the display unit to perform second light emission to display a second frame, the first frame and the second frame corresponding to one frame of the acquired image data. The image processing apparatus controls at least either light emission time periods of the first light emission and the second light emission or light emission luminances of the first light emission and the second light emission based on the movement information. |
| US09786214B2 |
Liquid crystal panel and pixel unit setting method thereof
Disclosed is a pixel unit setting method for a liquid crystal panel. The liquid crystal panel includes a plurality of pixel units, each of which includes at least a blue sub pixel. The method includes dividing the blue sub pixel into a main pixel zone and a sub pixel zone with the area ratio therebetween being a:b; acquiring actual brightness levels of the blue sub pixel for each grey level at a normal view angle and an oblique view angle; setting a combination of grey levels to be fed to the main and sub pixel zones of one pixel unit so as to have the sum of differences between the actual and theoretical brightness levels at the normal and oblique view angles minimized so as to obtain the grey levels to be fed to the main and sub pixel zones for all the grey levels of the pixel unit. |
| US09786207B2 |
Foldable display apparatus
Embodiments relate to a foldable display apparatus including a hinge providing supporting for a bending area of a flexible display panel. The flexible display panel includes a first flat display area and a second flat display area at both sides of a bending display area. A first rear cover provides support for the first flat display area and has a first edge. A second rear cover provides support for the second flat display area and has having a second edge facing the first edge and parallel to the first edge. The hinge includes rear hinge covers longitudinally extending parallel to the first edge and the second edge, and elastic axis members coupling the plurality of rear hinge covers in an interlocking and rotatable manner. The elastic axis members are deformed as the rear hinge covers make a relative movement by bending of the hinge. |
| US09786202B2 |
Robot assisted surgical training
A surgical training system and method. The system comprises means for recording reference data representing a reference manipulation of a computer generated model of an object by a master user; means for physically guiding a trainee user based on the recorded reference data during a training manipulation of the model of the object by the trainee user; and means for recording assessment data representing an assessment manipulation of the model of the object by the trainee user without guidance. |
| US09786198B2 |
Method and device for simulating an electrode welding process
The invention relates to a method and a device (1) for simulating an electrode welding process having an electrode holder simulator (2) and a simulated electrode (3) arranged thereon, a simulated workpiece (4), an input device (6), an output device (7) and a control device (10). For the ideal training of an electrode welding process under conditions as real as possible, the control device (10) is connected to a memory (11) for storing parameters (Pi) of an ideal motion of the electrode holder simulator (2) during an ignition process and is designed for detecting the parameters (Pr) during an actual motion of the electrode holder simulator (2) and comparing them to the stored parameters (Pi) of the ideal motion of the electrode holder simulator during an ignition process and displaying the deviations between the parameters (Pr) of the actual motion and the parameters (Pi) of the ideal motion in the output device (7). |
| US09786197B2 |
Using cloud-based data to facilitate enhancing performance in connection with an industrial automation system
A cloud-based performance enhancement service captures and collects data relating to interactions of users with industrial automation systems of multiple industrial customers for storage and analysis on a cloud platform. The service employs a performance enhancement component that analyzes the data to facilitate determining correlations between certain user interactions and favorable performance of an industrial automation system, determining user interactions that are less favorable or unsafe, determining alternative actions that a user can take to achieve a same or similar preferred operational result, generating recommendations relating to the alternative actions, determining or designing components or techniques that can automate a preferred user action, determining improved user assignments in connection with the industrial automation system, and/or generating training modules or presentations based on preferred user actions that can be used to train users to more efficiently interact with an industrial automation system to achieve improved system performance. |
| US09786192B2 |
Assessing driver readiness for transition between operational modes of an autonomous vehicle
An autonomous vehicle can transition between operational modes. The readiness of a vehicle driver for a transition can be assessed, particularly when transitioning from a first operational mode to a second operational mode that has a greater degree of manual involvement than the first operational mode. It can be determined whether an operational mode transition event has occurred while the vehicle is operating in the first operational mode. Responsive to determining that an operational mode transition event has occurred, an audial sample from a vehicle driver can be collected. It can be determined whether the vehicle driver is ready or non-ready to provide the greater degree of manual involvement for the second operational mode based on the collected audial sample. |
| US09786191B2 |
Emission of a commencement sound and a conclusion sound
Various embodiments associated with a commencement sound and a conclusion sound are described. The commencement sound can be a firing sound, such as a sound of a bullet exiting a rifle. The conclusion sound can be an impact sound, such as a sound of the bullet impacting a concrete wall. These sounds can replicate what it sounds like to have an experience around someone without actually subjecting that person to the experience. |
| US09786190B2 |
Simulation device having replaceable sensory module
The present invention relates to a simulation device having a replaceable sensory module, which comprises: a first platform for performing a translational motion with reference to a first three-dimensional coordinate axis; a second platform which is coupled to the first platform and performs a rotational motion with reference to at least one axis among second three-dimensional coordinate axes; and a sensory module coupled to the second platform and arranged to support a user to enable the user to sense a motion provided by the first and second platforms. |
| US09786188B2 |
Safety motor controller for a vehicle
According to various embodiments, there is provided a safety motor controller (SMC) for installing in an unmanned aerial vehicle (UAV) between at least one electronic speed controller (ESC) configured to use a predetermined data protocol and an existing motor controller (EMC) configured to transmit EMC motor control signals in accordance with the predetermined data protocol to the at least one ESC, the SMC including: an input port configured to receive the EMC motor control signals in accordance with the predetermined data protocol from the EMC; and a processor configured to detect a trigger event and to transmit SMC motor control signals corresponding to at least one of the EMC motor control signals in accordance with the predetermined data protocol to the at least one ESC in response to the trigger event. |
| US09786187B1 |
Transportation network utilizing autonomous vehicles for transporting items
A transportation network is provided that utilizes autonomous vehicles (e.g., unmanned aerial vehicles) for identifying, acquiring, and transporting items between network locations without requiring human interaction. A travel path for an item through the transportation network may include a passing of the item from one autonomous vehicle to another or otherwise utilizing different autonomous vehicles for transporting the item along different path segments (e.g., between different network locations). Different possible travel paths through the transportation network may be evaluated, and a travel path for an item may be selected based on transportation factors such as travel time, cost, safety, etc., which may include consideration of information regarding current conditions (e.g., related to network congestion, inclement weather, etc.). Autonomous vehicles of different sizes, carrying capacities, travel ranges, travel speeds, etc. may be utilized for further improving the flexibility and efficiency of the system for transporting items. |
| US09786182B2 |
Driving vehicles in convoy
A method is implemented by computer for the management of a convoy comprising at least two vehicles, each of the at least two vehicles comprising satellite positioning means and vehicle-to-vehicle communication means, the method comprising the determination of the relative positioning of the vehicles, the determination comprising the measurement of the propagation time of a signal between vehicles by the communication means, the clocks associated with the communication means being synchronized via satellite positioning means at a reference clock time. Developments comprise the communication between the vehicles of various data (e.g. measurement uncertainties, signal-to-noise ratios, residual values), the determination of absolute locations, the use of an SBAS-type system, the use of differential GPS, the use of Doppler measurements for the turns or even the exclusion of a failing satellite. A computer program product and associated systems are described. |
| US09786181B2 |
Autonomous vehicle and control method thereof
Autonomous diesel vehicles and control methods thereof are disclosed. An autonomous vehicle may include a peripheral information collecting unit configured to collect peripheral information necessary for autonomous travelling through an image camera and a laser scanner, a main control unit configured to control the autonomous travelling with reference to the peripheral information collected by the peripheral information collecting unit, a passenger monitoring unit configured to check whether a passenger exists inside the vehicle through a sensor and transmit a result of the check to the main control unit, and an engine control unit configured to control driving of an engine and injection of fuel of an injector according to a control instruction of the main control unit. When the passenger is inside the vehicle, the main control unit performs a pilot injection control, and when the passenger is not inside the vehicle, the main control unit omits the pilot injection control. |
| US09786180B2 |
Position information transmission apparatus, position information transmission system, and vehicle
A navigation device serving as a position information transmission apparatus for transmitting position information about a vehicle to a position information service center includes a terminal ECU that is authorized to log in to the position information service center via networks. The terminal ECU is configured to, in a logged-in state to the position information service center, transmit the position information about the vehicle to the position information service center on condition that a predetermined operation has been performed. |
| US09786171B2 |
Systems and methods for detecting and distributing hazard data by a vehicle
A system for transmitting data corresponding to hazards from a first vehicle to a second vehicle includes a first sensor for detecting first hazard data corresponding to a potential hazard and a second sensor, being of a different type than the first sensor, for detecting second hazard data corresponding to the potential hazard. The system also includes a network access device for receiving and transmitting signals and an electronic control unit (ECU) that is coupled to the first sensor, the second sensor and the network access device. The ECU determines whether the potential hazard exists based on the first and second hazard data. The ECU also determines a category corresponding to the potential hazard. The ECU also instructs the network access device to transmit potential hazard data corresponding to the potential hazard to the second vehicle when the category is a first category. |
| US09786170B2 |
In-vehicle notification presentation scheduling
Embodiments are disclosed for scheduling and presenting notifications, via an in-vehicle computing system, to a driver of a vehicle. In some embodiments, a method for an in-vehicle computing system includes receiving data regarding a notification for presentation to a driver of a vehicle. The method further includes, based on a driver profile, adjusting a timing of presenting the notification to the driver via the in-vehicle computing system, wherein the driver profile is generated based on past driving behavior associated with the driver. |
| US09786168B2 |
System, method, and apparatus for providing road separation and traffic safety
A system includes a display layer disposed beneath one or more layers of a road that is configured to output light to illuminate an upper surface of the road. One or more vertical cylindrical voids extend from the display layer to the upper surface of the road providing a path for the light from the display layer to reach the upper surface of the road. Circuitry is configured to determine a traffic scheme for the road based on traffic data received from one or more sources. Control signals are issued to the display layer to control illumination of the upper surface of the road in accordance with the traffic scheme. Traffic scheme-specific values are output to a smart vehicle corresponding to one or more smart vehicle algorithms. |
| US09786164B2 |
Automated camera response in a surveillance architecture
A detection and response device for a surveillance system detects events, responds to events, or both. The detection and response device may be used with or provided by a variety of surveillance systems, including peer to peer surveillance architectures. The device may utilize one or more defined geospaces. If an event occurs in a geospace a predefined response may then be provided. The predefined response may include automatically targeting one or more cameras to areas relevant to the event and presenting one or more predefined views optimized for viewing the event. If an event does not occur within a geospace, the detection and response device may provide one or more default responses. |
| US09786161B2 |
Methods and systems for estimating road traffic
Disclosed are systems and methods for estimating road traffic in a road segment at a given time. The system comprising: a central server; and at least one of one or more mobile communication units installed in a vehicle passing the road segment at the given time, wherein each of the mobile communication unit is capable of sending a plurality of mobile spot values to the central server, and one or more fixed communication units installed for detecting wireless enabled objects in vehicles passing the road segment at the given time, wherein each of the fixed communication unit is capable of sending a plurality of detected spot values to the central server. The central server is capable of processing the at least one of the plurality of mobile spot values and the plurality of detected spot values to estimate road traffic in the road segment at the given time. |
| US09786156B2 |
Detecting destruction of an automation system component
A control panel is used to monitor events within a security system or other automation system. In the event an intruder enters a physical location, the intruder may attempt to damage the control panel to disrupt its operation. One or more sensors of the control panel may detect disruption in the operation of the control panel. Example sensors may detect an impact force, sudden acceleration, removal from a mounted location, or disruption of communication with an input/output element, such as a display device. When an event is detected at the control panel itself, the control panel can send a signal to a remote service provider, and the remote service provider can follow-up with the customer. The control panel and/or remote service provider may also determine when the control panel loses partial or complete power loss to identify the disruption as a potential crash-and-smash entry. |
| US09786155B2 |
Employing offsets to create multiple orthogonal channel sequences in frequency hopping systems
A system is provided that includes a control panel of a security system, a memory of the security system having a reference frequency hopping pattern and a reference frequency offset saved therein, a plurality of wireless threat sensors that communicate with the control panel using the reference frequency hopping pattern and a fixed frequency offset for each frequency and each hop of the reference frequency hop pattern, wherein the fixed frequency offset is an integer multiple of the reference frequency offset, and a processor of the security system that detects any nearby security systems that use the reference frequency hopping pattern, determines the integer multiple of the reference frequency offset used by each of the nearby security systems, and sets the fixed frequency offset used by the plurality of sensors at a selected integer multiple of the reference frequency offset that is not used by any nearby security system. |
| US09786148B2 |
Devices, systems, and methods for health monitoring using circumferential changes of a body portion
Devices, systems, and methods for monitoring health parameters of an individual, including circumferential changes to a portion of the individual's body, are provided herein. A monitoring device includes: a stretchable component configured to fit securely around a body portion, and a sensor module coupled thereto. The sensor module is configured to obtain and transmit a circumference measurement of the body portion. The sensor module may be further configured to obtain and transmit measurements of one or more additional parameters. A related monitoring system includes the described monitoring device and a mobile computing device. The mobile computing device is configured, at least in part, to: process the circumference measurements to identify and analyze any change in circumference of the body portion, and generate a relevant alert output. Methods performed by the various devices and systems are also provided. |
| US09786147B2 |
Event processing device, event processing method, and event processing program
An event processing device includes: an event detection unit that, when received data satisfies predetermined conditions, detects the data as an event; a data storage unit that, irrespective of the event detection result, stores data received by the event detection unit; a relevance information definition storage unit that stores relevance information definitions that define the association between data; an integrated analysis unit that, when data is newly stored in the data storage unit, links the newly stored data with past data included in the past data stored in the data storage unit and the relationship of which with the newly stored data satisfies the relevance information definition; and an event display unit that displays the newly stored data and the past data linked with each other. |
| US09786146B2 |
Asset tracking device configured to selectively retain information during loss of communication
Devices and methods for generating locational and other pertinent information from a tracking device associated with an asset in need of tracking during a tracking event and for selectively retaining and deleting information stored during a loss of communication between the tracking device and a communication network, to increase probability of retaining information suitable for use as evidence in court or other proceedings in which accurate information is desired regarding the tracking event. |
| US09786144B2 |
Image processing device and method, image processing system, and image processing program
An image processing device includes: an entire image display control portion that performs control to display an entire image of a predetermined region in an entire image display window; and a cutout image display control portion that performs control to enlarge a plurality of tracking subjects included in the entire image and display the tracking subjects in a cutout image display window. The cutout image display control portion performs the control in such a manner that one cutout image including the tracking subjects is displayed in the cutout image display window in a case where relative distances among the tracking subjects are equal to or smaller than a predetermined value, and that two cutout images including the respective tracking subjects are displayed in the cutout image display window in a case where the relative distances among the tracking subjects are larger than the predetermined value. |
| US09786143B1 |
Apparatus and method for automated building security based on estimated occupancy
An apparatus for security control of a facility is provided, including devices, a network operations center (NOC), and control nodes. The devices are within the facility, each consuming a portion of a resource, and each performing a corresponding function when actuated. The NOC is external to the facility, and generates run time schedules, where the run time schedules coordinate actuation times for the each of the devices to maintain security for local security environments, and adjusts the run time schedules based upon occupancy levels generated by the NOC, where the occupancy levels are exclusively generated based on consumption of the resource and outside temperature. The control nodes are within the facility, each coupled to a corresponding one of the devices, where the control nodes are coupled together via a building security network that is operatively coupled to the NOC, control nodes execute selected run time schedules to actuate the devices. |
| US09786139B2 |
Programmable security sensor
A programmable barrier alarm includes a sensor, such as a magnetic field detector, for sensing a magnetic field produced by the magnet and for producing an electronic signal associated with the magnetic field, a processor, and, a memory for storing an alarm threshold value and processor-executable instructions that, when executed by the processor, cause the sensor to, in a calibration mode of operation, calculate the alarm threshold value based on a first magnetic field sensed by the magnetic field detector when the barrier is in the closed position, and in a normal mode of operation, compare the electronic signal from the magnetic field detector to the alarm threshold value, and generate an alarm signal if the electronic signal falls below the alarm threshold value. |
| US09786137B2 |
Security system providing a localized humanly-perceivable alert for identifying a facility to emergency personnel
The present disclosure relates to systems and methods for guiding emergency personnel to a location in a facility proximate to an alarm that has been generated. In one aspect, a method may include detecting an alarm condition at a facility protected by a security system and determining a location at the facility of the alarm condition. The method may further include causing at least one indicator at the facility, which is proximate to the determined location of the alarm condition, to generate an identifying alert that is humanly perceivable from an exterior of the facility such that emergency personnel can identify the facility based at least in part on the identifying alert. In some aspects, the method may also include notifying a security representative of the alarm condition, and receiving a notification from the security representative indicating that emergency personnel are dispatched to the facility. |
| US09786131B2 |
Method and apparatus for increasing potential payout opportunities in card games
Systems, apparatuses and methods for increasing potential payout opportunities using multiple card indicia representing multiple cards. One embodiment involves determining whether any one or more of a plurality of cards of a poker game having multiple poker hands are to be randomly provided with multiple card indicia representing multiple cards, presenting the plurality of cards of the poker hands, including the one or more of the plurality of cards determined to be randomly provided with multiple card indicia, and identifying a plurality of resulting hands for each of the multiple poker hands that include a multiple card indicia, where each of the plurality of resulting hands includes a different subset of a total of the indicia of the other cards in the respective poker hand and any cards provided with multiple card indicia. |
| US09786129B2 |
System and method for enhancing a game of chance
A gaming machine associates each position in a plurality of positions with one of a plurality of markers including at least a first marker and a second marker, identifies a plurality of patterns including at least one position of the plurality of positions, determines whether at least one pattern of the plurality of patterns satisfies a predetermined first threshold based on the first marker of the plurality of markers, and determines whether at least one pattern of the plurality of patterns satisfies the predetermined first threshold based on the second marker of the plurality of markers. |
| US09786123B2 |
Wireless gaming environment
A system employs a server computing system with an integrated database and wireless communications devices, for example, handheld personal digital assistants (PDAs). The server computing system may also communicate with fully automated data collection systems associated with some gaming tables and/or with the casino's legacy data collection systems and databases. The server computing system may communicate with various non-gaming related casino systems, such as point-of-sale terminals and/or accounting systems, related to the various guest facilities, for example, allowing player comps to be freely exchanged for services and merchandise. The wireless communications devices permit remote wagering. |
| US09786121B2 |
Interactive gaming among a plurality of players systems and methods
A system for interactive gaming among a plurality of players includes a host computer system and a plurality of player terminals communicably coupled to the host computer system via a network. The plurality of player terminals are located at a plurality of licensed gaming locations. The plurality of player terminals are configured to engage the plurality of players in a common interactive game operated by the host computer system. The plurality of player terminals include means for dispensing player winnings from the player terminal. |
| US09786120B2 |
Player specific network
Embodiments of the invention allow a player to have a unique gaming experience, different than other players, even when playing on the same network. A game may span several gaming sessions. States of a game, for example a bonus game, may be stored when the player decides to stop playing the game. When the player initiates a next gaming session, at the same or another location, the previous state of the game is re-loaded onto the gaming machine and the player returns to the previous state. Further, additional bonuses can be implemented because the network knows the identity and other information about the player. The additional bonuses may be unique to that player. Messages particular to a player are exchanged between a gaming device and a gaming network. |
| US09786114B2 |
Apparatus for controlling access to and use of portable electronic device
Various prison services are rendered more efficient by providing inmates access to portable electronic devices in a controlled and regulated manner. A dispenser is employed to control and monitor the checking out and return of portable electronic devices and to communicate with such devices during use by inmates to monitor inmate use and ensure the portable electronic devices are only used by inmates as authorized. |
| US09786113B2 |
Investigation generation in an observation and surveillance system
The present disclosure is directed to systems and methods for generating investigations of user behavior. In an example embodiment, the system includes a video camera configured to capture video of user activity, a video analytic module to perform real-time video processing of the captured video to generate non-video data from video, and a computer configured to receive the video and the non-video data from the video camera. The computer includes a video analytics module configured to analyze one of video and non-video data to identify occurrences of particular user behavior, and an investigation generation module configured to generate an investigation containing at least one video sequence of the particular user behavior. In some embodiments, the investigation is generated in near real time. The particular user behavior may be defined as an action, an inaction, a movement, a plurality of event occurrences, a temporal event and/or an externally-generated event. |
| US09786109B2 |
Use of a biphase code matched filter to receive protocols with code violations
In accordance with various example embodiments, a method of receiving a protocol in the receiver, wherein the legacy protocol includes non-biphase encoded information, decoding the legacy protocol using a biphase decoder to produce a detected code, and correlating the detected code with a known code to verify the non-biphase encoded information. |
| US09786107B2 |
Smart doorman
An automation system may include a smart doorman. The system may observe one or more guests to a residence, predict a user profile associated with the guest, and invite an administrator of the automation system to create the suggested profile of the guest. The system may store one or more biometric identifiers with a visitation pattern to determine if the guest requires a profile. In one embodiment, a method for security and/or automation systems may be described. The method may include detecting the presence of one or more guests at an entrance to a residence and comparing the presence of a guest to one or more profile parameters. A guest profile associated with the guest may be predicted based at least in part on the comparing. |
| US09786104B2 |
Systems and method to trigger vehicle events based on contextual information
This disclosure relates to a system and method for detecting vehicle events. Some or all of the system may be installed in a vehicle, operate at the vehicle, and/or be otherwise coupled with a vehicle. The system includes one or more sensors configured to generate output signals conveying information related to the vehicle. The system receives contextual information from a source external to the vehicle. The system detects a vehicle event based on the information conveyed by the output signals from the sensors and the received contextual information. |
| US09786094B2 |
Method and apparatus for creating a dimensional layer for an image file
Limitations of conventional dimensional printing techniques are addressed to provide features and flexibility not presently available, including extracting images selectively from a Postscript® or PDF file and thus enable texturing of individual images within a page; constructing the texture automatically directly from the image using image processing techniques; visualizing the texture to be applied to an image via construction of a bump map or normal map in openGL and DirectX®; adjusting texturing parameters via visual feedback in openGL and DirectX®; and inserting a clear texture back into a PDF file for printing automatically. |
| US09786090B2 |
System for colocating a touch screen and a virtual object, and device for manipulating virtual objects implementing such a system
A system (10) for displaying at least one virtual object includes a secondary screen (20) for displaying the virtual object, a primary screen (30), an optical element for overlaying images displayed on the secondary screen (20) with images displayed on the primary screen (30), and a pointing surface combined with the primary screen (30) for detecting the contact of one or more physical pointing elements. A device (90) for manipulating at least one virtual object includes calculation elements for generating images of the virtual object displayed on the system (10) from information output from the system (10) in accordance with the actions of the operator (100). |
| US09786087B1 |
Management of animation collisions
Systems, devices, and techniques are provided for management of animation collisions. An animation that may collide with another animation is represented with a sequence of one or more animation states, wherein each animation state in the sequence is associated with or otherwise corresponds to a portion of the animation. In order to manage animation collisions, a state machine can be configured to include a group of states that comprises animation states from a group of animations that may collide and states that can control implementation of an animation in response to an animation collision. In one aspect, a state machine manager can implement the group of states in order to implement an animation and manage animation collisions. |
| US09786085B2 |
Method and system for directly manipulating the constrained model of a computer-generated character
A rail manipulator indicates the possible range(s) of movement of a part of a computer-generated character in a computer animation system. The rail manipulator obtains a model of the computer-generated character. The model may be a skeleton structure of bones connected at joints. The interconnected bones may constrain the movements of one another. When an artist selects one of the bones for movement, the rail manipulator determines the range of movement of the selected bone. The determination may be based on the position and/or the ranges of movements of other bones in the skeleton structure. The range of movement is displayed on-screen to the artist, together with the computer-generated character. In this way, the rail manipulator directly communicates to the artist the degree to which a portion of the computer-generated character can be moved, in response to the artist's selection of the portion of the computer-generated character. |
| US09786079B2 |
Method and system for personalizing images rendered in scenes for personalized customer experience
Systems and methods are described for generating and using a flexible scene framework to render dynamically-generated content within contextual scenes to personalize a customer's web experience. |
| US09786078B2 |
Hybrid level set for interactive editing of matting and selection
In various implementations, methods and systems are disclosed for accurately selecting a targeted portion of a digital image. In one embodiment, a selection cursor having a central and a peripheral region is provided. The central region is used to force a selection or a deselection and therefore moving the central region over a portion of the image causes that portion of the image to be selected or deselected, respectively. The peripheral region of the cursor surrounds the central region and defines an area where a hybrid level set algorithm for both boundary detection and region definition, particularly a matting region, is performed. This provides highly accurate boundary detection and matting region selection within a narrowly-focused peripheral region and eliminates the need to subsequently designate a matting region and apply a matting algorithm to complex portions of an object selection. Thus moving the peripheral region of the selection cursor over a boundary of the targeted portion of the image applies the hybrid algorithm in that boundary region, increasing the likelihood that the boundary will be detected accurately, and further defining at least a matting region along the detected boundary for an even more refined selection. |
| US09786077B2 |
Unified image processing for combined images based on spatially co-located zones
A unified image processing algorithm results in better post-processing quality for combined images that are made up of multiple single-capture images. To ensure that each single-capture image is processed in the context of the entire combined image, the combined image is analyzed to determine portions of the image (referred to as “zones”) that should be processed with the same parameters for various image processing algorithms. These zones may be determined based on the content of the combined image. Alternatively, these zones may be determined based on the position of each single-capture image with respect to the entire combined image or the other single-capture images. Once zones and their corresponding image processing parameters are determined for the combined image, they are translated to corresponding zones each of the single-capture images. Finally, the image processing algorithms are applied to each of the single-capture images using the zone-specified parameters. |
| US09786071B2 |
Geometric shape hierarchy determination to provide visualization context
One or more processors sort a plurality of geometric shapes using one or more size criteria. One or more processors determine whether the plurality of geometric shapes include at least one geometric shape that encapsulates or partially overlaps at least one other geometric shape. One or more processors assign a hierarchical order for the plurality of geometric shapes based, at least in part, on the one or more size criteria and one or more criteria of one or both encapsulation and partial overlap. |
| US09786069B2 |
Refined reconstruction of time-varying data
Systems and methods are provided for refined data reconstruction. In accordance with one aspect, the framework performs a first four-dimensional reconstruction of time-varying data to generate a four-dimensional Digital Subtraction Angiography (DSA) dataset of an object of interest. The framework extracts a volume of interest from the four-dimensional DSA dataset to generate a volume array. The volume of interest may be refined based on the volume array to generate a refined dataset. A second four-dimensional reconstruction may then be performed based on the refined dataset to generate a zoomed-in four-dimensional representation of the volume of interest. |
| US09786065B2 |
Image-based analysis of a geological thin section
Techniques for an image-based analysis of a geological thin section include (i) acquiring a plurality of images from a geological thin section of a rock sample from a subterranean zone; (ii) manipulating the plurality of images to derive a composite image; (iii) optimizing the composite image to derive a seed image; (iv) identifying, in the seed image, a particular seed pixel of a plurality of contiguous pixels that comprise an image of a grain of a plurality of grains of the rock sample in the seed image; (v) determining, with a specified algorithm, a shape of the grain based on the seed pixel; (vi) determining, based on the shape of the grain, a size of the grain; and (vii) preparing the determination of the size of the grain for presentation to a user. |
| US09786062B2 |
Scene reconstruction from high spatio-angular resolution light fields
The disclosure provides an approach for estimating depth in a scene. According to one aspect, regions where the depth estimation is expected to perform well may first be identified in full-resolution epipolar-plane images (EPIs) generated from a plurality of images of the scene. Depth estimates for EPI-pixels with high edge confidence are determined by testing a number of discrete depth hypotheses and picking depths that lead to highest color density of sampled EPI-pixels. The depth estimate may also be propagated throughout the EPIs. This process of depth estimation and propagation may be iterated until all EPI-pixels with high edge confidence have been processed, and all EPIs may also be processed in this manner. The EPIs are then iteratively downsampled to coarser resolutions, at which edge confidence for EPI-pixels not yet processed are determined, depth estimates of EPI-pixels with high edge confidence made, and depth estimates propagated throughout the EPIs. |
| US09786061B2 |
Specimen validity analysis systems and methods of operation
A specimen analysis system includes at least one processor to receive a set of image information that represents an image of at least a specimen validity portion of the specimen test article which includes at least one optical specimen validity marker, the color of which indicates the validity of the specimen; determine a set of color component values for one or more of a plurality of pixels of the image that are representative of the specimen validity portion of the specimen test article, the set of color component values including at least three color component values; and assess at least one specimen validity characteristic of the specimen based at least in part on each color component value of the determined set of color component values for the one or more of the plurality of pixels of the image. |
| US09786059B2 |
Apparatus and method for resource-adaptive object detection and tracking
An apparatus for providing object information based on an image sequence including a plurality of images is provided. The apparatus includes an object detector for conducting object detection on three or more images of the plurality of images of the image sequence to obtain the object information, wherein each image of the image sequence on which object detection is conducted, is an object-detected image of the image sequence, and wherein each image of the image sequence on which object detection is not conducted, is not an object-detected image of the image sequence. Moreover, the apparatus includes an object tracker for conducting object tracking on one or more images of the image sequence to obtain the object information. |
| US09786057B2 |
Inspection apparatus, coordinate detection apparatus, coordinate detection method, and wavefront aberration correction method
In an inspection apparatus according to one aspect of the present invention, a processing apparatus includes: a profile data generation unit that divides each of a plurality of images according to a circumferential position to generate profile data in which a radial direction position and luminance data are associated with each other; a deconvolution operation unit that carries out a deconvolution operation using a one-dimensional point spread function to generate deconvolution operation data based on the profile data; an estimation unit that estimates estimation data of the deconvolution operation data in a desired focus position in the optical axis direction using the deconvolution operation data; and a synthesis unit that synthesizes the estimation data estimated by the estimation unit for each radial direction position to generate the image in the desired focus position. |
| US09786052B2 |
Image processing apparatus and method for evaluating objects in an image
Apparatus and methods for image processing capable of generating evaluation index data for performing accurate and detailed evaluation of cultured cardiomyocytes are described. A motion detecting unit divides frame image data obtained by photographing the cultured cardiomyocytes for a predetermined time into blocks and obtains motion detection data in units of blocks per each frame period. A feature amount calculating unit calculates a feature amount for each block at the same position in a frame image using the motion detection data. A classification processing unit classifies each of the blocks into any one of a plurality of classification categories using the calculated feature amount. On the basis of the classification result, evaluation index data made of individual classification result data that represent correspondences between the blocks and the classification categories is generated. |
| US09786050B2 |
Stain-free histopathology by chemical imaging
The present disclosure provides methods, systems, and computer-readable storage media that can be used to image an unstained sample. The disclosed methods can include obtaining a spectroscopic image (e.g., infrared (IR) imaging data) of the sample, analyzing the resulting spectroscopic image to reduce the dimensionality of the spectroscopic image, comparing the reduced spectroscopic image compared to a control (e.g., by using an appropriately trained algorithm) and generating an output computed stain image from the reduced IR spectra, thereby imaging the sample without the use of stains or dyes. |
| US09786043B2 |
Inspection method for the effect of composition on the bond strength of a metallized alumina ceramic
A method of inspecting a unit under test containing brazed dielectric to metal bond, includes providing at least one image of the bond and determining a characteristic of the bond based on at least one of a presence and size of a glassy phase in or adjacent to the bond. |
| US09786039B2 |
Method and system for processing an image extracted from a document
The present disclosure relates to a method and system for processing an image extracted from a document. The image processing system detects one or more edges of the image and determines a missing edge in the image by comparing color gradients of the edges. The missing edges are recreated by cloning image pixels based on data pixels of an edge, opposite to the missing edge, amongst the one or more edges to obtain a reconstructed image. Outer corner points in the reconstructed image are identified based on quadratic corner points, wherein the quadratic corner points are determined based on the one or more edges and the reconstructed edge. Further, the image processing system performs an image perspective correction on the reconstructed image, based on the outer corner points, to obtain a processed image. |
| US09786034B1 |
Low cost color channel adaptive processes
A method of scaling image data, includes receiving image data at a processor in at least two channels, the image data having a first resolution for the a channel and a second, lower resolution for other channels, using known pixel values of the first resolution pixels to generate an interpolation function to be applied to second resolution pixels co-located with a subset of the first resolution pixels, and applying the interpolation function to the second resolution pixels to find the unknown pixel values. |
| US09786022B2 |
Customized patient-specific bone cutting blocks
A number of orthopaedic surgical instruments are disclosed. A method, apparatus, and system for fabricating such instruments are also disclosed. |
| US09786021B1 |
Method and system for retrieving and serving regulatory history for a property
Described are methods and systems for retrieving and serving the regulatory history of a property. For example, an identification of data sources for permits and approvals is stored in a computer system. Property identifiers from the data sources are stored in the computer system. The system identifies the types of permit and approval data available from each of the data sources for each of the property identifiers. A determination can be made of the completeness of the regulatory history available for each property associated with each of said property identifiers. The system receives a request for the regulatory history of at least one of the properties associated with the property identifiers. A web page may be populated with a list of the regulatory history for the property. |
| US09786020B2 |
System, method, and apparatus for settlement for participation in an electric power grid
Systems, methods, and apparatus embodiments for electric power grid and network registration and management of physical and financial settlement for participation of active grid elements in supply and/or curtailment of power, wherein Internet Protocol (IP)-based messages including IP packets are generated by transforming raw data content into settlement grade content. Settlement is provided for grid elements that participate in the electric power grid following initial registration of each grid element with the system, preferably through network-based communication between the grid elements and a coordinator, either in coordination with or outside of an IP-based communications network router. Messaging related to settlement is managed through a network by a Coordinator using IP messaging for communication with the grid elements, with the energy management system (EMS), and with the utilities, market participants, and/or grid operators. |
| US09786019B2 |
Grouped packages for a financial and social management system
Embodiments of the invention comprise systems, computer program products, and methods for a financial and social management system that provides improved tracking and management related to how, where, when, and with whom a user enters into activities. The financial and social management system captures activity information and images from various sources of information, including but not limited to social networking accounts, e-receipts, calendars, contact lists, location determination devices, and the like, and associates the activity information and images with the activities of one or more users. The financial and social management system captures past and future activities of the multiple users based on a location or time period, and assembles the activities into group packages. The group packages are supplemented with the images and the activity information related to the past and future activities captured from the various sources of information of the multiple users. |
| US09786016B2 |
Image tagging for capturing information in a transaction
An image is captured within an application transaction. Identifying information corresponding to the captured image is obtained and displayed for user confirmation. The identifying information is entered into an appropriate place within the transaction. |
| US09786013B2 |
Dashboard interface, platform, and environment for matching subscribers with subscription providers and presenting enhanced subscription provider performance metrics
Systems and methods for matching subscribers with subscription providers include gathering, via a network from one or more remote computing systems, claims data, performance data, and service data regarding a number of providers; determining, by processing circuitry of a computing device based on the claims data, the performance data, and the service data, one or more provider metrics for each provider of the number of providers; calculating, by the processing circuitry based on the one or more provider metrics, one or more relationships between a number of subscribers and each provider of the plurality of providers; and ranking, by the processing circuitry, the number of providers based at least on part on the one or more relationships. |
| US09786010B2 |
Homeowners insurance application process using geotagged photos
Methods, systems, and computer readable media are disclosed for determining a homeowners insurance quote from a captured image of a dwelling. The captured image includes geotagged information, and the address of the dwelling is determined by reverse geocoding this information. An insurance premium quote may then be generated based on the reverse geocoded address and any additional risk assessment factors, such as the building characteristics. Verification of the address may also be performed by accessing one or more databases, which may store information including addresses, coordinates, and images associated with the address. The building characteristics may be retrieved from one or more of the databases to allow for quote generation with minimal user intervention. Matching properties having comparative quotes near the dwelling address may also be generated. |