Document Document Title
US09686248B2 Secure shared key sharing systems and methods
Systems and methods used to securely communicate a shared key to devices. One embodiment describes a method to securely communicate a shared key to a first device and a second device that includes receiving, using the first device, a shared key and unique identifier pairing associated with the first device from a key generator; receiving, using a trusted third party, the shared key and unique identifier pairing from the key generator; generating, using the first device, a signature using the unique identifier and the shared key; transmitting, using the first device, the signature and the unique identifier to the trusted third party; verifying, using the trusted third party, the unique identifier based on the signature; determining, using the trusted third party, the shared key when the unique identifier is verified; and transmitting, using the trusted third party, the shared key to the second device to enable the first device and the second device to communicate securely by encoding and decoding communicated data using the shared key.
US09686242B2 Protection of sensitive data of a user from being utilized by web services
Systems and methods for preventing web services from using sensitive data in customizing web pages for a user. In one embodiment, a protection system is implemented between the user and the web service. The protection system identifies past interactions of the user with the web service, identifies text in the past interactions between the user and the web service, and identifies subjects discussed in the text. The protection system then communicates with the user to determine which of the subjects are sensitive to the user, and deletes a history stored by the web service for the user that relates to the sensitive subjects.
US09686241B1 System and method for using unique device identifiers to enhance security
A method for detection and use of device identifiers to enhance the security of data transfers between electronic devices. A first electronic device can transmit access data to a second electronic device. The access data can be associated with a first access code that can be generated based at least in part on data representing a device identifier of the first electronic device. A device identifier can uniquely identify the first electronic device from a plurality of electronic devices. Transferring the access data can involve transforming the first access code into a second access code that can include data representing a device identifier associated with the second electronic device. Transforming the first access code into the second access code can facilitate access to a resource associated with the access data for a second user, but not for a first user.
US09686239B2 Secure data transmission
To securely transmit data from a communication terminal (TC) to an application server (SA) over a telecommunications network (RT), the communication terminal (TC) being connected to the application server (SA) via an unsecure access network (RAns) and being able to communicate with the application server (SA) via at least one secure access network (RAs), the communication terminal (TC) switches the connection with the application server (SA) from the unsecure access network (RAns) to a secure access network (RAs), when personal data (DonP) is likely to be entered or is entered by the user, transmits the personal data (DonP) to the application server (SA) via the secure access network (RAs), and switches the connection with the application server (SA) from the secure access network (RAs) to an unsecure access network (RAns).
US09686237B2 Secure communication channel using a blade server
Systems and methods to manage a network include a security blade server configured to perform a security operation on network traffic, and a controller configured to virtualize a plurality of network devices. The controller is further configured to program the network traffic to flow through the security blade server to create a secure network channel. A software defined environment may includes an application program interface (API) used to program the flow of the network traffic. The controller may use the API to virtually and selectively position the security blade server as waypoint for the network traffic.
US09686236B2 Mobile telephone firewall and compliance enforcement system and methods
Methods, systems, and software for mediating SMS messages, and especially type 0 SMS messages, in a wireless mobile communications device configured to send and receive data using a GSM protocol and including a subscriber identity module (“SIM”) including electronic hardware and computer software executed by the hardware such that the SIM is configured to send, receive, and process messages using a Short Message System (“SMS”) between the wireless mobile communications device and a communications network. One aspect includes a method for mediating SMS messages comprising: configuring electronic hardware on the wireless mobile communications device to implement a firewall on the wireless mobile communications device, the firewall configured to identify and optionally mediate infrastructure SMS messages.
US09686235B2 Mobile banking system with cryptographic expansion device
A mobile banking system that uses a cryptographic expansion device attached to a communication component of a mobile device and a secure gateway device to enable end-to-end secure communications between the mobile device and a payment processing network is disclosed. The cryptographic expansion device enables the mobile device to perform cryptographic operations on communications sent to and from the mobile device. The secure gateway device prevents unauthorized accesses to the payment processing network.
US09686234B1 Dynamically changing stream quality of protected content based on a determined change in a platform trust
Embodiments are directed towards dynamically changing a quality of content being played when a robustness or level of trust is determined to have changed for a computing device, or platform, currently playing at least one stream of the content. An initial level of trust is determined for the computing device, and is used to select a quality of content from the at least one stream of content for play. During play, when a change in the level of trust is detected for the computing device, a different quality of the content may be selected, and replaces the currently playing content.
US09686224B2 Social network reaction reporting device, reporting method, reporting program, and recording medium
A provision device (100) in a provision system providing a user conducting activities through a service with reactions of other users to the user is configured as follows. A presenter (101) presents a current state of the reactions from the other users to the user that have occurred while the user is conducting activities through the service to the user via the service while the user is conducting activities through the service. A notifier (102) gives notice of a summary of the reactions from the other users to the user that have occurred while the user is not conducting activities through the service to the user with no intervention of the service while the user is not conducting activities through the service. Then, as the user conducts a given operation on information contained in the notified summary, the notifier (102) prompts the user to start conducting activities through the service.
US09686223B2 System and method of creating a network based dynamic response list
A method and apparatus are provided that incorporate the steps of creating a friends list through a social networking site, a security system detecting an event within a secured area of the security system, the security system selecting at least one friend of the friends list based upon a relative geolocation of the at least one friend with respect to the secured area, and the security system sending an alert to the at least one friend notifying the at least one friend of the event.
US09686220B2 Debug and verify execution modes for computing systems calculating automation degree of implementation metrics
Non-automated read-and-reply console messages may be automated. These messages may be classified into impact groups in which the messages may be removed from the database or sent to an automation analyzer for analysis. As more messages become automated, a debugging mode may be enabled to allow an operator to respond to a message with a proposed action. If the proposed action is aligned with an action predetermined in response to the automation analysis, the operator may be allowed to respond to future actions.
US09686219B2 Systems, methods, and apparatuses for facilitating determination of a message recipient
Methods and apparatuses are provided for facilitating determination of a message recipient. A method may include determining a message to be sent in one of multiple active messaging conversations. The method may further include determining a conversation to which the message is relevant from among the active messaging conversations based at least in part on data from historical conversations. The method may additionally include designating the message to be sent to at least one recipient. The at least one recipient may be a party participating in the determined conversation. Corresponding apparatuses are also provided.
US09686213B2 Method and system for account recommendation
Method and device of recommending public social network accounts on a social network platform are disclosed. The method includes: a user device obtaining a user profile of a user account of the social network platform, the user profile including at least identity and online behavior information of a user associated with the user account; selecting one or more information items from the user profile in accordance with a matching algorithm for selecting the recommended public social network accounts; running the matching algorithm to obtain at least one recommended public social network account that matches the selected information items; and recommending the at least one public social network account to the user associated with the user account.
US09686209B1 Method and apparatus for storing packets in a network device
In a network device, a plurality of first counters for measuring respective fill levels of respective queues are maintained, the queues using respective dedicated areas of a memory and a shared area of a memory. A single second counter for measuring a fill level of a shared area is maintained. When a packet is enqueued, the respective first counter corresponding to the queue is updated, and if any part of the packet is stored in the shared area, the single second counter is updated. When the packet is dequeued, the respective first counter is updated, and if any part of the packet was stored in the shared area, the single second counter is updated.
US09686208B2 Stateless services in content management clients
Techniques to provide stateless services in a content management client are disclosed. A session manager is instantiated to service a request to access a content item. The session manager is used to obtain from a global session pool that is not specific to the session manager a session to service the request. The session is used to service the request. Once the request has been completed the session manager may be terminated, but the global session pool and associated object cache remain.
US09686202B2 Network-specific data downloading to a mobile device
A method, system, and/or computer program product downloads a blob of data onto a mobile device. A blob of data that is to be downloaded from a server to a mobile device via a particular network is identified. A first maximum chunk size for the first network for the particular network is identified, as is a timeout value for the mobile device when downloading a chunk of data. An optimal chunk size for chunking the blob of data is determined based on the timeout value of the mobile device and the maximum chunk size for the first network. The blob of data is partitioned into chunks of data based on the first optimal chunk size, and the chunks of data are transmitted from the server to the mobile device.
US09686201B2 Predictive management of a network buffer
Predictive management of a network buffer is contemplated. The network buffer maybe predictively managed to control packet drop based at least in part on predicted sojourn time. The predicted sojourn time may be determined to predict time needed from an arriving packet to travel through a queue of the network buffer.
US09686200B2 Flow cache hierarchy
Some embodiments provide a managed forwarding element (MFE that includes a set of flow tables including a first set of flow entries for processing packets received by the MFE. The MFE includes an aggregate cache including a second set of flow entries for processing packets received by the MFE. Each of the flow entries of the second set is for processing packets of multiple data flows. At least a subset of packet header fields of the packets of the multiple data flows have a same set of packet header field values, and a same set of operations is applied to said packets. The MFE includes an exact-match cache including a third set of flow entries for processing packets received by the MFE. Each of the flow entries of the third set is for processing packets for a single data flow having a unique set of packet header field values.
US09686198B1 Enhancing DOCSIS services through network functions virtualization
This disclosure describes techniques for provisioning a CMTS to re-direct customer traffic into virtualized network functions (NFVs) service chains. This disclosure describes, in one example, techniques for providing linkage between DOCSIS service flows and NFV service chains in the DOCSIS provisioning system by embedding information within cable modem boot files used to configured cable modems within the broadband system. In one example, the techniques facilitate the definition of an NFV service-chain in the DOCSIS cable modem boot file provisioning system. A supported CMTS, CCAP or Edge Router intercepts and interprets the configuration to install packet classifiers that steer specific subscriber flows, as detailed in the DOCSIS cable modem boot file, through the service-chain.
US09686191B2 Performing read operations in network on a chip architecture
Systems and methods to be used by a processing element from among multiple computing resources of a computing system, where communication between the computing resources is carried out based on network on a chip architecture, to send first data from memory registers of the processing element and second data from memory of the computing system to a destination processing element from among the multiple computing resources, by sending the first data to a memory controller of the memory along with a single appended-read command.
US09686190B2 Techniques for forwarding or receiving data segments associated with a large data packet
Examples are disclosed for forwarding or receiving data segments associated with a large data packets. In some examples, a large data packet may be segmented into a number of data segments having separate headers that include identifiers to associate the data segments with the large data packet. The data segments with separate headers may then be forwarded from a network node via a communication channel. In other examples, the data segments with separate headers may be received at another network node and then recombined to form the large data packet at the other network node. Other examples are described and claimed.
US09686187B2 Method and system for providing distributed allowed domains in a data network
Method and system for providing distributed domains in a fiber channel fabric including determining a domain configuration of a resource, retrieving one or more current domain configuration parameters, determining a list of domains in a fiber channel fabric, and generating an updated domain list for the resource in the fabric is disclosed.
US09686184B2 Gateway device for machine-to-machine communication with dual cellular interfaces
Gateway devices can use dual cellular interfaces to provide reliable communications for client machines. A gateway device can use one of the dual cellular interfaces as a primary interface and the other as a hot backup interface. The backup interface remains connected to a cellular network while communications are routed on the primary interface. Accordingly, the gateway device can rapidly switch communications between from the primary interface to the backup interface. Applications, for example, for ATM payment processing, vending machine telemetry, point of sale payment processing, kiosk internet connectivity, remote monitoring and control, mobile or electronic health, and remote information displays, may run on the gateway devices, on servers, on user devices, or a combination of these devices.
US09686183B2 Digital object routing based on a service request
A digital object may be routed via a network. Routing of a digital object may be based in part on a requested service, and/or on an ability of an intermediate node to provide the requested service, and/or on a willingness of the intermediate node to provide the requested service.
US09686180B2 Managing routing information for tunnel endpoints in overlay networks
Systems, methods, and non-transitory computer-readable storage media for managing routing information in overlay networks. A first tunnel endpoint in an overlay network may receive an encapsulated packet from a second tunnel endpoint. The encapsulated packet may have been encapsulated at the second tunnel endpoint based on another packet originating from a source host that is associated with the second tunnel endpoint. The encapsulated packet can include a source host address for the source host and a source tunnel endpoint address for the second tunnel endpoint. The first tunnel endpoint can then update a lookup table based on an association between the source host address and the source tunnel endpoint address.
US09686176B2 Constrained and viable path computation systems and methods
Path calculation systems and methods for determining a path, based on constraints and rules, for a connection at one or more layers in a network, include determining a path exploration map of the network based on a multi-layer network model of the network defining external edges and intra-node paths, the path exploration map comprising every external port in the network that is reachable from a source port; and utilizing the path exploration map to determine a viable path, from a destination port to the source port, subject to the constraints and the rules and based on a cost.
US09686175B2 Methods, systems, and computer readable media for testing network devices using simulated application traffic
Methods, systems, and computer readable media for testing network devices using simulated application traffic are disclosed. One method includes steps implemented in a network equipment test device including at least one processor. The method includes emulating data transfer operations of a plurality of server applications. The method further includes receiving application traffic from a plurality of different client applications. The method further includes queuing incoming connections received from the client applications. The method further includes, for each of the connections, attempting to correlate application-level data with one of the emulated server applications. The method further includes, in response to successful correlation of the received application-level data with one of the emulated server applications, performing application-specific processing for the emulated server application. Performing application-specific processing includes sending data from an emulated server application to a client application through a device under test.
US09686170B2 Measuring delay
Delay in the allocation of resources can be measured for a set of sequential requests for the resources. A start time for the receipt of the first request of the set can be recorded, followed by the incrementing of a request start time counter, with the current time minus the recorded start time, for each subsequently received request. A total time counter can be incremented, with the current time minus recorded start time, for each request allocation, and a request counter can be incremented for each request allocation. When determining that all received requests have been allocated, and decrementing the total time counter by the request start time counter, it is possible to determine an average delay time from the total time counter value divided by the request counter value.
US09686165B2 Systems and methods for indicating link quality
A method for indicating communication link quality by an electronic device is described. The method includes tracking local link quality information corresponding to a local receive link between the electronic device and a neighboring device. The method also includes receiving a request to indicate a link quality. The method further includes indicating the link quality.
US09686162B2 Identifying configuration inconsistency in edge-based software defined networks (SDN)
Identifying state inconsistency in edge-based software defined networks is disclosed. A verification server may receive controller network configuration data from a controller of an edge-based software defined network (SDN) and end-host network configuration data from at least one end-host of the SDN. The verification server may parse the controller network configuration data into a network state representation and the end-host network configuration data into the network state representation. The network state representation of the controller network configuration data and the end-host network configuration data may be compared to identify state inconsistency in the SDN. Responsive to identifying the state inconsistency, an alert and/or a report may be generated and transmitted to an administrator user interface.
US09686160B2 Apparatus and method of displaying status of wireless network
A method for providing a status of a wireless network, including: receiving a wireless signal from an access point and status information of the access point; determining processing capacity information of the access point based on the status information of the access point; and displaying wireless network information with respect to the access point, the wireless network information including the processing capacity information of the access point and signal strength information of the received wireless signal.
US09686157B2 Real-time adaptive processing of network data packets for analysis
A network monitoring system that summarizes a plurality of data packets of a session into a compact session record for storage and processing. Each session record may be produced in real-time and made available during the session and/or after the termination of the session. Depending on protocols, a network monitoring system extracts different sets of information, removes redundant information from the plurality of data packets, and adds performance information to produce the session record. The network monitoring system may retrieve and process a single session record or multiple session records for the same or different protocols to determine cause of events, resolve issues in a network or evaluate network performance or conditions. The session record enables analysis in the units of session instead of individual packets. Hence, the network monitoring system can analyze events, issues or performance of the network more efficiently and effectively.
US09686149B2 Information processing system, relay device, and information processing method
An information processing system includes an information processing device, a storage unit, a relay unit, and an update unit. The information processing device is an element of an information processing system. The storage unit stores integral information obtained by integrating information about the information processing device expressed as component information of the information processing system. The relay unit receives communication information including an update command for updating of the component information addressed to the information processing device, and transmits first communication information including the update command addressed to the information processing device and second communication information including the update command. The update unit receives the second communication information, and updates the integral information based on an update command included in the second communication information.
US09686148B2 Responsibility-based cache peering
A computer-implemented method, operable in a network comprising multiple delivery service endpoints running on a plurality of devices. Each delivery service endpoint delivers resources. A plurality of the multiple delivery service endpoints comprise a group, each node in the group having at least one kind of responsibility relating to delivery of resources. The method includes receiving, at the node, a request relating to a particular resource. The kind of responsibility the node has for the request is determined based on at least one kind responsibility assigned to the node for requests relating to the particular resource. Based on the determining, an attempt is made to process the request in accordance with kind responsibility assigned to the node for requests relating to the particular resource.
US09686146B2 Reconfiguring interrelationships between components of virtual computing networks
Embodiments of the present invention relate to an approach for reconfiguring interrelationships between components of virtual computing networks (e.g., a grid computing network, a local area network (LAN), a cloud computing network, etc.). In a typical embodiment, a set of information pertaining to a set of components associated with a virtual computing network is received in a computer memory medium or the like. Based on the set of information, a graphical representation (e.g., hierarchical tree) depicting the set of interrelationships between the set of components is generated. When a failure in the virtual computing network is detected, at least one of the set of interrelationships between the set of components is reconfigured based on the graphical representation and the set of rules to address the failure.
US09686142B2 Node-pair process scope definition and scope selection computation
A connected directed graphical representation of a process model that includes a plurality of process nodes and interconnections between the process nodes of the process model is displayed. A user selection of a subset of the process nodes of the displayed connected directed graphical representation of the process model is received. A process scope definition represented as at least one begin-end node pair is computed. The at least one begin-end node pair is usable to identify all selected nodes and interconnection path links that are reachable in a traversal from a begin node to an end node of each of the at least one begin-end node pair of the received user selection of the subset of the process nodes. The computed process scope definition is stored.
US09686139B2 Method and networking device for setting network connection parameters
The present disclosure discloses a method for automatically setting network connection parameters in a networking device, comprising: accessing a network; acquiring all network connection manners supported by the network; selecting a network connection manner to be used from the acquired network connection manners; and automatically setting network connection parameters for the selected network connection manner. Accordingly, the efficiency of setting network connection parameters may be improved.
US09686138B2 Information handling system operational management through near field communication device interaction
Configuration information to configure an information handling system is obtained by sending an identifier for the information handling system to a portable information handling system, such as a mobile telephone, with a first NFC communication. The mobile telephone retrieves the configuration information, such as through a network interface, and sends the configuration information to the information handling system with a second NFC communication. Configuration information includes a variety of information, such as IP and MAC address, BIOS settings, software applications, firmware versions and end user specific settings.
US09686128B2 Wireless network adapter and self-configuration method of same
Provided are a wireless network adapter and a configuration method of same. A wireless network adapter comprises: a self-configuration portion, used to configure the wireless network adapter as an access point adapter, and generate access information of a wireless network access point; a cable connection portion, connected to a second wireless network adapter, and used to transmit the access information to the second wireless network adapter and receive an acknowledgment message from the second wireless network adapter; and a wireless transceiver, connected to the second wireless network adapter. Another wireless network adapter comprises: a cable connection portion, used to receive access information from an access point adapter; a parameter storage portion, used to store the access information as a setting parameter; a self-configuration portion, used to configure the wireless network adapter as a client mode and generate an acknowledgment message; and a wireless transceiver, connected to a wireless network access point. Configuration of multiple wireless network adapters connected to each other may be implemented without any input parameter and without the need of access a configuration webpage by using a computer.
US09686124B2 Systems and methods for managing a network of moving things
Communication network architectures, systems and methods for supporting a network of mobile nodes. As a non-limiting example, various aspects of this disclosure provide communication network architectures, systems, and methods for supporting a dynamically configurable communication network comprising a complex array of both static and moving communication nodes (e.g., the Internet of moving things).
US09686123B2 System for media distribution and rendering on spatially extended wireless networks
A system for media distribution and rendering over a spatially extended wireless network, comprising a plurality of media rendering devices configured as nodes in a spatially extended wireless network. The media rendering devices dynamically establish a hierarchical arrangement wherein a first media rendering device acts as a root node of the hierarchical arrangement. The first media rendering device receives media content over a network and distributes the media content to the remaining media rendering devices using the hierarchical arrangement. The media content is rendered synchronously by each of the plurality of media rendering devices.
US09686122B2 Methods for orientation and tilt identification of photovoltaic systems and solar irradiance sensors
The present invention relates to methods and systems for identifying PV system and solar irradiance sensor orientation and tilt based on energy production, energy received, simulated energy production, estimated energy received, production skew, and energy received skew. The present invention relates to systems and methods for detecting orientation and tilt of a PV system based on energy production and simulated energy production; for detecting the orientation and tilt of a solar irradiance sensor based on solar irradiance observation and simulated solar irradiance observation; for detecting orientation of a PV system based on energy production and energy production skew; and for detecting orientation of a solar irradiance sensor based on solar irradiance observation and solar irradiance observation skew.
US09686115B1 Method and circuit for detecting TMCC signal
Disclosed are a method and a circuit for detecting a TMCC signal. Using this method and circuit, as long as there is a synchronizing signal of the TMCC signal found in the ISDB-T signal received by the receiving device, the TMCC information can be collected from then on. Thereby, the delay time generated each time when the receiving device switches channels can be effectively decreased.
US09686112B2 System and method for controlling combined radio signals
A method for controlling a combined waveform, representing a combination of at least two signals having orthogonal frequency multiplexed signal components, comprising: receiving information defining the at least two signals; transforming the information defining each signal to a representation having orthogonal frequency multiplexed signal components, such that at least one signal has at least two alternate representations of the same information, and combining the transformed information using the at least two alternate representations, in at least two different ways, to define respectively different combinations; analyzing the respectively different combinations with respect to at least one criterion; and outputting a respective combined waveform or information defining the waveform, representing a selected combination of the transformed information from each of the at least two signals selected based on the analysis.
US09686111B2 Apparatus and method for sending and receiving broadcast signals
Disclosed herein is a broadcast signal transmitter. A broadcast signal transmitter according to an embodiment of the present invention includes an input formatting module configured to perform baseband formatting and to output the data of at least one Physical Layer Pipe (PLP), a BICM module configured to perform error-correction processing on the PLP data, a framing and interleaving module configured to interleave the PLP data and to generate a signal frame, and a waveform generation module configured to insert a preamble into the signal frame and to generate a broadcast signal by performing OFDM modulation.
US09686110B2 Method and apparatus for transmitting uplink signal in wireless communication system
The present invention relates to a wireless communication system and, more specifically, to a method and an apparatus for transmitting an uplink signal. The method for transmitting an uplink signal from a terminal in a wireless communication system, according to one embodiment of the present invention, comprises the steps of: receiving configuration information about candidates in a parameter set for a reference signal for physical uplink shared channel (PUSCH) modulation; receiving information indicating a specific set among the candidates in the parameter set; and generating a sequence of the reference signal using the specific set and transmitting the generated reference signal to a base station, wherein the information indicating the specific set may have a maximum value of the minimum distance between a circular shift index of the reference signal generated by a terminal using the specific set and a circular shift index of a reference signal generated by another terminal using the specific set.
US09686109B2 Wireless communication device, integrated circuitry, and wireless communication method
A wireless communication device has an analog control loop circuitry that generates an analog control signal to adjust a phase of a voltage controlled oscillation signal, in accordance with a phase of a reception signal, a digital control loop circuitry that generates a digital control signal having a frequency determined by a frequency of a reference signal and a predetermined frequency setting code signal and having a phase opposite to a phase of the analog control signal, a voltage controlled oscillator that generates the voltage controlled oscillation signal, on the basis of the analog control signal and the digital control signal, and a data slicer that generates a digital signal obtained by digital demodulation of the reception signal, on the basis of a comparison result of the digital control signal and a predetermined threshold value.
US09686104B2 Reception of inter-symbol-correlated signals using symbol-by-symbol soft-output demodulator
A receiver comprises a sequence estimation circuit and a soft-input-soft-output (SISO) decoder. The sequence estimation circuit comprises circuitry operable to generate first soft bit decisions for symbols of a received inter-symbol-correlated signal. The SISO decoder comprises circuitry operable to decode the first soft bit decisions to generate corrected soft bit decisions. The circuitry of the sequence estimation circuit is operable to generate, based on the corrected soft bit decisions, second soft bit decisions for the symbols of the received inter-symbol-correlated signal, which are improved/refined relative to the first soft bit decisions.
US09686102B2 Sparse ordered iterative group multi-antenna channel estimation
Data can be received characterizing a first signal transmitted in an orthogonal frequency-division multiplexing (OFDM) system by a transmitter with one or more transmit antennas through a wireless channel and received by a receiver with a plurality of receive antennas, the first signal including a plurality of pilot pulses. A final estimated channel impulse response of the wireless channel can be determined for each pair of transmitter and receiver antennas by iteratively finding one or more significant delay taps of an intermediate channel impulse response estimate and adding the one or more significant delay taps to an error of the intermediate channel impulse response estimate. Data characterizing the final estimated channel impulse response can be provided. Related apparatus, systems, techniques, and articles are also described.
US09686099B2 Updating virtual network maps
A switch determines a path, not included in a first set of virtual networks associated with the switch. It is determined if the path can be added to an existing virtual network in the first set of virtual networks. If the path cannot be added, a new virtual network is created to include the path.
US09686097B2 Machine, program product, and computer-implemented methods for a hybrid command management aggregator
A machine, program product, and method for enabling interoperable and low-latency networking among service devices. The machine, program product and methods perform the tasks of automatically matching, upon the receipt of the incoming data transmission, the data transmission to a plurality of analog device protocols to determine the necessary instructions and transmission media to command and control the plurality of analog service devices according to the data transmission or a plurality of digital device protocols to determine the necessary instructions and transmission media to command and control the plurality of digital service devices according to the data transmission, determining an outgoing transmission media for the incoming data transmission, constructing outgoing data transmissions between any of the analog service devices and any of the digital service devices responsive to the matching of the analog and digital device protocols and the identification of the outgoing transmission media, and dynamically allocating frequency spectrum for data transmissions between any of the analog service devices and any of the digital service devices, the dynamic allocation being responsive to any of a service type, service demand, and quality of service threshold for the outgoing transmission media and digital and analog device protocols.
US09686095B2 Network analysis device, management system, network analysis method and program
An electronic message information collector collects packets transferred on a building management system network and analysis results as first electronic message information. A storage stores the first electronic message information collected by the electronic message information collector. An electronic message information collector collects packets transferred on an equipment network and analysis results as second electronic message information. A storage stores the second electronic message information collected by the electronic message information collector. An electronic message associator associates the first electronic message information stored in the storage and the second electronic message information stored in the storage. A display displays the analysis results of the association by the electronic message associator.
US09686093B2 Method for determining an optimal schedule of an appliance
A method of defining a message to be sent to at least one appliance regarding a schedule for performing a cycle of operation includes a step of acquiring pricing data from a source of information about a resource consumed by the appliance. A projected rate for the use of the resource by the appliance for a future series of time periods is calculated based upon a user preference. A projected schedule for performing the cycle of operation for a future series of time periods is created and then incorporated into the message that is transmitted to the appliance.
US09686092B2 Remote talk down to panel, camera and speaker
Methods and systems are described for storing video content collected by a home automation system. According to at least one embodiment, an apparatus for accessing video content collected by a home automation system includes a processor, a memory in electronic communication with the processor, and instructions stored in the memory which are executable by a processor to receive at a remote device live video content from a camera of the home automation system, and initiate real-time, two-way audio communication between the remote device and a user of the home automation system via the camera.
US09686091B2 Network address management and functional object discovery system
A network communication system includes a network address management and functional object discovery system. The network address management and functional object discovery system includes a network manager that manages network addresses for functional objects of electronic devices that communicate with each other over a network. The network manager may maintain a database that maps or associates unique IDs of the functional objects with associated network addresses. The network manager may provide non-conflicting instance IDs and network addresses to the electronic devices. The network manager may also provide instance IDs and/or network addresses for other electronic devices so that the electronic devices may communicate with each other over the network.
US09686090B2 Communication control method, base station, and user terminal
A communication control method is employed in a mobile communication system including a general cell supporting PTM transmission of MBMS data and a specific cell not supporting PTM transmission of the MBMS data. The method comprises: a step A of broadcasting general cell load information from the general cell; a step B of receiving the general cell load information broadcasted in the step A, by a user terminal which receives the MBMS data from the general cell in an idle mode with the general cell selected as a cell on which to camp; and a step C of controlling cell reselection from the general cell to the specific cell by the user terminal, based on the general cell load information received in the step B.
US09686083B2 Certificates for low-power or low-memory devices
Methods and systems for generating or validating compact certificates include receiving a first format of the certificate. Moreover, obtain a signature for the certificate in the first format. For each field of the certificate decode the field to obtain a value for the field from the first format and encoding the value for the field into a second format. Decoding and encoding for each field is done incrementally in the same order of the fields as the first format. In other words, a next field is not decoded from the first format until the field is encoded in the second format. Furthermore, a security envelope is encoded using the signature in the first format and the fields.
US09686082B2 Generating and processing an authentication certificate
A method and system for generating and processing an authenticity certificate. A request for a step certificate is received from a requester entity. The step certificate authenticates an involvement of the requester entity about an object. The request includes an object identifier, a requester entity type of the requester entity, and a requester identity certificate of the requester entity. The object identifier is hashed. A signature is created and includes the hashed object identifier, the requester entity type, a certifier identity certificate, and the requester identity certificate. A hashing result is generated by hashing a concatenation of the object identifier, the requester entity type, the certifier entity certificate, the requester identity certificate, and the signature. The step certificate is generated and includes the hashing result. The step certificate is encrypted. The encrypted step certificate is sent to the requester entity for subsequently storing the step certificate on a media.
US09686075B2 Key sharing network device and configuration thereof
A method of configuring a network device for key sharing, the method comprising obtaining (410) in electronic form at least two parameter sets, a parameter set comprising a private modulus (p1) a public modulus (N), and a bivariate polynomial (f1) having integer coefficients, the binary representation of the public modulus and the binary representation of the private modulus are the same in at least key length (b) consecutive bits, generating local key material for the network device comprising obtaining (420) in electronic form an identity number (A) for the network device, and for each parameter set of the at least two parameter sets obtaining a corresponding univariate polynomial, by determining, using a polynomial manipulation device, a univariate polynomial from the bivariate polynomial of the parameter set by substituting (430) the identity number into said bivariate polynomial, and reducing the result of the substitution modulo the private modulus of the parameter set, and electronically storing (450) at the network device the generated local key material, the generated local key material comprising the public modulus of each parameter set and the corresponding univariate polynomial of each parameter set.
US09686073B2 Secure and delegated distribution of private keys via domain name service
A third party system generates a public-private key pair, the public key of the key pair being an encryption key, and the private key of the key pair being a decryption key. The third party system publishes the encryption key as a DNS record of a third party system. The third party system receives a request to sign a message on behalf of a domain owner, the message to be sent to a recipient, and accesses an encrypted delegated private key published by the domain owner via a DNS record of the domain owner, the encrypted delegated private key encrypted using the encryption key. The third party system decrypts the encrypted delegated private key using the decryption key, and generates a signature for the message using the delegated private key. The third party system sends the signature and the message to the recipient.
US09686072B2 Storing a key in a remote security module
A system obtains assurance by a content provider that a content control key is securely stored in a remote security module for further secure communications between the content provider and the security module. A security module manufacturer, which has a pre-established trustful relation with the security module, imports a symmetric transport key into the security module. The symmetric transport key is unique to the security module. The content provider shares the symmetric transport key with the security module manufacturer. The content provider exchanging messages with the security module through a security module communication manager in order to get the proof that the security module stores the content control key. At least a portion of the messages exchanged between the content provider and the security module are protected using the symmetric transport key. The symmetric transport key is independent of said content control key.
US09686070B2 Dynamic polarization modulation and control
A method for sending a data from an electromagnetic radiator by polarization modulation of an electromagnetic wave includes radiating from the radiator first and second electromagnetic waves including first and second polarizations respectively, the first polarization being different than the second polarization. The first and second electromagnetic waves form a third electromagnetic wave having a third polarization different from the first or second polarization. The method includes modulating the third polarization responsive to the data by modulating one or more parts of the third electromagnetic wave. The data is sent in the third polarization. A system for sending a data includes an oscillator adapted to generate an oscillating signal, and a phase shifter coupled to the oscillator and adapted to generate a first phase-shifted oscillating signal having a first phase. The phase shifter is adapted to vary the phase difference across a predefined range in response to the data.
US09686064B2 Devices and methods for HARQ-ACK feedback scheme on PUSCH in wireless communication systems
Devices and methods of reducing overall Hybrid Automatic Repeat Request-Acknowledgment (HARQ-ACK) of user equipment (UE) using a large amount of carrier aggregation are generally described. The UE may receive a subframe from an enhanced NodeB (eNB). The subframe may contain a physical downlink control channel (PDCCH) formed in accordance with a Downlink Control information (DCI) format. The DCI format may comprise a Downlink Assignment Index (DAI) for Time Division Duplexed (TDD) and Frequency Division Duplexed (FDD) operation. The UE may determine, dependent on the DAI, a number and ordering of Hybrid Automatic Repeat Request-Acknowledgment (HARQ-ACK) bits to be transmitted on a Physical Uplink Shared Channel (PUSCH) and subsequently transmit the HARQ-ACK bits.
US09686062B2 Virtual aggregation of fragmented wireless spectrum
Method and apparatus for aggregating spectrum in which multiple disjoint blocks of spectrum may be configured as one virtual contiguous block of spectrum by modulating onto each disjoint blocks of spectrum a respective portion of a data stream in which the data rate associated with the modulated portion is compatible with the available bandwidth of the disjoint spectrum block upon which is modulated.
US09686058B2 Method and apparatus for controlling inter-cell interference in wireless communication system
A method for transmitting reduced power-almost blank subframe (r-ABS) setting information from a first cell to a second cell, according to one embodiment of the present invention, comprises a step of the first cell transmitting to the second cell r-ABS pattern information for indicating the r-ABS which is setup by the first cell, and r-ABS power indication information for indicating transmission power of a physical downlink shared channel (PDSCH) of the first cell from the r-ABS, wherein the PDSCH transmission power of the first cell can be set to a transmission power which is low compared to a common subframe.
US09686053B2 Frequency-domain high-speed bus signal integrity compliance model
Embodiments of the present disclosure provide methods for testing channel compliance. The method generally includes identifying at least one design criteria and determining boundary sets of frequency domain parameters for compliant signal channels known to achieve the design criteria. The boundary sets may be used for verifying whether a particular signal channel is compliant by comparing values of frequency domain parameters for the particular channel to one or more of the boundary sets of frequency domain parameters for the known compliant channels.
US09686052B2 Communication-line-quality estimating apparatus, transmitter, and receiver
A communication-line-quality estimating apparatus of which a receiver receives from a transmitter a signal including known signals whose phase relation is known between the transmitter and the receiver. The communication-line-quality estimating apparatus includes a pilot adding unit that cumulatively adds up and averages a power value of a noise component calculated by addition or subtraction in a specified combination of the known signals, a first power calculating unit, a first averaging processing unit, a second power calculating unit that cumulatively adds up and averages a power value of the known signals, a second averaging processing unit, and a power-ratio calculating unit that estimates communication line quality using a noise signal power value input from the first averaging processing unit and a reception signal power value input from the second averaging processing unit.
US09686049B2 Method and system for Bluetooth (BT) delayed acknowledgement (ACK)
A method and system for Bluetooth (BT) delayed acknowledgment is presented. Aspects of the system may include an initiator device, such as a WLAN access point (AP), which enables transmission of a protocol data unit, such as a BlockAckReq frame, to a responder device, such as a Smartphone, via a first network, for example a WLAN. The Smartphone may be equipped with capabilities that enable communication via WLAN and Bluetooth networks. The AP may wait to receive a response protocol data unit, such as a BlockAck frame, via the first network (WLAN) for a response time duration. The response time duration may be based on the communication slot time duration for communication by the Smartphone on a second network, for example a BT piconet. The communication slot time duration may correspond to the time duration for a BT slot.
US09686048B2 Delayed automatic repeat request (ARQ) acknowledgment
Disclosed are examples in which the acknowledgement channel is used for retransmitting a frame received with error. A receiver is configured to transmit an acknowledgment for a frame when the frame is decoded following receipt of the last Pilot Control Group (PCG) of the same frame. The transmitter is configured to receive the acknowledgment of an earlier frame during a subsequent frame, and not to retransmit the earlier frame. The two frames may be adjacent. During connection setup negotiation, the system can determine the values of ack_mask1 defining allowed times for the receiver to acknowledge successful decoding of the subsequent frame, and ack_mask2 defining allowed times for the receiver to acknowledge successful decoding of the earlier frame. The two mask values provide non-overlapping allowed times, so the receiver can acknowledge within the subsequent frame (1) successful decoding of the earlier frame, and (2) successful decoding of the subsequent frame.
US09686042B2 Method and apparatus of transmitting pilot signal for frequency shared broadcasting
Disclosed is a method of transmitting, by a transmission device, broadcast signals in a frequency-shared terrestrial broadcast system. The method includes generating the broadcast signals including pilot signals arranged at a physical layer frame based on a group identification (ID) defined according to a broadcast service, and transmitting the generated broadcast signals to a reception device, wherein the positions of the pilot signals arranged at the physical layer frame are different by group IDs.
US09686041B2 End of communication detection
An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.
US09686038B2 PHY-level wireless security
A method for communication includes generating a data transmission for transmission to a target receiver, and generating at least one jamming transmission having an amplitude that changes multiple times during the data transmission. The data transmission is transmitted to the target receiver using an antenna array, and the at least one jamming transmission is simultaneously transmitted using the antenna array.
US09686035B2 Spectrum management and timing optimization over multiple distribution points
Presented are systems and methods for spectrum management and timing optimization of communication networks have multiple distribution points, multiple remote transceivers, and a shared communication binder. In some embodiments, distribution points and communication lines are added to an active network by the allocation of unused time slots. In some embodiments, transmission collisions, near-end cross-talk, and far-end cross-talk, are predicted upon the addition of added distribution points and communication lines, and techniques are applied to reduce or cancel such phenomena.
US09686031B2 Methods and apparatus to detect a state of media presentation devices
Methods and apparatus to detect a state of media presentation devices are disclosed. An example state detector includes a detector to identify an operational frequency of a media presentation device to be monitored by the state detector; a frequency selector to, when the operational frequency is greater than a threshold associated with a sampling rate of a component of the state detector, select a first frequency for an oscillator signal, the frequency selector to select the first frequency based on the identified operational frequency; and a status identifier to, when the operational frequency is greater than the threshold, determine a state of the media presentation device based on whether a signal representative of a combination of the oscillator signal and an input received from an audio sensor includes an element greater than a reference value, wherein at least one of the detector, the frequency selector, or the status identifier is implemented via a logic circuit.
US09686024B2 True radio frequency (RF) power detector
A power detector is described herein that detects a true power provided by power amplifier of an RF transmitter. The power detector may include a plurality of voltage detectors that determine one or more voltages of a power amplifier included in the RF transmitter and/or a transformer included in the RF transmitter. At least one of the voltage detectors may be coupled to a sense inductor that senses one or more magnetic fields emitted by the transformer. The at least one voltage detector coupled to the sense inductor determines the voltage induced across the sense inductor as a result of the sensed magnetic field(s). The determined voltage(s) may be used to determine the load impedance of an antenna of the RF transmitter that transmits the RF signals. The load impedance may be used to accurately measure the power regardless of any impedance mismatches between the power amplifier and the antenna.
US09686023B2 Methods and systems of dynamically generating and using device-specific and device-state-specific classifier models for the efficient classification of mobile device behaviors
The various aspects provide a mobile device and methods implemented on the mobile device for modifying behavior models to account for device-specific or device-state-specific features. In the various aspects, a behavior analyzer module may leverage a full feature set of behavior models (i.e. a large classifier model) received from a network server to create lean classifier models for use in monitoring for malicious behavior on the mobile device, and the behavior analyzer module may dynamically modify these lean classifier models to include features specific to the mobile device and/or the mobile device's current configuration. Thus, the various aspects may enhance overall security for a particular mobile device by taking the mobile device and its current configuration into account and may improve overall performance by monitoring only features that are relevant to the mobile device.
US09686020B2 Signal processing device and signal processing method
A signal processing device that processes a digital signal formed by sampling an electric signal using a clock signal, the electric signal being obtained by converting an optical signal inputted from a transmission line, the signal processing device includes: a first chromatic dispersion compensator that compensates a waveform distortion caused by a chromatic dispersion with respect to the digital signal; a first nonlinear optical effect compensator that compensates a waveform distortion caused by a nonlinear optical effect with respect to one signal outputted from the first chromatic dispersion compensator; and a controller that detects a phase fluctuation of other signal outputted from the first chromatic dispersion compensator, and controls the clock signal based on the detected phase fluctuation.
US09686017B2 Bias control circuit for optical modulator, and optical transmitter comprising the same
A bias control circuit for an optical modulator including a pair of optical waveguides and a power monitor is disclosed. The bias control circuit includes a bias generator, a differential amplifier, and a controller. The bias generator provides a bias signal to one of the optical waveguides. The bias signal includes a dither signal having a predetermined frequency. The differential amplifier receives a monitor signal from the power monitor and a reference signal, and generates an amplified signal corresponding to a difference between the monitor signal and the reference signal. The controller detects frequency components contained in the amplified signal. The frequency components originates from the dither signal. The controller generates a control signal according to intensity of the frequency components. The bias signal is adjusted according to the control signal provided from the controller.
US09686015B2 Integrated optical network unit
An optical network unit includes a transmit/receive port and a silicon waveguide optically coupled to the transmit/receive port. The optical network unit also includes a tunable filter coupled to the silicon waveguide and providing a first output for a first frequency band and a second output for a second frequency band. The optical network unit further includes a polarization diverse receiver coupled to the tunable filter and a laser coupled to the tunable filter.
US09686014B2 Optical and RF techniques for aggregation of photo diode arrays
An active receiver structure that combines a large number of detectors without bandwidth penalty may provide a better signal-to-noise ratio (SNR) than conventional Radio Frequency over Glass (RFoG) networks. A transmission line receiver is used to combine a large number of optical detectors into a single radio frequency (RF) signal without a bandwidth penalty and a modest penalty in noise performance that results in an SNR that is much better than traditional optical combining techniques that are followed by a single detector. An optical multiplexer structure may be designed around the active splitter such that passive optical network (PON) operation is not impeded.
US09686006B2 Wireless communication system, base station, and wireless communication system control method
A wireless communication system includes a first communication station that connects with a higher-order station or a lower-order station in a communication path of multi-hop wireless communication and that carries out wireless communication with a mobile terminal in access areas in predetermined wireless resources that differ from relay areas for wireless communication with the higher-order station or the lower-order station in the wireless resources, and a second communication station that constitutes a communication path that differs from the communication path of the multi-hop wireless communication, that uses the wireless resources to carry out wireless communication with a mobile terminal, and that acquires information indicating the relay areas in the wireless resources.
US09686004B2 Adaptive methods for optimizing sounding and channel feedback overhead in SU-MIMO and MU-MIMO beam forming
Disclosed herein is a system, apparatus, and method for optimizing sounding and feedback overhead in a wireless digital network utilizing a beamforming technique by adaptively changing the frequency of sounding transmissions. The exemplary method comprises: transmitting a first plurality of sounding frames based on a first sounding interval, wherein the first sounding interval is a first period of time between transmissions of two sounding frames in the first plurality of sounding frames; receiving a plurality of feedback frames comprising information associated with the first plurality of sounding frames; based on the plurality of feedback frames: selecting a second sounding interval, different than the first sounding interval, for transmitting a second plurality of sounding frames; and transmitting the second plurality of sounding frames based on the second sounding interval, wherein the second sounding interval is a second period of time between transmissions of two sounding frames in the second plurality of sounding frames.
US09685998B2 Apparatus and method for controlling orientation
An orientation control apparatus and a method thereof are provided. The orientation control apparatus for controlling orientation of a phased array antenna includes the phased array antenna and an orientation controller. In the phased array antenna, a plurality of antenna elements are disposed on a plane. The phased array antenna receives a signal transmitted from at least one transmitter. The orientation controller controls orientation of the phased array antenna based on a channel estimated result of each sub array where the plurality of antenna elements have been grouped in the phased array antenna.
US09685994B2 Antenna for wireless power transmission and near field communication
A dual antenna for wireless communication transmission (WPT) and near field communication (NFC) includes a loop antenna, and a dual loop antenna disposed at an inside and an outside of the loop antenna.
US09685987B2 Case for a hand held device
A housing assembly for a mobile device includes a cover formed from optically transmissive material, and opaque material formed over a portion of the cover. The opaque material is arranged to define a display portion which is optically transmissive. The housing assembly further includes a frame sized to receive the cover, and a first housing structured to couple with the frame, such that the cover, the frame, and the first housing are structured to define an enclosure sized to contain electrical components for the mobile device.
US09685981B2 Radio frequency system hybrid power amplifier systems and methods
Systems and method for improving operation of a radio frequency system are provided. One embodiment provides a radio frequency system that includes a first amplifier unit with a first logic gate, which receives an input analog electrical signal and a first bit of an amplifier control signal that enables or disables the first amplifier unit, and a first switching power amplifier that generates a first output analog electrical signal when enabled. The radio frequency system further includes a second amplifier unit with a second logic gate, which receives the input analog electrical signal and a second bit of the amplifier control signal that enables or disables the second amplifier unit, and a second switching power amplifier that generates a second output analog electrical signal when enabled. The first amplifier unit and the second amplifier unit are electrically coupled to enable the first output analog electrical signal and the second output analog electrical signal to be combined.
US09685980B2 Transmitting apparatus and interleaving method thereof
The transmitting apparatus includes: an encoder configured to generate a Low Density Parity Check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a plurality of modulation symbols, wherein the modulator is configured to map bits included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of each of the modulation symbols.
US09685974B1 Switched capacitor circuit
A switched capacitor circuit includes a first sampling circuit having a first sampling capacitance element. The first sampling circuit receives an input voltage and outputs a sampled voltage according to a first sampling operation. A quantizer quantizes the sampled voltage output from the first sampling circuit and outputs a quantized value corresponding to the sampled voltage. A digital-to-analog converter outputs an analog signal in accordance with the quantized value from the quantizer. A first logic circuit outputs an instruction to start a sampling operation of a second sampling circuit, which is configured to sample the analog signal output from the digital-to-analog converter, when the quantizer completes quantization of the sampled voltage.
US09685973B2 Successive approximation register (SAR) analog-to-digital converting circuit and method thereof
A successive approximation register (SAR) analog-to-digital converting method includes executing a sampling operation and a comparing operation according to a conversion clock by using an SAR analog-to-digital converter (ADC) to convert an analog input signal into a digital output signal, and resetting a sampling and digital-to-analog converting circuit of the SAR ADC when a SAR procedure of the comparing operation is completed.
US09685968B2 A/D converter circuit and semiconductor integrated circuit
An analog-to-digital converter circuit having a simple design and capable of preventing an increase in surface area and other problems. An analog-to-digital converter circuit for converting an analog input signal to a digital quantity includes an analog-to-digital converter unit that converts analog input signals to pre-correction digital values, and a corrector unit that digitally corrects the pre-connection digital values output from the analog-to-digital converter unit. The corrector unit includes a weighting coefficient multiplier unit that outputs a post-correction digital value obtained by multiplying the weighting coefficients provided for each bit by each bit of the pre-correction digital value output from the A/D converter unit and summing them, and a weighting coefficient search unit that searches for weighting coefficients so as to minimize an error signal generated based on the post-correction digital value and an approximate value for the post-correction digital value.
US09685966B2 Fractional dividing module and related calibration method
A fractional dividing module includes an output clock generating circuit, for receiving an input clock signal and generating an output clock signal according to a first control signal, comprising a first delay unit, for delaying the input clock signal to generate a delayed input clock signal; and a selecting unit, for selecting one of the input clock signal and the delayed input clock signal to generate the output clock signal according to the first control signal; and a control circuit, for dividing the output clock signal to generate the first control signal according to a dividing control signal, wherein the dividing control is adjusted to control a frequency ratio between the output clock signal and the input clock signal.
US09685965B2 Electronic circuit for controlling an oscillator, and related method
An electronic circuit is described including an oscillator generating an oscillating signal having a cycle responsive to an input signal, a voltage detector producing a detection signal responsive to a power supply voltage, a frequency divider generating a frequency-divided signal obtained by dividing a frequency of the oscillating signal by a frequency-division ratio responsive to the detection signal, and an adder obtaining a sum of a first signal and a second signal and to supply a signal responsive to the sum to the oscillator as the input signal. The first signal is responsive to a difference in phase between the frequency-divided signal and a reference signal, and the second signal is responsive to the detection signal. A related method is also described.
US09685960B2 Method and apparatus for generating a bit stream signal having a reduced output swing
An automotive radar apparatus includes a bit stream modulation circuit configured to generate a bit stream signal at an output thereof and a driver circuit having an input coupled to the output of said bit stream modulation circuit and configured to generate a corresponding driver bit stream signal having a reduced output swing at the driver circuit output. Also included is a filter circuit having an input coupled to the output of said driver circuit and configured to generate a filtered bit stream signal at the filter circuit output. Additionally included is a VCO having an input coupled to the output of said filter circuit and configured to generate an RF output signal at the VCO output. A corresponding method is also provided.
US09685959B2 Method for speeding up boolean satisfiability
A method for transforming a tautology check of an original logic circuit into a contradiction check of the original logic circuit and vice versa comprises interpreting the original logic circuit in terms of AND, OR, MAJ, MIN, XOR, XNOR, INV original logic operators; transforming the original circuit obtained from the interpreting, into a dual logic circuit enabled for a checking of contradiction in place of tautology and vice versa, by providing a set of switching rules configured to switch each respective one of the original logic operators INV, AND, OR, MAJ, XOR, XNOR, MIN into a respective switched logic operator INV, OR, AND, MAJ, XNOR, XOR, MIN; and complementing outputs of the original circuit by adding an INV at each output wire. The method further provides testing in parallel the satisfiability of the original logic circuit, and the satisfiability of the dual logic circuit with inverted outputs. Responsive to one of the parallel tests finishing, the other parallel test is caused to also stop.
US09685954B2 Pure memristive logic gate
According to an embodiment of the invention there is provided a device and method. The device may include a pure memristive logic gate, wherein the pure memristive logic gate consists essentially of at least one input memristive device and an output memristive device that is coupled to and differs from the at least one memristive device; wherein the pure memristive device is controlled by a single control voltage.
US09685950B2 Energy-saving electronic touch switch
The present invention discloses an energy-saving electronic touch switch, comprising a touch sensing module, a power supply module and a switch driving module, wherein the touch sensing module is used for receiving a touch sensing signal inputted by a capacitive touch switch, and controlling the action of the switch driving module according to the touch sensing signal, so as to switch on a power supply circuit for the load; and the power supply module feeds power to the touch sensing module. The touch switch can drive various loads and has a wider range of possible loads including inductive, capacitive or purely resistive loads and high-frequency switch power supply loads, such as energy-saving lights, AC (Alternating Current) motors, LEDs (Light Emitting Diodes) new light sources, common fluorescent lamps, and the like. The energy-saving electronic touch switch overcomes the disadvantages of small load range and weak load capacity of conventional switches. The energy-saving electronic touch switch employs chips with low power consumption such as LDO (Low Dropout Regulator) voltage regulator chips, touch chips, and the like, which can reduce the overall power consumption, wherein the overall power consumption is less than 2.2 mW and the single static overall power consumption is less than 10 mW (measured under an indicator lamp). The energy-saving electronic touch switch simplifies circuits and improves the power supply utilization rate.
US09685949B2 ESD protection circuit and RF switch
An ESD protection circuit is connected in parallel to a MIM capacitor between a first terminal and a second terminal. First Schottky diodes are connected in series to each other and have anodes connected on the first terminal side and cathodes connected on the second terminal side. Second Schottky diodes are connected in series to each other and connected in anti-parallel to the first Schottky diodes. When an RF signal is inputted to neither the first terminal nor the second terminal, the first terminal has a higher DC voltage than that of the second terminal. The number of the first Schottky diodes is greater than the number of the second Schottky diodes. The number of the second Schottky diodes is set such that an amplitude of the RF signal does not attenuate to predetermined amplitude of the RF signal when the RF signal passes through the MIM capacitor.
US09685945B2 Electric circuit
An electric circuit includes: a plurality of switching elements connected in parallel to each other, the plurality of switching elements including a first switching element and a second switching element; a control voltage application element applying a control voltage to a connection point at which respective gates of the plurality of switching elements are connected to each other; a connection point grounding element grounding the connection point; and a control circuit configured to put the first switching element into an ON state and maintain the second switching element in an OFF state during a stand-by period, and put the second switching element into an ON state after an elapse of the stand-by period.
US09685944B1 Semiconductor integrated circuit and high frequency antenna switch
An integrated circuit includes a drive circuit with a first inverter circuit with a first transistor of a first conductivity type and a second transistor of a second conductivity type. The drains of the first and second transistors are connected. An output circuit is provided having a third transistor of the second conductivity with a gate connected to the drains of the first and second transistors. A capacitor is connected between the gate and a drain of the third transistor and has a capacitance greater than 0.5 pF and less than or equal to 3.0 pF. A gate width of the first transistor when divided by a gate width of the third transistor has a value of less than 1/100. The output circuit is configured to output a transmission signal from the drain of the third transistor.
US09685942B2 Circuit arrangement for the protection of at least one component of a two wire electrical current loop
A circuit arrangement for the protection of at least one component of a two wire electrical current loop, which is connected in series with a burden to an AC/DC electrical current source. The two wire electrical current loop has a rectifier a clock signal producer and a switch. The rectifier forms a DC circuit, wherein the component is connected in the DC circuit and wherein the clock signal producer outputs a clock signal to the switch for clocking the DC circuit. The circuit arrangement has a diode, wherein the conduction direction of the diode points from the anode of the diode to the cathode of the diode. The cathode of the diode is connected to the DC circuit, and the anode of the diode is supplied with a periodic or constant voltage from a first voltage source, and the voltage is at least periodically greater than a predetermined threshold value.
US09685940B2 Voltage comparator
Systems and methods for powering up circuits are described herein. In one embodiment, a method for power up comprises comparing a voltage of a first supply rail with a voltage of a second supply rail, and determining whether the voltage of the first supply rail is within a predetermined amount of the voltage of the second supply rail for at least a predetermined period of time based on the comparison. The method also comprises initiating switching of a plurality of switches coupled between the first and second supply rails upon a determination that the voltage of the first supply rail is within the predetermined amount of the voltage of the second supply rail for at least the predetermined period of time.
US09685935B2 Tunable transmon circuit assembly
Systems and methods are provided for a tunable transmon qubit. The qubit includes a first Josephson junction on a first path between a transmission line and a circuit ground and second and third Josephson junctions arranged in parallel with one another on a second path between the transmission line and the circuit ground to form a direct current superconducting quantum interference device (DC SQUID). The DC SQUID is in parallel with the first Josephson junction. A capacitor is arranged in parallel with the first Josephson junction and the DC SQUID on a third path between the transmission line and the circuit ground as to form, in combination with the first path, an outer loop of the tunable transmon qubit. A bias circuit is configured to provide a constant bias flux to one of the DC SQUID and the outer loop of the tunable transmon qubit.
US09685934B2 Multi-bit flip-flop with soft error suppression
A multi-bit flip-flop includes at least two storage stages. Each of the storage stages includes redundant latches to suppress state corruptions resulting from soft error upset at the storage stage. In addition, the multi-bit flip-flop includes a split clock path that routes different shared clock signals that control the timing of the latches. The shared split clock path reduces or eliminates the impact of soft errors on the clock signals, thereby further limiting the impact of such errors on data stored at the flip-flop. In particular, the split clock path can be distributed over disparate cells in a layout of multi-bit flip-flop, thereby reducing the likelihood that a transient charge will cause a soft error in all paths of the split clock path.
US09685933B2 Notch filter for ripple reduction
A notch filter is controlled synchronously with a chopper to filter out chopping ripple. In one embodiment, the notch filter is coupled to the differential output of the chopper and includes a sampling capacitor, a hold capacitor, and a second set of switches between the sampling capacitor and the hold capacitor. The second set of switches is temporarily closed once per chopper switching cycle to transfer charge from the sampling capacitor to the hold capacitor such that the ripple from the chopper is not transferred to the hold capacitor. The voltage across the hold capacitor may be coupled to any other circuit, such as to the differential inputs of an amplifier.
US09685932B2 Apparatus and methods for enhancing bandwidth in trench isolated integrated circuits
Provided herein are apparatus and methods for enhancing bandwidth in trench isolated integrated circuits. In certain configurations, an auxiliary trench forming floating regions between moat isolation regions can isolate parasitic sidewall capacitances of active device regions from ground or AC ground. In this manner the active device regions are merged by the auxiliary trench so as to improve circuit bandwidth and enhance circuit performance. When arranged or combined within a circuit branch, transistors within each floating moat can operate with relatively small parasitic displacement current and can have improved performance.
US09685931B2 High accuracy millimeter wave/radio frequency wideband in-phase and quadrature generation
Certain aspects of the present disclosure provide circuits for generating high accuracy millimeter wave or radio frequency (RF) wideband in-phase (I) and quadrature (Q) oscillating signals having acceptable amplitude and phase mismatch over process, voltage, and temperature (PVT) variations with reduced cost, area, and power consumption. In one example apparatus, a polyphase filter having a first stage and a second stage is provided. Each stage comprises resistive elements and capacitive elements. Certain aspects of the present disclosure provide for intentional resistive and/or capacitive value mismatch between the resistive or capacitive values of one or multiple stages such that the phase mismatch between the resulting I and Q signals may be reduced without degrading the amplitude mismatch. Certain aspects of the present disclosure provide for replacing the resistive elements in at least one stage with transistors operating in the triode region, where the on-resistance is controlled by a feedback network.
US09685929B2 MEMS/NEMS device comprising a network of electrostatically actuated resonators and having an adjustable frequency response, notably for a band-pass filter
A MEMS/NEMS device having an adjustable frequency response comprises an array of electrostatically actuated resonators, an electrostatic actuation circuit, electrical detection means, and means adjusting the frequency response of the resonators. The device comprises resonators having a movable portion, electrically connected in series between a first biasing potential VB and a second biasing potential VB2, each resonator biased to a potential Vi between VB and VB2, depending on position in the series. The electrostatic actuation circuit comprises, for each resonator, an actuation electrode facing the movable portion, all electrodes being connected in parallel to a common control potential VIN, the actuation voltage of each resonator being equal to VIN−Vi. The detection means comprises a detection output common to all resonators, the output being connected to an output potential Vout. The means for adjusting the frequency response varies the common control potential and/or at least one of the biasing potentials.
US09685927B2 Genetic EQ-setup
A method of adjusting an audio signal equalizer setting. A first and a second equalizer setting are selected from a population of equalizer settings for undergoing a binary comparing decision. The two equalizer settings are presented to a user by consecutively replaying an audio signal filtered by an equalizing unit according to the first or to the second equalizer setting respectively. The user's binary comparing decision between the first and the second equalizer setting according to his preferences is acquired. Further binary comparing decisions are performed until all members of the settings population have been part of a binary comparing decision. A score for the each presented equalizer settings is adapted based on the user's binary comparing decisions results. A weighted averaging is performed, based on the scores, in the frequency domain between the equalizer settings that received a high score, to obtain the result of the equalizer adjustment method.
US09685916B2 Audio interface circuits and methods
In one embodiment, an electronic device includes an audio connector port comprising a ground terminal and one or more audio output terminals, a first audio amplifier coupled to one of the audio output terminals, and a multiplexer having an output terminal coupled to the input terminal of the first audio amplifier. Sense circuits inside the electronic device may be alternately coupled through the multiplexer and first audio amplifier so that, in a first mode of operation, the multiplexer couples the audio signal to the first audio output terminal, and in a second mode of operation, the multiplexer couples an analog voltage corresponding to an internally sensed value to the first audio output terminal. Use of the audio connector and audio circuitry to access internal electrical parameters may facilitate testing and analysis of internal systems.
US09685911B2 Power amplifier module
In a power amplifier module for performing slope control of a transmitting signal, a gain variation due to a variation in battery voltage is suppressed while suppressing an increase in circuit size. The power amplifier module includes: a first regulator for outputting a first voltage corresponding to a control voltage for controlling a signal level; a second regulator for outputting a second voltage that rises as a battery voltage drops; a first amplifier supplied with the first voltage as a power-supply voltage to amplify an input signal and output an amplified signal; and a second amplifier for amplifying the amplified signal, wherein the second amplifier includes a first amplification unit supplied with the second voltage as the power-supply voltage to amplify the amplified signal, and a second amplification unit supplied with the battery voltage as the power-supply voltage to amplify the amplified signal.
US09685908B1 Variable capacitor used in integrated circuit of differential structure
The present invention related to a varactor used in an integrated circuit of a differential structure. An exemplary embodiment of the present invention provides a variable capacitor connected between first and second signal lines which are differential signal lines included in an integrated circuit of a differential structure, including: a plurality of N-type semiconductors separately arranged; one or more P-type semiconductors disposed between the N-type semiconductors to make first and second PN junctions with N-type semiconductors contacting upper and lower portions thereof and to receive a control voltage, wherein, among the N-type semiconductors, first N-type semiconductors corresponding to (2n−1)-th (n being a positive integer) are connected with the first signal line, and second N-type semiconductors corresponding to 2n-th are connected with the second signal line, and parasitic capacitances of the first and second PN junctions are varied by adjusting the control voltage.
US09685906B2 Photoluminescence mapping of passivation defects for silicon photovoltaics
Methods for fast and accurate mapping of passivation defects in a silicon wafer involve capturing of photoluminescence (PL) images while the wafer is moving, for instance, when the wafer is transported on a belt in a fabrication line. The methods can be applied to in-line diagnostics of silicon wafers in solar cell fabrication. Example embodiments include a procedure for obtaining the whole wafer images of passivation defects from a single image (map) of photoluminescence intensity, and can provide rapid feedback for process control.
US09685902B2 System and method for controlling the power supply of an electric machine on the basis of the temperature thereof
A control system for controlling power supply of an electric machine of an automobile and which contributes to movement thereof, wherein the control system is connected, at an input thereof, to a mechanism estimating a temperature of a rotor of the electric machine and to a temperature sensor measuring a temperature of a stator of the electric machine. The control system includes mappings of a set of values for allocating supply currents of the electric machine on the basis of torque and rotational speed request values received at the input of the control system, and includes a switching mechanism for selecting the mapping, the supply current signals of which are transmitted to the electric machine, on the basis of the signals from the mechanism estimating the temperature of the rotor and from the stator-temperature sensor.
US09685896B2 Stepper motor control and fire detection system
Controlling a stepper motor. A stepper motor is driven towards an index position. An attempt is made to stop the stepper motor on the index position in a fashion that would ordinarily cause the stepper motor to ring at the index position. Characteristics of one or more subsequent pulses that would counteract the ringing are determined. The one or more determined subsequent pulses are issued to the stepper motor.
US09685894B2 Brushless motor controller and control method
When a set duty Dt of a PWM signal is less than a minimum duty (Dmin) that allows for pulse induced voltage detection, the PWM signal in which a duty D1 during a predetermined period is limited to Dmin and in which a duty D2 during the other period is adjusted so as to satisfy Dt=(D1+D2)/2 is applied to the switching elements connected to one of the two phases. When the duty D2 during the other period takes a negative value, the pulse-voltage application target during the other period is changed to the switching elements connected to the other of the two phases, and the duty D1 during the predetermined period is corrected and increased so as to compensate for an actual drop in the duty D2 during the other period corresponding to a dead-time period in a complementary PWM method.
US09685890B2 Flow induced electrostatic power generator for tubular segments
The present invention is directed to methods for harnessing flow-induced electrostatic energy in a tubular length and using this energy to power electrical devices (e.g., flowmeters, electrically-actuated valves, etc.). The present invention is also directed to corresponding systems through which such methods are implemented.
US09685888B2 Semiconductor module, upper and lower arm kit, and three-level inverter
A semiconductor module, an upper and lower arm kit, and a three-level inverter can be provided at low cost and with broad current ratings and voltage ratings using existing packages, without developing new packages. A first semiconductor module (100) on an upper arm side and a second semiconductor module (200) on a lower arm side are made using an existing package, and the semiconductor modules (100) and (200) are used to configure an upper and lower arm kit (300). Further, the upper and lower arm kit (300) is used to configure a three-level inverter (500). These devices can be formed using existing packages (56), and semiconductor modules (100), (200), the upper and lower arm kit (300), and the three-level inverter (500) can be therefore provided at low cost and with broad current ratings and voltage ratings.
US09685885B2 Power conversion apparatus with an inverted-voltage generation circuit
A power conversion apparatus 1 according to an embodiment of the present invention includes a high-voltage side input terminal TIH and a low-voltage side input terminal TIL, first and second output terminals TO1 and TO2, a power conversion circuit 10 that converts direct-current power input between the high-voltage side input terminal TIH and the low-voltage side input terminal TIL to generate alternating-current power between the first and second output terminals TO1 and TO2, and an inverted-voltage generation circuit 30 that generates an inverted voltage of a common mode voltage generated between the first and second output terminals TO1 and TO2 and inputs the inverted voltage to the low-voltage side input terminal TIL.
US09685881B2 AC-DC rectifier system
According to one aspect, embodiments of the invention provide a method for operating an AC-DC rectifier, the method comprising receiving, with a converter, input AC power having an input AC voltage waveform, controlling, during a positive half line cycle of the input AC voltage waveform, the converter to couple a second DC bus to ground, controlling, during the positive half line cycle of the input AC voltage waveform, the converter to maintain a positive DC link voltage on a first DC bus, controlling, during the positive half line cycle of the input AC voltage waveform, output circuitry to charge a first output capacitor and provide a positive output voltage to a positive output, and discharging, during the positive half line cycle of the input AC voltage waveform, a second output capacitor to provide a negative output voltage to a negative output.
US09685880B2 Power converters
A power conversion device includes a winding portion and a core portion. The winding portion can be embedded within a plurality of layers of a system printed circuit board. The core portion can be located within one or more elements of the power conversion device that are separate from the system printed circuit board.
US09685873B2 Power supply device, image forming device, and electronic appliance
This invention is concerning a power supply device that includes a cut-off unit configured to cut off voltage to be applied to a primary winding of a transformer and a coil added in series with the primary winding of the transformer, a first circuit configured to cause, in a case where the voltage to be applied is cut off by the cut-off unit, current to flow in such a way that energy accumulated in the transformer is led to a capacitor, and a second circuit configured to clamp, in a case where the voltage to be applied is cut off by the cut-off unit, voltage of the primary winding and the coil.
US09685871B2 Switching power supply apparatus and semiconductor device
A switching power supply apparatus includes a PFM control circuit that outputs a clock signal Set such that a switching frequency of a switching element varies in accordance with a load state. The clock signal Set determines a turn-on timing of the switching element. A reference value of a current flowing through the switching element determines a turn-off timing of the switching element. A modulation signal is applied to the turn-off timing of the switching element to modulate one of a peak value of a drain current flowing through the switching element and an on-time of the switching element. Input control is performed separately on the clock signal Set and the modulation signal. Accordingly, even when the clock signal Set and the modulation signal contribute to each other to offset each other, modulation effects are not cancelled.
US09685868B2 Synchronous rectifier for buck converter without the need for a comparator
A switch mode power supply, which functions in a continuous current mode and a discontinuous mode employing a zero crossing control circuit for determining a polarity of an inductor current and from the polarity of the inductor current, controlling an operational state of a switching section of the switch mode power supply such that the inductor current becomes approximately zero amperes at the end of each demagnetization phase of operation.
US09685867B2 Electrical power supply
A method supplies power from a power source to a load. The method includes, in a first mode, electrically coupling a step-down converter node of a step-down converter alternately to the power source via a conductive bypass path that bypasses a step-up converter and to ground. The step-up converter has an input electrically coupled to the power source and the step-down converter has an output electrically coupled to the load. The method further includes, in a second mode, coupling the step-down converter node alternately to the power source via the bypass path and to an output of the step-up converter.
US09685865B2 Power-supply apparatus having a high-side transistor and a low-side transistor
A power-supply apparatus according to an aspect includes an inductor, a transistor that supplies, in an on-state, a current to the input side of the inductor, a second transistor that becomes, when the first transistor is in an off-state, an on-state and thereby brings the input side of the inductor to a predetermined potential, a signal generation unit that generates voltage signals corresponding to a current flowing to the inductor, an amplifier that outputs a current according to the voltage signals, a converter that converts the current output from the amplifier into a voltage signal, and a control unit that controls the transistors based on a first feedback signal corresponding to the voltage on the output side of the inductor and the voltage signal, which is used as a second feedback signal.
US09685856B2 Charge pump circuit
A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.
US09685855B2 Amplifier circuit and methods of operation thereof
A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.
US09685851B2 Magnetic drive systems
A magnetic drive system comprising three members, a first and second of which form an input member and an output member each arranged to rotate relative to the third member, wherein two of the members have respective sets of permanent magnets, the two sets having different numbers of magnetic poles, and the other of the members comprises a cylindrical body having a plurality of pole pieces embedded therein, the pole pieces being arranged to modulate the magnetic field acting between the magnets, and wherein one of the pole pieces is of varying radial thickness.
US09685850B2 Voice coil motor and direct-acting servo valve using the voice coil motor
A voice coil motor 2 using a Dual Halbach Magnet Array has an outer magnet array 5 and an inner magnet array 6, wherein the inner magnet array 6 comprises axially magnetized magnets 6A, 6C and 6E and radially magnetized magnets 6B and 6D. Each of the axially magnetized magnets 6A, 6C and 6E of an inner magnet array 6 is formed of a monolithic magnet having ring-shape, whereas each of the radially magnetized magnets 6B and 6D of the inner magnet array 6 is formed of a plurality of split magnets divided in a circumferential direction. A fixing means 13 is provided to fix the radially magnetized magnets 6B and 6D and the axially magnetized magnets 6A, 6C and 6E of the inner magnet array 6 in an axially clamped manner.
US09685846B2 Stator or rotor of an electrical machine having basic and special bar conductors with multiple pitches
The present technology contemplates a stator or rotor of an electric machine comprising a main cylindrical body with a circular array of slots; at least one bar winding comprising a first and second plurality of basic conductors and a second plurality of special conductors. The first and second circular array comprise a first and second arc of legs of the first and second set of said conductors which are inserted as well as legs of the conductors. The present technology also contemplates electric machines and electric or hybrid drive vehicles comprising such stators of rotors.
US09685844B2 Motor and method of manufacturing motor
A motor may include a stator having coil groups of plural phases and a connector, the stator comprising a plurality of split stators. Each of the split stators may include a split core having an arc-shaped core back section and a tooth section, an insulator, a coil which has a lead-out line that is connected to the connector. The insulator may have a first void extending between a first inner wall and a first outer wall. The first inner wall may have a lead-in groove. The stator may have a support ring disposed on the upper side of the first void. The support ring may have a second void extending between a second inner wall and a second outer wall. A plurality of lead-out lines of different phases may respectively accommodated in the first void and the second void.
US09685843B2 Grounding device for electric machine and methods of assembling the same
A grounding device for an electric machine, having a rotating component and a stationary component, includes a core fabricated from a non-conductive material and a plurality of conductive fibers coupled to the core and extending therefrom. The plurality of conductive fibers are configured to electrically couple the rotating component with the stationary component such that an electrostatic charge on the rotating component is directed through the plurality of conductive fibers to the stationary component.
US09685841B2 Resettable electro-mechanically actuated connection unit for generators
An electrical generating system for an aircraft may include a first shaft connected with an engine gearbox, a second shaft connected with a generator of the aircraft, and a connection unit in which the first and second shafts are selectively engageable with one another. The connection unit may include a solenoid coil, an armature co-axial with the first and the second shafts, a plurality of balls positioned around the armature. The armature may include a first cylindrical segment and a second cylindrical segment. The armature may be selectively movable between a first axial position and a second axial position. When the armature is in a first axial position, the balls are positioned to transmit torque forces between the first shaft and the second shaft. When the armature is in a second axial position, the first shaft and the second shaft are free to rotate independently.
US09685839B2 Bearing implementation for a rotating electrical device
In one embodiment, an electric motor includes at least three bearings. The ball bearing utilized in the three bearings may be sized based on benchmark surface areas associated with the ball bearing utilized in a conventional electric motor having two bearings. Moreover, a technique may be implemented to reduce the diameter at a point on the shaft where a backup or second bearing makes contact with the shaft. When the motor begins to operate, for example, at a first time, the at least three bearings together handle a the load coming through the motor. When the front-most bearing degrades to a predetermined point or fails, for example, at a second time, the load transitions from the front most bearing to the second or backup bearing in the front plate.
US09685834B2 Outdoor fan motor and air-conditioning apparatus
In a motor, a connection portion between a lead wire and an aluminum wire is provided distant from a terminal block, with a leading end of a winding residing on one of cores that is not adjacent to a core that is at a position where the terminal block is provided.
US09685832B2 Stator insulator structure with reduced residual stress and improved durability
The electric motor includes a rotor and a stator, the stator having a conductive wire wound thereon via a stator core and insulators. The insulators include an annular outer peripheral wall portion with the conductive wire run on an outer periphery side of the peripheral wall portion, a plurality of winding body portions protruding radially from the outer peripheral wall portion, and an inner flange portion. The outer peripheral wall portion on the winding body portion side includes an outer peripheral surface formed in an arc shape. The radial thickness of the outer peripheral wall portion is increasingly greater toward the circumferential center of the winding body portions.
US09685828B2 Electric machine with multiple air gaps and a 3D magnetic flux
An electric machine includes a stator and a rotor, with the stator being equipped with at least one annular exciter unit that includes a coil and at least two annular yokes, with the rotor being equipped with a structure and at least one annular receiver unit. Each receiver unit includes at least two rows of magnets. Two sides of each yoke include teeth distributed angularly in a regular manner, and the teeth of the two adjacent yokes fit onto a face of the exciter unit, alternately forming north poles and south poles. Each row of the magnets is positioned opposite one face, forming an air gap with the exciter unit, with the electric machine thus including at least two air gaps, with a 3D magnetic flux thus circulating inside the said electric machine, dividing and regrouping itself in the vicinity of the magnets and of the yokes.
US09685817B2 Wireless power charging system
A wireless power charging system has a wireless power transmission apparatus formed to charge a plurality of wireless power receiving apparatuses located in a short distance therefrom, wherein the total charging time for the wireless power receiving apparatuses is saved. The wireless power transmission apparatus has a main control unit and a resonant converter unit, which transmit the electric signal to the wireless power receiving apparatus via the resonance signal generated from a primary charge core in order to charge the wireless power receiving apparatuses. The wireless power transmission apparatus also includes an output signal conversion module for transmitting a converted electric signal to the resonant converter unit and a received signal process module for processing a signal transmitted from the wireless power receiving apparatus.
US09685811B2 Wireless power receiver and controlling method thereof
Disclosed is a method for controlling a wireless power receiver including a charging unit. The method includes receiving wireless power, rectifying the received wireless power and outputting Direct Current (DC) wireless power, and determining whether the voltage of the rectified wireless power is greater than or equal to the allowable voltage of the charging unit.
US09685810B1 Fast charging of batteries
Disclosed are methods for intelligently charging a battery faster. In some embodiments, the method includes determining, by a computing device, a target state of charge (SOC) from a set of predefined SOCs, where at least one of the predefined SOCs is less than a 100% SOC. Further, the method includes determining, by the computing device, a state of a battery, where the state of the battery is indicative of one or more characteristics of the battery. Further, the method includes, based at least on the state of the battery, the computing device determining a pulse time and a rest time of a current for charging the battery to the target SOC. Yet further, the method may include the computing device charging the battery to the target SOC with the pulse time and the rest time of the current.
US09685800B2 Charging/discharging system
A charging/discharging device includes a charging/discharging connector that electrically connects a storage battery and the charging/discharging device, a cable that is connected to the charging/discharging connector at one end and is connected to the charging/discharging device at the other end, a power conversion unit, a control unit that controls an operation of the power conversion unit, and an abnormality detection unit that outputs an abnormality detection signal for stopping an operation of the power conversion unit to at least any of the control unit and the power conversion unit, when an output from a comparator and an ON signal from the control unit are input to an AND circuit.
US09685797B2 Systems and methods for balancing multi-cell batteries with a transformer and a rectifier circuit
Systems and methods for balancing multi-cell batteries are provided. In one embodiment, the battery balancing circuit includes a battery including a plurality of cells coupled in series, a first terminal and a second terminal, a transformer including a primary winding and a plurality of secondary windings, where each secondary winding is coupled to one of the plurality of cells via a secondary switch and a rectifier circuit, where the primary winding is coupled between the first terminal and the second terminal of the battery, a primary switch in series with the primary winding of the transformer, and a control circuitry coupled to the primary switch, the plurality of secondary switches, and each of the plurality of cells.
US09685796B2 Current balancing device for parallel battery cells in an electrified vehicle
A current equalizer is provided for first and second battery elements connected in parallel to supply a DC link. A first constant resistance carries a first current from the first battery element to the DC link. A first variable resistance is connected in parallel with the first constant resistance. A second constant resistance carries a second current from the second battery element to the DC link. A second variable resistance is connected in parallel with the second constant resistance. A balancer inversely adjusts the first and second variable resistances in response to relative magnitudes of the first and second currents. As a result, the total currents supplied from each battery element to the DC link are equalized because the effective total resistance in series with each battery element compensates for the difference in the internal battery resistances.
US09685795B2 Transmission-guard system and method for an inductive power supply
Wireless power transfer between a power transmitter and a power receiver may include a power transfer established by a detector of the wireless power transmitter detecting a magnetic field from a wireless power receiver in proximity to the wireless power transmitter and activating the wireless power transmitter to transfer power to the wireless power receiver.
US09685793B2 Method and system for a complementary metal oxide semiconductor wireless power receiver
Methods and systems for a complementary metal oxide semiconductor wireless power receiver may include a receiver chip with an inductor, a configurable capacitance, and a rectifier. The method may include receiving an RF signal utilizing the inductor, extracting a clock signal from the received RF signal, generating a DC voltage utilizing a rectifier circuit, sampling the DC voltage, and adjusting the configurable capacitance based on the sampled DC voltage. The rectifier circuit may include CMOS transistors and T-gate switches for coupling to the inductor. The T-gate switches may be controlled by the generated DC voltage. A signed based gradient-descent algorithm may be utilized to maximize the DC voltage. The DC voltage may be sampled utilizing a comparator powered by the DC voltage, which may adaptively configure the capacitance. The inductor may be shielded utilizing a floating shield. The DC voltage may be increased utilizing a voltage-boosting rectifier.
US09685791B2 Apparatus and method for controlling wireless power transfer to mobile devices
A system for controlling wireless power transfer to mobile devices is disclosed. The system includes a power transmitter configured to transmit power via a wireless coupling to the mobile devices. Each of the mobile devices includes a power receiver configured to receive the power from the power transmitter via the wireless coupling with the power transmitter. Each power receiver is configured to transmit control data modulated with a spreading code via the wireless coupling to the power transmitter.
US09685790B2 Maximum power point tracking for solar panels
Approximately one-half of the loss of delivered power from a solar panel having photovoltaic (PV) cells connected in series to form sub-panels due to shading is recovered at low hardware cost by connecting sub-panels in series and providing maximum power point tracking control in common for the series connected sub-panels such that the respective sub-panels produce equal voltages even in the presence of shading of a portion of one or more sub-panels. By doing so, the input voltage of respective power converters which control the voltage at which each sub-panel is operated can be placed close to the maximum power point of each sub-panel regardless of shading and maximum total power harvested even though the respective sub-panels are not operated at optimum voltages.
US09685788B2 Electric power control method and electric power control device
An electric power control method for an electric power load and an electric power storage device including assigning one of a peak shaving control or other services to at least one of time slots that are divided by a specific time unit, obtaining a consumption power of the electric power load of each of the time slots, determining power-purchase electric power according to the consumption power of each of the time slots, restricting a consumption power of the electric power load at one or more peak slots where the consumption power of the electric power load is more than or equal to a target power-purchase electric power upper limit, restricting the restricted consumption power of the electric power load and discharging the electric power storage device at one or more peak slots if the restricted consumption power of the electric power load is more than or equal to a target power-purchase electric power upper limit and the peak shaving is assigned.
US09685787B2 Metering optimal sampling
The present disclosure is directed to providing voltage via a power distribution system. A computing device receives delivered voltage information from metering devices metering power distributed to sites by a controller. The computing device determines a number of metering devices to use to generate a control signal to control operation of the controller. The number can be determined based on the delivered voltage information for each site. The computing device selects, based on the delivered voltage information, at least the determined number of metering devices to form a subset of metering devices for a subset of sites. The computing device uses the delivered voltage information of the subset of metering devices to generate the control signal. The control signal can control operation of the at least one controller distributing power to the plurality of sites.
US09685781B2 Solar photovoltaic system and a method for energy harvest optimization thereof and a method for fault detection thereof
This invention provides a solar photovoltaic system, comprising: a plurality of photovoltaic assemblies, for harvesting solar energy to generate DC currents; a plurality of micro-optimizers having input terminals coupled to the photovoltaic assemblies and having output terminals connected in series with each other, for optimizing output currents and/or output voltages of the photovoltaic assemblies, to generate maximum power; a manager configured to communicate with the plurality of micro-optimizers, for managing operating states of the micro-optimizers; and an inverter coupled to one or more strings of the micro-optimizers, for converting the optimized DC currents into AC currents and outputting the AC currents to a power grid. This invention further provides a method for energy harvest optimization and a method for fault detection of a solar photovoltaic system.
US09685775B2 Variable electric field balancing device
Variable electric field balancing device formed by a hollow assembly that, with geometric shapes that can be different on the outside, includes an upper passive capture element (2), as a capture electrode, a lower passive capture element (3), as a reception electrode, and an insulator element (4) that keeps them separated from each other at a distance (d) dependent on the conductivity coefficient of the materials, and that, also, externally covers the lower element (3) like a skirt to the lower base of the same, preventing the impact of a lightning bolt on the lower element (3) from being able to induce the generation of an upward leader, and there is also an expansion and compression valve (5) that connects the outside to the inside of the hollow assembly and which expands in phases of passage of current and/or absorption of external induced surges, and compressed at the end of the compensation of the field.
US09685774B1 Storage tank with bypass conductor cable
A lightning protection system for liquid storage tanks having floating roofs wherein lightning energy is not directed into the shell of the storage tank. The lightning protection system includes at least one low-resistance low-impedance bypass conductor cable configured for lightning related frequencies and for routing lightning energy and for bounding charges away from the shell of the storage tank.
US09685770B2 Vacuum wall-through structure
Disclosed is a vacuum wall-through structure to be installed in a hole formed in a wall of a vacuum chamber. The vacuum wall-through structure includes a cable holder that holds a cable at the center thereof and a cable holder cover installed outside the cable holder.
US09685769B2 Wire splicing device, wire splicing method, and method for manufacturing splice structure
A wire connection device includes: a holding base which is provided with a wire accommodation groove having a width, the wire accommodation groove being configured to accommodate a plurality of wires; a pressing plate which is positioned above the holding base; a heating body which is positioned above the pressing plate and includes a heating member; a first driver which drives the holding base and the pressing plate away from or toward one another; and a second driver which drives the holding base and the heating body toward or away from one another, in which the pressing plate which is driven toward the holding base by the first driver presses together the plurality of wires accommodated in the wire accommodation groove with solder interposed therebetween.
US09685768B2 Spout for switchgear, switchgear having spout, and method thereof
A spout for a connection between a bus bar and a circuit breaker in switchgear includes a housing and a fixed contact. The housing is formed of insulative material and includes a tubular body having an inner cavity and a radial first ventilation opening, a base portion having a first longitudinal opening, and a fixed contact receiving portion having a second longitudinal opening. The fixed contact is formed of a conductive material, has an outer contact surface exposed through the second longitudinal opening, and forms a portion of an outer surface of the spout. A switchgear includes a wall dividing a circuit breaker compartment from a bus bar compartment, and the base portion of the spout is securable to the wall. A method of increasing heat dissipation within switchgear using the spout includes securing a bus bar to the outer contact surface, and dissipating heat through the radial ventilation opening.
US09685767B2 Corona ignition device with improved seal
An electrically conductive glass seal for providing a hermetic bond between an electrically conductive component and an insulator of a corona igniter is provided. The glass seal is formed by mixing glass frits, binder, expansion agent, and electrically conductive metal particles. The glass frits can include silica (SiO2), boron oxide (B2O3), aluminum oxide (Al2O3), bismuth oxide (Bi2O3), and zinc oxide (ZnO); the binder can include sodium bentonite or magnesium aluminum silicate, polyethylene glycol (PEG), and dextrin; the expansion agent can include lithium carbonate; and the electrically conductive particles can include copper. The finished glass seal includes the glass in a total amount of 50.0 to 90.0 weight (wt. %), and electrically conductive metal particles in an amount of 10.0 to 50.0 wt. %, based on the total weight of the glass seal.
US09685766B2 Multiwavelength quantum cascade laser via growth of different active and passive cores
Disclosed is a method of forming a laser source capable of producing mid-IR laser radiation comprises growing a first core structure on a substrate, etching away the first core structure in one or more locations, and growing a second core structure on the substrate. At least one of the core structures comprises a quantum cascade gain medium emitting at a frequency within the range from 3-14 μm. Also disclosed is a laser source capable of producing mid-IR laser radiation comprising a quantum-cascade core positioned on a substrate for emitting within the range from 3-14 μm and a second core on the substrate positioned in-plane relative to the first core. The second core is one of a) a passive waveguide core b) a second quantum-cascade core and c) a semiconductor active core region.
US09685760B1 Programmable continuous wave high power laser diode system
The present invention provides a programmable continuous wave high power laser diode system, which comprised digital control unit, a switch module unit, and a latch current controlling unit so as to provide user to set the latch current of the high power laser diode via the digital control unit controlling the switch module unit and the latch current controlling unit, therefore, the laser diode system includes advantages of high system efficiency, reliability, low output ripple current range and fast switching reaction time.
US09685755B2 Laser system with wavelength converter
A method of controlling beam quality and stability of a laser apparatus, the laser apparatus comprising, a diode laser (10) providing first radiation of at least a first wavelength, and a frequency conversion unit (12) configured to frequency-convert the first radiation from the diode laser and to output the frequency-converted radiation (213), the frequency-converted radiation having at least a second wavelength different from the first wavelength, the diode laser (10) comprising at least a first and a second section (222,223), a first contact (220) for injecting a first current (I1) into the first section (222), a second contact (221) for injecting a second current (I2) into the second section (223), and means for controlling a temperature of the diode laser; wherein the method comprises monitoring a first parameter indicative of the power content of a dominant lobe of the first radiation; iteratively determining a combination of respective values of the first current, the second current and the temperature at which combination of respective values the monitored first parameter and a stability parameter indicative of a fluctuation over time of the monitored first parameter each fulfills a respective predetermined optimization criterion; and setting the first current, the second current, and the temperature to the determined combination of respective values.
US09685754B2 Optical scanning
A device for generating temporally distant light pulses is provided, the device including at least a first light source for generating a first sequence of light pulses at a first repetition rate, and a second light source for generating a second sequence of light pulses at a second repetition rate. In some embodiments the device includes at least one actuator element which influences the first and/or the second repetition rate, and a control element which charges the actuator element with a periodical modulation signal for periodical variation of the first and/or second repetition rate. A control circuit is also provided including at least a phase detector, a corrective element, a control element, and a superposition element that forms an actuator signal from a modulation signal and an output signal of the control element, and which charges the actuator element with the actuator signal.
US09685751B2 Electrical connector
An electrical connector comprises a first terminal module, a second module and a shell. The first terminal module has a first insulator and a plurality of first terminals embedded in the first insulator. The first insulator has a first vertical portion, a first horizontal portion and a first tongue plate. The second terminal module has a second insulator and a plurality of second terminals embedded in the second insulator. The second insulator has a second vertical portion, a second horizontal portion and a second tongue plate. The second vertical portion and the second horizontal portion are separated from each other, and the second terminal connects the second vertical portion with the second horizontal portion.
US09685745B2 Connector terminal
A connector terminal includes a terminal body operable to be inserted into a terminal space formed in a housing, and an elastic contact piece arranged in the terminal body. The connector terminal contacts an inner peripheral surface of a cylindrical terminal while being inserted into the terminal space. The elastic contact piece includes a contact portion constituted of an arc surface, and also includes at least one projection formed on the contact portion, the at least one projection contacting an inner arc surface of the cylindrical terminal. The at least one projection extends in a length-wise direction of the cylindrical terminal.
US09685739B2 Electrical receptacle connector
An electrical receptacle connector includes a mount member received in a metallic shell. A tongue portion is integrally formed to a front portion of the mount member. A plurality of first receptacle terminals, a plurality of second receptacle terminals, and a grounding plate are held in the mount member and the tongue portion. The front ends of the first and second receptacle terminals are respectively inserted into two opposite surfaces of the tongue portion. Therefore, the first receptacle terminals, the second receptacle terminals, and the grounding plate are positioned with each other securely. Accordingly, when the connector is impacted by an external force, the components of the connector would not be detached from each other easily.
US09685734B1 Automatic power line disconnect apparatus
A power line disconnect apparatus includes a housing; an electrical connector that projects from a surface of a connector plate coupled to the housing, the electrical connector configured to receive a plug of a power cable; an ejector pin configured to project through a first aperture in the connector plate and eject the plug from the electrical connector; a microswitch configured to activate and deactivate a power circuit associated with the power cable; and a sensor pin configured to project through a second aperture in the connector plate, the sensor pin having a sensor pin extension, the sensor pin extension configured to control the microswitch.
US09685718B1 Connector structure
A connector structure includes a first connecting component, a rigid circuit board and a second connecting component. The first connecting component includes a first main body whereon a slot is formed, and a plurality of first terminals disposed on the first main body. Each first terminal includes a contacting portion extending into the slot, and a welding portion protruding out of the first main body. The rigid circuit board is assembled into the slot and contacts the contacting portions of the plurality of first terminals. The second connecting component is installed on the rigid circuit board and electrically connected to the plurality of first terminals. The second connecting component includes a second main body, a shielding plate, a plurality of second terminals and a metal shell. The second connecting component, the rigid circuit board and the first connecting component are cooperatively formed in a reverse L-shaped structure.
US09685717B2 Apparatus and method for a conductive elastomer on a coaxial cable or a microcable to improve signal integrity probing
A method and structure for improving signal integrity probing. A coaxial or a microcoaxial cable is threaded through an optional alignment substrate where the cable is used to support or align the cable or an array of cables. A conductive elastomer is placed on a cable or a microcoaxial cable to improve signal integrity probing.
US09685713B2 Antenna device
An antenna device capable of performing precise positioning by using a small number of components and having a low side-lobe characteristic is provided. An antenna device includes a primary radiator (3), a main-reflector (2), a sub-reflector (5), and a holding section (4) that fixedly maintains relative positions and directions of the sub-reflector (5) and the main-reflector (2). The holding section (4) includes a side part (42) in an integrated manner, the side part (42) being configured to enclose at least a part of a radio-wave path extending from the primary radiator (3) to the sub-reflector (5) as a shroud.
US09685712B2 Multi-band satellite antenna assembly with dual feeds in a coaxial relationship and associated methods
An antenna assembly includes a main reflector, and a subreflector spaced from the main reflector. The subreflector includes a frequency selective surface (FSS) material that is transmissive for a first frequency band and reflective for both a second frequency band and a third frequency band. A first antenna feed is adjacent the subreflector and is directed toward the main reflector. The first antenna feed is for the first frequency band. Second and third antenna feeds are arranged in a coaxial relationship adjacent the main reflector and are directed toward the subreflector. The second and third antenna feeds are for the second and third frequency bands, respectively.
US09685709B2 Method for designing a modulated metasurface antenna structure
A method for designing a surface pattern for an impedance surface which results in a position-dependent target impedance of said impedance surface, and the impedance surface having the position-dependent target impedance radiates a desired first-type electromagnetic field radiation in reaction to being irradiated by a second-type electromagnetic field radiation. The method includes obtaining a first modal representation on the basis of the first-type electromagnetic field radiation in terms of a set of base modes that are chosen in accordance with a model function of the position-dependent target impedance, and obtaining a second modal representation on the basis of the second-type electromagnetic field radiation and the model function in terms of the set of base modes. The method further includes obtaining a first position-dependent quantity indicative of the position-dependent target impedance on the basis of the first modal representation and the second modal representation by determining values for a plurality of parameters of the model function for maximizing an overlap between the first modal representation and the second modal representation, and obtaining, as the surface pattern, a second position-dependent quantity indicative of geometric characteristics of the impedance surface on the basis of the first position-dependent quantity and a relationship between geometric characteristics of the impedance surface and corresponding impedance values.
US09685708B2 Waveguide tube slot antenna and wireless device provided therewith
Provided is a waveguide tube slot antenna (1) including: a plurality of waveguides (2) arranged in parallel with each other; a plurality of radiating slots (3) formed along each of the plurality of waveguides (2); and a plurality of waveguide tubes (10) connected in parallel with each other, in which the plurality of waveguide tubes (10) each include a first waveguide tube forming member (11) and a second waveguide tube forming member (12) each having a transverse section having a shape with an end, the first waveguide tube forming member and the second waveguide tube forming member being configured to define one of the plurality of waveguides (2) by being connected to each other.
US09685705B2 Wide band antenna
A wide band antenna for interfacing an electronic device with a plurality of radio access technologies is provided. The antenna includes a first resonator and a second resonator. Both the first resonator and the second resonator are attached to an antenna feed structure. The length of the first resonator provides one mode of operation of the antenna, and the length of the second resonator provides a second mode of operation of the antenna. And a third mode of operation of the antenna is provided by mutual coupling and current flow between both the first resonator and the second resonator.
US09685701B2 High isolation antenna system
An antenna system supports a common resonance mode and differential resonance mode, each with approximately equal radiation resistance and bandwidth at a given operating frequency band. The antenna system includes a resonant antenna section, a counterpoise, and two antenna ports. The resonant antenna section includes two spaced-apart poles and a distributed network therebetween. Each of the poles has a proximal end connected to the distributed network and an opposite distal end. The distal ends of the poles are separated from each other by a distance of ⅓ to ⅔ of the electrical wavelength at the given operating frequency. Each of the two antenna ports is defined by a pair of feed terminals with one feed terminal located on the counterpoise and the other feed terminal located on a different one of the poles of the resonant antenna section. The resonant antenna section, counterpoise, and ports are configured such that a signal within the given operating frequency band applied to one port is isolated from the other port.
US09685695B2 Antenna system and antenna unit
An antenna system includes a case, an antenna configured for a first communication system, an inside orthogonal antenna configured for a polarization diversity communication system, and an outside orthogonal antenna configured for the polarization diversity communication system. The antenna for the first communication system and the inside orthogonal antenna are disposed inside the case such that a main radiation polarization plane of the inside orthogonal antenna is orthogonal to a main radiation polarization plane of the antenna for the first communication system. The outside orthogonal antenna is disposed outside the case such that a main radiation polarization plane of the outside orthogonal antenna is orthogonal to the main radiation polarization plane of the inside orthogonal antenna.
US09685694B2 Antenna module and mobile terminal using the same
The present disclosure relates to an antenna module and a mobile terminal having the same, and the antenna module may include a first conductive member connected to a feeding portion and a grounding portion, a second conductive member disposed to be separated from the first conductive member, a first connecting member configured to connect the first conductive member to the second conductive member at a position adjacent to the feeding portion, and a second connecting member configured to connect the first conductive member to the second conductive member at a position adjacent to the grounding portion, wherein a slit is formed on the first conductive member, and the slit is formed between the feeding portion and the grounding portion.
US09685687B2 System and method for a directional coupler
In accordance with an embodiment, a circuit includes a directional coupler having a plurality of ports comprising an input port, a transmitted port, an isolated port and a coupled port, and an adjustable termination coupled to at least one of the plurality of ports.
US09685681B2 Battery pack
A battery pack including a battery cell including an electrode assembly arranged within a can and an electrode terminal electrically connected to the electrode assembly, the can having an opening sealed by a cap plate, a top case attached to the battery cell at a top portion of the battery cell, the top case having an inner space and a protective circuit module including a protection circuit board arranged within said inner space of said top case and electrically connected to the electrode assembly, wherein the top case includes a top portion opposite from the electrode assembly and first and second pairs of opposed sides, the first pair of opposed sides having an edge, a portion of the edge has a recessed interference preventing portion, the recessed interference preventing portion corresponds to a location of a weld connecting an electrode tap to the electrode terminal.
US09685676B2 Modular bioelectrochemical systems and methods
Bioelectrochemical systems (BES) having configurations with spiral wound structures and with frame-and-plate structures are provided. Systems may allow for production of an electrical current that is at least partially generated by microorganisms connected directly or indirectly to an electrode. A spiral wound or frame-and-plate type bioelectrochemical system that may be used for energy or chemical production, and/or desalination may include an anolyte influent point, a catholyte influent point, electrodes, ion selective membranes, mesh separators, gas collection devices, an exterior containment vessel, and one or more external electrical devices.
US09685674B2 Polymer electrolyte composition, and polymer electrolyte membrane, membrane electrode assembly and solid polymer fuel cell each using same
Provided are: a practically excellent polymer electrolyte composition having excellent chemical stability of being resistant to strong oxidizing atmosphere during operation of fuel cell, and achieving excellent proton conductivity under low-humidification conditions, excellent mechanical strength and physical durability; a polymer electrolyte membrane, a membrane electrode assembly, and a polymer electrolyte fuel cell each using the same. The polymer electrolyte composition of the present invention comprises at least an ionic group-containing polymer (A) and a phosphorus-containing additive (B), the phosphorus-containing additive (B) being at least one of a phosphine compound and a phosphinite compound. The polymer electrolyte membrane, the membrane electrode assembly, and the polymer electrolyte fuel cell of the present invention are structured by the polymer electrolyte composition.
US09685671B2 Arrangement and method for supplying energy to buildings
The present application relates to an arrangement for supplying energy to isolated buildings. The arrangement comprises at least one energy generating installation for providing an electrical current, at least one electrolyzer for producing hydrogen from water using the electrical current from the energy generating installation, at least one first chemical reactor for at least partially hydrogenating at least one substrate with an extended π-conjugated system using the hydrogen formed in the electrolyzer, at least one storage tank for storing the substrate hydrogenated at least partially in the first chemical reactor, at least one second chemical reactor for at least partially dehydrogenating the at least partially hydrogenated substrate which was produced in the first chemical reactor and stored in the storage tank with the release of hydrogen, and at least one fuel cell for the oxidation of the hydrogen release in the second chemical reactor with the release of energy.
US09685670B2 Method of operating hydrogen generator and method of operating fuel cell system
A method of operating a hydrogen generator includes: a step (a) of generating a hydrogen-containing gas by a hydrogen generation unit by using a raw material in the hydrogen generation unit; a step (b) of removing a sulfur compound from the raw material by a hydrodesulfurizer which is heated by heat transferred from the hydrogen generation unit; and a step (c) of performing an operation of supplying the raw material to the hydrogen generation unit after stopping the generating of the hydrogen-containing gas by the hydrogen generation unit. The step (c) is not performed unless, at least, a temperature of the hydrodesulfurizer is such a temperature at which carbon deposition from the raw material is suppressed.
US09685668B2 Flow battery
A flow battery comprising a first tank for an anode electrolyte, a second tank for a cathode electrolyte, respective hydraulic circuits provided with corresponding pumps for supplying electrolytes to specific planar cells, provided with channels on the two mutually opposite faces for the independent conveyance of the electrolytes, mutually separated by electrolytic membranes and electrodes, the planar cells constituting a laminar pack, on at least one front of the laminar pack there being an end plate provided, on a first face, with at least one channel for the access of the electrolytes that arrive from the laminar pack, with at least one discharge channel for the conveyance of the electrolytes that originate from the access channel to at least one outlet that is connected to a respective tank, and at least one mixing channel.
US09685660B2 Positive electrode for lithium-ion secondary battery and production process for the same, and lithium-ion secondary battery
A positive electrode for lithium-ion secondary battery is provided, the positive electrode being able to endure high-temperature and high-voltage driving modes or operations. At least parts of the surface of positive-electrode active-material particles are covered by a polymer coating layer, and an amino group and phosphoric-acid group are included in the polymer coating layer. Since the polymer coating layer includes a phosphoric-acid-based polymer, capacity declines are inhibited at the time of cycle tests.
US09685658B2 Composite particles for electrochemical device electrode, material for electrochemical device electrode, and electrochemical device electrode
Composite particles for electrochemical device electrode which contain an electrode active material, a non-water soluble particle-shaped polymer, and a water-soluble polymer having a sulfonic acid group are provided. According to the present invention, composite particles for electrochemical device electrode are high in fluidity, exhibit high adhesion with a current collector, and can provide an electrochemical device electrode which is high in initial capacity, low in internal resistance, an excellent in high temperature storage characteristics are provided.
US09685657B2 Composite precursor, composite prepared therefrom, a method of preparing a composite precursor and a composite, positive electrode for lithium secondary battery including the same, and lithium secondary battery employing the same
A composite precursor represented by Formula 1, a composite prepared therefrom represented by Formula 2, a method of preparing a composite precursor and a composite, a positive electrode for lithium secondary battery including the same, and a lithium secondary battery employing the same. aMn3O4-bM(OH)2  Formula 1 wherein in Formula 1, 0
US09685652B2 Aqueous processing of composite lithium ion electrode material
A method of making a battery electrode includes the steps of dispersing an active electrode material and a conductive additive in water with at least one dispersant to create a mixed dispersion; treating a surface of a current collector to raise the surface energy of the surface to at least the surface tension of the mixed dispersion; depositing the dispersed active electrode material and conductive additive on a current collector; and heating the coated surface to remove water from the coating.
US09685651B2 Internally manifolded flow cell for an all-iron hybrid flow battery
In one example, a system for a flow cell for a flow battery, comprising: a first flow field; and a polymeric frame, comprising: a top face; a bottom face, opposite the top face; a first side; a second side, opposite the first side; a first electrolyte inlet located on the top face and the first side of the polymeric frame; a first electrolyte outlet located on the top face and the second side of the polymeric frame; a first electrolyte inlet flow path located within the polymeric frame and coupled to the first electrolyte inlet; and a first electrolyte outlet flow path located within the polymeric frame and coupled to the first electrolyte outlet. In this way, shunt currents may be minimized by increasing the length and/or reducing the cross-sectional area of the electrolyte inlet and electrolyte outlet flow paths.
US09685649B2 Electrode assembly and secondary battery including the same
An electrode assembly according to an embodiment of the present invention includes a first electrode plate having a fist electrode tab at an end of one side thereof, a second electrode plate having a second electrode tab, which is formed in a same direction as a longitudinal direction of the first electrode tab and is formed at a position not overlapping the first electrode tab, and a protrusion which is formed at a position overlapping the first electrode tab, and a separator insulating the first electrode plate and the second electrode plate. Therefore, the electrode assembly according to the embodiment of the present invention and the secondary battery including the same may improve the stability of the secondary battery by preventing lithium ion accumulation in a separator.
US09685645B2 Battery pack venting system for electrified vehicle
A battery pack according to an exemplary aspect of the present disclosure includes, among other things, an enclosure that establishes a vent chamber and tubing in fluid communication with the vent chamber. A check valve is mounted outside of the enclosure and is connected to the tubing. The check valve permits flow of battery vent byproducts in a first direction but blocks the flow of atmospheric air in a second, opposite direction.
US09685644B2 Lithium ion battery
A multi-core lithium ion battery includes a sealed enclosure and a support member disposed within the sealed enclosure. The support member includes a plurality of cavities and a plurality of lithium ion core members which are disposed the plurality of cavities. The battery further includes a plurality of cavity liners, each of which is positioned between a corresponding one of the lithium ion core members and a surface of a corresponding one of the cavities.
US09685643B2 Electric storage device
An electric storage device includes an electrode assembly, a case housing the electrode assembly, a plastic member arranged at an outer surface of the case and including a joining surface facing the outer surface of the case, an external terminal supported by the plastic member and electrically connected to the electrode assembly, a sealing member arranged at the outer surface of the case, the sealing member including a joining surface facing the outer surface of the case, and an auxiliary terminal supported by the sealing member, the auxiliary terminal extending from inside to outside the case, being electrically connected to the electrode assembly, and being electrically connected to the external terminal. The plastic member includes a material having a hardness greater than a hardness of the sealing member.
US09685641B2 Solution-providing apparatus and method of manufacturing organic light-emitting diode (OLED) display using the apparatus
A solution-providing apparatus and method of manufacturing organic light-emitting diode (OLED) display using the apparatus are disclosed. In one aspect, the apparatus comprises a storage unit, a spraying unit, a pipe, an emission-inducing unit, and a spectrometer. The storage unit is configured to store the solution that includes a light emissive material. The spraying unit is configured to spray the solution toward the substrate. The pipe interconnects the storage unit and the spraying unit. The emission-inducing unit is configured to excite the light emissive material of the solution that flows through the pipe so as to emit light from the solution. The spectrometer is configured to measure the wavelength and intensity of the light.
US09685640B2 Manufacturing method of display substrate using a carrier substrate and a sacrificial layer
A manufacturing method of a display substrate, including preparing a carrier substrate; preparing a mixture of an organic material, an inorganic particle, and solvent; coating the mixture on the carrier substrate; forming a sacrificial layer including the inorganic particle in the organic material by curing the mixture; forming a barrier layer on the sacrificial layer; forming a display substrate on the barrier layer; and separating the barrier layer and the display substrate from the carrier substrate by applying a laser to the sacrificial layer.
US09685639B2 Organic EL display device and method for manufacturing the same
An organic EL display device includes a display area, a measurement area provided outside the display area, an organic layer that is formed in the display area and in the measurement area and includes a light-emitting layer, and a conductive film that is formed on the organic layer in the display area and functions as the upper electrode. The conductive film covers the organic layer in the measurement area.
US09685638B2 Method for producing a component
Various embodiments may relate to a method for producing an optoelectronic component, including forming a first electrode on a substrate, arranging a first mask structure on or above the substrate, wherein the first mask structure comprises a first structuring region including an opening and/or a region prepared for forming an opening, arranging a second mask structure on or above the first mask structure, forming a second structuring region in the first mask structure and in the second mask structure in such a way that at least one part of the first structuring region in the first mask structure is formed outside the second structuring region in the first mask structure.
US09685637B2 Method and apparatus for repairing a display panel
An apparatus and method for repairing a display panel are provided. The apparatus includes a laser emitter that etches a faulty portion of the display panel and a first surrounding portion of the faulty portion by irradiating the faulty portion and the first surrounding portion with a laser and a guide disposed to face the laser emitter and configured to adjust at least one of a temperature of the faulty portion or a temperature of the first surrounding portion.
US09685635B2 Displays having polarizing structures formed using narrowband dichroic dyes
A display may have thin-film transistor circuitry on a substrate. An array of organic light-emitting diodes may be formed on the thin-film transistor circuitry. The organic light-emitting diodes may have anodes, cathodes, and emissive material located between the anodes and cathodes. A circular polarizer may be formed over the array of organic light-emitting diodes. The circular polarizer may include a linear polarizer and a quarter wave plate. The linear polarizer may be formed from one or more film layers having narrowband dichroic dyes so that the polarizer exhibits transmission peaks aligned with a selected subset of wavelengths and absorbance notches corresponding to the selected subset of wavelengths. The selected subset of wavelengths may cover the ranges where the light-emitting diodes are outputting light. Configured in this way, the polarizer will exhibit enhanced luminance at the desired wavelengths while suppressing ambient light reflections at other wavelengths in the visible spectrum.
US09685632B2 Encapsulating structure, the electronical package device and display apparatus that incorporates it
This present disclosure provides an encapsulating layer, an electronic package device and a display apparatus, relates to the field of electronics technology, and may decrease the thickness of the encapsulating layer, thereby achieving lightening and thinning of the electronic package device. The encapsulating layer comprises an encapsulating barrier layer and an organic coating layer directly formed on the encapsulating barrier layer; wherein the organic coating layer is a polymerizable organic coating layer; and the polymerizable organic coating layer comprises an unsaturated acrylate organic coating layer. The encapsulating layer is used for encapsulating an electronic device.
US09685631B2 Display device including tapered substrate
A display device is provided including a first substrate comprising a resin material provided with a plurality region provided with a plurality of pixels including a display device, and a second substrate provided facing the first substrate and installed with the pixel region, wherein an outer periphery side surface of the first substrate having a taper shape and including a barrier layer covering an upper layer, lower layer and the outer periphery side surface of the first substrate.
US09685620B2 Organic light emitting diode display
An organic light emitting device including a first region and a second region, the organic light emitting device including a flexible substrate; a driving circuit on the flexible substrate, the driving circuit including a thin film transistor; an organic light emitting element on the flexible substrate, the organic light emitting element connected to the driving circuit; an encapsulating thin film on the flexible substrate, the encapsulating thin film covering the organic light emitting element and the driving circuit; a first protection film facing the encapsulating thin film; a second protection film facing the flexible substrate in the first region; and a third protection film facing the flexible substrate in the second region, the third protection film having an elastic modulus that is less than an elastic modulus of the second protection film.
US09685616B2 Organic semiconductive component
A semiconductive component with a layer system includes at least one layer comprising a compound of the general formula (I) or (II).
US09685614B2 Material for organic electroluminescent element, and element using same
A compound represented by the following formula (1):
US09685613B2 Electroactive materials
There is disclosed a compound having Formula I In Formula I: Ar1 through Ar4 are the same or different and are aryl groups; L is a spiro group, an adamantyl group, bicyclic cyclohexyl, deuterated analogs thereof, or substituted derivatives thereof; R1 is the same or different at each occurrence and is D, F, alkyl, aryl, alkoxy, silyl, or a crosslinkable group, where adjacent R1 groups can be joined together to form an aromatic ring; R2 is the same or different at each occurrence and is H, D, or halogen; a is the same or different at each occurrence and is an integer from 0-4; and n is an integer greater than 0.
US09685610B2 Method for producing a resistive random access memory
A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.
US09685606B2 Patterning methods, methods of fabricating semiconductor devices using the same, and semiconductor devices fabricated thereby
A patterning method includes forming an etch-target layer on a substrate, forming mask patterns on the etch-target layer, and etching the etch-target layer using the mask patterns as an etch mask to form patterns spaced apart from each other. The etching process of the etch-target layer includes irradiating the etch-target layer with an ion beam, whose incident energy ranges from 600 eV to 10 keV. A recess region is formed in the etch-target layer between the mask patterns, and the ion beam is incident onto a bottom surface of the recess region at a first angle with respect to a top surface of the substrate and is incident onto an inner side surface of the recess region at a second angle with respect to the inner side surface of the recess region. The first angle ranges from 50° to 90° and the second angle ranges from 0° to 40°.
US09685605B2 Magnetic memory device having a magnetic shield structure
A magnetic memory device includes a magnetic memory unit having a plurality of magnetic memory cells, a first surface, and a second surface opposite to the first surface, the first and second surfaces extending in a direction parallel to a direction in which the magnetic memory cells are arranged, a first magnetic shield unit extending below the first surface, and a second magnetic shield unit having a first portion that extends over the second surface and a second portion that extends from the first portion towards the first magnetic shield unit and is directly in contact with the first shield magnetic unit.
US09685604B2 Magnetoresistive random access memory cell and fabricating the same
A magnetoresistive random-access memory (MRAM) cell includes a free layer having a variable magnetic polarity, wherein the free layer has a first width; a pin layer having a fixed magnetic polarity, wherein the pin layer has the first width; a barrier layer located between the pin layer and the free layer, wherein the barrier layer has a second width that is less than the first width; a top electrode layer located above the free layer, the pin layer, and the barrier layer; a bottom electrode layer located beneath the free layer, the pin layer, and the barrier layer; and a capping layer encapsulating a sidewall of the barrier layer.
US09685600B2 Enhanced superconductivity of fullerenes
Methods for enhancing characteristics of superconductive fullerenes and devices incorporating the fullerenes are disclosed. Enhancements can include increase in the critical transition temperature at a constant magnetic field; the existence of a superconducting hysteresis over a changing magnetic field; a decrease in the stabilizing magnetic field required for the onset of superconductivity; and/or an increase in the stability of superconductivity over a large magnetic field. The enhancements can be brought about by transmitting electromagnetic radiation to the superconductive fullerene such that the electromagnetic radiation impinges on the fullerene with an energy that is greater than the band gap of the fullerene.
US09685595B1 Light-emitting diode chip packages and methods for manufacture thereof
A light-emitting diode chip package and a manufacturing process thereof sequentially includes a transparent layer, a fluorescent layer, a wafer layer, a light-emitting diode chip, a dielectric layer, a metal circuit layer, and a protective film and conductive blocks used to draw out the electrodes of the light-emitting diode chip. The outer surfaces of the fluorescent layer and the wafer layer retreat from the fluorescent layer down to the wafer layer to form a slant, and the dielectric layer, the metal circuit layer, and the protective film spread out to coat the slant. Simple techniques at low cost are involved.
US09685589B2 Optoelectronic component with a layer structure
An optoelectronic component includes a layer structure which has a first gallium nitride layer and an aluminum-containing nitride intermediate layer. In this case, the aluminum-containing nitride intermediate layer adjoins the first gallium nitride layer. The layer structure has an undoped second gallium nitride layer which adjoins the aluminum-containing nitride intermediate layer.
US09685586B2 Semiconductor structure
A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure mainly includes a stress control layer disposed between a light emitting layer and a p-type carrier blocking layer. The p-type carrier blocking layer is made from AlxGa1-xN (0
US09685583B2 Highly luminescent nanostructures and methods of producing same
Highly luminescent nanostructures, particularly highly luminescent quantum dots, are provided. The nanostructures have high photoluminescence quantum yields and in certain embodiments emit light at particular wavelengths and have a narrow size distribution. The nanostructures can comprise ligands, including C5-C8 carboxylic acid ligands employed during shell formation and/or dicarboxylic or polycarboxylic acid ligands provided after synthesis. Processes for producing such highly luminescent nanostructures are also provided, including methods for enriching nanostructure cores with indium and techniques for shell synthesis.
US09685582B2 Light emitting device and method of fabricating the same
A method of fabricating a light-emitting device, the method including forming a first resin comprising a phosphor inside a cavity of a package body on which a light-emitting diode chip is mounted, measuring color coordinates of light emitted by combination of the light-emitting diode chip and the phosphor, and correcting the color coordinates by forming a second resin on the first resin. The first resin is not fully cured before measuring and correcting the color coordinates.
US09685577B2 Light emitting diodes and photodetectors
The present application relates generally to light emitting diodes and photodetectors as well as their methods of manufacture and use. In one exemplary embodiment, an integrated device may include a substrate, a light emitting diode formed on the substrate, and a photodetector formed on the substrate. In another embodiment, a device may include a light emitting diode formed on a substrate, and the light emitting diode may act as both a solid state light and as an optical transmitter.
US09685576B2 Back side illuminated image sensor with guard ring region reflecting structure
A photon detector includes a single photon avalanche diode (SPAD) disposed proximate to a front side of a semiconductor layer. The SPAD includes a multiplication junction that is reversed biased above a breakdown voltage such that light directed into the SPAD through a backside of the semiconductor layer triggers an avalanche multiplication process. A guard ring is disposed in a guard ring region that surrounds the SPAD to isolate the SPAD in the semiconductor layer. A guard ring region reflecting structure is disposed in the guard ring region proximate to the guard ring and proximate to the front side of the semiconductor layer such that light directed into the guard ring region through the backside of the semiconductor layer that bypasses the SPAD is redirected by the guard ring region reflecting structure back into the semiconductor layer and into the SPAD.
US09685574B2 Solar cell module
Disclosed is a solar cell module. The solar cell module includes a solar cell panel including a plurality of solar cells; a protective substrate on the solar cell panel; and a ventilation unit for ventilating the solar cell panel.
US09685571B2 Solar cell module with high electric susceptibility layer
A solar cell module includes solar cells that are encased in a protective package and a high electric susceptibility layer that is placed on the solar cells. The high electric susceptibility layer is polarized such that a sheet charge is developed at the interface of the high electric susceptibility layer and the solar cells. The protective package includes an encapsulant that encapsulates the solar cells. The encapsulant may be a multilayer encapsulant, with the high electric susceptibility layer being a layer of the encapsulant. The high electric susceptibility layer may also be a material that is separate from the encapsulant.
US09685570B2 Light receiving apparatus, method for fabricating light receiving apparatus
A light receiving apparatus includes a light receiving device including a compound semiconductor substrate, photodiodes, and bump electrodes; and a semiconductor integrated device including a silicon substrate and read-out circuits. Bonded, the integrated device and the light receiving device face each other in a direction of a first axis through the bump electrodes. The light receiving device has a back surface with first and second back edges extending in a direction of a second axis intersecting with the first axis. The light receiving device has a first slope face extending from the first back edge along a first reference plane, and a second slope face extending from the second back edge along a second reference plane. The back surface of the light receiving device extends along a third reference plane intersecting with the first axis. The first and second reference planes are inclined with respect to the third reference plane.
US09685568B2 Photovoltaic module with flexible circuit
A photovoltaic module, and method of making, is disclosed in which a flexible circuit is electrically coupled to a plurality of photovoltaic cells, where the photovoltaic cells are electrically coupled in series to form a series of cells. Each photovoltaic cell has free-standing metallic articles coupled to the top and bottom surfaces of a semiconductor substrate. A cell interconnection element of each photovoltaic cell is electrically coupled to a free-standing metallic article of an adjacent photovoltaic cell, where the interconnection elements of the initial and final cells in the series serve as contact ends for the series of cells. Contact tabs of the flexible circuit are electrically coupled to the contact ends of the series of cells, and a junction box is electrically coupled to a junction box contact region of the flexible circuit.
US09685566B2 Method of manufacturing silicon carbide semiconductor device
A target made of a metal material is sputtered to form a metal film on a silicon carbide wafer. At this time, the metal film is formed under a condition that an incident energy of incidence, on the silicon carbide wafer, of the metal material sputtered from the target and a sputtering gas flowed in through a gas inlet port is lower than a binding energy of silicon carbide, and more specifically lower than 4.8 eV. For example, the metal film is formed while a high-frequency voltage applied between a cathode and an anode is set to be equal to or higher than 20V and equal to or lower than 300V.
US09685562B2 Semiconductor device, power diode, and rectifier
An object is to provide a semiconductor device having electrical characteristics such as high withstand voltage, low reverse saturation current, and high on-state current. In particular, an object is to provide a power diode and a rectifier which include non-linear elements. An embodiment of the present invention is a semiconductor device including a first electrode, a gate insulating layer covering the first electrode, an oxide semiconductor layer in contact with the gate insulating layer and overlapping with the first electrode, a pair of second electrodes covering end portions of the oxide semiconductor layer, an insulating layer covering the pair of second electrodes and the oxide semiconductor layer, and a third electrode in contact with the insulating layer and between the pair of second electrodes. The pair of second electrodes are in contact with end surfaces of the oxide semiconductor layer.
US09685560B2 Transistor, method for manufacturing transistor, semiconductor device, and electronic device
A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is provided. In a top-gate transistor in which an oxide semiconductor is used for a semiconductor layer where a channel is formed, elements are introduced to the semiconductor layer in a self-aligned manner after a gate electrode is formed. After that, a side surface of the gate electrode is covered with a structure body. The structure body preferably contains silicon oxide. A first insulating layer is formed to cover the semiconductor layer, the gate electrode, and the structure body. A second insulating layer is formed by a sputtering method over the first insulating layer. Oxygen is introduced to the first insulating layer when the second insulating layer is formed.
US09685557B2 Different lightly doped drain length control for self-align light drain doping process
A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack. The TFT stack includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes removing the first photoresist layer, and depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area. The method further includes doping the second portion of the doped semiconductor layer with a third doping dose, the first dose being higher than the second dose and the third dose.
US09685554B1 Fin field effect transistor and semiconductor device
A FinFET including a gate stack, a semiconductor fin embedded in the gate stack, a source and a drain disposed is provided. The semiconductor fin extends along a widthwise direction of the gate stack and has a first concave and a second concave exposed at sidewalls of the gate stack respectively. The source and drain are disposed at two opposite sides of the gate stack. The source includes a first ridge portion embedded in the first concave and the drain includes a second ridge portion embedded in the second concave, wherein the first and second ridge portions extend along a height direction of the semiconductor fin.
US09685552B2 Silicon carbide field effect transistor
A silicon carbide field effect transistor includes a silicon carbide substrate, an n-type drift layer, a p-type epitaxy layer, a source region, a trench gate, at least one p-type doped region, a source, a dielectric layer and a drain. The p-type doped region is disposed at the n-type drift layer to be adjacent to one lateral side of the trench gate, and includes a first doped block and a plurality of second doped blocks arranged at an interval from the first doped block towards the silicon carbide substrate. Further, a thickness of the second doped blocks does not exceed 2 um. Accordingly, not only the issue of limitations posed by the energy of ion implantation is solved, but also an electric field at a bottom and a corner of the trench gate is effectively reduced, thereby enhancing the reliability of the silicon carbide field effect transistor.
US09685548B2 High electron mobility transistor and method of forming the same using atomic layer deposition technique
A HEMT made of nitride semiconductor materials is disclosed. The HEMT includes the GaN channel layer, the InAlN barrier layer, and the n-type GaN regions formed beneath the source electrode and the drain electrode at a temperature such that the InAlN barrier layer in the crystal quality thereof is not degraded, lower than 800° C. The n-type GaN regions are doped with silicon (Si) and have a ratio of silicon atoms against carbon atoms (Si/C) greater than 100.
US09685547B2 Semiconductor apparatus including barrier film provided between electrode and protection film
A semiconductor apparatus includes a substrate, a semiconductor layer formed above the substrate and including a nitride semiconductor, an electrode formed above the semiconductor layer and including gold, a barrier film formed above the electrode and a protection film formed above the semiconductor layer and including one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. The protection film is formed on the barrier film. The barrier film includes a metal oxide material, a metal nitride film, or a metal oxynitride film.
US09685541B2 Method for forming semiconductor structure
The present invention provides a semiconductor structure, including a substrate, having a fin structure disposed thereon, a gate structure, crossing over parts of the fin structure. The top surface of the fin structure which is covered by the gate structure is defined as a first top surface, and the top surface of the fin structure which is not covered by the gate structure is defined as a second top surface. The first top surface is higher than the second top surface, and a spacer covers the sidewalls of the gate structure. The spacer includes an inner spacer and an outer spacer, and the outer pacer further contacts the second top surface of the fin structure directly.
US09685540B2 Semiconductor device having a gate that is buried in an active region and a device isolation film
A semiconductor device includes an active region with a first gate trench formed when a gate region is etched to a first depth, a device isolation film defining the active region and including a second gate-trench formed when a gate region is etched to a second depth, a gate buried below the first gate trench and the second gate trench, and a source plug and a drain plug formed when a conductive material is deposited in a source region and a drain region of the active region.
US09685538B2 Low temperature polysilicon thin film transistor and method for fabricating same
The present invention provides a low temperature polysilicon thin film transistor and a fabricating method thereof. According to the method, a laser annealing process is performed to a remained portion of a a-Si layer on a substrate to form a first lightly doped drain (LDD) terminal, a second LDD terminal, a first phosphor material structure and a second phosphor material structure. A gate metal layer is then formed on the remained portion of the a-Si layer. A source metal layer and a drain metal layer are formed on the first doped layer and the second doped layer located at opposite sides of the gate metal layer, respectively. The present invention use the high temperature of the laser annealing process to perform a heat diffusion of phosphor material to form the LDD terminal and the phosphor material structure, the times of photomasks are used is reduced, and the process is simplified.
US09685531B2 Method for manufacturing semiconductor device having metal gate
A method for manufacturing a semiconductor device having metal gates includes following steps. A substrate including a first transistor and a second transistor formed thereon is provided. The first transistor includes a first gate trench and the second transistor includes a second gate trench. A patterned first work function metal layer is formed in the first gate trench and followed by forming a second sacrificial masking layer respectively in the first gate trench and the second gate trench. An etching process is then performed to form a U-shaped first work function metal layer in the first gate trench. Subsequently, a two-step etching process including a strip step and a wet etching step is performed to remove the second sacrificial masking layer and portions of the U-shaped first work function metal layer to form a taper top on the U-shaped first work function metal layer in the first gate trench.
US09685529B1 III-V NFETs including channel barrier layers to reduce band-to-band leakage current
Methods for creating barrier layers in a III-V electron channel to reduce band-to-band leakage current and the resulting devices are disclosed. Embodiments include forming a fin channel portion comprising a III-V material, on a barrier layer; forming undoped InP semiconductor spacers at opposite ends of the fin channel portion on the barrier layer; forming S/D regions adjacent the undoped InP semiconductor spacers on the barrier layer; and forming a high-k/metal gate over the fin channel portion and undoped InP semiconductor spacers.
US09685525B2 Sidewall passivation for HEMT devices
Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a binary III/V semiconductor layer made of a first III-nitride material to act as a channel region of the e-HEMT, and a ternary III/V semiconductor layer arranged over the binary III/V semiconductor layer and made of a second III-nitride material to act as a barrier layer. Source and drain regions are arranged over the ternary III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.
US09685522B1 Forming uniform WF metal layers in gate areas of nano-sheet structures
Methods for forming uniform WF metal layers in gate areas of NS structures in a NS FET and the resulting devices are disclosed. Embodiments include providing NS structures, parallel to and spaced from each other, in a substrate; conformally forming gate dielectric and metal layers, respectively, on all surfaces in a gate area of each NS structure; forming a barrier layer on surfaces in the gate area of each NS structure except on surfaces in between the NS structures by PVD or PECVD; annealing the NS structures including the gate dielectric and metal layers; removing the barrier and metal layers from all surfaces; and forming a WF metal layer on all surfaces in the gate area of each NS structure.
US09685520B1 Manufacturing method of semiconductor device
A manufacturing method of a semiconductor device includes the following steps. A first gate dielectric layer is formed in a first gate trench and a second gate dielectric layer is formed in a second gate trench. A first bottom barrier layer is formed on the first gate dielectric layer and the second gate dielectric layer. A first conductivity type work function layer is formed on the first bottom barrier layer. A first treatment to the first gate dielectric layer and/or a second treatment to the first bottom barrier layer on the first gate dielectric layer are performed before the step of forming the first conductivity type work function layer. The first treatment and the second treatment are used to modify threshold voltages of specific transistors, and thicknesses of work function layers formed subsequently may be modified for increasing the related process window accordingly.
US09685518B2 Method of forming semiconductor structure of control gate, and semiconductor device
A method of forming a semiconductor structure of a control gate is provided, including depositing a first dielectric layer overlying a substrate, forming a surface modification layer from the first dielectric layer; and forming semiconductor dots on the surface modification layer. The surface modification layer has a bonding energy to the semiconductor dots less than the bonding energy between the first dielectric layer and the semiconductor dots. Therefore the semiconductor dots have higher density to form on the surface modification layer than that to directly form on the first dielectric layer. And a semiconductor device is also provided to tighten threshold voltage (Vt) and increase programming efficiency.
US09685512B2 Semiconductor device
A semiconductor device includes a diode region and an IGBT region. The diode region includes a front side anode region, an n-type diode barrier region, an n-type diode pillar region reaching the diode barrier region through the front side anode region, and a p-type back side anode region separated from the front side anode region by the diode barrier region. The IGBT region includes a front side body region, an n-type IGBT barrier region, and a back side body region separated from the front side body region by the IGBT barrier region. When a gate-off voltage is applied to a gate electrode, a resistance between the IGBT barrier region and the emitter electrode is higher than a resistance between the diode barrier region and the anode electrode.
US09685507B2 FinFET devices
FinFET devices and processes to prevent fin or gate collapse (e.g., flopover) in finFET devices are provided. The method includes forming a first set of trenches in a semiconductor material and filling the first set of trenches with insulator material. The method further includes forming a second set of trenches in the semiconductor material, alternating with the first set of trenches that are filled. The second set of trenches form semiconductor structures which have a dimension of fin structures. The method further includes filling the second set of trenches with insulator material. The method further includes recessing the insulator material within the first set of trenches and the second set of trenches to form the fin structures.
US09685505B2 Semiconductor device with guard rings
A semiconductor device that includes: a semiconductor layer of a first conductivity type, having a peripheral area and a cell area inside of the peripheral area; a region of a second conductivity type in the semiconductor layer in the cell area; and a plurality of guard rings of the second conductivity type in the semiconductor layer in the peripheral area, each having a substantially same depth as the region of the second conductivity type in the cell area. The plurality of guard rings include at least one first ring that has a diffusion region in the depth profile in the semiconductor layer that is wider at a top thereof.
US09685501B2 Low parasitic capacitance finFET device
Embodiments in accordance with the present invention include a method of fabricating a finFET device comprising forming a dielectric layer over the top surface of a semiconductor substrate. A first semiconductor layer is deposited over the dielectric layer. A second semiconductor layer is then deposited over the first semiconductor layer, such that the first semiconductor layer can be preferentially etched with respect to the second semiconductor layer. At least a fin is formed in the second semiconductor layer. A portion of the first semiconductor layer is removed from beneath a portion of the fin such that the bottom surface of the fin is exposed. A gate oxide layer is deposited over the fin such that the gate oxide layer surrounds a portion of the fin, and a gate structure is deposited over at least a portion of the gate oxide layer such that the gate structure surrounds the fin.
US09685496B2 Semiconductor device, method of manufacturing the same, and signal transmitting/receiving method using the semiconductor device
A semiconductor device includes a semiconductor chip including a main surface, an internal circuit including a plurality of transistors, formed on the main surface, a bonding pad electrically connected to the internal circuit, formed on the main surface, an inductor for communicating an external device in a non-contact manner, formed on the main surface, and a seal ring formed along an outer peripheral edge of the semiconductor chip to surround the internal circuit and the bonding pad in a plan view. The inductor has a configuration to surround the internal circuit and the bonding pad in the plan view and along the seal ring. The inductor is arranged inside the seal ring.
US09685492B2 Display apparatus
A display apparatus includes a first substrate including a first display region and a first non-display region, a first display device in the first display region of the first substrate, a second substrate including a second display region and a second non-display region, the second display region overlapping the first non-display region of the first substrate, and a second display device in the second display region of the second substrate.
US09685491B2 Display device with transistor sampling for improved performance
A display device including a pixel array having a plurality of pixels arranged in a matrix form, each of the pixels including a sampling transistor configured to sample a data potential from a video signal line which is insulated from and intersects a control line in response to the change in potential of the control line, and a light-emitting element configured to emit light at the brightness commensurate with the magnitude of the post-sampling data potential.
US09685490B2 Organic light-emitting diode display
An organic light emitting diode (OLED) display includes: a first electrode around a center point of a virtual tetragon, e.g., a virtual square; second electrodes around a first vertex and a second vertex diagonal to the first vertex of the virtual square, the second electrodes being separated from each other and with the center point of the virtual square interposed therebetween; third electrodes around a third vertex and a fourth vertex of the virtual square, the third electrodes being separated from each other and with the center point of the virtual square interposed therebetween; a pixel defining layer partially on the first electrode, the second electrodes, and the third electrodes, and partially exposing the first electrode, the second electrodes, and the third electrodes; and four spacers disposed as islands on the pixel defining layer and corresponding to four sides of the virtual square.
US09685479B2 Method of forming a shallow pinned photodiode
An image sensor with a pinned photodiode includes a photodiode formed in a substrate by implanting dopants of a first type through one or more dielectric layers formed over the substrate. A pinning layer for the photodiode may be formed by implanting dopants of a second type through the same one or more dielectric layers. The pinning layer may be formed over a photodiode region of the substrate. The concentration of dopants of the second type may have a maximum value in dielectric layers over the photodiode that exceeds the concentration of dopants of the second type in the substrate below. The photodiode and pinning layer may both be formed by implanting ions of the first and second type respectively through a dielectric layer formed after etching away a portion of another dielectric layer, having a different thickness, and having different optical transmission properties than the another dielectric layer.
US09685477B2 Two-terminal multi-mode detector
A two-terminal detector has a back-to-back p/n/p SWIR/MWIR stack structure, which includes P-SWIR absorber, N-SWIR, wide bandgap bather, N-MWIR absorber, and P-MWIR layers, with contacts on the P-MWIR and P-SWIR layers. The junction between the SWIR layers and the junction between the MWIR layers are preferably passivated. The detector stack is preferably arranged such that a negative bias applied to the top of the stack reverse-biases the MWIR junction and forward-biases the SWIR junction, such that the detector collects photocurrent from MWIR radiation. A positive bias forward-biases the MWIR junction and reverse-biases the SWIR junction, such that photocurrent from SWIR radiation is collected. A larger positive bias induces electron avalanche at the SWIR junction, thereby providing detector sensitivity sufficient to provide low light level passive amplified imaging. Detector sensitivity in this mode is preferably sufficient to provide high resolution 3-D eye-safe LADAR imaging.
US09685474B2 Semiconductor device and a manufacturing method thereof
A semiconductor device has a chip region including a back-side illumination type photoelectric conversion element, a mark-like appearance part, a pad electrode, and a coupling part. The mark-like appearance part includes an insulation film covering the entire side surface of a trench part formed in a semiconductor substrate. The pad electrode is arranged at a position overlapping the mark-like appearance part. The coupling part couples the pad electrode and mark-like appearance part. At least a part of the pad electrode on the other main surface side of the substrate is exposed through an opening reaching the pad electrode from the other main surface side of the substrate. The mark-like appearance part and coupling part are arranged to at least partially surround the outer circumference of the opening in plan view.
US09685472B2 Image sensor with reduced spectral and optical crosstalk and method for making the image sensor
An integrated image sensor may include adjacent pixels, with each pixel including an active semiconductor region including a photodiode, an antireflection layer above the photodiode, a dielectric region above the antireflection layer and an optical filter to pass incident luminous radiation having a given wavelength. The antireflection layer may include an array of pads mutually separated by a dielectric material of the dielectric region. The array may be configured to allow simultaneous transmission of the incident luminous radiation and a diffraction of the incident luminous radiation producing diffracted radiations which have wavelengths below that of the incident radiation, and are attenuated with respect to the incident radiation.
US09685468B2 Color filter substrate, display device and detecting method therefor
The present invention provides a color filter substrate, a display device and a detection method thereof, aims to solve the problems of difficulty in failure positioning and low detection efficiency in existing display panels. The color filter substrate comprises a plurality of sub-pixels arranged in an array, each of the sub-pixels is provided with a color filter, and at least a part of columns of sub-pixels are marked column of sub-pixels. The shapes of the color filters of a part of sub-pixels of the marked column of sub-pixels are different from those of the remaining sub-pixels. The display device comprises the above-mentioned color filter substrate. The color filter substrate can be used in the display device, particularly suitable for the display device which adopts double side GOA circuits.
US09685462B2 Semiconductor device and method of manufacturing the same
A semiconductor device of an embodiment includes an oxide semiconductor layer including a first region, a second region and the third region provided between the first region and the second region. The oxide semiconductor layer contains indium (In), gallium (Ga), and zinc (Zn). The first and second regions have thinner film thickness and lower indium (In) concentration than the third region. An insulating film is provided on the third region, and an electrode is provided on the insulating film. A first conductive layer is provided under the first region and electrically connected with the first region. A second conductive layer is provided under the second region and electrically connected with the second region.
US09685459B2 Flexible substrate, flexible display panel and flexible display device
The present invention provides a flexible substrate, a flexible display panel and a flexible display device. The flexible substrate includes an on-off element and an insulating layer, wherein a part of the insulating layer serves as a part of the on-off element, and the part of the insulating layer serving as a part of the on-off element is separated from rest part of the insulating layer. In the flexible substrate, the part of the insulating layer serving as a part of the on-off element is separated from the rest part of the insulating layer, such that cracks generated in the reset part of the insulating layer are unlikely to extend to the region where the on-off element is located, thus the poor contact or abnormal on-off phenomenon of the on-off element can be avoided.
US09685454B2 Method of forming 3D vertical NAND with III-V channel
Disclosed herein is 3D memory with vertical NAND strings having a III-V compound channel, as well as methods of fabrication. The III-V compound has at least one group III element and at least one group V element. The III-V compound provides for high electron mobility transistor cells. Note that III-V materials may have a much higher electron mobility compared to silicon. Thus, much higher cell current and overall cell performance can be achieved. Also, the memory device may have better read-write efficiency due to much higher carrier mobility and velocity. The tunnel dielectric of the memory cells may have an Al2O3 film in direct contact with the III-V NAND channel. The drain end of the NAND channel may be a metal-III-V alloy in direct contact with a metal region. The body of the source side select transistor could be formed from the III-V compound or from crystalline silicon.
US09685451B2 Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device includes cell strings, each including a plurality of memory cells over a substrate, extending in a direction, channel layers, connected with one sides and the other sides of the cell strings, extending in another direction perpendicular to the substrate, select gate electrodes, located over the cell strings, surrounding side surfaces of the channel layers with a gate dielectric layer interposed therebetween, and conductive lines connected with upper ends of the channel layers.
US09685449B2 Dynamic memory structure
A dynamic memory structure is disclosed. The dynamic memory structure includes: a substrate; a first strip semiconductor material disposed on the substrate and extending along a first direction; a gate standing astride the first strip semiconductor material, extending along a second direction and dividing the first strip semiconductor material into a first source terminal, a first drain terminal and a first channel region; a first dielectric layer sandwiched between the gate and the first strip semiconductor material; a first capacitor unit disposed on the substrate and comprising the first source terminal serving as a bottom electrode, a second dielectric layer covering the first source terminal to serve as a capacitor dielectric layer and a capacitor metal layer covering the second dielectric layer to serve as a top electrode. Preferably, the first source terminal and the first drain terminal have asymmetric shapes.
US09685446B2 Method of manufacturing a semiconductor device
A method of manufacturing a semiconductor device includes preparing a light ion source, a first mask and a second mask. A side of a first region on a top surface of a semiconductor substrate is shielded by using the first mask. The top surface, with the side of the first region thereon being shielded with the first mask, is irradiated with light ions by operating the light ion source to introduce lattice defects at a specified depth on a side of a second region on the top surface. A side of the second region on a bottom surface of the semiconductor substrate is shielded by using the second mask. The bottom surface, with the side of the second region thereon being shielded with the second mask, is irradiated with light ions by operating the light ion source to introduce lattice defects at a specified depth on the side of the first region on the bottom surface.
US09685445B2 Semiconductor device and manufacturing method of the same
A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
US09685443B2 Compact guard ring structure for CMOS integrated circuits
An integrated circuit includes an active device formed in a semiconductor layer of a first conductivity type, a first guard ring of the first conductivity type formed in the semiconductor layer surrounding at least part of the active device; a second guard ring of the second conductivity type formed in the semiconductor layer surrounding the first guard ring and the active device and including comprising alternating first well regions of the first conductivity type and the second well regions of the second conductivity type, the first and second well regions being electrically shorted together and electrically coupled to a ground potential or floating; and a third guard ring of the first conductivity type formed in the semiconductor layer surrounding the second guard ring. The first and third guard rings do not receive direct electrical connection.
US09685442B2 Semiconductor device and method of manufacturing the same
A semiconductor device including an insulating film in a first region of a semiconductor substrate; a first impurity region and a second impurity region of a first conductivity type, each of the regions including a part located deeper than the insulating film in contact with each other, and the insulating film being sandwiched by the first and second impurity regions in planar view in the first region of the semiconductor substrate; a metal silicide film on the first impurity region and in Schottky junction with the first impurity region; a first impurity of the first impurity region having a peak of a concentration profile deeper than a bottom of the insulating film; a second impurity of the second impurity region having a concentration higher than a concentration of the first impurity in a part of the first impurity region shallower than the bottom of the insulating film.
US09685441B2 Semiconductor device with tunable work function
The metal-oxide semiconductor structure includes a substrate, a gate dielectric multi-layer, an etch stop layer, a work function metallic layer, a barrier layer and a silicide layer. The substrate has a trench. The gate dielectric multi-layer overlies the trench, in which the gate dielectric multi-layer includes a high-k capping layer with a fluorine concentration substantially in a range from 1 at % to 10 at %. The etch stop layer is disposed on the gate dielectric multi-layer. The work function metallic layer is disposed on the etch stop layer. The barrier layer is disposed on the work function metallic layer. The silicide layer is disposed on the barrier layer.
US09685438B2 Field effect transistor having two-dimensionally distributed field effect transistor cells
A Field Effect Transistor (FET) having: a plurality of FET cells having a plurality of source pads, a plurality of drain pads, and a plurality of gate electrodes disposed on a surface of a substrate; each one of the FET cells having a corresponding one of the gate electrodes disposed between one of the source pads and one of the drain pads; a gate contact connected to the gate electrodes of each one of the FET cells; a drain contact connected to the drain pad of each one of the FET cells; and a source contact connected to source pad of each one of the FET cells. The cells are disposed on a surface in a two-dimensional array.
US09685436B2 Monolithic three-dimensional (3D) ICs with local inter-level interconnects
Monolithic 3D ICs employing one or more local inter-level interconnect integrated intimately with at least one structure of at least one transistor on at least one transistor level within the 3D IC. In certain embodiments the local inter-level interconnect intersects a gate electrode or a source/drain region of at least one transistor and extends through at least one inter-level dielectric layer disposed between a first and second transistor level in the 3D IC. Local inter-level interconnects may advantageously make a direct vertical connection between transistors in different levels of the 3D IC without being routed laterally around the footprint (i.e., lateral, or planar, area) of either the overlying or underlying transistor level that is interconnected.
US09685432B2 Compact electrostatic discharge (ESD) protection structure
A multi-gate Schottky depletion-mode field effect transistor (FET), at least one diode and two resistors comprise a compact electrostatic discharge (ESD) protection structure. This ESD protection structure can be laid out in a smaller area than typical multiple diode ESD devices. The multi-gate FET may comprise various types of high-electron-mobility transistor (HEMT) devices, e.g., (pseudomorphic) pHEMT, (metamorphic) mHEMT, induced HEMT. The multiple gates of the Schottky field effect device are used to form an ESD trigger and charge draining paths for protection of circuits following the ESD protection device. Both single and dual polarity ESD protection devices may be provided on an integrated circuit die for protection of input-output circuits thereof.
US09685422B2 Semiconductor package device
A semiconductor package may include a first chip located over a substrate. The semiconductor package may include a second chip located over the substrate and adjacent to the first chip. The semiconductor package may include a test micro-bump located at a layer below the first chip and above the substrate, and electrically coupled to an external connection member through a first path. The semiconductor package may include a normal micro-bump located at a layer below the first chip and above the substrate, and electrically coupled to the second chip through a second path.
US09685419B2 Semiconductor device
Disclosed is a semiconductor device suppressed in decrease of reliability. The semiconductor device comprises an electrode pad portion (2) formed on the upper surface of a semiconductor substrate (1), a passivation layer (3) so formed on the upper surface of the semiconductor substrate (1) as to overlap a part of the electrode pad portion (2) and having a first opening portion (3a) where the upper surface of the electrode pad portion (2) is exposed, a barrier metal layer (5) formed on the electrode pad portion (2), and a solder bump (6) formed on the barrier metal layer (5). The barrier metal layer (5) is formed such that an outer peripheral end (5b) lies within the first opening portion (3a) of the passivation layer (3) when viewed in plan.
US09685416B2 Semiconductor wafer and its manufacture method, and semiconductor chip
A semiconductor wafer includes: a first semiconductor chip area formed with a semiconductor element; a second semiconductor chip area formed with a semiconductor element; and a scribe area sandwiched between said first and second semiconductor chip areas; wherein: the first semiconductor chip area includes a first metal ring surrounding the semiconductor element formed in the first semiconductor chip area; and the metal ring is constituted of a plurality of metal layers including an lower metal layer and an upper metal layer superposed upon the lower metal layer, and the upper metal layer is superposed upon the lower metal layer in such a manner that an outer side wall of the upper metal layer is flush with the outer side wall of the lower metal layer or is at an inner position of said first semiconductor chip area relative to said outer side wall of the lower metal layer.
US09685414B2 Package assembly for embedded die and associated techniques and configurations
Embodiments of the present disclosure are directed towards a package assembly for embedded die and associated techniques and configurations. In one embodiment, an apparatus includes a package assembly comprising a die attach layer, a die coupled with the die attach layer, the die having an active side including active devices of the die and an inactive side disposed opposite to the active side, a reinforced plate coupled with the die attach layer, the reinforced plate having a first side and a second side disposed opposite to the first side and a cavity disposed in the reinforced plate and one or more build-up layers coupled with the second side of the reinforced plate, the one or more build-up layers including an insulator and conductive features disposed in the insulator, the conductive features being electrically coupled with the die, wherein the inactive side of the die is in direct contact with the die attach layer, the first side of the reinforced plate is in direct contact with the die attach layer and the die is disposed in the cavity. Other embodiments may be described and/or claimed.
US09685413B1 Semiconductor package having an EMI shielding layer
Semiconductor packages and methods of forming semiconductor packages are described. In an example, a semiconductor package includes a shielding layer containing metal particles, e.g., conductive particles or magnetic particles, in a resin matrix to attenuate electromagnetic interference. In an example, the shielding layer is transferred from a molding chase to the semiconductor package during a polymer molding operation.
US09685412B2 Semiconductor apparatus and manufacturing method for same
According to the embodiments, a semiconductor device includes a substrate, a plurality of insulating layers, a lower shield plate, a semiconductor device, an upper shield plate, and a side shield member. A first contact portion is formed on the substrate. The lower shield plate includes a magnetic substance and is provided above the substrate so as to avoid the first contact portion. The semiconductor chip is provided above the lower shield plate and has a second contact portion electrically connected to the first contact portion. The upper shield plate includes a magnetic substance and is provided above the semiconductor chip so as to avoid the second contact portion and a connection member. The side shield member includes a magnetic substance and connects side portions of the lower shield plate and the upper shield plate on which the connection member is not disposed.
US09685408B1 Contact pad structure and method for fabricating the same
A contact pad structure includes alternately stacked N insulating layers (N≧6) and N conductive layers, and has N regions arranged in a 2D array exposing the respective conductive layers. When the conductive layers are numbered as first to N-th from bottom to top, the number (Ln) of exposed conductive layer decreases in a column direction in the regions of any row, the difference in Ln is fixed between two neighboring rows of regions, Ln decreases from the two ends toward the center in the regions of any column, and the difference in Ln is fixed between two neighboring columns of regions.
US09685407B2 Optimized wires for resistance or electromigration
Optimized metal wires for resistance or electromigration, methods of manufacturing thereof and design methodologies are disclosed. The method includes depositing metal material within openings and on a surface of dielectric material resulting in metal filled openings and a topography of recessed areas aligned with the metal filled openings. The method further includes depositing an alloying material over the metal material, including within the recessed areas. The method further includes planarizing the metal material, leaving the alloying material within the recessed areas. The method further includes diffusing the alloying material into the metal material forming alloyed regions self-aligned with the metal filled openings.
US09685406B1 Selective and non-selective barrier layer wet removal
A method for manufacturing a semiconductor device includes forming a dielectric layer on a substrate, forming a plurality of openings in the dielectric layer, conformally depositing a barrier layer on the dielectric layer and on sides and a bottom of each one of the plurality of openings, depositing a contact layer on the barrier layer in each one of the plurality of openings, removing a portion of each contact layer from each one of the plurality of openings, and removing a portion of the barrier layer from each one of the plurality of openings, wherein at least the removal of the portion of the barrier layer is performed using an etchant including: (a) a compound selected from group consisting of -azole, -triazole, and combinations thereof; (b) a compound containing one or more peroxy groups; (c) one or more alkaline metal hydroxides; and (d) water.
US09685403B2 Semiconductor device and method of forming shielding layer over semiconductor die mounted to TSV interposer
A semiconductor device has a plurality of conductive vias formed partially through a substrate. A conductive layer is formed over the substrate and electrically connected to the conductive vias. A semiconductor die is mounted over the substrate. An encapsulant is deposited over the semiconductor die and substrate. A trench is formed through the encapsulant around the semiconductor die. A shielding layer is formed over the encapsulant. The trench is formed partially through the substrate and the shielding layer is formed in the trench partially through the substrate. An insulating layer can be formed in the trench prior to forming the shielding layer. A portion of the substrate is removed to expose the conductive vias. An interconnect structure is formed over the substrate opposite the semiconductor die. The interconnect structure is electrically connected to the conductive vias. The shielding layer is electrically connected to the interconnect structure.
US09685401B2 Structures for heat dissipating interposers
An interconnect element includes a semiconductor or insulating material layer that has a first thickness and defines a first surface; a thermally conductive layer; a plurality of conductive elements; and a dielectric coating. The thermally conductive layer includes a second thickness of at least 10 microns and defines a second surface of the interconnect element. The plurality of conductive elements extend from the first surface of the interconnect element to the second surface of the interconnect element. The dielectric coating is between at least a portion of each conductive element and the thermally conductive layer.
US09685396B2 Semiconductor die arrangement
A semiconductor die arrangement comprising a first die including at least one semiconductor device; a second die including at least one semiconductor device; a lead frame associated with the first die and comprising one or more lead fingers, wherein the second die is mounted on one of the lead fingers and electrically connected to a further element by a bond wire.
US09685395B2 Wiring layout having differently shaped vias
A method of forming photo masks having rectangular patterns and a method for forming a semiconductor structure using the photo masks is provided. The method for forming the photo masks includes determining a minimum spacing and identifying vertical conductive feature patterns having a spacing less than the minimum spacing value. The method further includes determining a first direction to expand and a second direction to shrink, and checking against design rules to see if the design rules are violated for each of the vertical conductive feature patterns identified. If designed rules are not violated, the identified vertical conductive feature pattern is replaced with a revised vertical conductive feature pattern having a rectangular shape. The photo masks are then formed. The semiconductor structure can be formed using the photo masks.
US09685394B2 Electronic device and manufacturing method therefor
An electronic device includes a semiconductor substrate, an insulating material-filled layer and a vertical conductor. The semiconductor substrate has a vertical hole extending in a thickness direction thereof. The insulating material-filled layer is a ring-shaped layer filled in the vertical hole for covering an inner periphery thereof and includes an organic insulating material or an inorganic insulating material mainly of a glass and a nanocomposite ceramic. The nanocomposite ceramic has a specific resistance of greater than 1014 Ω·cm at room temperature and a relative permittivity of 4 to 9. The vertical conductor is a solidified metal body filled in an area surrounded by the insulating material-filled layer.
US09685390B2 Microelectronic package having non-coplanar, encapsulated microelectronic devices and a bumpless build-up layer
A microelectronic package having an encapsulated substrate comprising a plurality of microelectronic devices encapsulated within an encapsulation material, wherein the encapsulated structure may have an active surface proximate the active surfaces of the plurality of microelectronic devices, and wherein at least one of the plurality of microelectronic devices may have a height greater than another of the plurality of microelectronic devices (e.g. non-coplanar). The microelectronic package further includes a bumpless build-up layer structure formed proximate the encapsulated structure active surface. The microelectronic package may also have an active surface microelectronic device positioned proximate the encapsulated structure active surface and in electrical contact with at least one of the plurality of microelectronic devices of the encapsulated substrate.
US09685388B2 Picture frame stiffeners for microelectronic packages
A microelectronic package may be formed with a picture frame stiffener surrounding a microelectronic die for reducing warpage of the microelectronic package. An embodiment for fabricating such a microelectronic package may include forming a microelectronic die having an active surface and an opposing back surface, wherein the microelectronic die active surface may be attached to a microelectronic substrate. A picture frame stiffener having an opening therethrough may be formed and placed on a release film, wherein a mold material may be deposited over the picture frame stiffener and the release film. The microelectronic die may be inserted into the mold material, wherein at least a portion of the microelectronic die extends into the picture frame opening. The release film may be removed and a portion of the mold material extending over the microelectronic die back surface may then be removed to form the microelectronic package.
US09685387B1 Test key for checking the window of a doped region and method of using the test key
A test key and a method for checking the window of a doped region using the test key are provided in the present invention. The test key includes a P-type first well region on a substrate, a P-type substrate region adjacent to the first well region, a N-type first doped region partially overlapping the first well region, two P-type second doped regions at two opposite sides of the first well region, a N-type second well region surrounding the first doped region, the substrate region and the two second doped regions, and a plurality of test pads above the above-identified region.
US09685386B2 Semiconductor test structure for MOSFET noise testing
The present invention provides a semiconductor test structure for MOSFET noise testing. The semiconductor test structure includes: a MOSFET device having a first conductivity type formed on a first well region of a semiconductor substrate; a metal shielding layer formed on the MOSFET device, the metal shielding layer completely covering the MOSFET device and extending beyond the circumference of the first well region; a deep well region having a second conductivity type formed in the semiconductor substrate close to the bottom surface of the first well region, the deep well region extending beyond the circumference of the first well region; wherein a vertical via is formed between the portion of the metal shielding layer extending beyond the first well region and the portion of the deep well region extending beyond the first well region to couple the metal shielding layer to the deep well region. The metal shielding layer is used to be connected to the ground terminal of a testing machine during testing, and the first conductivity type and the second conductivity type are opposite conductivity types.
US09685385B1 Method of fabricating semiconductor device
The present invention provides a method for forming a semiconductor device, including the following steps: first, a substrate is provided, at least one gate is formed on the substrate, a contact etching stop layer (CESL) and a first dielectric layer are formed on the substrate in sequence, afterwards, a first etching process is performed to remove the first dielectric layer, and to expose a top surface and at least one sidewall of the etching stop layer, next, a second etching process is performed to partially remove the contact etching stop layer, and to form at least one epitaxial recess in the substrate. Afterwards, an epitaxial process is performed, to form an epitaxial layer in the epitaxial recess, and a contact structure is then formed on the epitaxial layer.
US09685377B2 Wafer processing method
A wafer is divided into individual device chips along a plurality of scheduled division lines. A protective film is formed by coating liquid-state resin, which is hardened by irradiation of ultraviolet rays thereon, on the front face of the wafer. The protective film is hardened by irradiating ultraviolet rays upon the protective film. A protective tape is adhered on a front face of the hardened protective film. A modified layer is formed by irradiating a laser beam of a wavelength having a transparency to the wafer along the scheduled division lines with a focal point thereof positioned in the inside of the wafer. A back face of the wafer is ground while grinding water is supplied to thin the wafer to a given thickness and divide the wafer into the individual device chips along the scheduled division lines using the modified layer as a start point of the break.
US09685373B2 Conductive plug and method of forming the same
A method of forming a conductive plug is disclosed. A material layer having at least one opening is provided on a substrate. A first conductive layer is deposited in the opening, wherein the first conductive layer does not completely fill up the opening. A second conductive layer is deposited on the first conductive layer. A surface treatment is performed after the step of depositing the first conductive layer and before the step of depositing the second conductive layer, so that the first deposition rate of the second conductive layer at the lower portion of the opening is greater the second deposition rate of the second conductive layer at the upper portion of the opening. A void-free conductive plug can be easily formed with the method of the invention.
US09685372B2 Method of forming Cu pillar bump with non-metal sidewall spacer and metal top cap
A method of forming an integrated circuit device includes forming a conductive element over a substrate, wherein the conductive element is over an under bump metallurgy (UBM) layer, and the UBM layer comprises a first UBM layer and a second UBM layer over the first UBM layer. The method further includes etching the second UBM layer to expose a portion of the first UBM layer beyond a periphery of the conductive element. The method further includes forming a protection layer over sidewalls of the conductive element, over sidewalls of the second UBM layer and over a top surface of the first UBM layer. The method further includes etching the first UBM layer to remove a portion of the first UBM layer. The method further includes forming a cap layer over a top surface of the conductive element.
US09685371B2 Method of enabling seamless cobalt gap-fill
Methods for depositing a metal layer in a feature definition of a semiconductor device are provided. In one implementation, a method for depositing a metal layer for forming a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a metal layer on a substrate and annealing the metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the metal layer on the substrate, exposing the portion of the metal layer to either a plasma treatment process or hydrogen annealing process and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the metal layer to either a plasma treatment process or hydrogen annealing process until a predetermined thickness of the metal layer is achieved.
US09685365B2 Method of forming a wire bond having a free end
A method of forming a wire bond having a free end includes joining an end of a metal wire to a conductive element at a surface of a first component, the end of the metal wire being proximate a surface of a bonding tool adjacent an aperture through which the metal wire extends. A predetermined length of the metal wire is drawn out from the aperture. The surface of the bonding tool is used to plastically deform a region of the metal wire between the surface of the bonding tool and a metal element at the surface of the first component. The bonding tool then applies tension to the metal wire to cause a first portion of the metal wire having the end joined to the conductive element to detach from a remaining portion of the metal wire at the plastically deformed region.
US09685361B2 Container transport facility
A support body includes a protrusion that protrudes in the horizontal direction from a base and passes through a notch in the vertical direction when a container is transferred, and the lateral width of the protrusion is formed to be narrower than the lateral width of the container. A small container and a large container configured to be wider than the small container in the lateral width direction exist as the container. The support body includes, as support body-side supporting parts, three support body-side small container supporting parts that support three small container supported parts located on the bottom surface of the small container, and a support body-side edge supporting part that supports an edge of the outer periphery of the bottom surface of the large container near the base.
US09685356B2 Substrate support assembly having metal bonded protective layer
A substrate support assembly comprises a ceramic body and a thermally conductive base bonded to a lower surface of the ceramic body. The substrate support assembly further comprises a protective layer metal bonded to an upper surface of the ceramic body, wherein the protective layer is a bulk sintered ceramic article.
US09685353B2 Apparatus and method for edge bevel removal of copper from silicon wafers
Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems provide the thin layer of pre-rinsing liquid before applying etchant at the edge bevel region of the wafer. The etchant is less diluted and diffuses faster through a thinned layer of rinsing liquid. An edge bevel removal embodiment involving that is particularly effective at reducing process time, narrowing the metal taper and allowing for subsequent chemical mechanical polishing, is disclosed.
US09685349B2 Laser-induced forming and transfer of shaped metallic interconnects
A method of forming and transferring shaped metallic interconnects, comprising providing a donor substrate comprising an array of metallic interconnects, using a laser system to prepare the metallic interconnects, forming shaped metallic interconnects, and transferring the shaped metallic interconnect to an electrical device. An electronic device made from the method of providing a donor ribbon, wherein the donor ribbon comprises an array of metal structures and a release layer on a donor substrate, providing a stencil to the metal structures on the donor substrate, applying a laser pulse through the donor substrate to the metal structures, and directing the metal structures to an electronic device.
US09685348B2 Semiconductor device, method of manufacturing the same and power converter
An object is to avoid an increase in contact resistance of an ohmic electrode by etching in a semiconductor device. There is provided a method of manufacturing a semiconductor device. The method of manufacturing comprises forming a semiconductor layer; forming an ohmic electrode by stacking a plurality of metal layers, on the semiconductor layer; forming another metal layer that is mainly made of another metal different from a material of an outermost layer among the plurality of metal layers, on the ohmic electrode; removing the another metal layer from top of the ohmic electrode by etching; and processing the ohmic electrode by heat treatment, subsequent to the etching.
US09685346B2 Method of generating plasma in remote plasma source and method of fabricating semiconductor device using the same method
Provided are a method of generating plasma and a method of fabricating a semiconductor device including the method, which may improve selectivity in an etching process and minimize damage to layers. The method of generating plasma includes generating first plasma by supplying at least one first process gas into a first remote plasma source (RPS) and applying first energy having a first power at a first duty ratio, and generating second plasma by supplying at least one second process gas into a second RPS and applying second energy having a second power at a second duty ratio.
US09685345B2 Semiconductor devices with integrated Schottky diodes and methods of fabrication
An embodiment of a semiconductor device includes a semiconductor substrate that includes an upper surface and a channel, a gate electrode disposed over the substrate electrically coupled to the channel, and a Schottky metal layer disposed over the substrate adjacent the gate electrode. The Schottky metal layer includes a Schottky contact electrically coupled to the channel which provides a Schottky junction and at least one alignment mark disposed over the semiconductor substrate. A method for fabricating the semiconductor device includes creating an isolation region that defines an active region along an upper surface of a semiconductor substrate, forming a gate electrode over the semiconductor substrate in the active region, and forming a Schottky metal layer over the semiconductor substrate. Forming the Schottky metal layer includes forming at least one Schottky contact electrically coupled to the channel and providing a Schottky junction, and forming an alignment mark in the isolation region.
US09685344B2 Method of fabricating a semiconductor device including a plurality of isolation features
A method of fabricating a semiconductor device includes etching a substrate to form a plurality of first trenches and a plurality of second trenches performed at an electrostatic chuck (ESC) temperature between about 90° C. to 120° C. in the substrate, wherein each trench of the plurality of first trenches extends downward from the substrate major surface to a first height, and each trench of the plurality of second trenches extends downward from the substrate major surface to a second height greater than the first height. The method includes forming a first isolation structure in each of the plurality of first trenches. The method includes forming a second isolation structure in each of the plurality of second trenches, wherein a difference between a height of the first isolation structure and the first height equals a difference between a height of the second isolation structure and the second height.
US09685343B2 Method for producing polished object and polishing composition kit
[Problem] To provide a method for producing a polished object, which can remarkably reduce a haze level on a surface of the object to be polished while defects are significantly reduced.[Solution] A method for producing a polished object, which includes a double-side polishing step in which an object to be polished is subjected to double-side polishing using a double-side polishing composition including first abrasive grains having an average primary particle diameter of 40 nm or more and a nitrogen-containing water-soluble polymer to obtain a double-side polished object; and a single-side polishing step in which the double-side polished object is subjected to single-side polishing using a single-side polishing composition including second abrasive grains having an average primary particle diameter of 40 nm or less and a water-soluble polymer, and in which a ratio of an average primary particle diameter (A) of the first abrasive grains with respect to an average primary particle diameter (B) of the second abrasive grains (A)/(B) is more than 1 and 2.5 or less.
US09685342B2 Wafer processing apparatuses and methods of operating the same
Wafer processing apparatuses and methods of operating the same are provided herein. In an embodiment, a wafer processing apparatus includes a rotatable platen that has the capacity to support a polishing pad on a pad mounting surface of the rotatable platen. A drive assembly is coupled to the rotatable platen and has the capacity to rotate the rotatable platen. A polishing head is coupled to a head actuator. The polishing head is disposed adjacent to and over a first portion of the pad mounting surface and the polishing head is movable relative to the pad mounting surface by the head actuator. An optical sensor has a vision field including a second portion of the pad mounting surface. The first portion and the second portion of the pad mounting surface are at least partially offset. A control unit is operatively connected to the drive assembly and the head actuator.
US09685339B2 Scalable split gate memory cell array
A split gate memory array includes a first row having memory cells; a second row having memory cells, wherein the second row is adjacent to the first row; and a plurality of segments. Each segment includes a first plurality of memory cells of the first row, a second plurality of memory cells of the second row, a first control gate portion which forms a control gate of each memory cell of the first plurality of memory cells, and a second control gate portion which forms a control gate of each memory cell of the second plurality of memory cells. The first control gate portion and the second control gate portion converge to a single control gate portion between neighboring segments of the plurality of segments.
US09685334B1 Methods of forming semiconductor fin with carbon dopant for diffusion control
Methods of forming a semiconductor fin and methods for controlling dopant diffusion to a semiconductor fin are disclosed herein. The methods provide alternative ways to incorporate a carbon dopant into the fin to later control out-diffusion of dopants from a dopant-including epitaxial layer. One method includes depositing a carbon-containing layer over a portion of the fin adjacent to the gate and annealing to diffuse carbon from the carbon-containing layer into at least the portion of the semiconductor fin. This method can be applied to SOI or bulk semiconductor substrates. Another method includes epitaxially growing a carbon dopant containing semiconductor layer for later use in forming the fin.
US09685333B2 Manufacturing method of silicon carbide semiconductor device
A method of manufacturing a silicon carbide semiconductor device includes grinding a back surface of a semiconductor substrate formed of silicon carbide to reduce thickness thereof and provide an altered layer that is ground; removing by polishing or etching, the altered layer from the back surface; forming a nickel film on the back surface of the semiconductor substrate after removing the altered layer; heat treating the nickel film to forming a nickel silicide layer by silicidation; and forming a metal electrode on a surface of the nickel silicide layer.
US09685331B1 Semiconductor device manufacturing method and pattern forming method
A semiconductor device manufacturing method includes forming a first film on a substrate having a first region and a second region. A second film is formed on the first film. Guide grooves are formed by removing portions of the second film and exposing the first film. A self-assembly material is coated on the exposed first film and heated to cause a phase separation into a first and a second phase section. The self-assembly material is irradiated. A mask pattern including at least a portion of the first phase section is formed by removing the second phase section. The mask pattern has a first dimension in the first region and a second dimension in the second region that is different from the first dimension. The first film is etched after the mask pattern is formed.
US09685319B2 Method for filling gaps of semiconductor device and semiconductor device formed by the same
A method for filling gaps of semiconductor device and a semiconductor device with insulation gaps formed by the same are provided. First, a silicon substrate with plural protruding portions is provided, and the protruding portions are spaced apart from each other by gaps with predetermined depths. A nitride-containing layer is formed above the silicon substrate for covering the protruding portions and surfaces of the gaps as a liner nitride. Then, an amorphous silicon layer is formed on the nitride-containing layer. An insulating layer is formed on the amorphous silicon layer, and the gaps are filled up with the insulating layer.
US09685315B2 Method of producing epitaxial wafer and the epitaxial wafer having a highly flat rear surface
The present invention provides a method of producing an epitaxial wafer having a highly flat rear surface without polishing top and rear surfaces of the epitaxial wafer after forming an epitaxial film. A method of producing an epitaxial wafer 100 according to the present invention comprises a step of preparing a semiconductor wafer 10 having a beveled portion 11 formed on its end portion, a first surface 12b, a second surface 12a opposite to the first surface 12b, and edges 13b and 13a on both of the first surface 12b and the second surface 12a, the each edge 13a and 13b is boundary with the beveled portion 11; a step of processing of rolling off an outer peripheral portion 14 of the first surface 12b to form a roll-off region, the outer peripheral portion 14 is extending outward of the wafer from a predetermined position P inner than the position of the edge 13b on 12a the first surface 12b; and a step of forming a first epitaxial film 20 on the second surface 12a.
US09685312B2 Removal of ions from survey scans using variable window band-pass filtering to improve intrascan dynamic range
Systems and methods are used to band-pass filter ions from a mass range. A full spectrum is received for a full scan of a mass range using a tandem mass spectrometer. A mass selection window of the full spectrum is selected and a set of tuning parameter values is selected. The tandem mass spectrometer is instructed to perform a scan of the mass selection window using the set of tuning parameter values. A spectrum is received for the scan from the tandem mass spectrometer. A band-pass filtered spectrum is created for the mass range that includes values from the spectrum for the mass selection window of the mass range. Systems and methods are also used to band-pass filter ions from two or more mass selection windows across the mass range and to filter out ions from a mass selection window between two band-pass mass selection windows.
US09685311B2 Methods for detecting reverse triiodothyronine by mass spectrometry
Provided are methods for determining the amount of reverse T3 in a sample using mass spectrometry. The methods generally involve ionizing reverse T3 in a sample and detecting and quantifying the amount of the ion to determine the amount of reverse T3 in the sample.
US09685308B2 Getter pumping system
Getter pumping system particularly useful for linear accelerators or more generally high-volume environments, wherein a plurality of getter cartridges (100, 100′, 100″, . . . 100n) having a linear support (110, 110′, 110″, . . . 110n) and a plurality of linear heaters (120, 120′, . . . 120n) are connected in a high-density configuration to a wall (11) that has a surface area of at least 0.5 m2.
US09685304B2 Isotopically-enriched boron-containing compounds, and methods of making and using same
An isotopically-enriched, boron-containing compound comprising two or more boron atoms and at least one fluorine atom, wherein at least one of the boron atoms contains a desired isotope of boron in a concentration or ratio greater than a natural abundance concentration or ratio thereof. The compound may have a chemical formula of B2F4. Synthesis methods for such compounds, and ion implantation methods using such compounds, are described, as well as storage and dispensing vessels in which the isotopically-enriched, boron-containing compound is advantageously contained for subsequent dispensing use.
US09685297B2 Systems and methods for monitoring faults, anomalies, and other characteristics of a switched mode ion energy distribution system
Systems, methods and apparatus for regulating ion energies in a plasma chamber and chucking a substrate to a substrate support are disclosed. An exemplary method includes placing a substrate in a plasma chamber, forming a plasma in the plasma chamber, controllably switching power to the substrate so as to apply a periodic voltage function (or a modified periodic voltage function) to the substrate, and modulating, over multiple cycles of the periodic voltage function, the periodic voltage function responsive to a defined distribution of energies of ions at the surface of the substrate so as to effectuate the defined distribution of ion energies on a time-averaged basis.
US09685294B2 Fuse
A fusible link (11) includes a fuse element (13) provided with a fusible conductor part (25) which has a melting part (31) provided between parallel inner side edges (21) of a first terminal part (17) and a second planar terminal part (19). The fusible link (11) also includes an insulative housing (15), having a melting part accommodating space (35) to accommodate the melting part (31) therein, which is mounted to a front surface side of the fuse element (13) to cover the inner side edges (21) of the first planar terminal part (17) and the second planar terminal part (19) and the fusible conductor part (25).
US09685292B2 Electrical switching apparatus and pole shaft catch assembly therefor
A pole shaft catch assembly is for an electrical switching apparatus, such as a circuit breaker. The circuit breaker includes a housing, separable contacts enclosed by the housing, and an operating mechanism for opening and closing the separable contacts. The operating mechanism includes a pole shaft pivotably coupled to the housing and a yoke assembly coupled to the pole shaft. The pole shaft catch assembly includes a catch arm. The catch arm moves between an engaged position in which the catch arm engages the yoke assembly to restrict movement of the yoke assembly and the pole shaft, and a disengaged position in which the catch arm disengages the yoke assembly. A biasing element biases the catch arm toward the disengaged position. A trigger translates movement of the yoke assembly into movement of the catch arm.
US09685287B2 Circuit breakers with moving contact having heel-toe action
Circuit breakers with moving contacts having heel-toe action are configured to direct arcing across a small portion of a stationary contact surface to an adjacent arc chute to thereby alleviate deterioration due to arcing and improve conductivity of a major portion of the stationary contact and moving contact surface over time.
US09685286B2 Keyboard device
There is provided a keyboard device including a plurality of key tops that include magnets and are depressible, an opposing member which is provided to face the plurality of key tops and in which signal lines are wired, and a plurality of openings that is formed corresponding to positions of the magnets when the key tops are pressed in the opposing member. The signal lines are wired while avoiding the openings.
US09685285B2 Single actuator control switch
A control switch includes a key, a housing structure, in the upper portion of which the key is secured in a manner such that the key can rotate about a first fulcrum. A tip is secured at one end to the key and moving integrally therewith, so as to slide along a first axis (X) of the key is countered by an elastic element. A printed circuit board includes at least two push-buttons, arranged in the lower portion of the housing structure. The housing structure includes in its internal portion, a flared structure having two inclined contact planes specularly opposite with respect to a second vertical axis (Z) and forming a first obtuse angle (a), on which the tip can slide along its stroke. The flared structure is structurally secured to the housing structure. The switch includes at least one actuator positioned in proximity to the flared structure.
US09685281B2 Safety mechanism for medical treatment device and associated methods
A safety mechanism for medical treatment devices includes a switch actuator that depresses a power activation switch after movement in a first direction followed movement in a second direction. The safety mechanism thus prevents accidental or unintentional delivery of power to a heating segment of the medical treatment device.
US09685279B2 Switch
A switch has a base comprising a flat circular recess formed on an upper surface thereof, a fixed contact disposed in an inner surface of the flat circular recess, a spring body that has a bellows shape in which a reference form unit is repetitively formed, the spring body being annularly disposed in the flat circular recess of the base, an operating body that has a turning unit fitted turnably in the flat circular recess of the base, and an operating projection provided in an inward surface of the turning unit. When the operating body is turned, the operating projection presses an end portion of the spring body to compress the spring body, which allows a contact to be switched.
US09685277B2 Electrode
An electrode which can have an improved performance such as higher discharge capacity and in which deterioration due to peeling of an active material layer or the like is difficult to occur are provided. The electrode includes an active material layer including a first protrusion, a second protrusion and a continuous active material film, a metal oxide layer, and a continuous mixed layer. The first protrusion, the second protrusion and the continuous active material film includes silicon. The metal oxide layer includes oxygen and a metal element which is capable of forming silicide by reacting with silicon. The continuous mixed layer includes silicon and the metal element.
US09685274B2 Electric capacitor for a coolant compressor
The invention relates to an electric capacitor having at least one capacitor coil, a cylindrical housing that surrounds the capacitor coil, composed of metal, electric connectors, and connection lines that run in the housing interior and electrically connect the capacitor coil with the connectors, wherein at least one connection line has a planned breaking point, and wherein at least one circumferential depression is formed in the mantle of the housing, which depression divides the housing into a first segment and a second segment and can be unfolded by means of excess pressure in the housing interior, wherein the first segment surrounds the capacitor coil and the second segment carries the connectors.
US09685273B2 Chip capacitor, circuit assembly, and electronic device
A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.
US09685270B2 High K dielectric composition for thermoformable capacitive circuits
This invention is directed to a polymer thick film thermoformable dielectric composition with a high dielectric constant. Dielectrics made from the composition can be used in various electronic applications to enhance the performance of thermoformable capacitive circuits.
US09685269B2 Method of forming an insulated electric conductor
A method of anodizing a coil comprised of wire having a copper core and a layer of a metal formed on the core is disclosed. The metal has electrically insulating characteristics when anodized. Two variations of the method are provided. In the first variation, the metal-clad wire is partially anodized prior to being wound on a spool to form a coil. Once the partially anodized wire is wound onto a spool the coiled wire is anodized to complete anodization. The anodized coiled wire may be rinsed to remove residual electrolytic material. In the second variation, the metal-clad wire is wound on a spool to form a coil. The coiled wire is then anodized. The method of the disclosed invention reduces or entirely eliminates the presence of micro cracks in the oxide layer. The resulting coil may be used in motors, electromagnets, generators, alternators and subsystems for the same.
US09685265B2 Wearable magnet housing
Wearable housings are configured in size and shape to be securely attached to a strap, such as a belt, suspender, backpack strap, rifle strap, shoulder bag strap, vest, carrier, or other strap with one or more clasping members. One or more magnets are positioned within the substantially hollow receptacle area(s) of the wearable housing. The magnet(s) have sufficient holding force to securely hold a handgun or other item against the wearable housing for ready access.
US09685264B2 Die assembly and method for manufacturing wound motor laminated article
A stator core is formed from a continuous strip of wound sheet stock material, in which the sheet stock material is converted from the sheet stock to a formed material including winding slot cutouts. This strip of formed material is then wound into the stator core, with the winding slot cutouts in the formed material maintained at a substantially constant width throughout most of the radial extent of the resulting winding slots in the finished article. However, one or more of the radially innermost and radially outermost layers may define winding slot cutouts that are wider than the other winding slot cutouts. Where several radial layers are altered in this way, the cutout widths are progressively expanded such that the resulting winding slot has terminal ends with edges that are effectively “radiused” or rounded, thereby protecting windings near the edge of such slots.
US09685263B2 Coil component
A coil component is constituted by a composite magnetic material containing alloy grains whose oxygen atom concentration in their surfaces is 50 percent or less, and resin, and also by a coil. The coil component using the composite magnetic material does not require high pressure when formed.
US09685262B2 Surge arrester module and surge arrester
A surge arrester module including: first and second end electrodes; and a stack of cylindrical elements including at least one varistor block. The first end electrode includes a first part and a second part. A connecting element is provided between the first end electrode parts in order to keep them electrically connected to each other if a gap is formed between them. At least one clamping member is connected to the second end electrode and to the first part of the first end electrode in order to press them towards each other in the axial direction. The clamping member or at least one other clamping member is connected to the second end electrode and to the second part of the first end electrode in order to press them towards each other in the axial direction.
US09685258B2 Hybrid carbon nanotube shielding for lightweight electrical cables
A cable comprising hybrid carbon nanotube (CNT) shielding includes at least one conducting wire; at least one insulating layer covering at least one of the at least one conducting wire; a metallic foil component configured for lower frequency shielding function; and a CNT tape component configured for higher frequency shielding function.
US09685256B2 Wire harness
In a splice connection member, a core wire holder is integrally formed on an interior of each of a plurality of depressions into which coated wires can be guided. A plurality of pressure blades are provided opposite each other on a wire introduction opening side of the depressions, the pair of pressure blades separated by a distance smaller than an inlet diameter of the wire introduction opening. Each of the pressure blades includes a plurality of blade tips separated by a distance in an axis direction of the coated wires smaller than a thickness of the coating, and the core wire holder includes a plurality of pressure portions. A communicating groove is formed in each of the depressions so as to be open on two ends, passing between the plurality of pairs of blade tips, the communicating groove extending in a circumference direction of each of the coated wires.
US09685255B2 Synergistic blends of calcium carbonate and calcined clay
A lead-free composition comprising: (A) Polyvinyl chloride (PVC); (B) Bioplasticizer; (C) Calcium Carbonate; and (D) Calcined clay; with the combined weight of the calcium carbonate and calcined clay in the composition in the range of 1 to 15 weight percent, and the weight ratio of calcium carbonate to calcined clay in the range of 15:85 to 85:15. In one embodiment the invention is an insulation sheath for a wire or cable made from the lead-free composition described in the preceding embodiment. In one embodiment the invention is a wire or cable comprising the insulation sheath of the preceding embodiment.
US09685251B2 Interferometric dynamic-grating imaging method, diffraction grating and imaging apparatus
The present invention relates to a method for producing an image of a target using radiation and a diffraction grating and apparatus for x-ray imaging. The method comprises directing a beam of radiation to the target to produce a modified beam through interaction with the target, directing the modified beam to an diffraction grating to produce an interference pattern, detecting the interference pattern using a detector, and forming an image of the target using the interference pattern measured. According to the invention, the diffraction grating is modified n the plane of the grating during the imaging so that at least two interference patterns are detected using the detector different configurations of the diffraction grating. Further, the image of the target using the at least two interference patterns measured. The invention provides a simple configuration, less radiation exposure and/or better image quality then conventional imaging methods.
US09685249B2 Beta voltaic battery and method of preparing the same
Provided is a beta voltaic battery including a first semiconductor layer, a second semiconductor layer, and a beta-ray generator which is disposed between the first semiconductor layer and the second semiconductor layer and includes a metal substrate having both sides coated with a radioisotope layer. The beta voltaic battery according to the present invention has no sealing layer, but may efficiently shield beta rays through a sandwich structure. Since the sealing layer is absent, the absorption of beta rays by the semiconductor may be improved, and excellent energy conversion efficiency may be obtained because output is improved due to the two semiconductor layers and the radioisotope ray source coated on the both sides.
US09685242B2 Memory system
According to one embodiment, a memory system includes a memory, an encoding unit, an interface unit, a decoding unit and a changing unit. The encoding unit is configured to encode first data to generate second data. A size of the second data is equal to a first size. A size of the first data is equal to a second size which is smaller than the first size. The interface unit is configured to store the second data in the memory and to read the second data from the memory. The decoding unit is configured to decode the second data read from the memory to perform detection of an error. The changing unit is configured to change the second size according to an occurrence situation of the error.
US09685240B1 Memory device to alleviate the effects of row hammer condition and memory system including the same
There may be provided a memory or memory system. A memory may include an active cell array comprising a plurality of unit cells coupled to a word line and configured to store an active count of the word line. The memory may include a read control circuit configured to read the active count of the word line from the active cell array. The memory may be configured to refresh an adjacent word line of the corresponding word line based on the active count of the word line.
US09685238B2 Clock signal generation device and memory device including the same
A clock signal generation device includes a variable voltage providing circuit, a fixed voltage providing circuit and a clock signal generating circuit. The variable voltage providing circuit provides a variable reference voltage based on a selection signal, a reference voltage and a temperature coefficient. The variable reference voltage is varied according to temperature. The fixed voltage providing circuit provides a fixed reference voltage that is determined according to the selection signal. The fixed reference voltage is a constant voltage. The clock signal generating circuit provides a clock signal based on the fixed reference voltage and the variable reference voltage. The performance of the clock signal generation device may be increased by providing the clock signal based on the variable reference voltage that is varied according to the temperature and based on the fixed reference voltage.
US09685236B2 Memory chip, memory device, and reading method
A memory chip includes a memory cell array having a plurality of memory cells connected to word lines and bit lines, and a sense amplifier configured to detect data stored in a memory cell that is connected to a selected one of the word lines and a selected one of the bit lines, and a control circuit configured to read data from the memory cell in a first read mode when a first command is received and in a second read mode when a second command is received. A peak or an average value of an operation current that is flowing between power supply and ground terminals of the memory chip during a read operation in the first read mode is less than a peak or an average value of the operation current during a read operation in the second read mode.
US09685228B2 Reference and sensing with bit line stepping method of memory
A sensing method for a memory is provided. The memory includes: a memory cell; a reference circuit generating a reference voltage and a clamp voltage; and a current supplying circuit receiving the clamp voltage to develop a cell current passing through the memory cell to form a cell voltage, wherein the cell voltage is used for incorporating with the reference voltage to determine the information stored in the memory.
US09685222B2 Memory cell with read transistors of the TFET and MOSFET type to reduce leakage current
Memory cell of the SRAM type, including storage transistors forming a memory point for storing a bit and a read port having at least one MOS transistor, a TFET transistor, a power terminal and a read bit line whereof a potential is designed to vary depending on the value of the stored bit, and such that: the gate of the MOS transistor is connected to the memory point, and the gate of the TFET transistor is able to receive a read command signal; a first electrode of the MOS transistor is connected to the power supply terminal; a second electrode of the MOS transistor is connected to a first electrode of the TFET transistor; a second electrode of the TFET transistor is connected to the read bit line.
US09685216B2 Non-destructive readout ferroelectric memory as well as method of preparing the same and method of operating the same
A non-destructive readout ferroelectric memory as well as a method of preparing the ferroelectric memory and a method of operating the ferroelectric memory are disclosed. The ferroelectric memory comprises a ferroelectric thin film layer. The ferroelectric memory of the invention can realize a non-destructive readout by way of current, is suitable for a high density application, is simple in preparation and has a low cost.
US09685213B2 Provision of holding current in non-volatile random access memory
Embodiments of the present disclosure describe techniques and configurations for controlling current in a non-volatile random access memory (NVRAM) device. In an embodiment, the NVRAM device may include a plurality of memory cells coupled to a plurality of bit lines forming a bit line node with parasitic capacitance. Each memory cell may comprise a switch device with a required level of a holding current to maintain an on-state of the cell. A voltage supply circuitry and a controller may be coupled with the NVRAM device. The controller may control the circuitry to provide a current pulse that keeps a memory cell in on-state. The pulse may comprise a profile that changes over time from a set point to the holding current level, in response to a discharge of the bit line node capacitance through the memory cell after the set point is achieved. Other embodiments may be described and/or claimed.
US09685212B2 Method and apparatus for timing adjustment
A strobe signal from a memory is delayed through delay circuits of a strobe delay selection section, thus obtaining a plurality of delayed strobe signals. A strobe latch section produces check data in synchronism with each of the delayed strobe signals, and a system latch section latches, with a system clock, check data latched by the strobe latch section. Based on a comparison by an expected value comparison section and a determination by a delay determination section, the optimal strobe signal with the optimal delay is selected from among the delayed strobe signals produced in the strobe delay selection section. Then, data from the memory is delayed through delay circuits in a data delay selection section, thus obtaining a plurality of delayed data, and the optimal data with the optimal delay is selected from among the plurality of delayed data based on the comparison by the expected value comparison section and the determination by the delay determination section.
US09685211B2 Nonvolatile memory devices and storage devices including nonvolatile memory devices
The inventive concepts relate to nonvolatile memory devices. The nonvolatile memory devices may include a memory cell array, and a page buffer circuit connected to the memory cell array through bit lines. The page buffer circuit may comprise a substrate, bit line selection transistors on the substrate and connected to respective ones of the bit lines, and latches on the substrate connected to the bit line selection transistors through lines. The lines may be on a first plane above and parallel to a top surface of the substrate, and may be connected to respective ones of the bit line selection transistors through first contacts. The bit lines may be on a second plane above and parallel to a top surface of the substrate, and may be connected to respective ones of the bit line selection transistors through second contacts.
US09685209B1 Circuit for generating a sense amplifier enable signal with variable timing
A sense amplifier enable signal generating circuit includes an input coupled to a dummy bit line of a memory. A voltage comparator circuit compares a voltage on the dummy bit line to a threshold voltage and generates an output signal when the voltage falls below that threshold voltage. A multi-bit counter circuit counts a count value in response to the output signal. A pull-up circuit pulls up the voltage on the dummy bit line in response to the output signal. A count comparator circuit compares the count value to a count threshold and generates a sense amplifier enable signal when the count value equals the count threshold.
US09685208B2 Assist circuit for memory
Embodiments include apparatuses, methods, and systems related to an assist circuit that may be coupled to one or more components of a memory system to selectively lower a supply voltage that is delivered to the component. For example, the assist circuit may be coupled to a plurality of bitcells (e.g., register file bitcells). The assist circuit may selectively lower the supply voltage delivered to the bitcells during at least a portion of a write operation and/or during an inactive state of the bitcells. Additionally, or alternatively, the assist circuit may be coupled to a read circuit to selectively lower the supply voltage delivered to the read circuit during an inactive state of the read circuit. The assist circuit may include a control transistor coupled in parallel with one or more diodes between a main supply rail and a supply node of the bitcells and/or read circuit.
US09685207B2 Sequential access memory with master-slave latch pairs and method of operating
A synchronous sequential latch array generated by an automated system for generating master-slave latch structures is disclosed. A master-slave latch structure includes N/2 rows of master-slave latch pairs, an N/2-to-1 multiplexer and control logic. N is equal to the number of latches that are included in the latch array.
US09685206B2 Memory device, memory system, and method of controlling read voltage of the memory device
A memory device includes a memory cell array having a plurality of memory cells, and a page buffer unit including a plurality of page buffers configured to store a plurality of pieces of data sequentially read from some of the plurality of memory cells at different read voltage levels, respectively, and to perform a logic operation on the plurality of pieces of data, respectively. The memory device further includes a counting unit configured to count the number of memory cells that exist in each of a plurality of sections defined by the different read voltage levels, based on results of the logic operation.
US09685205B2 Semiconductor device
Data hold time is controlled without excessively increasing a circuit area. A semiconductor device includes a data buffer and a flip-flop formed of fin. As a delay line, gate wirings being in the same layer as gate electrodes of the fin are provided in a data signal path from a data output node of the data buffer to a data input node of the flip-flop.
US09685202B1 Near-field transducer having enlarged portion matching outline shape of heat sink
A near-field transducer includes an enlarged portion and a peg protruding from a first edge. The enlarged portion has a second edge facing away from the first edge. The near-field transducer includes a heat sink disposed on the enlarged portion and with an outline shape that matches that of the enlarged portion. The heat sink is disposed at a first separation distance from the first edge of the enlarged portion and a second, greater, separation distance from the second edge of the enlarged portion. The first separation distance is greater than the second separation distance.
US09685200B2 Apparatus, system and method for consolidating and recording high definition surgical video with a surgical data overlay
An apparatus, system and method of consolidation of HD video and a surgical data overlay, such as for recordation in a single consolidated video capture recording of the HD video and surgical data overlay for subsequent playback and/or storage; and an apparatus, system and method for recording HD surgical video consolidated with a surgical data overlay in which an automated switch occurs between at least two surgical HD video sources based, at least in part, on then-active surgical aspects.
US09685199B2 Editing apparatus and editing method
An editing apparatus includes an image analyzing section that analyzes a recorded video, a sound analyzing section that analyzes recorded sound, and a display control section that displays, on a display section, on the basis of an analysis result of the image analyzing section, a video bar indicator corresponding to a reproduction time of the recorded video and displays, on the display section, on the basis of an analysis result of the sound analyzing section, a sound bar indicator corresponding to a reproduction time of the recorded sound, the sound bar indicator having a time per unit length same as a time per unit length of the video bar indicator. The editing apparatus facilitates editing combination work for the video and the sound by arranging and displaying the video and the sound on time axes of the same scale.
US09685196B2 Sharing and synchronizing content
A device may provide a video content item for display and receive a request to share the video content item with another device for a synchronized playing of the video content item by the device and the other device. The device may generate a stream of the video content item based on a point within the video content item currently played by the device and transmit the stream to the other device to synchronize playing of the video content item by the device and the other device. The device may obtain information identifying a particular point within the video content item currently played by the other device, determine a synchronization point, in the video content item, based on the obtained information, and update, based on the synchronization point, to synchronize the stream. The device may transmit the synchronized stream, to the other device, to re-synchronize playing of the video content item.
US09685194B2 Voice-based video tagging
Video and corresponding metadata is accessed. Events of interest within the video are identified based on the corresponding metadata, and best scenes are identified based on the identified events of interest. A video summary can be generated including one or more of the identified best scenes. The video summary can be generated using a video summary template with slots corresponding to video clips selected from among sets of candidate video clips. Best scenes can also be identified by receiving an indication of an event of interest within video from a user during the capture of the video. Metadata patterns representing activities identified within video clips can be identified within other videos, which can subsequently be associated with the identified activities.
US09685189B1 Reduced reel motor disturbances in a tape drive system
An apparatus according to one embodiment includes a motor having a rotor, a take up reel coupled to the rotor, and a damping layer positioned between the rotor and the take up reel. The damping layer is constructed of a visco-elastic material. An apparatus according to another embodiment includes a motor having a rotor, a clutch coupled to the rotor, and a damping layer positioned between the rotor and the clutch. The damping layer is constructed of a visco-elastic material.
US09685188B2 Recording medium and manufacturing method of recording medium
Provided is a recording medium including an ink receiving layer. The ink receiving layer includes a hydrophilic resin and a low oil absorbing porous silica.
US09685184B1 NiFeX-based seed layer for magnetic recording media
A recording medium having improved signal-to-noise ratio (SNR) capabilities includes a NiFeX-based magnetic seed layer over a soft magnetic underlayer, where X comprises an element that is soluble in and has a higher melting point than Ni. X may be selected from a group of elements, including ruthenium (Ru), which may facilitate growth of smaller grains and distributions in the corresponding magnetic recording layer(s).
US09685182B1 Non-contact laser-induced protrusion measurement apparatus and method
A method and apparatus are directed to providing relative movement between a slider configured for heat-assisted magnetic recording and a magnetic recording medium, and causing protrusion of a portion of an air bearing surface (ABS) of the slider in response to activating at least a laser source while maintaining spacing between the protrusion and the medium. A magnitude of at least a portion of the protrusion is measured while maintaining spacing between the protrusion and the medium.
US09685181B2 Method of operating a data storage apparatus and data storage apparatus
In the present disclosure, a method of operating a data storage apparatus is provided. The method includes writing a data signal into a portion of a data layer in a recording medium of a data storage apparatus. The method further includes determining a data layer coupling interference value arising due to interference from the data layer provided in between a sensor head and a servo layer of the recording medium in reading servo data, the data layer coupling interference value determined based on the data signal. The method further includes writing the data layer coupling interference value onto the recording medium. A corresponding data storage apparatus is provided.
US09685178B1 Lateral spin valve reader with large-area tunneling spin-injector
A lateral spin valve reader includes a channel layer having a first end that is proximate to a bearing surface and a second end that is away from the bearing surface. The lateral spin valve reader also includes a detector structure disposed over an upper surface of a first portion of the channel layer that is proximate to the first end of the channel layer. A spin injection structure disposed below a lower surface of a second portion of the channel layer is proximate to the second end of the channel layer. An area of overlap between the spin injection structure and the second portion of the channel layer is substantially larger than an area of overlap between the detector structure and the first portion of the channel layer.
US09685176B2 Process to inhibit slider contamination during processing
Methods for forming a slider for a disc drive. One method includes forming a plurality of sliders on a wafer, applying a self-assembled monolayer coating on the plurality of sliders, and cutting the plurality of sliders into a plurality of individual sliders. Another method includes forming a plurality of sliders on a wafer, applying a low surface energy coating on the plurality of sliders, and cutting the plurality of sliders into a plurality of individual sliders.
US09685170B2 Pitch marking in speech processing
According to some embodiments of the present invention, there is provided a computerized method for selecting and correcting pitch marks in speech processing and modification. The method comprises an action of receiving a continuous speech signal representing audible speech recorded by a microphone, where a sequence of pitch values and two or more pitch mark temporal values are computed from the continuous speech signal. The method comprises an action of computing for each of the pitch mark temporal values a lower limit temporal value and an upper limit temporal value by a cross-correlation function of the continuous speech signal around the pitch mark temporal values associated with pairs of elements in the sequence and replacing one or more of the pitch mark temporal values with one or more new temporal value between the lower limit temporal value and the upper limit temporal value.
US09685168B2 Apparatus for encoding/decoding multichannel signal and method thereof
Provided is an encoding/decoding apparatus and method of multi-channel signals. The encoding apparatus and method of multi-channel signals may encode phase information of the multi-channel signals using a quantization scheme and a lossless encoding scheme, and the decoding apparatus and method of multi-channel signals may decode the phase information using an inverse-quantization scheme and a lossless decoding scheme.
US09685167B2 Multi-object audio encoding and decoding apparatus supporting post down-mix signal
A multi-object audio encoding and decoding apparatus supporting a post downmix signal may be provided. The multi-object audio encoding apparatus may include: an object information extraction and downmix generation unit to generate object information and a downmix signal from input object signals; a parameter determination unit to determine a downmix information parameter using the extracted downmix signal and the post downmix signal; and a bitstream generation unit to combine the object information and the downmix information parameter, and to generate an object bitstream.
US09685166B2 Classification between time-domain coding and frequency domain coding
A method for processing speech signals prior to encoding a digital signal comprising audio data includes selecting frequency domain coding or time domain coding based on a coding bit rate to be used for coding the digital signal and a short pitch lag detection of the digital signal.
US09685161B2 Method for updating voiceprint feature model and terminal
A method for updating a voiceprint feature model and a terminal are provided that are applicable to the field of voice recognition technologies. The method includes: obtaining an original audio stream including at least one speaker; obtaining a respective audio stream of each speaker of the at least one speaker in the original audio stream according to a preset speaker segmentation and clustering algorithm; separately matching the respective audio stream of each speaker of the at least one speaker with an original voiceprint feature model, to obtain a successfully matched audio stream; and using the successfully matched audio stream as an additional audio stream training sample for generating the original voiceprint feature model, and updating the original voiceprint feature model.
US09685160B2 Method for offering suggestion during conversation, electronic device using the same, and non-transitory storage medium
A method for offering suggestion during conversation, an electronic device using the same, and a non-transitory storage medium are provided. The method includes listening to a conversation on a first electronic device and a second electronic device, and determining whether the conversation satisfies a recommendation criterion. The method also includes determining whether at least one suggestion information exists in a database if the conversation satisfies the recommendation criterion. The method further includes displaying at least one suggestion option related to the at least one suggestion information on the first electronic device if the at least one suggestion information exists in the database.
US09685159B2 Speaker recognition from telephone calls
A method for speaker recognition comprising: obtaining speaker information for a target speaker; obtaining speech samples from telephone calls from an unknown speaker; classifying the speech samples according the unknown speaker thereby providing speaker-dependent classes of speech samples; extracting speaker information of each of the speaker-dependent classes of speech samples; combining the extracted speaker information; comparing the combined extracted speaker information with the stored speaker information for the target speaker to obtain a comparison result; and determining whether the unknown speaker is identical with the target speaker based on the comparison result.
US09685144B2 Toy piano
A toy piano including one or both an enlarged sound plate intermediate the sound bar of the toy piano and its sound board, and a sound box into which the sound board is incorporated. Preferably, the sound plate extends beyond the normal edges of the sound bar in which the longitudinal tines of the toy piano are mounted so as to lie adjacent to the sound board over a larger area. Likewise, the sound box should preferably be shaped so as to be somewhat wider (measured in the longitudinal direction of the tines) towards the end where the tines are longest (and produce lower tones) and somewhat narrower towards the end where the shorter tines (producing higher tones) are located. It preferred shape is characterized by somewhat convex curves at the more treble and bass ends, respectively, of the sound box with a somewhat concave curve intermediate these two ends. The backboard of the sound box can be bowed outward for enhance acoustics.
US09685141B2 MDLL/PLL hybrid design with uniformly distributed output phases
A circuit for generating a clock signal formed as a hybrid of a multiplying delay-locked loop (MDLL) and a phase locked loop (PLL). In one embodiment a chain of inverting delay multiplexers is connected in a ring configuration capable of operating as a ring oscillator, with a first delay multiplexer in the ring configured to substitute a feed-in clock signal for the feedback clock generated by the ring oscillator when an edge, either rising or falling, is received at the forwarded clock input. The first delay multiplexer may also be configured to interpolate between the phase of the feedback clock and the phase of the feed-in clock. The interpolation may be based on transistor channel widths and the value of a control signal, and results in behavior intermediate to that of an MDLL and that of a PLL.
US09685139B2 Perceptual luminance nonlinearity-based image data exchange across different display capabilities
A handheld imaging device has a data receiver that is configured to receive reference encoded image data. The data includes reference code values, which are encoded by an external coding system. The reference code values represent reference gray levels, which are being selected using a reference grayscale display function that is based on perceptual non-linearity of human vision adapted at different light levels to spatial frequencies. The imaging device also has a data converter that is configured to access a code mapping between the reference code values and device-specific code values of the imaging device. The device-specific code values are configured to produce gray levels that are specific to the imaging device. Based on the code mapping, the data converter is configured to transcode the reference encoded image data into device-specific image data, which is encoded with the device-specific code values.
US09685138B2 Brightness controlling method with brightness synchronizing functionality and all-in-one computer implementing the same
A brightness controlling method for an all-in-one computer is provided. The all-in-one computer includes an on-screen display adjusting unit having a first brightness value, an operating system having a first system brightness value, a control unit and a scaler. The brightness controlling method includes the following steps. First, the first brightness value is adjusted to a second brightness value or the first system brightness value is adjusted to a second system brightness value. Then, when the first brightness value is adjusted to the second brightness value, the control unit synchronizes the first system brightness value to the second brightness value; when the first system brightness value is adjusted to the second system brightness value, the scaler adjusts the first brightness value to the second system brightness value. The invention also provides an all-in-one computer implementing the brightness controlling method.
US09685137B2 Display device
According to an aspect, a display device includes: an image display unit in which pixels are arranged, each of the pixels including a fourth sub-pixel and surrounding sub-pixels arranged around the fourth sub-pixel, the fourth sub-pixels of the respective pixels being arranged in a two-dimensional matrix and displaying a white color component as a fourth color, each of the pixels sharing at least one of the surrounding sub-pixels with an adjacent pixel adjacent to the pixel; and a signal processing unit that, based on a first input video signal for a specific pixel and a second input video signal for an adjacent pixel adjacent to the specific pixel, generates an output signal for the surrounding sub-pixels belonging to the specific pixel and outputs the generated output signal to the image display unit.
US09685136B2 Display system and conversion apparatus
A display system and a conversion apparatus are provided. The display system includes an image signal input apparatus configured to convert a first parallel image signal to a serial image signal, a conversion apparatus configured to convert the serial image signal to a second parallel image signal, and a display apparatus configured to process the second parallel image signal, and display the processed second parallel image signal. The conversion apparatus is attachable to and detachable from the display apparatus.
US09685135B2 Display device, display method, and electronic device
Disclosed herein is a display device including: a display section configured to have a plurality of scanning signal lines to which respective scanning signals are applied, the display section performing line-sequential scanning by repeating interruption and resumption of the line-sequential scanning on a basis of the plurality of scanning signals, and displaying an image; and a scanning section configured to generate the plurality of scanning signals such that transition times on a pulse termination side of the respective scanning signals are equal to each other.
US09685134B2 Shift register unit, gate driving circuit and display device
The present invention provides a shift register unit, a gate driving circuit and a display device, which belongs to the field of display technology. The shift register unit of the present invention comprises: an input module, a pull-up module, a pull-down control module, a pull-down module, a reset module and a discharge module.
US09685131B2 Active-matrix substrate, method of manufacturing active-matrix substrate, and display panel
An objective is to provide a technique for reducing the size of the picture-frame region of the active-matrix substrate and improve the freedom of design, such as the freedom in designing the active-matrix substrate. An active-matrix substrate includes a group of gate lines and a group of source lines crossing the gate lines. At least some of the gate lines have a length that is smaller than the maximum value of the width of the active-matrix substrate as measured in the direction in which the gate lines extend. The active-matrix substrate further includes pixel electrodes connected with the gate lines and source lines, and gate line driving units (11) provided in the display region for switching the gate lines to the selected or non-selected state in response to a supplied control signal. First terminals (12s) for providing data signals from the source driver and second terminals (12g) for providing control signals from the display control circuit are provided in the portion of the picture-frame region that is adjacent a side of the display region.
US09685130B2 Display device
A display device includes a substrate, a gate line connected to a gate driver, a reference voltage line, a data line crossing the gate line and the reference voltage line, a first thin film transistor including a first drain electrode and connected to the gate line and the data line, a second thin film transistor including a second drain electrode, a third thin film transistor connected to the gate line, the reference voltage line, and the second thin film transistor, and a pixel electrode including a first sub-pixel electrode connected to the first thin film transistor and a second sub-pixel electrode connected to the second thin film transistor. The first drain electrode overlaps the reference voltage line, and an area of a region in which the first drain electrode and the reference voltage line overlap each other increases in a direction toward the gate driver.
US09685129B2 Liquid crystal display device
A scanning line drive unit sequentially selects a plurality of scanning lines, and utilizes a drive voltage generated by the booster circuit to control the operation of a thin-film transistor. A timing control unit controls the scanning line drive unit on the basis of a display signal, which includes a horizontal synchronization signal, a vertical synchronization signal and an image signal. A reference synchronization signal is input to the booster circuit during a period in which the scanning line drive unit selects none of the plurality of scanning lines. A booster circuit generates a non-selection voltage in synchronization with the reference synchronization signal in the abovementioned period. The scanning line drive unit outputs the non-selection voltage generated by the booster circuit to the plurality of scanning lines in the abovementioned period.
US09685127B2 Array substrate, method for driving array substrate, and display device
The present invention provides an array substrate, a driving method and a display device. The array substrate comprises a plurality of gate lines. A first gate line of the two adjacent gate lines is coupled to a first switch unit and a second gate line is coupled to a second switch unit. The first switch unit and the second switch unit are coupled to a control line, and are coupled to a gate drive output channel. The second switch unit is turned off when the first switch unit is turned on under control of the control line, and the first switch unit is turned off when the second switch is turned on under control of the control line. According to the present invention, it is able to effectively reduce the number of the gate drive ICs and thereby to reduce the cost.
US09685125B2 Apparatus and method of driving data of liquid crystal display device
An apparatus and method of driving data of a liquid crystal display device is disclosed, which can minimize an electromagnetic interference EMI noise by decreasing an output peak current of a data driver, the apparatus comprising a timing controller for supplying a reference source output enable signal; a delay circuit for delaying the reference source output enable signal and supplying a plurality of source output enable signals provided with the different delay times; and a data driver, including a plurality of data ICs to divide and drive data lines of a liquid crystal panel into a plurality of data blocks, for dispersing data output timing of the plurality of data ICs in response to the plurality of source output enable signals.
US09685124B2 Electro-optical device including a plurality of scanning lines
An electro-optical device includes, on a substrate, three sub-pixels, three sampling switches, three data lines, three image signal lines, and three lead wiring lines. The three sub-pixels correspond to red, green and blue, respectively. The three sub-pixels are included in a unit pixel. The three sampling switches correspond to the three sub-pixels, respectively. The three data lines electrically connect the three sub-pixels and the three sampling switches with each other, respectively. The three image signal lines, which are provided on a side opposite to the three sub-pixels with respect to the three sampling switches, correspond to the three sampling switches, respectively. The three lead wiring lines electrically connect the three sampling switches and the three image signal lines with each other, respectively. Among the three sampling switches, a sampling switch corresponding to green is disposed close to the three image signal lines compared to other two sampling switches.
US09685121B2 Electrowetting display device having improved aperture ratio and method of driving the same
An electrowetting display device includes an electrowetting pixel cell and a driving circuit. The electrowetting pixel cell including a polar liquid and a non-polar liquid disposed between a common electrode and a pixel electrode, the pixel electrode configured to receive a fixed voltage and the common electrode configured to receive a variable voltage that varies according to an image signal. The driving circuit configured to control an operation of the electrowetting pixel cell by, providing an image signal to the electrowetting pixel cell at a display interval where the electrowetting pixel cell displays an image, and providing a reset voltage to the electrowetting pixel cell at a reset interval. An absolute value of a difference between the voltage applied to the pixel electrode and the reset voltage is greater than that of a difference between the voltage applied to the pixel electrode and the voltage applied to the common electrode.
US09685119B2 Organic light emitting display for compensating for variations in electrical characteristics of driving element
An organic light emitting display is provided which offers shorter sensing time and higher sensing accuracy when sensing variations in electrical characteristics of a driving element. The organic light emitting display can include: a display panel with a plurality of pixels; a gate driving circuit that generates a sensing gate pulse corresponding to one line sensing ON time in a sensing operation and sequentially supplies the same to gate lines in a line sequential manner; a data driving circuit comprising a plurality of current integrators that perform an integration of the source-drain current of the driving TFT of each pixel input through the sensing lines and an ADC that sequentially digitizes the output of the current integrators to output digital sensed values; and a timing controller that controls the operations of the gate driving circuit and data driving circuit.
US09685118B2 Organic light-emitting display device and method of driving the same
An organic light-emitting display device includes a data line, a scan line, and a display panel including a pixel where the data line crosses the scan line. The pixel includes: a switching transistor including a gate electrode connected to the scan line and a first electrode connected to the data line; a first capacitor between a second electrode of the switching transistor and a reference voltage source; a second capacitor including a first terminal connected to the first electrode of the switching transistor via a first node and a second terminal connected to a second node; a driving transistor including a first electrode connected to a first power source via the second node, a second electrode connected to an organic light-emitting diode, and a gate electrode connected to the reference voltage source via a third node; and a third capacitor between the second and third nodes.
US09685116B2 Display device using a demultiplexer circuit
A display device is disclosed to include a display panel including a plurality of data lines, a plurality of gate lines, and a plurality of pixels coupled to the data lines and gate lines. The data lines include first and second data lines, and the pixels include first and second color pixels. The display device also includes a data driving circuit to generate data voltages through a plurality of output channels, a gate driving circuit coupled to the gate lines, and a timing controller to generate control signals to the data driving circuit and the gate driving circuit. The display device further includes a demultiplexer switching circuit with first demux switches to supply, when turned on, the data voltages from the output channels to the first data lines, and second demux switches to supply, when turned on, the data voltages from the output channels to the second data lines.
US09685114B2 Pixel circuits for AMOLED displays
A system for controlling a display in which each pixel circuit comprises a light-emitting device, a drive transistor, a storage capacitor, a reference voltage source, and a programming voltage source. The storage capacitor stores a voltage equal to the difference between the reference voltage and the programming voltage, and a controller supplies a programming voltage that is a calibrated voltage for a known target current, reads the actual current passing through the drive transistor to a monitor line, turns off the light emitting device while modifying the calibrated voltage to make the current supplied through the drive transistor substantially the same as the target current, modifies the calibrated voltage to make the current supplied through the drive transistor substantially the same as the target current, and determines a current corresponding to the modified calibrated voltage based on predetermined current-voltage characteristics of the drive transistor.
US09685113B2 Organic light emitting diode pixel compensation circuit, and display panel and display device containing the same
An OLED pixel compensation circuit includes first, second, third, fourth, fifth, sixth and seventh transistors and a storage capacitor. The first transistor has a gate electrode coupled to a scan signal, a first electrode coupled to a data signal, and a second electrode coupled to a gate electrode of the fifth transistor. The second transistor has a gate electrode coupled to the scan signal, a first electrode coupled to a power supply voltage, and a second electrode coupled to a second electrode of the storage capacitor. The third transistor has a gate electrode coupled to a first light emitting signal, a first electrode coupled to the power supply voltage. The transistors and the storage capacitor are configured to compensate the threshold voltage drift of the fifth transistor, which is the driving transistor for the OLED.
US09685104B2 Display control apparatus and related method
An independent display control apparatus communicates with a plurality of display devices. The display control apparatus includes a receiving module, a signal generating module, and a signal transmitting module. The receiving module receives the location information of a plurality of display devices and the signal generating module generates control signals based on the received locations, different locations can thus receive different control signals. Each of the control signals corresponds to a different segment of a predetermined media file transmitted to each display device and the group of display devices can thus be made to simulate the flight and bursting of a firework, or simulate the echoing of a single sound for example.
US09685100B2 Rollable display
A rollable display is disclosed. In one aspect, the rollable display includes a flexible display panel configured to display an image via at least a portion thereof and a housing accommodating at least a portion of the flexible display panel. The flexible display panel has a point of inflection in the portion of the flexible display panel accommodated in the housing.
US09685098B1 Driver compliance risk adjustments
A system for driver compliance risk adjustments includes an interface and a processor. The interface is to receive driver violation data. The processor is to determine risk based at least in part on the driver violation data and provide an event recorder one or more risk adjustments based at least in part on the risk.
US09685097B2 Device and method for detecting eating activities
Devices and methods for detecting an eating activity occurrence are provided. A device includes a sensor for monitoring movement of a portion of an arm of a subject, and a processor in communication with the sensor for collecting raw data associated with movement of the portion of the arm. The processor is configured to process the raw data and form processed data. The processed data includes a determination of whether an eating activity has occurred. A method includes sensing movement of a portion of an arm of a subject, and processing raw data associated with the movement of the portion of the arm of the subject to form processed data. The processed data includes a determination of whether an eating activity has occurred.
US09685096B2 Guidance system for learning to play piano
The present application generally relates to guidance systems configured to assist individuals in learning to play a piano. Specifically, the invention relates to a system for projecting animated guidance onto the keys of a standard piano, with such system being controlled by a computing device directing the speed, tempo, location and other aspects of displaying such guidance. Further embodiments of the invention also provide for the system projecting graphical images onto the keys of the piano to assist with note association.
US09685093B2 Customizable wireless education or occupational therapy tool having a switch unit and a transmitter unit
A wireless computer-aided occupational therapy and education tool for young children or children with developmental delays. The tool comprises a wireless input device and preferably a covering. The wireless input device of the tool comprises a switch, a transmitter, and identification code. The covering can be made in various shapes, sizes, and colors. The wireless input device is removably attachable to the covering.
US09685090B2 Navigational aids
Systems, methods and computer-storage media are provided for use of navigational aids. Three-dimensional graphical representations of flight plans, flight paths, waypoints, etc., may be displayed to improve situational awareness. Additionally, dynamic monitoring of airports, waypoints, traffic, etc., may be performed so that real-time updates are available to users. The real-time updates will not only include updated location information and any relevant navigational markers (e.g., updated waypoints, new traffic, etc.) but will also include detailed information related to the navigational markers such as a distance from the marker, an airspeed of the marker (if applicable), and the like.
US09685089B2 Commercial and general aircraft avoidance using acoustic pattern recognition
This disclosure is directed to a detection and avoidance apparatus for an unmanned aerial vehicle (“UAV”) and systems, devices, and techniques pertaining to automated object detection and avoidance during UAV flight. The system may detect objects within the UAV's airspace through acoustic, visual, infrared, multispectral, hyperspectral, or object detectable signal emitted or reflected from an object. The system may identify the source of the object detectable signal by comparing features of the received signal with known sources signals in a database. The features may include, for example, an acoustic signature emitted or reflected by the objet. Furthermore, a trajectory envelope for the object may be determined based on characteristic performance parameters for the object such as cursing speed, maneuverability, etc. The UAV may determine an optimized flight plan based on the trajectory envelopes of detected objects within the UAV's air-space.
US09685086B2 Power conservation in traffic safety applications
In one embodiment, a device sends collision avoidance safety messages to prevent potential collisions between vehicles and the portable electronic device. The device determines whether a current or predicted future location of the device intersects an action zone. An action zone corresponds to a geographic area in which a potential collision may occur between a vehicle and the device. The device adjusts a broadcast rate for the collision avoidance safety messages based on whether the device determines that the current or predicted future location of the device intersects an action zone.
US09685078B2 Traffic flow rates
One or more techniques and/or systems are provided for determining a scaled flow rate of traffic for a road segment. For example, probe flow rate information is determined based upon locational information from one or more probe vehicles on a road segment (e.g., a flow rate of probe vehicles corresponding to a sum of probe vehicles identified from time stamped global positioning system coordinates provided by the probe vehicles). Satellite imagery of the road segment is analyzed to identify a count of vehicles on the road segment. Scale factor and offset information is estimated based upon the probe flow rate information and the count of vehicles. The scale factor and offset information is used to scale the probe flow rate information to determine a scaled flow rate that may be a relatively accurate flow rate of traffic, which may correspond to an inferred traffic volume along the road segment.
US09685075B2 Data communication systems and methods and devices for data communication between electronic device with serial data output and client device with audio port
A data communication system including an electronic device including a serial port, a client device including at least an audio port and an interface device is provided. The electronic device is configured to obtain serial data and output the serial data via the serial port. The interface device is coupled between the electronic device and the client device and includes a serial port connected to the serial port of the electronic device, a signal conversion device and an audio port connected to the audio port of the client device, wherein the interface device receives first serial data from the electronic device via the serial port, converts the received first serial data to first audio signals via the signal conversion device, and outputs the first audio signals to the client device via the audio port, such that the client device obtains the serial data according to the first audio signals.
US09685065B2 Dual sensor system and related data manipulation methods and uses
The invention relates to sensor systems and related data manipulation methods and software and use thereof, for instance amongst others, in surveillance systems, e.g. fall detection, more in particular systems and methods for capturing data of a scene is provided, comprising a first sensor, providing a first data set; a second sensor, spatially arranged with respect to the first sensor in a predetermined arrangement, the second sensor providing a second data set; and data manipulation means using said first and/or second data set to support enhanced data computations on one or both of said data sets to generate said scene data.
US09685061B2 Event prioritization and user interfacing for hazard detection in multi-room smart-home environment
Systems and methods for providing spoken messages that reflect event status of one or more hazard detection systems within a smart-home environment are described herein. The messages can inform occupants in concise manner that does not overload cognitive recognition of those occupants. For example, the messages may be prioritized to limit the amount of information that is spoken and intelligently condense information in as concise a manner as possible. This may be accomplished by using one or more speaking paradigms to compile audible messages to be played back through a speaker of the hazard detection system.
US09685058B2 Smoke detector chamber
Various embodiments of a smoke chamber for a smoke detector are presented. Such a smoke chamber may include a housing, having a first portion and a second portion. The first portion may be through which an electromagnetic sensor and two or more electromagnetic emitters interact with an airspace within the housing. The second portion may have an airflow surface that at least partially defines a curved airflow path between the airspace within the housing and an external environment. The curved airflow path may curve radially outward.
US09685057B2 Chain of custody with release process
A tag used for storing information related to chain of custody of an object is described. The tag is at least one of attacked to a physically associated with the object and the tag includes memory that has custody claim entries written thereto. When custody of the object is transferred from one entity to another entity or when an entity relinquishes custody of the object, a release record is also written to the tag. The custody claim entries and release records written to the tag can be used to verify the chain of custody of the object.
US09685056B2 Robust change-detection system and method
A system and method for detecting change in a video stream may include receiving, by a processor, a video image from a video stream and a reference image. The processor may divide the video image and the reference image into non-overlapping blocks, and each block in the video image may correspond to a block in the reference image. The processor may perform an orthogonal transformation on a corresponding pair of blocks in the video image and the reference image. DC (direct current, or, average value) components in the orthogonally transformed pair of blocks in the video image and the reference image may be zeroed. An infinity-norm difference between coefficient values of the corresponding pair of transformed and modified blocks in the video image and the reference image may be determined and compared to a threshold.
US09685055B2 Anti-theft home location check device
An anti-theft device for an electronics apparatus, including (a) locating means for determining an actual location, (b) storage means for storing a permissible location, and (c) processing means connected to the locating means and storage means. The processing means is configured to retrieve the actual location from the locating means, and to compare the actual location against the permissible location. The processing means is further configured to disable at least part of the functionality of the electronics apparatus if the actual location is more than a predetermined distance from the permissible location. The processing means is further configured to enter the anti-theft device in a standby mode, wherein the electronics apparatus is never disabled by the anti-theft device, and the standby mode may be entered for a predetermined time period.
US09685049B2 Method and system for improving barcode scanner performance
A barcode scanner should output one scanned result per scanned item at checkout. Scanners with large scan areas and multiple scan lines may scan an item more than once as it is dragged through the scan area during the checkout process. A timeout period, during which duplicate scans are ignored, may prevent duplicate scans from being transmitted. Scanners with integrated weight scales may require the use of the scan area for a weight measurement. As a result, weighed items may linger in the scan area longer than the regular timeout period and may be re-scanned. The invention embraces a method and system for mitigating this problem by using information from the scanned barcode and information from the scale to affect how duplicate barcode scans are handled for items requiring a weight measurement and not adversely affected with speed of input as may result with gating and virtual gating with disable/enable scanning commands.
US09685048B2 Automatically generating an optimal marketing strategy for improving cross sales and upsales of items
A computer implemented method, apparatus, and computer usable program product for generating an optimized marketing strategy for improving sales. The process parses event data to identify patterns of events associated with a selection of a selected item by each customer in a plurality of customers and selection of at least one item in a set of items related to the selected item. The process identifies events in the patterns of events that result in a purchase of at least one item in the set of related items by the customers to form optimized events. The process then generates a marketing strategy using the optimized events. The marketing strategy comprises a set of strategies for increasing purchases of items in the set of related items by the customers.
US09685046B2 Gaming machine with buy feature games
A gaming system comprising an input device for placing wagers. The wagers include a first wager consisting of a base wager, and second and third wagers, each consisting of a base wager portion and an additional wager portion. The third wager has a higher ratio of the additional wager portion to the base wager portion than the second wager. An outcome is based on the first, second or third wager, such that upon said second wager being made and an designated event associated with the second wager occurring, a first additional benefit relative to when the first wager is made is provided, and upon said third wager being made and a designated event associated with the third wager occurring, a second additional benefit relative to when the first wager is made is provided. The second additional benefit is a greater benefit than the first additional benefit.
US09685045B2 Computerized game management systems and methods
A computerized card game management system includes a communications interface, a winning percent module, a dealer module, and a game play module. The communications interface is configured to receive data inputs from client devices. The winning percent module is configured to generate a first set of winning percentages defining each player's likelihood of winning each hand of the play cycle during the first segment. The dealer module is configured to select, for each hand of the play cycle, a set of hole cards to be dealt to each player during the first segment. The dealer module selects the set of hole cards based on each player's likelihood of winning the hand as defined by the first set of winning percentages. The game play module is configured to generate a graphical user interface for each player and to provide the graphical user interfaces to the plurality of client devices.
US09685043B2 Electronic gaming machine with die-based random result generator
In one example, disclosed is a method for use with at least one die, wherein each of the at least one die is configured to have multiple resting positions and includes multiple symbols disposed thereon, and wherein for each of the at least one die, each of the multiple resting positions of that die corresponds with a respective one of the multiple symbols of that die. The method involves: the electronic gaming machine causing each of the at least one die to randomly land in one of the multiple resting positions of that die; for each of the at least one die, the electronic gaming machine determining the symbol that corresponds with the landed resting position of that die; and the electronic gaming machine performing an action based, at least in part, on the at least one determined symbol.
US09685042B2 Gaming system and a method of managing bandwidth usage in a gaming system
A plurality of games are implemented at a plurality of gaming machines. At least one server (30, 36, 38) serves game play and non-game play related data to at least one gaming machine (12, 12′), and a resource control unit (50, 202) obtains information indicative of bandwidth usage of a plurality of gaming machines (12, 12′), and controls the level of non-game play related data served to at least one gaming machine based on the information.
US09685040B2 Electronic slot machine with optional triggered games
An electronic gaming machine includes a display and an electronic game controller. A first game, second game and third game are playable on the display, the second game being triggered during play of the first game and the third game being triggered during play of the second game. A player must make an additional wager to play one of the second and third games and does not need to make a further bet to play the other of the second and third games. A gaming method is also provided.
US09685038B2 Game system, and control method and storage medium employed therein
Provided is a game system that is capable of limiting the usage of predetermined information individually. The game system acquires a two dimensional code for recreating a combined image from a character card, and utilizes, for the progression of a game, the combined image recreated during the game on the basis of the two dimensional code that has been acquired. And, the game system provides a two dimensional code so that information of a player name ID that is employed in order to limit the usage of the two dimensional code is included.
US09685033B2 Regulated games: multi-act games
Creative multi-act games for the younger generation of casino players accustomed to creative simulation games such as “The Sims®” and familiar TV characters such as the cast of “Friends”. Stories unfold through acts that have been staged by the player by selecting and placing acting objects. A palette of betting opportunities may be provided in each act in accordance with the staged act to allow the player(s) to place bets. A typical storyboard may include three acts: (a) a construction act, (b) a testing act and (c) a destruction or resolution act. The unfolding of acts may be non-linear and several players may participate simultaneously, sharing the opportunity to affect a storyboard's direction through decision-making.
US09685027B2 Parking meter
A parking meter assembly (10) including a base (11) that is to be fixed to or embedded in a ground surface, typically adjacent the curb that which a car is to be parked. The assembly (10) also includes a parking meter (13) having a front face (17) that includes a coin slot (25) a card slot (20) and a control panel (21). The parking meter (13) further includes a rear face (27) having a window aperture (28) that provides for the transmission of light to a solar panel (29) behind the aperture (28).
US09685021B2 Point-of-sale-scanner
Verifying the authenticity of a bill of currency includes configuring an ultraviolet filter mounted within a point-of-sale scanner to allow the passage of ultraviolet light within, illuminating the bill of currency with ultraviolet light, capturing, with the point-of-sale scanner, an image of the bill of currency, and determining if the bill of currency is authentic by analyzing the image.
US09685019B2 Device for examining a value document and method for examining a value document
A method or apparatus for examining a security element of a value document involves at least one optical property of the security element influenceable by a magnetic field. The value document is transported through a magnetic field which is inhomogeneous transversely to the transport direction and/or is changed time-dependently. An image of at least one portion of the value document having the security element is captured and image data describing the image are formed. The optical properties of the security element are influenced by the magnetic field, and the image data is checked whether they have a location dependence transverse to the transport direction corresponding to the location dependence of the magnetic field and/or have a location dependence in the transport direction corresponding to the time dependence of the magnetic field.
US09685018B2 Intelligent door lock system with wireless access control system
A wireless access control system is provided to lock or unlock a first door at a dwelling. A remote access device transmits a first signal and a second signal. The user remote access device is configured to be in communication with: an apparatus that controls transmission of displacement or rotational mechanical energy, a bolt coupled to the first door with the bolt coupled to an input rod and an output rod, where in operation the bolt locks and unlocks the first door, an energy source coupled to the apparatus that controls transmission of displacement or rotational mechanical energy, a wireless communication device to communicate with the user remote access device, a drive shaft associated with the first door that assists in locking and unlocking the bolt in response to communication with the user's user remote access device and receiving the first signal. The user remote access device is configured to be in communication with a second lock at a vehicle of the user or at an office of the user. The user remote access device is configured to communicate with the second lock with the second signal to cause the second lock to lock or be unlocked. The remote access device has a controller for generating the first and second signals.
US09685014B1 Remote control system using different types of carrier waves for polling signals
A carrier wave is selected based on a state of a target device such as a vehicle. A polling signal is generated using the selected carrier wave for transmission from the target device for receipt by a portable controller. A sinusoidal carrier wave is selected when the target device is in a state that is more sensitive to electrical noise interference caused by the polling signal being generated using the carrier wave than to electrical energy consumed in generating the polling signal using the carrier wave. A non-sinusoidal periodic carrier wave is selected when the target device is in a state that is more sensitive to electrical energy consumed in generating the polling signal using the carrier wave than to electrical noise interference caused by the polling signal being generated using the carrier wave.
US09685009B2 System and method for managing mixed fleet worksites using video and audio analytics
Systems and methods for managing and optimizing mixed fleet worksite operations based on video and or audio data are disclosed. One method includes receiving one or more models relating to a fleet of machines at the worksite, wherein the fleet of machines comprises an in-network machine and an out-of-network machine, receiving first sensor data associated with the out-of-network machine at the worksite, receiving second sensor data associated with the in-network machine at the worksite, determining a machine state of each of the in-network machine and the out-of-network machine based at least on the first sensor data and the second sensor data, comparing the determined machine states to a modeled machine state represented by the received one or more models to classify site operations and/or detect an irregularity in site operations or an inefficiency in site operations, and generating a response based at least on the detected irregularity or inefficiency.
US09685008B2 Method and system for securing a vehicle offered for rent, and vehicle rental facility implementing such a system or such a method
The invention relates to a method (200) for securing a traveling electric vehicle offered for rent; said method including the following steps: measuring (206) at least one value of at least one parameter relating to said vehicle, comparing (208) the value of said parameter to at least one predetermined value, and reporting (220) an anomaly, on the basis of the result of the comparison step; wherein the reporting step is initiated by a so-called central site remote from the vehicle. Said invention likewise relates to a system implementing such a method and an automated vehicle rental facility implementing such a method or such a system.
US09684999B1 Easily computable object representations
Techniques are disclosed for providing easily computable representations of dynamic objects so that a graphic systems' physics engine can more accurately and realistically determine the result of physical actions on, or with, such dynamic objects. More particularly, disclosed techniques generate a convex decomposition of an arbitrarily complex polygonal shape that is then simplified in a manner that preserves physically significant details, resulting in an object having a relatively small number of convex shapes that cover the original polygonal shape. The salience of a physically significant detail may be controlled via a threshold value which may be user or system specified.
US09684997B2 Efficient rendering of volumetric elements
Techniques for determining a shading rate of a volumetric element in a rendered scene when the rendered scene is viewed from a first point of view are provided. Embodiments determine a viewable area of the volumetric element, as viewed from the first point of view. A shading rate to use in processing the volumetric element is then determined, based on the determined viewable area. Embodiments processing the volumetric element at the determined shading rate using one or more shaders.
US09684996B2 Rendering global light transport in real-time using machine learning
Some implementations disclosed herein provide techniques and arrangements to render global light transport in real-time or near real-time. For example, in a pre-computation stage, a first computing device may render points of surfaces (e.g., using multiple light bounces and the like). Attributes for each of the points may be determined. A plurality of machine learning algorithms may be trained using particular attributes from the attributes. For example, a first machine learning algorithm may be trained using a first portion of the attributes and a second machine learning algorithm may be trained using a second portion of the attributes. The trained machine learning algorithms may be used by a second computing device to render components (e.g., diffuse and specular components) of indirect shading in real-time.
US09684995B2 Setting a display list pointer for primitives in a tile-based graphics processing system
A tiling unit assigning primitives to tiles in a graphics processing system which has a rendering space subdivided into a plurality of tiles. A primitive is assigned to a tile by including a primitive ID of the primitive in a display list for the tile. If a primitive, or a mesh of primitives entirely covers a tile such that all of the previous primitives in the tile are obscured (i.e. hidden) then a start pointer of the display list can be moved to thereby skip the obscured primitives. In this way, a hidden surface removal (HSR) module will not fetch the primitives which would ultimately be hidden by the primitive or the mesh which entirely covers the region. This method therefore reduces the number of primitives which are fetched by the HSR module.
US09684992B2 Visualization of objects along a street
For visualization of objects along a length of street, a user selection of a street is received. The selected street is displayed in an above-street view. At least a first plurality of street view images are concurrently displayed for objects along at least a first side of the selected street.
US09684991B2 Image processing apparatus and method using photon mapping and ray tracing and increasing a rate of photon mapping
Provided is an image processing apparatus for performing photon mapping, and the image processing apparatus may perform ray tracing for photon mapping, sample a ray space based on a result of the ray tracing, and perform pseudo photon mapping using the sampled ray space.
US09684987B1 Image manipulation for electronic display
The density of images to display can be increased, and distractions reduced, through intelligent cropping or manipulation of at least some of the images. For objects such as dresses represented in the images, the density can be increased by cropping away regions of background outside the object region(s). Locating regions representing the face and legs of the wearer can enable cropping of the top and/or bottom of the image in order to cause the dress to occupy the majority of the area of the image, and can provide for a level of consistency of the sizes of the objects across the images, regardless of the sources of the images. Representative colors of the objects can also be selected to adjust the background color, in order to provide for easy distinction between the images while not providing contrasting or unappealing colors that take away from the aesthetics of the objects.
US09684986B1 Constructing fonts from scanned images for rendering text
Systems, methods, and computer-readable media are disclosed for constructing fonts from scanned images. In one embodiment, a method may include receiving a scanned image with a first glyph and a second glyph that correspond to a character in the image. The method may include generating an image representative of each of the first glyph and the second glyph, determining a default positioning of the first character, determining a positional reference line indicative of an alignment of certain characters, and a third positional reference line indicative of an alignment of different characters. The method may include determining an adjustment for the first glyph by determining a distance between the default positioning and the second positional reference line. The method may include assigning an identifier to the first glyph and generating a font file to be executed by a renderer for rendering the source text.
US09684978B2 Camera, computer program and method for measuring thermal radiation and thermal rates of change
A camera, computer program, and method for determining and displaying temperature rates of change for regions within the camera's field of view. More specifically, the embodiments provide for the continuous, real-time temperature measurement and display of a plurality of objects within the camera's field of view, and further for the real-time processing and display of the temperature rates of change for the region.
US09684975B2 Method and system for filtering of visual objects
A system, device, computer-readable instructions, and method are provided for mapping and filtering of visual objects to address bump mapping. For example, a system, device, computer-readable instructions, and method are provided as a unified shading model representing both bump orientation and bidirectional radiance distribution function (“BRDF”). The computer-readable instructions are non-transitory, and storable on a storage device, including a CDROM, flashdrive, cloud, processor memory, or other storage capability.
US09684974B2 Lossless compression of fragmented image data
Lossless compression of fragmented image data is disclosed. In some embodiments, a stream of information comprising data elements having statistical characteristics is received. An encoded output is produced by an encoder comprising a data compressor that implements a variable length code that is adapted to the statistical characteristics of the data elements. The output and information from which the variable length code can be derived are stored.
US09684972B2 Imaging apparatus for imaging an object
An imaging apparatus for imaging an object includes a geometric relation determination unit configured to determine a geometric relation between first and second images of the object. A marker determination unit configured to determine corresponding marker locations in the first and second images and marker appearances based on the geometric relation such that the marker appearances of a first marker to be located at a first location in the first image and of a second marker to be located at a second corresponding location in the second image are indicative of the geometric relation. The images with the markers at the respective corresponding locations are shown on a display unit. Since the marker appearances are indicative of the geometric relation between the images, a comparative reviewing of the images can be facilitated, in particular, if they correspond to different viewing geometries.
US09684971B2 Field goal indicator for video presentation
A method is described for indicating an outcome of a sports action by determining a trajectory of a game-object. In football, the trajectory of the football determines the outcome of a field goal attempt. A television viewer has difficulty seeing if the ball passes between the uprights or not, especially if the ball is kicked higher than the uprights. By tracking the trajectory, virtual insertions such as extended goal posts, or goal posts colored to reflect the success or not of the attempt, can be inserted in a video feed. By tracking the flight of the ball from the time it is set in motion, the balls future trajectory is predicted after a short elapsed time, and the television audience is informed of the outcome before it has happened.
US09684970B2 Fast adaptive estimation of motion blur for coherent rendering
Disclosed is a method and apparatus for adaptively executing one or more motion blur estimation methods to estimate a motion blur associated with an image target frame in an Augmented Reality environment produced by an Augmented Reality application. In one embodiment, the functions implemented include: applying a first motion blur estimation method to estimate the motion blur; determining whether computational resources are available for a second motion blur estimation method; and applying the second motion blur estimation method to estimate the motion blur in response to a determination that computational resources are available for the second motion blur estimation method.
US09684969B2 Computer-readable recording medium, detecting method, and detecting apparatus detecting an amount of image difference
A detection method by which a computer to execute the following processes: The detection program causes the computer to execute a process of detecting times at which a timelike change amount temporarily decreases in a plurality of images that are sequentially taken. The detection program also causes the computer to execute a process of extracting, on the basis of the detected times, either a movement of beating time of a person included in the taken images or times at which the person included in the taken images beats time.
US09684964B2 Image processing apparatus and image processing method for determining disparity
There is provided an image processing apparatus including a stereo matching unit configured to obtain right and left disparity images by using stereo matching, based on a pair of images captured by right and left cameras, respectively, a filter processing unit configured to perform filter processing on the disparity images, and a first merging unit configured to make a comparison, in the disparity images that have undergone the filter processing, between disparity values at mutually corresponding positions in the right and left disparity images and to merge the disparity values of the right and left disparity images based on a comparison result.
US09684961B2 Scan region determining apparatus
The invention relates to a scan region determining apparatus (12) for determining a scan region of a subject to be scanned by a scanning system (10) like a computed tomography system. A spatial transformation defining a registration of an overview image and a template image with respect to each other is determined, wherein initially the overview image and the template image are registered by using an element position indicator being indicative of a position of an element of the subject with respect to the overview image. A template scan region is defined with respect to the template image, wherein a final scan region is determined by projecting the template scan region onto the overview image by using the determined spatial transformation. The registration and thus the determination of the spatial transformation are very robust, which improves the quality of determining the final scan region.
US09684956B2 Arrangement and method for determining a body condition score of an animal
An arrangement for determining a body condition score of an animal comprises a three-dimensional camera system directed towards the animal and provided for recording at least one three-dimensional image of the animal; and an image processing device connected to the three-dimensional camera system and provided for forming a three-dimensional surface representation of a portion of the animal from the three- dimensional image recorded by the three-dimensional camera system; for statistically analyzing the surface of the three-dimensional surface representation; and for determining the body condition score of the animal based on the statistically analyzed surface of the three-dimensional surface representation.
US09684953B2 Method and system for image processing in video conferencing
A method for image processing in video conferencing, for correcting the gaze of an interlocutor in an image or a sequence of images captured by at least one real camera, comprises the steps of the at least one real camera acquiring an original image of the interlocutor; synthesizing a corrected view of the interlocutor's face as seen by a virtual camera, the virtual camera being located on the interlocutor's line of sight and oriented towards the interlocutor; transferring the corrected view of the interlocutor's face from the synthesized view into the original image, thereby generating a final image; at least one of displaying the final image and transmitting the final image.
US09684952B2 Alignment of mixed-modality data sets for reduction and removal of imaging artifacts
Methods and systems are described for removing reflective artifacts from an imaging model of a patient's teeth. A first volumetric model and a second volumetric model of the patient's teeth are accessed from a computer-readable memory. The orientation and scale of at least one of the two models is repeatedly and automatically adjusted until an optimized orientation and scale is determined that correlates the first volumetric model and the second volumetric model. The second volumetric model is then overlaid onto the first volumetric model. Any data points in the first volumetric model that extend beyond a surface of the patient's teeth in the second volumetric model are detected and removed to create an artifact-reduced volumetric model.
US09684931B2 Method and system for offering a credit product by a credit issuer to a consumer at a point-of-sale
A method for offering at least one credit product by at least one credit issuer to a consumer at a point-of-sale between a merchant and the consumer. The method includes the steps of: providing a credit issuer data set including a plurality of data fields to a central database; initiating a transaction between the consumer and the merchant at the point-of-sale; offering, to the consumer at the point-of-sale, the at least one credit product; and presenting, to the consumer at the point-of-sale, at least one data field in the credit issuer data set. The at least one data field presented to the consumer is populated with data directed to the credit product, the credit issuer, or any combination thereof. An apparatus and system are also disclosed.
US09684929B1 Detecting content consumption
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing content are disclosed. In one aspect, a set of interaction data specifying one or more types of user interactions with a resource is received for a user. A determination is made, based on the interaction data, that the user is in a first engagement category from at least two different engagement categories. A request for a content item to be provided to the user is received. A content item having a bid specifying an amount that a content item provider is willing to pay for distribution of the content item to a user in the first engagement category is identified. A determination is made, based on the outcome of an auction performed using the bid, that the bid is a winning bid. The content item is provided for presentation in response to the request.
US09684926B1 Processing purchase requests by third-party applications
In general, the subject matter described in this disclosure can be embodied in methods, systems, and program products. A server system receives a request for details regarding a product that a user of a remote computing device selected for purchase from a user interface provided by a third-party application program executable at the remote computing device. The received request specifies the product. The server system uses an indication of the product to identify details that are specific to the product. The server system sends, for receipt by the particular application program, the details. The server system receives, from the particular application program and after sending the details, confirmation to purchase the product, and, in response, sends a charge request to charge the user for the product to a transaction processing system.
US09684924B2 Assistance on the go
A mobile computerized apparatus or method configured to coordinate towing facilities and roadside assistance providers and their available capacity to tow and provide roadside assistance and match users with those towing facilities and roadside assistance providers is disclosed. The apparatus or method may be configured to consider the following factors in matching the towing facilities/roadside assistance providers and users: (a) availability of nearby towing facilities; (b) telematics information from the vehicle to assist with the diagnosis/repairs; (c) preset preferences of the user; (d) insurance information (such as the type of the vehicle the user has and the user's home address); and (e) the capabilities of the towing facility.
US09684922B2 Accurate delivery apparatus and method for delivering from within a building and distant locations
A delivery station and a method for operating the delivery station including a station server, at least one of storage device for controlling storage facility and a delivery device for delivery including confirmation, located in one of a building and distant and connected to at least one e-provider server via a network for gathering and delivering without error at least one of merchandise and service item included in an order received by at least one e-provider from at least one dweller of the building, each of the devices comprising a CPU, a memory, indicators and touch display screen identifying particulars pertaining to a stored item, the order received from a dweller, a barcode reader, an RFID reader, a communication transceiver for verifying and communicating the gathering and the delivery, including updating of the stored item quantity via the station server upon execution or cancellation of the delivery.
US09684919B2 Item delivery using 3D manufacturing on demand
Methods and systems can be provided for providing items manufactured on demand to users. A user request for an item can be received. The item can have 3D manufacturing instructions associated therewith. A delivery method for the item can be determined. A manufacturing apparatus can be selected to manufacture the item based on the 3D manufacturing instructions. Instructions can be sent to the manufacturing apparatus to manufacture the item based on the 3D manufacturing instructions. Delivery instructions can be provided for delivering the item according to the delivery method.
US09684915B1 Method, medium, and system including a display device with authenticated digital collectables
A fan network system provides portals that can be accessed by fan mobile devices to buy, sell, or trade digital trading cards. The fan network system can keep track of these purchases and trades using a database that keeps track of cards and a database that keeps track of user accounts. The fan network system also provides portals that can be accessed by fan mobile devices to buy or cancel subscriptions, such as magazine subscriptions or television channel subscriptions. The fan network system also provides portals that can be accessed by fan mobile devices to redeem codes for digital trading cards, the codes given during sporting events, or in exchange for subscriptions, or through fan club memberships, or through fantasy league memberships.
US09684912B2 Proxy shopping registry
Methods and systems are provided for facilitating purchases by one person for another person. A user can take advantage of one or more social networks to facilitate purchases by proxy shoppers for the user. For example, the user can designate what products can be purchased by a proxy shopper and what stores can be used by the proxy shopper to make the purchases. The products can be listed in a registry on the user's social network. When the proxy shopper is in a designated store, the proxy shopper can purchase a designated products for the user.
US09684906B2 Footage reporting
Footage used in an aired show by a broadcaster, broadcasting network or similar entity can be more easily tracked and reported to rights holders. An electronic cutsheet can be created for a video package. The electronic cutsheet includes information identifying one or more footage items included in the video package and any rights holders associated with the footage item. Using the cutsheets, a number of playlists can be created or otherwise provided. Each playlist is associated with at least one video package. The playlist can then be associated with a show to indicate that the show has aired and thus that the playlist and its included packages have actually been used. A report can then be generated that indicates at least one rights holder and the number of instances in which a footage item associated with the indicated rights holder was included in an aired show.
US09684902B2 Processing techniques for text capture from a rendered document
A facility for initiating a purchase is described. The facility receives a text sequence captured by a user from a rendered document using a handheld text capture device. The facility identifies in the received text sequence a reference to a distinguished product. In response to identifying the reference, the facility presents to the user an opportunity to place an order for the established product. If the user accepts the presented opportunity to order the distinct product, the facility orders the distinct product on behalf of the user.
US09684900B2 Authentication on mobile device using two-dimensional code
A two-dimensional code generated from encrypted original authentication data can be displayed on an authentication device. The code is read and decrypted by an authentication application on a mobile device. This can generate and display a new two-dimensional code. The new code can contain additional information, and the new two-dimensional code is read by the two-dimensional code reading unit of an authentication device. It is then authenticated.
US09684898B2 Securing personal identification numbers for mobile payment applications by combining with random components
Systems and methods can secure personal identification numbers associated with secure elements within mobile devices. A host application of the mobile device can receive a personal identification number (PIN) or user PIN from a user. The application can generate one or more random PIN components. The application can compute a PIN for the secure element based upon the user PIN and each of the one or more random components. The SE can be configured using the PIN computed for the secure element. Each of the one or more random components may be stored in one or more distinct, diverse locations. In addition to entering the correct user PIN, each of the one or more random components must be retrieved from the diverse locations in order to reconstruct the PIN for the secure element whenever performing a transaction using the secure element.
US09684884B2 System and method for identifying one or more objects hung from a display peg
Systems and methods for identifying one or more objects hung from a display peg are described herein. The system may include a display peg comprising a first and second electrically conductive terminal. An object comprising a resistive element may be hung from the display peg such that the resistive element is in electrical communication with the terminals. A source may be configured to provide a current that flows from the first terminal through the resistive element to the second terminal. An electronic device may be configured to detect the electrical current flowing from the second terminal. The system may be configured to identify the type of object depending on the detected electrical current.
US09684878B2 Automatic graphical rendering of processes
This disclosure relates to tools for optimizing complex processes or systems, such as flow process charts and, more specifically to the automatic graphical renderings of processes. In an exemplary embodiment, the process is a complex process including hundreds or thousands of operations. In an exemplary embodiment, a device displays a first view that includes a complete progression diagram automatically generated from data stored in a database, and at least some directional lines of the complete progression diagram unintelligibly overlap. In response to a selection of a particular operation in the complete progression diagram, in an exemplary embodiment, the display toggles to a second view that includes a focus diagram. In an exemplary embodiment, an edit to the focus diagram is checked in real-time and rejected if the edit orphans of an object currently undergoing the process on a live production line.
US09684877B2 System and method for improved consumption models for analytics
Described herein are systems and methods for generating user interfaces that include a meta-chart framework for organizing and analyzing multi-dimensional hierarchical data in an efficient and intuitive graphical user interface with which a user can explore and consume prepared analytical elements. The predetermined structure of such user interfaces can include customizable and scalable graphical and/or alphanumeric analytic elements with contextual controls that can guide a user on a preconfigured analytical path, or “drill-down path,” to better explore and understand the multidimensional data. Such embodiments provide a turnkey analytical framework from which users can both immediately understand data and learn how to explore the data in greater depth.
US09684874B2 Parallel decision or regression tree growing
Embodiments relate to growing a plurality of trees in parallel. An aspect includes creating, for each of a plurality of trees, a data bag based on a training data set comprising a plurality of data records. Another aspect includes splitting the training data set into disjoint data sub-sets; and storing each of the sub-sets in a respective data slice. Another aspect includes performing a single pass through the data records stored in a data slice, thereby identifying one or more of the current nodes that are assigned data records; calculating an intermediate result for each identified current node based on all data records of said data slice; and merging intermediate results into a combined intermediate result. Another aspect includes, for each of the current nodes: calculating a split criterion from the combined intermediate result; and creating two or more child nodes of the current node based on the split criterion.
US09684870B2 Methods and systems of using boosted decision stumps and joint feature selection and culling algorithms for the efficient classification of mobile device behaviors
Methods and systems for classifying mobile device behavior include configuring a server use a large corpus of mobile device behaviors to generate a full classifier model that includes a finite state machine suitable for conversion into boosted decision stumps and/or which describes all or many of the features relevant to determining whether a mobile device behavior is benign or contributing to the mobile device's degradation over time. A mobile device may receive the full classifier model and use the model to generate a full set of boosted decision stumps from which a more focused or lean classifier model is generated by culling the full set to a subset suitable for efficiently determining whether mobile device behavior are benign. Boosted decision stumps may be culled by selecting all boosted decision stumps that depend upon a limited set of test conditions.
US09684868B2 Predicting influence in social networks
A method, system and computer program product are disclosed for predicting influence in a social network. In one embodiment, the method comprises identifying a set of users of the social network, and identifying a subset of the users as influential users based on defined criteria. A multitude of measures are identified as predictors of which ones of the set of users are the influential users. These measures are aggregated, and a composite predictor model is formed based on this aggregation. This composite predictor model is used to predict which ones of the set of users will have a specified influence in the social network in the future. In one embodiment, the specified influence is based on messages sent from the users, and for example, may be based on the number of the messages sent from each user that are re-sent by other users.
US09684867B2 Adaptive content inspection
Methods and apparatus are provided involving adaptive content inspection. In one embodiment, a content inspection processor may identify information with respect to input data and provide the information to a host controller. The host controller may adapt search criteria or other parameters and provide the adapted parameter to the content inspection processor. Other embodiments may include a content inspection processor having integrated feedback, such that results data is fed back to the content inspection processor. The results data may be processed before being provided to the content inspection processor.
US09684863B2 Electronic card having an external connector
A smart card is provided, including an external connector formed of an insulating support and a plurality of external metal contact pads arranged on an external face of the support, and a card body having a housing in which the external connector is arranged and includes an electronic unit and/or an antenna electrically connected to a plurality of internal metal contact pads arranged underneath the external connector and respectively aligned with the external pads. The external pads are respectively electrically connected to the internal pads by a plurality of metal parts, which are each at least partially formed by a solder material and which traverse the insulating support through respective apertures. The metal parts are respectively covered by the external pads, which close the apertures on the external face of the support, and respectively form connecting bridges between rear surfaces of the external pads and the internal pads.
US09684861B2 Payment cards and devices with displays, chips, RFIDs, magnetic emulators, magnetic decoders, and other components
A payment card (e.g., credit and/or debit card) or other card or device (e.g., mobile telephone) is provided with a magnetic emulator operable to communicate data to a magnetic stripe read-head. User interfaces are provided in a number of different configurations in order to achieve a number of different functionalities.
US09684859B2 Registration correction for continuous printing
Image plane registration errors are corrected for a multi-channel printing system that prints on a continuous web of media. Nominal in-track line spacing are defined for each image plane, and are used to print lines of image data for each image plane. An in-track registration error is measured for a misregistered image plane in the printed image, and is used to determine an adjusted in-track line spacing that will bring the misregistered image plane back into registration in the in-track direction over a predefined correction time interval. Additional image data is then printed using the adjusted in-track line spacing during the correction time interval, after which image data is printed using a new in-track line spacing that is different from the adjusted in-track line spacing.
US09684858B2 Image processing system, image generation-output control apparatus, method of processing image, and storage medium of program to execute method of processing image, to control plural output apparatuses to output same output image
An image processing system for executing a plurality of processes includes a process execution control apparatus to control an execution of the plurality of processes, and an image generation-output control apparatus to control an execution of image generation-output operation, The process execution control apparatus includes a process execution controller to control the execution of the processes, a control-side drawing information generator to generate drawing information to be referred when performing the image generation-output operation based on information of a target image to be output. The image generation-output control apparatus includes an output-side drawing information generator capable of generating the drawing information based on the information of the target image to be output acquired from the process execution control apparatus, and an execution controller to execute the image generation-output operation by using the image forming apparatus based on the drawing information generated by the output-side drawing information generator.
US09684856B2 Method, control device and non-transitory computer-readable storage medium storing program for estimating color verification result
A control device estimates a color verification result by using the following method. The method includes obtaining a first set of color values by using measurements of a color chart printed by a printer without color management; calculating second and third sets of color values based on increased color gamut and reduced color gamut of the printer due to a conditional change of the printer; creating a first to third printer-profiles by using the first to third sets of color values; calculating theoretical reference values of target color values and first to third theoretical color values by using the first to third printer-profiles; calculating first to third color differences by using the theoretical reference values and the first to third theoretical color values; obtaining an estimated result of the color verification by comparing the first to third color differences with a preset standard value; and outputting the estimated result.
US09684855B2 Printer
The disclosure discloses a printer including a first memory and a controller. The first memory is configured to store a plurality of types of partial print data for print formation of a plurality of types of partial pictorial symbols wherein some of the partial pictorial symbols are combined into at least one pictorial symbol. The controller is configured to execute a determining operation acceptance process, a print data generation process, and a coordination control process. In the determining operation acceptance process, a determining operation for determining the pictorial symbol is accepted. In the print data generation process, print data including the pictorial symbol determined by variably combining the plurality of types of the partial print data stored in the first memory is generated. In the coordination control process, the feeder and the printing head are coordinately controlled for forming a print corresponding to the print data on the print-receiving medium.
US09684852B2 Systems and methods for inferring gender by fusion of multimodal content
A method and systems are provided. A system includes a set of visual and textual classifiers for recognizing semantic concepts in a set of images and assigning semantic scores for the images to predict a gender of a user, and performing gender prediction from visual content and textual content in the images to respectively generate visual-based gender predictions and textual-based gender predictions. The system further includes a multimodal information fusion device for combining, using multimodal information fusion, the visual-based gender predictions, the textual-based gender predictions, and the semantic scores to infer a gender of a user.
US09684849B2 Image processing device, information storage device, and image processing method
An image processing device includes: an image sequence acquisition section that acquires an image sequence that includes a plurality of constituent images; and a processing section that performs an image summarization process that deletes some of the plurality of constituent images included in the image sequence to generate a summary image sequence, the processing section detecting an observation target area from each of the plurality of constituent images, selecting a reference image and a determination target image from the plurality of constituent images, calculating deformation information about a deformation estimation target area included in the reference image and the deformation estimation target area included in the determination target image, and determining whether or not the determination target image can be deleted based on the observation target area included in the reference image, the observation target area included in the determination target image, and the deformation information.
US09684847B2 Spherical lighting device with backlighting coronal ring
A method for capturing three-dimensional photographic lighting of a spherical lighting device is described. Calculation of boundaries of the spherical lighting device based on lighting properties of at least one light source in a set location of the spherical lighting device is performed. A mapping of multitude points of the spherical lighting device to three-dimensional vectors of at least one camera device using a logical grid is performed. A measurement of brightness of the logical grid of the spherical lighting device is performed. The method further comprises determining brightest grid point of the logical grid of the spherical lighting device, wherein the brightest grid point of the logical grid is measured within a region brightness of the spherical lighting device. The method further comprises calculating the region of brightness of the spherical lighting device based on the determined brightest grid point of the logical grid.
US09684843B2 Video capture in data capture scenario
A data capture component of a mobile device receives information for an identification of a data field in a physical document. The data capture component receives a video stream comprising a plurality of frames, wherein each frame comprises a portion of the physical document. A frame is selected from the plurality of frames in the video stream. One or more text regions in the frame are identified. Each of the identified text region(s) in the frame is processed to identify data of each of the identified text region(s) and to select data of one of the identified text region(s) that corresponds to a set of attributes associated with the data field. The selected data is then compared with data of text regions of a subsequent frame. If the data of the text regions of the subsequent frame is a closer match to the set of attributes, the selected data is updated. A display field is then provided with the selected data for presentation in a user interface.
US09684838B2 Empirical data modeling
Methods, apparatuses and systems directed to pattern identification and pattern recognition. In some particular implementations, the invention provides a flexible pattern recognition platform including pattern recognition engines that can be dynamically adjusted to implement specific pattern recognition configurations for individual pattern recognition applications. In some implementations, the present invention also provides for a partition configuration where knowledge elements can be grouped and pattern recognition operations can be individually configured and arranged to allow for multi-level pattern recognition schemes.
US09684836B1 Combining multiple estimates of an environment into a consolidated estimate for an autonomous vehicle
A vehicle is provided that may combine multiple estimates of an environment into a consolidated estimate. The vehicle may receive first data indicative of the region of interest in an environment from a sensor of the vehicle. The first data may include a first accuracy value and a first estimate of the region of interest. The vehicle may also receive second data indicative of the region of interest in the environment, and the second data may include a second accuracy value and a second estimate of the region of interest. Based on the first data and the second data, the vehicle may combine the first estimate of the region of interest and the second estimate of the region of interest.
US09684834B1 Trainable versatile monitoring device and system of devices
A machine system includes monitor devices each having a camera, the monitor devices distributed over a physical area; layout logic forms images from the cameras of the monitor devices into a scene layout for the area; user interface logic receives training signals from sensors directed to a person physically present in the area and to correlate those signals to subareas of the layout; and analytical logic analyzes the layout and training signals to ascertain subareas of the area at which the monitor devices should focus machine sensor and processing resources.
US09684832B2 Methods and systems for providing remote plant identification by unique biological characteristics
Plants may be remotely identified using unique biological characteristics (UBCs). One method involves determining a target plant within an area to be surveyed and associated target plant characteristics. The method may further include a determination of one or more unique UBCs associated with the target plant, and the location of a training plant within the physical area that exhibits the target plant characteristics. Thereafter, comparisons may be made between subsections of an acquired, date-specific, geo referenced image and data representing the training plant to identify those subsections that represent plants within the area that are associated with the one or more UBCs.
US09684831B2 Adaptive edge-like feature selection during object detection
A method of recognizing an object of interest in an image includes extracting a first set of features from within the image. Each extracted feature in the first set of features is then categorized as either blob-like or edge-like. A second set of features is then taken from the first set, where a number of the edge-like features to include in the second set of features is based on a relative number of edge-like features to blob-like features included in the first set of extracted features. An object of interest within the image is detected according to the second set of features.
US09684826B2 Reducing the search space for recognition of objects in an image based on wireless signals
Provided is a process including: determining that a mobile computing device has crossed a geofence associated with a merchant store; sending, to a remote classifier server, a request for object-recognition classifiers for objects in the merchant store; receiving a set of object-recognition classifiers; receiving with the mobile computing device from user a request to search for offers; capturing an image with a camera of the mobile computing device; receiving one or more wireless beacon identifiers with the mobile computing device; based on the wireless beacon identifiers, selecting a subset of the object-recognition classifiers in the set of object-recognition classifiers; and recognizing an object in the captured image based on the selected subset of the object-recognition classifiers; and requesting, from a remote offer publisher server, offers corresponding to the recognized object; and receiving offers from the remote offer publisher server; and displaying the received offers to the user.
US09684824B2 Motion estimation device, robot, and method to estimate reaction of a person
A motion estimation device includes an acquisition unit configured to acquire a distance between a sensor and an object and a situation estimation unit configured to estimate a person's reaction based on a distance acquired by the acquisition unit at a first time that is set based on a time when a person is being urged to stop raising his/her hand.
US09684822B1 Mechanism to create pattern gesture transmissions to create device-sourcing emergency information
A system may comprise a registration device configured to register patterns for users; a recording device configured to record a received pattern, as an electronic pattern, wherein the recording device recognizes the received pattern as one of the registered patterns; a receiving device configured to observe human movement patterns with a camera, transform the observed human movement patterns to an electronic signal, and receive the recognized registered pattern from the recording device by a first wireless transmission; a forwarding device configured to transmit the electronic signal, and the received recognized registered pattern to an alert service by a second wireless transmission; and an alert service, configured to receive the electronic signal and the received recognized registered pattern from the forwarding device and configured to transmit the electronic signal and the received recognized registered pattern to a second electronic device by a third wireless transmission.
US09684818B2 Method and apparatus for providing image contents
Disclosed herein is a method for providing image contents. The method for providing image contents includes: dividing the image contents into a plurality of scenes, each scene including a plurality of shots; classifying image frames for each scene depending on each of a plurality of characters appearing in the image contents; receiving a user input for selecting any one of the plurality of characters; and displaying a scene corresponding to the character selected depending on the user input.
US09684817B2 Method and system for automatically optimizing quality of point cloud data
Disclosed is a method for automatically optimizing point cloud data quality, including the following steps of: acquiring initial point cloud data for a target to be reconstructed, to obtain an initial discrete point cloud; performing preliminary data cleaning on the obtained initial discrete point cloud to obtain a Locally Optimal Projection operator (LOP) sampling model; obtaining a Possion reconstruction point cloud model by using a Possion surface reconstruction method on the obtained initial discrete point cloud; performing iterative closest point algorithm registration on the obtained Possion reconstruction point cloud model and the obtained initial discrete point cloud; and for each point on a currently registered model, calculating a weight of a surrounding point within a certain radius distance region of a position corresponding to the point for the point on the obtained LOP sampling model, and comparing the weight with a threshold, to determine whether a region where the point is located requires repeated scanning. Further disclosed is a system for automatically optimizing point cloud data quality.
US09684814B2 Method and device for estimating orientation field of fingerprint
A method for estimating an orientation field of a fingerprint is provided, comprising: obtaining an initial orientation field of a fingerprint, and putting the initial orientation field in a reference coordinate system; obtaining N initial orientation blocks corresponding to the initial orientation field, and obtaining N orientation block sets corresponding to N positions respectively from a fingerprint dictionary; obtaining a similarity between each of the N initial orientation blocks and each orientation block in the N orientation block sets corresponding to the N positions to obtain P similarities, and selecting a preset number of candidate orientation blocks for each position from the orientation block set according to the P similarities; obtaining a compatibility between two candidate orientation blocks corresponding to any two adjacent positions respectively to obtain a plurality of compatibilities; and obtaining a candidate orientation block for each position according to the P similarities and the plurality of compatibilities.
US09684812B2 Fingerprint sensing device with common mode suppression
The present invention relates to a fingerprint sensing device for sensing a fingerprint pattern of a finger, the fingerprint sensing device comprising at least a first sensing structure and a second sensing structure; and at least a first charge amplifier and a second charge amplifier. Each charge amplifier comprises: a first input; a second input; an output; and at least one amplifier stage between the first and second inputs, and the output. The output is capacitively coupled to the first input. The first input of the first charge amplifier is connected to the first sensing structure; the first input of the second charge amplifier is connected to the second sensing structure; and the output of the first charge amplifier is capacitively coupled to the first input of the second charge amplifier to suppress the common mode component.
US09684811B2 Suspended capacitive fingerprint sensor and method for manufacturing the same
A suspended capacitive fingerprint sensor includes a substrate, capacitive sensing units disposed on the substrate and one or more insulation protection layer. Each of the capacitive sensing units includes a fixed electrode, a suspended electrode, and a chamber between the fixed electrode and the suspended electrode. The insulation protection layer covers the capacitive sensing units, so that the capacitive sensing units sense a fingerprint of a finger above the insulation protection layer. A method for manufacturing the suspended capacitive fingerprint sensor is also provided.
US09684810B2 System and method for partite optically readable code
A system and method for partite optically readable codes are provided. The method includes: scanning at least one component of the partite optically readable code, wherein the partite optically readable code comprises of at least two components; determining whether the remaining components of the partite optically readable code are accessible; combining all the components of the partite optically readable code; and decoding the partite optically readable code. The system includes: a scanning module configured to retrieve a component of a partite optically readable code, wherein the partite optically readable code comprises at least two components; and a code module configured to receive the component from the scanning module, the code module further configured to determine whether the remaining components of the partite optically readable code are accessible, to combine the components of the partite optically readable code, and to decode the partite optically readable code.
US09684809B2 Scanner assembly with removable shock mount
An indicia scanning assembly having a housing with a shock mount receiving space; and an elastomeric scan engine receiving shock mount positioned in the shock mount receiving space. The scan engine receiving shock mount has a first end with a scan engine receiving space.
US09684807B2 Frequency selective logarithmic amplifier with intrinsic frequency demodulation capability
A regenerative selective logarithmic detector amplifier (LDA) can have integrated FM demodulation capabilities. It can receive a wired or wireless FM modulated signal and amplify or demodulate it with high sensitivity, high skirt ratio and minimized noise when compared to the prior art. When used in conjunction with other circuits such as a PLL or mixer, it can improve interference rejection and frequency selectivity and be locked on a precise channel in frequency and phase. The LDA produces intermittent oscillations that are self-quenched when reaching a given threshold. It also embeds the circuitry to perform direct FM discrimination. FM demodulation process is completed by a simple analog or digital frequency to voltage converter. This plus the fact that the instantaneous regeneration gain is low-medium permit to detect signals of small amplitudes buried in the noise.
US09684804B2 Protecting content displayed on a mobile device
A method, computer program product and system for protecting content includes a mobile device screen including a plurality of pixels, whereby each of the plurality of pixels have first sub-pixel units that include a first viewing angle and second sub-pixel units that include a second viewing angle. Within each of the plurality of pixels, the first sub-pixel units are adjacent to the second sub-pixel units. A processing unit is coupled to the mobile device screen and determines a portion of the mobile device screen that displays sensitive content. The processing unit obscures the sensitive content displayed on the portion of the mobile device screen by deactivating the first sub-pixel units at the portion of the mobile device screen that displays the sensitive content and activates the second sub-pixel units at the portion of the mobile device screen that displays the sensitive content.
US09684797B2 Protecting privacy with secure digital signage in vehicle registration plates
Various systems and methods for protecting privacy with secure digital signage in vehicle registration plates are described herein. A system with an electronic registration plate for protecting privacy with secure digital signage, the electronic registration plate attached to a vehicle, the system may include a data access module to: access, a data store of registration numbers, the data store including a plurality of unique registration plate numbers and assigned to the vehicle; and retrieve a registration plate number from the data store; and a display module to present the registration plate number on the electronic registration plate.
US09684794B2 System and architecture for secure computer devices
The present invention relates to a system and architecture for securing otherwise unsecured computer subsystems. According to one aspect, the invention provides an independent hardware platform for running software in a secure manner. According to another aspect, the invention provides the means to control and secure all disk, network and other I/O transactions. According to still further aspects, the invention provides a means to monitor and prevent unauthorized user and malicious software activity Additional aspects include providing a secure platform for device and user authentication as well as encryption key management, providing a means to perform background backup snapshots, and providing the means for enabling full management over computer operations.
US09684784B2 Systems and methods for securely storing data
Various embodiments of systems and methods for securely storing data are provided. In one embodiment, a computer-readable storage module is provided for securely storing data. A storage-side processor is provided for selectively granting access to the stored data on the computer-readable storage module. A user-side memory for storing an output generation record is also provided. A user-side processor configured to provide a password receiving module for receiving a password candidate, an output generation module for using the password candidate received to attempt to access the output generation record and for generating an output based on whether the attempt to access the output generation record is successful, and an output communication module for communicating the output generated by the output generation module to the storage-side processor are also provided. The storage-side processor is configured to grant access to at least some of the data if the output received corresponds to an authorized output, the storage-side processor being configured to otherwise deny access to the data. The user-side processor is further configured to conceal whether the attempt to access the output generation record was successful until the storage-side processor receives the output generated. The output generation module is configured to generate the authorized output if the password candidate is an authorized password and the output generated is not the authorized output if the password candidate is not the authorized password.
US09684781B2 Determine authorization of a software product based on a first and second authorization item
Embodiments disclosed herein relate to determining authorization of a software product based on a first authorization item and a second authorization item. Each authorization item may be a file or a registry key. A processor 104 may determine whether use of the software product is authorized at a particular time period by comparing a first authorization item and a second authorization item.
US09684780B2 Dynamic interactive identity authentication method and system
An identity authentication system includes a storage unit, a display character set generation unit, a display unit and a password authentication unit. An identity authentication method includes the following steps: generating the dynamic display character sets; inputting a dynamic input code; and comparing the dynamic input code with the user password. This invention can improve the security of identity authentication and is convenient to use.
US09684770B2 Performing measurement of a subject
A method of performing measurement of a subject comprises measuring a physiological parameter of a subject, deriving data from the measured parameter, optionally, obtaining metadata relating to the measurement of the physiological parameter, determining the quality of the derived data from the derived data and/or the obtained metadata, and if the determined quality matches a predefined criteria, performing a predefined corrective action. In one embodiment, the method further comprises calculating one or more qualifiers from the derived data and/or from the obtained metadata, and wherein the step of determining the quality of the derived data comprises determining the quality of the derived data from the calculated qualifiers.
US09684769B2 Apparatus and method for diagnosis
There are provided an apparatus and method for diagnosis using a medical image. The apparatus includes: an analyzing unit configured to detect a lesion area, and generate a group of candidate lesion areas with respect to the detected lesion area; and an interface unit configured to arrange one or more candidate lesion areas selected among the group of candidate lesion areas with information about each of the one or more selected candidate lesion areas in a first region of an interface.
US09684762B2 Rules-based approach to rendering medical imaging data
Systems and methods that allow transfer criteria to be defined based on one or more of several attributes, such as a particular user, site, or device, as well as whether individual images and/or image series are classified as thin slices, and applied to medical images in order to determine which images are downloaded, viewed, stored, and/or any number of other actions that might be performed with respect to particular images.
US09684760B2 Measure of analysis performed in property checking
The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false answer cannot be provided e.g. when stopped due to resource constraints. In some embodiments, a measure of value N indicates that a given property that is being checked will not be violated within a distance N from an initial state from which the analysis started. Therefore, in such embodiments, a measure of value N indicates that the analysis has implicitly or explicitly covered every possible excursion of length N from the initial state, and formally proved that no counter-example is possible within this length N.
US09684758B2 Generating asserted sensitivities for statistical timing
One or more processors group a plurality of timing arcs into a plurality of equivalence classes. Each timing arc includes one or more delay tables. One or more processors generate, for at least one equivalence class of the plurality of equivalence classes, an average sensitivity to a condition by performing a weighted average on respective sensitivities of timing arcs to the condition. One or more processors determine a sensitivity of an electronic circuit to the condition based, at least in part, a match between one or more attributes of the electronic circuit and one or more attributes present in the at least one equivalence class.
US09684757B2 Cross-hierarchy interconnect adjustment for power recovery
Embodiments relate to cross-hierarchy interconnect adjustment. An aspect includes receiving chip layout data corresponding to a chip design, wherein a first portion of a metal stack of the chip design is assigned to a first hierarchy and a second portion of the metal stack is assigned to a second hierarchy based on a contract between the first and second hierarchy. Another aspect includes determining an unused portion of the first portion of the metal stack. Another aspect includes moving an interconnect of the second hierarchy from the second portion of the metal stack that is assigned to the second hierarchy to the unused portion of the first portion of the metal stack in the chip layout data. Another aspect includes performing power recovery on the chip layout data after moving the interconnect based on an amount of slack margin generated in the chip design by the moving of the interconnect.
US09684755B2 Isolation of IP units during emulation of a system on a chip
A host system receives a description of a design under test (DUT) that includes multiple IP units and is to be emulated by an emulator. The host system compiles the description of the DUT, which includes synthesizing the description, partitioning the DUT, and mapping the partitions to FPGAs included in the emulator that will emulate the DUT. Each IP unit is part of a single partition or partitioned into multiple partitions and mapped to a different set of FPGAs. The host system identifies connections in the DUT between IP units. The host system designates one or more FPGAs of the emulator that have not been allocated to emulate IP units as interface FPGAs. The host system determines a route for each of the identified connections through one of the interface FPGAs. The connections are routed so that there are no direct connections between the sets of FPGAs of two IP units.
US09684751B2 Slack redistribution for additional power recovery
A system and method to implement an integrated circuit design are described. The method includes obtaining a timing database of current timing slack values based on current cell selection, placement, and routing for a plurality of cycles defined by a plurality of cycle boundaries, each cycle representing devices between a corresponding pair of the plurality of cycle boundaries, identifying candidate cycle boundaries among the plurality of cycle boundaries for slack redistribution, every one of the candidate cycle boundaries being associated with a positive timing slack, and selecting redistribution cycle boundaries among the candidate cycle boundaries. A modified timing database is generated based on redistributing the positive timing slack associated with the redistribution cycle boundaries, and power recovery is performed using the modified timing database to reduce power at one of more of the redistribution cycle boundaries.
US09684749B2 Pipeline depth exploration in a register transfer level design description of an electronic circuit
A list of input registers and output registers for a circuit design are provided. The circuit design is modified by traversing output connections paths for each input register and replacing any register in the output connection paths with a wire unless the register is a listed output register. An initial total cycle time value for the modified circuit design is determined. A gate level description for the modified circuit design is obtained by a macro synthesis with the initial total cycle time value. The total cycle time value for the modified circuit design is then varied in order to determine the theoretical limit of the modified circuit design. This theoretical limit is realized when negative slacks are present in a macro synthesis of the modified circuit design for a given total cycle time value. Based on this theoretical limit, the minimum pipeline depth of the circuit design is determined.
US09684746B2 Signal reconstruction in sequential logic circuitry
A method for reconstructing at least one output signal associated to a sequential logic circuitry block of a circuit is disclosed. At least one input signal is associated to the sequential logic circuitry block. The method comprises simulating a value of the at least one output signal depending on the at least one input signal and determining a transfer function for computing the value of the output signal directly after the simulation timestamp depending on the input signal and/or on the value of the output signal directly before the simulation timestamp. The method further comprises computing the value of the at least one output signal directly after the simulation timestamp as a function value of the transfer function, if a reconstruction condition is fulfilled.
US09684745B2 Digitally calibrated voltage regulators for power management
A computer provides a graphical user interface for displaying a virtual representation of a voltage regulator and for accepting a user requirement for the voltage regulator. The computer automatically determines an internal calibration setting of the voltage regulator that meets the user requirement. The computer simulates operation of the voltage regulator as calibrated with the internal calibration setting. The internal calibration setting is downloaded to the voltage regulator. A calibration controller of the voltage regulator receives the internal calibration setting and outputs digital calibration bits in accordance with the internal calibration setting. The digital calibration bits works in conjunction with interface circuits to adjust circuits of a voltage regulator core to digitally calibrate the voltage regulator.
US09684742B1 Method and apparatus for performing timing analysis on calibrated paths
A method for performing timing analysis on calibrated paths includes performing static timing analysis on the calibrated paths to obtain delay and margin information. The delay and margin information are utilized to emulate operations performed during calibration.
US09684740B2 Method and apparatus for proliferating testing data
Embodiments of the present invention provide information processing systems and methods for proliferating testing data based on sample testing data. In one embodiment, a difference is determined by comparing a desired query result to a query result acquired by executing a query statement on sample testing data. Sample testing data can then be proliferated based, at least in part, on the difference and data generation constraint conditions.
US09684739B1 View generator for managing data storage
Views of files in an archival data storage system are generated by a backup view generator. A storage application generates and stores archival data in an archive system, the archival data corresponding to client data stored on a server or in memory associated with one or more client nodes. The storage application also generates backup files of the archival data which may be stored in a local memory. A set of metadata attributes are associated with each of the backup files. The backup views are generated by comparing metadata values in a view definition file to the sets of attributes associated with the backup files. Generated backup views can be exported for processing, including searching the backup views or displaying the backup views in a user interface.
US09684738B2 Text-based command generation
Embodiments relate to generating application-processable commands from character strings. An aspect includes preparing a database in which are recorded keywords for presenting commands as conversion candidate objects, conversion candidate objects, and commands generated when a conversion candidate object has been selected. Another aspect includes receiving a plurality of character strings inputted by a user for an application. Another aspect includes converting a character string of the plurality of character strings to generate a completion candidate character string. Another aspect includes referencing the database when the character string includes a keyword, and presenting, to the user, completion candidate character strings and conversion candidate objects as a conversion candidate list. Another aspect includes generating a command corresponding to a selected conversion candidate object in response to selection of one of the conversion candidate objects from the conversion candidate list by the user.